09.Mar.2010 ... Version 25 is out for fab

   TS-7500 should be rotated 180 degrees 
   ( if board gets a spin )

2.Apr.2010

   Add test points for voltages

   Increase number of stacking connector pins for 3.3V CPU

7.Apr.2010

   On sch sheet "TS_7500_CTD_AND_ENDCAP_CONNECTIONS", spare/future
    wiring pads were re-numbered during component back-annotation
    These need to match connector/signal designations. 
    ( if board gets a spin )
    
   Signal "12V_PS_ON" should not route through Isolator U11
    Cut trace at U11-5 (bottom side)
    Cut trace at U11-12 (top side, just south of via)
    Blue-wire P1-11 to J2-14

   Signal "FD5" should route from J9-21 to J4-7 
   (CDOM-SIG)
    Cut trace bottom side, just west of via
    Blue-wire J9-21 to J4-7

   Signal "FD6" should route from J9-22 to J4-8 
   (CDOM-COM)
    Cut trace bottom side, just west of via
    Blue-wire J9-22 to J4-8

   Signal "AE6" should route from J10-28 (pad "AE3") to J6-13 
   (ISUS ALOG-CTD2-1)
    Blue-wire pad AE3 to J6-13
 
   Signal "AE7" should route from J10-29 (pad "AE2") to J6-14 
   (ISUS ALOG-CTD2-2)
    Blue-wire pad AE2 to J6-14
    
26.Apr.2010

   Install vertical ( not right angle ) connectors J4 J9 J6 J10 J12 J14

   Install U10 ( Humid/Temp ) *before* P1