Protel Design System Design Rule Check
PCB File : \\Atlas\projectlibrary\368000_DMO_AUV\Schematics\CampSealab\Controller.PcbDoc
Date     : 10/3/2012
Time     : 6:41:33 PM

Processing Rule : Room Controller (Bounding Region = (95mil, 95mil, 4105mil, 2505mil) (InComponentClass('Controller'))
Rule Violations :0

Processing Rule : Net Antennae (Tolerance=0mil) (All)
Rule Violations :0

Processing Rule : Silk to Silk (Clearance=10mil) (All),(All)
Rule Violations :0

Processing Rule : Silkscreen Over Component Pads (Clearance=10mil) (All),(All)
Rule Violations :0

Processing Rule : Minimum Solder Mask Sliver (Gap=10mil) (All),(All)
Rule Violations :0

Processing Rule : Hole To Hole Clearance (Gap=10mil) (All),(All)
Rule Violations :0

Processing Rule : Hole Size Constraint (Min=1mil) (Max=100mil) (All)
Rule Violations :0

Processing Rule : Height Constraint (Min=0mil) (Max=1000mil) (Prefered=500mil) (All)
Rule Violations :0

Processing Rule : Width Constraint (Min=10mil) (Max=60mil) (Preferred=10mil) (All)
Rule Violations :0

Processing Rule : Power Plane Connect Rule(Relief Connect )(Expansion=20mil) (Conductor Width=10mil) (Air Gap=10mil) (Entries=4) (All)
Rule Violations :0

Processing Rule : Clearance Constraint (Gap=10mil) (All),(All)
Rule Violations :0

Processing Rule : Un-Routed Net Constraint ( (All) )
Rule Violations :0

Processing Rule : Short-Circuit Constraint (Allowed=No) (All),(All)
Rule Violations :0


Violations Detected : 0
Time Elapsed        : 00:00:00