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(                                                                     )
(    Allegro Netrev Import Logic                                      )
(                                                                     )
(    Drawing          : TRIGGER_TIMING.brd                            )
(    Software Version : 16.6-2015S051                                 )
(    Date/Time        : Fri Jun 03 11:04:53 2016                      )
(                                                                     )
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------ Directives ------------

Ripup etch:                  No
Ripup delete first segment:  No
Ripup retain bondwire:       No
Ripup symbols:               Always
Missing symbol has error:    No
DRC update:                  Yes
Schematic directory:         'S:/Trigger_Timing/SchPCB/allegro'
Design Directory:            '.'
Old design name:             'S:/Trigger_Timing/SchPCB/allegro/TRIGGER_TIMING.brd'
New design name:             'S:/Trigger_Timing/SchPCB/allegro/TRIGGER_TIMING.brd'

CmdLine: netrev -$ -i S:/Trigger_Timing/SchPCB/allegro -y 1 -q netrev_constraint_report.xml S:/Trigger_Timing/SchPCB/allegro/#Taaaaag05644.tmp

------ Preparing to read pst files ------

Starting to read S:/Trigger_Timing/SchPCB/allegro/pstchip.dat 
   Finished reading S:/Trigger_Timing/SchPCB/allegro/pstchip.dat (00:00:00.06)
Starting to read S:/Trigger_Timing/SchPCB/allegro/pstxprt.dat 
   Finished reading S:/Trigger_Timing/SchPCB/allegro/pstxprt.dat (00:00:00.00)
Starting to read S:/Trigger_Timing/SchPCB/allegro/pstxnet.dat 
   Finished reading S:/Trigger_Timing/SchPCB/allegro/pstxnet.dat (00:00:00.00)

------ Oversights/Warnings/Errors ------


#1   WARNING(SPMHNI-192): Device/Symbol check warning detected. [help]

WARNING(SPMHNI-337): Unable to load symbol 'HARWIN_M80_8420242' used by RefDes J13 for device 'HARWIN_M80_8420242_HARWIN_M80_8': WARNING(SPMHUT-127): Could not find padstack 63R39_1. [help]

------ Library Paths ------
MODULEPATH =  . 
           C:/Cadence/SPB_16.6/share/local/pcb/modules 
           //water/Allegro_Library/Symbols_Drthom 

PSMPATH =  . 
           symbols 
           .. 
           ../symbols 
           C:/Cadence/SPB_16.6/share/local/pcb/symbols 
           C:/Cadence/SPB_16.6/share/pcb/pcb_lib/symbols 
           C:/Cadence/SPB_16.6/share/pcb/allegrolib/symbols 
           //water/Allegro_Library/Symbols_Drthom 

PADPATH =  . 
           symbols 
           .. 
           ../symbols 
           C:/Cadence/SPB_16.6/share/local/pcb/padstacks 
           C:/Cadence/SPB_16.6/share/pcb/pcb_lib/symbols 
           C:/Cadence/SPB_16.6/share/pcb/allegrolib/symbols 
           //water/Allegro_Library/Symbols_Drthom 


------ Summary Statistics ------


netrev run on Jun 3 11:04:53 2016
   DESIGN NAME : 'TRIGGER_TIMING'
   PACKAGING ON Jun  8 2015 17:42:25

   COMPILE 'logic'
   CHECK_PIN_NAMES OFF
   CROSS_REFERENCE OFF
   FEEDBACK OFF
   INCREMENTAL OFF
   INTERFACE_TYPE PHYSICAL
   MAX_ERRORS 500
   MERGE_MINIMUM 5
   NET_NAME_CHARS '#%&()*+-./:=>?@[]^_`|'
   NET_NAME_LENGTH 24
   OVERSIGHTS ON
   REPLACE_CHECK OFF
   SINGLE_NODE_NETS ON
   SPLIT_MINIMUM 0
   SUPPRESS   20
   WARNINGS ON

 No error detected
 No oversight detected
  1 warnings detected

cpu time      0:01:29
elapsed time  0:00:01

SPMHNI-192:
This is a general warning that is normally paired with another message. Check the secondary message for more detail.
SPMHNI-337:
Indicates that your PSMPATH or PADPATH is not set correctly to find all your footprints or padstacks. If only a few of these messages are seen you may need to create new footprints or padstacks. During logic import, this is a warning and unless errors were reported during import the design has been updated with all logic changes.