; generated by Component: ARM Compiler 5.06 update 1 (build 61) Tool: ArmCC [4d35ad]
; commandline ArmCC [--list --debug -c --asm --interleave -o.\obj\emac.o --asm_dir=.\Obj\ --list_dir=.\Obj\ --depend=.\obj\emac.d --cpu=Cortex-M3 --apcs=interwork -O0 --diag_suppress=9931 -I. -I.\Core_CM3 -ID:\work\arm\lpc1769_eth_bootloader\RTE -I"C:\Program Files\Keil\ARM\PACK\Keil\LPC1700_DFP\2.2.0\Device\Include" -I"C:\Program Files\Keil\ARM\CMSIS\Include" -D__UVISION_VERSION=517 -DLPC175x_6x --omf_browse=.\obj\emac.crf ethernet\emac.c]
                          THUMB

                          AREA ||.text||, CODE, READONLY, ALIGN=2

                  load_mac_from_flash PROC
;;;97     
;;;98     static void load_mac_from_flash(void)
000000  b510              PUSH     {r4,lr}
;;;99     {
;;;100    	FLASH_CFG *fcfg = (FLASH_CFG *) FLASH_CFG_LOCATION;
000002  48fe              LDR      r0,|L1.1020|
;;;101    	int i;
;;;102    	uint16_t sum = 1;
000004  2101              MOVS     r1,#1
;;;103    	
;;;104    	/* verify data is valid */
;;;105    	for (i = 0; i < sizeof(FLASH_CFG); i++) {
000006  2200              MOVS     r2,#0
000008  e009              B        |L1.30|
                  |L1.10|
;;;106    		sum = (sum + ((uint8_t *)fcfg)[i]) % 256;
00000a  5c84              LDRB     r4,[r0,r2]
00000c  1863              ADDS     r3,r4,r1
00000e  17dc              ASRS     r4,r3,#31
000010  eb036414          ADD      r4,r3,r4,LSR #24
000014  1224              ASRS     r4,r4,#8
000016  eba32404          SUB      r4,r3,r4,LSL #8
00001a  b2a1              UXTH     r1,r4
00001c  1c52              ADDS     r2,r2,#1              ;105
                  |L1.30|
00001e  2a9c              CMP      r2,#0x9c              ;105
000020  d3f3              BCC      |L1.10|
;;;107    	}
;;;108    	sum = (sum - fcfg->chksum) % 256;
000022  f8904098          LDRB     r4,[r0,#0x98]
000026  1b0b              SUBS     r3,r1,r4
000028  17dc              ASRS     r4,r3,#31
00002a  eb036414          ADD      r4,r3,r4,LSR #24
00002e  1224              ASRS     r4,r4,#8
000030  eba32404          SUB      r4,r3,r4,LSL #8
000034  b2a1              UXTH     r1,r4
;;;109    	sum &= 0xff;
000036  b2c9              UXTB     r1,r1
;;;110    	
;;;111    	if (sum == fcfg->chksum) {
000038  f8903098          LDRB     r3,[r0,#0x98]
00003c  428b              CMP      r3,r1
00003e  d112              BNE      |L1.102|
;;;112    		MYMAC_6 = fcfg->macaddr[0];
000040  7803              LDRB     r3,[r0,#0]
000042  4cef              LDR      r4,|L1.1024|
000044  7023              STRB     r3,[r4,#0]
;;;113    		MYMAC_5 = fcfg->macaddr[1];
000046  7843              LDRB     r3,[r0,#1]
000048  4cee              LDR      r4,|L1.1028|
00004a  7023              STRB     r3,[r4,#0]
;;;114    		MYMAC_4 = fcfg->macaddr[2];
00004c  7883              LDRB     r3,[r0,#2]
00004e  4cee              LDR      r4,|L1.1032|
000050  7023              STRB     r3,[r4,#0]
;;;115    		MYMAC_3 = fcfg->macaddr[3];
000052  78c3              LDRB     r3,[r0,#3]
000054  4ced              LDR      r4,|L1.1036|
000056  7023              STRB     r3,[r4,#0]
;;;116    		MYMAC_2 = fcfg->macaddr[4];
000058  7903              LDRB     r3,[r0,#4]
00005a  4ced              LDR      r4,|L1.1040|
00005c  7023              STRB     r3,[r4,#0]
;;;117    		MYMAC_1 = fcfg->macaddr[5];
00005e  7943              LDRB     r3,[r0,#5]
000060  4cec              LDR      r4,|L1.1044|
000062  7023              STRB     r3,[r4,#0]
000064  e011              B        |L1.138|
                  |L1.102|
;;;118    	} else {
;;;119    		/* default values */
;;;120    		MYMAC_6 = 0x00;
000066  2300              MOVS     r3,#0
000068  4ce5              LDR      r4,|L1.1024|
00006a  7023              STRB     r3,[r4,#0]
;;;121    		MYMAC_5 = 0x0c;
00006c  230c              MOVS     r3,#0xc
00006e  4ce5              LDR      r4,|L1.1028|
000070  7023              STRB     r3,[r4,#0]
;;;122    		MYMAC_4 = 0x6a;
000072  236a              MOVS     r3,#0x6a
000074  4ce4              LDR      r4,|L1.1032|
000076  7023              STRB     r3,[r4,#0]
;;;123    		MYMAC_3 = 0x01;
000078  2301              MOVS     r3,#1
00007a  4ce4              LDR      r4,|L1.1036|
00007c  7023              STRB     r3,[r4,#0]
;;;124    		MYMAC_2 = 0x03;
00007e  2303              MOVS     r3,#3
000080  4ce3              LDR      r4,|L1.1040|
000082  7023              STRB     r3,[r4,#0]
;;;125    		MYMAC_1 = 0x10;
000084  2310              MOVS     r3,#0x10
000086  4ce3              LDR      r4,|L1.1044|
000088  7023              STRB     r3,[r4,#0]
                  |L1.138|
;;;126    	}
;;;127    }
00008a  bd10              POP      {r4,pc}
;;;128    
                          ENDP

                  write_PHY PROC
;;;129    void write_PHY (int PhyReg, int Value) {
00008c  b510              PUSH     {r4,lr}
;;;130      unsigned int tout;
;;;131    
;;;132      /* if LPC175x then use software MIIM/MDIO */
;;;133      if (dev_175x == TRUE)
00008e  4be2              LDR      r3,|L1.1048|
000090  681b              LDR      r3,[r3,#0]  ; dev_175x
000092  2b01              CMP      r3,#1
000094  d017              BEQ      |L1.198|
;;;134      {
;;;135        //mdio_write(PhyReg, Value);
;;;136      }
;;;137      /* use hardware MIIM/MDIO */
;;;138      else
;;;139      {
;;;140    		LPC_EMAC->MCMD = 0;
000096  2300              MOVS     r3,#0
000098  f04f44a0          MOV      r4,#0x50000000
00009c  6263              STR      r3,[r4,#0x24]
;;;141        LPC_EMAC->MADR = (PHY_ADDRESS<<8) | PhyReg;
00009e  f4407380          ORR      r3,r0,#0x100
0000a2  62a3              STR      r3,[r4,#0x28]
;;;142        LPC_EMAC->MWTD = Value;
0000a4  4623              MOV      r3,r4
0000a6  62d9              STR      r1,[r3,#0x2c]
;;;143    
;;;144        /* Wait utill operation completed */
;;;145        tout = 0;
0000a8  2200              MOVS     r2,#0
;;;146        for (tout = 0; tout < MII_WR_TOUT; tout++) {
0000aa  bf00              NOP      
0000ac  e007              B        |L1.190|
                  |L1.174|
;;;147          if ((LPC_EMAC->MIND & MIND_BUSY) == 0) {
0000ae  f04f43a0          MOV      r3,#0x50000000
0000b2  6b5b              LDR      r3,[r3,#0x34]
0000b4  f0030301          AND      r3,r3,#1
0000b8  b903              CBNZ     r3,|L1.188|
;;;148            break;
0000ba  e003              B        |L1.196|
                  |L1.188|
0000bc  1c52              ADDS     r2,r2,#1              ;146
                  |L1.190|
0000be  f5b22fa0          CMP      r2,#0x50000           ;146
0000c2  d3f4              BCC      |L1.174|
                  |L1.196|
0000c4  bf00              NOP      
                  |L1.198|
;;;149          }
;;;150        }
;;;151      }
;;;152    }
0000c6  bd10              POP      {r4,pc}
;;;153    
                          ENDP

                  read_PHY PROC
;;;154    unsigned short read_PHY (unsigned char PhyReg) {
0000c8  b510              PUSH     {r4,lr}
0000ca  4601              MOV      r1,r0
;;;155      unsigned int tout;
;;;156      unsigned short Value;
;;;157    
;;;158      /* if LPC175x then use software MIIM/MDIO */
;;;159      if (dev_175x == TRUE)
0000cc  4bd2              LDR      r3,|L1.1048|
0000ce  681b              LDR      r3,[r3,#0]  ; dev_175x
0000d0  2b01              CMP      r3,#1
0000d2  d01c              BEQ      |L1.270|
;;;160      {
;;;161        //Value = mdio_read(PhyReg);
;;;162      }
;;;163      /* use hardware MIIM/MDIO */
;;;164      else
;;;165      {
;;;166        LPC_EMAC->MADR = (PHY_ADDRESS<<8) | PhyReg;
0000d4  f4417380          ORR      r3,r1,#0x100
0000d8  f04f44a0          MOV      r4,#0x50000000
0000dc  62a3              STR      r3,[r4,#0x28]
;;;167        LPC_EMAC->MCMD = MCMD_READ;
0000de  2301              MOVS     r3,#1
0000e0  6263              STR      r3,[r4,#0x24]
;;;168    
;;;169        /* Wait until operation completed */
;;;170        tout = 0;
0000e2  2200              MOVS     r2,#0
;;;171        for (tout = 0; tout < MII_RD_TOUT; tout++) {
0000e4  bf00              NOP      
0000e6  e007              B        |L1.248|
                  |L1.232|
;;;172          if ((LPC_EMAC->MIND & MIND_BUSY) == 0) {
0000e8  f04f43a0          MOV      r3,#0x50000000
0000ec  6b5b              LDR      r3,[r3,#0x34]
0000ee  f0030301          AND      r3,r3,#1
0000f2  b903              CBNZ     r3,|L1.246|
;;;173            break;
0000f4  e003              B        |L1.254|
                  |L1.246|
0000f6  1c52              ADDS     r2,r2,#1              ;171
                  |L1.248|
0000f8  f5b22fa0          CMP      r2,#0x50000           ;171
0000fc  d3f4              BCC      |L1.232|
                  |L1.254|
0000fe  bf00              NOP      
;;;174          }
;;;175        }
;;;176        LPC_EMAC->MCMD = 0;
000100  2300              MOVS     r3,#0
000102  f04f44a0          MOV      r4,#0x50000000
000106  6263              STR      r3,[r4,#0x24]
;;;177        Value = LPC_EMAC->MRDD;
000108  4623              MOV      r3,r4
00010a  6b1b              LDR      r3,[r3,#0x30]
00010c  b298              UXTH     r0,r3
                  |L1.270|
;;;178      }
;;;179    
;;;180      return Value;
;;;181    }
00010e  bd10              POP      {r4,pc}
;;;182    
                          ENDP

                  ReadFrame_EMAC PROC
;;;183    unsigned short ReadFrame_EMAC(void)
000110  48c2              LDR      r0,|L1.1052|
;;;184    {
;;;185      return (*rxptr++);
000112  6800              LDR      r0,[r0,#0]  ; rxptr
000114  8800              LDRH     r0,[r0,#0]
000116  49c1              LDR      r1,|L1.1052|
000118  6809              LDR      r1,[r1,#0]  ; rxptr
00011a  1c89              ADDS     r1,r1,#2
00011c  4abf              LDR      r2,|L1.1052|
00011e  6011              STR      r1,[r2,#0]  ; rxptr
;;;186    }
000120  4770              BX       lr
;;;187    
                          ENDP

                  CopyFromFrame_EMAC PROC
;;;188    void CopyFromFrame_EMAC(void *Dest, unsigned short Size) {
000122  b530              PUSH     {r4,r5,lr}
000124  4605              MOV      r5,r0
000126  460b              MOV      r3,r1
;;;189      unsigned short * piDest;                       
;;;190    
;;;191      piDest = Dest;                                 
000128  462c              MOV      r4,r5
;;;192      while (Size > 1) {
00012a  e005              B        |L1.312|
                  |L1.300|
;;;193        *piDest++ = ReadFrame_EMAC();
00012c  f7fffffe          BL       ReadFrame_EMAC
000130  f8240b02          STRH     r0,[r4],#2
;;;194        Size -= 2;
000134  1e98              SUBS     r0,r3,#2
000136  b283              UXTH     r3,r0
                  |L1.312|
000138  2b01              CMP      r3,#1                 ;192
00013a  dcf7              BGT      |L1.300|
;;;195      } 
;;;196      if (Size) {                                         
00013c  b113              CBZ      r3,|L1.324|
;;;197        *(unsigned char *)piDest = (char)ReadFrame_EMAC();
00013e  f7fffffe          BL       ReadFrame_EMAC
000142  7020              STRB     r0,[r4,#0]
                  |L1.324|
;;;198      }                                                   
;;;199    }
000144  bd30              POP      {r4,r5,pc}
;;;200    
                          ENDP

                  same_mac PROC
;;;201    int same_mac(char * mac1,char * mac2) {
000146  b510              PUSH     {r4,lr}
000148  4602              MOV      r2,r0
00014a  460b              MOV      r3,r1
;;;202      int i;
;;;203      
;;;204      for(i=0; i<6; i++) {
00014c  2100              MOVS     r1,#0
00014e  e006              B        |L1.350|
                  |L1.336|
;;;205        if(mac1[i] != mac2[i])
000150  5c50              LDRB     r0,[r2,r1]
000152  5c5c              LDRB     r4,[r3,r1]
000154  42a0              CMP      r0,r4
000156  d001              BEQ      |L1.348|
;;;206    	  return false;
000158  2000              MOVS     r0,#0
                  |L1.346|
;;;207      }
;;;208      return true;
;;;209    }
00015a  bd10              POP      {r4,pc}
                  |L1.348|
00015c  1c49              ADDS     r1,r1,#1              ;204
                  |L1.350|
00015e  2906              CMP      r1,#6                 ;204
000160  dbf6              BLT      |L1.336|
000162  2001              MOVS     r0,#1                 ;208
000164  e7f9              B        |L1.346|
;;;210    
                          ENDP

                  filter_pass PROC
;;;211    int filter_pass(void) {
000166  b500              PUSH     {lr}
;;;212    
;;;213       if (!synchro)
000168  48ad              LDR      r0,|L1.1056|
00016a  7800              LDRB     r0,[r0,#0]  ; synchro
00016c  b908              CBNZ     r0,|L1.370|
;;;214         return true;
00016e  2001              MOVS     r0,#1
                  |L1.368|
;;;215    
;;;216       if(! same_mac(FRAMEr->source,HostMAC)) {
;;;217    #if ETHERNET_DEBUG
;;;218    	 print("Frame from different MAC: Filtered out!\n");
;;;219    #endif   	
;;;220         return false;
;;;221       }
;;;222       if(PACKETr->destport != DestPort) {
;;;223    #if ETHERNET_DEBUG
;;;224    	 print("Packet from different Destination Port: Filtered out!\n");
;;;225    #endif 
;;;226         return false;
;;;227       }
;;;228       if(PACKETr->srcport != SrcPort) {
;;;229    #if ETHERNET_DEBUG
;;;230    	 print("Packet to different Source Port: Filtered out!\n");
;;;231    #endif 
;;;232         return false;
;;;233       }
;;;234       return true;
;;;235    }
000170  bd00              POP      {pc}
                  |L1.370|
000172  49ac              LDR      r1,|L1.1060|
000174  48ac              LDR      r0,|L1.1064|
000176  f7fffffe          BL       same_mac
00017a  b908              CBNZ     r0,|L1.384|
00017c  2000              MOVS     r0,#0                 ;220
00017e  e7f7              B        |L1.368|
                  |L1.384|
000180  48a9              LDR      r0,|L1.1064|
000182  1f80              SUBS     r0,r0,#6              ;222
000184  8c80              LDRH     r0,[r0,#0x24]         ;222
000186  49a9              LDR      r1,|L1.1068|
000188  8809              LDRH     r1,[r1,#0]            ;222  ; DestPort
00018a  4288              CMP      r0,r1                 ;222
00018c  d001              BEQ      |L1.402|
00018e  2000              MOVS     r0,#0                 ;226
000190  e7ee              B        |L1.368|
                  |L1.402|
000192  48a5              LDR      r0,|L1.1064|
000194  1f80              SUBS     r0,r0,#6              ;228
000196  8c40              LDRH     r0,[r0,#0x22]         ;228
000198  49a5              LDR      r1,|L1.1072|
00019a  8809              LDRH     r1,[r1,#0]            ;228  ; SrcPort
00019c  4288              CMP      r0,r1                 ;228
00019e  d001              BEQ      |L1.420|
0001a0  2000              MOVS     r0,#0                 ;232
0001a2  e7e5              B        |L1.368|
                  |L1.420|
0001a4  2001              MOVS     r0,#1                 ;234
0001a6  e7e3              B        |L1.368|
;;;236    
                          ENDP

                  WriteFrame_EMAC PROC
;;;237    void WriteFrame_EMAC(unsigned short Data)
0001a8  49a2              LDR      r1,|L1.1076|
;;;238    {
;;;239      *txptr++ = Data;
0001aa  6809              LDR      r1,[r1,#0]  ; txptr
0001ac  8008              STRH     r0,[r1,#0]
0001ae  49a1              LDR      r1,|L1.1076|
0001b0  6809              LDR      r1,[r1,#0]  ; txptr
0001b2  1c89              ADDS     r1,r1,#2
0001b4  4a9f              LDR      r2,|L1.1076|
0001b6  6011              STR      r1,[r2,#0]  ; txptr
;;;240    }
0001b8  4770              BX       lr
;;;241    
                          ENDP

                  CopyToFrame_EMAC PROC
;;;242    void CopyToFrame_EMAC(void *Source, unsigned int Size)
0001ba  b530              PUSH     {r4,r5,lr}
;;;243    {
0001bc  4604              MOV      r4,r0
0001be  460b              MOV      r3,r1
;;;244      unsigned short * piSource;
;;;245    
;;;246      piSource = Source;
0001c0  4625              MOV      r5,r4
;;;247      Size = (Size + 1) & 0xFFFE;    
0001c2  1c58              ADDS     r0,r3,#1
0001c4  f64f71fe          MOV      r1,#0xfffe
0001c8  ea000301          AND      r3,r0,r1
;;;248      while (Size > 0) {
0001cc  e004              B        |L1.472|
                  |L1.462|
;;;249        WriteFrame_EMAC(*piSource++);
0001ce  f8350b02          LDRH     r0,[r5],#2
0001d2  f7fffffe          BL       WriteFrame_EMAC
;;;250        Size -= 2;
0001d6  1e9b              SUBS     r3,r3,#2
                  |L1.472|
0001d8  2b00              CMP      r3,#0                 ;248
0001da  d1f8              BNE      |L1.462|
;;;251      }
;;;252    }
0001dc  bd30              POP      {r4,r5,pc}
;;;253    
                          ENDP

                  chksum16 PROC
;;;254    int chksum16(void *buf1, short len) {
0001de  b570              PUSH     {r4-r6,lr}
0001e0  4603              MOV      r3,r0
;;;255      unsigned short * buf = buf1;
0001e2  461a              MOV      r2,r3
;;;256      int chksum16, chksum=0;
0001e4  2500              MOVS     r5,#0
;;;257    
;;;258      while(len > 0) {	
0001e6  e00d              B        |L1.516|
                  |L1.488|
;;;259        if (len == 1)
0001e8  2901              CMP      r1,#1
0001ea  d101              BNE      |L1.496|
;;;260          chksum16 = ((*buf)&0x00FF);
0001ec  7814              LDRB     r4,[r2,#0]
0001ee  e000              B        |L1.498|
                  |L1.496|
;;;261        else
;;;262          chksum16 = (*buf);
0001f0  8814              LDRH     r4,[r2,#0]
                  |L1.498|
;;;263        chksum = chksum + HTONS(chksum16);
0001f2  b2e0              UXTB     r0,r4
0001f4  f3c42607          UBFX     r6,r4,#8,#8
0001f8  ea462000          ORR      r0,r6,r0,LSL #8
0001fc  4405              ADD      r5,r5,r0
;;;264        *buf++;
0001fe  1c92              ADDS     r2,r2,#2
;;;265        len -=2;
000200  1e88              SUBS     r0,r1,#2
000202  b201              SXTH     r1,r0
                  |L1.516|
000204  2900              CMP      r1,#0                 ;258
000206  dcef              BGT      |L1.488|
;;;266      }
;;;267      return (~(chksum + ((chksum & 0xFFFF0000) >> 16))&0xFFFF);
000208  eb054015          ADD      r0,r5,r5,LSR #16
00020c  43c0              MVNS     r0,r0
00020e  b280              UXTH     r0,r0
;;;268    }
000210  bd70              POP      {r4-r6,pc}
;;;269    
                          ENDP

                  init_emac PROC
;;;272    //*****************************************************//
;;;273    void init_emac(void)  {
000212  e92d41f0          PUSH     {r4-r8,lr}
;;;274      unsigned int regv,tout,id1,id2,i;
;;;275    
;;;276      synchro = false;
000216  2000              MOVS     r0,#0
000218  4981              LDR      r1,|L1.1056|
00021a  7008              STRB     r0,[r1,#0]
;;;277    
;;;278    #if LED_ENABLED
;;;279      /* configure activity LED pin as output */
;;;280      C41_LED_PORT->FIODIR |= (1<<C41_BLUE_LED_PIN);
00021c  4886              LDR      r0,|L1.1080|
00021e  6c00              LDR      r0,[r0,#0x40]
000220  f0400008          ORR      r0,r0,#8
000224  4984              LDR      r1,|L1.1080|
000226  6408              STR      r0,[r1,#0x40]
;;;281      C41_LED_PORT->FIODIR |= (1<<C41_GREEN_LED_PIN);
000228  4608              MOV      r0,r1
00022a  6c00              LDR      r0,[r0,#0x40]
00022c  f0400004          ORR      r0,r0,#4
000230  6408              STR      r0,[r1,#0x40]
;;;282      C41_LED_PORT->FIODIR |= (1<<C41_RED_LED_PIN);
000232  4608              MOV      r0,r1
000234  6c00              LDR      r0,[r0,#0x40]
000236  f0400010          ORR      r0,r0,#0x10
00023a  6408              STR      r0,[r1,#0x40]
;;;283      LINCOLN_LED_PORT->FIODIR |= (1<<LINCOLN_LED_PIN);
00023c  4608              MOV      r0,r1
00023e  6e00              LDR      r0,[r0,#0x60]
000240  f0406080          ORR      r0,r0,#0x4000000
000244  6608              STR      r0,[r1,#0x60]
;;;284    
;;;285    #endif
;;;286    
;;;287    #if ETHERNET_DEBUG
;;;288      UART_init(115200);
;;;289      print("Ethernet Secondary Bootloader: Target in debug mode\n");
;;;290    #endif 
;;;291    
;;;292      /* Power Up the EMAC controller. */
;;;293      LPC_SC->PCONP |= 0x40000000;
000246  487d              LDR      r0,|L1.1084|
000248  6800              LDR      r0,[r0,#0]
00024a  f0404080          ORR      r0,r0,#0x40000000
00024e  497b              LDR      r1,|L1.1084|
000250  39c4              SUBS     r1,r1,#0xc4
000252  f8c100c4          STR      r0,[r1,#0xc4]
;;;294    
;;;295      /* configure ethernet pins */
;;;296      LPC_PINCON->PINSEL2 = 0x50150105;
000256  487a              LDR      r0,|L1.1088|
000258  497a              LDR      r1,|L1.1092|
00025a  6088              STR      r0,[r1,#8]
;;;297    
;;;298      /* if device is an LPC175x then configure pins to use software */
;;;299      /* based MIIM/MDIO */
;;;300      if (is_LPC175x())
00025c  f7fffffe          BL       is_LPC175x
000260  b178              CBZ      r0,|L1.642|
;;;301      {
;;;302        dev_175x = TRUE;
000262  2001              MOVS     r0,#1
000264  496c              LDR      r1,|L1.1048|
000266  6008              STR      r0,[r1,#0]  ; dev_175x
;;;303        /* use P2.8 for MDC and P2.9 for MDIO */
;;;304        LPC_PINCON->PINSEL4 &= ~0x000F0000;
000268  4876              LDR      r0,|L1.1092|
00026a  6900              LDR      r0,[r0,#0x10]
00026c  f4202070          BIC      r0,r0,#0xf0000
000270  4974              LDR      r1,|L1.1092|
000272  6108              STR      r0,[r1,#0x10]
;;;305        LPC_GPIO2->FIODIR |= MDC;
000274  4870              LDR      r0,|L1.1080|
000276  6c00              LDR      r0,[r0,#0x40]
000278  f4407080          ORR      r0,r0,#0x100
00027c  496e              LDR      r1,|L1.1080|
00027e  6408              STR      r0,[r1,#0x40]
000280  e009              B        |L1.662|
                  |L1.642|
;;;306      }
;;;307      else
;;;308      {
;;;309        dev_175x = FALSE;
000282  2000              MOVS     r0,#0
000284  4964              LDR      r1,|L1.1048|
000286  6008              STR      r0,[r1,#0]  ; dev_175x
;;;310        /* configure pins for RMII and MIIM */
;;;311        LPC_PINCON->PINSEL3 = (LPC_PINCON->PINSEL3 & ~0x0000000F) | 0x00000005;
000288  486e              LDR      r0,|L1.1092|
00028a  68c0              LDR      r0,[r0,#0xc]
00028c  f020000f          BIC      r0,r0,#0xf
000290  1d40              ADDS     r0,r0,#5
000292  496c              LDR      r1,|L1.1092|
000294  60c8              STR      r0,[r1,#0xc]
                  |L1.662|
;;;312      }
;;;313      
;;;314      /* Reset all EMAC internal modules. */
;;;315      LPC_EMAC->MAC1    = MAC1_RES_TX | MAC1_RES_MCS_TX | MAC1_RES_RX | MAC1_RES_MCS_RX |
000296  f44f404f          MOV      r0,#0xcf00
00029a  f04f41a0          MOV      r1,#0x50000000
00029e  6008              STR      r0,[r1,#0]
;;;316                          MAC1_SIM_RES | MAC1_SOFT_RES;
;;;317      LPC_EMAC->Command = CR_REG_RES | CR_TX_RES | CR_RX_RES;
0002a0  2038              MOVS     r0,#0x38
0002a2  4969              LDR      r1,|L1.1096|
0002a4  6008              STR      r0,[r1,#0]
;;;318    
;;;319      /* A short delay after reset. */
;;;320      for (tout = 100; tout; tout--);
0002a6  2564              MOVS     r5,#0x64
0002a8  e000              B        |L1.684|
                  |L1.682|
0002aa  1e6d              SUBS     r5,r5,#1
                  |L1.684|
0002ac  2d00              CMP      r5,#0
0002ae  d1fc              BNE      |L1.682|
;;;321    
;;;322      /* Initialize MAC control registers. */
;;;323      LPC_EMAC->MAC1 = MAC1_PASS_ALL;
0002b0  2002              MOVS     r0,#2
0002b2  f04f41a0          MOV      r1,#0x50000000
0002b6  6008              STR      r0,[r1,#0]
;;;324      LPC_EMAC->MAC2 = MAC2_CRC_EN | MAC2_PAD_EN;
0002b8  2030              MOVS     r0,#0x30
0002ba  6048              STR      r0,[r1,#4]
;;;325      LPC_EMAC->MAXF = ETH_MAX_FLEN;
0002bc  f24050f2          MOV      r0,#0x5f2
0002c0  6148              STR      r0,[r1,#0x14]
;;;326      LPC_EMAC->CLRT = CLRT_DEF;
0002c2  f243700f          MOV      r0,#0x370f
0002c6  6108              STR      r0,[r1,#0x10]
;;;327      LPC_EMAC->IPGR = IPGR_DEF;
0002c8  2012              MOVS     r0,#0x12
0002ca  60c8              STR      r0,[r1,#0xc]
;;;328    
;;;329      /* Enable Reduced MII interface. */
;;;330      LPC_EMAC->Command = CR_RMII | CR_PASS_RUNT_FRM;
0002cc  0140              LSLS     r0,r0,#5
0002ce  495e              LDR      r1,|L1.1096|
0002d0  6008              STR      r0,[r1,#0]
;;;331    
;;;332      /* MII Mgmt Configuration register and MII Mgnt hardware Reset       */
;;;333      /* host clock divided by 20, no suppress preamble, no scan increment */
;;;334      LPC_EMAC->MCFG = HOST_CLK_BY_28 | MCFG_RES_MII;	
0002d2  f248001c          MOV      r0,#0x801c
0002d6  f04f41a0          MOV      r1,#0x50000000
0002da  6208              STR      r0,[r1,#0x20]
;;;335      for ( i = 0; i < 0x40; i++ );
0002dc  2400              MOVS     r4,#0
0002de  e000              B        |L1.738|
                  |L1.736|
0002e0  1c64              ADDS     r4,r4,#1
                  |L1.738|
0002e2  2c40              CMP      r4,#0x40
0002e4  d3fc              BCC      |L1.736|
;;;336      LPC_EMAC->MCFG &= (~MCFG_RES_MII);	/* Clear the reset */
0002e6  f04f40a0          MOV      r0,#0x50000000
0002ea  6a00              LDR      r0,[r0,#0x20]
0002ec  f4204000          BIC      r0,r0,#0x8000
0002f0  f04f41a0          MOV      r1,#0x50000000
0002f4  6208              STR      r0,[r1,#0x20]
;;;337      LPC_EMAC->MCMD = 0;	
0002f6  2000              MOVS     r0,#0
0002f8  6248              STR      r0,[r1,#0x24]
;;;338    
;;;339      /* Put the PHY chip in reset mode */
;;;340      write_PHY (PHY_REG_BMCR, PHY_RESET);
0002fa  f44f4100          MOV      r1,#0x8000
0002fe  f7fffffe          BL       write_PHY
;;;341    
;;;342      /* Wait for hardware reset to end. */
;;;343      for (tout = 0; tout < 0x100000; tout++) {
000302  2500              MOVS     r5,#0
000304  e008              B        |L1.792|
                  |L1.774|
;;;344        regv = read_PHY (PHY_REG_BMCR);
000306  2000              MOVS     r0,#0
000308  f7fffffe          BL       read_PHY
00030c  4606              MOV      r6,r0
;;;345        if (!(regv & PHY_RESET)) {
00030e  f4064000          AND      r0,r6,#0x8000
000312  b900              CBNZ     r0,|L1.790|
;;;346          /* Reset complete */
;;;347          break;
000314  e003              B        |L1.798|
                  |L1.790|
000316  1c6d              ADDS     r5,r5,#1              ;343
                  |L1.792|
000318  f5b51f80          CMP      r5,#0x100000          ;343
00031c  d3f3              BCC      |L1.774|
                  |L1.798|
00031e  bf00              NOP      
;;;348        }
;;;349      }
;;;350    
;;;351      /* Configure the PHY device */
;;;352      id1 = read_PHY (PHY_REG_IDR1);
000320  2002              MOVS     r0,#2
000322  f7fffffe          BL       read_PHY
000326  4680              MOV      r8,r0
;;;353      id2 = read_PHY (PHY_REG_IDR2);
000328  2003              MOVS     r0,#3
00032a  f7fffffe          BL       read_PHY
00032e  4607              MOV      r7,r0
;;;354      if (((id1 << 16) | (id2 & 0xFFF0)) == KSZ8041_ID) {
000330  f64f70f0          MOV      r0,#0xfff0
000334  4038              ANDS     r0,r0,r7
000336  ea404008          ORR      r0,r0,r8,LSL #16
00033a  4944              LDR      r1,|L1.1100|
00033c  4288              CMP      r0,r1
00033e  d105              BNE      |L1.844|
;;;355        /* 
;;;356    	 * This is a KSZ8041 PHY.
;;;357         * There seem to be random packets going missing with 100 FDX, so use HDX.
;;;358         */
;;;359        write_PHY (PHY_REG_BMCR, PHY_SET_100);
000340  f44f5100          MOV      r1,#0x2000
000344  2000              MOVS     r0,#0
000346  f7fffffe          BL       write_PHY
00034a  e00f              B        |L1.876|
                  |L1.844|
;;;360      } else if (((id1 << 16) | (id2 & 0xFFF0)) == LAN8720A_ID) {
00034c  f64f70f0          MOV      r0,#0xfff0
000350  4038              ANDS     r0,r0,r7
000352  ea404008          ORR      r0,r0,r8,LSL #16
000356  493e              LDR      r1,|L1.1104|
000358  4288              CMP      r0,r1
00035a  d105              BNE      |L1.872|
;;;361        /* This is a LAN8720A PHY */
;;;362        write_PHY (PHY_REG_BMCR, PHY_RESTART_ANEG | PHY_EN_ANEG); //PHY_SET_FDPLX | PHY_SET_100 | PHY_AUTO_NEG);
00035c  f44f5190          MOV      r1,#0x1200
000360  2000              MOVS     r0,#0
000362  f7fffffe          BL       write_PHY
000366  e001              B        |L1.876|
                  |L1.872|
;;;363      } else {
;;;364        /* unsupported PHY */
;;;365        for (;;);
000368  bf00              NOP      
                  |L1.874|
00036a  e7fe              B        |L1.874|
                  |L1.876|
;;;366      }
;;;367    
;;;368      /* Wait to complete Auto_Negotiation. */
;;;369      for (tout = 0; tout < 0x100000; tout++) {
00036c  2500              MOVS     r5,#0
00036e  e008              B        |L1.898|
                  |L1.880|
;;;370        regv = read_PHY (PHY_REG_BMSR);
000370  2001              MOVS     r0,#1
000372  f7fffffe          BL       read_PHY
000376  4606              MOV      r6,r0
;;;371        if (regv & (PHY_LINK_UP)) {
000378  f0060004          AND      r0,r6,#4
00037c  b100              CBZ      r0,|L1.896|
;;;372          /* Autonegotiation Complete. Link is up. */
;;;373          break;
00037e  e003              B        |L1.904|
                  |L1.896|
000380  1c6d              ADDS     r5,r5,#1              ;369
                  |L1.898|
000382  f5b51f80          CMP      r5,#0x100000          ;369
000386  d3f3              BCC      |L1.880|
                  |L1.904|
000388  bf00              NOP      
;;;374        }
;;;375      }
;;;376    	
;;;377      /* Get the link params. */
;;;378      regv = read_PHY (PHY_REG_STS);
00038a  201f              MOVS     r0,#0x1f
00038c  f7fffffe          BL       read_PHY
000390  4606              MOV      r6,r0
;;;379    
;;;380    #if ETHERNET_DEBUG
;;;381      print("PHY status: ");
;;;382      printhexa(regv);
;;;383      print("\n------------------\n");
;;;384    #endif
;;;385      
;;;386      /* Configure Full/Half Duplex mode. */
;;;387      if (regv & PHY_DPLX) {
000392  f0060010          AND      r0,r6,#0x10
000396  b180              CBZ      r0,|L1.954|
;;;388        /* Full duplex is enabled. */
;;;389        LPC_EMAC->MAC2    |= MAC2_FULL_DUP;
000398  f04f40a0          MOV      r0,#0x50000000
00039c  6840              LDR      r0,[r0,#4]
00039e  f0400001          ORR      r0,r0,#1
0003a2  f04f41a0          MOV      r1,#0x50000000
0003a6  6048              STR      r0,[r1,#4]
;;;390        LPC_EMAC->Command |= CR_FULL_DUP;
0003a8  4827              LDR      r0,|L1.1096|
0003aa  6800              LDR      r0,[r0,#0]
0003ac  f4406080          ORR      r0,r0,#0x400
0003b0  f8c10100          STR      r0,[r1,#0x100]
;;;391        LPC_EMAC->IPGT     = IPGT_FULL_DUP;
0003b4  2015              MOVS     r0,#0x15
0003b6  6088              STR      r0,[r1,#8]
0003b8  e003              B        |L1.962|
                  |L1.954|
;;;392      }
;;;393      else {
;;;394        /* Half duplex mode. */
;;;395        LPC_EMAC->IPGT = IPGT_HALF_DUP;
0003ba  2012              MOVS     r0,#0x12
0003bc  f04f41a0          MOV      r1,#0x50000000
0003c0  6088              STR      r0,[r1,#8]
                  |L1.962|
;;;396      }
;;;397    
;;;398      /* Configure 100MBit/10MBit mode. */
;;;399      if (regv & PHY_LINK_SPD) {
0003c2  f0060008          AND      r0,r6,#8
0003c6  b128              CBZ      r0,|L1.980|
;;;400        /* 100MBit mode. */
;;;401        LPC_EMAC->SUPP = SUPP_SPEED;
0003c8  f44f7080          MOV      r0,#0x100
0003cc  f04f41a0          MOV      r1,#0x50000000
0003d0  6188              STR      r0,[r1,#0x18]
0003d2  e003              B        |L1.988|
                  |L1.980|
;;;402      }
;;;403      else {
;;;404        /* 10MBit mode. */
;;;405        LPC_EMAC->SUPP = 0;
0003d4  2000              MOVS     r0,#0
0003d6  f04f41a0          MOV      r1,#0x50000000
0003da  6188              STR      r0,[r1,#0x18]
                  |L1.988|
;;;406      }
;;;407    
;;;408      load_mac_from_flash();
0003dc  f7fffffe          BL       load_mac_from_flash
;;;409      
;;;410      /* Set the Ethernet MAC Address registers */
;;;411      LPC_EMAC->SA0 = (MYMAC_1 << 8) | MYMAC_2;
0003e0  480b              LDR      r0,|L1.1040|
0003e2  7800              LDRB     r0,[r0,#0]  ; MYMAC_2
0003e4  490b              LDR      r1,|L1.1044|
0003e6  7809              LDRB     r1,[r1,#0]  ; MYMAC_1
0003e8  ea402001          ORR      r0,r0,r1,LSL #8
0003ec  f04f41a0          MOV      r1,#0x50000000
0003f0  6408              STR      r0,[r1,#0x40]
;;;412      LPC_EMAC->SA1 = (MYMAC_3 << 8) | MYMAC_4;
0003f2  4805              LDR      r0,|L1.1032|
0003f4  7800              LDRB     r0,[r0,#0]  ; MYMAC_4
0003f6  4905              LDR      r1,|L1.1036|
0003f8  7809              LDRB     r1,[r1,#0]  ; MYMAC_3
0003fa  e02b              B        |L1.1108|
                  |L1.1020|
                          DCD      0x0007fc00
                  |L1.1024|
                          DCD      MYMAC_6
                  |L1.1028|
                          DCD      MYMAC_5
                  |L1.1032|
                          DCD      MYMAC_4
                  |L1.1036|
                          DCD      MYMAC_3
                  |L1.1040|
                          DCD      MYMAC_2
                  |L1.1044|
                          DCD      MYMAC_1
                  |L1.1048|
                          DCD      dev_175x
                  |L1.1052|
                          DCD      rxptr
                  |L1.1056|
                          DCD      synchro
                  |L1.1060|
                          DCD      HostMAC
                  |L1.1064|
                          DCD      rxbuffer+0x6
                  |L1.1068|
                          DCD      DestPort
                  |L1.1072|
                          DCD      SrcPort
                  |L1.1076|
                          DCD      txptr
                  |L1.1080|
                          DCD      0x2009c000
                  |L1.1084|
                          DCD      0x400fc0c4
                  |L1.1088|
                          DCD      0x50150105
                  |L1.1092|
                          DCD      0x4002c000
                  |L1.1096|
                          DCD      0x50000100
                  |L1.1100|
                          DCD      0x00221510
                  |L1.1104|
                          DCD      0x0007c0f0
                  |L1.1108|
000454  ea402001          ORR      r0,r0,r1,LSL #8
000458  f04f41a0          MOV      r1,#0x50000000
00045c  6448              STR      r0,[r1,#0x44]
;;;413      LPC_EMAC->SA2 = (MYMAC_5 << 8) | MYMAC_6;
00045e  48fe              LDR      r0,|L1.2136|
000460  7800              LDRB     r0,[r0,#0]  ; MYMAC_6
000462  49fe              LDR      r1,|L1.2140|
000464  7809              LDRB     r1,[r1,#0]  ; MYMAC_5
000466  ea402001          ORR      r0,r0,r1,LSL #8
00046a  f04f41a0          MOV      r1,#0x50000000
00046e  6488              STR      r0,[r1,#0x48]
;;;414    
;;;415      /* save the Ethernet MAC Address to MyMAC[] */
;;;416      MyMAC[0] = MYMAC_6;
000470  48f9              LDR      r0,|L1.2136|
000472  7800              LDRB     r0,[r0,#0]  ; MYMAC_6
000474  49fa              LDR      r1,|L1.2144|
000476  7008              STRB     r0,[r1,#0]
;;;417      MyMAC[1] = MYMAC_5;
000478  48f8              LDR      r0,|L1.2140|
00047a  7800              LDRB     r0,[r0,#0]  ; MYMAC_5
00047c  7048              STRB     r0,[r1,#1]
;;;418      MyMAC[2] = MYMAC_4;
00047e  48f9              LDR      r0,|L1.2148|
000480  7800              LDRB     r0,[r0,#0]  ; MYMAC_4
000482  7088              STRB     r0,[r1,#2]
;;;419      MyMAC[3] = MYMAC_3;
000484  48f8              LDR      r0,|L1.2152|
000486  7800              LDRB     r0,[r0,#0]  ; MYMAC_3
000488  70c8              STRB     r0,[r1,#3]
;;;420      MyMAC[4] = MYMAC_2;
00048a  48f8              LDR      r0,|L1.2156|
00048c  7800              LDRB     r0,[r0,#0]  ; MYMAC_2
00048e  7108              STRB     r0,[r1,#4]
;;;421      MyMAC[5] = MYMAC_1;
000490  48f7              LDR      r0,|L1.2160|
000492  7800              LDRB     r0,[r0,#0]  ; MYMAC_1
000494  7148              STRB     r0,[r1,#5]
;;;422    
;;;423      /* Initialize Rx DMA Descriptors */
;;;424      for (i = 0; i < NUM_RX_FRAG; i++) {
000496  2400              MOVS     r4,#0
000498  e014              B        |L1.1220|
                  |L1.1178|
;;;425        RX_DESC_PACKET(i)  = RX_BUF(i);
00049a  48f6              LDR      r0,|L1.2164|
00049c  2178              MOVS     r1,#0x78
00049e  fb010004          MLA      r0,r1,r4,r0
0004a2  4af5              LDR      r2,|L1.2168|
0004a4  f8420034          STR      r0,[r2,r4,LSL #3]
;;;426        RX_DESC_CTRL(i)    = RCTRL_INT | (ETH_FRAG_SIZE-1);
0004a8  48f4              LDR      r0,|L1.2172|
0004aa  eb0201c4          ADD      r1,r2,r4,LSL #3
0004ae  6048              STR      r0,[r1,#4]
;;;427        RX_STAT_INFO(i)    = 0;
0004b0  2000              MOVS     r0,#0
0004b2  eb0201c4          ADD      r1,r2,r4,LSL #3
0004b6  f8c100c8          STR      r0,[r1,#0xc8]
;;;428        RX_STAT_HASHCRC(i) = 0;
0004ba  eb0201c4          ADD      r1,r2,r4,LSL #3
0004be  f8c100cc          STR      r0,[r1,#0xcc]
0004c2  1c64              ADDS     r4,r4,#1              ;424
                  |L1.1220|
0004c4  2c19              CMP      r4,#0x19              ;424
0004c6  d3e8              BCC      |L1.1178|
;;;429      }
;;;430      /* Set EMAC Receive Descriptor Registers. */
;;;431      LPC_EMAC->RxDescriptor       = RX_DESC_BASE;
0004c8  48eb              LDR      r0,|L1.2168|
0004ca  49ed              LDR      r1,|L1.2176|
0004cc  6008              STR      r0,[r1,#0]
;;;432      LPC_EMAC->RxStatus           = RX_STAT_BASE;
0004ce  48ea              LDR      r0,|L1.2168|
0004d0  30c8              ADDS     r0,r0,#0xc8
0004d2  f04f41a0          MOV      r1,#0x50000000
0004d6  f8c1010c          STR      r0,[r1,#0x10c]
;;;433      LPC_EMAC->RxDescriptorNumber = NUM_RX_FRAG-1;
0004da  2018              MOVS     r0,#0x18
0004dc  49e8              LDR      r1,|L1.2176|
0004de  3108              ADDS     r1,r1,#8
0004e0  6008              STR      r0,[r1,#0]
;;;434      /* Rx Descriptors Point to 0 */
;;;435      LPC_EMAC->RxConsumeIndex  = 0;
0004e2  2000              MOVS     r0,#0
0004e4  f04f41a0          MOV      r1,#0x50000000
0004e8  f8c10118          STR      r0,[r1,#0x118]
;;;436    
;;;437      /* Initialize Tx DMA Descriptors */
;;;438      for (i = 0; i < NUM_TX_FRAG; i++) {
0004ec  2400              MOVS     r4,#0
0004ee  e012              B        |L1.1302|
                  |L1.1264|
;;;439        TX_DESC_PACKET(i) = TX_BUF(i);
0004f0  48e4              LDR      r0,|L1.2180|
0004f2  2178              MOVS     r1,#0x78
0004f4  fb010004          MLA      r0,r1,r4,r0
0004f8  4adf              LDR      r2,|L1.2168|
0004fa  eb0201c4          ADD      r1,r2,r4,LSL #3
0004fe  f8c10190          STR      r0,[r1,#0x190]
;;;440        TX_DESC_CTRL(i)   = 0;
000502  2000              MOVS     r0,#0
000504  eb0201c4          ADD      r1,r2,r4,LSL #3
000508  f8c10194          STR      r0,[r1,#0x194]
;;;441        TX_STAT_INFO(i)   = 0;
00050c  eb020184          ADD      r1,r2,r4,LSL #2
000510  f8c101a8          STR      r0,[r1,#0x1a8]
000514  1c64              ADDS     r4,r4,#1              ;438
                  |L1.1302|
000516  2c03              CMP      r4,#3                 ;438
000518  d3ea              BCC      |L1.1264|
;;;442      }
;;;443      /* Set EMAC Transmit Descriptor Registers. */
;;;444      LPC_EMAC->TxDescriptor       = TX_DESC_BASE;
00051a  48d6              LDR      r0,|L1.2164|
00051c  3824              SUBS     r0,r0,#0x24
00051e  49d8              LDR      r1,|L1.2176|
000520  3114              ADDS     r1,r1,#0x14
000522  6008              STR      r0,[r1,#0]
;;;445      LPC_EMAC->TxStatus           = TX_STAT_BASE;
000524  48d3              LDR      r0,|L1.2164|
000526  380c              SUBS     r0,r0,#0xc
000528  0641              LSLS     r1,r0,#25
00052a  f8c10120          STR      r0,[r1,#0x120]
;;;446      LPC_EMAC->TxDescriptorNumber = NUM_TX_FRAG-1;
00052e  2002              MOVS     r0,#2
000530  49d3              LDR      r1,|L1.2176|
000532  311c              ADDS     r1,r1,#0x1c
000534  6008              STR      r0,[r1,#0]
;;;447      /* Tx Descriptors Point to 0 */
;;;448      LPC_EMAC->TxProduceIndex  = 0;
000536  2000              MOVS     r0,#0
000538  1d09              ADDS     r1,r1,#4
00053a  6008              STR      r0,[r1,#0]
;;;449    
;;;450      /* Receive Broadcast and Perfect Match Packets */
;;;451      LPC_EMAC->RxFilterCtrl = RFC_PERFECT_EN;  
00053c  2020              MOVS     r0,#0x20
00053e  49d0              LDR      r1,|L1.2176|
000540  31f8              ADDS     r1,r1,#0xf8
000542  6008              STR      r0,[r1,#0]
;;;452    
;;;453      /* Enable EMAC interrupts. */
;;;454      LPC_EMAC->IntEnable = INT_RX_DONE | INT_TX_DONE;
000544  2088              MOVS     r0,#0x88
000546  49d0              LDR      r1,|L1.2184|
000548  6008              STR      r0,[r1,#0]
;;;455    
;;;456      /* Reset all interrupts */
;;;457      LPC_EMAC->IntClear  = 0xFFFF;
00054a  f64f70ff          MOV      r0,#0xffff
00054e  1d09              ADDS     r1,r1,#4
000550  6008              STR      r0,[r1,#0]
;;;458    
;;;459      /* Enable receive and transmit mode of MAC Ethernet core */
;;;460      LPC_EMAC->Command  |= (CR_RX_EN | CR_TX_EN);
000552  f04f40a0          MOV      r0,#0x50000000
000556  f8d00100          LDR      r0,[r0,#0x100]
00055a  f0400003          ORR      r0,r0,#3
00055e  f04f41a0          MOV      r1,#0x50000000
000562  f8c10100          STR      r0,[r1,#0x100]
;;;461      LPC_EMAC->MAC1     |= MAC1_REC_EN;
000566  4608              MOV      r0,r1
000568  6800              LDR      r0,[r0,#0]
00056a  f0400001          ORR      r0,r0,#1
00056e  6008              STR      r0,[r1,#0]
;;;462    
;;;463      /* Complete some IP & UDP header values */
;;;464      txbuffer[12] = 0x08;
000570  2008              MOVS     r0,#8
000572  49c6              LDR      r1,|L1.2188|
000574  7308              STRB     r0,[r1,#0xc]
;;;465      txbuffer[13] = 0x00;
000576  2000              MOVS     r0,#0
000578  7348              STRB     r0,[r1,#0xd]
;;;466      txbuffer[14] = 0x45;
00057a  2045              MOVS     r0,#0x45
00057c  7388              STRB     r0,[r1,#0xe]
;;;467      txbuffer[15] = 0x00;
00057e  2000              MOVS     r0,#0
000580  73c8              STRB     r0,[r1,#0xf]
;;;468      txbuffer[18] = 0xD8;
000582  20d8              MOVS     r0,#0xd8
000584  7488              STRB     r0,[r1,#0x12]
;;;469      txbuffer[19] = 0xF4;
000586  20f4              MOVS     r0,#0xf4
000588  74c8              STRB     r0,[r1,#0x13]
;;;470      txbuffer[20] = 0x00;
00058a  2000              MOVS     r0,#0
00058c  7508              STRB     r0,[r1,#0x14]
;;;471      txbuffer[21] = 0x00;
00058e  7548              STRB     r0,[r1,#0x15]
;;;472      txbuffer[22] = 0x80;
000590  2080              MOVS     r0,#0x80
000592  7588              STRB     r0,[r1,#0x16]
;;;473      txbuffer[23] = 0x11;
000594  2011              MOVS     r0,#0x11
000596  75c8              STRB     r0,[r1,#0x17]
;;;474    }
000598  e8bd81f0          POP      {r4-r8,pc}
;;;475    
                          ENDP

                  emac_getline PROC
;;;477    // returns 0 if packet received, 1 if timeout
;;;478    unsigned emac_getline(char * buf,int max_len,int * count) {
00059c  e92d5ff0          PUSH     {r4-r12,lr}
0005a0  4607              MOV      r7,r0
0005a2  460e              MOV      r6,r1
0005a4  4691              MOV      r9,r2
;;;479      unsigned short RxLen = 0;
0005a6  f04f0800          MOV      r8,#0
;;;480      unsigned int idx, i;
;;;481      unsigned *rxstat;
;;;482    
;;;483    #if ETHERNET_DEBUG
;;;484      int j;
;;;485    #endif
;;;486    
;;;487    #if LED_ENABLED
;;;488      int k=0;
0005aa  46c3              MOV      r11,r8
;;;489    #endif
;;;490     
;;;491      /* get timestamp for end of timeout period */
;;;492      ethernet_timeout = Timer_GetTimestamp() + ETHERNET_TIMEOUT;
0005ac  f7fffffe          BL       Timer_GetTimestamp
0005b0  f64e2160          MOV      r1,#0xea60
0005b4  4408              ADD      r0,r0,r1
0005b6  49b6              LDR      r1,|L1.2192|
0005b8  6008              STR      r0,[r1,#0]  ; ethernet_timeout
;;;493    
;;;494      /* Check for Received frames */
;;;495      while(1){
0005ba  e06e              B        |L1.1690|
                  |L1.1468|
;;;496        while(LPC_EMAC->RxConsumeIndex == LPC_EMAC->RxProduceIndex){
0005bc  e02b              B        |L1.1558|
                  |L1.1470|
;;;497    #if LED_ENABLED
;;;498        // FIXME
;;;499        /* increment the counter and check timeout  */
;;;500    	  if (k++ > 200000) {
0005be  4658              MOV      r0,r11
0005c0  f10b0b01          ADD      r11,r11,#1
0005c4  49b3              LDR      r1,|L1.2196|
0005c6  4288              CMP      r0,r1
0005c8  dd1d              BLE      |L1.1542|
;;;501    	     k=0;
0005ca  f04f0b00          MOV      r11,#0
;;;502    		   /* toogle the LED           */
;;;503    	     if (LINCOLN_LED_PORT->FIOPIN & (1<<LINCOLN_LED_PIN)) {
0005ce  48b2              LDR      r0,|L1.2200|
0005d0  6f40              LDR      r0,[r0,#0x74]
0005d2  f0006080          AND      r0,r0,#0x4000000
0005d6  b158              CBZ      r0,|L1.1520|
;;;504    	       LINCOLN_LED_PORT->FIOCLR |= (1<<LINCOLN_LED_PIN);
0005d8  48af              LDR      r0,|L1.2200|
0005da  6fc0              LDR      r0,[r0,#0x7c]
0005dc  f0406080          ORR      r0,r0,#0x4000000
0005e0  49ad              LDR      r1,|L1.2200|
0005e2  67c8              STR      r0,[r1,#0x7c]
;;;505    	       C41_LED_PORT->FIOCLR |= (1<<C41_BLUE_LED_PIN);
0005e4  4608              MOV      r0,r1
0005e6  6dc0              LDR      r0,[r0,#0x5c]
0005e8  f0400008          ORR      r0,r0,#8
0005ec  65c8              STR      r0,[r1,#0x5c]
0005ee  e00a              B        |L1.1542|
                  |L1.1520|
;;;506    		 } else {
;;;507    	       LINCOLN_LED_PORT->FIOSET |= (1<<LINCOLN_LED_PIN);
0005f0  48a9              LDR      r0,|L1.2200|
0005f2  6f80              LDR      r0,[r0,#0x78]
0005f4  f0406080          ORR      r0,r0,#0x4000000
0005f8  49a7              LDR      r1,|L1.2200|
0005fa  6788              STR      r0,[r1,#0x78]
;;;508    	       C41_LED_PORT->FIOSET |= (1<<C41_BLUE_LED_PIN);
0005fc  4608              MOV      r0,r1
0005fe  6d80              LDR      r0,[r0,#0x58]
000600  f0400008          ORR      r0,r0,#8
000604  6588              STR      r0,[r1,#0x58]
                  |L1.1542|
;;;509    		 }
;;;510    	  }
;;;511    #endif
;;;512    
;;;513    	  /* no filtered packets received during timeout period */
;;;514          if (Timer_HasTimestampExpired(ethernet_timeout))
000606  48a2              LDR      r0,|L1.2192|
000608  6800              LDR      r0,[r0,#0]  ; ethernet_timeout
00060a  f7fffffe          BL       Timer_HasTimestampExpired
00060e  b110              CBZ      r0,|L1.1558|
;;;515    	  {
;;;516    #if ETHERNET_DEBUG
;;;517            print("Timed out - going back to looking for handshake\n");
;;;518    #endif
;;;519    	    return 1;
000610  2001              MOVS     r0,#1
                  |L1.1554|
;;;520    	  }
;;;521        }
;;;522    
;;;523        idx = LPC_EMAC->RxConsumeIndex;
;;;524    
;;;525        /* check for crc error */
;;;526    	if (RX_STAT_INFO(idx) & RINFO_CRC_ERR)
;;;527    	{
;;;528    #if ETHERNET_DEBUG
;;;529          print("Rx CRC error\n");
;;;530    #endif
;;;531          /* ignore frame */
;;;532          if (++idx == NUM_RX_FRAG)
;;;533      	  idx = 0;   
;;;534    	    LPC_EMAC->RxConsumeIndex = idx;
;;;535          continue;
;;;536    	}
;;;537    
;;;538        /* Get the Length and a pointer to the data  */
;;;539    	RxLen = (RX_STAT_INFO(idx) & RINFO_SIZE) - 3;
;;;540    	rxstat = &RX_STAT_INFO(idx);
;;;541        rxptr = (unsigned short *)RX_DESC_PACKET(idx);
;;;542        CopyFromFrame_EMAC(rxbuffer, RxLen);
;;;543        if (++idx == NUM_RX_FRAG)
;;;544    	  idx = 0;
;;;545    	  LPC_EMAC->RxConsumeIndex = idx;
;;;546        if(filter_pass())
;;;547          break;
;;;548      } 
;;;549      /* limit incoming data for protection  */
;;;550      
;;;551      if ((RxLen-42) > max_len)
;;;552        RxLen = max_len + 42;
;;;553      memcpy(buf,PAYLOADr->data,RxLen-42);
;;;554    
;;;555      /* detect '0x0A' (string terminator) and replace it by CR+LF  */
;;;556      for(i=0;i<max_len;i++) {
;;;557        if(buf[i]==CR){
;;;558          buf[i]='\0';
;;;559    	  break;
;;;560    	}
;;;561      }
;;;562      (*count) = i;
;;;563    
;;;564    #if ETHERNET_DEBUG
;;;565      /* print received command   */
;;;566      print("Rx:  ");
;;;567      if (RxLen > 60) {
;;;568    	print("...Data...");
;;;569      }else{
;;;570        j=0;
;;;571        for(i=0; i<(*count); i++) {
;;;572    	  printascii(buf[i]);
;;;573          j++;
;;;574          if (j==16) {
;;;575            j=0;
;;;576            print("\r\n     ");
;;;577          }
;;;578        }
;;;579      }
;;;580      print("\r\n-------------------\r\n");
;;;581    #endif
;;;582    
;;;583      // reset timestamp for end of timeout period
;;;584      ethernet_timeout = Timer_GetTimestamp() + ETHERNET_TIMEOUT;
;;;585    
;;;586      return (0);
;;;587    }
000612  e8bd9ff0          POP      {r4-r12,pc}
                  |L1.1558|
000616  489a              LDR      r0,|L1.2176|
000618  3010              ADDS     r0,r0,#0x10           ;496
00061a  6800              LDR      r0,[r0,#0]            ;496
00061c  f04f41a0          MOV      r1,#0x50000000        ;496
000620  f8d11114          LDR      r1,[r1,#0x114]        ;496
000624  4288              CMP      r0,r1                 ;496
000626  d0ca              BEQ      |L1.1470|
000628  4895              LDR      r0,|L1.2176|
00062a  3010              ADDS     r0,r0,#0x10           ;523
00062c  6804              LDR      r4,[r0,#0]            ;523
00062e  4992              LDR      r1,|L1.2168|
000630  eb0100c4          ADD      r0,r1,r4,LSL #3       ;526
000634  f8d000c8          LDR      r0,[r0,#0xc8]         ;526
000638  f4000000          AND      r0,r0,#0x800000       ;526
00063c  b140              CBZ      r0,|L1.1616|
00063e  1c60              ADDS     r0,r4,#1              ;532
000640  4604              MOV      r4,r0                 ;532
000642  2819              CMP      r0,#0x19              ;532
000644  d100              BNE      |L1.1608|
000646  2400              MOVS     r4,#0                 ;533
                  |L1.1608|
000648  488d              LDR      r0,|L1.2176|
00064a  3010              ADDS     r0,r0,#0x10           ;534
00064c  6004              STR      r4,[r0,#0]            ;534
00064e  e024              B        |L1.1690|
                  |L1.1616|
000650  4989              LDR      r1,|L1.2168|
000652  eb0100c4          ADD      r0,r1,r4,LSL #3       ;539
000656  f8b000c8          LDRH     r0,[r0,#0xc8]         ;539
00065a  f3c0000a          UBFX     r0,r0,#0,#11          ;539
00065e  1ec0              SUBS     r0,r0,#3              ;539
000660  fa1ff880          UXTH     r8,r0                 ;539
000664  4884              LDR      r0,|L1.2168|
000666  30c8              ADDS     r0,r0,#0xc8           ;540
000668  2108              MOVS     r1,#8                 ;540
00066a  fb010a04          MLA      r10,r1,r4,r0          ;540
00066e  4982              LDR      r1,|L1.2168|
000670  f8510034          LDR      r0,[r1,r4,LSL #3]     ;541
000674  4989              LDR      r1,|L1.2204|
000676  6008              STR      r0,[r1,#0]            ;541  ; rxptr
000678  4641              MOV      r1,r8                 ;542
00067a  4889              LDR      r0,|L1.2208|
00067c  f7fffffe          BL       CopyFromFrame_EMAC
000680  1c60              ADDS     r0,r4,#1              ;543
000682  4604              MOV      r4,r0                 ;543
000684  2819              CMP      r0,#0x19              ;543
000686  d100              BNE      |L1.1674|
000688  2400              MOVS     r4,#0                 ;544
                  |L1.1674|
00068a  487d              LDR      r0,|L1.2176|
00068c  3010              ADDS     r0,r0,#0x10           ;545
00068e  6004              STR      r4,[r0,#0]            ;545
000690  f7fffffe          BL       filter_pass
000694  b100              CBZ      r0,|L1.1688|
000696  e001              B        |L1.1692|
                  |L1.1688|
000698  bf00              NOP                            ;535
                  |L1.1690|
00069a  e78f              B        |L1.1468|
                  |L1.1692|
00069c  bf00              NOP                            ;547
00069e  f1a8002a          SUB      r0,r8,#0x2a           ;551
0006a2  42b0              CMP      r0,r6                 ;551
0006a4  dd03              BLE      |L1.1710|
0006a6  f106002a          ADD      r0,r6,#0x2a           ;552
0006aa  fa1ff880          UXTH     r8,r0                 ;552
                  |L1.1710|
0006ae  f1a8022a          SUB      r2,r8,#0x2a           ;553
0006b2  497b              LDR      r1,|L1.2208|
0006b4  312a              ADDS     r1,r1,#0x2a           ;553
0006b6  4638              MOV      r0,r7                 ;553
0006b8  f7fffffe          BL       __aeabi_memcpy
0006bc  2500              MOVS     r5,#0                 ;556
0006be  e006              B        |L1.1742|
                  |L1.1728|
0006c0  5d78              LDRB     r0,[r7,r5]            ;557
0006c2  280d              CMP      r0,#0xd               ;557
0006c4  d102              BNE      |L1.1740|
0006c6  2000              MOVS     r0,#0                 ;558
0006c8  5578              STRB     r0,[r7,r5]            ;558
0006ca  e002              B        |L1.1746|
                  |L1.1740|
0006cc  1c6d              ADDS     r5,r5,#1              ;556
                  |L1.1742|
0006ce  42b5              CMP      r5,r6                 ;556
0006d0  d3f6              BCC      |L1.1728|
                  |L1.1746|
0006d2  bf00              NOP                            ;559
0006d4  f8c95000          STR      r5,[r9,#0]            ;562
0006d8  f7fffffe          BL       Timer_GetTimestamp
0006dc  f64e2160          MOV      r1,#0xea60            ;584
0006e0  4408              ADD      r0,r0,r1              ;584
0006e2  496b              LDR      r1,|L1.2192|
0006e4  6008              STR      r0,[r1,#0]            ;584  ; ethernet_timeout
0006e6  2000              MOVS     r0,#0                 ;586
0006e8  e793              B        |L1.1554|
;;;588    
                          ENDP

                  emac_sendline_crlf PROC
;;;589    unsigned emac_sendline_crlf(char * buf) {  
0006ea  b5f0              PUSH     {r4-r7,lr}
0006ec  4606              MOV      r6,r0
;;;590      int i;
;;;591      unsigned int idx;
;;;592    	
;;;593    #if ETHERNET_DEBUG
;;;594      int j;
;;;595    #endif
;;;596    
;;;597      /* detect '\0' (string terminator) and replace it by CR+LF  */
;;;598      for(i=0;i<CMD_SIZE;i++) {
0006ee  2400              MOVS     r4,#0
0006f0  e00e              B        |L1.1808|
                  |L1.1778|
;;;599        PAYLOADt->data[i] = buf[i] ;			
0006f2  5d31              LDRB     r1,[r6,r4]
0006f4  4865              LDR      r0,|L1.2188|
0006f6  302a              ADDS     r0,r0,#0x2a
0006f8  5501              STRB     r1,[r0,r4]
;;;600        if(buf[i]=='\0'){
0006fa  5d30              LDRB     r0,[r6,r4]
0006fc  b938              CBNZ     r0,|L1.1806|
;;;601    	  PAYLOADt->data[i]=CR;
0006fe  210d              MOVS     r1,#0xd
000700  4862              LDR      r0,|L1.2188|
000702  302a              ADDS     r0,r0,#0x2a
000704  5501              STRB     r1,[r0,r4]
;;;602    	  PAYLOADt->data[i+1]=LF;
000706  220a              MOVS     r2,#0xa
000708  1c61              ADDS     r1,r4,#1
00070a  5442              STRB     r2,[r0,r1]
;;;603    	  break;
00070c  e002              B        |L1.1812|
                  |L1.1806|
00070e  1c64              ADDS     r4,r4,#1              ;598
                  |L1.1808|
000710  2c46              CMP      r4,#0x46              ;598
000712  dbee              BLT      |L1.1778|
                  |L1.1812|
000714  bf00              NOP      
;;;604    	}
;;;605      }
;;;606      data_size = i+2;
000716  1ca0              ADDS     r0,r4,#2
000718  4962              LDR      r1,|L1.2212|
00071a  8008              STRH     r0,[r1,#0]
;;;607    
;;;608    #if ETHERNET_DEBUG
;;;609     
;;;610      print("Tx:  ");
;;;611      j=0;
;;;612      for(i=0; i<data_size-2; i++) {
;;;613    	printascii(buf[i]);
;;;614        j++;
;;;615        if (j==16) {
;;;616          j=0;
;;;617          print("\r\n     ");
;;;618        }
;;;619      }
;;;620      print("\r\n-------------------\r\n");
;;;621    
;;;622    #endif
;;;623    
;;;624      idx  = LPC_EMAC->TxProduceIndex;
00071c  4858              LDR      r0,|L1.2176|
00071e  3020              ADDS     r0,r0,#0x20
000720  6805              LDR      r5,[r0,#0]
;;;625    
;;;626      txptr = (unsigned short *)TX_DESC_PACKET(idx);
000722  4955              LDR      r1,|L1.2168|
000724  eb0100c5          ADD      r0,r1,r5,LSL #3
000728  f8d00190          LDR      r0,[r0,#0x190]
00072c  495e              LDR      r1,|L1.2216|
00072e  6008              STR      r0,[r1,#0]  ; txptr
;;;627      TX_DESC_CTRL(idx) = FrameSize | TCTRL_LAST;
000730  485c              LDR      r0,|L1.2212|
000732  8800              LDRH     r0,[r0,#0]  ; data_size
000734  302a              ADDS     r0,r0,#0x2a
000736  f0404080          ORR      r0,r0,#0x40000000
00073a  4a4f              LDR      r2,|L1.2168|
00073c  eb0201c5          ADD      r1,r2,r5,LSL #3
000740  f8c10194          STR      r0,[r1,#0x194]
;;;628      memcpy(FRAMEt->destination,FRAMEr->source,6);
000744  4851              LDR      r0,|L1.2188|
000746  4956              LDR      r1,|L1.2208|
000748  f8d12006          LDR      r2,[r1,#6]  ; rxbuffer
00074c  6002              STR      r2,[r0,#0]  ; txbuffer
00074e  8949              LDRH     r1,[r1,#0xa]  ; rxbuffer
000750  8081              STRH     r1,[r0,#4]
;;;629      memcpy(FRAMEt->source,MyMAC,6);
000752  4943              LDR      r1,|L1.2144|
000754  680a              LDR      r2,[r1,#0]  ; MyMAC
000756  f8c02006          STR      r2,[r0,#6]  ; txbuffer
00075a  8889              LDRH     r1,[r1,#4]  ; MyMAC
00075c  8141              STRH     r1,[r0,#0xa]
;;;630      PACKETt->iplen = HTONS(FrameSize - EtherHdrLen);
00075e  4851              LDR      r0,|L1.2212|
000760  8800              LDRH     r0,[r0,#0]  ; data_size
000762  301c              ADDS     r0,r0,#0x1c
000764  f3c02107          UBFX     r1,r0,#8,#8
000768  484e              LDR      r0,|L1.2212|
00076a  7800              LDRB     r0,[r0,#0]  ; data_size
00076c  301c              ADDS     r0,r0,#0x1c
00076e  ea412000          ORR      r0,r1,r0,LSL #8
000772  b281              UXTH     r1,r0
000774  4845              LDR      r0,|L1.2188|
000776  8201              STRH     r1,[r0,#0x10]
;;;631      memcpy(PACKETt->destipaddr,PACKETr->srcipaddr,4);
000778  4949              LDR      r1,|L1.2208|
00077a  f8d1101a          LDR      r1,[r1,#0x1a]
00077e  f8c0101e          STR      r1,[r0,#0x1e]
;;;632      memcpy(PACKETt->srcipaddr,PACKETr->destipaddr,4);
000782  4947              LDR      r1,|L1.2208|
000784  f8d1101e          LDR      r1,[r1,#0x1e]
000788  f8c0101a          STR      r1,[r0,#0x1a]
;;;633      PACKETt->iphdrchksum = 0;
00078c  2100              MOVS     r1,#0
00078e  8301              STRH     r1,[r0,#0x18]
;;;634      PACKETt->iphdrchksum = HTONS(chksum16(PACKETt->fill1, IpHdrLen));
000790  2114              MOVS     r1,#0x14
000792  300e              ADDS     r0,r0,#0xe
000794  f7fffffe          BL       chksum16
000798  f3c02707          UBFX     r7,r0,#8,#8
00079c  2114              MOVS     r1,#0x14
00079e  483b              LDR      r0,|L1.2188|
0007a0  300e              ADDS     r0,r0,#0xe
0007a2  f7fffffe          BL       chksum16
0007a6  ea472000          ORR      r0,r7,r0,LSL #8
0007aa  b281              UXTH     r1,r0
0007ac  4837              LDR      r0,|L1.2188|
0007ae  8301              STRH     r1,[r0,#0x18]
;;;635      PACKETt->destport = PACKETr->srcport;
0007b0  483b              LDR      r0,|L1.2208|
0007b2  8c41              LDRH     r1,[r0,#0x22]
0007b4  4835              LDR      r0,|L1.2188|
0007b6  8481              STRH     r1,[r0,#0x24]
;;;636      PACKETt->srcport = PACKETr->destport;
0007b8  4839              LDR      r0,|L1.2208|
0007ba  8c81              LDRH     r1,[r0,#0x24]
0007bc  4833              LDR      r0,|L1.2188|
0007be  8441              STRH     r1,[r0,#0x22]
;;;637      PACKETt->udplen = HTONS(FrameSize - EtherHdrLen - IpHdrLen);
0007c0  4838              LDR      r0,|L1.2212|
0007c2  8800              LDRH     r0,[r0,#0]  ; data_size
0007c4  3008              ADDS     r0,r0,#8
0007c6  f3c02107          UBFX     r1,r0,#8,#8
0007ca  4836              LDR      r0,|L1.2212|
0007cc  7800              LDRB     r0,[r0,#0]  ; data_size
0007ce  3008              ADDS     r0,r0,#8
0007d0  ea412000          ORR      r0,r1,r0,LSL #8
0007d4  b281              UXTH     r1,r0
0007d6  482d              LDR      r0,|L1.2188|
0007d8  84c1              STRH     r1,[r0,#0x26]
;;;638      PACKETt->udpchksum = 0;
0007da  2100              MOVS     r1,#0
0007dc  8501              STRH     r1,[r0,#0x28]
;;;639      CopyToFrame_EMAC(&txbuffer[0], FrameSize);
0007de  4831              LDR      r0,|L1.2212|
0007e0  8801              LDRH     r1,[r0,#0]  ; data_size
0007e2  312a              ADDS     r1,r1,#0x2a
0007e4  4829              LDR      r0,|L1.2188|
0007e6  f7fffffe          BL       CopyToFrame_EMAC
;;;640      if (++idx == NUM_TX_FRAG) idx = 0;
0007ea  1c68              ADDS     r0,r5,#1
0007ec  4605              MOV      r5,r0
0007ee  2803              CMP      r0,#3
0007f0  d100              BNE      |L1.2036|
0007f2  2500              MOVS     r5,#0
                  |L1.2036|
;;;641      LPC_EMAC->TxProduceIndex = idx;
0007f4  4822              LDR      r0,|L1.2176|
0007f6  3020              ADDS     r0,r0,#0x20
0007f8  6005              STR      r5,[r0,#0]
;;;642      for (i = 0; i < 1000; i++);
0007fa  2400              MOVS     r4,#0
0007fc  e000              B        |L1.2048|
                  |L1.2046|
0007fe  1c64              ADDS     r4,r4,#1
                  |L1.2048|
000800  f5b47f7a          CMP      r4,#0x3e8
000804  dbfb              BLT      |L1.2046|
;;;643      return (1);
000806  2001              MOVS     r0,#1
;;;644    }
000808  bdf0              POP      {r4-r7,pc}
;;;645    
                          ENDP

                  emac_handshake PROC
;;;646    int emac_handshake(int contact_made) {
00080a  b510              PUSH     {r4,lr}
00080c  b08a              SUB      sp,sp,#0x28
00080e  4604              MOV      r4,r0
;;;647    
;;;648       int count;
;;;649       char buf[15];
;;;650       char buf1[15];
;;;651    
;;;652       synchro = false;
000810  2000              MOVS     r0,#0
000812  4926              LDR      r1,|L1.2220|
000814  7008              STRB     r0,[r1,#0]
;;;653    
;;;654       while(1) {
000816  e06e              B        |L1.2294|
                  |L1.2072|
;;;655         if (contact_made || emac_getline(buf,1,&count) == 0) {
000818  b92c              CBNZ     r4,|L1.2086|
00081a  aa09              ADD      r2,sp,#0x24
00081c  2101              MOVS     r1,#1
00081e  a805              ADD      r0,sp,#0x14
000820  f7fffffe          BL       emac_getline
000824  b9b0              CBNZ     r0,|L1.2132|
                  |L1.2086|
;;;656           if (contact_made || buf[0] == '?') {
000826  b91c              CBNZ     r4,|L1.2096|
000828  f89d0014          LDRB     r0,[sp,#0x14]
00082c  283f              CMP      r0,#0x3f
00082e  d162              BNE      |L1.2294|
                  |L1.2096|
;;;657    		 contact_made = 0;
000830  2400              MOVS     r4,#0
;;;658      	     /* save Dest & Source Ports   */
;;;659     	     DestPort = PACKETr->destport;
000832  481b              LDR      r0,|L1.2208|
000834  8c80              LDRH     r0,[r0,#0x24]
000836  491e              LDR      r1,|L1.2224|
000838  8008              STRH     r0,[r1,#0]
;;;660    	     SrcPort  = PACKETr->srcport;
00083a  4819              LDR      r0,|L1.2208|
00083c  8c40              LDRH     r0,[r0,#0x22]
00083e  491d              LDR      r1,|L1.2228|
000840  8008              STRH     r0,[r1,#0]
;;;661    
;;;662    #if ETHERNET_DEBUG
;;;663             /* print Dest & Source Ports   */
;;;664    	     print("Dest: ");
;;;665    	     printhexa((DestPort>>8)&0xFF);
;;;666    	     printhexa(DestPort&0xFF);
;;;667    	     print("\nSource: ");
;;;668    	     printhexa((SrcPort>>8)&0xFF);
;;;669    	     printhexa(SrcPort&0xFF);
;;;670    	     print("\n");
;;;671    #endif
;;;672             /* save Host MAC address   */
;;;673    	     memcpy(HostMAC,FRAMEr->source,6);
000842  481d              LDR      r0,|L1.2232|
000844  4916              LDR      r1,|L1.2208|
000846  f8d12006          LDR      r2,[r1,#6]  ; rxbuffer
00084a  6002              STR      r2,[r0,#0]  ; HostMAC
00084c  8949              LDRH     r1,[r1,#0xa]  ; rxbuffer
00084e  8081              STRH     r1,[r0,#4]
;;;674    
;;;675    #if ETHERNET_DEBUG
;;;676             /* print Host MAC address  */
;;;677    	     print("\nSource MAC: ");
;;;678    	     printhexa(HostMAC[5]);
;;;679    	     printhexa(HostMAC[4]);
;;;680    	     printhexa(HostMAC[3]);
;;;681    	     printhexa(HostMAC[2]);
;;;682    	     printhexa(HostMAC[1]);
;;;683    	     printhexa(HostMAC[0]);
;;;684    	     print("\n");
;;;685    #endif
;;;686    
;;;687             emac_sendline_crlf((char *)&sync[0]);         
000850  481a              LDR      r0,|L1.2236|
000852  e035              B        |L1.2240|
                  |L1.2132|
000854  e04f              B        |L1.2294|
000856  0000              DCW      0x0000
                  |L1.2136|
                          DCD      MYMAC_6
                  |L1.2140|
                          DCD      MYMAC_5
                  |L1.2144|
                          DCD      MyMAC
                  |L1.2148|
                          DCD      MYMAC_4
                  |L1.2152|
                          DCD      MYMAC_3
                  |L1.2156|
                          DCD      MYMAC_2
                  |L1.2160|
                          DCD      MYMAC_1
                  |L1.2164|
                          DCD      0x2007c1b4
                  |L1.2168|
                          DCD      0x2007c000
                  |L1.2172|
                          DCD      0x80000077
                  |L1.2176|
                          DCD      0x50000108
                  |L1.2180|
                          DCD      0x2007cd6c
                  |L1.2184|
                          DCD      0x50000fe4
                  |L1.2188|
                          DCD      txbuffer
                  |L1.2192|
                          DCD      ethernet_timeout
                  |L1.2196|
                          DCD      0x00030d40
                  |L1.2200|
                          DCD      0x2009c000
                  |L1.2204|
                          DCD      rxptr
                  |L1.2208|
                          DCD      rxbuffer
                  |L1.2212|
                          DCD      data_size
                  |L1.2216|
                          DCD      txptr
                  |L1.2220|
                          DCD      synchro
                  |L1.2224|
                          DCD      DestPort
                  |L1.2228|
                          DCD      SrcPort
                  |L1.2232|
                          DCD      HostMAC
                  |L1.2236|
                          DCD      sync
                  |L1.2240|
0008c0  f7fffffe          BL       emac_sendline_crlf
;;;688             emac_getline(buf,15,&count);
0008c4  aa09              ADD      r2,sp,#0x24
0008c6  210f              MOVS     r1,#0xf
0008c8  a805              ADD      r0,sp,#0x14
0008ca  f7fffffe          BL       emac_getline
;;;689    	     memcpy(&buf1[0],&sync[0],sizeof(sync));
0008ce  220d              MOVS     r2,#0xd
0008d0  490b              LDR      r1,|L1.2304|
0008d2  a801              ADD      r0,sp,#4
0008d4  f7fffffe          BL       __aeabi_memcpy
;;;690    	     if (str_cmp(&buf[0],&buf1[0])==0) {
0008d8  a901              ADD      r1,sp,#4
0008da  a805              ADD      r0,sp,#0x14
0008dc  f7fffffe          BL       str_cmp
0008e0  b930              CBNZ     r0,|L1.2288|
;;;691               emac_sendline_crlf((char *)&Ok[0]);
0008e2  4808              LDR      r0,|L1.2308|
0008e4  f7fffffe          BL       emac_sendline_crlf
;;;692    		   synchro = true;
0008e8  2001              MOVS     r0,#1
0008ea  4907              LDR      r1,|L1.2312|
0008ec  7008              STRB     r0,[r1,#0]
;;;693    		   break;
0008ee  e003              B        |L1.2296|
                  |L1.2288|
;;;694    	     } else {
;;;695    			 return (1);
0008f0  2001              MOVS     r0,#1
                  |L1.2290|
;;;696    		 }
;;;697           }
;;;698    	 }
;;;699       }
;;;700       return (0);
;;;701    }
0008f2  b00a              ADD      sp,sp,#0x28
0008f4  bd10              POP      {r4,pc}
                  |L1.2294|
0008f6  e78f              B        |L1.2072|
                  |L1.2296|
0008f8  bf00              NOP                            ;693
0008fa  2000              MOVS     r0,#0                 ;700
0008fc  e7f9              B        |L1.2290|
;;;702    
                          ENDP

0008fe  0000              DCW      0x0000
                  |L1.2304|
                          DCD      sync
                  |L1.2308|
                          DCD      ||Ok||
                  |L1.2312|
                          DCD      synchro

                          AREA ||.bss||, DATA, NOINIT, ALIGN=0

                  rxbuffer
                          %        120
                  txbuffer
                          %        120

                          AREA ||.constdata||, DATA, READONLY, ALIGN=0

                  sync
000000  53796e63          DCB      0x53,0x79,0x6e,0x63
000004  68726f6e          DCB      0x68,0x72,0x6f,0x6e
000008  697a6564          DCB      0x69,0x7a,0x65,0x64
00000c  00                DCB      0x00
                  ||Ok||
00000d  4f4b00            DCB      0x4f,0x4b,0x00

                          AREA ||.data||, DATA, ALIGN=2

                  synchro
000000  00                DCB      0x00
                  MyMAC
000001  000000            DCB      0x00,0x00,0x00
000004  000000            DCB      0x00,0x00,0x00
                  HostMAC
000007  00                DCB      0x00
                          DCD      0x00000000
00000c  0000              DCB      0x00,0x00
                  DestPort
00000e  0000              DCB      0x00,0x00
                  SrcPort
000010  0000              DCB      0x00,0x00
                  data_size
000012  0000              DCW      0x0000
                  dev_175x
                          DCD      0x00000000
                  rxptr
                          DCD      0x00000000
                  txptr
                          DCD      0x00000000
                  ethernet_timeout
                          DCD      0x00000000
                  MYMAC_6
000024  00                DCB      0x00
                  MYMAC_5
000025  00                DCB      0x00
                  MYMAC_4
000026  00                DCB      0x00
                  MYMAC_3
000027  00                DCB      0x00
                  MYMAC_2
000028  00                DCB      0x00
                  MYMAC_1
000029  00                DCB      0x00
