/********************************************************************** * $Id$ abstract.txt *//** * @file abstract.txt * @brief Example description file * @version 2.0 * @date * @author NXP MCU SW Application Team/Micromint USA Support * * Copyright(C) 2010, NXP Semiconductor * All rights reserved. * *********************************************************************** * Software that is described herein is for illustrative purposes only * which provides customers with programming information regarding the * products. This software is supplied "AS IS" without any warranties. * NXP Semiconductors assumes no responsibility or liability for the * use of the software, conveys no license or title under any patent, * copyright, or mask work right to the product. NXP Semiconductors * reserves the right to make changes in the software without * notification. NXP Semiconductors also make no representation or * warranty that such application will be suitable for the specified * use without further testing or modification. **********************************************************************/ @Example description: Purpose: This example describes how to generate PWM signal on 3 Channels in both edge mode and single mode. Process: This program illustrates the PWM signal on 3 Channels in both edge mode and single mode. Peripheral clock for PWM: PWM_PCLK = CCLK / 4 = 100MHz/4 = 25MHz and there is no prescale for PWM. The PWM timer/counter clock is at 25MHz. The base rate is set to 10000. The base PWM frequency is at 25MHz/10000 = 2.5 KHz. Each PWM channel will be configured as following: - Channel 2: Double Edge (P3.25) - Channel 4: Double Edge (P2.3) - Channel 5: Single Edge (P2.4) The Match register values are as follows: - MR0 = 10000 (PWM rate) - MR1 = 10000, MR2 = 5000 (PWM2 output) - MR3 = 10000, MR4 = 3300 (PWM4 output) - MR5 = 7500 (PWM5 output) PWM Duty on each PWM channel: - Channel 2: Set by match 1, Reset by match 2 givung a 50% duty cycle. - Channel 4: Set by match 3, Reset by match 4 giving a 33% duty cycle. - Channel 5: Set by match 0, Reset by match 5 giving a 75% duty cycle. Using Oscilloscope to observe the PWM signals @Directory contents: \EWARM: includes EWARM (IAR) project and configuration files \Keil: includes RVMDK (Keil)project and configuration files lpc17xx_libcfg.h: Library configuration file - include needed driver library for this example makefile: Example's makefile (to build with GNU toolchain) pwm_dual_edge.c: Main program @How to run: - Step 1: Build example. - Step 2: Burn hex file into board (if run on ROM mode) - Step 3: Configure hardware as above instruction - Step 4: Run example, Use oscilloscope to monitor the wave form @Tip: - Open \EWARM\*.eww project file to run example on IAR - Open \RVMDK\*.uvproj project file to run example on Keil