LPC1700CMSIS Standard Peripheral Firmware Library Manual: LPC1700CMSIS Standard Peripheral Firmware Library

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  • Modules
  • Data Structures
  • Files

LPC1700CMSIS Standard Peripheral Firmware Library

07_June_2011

This software package contains Standard Peripheral Firmware Driver Library for LPC1700. This package included Macros, Data Types, Structure Types and Functions that are useful in peripheral functionality application without deep-knowledge about LPC1700's peripherals.

The LPC1700CMSIS Standard Peripheral Firmware Library is also complaint with CMSIS.

Overview Manual

  • LPC1700CMSIS Library
    • Supported microcontrollers
    • Supported toolchains
      • LPC1000 Software Development Toolchain
    • Evaluation boards
    • Debugger
    • CMSIS Introduction (by ARM)
    • Acronyms
    • Release Note
  • Package Description
    • Core
    • Drivers
    • Examples
    • MAKE section
    • Lib building
  • Examples Description
    • Example list
    • LPC1700CMSIS Example Description

NXP's License: Software that is described herein is for illustrative purposes only which provides customers with programming information regarding the products. This software is supplied "AS IS" without any warranties. NXP Semiconductors assumes no responsibility or liability for the use of the software, conveys no license or title under any patent, copyright, or mask work right to the product. NXP Semiconductors reserves the right to make changes in the software without notification. NXP Semiconductors also make no representation or warranty that such application will be suitable for the specified use without further testing or modification.

CMSIS's License

Generated on Tue Jun 7 14:58:54 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Module Index

  • Files

Modules

Here is a list of all modules:
  • CMSIS
    • CMSIS Core Lint Configuration
    • CMSIS Core Definitions
    • CMSIS Core Register
      • CMSIS Core
      • CMSIS NVIC
      • CMSIS SCB
      • CMSIS SysTick
      • CMSIS ITM
      • CMSIS Interrupt Type
      • CMSIS Core Debug
    • CMSIS Core Function Interface
      • CMSIS Core NVIC Functions
      • CMSIS Core SysTick Functions
        • CMSIS Core Debug Functions
      • CMSIS Core Debug Functions
      • CMSIS Core Register Access Functions
    • CMSIS Core Instruction Interface
  • LPC17xx System
    • LPC17xx System Defines
    • LPC17xx System Public Variables
    • LPC17xx System Public Functions
  • LPC1700CMSIS Firmware Library
    • ADC
      • ADC Private Macros
      • ADC Public Types
      • ADC Public Functions
    • CAN
      • CAN Public Macros
      • CAN Private Macros
      • CAN Public Types
      • CAN Public Functions
      • CAN Private Variables
    • CLKPWR
      • CLKPWR Public Macros
      • CLKPWR Private Macros
      • CLKPWR Public Functions
    • DAC
      • DAC Private Macros
      • DAC Public Types
      • DAC Public Functions
    • EMAC
      • EMAC Public Macros
      • EMAC Private Macros
      • EMAC Public Types
      • EMAC Public Functions
      • EMAC Private Variables
    • EXTI
      • EXTI Private Macros
      • EXTI Public Types
      • EXTI Public Functions
    • GPDMA
      • GPDMA Public Macros
      • GPDMA Private Macros
      • GPDMA Public Types
      • GPDMA Public Functions
      • GPDMA Private Variables
    • GPIO
      • GPIO Public Macros
      • GPIO Public Types
      • GPIO Public Functions
    • I2C
      • I2C Private Macros
      • I2C Public Types
      • I2C Public Functions
      • I2C Private Types
    • I2S
      • I2S Public Macros
      • I2S Private Macros
      • I2S Public Types
      • I2S Public Functions
    • LIBCFG_DEFAULT
      • LIBCFG_DEFAULT Public Macros
      • LIBCFG_DEFAULT Public Functions
    • MCPWM
      • MCPWM Public Macros
      • MCPWM Private Macros
      • MCPWM Public Types
      • MCPWM Public Functions
    • NVIC
      • NVIC Public Functions
      • NVIC_Private_Macros
    • PINSEL
      • PINSEL Public Macros
      • PINSEL Private Macros
      • PINSEL Public Types
      • PINSEL Public Functions
    • PWM
      • PWM Private Macros
      • PWM Public Types
      • PWM Public Functions
    • QEI
      • QEI Public Macros
      • QEI Private Macros
      • QEI Public Types
      • QEI Public Functions
      • QEI Private Types
    • RIT
      • RIT Private Macros
      • RIT Public Functions
    • RTC
      • RTC Private Macros
      • RTC Public Types
      • RTC Public Functions
    • SPI
      • SPI Public Macros
      • SPI Private Macros
      • SPI Public Types
      • SPI Public Functions
    • SSP
      • SSP Public Macros
      • SSP Private Macros
      • SSP Public Types
      • SSP Public Functions
    • SYSTICK
      • SYSTICK Private Macros
      • SYSTICK Public Functions
    • TIM
      • TIM Private Macros
      • TIM Public Types
      • TIM Public Functions
    • UART
      • UART Public Macros
      • UART Private Macros
      • UART Public Types
      • UART Public Functions
    • WDT
      • WDT Private Macros
      • WDT Public Types
      • WDT Public Functions
    • LPC_Types
      • LPC_Types Public Types
      • LPC_Types Public Macros
  • LPC1700CMSIS Examples
    • ADC
      • Burst
      • DMA
      • HardwareTrigger
      • INTERRUPT
      • Polling
    • CAN
      • CAN_LedControl
      • CAN_self_test
      • CAN_test_aflut
      • CAN_test_bypass_mode
      • CAN_test_two_kit
    • Cortex-M3
      • Bit-banding
      • MPU
      • Privilege_mode
    • DAC
      • DMA
      • SineWave
      • Speaker
      • WaveGenerate
    • EMAC
      • Easy_Web
      • EmacRaw
      • uIP
        • Clock interface
        • Protosockets library
        • Timer library
        • The uIP TCP/IP stack
          • uIP packet forwarding
          • uIP TCP throughput booster hack
          • uIP configuration functions
          • uIP initialization functions
          • uIP device driver functions
          • uIP application functions
          • uIP conversion functions
          • Variables used in uIP device drivers
          • uIP Address Resolution Protocol
          • uIP
            • Clock interface
            • Protosockets library
            • Timer library
            • The uIP TCP/IP stack
              • uIP packet forwarding
              • uIP TCP throughput booster hack
              • uIP configuration functions
              • uIP initialization functions
              • uIP device driver functions
              • uIP application functions
              • uIP conversion functions
              • Variables used in uIP device drivers
              • uIP Address Resolution Protocol
              • uIP
                • Clock interface
                • Protosockets library
                • Timer library
                • The uIP TCP/IP stack
                  • uIP packet forwarding
                  • uIP TCP throughput booster hack
                  • uIP configuration functions
                  • uIP initialization functions
                  • uIP device driver functions
                  • uIP application functions
                  • uIP conversion functions
                  • Variables used in uIP device drivers
                  • uIP Address Resolution Protocol
                  • uIP
                    • Clock interface
                    • Protosockets library
                    • Timer library
                    • The uIP TCP/IP stack
                      • uIP packet forwarding
                      • uIP TCP throughput booster hack
                      • uIP configuration functions
                      • uIP initialization functions
                      • uIP device driver functions
                      • uIP application functions
                      • uIP conversion functions
                      • Variables used in uIP device drivers
                      • uIP Address Resolution Protocol
                      • uIP
                        • Clock interface
                        • Protosockets library
                        • Timer library
                        • The uIP TCP/IP stack
                          • uIP packet forwarding
                          • uIP TCP throughput booster hack
                          • uIP configuration functions
                          • uIP initialization functions
                          • uIP device driver functions
                          • uIP application functions
                          • uIP conversion functions
                          • Variables used in uIP device drivers
                          • uIP Address Resolution Protocol
                          • uIP
                            • Clock interface
                            • Protosockets library
                            • Timer library
                            • The uIP TCP/IP stack
                              • uIP packet forwarding
                              • uIP TCP throughput booster hack
                              • uIP configuration functions
                              • uIP initialization functions
                              • uIP device driver functions
                              • uIP application functions
                              • uIP conversion functions
                              • Variables used in uIP device drivers
                              • uIP Address Resolution Protocol
                              • uIP
                                • Clock interface
                                • Protosockets library
                                • Timer library
                                • The uIP TCP/IP stack
                                  • uIP packet forwarding
                                  • uIP TCP throughput booster hack
                                  • uIP configuration functions
                                  • uIP initialization functions
                                  • uIP device driver functions
                                  • uIP application functions
                                  • uIP conversion functions
                                  • Variables used in uIP device drivers
                                  • uIP Address Resolution Protocol
                                  • uIP
                                    • Clock interface
                                    • Protosockets library
                                    • Timer library
                                    • The uIP TCP/IP stack
                                      • uIP packet forwarding
                                      • uIP TCP throughput booster hack
                                      • uIP configuration functions
                                      • uIP initialization functions
                                      • uIP device driver functions
                                      • uIP application functions
                                      • uIP conversion functions
                                      • Variables used in uIP device drivers
                                      • uIP Address Resolution Protocol
                                      • uIP
                                        • Clock interface
                                        • Protosockets library
                                        • Timer library
                                        • The uIP TCP/IP stack
                                          • uIP packet forwarding
                                          • uIP TCP throughput booster hack
                                          • uIP configuration functions
                                          • uIP initialization functions
                                          • uIP device driver functions
                                          • uIP application functions
                                          • uIP conversion functions
                                          • Variables used in uIP device drivers
                                          • uIP Address Resolution Protocol
                                          • uIP
                                          • Architecture specific uIP functions
                                        • Configuration options for uIP
                                        • Apps
                                          • Hello, world
                                          • DNS resolver
                                          • SMTP E-mail sender
                                          • Web client
                                          • Web server
                                        • Pt
                                          • Local continuations
                                      • Architecture specific uIP functions
                                    • Configuration options for uIP
                                    • Apps
                                      • Hello, world
                                      • DNS resolver
                                      • SMTP E-mail sender
                                      • Web client
                                      • Web server
                                    • Pt
                                      • Local continuations
                                  • Architecture specific uIP functions
                                • Configuration options for uIP
                                • Apps
                                  • Hello, world
                                  • DNS resolver
                                  • SMTP E-mail sender
                                  • Web client
                                  • Web server
                                • Pt
                                  • Local continuations
                              • Architecture specific uIP functions
                            • Configuration options for uIP
                            • Apps
                              • Hello, world
                              • DNS resolver
                              • SMTP E-mail sender
                              • Web client
                              • Web server
                            • Pt
                              • Local continuations
                          • Architecture specific uIP functions
                        • Configuration options for uIP
                        • Apps
                          • Hello, world
                          • DNS resolver
                          • SMTP E-mail sender
                          • Web client
                          • Web server
                        • Pt
                          • Local continuations
                      • Architecture specific uIP functions
                    • Configuration options for uIP
                    • Apps
                      • Hello, world
                      • DNS resolver
                      • SMTP E-mail sender
                      • Web client
                      • Web server
                    • Pt
                      • Local continuations
                  • Architecture specific uIP functions
                • Configuration options for uIP
                • Apps
                  • Hello, world
                  • DNS resolver
                  • SMTP E-mail sender
                  • Web client
                  • Web server
                • Pt
                  • Local continuations
              • Architecture specific uIP functions
            • Configuration options for uIP
            • Apps
              • Hello, world
              • DNS resolver
              • SMTP E-mail sender
              • Web client
              • Web server
            • Pt
              • Local continuations
          • Architecture specific uIP functions
        • Configuration options for uIP
        • Apps
          • Hello, world
          • DNS resolver
          • SMTP E-mail sender
          • Web client
          • Web server
        • Pt
          • Local continuations
    • GPDMA
      • Flash_2_Ram_Test
      • GPDMA_Sleep
      • Link_list
      • Ram_2_Ram_Test
    • GPIO
      • GPIO_Interrupt
      • LedBlinky
    • I2C
      • master
      • Master_Slave_Interrupt
      • Monitor
      • pca8581_polling
      • sc16is750_int
      • sc16is750_polling
      • slave
    • I2S
      • I2S_DMA
      • I2S_IRQ
      • I2S_MCLK
      • I2S_test_4_wire
      • I2S_two_kit
      • Polling
    • LCD
      • NOKIA6610_LCD
      • QVGA_TFT_LCD
    • MCPWM
      • MCPWMSimple
    • NVIC
      • Priority
      • VecTable_Relocation
    • PWM
      • Dual_Edge
      • Match_Interrupt
      • Single_Edge
    • PWR
      • EXTINT_Sleep
      • NMI_PowerDown
      • RTC_DeepPWD
      • WDT_DeepSleep
    • QEI
      • QEI_Velo
    • RIT
      • Interrupt
    • RTC
      • AlarmCntIncrInterrupt
      • Calibration
    • SPI
      • LoopBack
      • Master
      • sc16is750_int
      • sc16is750_polling
      • SDCard
      • slave
    • SSP
      • dma
      • Master
      • MicroWire
      • sc16is750_int
      • sc16is750_polling
      • Slave
      • TI
    • SysTick
      • 10ms_base
      • STCLK
    • TIMER
      • Capture
      • FreqMeasure
      • Gen_Diff_Delay
      • Gen_Diff_Freqs
      • Interrupt_Match
      • Polling_Match
      • PWMSignal
    • UART
      • IrDA
        • Receive
        • Transmit
      • AutoBaud
      • DMA
      • HWFlowControl
      • Interrupt
      • Polling
      • RS485_Master
      • RS485_Slave
      • UART1_FullModem
    • USBDEV
      • USBAudio
      • USBCDC
      • USBHID
      • USBMassStorage
    • WDT
      • INTERRUPT
      • RESET
Generated on Tue Jun 7 15:00:02 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: CMSIS

CMSIS

Modules

CMSIS Core Lint Configuration
CMSIS Core Definitions
CMSIS Core Register
CMSIS Core Function Interface
CMSIS Core Instruction Interface
Generated on Tue Jun 7 14:59:44 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: CMSIS Core Lint Configuration

CMSIS Core Lint Configuration
[CMSIS]

List of Lint messages which will be suppressed and not shown:
  • not yet checked

Note: To re-enable a Message, insert a space before 'lint' *

Generated on Tue Jun 7 15:00:02 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: CMSIS Core Definitions

CMSIS Core Definitions
[CMSIS]

Defines

#define | __CM3_CMSIS_VERSION_MAIN (0x02)
#define | __CM3_CMSIS_VERSION_SUB (0x00)
#define | __CM3_CMSIS_VERSION ((__CM3_CMSIS_VERSION_MAIN << 16) | __CM3_CMSIS_VERSION_SUB)
#define | __CORTEX_M (0x03)
#define | __I volatile const
#define | __O volatile
#define | __IO volatile

Detailed Description

This file defines all structures and symbols for CMSIS core:
  • CMSIS version number
  • Cortex-M core
  • Cortex-M core Revision Number

Define Documentation

#define __CM3_CMSIS_VERSION ((__CM3_CMSIS_VERSION_MAIN << 16) | __CM3_CMSIS_VERSION_SUB)

CMSIS HAL version number

Definition at line 59 of file core_cm3.h.

#define __CM3_CMSIS_VERSION_MAIN (0x02)

[31:16] CMSIS HAL main version

Definition at line 57 of file core_cm3.h.

#define __CM3_CMSIS_VERSION_SUB (0x00)

[15:0] CMSIS HAL sub version

Definition at line 58 of file core_cm3.h.

#define __CORTEX_M (0x03)

Cortex core standard types definitions

Definition at line 61 of file core_cm3.h.

#define __I volatile const

defines 'read only' permissions

Definition at line 98 of file core_cm3.h.

#define __IO volatile

defines 'read / write' permissions

Definition at line 101 of file core_cm3.h.

#define __O volatile

defines 'write only' permissions

Definition at line 100 of file core_cm3.h.

Generated on Tue Jun 7 15:00:02 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: CMSIS Core Register

CMSIS Core Register
[CMSIS]

Modules

CMSIS Core
CMSIS NVIC
CMSIS SCB
CMSIS SysTick
CMSIS ITM
CMSIS Interrupt Type
CMSIS Core Debug
#define | SCS_BASE (0xE000E000UL)
#define | ITM_BASE (0xE0000000UL)
#define | CoreDebug_BASE (0xE000EDF0UL)
#define | SysTick_BASE (SCS_BASE + 0x0010UL)
#define | NVIC_BASE (SCS_BASE + 0x0100UL)
#define | SCB_BASE (SCS_BASE + 0x0D00UL)
#define | InterruptType ((InterruptType_Type *) SCS_BASE)
#define | SCB ((SCB_Type *) SCB_BASE)
#define | SysTick ((SysTick_Type *) SysTick_BASE)
#define | NVIC ((NVIC_Type *) NVIC_BASE)
#define | ITM ((ITM_Type *) ITM_BASE)
#define | CoreDebug ((CoreDebug_Type *) CoreDebug_BASE)

Detailed Description

Core Register contain:
  • Core Register
  • Core NVIC Register
  • Core SCB Register
  • Core SysTick Register
  • Core Debug Register
  • Core MPU Register

Define Documentation

#define CoreDebug ((CoreDebug_Type *) CoreDebug_BASE)

Core Debug configuration struct

Definition at line 844 of file core_cm3.h.

#define CoreDebug_BASE (0xE000EDF0UL)

Core Debug Base Address

Definition at line 834 of file core_cm3.h.

#define InterruptType ((InterruptType_Type *) SCS_BASE)

Interrupt Type Register

Definition at line 839 of file core_cm3.h.

#define ITM ((ITM_Type *) ITM_BASE)

ITM configuration struct

Definition at line 843 of file core_cm3.h.

#define ITM_BASE (0xE0000000UL)

ITM Base Address

Definition at line 833 of file core_cm3.h.

#define NVIC ((NVIC_Type *) NVIC_BASE)

NVIC configuration struct

Definition at line 842 of file core_cm3.h.

#define NVIC_BASE (SCS_BASE + 0x0100UL)

NVIC Base Address

Definition at line 836 of file core_cm3.h.

#define SCB ((SCB_Type *) SCB_BASE)

SCB configuration struct

Definition at line 840 of file core_cm3.h.

#define SCB_BASE (SCS_BASE + 0x0D00UL)

System Control Block Base Address

Definition at line 837 of file core_cm3.h.

#define SCS_BASE (0xE000E000UL)

System Control Space Base Address

Definition at line 832 of file core_cm3.h.

#define SysTick ((SysTick_Type *) SysTick_BASE)

SysTick configuration struct

Definition at line 841 of file core_cm3.h.

#define SysTick_BASE (SCS_BASE + 0x0010UL)

SysTick Base Address

Definition at line 835 of file core_cm3.h.

Generated on Tue Jun 7 15:00:02 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: CMSIS Core

CMSIS Core
[CMSIS Core Register]

Data Structures

union | APSR_Type
Union type to access the Application Program Status Register (APSR). More...
union | IPSR_Type
Union type to access the Interrupt Program Status Register (IPSR). More...
union | xPSR_Type
Union type to access the Special-Purpose Program Status Registers (xPSR). More...
union | CONTROL_Type
Union type to access the Control Registers (CONTROL). More...

Detailed Description

Type definitions for the Cortex-M Core Registers
Generated on Tue Jun 7 14:59:43 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: CMSIS NVIC

CMSIS NVIC
[CMSIS Core Register]

Data Structures

struct NVIC_Type
Structure type to access the Nested Vectored Interrupt Controller (NVIC). More...

Detailed Description

Type definitions for the Cortex-M NVIC Registers
Generated on Tue Jun 7 14:59:43 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: CMSIS SCB

CMSIS SCB
[CMSIS Core Register]

Data Structures

struct | SCB_Type
Structure type to access the System Control Block (SCB). More...

Defines

#define | SCB_CPUID_IMPLEMENTER_Pos 24
#define | SCB_CPUID_IMPLEMENTER_Msk (0xFFUL << SCB_CPUID_IMPLEMENTER_Pos)
#define | SCB_CPUID_VARIANT_Pos 20
#define | SCB_CPUID_VARIANT_Msk (0xFUL << SCB_CPUID_VARIANT_Pos)
#define | SCB_CPUID_PARTNO_Pos 4
#define | SCB_CPUID_PARTNO_Msk (0xFFFUL << SCB_CPUID_PARTNO_Pos)
#define | SCB_CPUID_REVISION_Pos 0
#define | SCB_CPUID_REVISION_Msk (0xFUL << SCB_CPUID_REVISION_Pos)
#define | SCB_ICSR_NMIPENDSET_Pos 31
#define | SCB_ICSR_NMIPENDSET_Msk (1UL << SCB_ICSR_NMIPENDSET_Pos)
#define | SCB_ICSR_PENDSVSET_Pos 28
#define | SCB_ICSR_PENDSVSET_Msk (1UL << SCB_ICSR_PENDSVSET_Pos)
#define | SCB_ICSR_PENDSVCLR_Pos 27
#define | SCB_ICSR_PENDSVCLR_Msk (1UL << SCB_ICSR_PENDSVCLR_Pos)
#define | SCB_ICSR_PENDSTSET_Pos 26
#define | SCB_ICSR_PENDSTSET_Msk (1UL << SCB_ICSR_PENDSTSET_Pos)
#define | SCB_ICSR_PENDSTCLR_Pos 25
#define | SCB_ICSR_PENDSTCLR_Msk (1UL << SCB_ICSR_PENDSTCLR_Pos)
#define | SCB_ICSR_ISRPREEMPT_Pos 23
#define | SCB_ICSR_ISRPREEMPT_Msk (1UL << SCB_ICSR_ISRPREEMPT_Pos)
#define | SCB_ICSR_ISRPENDING_Pos 22
#define | SCB_ICSR_ISRPENDING_Msk (1UL << SCB_ICSR_ISRPENDING_Pos)
#define | SCB_ICSR_VECTPENDING_Pos 12
#define | SCB_ICSR_VECTPENDING_Msk (0x1FFUL << SCB_ICSR_VECTPENDING_Pos)
#define | SCB_ICSR_RETTOBASE_Pos 11
#define | SCB_ICSR_RETTOBASE_Msk (1UL << SCB_ICSR_RETTOBASE_Pos)
#define | SCB_ICSR_VECTACTIVE_Pos 0
#define | SCB_ICSR_VECTACTIVE_Msk (0x1FFUL << SCB_ICSR_VECTACTIVE_Pos)
#define | SCB_VTOR_TBLBASE_Pos 29
#define | SCB_VTOR_TBLBASE_Msk (1UL << SCB_VTOR_TBLBASE_Pos)
#define | SCB_VTOR_TBLOFF_Pos 7
#define | SCB_VTOR_TBLOFF_Msk (0x3FFFFFUL << SCB_VTOR_TBLOFF_Pos)
#define | SCB_AIRCR_VECTKEY_Pos 16
#define | SCB_AIRCR_VECTKEY_Msk (0xFFFFUL << SCB_AIRCR_VECTKEY_Pos)
#define | SCB_AIRCR_VECTKEYSTAT_Pos 16
#define | SCB_AIRCR_VECTKEYSTAT_Msk (0xFFFFUL << SCB_AIRCR_VECTKEYSTAT_Pos)
#define | SCB_AIRCR_ENDIANESS_Pos 15
#define | SCB_AIRCR_ENDIANESS_Msk (1UL << SCB_AIRCR_ENDIANESS_Pos)
#define | SCB_AIRCR_PRIGROUP_Pos 8
#define | SCB_AIRCR_PRIGROUP_Msk (7UL << SCB_AIRCR_PRIGROUP_Pos)
#define | SCB_AIRCR_SYSRESETREQ_Pos 2
#define | SCB_AIRCR_SYSRESETREQ_Msk (1UL << SCB_AIRCR_SYSRESETREQ_Pos)
#define | SCB_AIRCR_VECTCLRACTIVE_Pos 1
#define | SCB_AIRCR_VECTCLRACTIVE_Msk (1UL << SCB_AIRCR_VECTCLRACTIVE_Pos)
#define | SCB_AIRCR_VECTRESET_Pos 0
#define | SCB_AIRCR_VECTRESET_Msk (1UL << SCB_AIRCR_VECTRESET_Pos)
#define | SCB_SCR_SEVONPEND_Pos 4
#define | SCB_SCR_SEVONPEND_Msk (1UL << SCB_SCR_SEVONPEND_Pos)
#define | SCB_SCR_SLEEPDEEP_Pos 2
#define | SCB_SCR_SLEEPDEEP_Msk (1UL << SCB_SCR_SLEEPDEEP_Pos)
#define | SCB_SCR_SLEEPONEXIT_Pos 1
#define | SCB_SCR_SLEEPONEXIT_Msk (1UL << SCB_SCR_SLEEPONEXIT_Pos)
#define | SCB_CCR_STKALIGN_Pos 9
#define | SCB_CCR_STKALIGN_Msk (1UL << SCB_CCR_STKALIGN_Pos)
#define | SCB_CCR_BFHFNMIGN_Pos 8
#define | SCB_CCR_BFHFNMIGN_Msk (1UL << SCB_CCR_BFHFNMIGN_Pos)
#define | SCB_CCR_DIV_0_TRP_Pos 4
#define | SCB_CCR_DIV_0_TRP_Msk (1UL << SCB_CCR_DIV_0_TRP_Pos)
#define | SCB_CCR_UNALIGN_TRP_Pos 3
#define | SCB_CCR_UNALIGN_TRP_Msk (1UL << SCB_CCR_UNALIGN_TRP_Pos)
#define | SCB_CCR_USERSETMPEND_Pos 1
#define | SCB_CCR_USERSETMPEND_Msk (1UL << SCB_CCR_USERSETMPEND_Pos)
#define | SCB_CCR_NONBASETHRDENA_Pos 0
#define | SCB_CCR_NONBASETHRDENA_Msk (1UL << SCB_CCR_NONBASETHRDENA_Pos)
#define | SCB_SHCSR_USGFAULTENA_Pos 18
#define | SCB_SHCSR_USGFAULTENA_Msk (1UL << SCB_SHCSR_USGFAULTENA_Pos)
#define | SCB_SHCSR_BUSFAULTENA_Pos 17
#define | SCB_SHCSR_BUSFAULTENA_Msk (1UL << SCB_SHCSR_BUSFAULTENA_Pos)
#define | SCB_SHCSR_MEMFAULTENA_Pos 16
#define | SCB_SHCSR_MEMFAULTENA_Msk (1UL << SCB_SHCSR_MEMFAULTENA_Pos)
#define | SCB_SHCSR_SVCALLPENDED_Pos 15
#define | SCB_SHCSR_SVCALLPENDED_Msk (1UL << SCB_SHCSR_SVCALLPENDED_Pos)
#define | SCB_SHCSR_BUSFAULTPENDED_Pos 14
#define | SCB_SHCSR_BUSFAULTPENDED_Msk (1UL << SCB_SHCSR_BUSFAULTPENDED_Pos)
#define | SCB_SHCSR_MEMFAULTPENDED_Pos 13
#define | SCB_SHCSR_MEMFAULTPENDED_Msk (1UL << SCB_SHCSR_MEMFAULTPENDED_Pos)
#define | SCB_SHCSR_USGFAULTPENDED_Pos 12
#define | SCB_SHCSR_USGFAULTPENDED_Msk (1UL << SCB_SHCSR_USGFAULTPENDED_Pos)
#define | SCB_SHCSR_SYSTICKACT_Pos 11
#define | SCB_SHCSR_SYSTICKACT_Msk (1UL << SCB_SHCSR_SYSTICKACT_Pos)
#define | SCB_SHCSR_PENDSVACT_Pos 10
#define | SCB_SHCSR_PENDSVACT_Msk (1UL << SCB_SHCSR_PENDSVACT_Pos)
#define | SCB_SHCSR_MONITORACT_Pos 8
#define | SCB_SHCSR_MONITORACT_Msk (1UL << SCB_SHCSR_MONITORACT_Pos)
#define | SCB_SHCSR_SVCALLACT_Pos 7
#define | SCB_SHCSR_SVCALLACT_Msk (1UL << SCB_SHCSR_SVCALLACT_Pos)
#define | SCB_SHCSR_USGFAULTACT_Pos 3
#define | SCB_SHCSR_USGFAULTACT_Msk (1UL << SCB_SHCSR_USGFAULTACT_Pos)
#define | SCB_SHCSR_BUSFAULTACT_Pos 1
#define | SCB_SHCSR_BUSFAULTACT_Msk (1UL << SCB_SHCSR_BUSFAULTACT_Pos)
#define | SCB_SHCSR_MEMFAULTACT_Pos 0
#define | SCB_SHCSR_MEMFAULTACT_Msk (1UL << SCB_SHCSR_MEMFAULTACT_Pos)
#define | SCB_CFSR_USGFAULTSR_Pos 16
#define | SCB_CFSR_USGFAULTSR_Msk (0xFFFFUL << SCB_CFSR_USGFAULTSR_Pos)
#define | SCB_CFSR_BUSFAULTSR_Pos 8
#define | SCB_CFSR_BUSFAULTSR_Msk (0xFFUL << SCB_CFSR_BUSFAULTSR_Pos)
#define | SCB_CFSR_MEMFAULTSR_Pos 0
#define | SCB_CFSR_MEMFAULTSR_Msk (0xFFUL << SCB_CFSR_MEMFAULTSR_Pos)
#define | SCB_HFSR_DEBUGEVT_Pos 31
#define | SCB_HFSR_DEBUGEVT_Msk (1UL << SCB_HFSR_DEBUGEVT_Pos)
#define | SCB_HFSR_FORCED_Pos 30
#define | SCB_HFSR_FORCED_Msk (1UL << SCB_HFSR_FORCED_Pos)
#define | SCB_HFSR_VECTTBL_Pos 1
#define | SCB_HFSR_VECTTBL_Msk (1UL << SCB_HFSR_VECTTBL_Pos)
#define | SCB_DFSR_EXTERNAL_Pos 4
#define | SCB_DFSR_EXTERNAL_Msk (1UL << SCB_DFSR_EXTERNAL_Pos)
#define | SCB_DFSR_VCATCH_Pos 3
#define | SCB_DFSR_VCATCH_Msk (1UL << SCB_DFSR_VCATCH_Pos)
#define | SCB_DFSR_DWTTRAP_Pos 2
#define | SCB_DFSR_DWTTRAP_Msk (1UL << SCB_DFSR_DWTTRAP_Pos)
#define | SCB_DFSR_BKPT_Pos 1
#define | SCB_DFSR_BKPT_Msk (1UL << SCB_DFSR_BKPT_Pos)
#define | SCB_DFSR_HALTED_Pos 0
#define | SCB_DFSR_HALTED_Msk (1UL << SCB_DFSR_HALTED_Pos)

Detailed Description

Type definitions for the Cortex-M System Control Block Registers

Define Documentation

#define SCB_AIRCR_ENDIANESS_Msk (1UL << SCB_AIRCR_ENDIANESS_Pos)

SCB AIRCR: ENDIANESS Mask

Definition at line 325 of file core_cm3.h.

#define SCB_AIRCR_ENDIANESS_Pos 15

SCB AIRCR: ENDIANESS Position

Definition at line 324 of file core_cm3.h.

#define SCB_AIRCR_PRIGROUP_Msk (7UL << SCB_AIRCR_PRIGROUP_Pos)

SCB AIRCR: PRIGROUP Mask

Definition at line 328 of file core_cm3.h.

#define SCB_AIRCR_PRIGROUP_Pos 8

SCB AIRCR: PRIGROUP Position

Definition at line 327 of file core_cm3.h.

#define SCB_AIRCR_SYSRESETREQ_Msk (1UL << SCB_AIRCR_SYSRESETREQ_Pos)

SCB AIRCR: SYSRESETREQ Mask

Definition at line 331 of file core_cm3.h.

#define SCB_AIRCR_SYSRESETREQ_Pos 2

SCB AIRCR: SYSRESETREQ Position

Definition at line 330 of file core_cm3.h.

#define SCB_AIRCR_VECTCLRACTIVE_Msk (1UL << SCB_AIRCR_VECTCLRACTIVE_Pos)

SCB AIRCR: VECTCLRACTIVE Mask

Definition at line 334 of file core_cm3.h.

#define SCB_AIRCR_VECTCLRACTIVE_Pos 1

SCB AIRCR: VECTCLRACTIVE Position

Definition at line 333 of file core_cm3.h.

#define SCB_AIRCR_VECTKEY_Msk (0xFFFFUL << SCB_AIRCR_VECTKEY_Pos)

SCB AIRCR: VECTKEY Mask

Definition at line 319 of file core_cm3.h.

#define SCB_AIRCR_VECTKEY_Pos 16

SCB AIRCR: VECTKEY Position

Definition at line 318 of file core_cm3.h.

#define SCB_AIRCR_VECTKEYSTAT_Msk (0xFFFFUL << SCB_AIRCR_VECTKEYSTAT_Pos)

SCB AIRCR: VECTKEYSTAT Mask

Definition at line 322 of file core_cm3.h.

#define SCB_AIRCR_VECTKEYSTAT_Pos 16

SCB AIRCR: VECTKEYSTAT Position

Definition at line 321 of file core_cm3.h.

#define SCB_AIRCR_VECTRESET_Msk (1UL << SCB_AIRCR_VECTRESET_Pos)

SCB AIRCR: VECTRESET Mask

Definition at line 337 of file core_cm3.h.

#define SCB_AIRCR_VECTRESET_Pos 0

SCB AIRCR: VECTRESET Position

Definition at line 336 of file core_cm3.h.

#define SCB_CCR_BFHFNMIGN_Msk (1UL << SCB_CCR_BFHFNMIGN_Pos)

SCB CCR: BFHFNMIGN Mask

Definition at line 354 of file core_cm3.h.

#define SCB_CCR_BFHFNMIGN_Pos 8

SCB CCR: BFHFNMIGN Position

Definition at line 353 of file core_cm3.h.

#define SCB_CCR_DIV_0_TRP_Msk (1UL << SCB_CCR_DIV_0_TRP_Pos)

SCB CCR: DIV_0_TRP Mask

Definition at line 357 of file core_cm3.h.

#define SCB_CCR_DIV_0_TRP_Pos 4

SCB CCR: DIV_0_TRP Position

Definition at line 356 of file core_cm3.h.

#define SCB_CCR_NONBASETHRDENA_Msk (1UL << SCB_CCR_NONBASETHRDENA_Pos)

SCB CCR: NONBASETHRDENA Mask

Definition at line 366 of file core_cm3.h.

#define SCB_CCR_NONBASETHRDENA_Pos 0

SCB CCR: NONBASETHRDENA Position

Definition at line 365 of file core_cm3.h.

#define SCB_CCR_STKALIGN_Msk (1UL << SCB_CCR_STKALIGN_Pos)

SCB CCR: STKALIGN Mask

Definition at line 351 of file core_cm3.h.

#define SCB_CCR_STKALIGN_Pos 9

SCB CCR: STKALIGN Position

Definition at line 350 of file core_cm3.h.

#define SCB_CCR_UNALIGN_TRP_Msk (1UL << SCB_CCR_UNALIGN_TRP_Pos)

SCB CCR: UNALIGN_TRP Mask

Definition at line 360 of file core_cm3.h.

#define SCB_CCR_UNALIGN_TRP_Pos 3

SCB CCR: UNALIGN_TRP Position

Definition at line 359 of file core_cm3.h.

#define SCB_CCR_USERSETMPEND_Msk (1UL << SCB_CCR_USERSETMPEND_Pos)

SCB CCR: USERSETMPEND Mask

Definition at line 363 of file core_cm3.h.

#define SCB_CCR_USERSETMPEND_Pos 1

SCB CCR: USERSETMPEND Position

Definition at line 362 of file core_cm3.h.

#define SCB_CFSR_BUSFAULTSR_Msk (0xFFUL << SCB_CFSR_BUSFAULTSR_Pos)

SCB CFSR: Bus Fault Status Register Mask

Definition at line 416 of file core_cm3.h.

#define SCB_CFSR_BUSFAULTSR_Pos 8

SCB CFSR: Bus Fault Status Register Position

Definition at line 415 of file core_cm3.h.

#define SCB_CFSR_MEMFAULTSR_Msk (0xFFUL << SCB_CFSR_MEMFAULTSR_Pos)

SCB CFSR: Memory Manage Fault Status Register Mask

Definition at line 419 of file core_cm3.h.

#define SCB_CFSR_MEMFAULTSR_Pos 0

SCB CFSR: Memory Manage Fault Status Register Position

Definition at line 418 of file core_cm3.h.

#define SCB_CFSR_USGFAULTSR_Msk (0xFFFFUL << SCB_CFSR_USGFAULTSR_Pos)

SCB CFSR: Usage Fault Status Register Mask

Definition at line 413 of file core_cm3.h.

#define SCB_CFSR_USGFAULTSR_Pos 16

SCB CFSR: Usage Fault Status Register Position

Definition at line 412 of file core_cm3.h.

#define SCB_CPUID_IMPLEMENTER_Msk (0xFFUL << SCB_CPUID_IMPLEMENTER_Pos)

SCB CPUID: IMPLEMENTER Mask

Definition at line 268 of file core_cm3.h.

#define SCB_CPUID_IMPLEMENTER_Pos 24

SCB CPUID: IMPLEMENTER Position

Definition at line 267 of file core_cm3.h.

#define SCB_CPUID_PARTNO_Msk (0xFFFUL << SCB_CPUID_PARTNO_Pos)

SCB CPUID: PARTNO Mask

Definition at line 274 of file core_cm3.h.

#define SCB_CPUID_PARTNO_Pos 4

SCB CPUID: PARTNO Position

Definition at line 273 of file core_cm3.h.

#define SCB_CPUID_REVISION_Msk (0xFUL << SCB_CPUID_REVISION_Pos)

SCB CPUID: REVISION Mask

Definition at line 277 of file core_cm3.h.

#define SCB_CPUID_REVISION_Pos 0

SCB CPUID: REVISION Position

Definition at line 276 of file core_cm3.h.

#define SCB_CPUID_VARIANT_Msk (0xFUL << SCB_CPUID_VARIANT_Pos)

SCB CPUID: VARIANT Mask

Definition at line 271 of file core_cm3.h.

#define SCB_CPUID_VARIANT_Pos 20

SCB CPUID: VARIANT Position

Definition at line 270 of file core_cm3.h.

#define SCB_DFSR_BKPT_Msk (1UL << SCB_DFSR_BKPT_Pos)

SCB DFSR: BKPT Mask

Definition at line 442 of file core_cm3.h.

#define SCB_DFSR_BKPT_Pos 1

SCB DFSR: BKPT Position

Definition at line 441 of file core_cm3.h.

#define SCB_DFSR_DWTTRAP_Msk (1UL << SCB_DFSR_DWTTRAP_Pos)

SCB DFSR: DWTTRAP Mask

Definition at line 439 of file core_cm3.h.

#define SCB_DFSR_DWTTRAP_Pos 2

SCB DFSR: DWTTRAP Position

Definition at line 438 of file core_cm3.h.

#define SCB_DFSR_EXTERNAL_Msk (1UL << SCB_DFSR_EXTERNAL_Pos)

SCB DFSR: EXTERNAL Mask

Definition at line 433 of file core_cm3.h.

#define SCB_DFSR_EXTERNAL_Pos 4

SCB DFSR: EXTERNAL Position

Definition at line 432 of file core_cm3.h.

#define SCB_DFSR_HALTED_Msk (1UL << SCB_DFSR_HALTED_Pos)

SCB DFSR: HALTED Mask

Definition at line 445 of file core_cm3.h.

#define SCB_DFSR_HALTED_Pos 0

SCB DFSR: HALTED Position

Definition at line 444 of file core_cm3.h.

#define SCB_DFSR_VCATCH_Msk (1UL << SCB_DFSR_VCATCH_Pos)

SCB DFSR: VCATCH Mask

Definition at line 436 of file core_cm3.h.

#define SCB_DFSR_VCATCH_Pos 3

SCB DFSR: VCATCH Position

Definition at line 435 of file core_cm3.h.

#define SCB_HFSR_DEBUGEVT_Msk (1UL << SCB_HFSR_DEBUGEVT_Pos)

SCB HFSR: DEBUGEVT Mask

Definition at line 423 of file core_cm3.h.

#define SCB_HFSR_DEBUGEVT_Pos 31

SCB HFSR: DEBUGEVT Position

Definition at line 422 of file core_cm3.h.

#define SCB_HFSR_FORCED_Msk (1UL << SCB_HFSR_FORCED_Pos)

SCB HFSR: FORCED Mask

Definition at line 426 of file core_cm3.h.

#define SCB_HFSR_FORCED_Pos 30

SCB HFSR: FORCED Position

Definition at line 425 of file core_cm3.h.

#define SCB_HFSR_VECTTBL_Msk (1UL << SCB_HFSR_VECTTBL_Pos)

SCB HFSR: VECTTBL Mask

Definition at line 429 of file core_cm3.h.

#define SCB_HFSR_VECTTBL_Pos 1

SCB HFSR: VECTTBL Position

Definition at line 428 of file core_cm3.h.

#define SCB_ICSR_ISRPENDING_Msk (1UL << SCB_ICSR_ISRPENDING_Pos)

SCB ICSR: ISRPENDING Mask

Definition at line 299 of file core_cm3.h.

#define SCB_ICSR_ISRPENDING_Pos 22

SCB ICSR: ISRPENDING Position

Definition at line 298 of file core_cm3.h.

#define SCB_ICSR_ISRPREEMPT_Msk (1UL << SCB_ICSR_ISRPREEMPT_Pos)

SCB ICSR: ISRPREEMPT Mask

Definition at line 296 of file core_cm3.h.

#define SCB_ICSR_ISRPREEMPT_Pos 23

SCB ICSR: ISRPREEMPT Position

Definition at line 295 of file core_cm3.h.

#define SCB_ICSR_NMIPENDSET_Msk (1UL << SCB_ICSR_NMIPENDSET_Pos)

SCB ICSR: NMIPENDSET Mask

Definition at line 281 of file core_cm3.h.

#define SCB_ICSR_NMIPENDSET_Pos 31

SCB ICSR: NMIPENDSET Position

Definition at line 280 of file core_cm3.h.

#define SCB_ICSR_PENDSTCLR_Msk (1UL << SCB_ICSR_PENDSTCLR_Pos)

SCB ICSR: PENDSTCLR Mask

Definition at line 293 of file core_cm3.h.

#define SCB_ICSR_PENDSTCLR_Pos 25

SCB ICSR: PENDSTCLR Position

Definition at line 292 of file core_cm3.h.

#define SCB_ICSR_PENDSTSET_Msk (1UL << SCB_ICSR_PENDSTSET_Pos)

SCB ICSR: PENDSTSET Mask

Definition at line 290 of file core_cm3.h.

#define SCB_ICSR_PENDSTSET_Pos 26

SCB ICSR: PENDSTSET Position

Definition at line 289 of file core_cm3.h.

#define SCB_ICSR_PENDSVCLR_Msk (1UL << SCB_ICSR_PENDSVCLR_Pos)

SCB ICSR: PENDSVCLR Mask

Definition at line 287 of file core_cm3.h.

#define SCB_ICSR_PENDSVCLR_Pos 27

SCB ICSR: PENDSVCLR Position

Definition at line 286 of file core_cm3.h.

#define SCB_ICSR_PENDSVSET_Msk (1UL << SCB_ICSR_PENDSVSET_Pos)

SCB ICSR: PENDSVSET Mask

Definition at line 284 of file core_cm3.h.

#define SCB_ICSR_PENDSVSET_Pos 28

SCB ICSR: PENDSVSET Position

Definition at line 283 of file core_cm3.h.

#define SCB_ICSR_RETTOBASE_Msk (1UL << SCB_ICSR_RETTOBASE_Pos)

SCB ICSR: RETTOBASE Mask

Definition at line 305 of file core_cm3.h.

#define SCB_ICSR_RETTOBASE_Pos 11

SCB ICSR: RETTOBASE Position

Definition at line 304 of file core_cm3.h.

#define SCB_ICSR_VECTACTIVE_Msk (0x1FFUL << SCB_ICSR_VECTACTIVE_Pos)

SCB ICSR: VECTACTIVE Mask

Definition at line 308 of file core_cm3.h.

#define SCB_ICSR_VECTACTIVE_Pos 0

SCB ICSR: VECTACTIVE Position

Definition at line 307 of file core_cm3.h.

#define SCB_ICSR_VECTPENDING_Msk (0x1FFUL << SCB_ICSR_VECTPENDING_Pos)

SCB ICSR: VECTPENDING Mask

Definition at line 302 of file core_cm3.h.

#define SCB_ICSR_VECTPENDING_Pos 12

SCB ICSR: VECTPENDING Position

Definition at line 301 of file core_cm3.h.

#define SCB_SCR_SEVONPEND_Msk (1UL << SCB_SCR_SEVONPEND_Pos)

SCB SCR: SEVONPEND Mask

Definition at line 341 of file core_cm3.h.

#define SCB_SCR_SEVONPEND_Pos 4

SCB SCR: SEVONPEND Position

Definition at line 340 of file core_cm3.h.

#define SCB_SCR_SLEEPDEEP_Msk (1UL << SCB_SCR_SLEEPDEEP_Pos)

SCB SCR: SLEEPDEEP Mask

Definition at line 344 of file core_cm3.h.

#define SCB_SCR_SLEEPDEEP_Pos 2

SCB SCR: SLEEPDEEP Position

Definition at line 343 of file core_cm3.h.

#define SCB_SCR_SLEEPONEXIT_Msk (1UL << SCB_SCR_SLEEPONEXIT_Pos)

SCB SCR: SLEEPONEXIT Mask

Definition at line 347 of file core_cm3.h.

#define SCB_SCR_SLEEPONEXIT_Pos 1

SCB SCR: SLEEPONEXIT Position

Definition at line 346 of file core_cm3.h.

#define SCB_SHCSR_BUSFAULTACT_Msk (1UL << SCB_SHCSR_BUSFAULTACT_Pos)

SCB SHCSR: BUSFAULTACT Mask

Definition at line 406 of file core_cm3.h.

#define SCB_SHCSR_BUSFAULTACT_Pos 1

SCB SHCSR: BUSFAULTACT Position

Definition at line 405 of file core_cm3.h.

#define SCB_SHCSR_BUSFAULTENA_Msk (1UL << SCB_SHCSR_BUSFAULTENA_Pos)

SCB SHCSR: BUSFAULTENA Mask

Definition at line 373 of file core_cm3.h.

#define SCB_SHCSR_BUSFAULTENA_Pos 17

SCB SHCSR: BUSFAULTENA Position

Definition at line 372 of file core_cm3.h.

#define SCB_SHCSR_BUSFAULTPENDED_Msk (1UL << SCB_SHCSR_BUSFAULTPENDED_Pos)

SCB SHCSR: BUSFAULTPENDED Mask

Definition at line 382 of file core_cm3.h.

#define SCB_SHCSR_BUSFAULTPENDED_Pos 14

SCB SHCSR: BUSFAULTPENDED Position

Definition at line 381 of file core_cm3.h.

#define SCB_SHCSR_MEMFAULTACT_Msk (1UL << SCB_SHCSR_MEMFAULTACT_Pos)

SCB SHCSR: MEMFAULTACT Mask

Definition at line 409 of file core_cm3.h.

#define SCB_SHCSR_MEMFAULTACT_Pos 0

SCB SHCSR: MEMFAULTACT Position

Definition at line 408 of file core_cm3.h.

#define SCB_SHCSR_MEMFAULTENA_Msk (1UL << SCB_SHCSR_MEMFAULTENA_Pos)

SCB SHCSR: MEMFAULTENA Mask

Definition at line 376 of file core_cm3.h.

#define SCB_SHCSR_MEMFAULTENA_Pos 16

SCB SHCSR: MEMFAULTENA Position

Definition at line 375 of file core_cm3.h.

#define SCB_SHCSR_MEMFAULTPENDED_Msk (1UL << SCB_SHCSR_MEMFAULTPENDED_Pos)

SCB SHCSR: MEMFAULTPENDED Mask

Definition at line 385 of file core_cm3.h.

#define SCB_SHCSR_MEMFAULTPENDED_Pos 13

SCB SHCSR: MEMFAULTPENDED Position

Definition at line 384 of file core_cm3.h.

#define SCB_SHCSR_MONITORACT_Msk (1UL << SCB_SHCSR_MONITORACT_Pos)

SCB SHCSR: MONITORACT Mask

Definition at line 397 of file core_cm3.h.

#define SCB_SHCSR_MONITORACT_Pos 8

SCB SHCSR: MONITORACT Position

Definition at line 396 of file core_cm3.h.

#define SCB_SHCSR_PENDSVACT_Msk (1UL << SCB_SHCSR_PENDSVACT_Pos)

SCB SHCSR: PENDSVACT Mask

Definition at line 394 of file core_cm3.h.

#define SCB_SHCSR_PENDSVACT_Pos 10

SCB SHCSR: PENDSVACT Position

Definition at line 393 of file core_cm3.h.

#define SCB_SHCSR_SVCALLACT_Msk (1UL << SCB_SHCSR_SVCALLACT_Pos)

SCB SHCSR: SVCALLACT Mask

Definition at line 400 of file core_cm3.h.

#define SCB_SHCSR_SVCALLACT_Pos 7

SCB SHCSR: SVCALLACT Position

Definition at line 399 of file core_cm3.h.

#define SCB_SHCSR_SVCALLPENDED_Msk (1UL << SCB_SHCSR_SVCALLPENDED_Pos)

SCB SHCSR: SVCALLPENDED Mask

Definition at line 379 of file core_cm3.h.

#define SCB_SHCSR_SVCALLPENDED_Pos 15

SCB SHCSR: SVCALLPENDED Position

Definition at line 378 of file core_cm3.h.

#define SCB_SHCSR_SYSTICKACT_Msk (1UL << SCB_SHCSR_SYSTICKACT_Pos)

SCB SHCSR: SYSTICKACT Mask

Definition at line 391 of file core_cm3.h.

#define SCB_SHCSR_SYSTICKACT_Pos 11

SCB SHCSR: SYSTICKACT Position

Definition at line 390 of file core_cm3.h.

#define SCB_SHCSR_USGFAULTACT_Msk (1UL << SCB_SHCSR_USGFAULTACT_Pos)

SCB SHCSR: USGFAULTACT Mask

Definition at line 403 of file core_cm3.h.

#define SCB_SHCSR_USGFAULTACT_Pos 3

SCB SHCSR: USGFAULTACT Position

Definition at line 402 of file core_cm3.h.

#define SCB_SHCSR_USGFAULTENA_Msk (1UL << SCB_SHCSR_USGFAULTENA_Pos)

SCB SHCSR: USGFAULTENA Mask

Definition at line 370 of file core_cm3.h.

#define SCB_SHCSR_USGFAULTENA_Pos 18

SCB SHCSR: USGFAULTENA Position

Definition at line 369 of file core_cm3.h.

#define SCB_SHCSR_USGFAULTPENDED_Msk (1UL << SCB_SHCSR_USGFAULTPENDED_Pos)

SCB SHCSR: USGFAULTPENDED Mask

Definition at line 388 of file core_cm3.h.

#define SCB_SHCSR_USGFAULTPENDED_Pos 12

SCB SHCSR: USGFAULTPENDED Position

Definition at line 387 of file core_cm3.h.

#define SCB_VTOR_TBLBASE_Msk (1UL << SCB_VTOR_TBLBASE_Pos)

SCB VTOR: TBLBASE Mask

Definition at line 312 of file core_cm3.h.

#define SCB_VTOR_TBLBASE_Pos 29

SCB VTOR: TBLBASE Position

Definition at line 311 of file core_cm3.h.

#define SCB_VTOR_TBLOFF_Msk (0x3FFFFFUL << SCB_VTOR_TBLOFF_Pos)

SCB VTOR: TBLOFF Mask

Definition at line 315 of file core_cm3.h.

#define SCB_VTOR_TBLOFF_Pos 7

SCB VTOR: TBLOFF Position

Definition at line 314 of file core_cm3.h.

Generated on Tue Jun 7 14:59:44 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: CMSIS SysTick

CMSIS SysTick
[CMSIS Core Register]

Data Structures

struct | SysTick_Type
Structure type to access the System Timer (SysTick). More...

Defines

#define | SysTick_CTRL_COUNTFLAG_Pos 16
#define | SysTick_CTRL_COUNTFLAG_Msk (1UL << SysTick_CTRL_COUNTFLAG_Pos)
#define | SysTick_CTRL_CLKSOURCE_Pos 2
#define | SysTick_CTRL_CLKSOURCE_Msk (1UL << SysTick_CTRL_CLKSOURCE_Pos)
#define | SysTick_CTRL_TICKINT_Pos 1
#define | SysTick_CTRL_TICKINT_Msk (1UL << SysTick_CTRL_TICKINT_Pos)
#define | SysTick_CTRL_ENABLE_Pos 0
#define | SysTick_CTRL_ENABLE_Msk (1UL << SysTick_CTRL_ENABLE_Pos)
#define | SysTick_LOAD_RELOAD_Pos 0
#define | SysTick_LOAD_RELOAD_Msk (0xFFFFFFUL << SysTick_LOAD_RELOAD_Pos)
#define | SysTick_VAL_CURRENT_Pos 0
#define | SysTick_VAL_CURRENT_Msk (0xFFFFFFUL << SysTick_VAL_CURRENT_Pos)
#define | SysTick_CALIB_NOREF_Pos 31
#define | SysTick_CALIB_NOREF_Msk (1UL << SysTick_CALIB_NOREF_Pos)
#define | SysTick_CALIB_SKEW_Pos 30
#define | SysTick_CALIB_SKEW_Msk (1UL << SysTick_CALIB_SKEW_Pos)
#define | SysTick_CALIB_TENMS_Pos 0
#define | SysTick_CALIB_TENMS_Msk (0xFFFFFFUL << SysTick_VAL_CURRENT_Pos)

Detailed Description

Type definitions for the Cortex-M System Timer Registers

Define Documentation

#define SysTick_CALIB_NOREF_Msk (1UL << SysTick_CALIB_NOREF_Pos)

SysTick CALIB: NOREF Mask

Definition at line 489 of file core_cm3.h.

#define SysTick_CALIB_NOREF_Pos 31

SysTick CALIB: NOREF Position

Definition at line 488 of file core_cm3.h.

#define SysTick_CALIB_SKEW_Msk (1UL << SysTick_CALIB_SKEW_Pos)

SysTick CALIB: SKEW Mask

Definition at line 492 of file core_cm3.h.

#define SysTick_CALIB_SKEW_Pos 30

SysTick CALIB: SKEW Position

Definition at line 491 of file core_cm3.h.

#define SysTick_CALIB_TENMS_Msk (0xFFFFFFUL << SysTick_VAL_CURRENT_Pos)

SysTick CALIB: TENMS Mask

Definition at line 495 of file core_cm3.h.

#define SysTick_CALIB_TENMS_Pos 0

SysTick CALIB: TENMS Position

Definition at line 494 of file core_cm3.h.

#define SysTick_CTRL_CLKSOURCE_Msk (1UL << SysTick_CTRL_CLKSOURCE_Pos)

SysTick CTRL: CLKSOURCE Mask

Definition at line 471 of file core_cm3.h.

#define SysTick_CTRL_CLKSOURCE_Pos 2

SysTick CTRL: CLKSOURCE Position

Definition at line 470 of file core_cm3.h.

#define SysTick_CTRL_COUNTFLAG_Msk (1UL << SysTick_CTRL_COUNTFLAG_Pos)

SysTick CTRL: COUNTFLAG Mask

Definition at line 468 of file core_cm3.h.

#define SysTick_CTRL_COUNTFLAG_Pos 16

SysTick CTRL: COUNTFLAG Position

Definition at line 467 of file core_cm3.h.

#define SysTick_CTRL_ENABLE_Msk (1UL << SysTick_CTRL_ENABLE_Pos)

SysTick CTRL: ENABLE Mask

Definition at line 477 of file core_cm3.h.

#define SysTick_CTRL_ENABLE_Pos 0

SysTick CTRL: ENABLE Position

Definition at line 476 of file core_cm3.h.

#define SysTick_CTRL_TICKINT_Msk (1UL << SysTick_CTRL_TICKINT_Pos)

SysTick CTRL: TICKINT Mask

Definition at line 474 of file core_cm3.h.

#define SysTick_CTRL_TICKINT_Pos 1

SysTick CTRL: TICKINT Position

Definition at line 473 of file core_cm3.h.

#define SysTick_LOAD_RELOAD_Msk (0xFFFFFFUL << SysTick_LOAD_RELOAD_Pos)

SysTick LOAD: RELOAD Mask

Definition at line 481 of file core_cm3.h.

#define SysTick_LOAD_RELOAD_Pos 0

SysTick LOAD: RELOAD Position

Definition at line 480 of file core_cm3.h.

#define SysTick_VAL_CURRENT_Msk (0xFFFFFFUL << SysTick_VAL_CURRENT_Pos)

SysTick VAL: CURRENT Mask

Definition at line 485 of file core_cm3.h.

#define SysTick_VAL_CURRENT_Pos 0

SysTick VAL: CURRENT Position

Definition at line 484 of file core_cm3.h.

Generated on Tue Jun 7 14:59:44 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: CMSIS ITM

CMSIS ITM
[CMSIS Core Register]

Data Structures

struct | ITM_Type
Structure type to access the Instrumentation Trace Macrocell Register (ITM). More...

Defines

#define | ITM_TPR_PRIVMASK_Pos 0
#define | ITM_TPR_PRIVMASK_Msk (0xFUL << ITM_TPR_PRIVMASK_Pos)
#define | ITM_TCR_BUSY_Pos 23
#define | ITM_TCR_BUSY_Msk (1UL << ITM_TCR_BUSY_Pos)
#define | ITM_TCR_ATBID_Pos 16
#define | ITM_TCR_ATBID_Msk (0x7FUL << ITM_TCR_ATBID_Pos)
#define | ITM_TCR_TSPrescale_Pos 8
#define | ITM_TCR_TSPrescale_Msk (3UL << ITM_TCR_TSPrescale_Pos)
#define | ITM_TCR_SWOENA_Pos 4
#define | ITM_TCR_SWOENA_Msk (1UL << ITM_TCR_SWOENA_Pos)
#define | ITM_TCR_DWTENA_Pos 3
#define | ITM_TCR_DWTENA_Msk (1UL << ITM_TCR_DWTENA_Pos)
#define | ITM_TCR_SYNCENA_Pos 2
#define | ITM_TCR_SYNCENA_Msk (1UL << ITM_TCR_SYNCENA_Pos)
#define | ITM_TCR_TSENA_Pos 1
#define | ITM_TCR_TSENA_Msk (1UL << ITM_TCR_TSENA_Pos)
#define | ITM_TCR_ITMENA_Pos 0
#define | ITM_TCR_ITMENA_Msk (1UL << ITM_TCR_ITMENA_Pos)
#define | ITM_IWR_ATVALIDM_Pos 0
#define | ITM_IWR_ATVALIDM_Msk (1UL << ITM_IWR_ATVALIDM_Pos)
#define | ITM_IRR_ATREADYM_Pos 0
#define | ITM_IRR_ATREADYM_Msk (1UL << ITM_IRR_ATREADYM_Pos)
#define | ITM_IMCR_INTEGRATION_Pos 0
#define | ITM_IMCR_INTEGRATION_Msk (1UL << ITM_IMCR_INTEGRATION_Pos)
#define | ITM_LSR_ByteAcc_Pos 2
#define | ITM_LSR_ByteAcc_Msk (1UL << ITM_LSR_ByteAcc_Pos)
#define | ITM_LSR_Access_Pos 1
#define | ITM_LSR_Access_Msk (1UL << ITM_LSR_Access_Pos)
#define | ITM_LSR_Present_Pos 0
#define | ITM_LSR_Present_Msk (1UL << ITM_LSR_Present_Pos)

Detailed Description

Type definitions for the Cortex-M Instrumentation Trace Macrocell (ITM)

Define Documentation

#define ITM_IMCR_INTEGRATION_Msk (1UL << ITM_IMCR_INTEGRATION_Pos)

ITM IMCR: INTEGRATION Mask

Definition at line 583 of file core_cm3.h.

#define ITM_IMCR_INTEGRATION_Pos 0

ITM IMCR: INTEGRATION Position

Definition at line 582 of file core_cm3.h.

#define ITM_IRR_ATREADYM_Msk (1UL << ITM_IRR_ATREADYM_Pos)

ITM IRR: ATREADYM Mask

Definition at line 579 of file core_cm3.h.

#define ITM_IRR_ATREADYM_Pos 0

ITM IRR: ATREADYM Position

Definition at line 578 of file core_cm3.h.

#define ITM_IWR_ATVALIDM_Msk (1UL << ITM_IWR_ATVALIDM_Pos)

ITM IWR: ATVALIDM Mask

Definition at line 575 of file core_cm3.h.

#define ITM_IWR_ATVALIDM_Pos 0

ITM IWR: ATVALIDM Position

Definition at line 574 of file core_cm3.h.

#define ITM_LSR_Access_Msk (1UL << ITM_LSR_Access_Pos)

ITM LSR: Access Mask

Definition at line 590 of file core_cm3.h.

#define ITM_LSR_Access_Pos 1

ITM LSR: Access Position

Definition at line 589 of file core_cm3.h.

#define ITM_LSR_ByteAcc_Msk (1UL << ITM_LSR_ByteAcc_Pos)

ITM LSR: ByteAcc Mask

Definition at line 587 of file core_cm3.h.

#define ITM_LSR_ByteAcc_Pos 2

ITM LSR: ByteAcc Position

Definition at line 586 of file core_cm3.h.

#define ITM_LSR_Present_Msk (1UL << ITM_LSR_Present_Pos)

ITM LSR: Present Mask

Definition at line 593 of file core_cm3.h.

#define ITM_LSR_Present_Pos 0

ITM LSR: Present Position

Definition at line 592 of file core_cm3.h.

#define ITM_TCR_ATBID_Msk (0x7FUL << ITM_TCR_ATBID_Pos)

ITM TCR: ATBID Mask

Definition at line 553 of file core_cm3.h.

#define ITM_TCR_ATBID_Pos 16

ITM TCR: ATBID Position

Definition at line 552 of file core_cm3.h.

#define ITM_TCR_BUSY_Msk (1UL << ITM_TCR_BUSY_Pos)

ITM TCR: BUSY Mask

Definition at line 550 of file core_cm3.h.

#define ITM_TCR_BUSY_Pos 23

ITM TCR: BUSY Position

Definition at line 549 of file core_cm3.h.

#define ITM_TCR_DWTENA_Msk (1UL << ITM_TCR_DWTENA_Pos)

ITM TCR: DWTENA Mask

Definition at line 562 of file core_cm3.h.

#define ITM_TCR_DWTENA_Pos 3

ITM TCR: DWTENA Position

Definition at line 561 of file core_cm3.h.

#define ITM_TCR_ITMENA_Msk (1UL << ITM_TCR_ITMENA_Pos)

ITM TCR: ITM Enable bit Mask

Definition at line 571 of file core_cm3.h.

#define ITM_TCR_ITMENA_Pos 0

ITM TCR: ITM Enable bit Position

Definition at line 570 of file core_cm3.h.

#define ITM_TCR_SWOENA_Msk (1UL << ITM_TCR_SWOENA_Pos)

ITM TCR: SWOENA Mask

Definition at line 559 of file core_cm3.h.

#define ITM_TCR_SWOENA_Pos 4

ITM TCR: SWOENA Position

Definition at line 558 of file core_cm3.h.

#define ITM_TCR_SYNCENA_Msk (1UL << ITM_TCR_SYNCENA_Pos)

ITM TCR: SYNCENA Mask

Definition at line 565 of file core_cm3.h.

#define ITM_TCR_SYNCENA_Pos 2

ITM TCR: SYNCENA Position

Definition at line 564 of file core_cm3.h.

#define ITM_TCR_TSENA_Msk (1UL << ITM_TCR_TSENA_Pos)

ITM TCR: TSENA Mask

Definition at line 568 of file core_cm3.h.

#define ITM_TCR_TSENA_Pos 1

ITM TCR: TSENA Position

Definition at line 567 of file core_cm3.h.

#define ITM_TCR_TSPrescale_Msk (3UL << ITM_TCR_TSPrescale_Pos)

ITM TCR: TSPrescale Mask

Definition at line 556 of file core_cm3.h.

#define ITM_TCR_TSPrescale_Pos 8

ITM TCR: TSPrescale Position

Definition at line 555 of file core_cm3.h.

#define ITM_TPR_PRIVMASK_Msk (0xFUL << ITM_TPR_PRIVMASK_Pos)

ITM TPR: PRIVMASK Mask

Definition at line 546 of file core_cm3.h.

#define ITM_TPR_PRIVMASK_Pos 0

ITM TPR: PRIVMASK Position

Definition at line 545 of file core_cm3.h.

Generated on Tue Jun 7 14:59:44 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: CMSIS Interrupt Type

CMSIS Interrupt Type
[CMSIS Core Register]

Data Structures

struct | InterruptType_Type
Structure type to access the Interrupt Type Register. More...

Defines

#define | IntType_ICTR_INTLINESNUM_Pos 0
#define | IntType_ICTR_INTLINESNUM_Msk (0x1FUL << IntType_ICTR_INTLINESNUM_Pos)
#define | IntType_ACTLR_DISFOLD_Pos 2
#define | IntType_ACTLR_DISFOLD_Msk (1UL << IntType_ACTLR_DISFOLD_Pos)
#define | IntType_ACTLR_DISDEFWBUF_Pos 1
#define | IntType_ACTLR_DISDEFWBUF_Msk (1UL << IntType_ACTLR_DISDEFWBUF_Pos)
#define | IntType_ACTLR_DISMCYCINT_Pos 0
#define | IntType_ACTLR_DISMCYCINT_Msk (1UL << IntType_ACTLR_DISMCYCINT_Pos)

Detailed Description

Type definitions for the Cortex-M Interrupt Type Register

Define Documentation

#define IntType_ACTLR_DISDEFWBUF_Msk (1UL << IntType_ACTLR_DISDEFWBUF_Pos)

InterruptType ACTLR: DISDEFWBUF Mask

Definition at line 626 of file core_cm3.h.

#define IntType_ACTLR_DISDEFWBUF_Pos 1

InterruptType ACTLR: DISDEFWBUF Position

Definition at line 625 of file core_cm3.h.

#define IntType_ACTLR_DISFOLD_Msk (1UL << IntType_ACTLR_DISFOLD_Pos)

InterruptType ACTLR: DISFOLD Mask

Definition at line 623 of file core_cm3.h.

#define IntType_ACTLR_DISFOLD_Pos 2

InterruptType ACTLR: DISFOLD Position

Definition at line 622 of file core_cm3.h.

#define IntType_ACTLR_DISMCYCINT_Msk (1UL << IntType_ACTLR_DISMCYCINT_Pos)

InterruptType ACTLR: DISMCYCINT Mask

Definition at line 629 of file core_cm3.h.

#define IntType_ACTLR_DISMCYCINT_Pos 0

InterruptType ACTLR: DISMCYCINT Position

Definition at line 628 of file core_cm3.h.

#define IntType_ICTR_INTLINESNUM_Msk (0x1FUL << IntType_ICTR_INTLINESNUM_Pos)

InterruptType ICTR: INTLINESNUM Mask

Definition at line 619 of file core_cm3.h.

#define IntType_ICTR_INTLINESNUM_Pos 0

InterruptType ICTR: INTLINESNUM Position

Definition at line 618 of file core_cm3.h.

Generated on Tue Jun 7 14:59:44 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: CMSIS Core Debug

CMSIS Core Debug
[CMSIS Core Register]

Data Structures

struct | CoreDebug_Type
Structure type to access the Core Debug Register (CoreDebug). More...

Defines

#define | CoreDebug_DHCSR_DBGKEY_Pos 16
#define | CoreDebug_DHCSR_DBGKEY_Msk (0xFFFFUL << CoreDebug_DHCSR_DBGKEY_Pos)
#define | CoreDebug_DHCSR_S_RESET_ST_Pos 25
#define | CoreDebug_DHCSR_S_RESET_ST_Msk (1UL << CoreDebug_DHCSR_S_RESET_ST_Pos)
#define | CoreDebug_DHCSR_S_RETIRE_ST_Pos 24
#define | CoreDebug_DHCSR_S_RETIRE_ST_Msk (1UL << CoreDebug_DHCSR_S_RETIRE_ST_Pos)
#define | CoreDebug_DHCSR_S_LOCKUP_Pos 19
#define | CoreDebug_DHCSR_S_LOCKUP_Msk (1UL << CoreDebug_DHCSR_S_LOCKUP_Pos)
#define | CoreDebug_DHCSR_S_SLEEP_Pos 18
#define | CoreDebug_DHCSR_S_SLEEP_Msk (1UL << CoreDebug_DHCSR_S_SLEEP_Pos)
#define | CoreDebug_DHCSR_S_HALT_Pos 17
#define | CoreDebug_DHCSR_S_HALT_Msk (1UL << CoreDebug_DHCSR_S_HALT_Pos)
#define | CoreDebug_DHCSR_S_REGRDY_Pos 16
#define | CoreDebug_DHCSR_S_REGRDY_Msk (1UL << CoreDebug_DHCSR_S_REGRDY_Pos)
#define | CoreDebug_DHCSR_C_SNAPSTALL_Pos 5
#define | CoreDebug_DHCSR_C_SNAPSTALL_Msk (1UL << CoreDebug_DHCSR_C_SNAPSTALL_Pos)
#define | CoreDebug_DHCSR_C_MASKINTS_Pos 3
#define | CoreDebug_DHCSR_C_MASKINTS_Msk (1UL << CoreDebug_DHCSR_C_MASKINTS_Pos)
#define | CoreDebug_DHCSR_C_STEP_Pos 2
#define | CoreDebug_DHCSR_C_STEP_Msk (1UL << CoreDebug_DHCSR_C_STEP_Pos)
#define | CoreDebug_DHCSR_C_HALT_Pos 1
#define | CoreDebug_DHCSR_C_HALT_Msk (1UL << CoreDebug_DHCSR_C_HALT_Pos)
#define | CoreDebug_DHCSR_C_DEBUGEN_Pos 0
#define | CoreDebug_DHCSR_C_DEBUGEN_Msk (1UL << CoreDebug_DHCSR_C_DEBUGEN_Pos)
#define | CoreDebug_DCRSR_REGWnR_Pos 16
#define | CoreDebug_DCRSR_REGWnR_Msk (1UL << CoreDebug_DCRSR_REGWnR_Pos)
#define | CoreDebug_DCRSR_REGSEL_Pos 0
#define | CoreDebug_DCRSR_REGSEL_Msk (0x1FUL << CoreDebug_DCRSR_REGSEL_Pos)
#define | CoreDebug_DEMCR_TRCENA_Pos 24
#define | CoreDebug_DEMCR_TRCENA_Msk (1UL << CoreDebug_DEMCR_TRCENA_Pos)
#define | CoreDebug_DEMCR_MON_REQ_Pos 19
#define | CoreDebug_DEMCR_MON_REQ_Msk (1UL << CoreDebug_DEMCR_MON_REQ_Pos)
#define | CoreDebug_DEMCR_MON_STEP_Pos 18
#define | CoreDebug_DEMCR_MON_STEP_Msk (1UL << CoreDebug_DEMCR_MON_STEP_Pos)
#define | CoreDebug_DEMCR_MON_PEND_Pos 17
#define | CoreDebug_DEMCR_MON_PEND_Msk (1UL << CoreDebug_DEMCR_MON_PEND_Pos)
#define | CoreDebug_DEMCR_MON_EN_Pos 16
#define | CoreDebug_DEMCR_MON_EN_Msk (1UL << CoreDebug_DEMCR_MON_EN_Pos)
#define | CoreDebug_DEMCR_VC_HARDERR_Pos 10
#define | CoreDebug_DEMCR_VC_HARDERR_Msk (1UL << CoreDebug_DEMCR_VC_HARDERR_Pos)
#define | CoreDebug_DEMCR_VC_INTERR_Pos 9
#define | CoreDebug_DEMCR_VC_INTERR_Msk (1UL << CoreDebug_DEMCR_VC_INTERR_Pos)
#define | CoreDebug_DEMCR_VC_BUSERR_Pos 8
#define | CoreDebug_DEMCR_VC_BUSERR_Msk (1UL << CoreDebug_DEMCR_VC_BUSERR_Pos)
#define | CoreDebug_DEMCR_VC_STATERR_Pos 7
#define | CoreDebug_DEMCR_VC_STATERR_Msk (1UL << CoreDebug_DEMCR_VC_STATERR_Pos)
#define | CoreDebug_DEMCR_VC_CHKERR_Pos 6
#define | CoreDebug_DEMCR_VC_CHKERR_Msk (1UL << CoreDebug_DEMCR_VC_CHKERR_Pos)
#define | CoreDebug_DEMCR_VC_NOCPERR_Pos 5
#define | CoreDebug_DEMCR_VC_NOCPERR_Msk (1UL << CoreDebug_DEMCR_VC_NOCPERR_Pos)
#define | CoreDebug_DEMCR_VC_MMERR_Pos 4
#define | CoreDebug_DEMCR_VC_MMERR_Msk (1UL << CoreDebug_DEMCR_VC_MMERR_Pos)
#define | CoreDebug_DEMCR_VC_CORERESET_Pos 0
#define | CoreDebug_DEMCR_VC_CORERESET_Msk (1UL << CoreDebug_DEMCR_VC_CORERESET_Pos)

Detailed Description

Type definitions for the Cortex-M Core Debug Registers

Define Documentation

#define CoreDebug_DCRSR_REGSEL_Msk (0x1FUL << CoreDebug_DCRSR_REGSEL_Pos)

CoreDebug DCRSR: REGSEL Mask

Definition at line 782 of file core_cm3.h.

#define CoreDebug_DCRSR_REGSEL_Pos 0

CoreDebug DCRSR: REGSEL Position

Definition at line 781 of file core_cm3.h.

#define CoreDebug_DCRSR_REGWnR_Msk (1UL << CoreDebug_DCRSR_REGWnR_Pos)

CoreDebug DCRSR: REGWnR Mask

Definition at line 779 of file core_cm3.h.

#define CoreDebug_DCRSR_REGWnR_Pos 16

CoreDebug DCRSR: REGWnR Position

Definition at line 778 of file core_cm3.h.

#define CoreDebug_DEMCR_MON_EN_Msk (1UL << CoreDebug_DEMCR_MON_EN_Pos)

CoreDebug DEMCR: MON_EN Mask

Definition at line 798 of file core_cm3.h.

#define CoreDebug_DEMCR_MON_EN_Pos 16

CoreDebug DEMCR: MON_EN Position

Definition at line 797 of file core_cm3.h.

#define CoreDebug_DEMCR_MON_PEND_Msk (1UL << CoreDebug_DEMCR_MON_PEND_Pos)

CoreDebug DEMCR: MON_PEND Mask

Definition at line 795 of file core_cm3.h.

#define CoreDebug_DEMCR_MON_PEND_Pos 17

CoreDebug DEMCR: MON_PEND Position

Definition at line 794 of file core_cm3.h.

#define CoreDebug_DEMCR_MON_REQ_Msk (1UL << CoreDebug_DEMCR_MON_REQ_Pos)

CoreDebug DEMCR: MON_REQ Mask

Definition at line 789 of file core_cm3.h.

#define CoreDebug_DEMCR_MON_REQ_Pos 19

CoreDebug DEMCR: MON_REQ Position

Definition at line 788 of file core_cm3.h.

#define CoreDebug_DEMCR_MON_STEP_Msk (1UL << CoreDebug_DEMCR_MON_STEP_Pos)

CoreDebug DEMCR: MON_STEP Mask

Definition at line 792 of file core_cm3.h.

#define CoreDebug_DEMCR_MON_STEP_Pos 18

CoreDebug DEMCR: MON_STEP Position

Definition at line 791 of file core_cm3.h.

#define CoreDebug_DEMCR_TRCENA_Msk (1UL << CoreDebug_DEMCR_TRCENA_Pos)

CoreDebug DEMCR: TRCENA Mask

Definition at line 786 of file core_cm3.h.

#define CoreDebug_DEMCR_TRCENA_Pos 24

CoreDebug DEMCR: TRCENA Position

Definition at line 785 of file core_cm3.h.

#define CoreDebug_DEMCR_VC_BUSERR_Msk (1UL << CoreDebug_DEMCR_VC_BUSERR_Pos)

CoreDebug DEMCR: VC_BUSERR Mask

Definition at line 807 of file core_cm3.h.

#define CoreDebug_DEMCR_VC_BUSERR_Pos 8

CoreDebug DEMCR: VC_BUSERR Position

Definition at line 806 of file core_cm3.h.

#define CoreDebug_DEMCR_VC_CHKERR_Msk (1UL << CoreDebug_DEMCR_VC_CHKERR_Pos)

CoreDebug DEMCR: VC_CHKERR Mask

Definition at line 813 of file core_cm3.h.

#define CoreDebug_DEMCR_VC_CHKERR_Pos 6

CoreDebug DEMCR: VC_CHKERR Position

Definition at line 812 of file core_cm3.h.

#define CoreDebug_DEMCR_VC_CORERESET_Msk (1UL << CoreDebug_DEMCR_VC_CORERESET_Pos)

CoreDebug DEMCR: VC_CORERESET Mask

Definition at line 822 of file core_cm3.h.

#define CoreDebug_DEMCR_VC_CORERESET_Pos 0

CoreDebug DEMCR: VC_CORERESET Position

Definition at line 821 of file core_cm3.h.

#define CoreDebug_DEMCR_VC_HARDERR_Msk (1UL << CoreDebug_DEMCR_VC_HARDERR_Pos)

CoreDebug DEMCR: VC_HARDERR Mask

Definition at line 801 of file core_cm3.h.

#define CoreDebug_DEMCR_VC_HARDERR_Pos 10

CoreDebug DEMCR: VC_HARDERR Position

Definition at line 800 of file core_cm3.h.

#define CoreDebug_DEMCR_VC_INTERR_Msk (1UL << CoreDebug_DEMCR_VC_INTERR_Pos)

CoreDebug DEMCR: VC_INTERR Mask

Definition at line 804 of file core_cm3.h.

#define CoreDebug_DEMCR_VC_INTERR_Pos 9

CoreDebug DEMCR: VC_INTERR Position

Definition at line 803 of file core_cm3.h.

#define CoreDebug_DEMCR_VC_MMERR_Msk (1UL << CoreDebug_DEMCR_VC_MMERR_Pos)

CoreDebug DEMCR: VC_MMERR Mask

Definition at line 819 of file core_cm3.h.

#define CoreDebug_DEMCR_VC_MMERR_Pos 4

CoreDebug DEMCR: VC_MMERR Position

Definition at line 818 of file core_cm3.h.

#define CoreDebug_DEMCR_VC_NOCPERR_Msk (1UL << CoreDebug_DEMCR_VC_NOCPERR_Pos)

CoreDebug DEMCR: VC_NOCPERR Mask

Definition at line 816 of file core_cm3.h.

#define CoreDebug_DEMCR_VC_NOCPERR_Pos 5

CoreDebug DEMCR: VC_NOCPERR Position

Definition at line 815 of file core_cm3.h.

#define CoreDebug_DEMCR_VC_STATERR_Msk (1UL << CoreDebug_DEMCR_VC_STATERR_Pos)

CoreDebug DEMCR: VC_STATERR Mask

Definition at line 810 of file core_cm3.h.

#define CoreDebug_DEMCR_VC_STATERR_Pos 7

CoreDebug DEMCR: VC_STATERR Position

Definition at line 809 of file core_cm3.h.

#define CoreDebug_DHCSR_C_DEBUGEN_Msk (1UL << CoreDebug_DHCSR_C_DEBUGEN_Pos)

CoreDebug DHCSR: C_DEBUGEN Mask

Definition at line 775 of file core_cm3.h.

#define CoreDebug_DHCSR_C_DEBUGEN_Pos 0

CoreDebug DHCSR: C_DEBUGEN Position

Definition at line 774 of file core_cm3.h.

#define CoreDebug_DHCSR_C_HALT_Msk (1UL << CoreDebug_DHCSR_C_HALT_Pos)

CoreDebug DHCSR: C_HALT Mask

Definition at line 772 of file core_cm3.h.

#define CoreDebug_DHCSR_C_HALT_Pos 1

CoreDebug DHCSR: C_HALT Position

Definition at line 771 of file core_cm3.h.

#define CoreDebug_DHCSR_C_MASKINTS_Msk (1UL << CoreDebug_DHCSR_C_MASKINTS_Pos)

CoreDebug DHCSR: C_MASKINTS Mask

Definition at line 766 of file core_cm3.h.

#define CoreDebug_DHCSR_C_MASKINTS_Pos 3

CoreDebug DHCSR: C_MASKINTS Position

Definition at line 765 of file core_cm3.h.

#define CoreDebug_DHCSR_C_SNAPSTALL_Msk (1UL << CoreDebug_DHCSR_C_SNAPSTALL_Pos)

CoreDebug DHCSR: C_SNAPSTALL Mask

Definition at line 763 of file core_cm3.h.

#define CoreDebug_DHCSR_C_SNAPSTALL_Pos 5

CoreDebug DHCSR: C_SNAPSTALL Position

Definition at line 762 of file core_cm3.h.

#define CoreDebug_DHCSR_C_STEP_Msk (1UL << CoreDebug_DHCSR_C_STEP_Pos)

CoreDebug DHCSR: C_STEP Mask

Definition at line 769 of file core_cm3.h.

#define CoreDebug_DHCSR_C_STEP_Pos 2

CoreDebug DHCSR: C_STEP Position

Definition at line 768 of file core_cm3.h.

#define CoreDebug_DHCSR_DBGKEY_Msk (0xFFFFUL << CoreDebug_DHCSR_DBGKEY_Pos)

CoreDebug DHCSR: DBGKEY Mask

Definition at line 742 of file core_cm3.h.

#define CoreDebug_DHCSR_DBGKEY_Pos 16

CoreDebug DHCSR: DBGKEY Position

Definition at line 741 of file core_cm3.h.

#define CoreDebug_DHCSR_S_HALT_Msk (1UL << CoreDebug_DHCSR_S_HALT_Pos)

CoreDebug DHCSR: S_HALT Mask

Definition at line 757 of file core_cm3.h.

#define CoreDebug_DHCSR_S_HALT_Pos 17

CoreDebug DHCSR: S_HALT Position

Definition at line 756 of file core_cm3.h.

#define CoreDebug_DHCSR_S_LOCKUP_Msk (1UL << CoreDebug_DHCSR_S_LOCKUP_Pos)

CoreDebug DHCSR: S_LOCKUP Mask

Definition at line 751 of file core_cm3.h.

#define CoreDebug_DHCSR_S_LOCKUP_Pos 19

CoreDebug DHCSR: S_LOCKUP Position

Definition at line 750 of file core_cm3.h.

#define CoreDebug_DHCSR_S_REGRDY_Msk (1UL << CoreDebug_DHCSR_S_REGRDY_Pos)

CoreDebug DHCSR: S_REGRDY Mask

Definition at line 760 of file core_cm3.h.

#define CoreDebug_DHCSR_S_REGRDY_Pos 16

CoreDebug DHCSR: S_REGRDY Position

Definition at line 759 of file core_cm3.h.

#define CoreDebug_DHCSR_S_RESET_ST_Msk (1UL << CoreDebug_DHCSR_S_RESET_ST_Pos)

CoreDebug DHCSR: S_RESET_ST Mask

Definition at line 745 of file core_cm3.h.

#define CoreDebug_DHCSR_S_RESET_ST_Pos 25

CoreDebug DHCSR: S_RESET_ST Position

Definition at line 744 of file core_cm3.h.

#define CoreDebug_DHCSR_S_RETIRE_ST_Msk (1UL << CoreDebug_DHCSR_S_RETIRE_ST_Pos)

CoreDebug DHCSR: S_RETIRE_ST Mask

Definition at line 748 of file core_cm3.h.

#define CoreDebug_DHCSR_S_RETIRE_ST_Pos 24

CoreDebug DHCSR: S_RETIRE_ST Position

Definition at line 747 of file core_cm3.h.

#define CoreDebug_DHCSR_S_SLEEP_Msk (1UL << CoreDebug_DHCSR_S_SLEEP_Pos)

CoreDebug DHCSR: S_SLEEP Mask

Definition at line 754 of file core_cm3.h.

#define CoreDebug_DHCSR_S_SLEEP_Pos 18

CoreDebug DHCSR: S_SLEEP Position

Definition at line 753 of file core_cm3.h.

Generated on Tue Jun 7 14:59:44 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: CMSIS Core Function Interface

CMSIS Core Function Interface
[CMSIS]

Modules

CMSIS Core NVIC Functions
CMSIS Core SysTick Functions
CMSIS Core Debug Functions
CMSIS Core Register Access Functions

Detailed Description

Core Function Interface contains:
  • Core NVIC Functions
  • Core SysTick Functions
  • Core Debug Functions
  • Core Register Access Functions
Generated on Tue Jun 7 15:00:02 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: CMSIS Core NVIC Functions

CMSIS Core NVIC Functions
[CMSIS Core Function Interface]

Generated on Tue Jun 7 14:59:44 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: CMSIS Core SysTick Functions

CMSIS Core SysTick Functions
[CMSIS Core Function Interface]

Modules

CMSIS Core Debug Functions
Generated on Tue Jun 7 14:59:44 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: CMSIS Core Debug Functions

CMSIS Core Debug Functions
[CMSIS Core SysTick Functions, CMSIS Core Function Interface]

Defines

#define | ITM_RXBUFFER_EMPTY 0x5AA55AA5

Variables

volatile int32_t | ITM_RxBuffer

Define Documentation

#define ITM_RXBUFFER_EMPTY 0x5AA55AA5

value identifying ITM_RxBuffer is ready for next character

Definition at line 1160 of file core_cm3.h.

Variable Documentation

volatile int32_t ITM_RxBuffer

external variable to receive characters

Generated on Tue Jun 7 14:59:44 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: CMSIS Core Register Access Functions

CMSIS Core Register Access Functions
[CMSIS Core Function Interface]

Generated on Tue Jun 7 14:59:44 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: CMSIS Core Instruction Interface

CMSIS Core Instruction Interface
[CMSIS]

Access to dedicated instructions
Generated on Tue Jun 7 15:00:02 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: LPC17xx System

LPC17xx System

Data Structures

struct | LPC_SC_TypeDef
System Control (SC) register structure definition. More...
struct | LPC_PINCON_TypeDef
Pin Connect Block (PINCON) register structure definition. More...
struct | LPC_GPIO_TypeDef
General Purpose Input/Output (GPIO) register structure definition. More...
struct | LPC_GPIOINT_TypeDef
General Purpose Input/Output interrupt (GPIOINT) register structure definition. More...
struct | LPC_TIM_TypeDef
Timer (TIM) register structure definition. More...
struct | LPC_PWM_TypeDef
Pulse-Width Modulation (PWM) register structure definition. More...
struct | LPC_UART_TypeDef
Universal Asynchronous Receiver Transmitter (UART) register structure definition. More...
struct | LPC_UART0_TypeDef
Universal Asynchronous Receiver Transmitter 0 (UART0) register structure definition. More...
struct | LPC_UART1_TypeDef
Universal Asynchronous Receiver Transmitter 1 (UART1) register structure definition. More...
struct | LPC_SPI_TypeDef
Serial Peripheral Interface (SPI) register structure definition. More...
struct | LPC_SSP_TypeDef
Synchronous Serial Communication (SSP) register structure definition. More...
struct | LPC_I2C_TypeDef
Inter-Integrated Circuit (I2C) register structure definition. More...
struct | LPC_I2S_TypeDef
Inter IC Sound (I2S) register structure definition. More...
struct | LPC_RIT_TypeDef
Repetitive Interrupt Timer (RIT) register structure definition. More...
struct | LPC_RTC_TypeDef
Real-Time Clock (RTC) register structure definition. More...
struct | LPC_WDT_TypeDef
Watchdog Timer (WDT) register structure definition. More...
struct | LPC_ADC_TypeDef
Analog-to-Digital Converter (ADC) register structure definition. More...
struct | LPC_DAC_TypeDef
Digital-to-Analog Converter (DAC) register structure definition. More...
struct | LPC_MCPWM_TypeDef
Motor Control Pulse-Width Modulation (MCPWM) register structure definition. More...
struct | LPC_QEI_TypeDef
Quadrature Encoder Interface (QEI) register structure definition. More...
struct | LPC_CANAF_RAM_TypeDef
Controller Area Network Acceptance Filter RAM (CANAF_RAM)structure definition. More...
struct | LPC_CANAF_TypeDef
Controller Area Network Acceptance Filter(CANAF) register structure definition. More...
struct | LPC_CANCR_TypeDef
Controller Area Network Central (CANCR) register structure definition. More...
struct | LPC_CAN_TypeDef
Controller Area Network Controller (CAN) register structure definition. More...
struct | LPC_GPDMA_TypeDef
General Purpose Direct Memory Access (GPDMA) register structure definition. More...
struct | LPC_GPDMACH_TypeDef
General Purpose Direct Memory Access Channel (GPDMACH) register structure definition. More...
struct | LPC_USB_TypeDef
Universal Serial Bus (USB) register structure definition. More...
struct | LPC_EMAC_TypeDef
Ethernet Media Access Controller (EMAC) register structure definition. More...

Modules

LPC17xx System Defines
LPC17xx System Public Variables
LPC17xx System Public Functions

Defines

#define | __MPU_PRESENT 1
#define | __NVIC_PRIO_BITS 5
#define | __Vendor_SysTickConfig 0
#define | LPC_FLASH_BASE (0x00000000UL)
#define | LPC_RAM_BASE (0x10000000UL)
#define | LPC_AHBRAM0_BASE (0x2007C000UL)
#define | LPC_AHBRAM1_BASE (0x20080000UL)
#define | LPC_GPIO_BASE (0x2009C000UL)
#define | LPC_APB0_BASE (0x40000000UL)
#define | LPC_APB1_BASE (0x40080000UL)
#define | LPC_AHB_BASE (0x50000000UL)
#define | LPC_CM3_BASE (0xE0000000UL)
#define | LPC_WDT_BASE (LPC_APB0_BASE + 0x00000)
#define | LPC_TIM0_BASE (LPC_APB0_BASE + 0x04000)
#define | LPC_TIM1_BASE (LPC_APB0_BASE + 0x08000)
#define | LPC_UART0_BASE (LPC_APB0_BASE + 0x0C000)
#define | LPC_UART1_BASE (LPC_APB0_BASE + 0x10000)
#define | LPC_PWM1_BASE (LPC_APB0_BASE + 0x18000)
#define | LPC_I2C0_BASE (LPC_APB0_BASE + 0x1C000)
#define | LPC_SPI_BASE (LPC_APB0_BASE + 0x20000)
#define | LPC_RTC_BASE (LPC_APB0_BASE + 0x24000)
#define | LPC_GPIOINT_BASE (LPC_APB0_BASE + 0x28080)
#define | LPC_PINCON_BASE (LPC_APB0_BASE + 0x2C000)
#define | LPC_SSP1_BASE (LPC_APB0_BASE + 0x30000)
#define | LPC_ADC_BASE (LPC_APB0_BASE + 0x34000)
#define | LPC_CANAF_RAM_BASE (LPC_APB0_BASE + 0x38000)
#define | LPC_CANAF_BASE (LPC_APB0_BASE + 0x3C000)
#define | LPC_CANCR_BASE (LPC_APB0_BASE + 0x40000)
#define | LPC_CAN1_BASE (LPC_APB0_BASE + 0x44000)
#define | LPC_CAN2_BASE (LPC_APB0_BASE + 0x48000)
#define | LPC_I2C1_BASE (LPC_APB0_BASE + 0x5C000)
#define | LPC_SSP0_BASE (LPC_APB1_BASE + 0x08000)
#define | LPC_DAC_BASE (LPC_APB1_BASE + 0x0C000)
#define | LPC_TIM2_BASE (LPC_APB1_BASE + 0x10000)
#define | LPC_TIM3_BASE (LPC_APB1_BASE + 0x14000)
#define | LPC_UART2_BASE (LPC_APB1_BASE + 0x18000)
#define | LPC_UART3_BASE (LPC_APB1_BASE + 0x1C000)
#define | LPC_I2C2_BASE (LPC_APB1_BASE + 0x20000)
#define | LPC_I2S_BASE (LPC_APB1_BASE + 0x28000)
#define | LPC_RIT_BASE (LPC_APB1_BASE + 0x30000)
#define | LPC_MCPWM_BASE (LPC_APB1_BASE + 0x38000)
#define | LPC_QEI_BASE (LPC_APB1_BASE + 0x3C000)
#define | LPC_SC_BASE (LPC_APB1_BASE + 0x7C000)
#define | LPC_EMAC_BASE (LPC_AHB_BASE + 0x00000)
#define | LPC_GPDMA_BASE (LPC_AHB_BASE + 0x04000)
#define | LPC_GPDMACH0_BASE (LPC_AHB_BASE + 0x04100)
#define | LPC_GPDMACH1_BASE (LPC_AHB_BASE + 0x04120)
#define | LPC_GPDMACH2_BASE (LPC_AHB_BASE + 0x04140)
#define | LPC_GPDMACH3_BASE (LPC_AHB_BASE + 0x04160)
#define | LPC_GPDMACH4_BASE (LPC_AHB_BASE + 0x04180)
#define | LPC_GPDMACH5_BASE (LPC_AHB_BASE + 0x041A0)
#define | LPC_GPDMACH6_BASE (LPC_AHB_BASE + 0x041C0)
#define | LPC_GPDMACH7_BASE (LPC_AHB_BASE + 0x041E0)
#define | LPC_USB_BASE (LPC_AHB_BASE + 0x0C000)
#define | LPC_GPIO0_BASE (LPC_GPIO_BASE + 0x00000)
#define | LPC_GPIO1_BASE (LPC_GPIO_BASE + 0x00020)
#define | LPC_GPIO2_BASE (LPC_GPIO_BASE + 0x00040)
#define | LPC_GPIO3_BASE (LPC_GPIO_BASE + 0x00060)
#define | LPC_GPIO4_BASE (LPC_GPIO_BASE + 0x00080)
#define | LPC_SC ((LPC_SC_TypeDef *) LPC_SC_BASE )
#define | LPC_GPIO0 ((LPC_GPIO_TypeDef *) LPC_GPIO0_BASE )
#define | LPC_GPIO1 ((LPC_GPIO_TypeDef *) LPC_GPIO1_BASE )
#define | LPC_GPIO2 ((LPC_GPIO_TypeDef *) LPC_GPIO2_BASE )
#define | LPC_GPIO3 ((LPC_GPIO_TypeDef *) LPC_GPIO3_BASE )
#define | LPC_GPIO4 ((LPC_GPIO_TypeDef *) LPC_GPIO4_BASE )
#define | LPC_WDT ((LPC_WDT_TypeDef *) LPC_WDT_BASE )
#define | LPC_TIM0 ((LPC_TIM_TypeDef *) LPC_TIM0_BASE )
#define | LPC_TIM1 ((LPC_TIM_TypeDef *) LPC_TIM1_BASE )
#define | LPC_TIM2 ((LPC_TIM_TypeDef *) LPC_TIM2_BASE )
#define | LPC_TIM3 ((LPC_TIM_TypeDef *) LPC_TIM3_BASE )
#define | LPC_RIT ((LPC_RIT_TypeDef *) LPC_RIT_BASE )
#define | LPC_UART0 ((LPC_UART_TypeDef *) LPC_UART0_BASE )
#define | LPC_UART1 ((LPC_UART1_TypeDef *) LPC_UART1_BASE )
#define | LPC_UART2 ((LPC_UART_TypeDef *) LPC_UART2_BASE )
#define | LPC_UART3 ((LPC_UART_TypeDef *) LPC_UART3_BASE )
#define | LPC_PWM1 ((LPC_PWM_TypeDef *) LPC_PWM1_BASE )
#define | LPC_I2C0 ((LPC_I2C_TypeDef *) LPC_I2C0_BASE )
#define | LPC_I2C1 ((LPC_I2C_TypeDef *) LPC_I2C1_BASE )
#define | LPC_I2C2 ((LPC_I2C_TypeDef *) LPC_I2C2_BASE )
#define | LPC_I2S ((LPC_I2S_TypeDef *) LPC_I2S_BASE )
#define | LPC_SPI ((LPC_SPI_TypeDef *) LPC_SPI_BASE )
#define | LPC_RTC ((LPC_RTC_TypeDef *) LPC_RTC_BASE )
#define | LPC_GPIOINT ((LPC_GPIOINT_TypeDef *) LPC_GPIOINT_BASE )
#define | LPC_PINCON ((LPC_PINCON_TypeDef *) LPC_PINCON_BASE )
#define | LPC_SSP0 ((LPC_SSP_TypeDef *) LPC_SSP0_BASE )
#define | LPC_SSP1 ((LPC_SSP_TypeDef *) LPC_SSP1_BASE )
#define | LPC_ADC ((LPC_ADC_TypeDef *) LPC_ADC_BASE )
#define | LPC_DAC ((LPC_DAC_TypeDef *) LPC_DAC_BASE )
#define | LPC_CANAF_RAM ((LPC_CANAF_RAM_TypeDef *) LPC_CANAF_RAM_BASE)
#define | LPC_CANAF ((LPC_CANAF_TypeDef *) LPC_CANAF_BASE )
#define | LPC_CANCR ((LPC_CANCR_TypeDef *) LPC_CANCR_BASE )
#define | LPC_CAN1 ((LPC_CAN_TypeDef *) LPC_CAN1_BASE )
#define | LPC_CAN2 ((LPC_CAN_TypeDef *) LPC_CAN2_BASE )
#define | LPC_MCPWM ((LPC_MCPWM_TypeDef *) LPC_MCPWM_BASE )
#define | LPC_QEI ((LPC_QEI_TypeDef *) LPC_QEI_BASE )
#define | LPC_EMAC ((LPC_EMAC_TypeDef *) LPC_EMAC_BASE )
#define | LPC_GPDMA ((LPC_GPDMA_TypeDef *) LPC_GPDMA_BASE )
#define | DMAREQSEL (*(__IO uint32_t *) ( 0x4000C1C4))
#define | LPC_GPDMACH0 ((LPC_GPDMACH_TypeDef *) LPC_GPDMACH0_BASE )
#define | LPC_GPDMACH1 ((LPC_GPDMACH_TypeDef *) LPC_GPDMACH1_BASE )
#define | LPC_GPDMACH2 ((LPC_GPDMACH_TypeDef *) LPC_GPDMACH2_BASE )
#define | LPC_GPDMACH3 ((LPC_GPDMACH_TypeDef *) LPC_GPDMACH3_BASE )
#define | LPC_GPDMACH4 ((LPC_GPDMACH_TypeDef *) LPC_GPDMACH4_BASE )
#define | LPC_GPDMACH5 ((LPC_GPDMACH_TypeDef *) LPC_GPDMACH5_BASE )
#define | LPC_GPDMACH6 ((LPC_GPDMACH_TypeDef *) LPC_GPDMACH6_BASE )
#define | LPC_GPDMACH7 ((LPC_GPDMACH_TypeDef *) LPC_GPDMACH7_BASE )
#define | LPC_USB ((LPC_USB_TypeDef *) LPC_USB_BASE )

Typedefs

typedef enum IRQn | IRQn_Type
IRQ interrupt source definition.

Enumerations

enum IRQn {
NonMaskableInt_IRQn = -14, MemoryManagement_IRQn = -12, BusFault_IRQn = -11, UsageFault_IRQn = -10,
SVCall_IRQn = -5, DebugMonitor_IRQn = -4, PendSV_IRQn = -2, SysTick_IRQn = -1,
WDT_IRQn = 0, TIMER0_IRQn = 1, TIMER1_IRQn = 2, TIMER2_IRQn = 3,
TIMER3_IRQn = 4, UART0_IRQn = 5, UART1_IRQn = 6, UART2_IRQn = 7,
UART3_IRQn = 8, PWM1_IRQn = 9, I2C0_IRQn = 10, I2C1_IRQn = 11,
I2C2_IRQn = 12, SPI_IRQn = 13, SSP0_IRQn = 14, SSP1_IRQn = 15,
PLL0_IRQn = 16, RTC_IRQn = 17, EINT0_IRQn = 18, EINT1_IRQn = 19,
EINT2_IRQn = 20, EINT3_IRQn = 21, ADC_IRQn = 22, BOD_IRQn = 23,
USB_IRQn = 24, CAN_IRQn = 25, DMA_IRQn = 26, I2S_IRQn = 27,
ENET_IRQn = 28, RIT_IRQn = 29, MCPWM_IRQn = 30, QEI_IRQn = 31,
PLL1_IRQn = 32, USBActivity_IRQn = 33, CANActivity_IRQn = 34
}
IRQ interrupt source definition. More...

Functions

void | SystemInit (void)
Setup the microcontroller system. Initialize the System and update the SystemCoreClock variable.
void | SystemCoreClockUpdate (void)
Updates the SystemCoreClock with current core Clock retrieved from cpu registers.

Variables

uint32_t | SystemCoreClock

Define Documentation

#define __MPU_PRESENT 1

MPU present or not

Definition at line 98 of file LPC17xx.h.

#define __NVIC_PRIO_BITS 5

Number of Bits used for Priority Levels

Definition at line 99 of file LPC17xx.h.

#define __Vendor_SysTickConfig 0

Set to 1 if different SysTick Config is used

Definition at line 100 of file LPC17xx.h.

#define DMAREQSEL (*(__IO uint32_t *) ( 0x4000C1C4))

Definition at line 1064 of file LPC17xx.h.

#define LPC_ADC ((LPC_ADC_TypeDef *) LPC_ADC_BASE )

Definition at line 1053 of file LPC17xx.h.

#define LPC_ADC_BASE (LPC_APB0_BASE + 0x34000)

Definition at line 981 of file LPC17xx.h.

#define LPC_AHB_BASE (0x50000000UL)

Definition at line 965 of file LPC17xx.h.

#define LPC_AHBRAM0_BASE (0x2007C000UL)

Definition at line 959 of file LPC17xx.h.

#define LPC_AHBRAM1_BASE (0x20080000UL)

Definition at line 960 of file LPC17xx.h.

#define LPC_APB0_BASE (0x40000000UL)

Definition at line 963 of file LPC17xx.h.

#define LPC_APB1_BASE (0x40080000UL)

Definition at line 964 of file LPC17xx.h.

#define LPC_CAN1 ((LPC_CAN_TypeDef *) LPC_CAN1_BASE )

Definition at line 1058 of file LPC17xx.h.

#define LPC_CAN1_BASE (LPC_APB0_BASE + 0x44000)

Definition at line 985 of file LPC17xx.h.

#define LPC_CAN2 ((LPC_CAN_TypeDef *) LPC_CAN2_BASE )

Definition at line 1059 of file LPC17xx.h.

#define LPC_CAN2_BASE (LPC_APB0_BASE + 0x48000)

Definition at line 986 of file LPC17xx.h.

#define LPC_CANAF ((LPC_CANAF_TypeDef *) LPC_CANAF_BASE )

Definition at line 1056 of file LPC17xx.h.

#define LPC_CANAF_BASE (LPC_APB0_BASE + 0x3C000)

Definition at line 983 of file LPC17xx.h.

#define LPC_CANAF_RAM ((LPC_CANAF_RAM_TypeDef *) LPC_CANAF_RAM_BASE)

Definition at line 1055 of file LPC17xx.h.

#define LPC_CANAF_RAM_BASE (LPC_APB0_BASE + 0x38000)

Definition at line 982 of file LPC17xx.h.

#define LPC_CANCR ((LPC_CANCR_TypeDef *) LPC_CANCR_BASE )

Definition at line 1057 of file LPC17xx.h.

#define LPC_CANCR_BASE (LPC_APB0_BASE + 0x40000)

Definition at line 984 of file LPC17xx.h.

#define LPC_CM3_BASE (0xE0000000UL)

Definition at line 966 of file LPC17xx.h.

#define LPC_DAC ((LPC_DAC_TypeDef *) LPC_DAC_BASE )

Definition at line 1054 of file LPC17xx.h.

#define LPC_DAC_BASE (LPC_APB1_BASE + 0x0C000)

Definition at line 991 of file LPC17xx.h.

#define LPC_EMAC ((LPC_EMAC_TypeDef *) LPC_EMAC_BASE )

Definition at line 1062 of file LPC17xx.h.

#define LPC_EMAC_BASE (LPC_AHB_BASE + 0x00000)

Definition at line 1004 of file LPC17xx.h.

#define LPC_FLASH_BASE (0x00000000UL)

Definition at line 953 of file LPC17xx.h.

#define LPC_GPDMA ((LPC_GPDMA_TypeDef *) LPC_GPDMA_BASE )

Definition at line 1063 of file LPC17xx.h.

#define LPC_GPDMA_BASE (LPC_AHB_BASE + 0x04000)

Definition at line 1005 of file LPC17xx.h.

#define LPC_GPDMACH0 ((LPC_GPDMACH_TypeDef *) LPC_GPDMACH0_BASE )

Definition at line 1065 of file LPC17xx.h.

#define LPC_GPDMACH0_BASE (LPC_AHB_BASE + 0x04100)

Definition at line 1006 of file LPC17xx.h.

#define LPC_GPDMACH1 ((LPC_GPDMACH_TypeDef *) LPC_GPDMACH1_BASE )

Definition at line 1066 of file LPC17xx.h.

#define LPC_GPDMACH1_BASE (LPC_AHB_BASE + 0x04120)

Definition at line 1007 of file LPC17xx.h.

#define LPC_GPDMACH2 ((LPC_GPDMACH_TypeDef *) LPC_GPDMACH2_BASE )

Definition at line 1067 of file LPC17xx.h.

#define LPC_GPDMACH2_BASE (LPC_AHB_BASE + 0x04140)

Definition at line 1008 of file LPC17xx.h.

#define LPC_GPDMACH3 ((LPC_GPDMACH_TypeDef *) LPC_GPDMACH3_BASE )

Definition at line 1068 of file LPC17xx.h.

#define LPC_GPDMACH3_BASE (LPC_AHB_BASE + 0x04160)

Definition at line 1009 of file LPC17xx.h.

#define LPC_GPDMACH4 ((LPC_GPDMACH_TypeDef *) LPC_GPDMACH4_BASE )

Definition at line 1069 of file LPC17xx.h.

#define LPC_GPDMACH4_BASE (LPC_AHB_BASE + 0x04180)

Definition at line 1010 of file LPC17xx.h.

#define LPC_GPDMACH5 ((LPC_GPDMACH_TypeDef *) LPC_GPDMACH5_BASE )

Definition at line 1070 of file LPC17xx.h.

#define LPC_GPDMACH5_BASE (LPC_AHB_BASE + 0x041A0)

Definition at line 1011 of file LPC17xx.h.

#define LPC_GPDMACH6 ((LPC_GPDMACH_TypeDef *) LPC_GPDMACH6_BASE )

Definition at line 1071 of file LPC17xx.h.

#define LPC_GPDMACH6_BASE (LPC_AHB_BASE + 0x041C0)

Definition at line 1012 of file LPC17xx.h.

#define LPC_GPDMACH7 ((LPC_GPDMACH_TypeDef *) LPC_GPDMACH7_BASE )

Definition at line 1072 of file LPC17xx.h.

#define LPC_GPDMACH7_BASE (LPC_AHB_BASE + 0x041E0)

Definition at line 1013 of file LPC17xx.h.

#define LPC_GPIO0 ((LPC_GPIO_TypeDef *) LPC_GPIO0_BASE )

Definition at line 1027 of file LPC17xx.h.

#define LPC_GPIO0_BASE (LPC_GPIO_BASE + 0x00000)

Definition at line 1017 of file LPC17xx.h.

#define LPC_GPIO1 ((LPC_GPIO_TypeDef *) LPC_GPIO1_BASE )

Definition at line 1028 of file LPC17xx.h.

#define LPC_GPIO1_BASE (LPC_GPIO_BASE + 0x00020)

Definition at line 1018 of file LPC17xx.h.

#define LPC_GPIO2 ((LPC_GPIO_TypeDef *) LPC_GPIO2_BASE )

Definition at line 1029 of file LPC17xx.h.

#define LPC_GPIO2_BASE (LPC_GPIO_BASE + 0x00040)

Definition at line 1019 of file LPC17xx.h.

#define LPC_GPIO3 ((LPC_GPIO_TypeDef *) LPC_GPIO3_BASE )

Definition at line 1030 of file LPC17xx.h.

#define LPC_GPIO3_BASE (LPC_GPIO_BASE + 0x00060)

Definition at line 1020 of file LPC17xx.h.

#define LPC_GPIO4 ((LPC_GPIO_TypeDef *) LPC_GPIO4_BASE )

Definition at line 1031 of file LPC17xx.h.

#define LPC_GPIO4_BASE (LPC_GPIO_BASE + 0x00080)

Definition at line 1021 of file LPC17xx.h.

#define LPC_GPIO_BASE (0x2009C000UL)

Definition at line 962 of file LPC17xx.h.

#define LPC_GPIOINT ((LPC_GPIOINT_TypeDef *) LPC_GPIOINT_BASE )

Definition at line 1049 of file LPC17xx.h.

#define LPC_GPIOINT_BASE (LPC_APB0_BASE + 0x28080)

Definition at line 978 of file LPC17xx.h.

#define LPC_I2C0 ((LPC_I2C_TypeDef *) LPC_I2C0_BASE )

Definition at line 1043 of file LPC17xx.h.

#define LPC_I2C0_BASE (LPC_APB0_BASE + 0x1C000)

Definition at line 975 of file LPC17xx.h.

#define LPC_I2C1 ((LPC_I2C_TypeDef *) LPC_I2C1_BASE )

Definition at line 1044 of file LPC17xx.h.

#define LPC_I2C1_BASE (LPC_APB0_BASE + 0x5C000)

Definition at line 987 of file LPC17xx.h.

#define LPC_I2C2 ((LPC_I2C_TypeDef *) LPC_I2C2_BASE )

Definition at line 1045 of file LPC17xx.h.

#define LPC_I2C2_BASE (LPC_APB1_BASE + 0x20000)

Definition at line 996 of file LPC17xx.h.

#define LPC_I2S ((LPC_I2S_TypeDef *) LPC_I2S_BASE )

Definition at line 1046 of file LPC17xx.h.

#define LPC_I2S_BASE (LPC_APB1_BASE + 0x28000)

Definition at line 997 of file LPC17xx.h.

#define LPC_MCPWM ((LPC_MCPWM_TypeDef *) LPC_MCPWM_BASE )

Definition at line 1060 of file LPC17xx.h.

#define LPC_MCPWM_BASE (LPC_APB1_BASE + 0x38000)

Definition at line 999 of file LPC17xx.h.

#define LPC_PINCON ((LPC_PINCON_TypeDef *) LPC_PINCON_BASE )

Definition at line 1050 of file LPC17xx.h.

#define LPC_PINCON_BASE (LPC_APB0_BASE + 0x2C000)

Definition at line 979 of file LPC17xx.h.

#define LPC_PWM1 ((LPC_PWM_TypeDef *) LPC_PWM1_BASE )

Definition at line 1042 of file LPC17xx.h.

#define LPC_PWM1_BASE (LPC_APB0_BASE + 0x18000)

Definition at line 974 of file LPC17xx.h.

#define LPC_QEI ((LPC_QEI_TypeDef *) LPC_QEI_BASE )

Definition at line 1061 of file LPC17xx.h.

#define LPC_QEI_BASE (LPC_APB1_BASE + 0x3C000)

Definition at line 1000 of file LPC17xx.h.

#define LPC_RAM_BASE (0x10000000UL)

Definition at line 954 of file LPC17xx.h.

#define LPC_RIT ((LPC_RIT_TypeDef *) LPC_RIT_BASE )

Definition at line 1037 of file LPC17xx.h.

#define LPC_RIT_BASE (LPC_APB1_BASE + 0x30000)

Definition at line 998 of file LPC17xx.h.

#define LPC_RTC ((LPC_RTC_TypeDef *) LPC_RTC_BASE )

Definition at line 1048 of file LPC17xx.h.

#define LPC_RTC_BASE (LPC_APB0_BASE + 0x24000)

Definition at line 977 of file LPC17xx.h.

#define LPC_SC ((LPC_SC_TypeDef *) LPC_SC_BASE )

Definition at line 1026 of file LPC17xx.h.

#define LPC_SC_BASE (LPC_APB1_BASE + 0x7C000)

Definition at line 1001 of file LPC17xx.h.

#define LPC_SPI ((LPC_SPI_TypeDef *) LPC_SPI_BASE )

Definition at line 1047 of file LPC17xx.h.

#define LPC_SPI_BASE (LPC_APB0_BASE + 0x20000)

Definition at line 976 of file LPC17xx.h.

#define LPC_SSP0 ((LPC_SSP_TypeDef *) LPC_SSP0_BASE )

Definition at line 1051 of file LPC17xx.h.

#define LPC_SSP0_BASE (LPC_APB1_BASE + 0x08000)

Definition at line 990 of file LPC17xx.h.

#define LPC_SSP1 ((LPC_SSP_TypeDef *) LPC_SSP1_BASE )

Definition at line 1052 of file LPC17xx.h.

#define LPC_SSP1_BASE (LPC_APB0_BASE + 0x30000)

Definition at line 980 of file LPC17xx.h.

#define LPC_TIM0 ((LPC_TIM_TypeDef *) LPC_TIM0_BASE )

Definition at line 1033 of file LPC17xx.h.

#define LPC_TIM0_BASE (LPC_APB0_BASE + 0x04000)

Definition at line 970 of file LPC17xx.h.

#define LPC_TIM1 ((LPC_TIM_TypeDef *) LPC_TIM1_BASE )

Definition at line 1034 of file LPC17xx.h.

#define LPC_TIM1_BASE (LPC_APB0_BASE + 0x08000)

Definition at line 971 of file LPC17xx.h.

#define LPC_TIM2 ((LPC_TIM_TypeDef *) LPC_TIM2_BASE )

Definition at line 1035 of file LPC17xx.h.

#define LPC_TIM2_BASE (LPC_APB1_BASE + 0x10000)

Definition at line 992 of file LPC17xx.h.

#define LPC_TIM3 ((LPC_TIM_TypeDef *) LPC_TIM3_BASE )

Definition at line 1036 of file LPC17xx.h.

#define LPC_TIM3_BASE (LPC_APB1_BASE + 0x14000)

Definition at line 993 of file LPC17xx.h.

#define LPC_UART0 ((LPC_UART_TypeDef *) LPC_UART0_BASE )

Definition at line 1038 of file LPC17xx.h.

#define LPC_UART0_BASE (LPC_APB0_BASE + 0x0C000)

Definition at line 972 of file LPC17xx.h.

#define LPC_UART1 ((LPC_UART1_TypeDef *) LPC_UART1_BASE )

Definition at line 1039 of file LPC17xx.h.

#define LPC_UART1_BASE (LPC_APB0_BASE + 0x10000)

Definition at line 973 of file LPC17xx.h.

#define LPC_UART2 ((LPC_UART_TypeDef *) LPC_UART2_BASE )

Definition at line 1040 of file LPC17xx.h.

#define LPC_UART2_BASE (LPC_APB1_BASE + 0x18000)

Definition at line 994 of file LPC17xx.h.

#define LPC_UART3 ((LPC_UART_TypeDef *) LPC_UART3_BASE )

Definition at line 1041 of file LPC17xx.h.

#define LPC_UART3_BASE (LPC_APB1_BASE + 0x1C000)

Definition at line 995 of file LPC17xx.h.

#define LPC_USB ((LPC_USB_TypeDef *) LPC_USB_BASE )

Definition at line 1073 of file LPC17xx.h.

#define LPC_USB_BASE (LPC_AHB_BASE + 0x0C000)

Definition at line 1014 of file LPC17xx.h.

#define LPC_WDT ((LPC_WDT_TypeDef *) LPC_WDT_BASE )

Definition at line 1032 of file LPC17xx.h.

#define LPC_WDT_BASE (LPC_APB0_BASE + 0x00000)

Definition at line 969 of file LPC17xx.h.

Typedef Documentation

typedef enum IRQn IRQn_Type

IRQ interrupt source definition.

Enumeration Type Documentation

enum IRQn

IRQ interrupt source definition.

Enumerator:
NonMaskableInt_IRQn | 2 Non Maskable Interrupt
MemoryManagement_IRQn | 4 Cortex-M3 Memory Management Interrupt
BusFault_IRQn | 5 Cortex-M3 Bus Fault Interrupt
UsageFault_IRQn | 6 Cortex-M3 Usage Fault Interrupt
SVCall_IRQn | 11 Cortex-M3 SV Call Interrupt
DebugMonitor_IRQn | 12 Cortex-M3 Debug Monitor Interrupt
PendSV_IRQn | 14 Cortex-M3 Pend SV Interrupt
SysTick_IRQn | 15 Cortex-M3 System Tick Interrupt
WDT_IRQn | Watchdog Timer Interrupt
TIMER0_IRQn | Timer0 Interrupt
TIMER1_IRQn | Timer1 Interrupt
TIMER2_IRQn | Timer2 Interrupt
TIMER3_IRQn | Timer3 Interrupt
UART0_IRQn | UART0 Interrupt
UART1_IRQn | UART1 Interrupt
UART2_IRQn | UART2 Interrupt
UART3_IRQn | UART3 Interrupt
PWM1_IRQn | PWM1 Interrupt
I2C0_IRQn | I2C0 Interrupt
I2C1_IRQn | I2C1 Interrupt
I2C2_IRQn | I2C2 Interrupt
SPI_IRQn | SPI Interrupt
SSP0_IRQn | SSP0 Interrupt
SSP1_IRQn | SSP1 Interrupt
PLL0_IRQn | PLL0 Lock (Main PLL) Interrupt
RTC_IRQn | Real Time Clock Interrupt
EINT0_IRQn | External Interrupt 0 Interrupt
EINT1_IRQn | External Interrupt 1 Interrupt
EINT2_IRQn | External Interrupt 2 Interrupt
EINT3_IRQn | External Interrupt 3 Interrupt
ADC_IRQn | A/D Converter Interrupt
BOD_IRQn | Brown-Out Detect Interrupt
USB_IRQn | USB Interrupt
CAN_IRQn | CAN Interrupt
DMA_IRQn | General Purpose DMA Interrupt
I2S_IRQn | I2S Interrupt
ENET_IRQn | Ethernet Interrupt
RIT_IRQn | Repetitive Interrupt Timer Interrupt
MCPWM_IRQn | Motor Control PWM Interrupt
QEI_IRQn | Quadrature Encoder Interface Interrupt
PLL1_IRQn | PLL1 Lock (USB PLL) Interrupt
USBActivity_IRQn | USB Activity Interrupt
CANActivity_IRQn | CAN Activity Interrupt

Definition at line 40 of file LPC17xx.h.

Function Documentation

void SystemCoreClockUpdate ( void )

Updates the SystemCoreClock with current core Clock retrieved from cpu registers.

Update SystemCoreClock variable

Parameters:
none
Returns:
none

Definition at line 448 of file system_LPC17xx.c.

void SystemInit ( void )

Setup the microcontroller system. Initialize the System and update the SystemCoreClock variable.

Initialize the system

Parameters:
none
Returns:
none
Setup the microcontroller system. Initialize the System and update the SystemCoreClock variable.

Initialize the system

Parameters:
none
Returns:
none

Definition at line 499 of file system_LPC17xx.c.

Variable Documentation

uint32_t SystemCoreClock

System Clock Frequency (Core Clock)

Definition at line 432 of file system_LPC17xx.c.

Generated on Tue Jun 7 14:59:45 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: LPC17xx System Defines

LPC17xx System Defines
[LPC17xx System]

Defines

#define | CLOCK_SETUP 1
#define | SCS_Val 0x00000020
#define | CLKSRCSEL_Val 0x00000001
#define | PLL0_SETUP 1
#define | PLL0CFG_Val 0x00050063
#define | PLL1_SETUP 1
#define | PLL1CFG_Val 0x00000023
#define | CCLKCFG_Val 0x00000003
#define | USBCLKCFG_Val 0x00000000
#define | PCLKSEL0_Val 0x00000000
#define | PCLKSEL1_Val 0x00000000
#define | PCONP_Val 0x042887DE
#define | CLKOUTCFG_Val 0x00000000
#define | FLASH_SETUP 1
#define | FLASHCFG_Val 0x0000303A
#define | CHECK_RANGE(val, min, max) ((val < min) || (val > max))
#define | CHECK_RSVD(val, mask) (val & mask)
#define | XTAL (12000000UL)
#define | OSC_CLK ( XTAL)
#define | RTC_CLK ( 32768UL)
#define | IRC_OSC ( 4000000UL)
#define | __M (((PLL0CFG_Val ) & 0x7FFF) + 1)
#define | __N (((PLL0CFG_Val >> 16) & 0x00FF) + 1)
#define | __FCCO(__F_IN) ((2 * __M * __F_IN) / __N)
#define | __CCLK_DIV (((CCLKCFG_Val ) & 0x00FF) + 1)
#define | __CORE_CLK (__FCCO(OSC_CLK) / __CCLK_DIV)

Define Documentation

#define __CCLK_DIV (((CCLKCFG_Val ) & 0x00FF) + 1)

Definition at line 400 of file system_LPC17xx.c.

#define __CORE_CLK (__FCCO(OSC_CLK) / __CCLK_DIV)

Definition at line 405 of file system_LPC17xx.c.

#define __FCCO ( __F_IN ) ((2 * __M * __F_IN) / __N)

Definition at line 399 of file system_LPC17xx.c.

#define __M (((PLL0CFG_Val ) & 0x7FFF) + 1)

Definition at line 397 of file system_LPC17xx.c.

#define __N (((PLL0CFG_Val >> 16) & 0x00FF) + 1)

Definition at line 398 of file system_LPC17xx.c.

#define CCLKCFG_Val 0x00000003

Definition at line 302 of file system_LPC17xx.c.

#define CHECK_RANGE | ( | val,
 |  | min,
 |  | max | ) | ((val < min) || (val > max))

Definition at line 333 of file system_LPC17xx.c.

#define CHECK_RSVD | ( | val,
 |  | mask | ) | (val & mask)

Definition at line 334 of file system_LPC17xx.c.

#define CLKOUTCFG_Val 0x00000000

Definition at line 307 of file system_LPC17xx.c.

#define CLKSRCSEL_Val 0x00000001

Definition at line 297 of file system_LPC17xx.c.

#define CLOCK_SETUP 1

Definition at line 295 of file system_LPC17xx.c.

#define FLASH_SETUP 1

Definition at line 323 of file system_LPC17xx.c.

#define FLASHCFG_Val 0x0000303A

Definition at line 324 of file system_LPC17xx.c.

#define IRC_OSC ( 4000000UL)

Definition at line 393 of file system_LPC17xx.c.

#define OSC_CLK ( XTAL)

Definition at line 391 of file system_LPC17xx.c.

#define PCLKSEL0_Val 0x00000000

Definition at line 304 of file system_LPC17xx.c.

#define PCLKSEL1_Val 0x00000000

Definition at line 305 of file system_LPC17xx.c.

#define PCONP_Val 0x042887DE

Definition at line 306 of file system_LPC17xx.c.

#define PLL0_SETUP 1

Definition at line 298 of file system_LPC17xx.c.

#define PLL0CFG_Val 0x00050063

Definition at line 299 of file system_LPC17xx.c.

#define PLL1_SETUP 1

Definition at line 300 of file system_LPC17xx.c.

#define PLL1CFG_Val 0x00000023

Definition at line 301 of file system_LPC17xx.c.

#define RTC_CLK ( 32768UL)

Definition at line 392 of file system_LPC17xx.c.

#define SCS_Val 0x00000020

Definition at line 296 of file system_LPC17xx.c.

#define USBCLKCFG_Val 0x00000000

Definition at line 303 of file system_LPC17xx.c.

#define XTAL (12000000UL)

Definition at line 390 of file system_LPC17xx.c.

Generated on Tue Jun 7 14:59:45 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: LPC17xx System Public Variables

LPC17xx System Public Variables
[LPC17xx System]

Variables

uint32_t SystemCoreClock = __CORE_CLK

Variable Documentation

uint32_t SystemCoreClock = __CORE_CLK

System Clock Frequency (Core Clock)

Definition at line 432 of file system_LPC17xx.c.

Generated on Tue Jun 7 14:59:46 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: LPC17xx System Public Functions

LPC17xx System Public Functions
[LPC17xx System]

Functions

void | SystemCoreClockUpdate (void)
Updates the SystemCoreClock with current core Clock retrieved from cpu registers.
void | SystemInit (void)
Setup the microcontroller system. Initialize the System.

Function Documentation

void SystemCoreClockUpdate ( void )

Updates the SystemCoreClock with current core Clock retrieved from cpu registers.

Update SystemCoreClock variable

Parameters:
none
Returns:
none

Definition at line 448 of file system_LPC17xx.c.

void SystemInit ( void )

Setup the microcontroller system. Initialize the System.

Setup the microcontroller system. Initialize the System and update the SystemCoreClock variable.

Initialize the system

Parameters:
none
Returns:
none

Definition at line 499 of file system_LPC17xx.c.

Generated on Tue Jun 7 14:59:46 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: LPC1700CMSIS Firmware Library

LPC1700CMSIS Firmware Library

Modules

ADC
CAN
CLKPWR
DAC
EMAC
EXTI
GPDMA
GPIO
I2C
I2S
LIBCFG_DEFAULT
MCPWM
NVIC
PINSEL
PWM
QEI
RIT
RTC
SPI
SSP
SYSTICK
TIM
UART
WDT
LPC_Types
Generated on Tue Jun 7 14:59:46 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: ADC

ADC
[LPC1700CMSIS Firmware Library]

Modules

ADC Private Macros
ADC Public Types
ADC Public Functions
Generated on Tue Jun 7 14:59:31 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: ADC Private Macros

ADC Private Macros
[ADC]

Defines

#define | ADC_CR_CH_SEL(n) ((1UL << n))
#define | ADC_CR_CLKDIV(n) ((n<<8))
#define | ADC_CR_BURST ((1UL<<16))
#define | ADC_CR_PDN ((1UL<<21))
#define | ADC_CR_START_MASK ((7UL<<24))
#define | ADC_CR_START_MODE_SEL(SEL) ((SEL<<24))
#define | ADC_CR_START_NOW ((1UL<<24))
#define | ADC_CR_START_EINT0 ((2UL<<24))
#define | ADC_CR_START_CAP01 ((3UL<<24))
#define | ADC_CR_START_MAT01 ((4UL<<24))
#define | ADC_CR_START_MAT03 ((5UL<<24))
#define | ADC_CR_START_MAT10 ((6UL<<24))
#define | ADC_CR_START_MAT11 ((7UL<<24))
#define | ADC_CR_EDGE ((1UL<<27))
#define | ADC_GDR_RESULT(n) (((n>>4)&0xFFF))
#define | ADC_GDR_CH(n) (((n>>24)&0x7))
#define | ADC_GDR_OVERRUN_FLAG ((1UL<<30))
#define | ADC_GDR_DONE_FLAG ((1UL<<31))
#define | ADC_GDR_CH_MASK ((7UL<<24))
#define | ADC_INTEN_CH(n) ((1UL<<n))
#define | ADC_INTEN_GLOBAL ((1UL<<8))
#define | ADC_DR_RESULT(n) (((n>>4)&0xFFF))
#define | ADC_DR_OVERRUN_FLAG ((1UL<<30))
#define | ADC_DR_DONE_FLAG ((1UL<<31))
#define | ADC_STAT_CH_DONE_FLAG(n) ((n&0xFF))
#define | ADC_STAT_CH_OVERRUN_FLAG(n) (((n>>8)&0xFF))
#define | ADC_STAT_INT_FLAG ((1UL<<16))
#define | ADC_ADCOFFS(n) (((n&0xF)<<4))
#define | ADC_TRIM(n) (((n&0xF)<<8))
#define | PARAM_ADCx(n) (((uint32_t *)n)==((uint32_t *)LPC_ADC))
#define | PARAM_ADC_START_ON_EDGE_OPT(OPT) ((OPT == ADC_START_ON_RISING)||(OPT == ADC_START_ON_FALLING))
#define | PARAM_ADC_DATA_STATUS(OPT) ((OPT== ADC_DATA_BURST)||(OPT== ADC_DATA_DONE))
#define | PARAM_ADC_RATE(rate) ((rate>0)&&(rate<=200000))
#define | PARAM_ADC_CHANNEL_SELECTION(SEL)
#define | PARAM_ADC_START_OPT(OPT)
#define | PARAM_ADC_TYPE_INT_OPT(OPT)

Define Documentation

#define ADC_ADCOFFS ( n ) (((n&0xF)<<4))

Macro defines for ADC Trim register Offset trim bits for ADC operation

Definition at line 139 of file lpc17xx_adc.h.

#define ADC_CR_BURST ((1UL<<16))

Repeated conversions A/D enable bit

Definition at line 63 of file lpc17xx_adc.h.

#define ADC_CR_CH_SEL ( n ) ((1UL << n))

Macro defines for ADC control register Selects which of the AD0.0:7 pins is (are) to be sampled and converted

Definition at line 58 of file lpc17xx_adc.h.

#define ADC_CR_CLKDIV ( n ) ((n<<8))

The APB clock (PCLK) is divided by (this value plus one) to produce the clock for the A/D

Definition at line 61 of file lpc17xx_adc.h.

#define ADC_CR_EDGE ((1UL<<27))

Start conversion on a falling edge on the selected CAP/MAT signal

Definition at line 85 of file lpc17xx_adc.h.

#define ADC_CR_PDN ((1UL<<21))

ADC convert in power down mode

Definition at line 65 of file lpc17xx_adc.h.

#define ADC_CR_START_CAP01 ((3UL<<24))

Start conversion when the edge selected by bit 27 occurs on P1.27/CAP0.1

Definition at line 75 of file lpc17xx_adc.h.

#define ADC_CR_START_EINT0 ((2UL<<24))

Start conversion when the edge selected by bit 27 occurs on P2.10/EINT0

Definition at line 73 of file lpc17xx_adc.h.

#define ADC_CR_START_MASK ((7UL<<24))

Start mask bits

Definition at line 67 of file lpc17xx_adc.h.

#define ADC_CR_START_MAT01 ((4UL<<24))

Start conversion when the edge selected by bit 27 occurs on MAT0.1

Definition at line 77 of file lpc17xx_adc.h.

#define ADC_CR_START_MAT03 ((5UL<<24))

Start conversion when the edge selected by bit 27 occurs on MAT0.3

Definition at line 79 of file lpc17xx_adc.h.

#define ADC_CR_START_MAT10 ((6UL<<24))

Start conversion when the edge selected by bit 27 occurs on MAT1.0

Definition at line 81 of file lpc17xx_adc.h.

#define ADC_CR_START_MAT11 ((7UL<<24))

Start conversion when the edge selected by bit 27 occurs on MAT1.1

Definition at line 83 of file lpc17xx_adc.h.

#define ADC_CR_START_MODE_SEL ( SEL ) ((SEL<<24))

Select Start Mode

Definition at line 69 of file lpc17xx_adc.h.

#define ADC_CR_START_NOW ((1UL<<24))

Start conversion now

Definition at line 71 of file lpc17xx_adc.h.

#define ADC_DR_DONE_FLAG ((1UL<<31))

This bit is set to 1 when an A/D conversion completes. It is cleared when this register is read

Definition at line 121 of file lpc17xx_adc.h.

#define ADC_DR_OVERRUN_FLAG ((1UL<<30))

These bits mirror the OVERRRUN status flags that appear in the result register for each A/D channel

Definition at line 118 of file lpc17xx_adc.h.

#define ADC_DR_RESULT ( n ) (((n>>4)&0xFFF))

Macro defines for ADC Data register When DONE is 1, this field contains result value of ADC conversion

Definition at line 115 of file lpc17xx_adc.h.

#define ADC_GDR_CH ( n ) (((n>>24)&0x7))

These bits contain the channel from which the LS bits were converted

Definition at line 93 of file lpc17xx_adc.h.

#define ADC_GDR_CH_MASK ((7UL<<24))

This bits is used to mask for Channel

Definition at line 101 of file lpc17xx_adc.h.

#define ADC_GDR_DONE_FLAG ((1UL<<31))

This bit is set to 1 when an A/D conversion completes

Definition at line 98 of file lpc17xx_adc.h.

#define ADC_GDR_OVERRUN_FLAG ((1UL<<30))

This bit is 1 in burst mode if the results of one or more conversions was (were) lost

Definition at line 96 of file lpc17xx_adc.h.

#define ADC_GDR_RESULT ( n ) (((n>>4)&0xFFF))

Macro defines for ADC Global Data register When DONE is 1, this field contains result value of ADC conversion

Definition at line 91 of file lpc17xx_adc.h.

#define ADC_INTEN_CH ( n ) ((1UL<<n))

Macro defines for ADC Interrupt register These bits allow control over which A/D channels generate interrupts for conversion completion

Definition at line 107 of file lpc17xx_adc.h.

#define ADC_INTEN_GLOBAL ((1UL<<8))

When 1, enables the global DONE flag in ADDR to generate an interrupt

Definition at line 109 of file lpc17xx_adc.h.

#define ADC_STAT_CH_DONE_FLAG ( n ) ((n&0xFF))

Macro defines for ADC Status register These bits mirror the DONE status flags that appear in the result register for each A/D channel

Definition at line 128 of file lpc17xx_adc.h.

#define ADC_STAT_CH_OVERRUN_FLAG ( n ) (((n>>8)&0xFF))

These bits mirror the OVERRRUN status flags that appear in the result register for each A/D channel

Definition at line 131 of file lpc17xx_adc.h.

#define ADC_STAT_INT_FLAG ((1UL<<16))

This bit is the A/D interrupt flag

Definition at line 133 of file lpc17xx_adc.h.

#define ADC_TRIM ( n ) (((n&0xF)<<8))

Written to boot code

Definition at line 141 of file lpc17xx_adc.h.

#define PARAM_ADC_CHANNEL_SELECTION ( SEL )

Value:

((SEL == ADC_CHANNEL_0)||(ADC_CHANNEL_1)\
||(SEL == ADC_CHANNEL_2)|(ADC_CHANNEL_3)\
||(SEL == ADC_CHANNEL_4)||(ADC_CHANNEL_5)\
||(SEL == ADC_CHANNEL_6)||(ADC_CHANNEL_7))
Check ADC channel selection parameter

Definition at line 157 of file lpc17xx_adc.h.

#define PARAM_ADC_DATA_STATUS ( OPT ) ((OPT== ADC_DATA_BURST)||(OPT== ADC_DATA_DONE))

Check ADC state parameter

Definition at line 151 of file lpc17xx_adc.h.

#define PARAM_ADC_RATE ( rate ) ((rate>0)&&(rate<=200000))

Check ADC rate parameter

Definition at line 154 of file lpc17xx_adc.h.

#define PARAM_ADC_START_ON_EDGE_OPT ( OPT ) ((OPT == ADC_START_ON_RISING)||(OPT == ADC_START_ON_FALLING))

Check ADC state parameter

Definition at line 148 of file lpc17xx_adc.h.

#define PARAM_ADC_START_OPT ( OPT )

Value:

((OPT == ADC_START_CONTINUOUS)||(OPT == ADC_START_NOW)\
||(OPT == ADC_START_ON_EINT0)||(OPT == ADC_START_ON_CAP01)\
||(OPT == ADC_START_ON_MAT01)||(OPT == ADC_START_ON_MAT03)\
||(OPT == ADC_START_ON_MAT10)||(OPT == ADC_START_ON_MAT11))
Check ADC start option parameter

Definition at line 163 of file lpc17xx_adc.h.

#define PARAM_ADC_TYPE_INT_OPT ( OPT )

Value:

((OPT == ADC_ADINTEN0)||(OPT == ADC_ADINTEN1)\
||(OPT == ADC_ADINTEN2)||(OPT == ADC_ADINTEN3)\
||(OPT == ADC_ADINTEN4)||(OPT == ADC_ADINTEN5)\
||(OPT == ADC_ADINTEN6)||(OPT == ADC_ADINTEN7)\
||(OPT == ADC_ADGINTEN))
Check ADC interrupt type parameter

Definition at line 169 of file lpc17xx_adc.h.

#define PARAM_ADCx ( n ) (((uint32_t *)n)==((uint32_t *)LPC_ADC))

Check ADC parameter

Definition at line 145 of file lpc17xx_adc.h.

Generated on Tue Jun 7 14:59:32 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: ADC Public Types

ADC Public Types
[ADC]

Enumerations

enum ADC_CHANNEL_SELECTION {
ADC_CHANNEL_0 = 0, ADC_CHANNEL_1, ADC_CHANNEL_2, ADC_CHANNEL_3,
ADC_CHANNEL_4, ADC_CHANNEL_5, ADC_CHANNEL_6, ADC_CHANNEL_7
}
ADC enumeration. More...
enum ADC_START_OPT {
ADC_START_CONTINUOUS = 0, ADC_START_NOW, ADC_START_ON_EINT0, ADC_START_ON_CAP01,
ADC_START_ON_MAT01, ADC_START_ON_MAT03, ADC_START_ON_MAT10, ADC_START_ON_MAT11
}
Type of start option. More...
enum | ADC_START_ON_EDGE_OPT { ADC_START_ON_RISING = 0, ADC_START_ON_FALLING }
Type of edge when start conversion on the selected CAP/MAT signal. More...
enum ADC_TYPE_INT_OPT {
ADC_ADINTEN0 = 0, ADC_ADINTEN1, ADC_ADINTEN2, ADC_ADINTEN3,
ADC_ADINTEN4, ADC_ADINTEN5, ADC_ADINTEN6, ADC_ADINTEN7,
ADC_ADGINTEN
}
* ADC type interrupt enum More...
enum | ADC_DATA_STATUS { ADC_DATA_BURST = 0, ADC_DATA_DONE }
ADC Data status. More...

Enumeration Type Documentation

enum ADC_CHANNEL_SELECTION

ADC enumeration.

Channel Selection

Enumerator:
ADC_CHANNEL_0 | Channel 0
ADC_CHANNEL_1 | Channel 1
ADC_CHANNEL_2 | Channel 2
ADC_CHANNEL_3 | Channel 3
ADC_CHANNEL_4 | Channel 4
ADC_CHANNEL_5 | Channel 5
ADC_CHANNEL_6 | Channel 6
ADC_CHANNEL_7 | Channel 7

Definition at line 189 of file lpc17xx_adc.h.

enum ADC_DATA_STATUS

ADC Data status.

Enumerator:
ADC_DATA_BURST
ADC_DATA_DONE

Definition at line 245 of file lpc17xx_adc.h.

enum ADC_START_ON_EDGE_OPT

Type of edge when start conversion on the selected CAP/MAT signal.

Enumerator:
ADC_START_ON_RISING | Start conversion on a rising edge on the selected CAP/MAT signal
ADC_START_ON_FALLING | Start conversion on a falling edge on the selected CAP/MAT signal

Definition at line 222 of file lpc17xx_adc.h.

enum ADC_START_OPT

Type of start option.

Enumerator:
ADC_START_CONTINUOUS | Continuous mode
ADC_START_NOW | Start conversion now
ADC_START_ON_EINT0 | Start conversion when the edge selected by bit 27 occurs on P2.10/EINT0
ADC_START_ON_CAP01 | Start conversion when the edge selected by bit 27 occurs on P1.27/CAP0.1
ADC_START_ON_MAT01 | Start conversion when the edge selected by bit 27 occurs on MAT0.1
ADC_START_ON_MAT03 | Start conversion when the edge selected by bit 27 occurs on MAT0.3
ADC_START_ON_MAT10 | Start conversion when the edge selected by bit 27 occurs on MAT1.0
ADC_START_ON_MAT11 | Start conversion when the edge selected by bit 27 occurs on MAT1.1

Definition at line 202 of file lpc17xx_adc.h.

enum ADC_TYPE_INT_OPT

* ADC type interrupt enum

Enumerator:
ADC_ADINTEN0 | Interrupt channel 0
ADC_ADINTEN1 | Interrupt channel 1
ADC_ADINTEN2 | Interrupt channel 2
ADC_ADINTEN3 | Interrupt channel 3
ADC_ADINTEN4 | Interrupt channel 4
ADC_ADINTEN5 | Interrupt channel 5
ADC_ADINTEN6 | Interrupt channel 6
ADC_ADINTEN7 | Interrupt channel 7
ADC_ADGINTEN | Individual channel/global flag done generate an interrupt

Definition at line 231 of file lpc17xx_adc.h.

Generated on Tue Jun 7 14:59:32 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: ADC Public Functions

ADC Public Functions
[ADC]

Functions

void | ADC_Init (LPC_ADC_TypeDef *ADCx, uint32_t rate)
Initial for ADC + Set bit PCADC + Set clock for ADC + Set Clock Frequency.
void | ADC_DeInit (LPC_ADC_TypeDef *ADCx)
Close ADC.
void | ADC_BurstCmd (LPC_ADC_TypeDef *ADCx, FunctionalState NewState)
ADC Burst mode setting.
void | ADC_PowerdownCmd (LPC_ADC_TypeDef *ADCx, FunctionalState NewState)
Set AD conversion in power mode.
void | ADC_StartCmd (LPC_ADC_TypeDef *ADCx, uint8_t start_mode)
Set start mode for ADC.
void | ADC_ChannelCmd (LPC_ADC_TypeDef *ADCx, uint8_t Channel, FunctionalState NewState)
Enable/Disable ADC channel number.
void | ADC_EdgeStartConfig (LPC_ADC_TypeDef *ADCx, uint8_t EdgeOption)
Set Edge start configuration.
void | ADC_IntConfig (LPC_ADC_TypeDef *ADCx, ADC_TYPE_INT_OPT IntType, FunctionalState NewState)
ADC interrupt configuration.
uint16_t | ADC_ChannelGetData (LPC_ADC_TypeDef *ADCx, uint8_t channel)
Get ADC result.
FlagStatus | ADC_ChannelGetStatus (LPC_ADC_TypeDef *ADCx, uint8_t channel, uint32_t StatusType)
Get ADC Chanel status from ADC data register.
uint32_t | ADC_GlobalGetData (LPC_ADC_TypeDef *ADCx)
Get ADC Data from AD Global register.
FlagStatus | ADC_GlobalGetStatus (LPC_ADC_TypeDef *ADCx, uint32_t StatusType)
Get ADC Chanel status from AD global data register.
uint32_t | ADC_GetData (uint32_t channel)
Get Result conversion from A/D data register.

Function Documentation

void ADC_BurstCmd | ( | LPC_ADC_TypeDef * | ADCx,
 |  | FunctionalState | NewState
 | ) |  |

ADC Burst mode setting.

Parameters:
[in] ADCx pointer to LPC_ADC_TypeDef, should be: LPC_ADC
[in] NewState
  • 1: Set Burst mode
  • 0: reset Burst mode
Returns:
None

Definition at line 155 of file lpc17xx_adc.c.

void ADC_ChannelCmd | ( | LPC_ADC_TypeDef * | ADCx,
 |  | uint8_t | Channel,
 |  | FunctionalState | NewState
 | ) |  |

Enable/Disable ADC channel number.

Parameters:
[in] | ADCx | pointer to LPC_ADC_TypeDef, should be: LPC_ADC
[in] | Channel | channel number
[in] | NewState | Enable or Disable
Returns:
None

Definition at line 235 of file lpc17xx_adc.c.

uint16_t ADC_ChannelGetData | ( | LPC_ADC_TypeDef * | ADCx,
 |  | uint8_t | channel
 | ) |  |

Get ADC result.

Parameters:
[in] ADCx pointer to LPC_ADC_TypeDef, should be: LPC_ADC
[in] channel,: channel number, should be 0...7
Returns:
Data conversion

Definition at line 253 of file lpc17xx_adc.c.

FlagStatus ADC_ChannelGetStatus | ( | LPC_ADC_TypeDef * | ADCx,
 |  | uint8_t | channel,
 |  | uint32_t | StatusType
 | ) |  |

Get ADC Chanel status from ADC data register.

Parameters:
[in] | ADCx | pointer to LPC_ADC_TypeDef, should be: LPC_ADC
[in] channel,: channel number, should be 0..7
[in] | StatusType | 0:Burst status 1:Done status
Returns:
SET / RESET

Definition at line 273 of file lpc17xx_adc.c.

void ADC_DeInit ( LPC_ADC_TypeDef * ADCx )

Close ADC.

Parameters:
[in] ADCx pointer to LPC_ADC_TypeDef, should be: LPC_ADC
Returns:
None

Definition at line 96 of file lpc17xx_adc.c.

void ADC_EdgeStartConfig | ( | LPC_ADC_TypeDef * | ADCx,
 |  | uint8_t | EdgeOption
 | ) |  |

Set Edge start configuration.

Parameters:
[in] | ADCx | pointer to LPC_ADC_TypeDef, should be: LPC_ADC
[in] | EdgeOption | is ADC_START_ON_RISING and ADC_START_ON_FALLING 0:ADC_START_ON_RISING 1:ADC_START_ON_FALLING
Returns:
None

Definition at line 191 of file lpc17xx_adc.c.

uint32_t ADC_GetData ( uint32_t channel )

Get Result conversion from A/D data register.

Parameters:
[in] channel number which want to read back the result
Returns:
Result of conversion

Definition at line 112 of file lpc17xx_adc.c.

uint32_t ADC_GlobalGetData ( LPC_ADC_TypeDef * ADCx )

Get ADC Data from AD Global register.

Parameters:
[in] ADCx pointer to LPC_ADC_TypeDef, should be: LPC_ADC
Returns:
Result of conversion

Definition at line 300 of file lpc17xx_adc.c.

FlagStatus ADC_GlobalGetStatus | ( | LPC_ADC_TypeDef * | ADCx,
 |  | uint32_t | StatusType
 | ) |  |

Get ADC Chanel status from AD global data register.

Parameters:
[in] | ADCx | pointer to LPC_ADC_TypeDef, should be: LPC_ADC
[in] | StatusType | 0:Burst status 1:Done status
Returns:
SET / RESET

Definition at line 315 of file lpc17xx_adc.c.

void ADC_Init | ( | LPC_ADC_TypeDef * | ADCx,
 |  | uint32_t | rate
 | ) |  |

Initial for ADC + Set bit PCADC + Set clock for ADC + Set Clock Frequency.

Parameters:
[in] | ADCx | pointer to LPC_ADC_TypeDef, should be: LPC_ADC
[in] | rate | ADC conversion rate, should be <=200KHz
Returns:
None

Definition at line 62 of file lpc17xx_adc.c.

void ADC_IntConfig | ( | LPC_ADC_TypeDef * | ADCx,
 |  | ADC_TYPE_INT_OPT | IntType,
 |  | FunctionalState | NewState
 | ) |  |

ADC interrupt configuration.

Parameters:
[in] ADCx pointer to LPC_ADC_TypeDef, should be: LPC_ADC
[in] IntType,: type of interrupt, should be:
  • ADC_ADINTEN0: Interrupt channel 0
  • ADC_ADINTEN1: Interrupt channel 1 ...
  • ADC_ADINTEN7: Interrupt channel 7
  • ADC_ADGINTEN: Individual channel/global flag done generate an interrupt
[in] NewState,:
  • SET : enable ADC interrupt
  • RESET: disable ADC interrupt
Returns:
None

Definition at line 216 of file lpc17xx_adc.c.

void ADC_PowerdownCmd | ( | LPC_ADC_TypeDef * | ADCx,
 |  | FunctionalState | NewState
 | ) |  |

Set AD conversion in power mode.

Parameters:
[in] ADCx pointer to LPC_ADC_TypeDef, should be: LPC_ADC
[in] NewState
  • 1: AD converter is optional
  • 0: AD Converter is in power down mode
Returns:
None

Definition at line 173 of file lpc17xx_adc.c.

void ADC_StartCmd | ( | LPC_ADC_TypeDef * | ADCx,
 |  | uint8_t | start_mode
 | ) |  |

Set start mode for ADC.

Parameters:
[in] ADCx pointer to LPC_ADC_TypeDef, should be: LPC_ADC
[in] start_mode Start mode choose one of modes in 'ADC_START_OPT' enumeration type definition, should be:
  • ADC_START_CONTINUOUS
  • ADC_START_NOW
  • ADC_START_ON_EINT0
  • ADC_START_ON_CAP01
  • ADC_START_ON_MAT01
  • ADC_START_ON_MAT03
  • ADC_START_ON_MAT10
  • ADC_START_ON_MAT11
Returns:
None

Definition at line 137 of file lpc17xx_adc.c.

Generated on Tue Jun 7 14:59:32 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: CAN

CAN
[LPC1700CMSIS Firmware Library]

Modules

CAN Public Macros
CAN Private Macros
CAN Public Types
CAN Public Functions
CAN Private Variables
Generated on Tue Jun 7 14:59:32 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: CAN Public Macros

CAN Public Macros
[CAN]

Defines

#define | MSG_ENABLE ((uint8_t)(0))
#define | MSG_DISABLE ((uint8_t)(1))
#define | CAN1_CTRL ((uint8_t)(0))
#define | CAN2_CTRL ((uint8_t)(1))
#define | PARAM_FULLCAN_IC(n) ((n==FULLCAN_IC0)||(n==FULLCAN_IC1))
#define | ID_11 1
#define | MAX_HW_FULLCAN_OBJ 64
#define | MAX_SW_FULLCAN_OBJ 32

Define Documentation

#define CAN1_CTRL ((uint8_t)(0))

Definition at line 51 of file lpc17xx_can.h.

#define CAN2_CTRL ((uint8_t)(1))

Definition at line 52 of file lpc17xx_can.h.

#define ID_11 1

Definition at line 54 of file lpc17xx_can.h.

#define MAX_HW_FULLCAN_OBJ 64

Definition at line 55 of file lpc17xx_can.h.

#define MAX_SW_FULLCAN_OBJ 32

Definition at line 56 of file lpc17xx_can.h.

#define MSG_DISABLE ((uint8_t)(1))

Definition at line 50 of file lpc17xx_can.h.

#define MSG_ENABLE ((uint8_t)(0))

Definition at line 49 of file lpc17xx_can.h.

#define PARAM_FULLCAN_IC ( n ) ((n==FULLCAN_IC0)||(n==FULLCAN_IC1))

Definition at line 53 of file lpc17xx_can.h.

Generated on Tue Jun 7 14:59:32 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: CAN Private Macros

CAN Private Macros
[CAN]

Defines

#define | CAN_MOD_RM ((uint32_t)(1))
#define | CAN_MOD_LOM ((uint32_t)(1<<1))
#define | CAN_MOD_STM ((uint32_t)(1<<2))
#define | CAN_MOD_TPM ((uint32_t)(1<<3))
#define | CAN_MOD_SM ((uint32_t)(1<<4))
#define | CAN_MOD_RPM ((uint32_t)(1<<5))
#define | CAN_MOD_TM ((uint32_t)(1<<7))
#define | CAN_CMR_TR ((uint32_t)(1))
#define | CAN_CMR_AT ((uint32_t)(1<<1))
#define | CAN_CMR_RRB ((uint32_t)(1<<2))
#define | CAN_CMR_CDO ((uint32_t)(1<<3))
#define | CAN_CMR_SRR ((uint32_t)(1<<4))
#define | CAN_CMR_STB1 ((uint32_t)(1<<5))
#define | CAN_CMR_STB2 ((uint32_t)(1<<6))
#define | CAN_CMR_STB3 ((uint32_t)(1<<7))
#define | CAN_GSR_RBS ((uint32_t)(1))
#define | CAN_GSR_DOS ((uint32_t)(1<<1))
#define | CAN_GSR_TBS ((uint32_t)(1<<2))
#define | CAN_GSR_TCS ((uint32_t)(1<<3))
#define | CAN_GSR_RS ((uint32_t)(1<<4))
#define | CAN_GSR_TS ((uint32_t)(1<<5))
#define | CAN_GSR_ES ((uint32_t)(1<<6))
#define | CAN_GSR_BS ((uint32_t)(1<<7))
#define | CAN_GSR_RXERR(n) ((uint32_t)((n&0xFF)<<16))
#define | CAN_GSR_TXERR(n) ((uint32_t)(n&0xFF)<<24))
#define | CAN_ICR_RI ((uint32_t)(1))
#define | CAN_ICR_TI1 ((uint32_t)(1<<1))
#define | CAN_ICR_EI ((uint32_t)(1<<2))
#define | CAN_ICR_DOI ((uint32_t)(1<<3))
#define | CAN_ICR_WUI ((uint32_t)(1<<4))
#define | CAN_ICR_EPI ((uint32_t)(1<<5))
#define | CAN_ICR_ALI ((uint32_t)(1<<6))
#define | CAN_ICR_BEI ((uint32_t)(1<<7))
#define | CAN_ICR_IDI ((uint32_t)(1<<8))
#define | CAN_ICR_TI2 ((uint32_t)(1<<9))
#define | CAN_ICR_TI3 ((uint32_t)(1<<10))
#define | CAN_ICR_ERRBIT(n) ((uint32_t)((n&0x1F)<<16))
#define | CAN_ICR_ERRDIR ((uint32_t)(1<<21))
#define | CAN_ICR_ERRC(n) ((uint32_t)((n&0x3)<<22))
#define | CAN_ICR_ALCBIT(n) ((uint32_t)((n&0xFF)<<24))
#define | CAN_IER_RIE ((uint32_t)(1))
#define | CAN_IER_TIE1 ((uint32_t)(1<<1))
#define | CAN_IER_EIE ((uint32_t)(1<<2))
#define | CAN_IER_DOIE ((uint32_t)(1<<3))
#define | CAN_IER_WUIE ((uint32_t)(1<<4))
#define | CAN_IER_EPIE ((uint32_t)(1<<5))
#define | CAN_IER_ALIE ((uint32_t)(1<<6))
#define | CAN_IER_BEIE ((uint32_t)(1<<7))
#define | CAN_IER_IDIE ((uint32_t)(1<<8))
#define | CAN_IER_TIE2 ((uint32_t)(1<<9))
#define | CAN_IER_TIE3 ((uint32_t)(1<<10))
#define | CAN_BTR_BRP(n) ((uint32_t)(n&0x3FF))
#define | CAN_BTR_SJM(n) ((uint32_t)((n&0x3)<<14))
#define | CAN_BTR_TESG1(n) ((uint32_t)(n&0xF)<<16))
#define | CAN_BTR_TESG2(n) ((uint32_t)(n&0xF)<<20))
#define | CAN_BTR_SAM(n) ((uint32_t)(1<<23))
#define | CAN_EWL_EWL(n) ((uint32_t)(n&0xFF))
#define | CAN_SR_RBS ((uint32_t)(1))
#define | CAN_SR_DOS ((uint32_t)(1<<1))
#define | CAN_SR_TBS1 ((uint32_t)(1<<2))
#define | CAN_SR_TCS1 ((uint32_t)(1<<3))
#define | CAN_SR_RS ((uint32_t)(1<<4))
#define | CAN_SR_TS1 ((uint32_t)(1<<5))
#define | CAN_SR_ES ((uint32_t)(1<<6))
#define | CAN_SR_BS ((uint32_t)(1<<7))
#define | CAN_SR_TBS2 ((uint32_t)(1<<10))
#define | CAN_SR_TCS2 ((uint32_t)(1<<11))
#define | CAN_SR_TS2 ((uint32_t)(1<<13))
#define | CAN_SR_TBS3 ((uint32_t)(1<<18))
#define | CAN_SR_TCS3 ((uint32_t)(1<<19))
#define | CAN_SR_TS3 ((uint32_t)(1<<21))
#define | CAN_RFS_ID_INDEX(n) ((uint32_t)(n&0x3FF))
#define | CAN_RFS_BP ((uint32_t)(1<<10))
#define | CAN_RFS_DLC(n) ((uint32_t)((n&0xF)<<16)
#define | CAN_RFS_RTR ((uint32_t)(1<<30))
#define | CAN_RFS_FF ((uint32_t)(1<<31))
#define | CAN_RID_ID_11(n) ((uint32_t)(n&0x7FF))
#define | CAN_RID_ID_29(n) ((uint32_t)(n&0x1FFFFFFF))
#define | CAN_RDA_DATA1(n) ((uint32_t)(n&0xFF))
#define | CAN_RDA_DATA2(n) ((uint32_t)((n&0xFF)<<8))
#define | CAN_RDA_DATA3(n) ((uint32_t)((n&0xFF)<<16))
#define | CAN_RDA_DATA4(n) ((uint32_t)((n&0xFF)<<24))
#define | CAN_RDB_DATA5(n) ((uint32_t)(n&0xFF))
#define | CAN_RDB_DATA6(n) ((uint32_t)((n&0xFF)<<8))
#define | CAN_RDB_DATA7(n) ((uint32_t)((n&0xFF)<<16))
#define | CAN_RDB_DATA8(n) ((uint32_t)((n&0xFF)<<24))
#define | CAN_TFI_PRIO(n) ((uint32_t)(n&0xFF))
#define | CAN_TFI_DLC(n) ((uint32_t)((n&0xF)<<16))
#define | CAN_TFI_RTR ((uint32_t)(1<<30))
#define | CAN_TFI_FF ((uint32_t)(1<<31))
#define | CAN_TID_ID11(n) ((uint32_t)(n&0x7FF))
#define | CAN_TID_ID29(n) ((uint32_t)(n&0x1FFFFFFF))
#define | CAN_TDA_DATA1(n) ((uint32_t)(n&0xFF))
#define | CAN_TDA_DATA2(n) ((uint32_t)((n&0xFF)<<8))
#define | CAN_TDA_DATA3(n) ((uint32_t)((n&0xFF)<<16))
#define | CAN_TDA_DATA4(n) ((uint32_t)((n&0xFF)<<24))
#define | CAN_TDA_DATA5(n) ((uint32_t)(n&0xFF))
#define | CAN_TDA_DATA6(n) ((uint32_t)((n&0xFF)<<8))
#define | CAN_TDA_DATA7(n) ((uint32_t)((n&0xFF)<<16))
#define | CAN_TDA_DATA8(n) ((uint32_t)((n&0xFF)<<24))
#define | CAN1SLEEPCLR ((uint32_t)(1<<1))
#define | CAN2SLEEPCLR ((uint32_t)(1<<2))
#define | CAN_WAKEFLAGES_CAN1WAKE ((uint32_t)(1<<1))
#define | CAN_WAKEFLAGES_CAN2WAKE ((uint32_t)(1<<2))
#define | CAN_TSR_TS1 ((uint32_t)(1))
#define | CAN_TSR_TS2 ((uint32_t)(1<<1))
#define | CAN_TSR_TBS1 ((uint32_t)(1<<8))
#define | CAN_TSR_TBS2 ((uint32_t)(1<<9))
#define | CAN_TSR_TCS1 ((uint32_t)(1<<16))
#define | CAN_TSR_TCS2 ((uint32_t)(1<<17))
#define | CAN_RSR_RS1 ((uint32_t)(1))
#define | CAN_RSR_RS2 ((uint32_t)(1<<1))
#define | CAN_RSR_RB1 ((uint32_t)(1<<8))
#define | CAN_RSR_RB2 ((uint32_t)(1<<9))
#define | CAN_RSR_DOS1 ((uint32_t)(1<<16))
#define | CAN_RSR_DOS2 ((uint32_t)(1<<17))
#define | CAN_MSR_E1 ((uint32_t)(1))
#define | CAN_MSR_E2 ((uint32_t)(1<<1))
#define | CAN_MSR_BS1 ((uint32_t)(1<<8))
#define | CAN_MSR_BS2 ((uint32_t)(1<<9))
#define | CAN_AFMR_AccOff ((uint32_t)(1))
#define | CAN_AFMR_AccBP ((uint32_t)(1<<1))
#define | CAN_AFMR_eFCAN ((uint32_t)(1<<2))
#define | CAN_STT_sa(n) ((uint32_t)((n&1FF)<<2))
#define | CAN_SFF_GRP_sa(n) ((uint32_t)((n&3FF)<<2))
#define | CAN_EFF_sa(n) ((uint32_t)((n&1FF)<<2))
#define | CAN_Eff_GRP_sa(n) ((uint32_t)((n&3FF)<<2))
#define | CAN_EndofTable(n) ((uint32_t)((n&3FF)<<2))
#define | CAN_LUTerrAd(n) ((uint32_t)((n&1FF)<<2))
#define | CAN_LUTerr ((uint32_t)(1))
#define | CAN_FCANIE ((uint32_t)(1))
#define | CAN_FCANIC0_IntPnd(n) ((uint32_t)(1<<n))
#define | CAN_FCANIC1_IntPnd(n) ((uint32_t)(1<<(n-32)))
#define | PARAM_CANx(x)
#define | PARAM_CANAFx(x) (((uint32_t*)x)== ((uint32_t*)LPC_CANAF))
#define | PARAM_CANAFRAMx(x) (((uint32_t*)x)== (uint32_t*)LPC_CANAF_RAM)
#define | PARAM_CANCRx(x) (((uint32_t*)x)==((uint32_t*)LPC_CANCR))
#define | PARAM_I2S_DATA(data) ((data>=0)&&(data <= 0xFFFFFFFF))
#define | PRAM_I2S_FREQ(freq) ((freq>=16000)&&(freq <= 96000))
#define | PARAM_ID_11(n) ((n>>11)==0)
#define | PARAM_ID_29(n) ((n>>29)==0)
#define | PARAM_DLC(n) ((n>>4)==0)
#define | PARAM_ID_FORMAT(n) ((n==STD_ID_FORMAT)||(n==EXT_ID_FORMAT))
#define | PARAM_GRP_ID(x, y) ((x<=y))
#define | PARAM_FRAME_TYPE(n) ((n==DATA_FRAME)||(n==REMOTE_FRAME))
#define | PARAM_CTRL_STS_TYPE(n)
#define | PARAM_CR_STS_TYPE(n)
#define | PARAM_AFMODE_TYPE(n)
#define | PARAM_MODE_TYPE(n)
#define | PARAM_CTRL(n) ((n==CAN1_CTRL)|(n==CAN2_CTRL))
#define | PARAM_MSG_DISABLE(n) ((n==MSG_ENABLE)|(n==MSG_DISABLE))
#define | PARAM_INT_EN_TYPE(n)
#define | PARAM_AFLUT_ENTRY_TYPE(n)
#define | PARAM_POSITION(n) ((n>=0)&&(n<512))

Define Documentation

#define CAN1SLEEPCLR ((uint32_t)(1<<1))

Macro defines for CAN Sleep Clear Register CAN1 Sleep mode

Definition at line 336 of file lpc17xx_can.h.

#define CAN2SLEEPCLR ((uint32_t)(1<<2))

CAN2 Sleep Mode

Definition at line 338 of file lpc17xx_can.h.

#define CAN_AFMR_AccBP ((uint32_t)(1<<1))

CAN Acceptance File Bypass mode

Definition at line 398 of file lpc17xx_can.h.

#define CAN_AFMR_AccOff ((uint32_t)(1))

Macro defines for Acceptance Filter Mode Register CAN Acceptance Filter Off mode

Definition at line 396 of file lpc17xx_can.h.

#define CAN_AFMR_eFCAN ((uint32_t)(1<<2))

FullCAN Mode Enhancements

Definition at line 400 of file lpc17xx_can.h.

#define CAN_BTR_BRP ( n ) ((uint32_t)(n&0x3FF))

Macro defines for CAN Bus Timing Register CAN Baudrate Prescaler

Definition at line 194 of file lpc17xx_can.h.

#define CAN_BTR_SAM ( n ) ((uint32_t)(1<<23))

CAN Sampling

Definition at line 202 of file lpc17xx_can.h.

#define CAN_BTR_SJM ( n ) ((uint32_t)((n&0x3)<<14))

CAN Synchronization Jump Width

Definition at line 196 of file lpc17xx_can.h.

#define CAN_BTR_TESG1 ( n ) ((uint32_t)(n&0xF)<<16))

CAN Time Segment 1

Definition at line 198 of file lpc17xx_can.h.

#define CAN_BTR_TESG2 ( n ) ((uint32_t)(n&0xF)<<20))

CAN Time Segment 2

Definition at line 200 of file lpc17xx_can.h.

#define CAN_CMR_AT ((uint32_t)(1<<1))

CAN Abort Transmission

Definition at line 92 of file lpc17xx_can.h.

#define CAN_CMR_CDO ((uint32_t)(1<<3))

CAN Clear Data Overrun

Definition at line 96 of file lpc17xx_can.h.

#define CAN_CMR_RRB ((uint32_t)(1<<2))

CAN Release Receive Buffer

Definition at line 94 of file lpc17xx_can.h.

#define CAN_CMR_SRR ((uint32_t)(1<<4))

CAN Self Reception Request

Definition at line 98 of file lpc17xx_can.h.

#define CAN_CMR_STB1 ((uint32_t)(1<<5))

CAN Select Tx Buffer 1

Definition at line 100 of file lpc17xx_can.h.

#define CAN_CMR_STB2 ((uint32_t)(1<<6))

CAN Select Tx Buffer 2

Definition at line 102 of file lpc17xx_can.h.

#define CAN_CMR_STB3 ((uint32_t)(1<<7))

CAN Select Tx Buffer 3

Definition at line 104 of file lpc17xx_can.h.

#define CAN_CMR_TR ((uint32_t)(1))

Macro defines for CAN Command Register CAN Transmission Request

Definition at line 90 of file lpc17xx_can.h.

#define CAN_Eff_GRP_sa ( n ) ((uint32_t)((n&3FF)<<2))

Macro defines for Extended Frame Group Start Address Register The start address of the table of grouped Extended Identifier

Definition at line 424 of file lpc17xx_can.h.

#define CAN_EFF_sa ( n ) ((uint32_t)((n&1FF)<<2))

Macro defines for Extended Frame Start Address Register The start address of the table of individual Extended Identifier

Definition at line 418 of file lpc17xx_can.h.

#define CAN_EndofTable ( n ) ((uint32_t)((n&3FF)<<2))

Macro defines for End Of AF Table Register The End of Table of AF LookUp Table

Definition at line 430 of file lpc17xx_can.h.

#define CAN_EWL_EWL ( n ) ((uint32_t)(n&0xFF))

Macro defines for CAN Error Warning Limit Register CAN Error Warning Limit

Definition at line 208 of file lpc17xx_can.h.

#define CAN_FCANIC0_IntPnd ( n ) ((uint32_t)(1<<n))

Macro defines for FullCAN Interrupt and Capture Register 0 FullCAN Interrupt and Capture (0-31)

Definition at line 454 of file lpc17xx_can.h.

#define CAN_FCANIC1_IntPnd ( n ) ((uint32_t)(1<<(n-32)))

Macro defines for FullCAN Interrupt and Capture Register 1 FullCAN Interrupt and Capture (0-31)

Definition at line 460 of file lpc17xx_can.h.

#define CAN_FCANIE ((uint32_t)(1))

Macro defines for Global FullCANInterrupt Enable Register Global FullCANInterrupt Enable

Definition at line 448 of file lpc17xx_can.h.

#define CAN_GSR_BS ((uint32_t)(1<<7))

CAN Bus Status

Definition at line 124 of file lpc17xx_can.h.

#define CAN_GSR_DOS ((uint32_t)(1<<1))

CAN Data Overrun Status

Definition at line 112 of file lpc17xx_can.h.

#define CAN_GSR_ES ((uint32_t)(1<<6))

CAN Error Status

Definition at line 122 of file lpc17xx_can.h.

#define CAN_GSR_RBS ((uint32_t)(1))

Macro defines for CAN Global Status Register CAN Receive Buffer Status

Definition at line 110 of file lpc17xx_can.h.

#define CAN_GSR_RS ((uint32_t)(1<<4))

CAN Receive Status

Definition at line 118 of file lpc17xx_can.h.

#define CAN_GSR_RXERR ( n ) ((uint32_t)((n&0xFF)<<16))

CAN Current value of the Rx Error Counter

Definition at line 126 of file lpc17xx_can.h.

#define CAN_GSR_TBS ((uint32_t)(1<<2))

CAN Transmit Buffer Status

Definition at line 114 of file lpc17xx_can.h.

#define CAN_GSR_TCS ((uint32_t)(1<<3))

CAN Transmit Complete Status

Definition at line 116 of file lpc17xx_can.h.

#define CAN_GSR_TS ((uint32_t)(1<<5))

CAN Transmit Status

Definition at line 120 of file lpc17xx_can.h.

#define CAN_GSR_TXERR ( n ) ((uint32_t)(n&0xFF)<<24))

CAN Current value of the Tx Error Counter

Definition at line 128 of file lpc17xx_can.h.

#define CAN_ICR_ALCBIT ( n ) ((uint32_t)((n&0xFF)<<24))

CAN Arbitration Lost Capture

Definition at line 162 of file lpc17xx_can.h.

#define CAN_ICR_ALI ((uint32_t)(1<<6))

CAN Arbitration Lost Interrupt

Definition at line 146 of file lpc17xx_can.h.

#define CAN_ICR_BEI ((uint32_t)(1<<7))

CAN Bus Error Interrupt

Definition at line 148 of file lpc17xx_can.h.

#define CAN_ICR_DOI ((uint32_t)(1<<3))

CAN Data Overrun Interrupt

Definition at line 140 of file lpc17xx_can.h.

#define CAN_ICR_EI ((uint32_t)(1<<2))

CAN Error Warning Interrupt

Definition at line 138 of file lpc17xx_can.h.

#define CAN_ICR_EPI ((uint32_t)(1<<5))

CAN Error Passive Interrupt

Definition at line 144 of file lpc17xx_can.h.

#define CAN_ICR_ERRBIT ( n ) ((uint32_t)((n&0x1F)<<16))

CAN Error Code Capture

Definition at line 156 of file lpc17xx_can.h.

#define CAN_ICR_ERRC ( n ) ((uint32_t)((n&0x3)<<22))

CAN Error Capture

Definition at line 160 of file lpc17xx_can.h.

#define CAN_ICR_ERRDIR ((uint32_t)(1<<21))

CAN Error Direction

Definition at line 158 of file lpc17xx_can.h.

#define CAN_ICR_IDI ((uint32_t)(1<<8))

CAN ID Ready Interrupt

Definition at line 150 of file lpc17xx_can.h.

#define CAN_ICR_RI ((uint32_t)(1))

Macro defines for CAN Interrupt and Capture Register CAN Receive Interrupt

Definition at line 134 of file lpc17xx_can.h.

#define CAN_ICR_TI1 ((uint32_t)(1<<1))

CAN Transmit Interrupt 1

Definition at line 136 of file lpc17xx_can.h.

#define CAN_ICR_TI2 ((uint32_t)(1<<9))

CAN Transmit Interrupt 2

Definition at line 152 of file lpc17xx_can.h.

#define CAN_ICR_TI3 ((uint32_t)(1<<10))

CAN Transmit Interrupt 3

Definition at line 154 of file lpc17xx_can.h.

#define CAN_ICR_WUI ((uint32_t)(1<<4))

CAN Wake-Up Interrupt

Definition at line 142 of file lpc17xx_can.h.

#define CAN_IER_ALIE ((uint32_t)(1<<6))

CAN Arbitration Lost Interrupt Enable

Definition at line 180 of file lpc17xx_can.h.

#define CAN_IER_BEIE ((uint32_t)(1<<7))

CAN Bus Error Interrupt Enable

Definition at line 182 of file lpc17xx_can.h.

#define CAN_IER_DOIE ((uint32_t)(1<<3))

CAN Data Overrun Interrupt Enable

Definition at line 174 of file lpc17xx_can.h.

#define CAN_IER_EIE ((uint32_t)(1<<2))

CAN Error Warning Interrupt Enable

Definition at line 172 of file lpc17xx_can.h.

#define CAN_IER_EPIE ((uint32_t)(1<<5))

CAN Error Passive Interrupt Enable

Definition at line 178 of file lpc17xx_can.h.

#define CAN_IER_IDIE ((uint32_t)(1<<8))

CAN ID Ready Interrupt Enable

Definition at line 184 of file lpc17xx_can.h.

#define CAN_IER_RIE ((uint32_t)(1))

Macro defines for CAN Interrupt Enable Register CAN Receive Interrupt Enable

Definition at line 168 of file lpc17xx_can.h.

#define CAN_IER_TIE1 ((uint32_t)(1<<1))

CAN Transmit Interrupt Enable for buffer 1

Definition at line 170 of file lpc17xx_can.h.

#define CAN_IER_TIE2 ((uint32_t)(1<<9))

CAN Transmit Enable Interrupt for Buffer 2

Definition at line 186 of file lpc17xx_can.h.

#define CAN_IER_TIE3 ((uint32_t)(1<<10))

CAN Transmit Enable Interrupt for Buffer 3

Definition at line 188 of file lpc17xx_can.h.

#define CAN_IER_WUIE ((uint32_t)(1<<4))

CAN Wake-Up Interrupt Enable

Definition at line 176 of file lpc17xx_can.h.

#define CAN_LUTerr ((uint32_t)(1))

Macro defines for LUT Error Register CAN Look-Up Table Error

Definition at line 442 of file lpc17xx_can.h.

#define CAN_LUTerrAd ( n ) ((uint32_t)((n&1FF)<<2))

Macro defines for LUT Error Address Register CAN Look-Up Table Error Address

Definition at line 436 of file lpc17xx_can.h.

#define CAN_MOD_LOM ((uint32_t)(1<<1))

CAN Listen Only Mode

Definition at line 74 of file lpc17xx_can.h.

#define CAN_MOD_RM ((uint32_t)(1))

Macro defines for CAN Mode Register CAN Reset mode

Definition at line 72 of file lpc17xx_can.h.

#define CAN_MOD_RPM ((uint32_t)(1<<5))

CAN Receive Polarity mode

Definition at line 82 of file lpc17xx_can.h.

#define CAN_MOD_SM ((uint32_t)(1<<4))

CAN Sleep mode

Definition at line 80 of file lpc17xx_can.h.

#define CAN_MOD_STM ((uint32_t)(1<<2))

CAN Self Test mode

Definition at line 76 of file lpc17xx_can.h.

#define CAN_MOD_TM ((uint32_t)(1<<7))

CAN Test mode

Definition at line 84 of file lpc17xx_can.h.

#define CAN_MOD_TPM ((uint32_t)(1<<3))

CAN Transmit Priority mode

Definition at line 78 of file lpc17xx_can.h.

#define CAN_MSR_BS1 ((uint32_t)(1<<8))

Same CAN Bus Status in CAN1GSR

Definition at line 388 of file lpc17xx_can.h.

#define CAN_MSR_BS2 ((uint32_t)(1<<9))

Same CAN Bus Status in CAN2GSR

Definition at line 390 of file lpc17xx_can.h.

#define CAN_MSR_E1 ((uint32_t)(1))

Macro defines for Central Miscellaneous Status Register Same CAN Error Status in CAN1GSR

Definition at line 384 of file lpc17xx_can.h.

#define CAN_MSR_E2 ((uint32_t)(1<<1))

Same CAN Error Status in CAN2GSR

Definition at line 386 of file lpc17xx_can.h.

#define CAN_RDA_DATA1 ( n ) ((uint32_t)(n&0xFF))

Macro defines for CAN Receive Data A Register CAN Receive Data 1

Definition at line 268 of file lpc17xx_can.h.

#define CAN_RDA_DATA2 ( n ) ((uint32_t)((n&0xFF)<<8))

CAN Receive Data 2

Definition at line 270 of file lpc17xx_can.h.

#define CAN_RDA_DATA3 ( n ) ((uint32_t)((n&0xFF)<<16))

CAN Receive Data 3

Definition at line 272 of file lpc17xx_can.h.

#define CAN_RDA_DATA4 ( n ) ((uint32_t)((n&0xFF)<<24))

CAN Receive Data 4

Definition at line 274 of file lpc17xx_can.h.

#define CAN_RDB_DATA5 ( n ) ((uint32_t)(n&0xFF))

Macro defines for CAN Receive Data B Register CAN Receive Data 5

Definition at line 280 of file lpc17xx_can.h.

#define CAN_RDB_DATA6 ( n ) ((uint32_t)((n&0xFF)<<8))

CAN Receive Data 6

Definition at line 282 of file lpc17xx_can.h.

#define CAN_RDB_DATA7 ( n ) ((uint32_t)((n&0xFF)<<16))

CAN Receive Data 7

Definition at line 284 of file lpc17xx_can.h.

#define CAN_RDB_DATA8 ( n ) ((uint32_t)((n&0xFF)<<24))

CAN Receive Data 8

Definition at line 286 of file lpc17xx_can.h.

#define CAN_RFS_BP ((uint32_t)(1<<10))

CAN Bypass

Definition at line 248 of file lpc17xx_can.h.

#define CAN_RFS_DLC ( n ) ((uint32_t)((n&0xF)<<16)

CAN Data Length Code

Definition at line 250 of file lpc17xx_can.h.

#define CAN_RFS_FF ((uint32_t)(1<<31))

CAN control 11 bit or 29 bit Identifier

Definition at line 254 of file lpc17xx_can.h.

#define CAN_RFS_ID_INDEX ( n ) ((uint32_t)(n&0x3FF))

Macro defines for CAN Receive Frame Status Register CAN ID Index

Definition at line 246 of file lpc17xx_can.h.

#define CAN_RFS_RTR ((uint32_t)(1<<30))

CAN Remote Transmission Request

Definition at line 252 of file lpc17xx_can.h.

#define CAN_RID_ID_11 ( n ) ((uint32_t)(n&0x7FF))

Macro defines for CAN Receive Identifier Register CAN 11 bit Identifier

Definition at line 260 of file lpc17xx_can.h.

#define CAN_RID_ID_29 ( n ) ((uint32_t)(n&0x1FFFFFFF))

CAN 29 bit Identifier

Definition at line 262 of file lpc17xx_can.h.

#define CAN_RSR_DOS1 ((uint32_t)(1<<16))

CAN Data Overrun Status 1

Definition at line 376 of file lpc17xx_can.h.

#define CAN_RSR_DOS2 ((uint32_t)(1<<17))

CAN Data Overrun Status 1

Definition at line 378 of file lpc17xx_can.h.

#define CAN_RSR_RB1 ((uint32_t)(1<<8))

CAN Receive Buffer Status 1

Definition at line 372 of file lpc17xx_can.h.

#define CAN_RSR_RB2 ((uint32_t)(1<<9))

CAN Receive Buffer Status 2

Definition at line 374 of file lpc17xx_can.h.

#define CAN_RSR_RS1 ((uint32_t)(1))

Macro defines for Central Receive Status Register CAN Receive Status 1

Definition at line 368 of file lpc17xx_can.h.

#define CAN_RSR_RS2 ((uint32_t)(1<<1))

CAN Receive Status 1

Definition at line 370 of file lpc17xx_can.h.

#define CAN_SFF_GRP_sa ( n ) ((uint32_t)((n&3FF)<<2))

Macro defines for Standard Frame Group Start Address Register The start address of the table of grouped Standard Identifier

Definition at line 412 of file lpc17xx_can.h.

#define CAN_SR_BS ((uint32_t)(1<<7))

CAN Bus Status

Definition at line 228 of file lpc17xx_can.h.

#define CAN_SR_DOS ((uint32_t)(1<<1))

CAN Data Overrun Status

Definition at line 216 of file lpc17xx_can.h.

#define CAN_SR_ES ((uint32_t)(1<<6))

CAN Error Status

Definition at line 226 of file lpc17xx_can.h.

#define CAN_SR_RBS ((uint32_t)(1))

Macro defines for CAN Status Register CAN Receive Buffer Status

Definition at line 214 of file lpc17xx_can.h.

#define CAN_SR_RS ((uint32_t)(1<<4))

CAN Receive Status

Definition at line 222 of file lpc17xx_can.h.

#define CAN_SR_TBS1 ((uint32_t)(1<<2))

CAN Transmit Buffer Status 1

Definition at line 218 of file lpc17xx_can.h.

#define CAN_SR_TBS2 ((uint32_t)(1<<10))

CAN Transmit Buffer Status 2

Definition at line 230 of file lpc17xx_can.h.

#define CAN_SR_TBS3 ((uint32_t)(1<<18))

CAN Transmit Buffer Status 2

Definition at line 236 of file lpc17xx_can.h.

#define CAN_SR_TCS1 ((uint32_t)(1<<3))

CAN Transmission Complete Status of Buffer 1

Definition at line 220 of file lpc17xx_can.h.

#define CAN_SR_TCS2 ((uint32_t)(1<<11))

CAN Transmission Complete Status of Buffer 2

Definition at line 232 of file lpc17xx_can.h.

#define CAN_SR_TCS3 ((uint32_t)(1<<19))

CAN Transmission Complete Status of Buffer 2

Definition at line 238 of file lpc17xx_can.h.

#define CAN_SR_TS1 ((uint32_t)(1<<5))

CAN Transmit Status 1

Definition at line 224 of file lpc17xx_can.h.

#define CAN_SR_TS2 ((uint32_t)(1<<13))

CAN Transmit Status 2

Definition at line 234 of file lpc17xx_can.h.

#define CAN_SR_TS3 ((uint32_t)(1<<21))

CAN Transmit Status 2

Definition at line 240 of file lpc17xx_can.h.

#define CAN_STT_sa ( n ) ((uint32_t)((n&1FF)<<2))

Macro defines for Standard Frame Individual Start Address Register The start address of the table of individual Standard Identifier

Definition at line 406 of file lpc17xx_can.h.

#define CAN_TDA_DATA1 ( n ) ((uint32_t)(n&0xFF))

Macro defines for CAN Transmit Data A Register CAN Transmit Data 1

Definition at line 312 of file lpc17xx_can.h.

#define CAN_TDA_DATA2 ( n ) ((uint32_t)((n&0xFF)<<8))

CAN Transmit Data 2

Definition at line 314 of file lpc17xx_can.h.

#define CAN_TDA_DATA3 ( n ) ((uint32_t)((n&0xFF)<<16))

CAN Transmit Data 3

Definition at line 316 of file lpc17xx_can.h.

#define CAN_TDA_DATA4 ( n ) ((uint32_t)((n&0xFF)<<24))

CAN Transmit Data 4

Definition at line 318 of file lpc17xx_can.h.

#define CAN_TDA_DATA5 ( n ) ((uint32_t)(n&0xFF))

Macro defines for CAN Transmit Data B Register CAN Transmit Data 5

Definition at line 324 of file lpc17xx_can.h.

#define CAN_TDA_DATA6 ( n ) ((uint32_t)((n&0xFF)<<8))

CAN Transmit Data 6

Definition at line 326 of file lpc17xx_can.h.

#define CAN_TDA_DATA7 ( n ) ((uint32_t)((n&0xFF)<<16))

CAN Transmit Data 7

Definition at line 328 of file lpc17xx_can.h.

#define CAN_TDA_DATA8 ( n ) ((uint32_t)((n&0xFF)<<24))

CAN Transmit Data 8

Definition at line 330 of file lpc17xx_can.h.

#define CAN_TFI_DLC ( n ) ((uint32_t)((n&0xF)<<16))

CAN Data Length Code

Definition at line 294 of file lpc17xx_can.h.

#define CAN_TFI_FF ((uint32_t)(1<<31))

CAN control 11-bit or 29-bit Identifier

Definition at line 298 of file lpc17xx_can.h.

#define CAN_TFI_PRIO ( n ) ((uint32_t)(n&0xFF))

Macro defines for CAN Transmit Frame Information Register CAN Priority

Definition at line 292 of file lpc17xx_can.h.

#define CAN_TFI_RTR ((uint32_t)(1<<30))

CAN Remote Frame Transmission

Definition at line 296 of file lpc17xx_can.h.

#define CAN_TID_ID11 ( n ) ((uint32_t)(n&0x7FF))

Macro defines for CAN Transmit Identifier Register CAN 11-bit Identifier

Definition at line 304 of file lpc17xx_can.h.

#define CAN_TID_ID29 ( n ) ((uint32_t)(n&0x1FFFFFFF))

CAN 11-bit Identifier

Definition at line 306 of file lpc17xx_can.h.

#define CAN_TSR_TBS1 ((uint32_t)(1<<8))

CAN Transmit Buffer Status 1

Definition at line 356 of file lpc17xx_can.h.

#define CAN_TSR_TBS2 ((uint32_t)(1<<9))

CAN Transmit Buffer Status 2

Definition at line 358 of file lpc17xx_can.h.

#define CAN_TSR_TCS1 ((uint32_t)(1<<16))

CAN Transmission Complete Status 1

Definition at line 360 of file lpc17xx_can.h.

#define CAN_TSR_TCS2 ((uint32_t)(1<<17))

CAN Transmission Complete Status 2

Definition at line 362 of file lpc17xx_can.h.

#define CAN_TSR_TS1 ((uint32_t)(1))

Macro defines for Central transmit Status Register CAN Transmit 1

Definition at line 352 of file lpc17xx_can.h.

#define CAN_TSR_TS2 ((uint32_t)(1<<1))

CAN Transmit 2

Definition at line 354 of file lpc17xx_can.h.

#define CAN_WAKEFLAGES_CAN1WAKE ((uint32_t)(1<<1))

Macro defines for CAN Wake up Flags Register CAN1 Sleep mode

Definition at line 344 of file lpc17xx_can.h.

#define CAN_WAKEFLAGES_CAN2WAKE ((uint32_t)(1<<2))

CAN2 Sleep Mode

Definition at line 346 of file lpc17xx_can.h.

#define PARAM_AFLUT_ENTRY_TYPE ( n )

Value:

((n==FULLCAN_ENTRY)||(n==EXPLICIT_STANDARD_ENTRY)\
||(n==GROUP_STANDARD_ENTRY)||(n==EXPLICIT_EXTEND_ENTRY) \
||(n==GROUP_EXTEND_ENTRY))
Macro to check AFLUT Entry type

Definition at line 530 of file lpc17xx_can.h.

#define PARAM_AFMODE_TYPE ( n )

Value:

((n==CAN_Normal)||(n==CAN_AccOff) \
||(n==CAN_AccBP)||(n==CAN_eFCAN))
Macro to check AF Mode type parameter

Definition at line 506 of file lpc17xx_can.h.

#define PARAM_CANAFRAMx ( x ) (((uint32_t*)x)== (uint32_t*)LPC_CANAF_RAM)

Definition at line 472 of file lpc17xx_can.h.

#define PARAM_CANAFx ( x ) (((uint32_t*)x)== ((uint32_t*)LPC_CANAF))

Definition at line 469 of file lpc17xx_can.h.

#define PARAM_CANCRx ( x ) (((uint32_t*)x)==((uint32_t*)LPC_CANCR))

Definition at line 475 of file lpc17xx_can.h.

#define PARAM_CANx ( x )

Value:

((((uint32_t*)x)==((uint32_t *)LPC_CAN1)) \
||(((uint32_t*)x)==((uint32_t *)LPC_CAN2)))
Macro to determine if it is valid CAN peripheral or not

Definition at line 465 of file lpc17xx_can.h.

#define PARAM_CR_STS_TYPE ( n )

Value:

((n==CANCR_TX_STS)||(n==CANCR_RX_STS) \
||(n==CANCR_MS))
Macro to check CR status type

Definition at line 503 of file lpc17xx_can.h.

#define PARAM_CTRL ( n ) ((n==CAN1_CTRL)|(n==CAN2_CTRL))

Macro define for struct AF_Section parameter

Definition at line 516 of file lpc17xx_can.h.

#define PARAM_CTRL_STS_TYPE ( n )

Value:

((n==CANCTRL_GLOBAL_STS)||(n==CANCTRL_INT_CAP) \
||(n==CANCTRL_ERR_WRN)||(n==CANCTRL_STS))
Macro to check Control/Central Status type parameter

Definition at line 499 of file lpc17xx_can.h.

#define PARAM_DLC ( n ) ((n>>4)==0)

Macro to check DLC value

Definition at line 488 of file lpc17xx_can.h.

#define PARAM_FRAME_TYPE ( n ) ((n==DATA_FRAME)||(n==REMOTE_FRAME))

Macro to check Frame type

Definition at line 496 of file lpc17xx_can.h.

#define PARAM_GRP_ID | ( | x,
 |  | y | ) | ((x<=y))

Macro to check Group identifier

Definition at line 493 of file lpc17xx_can.h.

#define PARAM_I2S_DATA ( data ) ((data>=0)&&(data <= 0xFFFFFFFF))

Macro to check Data to send valid

Definition at line 478 of file lpc17xx_can.h.

#define PARAM_ID_11 ( n ) ((n>>11)==0)

Macro to check Frame Identifier

Definition at line 484 of file lpc17xx_can.h.

#define PARAM_ID_29 ( n ) ((n>>29)==0)

Definition at line 485 of file lpc17xx_can.h.

#define PARAM_ID_FORMAT ( n ) ((n==STD_ID_FORMAT)||(n==EXT_ID_FORMAT))

Macro to check ID format type

Definition at line 490 of file lpc17xx_can.h.

#define PARAM_INT_EN_TYPE ( n )

Value:

((n==CANINT_RIE)||(n==CANINT_TIE1) \
||(n==CANINT_EIE)||(n==CANINT_DOIE) \
||(n==CANINT_WUIE)||(n==CANINT_EPIE) \
||(n==CANINT_ALIE)||(n==CANINT_BEIE) \
||(n==CANINT_IDIE)||(n==CANINT_TIE2) \
||(n==CANINT_TIE3)||(n==CANINT_FCE))
Macro to check Interrupt Type parameter

Definition at line 522 of file lpc17xx_can.h.

#define PARAM_MODE_TYPE ( n )

Value:

((n==CAN_OPERATING_MODE)||(n==CAN_RESET_MODE) \
||(n==CAN_LISTENONLY_MODE)||(n==CAN_SELFTEST_MODE) \
||(n==CAN_TXPRIORITY_MODE)||(n==CAN_SLEEP_MODE) \
||(n==CAN_RXPOLARITY_MODE)||(n==CAN_TEST_MODE))
Macro to check Operation Mode

Definition at line 510 of file lpc17xx_can.h.

#define PARAM_MSG_DISABLE ( n ) ((n==MSG_ENABLE)|(n==MSG_DISABLE))

Macro define for struct AF_Section parameter

Definition at line 519 of file lpc17xx_can.h.

#define PARAM_POSITION ( n ) ((n>=0)&&(n<512))

Macro to check position

Definition at line 535 of file lpc17xx_can.h.

#define PRAM_I2S_FREQ ( freq ) ((freq>=16000)&&(freq <= 96000))

Macro to check frequency value

Definition at line 481 of file lpc17xx_can.h.

Generated on Tue Jun 7 14:59:32 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: CAN Public Types

CAN Public Types
[CAN]

Data Structures

struct | CAN_PinCFG_Type
Pin Configuration structure. More...
struct | CAN_MSG_Type
CAN message object structure. More...
struct | FullCAN_Entry
FullCAN Entry structure. More...
struct | SFF_Entry
Standard ID Frame Format Entry structure. More...
struct | SFF_GPR_Entry
Group of Standard ID Frame Format Entry structure. More...
struct | EFF_Entry
Extended ID Frame Format Entry structure. More...
struct | EFF_GPR_Entry
Group of Extended ID Frame Format Entry structure. More...
struct | AF_SectionDef
Acceptance Filter Section Table structure. More...

Enumerations

enum | CAN_ID_FORMAT_Type { STD_ID_FORMAT = 0, EXT_ID_FORMAT = 1 }
CAN ID format definition. More...
enum AFLUT_ENTRY_Type {
FULLCAN_ENTRY = 0, EXPLICIT_STANDARD_ENTRY, GROUP_STANDARD_ENTRY, EXPLICIT_EXTEND_ENTRY,
GROUP_EXTEND_ENTRY
}
AFLUT Entry type definition. More...
enum | CAN_FRAME_Type { DATA_FRAME = 0, REMOTE_FRAME = 1 }
Symbolic names for type of CAN message. More...
enum | CAN_CTRL_STS_Type { CANCTRL_GLOBAL_STS = 0, CANCTRL_INT_CAP, CANCTRL_ERR_WRN, CANCTRL_STS }
CAN Control status definition. More...
enum | CAN_CR_STS_Type { CANCR_TX_STS = 0, CANCR_RX_STS, CANCR_MS }
Central CAN status type definition. More...
enum | FullCAN_IC_Type { FULLCAN_IC0, FULLCAN_IC1 }
FullCAN Interrupt Capture type definition. More...
enum CAN_INT_EN_Type {
CANINT_RIE = 0, CANINT_TIE1, CANINT_EIE, CANINT_DOIE,
CANINT_WUIE, CANINT_EPIE, CANINT_ALIE, CANINT_BEIE,
CANINT_IDIE, CANINT_TIE2, CANINT_TIE3, CANINT_FCE
}
CAN interrupt enable type definition. More...
enum | CAN_AFMODE_Type { CAN_Normal = 0, CAN_AccOff, CAN_AccBP, CAN_eFCAN }
Acceptance Filter Mode type definition. More...
enum CAN_MODE_Type {
CAN_OPERATING_MODE = 0, CAN_RESET_MODE, CAN_LISTENONLY_MODE, CAN_SELFTEST_MODE,
CAN_TXPRIORITY_MODE, CAN_SLEEP_MODE, CAN_RXPOLARITY_MODE, CAN_TEST_MODE
}
CAN Mode Type definition. More...
enum CAN_ERROR {
CAN_OK = 1, CAN_OBJECTS_FULL_ERROR, CAN_FULL_OBJ_NOT_RCV, CAN_NO_RECEIVE_DATA,
CAN_AF_ENTRY_ERROR, CAN_CONFLICT_ID_ERROR, CAN_ENTRY_NOT_EXIT_ERROR
}
Error values that functions can return. More...

Enumeration Type Documentation

enum AFLUT_ENTRY_Type

AFLUT Entry type definition.

Enumerator:
FULLCAN_ENTRY
EXPLICIT_STANDARD_ENTRY
GROUP_STANDARD_ENTRY
EXPLICIT_EXTEND_ENTRY
GROUP_EXTEND_ENTRY

Definition at line 561 of file lpc17xx_can.h.

enum CAN_AFMODE_Type

Acceptance Filter Mode type definition.

Enumerator:
CAN_Normal | Normal Mode
CAN_AccOff | Acceptance Filter Off Mode
CAN_AccBP | Acceptance Fileter Bypass Mode
CAN_eFCAN | FullCAN Mode Enhancement

Definition at line 625 of file lpc17xx_can.h.

enum CAN_CR_STS_Type

Central CAN status type definition.

Enumerator:
CANCR_TX_STS | Central CAN Tx Status
CANCR_RX_STS | Central CAN Rx Status
CANCR_MS | Central CAN Miscellaneous Status

Definition at line 590 of file lpc17xx_can.h.

enum CAN_CTRL_STS_Type

CAN Control status definition.

Enumerator:
CANCTRL_GLOBAL_STS | CAN Global Status
CANCTRL_INT_CAP | CAN Interrupt and Capture
CANCTRL_ERR_WRN | CAN Error Warning Limit
CANCTRL_STS | CAN Control Status

Definition at line 580 of file lpc17xx_can.h.

enum CAN_ERROR

Error values that functions can return.

Enumerator:
CAN_OK | No error
CAN_OBJECTS_FULL_ERROR | No more rx or tx objects available
CAN_FULL_OBJ_NOT_RCV | Full CAN object not received
CAN_NO_RECEIVE_DATA | No have receive data available
CAN_AF_ENTRY_ERROR | Entry load in AFLUT is unvalid
CAN_CONFLICT_ID_ERROR | Conflict ID occur
CAN_ENTRY_NOT_EXIT_ERROR | Entry remove outo AFLUT is not exit

Definition at line 649 of file lpc17xx_can.h.

enum CAN_FRAME_Type

Symbolic names for type of CAN message.

Enumerator:
DATA_FRAME | Data frame
REMOTE_FRAME | Remote frame

Definition at line 572 of file lpc17xx_can.h.

enum CAN_ID_FORMAT_Type

CAN ID format definition.

CAN configuration structure

Enumerator:
STD_ID_FORMAT | Use standard ID format (11 bit ID)
EXT_ID_FORMAT | Use extended ID format (29 bit ID)

Definition at line 553 of file lpc17xx_can.h.

enum CAN_INT_EN_Type

CAN interrupt enable type definition.

Enumerator:
CANINT_RIE | CAN Receiver Interrupt Enable
CANINT_TIE1 | CAN Transmit Interrupt Enable
CANINT_EIE | CAN Error Warning Interrupt Enable
CANINT_DOIE | CAN Data Overrun Interrupt Enable
CANINT_WUIE | CAN Wake-Up Interrupt Enable
CANINT_EPIE | CAN Error Passive Interrupt Enable
CANINT_ALIE | CAN Arbitration Lost Interrupt Enable
CANINT_BEIE | CAN Bus Error Inter rupt Enable
CANINT_IDIE | CAN ID Ready Interrupt Enable
CANINT_TIE2 | CAN Transmit Interrupt Enable for Buffer2
CANINT_TIE3 | CAN Transmit Interrupt Enable for Buffer3
CANINT_FCE | FullCAN Interrupt Enable

Definition at line 607 of file lpc17xx_can.h.

enum CAN_MODE_Type

CAN Mode Type definition.

Enumerator:
CAN_OPERATING_MODE | Operating Mode
CAN_RESET_MODE | Reset Mode
CAN_LISTENONLY_MODE | Listen Only Mode
CAN_SELFTEST_MODE | Seft Test Mode
CAN_TXPRIORITY_MODE | Transmit Priority Mode
CAN_SLEEP_MODE | Sleep Mode
CAN_RXPOLARITY_MODE | Receive Polarity Mode
CAN_TEST_MODE | Test Mode

Definition at line 635 of file lpc17xx_can.h.

enum FullCAN_IC_Type

FullCAN Interrupt Capture type definition.

Enumerator:
FULLCAN_IC0 | FullCAN Interrupt and Capture 0
FULLCAN_IC1 | FullCAN Interrupt and Capture 1

Definition at line 599 of file lpc17xx_can.h.

Generated on Tue Jun 7 14:59:32 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: CAN Public Functions

CAN Public Functions
[CAN]

Functions

void | CAN_Init (LPC_CAN_TypeDef *CANx, uint32_t baudrate)
Initialize CAN peripheral with given baudrate.
void | CAN_DeInit (LPC_CAN_TypeDef *CANx)
CAN deInit.
Status | CAN_SendMsg (LPC_CAN_TypeDef *CANx, CAN_MSG_Type *CAN_Msg)
Send message data.
Status | CAN_ReceiveMsg (LPC_CAN_TypeDef *CANx, CAN_MSG_Type *CAN_Msg)
Receive message data.
CAN_ERROR | FCAN_ReadObj (LPC_CANAF_TypeDef *CANAFx, CAN_MSG_Type *CAN_Msg)
Receive FullCAN Object.
void | CAN_ModeConfig (LPC_CAN_TypeDef *CANx, CAN_MODE_Type mode, FunctionalState NewState)
Enable/Disable CAN Mode.
void | CAN_SetAFMode (LPC_CANAF_TypeDef *CANAFx, CAN_AFMODE_Type AFMode)
Setting Acceptance Filter mode.
void | CAN_SetCommand (LPC_CAN_TypeDef *CANx, uint32_t CMRType)
Set CAN command request.
CAN_ERROR | CAN_SetupAFLUT (LPC_CANAF_TypeDef *CANAFx, AF_SectionDef *AFSection)
Setup Acceptance Filter Look-Up Table.
CAN_ERROR | CAN_LoadFullCANEntry (LPC_CAN_TypeDef *CANx, uint16_t id)
Load FullCAN entry into AFLUT.
CAN_ERROR | CAN_LoadExplicitEntry (LPC_CAN_TypeDef *CANx, uint32_t id, CAN_ID_FORMAT_Type format)
Add Explicit ID into AF Look-Up Table dynamically.
CAN_ERROR | CAN_LoadGroupEntry (LPC_CAN_TypeDef *CANx, uint32_t lowerID, uint32_t upperID, CAN_ID_FORMAT_Type format)
Load Group entry into AFLUT.
CAN_ERROR | CAN_RemoveEntry (AFLUT_ENTRY_Type EntryType, uint16_t position)
Remove AFLUT entry (FullCAN entry and Explicit Standard entry).
void | CAN_IRQCmd (LPC_CAN_TypeDef *CANx, CAN_INT_EN_Type arg, FunctionalState NewState)
Enable/Disable CAN Interrupt.
uint32_t | CAN_IntGetStatus (LPC_CAN_TypeDef *CANx)
Get CAN interrupt status.
IntStatus | CAN_FullCANIntGetStatus (LPC_CANAF_TypeDef *CANAFx)
Check if FullCAN interrupt enable or not.
uint32_t | CAN_FullCANPendGetStatus (LPC_CANAF_TypeDef *CANAFx, FullCAN_IC_Type type)
Get value of FullCAN interrupt and capture register.
uint32_t | CAN_GetCTRLStatus (LPC_CAN_TypeDef *CANx, CAN_CTRL_STS_Type arg)
Get CAN Control Status.
uint32_t | CAN_GetCRStatus (LPC_CANCR_TypeDef *CANCRx, CAN_CR_STS_Type arg)
Get CAN Central Status.

Function Documentation

void CAN_DeInit ( LPC_CAN_TypeDef * CANx )

CAN deInit.

Parameters:
[in] CANx pointer to LPC_CAN_TypeDef, should be:
  • LPC_CAN1: CAN1 peripheral
  • LPC_CAN2: CAN2 peripheral
Returns:
None

Definition at line 200 of file lpc17xx_can.c.

IntStatus CAN_FullCANIntGetStatus ( LPC_CANAF_TypeDef * CANAFx )

Check if FullCAN interrupt enable or not.

Parameters:
[in] CANAFx point to LPC_CANAF_TypeDef object, should be: LPC_CANAF
Returns:
IntStatus, could be:
  • SET: if FullCAN interrupt is enable
  • RESET: if FullCAN interrupt is disable

Definition at line 1899 of file lpc17xx_can.c.

uint32_t CAN_FullCANPendGetStatus | ( | LPC_CANAF_TypeDef * | CANAFx,
 |  | FullCAN_IC_Type | type
 | ) |  |

Get value of FullCAN interrupt and capture register.

Parameters:
[in] CANAFx point to LPC_CANAF_TypeDef object, should be: LPC_CANAF
[in] type,: FullCAN IC type, should be:
  • FULLCAN_IC0: FullCAN Interrupt Capture 0
  • FULLCAN_IC1: FullCAN Interrupt Capture 1
Returns:
FCANIC0 or FCANIC1 (FullCAN interrupt and Capture register) value

Definition at line 1915 of file lpc17xx_can.c.

uint32_t CAN_GetCRStatus | ( | LPC_CANCR_TypeDef * | CANCRx,
 |  | CAN_CR_STS_Type | arg
 | ) |  |

Get CAN Central Status.

Parameters:
[in] CANCRx point to LPC_CANCR_TypeDef, should be: LPC_CANCR
[in] arg,: type of CAN status to get from CAN Central status register Should be:
  • CANCR_TX_STS: Central CAN Tx Status
  • CANCR_RX_STS: Central CAN Rx Status
  • CANCR_MS: Central CAN Miscellaneous Status
Returns:
Current Central Status that you want to get value

Definition at line 1677 of file lpc17xx_can.c.

uint32_t CAN_GetCTRLStatus | ( | LPC_CAN_TypeDef * | CANx,
 |  | CAN_CTRL_STS_Type | arg
 | ) |  |

Get CAN Control Status.

Parameters:
[in] CANx pointer to LPC_CAN_TypeDef, should be:
  • LPC_CAN1: CAN1 peripheral
  • LPC_CAN2: CAN2 peripheral
[in] arg,: type of CAN status to get from CAN status register Should be:
  • CANCTRL_GLOBAL_STS: CAN Global Status
  • CANCTRL_INT_CAP: CAN Interrupt and Capture
  • CANCTRL_ERR_WRN: CAN Error Warning Limit
  • CANCTRL_STS: CAN Control Status
Returns:
Current Control Status that you want to get value

Definition at line 1647 of file lpc17xx_can.c.

void CAN_Init | ( | LPC_CAN_TypeDef * | CANx,
 |  | uint32_t | baudrate
 | ) |  |

Initialize CAN peripheral with given baudrate.

Parameters:
[in] CANx pointer to LPC_CAN_TypeDef, should be:
  • LPC_CAN1: CAN1 peripheral
  • LPC_CAN2: CAN2 peripheral
[in] baudrate,: the value of CAN baudrate will be set (bps)
Returns:
None

Definition at line 142 of file lpc17xx_can.c.

uint32_t CAN_IntGetStatus ( LPC_CAN_TypeDef * CANx )

Get CAN interrupt status.

Parameters:
[in] CANx point to CAN peripheral selected, should be:
  • LPC_CAN1: CAN1 peripheral
  • LPC_CAN2: CAN2 peripheral
Returns:
CANICR (CAN interrupt and Capture register) value

Definition at line 1886 of file lpc17xx_can.c.

void CAN_IRQCmd | ( | LPC_CAN_TypeDef * | CANx,
 |  | CAN_INT_EN_Type | arg,
 |  | FunctionalState | NewState
 | ) |  |

Enable/Disable CAN Interrupt.

Parameters:
[in] CANx pointer to LPC_CAN_TypeDef, should be:
  • LPC_CAN1: CAN1 peripheral
  • LPC_CAN2: CAN2 peripheral
[in] arg,: type of CAN interrupt that you want to enable/disable Should be:
  • CANINT_RIE: CAN Receiver Interrupt Enable
  • CANINT_TIE1: CAN Transmit Interrupt Enable
  • CANINT_EIE: CAN Error Warning Interrupt Enable
  • CANINT_DOIE: CAN Data Overrun Interrupt Enable
  • CANINT_WUIE: CAN Wake-Up Interrupt Enable
  • CANINT_EPIE: CAN Error Passive Interrupt Enable
  • CANINT_ALIE: CAN Arbitration Lost Interrupt Enable
  • CANINT_BEIE: CAN Bus Error Interrupt Enable
  • CANINT_IDIE: CAN ID Ready Interrupt Enable
  • CANINT_TIE2: CAN Transmit Interrupt Enable for Buffer2
  • CANINT_TIE3: CAN Transmit Interrupt Enable for Buffer3
  • CANINT_FCE: FullCAN Interrupt Enable
[in] NewState,: New state of this function, should be:
  • ENABLE
  • DISABLE
Returns:
none

Definition at line 1718 of file lpc17xx_can.c.

CAN_ERROR CAN_LoadExplicitEntry | ( | LPC_CAN_TypeDef * | CANx,
 |  | uint32_t | id,
 |  | CAN_ID_FORMAT_Type | format
 | ) |  |

Add Explicit ID into AF Look-Up Table dynamically.

Parameters:
[in] CANx pointer to LPC_CAN_TypeDef, should be:
  • LPC_CAN1: CAN1 peripheral
  • LPC_CAN2: CAN2 peripheral
[in] id,: The ID of entry will be added
[in] format,: is the type of ID Frame Format, should be:
  • STD_ID_FORMAT: 11-bit ID value
  • EXT_ID_FORMAT: 29-bit ID value
Returns:
CAN Error, could be:
  • CAN_OBJECTS_FULL_ERROR: No more rx or tx objects available
  • CAN_ID_EXIT_ERROR: ID exited in table
  • CAN_OK: ID is added into table successfully

Definition at line 497 of file lpc17xx_can.c.

CAN_ERROR CAN_LoadFullCANEntry | ( | LPC_CAN_TypeDef * | CANx,
 |  | uint16_t | id
 | ) |  |

Load FullCAN entry into AFLUT.

Parameters:
[in] CANx,: CAN peripheral selected, should be:
  • LPC_CAN1: CAN1 peripheral
  • LPC_CAN2: CAN2 peripheral
[in] id,: identifier of entry that will be added
Returns:
CAN_ERROR, could be:
  • CAN_OK: loading is successful
  • CAN_ID_EXIT_ERROR: ID exited in FullCAN Section
  • CAN_OBJECTS_FULL_ERROR: no more space available

Definition at line 706 of file lpc17xx_can.c.

CAN_ERROR CAN_LoadGroupEntry | ( | LPC_CAN_TypeDef * | CANx,
 |  | uint32_t | lowerID,
 |  | uint32_t | upperID,
 |  | CAN_ID_FORMAT_Type | format
 | ) |  |

Load Group entry into AFLUT.

Parameters:
[in] CANx,: CAN peripheral selected, should be:
  • LPC_CAN1: CAN1 peripheral
  • LPC_CAN2: CAN2 peripheral
[in] lowerID,upperID,: lower and upper identifier of entry
[in] format,: type of ID format, should be:
  • STD_ID_FORMAT: Standard ID format (11-bit value)
  • EXT_ID_FORMAT: Extended ID format (29-bit value)
Returns:
CAN_ERROR, could be:
  • CAN_OK: loading is successful
  • CAN_CONFLICT_ID_ERROR: Conflict ID occurs
  • CAN_OBJECTS_FULL_ERROR: no more space available

Definition at line 895 of file lpc17xx_can.c.

void CAN_ModeConfig | ( | LPC_CAN_TypeDef * | CANx,
 |  | CAN_MODE_Type | mode,
 |  | FunctionalState | NewState
 | ) |  |

Enable/Disable CAN Mode.

Parameters:
[in] CANx pointer to LPC_CAN_TypeDef, should be:
  • LPC_CAN1: CAN1 peripheral
  • LPC_CAN2: CAN2 peripheral
[in] mode,: type of CAN mode that you want to enable/disable, should be:
  • CAN_OPERATING_MODE: Normal Operating Mode
  • CAN_RESET_MODE: Reset Mode
  • CAN_LISTENONLY_MODE: Listen Only Mode
  • CAN_SELFTEST_MODE: Self Test Mode
  • CAN_TXPRIORITY_MODE: Transmit Priority Mode
  • CAN_SLEEP_MODE: Sleep Mode
  • CAN_RXPOLARITY_MODE: Receive Polarity Mode
  • CAN_TEST_MODE: Test Mode
[in] NewState,: New State of this function, should be:
  • ENABLE
  • DISABLE
Returns:
none

Definition at line 1798 of file lpc17xx_can.c.

Status CAN_ReceiveMsg | ( | LPC_CAN_TypeDef * | CANx,
 |  | CAN_MSG_Type * | CAN_Msg
 | ) |  |

Receive message data.

Parameters:
[in] CANx pointer to LPC_CAN_TypeDef, should be:
  • LPC_CAN1: CAN1 peripheral
  • LPC_CAN2: CAN2 peripheral
[in] CAN_Msg point to the CAN_MSG_Type Struct, it will contain received message information such as: ID, DLC, RTR, ID Format
Returns:
Status:
  • SUCCESS: receive message successfully
  • ERROR: receive message unsuccessfully

Definition at line 1493 of file lpc17xx_can.c.

CAN_ERROR CAN_RemoveEntry | ( | AFLUT_ENTRY_Type | EntryType,
 |  | uint16_t | position
 | ) |  |

Remove AFLUT entry (FullCAN entry and Explicit Standard entry).

Parameters:
[in] EntryType,: the type of entry that want to remove, should be:
  • FULLCAN_ENTRY
  • EXPLICIT_STANDARD_ENTRY
  • GROUP_STANDARD_ENTRY
  • EXPLICIT_EXTEND_ENTRY
  • GROUP_EXTEND_ENTRY
[in] position,: the position of this entry in its section Note: the first position is 0
Returns:
CAN_ERROR, could be:
  • CAN_OK: removing is successful
  • CAN_ENTRY_NOT_EXIT_ERROR: entry want to remove is not exit

Definition at line 1100 of file lpc17xx_can.c.

Status CAN_SendMsg | ( | LPC_CAN_TypeDef * | CANx,
 |  | CAN_MSG_Type * | CAN_Msg
 | ) |  |

Send message data.

Parameters:
[in] CANx pointer to LPC_CAN_TypeDef, should be:
  • LPC_CAN1: CAN1 peripheral
  • LPC_CAN2: CAN2 peripheral
[in] CAN_Msg point to the CAN_MSG_Type Structure, it contains message information such as: ID, DLC, RTR, ID Format
Returns:
Status:
  • SUCCESS: send message successfully
  • ERROR: send message unsuccessfully

Definition at line 1340 of file lpc17xx_can.c.

void CAN_SetAFMode | ( | LPC_CANAF_TypeDef * | CANAFx,
 |  | CAN_AFMODE_Type | AFMode
 | ) |  |

Setting Acceptance Filter mode.

Parameters:
[in] CANAFx point to LPC_CANAF_TypeDef object, should be: LPC_CANAF
[in] AFMode,: type of AF mode that you want to set, should be:
  • CAN_Normal: Normal mode
  • CAN_AccOff: Acceptance Filter Off Mode
  • CAN_AccBP: Acceptance Fileter Bypass Mode
  • CAN_eFCAN: FullCAN Mode Enhancement
Returns:
none

Definition at line 1757 of file lpc17xx_can.c.

void CAN_SetCommand | ( | LPC_CAN_TypeDef * | CANx,
 |  | uint32_t | CMRType
 | ) |  |

Set CAN command request.

Parameters:
[in] CANx point to CAN peripheral selected, should be:
  • LPC_CAN1: CAN1 peripheral
  • LPC_CAN2: CAN2 peripheral
[in] CMRType command request type, should be:
  • CAN_CMR_TR: Transmission request
  • CAN_CMR_AT: Abort Transmission request
  • CAN_CMR_RRB: Release Receive Buffer request
  • CAN_CMR_CDO: Clear Data Overrun request
  • CAN_CMR_SRR: Self Reception request
  • CAN_CMR_STB1: Select Tx Buffer 1 request
  • CAN_CMR_STB2: Select Tx Buffer 2 request
  • CAN_CMR_STB3: Select Tx Buffer 3 request
Returns:
CANICR (CAN interrupt and Capture register) value

Definition at line 1873 of file lpc17xx_can.c.

CAN_ERROR CAN_SetupAFLUT | ( | LPC_CANAF_TypeDef * | CANAFx,
 |  | AF_SectionDef * | AFSection
 | ) |  |

Setup Acceptance Filter Look-Up Table.

Parameters:
[in] | CANAFx | pointer to LPC_CANAF_TypeDef Should be: LPC_CANAF
[in] | AFSection | the pointer to AF_SectionDef structure It contain information about 5 sections will be install in AFLUT
Returns:
CAN Error could be:
  • CAN_OBJECTS_FULL_ERROR: No more rx or tx objects available
  • CAN_AF_ENTRY_ERROR: table error-violation of ascending numerical order
  • CAN_OK: ID is added into table successfully

Definition at line 227 of file lpc17xx_can.c.

CAN_ERROR FCAN_ReadObj | ( | LPC_CANAF_TypeDef * | CANAFx,
 |  | CAN_MSG_Type * | CAN_Msg
 | ) |  |

Receive FullCAN Object.

Parameters:
[in] CANAFx,: CAN Acceptance Filter register, should be: LPC_CANAF
[in] CAN_Msg point to the CAN_MSG_Type Struct, it will contain received message information such as: ID, DLC, RTR, ID Format
Returns:
CAN_ERROR, could be:
  • CAN_FULL_OBJ_NOT_RCV: FullCAN Object is not be received
  • CAN_OK: Received FullCAN Object successful

Definition at line 1558 of file lpc17xx_can.c.

Generated on Tue Jun 7 14:59:32 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: CAN Private Variables

CAN Private Variables
[CAN]

Variables

FunctionalState FULLCAN_ENABLE
uint16_t | CANAF_FullCAN_cnt = 0
uint16_t | CANAF_std_cnt = 0
uint16_t | CANAF_gstd_cnt = 0
uint16_t | CANAF_ext_cnt = 0
uint16_t | CANAF_gext_cnt = 0

Variable Documentation

uint16_t CANAF_ext_cnt = 0

Definition at line 60 of file lpc17xx_can.c.

uint16_t CANAF_FullCAN_cnt = 0

Definition at line 57 of file lpc17xx_can.c.

uint16_t CANAF_gext_cnt = 0

Definition at line 61 of file lpc17xx_can.c.

uint16_t CANAF_gstd_cnt = 0

Definition at line 59 of file lpc17xx_can.c.

uint16_t CANAF_std_cnt = 0

Definition at line 58 of file lpc17xx_can.c.

FunctionalState FULLCAN_ENABLE

Definition at line 53 of file lpc17xx_can.c.

Generated on Tue Jun 7 14:59:43 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: CLKPWR

CLKPWR
[LPC1700CMSIS Firmware Library]

Modules

CLKPWR Public Macros
CLKPWR Private Macros
CLKPWR Public Functions
Generated on Tue Jun 7 14:59:32 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: CLKPWR Public Macros

CLKPWR Public Macros
[CLKPWR]

Defines

#define | CLKPWR_PCLKSEL_WDT ((uint32_t)(0))
#define | CLKPWR_PCLKSEL_TIMER0 ((uint32_t)(2))
#define | CLKPWR_PCLKSEL_TIMER1 ((uint32_t)(4))
#define | CLKPWR_PCLKSEL_UART0 ((uint32_t)(6))
#define | CLKPWR_PCLKSEL_UART1 ((uint32_t)(8))
#define | CLKPWR_PCLKSEL_PWM1 ((uint32_t)(12))
#define | CLKPWR_PCLKSEL_I2C0 ((uint32_t)(14))
#define | CLKPWR_PCLKSEL_SPI ((uint32_t)(16))
#define | CLKPWR_PCLKSEL_SSP1 ((uint32_t)(20))
#define | CLKPWR_PCLKSEL_DAC ((uint32_t)(22))
#define | CLKPWR_PCLKSEL_ADC ((uint32_t)(24))
#define | CLKPWR_PCLKSEL_CAN1 ((uint32_t)(26))
#define | CLKPWR_PCLKSEL_CAN2 ((uint32_t)(28))
#define | CLKPWR_PCLKSEL_ACF ((uint32_t)(30))
#define | CLKPWR_PCLKSEL_QEI ((uint32_t)(32))
#define | CLKPWR_PCLKSEL_PCB ((uint32_t)(36))
#define | CLKPWR_PCLKSEL_I2C1 ((uint32_t)(38))
#define | CLKPWR_PCLKSEL_SSP0 ((uint32_t)(42))
#define | CLKPWR_PCLKSEL_TIMER2 ((uint32_t)(44))
#define | CLKPWR_PCLKSEL_TIMER3 ((uint32_t)(46))
#define | CLKPWR_PCLKSEL_UART2 ((uint32_t)(48))
#define | CLKPWR_PCLKSEL_UART3 ((uint32_t)(50))
#define | CLKPWR_PCLKSEL_I2C2 ((uint32_t)(52))
#define | CLKPWR_PCLKSEL_I2S ((uint32_t)(54))
#define | CLKPWR_PCLKSEL_RIT ((uint32_t)(58))
#define | CLKPWR_PCLKSEL_SYSCON ((uint32_t)(60))
#define | CLKPWR_PCLKSEL_MC ((uint32_t)(62))
#define | CLKPWR_PCLKSEL_CCLK_DIV_4 ((uint32_t)(0))
#define | CLKPWR_PCLKSEL_CCLK_DIV_1 ((uint32_t)(1))
#define | CLKPWR_PCLKSEL_CCLK_DIV_2 ((uint32_t)(2))
#define | CLKPWR_PCONP_PCTIM0 ((uint32_t)(1<<1))
#define | CLKPWR_PCONP_PCTIM1 ((uint32_t)(1<<2))
#define | CLKPWR_PCONP_PCUART0 ((uint32_t)(1<<3))
#define | CLKPWR_PCONP_PCUART1 ((uint32_t)(1<<4))
#define | CLKPWR_PCONP_PCPWM1 ((uint32_t)(1<<6))
#define | CLKPWR_PCONP_PCI2C0 ((uint32_t)(1<<7))
#define | CLKPWR_PCONP_PCSPI ((uint32_t)(1<<8))
#define | CLKPWR_PCONP_PCRTC ((uint32_t)(1<<9))
#define | CLKPWR_PCONP_PCSSP1 ((uint32_t)(1<<10))
#define | CLKPWR_PCONP_PCAD ((uint32_t)(1<<12))
#define | CLKPWR_PCONP_PCAN1 ((uint32_t)(1<<13))
#define | CLKPWR_PCONP_PCAN2 ((uint32_t)(1<<14))
#define | CLKPWR_PCONP_PCGPIO ((uint32_t)(1<<15))
#define | CLKPWR_PCONP_PCRIT ((uint32_t)(1<<16))
#define | CLKPWR_PCONP_PCMC ((uint32_t)(1<<17))
#define | CLKPWR_PCONP_PCQEI ((uint32_t)(1<<18))
#define | CLKPWR_PCONP_PCI2C1 ((uint32_t)(1<<19))
#define | CLKPWR_PCONP_PCSSP0 ((uint32_t)(1<<21))
#define | CLKPWR_PCONP_PCTIM2 ((uint32_t)(1<<22))
#define | CLKPWR_PCONP_PCTIM3 ((uint32_t)(1<<23))
#define | CLKPWR_PCONP_PCUART2 ((uint32_t)(1<<24))
#define | CLKPWR_PCONP_PCUART3 ((uint32_t)(1<<25))
#define | CLKPWR_PCONP_PCI2C2 ((uint32_t)(1<<26))
#define | CLKPWR_PCONP_PCI2S ((uint32_t)(1<<27))
#define | CLKPWR_PCONP_PCGPDMA ((uint32_t)(1<<29))
#define | CLKPWR_PCONP_PCENET ((uint32_t)(1<<30))
#define | CLKPWR_PCONP_PCUSB ((uint32_t)(1<<31))

Define Documentation

#define CLKPWR_PCLKSEL_ACF ((uint32_t)(30))

Peripheral clock divider bit position for ACF

Definition at line 80 of file lpc17xx_clkpwr.h.

#define CLKPWR_PCLKSEL_ADC ((uint32_t)(24))

Peripheral clock divider bit position for ADC

Definition at line 74 of file lpc17xx_clkpwr.h.

#define CLKPWR_PCLKSEL_CAN1 ((uint32_t)(26))

Peripheral clock divider bit position for CAN1

Definition at line 76 of file lpc17xx_clkpwr.h.

#define CLKPWR_PCLKSEL_CAN2 ((uint32_t)(28))

Peripheral clock divider bit position for CAN2

Definition at line 78 of file lpc17xx_clkpwr.h.

#define CLKPWR_PCLKSEL_CCLK_DIV_1 ((uint32_t)(1))

Peripheral clock divider is the same with CCLK

Definition at line 115 of file lpc17xx_clkpwr.h.

#define CLKPWR_PCLKSEL_CCLK_DIV_2 ((uint32_t)(2))

Peripheral clock divider is set to 2 from CCLK

Definition at line 117 of file lpc17xx_clkpwr.h.

#define CLKPWR_PCLKSEL_CCLK_DIV_4 ((uint32_t)(0))

Macro for Peripheral Clock Selection register bit values Note: When CCLK_DIV_8, Peripheral’s clock is selected to PCLK_xyz = CCLK/8 except for CAN1, CAN2, and CAN filtering when ’11’selects PCLK_xyz = CCLK/6

Definition at line 113 of file lpc17xx_clkpwr.h.

#define CLKPWR_PCLKSEL_DAC ((uint32_t)(22))

Peripheral clock divider bit position for DAC

Definition at line 72 of file lpc17xx_clkpwr.h.

#define CLKPWR_PCLKSEL_I2C0 ((uint32_t)(14))

Peripheral clock divider bit position for I2C0

Definition at line 66 of file lpc17xx_clkpwr.h.

#define CLKPWR_PCLKSEL_I2C1 ((uint32_t)(38))

Peripheral clock divider bit position for I2C1

Definition at line 86 of file lpc17xx_clkpwr.h.

#define CLKPWR_PCLKSEL_I2C2 ((uint32_t)(52))

Peripheral clock divider bit position for I2C2

Definition at line 98 of file lpc17xx_clkpwr.h.

#define CLKPWR_PCLKSEL_I2S ((uint32_t)(54))

Peripheral clock divider bit position for I2S

Definition at line 100 of file lpc17xx_clkpwr.h.

#define CLKPWR_PCLKSEL_MC ((uint32_t)(62))

Peripheral clock divider bit position for MC

Definition at line 106 of file lpc17xx_clkpwr.h.

#define CLKPWR_PCLKSEL_PCB ((uint32_t)(36))

Peripheral clock divider bit position for PCB

Definition at line 84 of file lpc17xx_clkpwr.h.

#define CLKPWR_PCLKSEL_PWM1 ((uint32_t)(12))

Peripheral clock divider bit position for PWM1

Definition at line 64 of file lpc17xx_clkpwr.h.

#define CLKPWR_PCLKSEL_QEI ((uint32_t)(32))

Peripheral clock divider bit position for QEI

Definition at line 82 of file lpc17xx_clkpwr.h.

#define CLKPWR_PCLKSEL_RIT ((uint32_t)(58))

Peripheral clock divider bit position for RIT

Definition at line 102 of file lpc17xx_clkpwr.h.

#define CLKPWR_PCLKSEL_SPI ((uint32_t)(16))

Peripheral clock divider bit position for SPI

Definition at line 68 of file lpc17xx_clkpwr.h.

#define CLKPWR_PCLKSEL_SSP0 ((uint32_t)(42))

Peripheral clock divider bit position for SSP0

Definition at line 88 of file lpc17xx_clkpwr.h.

#define CLKPWR_PCLKSEL_SSP1 ((uint32_t)(20))

Peripheral clock divider bit position for SSP1

Definition at line 70 of file lpc17xx_clkpwr.h.

#define CLKPWR_PCLKSEL_SYSCON ((uint32_t)(60))

Peripheral clock divider bit position for SYSCON

Definition at line 104 of file lpc17xx_clkpwr.h.

#define CLKPWR_PCLKSEL_TIMER0 ((uint32_t)(2))

Peripheral clock divider bit position for TIMER0

Definition at line 56 of file lpc17xx_clkpwr.h.

#define CLKPWR_PCLKSEL_TIMER1 ((uint32_t)(4))

Peripheral clock divider bit position for TIMER1

Definition at line 58 of file lpc17xx_clkpwr.h.

#define CLKPWR_PCLKSEL_TIMER2 ((uint32_t)(44))

Peripheral clock divider bit position for TIMER2

Definition at line 90 of file lpc17xx_clkpwr.h.

#define CLKPWR_PCLKSEL_TIMER3 ((uint32_t)(46))

Peripheral clock divider bit position for TIMER3

Definition at line 92 of file lpc17xx_clkpwr.h.

#define CLKPWR_PCLKSEL_UART0 ((uint32_t)(6))

Peripheral clock divider bit position for UART0

Definition at line 60 of file lpc17xx_clkpwr.h.

#define CLKPWR_PCLKSEL_UART1 ((uint32_t)(8))

Peripheral clock divider bit position for UART1

Definition at line 62 of file lpc17xx_clkpwr.h.

#define CLKPWR_PCLKSEL_UART2 ((uint32_t)(48))

Peripheral clock divider bit position for UART2

Definition at line 94 of file lpc17xx_clkpwr.h.

#define CLKPWR_PCLKSEL_UART3 ((uint32_t)(50))

Peripheral clock divider bit position for UART3

Definition at line 96 of file lpc17xx_clkpwr.h.

#define CLKPWR_PCLKSEL_WDT ((uint32_t)(0))

Peripheral clock divider bit position for WDT

Definition at line 54 of file lpc17xx_clkpwr.h.

#define CLKPWR_PCONP_PCAD ((uint32_t)(1<<12))

A/D converter 0 (ADC0) power/clock control bit

Definition at line 142 of file lpc17xx_clkpwr.h.

#define CLKPWR_PCONP_PCAN1 ((uint32_t)(1<<13))

CAN Controller 1 power/clock control bit

Definition at line 144 of file lpc17xx_clkpwr.h.

#define CLKPWR_PCONP_PCAN2 ((uint32_t)(1<<14))

CAN Controller 2 power/clock control bit

Definition at line 146 of file lpc17xx_clkpwr.h.

#define CLKPWR_PCONP_PCENET ((uint32_t)(1<<30))

Ethernet block power/clock control bit

Definition at line 174 of file lpc17xx_clkpwr.h.

#define CLKPWR_PCONP_PCGPDMA ((uint32_t)(1<<29))

GP DMA function power/clock control bit

Definition at line 172 of file lpc17xx_clkpwr.h.

#define CLKPWR_PCONP_PCGPIO ((uint32_t)(1<<15))

GPIO power/clock control bit

Definition at line 148 of file lpc17xx_clkpwr.h.

#define CLKPWR_PCONP_PCI2C0 ((uint32_t)(1<<7))

The I2C0 interface power/clock control bit

Definition at line 134 of file lpc17xx_clkpwr.h.

#define CLKPWR_PCONP_PCI2C1 ((uint32_t)(1<<19))

The I2C1 interface power/clock control bit

Definition at line 156 of file lpc17xx_clkpwr.h.

#define CLKPWR_PCONP_PCI2C2 ((uint32_t)(1<<26))

I2C interface 2 power/clock control bit

Definition at line 168 of file lpc17xx_clkpwr.h.

#define CLKPWR_PCONP_PCI2S ((uint32_t)(1<<27))

I2S interface power/clock control bit

Definition at line 170 of file lpc17xx_clkpwr.h.

#define CLKPWR_PCONP_PCMC ((uint32_t)(1<<17))

Motor Control PWM

Definition at line 152 of file lpc17xx_clkpwr.h.

#define CLKPWR_PCONP_PCPWM1 ((uint32_t)(1<<6))

PWM1 power/clock control bit

Definition at line 132 of file lpc17xx_clkpwr.h.

#define CLKPWR_PCONP_PCQEI ((uint32_t)(1<<18))

Quadrature Encoder Interface power/clock control bit

Definition at line 154 of file lpc17xx_clkpwr.h.

#define CLKPWR_PCONP_PCRIT ((uint32_t)(1<<16))

Repetitive Interrupt Timer power/clock control bit

Definition at line 150 of file lpc17xx_clkpwr.h.

#define CLKPWR_PCONP_PCRTC ((uint32_t)(1<<9))

The RTC power/clock control bit

Definition at line 138 of file lpc17xx_clkpwr.h.

#define CLKPWR_PCONP_PCSPI ((uint32_t)(1<<8))

The SPI interface power/clock control bit

Definition at line 136 of file lpc17xx_clkpwr.h.

#define CLKPWR_PCONP_PCSSP0 ((uint32_t)(1<<21))

The SSP0 interface power/clock control bit

Definition at line 158 of file lpc17xx_clkpwr.h.

#define CLKPWR_PCONP_PCSSP1 ((uint32_t)(1<<10))

The SSP1 interface power/clock control bit

Definition at line 140 of file lpc17xx_clkpwr.h.

#define CLKPWR_PCONP_PCTIM0 ((uint32_t)(1<<1))

Timer/Counter 0 power/clock control bit

Definition at line 124 of file lpc17xx_clkpwr.h.

#define CLKPWR_PCONP_PCTIM1 ((uint32_t)(1<<2))

Definition at line 126 of file lpc17xx_clkpwr.h.

#define CLKPWR_PCONP_PCTIM2 ((uint32_t)(1<<22))

Timer 2 power/clock control bit

Definition at line 160 of file lpc17xx_clkpwr.h.

#define CLKPWR_PCONP_PCTIM3 ((uint32_t)(1<<23))

Timer 3 power/clock control bit

Definition at line 162 of file lpc17xx_clkpwr.h.

#define CLKPWR_PCONP_PCUART0 ((uint32_t)(1<<3))

UART0 power/clock control bit

Definition at line 128 of file lpc17xx_clkpwr.h.

#define CLKPWR_PCONP_PCUART1 ((uint32_t)(1<<4))

UART1 power/clock control bit

Definition at line 130 of file lpc17xx_clkpwr.h.

#define CLKPWR_PCONP_PCUART2 ((uint32_t)(1<<24))

UART 2 power/clock control bit

Definition at line 164 of file lpc17xx_clkpwr.h.

#define CLKPWR_PCONP_PCUART3 ((uint32_t)(1<<25))

UART 3 power/clock control bit

Definition at line 166 of file lpc17xx_clkpwr.h.

#define CLKPWR_PCONP_PCUSB ((uint32_t)(1<<31))

USB interface power/clock control bit

Definition at line 176 of file lpc17xx_clkpwr.h.

Generated on Tue Jun 7 14:59:32 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: CLKPWR Private Macros

CLKPWR Private Macros
[CLKPWR]

Defines

#define | CLKPWR_CLKSRCSEL_CLKSRC_IRC ((uint32_t)(0x00))
#define | CLKPWR_CLKSRCSEL_CLKSRC_MAINOSC ((uint32_t)(0x01))
#define | CLKPWR_CLKSRCSEL_CLKSRC_RTC ((uint32_t)(0x02))
#define | CLKPWR_CLKSRCSEL_BITMASK ((uint32_t)(0x03))
#define | CLKPWR_CLKOUTCFG_CLKOUTSEL_CPU ((uint32_t)(0x00))
#define | CLKPWR_CLKOUTCFG_CLKOUTSEL_MAINOSC ((uint32_t)(0x01))
#define | CLKPWR_CLKOUTCFG_CLKOUTSEL_RC ((uint32_t)(0x02))
#define | CLKPWR_CLKOUTCFG_CLKOUTSEL_USB ((uint32_t)(0x03))
#define | CLKPWR_CLKOUTCFG_CLKOUTSEL_RTC ((uint32_t)(0x04))
#define | CLKPWR_CLKOUTCFG_CLKOUTDIV(n) ((uint32_t)((n&0x0F)<<4))
#define | CLKPWR_CLKOUTCFG_CLKOUT_EN ((uint32_t)(1<<8))
#define | CLKPWR_CLKOUTCFG_CLKOUT_ACT ((uint32_t)(1<<9))
#define | CLKPWR_CLKOUTCFG_BITMASK ((uint32_t)(0x3FF))
#define | CLKPWR_PLL0CON_ENABLE ((uint32_t)(0x01))
#define | CLKPWR_PLL0CON_CONNECT ((uint32_t)(0x02))
#define | CLKPWR_PLL0CON_BITMASK ((uint32_t)(0x03))
#define | CLKPWR_PLL0CFG_MSEL(n) ((uint32_t)(n&0x7FFF))
#define | CLKPWR_PLL0CFG_NSEL(n) ((uint32_t)((n<<16)&0xFF0000))
#define | CLKPWR_PLL0CFG_BITMASK ((uint32_t)(0xFF7FFF))
#define | CLKPWR_PLL0STAT_MSEL(n) ((uint32_t)(n&0x7FFF))
#define | CLKPWR_PLL0STAT_NSEL(n) ((uint32_t)((n>>16)&0xFF))
#define | CLKPWR_PLL0STAT_PLLE ((uint32_t)(1<<24))
#define | CLKPWR_PLL0STAT_PLLC ((uint32_t)(1<<25))
#define | CLKPWR_PLL0STAT_PLOCK ((uint32_t)(1<<26))
#define | CLKPWR_PLL0FEED_BITMASK ((uint32_t)0xFF)
#define | CLKPWR_PLL1CON_ENABLE ((uint32_t)(0x01))
#define | CLKPWR_PLL1CON_CONNECT ((uint32_t)(0x02))
#define | CLKPWR_PLL1CON_BITMASK ((uint32_t)(0x03))
#define | CLKPWR_PLL1CFG_MSEL(n) ((uint32_t)(n&0x1F))
#define | CLKPWR_PLL1CFG_PSEL(n) ((uint32_t)((n&0x03)<<5))
#define | CLKPWR_PLL1CFG_BITMASK ((uint32_t)(0x7F))
#define | CLKPWR_PLL1STAT_MSEL(n) ((uint32_t)(n&0x1F))
#define | CLKPWR_PLL1STAT_PSEL(n) ((uint32_t)((n>>5)&0x03))
#define | CLKPWR_PLL1STAT_PLLE ((uint32_t)(1<<8))
#define | CLKPWR_PLL1STAT_PLLC ((uint32_t)(1<<9))
#define | CLKPWR_PLL1STAT_PLOCK ((uint32_t)(1<<10))
#define | CLKPWR_PLL1FEED_BITMASK ((uint32_t)0xFF)
#define | CLKPWR_CCLKCFG_BITMASK ((uint32_t)(0xFF))
#define | CLKPWR_USBCLKCFG_BITMASK ((uint32_t)(0x0F))
#define | CLKPWR_IRCTRIM_BITMASK ((uint32_t)(0x0F))
#define | CLKPWR_PCLKSEL0_BITMASK ((uint32_t)(0xFFF3F3FF))
#define | CLKPWR_PCLKSEL1_BITMASK ((uint32_t)(0xFCF3F0F3))
#define | CLKPWR_PCLKSEL_SET(p, n) _SBF(p,n)
#define | CLKPWR_PCLKSEL_BITMASK(p) _SBF(p,0x03)
#define | CLKPWR_PCLKSEL_GET(p, n) ((uint32_t)((n>>p)&0x03))
#define | CLKPWR_PCON_PM0 ((uint32_t)(1<<0))
#define | CLKPWR_PCON_PM1 ((uint32_t)(1<<1))
#define | CLKPWR_PCON_BODPDM ((uint32_t)(1<<2))
#define | CLKPWR_PCON_BOGD ((uint32_t)(1<<3))
#define | CLKPWR_PCON_BORD ((uint32_t)(1<<4))
#define | CLKPWR_PCON_SMFLAG ((uint32_t)(1<<8))
#define | CLKPWR_PCON_DSFLAG ((uint32_t)(1<<9))
#define | CLKPWR_PCON_PDFLAG ((uint32_t)(1<<10))
#define | CLKPWR_PCON_DPDFLAG ((uint32_t)(1<<11))
#define | CLKPWR_PCONP_BITMASK 0xEFEFF7DE

Define Documentation

#define CLKPWR_CCLKCFG_BITMASK ((uint32_t)(0xFF))

Macro defines for CPU Clock Configuration Register CPU Clock configuration bit mask

Definition at line 308 of file lpc17xx_clkpwr.h.

#define CLKPWR_CLKOUTCFG_BITMASK ((uint32_t)(0x3FF))

Clock source selection bit mask

Definition at line 221 of file lpc17xx_clkpwr.h.

#define CLKPWR_CLKOUTCFG_CLKOUT_ACT ((uint32_t)(1<<9))

CLKOUT activity indication

Definition at line 219 of file lpc17xx_clkpwr.h.

#define CLKPWR_CLKOUTCFG_CLKOUT_EN ((uint32_t)(1<<8))

CLKOUT enable control

Definition at line 217 of file lpc17xx_clkpwr.h.

#define CLKPWR_CLKOUTCFG_CLKOUTDIV ( n ) ((uint32_t)((n&0x0F)<<4))

Integer value to divide the output clock by, minus one

Definition at line 215 of file lpc17xx_clkpwr.h.

#define CLKPWR_CLKOUTCFG_CLKOUTSEL_CPU ((uint32_t)(0x00))

Macro defines for Clock Output Configuration Register Selects the CPU clock as the CLKOUT source

Definition at line 205 of file lpc17xx_clkpwr.h.

#define CLKPWR_CLKOUTCFG_CLKOUTSEL_MAINOSC ((uint32_t)(0x01))

Selects the main oscillator as the CLKOUT source

Definition at line 207 of file lpc17xx_clkpwr.h.

#define CLKPWR_CLKOUTCFG_CLKOUTSEL_RC ((uint32_t)(0x02))

Selects the Internal RC oscillator as the CLKOUT source

Definition at line 209 of file lpc17xx_clkpwr.h.

#define CLKPWR_CLKOUTCFG_CLKOUTSEL_RTC ((uint32_t)(0x04))

Selects the RTC oscillator as the CLKOUT source

Definition at line 213 of file lpc17xx_clkpwr.h.

#define CLKPWR_CLKOUTCFG_CLKOUTSEL_USB ((uint32_t)(0x03))

Selects the USB clock as the CLKOUT source

Definition at line 211 of file lpc17xx_clkpwr.h.

#define CLKPWR_CLKSRCSEL_BITMASK ((uint32_t)(0x03))

Clock source selection bit mask

Definition at line 198 of file lpc17xx_clkpwr.h.

#define CLKPWR_CLKSRCSEL_CLKSRC_IRC ((uint32_t)(0x00))

Macro defines for Clock Source Select Register Internal RC oscillator

Definition at line 192 of file lpc17xx_clkpwr.h.

#define CLKPWR_CLKSRCSEL_CLKSRC_MAINOSC ((uint32_t)(0x01))

Main oscillator

Definition at line 194 of file lpc17xx_clkpwr.h.

#define CLKPWR_CLKSRCSEL_CLKSRC_RTC ((uint32_t)(0x02))

RTC oscillator

Definition at line 196 of file lpc17xx_clkpwr.h.

#define CLKPWR_IRCTRIM_BITMASK ((uint32_t)(0x0F))

Macro defines for IRC Trim Register IRC Trim bit mask

Definition at line 320 of file lpc17xx_clkpwr.h.

#define CLKPWR_PCLKSEL0_BITMASK ((uint32_t)(0xFFF3F3FF))

Macro defines for Peripheral Clock Selection Register 0 and 1 Peripheral Clock Selection 0 mask bit

Definition at line 326 of file lpc17xx_clkpwr.h.

#define CLKPWR_PCLKSEL1_BITMASK ((uint32_t)(0xFCF3F0F3))

Peripheral Clock Selection 1 mask bit

Definition at line 328 of file lpc17xx_clkpwr.h.

#define CLKPWR_PCLKSEL_BITMASK ( p ) _SBF(p,0x03)

Macro to mask peripheral clock of each type

Definition at line 334 of file lpc17xx_clkpwr.h.

#define CLKPWR_PCLKSEL_GET | ( | p,
 |  | n | ) | ((uint32_t)((n>>p)&0x03))

Macro to get peripheral clock of each type

Definition at line 336 of file lpc17xx_clkpwr.h.

#define CLKPWR_PCLKSEL_SET | ( | p,
 |  | n | ) | _SBF(p,n)

Macro to set peripheral clock of each type p: position of two bits that hold divider of peripheral clock n: value of divider of peripheral clock to be set

Definition at line 332 of file lpc17xx_clkpwr.h.

#define CLKPWR_PCON_BODPDM ((uint32_t)(1<<2))

Brown-Out Reduced Power Mode

Definition at line 346 of file lpc17xx_clkpwr.h.

#define CLKPWR_PCON_BOGD ((uint32_t)(1<<3))

Brown-Out Global Disable

Definition at line 348 of file lpc17xx_clkpwr.h.

#define CLKPWR_PCON_BORD ((uint32_t)(1<<4))

Brown Out Reset Disable

Definition at line 350 of file lpc17xx_clkpwr.h.

#define CLKPWR_PCON_DPDFLAG ((uint32_t)(1<<11))

Deep Power-down entry flag

Definition at line 358 of file lpc17xx_clkpwr.h.

#define CLKPWR_PCON_DSFLAG ((uint32_t)(1<<9))

Deep Sleep entry flag

Definition at line 354 of file lpc17xx_clkpwr.h.

#define CLKPWR_PCON_PDFLAG ((uint32_t)(1<<10))

Power-down entry flag

Definition at line 356 of file lpc17xx_clkpwr.h.

#define CLKPWR_PCON_PM0 ((uint32_t)(1<<0))

Macro defines for Power Mode Control Register Power mode control bit 0

Definition at line 342 of file lpc17xx_clkpwr.h.

#define CLKPWR_PCON_PM1 ((uint32_t)(1<<1))

Power mode control bit 1

Definition at line 344 of file lpc17xx_clkpwr.h.

#define CLKPWR_PCON_SMFLAG ((uint32_t)(1<<8))

Sleep Mode entry flag

Definition at line 352 of file lpc17xx_clkpwr.h.

#define CLKPWR_PCONP_BITMASK 0xEFEFF7DE

Macro defines for Power Control for Peripheral Register Power Control for Peripherals bit mask

Definition at line 364 of file lpc17xx_clkpwr.h.

#define CLKPWR_PLL0CFG_BITMASK ((uint32_t)(0xFF7FFF))

PLL 0 Configuration bit mask

Definition at line 241 of file lpc17xx_clkpwr.h.

#define CLKPWR_PLL0CFG_MSEL ( n ) ((uint32_t)(n&0x7FFF))

Macro defines for PPL0 Configuration Register PLL 0 Configuration MSEL field

Definition at line 237 of file lpc17xx_clkpwr.h.

#define CLKPWR_PLL0CFG_NSEL ( n ) ((uint32_t)((n<<16)&0xFF0000))

PLL 0 Configuration NSEL field

Definition at line 239 of file lpc17xx_clkpwr.h.

#define CLKPWR_PLL0CON_BITMASK ((uint32_t)(0x03))

PLL 0 control bit mask

Definition at line 231 of file lpc17xx_clkpwr.h.

#define CLKPWR_PLL0CON_CONNECT ((uint32_t)(0x02))

PLL 0 control connect

Definition at line 229 of file lpc17xx_clkpwr.h.

#define CLKPWR_PLL0CON_ENABLE ((uint32_t)(0x01))

Macro defines for PPL0 Control Register PLL 0 control enable

Definition at line 227 of file lpc17xx_clkpwr.h.

#define CLKPWR_PLL0FEED_BITMASK ((uint32_t)0xFF)

Macro defines for PPL0 Feed Register PLL0 Feed bit mask

Definition at line 262 of file lpc17xx_clkpwr.h.

#define CLKPWR_PLL0STAT_MSEL ( n ) ((uint32_t)(n&0x7FFF))

Macro defines for PPL0 Status Register PLL 0 MSEL value

Definition at line 248 of file lpc17xx_clkpwr.h.

#define CLKPWR_PLL0STAT_NSEL ( n ) ((uint32_t)((n>>16)&0xFF))

PLL NSEL get value

Definition at line 250 of file lpc17xx_clkpwr.h.

#define CLKPWR_PLL0STAT_PLLC ((uint32_t)(1<<25))

PLL status Connect bit

Definition at line 254 of file lpc17xx_clkpwr.h.

#define CLKPWR_PLL0STAT_PLLE ((uint32_t)(1<<24))

PLL status enable bit

Definition at line 252 of file lpc17xx_clkpwr.h.

#define CLKPWR_PLL0STAT_PLOCK ((uint32_t)(1<<26))

PLL status lock

Definition at line 256 of file lpc17xx_clkpwr.h.

#define CLKPWR_PLL1CFG_BITMASK ((uint32_t)(0x7F))

USB PLL configuration bit mask

Definition at line 282 of file lpc17xx_clkpwr.h.

#define CLKPWR_PLL1CFG_MSEL ( n ) ((uint32_t)(n&0x1F))

Macro defines for PLL1 Configuration Register USB PLL MSEL set value

Definition at line 278 of file lpc17xx_clkpwr.h.

#define CLKPWR_PLL1CFG_PSEL ( n ) ((uint32_t)((n&0x03)<<5))

USB PLL PSEL set value

Definition at line 280 of file lpc17xx_clkpwr.h.

#define CLKPWR_PLL1CON_BITMASK ((uint32_t)(0x03))

USB PLL control bit mask

Definition at line 272 of file lpc17xx_clkpwr.h.

#define CLKPWR_PLL1CON_CONNECT ((uint32_t)(0x02))

USB PLL control connect

Definition at line 270 of file lpc17xx_clkpwr.h.

#define CLKPWR_PLL1CON_ENABLE ((uint32_t)(0x01))

Macro defines for PLL1 Control Register USB PLL control enable

Definition at line 268 of file lpc17xx_clkpwr.h.

#define CLKPWR_PLL1FEED_BITMASK ((uint32_t)0xFF)

Macro defines for PLL1 Feed Register PLL1 Feed bit mask

Definition at line 302 of file lpc17xx_clkpwr.h.

#define CLKPWR_PLL1STAT_MSEL ( n ) ((uint32_t)(n&0x1F))

Macro defines for PLL1 Status Register USB PLL MSEL get value

Definition at line 288 of file lpc17xx_clkpwr.h.

#define CLKPWR_PLL1STAT_PLLC ((uint32_t)(1<<9))

USB PLL status Connect bit

Definition at line 294 of file lpc17xx_clkpwr.h.

#define CLKPWR_PLL1STAT_PLLE ((uint32_t)(1<<8))

USB PLL status enable bit

Definition at line 292 of file lpc17xx_clkpwr.h.

#define CLKPWR_PLL1STAT_PLOCK ((uint32_t)(1<<10))

USB PLL status lock

Definition at line 296 of file lpc17xx_clkpwr.h.

#define CLKPWR_PLL1STAT_PSEL ( n ) ((uint32_t)((n>>5)&0x03))

USB PLL PSEL get value

Definition at line 290 of file lpc17xx_clkpwr.h.

#define CLKPWR_USBCLKCFG_BITMASK ((uint32_t)(0x0F))

Macro defines for USB Clock Configuration Register USB Clock Configuration bit mask

Definition at line 314 of file lpc17xx_clkpwr.h.

Generated on Tue Jun 7 14:59:32 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: CLKPWR Public Functions

CLKPWR Public Functions
[CLKPWR]

Functions

void | CLKPWR_SetPCLKDiv (uint32_t ClkType, uint32_t DivVal)
Set value of each Peripheral Clock Selection.
uint32_t | CLKPWR_GetPCLKSEL (uint32_t ClkType)
Get current value of each Peripheral Clock Selection.
uint32_t | CLKPWR_GetPCLK (uint32_t ClkType)
Get current value of each Peripheral Clock.
void | CLKPWR_ConfigPPWR (uint32_t PPType, FunctionalState NewState)
Configure power supply for each peripheral according to NewState.
void | CLKPWR_Sleep (void)
Enter Sleep mode with co-operated instruction by the Cortex-M3.
void | CLKPWR_DeepSleep (void)
Enter Deep Sleep mode with co-operated instruction by the Cortex-M3.
void | CLKPWR_PowerDown (void)
Enter Power Down mode with co-operated instruction by the Cortex-M3.
void | CLKPWR_DeepPowerDown (void)
Enter Deep Power Down mode with co-operated instruction by the Cortex-M3.

Function Documentation

void CLKPWR_ConfigPPWR | ( | uint32_t | PPType,
 |  | FunctionalState | NewState
 | ) |  |

Configure power supply for each peripheral according to NewState.

Parameters:
[in] PPType Type of peripheral used to enable power, should be one of the following:
  • CLKPWR_PCONP_PCTIM0 : Timer 0
    • CLKPWR_PCONP_PCTIM1 : Timer 1
    • CLKPWR_PCONP_PCUART0 : UART 0
    • CLKPWR_PCONP_PCUART1 : UART 1
    • CLKPWR_PCONP_PCPWM1 : PWM 1
    • CLKPWR_PCONP_PCI2C0 : I2C 0
    • CLKPWR_PCONP_PCSPI : SPI
    • CLKPWR_PCONP_PCRTC : RTC
    • CLKPWR_PCONP_PCSSP1 : SSP 1
    • CLKPWR_PCONP_PCAD : ADC
    • CLKPWR_PCONP_PCAN1 : CAN 1
    • CLKPWR_PCONP_PCAN2 : CAN 2
    • CLKPWR_PCONP_PCGPIO : GPIO
    • CLKPWR_PCONP_PCRIT : RIT
    • CLKPWR_PCONP_PCMC : MC
    • CLKPWR_PCONP_PCQEI : QEI
    • CLKPWR_PCONP_PCI2C1 : I2C 1
    • CLKPWR_PCONP_PCSSP0 : SSP 0
    • CLKPWR_PCONP_PCTIM2 : Timer 2
    • CLKPWR_PCONP_PCTIM3 : Timer 3
    • CLKPWR_PCONP_PCUART2 : UART 2
    • CLKPWR_PCONP_PCUART3 : UART 3
    • CLKPWR_PCONP_PCI2C2 : I2C 2
    • CLKPWR_PCONP_PCI2S : I2S
    • CLKPWR_PCONP_PCGPDMA : GPDMA
    • CLKPWR_PCONP_PCENET : Ethernet
    • CLKPWR_PCONP_PCUSB : USB
[in] NewState New state of Peripheral Power, should be:
  • ENABLE : Enable power for this peripheral
  • DISABLE : Disable power for this peripheral
Returns:
none

Definition at line 266 of file lpc17xx_clkpwr.c.

void CLKPWR_DeepPowerDown ( void )

Enter Deep Power Down mode with co-operated instruction by the Cortex-M3.

Parameters:
[in] None
Returns:
None

Definition at line 327 of file lpc17xx_clkpwr.c.

void CLKPWR_DeepSleep ( void )

Enter Deep Sleep mode with co-operated instruction by the Cortex-M3.

Parameters:
[in] None
Returns:
None

Definition at line 297 of file lpc17xx_clkpwr.c.

uint32_t CLKPWR_GetPCLK ( uint32_t ClkType )

Get current value of each Peripheral Clock.

Parameters:
[in] ClkType Peripheral Clock Selection of each type, should be one of the following:
  • CLKPWR_PCLKSEL_WDT : WDT
  • CLKPWR_PCLKSEL_TIMER0 : Timer 0
  • CLKPWR_PCLKSEL_TIMER1 : Timer 1
  • CLKPWR_PCLKSEL_UART0 : UART 0
  • CLKPWR_PCLKSEL_UART1 : UART 1
  • CLKPWR_PCLKSEL_PWM1 : PWM 1
  • CLKPWR_PCLKSEL_I2C0 : I2C 0
  • CLKPWR_PCLKSEL_SPI : SPI
  • CLKPWR_PCLKSEL_SSP1 : SSP 1
  • CLKPWR_PCLKSEL_DAC : DAC
  • CLKPWR_PCLKSEL_ADC : ADC
  • CLKPWR_PCLKSEL_CAN1 : CAN 1
  • CLKPWR_PCLKSEL_CAN2 : CAN 2
  • CLKPWR_PCLKSEL_ACF : ACF
  • CLKPWR_PCLKSEL_QEI : QEI
  • CLKPWR_PCLKSEL_PCB : PCB
  • CLKPWR_PCLKSEL_I2C1 : I2C 1
  • CLKPWR_PCLKSEL_SSP0 : SSP 0
  • CLKPWR_PCLKSEL_TIMER2 : Timer 2
  • CLKPWR_PCLKSEL_TIMER3 : Timer 3
  • CLKPWR_PCLKSEL_UART2 : UART 2
  • CLKPWR_PCLKSEL_UART3 : UART 3
  • CLKPWR_PCLKSEL_I2C2 : I2C 2
  • CLKPWR_PCLKSEL_I2S : I2S
  • CLKPWR_PCLKSEL_RIT : RIT
  • CLKPWR_PCLKSEL_SYSCON : SYSCON
  • CLKPWR_PCLKSEL_MC : MC
Returns:
Value of Selected Peripheral Clock

Definition at line 196 of file lpc17xx_clkpwr.c.

uint32_t CLKPWR_GetPCLKSEL ( uint32_t ClkType )

Get current value of each Peripheral Clock Selection.

Parameters:
[in] ClkType Peripheral Clock Selection of each type, should be one of the following:
  • CLKPWR_PCLKSEL_WDT : WDT
  • CLKPWR_PCLKSEL_TIMER0 : Timer 0
  • CLKPWR_PCLKSEL_TIMER1 : Timer 1
  • CLKPWR_PCLKSEL_UART0 : UART 0
  • CLKPWR_PCLKSEL_UART1 : UART 1
  • CLKPWR_PCLKSEL_PWM1 : PWM 1
  • CLKPWR_PCLKSEL_I2C0 : I2C 0
  • CLKPWR_PCLKSEL_SPI : SPI
  • CLKPWR_PCLKSEL_SSP1 : SSP 1
  • CLKPWR_PCLKSEL_DAC : DAC
  • CLKPWR_PCLKSEL_ADC : ADC
  • CLKPWR_PCLKSEL_CAN1 : CAN 1
  • CLKPWR_PCLKSEL_CAN2 : CAN 2
  • CLKPWR_PCLKSEL_ACF : ACF
  • CLKPWR_PCLKSEL_QEI : QEI
  • CLKPWR_PCLKSEL_PCB : PCB
  • CLKPWR_PCLKSEL_I2C1 : I2C 1
  • CLKPWR_PCLKSEL_SSP0 : SSP 0
  • CLKPWR_PCLKSEL_TIMER2 : Timer 2
  • CLKPWR_PCLKSEL_TIMER3 : Timer 3
  • CLKPWR_PCLKSEL_UART2 : UART 2
  • CLKPWR_PCLKSEL_UART3 : UART 3
  • CLKPWR_PCLKSEL_I2C2 : I2C 2
  • CLKPWR_PCLKSEL_I2S : I2S
  • CLKPWR_PCLKSEL_RIT : RIT
  • CLKPWR_PCLKSEL_SYSCON : SYSCON
  • CLKPWR_PCLKSEL_MC : MC
Returns:
Value of Selected Peripheral Clock Selection

Definition at line 141 of file lpc17xx_clkpwr.c.

void CLKPWR_PowerDown ( void )

Enter Power Down mode with co-operated instruction by the Cortex-M3.

Parameters:
[in] None
Returns:
None

Definition at line 312 of file lpc17xx_clkpwr.c.

void CLKPWR_SetPCLKDiv | ( | uint32_t | ClkType,
 |  | uint32_t | DivVal
 | ) |  |

Set value of each Peripheral Clock Selection.

Parameters:
[in] ClkType Peripheral Clock Selection of each type, should be one of the following:
  • CLKPWR_PCLKSEL_WDT : WDT
  • CLKPWR_PCLKSEL_TIMER0 : Timer 0
  • CLKPWR_PCLKSEL_TIMER1 : Timer 1
  • CLKPWR_PCLKSEL_UART0 : UART 0
  • CLKPWR_PCLKSEL_UART1 : UART 1
  • CLKPWR_PCLKSEL_PWM1 : PWM 1
  • CLKPWR_PCLKSEL_I2C0 : I2C 0
  • CLKPWR_PCLKSEL_SPI : SPI
  • CLKPWR_PCLKSEL_SSP1 : SSP 1
  • CLKPWR_PCLKSEL_DAC : DAC
  • CLKPWR_PCLKSEL_ADC : ADC
  • CLKPWR_PCLKSEL_CAN1 : CAN 1
  • CLKPWR_PCLKSEL_CAN2 : CAN 2
  • CLKPWR_PCLKSEL_ACF : ACF
  • CLKPWR_PCLKSEL_QEI : QEI
  • CLKPWR_PCLKSEL_PCB : PCB
  • CLKPWR_PCLKSEL_I2C1 : I2C 1
  • CLKPWR_PCLKSEL_SSP0 : SSP 0
  • CLKPWR_PCLKSEL_TIMER2 : Timer 2
  • CLKPWR_PCLKSEL_TIMER3 : Timer 3
  • CLKPWR_PCLKSEL_UART2 : UART 2
  • CLKPWR_PCLKSEL_UART3 : UART 3
  • CLKPWR_PCLKSEL_I2C2 : I2C 2
  • CLKPWR_PCLKSEL_I2S : I2S
  • CLKPWR_PCLKSEL_RIT : RIT
  • CLKPWR_PCLKSEL_SYSCON : SYSCON
  • CLKPWR_PCLKSEL_MC : MC
[in] DivVal Value of divider, should be:
  • CLKPWR_PCLKSEL_CCLK_DIV_4 : PCLK_peripheral = CCLK/4
  • CLKPWR_PCLKSEL_CCLK_DIV_1 : PCLK_peripheral = CCLK/1
  • CLKPWR_PCLKSEL_CCLK_DIV_2 : PCLK_peripheral = CCLK/2
Returns:
none

Definition at line 80 of file lpc17xx_clkpwr.c.

void CLKPWR_Sleep ( void )

Enter Sleep mode with co-operated instruction by the Cortex-M3.

Parameters:
[in] None
Returns:
None

Definition at line 284 of file lpc17xx_clkpwr.c.

Generated on Tue Jun 7 14:59:32 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: DAC

DAC
[LPC1700CMSIS Firmware Library]

Modules

DAC Private Macros
DAC Public Types
DAC Public Functions
Generated on Tue Jun 7 14:59:32 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: DAC Private Macros

DAC Private Macros
[DAC]

Defines

#define | DAC_VALUE(n) ((uint32_t)((n&0x3FF)<<6))
#define | DAC_BIAS_EN ((uint32_t)(1<<16))
#define | DAC_CCNT_VALUE(n) ((uint32_t)(n&0xffff))
#define | DAC_DBLBUF_ENA ((uint32_t)(1<<1))
#define | DAC_CNT_ENA ((uint32_t)(1<<2))
#define | DAC_DMA_ENA ((uint32_t)(1<<3))
#define | DAC_DACCTRL_MASK ((uint32_t)(0x0F))
#define | PARAM_DACx(n) (((uint32_t *)n)==((uint32_t *)LPC_DAC))
#define | PARAM_DAC_CURRENT_OPT(OPTION)

Define Documentation

#define DAC_BIAS_EN ((uint32_t)(1<<16))

If this bit = 0: The settling time of the DAC is 1 microsecond max, and the maximum current is 700 microAmpere If this bit = 1: The settling time of the DAC is 2.5 microsecond and the maximum current is 350 microAmpere

Definition at line 59 of file lpc17xx_dac.h.

#define DAC_CCNT_VALUE ( n ) ((uint32_t)(n&0xffff))

Value to reload interrupt DMA counter

Definition at line 61 of file lpc17xx_dac.h.

#define DAC_CNT_ENA ((uint32_t)(1<<2))

DCAR Time out count enable

Definition at line 66 of file lpc17xx_dac.h.

#define DAC_DACCTRL_MASK ((uint32_t)(0x0F))

DCAR DACCTRL mask bit

Definition at line 70 of file lpc17xx_dac.h.

#define DAC_DBLBUF_ENA ((uint32_t)(1<<1))

DCAR double buffering

Definition at line 64 of file lpc17xx_dac.h.

#define DAC_DMA_ENA ((uint32_t)(1<<3))

DCAR DMA access

Definition at line 68 of file lpc17xx_dac.h.

#define DAC_VALUE ( n ) ((uint32_t)((n&0x3FF)<<6))

After the selected settling time after this field is written with a new VALUE, the voltage on the AOUT pin (with respect to VSSA) is VALUE/1024 × VREF

Definition at line 54 of file lpc17xx_dac.h.

#define PARAM_DAC_CURRENT_OPT ( OPTION )

Value:

((OPTION == DAC_MAX_CURRENT_700uA)\
||(OPTION == DAC_MAX_CURRENT_350uA))
Macro to check DAC current optional parameter

Definition at line 76 of file lpc17xx_dac.h.

#define PARAM_DACx ( n ) (((uint32_t *)n)==((uint32_t *)LPC_DAC))

Macro to determine if it is valid DAC peripheral

Definition at line 73 of file lpc17xx_dac.h.

Generated on Tue Jun 7 14:59:32 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: DAC Public Types

DAC Public Types
[DAC]

Data Structures

struct | DAC_CONVERTER_CFG_Type
Configuration for DAC converter control register. More...

Enumerations

enum | DAC_CURRENT_OPT { DAC_MAX_CURRENT_700uA = 0, DAC_MAX_CURRENT_350uA }
Current option in DAC configuration option. More...

Enumeration Type Documentation

enum DAC_CURRENT_OPT

Current option in DAC configuration option.

Enumerator:
DAC_MAX_CURRENT_700uA | The settling time of the DAC is 1 us max, and the maximum current is 700 uA
DAC_MAX_CURRENT_350uA | The settling time of the DAC is 2.5 us and the maximum current is 350 uA

Definition at line 88 of file lpc17xx_dac.h.

Generated on Tue Jun 7 14:59:32 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: DAC Public Functions

DAC Public Functions
[DAC]

Functions

void | DAC_Init (LPC_DAC_TypeDef *DACx)
Initial ADC configuration
  • Maximum current is 700 uA
  • Value to AOUT is 0.

void | DAC_UpdateValue (LPC_DAC_TypeDef *DACx, uint32_t dac_value)
Update value to DAC.
void | DAC_SetBias (LPC_DAC_TypeDef *DACx, uint32_t bias)
Set Maximum current for DAC.
void | DAC_ConfigDAConverterControl (LPC_DAC_TypeDef *DACx, DAC_CONVERTER_CFG_Type *DAC_ConverterConfigStruct)
To enable the DMA operation and control DMA timer.
void | DAC_SetDMATimeOut (LPC_DAC_TypeDef *DACx, uint32_t time_out)
Set reload value for interrupt/DMA counter.

Function Documentation

void DAC_ConfigDAConverterControl | ( | LPC_DAC_TypeDef * | DACx,
 |  | DAC_CONVERTER_CFG_Type * | DAC_ConverterConfigStruct
 | ) |  |

To enable the DMA operation and control DMA timer.

Parameters:
[in] DACx pointer to LPC_DAC_TypeDef, should be: LPC_DAC
[in] DAC_ConverterConfigStruct pointer to DAC_CONVERTER_CFG_Type
  • DBLBUF_ENA : enable/disable DACR double buffering feature
  • CNT_ENA : enable/disable timer out counter
  • DMA_ENA : enable/disable DMA access
Returns:
None

Definition at line 111 of file lpc17xx_dac.c.

void DAC_Init ( LPC_DAC_TypeDef * DACx )

Initial ADC configuration

  • Maximum current is 700 uA
  • Value to AOUT is 0.

Parameters:
[in] DACx pointer to LPC_DAC_TypeDef, should be: LPC_DAC
Returns:
None

Definition at line 60 of file lpc17xx_dac.c.

void DAC_SetBias | ( | LPC_DAC_TypeDef * | DACx,
 |  | uint32_t | bias
 | ) |  |

Set Maximum current for DAC.

Parameters:
[in] | DACx | pointer to LPC_DAC_TypeDef, should be: LPC_DAC
[in] | bias | : 0 is 700 uA 1 350 uA
Returns:
None

Definition at line 92 of file lpc17xx_dac.c.

void DAC_SetDMATimeOut | ( | LPC_DAC_TypeDef * | DACx,
 |  | uint32_t | time_out
 | ) |  |

Set reload value for interrupt/DMA counter.

Parameters:
[in] | DACx | pointer to LPC_DAC_TypeDef, should be: LPC_DAC
[in] | time_out | time out to reload for interrupt/DMA counter
Returns:
None

Definition at line 129 of file lpc17xx_dac.c.

void DAC_UpdateValue | ( | LPC_DAC_TypeDef * | DACx,
 |  | uint32_t | dac_value
 | ) |  |

Update value to DAC.

Parameters:
[in] | DACx | pointer to LPC_DAC_TypeDef, should be: LPC_DAC
[in] | dac_value | : value 10 bit to be converted to output
Returns:
None

Definition at line 75 of file lpc17xx_dac.c.

Generated on Tue Jun 7 14:59:32 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: EMAC

EMAC
[LPC1700CMSIS Firmware Library]

Modules

EMAC Public Macros
EMAC Private Macros
EMAC Public Types
EMAC Public Functions
EMAC Private Variables

Defines

#define MCB_LPC_1768

Define Documentation

#define MCB_LPC_1768

Definition at line 46 of file lpc17xx_emac.h.

Generated on Tue Jun 7 14:59:32 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: EMAC Public Macros

EMAC Public Macros
[EMAC]

Defines

#define | EMAC_PHY_STAT_LINK (0)
#define | EMAC_PHY_STAT_SPEED (1)
#define | EMAC_PHY_STAT_DUP (2)
#define | EMAC_MODE_AUTO (0)
#define | EMAC_MODE_10M_FULL (1)
#define | EMAC_MODE_10M_HALF (2)
#define | EMAC_MODE_100M_FULL (3)
#define | EMAC_MODE_100M_HALF (4)

Define Documentation

#define EMAC_MODE_100M_FULL (3)

100Mbps FullDuplex mode

Definition at line 64 of file lpc17xx_emac.h.

#define EMAC_MODE_100M_HALF (4)

100Mbps HalfDuplex mode

Definition at line 65 of file lpc17xx_emac.h.

#define EMAC_MODE_10M_FULL (1)

10Mbps FullDuplex mode

Definition at line 62 of file lpc17xx_emac.h.

#define EMAC_MODE_10M_HALF (2)

10Mbps HalfDuplex mode

Definition at line 63 of file lpc17xx_emac.h.

#define EMAC_MODE_AUTO (0)

Auto-negotiation mode

Definition at line 61 of file lpc17xx_emac.h.

#define EMAC_PHY_STAT_DUP (2)

Duplex Status

Definition at line 58 of file lpc17xx_emac.h.

#define EMAC_PHY_STAT_LINK (0)

Link Status

Definition at line 56 of file lpc17xx_emac.h.

#define EMAC_PHY_STAT_SPEED (1)

Speed Status

Definition at line 57 of file lpc17xx_emac.h.

Generated on Tue Jun 7 14:59:32 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: EMAC Private Macros

EMAC Private Macros
[EMAC]

Defines

#define | EMAC_NUM_RX_FRAG 4
#define | EMAC_NUM_TX_FRAG 3
#define | EMAC_ETH_MAX_FLEN 1536
#define | EMAC_TX_FRAME_TOUT 0x00100000
#define | EMAC_MAC1_REC_EN 0x00000001
#define | EMAC_MAC1_PASS_ALL 0x00000002
#define | EMAC_MAC1_RX_FLOWC 0x00000004
#define | EMAC_MAC1_TX_FLOWC 0x00000008
#define | EMAC_MAC1_LOOPB 0x00000010
#define | EMAC_MAC1_RES_TX 0x00000100
#define | EMAC_MAC1_RES_MCS_TX 0x00000200
#define | EMAC_MAC1_RES_RX 0x00000400
#define | EMAC_MAC1_RES_MCS_RX 0x00000800
#define | EMAC_MAC1_SIM_RES 0x00004000
#define | EMAC_MAC1_SOFT_RES 0x00008000
#define | EMAC_MAC2_FULL_DUP 0x00000001
#define | EMAC_MAC2_FRM_LEN_CHK 0x00000002
#define | EMAC_MAC2_HUGE_FRM_EN 0x00000004
#define | EMAC_MAC2_DLY_CRC 0x00000008
#define | EMAC_MAC2_CRC_EN 0x00000010
#define | EMAC_MAC2_PAD_EN 0x00000020
#define | EMAC_MAC2_VLAN_PAD_EN 0x00000040
#define | EMAC_MAC2_ADET_PAD_EN 0x00000080
#define | EMAC_MAC2_PPREAM_ENF 0x00000100
#define | EMAC_MAC2_LPREAM_ENF 0x00000200
#define | EMAC_MAC2_NO_BACKOFF 0x00001000
#define | EMAC_MAC2_BACK_PRESSURE 0x00002000
#define | EMAC_MAC2_EXCESS_DEF 0x00004000
#define | EMAC_IPGT_BBIPG(n) (n&0x7F)
#define | EMAC_IPGT_FULL_DUP (EMAC_IPGT_BBIPG(0x15))
#define | EMAC_IPGT_HALF_DUP (EMAC_IPGT_BBIPG(0x12))
#define | EMAC_IPGR_NBBIPG_P2(n) (n&0x7F)
#define | EMAC_IPGR_P2_DEF (EMAC_IPGR_NBBIPG_P2(0x12))
#define | EMAC_IPGR_NBBIPG_P1(n) ((n&0x7F)<<8)
#define | EMAC_IPGR_P1_DEF EMAC_IPGR_NBBIPG_P1(0x0C)
#define | EMAC_CLRT_MAX_RETX(n) (n&0x0F)
#define | EMAC_CLRT_COLL(n) ((n&0x3F)<<8)
#define | EMAC_CLRT_DEF ((EMAC_CLRT_MAX_RETX(0x0F))|(EMAC_CLRT_COLL(0x37)))
#define | EMAC_MAXF_MAXFRMLEN(n) (n&0xFFFF)
#define | EMAC_SUPP_SPEED 0x00000100
#define | EMAC_SUPP_RES_RMII 0x00000800
#define | EMAC_TEST_SHCUT_PQUANTA 0x00000001
#define | EMAC_TEST_TST_PAUSE 0x00000002
#define | EMAC_TEST_TST_BACKP 0x00000004
#define | EMAC_MCFG_SCAN_INC 0x00000001
#define | EMAC_MCFG_SUPP_PREAM 0x00000002
#define | EMAC_MCFG_CLK_SEL(n) ((n&0x0F)<<2)
#define | EMAC_MCFG_RES_MII 0x00008000
#define | EMAC_MCFG_MII_MAXCLK 2500000UL
#define | EMAC_MCMD_READ 0x00000001
#define | EMAC_MCMD_SCAN 0x00000002
#define | EMAC_MII_WR_TOUT 0x00050000
#define | EMAC_MII_RD_TOUT 0x00050000
#define | EMAC_MADR_REG_ADR(n) (n&0x1F)
#define | EMAC_MADR_PHY_ADR(n) ((n&0x1F)<<8)
#define | EMAC_MWTD_DATA(n) (n&0xFFFF)
#define | EMAC_MRDD_DATA(n) (n&0xFFFF)
#define | EMAC_MIND_BUSY 0x00000001
#define | EMAC_MIND_SCAN 0x00000002
#define | EMAC_MIND_NOT_VAL 0x00000004
#define | EMAC_MIND_MII_LINK_FAIL 0x00000008
#define | EMAC_CR_RX_EN 0x00000001
#define | EMAC_CR_TX_EN 0x00000002
#define | EMAC_CR_REG_RES 0x00000008
#define | EMAC_CR_TX_RES 0x00000010
#define | EMAC_CR_RX_RES 0x00000020
#define | EMAC_CR_PASS_RUNT_FRM 0x00000040
#define | EMAC_CR_PASS_RX_FILT 0x00000080
#define | EMAC_CR_TX_FLOW_CTRL 0x00000100
#define | EMAC_CR_RMII 0x00000200
#define | EMAC_CR_FULL_DUP 0x00000400
#define | EMAC_SR_RX_EN 0x00000001
#define | EMAC_SR_TX_EN 0x00000002
#define | EMAC_TSV0_CRC_ERR 0x00000001
#define | EMAC_TSV0_LEN_CHKERR 0x00000002
#define | EMAC_TSV0_LEN_OUTRNG 0x00000004
#define | EMAC_TSV0_DONE 0x00000008
#define | EMAC_TSV0_MCAST 0x00000010
#define | EMAC_TSV0_BCAST 0x00000020
#define | EMAC_TSV0_PKT_DEFER 0x00000040
#define | EMAC_TSV0_EXC_DEFER 0x00000080
#define | EMAC_TSV0_EXC_COLL 0x00000100
#define | EMAC_TSV0_LATE_COLL 0x00000200
#define | EMAC_TSV0_GIANT 0x00000400
#define | EMAC_TSV0_UNDERRUN 0x00000800
#define | EMAC_TSV0_BYTES 0x0FFFF000
#define | EMAC_TSV0_CTRL_FRAME 0x10000000
#define | EMAC_TSV0_PAUSE 0x20000000
#define | EMAC_TSV0_BACK_PRESS 0x40000000
#define | EMAC_TSV0_VLAN 0x80000000
#define | EMAC_TSV1_BYTE_CNT 0x0000FFFF
#define | EMAC_TSV1_COLL_CNT 0x000F0000
#define | EMAC_RSV_BYTE_CNT 0x0000FFFF
#define | EMAC_RSV_PKT_IGNORED 0x00010000
#define | EMAC_RSV_RXDV_SEEN 0x00020000
#define | EMAC_RSV_CARR_SEEN 0x00040000
#define | EMAC_RSV_REC_CODEV 0x00080000
#define | EMAC_RSV_CRC_ERR 0x00100000
#define | EMAC_RSV_LEN_CHKERR 0x00200000
#define | EMAC_RSV_LEN_OUTRNG 0x00400000
#define | EMAC_RSV_REC_OK 0x00800000
#define | EMAC_RSV_MCAST 0x01000000
#define | EMAC_RSV_BCAST 0x02000000
#define | EMAC_RSV_DRIB_NIBB 0x04000000
#define | EMAC_RSV_CTRL_FRAME 0x08000000
#define | EMAC_RSV_PAUSE 0x10000000
#define | EMAC_RSV_UNSUPP_OPC 0x20000000
#define | EMAC_RSV_VLAN 0x40000000
#define | EMAC_FCC_MIRR_CNT(n) (n&0xFFFF)
#define | EMAC_FCC_PAUSE_TIM(n) ((n&0xFFFF)<<16)
#define | EMAC_FCS_MIRR_CNT(n) (n&0xFFFF)
#define | EMAC_RFC_UCAST_EN 0x00000001
#define | EMAC_RFC_BCAST_EN 0x00000002
#define | EMAC_RFC_MCAST_EN 0x00000004
#define | EMAC_RFC_UCAST_HASH_EN 0x00000008
#define | EMAC_RFC_MCAST_HASH_EN 0x00000010
#define | EMAC_RFC_PERFECT_EN 0x00000020
#define | EMAC_RFC_MAGP_WOL_EN 0x00001000
#define | EMAC_RFC_PFILT_WOL_EN 0x00002000
#define | EMAC_WOL_UCAST 0x00000001
#define | EMAC_WOL_BCAST 0x00000002
#define | EMAC_WOL_MCAST 0x00000004
#define | EMAC_WOL_UCAST_HASH 0x00000008
#define | EMAC_WOL_MCAST_HASH 0x00000010
#define | EMAC_WOL_PERFECT 0x00000020
#define | EMAC_WOL_RX_FILTER 0x00000080
#define | EMAC_WOL_MAG_PACKET 0x00000100
#define | EMAC_WOL_BITMASK 0x01BF
#define | EMAC_INT_RX_OVERRUN 0x00000001
#define | EMAC_INT_RX_ERR 0x00000002
#define | EMAC_INT_RX_FIN 0x00000004
#define | EMAC_INT_RX_DONE 0x00000008
#define | EMAC_INT_TX_UNDERRUN 0x00000010
#define | EMAC_INT_TX_ERR 0x00000020
#define | EMAC_INT_TX_FIN 0x00000040
#define | EMAC_INT_TX_DONE 0x00000080
#define | EMAC_INT_SOFT_INT 0x00001000
#define | EMAC_INT_WAKEUP 0x00002000
#define | EMAC_PD_POWER_DOWN 0x80000000
#define | EMAC_RCTRL_SIZE(n) (n&0x7FF)
#define | EMAC_RCTRL_INT 0x80000000
#define | EMAC_RHASH_SA 0x000001FF
#define | EMAC_RHASH_DA 0x001FF000
#define | EMAC_RINFO_SIZE 0x000007FF
#define | EMAC_RINFO_CTRL_FRAME 0x00040000
#define | EMAC_RINFO_VLAN 0x00080000
#define | EMAC_RINFO_FAIL_FILT 0x00100000
#define | EMAC_RINFO_MCAST 0x00200000
#define | EMAC_RINFO_BCAST 0x00400000
#define | EMAC_RINFO_CRC_ERR 0x00800000
#define | EMAC_RINFO_SYM_ERR 0x01000000
#define | EMAC_RINFO_LEN_ERR 0x02000000
#define | EMAC_RINFO_RANGE_ERR 0x04000000
#define | EMAC_RINFO_ALIGN_ERR 0x08000000
#define | EMAC_RINFO_OVERRUN 0x10000000
#define | EMAC_RINFO_NO_DESCR 0x20000000
#define | EMAC_RINFO_LAST_FLAG 0x40000000
#define | EMAC_RINFO_ERR 0x80000000
#define | EMAC_RINFO_ERR_MASK
#define | EMAC_TCTRL_SIZE 0x000007FF
#define | EMAC_TCTRL_OVERRIDE 0x04000000
#define | EMAC_TCTRL_HUGE 0x08000000
#define | EMAC_TCTRL_PAD 0x10000000
#define | EMAC_TCTRL_CRC 0x20000000
#define | EMAC_TCTRL_LAST 0x40000000
#define | EMAC_TCTRL_INT 0x80000000
#define | EMAC_TINFO_COL_CNT 0x01E00000
#define | EMAC_TINFO_DEFER 0x02000000
#define | EMAC_TINFO_EXCESS_DEF 0x04000000
#define | EMAC_TINFO_EXCESS_COL 0x08000000
#define | EMAC_TINFO_LATE_COL 0x10000000
#define | EMAC_TINFO_UNDERRUN 0x20000000
#define | EMAC_TINFO_NO_DESCR 0x40000000
#define | EMAC_TINFO_ERR 0x80000000
#define | EMAC_PHY_RESP_TOUT 0x100000UL
#define | EMAC_OLD_EMAC_MODULE_ID 0x39022000
#define | EMAC_PHY_REG_BMCR 0x00
#define | EMAC_PHY_REG_BMSR 0x01
#define | EMAC_PHY_REG_IDR1 0x02
#define | EMAC_PHY_REG_IDR2 0x03
#define | EMAC_PHY_REG_ANAR 0x04
#define | EMAC_PHY_REG_ANLPAR 0x05
#define | EMAC_PHY_REG_ANER 0x06
#define | EMAC_PHY_REG_ANNPTR 0x07
#define | EMAC_PHY_REG_LPNPA 0x08
#define | EMAC_PHY_REG_STS 0x10
#define | EMAC_PHY_REG_MICR 0x11
#define | EMAC_PHY_REG_MISR 0x12
#define | EMAC_PHY_REG_FCSCR 0x14
#define | EMAC_PHY_REG_RECR 0x15
#define | EMAC_PHY_REG_PCSR 0x16
#define | EMAC_PHY_REG_RBR 0x17
#define | EMAC_PHY_REG_LEDCR 0x18
#define | EMAC_PHY_REG_PHYCR 0x19
#define | EMAC_PHY_REG_10BTSCR 0x1A
#define | EMAC_PHY_REG_CDCTRL1 0x1B
#define | EMAC_PHY_REG_EDCR 0x1D
#define | EMAC_PHY_BMCR_RESET (1<<15)
#define | EMAC_PHY_BMCR_LOOPBACK (1<<14)
#define | EMAC_PHY_BMCR_SPEED_SEL (1<<13)
#define | EMAC_PHY_BMCR_AN (1<<12)
#define | EMAC_PHY_BMCR_POWERDOWN (1<<11)
#define | EMAC_PHY_BMCR_ISOLATE (1<<10)
#define | EMAC_PHY_BMCR_RE_AN (1<<9)
#define | EMAC_PHY_BMCR_DUPLEX (1<<8)
#define | EMAC_PHY_BMSR_100BE_T4 (1<<15)
#define | EMAC_PHY_BMSR_100TX_FULL (1<<14)
#define | EMAC_PHY_BMSR_100TX_HALF (1<<13)
#define | EMAC_PHY_BMSR_10BE_FULL (1<<12)
#define | EMAC_PHY_BMSR_10BE_HALF (1<<11)
#define | EMAC_PHY_BMSR_NOPREAM (1<<6)
#define | EMAC_PHY_BMSR_AUTO_DONE (1<<5)
#define | EMAC_PHY_BMSR_REMOTE_FAULT (1<<4)
#define | EMAC_PHY_BMSR_NO_AUTO (1<<3)
#define | EMAC_PHY_BMSR_LINK_ESTABLISHED (1<<2)
#define | EMAC_PHY_SR_REMOTE_FAULT (1<<6)
#define | EMAC_PHY_SR_JABBER (1<<5)
#define | EMAC_PHY_SR_AUTO_DONE (1<<4)
#define | EMAC_PHY_SR_LOOPBACK (1<<3)
#define | EMAC_PHY_SR_DUP (1<<2)
#define | EMAC_PHY_SR_SPEED (1<<1)
#define | EMAC_PHY_SR_LINK (1<<0)
#define | EMAC_PHY_FULLD_100M 0x2100
#define | EMAC_PHY_HALFD_100M 0x2000
#define | EMAC_PHY_FULLD_10M 0x0100
#define | EMAC_PHY_HALFD_10M 0x0000
#define | EMAC_PHY_AUTO_NEG 0x3000
#define | EMAC_DEF_ADR 0x0100
#define | EMAC_DP83848C_ID 0x20005C90
#define | EMAC_PHY_SR_100_SPEED ((1<<14)|(1<<13))
#define | EMAC_PHY_SR_FULL_DUP ((1<<14)|(1<<12))
#define | EMAC_PHY_BMSR_LINK_STATUS (1<<2)

Define Documentation

#define EMAC_CLRT_COLL ( n ) ((n&0x3F)<<8)

Programmable field representing the slot time or collision window during which collisions occur in properly configured networks

Definition at line 151 of file lpc17xx_emac.h.

#define EMAC_CLRT_DEF ((EMAC_CLRT_MAX_RETX(0x0F))|(EMAC_CLRT_COLL(0x37)))

Default value for Collision Window / Retry register

Definition at line 153 of file lpc17xx_emac.h.

#define EMAC_CLRT_MAX_RETX ( n ) (n&0x0F)

Macro defines for Collision Window/Retry Register Programmable field specifying the number of retransmission attempts following a collision before aborting the packet due to excessive collisions

Definition at line 148 of file lpc17xx_emac.h.

#define EMAC_CR_FULL_DUP 0x00000400

Full Duplex

Definition at line 234 of file lpc17xx_emac.h.

#define EMAC_CR_PASS_RUNT_FRM 0x00000040

Pass Runt Frames

Definition at line 230 of file lpc17xx_emac.h.

#define EMAC_CR_PASS_RX_FILT 0x00000080

Pass RX Filter

Definition at line 231 of file lpc17xx_emac.h.

#define EMAC_CR_REG_RES 0x00000008

Reset Host Registers

Definition at line 227 of file lpc17xx_emac.h.

#define EMAC_CR_RMII 0x00000200

Reduced MII Interface

Definition at line 233 of file lpc17xx_emac.h.

#define EMAC_CR_RX_EN 0x00000001

Macro defines for Command Register Enable Receive

Definition at line 225 of file lpc17xx_emac.h.

#define EMAC_CR_RX_RES 0x00000020

Reset Receive Datapath

Definition at line 229 of file lpc17xx_emac.h.

#define EMAC_CR_TX_EN 0x00000002

Enable Transmit

Definition at line 226 of file lpc17xx_emac.h.

#define EMAC_CR_TX_FLOW_CTRL 0x00000100

TX Flow Control

Definition at line 232 of file lpc17xx_emac.h.

#define EMAC_CR_TX_RES 0x00000010

Reset Transmit Datapath

Definition at line 228 of file lpc17xx_emac.h.

#define EMAC_DEF_ADR 0x0100

Default PHY device address

Definition at line 486 of file lpc17xx_emac.h.

#define EMAC_DP83848C_ID 0x20005C90

PHY Identifier

Definition at line 487 of file lpc17xx_emac.h.

#define EMAC_ETH_MAX_FLEN 1536

Max. Ethernet Frame Size

Definition at line 79 of file lpc17xx_emac.h.

#define EMAC_FCC_MIRR_CNT ( n ) (n&0xFFFF)

Macro defines for Flow Control Counter Register Mirror Counter

Definition at line 292 of file lpc17xx_emac.h.

#define EMAC_FCC_PAUSE_TIM ( n ) ((n&0xFFFF)<<16)

Pause Timer

Definition at line 293 of file lpc17xx_emac.h.

#define EMAC_FCS_MIRR_CNT ( n ) (n&0xFFFF)

Macro defines for Flow Control Status Register Mirror Counter Current

Definition at line 298 of file lpc17xx_emac.h.

#define EMAC_INT_RX_DONE 0x00000008

Receive Done

Definition at line 335 of file lpc17xx_emac.h.

#define EMAC_INT_RX_ERR 0x00000002

Receive Error

Definition at line 333 of file lpc17xx_emac.h.

#define EMAC_INT_RX_FIN 0x00000004

RX Finished Process Descriptors

Definition at line 334 of file lpc17xx_emac.h.

#define EMAC_INT_RX_OVERRUN 0x00000001

Macro defines for Interrupt Status/Enable/Clear/Set Registers Overrun Error in RX Queue

Definition at line 332 of file lpc17xx_emac.h.

#define EMAC_INT_SOFT_INT 0x00001000

Software Triggered Interrupt

Definition at line 340 of file lpc17xx_emac.h.

#define EMAC_INT_TX_DONE 0x00000080

Transmit Done

Definition at line 339 of file lpc17xx_emac.h.

#define EMAC_INT_TX_ERR 0x00000020

Transmit Error

Definition at line 337 of file lpc17xx_emac.h.

#define EMAC_INT_TX_FIN 0x00000040

TX Finished Process Descriptors

Definition at line 338 of file lpc17xx_emac.h.

#define EMAC_INT_TX_UNDERRUN 0x00000010

Transmit Underrun

Definition at line 336 of file lpc17xx_emac.h.

#define EMAC_INT_WAKEUP 0x00002000

Wakeup Event Interrupt

Definition at line 341 of file lpc17xx_emac.h.

#define EMAC_IPGR_NBBIPG_P1 ( n ) ((n&0x7F)<<8)

Programmable field representing the optional carrierSense window referenced in IEEE 802.3/4.2.3.2.1 'Carrier Deference'

Definition at line 139 of file lpc17xx_emac.h.

#define EMAC_IPGR_NBBIPG_P2 ( n ) (n&0x7F)

Macro defines for Non Back-to-Back Inter-Packet-Gap Register Programmable field representing the Non-Back-to-Back Inter-Packet-Gap

Definition at line 134 of file lpc17xx_emac.h.

#define EMAC_IPGR_P1_DEF EMAC_IPGR_NBBIPG_P1(0x0C)

Recommended value for Programmable field representing the Non-Back-to-Back Inter-Packet-Gap Part 2

Definition at line 141 of file lpc17xx_emac.h.

#define EMAC_IPGR_P2_DEF (EMAC_IPGR_NBBIPG_P2(0x12))

Recommended value for Programmable field representing the Non-Back-to-Back Inter-Packet-Gap Part 1

Definition at line 136 of file lpc17xx_emac.h.

#define EMAC_IPGT_BBIPG ( n ) (n&0x7F)

Macro defines for Back-to-Back Inter-Packet-Gap Register Programmable field representing the nibble time offset of the minimum possible period between the end of any transmitted packet to the beginning of the next

Definition at line 120 of file lpc17xx_emac.h.

#define EMAC_IPGT_FULL_DUP (EMAC_IPGT_BBIPG(0x15))

Recommended value for Full Duplex of Programmable field representing the nibble time offset of the minimum possible period between the end of any transmitted packet to the beginning of the next

Definition at line 124 of file lpc17xx_emac.h.

#define EMAC_IPGT_HALF_DUP (EMAC_IPGT_BBIPG(0x12))

Recommended value for Half Duplex of Programmable field representing the nibble time offset of the minimum possible period between the end of any transmitted packet to the beginning of the next

Definition at line 128 of file lpc17xx_emac.h.

#define EMAC_MAC1_LOOPB 0x00000010

Loop Back Mode

Definition at line 90 of file lpc17xx_emac.h.

#define EMAC_MAC1_PASS_ALL 0x00000002

Pass All Receive Frames

Definition at line 87 of file lpc17xx_emac.h.

#define EMAC_MAC1_REC_EN 0x00000001

Macro defines for MAC Configuration Register 1 Receive Enable

Definition at line 86 of file lpc17xx_emac.h.

#define EMAC_MAC1_RES_MCS_RX 0x00000800

Reset MAC RX Control Sublayer

Definition at line 94 of file lpc17xx_emac.h.

#define EMAC_MAC1_RES_MCS_TX 0x00000200

Reset MAC TX Control Sublayer

Definition at line 92 of file lpc17xx_emac.h.

#define EMAC_MAC1_RES_RX 0x00000400

Reset RX Logic

Definition at line 93 of file lpc17xx_emac.h.

#define EMAC_MAC1_RES_TX 0x00000100

Reset TX Logic

Definition at line 91 of file lpc17xx_emac.h.

#define EMAC_MAC1_RX_FLOWC 0x00000004

RX Flow Control

Definition at line 88 of file lpc17xx_emac.h.

#define EMAC_MAC1_SIM_RES 0x00004000

Simulation Reset

Definition at line 95 of file lpc17xx_emac.h.

#define EMAC_MAC1_SOFT_RES 0x00008000

Soft Reset MAC

Definition at line 96 of file lpc17xx_emac.h.

#define EMAC_MAC1_TX_FLOWC 0x00000008

TX Flow Control

Definition at line 89 of file lpc17xx_emac.h.

#define EMAC_MAC2_ADET_PAD_EN 0x00000080

Auto Detect Pad Enable

Definition at line 108 of file lpc17xx_emac.h.

#define EMAC_MAC2_BACK_PRESSURE 0x00002000

Backoff Presurre / No Backoff

Definition at line 112 of file lpc17xx_emac.h.

#define EMAC_MAC2_CRC_EN 0x00000010

Append CRC to every Frame

Definition at line 105 of file lpc17xx_emac.h.

#define EMAC_MAC2_DLY_CRC 0x00000008

Delayed CRC Mode

Definition at line 104 of file lpc17xx_emac.h.

#define EMAC_MAC2_EXCESS_DEF 0x00004000

Excess Defer

Definition at line 113 of file lpc17xx_emac.h.

#define EMAC_MAC2_FRM_LEN_CHK 0x00000002

Frame Length Checking

Definition at line 102 of file lpc17xx_emac.h.

#define EMAC_MAC2_FULL_DUP 0x00000001

Macro defines for MAC Configuration Register 2 Full-Duplex Mode

Definition at line 101 of file lpc17xx_emac.h.

#define EMAC_MAC2_HUGE_FRM_EN 0x00000004

Huge Frame Enable

Definition at line 103 of file lpc17xx_emac.h.

#define EMAC_MAC2_LPREAM_ENF 0x00000200

Long Preamble Enforcement

Definition at line 110 of file lpc17xx_emac.h.

#define EMAC_MAC2_NO_BACKOFF 0x00001000

No Backoff Algorithm

Definition at line 111 of file lpc17xx_emac.h.

#define EMAC_MAC2_PAD_EN 0x00000020

Pad all Short Frames

Definition at line 106 of file lpc17xx_emac.h.

#define EMAC_MAC2_PPREAM_ENF 0x00000100

Pure Preamble Enforcement

Definition at line 109 of file lpc17xx_emac.h.

#define EMAC_MAC2_VLAN_PAD_EN 0x00000040

VLAN Pad Enable

Definition at line 107 of file lpc17xx_emac.h.

#define EMAC_MADR_PHY_ADR ( n ) ((n&0x1F)<<8)

PHY Address Field

Definition at line 196 of file lpc17xx_emac.h.

#define EMAC_MADR_REG_ADR ( n ) (n&0x1F)

Macro defines for MII Management Address Register MII Register Address field

Definition at line 195 of file lpc17xx_emac.h.

#define EMAC_MAXF_MAXFRMLEN ( n ) (n&0xFFFF)

Macro defines for Maximum Frame Register Represents a maximum receive frame of 1536 octets

Definition at line 159 of file lpc17xx_emac.h.

#define EMAC_MCFG_CLK_SEL ( n ) ((n&0x0F)<<2)

Clock Select Field

Definition at line 179 of file lpc17xx_emac.h.

#define EMAC_MCFG_MII_MAXCLK 2500000UL

MII Clock max

Definition at line 181 of file lpc17xx_emac.h.

#define EMAC_MCFG_RES_MII 0x00008000

Reset MII Management Hardware

Definition at line 180 of file lpc17xx_emac.h.

#define EMAC_MCFG_SCAN_INC 0x00000001

Macro defines for MII Management Configuration Register Scan Increment PHY Address

Definition at line 177 of file lpc17xx_emac.h.

#define EMAC_MCFG_SUPP_PREAM 0x00000002

Suppress Preamble

Definition at line 178 of file lpc17xx_emac.h.

#define EMAC_MCMD_READ 0x00000001

Macro defines for MII Management Command Register MII Read

Definition at line 186 of file lpc17xx_emac.h.

#define EMAC_MCMD_SCAN 0x00000002

MII Scan continuously

Definition at line 187 of file lpc17xx_emac.h.

#define EMAC_MII_RD_TOUT 0x00050000

MII Read timeout count

Definition at line 190 of file lpc17xx_emac.h.

#define EMAC_MII_WR_TOUT 0x00050000

MII Write timeout count

Definition at line 189 of file lpc17xx_emac.h.

#define EMAC_MIND_BUSY 0x00000001

Macro defines for MII Management Indicators Register MII is Busy

Definition at line 211 of file lpc17xx_emac.h.

#define EMAC_MIND_MII_LINK_FAIL 0x00000008

MII Link Failed

Definition at line 214 of file lpc17xx_emac.h.

#define EMAC_MIND_NOT_VAL 0x00000004

MII Read Data not valid

Definition at line 213 of file lpc17xx_emac.h.

#define EMAC_MIND_SCAN 0x00000002

MII Scanning in Progress

Definition at line 212 of file lpc17xx_emac.h.

#define EMAC_MRDD_DATA ( n ) (n&0xFFFF)

Macro defines for MII Management Read Data Register Data field for MMI Management Read Data register

Definition at line 206 of file lpc17xx_emac.h.

#define EMAC_MWTD_DATA ( n ) (n&0xFFFF)

Macro defines for MII Management Write Data Register Data field for MMI Management Write Data register

Definition at line 201 of file lpc17xx_emac.h.

#define EMAC_NUM_RX_FRAG 4

Num.of RX Fragments 4*1536= 6.0kB

Definition at line 77 of file lpc17xx_emac.h.

#define EMAC_NUM_TX_FRAG 3

Num.of TX Fragments 3*1536= 4.6kB

Definition at line 78 of file lpc17xx_emac.h.

#define EMAC_OLD_EMAC_MODULE_ID 0x39022000

Rev. ID for first rev '-'

Definition at line 412 of file lpc17xx_emac.h.

#define EMAC_PD_POWER_DOWN 0x80000000

Macro defines for Power Down Register Power Down MAC

Definition at line 346 of file lpc17xx_emac.h.

#define EMAC_PHY_AUTO_NEG 0x3000

Select Auto Negotiation

Definition at line 484 of file lpc17xx_emac.h.

#define EMAC_PHY_BMCR_AN (1<<12)

Auto Negotiation

Definition at line 449 of file lpc17xx_emac.h.

#define EMAC_PHY_BMCR_DUPLEX (1<<8)

Duplex mode

Definition at line 453 of file lpc17xx_emac.h.

#define EMAC_PHY_BMCR_ISOLATE (1<<10)

Isolate

Definition at line 451 of file lpc17xx_emac.h.

#define EMAC_PHY_BMCR_LOOPBACK (1<<14)

Loop back

Definition at line 447 of file lpc17xx_emac.h.

#define EMAC_PHY_BMCR_POWERDOWN (1<<11)

Power down mode

Definition at line 450 of file lpc17xx_emac.h.

#define EMAC_PHY_BMCR_RE_AN (1<<9)

Restart auto negotiation

Definition at line 452 of file lpc17xx_emac.h.

#define EMAC_PHY_BMCR_RESET (1<<15)

Macro defines for PHY Basic Mode Control Register Reset bit

Definition at line 446 of file lpc17xx_emac.h.

#define EMAC_PHY_BMCR_SPEED_SEL (1<<13)

Speed selection

Definition at line 448 of file lpc17xx_emac.h.

#define EMAC_PHY_BMSR_100BE_T4 (1<<15)

Macro defines for PHY Basic Mode Status Status Register 100 base T4

Definition at line 458 of file lpc17xx_emac.h.

#define EMAC_PHY_BMSR_100TX_FULL (1<<14)

100 base full duplex

Definition at line 459 of file lpc17xx_emac.h.

#define EMAC_PHY_BMSR_100TX_HALF (1<<13)

100 base half duplex

Definition at line 460 of file lpc17xx_emac.h.

#define EMAC_PHY_BMSR_10BE_FULL (1<<12)

10 base T full duplex

Definition at line 461 of file lpc17xx_emac.h.

#define EMAC_PHY_BMSR_10BE_HALF (1<<11)

10 base T half duplex

Definition at line 462 of file lpc17xx_emac.h.

#define EMAC_PHY_BMSR_AUTO_DONE (1<<5)

Auto negotiation complete

Definition at line 464 of file lpc17xx_emac.h.

#define EMAC_PHY_BMSR_LINK_ESTABLISHED (1<<2)

Link status

Definition at line 467 of file lpc17xx_emac.h.

#define EMAC_PHY_BMSR_LINK_STATUS (1<<2)

Link status

Definition at line 491 of file lpc17xx_emac.h.

#define EMAC_PHY_BMSR_NO_AUTO (1<<3)

Auto Negotiation ability

Definition at line 466 of file lpc17xx_emac.h.

#define EMAC_PHY_BMSR_NOPREAM (1<<6)

MF Preamable Supress

Definition at line 463 of file lpc17xx_emac.h.

#define EMAC_PHY_BMSR_REMOTE_FAULT (1<<4)

Remote fault

Definition at line 465 of file lpc17xx_emac.h.

#define EMAC_PHY_FULLD_100M 0x2100

Full Duplex 100Mbit

Definition at line 480 of file lpc17xx_emac.h.

#define EMAC_PHY_FULLD_10M 0x0100

Full Duplex 10Mbit

Definition at line 482 of file lpc17xx_emac.h.

#define EMAC_PHY_HALFD_100M 0x2000

Half Duplex 100Mbit

Definition at line 481 of file lpc17xx_emac.h.

#define EMAC_PHY_HALFD_10M 0x0000

Half Duplex 10MBit

Definition at line 483 of file lpc17xx_emac.h.

#define EMAC_PHY_REG_10BTSCR 0x1A

10Base-T Status/Control Register

Definition at line 439 of file lpc17xx_emac.h.

#define EMAC_PHY_REG_ANAR 0x04

Auto-Negotiation Advertisement

Definition at line 421 of file lpc17xx_emac.h.

#define EMAC_PHY_REG_ANER 0x06

Auto-Neg. Expansion Register

Definition at line 423 of file lpc17xx_emac.h.

#define EMAC_PHY_REG_ANLPAR 0x05

Auto-Neg. Link Partner Abitily

Definition at line 422 of file lpc17xx_emac.h.

#define EMAC_PHY_REG_ANNPTR 0x07

Auto-Neg. Next Page TX

Definition at line 424 of file lpc17xx_emac.h.

#define EMAC_PHY_REG_BMCR 0x00

Macro defines for DP83848C PHY Registers Basic Mode Control Register

Definition at line 417 of file lpc17xx_emac.h.

#define EMAC_PHY_REG_BMSR 0x01

Basic Mode Status Register

Definition at line 418 of file lpc17xx_emac.h.

#define EMAC_PHY_REG_CDCTRL1 0x1B

CD Test Control and BIST Extens.

Definition at line 440 of file lpc17xx_emac.h.

#define EMAC_PHY_REG_EDCR 0x1D

Energy Detect Control Register

Definition at line 441 of file lpc17xx_emac.h.

#define EMAC_PHY_REG_FCSCR 0x14

False Carrier Sense Counter

Definition at line 433 of file lpc17xx_emac.h.

#define EMAC_PHY_REG_IDR1 0x02

PHY Identifier 1

Definition at line 419 of file lpc17xx_emac.h.

#define EMAC_PHY_REG_IDR2 0x03

PHY Identifier 2

Definition at line 420 of file lpc17xx_emac.h.

#define EMAC_PHY_REG_LEDCR 0x18

LED Direct Control Register

Definition at line 437 of file lpc17xx_emac.h.

#define EMAC_PHY_REG_LPNPA 0x08

Definition at line 425 of file lpc17xx_emac.h.

#define EMAC_PHY_REG_MICR 0x11

MII Interrupt Control Register

Definition at line 431 of file lpc17xx_emac.h.

#define EMAC_PHY_REG_MISR 0x12

MII Interrupt Status Register

Definition at line 432 of file lpc17xx_emac.h.

#define EMAC_PHY_REG_PCSR 0x16

PCS Sublayer Config. and Status

Definition at line 435 of file lpc17xx_emac.h.

#define EMAC_PHY_REG_PHYCR 0x19

PHY Control Register

Definition at line 438 of file lpc17xx_emac.h.

#define EMAC_PHY_REG_RBR 0x17

RMII and Bypass Register

Definition at line 436 of file lpc17xx_emac.h.

#define EMAC_PHY_REG_RECR 0x15

Receive Error Counter

Definition at line 434 of file lpc17xx_emac.h.

#define EMAC_PHY_REG_STS 0x10

Macro defines for PHY Extended Registers Status Register

Definition at line 430 of file lpc17xx_emac.h.

#define EMAC_PHY_RESP_TOUT 0x100000UL

PHY device reset time out definition

Definition at line 409 of file lpc17xx_emac.h.

#define EMAC_PHY_SR_100_SPEED ((1<<14)|(1<<13))

Definition at line 489 of file lpc17xx_emac.h.

#define EMAC_PHY_SR_AUTO_DONE (1<<4)

Auto Negotiation complete

Definition at line 474 of file lpc17xx_emac.h.

#define EMAC_PHY_SR_DUP (1<<2)

Duplex status

Definition at line 476 of file lpc17xx_emac.h.

#define EMAC_PHY_SR_FULL_DUP ((1<<14)|(1<<12))

Definition at line 490 of file lpc17xx_emac.h.

#define EMAC_PHY_SR_JABBER (1<<5)

Jabber detect

Definition at line 473 of file lpc17xx_emac.h.

#define EMAC_PHY_SR_LINK (1<<0)

Link Status

Definition at line 478 of file lpc17xx_emac.h.

#define EMAC_PHY_SR_LOOPBACK (1<<3)

Loop back status

Definition at line 475 of file lpc17xx_emac.h.

#define EMAC_PHY_SR_REMOTE_FAULT (1<<6)

Macro defines for PHY Status Register Remote Fault

Definition at line 472 of file lpc17xx_emac.h.

#define EMAC_PHY_SR_SPEED (1<<1)

Speed status

Definition at line 477 of file lpc17xx_emac.h.

#define EMAC_RCTRL_INT 0x80000000

Generate RxDone Interrupt

Definition at line 353 of file lpc17xx_emac.h.

#define EMAC_RCTRL_SIZE ( n ) (n&0x7FF)

Macro defines for RX Descriptor Control Word Buffer size field

Definition at line 352 of file lpc17xx_emac.h.

#define EMAC_RFC_BCAST_EN 0x00000002

Accept Broadcast Frames Enable

Definition at line 306 of file lpc17xx_emac.h.

#define EMAC_RFC_MAGP_WOL_EN 0x00001000

Magic Packet Filter WoL Enable

Definition at line 311 of file lpc17xx_emac.h.

#define EMAC_RFC_MCAST_EN 0x00000004

Accept Multicast Frames Enable

Definition at line 307 of file lpc17xx_emac.h.

#define EMAC_RFC_MCAST_HASH_EN 0x00000010

Accept Multicast Hash Filter Fram.

Definition at line 309 of file lpc17xx_emac.h.

#define EMAC_RFC_PERFECT_EN 0x00000020

Accept Perfect Match Enable

Definition at line 310 of file lpc17xx_emac.h.

#define EMAC_RFC_PFILT_WOL_EN 0x00002000

Perfect Filter WoL Enable

Definition at line 312 of file lpc17xx_emac.h.

#define EMAC_RFC_UCAST_EN 0x00000001

Macro defines for Receive Filter Control Register Accept Unicast Frames Enable

Definition at line 305 of file lpc17xx_emac.h.

#define EMAC_RFC_UCAST_HASH_EN 0x00000008

Accept Unicast Hash Filter Frames

Definition at line 308 of file lpc17xx_emac.h.

#define EMAC_RHASH_DA 0x001FF000

Hash CRC for Destination Address

Definition at line 359 of file lpc17xx_emac.h.

#define EMAC_RHASH_SA 0x000001FF

Macro defines for RX Status Hash CRC Word Hash CRC for Source Address

Definition at line 358 of file lpc17xx_emac.h.

#define EMAC_RINFO_ALIGN_ERR 0x08000000

Alignment Error

Definition at line 374 of file lpc17xx_emac.h.

#define EMAC_RINFO_BCAST 0x00400000

Broadcast Frame

Definition at line 369 of file lpc17xx_emac.h.

#define EMAC_RINFO_CRC_ERR 0x00800000

CRC Error in Frame

Definition at line 370 of file lpc17xx_emac.h.

#define EMAC_RINFO_CTRL_FRAME 0x00040000

Control Frame

Definition at line 365 of file lpc17xx_emac.h.

#define EMAC_RINFO_ERR 0x80000000

Error Occured (OR of all errors)

Definition at line 378 of file lpc17xx_emac.h.

#define EMAC_RINFO_ERR_MASK

Value:

(EMAC_RINFO_FAIL_FILT | EMAC_RINFO_CRC_ERR   | EMAC_RINFO_SYM_ERR | \
EMAC_RINFO_LEN_ERR   | EMAC_RINFO_ALIGN_ERR | EMAC_RINFO_OVERRUN)

Definition at line 379 of file lpc17xx_emac.h.

#define EMAC_RINFO_FAIL_FILT 0x00100000

RX Filter Failed

Definition at line 367 of file lpc17xx_emac.h.

#define EMAC_RINFO_LAST_FLAG 0x40000000

Last Fragment in Frame

Definition at line 377 of file lpc17xx_emac.h.

#define EMAC_RINFO_LEN_ERR 0x02000000

Length Error

Definition at line 372 of file lpc17xx_emac.h.

#define EMAC_RINFO_MCAST 0x00200000

Multicast Frame

Definition at line 368 of file lpc17xx_emac.h.

#define EMAC_RINFO_NO_DESCR 0x20000000

No new Descriptor available

Definition at line 376 of file lpc17xx_emac.h.

#define EMAC_RINFO_OVERRUN 0x10000000

Receive overrun

Definition at line 375 of file lpc17xx_emac.h.

#define EMAC_RINFO_RANGE_ERR 0x04000000

Range Error (exceeded max. size)

Definition at line 373 of file lpc17xx_emac.h.

#define EMAC_RINFO_SIZE 0x000007FF

Macro defines for RX Status Information Word Data size in bytes

Definition at line 364 of file lpc17xx_emac.h.

#define EMAC_RINFO_SYM_ERR 0x01000000

Symbol Error from PHY

Definition at line 371 of file lpc17xx_emac.h.

#define EMAC_RINFO_VLAN 0x00080000

VLAN Frame

Definition at line 366 of file lpc17xx_emac.h.

#define EMAC_RSV_BCAST 0x02000000

Broadcast Frame

Definition at line 282 of file lpc17xx_emac.h.

#define EMAC_RSV_BYTE_CNT 0x0000FFFF

Macro defines for Receive Status Vector Register Receive Byte Count

Definition at line 272 of file lpc17xx_emac.h.

#define EMAC_RSV_CARR_SEEN 0x00040000

Carrier Event Previously Seen

Definition at line 275 of file lpc17xx_emac.h.

#define EMAC_RSV_CRC_ERR 0x00100000

CRC Error

Definition at line 277 of file lpc17xx_emac.h.

#define EMAC_RSV_CTRL_FRAME 0x08000000

Control Frame

Definition at line 284 of file lpc17xx_emac.h.

#define EMAC_RSV_DRIB_NIBB 0x04000000

Dribble Nibble

Definition at line 283 of file lpc17xx_emac.h.

#define EMAC_RSV_LEN_CHKERR 0x00200000

Length Check Error

Definition at line 278 of file lpc17xx_emac.h.

#define EMAC_RSV_LEN_OUTRNG 0x00400000

Length Out of Range

Definition at line 279 of file lpc17xx_emac.h.

#define EMAC_RSV_MCAST 0x01000000

Multicast Frame

Definition at line 281 of file lpc17xx_emac.h.

#define EMAC_RSV_PAUSE 0x10000000

Pause Frame

Definition at line 285 of file lpc17xx_emac.h.

#define EMAC_RSV_PKT_IGNORED 0x00010000

Packet Previously Ignored

Definition at line 273 of file lpc17xx_emac.h.

#define EMAC_RSV_REC_CODEV 0x00080000

Receive Code Violation

Definition at line 276 of file lpc17xx_emac.h.

#define EMAC_RSV_REC_OK 0x00800000

Frame Received OK

Definition at line 280 of file lpc17xx_emac.h.

#define EMAC_RSV_RXDV_SEEN 0x00020000

RXDV Event Previously Seen

Definition at line 274 of file lpc17xx_emac.h.

#define EMAC_RSV_UNSUPP_OPC 0x20000000

Unsupported Opcode

Definition at line 286 of file lpc17xx_emac.h.

#define EMAC_RSV_VLAN 0x40000000

VLAN Frame

Definition at line 287 of file lpc17xx_emac.h.

#define EMAC_SR_RX_EN 0x00000001

Macro defines for Status Register Enable Receive

Definition at line 239 of file lpc17xx_emac.h.

#define EMAC_SR_TX_EN 0x00000002

Enable Transmit

Definition at line 240 of file lpc17xx_emac.h.

#define EMAC_SUPP_RES_RMII 0x00000800

Reset Reduced MII Logic

Definition at line 165 of file lpc17xx_emac.h.

#define EMAC_SUPP_SPEED 0x00000100

Macro defines for PHY Support Register Reduced MII Logic Current Speed

Definition at line 164 of file lpc17xx_emac.h.

#define EMAC_TCTRL_CRC 0x20000000

Append a hardware CRC to Frame

Definition at line 389 of file lpc17xx_emac.h.

#define EMAC_TCTRL_HUGE 0x08000000

Enable Huge Frame

Definition at line 387 of file lpc17xx_emac.h.

#define EMAC_TCTRL_INT 0x80000000

Generate TxDone Interrupt

Definition at line 391 of file lpc17xx_emac.h.

#define EMAC_TCTRL_LAST 0x40000000

Last Descriptor for TX Frame

Definition at line 390 of file lpc17xx_emac.h.

#define EMAC_TCTRL_OVERRIDE 0x04000000

Override Default MAC Registers

Definition at line 386 of file lpc17xx_emac.h.

#define EMAC_TCTRL_PAD 0x10000000

Pad short Frames to 64 bytes

Definition at line 388 of file lpc17xx_emac.h.

#define EMAC_TCTRL_SIZE 0x000007FF

Macro defines for TX Descriptor Control Word Size of data buffer in bytes

Definition at line 385 of file lpc17xx_emac.h.

#define EMAC_TEST_SHCUT_PQUANTA 0x00000001

Macro defines for Test Register Shortcut Pause Quanta

Definition at line 170 of file lpc17xx_emac.h.

#define EMAC_TEST_TST_BACKP 0x00000004

Test Back Pressure

Definition at line 172 of file lpc17xx_emac.h.

#define EMAC_TEST_TST_PAUSE 0x00000002

Test Pause

Definition at line 171 of file lpc17xx_emac.h.

#define EMAC_TINFO_COL_CNT 0x01E00000

Macro defines for TX Status Information Word Collision Count

Definition at line 396 of file lpc17xx_emac.h.

#define EMAC_TINFO_DEFER 0x02000000

Packet Deferred (not an error)

Definition at line 397 of file lpc17xx_emac.h.

#define EMAC_TINFO_ERR 0x80000000

Error Occured (OR of all errors)

Definition at line 403 of file lpc17xx_emac.h.

#define EMAC_TINFO_EXCESS_COL 0x08000000

Excessive Collision

Definition at line 399 of file lpc17xx_emac.h.

#define EMAC_TINFO_EXCESS_DEF 0x04000000

Excessive Deferral

Definition at line 398 of file lpc17xx_emac.h.

#define EMAC_TINFO_LATE_COL 0x10000000

Late Collision Occured

Definition at line 400 of file lpc17xx_emac.h.

#define EMAC_TINFO_NO_DESCR 0x40000000

No new Descriptor available

Definition at line 402 of file lpc17xx_emac.h.

#define EMAC_TINFO_UNDERRUN 0x20000000

Transmit Underrun

Definition at line 401 of file lpc17xx_emac.h.

#define EMAC_TSV0_BACK_PRESS 0x40000000

Backpressure Method Applied

Definition at line 260 of file lpc17xx_emac.h.

#define EMAC_TSV0_BCAST 0x00000020

Broadcast Destination

Definition at line 250 of file lpc17xx_emac.h.

#define EMAC_TSV0_BYTES 0x0FFFF000

Total Bytes Transferred

Definition at line 257 of file lpc17xx_emac.h.

#define EMAC_TSV0_CRC_ERR 0x00000001

Macro defines for Transmit Status Vector 0 Register CRC error

Definition at line 245 of file lpc17xx_emac.h.

#define EMAC_TSV0_CTRL_FRAME 0x10000000

Control Frame

Definition at line 258 of file lpc17xx_emac.h.

#define EMAC_TSV0_DONE 0x00000008

Tramsmission Completed

Definition at line 248 of file lpc17xx_emac.h.

#define EMAC_TSV0_EXC_COLL 0x00000100

Excessive Collision

Definition at line 253 of file lpc17xx_emac.h.

#define EMAC_TSV0_EXC_DEFER 0x00000080

Excessive Packet Deferral

Definition at line 252 of file lpc17xx_emac.h.

#define EMAC_TSV0_GIANT 0x00000400

Giant Frame

Definition at line 255 of file lpc17xx_emac.h.

#define EMAC_TSV0_LATE_COLL 0x00000200

Late Collision Occured

Definition at line 254 of file lpc17xx_emac.h.

#define EMAC_TSV0_LEN_CHKERR 0x00000002

Length Check Error

Definition at line 246 of file lpc17xx_emac.h.

#define EMAC_TSV0_LEN_OUTRNG 0x00000004

Length Out of Range

Definition at line 247 of file lpc17xx_emac.h.

#define EMAC_TSV0_MCAST 0x00000010

Multicast Destination

Definition at line 249 of file lpc17xx_emac.h.

#define EMAC_TSV0_PAUSE 0x20000000

Pause Frame

Definition at line 259 of file lpc17xx_emac.h.

#define EMAC_TSV0_PKT_DEFER 0x00000040

Packet Deferred

Definition at line 251 of file lpc17xx_emac.h.

#define EMAC_TSV0_UNDERRUN 0x00000800

Buffer Underrun

Definition at line 256 of file lpc17xx_emac.h.

#define EMAC_TSV0_VLAN 0x80000000

VLAN Frame

Definition at line 261 of file lpc17xx_emac.h.

#define EMAC_TSV1_BYTE_CNT 0x0000FFFF

Macro defines for Transmit Status Vector 1 Register Transmit Byte Count

Definition at line 266 of file lpc17xx_emac.h.

#define EMAC_TSV1_COLL_CNT 0x000F0000

Transmit Collision Count

Definition at line 267 of file lpc17xx_emac.h.

#define EMAC_TX_FRAME_TOUT 0x00100000

Frame Transmit timeout count

Definition at line 80 of file lpc17xx_emac.h.

#define EMAC_WOL_BCAST 0x00000002

Broadcast Frame caused WoL

Definition at line 318 of file lpc17xx_emac.h.

#define EMAC_WOL_BITMASK 0x01BF

Receive Filter WoL Status/Clear bitmasl value

Definition at line 325 of file lpc17xx_emac.h.

#define EMAC_WOL_MAG_PACKET 0x00000100

Magic Packet Filter caused WoL

Definition at line 324 of file lpc17xx_emac.h.

#define EMAC_WOL_MCAST 0x00000004

Multicast Frame caused WoL

Definition at line 319 of file lpc17xx_emac.h.

#define EMAC_WOL_MCAST_HASH 0x00000010

Multicast Hash Filter Frame WoL

Definition at line 321 of file lpc17xx_emac.h.

#define EMAC_WOL_PERFECT 0x00000020

Perfect Filter WoL

Definition at line 322 of file lpc17xx_emac.h.

#define EMAC_WOL_RX_FILTER 0x00000080

RX Filter caused WoL

Definition at line 323 of file lpc17xx_emac.h.

#define EMAC_WOL_UCAST 0x00000001

Macro defines for Receive Filter WoL Status/Clear Registers Unicast Frame caused WoL

Definition at line 317 of file lpc17xx_emac.h.

#define EMAC_WOL_UCAST_HASH 0x00000008

Unicast Hash Filter Frame WoL

Definition at line 320 of file lpc17xx_emac.h.

Generated on Tue Jun 7 14:59:33 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: EMAC Public Types

EMAC Public Types
[EMAC]

Data Structures

struct | RX_Desc
RX Descriptor structure type definition. More...
struct | RX_Stat
RX Status structure type definition. More...
struct | TX_Desc
TX Descriptor structure type definition. More...
struct | TX_Stat
TX Status structure type definition. More...
struct | EMAC_PACKETBUF_Type
TX Data Buffer structure definition. More...
struct | EMAC_CFG_Type
EMAC configuration structure definition. More...
Generated on Tue Jun 7 14:59:33 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: EMAC Public Functions

EMAC Public Functions
[EMAC]

Functions

Status | EMAC_Init (EMAC_CFG_Type *EMAC_ConfigStruct)
Initializes the EMAC peripheral according to the specified parameters in the EMAC_ConfigStruct.
void | EMAC_DeInit (void)
De-initializes the EMAC peripheral registers to their default reset values.
int32_t | EMAC_CheckPHYStatus (uint32_t ulPHYState)
Check specified PHY status in EMAC peripheral.
int32_t | EMAC_SetPHYMode (uint32_t ulPHYMode)
Set specified PHY mode in EMAC peripheral.
int32_t | EMAC_UpdatePHYStatus (void)
Auto-Configures value for the EMAC configuration register to match with current PHY mode.
void | EMAC_SetHashFilter (uint8_t dstMAC_addr[], FunctionalState NewState)
Enable/Disable hash filter functionality for specified destination MAC address in EMAC module.
void | EMAC_SetFilterMode (uint32_t ulFilterMode, FunctionalState NewState)
Enable/Disable Filter mode for each specified type EMAC peripheral.
void | EMAC_WritePacketBuffer (EMAC_PACKETBUF_Type *pDataStruct)
Write data to Tx packet data buffer at current index due to TxProduceIndex.
void | EMAC_ReadPacketBuffer (EMAC_PACKETBUF_Type *pDataStruct)
Read data from Rx packet data buffer at current index due to RxConsumeIndex.
void | EMAC_IntCmd (uint32_t ulIntType, FunctionalState NewState)
Enable/Disable interrupt for each type in EMAC.
IntStatus | EMAC_IntGetStatus (uint32_t ulIntType)
Check whether if specified interrupt flag is set or not for each interrupt type in EMAC and clear interrupt pending if it is set.
Bool | EMAC_CheckReceiveIndex (void)
Check whether if the current RxConsumeIndex is not equal to the current RxProduceIndex.
Bool | EMAC_CheckTransmitIndex (void)
Check whether if the current TxProduceIndex is not equal to the current RxProduceIndex - 1.
void | EMAC_UpdateRxConsumeIndex (void)
Increase the RxConsumeIndex (after reading the Receive buffer to release the Receive buffer) and wrap-around the index if it reaches the maximum Receive Number.
void | EMAC_UpdateTxProduceIndex (void)
Increase the TxProduceIndex (after writting to the Transmit buffer to enable the Transmit buffer) and wrap-around the index if it reaches the maximum Transmit Number.
FlagStatus | EMAC_CheckReceiveDataStatus (uint32_t ulRxStatType)
Get current status value of receive data (due to RxConsumeIndex).
uint32_t | EMAC_GetReceiveDataSize (void)
Get size of current Received data in received buffer (due to RxConsumeIndex).
FlagStatus | EMAC_GetWoLStatus (uint32_t ulWoLMode)
Get status of Wake On LAN Filter for each specified type in EMAC peripheral, clear this status if it is set.

Function Documentation

int32_t EMAC_CheckPHYStatus ( uint32_t ulPHYState )

Check specified PHY status in EMAC peripheral.

Parameters:
[in] ulPHYState Specified PHY Status Type, should be:
  • EMAC_PHY_STAT_LINK: Link Status
  • EMAC_PHY_STAT_SPEED: Speed Status
  • EMAC_PHY_STAT_DUP: Duplex Status
Returns:
Status of specified PHY status (0 or 1). (-1) if error.
Note: For EMAC_PHY_STAT_LINK, return value:
  • 0: Link Down
  • 1: Link Up For EMAC_PHY_STAT_SPEED, return value:
  • 0: 10Mbps
  • 1: 100Mbps For EMAC_PHY_STAT_DUP, return value:
  • 0: Half-Duplex
  • 1: Full-Duplex

Definition at line 420 of file lpc17xx_emac.c.

FlagStatus EMAC_CheckReceiveDataStatus ( uint32_t ulRxStatType )

Get current status value of receive data (due to RxConsumeIndex).

Parameters:
[in] ulRxStatType Received Status type, should be one of following:
  • EMAC_RINFO_CTRL_FRAME: Control Frame
  • EMAC_RINFO_VLAN: VLAN Frame
  • EMAC_RINFO_FAIL_FILT: RX Filter Failed
  • EMAC_RINFO_MCAST: Multicast Frame
  • EMAC_RINFO_BCAST: Broadcast Frame
  • EMAC_RINFO_CRC_ERR: CRC Error in Frame
  • EMAC_RINFO_SYM_ERR: Symbol Error from PHY
  • EMAC_RINFO_LEN_ERR: Length Error
  • EMAC_RINFO_RANGE_ERR: Range error(exceeded max size)
  • EMAC_RINFO_ALIGN_ERR: Alignment error
  • EMAC_RINFO_OVERRUN: Receive overrun
  • EMAC_RINFO_NO_DESCR: No new Descriptor available
  • EMAC_RINFO_LAST_FLAG: last Fragment in Frame
  • EMAC_RINFO_ERR: Error Occurred (OR of all error)
Returns:
Current value of receive data (due to RxConsumeIndex)

Definition at line 891 of file lpc17xx_emac.c.

Bool EMAC_CheckReceiveIndex ( void )

Check whether if the current RxConsumeIndex is not equal to the current RxProduceIndex.

Parameters:
[in] None
Returns:
TRUE if they're not equal, otherwise return FALSE
Note: In case the RxConsumeIndex is not equal to the RxProduceIndex, it means there're available data has been received. They should be read out and released the Receive Data Buffer by updating the RxConsumeIndex value.

Definition at line 841 of file lpc17xx_emac.c.

Bool EMAC_CheckTransmitIndex ( void )

Check whether if the current TxProduceIndex is not equal to the current RxProduceIndex - 1.

Parameters:
[in] None
Returns:
TRUE if they're not equal, otherwise return FALSE
Note: In case the RxConsumeIndex is equal to the RxProduceIndex - 1, it means the transmit buffer is available and data can be written to transmit buffer to be sent.

Definition at line 861 of file lpc17xx_emac.c.

void EMAC_DeInit ( void )

De-initializes the EMAC peripheral registers to their default reset values.

Parameters:
[in] None
Returns:
None

Definition at line 388 of file lpc17xx_emac.c.

uint32_t EMAC_GetReceiveDataSize ( void )

Get size of current Received data in received buffer (due to RxConsumeIndex).

Parameters:
[in] None
Returns:
Size of received data

Definition at line 905 of file lpc17xx_emac.c.

FlagStatus EMAC_GetWoLStatus ( uint32_t ulWoLMode )

Get status of Wake On LAN Filter for each specified type in EMAC peripheral, clear this status if it is set.

Parameters:
[in] ulWoLMode WoL Filter mode, should be:
  • EMAC_WOL_UCAST: unicast frames caused WoL
  • EMAC_WOL_UCAST: broadcast frame caused WoL
  • EMAC_WOL_MCAST: multicast frame caused WoL
  • EMAC_WOL_UCAST_HASH: unicast frame that passes the imperfect hash filter caused WoL
  • EMAC_WOL_MCAST_HASH: multicast frame that passes the imperfect hash filter caused WoL
  • EMAC_WOL_PERFECT:perfect address matching filter caused WoL
  • EMAC_WOL_RX_FILTER: the receive filter caused WoL
  • EMAC_WOL_MAG_PACKET: the magic packet filter caused WoL
Returns:
SET/RESET

Definition at line 718 of file lpc17xx_emac.c.

Status EMAC_Init ( EMAC_CFG_Type * EMAC_ConfigStruct )

Initializes the EMAC peripheral according to the specified parameters in the EMAC_ConfigStruct.

Parameters:
[in] EMAC_ConfigStruct Pointer to a EMAC_CFG_Type structure that contains the configuration information for the specified EMAC peripheral.
Returns:
None
Note: This function will initialize EMAC module according to procedure below:
  • Remove the soft reset condition from the MAC
  • Configure the PHY via the MIIM interface of the MAC
  • Select RMII mode
  • Configure the transmit and receive DMA engines, including the descriptor arrays
  • Configure the host registers (MAC1,MAC2 etc.) in the MAC
  • Enable the receive and transmit data paths In default state after initializing, only Rx Done and Tx Done interrupt are enabled, all remain interrupts are disabled (Ref. from LPC17xx UM)

Definition at line 292 of file lpc17xx_emac.c.

void EMAC_IntCmd | ( | uint32_t | ulIntType,
 |  | FunctionalState | NewState
 | ) |  |

Enable/Disable interrupt for each type in EMAC.

Parameters:
[in] ulIntType Interrupt Type, should be:
  • EMAC_INT_RX_OVERRUN: Receive Overrun
  • EMAC_INT_RX_ERR: Receive Error
  • EMAC_INT_RX_FIN: Receive Descriptor Finish
  • EMAC_INT_RX_DONE: Receive Done
  • EMAC_INT_TX_UNDERRUN: Transmit Under-run
  • EMAC_INT_TX_ERR: Transmit Error
  • EMAC_INT_TX_FIN: Transmit descriptor finish
  • EMAC_INT_TX_DONE: Transmit Done
  • EMAC_INT_SOFT_INT: Software interrupt
  • EMAC_INT_WAKEUP: Wakeup interrupt
[in] NewState New State of this function, should be:
  • ENABLE.
  • DISABLE.
Returns:
None

Definition at line 794 of file lpc17xx_emac.c.

IntStatus EMAC_IntGetStatus ( uint32_t ulIntType )

Check whether if specified interrupt flag is set or not for each interrupt type in EMAC and clear interrupt pending if it is set.

Parameters:
[in] ulIntType Interrupt Type, should be:
  • EMAC_INT_RX_OVERRUN: Receive Overrun
  • EMAC_INT_RX_ERR: Receive Error
  • EMAC_INT_RX_FIN: Receive Descriptor Finish
  • EMAC_INT_RX_DONE: Receive Done
  • EMAC_INT_TX_UNDERRUN: Transmit Under-run
  • EMAC_INT_TX_ERR: Transmit Error
  • EMAC_INT_TX_FIN: Transmit descriptor finish
  • EMAC_INT_TX_DONE: Transmit Done
  • EMAC_INT_SOFT_INT: Software interrupt
  • EMAC_INT_WAKEUP: Wakeup interrupt
Returns:
New state of specified interrupt (SET or RESET)

Definition at line 820 of file lpc17xx_emac.c.

void EMAC_ReadPacketBuffer ( EMAC_PACKETBUF_Type * pDataStruct )

Read data from Rx packet data buffer at current index due to RxConsumeIndex.

Parameters:
[in] pDataStruct Pointer to a EMAC_PACKETBUF_Type structure data that contain specified information about Packet data buffer.
Returns:
None

Definition at line 760 of file lpc17xx_emac.c.

void EMAC_SetFilterMode | ( | uint32_t | ulFilterMode,
 |  | FunctionalState | NewState
 | ) |  |

Enable/Disable Filter mode for each specified type EMAC peripheral.

Parameters:
[in] ulFilterMode Filter mode, should be:
  • EMAC_RFC_UCAST_EN: all frames of unicast types will be accepted
  • EMAC_RFC_BCAST_EN: broadcast frame will be accepted
  • EMAC_RFC_MCAST_EN: all frames of multicast types will be accepted
  • EMAC_RFC_UCAST_HASH_EN: The imperfect hash filter will be applied to unicast addresses
  • EMAC_RFC_MCAST_HASH_EN: The imperfect hash filter will be applied to multicast addresses
  • EMAC_RFC_PERFECT_EN: the destination address will be compared with the 6 byte station address programmed in the station address by the filter
  • EMAC_RFC_MAGP_WOL_EN: the result of the magic packet filter will generate a WoL interrupt when there is a match
  • EMAC_RFC_PFILT_WOL_EN: the result of the perfect address matching filter and the imperfect hash filter will generate a WoL interrupt when there is a match
[in] NewState New State of this command, should be:
  • ENABLE
  • DISABLE
Returns:
None

Definition at line 692 of file lpc17xx_emac.c.

void EMAC_SetHashFilter | ( | uint8_t | dstMAC_addr[],
 |  | FunctionalState | NewState
 | ) |  |

Enable/Disable hash filter functionality for specified destination MAC address in EMAC module.

Parameters:
[in] dstMAC_addr Pointer to the first MAC destination address, should be 6-bytes length, in order LSB to the MSB
[in] NewState New State of this command, should be:
  • ENABLE.
  • DISABLE.
Returns:
None
Note: The standard Ethernet cyclic redundancy check (CRC) function is calculated from the 6 byte destination address in the Ethernet frame (this CRC is calculated anyway as part of calculating the CRC of the whole frame), then bits [28:23] out of the 32 bits CRC result are taken to form the hash. The 6 bit hash is used to access the hash table: it is used as an index in the 64 bit HashFilter register that has been programmed with accept values. If the selected accept value is 1, the frame is accepted.

Definition at line 642 of file lpc17xx_emac.c.

int32_t EMAC_SetPHYMode ( uint32_t ulPHYMode )

Set specified PHY mode in EMAC peripheral.

Parameters:
[in] ulPHYMode Specified PHY mode, should be:
  • EMAC_MODE_AUTO
  • EMAC_MODE_10M_FULL
  • EMAC_MODE_10M_HALF
  • EMAC_MODE_100M_FULL
  • EMAC_MODE_100M_HALF
Returns:
Return (0) if no error, otherwise return (-1)

Definition at line 470 of file lpc17xx_emac.c.

int32_t EMAC_UpdatePHYStatus ( void )

Auto-Configures value for the EMAC configuration register to match with current PHY mode.

Parameters:
[in] None
Returns:
Return (0) if no error, otherwise return (-1)
Note: The EMAC configuration will be auto-configured:
  • Speed mode.
  • Half/Full duplex mode

Definition at line 551 of file lpc17xx_emac.c.

void EMAC_UpdateRxConsumeIndex ( void )

Increase the RxConsumeIndex (after reading the Receive buffer to release the Receive buffer) and wrap-around the index if it reaches the maximum Receive Number.

Parameters:
[in] None
Returns:
None

Definition at line 919 of file lpc17xx_emac.c.

void EMAC_UpdateTxProduceIndex ( void )

Increase the TxProduceIndex (after writting to the Transmit buffer to enable the Transmit buffer) and wrap-around the index if it reaches the maximum Transmit Number.

Parameters:
[in] None
Returns:
None

Definition at line 936 of file lpc17xx_emac.c.

void EMAC_WritePacketBuffer ( EMAC_PACKETBUF_Type * pDataStruct )

Write data to Tx packet data buffer at current index due to TxProduceIndex.

Parameters:
[in] pDataStruct Pointer to a EMAC_PACKETBUF_Type structure data that contain specified information about Packet data buffer.
Returns:
None

Definition at line 737 of file lpc17xx_emac.c.

Generated on Tue Jun 7 14:59:33 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: EMAC Private Variables

EMAC Private Variables
[EMAC]

Variables

const uint8_t EMAC_clkdiv [] = { 4, 6, 8, 10, 14, 20, 28 }

Variable Documentation

const uint8_t EMAC_clkdiv[] = { 4, 6, 8, 10, 14, 20, 28 }

Definition at line 55 of file lpc17xx_emac.c.

Generated on Tue Jun 7 14:59:43 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: EXTI

EXTI
[LPC1700CMSIS Firmware Library]

Modules

EXTI Private Macros
EXTI Public Types
EXTI Public Functions
Generated on Tue Jun 7 14:59:33 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: EXTI Private Macros

EXTI Private Macros
[EXTI]

Defines

#define | EXTI_EINT0_BIT_MARK 0x01
#define | EXTI_EINT1_BIT_MARK 0x02
#define | EXTI_EINT2_BIT_MARK 0x04
#define | EXTI_EINT3_BIT_MARK 0x08

Define Documentation

#define EXTI_EINT0_BIT_MARK 0x01

Macro defines for EXTI control register

Definition at line 54 of file lpc17xx_exti.h.

#define EXTI_EINT1_BIT_MARK 0x02

Definition at line 55 of file lpc17xx_exti.h.

#define EXTI_EINT2_BIT_MARK 0x04

Definition at line 56 of file lpc17xx_exti.h.

#define EXTI_EINT3_BIT_MARK 0x08

Definition at line 57 of file lpc17xx_exti.h.

Generated on Tue Jun 7 14:59:33 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: EXTI Public Types

EXTI Public Types
[EXTI]

Data Structures

struct | EXTI_InitTypeDef
EXTI Initialize structure. More...

Enumerations

enum | EXTI_LINE_ENUM { EXTI_EINT0, EXTI_EINT1, EXTI_EINT2, EXTI_EINT3 }
EXTI external interrupt line option. More...
enum | EXTI_MODE_ENUM { EXTI_MODE_LEVEL_SENSITIVE, EXTI_MODE_EDGE_SENSITIVE }
EXTI mode option. More...
enum | EXTI_POLARITY_ENUM { EXTI_POLARITY_LOW_ACTIVE_OR_FALLING_EDGE, EXTI_POLARITY_HIGH_ACTIVE_OR_RISING_EDGE }
EXTI polarity option. More...

Enumeration Type Documentation

enum EXTI_LINE_ENUM

EXTI external interrupt line option.

Enumerator:
EXTI_EINT0 | External interrupt 0, P2.10
EXTI_EINT1 | External interrupt 0, P2.11
EXTI_EINT2 | External interrupt 0, P2.12
EXTI_EINT3 | External interrupt 0, P2.13

Definition at line 71 of file lpc17xx_exti.h.

enum EXTI_MODE_ENUM

EXTI mode option.

Enumerator:
EXTI_MODE_LEVEL_SENSITIVE | Level sensitivity is selected
EXTI_MODE_EDGE_SENSITIVE | Edge sensitivity is selected

Definition at line 82 of file lpc17xx_exti.h.

enum EXTI_POLARITY_ENUM

EXTI polarity option.

Enumerator:
EXTI_POLARITY_LOW_ACTIVE_OR_FALLING_EDGE | Low active or falling edge sensitive depending on pin mode
EXTI_POLARITY_HIGH_ACTIVE_OR_RISING_EDGE | High active or rising edge sensitive depending on pin mode

Definition at line 91 of file lpc17xx_exti.h.

Generated on Tue Jun 7 14:59:33 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: EXTI Public Functions

EXTI Public Functions
[EXTI]

Functions

void | EXTI_Init (void)
Initial for EXT
  • Set EXTINT, EXTMODE, EXTPOLAR registers to default value.

void | EXTI_DeInit (void)
Close EXT.
void | EXTI_Config (EXTI_InitTypeDef *EXTICfg)
Configuration for EXT
  • Set EXTINT, EXTMODE, EXTPOLAR register.

void | EXTI_SetMode (EXTI_LINE_ENUM EXTILine, EXTI_MODE_ENUM mode)
Set mode for EXTI pin.
void | EXTI_SetPolarity (EXTI_LINE_ENUM EXTILine, EXTI_POLARITY_ENUM polarity)
Set polarity for EXTI pin.
void | EXTI_ClearEXTIFlag (EXTI_LINE_ENUM EXTILine)
Clear External interrupt flag.

Function Documentation

void EXTI_ClearEXTIFlag ( EXTI_LINE_ENUM EXTILine )

Clear External interrupt flag.

Parameters:
[in] EXTILine external interrupt line, should be:
  • EXTI_EINT0: external interrupt line 0
  • EXTI_EINT1: external interrupt line 1
  • EXTI_EINT2: external interrupt line 2
  • EXTI_EINT3: external interrupt line 3
Returns:
None

Definition at line 149 of file lpc17xx_exti.c.

void EXTI_Config ( EXTI_InitTypeDef * EXTICfg )

Configuration for EXT

  • Set EXTINT, EXTMODE, EXTPOLAR register.

Parameters:
[in] EXTICfg Pointer to a EXTI_InitTypeDef structure that contains the configuration information for the specified external interrupt
Returns:
None

Definition at line 85 of file lpc17xx_exti.c.

void EXTI_DeInit ( void )

Close EXT.

Parameters:
[in] None
Returns:
None

Definition at line 72 of file lpc17xx_exti.c.

void EXTI_Init ( void )

Initial for EXT

  • Set EXTINT, EXTMODE, EXTPOLAR registers to default value.

Parameters:
[in] None
Returns:
None

Definition at line 59 of file lpc17xx_exti.c.

void EXTI_SetMode | ( | EXTI_LINE_ENUM | EXTILine,
 |  | EXTI_MODE_ENUM | mode
 | ) |  |

Set mode for EXTI pin.

Parameters:
[in] EXTILine external interrupt line, should be:
  • EXTI_EINT0: external interrupt line 0
  • EXTI_EINT1: external interrupt line 1
  • EXTI_EINT2: external interrupt line 2
  • EXTI_EINT3: external interrupt line 3
[in] mode external mode, should be:
  • EXTI_MODE_LEVEL_SENSITIVE
  • EXTI_MODE_EDGE_SENSITIVE
Returns:
None

Definition at line 104 of file lpc17xx_exti.c.

void EXTI_SetPolarity | ( | EXTI_LINE_ENUM | EXTILine,
 |  | EXTI_POLARITY_ENUM | polarity
 | ) |  |

Set polarity for EXTI pin.

Parameters:
[in] EXTILine external interrupt line, should be:
  • EXTI_EINT0: external interrupt line 0
  • EXTI_EINT1: external interrupt line 1
  • EXTI_EINT2: external interrupt line 2
  • EXTI_EINT3: external interrupt line 3
[in] polarity external polarity value, should be:
  • EXTI_POLARITY_LOW_ACTIVE_OR_FALLING_EDGE
  • EXTI_POLARITY_LOW_ACTIVE_OR_FALLING_EDGE
Returns:
None

Definition at line 128 of file lpc17xx_exti.c.

Generated on Tue Jun 7 14:59:33 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: GPDMA

GPDMA
[LPC1700CMSIS Firmware Library]

Modules

GPDMA Public Macros
GPDMA Private Macros
GPDMA Public Types
GPDMA Public Functions
GPDMA Private Variables
Generated on Tue Jun 7 14:59:33 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: GPDMA Public Macros

GPDMA Public Macros
[GPDMA]

Defines

#define | GPDMA_CONN_SSP0_Tx ((0UL))
#define | GPDMA_CONN_SSP0_Rx ((1UL))
#define | GPDMA_CONN_SSP1_Tx ((2UL))
#define | GPDMA_CONN_SSP1_Rx ((3UL))
#define | GPDMA_CONN_ADC ((4UL))
#define | GPDMA_CONN_I2S_Channel_0 ((5UL))
#define | GPDMA_CONN_I2S_Channel_1 ((6UL))
#define | GPDMA_CONN_DAC ((7UL))
#define | GPDMA_CONN_UART0_Tx ((8UL))
#define | GPDMA_CONN_UART0_Rx ((9UL))
#define | GPDMA_CONN_UART1_Tx ((10UL))
#define | GPDMA_CONN_UART1_Rx ((11UL))
#define | GPDMA_CONN_UART2_Tx ((12UL))
#define | GPDMA_CONN_UART2_Rx ((13UL))
#define | GPDMA_CONN_UART3_Tx ((14UL))
#define | GPDMA_CONN_UART3_Rx ((15UL))
#define | GPDMA_CONN_MAT0_0 ((16UL))
#define | GPDMA_CONN_MAT0_1 ((17UL))
#define | GPDMA_CONN_MAT1_0 ((18UL))
#define | GPDMA_CONN_MAT1_1 ((19UL))
#define | GPDMA_CONN_MAT2_0 ((20UL))
#define | GPDMA_CONN_MAT2_1 ((21UL))
#define | GPDMA_CONN_MAT3_0 ((22UL))
#define | GPDMA_CONN_MAT3_1 ((23UL))
#define | GPDMA_TRANSFERTYPE_M2M ((0UL))
#define | GPDMA_TRANSFERTYPE_M2P ((1UL))
#define | GPDMA_TRANSFERTYPE_P2M ((2UL))
#define | GPDMA_TRANSFERTYPE_P2P ((3UL))
#define | GPDMA_BSIZE_1 ((0UL))
#define | GPDMA_BSIZE_4 ((1UL))
#define | GPDMA_BSIZE_8 ((2UL))
#define | GPDMA_BSIZE_16 ((3UL))
#define | GPDMA_BSIZE_32 ((4UL))
#define | GPDMA_BSIZE_64 ((5UL))
#define | GPDMA_BSIZE_128 ((6UL))
#define | GPDMA_BSIZE_256 ((7UL))
#define | GPDMA_WIDTH_BYTE ((0UL))
#define | GPDMA_WIDTH_HALFWORD ((1UL))
#define | GPDMA_WIDTH_WORD ((2UL))
#define | GPDMA_REQSEL_UART ((0UL))
#define | GPDMA_REQSEL_TIMER ((1UL))

Define Documentation

#define GPDMA_BSIZE_1 ((0UL))

Burst size in Source and Destination definitions Burst size = 1

Definition at line 84 of file lpc17xx_gpdma.h.

#define GPDMA_BSIZE_128 ((6UL))

Burst size = 128

Definition at line 90 of file lpc17xx_gpdma.h.

#define GPDMA_BSIZE_16 ((3UL))

Burst size = 16

Definition at line 87 of file lpc17xx_gpdma.h.

#define GPDMA_BSIZE_256 ((7UL))

Burst size = 256

Definition at line 91 of file lpc17xx_gpdma.h.

#define GPDMA_BSIZE_32 ((4UL))

Burst size = 32

Definition at line 88 of file lpc17xx_gpdma.h.

#define GPDMA_BSIZE_4 ((1UL))

Burst size = 4

Definition at line 85 of file lpc17xx_gpdma.h.

#define GPDMA_BSIZE_64 ((5UL))

Burst size = 64

Definition at line 89 of file lpc17xx_gpdma.h.

#define GPDMA_BSIZE_8 ((2UL))

Burst size = 8

Definition at line 86 of file lpc17xx_gpdma.h.

#define GPDMA_CONN_ADC ((4UL))

ADC

Definition at line 56 of file lpc17xx_gpdma.h.

#define GPDMA_CONN_DAC ((7UL))

DAC

Definition at line 59 of file lpc17xx_gpdma.h.

#define GPDMA_CONN_I2S_Channel_0 ((5UL))

I2S channel 0

Definition at line 57 of file lpc17xx_gpdma.h.

#define GPDMA_CONN_I2S_Channel_1 ((6UL))

I2S channel 1

Definition at line 58 of file lpc17xx_gpdma.h.

#define GPDMA_CONN_MAT0_0 ((16UL))

MAT0.0

Definition at line 68 of file lpc17xx_gpdma.h.

#define GPDMA_CONN_MAT0_1 ((17UL))

MAT0.1

Definition at line 69 of file lpc17xx_gpdma.h.

#define GPDMA_CONN_MAT1_0 ((18UL))

MAT1.0

Definition at line 70 of file lpc17xx_gpdma.h.

#define GPDMA_CONN_MAT1_1 ((19UL))

MAT1.1

Definition at line 71 of file lpc17xx_gpdma.h.

#define GPDMA_CONN_MAT2_0 ((20UL))

MAT2.0

Definition at line 72 of file lpc17xx_gpdma.h.

#define GPDMA_CONN_MAT2_1 ((21UL))

MAT2.1

Definition at line 73 of file lpc17xx_gpdma.h.

#define GPDMA_CONN_MAT3_0 ((22UL))

MAT3.0

Definition at line 74 of file lpc17xx_gpdma.h.

#define GPDMA_CONN_MAT3_1 ((23UL))

MAT3.1

Definition at line 75 of file lpc17xx_gpdma.h.

#define GPDMA_CONN_SSP0_Rx ((1UL))

SSP0 Rx

Definition at line 53 of file lpc17xx_gpdma.h.

#define GPDMA_CONN_SSP0_Tx ((0UL))

DMA Connection number definitions SSP0 Tx

Definition at line 52 of file lpc17xx_gpdma.h.

#define GPDMA_CONN_SSP1_Rx ((3UL))

SSP1 Rx

Definition at line 55 of file lpc17xx_gpdma.h.

#define GPDMA_CONN_SSP1_Tx ((2UL))

SSP1 Tx

Definition at line 54 of file lpc17xx_gpdma.h.

#define GPDMA_CONN_UART0_Rx ((9UL))

UART0 Rx

Definition at line 61 of file lpc17xx_gpdma.h.

#define GPDMA_CONN_UART0_Tx ((8UL))

UART0 Tx

Definition at line 60 of file lpc17xx_gpdma.h.

#define GPDMA_CONN_UART1_Rx ((11UL))

UART1 Rx

Definition at line 63 of file lpc17xx_gpdma.h.

#define GPDMA_CONN_UART1_Tx ((10UL))

UART1 Tx

Definition at line 62 of file lpc17xx_gpdma.h.

#define GPDMA_CONN_UART2_Rx ((13UL))

UART2 Rx

Definition at line 65 of file lpc17xx_gpdma.h.

#define GPDMA_CONN_UART2_Tx ((12UL))

UART2 Tx

Definition at line 64 of file lpc17xx_gpdma.h.

#define GPDMA_CONN_UART3_Rx ((15UL))

UART3 Rx

Definition at line 67 of file lpc17xx_gpdma.h.

#define GPDMA_CONN_UART3_Tx ((14UL))

UART3 Tx

Definition at line 66 of file lpc17xx_gpdma.h.

#define GPDMA_REQSEL_TIMER ((1UL))

Timer match is selected

Definition at line 100 of file lpc17xx_gpdma.h.

#define GPDMA_REQSEL_UART ((0UL))

DMA Request Select Mode definitions UART TX/RX is selected

Definition at line 99 of file lpc17xx_gpdma.h.

#define GPDMA_TRANSFERTYPE_M2M ((0UL))

GPDMA Transfer type definitions Memory to memory - DMA control

Definition at line 78 of file lpc17xx_gpdma.h.

#define GPDMA_TRANSFERTYPE_M2P ((1UL))

Memory to peripheral - DMA control

Definition at line 79 of file lpc17xx_gpdma.h.

#define GPDMA_TRANSFERTYPE_P2M ((2UL))

Peripheral to memory - DMA control

Definition at line 80 of file lpc17xx_gpdma.h.

#define GPDMA_TRANSFERTYPE_P2P ((3UL))

Source peripheral to destination peripheral - DMA control

Definition at line 81 of file lpc17xx_gpdma.h.

#define GPDMA_WIDTH_BYTE ((0UL))

Width in Source transfer width and Destination transfer width definitions Width = 1 byte

Definition at line 94 of file lpc17xx_gpdma.h.

#define GPDMA_WIDTH_HALFWORD ((1UL))

Width = 2 bytes

Definition at line 95 of file lpc17xx_gpdma.h.

#define GPDMA_WIDTH_WORD ((2UL))

Width = 4 bytes

Definition at line 96 of file lpc17xx_gpdma.h.

Generated on Tue Jun 7 14:59:33 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: GPDMA Private Macros

GPDMA Private Macros
[GPDMA]

Defines

#define | GPDMA_DMACIntStat_Ch(n) (((1UL<<n)&0xFF))
#define | GPDMA_DMACIntStat_BITMASK ((0xFF))
#define | GPDMA_DMACIntTCStat_Ch(n) (((1UL<<n)&0xFF))
#define | GPDMA_DMACIntTCStat_BITMASK ((0xFF))
#define | GPDMA_DMACIntTCClear_Ch(n) (((1UL<<n)&0xFF))
#define | GPDMA_DMACIntTCClear_BITMASK ((0xFF))
#define | GPDMA_DMACIntErrStat_Ch(n) (((1UL<<n)&0xFF))
#define | GPDMA_DMACIntErrStat_BITMASK ((0xFF))
#define | GPDMA_DMACIntErrClr_Ch(n) (((1UL<<n)&0xFF))
#define | GPDMA_DMACIntErrClr_BITMASK ((0xFF))
#define | GPDMA_DMACRawIntTCStat_Ch(n) (((1UL<<n)&0xFF))
#define | GPDMA_DMACRawIntTCStat_BITMASK ((0xFF))
#define | GPDMA_DMACRawIntErrStat_Ch(n) (((1UL<<n)&0xFF))
#define | GPDMA_DMACRawIntErrStat_BITMASK ((0xFF))
#define | GPDMA_DMACEnbldChns_Ch(n) (((1UL<<n)&0xFF))
#define | GPDMA_DMACEnbldChns_BITMASK ((0xFF))
#define | GPDMA_DMACSoftBReq_Src(n) (((1UL<<n)&0xFFFF))
#define | GPDMA_DMACSoftBReq_BITMASK ((0xFFFF))
#define | GPDMA_DMACSoftSReq_Src(n) (((1UL<<n)&0xFFFF))
#define | GPDMA_DMACSoftSReq_BITMASK ((0xFFFF))
#define | GPDMA_DMACSoftLBReq_Src(n) (((1UL<<n)&0xFFFF))
#define | GPDMA_DMACSoftLBReq_BITMASK ((0xFFFF))
#define | GPDMA_DMACSoftLSReq_Src(n) (((1UL<<n)&0xFFFF))
#define | GPDMA_DMACSoftLSReq_BITMASK ((0xFFFF))
#define | GPDMA_DMACConfig_E ((0x01))
#define | GPDMA_DMACConfig_M ((0x02))
#define | GPDMA_DMACConfig_BITMASK ((0x03))
#define | GPDMA_DMACSync_Src(n) (((1UL<<n)&0xFFFF))
#define | GPDMA_DMACSync_BITMASK ((0xFFFF))
#define | GPDMA_DMAReqSel_Input(n) (((1UL<<(n-8))&0xFF))
#define | GPDMA_DMAReqSel_BITMASK ((0xFF))
#define | GPDMA_DMACCxLLI_BITMASK ((0xFFFFFFFC))
#define | GPDMA_DMACCxControl_TransferSize(n) (((n&0xFFF)<<0))
#define | GPDMA_DMACCxControl_SBSize(n) (((n&0x07)<<12))
#define | GPDMA_DMACCxControl_DBSize(n) (((n&0x07)<<15))
#define | GPDMA_DMACCxControl_SWidth(n) (((n&0x07)<<18))
#define | GPDMA_DMACCxControl_DWidth(n) (((n&0x07)<<21))
#define | GPDMA_DMACCxControl_SI ((1UL<<26))
#define | GPDMA_DMACCxControl_DI ((1UL<<27))
#define | GPDMA_DMACCxControl_Prot1 ((1UL<<28))
#define | GPDMA_DMACCxControl_Prot2 ((1UL<<29))
#define | GPDMA_DMACCxControl_Prot3 ((1UL<<30))
#define | GPDMA_DMACCxControl_I ((1UL<<31))
#define | GPDMA_DMACCxControl_BITMASK ((0xFCFFFFFF))
#define | GPDMA_DMACCxConfig_E ((1UL<<0))
#define | GPDMA_DMACCxConfig_SrcPeripheral(n) (((n&0x1F)<<1))
#define | GPDMA_DMACCxConfig_DestPeripheral(n) (((n&0x1F)<<6))
#define | GPDMA_DMACCxConfig_TransferType(n) (((n&0x7)<<11))
#define | GPDMA_DMACCxConfig_IE ((1UL<<14))
#define | GPDMA_DMACCxConfig_ITC ((1UL<<15))
#define | GPDMA_DMACCxConfig_L ((1UL<<16))
#define | GPDMA_DMACCxConfig_A ((1UL<<17))
#define | GPDMA_DMACCxConfig_H ((1UL<<18))
#define | GPDMA_DMACCxConfig_BITMASK ((0x7FFFF))
#define | PARAM_GPDMA_CHANNEL(n) ((n>=0) && (n<=7))
#define | PARAM_GPDMA_CONN(n)
#define | PARAM_GPDMA_BSIZE(n)
#define | PARAM_GPDMA_WIDTH(n)
#define | PARAM_GPDMA_STAT(n)
#define | PARAM_GPDMA_TRANSFERTYPE(n)
#define | PARAM_GPDMA_STATCLR(n) ((n==GPDMA_STATCLR_INTTC) || (n==GPDMA_STATCLR_INTERR))
#define | PARAM_GPDMA_REQSEL(n) ((n==GPDMA_REQSEL_UART) || (n==GPDMA_REQSEL_TIMER))

Define Documentation

#define GPDMA_DMACConfig_BITMASK ((0x03))

Definition at line 190 of file lpc17xx_gpdma.h.

#define GPDMA_DMACConfig_E ((0x01))

Macro defines for DMA Configuration register DMA Controller enable

Definition at line 188 of file lpc17xx_gpdma.h.

#define GPDMA_DMACConfig_M ((0x02))

AHB Master endianness configuration

Definition at line 189 of file lpc17xx_gpdma.h.

#define GPDMA_DMACCxConfig_A ((1UL<<17))

Active

Definition at line 237 of file lpc17xx_gpdma.h.

#define GPDMA_DMACCxConfig_BITMASK ((0x7FFFF))

DMA Channel Configuration registers bit mask

Definition at line 240 of file lpc17xx_gpdma.h.

#define GPDMA_DMACCxConfig_DestPeripheral ( n ) (((n&0x1F)<<6))

Destination peripheral

Definition at line 232 of file lpc17xx_gpdma.h.

#define GPDMA_DMACCxConfig_E ((1UL<<0))

Macro defines for DMA Channel Configuration registers DMA control enable

Definition at line 230 of file lpc17xx_gpdma.h.

#define GPDMA_DMACCxConfig_H ((1UL<<18))

Halt

Definition at line 238 of file lpc17xx_gpdma.h.

#define GPDMA_DMACCxConfig_IE ((1UL<<14))

Interrupt error mask

Definition at line 234 of file lpc17xx_gpdma.h.

#define GPDMA_DMACCxConfig_ITC ((1UL<<15))

Terminal count interrupt mask

Definition at line 235 of file lpc17xx_gpdma.h.

#define GPDMA_DMACCxConfig_L ((1UL<<16))

Lock

Definition at line 236 of file lpc17xx_gpdma.h.

#define GPDMA_DMACCxConfig_SrcPeripheral ( n ) (((n&0x1F)<<1))

Source peripheral

Definition at line 231 of file lpc17xx_gpdma.h.

#define GPDMA_DMACCxConfig_TransferType ( n ) (((n&0x7)<<11))

This value indicates the type of transfer

Definition at line 233 of file lpc17xx_gpdma.h.

#define GPDMA_DMACCxControl_BITMASK ((0xFCFFFFFF))

DMA channel control registers bit mask

Definition at line 225 of file lpc17xx_gpdma.h.

#define GPDMA_DMACCxControl_DBSize ( n ) (((n&0x07)<<15))

Destination burst size

Definition at line 215 of file lpc17xx_gpdma.h.

#define GPDMA_DMACCxControl_DI ((1UL<<27))

Destination increment

Definition at line 219 of file lpc17xx_gpdma.h.

#define GPDMA_DMACCxControl_DWidth ( n ) (((n&0x07)<<21))

Destination transfer width

Definition at line 217 of file lpc17xx_gpdma.h.

#define GPDMA_DMACCxControl_I ((1UL<<31))

Terminal count interrupt enable bit

Definition at line 223 of file lpc17xx_gpdma.h.

#define GPDMA_DMACCxControl_Prot1 ((1UL<<28))

Indicates that the access is in user mode or privileged mode

Definition at line 220 of file lpc17xx_gpdma.h.

#define GPDMA_DMACCxControl_Prot2 ((1UL<<29))

Indicates that the access is bufferable or not bufferable

Definition at line 221 of file lpc17xx_gpdma.h.

#define GPDMA_DMACCxControl_Prot3 ((1UL<<30))

Indicates that the access is cacheable or not cacheable

Definition at line 222 of file lpc17xx_gpdma.h.

#define GPDMA_DMACCxControl_SBSize ( n ) (((n&0x07)<<12))

Source burst size

Definition at line 214 of file lpc17xx_gpdma.h.

#define GPDMA_DMACCxControl_SI ((1UL<<26))

Source increment

Definition at line 218 of file lpc17xx_gpdma.h.

#define GPDMA_DMACCxControl_SWidth ( n ) (((n&0x07)<<18))

Source transfer width

Definition at line 216 of file lpc17xx_gpdma.h.

#define GPDMA_DMACCxControl_TransferSize ( n ) (((n&0xFFF)<<0))

Macro defines for DMA channel control registers Transfer size

Definition at line 213 of file lpc17xx_gpdma.h.

#define GPDMA_DMACCxLLI_BITMASK ((0xFFFFFFFC))

Macro defines for DMA Channel Linked List Item registers DMA Channel Linked List Item registers bit mask

Definition at line 208 of file lpc17xx_gpdma.h.

#define GPDMA_DMACEnbldChns_BITMASK ((0xFF))

Definition at line 159 of file lpc17xx_gpdma.h.

#define GPDMA_DMACEnbldChns_Ch ( n ) (((1UL<<n)&0xFF))

Macro defines for DMA Enabled Channel register

Definition at line 158 of file lpc17xx_gpdma.h.

#define GPDMA_DMACIntErrClr_BITMASK ((0xFF))

Definition at line 141 of file lpc17xx_gpdma.h.

#define GPDMA_DMACIntErrClr_Ch ( n ) (((1UL<<n)&0xFF))

Macro defines for DMA Interrupt Error Clear register

Definition at line 140 of file lpc17xx_gpdma.h.

#define GPDMA_DMACIntErrStat_BITMASK ((0xFF))

Definition at line 135 of file lpc17xx_gpdma.h.

#define GPDMA_DMACIntErrStat_Ch ( n ) (((1UL<<n)&0xFF))

Macro defines for DMA Interrupt Error Status register

Definition at line 134 of file lpc17xx_gpdma.h.

#define GPDMA_DMACIntStat_BITMASK ((0xFF))

Definition at line 117 of file lpc17xx_gpdma.h.

#define GPDMA_DMACIntStat_Ch ( n ) (((1UL<<n)&0xFF))

Macro defines for DMA Interrupt Status register

Definition at line 116 of file lpc17xx_gpdma.h.

#define GPDMA_DMACIntTCClear_BITMASK ((0xFF))

Definition at line 129 of file lpc17xx_gpdma.h.

#define GPDMA_DMACIntTCClear_Ch ( n ) (((1UL<<n)&0xFF))

Macro defines for DMA Interrupt Terminal Count Request Clear register

Definition at line 128 of file lpc17xx_gpdma.h.

#define GPDMA_DMACIntTCStat_BITMASK ((0xFF))

Definition at line 123 of file lpc17xx_gpdma.h.

#define GPDMA_DMACIntTCStat_Ch ( n ) (((1UL<<n)&0xFF))

Macro defines for DMA Interrupt Terminal Count Request Status register

Definition at line 122 of file lpc17xx_gpdma.h.

#define GPDMA_DMACRawIntErrStat_BITMASK ((0xFF))

Definition at line 153 of file lpc17xx_gpdma.h.

#define GPDMA_DMACRawIntErrStat_Ch ( n ) (((1UL<<n)&0xFF))

Macro defines for DMA Raw Error Interrupt Status register

Definition at line 152 of file lpc17xx_gpdma.h.

#define GPDMA_DMACRawIntTCStat_BITMASK ((0xFF))

Definition at line 147 of file lpc17xx_gpdma.h.

#define GPDMA_DMACRawIntTCStat_Ch ( n ) (((1UL<<n)&0xFF))

Macro defines for DMA Raw Interrupt Terminal Count Status register

Definition at line 146 of file lpc17xx_gpdma.h.

#define GPDMA_DMACSoftBReq_BITMASK ((0xFFFF))

Definition at line 165 of file lpc17xx_gpdma.h.

#define GPDMA_DMACSoftBReq_Src ( n ) (((1UL<<n)&0xFFFF))

Macro defines for DMA Software Burst Request register

Definition at line 164 of file lpc17xx_gpdma.h.

#define GPDMA_DMACSoftLBReq_BITMASK ((0xFFFF))

Definition at line 177 of file lpc17xx_gpdma.h.

#define GPDMA_DMACSoftLBReq_Src ( n ) (((1UL<<n)&0xFFFF))

Macro defines for DMA Software Last Burst Request register

Definition at line 176 of file lpc17xx_gpdma.h.

#define GPDMA_DMACSoftLSReq_BITMASK ((0xFFFF))

Definition at line 183 of file lpc17xx_gpdma.h.

#define GPDMA_DMACSoftLSReq_Src ( n ) (((1UL<<n)&0xFFFF))

Macro defines for DMA Software Last Single Request register

Definition at line 182 of file lpc17xx_gpdma.h.

#define GPDMA_DMACSoftSReq_BITMASK ((0xFFFF))

Definition at line 171 of file lpc17xx_gpdma.h.

#define GPDMA_DMACSoftSReq_Src ( n ) (((1UL<<n)&0xFFFF))

Macro defines for DMA Software Single Request register

Definition at line 170 of file lpc17xx_gpdma.h.

#define GPDMA_DMACSync_BITMASK ((0xFFFF))

Definition at line 196 of file lpc17xx_gpdma.h.

#define GPDMA_DMACSync_Src ( n ) (((1UL<<n)&0xFFFF))

Macro defines for DMA Synchronization register

Definition at line 195 of file lpc17xx_gpdma.h.

#define GPDMA_DMAReqSel_BITMASK ((0xFF))

Definition at line 202 of file lpc17xx_gpdma.h.

#define GPDMA_DMAReqSel_Input ( n ) (((1UL<<(n-8))&0xFF))

Macro defines for DMA Request Select register

Definition at line 201 of file lpc17xx_gpdma.h.

#define PARAM_GPDMA_BSIZE ( n )

Value:

((n==GPDMA_BSIZE_1) || (n==GPDMA_BSIZE_4) \
|| (n==GPDMA_BSIZE_8) || (n==GPDMA_BSIZE_16) \
|| (n==GPDMA_BSIZE_32) || (n==GPDMA_BSIZE_64) \
|| (n==GPDMA_BSIZE_128) || (n==GPDMA_BSIZE_256))

Definition at line 261 of file lpc17xx_gpdma.h.

#define PARAM_GPDMA_CHANNEL ( n ) ((n>=0) && (n<=7))

Definition at line 244 of file lpc17xx_gpdma.h.

#define PARAM_GPDMA_CONN ( n )

Value:

((n==GPDMA_CONN_SSP0_Tx) || (n==GPDMA_CONN_SSP0_Rx) \
|| (n==GPDMA_CONN_SSP1_Tx) || (n==GPDMA_CONN_SSP1_Rx) \
|| (n==GPDMA_CONN_ADC) || (n==GPDMA_CONN_I2S_Channel_0) \
|| (n==GPDMA_CONN_I2S_Channel_1) || (n==GPDMA_CONN_DAC) \
|| (n==GPDMA_CONN_UART0_Tx) || (n==GPDMA_CONN_UART0_Rx) \
|| (n==GPDMA_CONN_UART1_Tx) || (n==GPDMA_CONN_UART1_Rx) \
|| (n==GPDMA_CONN_UART2_Tx) || (n==GPDMA_CONN_UART2_Rx) \
|| (n==GPDMA_CONN_UART3_Tx) || (n==GPDMA_CONN_UART3_Rx) \
|| (n==GPDMA_CONN_MAT0_0) || (n==GPDMA_CONN_MAT0_1) \
|| (n==GPDMA_CONN_MAT1_0) || (n==GPDMA_CONN_MAT1_1) \
|| (n==GPDMA_CONN_MAT2_0) || (n==GPDMA_CONN_MAT2_1) \
|| (n==GPDMA_CONN_MAT3_0) || (n==GPDMA_CONN_MAT3_1))

Definition at line 247 of file lpc17xx_gpdma.h.

#define PARAM_GPDMA_REQSEL ( n ) ((n==GPDMA_REQSEL_UART) || (n==GPDMA_REQSEL_TIMER))

Definition at line 283 of file lpc17xx_gpdma.h.

#define PARAM_GPDMA_STAT ( n )

Value:

((n==GPDMA_STAT_INT) || (n==GPDMA_STAT_INTTC) \
|| (n==GPDMA_STAT_INTERR) || (n==GPDMA_STAT_RAWINTTC) \
|| (n==GPDMA_STAT_RAWINTERR) || (n==GPDMA_STAT_ENABLED_CH))

Definition at line 271 of file lpc17xx_gpdma.h.

#define PARAM_GPDMA_STATCLR ( n ) ((n==GPDMA_STATCLR_INTTC) || (n==GPDMA_STATCLR_INTERR))

Definition at line 280 of file lpc17xx_gpdma.h.

#define PARAM_GPDMA_TRANSFERTYPE ( n )

Value:

((n==GPDMA_TRANSFERTYPE_M2M)||(n==GPDMA_TRANSFERTYPE_M2P) \
||(n==GPDMA_TRANSFERTYPE_P2M)||(n==GPDMA_TRANSFERTYPE_P2P))

Definition at line 276 of file lpc17xx_gpdma.h.

#define PARAM_GPDMA_WIDTH ( n )

Value:

((n==GPDMA_WIDTH_BYTE) || (n==GPDMA_WIDTH_HALFWORD) \
|| (n==GPDMA_WIDTH_WORD))

Definition at line 267 of file lpc17xx_gpdma.h.

Generated on Tue Jun 7 14:59:34 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: GPDMA Public Types

GPDMA Public Types
[GPDMA]

Data Structures

struct | GPDMA_Channel_CFG_Type
GPDMA Channel configuration structure type definition. More...
struct | GPDMA_LLI_Type
GPDMA Linker List Item structure type definition. More...

Enumerations

enum GPDMA_Status_Type {
GPDMA_STAT_INT, GPDMA_STAT_INTTC, GPDMA_STAT_INTERR, GPDMA_STAT_RAWINTTC,
GPDMA_STAT_RAWINTERR, GPDMA_STAT_ENABLED_CH
}
GPDMA Status enumeration. More...
enum | GPDMA_StateClear_Type { GPDMA_STATCLR_INTTC, GPDMA_STATCLR_INTERR }
GPDMA Interrupt clear status enumeration. More...

Enumeration Type Documentation

enum GPDMA_StateClear_Type

GPDMA Interrupt clear status enumeration.

Enumerator:
GPDMA_STATCLR_INTTC | GPDMA Interrupt Terminal Count Request Clear
GPDMA_STATCLR_INTERR | GPDMA Interrupt Error Clear

Definition at line 309 of file lpc17xx_gpdma.h.

enum GPDMA_Status_Type

GPDMA Status enumeration.

Enumerator:
GPDMA_STAT_INT | GPDMA Interrupt Status
GPDMA_STAT_INTTC | GPDMA Interrupt Terminal Count Request Status
GPDMA_STAT_INTERR | GPDMA Interrupt Error Status
GPDMA_STAT_RAWINTTC | GPDMA Raw Interrupt Terminal Count Status
GPDMA_STAT_RAWINTERR | GPDMA Raw Error Interrupt Status
GPDMA_STAT_ENABLED_CH | GPDMA Enabled Channel Status

Definition at line 297 of file lpc17xx_gpdma.h.

Generated on Tue Jun 7 14:59:34 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: GPDMA Public Functions

GPDMA Public Functions
[GPDMA]

Functions

void | GPDMA_Init (void)
Initialize GPDMA controller.
Status | GPDMA_Setup (GPDMA_Channel_CFG_Type *GPDMAChannelConfig)
Setup GPDMA channel peripheral according to the specified parameters in the GPDMAChannelConfig.
IntStatus | GPDMA_IntGetStatus (GPDMA_Status_Type type, uint8_t channel)
Check if corresponding channel does have an active interrupt request or not.
void | GPDMA_ClearIntPending (GPDMA_StateClear_Type type, uint8_t channel)
Clear one or more interrupt requests on DMA channels.
void | GPDMA_ChannelCmd (uint8_t channelNum, FunctionalState NewState)
Enable/Disable DMA channel.

Function Documentation

void GPDMA_ChannelCmd | ( | uint8_t | channelNum,
 |  | FunctionalState | NewState
 | ) |  |

Enable/Disable DMA channel.

Parameters:
[in] channelNum GPDMA channel, should be in range from 0 to 7
[in] NewState New State of this command, should be:
  • ENABLE.
  • DISABLE.
Returns:
None

Definition at line 364 of file lpc17xx_gpdma.c.

void GPDMA_ClearIntPending | ( | GPDMA_StateClear_Type | type,
 |  | uint8_t | channel
 | ) |  |

Clear one or more interrupt requests on DMA channels.

Parameters:
[in] type type of interrupt request, should be:
  • GPDMA_STATCLR_INTTC: GPDMA Interrupt Terminal Count Request Clear
  • GPDMA_STATCLR_INTERR: GPDMA Interrupt Error Clear
[in] channel GPDMA channel, should be in range from 0 to 7
Returns:
None

Definition at line 435 of file lpc17xx_gpdma.c.

void GPDMA_Init ( void )

Initialize GPDMA controller.

Parameters:
None
Returns:
None

Definition at line 200 of file lpc17xx_gpdma.c.

IntStatus GPDMA_IntGetStatus | ( | GPDMA_Status_Type | type,
 |  | uint8_t | channel
 | ) |  |

Check if corresponding channel does have an active interrupt request or not.

Parameters:
[in] type type of status, should be:
  • GPDMA_STAT_INT: GPDMA Interrupt Status
  • GPDMA_STAT_INTTC: GPDMA Interrupt Terminal Count Request Status
  • GPDMA_STAT_INTERR: GPDMA Interrupt Error Status
  • GPDMA_STAT_RAWINTTC: GPDMA Raw Interrupt Terminal Count Status
  • GPDMA_STAT_RAWINTERR: GPDMA Raw Error Interrupt Status
  • GPDMA_STAT_ENABLED_CH:GPDMA Enabled Channel Status
[in] channel GPDMA channel, should be in range from 0 to 7
Returns:
IntStatus status of DMA channel interrupt after masking Should be:
  • SET: the corresponding channel has no active interrupt request
  • RESET: the corresponding channel does have an active interrupt request

Definition at line 393 of file lpc17xx_gpdma.c.

Status GPDMA_Setup ( GPDMA_Channel_CFG_Type * GPDMAChannelConfig )

Setup GPDMA channel peripheral according to the specified parameters in the GPDMAChannelConfig.

Parameters:
[in] GPDMAChannelConfig Pointer to a GPDMA_CH_CFG_Type structure that contains the configuration information for the specified GPDMA channel peripheral.
Returns:
ERROR if selected channel is enabled before or SUCCESS if channel is configured successfully

Definition at line 229 of file lpc17xx_gpdma.c.

Generated on Tue Jun 7 14:59:34 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: GPDMA Private Variables

GPDMA Private Variables
[GPDMA]

Variables

const uint32_t | GPDMA_LUTPerAddr []
Lookup Table of Connection Type matched with Peripheral Data (FIFO) register base address.
const LPC_GPDMACH_TypeDef * | pGPDMACh [8]
Lookup Table of GPDMA Channel Number matched with GPDMA channel pointer.
const uint8_t | GPDMA_LUTPerBurst []
Optimized Peripheral Source and Destination burst size.
const uint8_t | GPDMA_LUTPerWid []
Optimized Peripheral Source and Destination transfer width.

Variable Documentation

const uint32_t GPDMA_LUTPerAddr[]

Initial value:

 {
                ((uint32_t)&LPC_SSP0->DR),
                ((uint32_t)&LPC_SSP0->DR),
                ((uint32_t)&LPC_SSP1->DR),
                ((uint32_t)&LPC_SSP1->DR),
                ((uint32_t)&LPC_ADC->ADGDR),
                ((uint32_t)&LPC_I2S->I2STXFIFO),
                ((uint32_t)&LPC_I2S->I2SRXFIFO),
                ((uint32_t)&LPC_DAC->DACR),
                ((uint32_t)&LPC_UART0->THR),
                ((uint32_t)&LPC_UART0->RBR),
                ((uint32_t)&LPC_UART1->THR),
                ((uint32_t)&LPC_UART1->RBR),
                ((uint32_t)&LPC_UART2->THR),
                ((uint32_t)&LPC_UART2->RBR),
                ((uint32_t)&LPC_UART3->THR),
                ((uint32_t)&LPC_UART3->RBR),
                ((uint32_t)&LPC_TIM0->MR0),
                ((uint32_t)&LPC_TIM0->MR1),
                ((uint32_t)&LPC_TIM1->MR0),
                ((uint32_t)&LPC_TIM1->MR1),
                ((uint32_t)&LPC_TIM2->MR0),
                ((uint32_t)&LPC_TIM2->MR1),
                ((uint32_t)&LPC_TIM3->MR0),
                ((uint32_t)&LPC_TIM3->MR1)
}
Lookup Table of Connection Type matched with Peripheral Data (FIFO) register base address.

Definition at line 86 of file lpc17xx_gpdma.c.

const uint8_t GPDMA_LUTPerBurst[]

Initial value:

 {
                GPDMA_BSIZE_4,
                GPDMA_BSIZE_4,
                GPDMA_BSIZE_4,
                GPDMA_BSIZE_4,
                GPDMA_BSIZE_4,
                GPDMA_BSIZE_32,
                GPDMA_BSIZE_32,
                GPDMA_BSIZE_1,
                GPDMA_BSIZE_1,
                GPDMA_BSIZE_1,
                GPDMA_BSIZE_1,
                GPDMA_BSIZE_1,
                GPDMA_BSIZE_1,
                GPDMA_BSIZE_1,
                GPDMA_BSIZE_1,
                GPDMA_BSIZE_1,
                GPDMA_BSIZE_1,
                GPDMA_BSIZE_1,
                GPDMA_BSIZE_1,
                GPDMA_BSIZE_1,
                GPDMA_BSIZE_1,
                GPDMA_BSIZE_1,
                GPDMA_BSIZE_1,
                GPDMA_BSIZE_1
}
Optimized Peripheral Source and Destination burst size.

Definition at line 130 of file lpc17xx_gpdma.c.

const uint8_t GPDMA_LUTPerWid[]

Initial value:

 {
                GPDMA_WIDTH_BYTE,
                GPDMA_WIDTH_BYTE,
                GPDMA_WIDTH_BYTE,
                GPDMA_WIDTH_BYTE,
                GPDMA_WIDTH_WORD,
                GPDMA_WIDTH_WORD,
                GPDMA_WIDTH_WORD,
                GPDMA_WIDTH_BYTE,
                GPDMA_WIDTH_BYTE,
                GPDMA_WIDTH_BYTE,
                GPDMA_WIDTH_BYTE,
                GPDMA_WIDTH_BYTE,
                GPDMA_WIDTH_BYTE,
                GPDMA_WIDTH_BYTE,
                GPDMA_WIDTH_BYTE,
                GPDMA_WIDTH_BYTE,
                GPDMA_WIDTH_WORD,
                GPDMA_WIDTH_WORD,
                GPDMA_WIDTH_WORD,
                GPDMA_WIDTH_WORD,
                GPDMA_WIDTH_WORD,
                GPDMA_WIDTH_WORD,
                GPDMA_WIDTH_WORD,
                GPDMA_WIDTH_WORD
}
Optimized Peripheral Source and Destination transfer width.

Definition at line 159 of file lpc17xx_gpdma.c.

const LPC_GPDMACH_TypeDef* pGPDMACh[8]

Initial value:

 {
                LPC_GPDMACH0,
                LPC_GPDMACH1,
                LPC_GPDMACH2,
                LPC_GPDMACH3,
                LPC_GPDMACH4,
                LPC_GPDMACH5,
                LPC_GPDMACH6,
                LPC_GPDMACH7
}
Lookup Table of GPDMA Channel Number matched with GPDMA channel pointer.

Definition at line 117 of file lpc17xx_gpdma.c.

Generated on Tue Jun 7 14:59:43 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: GPIO

GPIO
[LPC1700CMSIS Firmware Library]

Modules

GPIO Public Macros
GPIO Public Types
GPIO Public Functions
Generated on Tue Jun 7 14:59:34 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: GPIO Public Macros

GPIO Public Macros
[GPIO]

Defines

#define | GPIO0_Byte ((GPIO_Byte_TypeDef *)(LPC_GPIO0_BASE))
#define | GPIO1_Byte ((GPIO_Byte_TypeDef *)(LPC_GPIO1_BASE))
#define | GPIO2_Byte ((GPIO_Byte_TypeDef *)(LPC_GPIO2_BASE))
#define | GPIO3_Byte ((GPIO_Byte_TypeDef *)(LPC_GPIO3_BASE))
#define | GPIO4_Byte ((GPIO_Byte_TypeDef *)(LPC_GPIO4_BASE))
#define | GPIO0_HalfWord ((GPIO_HalfWord_TypeDef *)(LPC_GPIO0_BASE))
#define | GPIO1_HalfWord ((GPIO_HalfWord_TypeDef *)(LPC_GPIO1_BASE))
#define | GPIO2_HalfWord ((GPIO_HalfWord_TypeDef *)(LPC_GPIO2_BASE))
#define | GPIO3_HalfWord ((GPIO_HalfWord_TypeDef *)(LPC_GPIO3_BASE))
#define | GPIO4_HalfWord ((GPIO_HalfWord_TypeDef *)(LPC_GPIO4_BASE))

Define Documentation

#define GPIO0_Byte ((GPIO_Byte_TypeDef *)(LPC_GPIO0_BASE))

Fast GPIO port 0 byte accessible definition

Definition at line 52 of file lpc17xx_gpio.h.

#define GPIO0_HalfWord ((GPIO_HalfWord_TypeDef *)(LPC_GPIO0_BASE))

Fast GPIO port 0 half-word accessible definition

Definition at line 64 of file lpc17xx_gpio.h.

#define GPIO1_Byte ((GPIO_Byte_TypeDef *)(LPC_GPIO1_BASE))

Fast GPIO port 1 byte accessible definition

Definition at line 54 of file lpc17xx_gpio.h.

#define GPIO1_HalfWord ((GPIO_HalfWord_TypeDef *)(LPC_GPIO1_BASE))

Fast GPIO port 1 half-word accessible definition

Definition at line 66 of file lpc17xx_gpio.h.

#define GPIO2_Byte ((GPIO_Byte_TypeDef *)(LPC_GPIO2_BASE))

Fast GPIO port 2 byte accessible definition

Definition at line 56 of file lpc17xx_gpio.h.

#define GPIO2_HalfWord ((GPIO_HalfWord_TypeDef *)(LPC_GPIO2_BASE))

Fast GPIO port 2 half-word accessible definition

Definition at line 68 of file lpc17xx_gpio.h.

#define GPIO3_Byte ((GPIO_Byte_TypeDef *)(LPC_GPIO3_BASE))

Fast GPIO port 3 byte accessible definition

Definition at line 58 of file lpc17xx_gpio.h.

#define GPIO3_HalfWord ((GPIO_HalfWord_TypeDef *)(LPC_GPIO3_BASE))

Fast GPIO port 3 half-word accessible definition

Definition at line 70 of file lpc17xx_gpio.h.

#define GPIO4_Byte ((GPIO_Byte_TypeDef *)(LPC_GPIO4_BASE))

Fast GPIO port 4 byte accessible definition

Definition at line 60 of file lpc17xx_gpio.h.

#define GPIO4_HalfWord ((GPIO_HalfWord_TypeDef *)(LPC_GPIO4_BASE))

Fast GPIO port 4 half-word accessible definition

Definition at line 72 of file lpc17xx_gpio.h.

Generated on Tue Jun 7 14:59:34 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: GPIO Public Types

GPIO Public Types
[GPIO]

Data Structures

struct | GPIO_Byte_TypeDef
Fast GPIO port byte type definition. More...
struct | GPIO_HalfWord_TypeDef
Fast GPIO port half-word type definition. More...
Generated on Tue Jun 7 14:59:34 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: GPIO Public Functions

GPIO Public Functions
[GPIO]

Functions

void | GPIO_SetDir (uint8_t portNum, uint32_t bitValue, uint8_t dir)
Set Direction for GPIO port.
void | GPIO_SetValue (uint8_t portNum, uint32_t bitValue)
Set Value for bits that have output direction on GPIO port.
void | GPIO_ClearValue (uint8_t portNum, uint32_t bitValue)
Clear Value for bits that have output direction on GPIO port.
uint32_t | GPIO_ReadValue (uint8_t portNum)
Read Current state on port pin that have input direction of GPIO.
void | GPIO_IntCmd (uint8_t portNum, uint32_t bitValue, uint8_t edgeState)
Enable GPIO interrupt (just used for P0.0-P0.30, P2.0-P2.13).
FunctionalState | GPIO_GetIntStatus (uint8_t portNum, uint32_t pinNum, uint8_t edgeState)
Get GPIO Interrupt Status (just used for P0.0-P0.30, P2.0-P2.13).
void | GPIO_ClearInt (uint8_t portNum, uint32_t bitValue)
Clear GPIO interrupt (just used for P0.0-P0.30, P2.0-P2.13).
void | FIO_SetDir (uint8_t portNum, uint32_t bitValue, uint8_t dir)
The same with GPIO_SetDir().
void | FIO_SetValue (uint8_t portNum, uint32_t bitValue)
The same with GPIO_SetValue().
void | FIO_ClearValue (uint8_t portNum, uint32_t bitValue)
The same with GPIO_ClearValue().
uint32_t | FIO_ReadValue (uint8_t portNum)
The same with GPIO_ReadValue().
void | FIO_SetMask (uint8_t portNum, uint32_t bitValue, uint8_t maskValue)
Set mask value for bits in FIO port.
void | FIO_IntCmd (uint8_t portNum, uint32_t bitValue, uint8_t edgeState)
The same with GPIO_IntCmd().
FunctionalState | FIO_GetIntStatus (uint8_t portNum, uint32_t pinNum, uint8_t edgeState)
The same with GPIO_GetIntStatus().
void | FIO_ClearInt (uint8_t portNum, uint32_t bitValue)
The same with GPIO_ClearInt().
void | FIO_HalfWordSetDir (uint8_t portNum, uint8_t halfwordNum, uint16_t bitValue, uint8_t dir)
Set direction for FIO port in halfword accessible style.
void | FIO_HalfWordSetMask (uint8_t portNum, uint8_t halfwordNum, uint16_t bitValue, uint8_t maskValue)
Set mask value for bits in FIO port in halfword accessible style.
void | FIO_HalfWordSetValue (uint8_t portNum, uint8_t halfwordNum, uint16_t bitValue)
Set bits for FIO port in halfword accessible style.
void | FIO_HalfWordClearValue (uint8_t portNum, uint8_t halfwordNum, uint16_t bitValue)
Clear bits for FIO port in halfword accessible style.
uint16_t | FIO_HalfWordReadValue (uint8_t portNum, uint8_t halfwordNum)
Read Current state on port pin that have input direction of GPIO in halfword accessible style.
void | FIO_ByteSetDir (uint8_t portNum, uint8_t byteNum, uint8_t bitValue, uint8_t dir)
Set direction for FIO port in byte accessible style.
void | FIO_ByteSetMask (uint8_t portNum, uint8_t byteNum, uint8_t bitValue, uint8_t maskValue)
Set mask value for bits in FIO port in byte accessible style.
void | FIO_ByteSetValue (uint8_t portNum, uint8_t byteNum, uint8_t bitValue)
Set bits for FIO port in byte accessible style.
void | FIO_ByteClearValue (uint8_t portNum, uint8_t byteNum, uint8_t bitValue)
Clear bits for FIO port in byte accessible style.
uint8_t | FIO_ByteReadValue (uint8_t portNum, uint8_t byteNum)
Read Current state on port pin that have input direction of GPIO in byte accessible style.

Function Documentation

void FIO_ByteClearValue | ( | uint8_t | portNum,
 |  | uint8_t | byteNum,
 |  | uint8_t | bitValue
 | ) |  |

Clear bits for FIO port in byte accessible style.

Parameters:
[in] | portNum | Port number, in range from 0 to 4
[in] | byteNum | Byte part number, should be in range from 0 to 3
[in] | bitValue | Value that contains all bits in to clear, in range from 0 to 0xFF.
Returns:
None
Note:
  • For all bits that has been set as input direction, this function will not effect.
  • For all remaining bits that are not activated in bitValue (value '0') will not be effected by this function.

Definition at line 715 of file lpc17xx_gpio.c.

uint8_t FIO_ByteReadValue | ( | uint8_t | portNum,
 |  | uint8_t | byteNum
 | ) |  |

Read Current state on port pin that have input direction of GPIO in byte accessible style.

Parameters:
[in] | portNum | Port number, in range from 0 to 4
[in] | byteNum | Byte part number, should be in range from 0 to 3
Returns:
Current value of FIO port pin of specified byte part. Note: Return value contain state of each port pin (bit) on that FIO regardless its direction is input or output.

Definition at line 735 of file lpc17xx_gpio.c.

void FIO_ByteSetDir | ( | uint8_t | portNum,
 |  | uint8_t | byteNum,
 |  | uint8_t | bitValue,
 |  | uint8_t | dir
 | ) |  |

Set direction for FIO port in byte accessible style.

Parameters:
[in] | portNum | Port number, in range from 0 to 4
[in] | byteNum | Byte part number, should be in range from 0 to 3
[in] | bitValue | Value that contains all bits in to set direction, in range from 0 to 0xFF.
[in] dir Direction value, should be:
  • 0: Input.
  • 1: Output.
Returns:
None
Note: All remaining bits that are not activated in bitValue (value '0') will not be effected by this function.

Definition at line 618 of file lpc17xx_gpio.c.

void FIO_ByteSetMask | ( | uint8_t | portNum,
 |  | uint8_t | byteNum,
 |  | uint8_t | bitValue,
 |  | uint8_t | maskValue
 | ) |  |

Set mask value for bits in FIO port in byte accessible style.

Parameters:
[in] | portNum | Port number, in range from 0 to 4
[in] | byteNum | Byte part number, should be in range from 0 to 3
[in] | bitValue | Value that contains all bits in to set mask, in range from 0 to 0xFF.
[in] maskValue Mask value contains state value for each bit:
  • 0: not mask.
  • 1: mask.
Returns:
None
Note:
  • All remaining bits that are not activated in bitValue (value '0') will not be effected by this function.
  • After executing this function, in mask register, value '0' on each bit enables an access to the corresponding physical pin via a read or write access, while value '1' on bit (masked) that corresponding pin will not be changed with write access and if read, will not be reflected in the updated pin.

Definition at line 656 of file lpc17xx_gpio.c.

void FIO_ByteSetValue | ( | uint8_t | portNum,
 |  | uint8_t | byteNum,
 |  | uint8_t | bitValue
 | ) |  |

Set bits for FIO port in byte accessible style.

Parameters:
[in] | portNum | Port number, in range from 0 to 4
[in] | byteNum | Byte part number, should be in range from 0 to 3
[in] | bitValue | Value that contains all bits in to set, in range from 0 to 0xFF.
Returns:
None
Note:
  • For all bits that has been set as input direction, this function will not effect.
  • For all remaining bits that are not activated in bitValue (value '0') will not be effected by this function.

Definition at line 690 of file lpc17xx_gpio.c.

void FIO_ClearInt | ( | uint8_t | portNum,
 |  | uint32_t | pinNum
 | ) |  |

The same with GPIO_ClearInt().

Definition at line 383 of file lpc17xx_gpio.c.

void FIO_ClearValue | ( | uint8_t | portNum,
 |  | uint32_t | bitValue
 | ) |  |

The same with GPIO_ClearValue().

Definition at line 351 of file lpc17xx_gpio.c.

FunctionalState FIO_GetIntStatus | ( | uint8_t | portNum,
 |  | uint32_t | pinNum,
 |  | uint8_t | edgeState
 | ) |  |

The same with GPIO_GetIntStatus().

Definition at line 375 of file lpc17xx_gpio.c.

void FIO_HalfWordClearValue | ( | uint8_t | portNum,
 |  | uint8_t | halfwordNum,
 |  | uint16_t | bitValue
 | ) |  |

Clear bits for FIO port in halfword accessible style.

Parameters:
[in] | portNum | Port number, in range from 0 to 4
[in] | halfwordNum | HalfWord part number, should be 0 (lower) or 1(upper)
[in] | bitValue | Value that contains all bits in to clear, in range from 0 to 0xFFFF.
Returns:
None
Note:
  • For all bits that has been set as input direction, this function will not effect.
  • For all remaining bits that are not activated in bitValue (value '0') will not be effected by this function.

Definition at line 560 of file lpc17xx_gpio.c.

uint16_t FIO_HalfWordReadValue | ( | uint8_t | portNum,
 |  | uint8_t | halfwordNum
 | ) |  |

Read Current state on port pin that have input direction of GPIO in halfword accessible style.

Parameters:
[in] | portNum | Port number, in range from 0 to 4
[in] | halfwordNum | HalfWord part number, should be 0 (lower) or 1(upper)
Returns:
Current value of FIO port pin of specified halfword. Note: Return value contain state of each port pin (bit) on that FIO regardless its direction is input or output.

Definition at line 585 of file lpc17xx_gpio.c.

void FIO_HalfWordSetDir | ( | uint8_t | portNum,
 |  | uint8_t | halfwordNum,
 |  | uint16_t | bitValue,
 |  | uint8_t | dir
 | ) |  |

Set direction for FIO port in halfword accessible style.

Parameters:
[in] | portNum | Port number, in range from 0 to 4
[in] | halfwordNum | HalfWord part number, should be 0 (lower) or 1(upper)
[in] | bitValue | Value that contains all bits in to set direction, in range from 0 to 0xFFFF.
[in] dir Direction value, should be:
  • 0: Input.
  • 1: Output.
Returns:
None
Note: All remaining bits that are not activated in bitValue (value '0') will not be effected by this function.

Definition at line 437 of file lpc17xx_gpio.c.

void FIO_HalfWordSetMask | ( | uint8_t | portNum,
 |  | uint8_t | halfwordNum,
 |  | uint16_t | bitValue,
 |  | uint8_t | maskValue
 | ) |  |

Set mask value for bits in FIO port in halfword accessible style.

Parameters:
[in] | portNum | Port number, in range from 0 to 4
[in] | halfwordNum | HalfWord part number, should be 0 (lower) or 1(upper)
[in] | bitValue | Value that contains all bits in to set, in range from 0 to 0xFFFF.
[in] maskValue Mask value contains state value for each bit:
  • 0: not mask.
  • 1: mask.
Returns:
None
Note:
  • All remaining bits that are not activated in bitValue (value '0') will not be effected by this function.
  • After executing this function, in mask register, value '0' on each bit enables an access to the corresponding physical pin via a read or write access, while value '1' on bit (masked) that corresponding pin will not be changed with write access and if read, will not be reflected in the updated pin.

Definition at line 486 of file lpc17xx_gpio.c.

void FIO_HalfWordSetValue | ( | uint8_t | portNum,
 |  | uint8_t | halfwordNum,
 |  | uint16_t | bitValue
 | ) |  |

Set bits for FIO port in halfword accessible style.

Parameters:
[in] | portNum | Port number, in range from 0 to 4
[in] | halfwordNum | HalfWord part number, should be 0 (lower) or 1(upper)
[in] | bitValue | Value that contains all bits in to set, in range from 0 to 0xFFFF.
Returns:
None
Note:
  • For all bits that has been set as input direction, this function will not effect.
  • For all remaining bits that are not activated in bitValue (value '0') will not be effected by this function.

Definition at line 530 of file lpc17xx_gpio.c.

void FIO_IntCmd | ( | uint8_t | portNum,
 |  | uint32_t | bitValue,
 |  | uint8_t | edgeState
 | ) |  |

The same with GPIO_IntCmd().

Definition at line 367 of file lpc17xx_gpio.c.

uint32_t FIO_ReadValue ( uint8_t portNum )

The same with GPIO_ReadValue().

Definition at line 359 of file lpc17xx_gpio.c.

void FIO_SetDir | ( | uint8_t | portNum,
 |  | uint32_t | bitValue,
 |  | uint8_t | dir
 | ) |  |

The same with GPIO_SetDir().

Definition at line 335 of file lpc17xx_gpio.c.

void FIO_SetMask | ( | uint8_t | portNum,
 |  | uint32_t | bitValue,
 |  | uint8_t | maskValue
 | ) |  |

Set mask value for bits in FIO port.

Parameters:
[in] | portNum | Port number, in range from 0 to 4
[in] | bitValue | Value that contains all bits in to set, in range from 0 to 0xFFFFFFFF.
[in] maskValue Mask value contains state value for each bit:
  • 0: not mask.
  • 1: mask.
Returns:
None
Note:
  • All remaining bits that are not activated in bitValue (value '0') will not be effected by this function.
  • After executing this function, in mask register, value '0' on each bit enables an access to the corresponding physical pin via a read or write access, while value '1' on bit (masked) that corresponding pin will not be changed with write access and if read, will not be reflected in the updated pin.

Definition at line 405 of file lpc17xx_gpio.c.

void FIO_SetValue | ( | uint8_t | portNum,
 |  | uint32_t | bitValue
 | ) |  |

The same with GPIO_SetValue().

Definition at line 343 of file lpc17xx_gpio.c.

void GPIO_ClearInt | ( | uint8_t | portNum,
 |  | uint32_t | bitValue
 | ) |  |

Clear GPIO interrupt (just used for P0.0-P0.30, P2.0-P2.13).

Parameters:
[in] | portNum | Port number to read value, should be: 0 or 2
[in] | bitValue | Value that contains all bits on GPIO to enable, in range from 0 to 0xFFFFFFFF.
Returns:
None

Definition at line 318 of file lpc17xx_gpio.c.

void GPIO_ClearValue | ( | uint8_t | portNum,
 |  | uint32_t | bitValue
 | ) |  |

Clear Value for bits that have output direction on GPIO port.

Parameters:
[in] | portNum | Port number value, should be in range from 0 to 4
[in] | bitValue | Value that contains all bits on GPIO to clear, in range from 0 to 0xFFFFFFFF. example: value 0x5 to clear bit 0 and bit 1.
Returns:
None
Note:
  • For all bits that has been set as input direction, this function will not effect.
  • For all remaining bits that are not activated in bitValue (value '0') will not be effected by this function.

Definition at line 231 of file lpc17xx_gpio.c.

FunctionalState GPIO_GetIntStatus | ( | uint8_t | portNum,
 |  | uint32_t | pinNum,
 |  | uint8_t | edgeState
 | ) |  |

Get GPIO Interrupt Status (just used for P0.0-P0.30, P2.0-P2.13).

Parameters:
[in] | portNum | Port number to read value, should be: 0 or 2
[in] | pinNum | Pin number, should be: 0..30(with port 0) and 0..13 (with port 2)
[in] edgeState state of edge, should be:
  • 0: Rising edge
  • 1: Falling edge
Returns:
Bool could be:
  • ENABLE: Interrupt has been generated due to a rising edge on P0.0
  • DISABLE: A rising edge has not been detected on P0.0

Definition at line 297 of file lpc17xx_gpio.c.

void GPIO_IntCmd | ( | uint8_t | portNum,
 |  | uint32_t | bitValue,
 |  | uint8_t | edgeState
 | ) |  |

Enable GPIO interrupt (just used for P0.0-P0.30, P2.0-P2.13).

Parameters:
[in] | portNum | Port number to read value, should be: 0 or 2
[in] | bitValue | Value that contains all bits on GPIO to enable, in range from 0 to 0xFFFFFFFF.
[in] edgeState state of edge, should be:
  • 0: Rising edge
  • 1: Falling edge
Returns:
None

Definition at line 269 of file lpc17xx_gpio.c.

uint32_t GPIO_ReadValue ( uint8_t portNum )

Read Current state on port pin that have input direction of GPIO.

Parameters:
[in] portNum Port number to read value, in range from 0 to 4
Returns:
Current value of GPIO port.
Note: Return value contain state of each port pin (bit) on that GPIO regardless its direction is input or output.

Definition at line 248 of file lpc17xx_gpio.c.

void GPIO_SetDir | ( | uint8_t | portNum,
 |  | uint32_t | bitValue,
 |  | uint8_t | dir
 | ) |  |

Set Direction for GPIO port.

Parameters:
[in] | portNum | Port Number value, should be in range from 0 to 4
[in] | bitValue | Value that contains all bits to set direction, in range from 0 to 0xFFFFFFFF. example: value 0x5 to set direction for bit 0 and bit 1.
[in] dir Direction value, should be:
  • 0: Input.
  • 1: Output.
Returns:
None
Note: All remaining bits that are not activated in bitValue (value '0') will not be effected by this function.

Definition at line 177 of file lpc17xx_gpio.c.

void GPIO_SetValue | ( | uint8_t | portNum,
 |  | uint32_t | bitValue
 | ) |  |

Set Value for bits that have output direction on GPIO port.

Parameters:
[in] | portNum | Port number value, should be in range from 0 to 4
[in] | bitValue | Value that contains all bits on GPIO to set, in range from 0 to 0xFFFFFFFF. example: value 0x5 to set bit 0 and bit 1.
Returns:
None
Note:
  • For all bits that has been set as input direction, this function will not effect.
  • For all remaining bits that are not activated in bitValue (value '0') will not be effected by this function.

Definition at line 208 of file lpc17xx_gpio.c.

Generated on Tue Jun 7 14:59:34 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: I2C

I2C
[LPC1700CMSIS Firmware Library]

Modules

I2C Private Macros
I2C Public Types
I2C Public Functions
I2C Private Types
Generated on Tue Jun 7 14:59:34 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: I2C Private Macros

I2C Private Macros
[I2C]

Defines

#define | I2C_I2CONSET_AA ((0x04))
#define | I2C_I2CONSET_SI ((0x08))
#define | I2C_I2CONSET_STO ((0x10))
#define | I2C_I2CONSET_STA ((0x20))
#define | I2C_I2CONSET_I2EN ((0x40))
#define | I2C_I2CONCLR_AAC ((1<<2))
#define | I2C_I2CONCLR_SIC ((1<<3))
#define | I2C_I2CONCLR_STAC ((1<<5))
#define | I2C_I2CONCLR_I2ENC ((1<<6))
#define | I2C_STAT_CODE_BITMASK ((0xF8))
#define | I2C_I2STAT_NO_INF ((0xF8))
#define | I2C_I2STAT_M_TX_START ((0x08))
#define | I2C_I2STAT_M_TX_RESTART ((0x10))
#define | I2C_I2STAT_M_TX_SLAW_ACK ((0x18))
#define | I2C_I2STAT_M_TX_SLAW_NACK ((0x20))
#define | I2C_I2STAT_M_TX_DAT_ACK ((0x28))
#define | I2C_I2STAT_M_TX_DAT_NACK ((0x30))
#define | I2C_I2STAT_M_TX_ARB_LOST ((0x38))
#define | I2C_I2STAT_M_RX_START ((0x08))
#define | I2C_I2STAT_M_RX_RESTART ((0x10))
#define | I2C_I2STAT_M_RX_ARB_LOST ((0x38))
#define | I2C_I2STAT_M_RX_SLAR_ACK ((0x40))
#define | I2C_I2STAT_M_RX_SLAR_NACK ((0x48))
#define | I2C_I2STAT_M_RX_DAT_ACK ((0x50))
#define | I2C_I2STAT_M_RX_DAT_NACK ((0x58))
#define | I2C_I2STAT_S_RX_SLAW_ACK ((0x60))
#define | I2C_I2STAT_S_RX_ARB_LOST_M_SLA ((0x68))
#define | I2C_I2STAT_S_RX_GENCALL_ACK ((0x70))
#define | I2C_I2STAT_S_RX_ARB_LOST_M_GENCALL ((0x78))
#define | I2C_I2STAT_S_RX_PRE_SLA_DAT_ACK ((0x80))
#define | I2C_I2STAT_S_RX_PRE_SLA_DAT_NACK ((0x88))
#define | I2C_I2STAT_S_RX_PRE_GENCALL_DAT_ACK ((0x90))
#define | I2C_I2STAT_S_RX_PRE_GENCALL_DAT_NACK ((0x98))
#define | I2C_I2STAT_S_RX_STA_STO_SLVREC_SLVTRX ((0xA0))
#define | I2C_I2STAT_S_TX_SLAR_ACK ((0xA8))
#define | I2C_I2STAT_S_TX_ARB_LOST_M_SLA ((0xB0))
#define | I2C_I2STAT_S_TX_DAT_ACK ((0xB8))
#define | I2C_I2STAT_S_TX_DAT_NACK ((0xC0))
#define | I2C_I2STAT_S_TX_LAST_DAT_ACK ((0xC8))
#define | I2C_SLAVE_TIME_OUT 0x10000UL
#define | I2C_I2DAT_BITMASK ((0xFF))
#define | I2C_I2DAT_IDLE_CHAR (0xFF)
#define | I2C_I2MMCTRL_MM_ENA ((1<<0))
#define | I2C_I2MMCTRL_ENA_SCL ((1<<1))
#define | I2C_I2MMCTRL_MATCH_ALL ((1<<2))
#define | I2C_I2MMCTRL_BITMASK ((0x07))
#define | I2DATA_BUFFER_BITMASK ((0xFF))
#define | I2C_I2ADR_GC ((1<<0))
#define | I2C_I2ADR_BITMASK ((0xFF))
#define | I2C_I2MASK_MASK(n) ((n&0xFE))
#define | I2C_I2SCLH_BITMASK ((0xFFFF))
#define | I2C_I2SCLL_BITMASK ((0xFFFF))
#define | I2C_SETUP_STATUS_ARBF (1<<8)
#define | I2C_SETUP_STATUS_NOACKF (1<<9)
#define | I2C_SETUP_STATUS_DONE (1<<10)
#define | I2C_MONITOR_CFG_SCL_OUTPUT I2C_I2MMCTRL_ENA_SCL
#define | I2C_MONITOR_CFG_MATCHALL I2C_I2MMCTRL_MATCH_ALL
#define | PARAM_I2C_SLAVEADDR_CH(n) ((n>=0) && (n<=3))
#define | PARAM_I2Cx(n)
#define | PARAM_I2C_MONITOR_CFG(n) ((n==I2C_MONITOR_CFG_SCL_OUTPUT) || (I2C_MONITOR_CFG_MATCHALL))

Define Documentation

#define I2C_I2ADR_BITMASK ((0xFF))

I2C Slave Address registers bit mask

Definition at line 202 of file lpc17xx_i2c.h.

#define I2C_I2ADR_GC ((1<<0))

I2C Slave Address registers definition General Call enable bit

Definition at line 200 of file lpc17xx_i2c.h.

#define I2C_I2CONCLR_AAC ((1<<2))

I2C Control Clear register description Assert acknowledge Clear bit

Definition at line 66 of file lpc17xx_i2c.h.

#define I2C_I2CONCLR_I2ENC ((1<<6))

I2C interface Disable bit

Definition at line 72 of file lpc17xx_i2c.h.

#define I2C_I2CONCLR_SIC ((1<<3))

I2C interrupt Clear bit

Definition at line 68 of file lpc17xx_i2c.h.

#define I2C_I2CONCLR_STAC ((1<<5))

START flag Clear bit

Definition at line 70 of file lpc17xx_i2c.h.

#define I2C_I2CONSET_AA ((0x04))

I2C Control Set register description Assert acknowledge flag

Definition at line 56 of file lpc17xx_i2c.h.

#define I2C_I2CONSET_I2EN ((0x40))

I2C interface enable

Definition at line 60 of file lpc17xx_i2c.h.

#define I2C_I2CONSET_SI ((0x08))

I2C interrupt flag

Definition at line 57 of file lpc17xx_i2c.h.

#define I2C_I2CONSET_STA ((0x20))

START flag

Definition at line 59 of file lpc17xx_i2c.h.

#define I2C_I2CONSET_STO ((0x10))

STOP flag

Definition at line 58 of file lpc17xx_i2c.h.

#define I2C_I2DAT_BITMASK ((0xFF))

I2C Data register definition Mask for I2DAT register

Definition at line 175 of file lpc17xx_i2c.h.

#define I2C_I2DAT_IDLE_CHAR (0xFF)

Idle data value will be send out in slave mode in case of the actual expecting data requested from the master is greater than its sending data length that can be supported

Definition at line 180 of file lpc17xx_i2c.h.

#define I2C_I2MASK_MASK ( n ) ((n&0xFE))

I2C Mask Register definition I2C Mask Register mask field

Definition at line 208 of file lpc17xx_i2c.h.

#define I2C_I2MMCTRL_BITMASK ((0x07))

Mask for I2MMCTRL register

Definition at line 188 of file lpc17xx_i2c.h.

#define I2C_I2MMCTRL_ENA_SCL ((1<<1))

SCL output enable

Definition at line 186 of file lpc17xx_i2c.h.

#define I2C_I2MMCTRL_MATCH_ALL ((1<<2))

Select interrupt register match

Definition at line 187 of file lpc17xx_i2c.h.

#define I2C_I2MMCTRL_MM_ENA ((1<<0))

I2C Monitor mode control register description Monitor mode enable

Definition at line 185 of file lpc17xx_i2c.h.

#define I2C_I2SCLH_BITMASK ((0xFFFF))

I2C SCL HIGH duty cycle Register definition I2C SCL HIGH duty cycle Register bit mask

Definition at line 214 of file lpc17xx_i2c.h.

#define I2C_I2SCLL_BITMASK ((0xFFFF))

I2C SCL LOW duty cycle Register definition I2C SCL LOW duty cycle Register bit mask

Definition at line 220 of file lpc17xx_i2c.h.

#define I2C_I2STAT_M_RX_ARB_LOST ((0x38))

Arbitration lost

Definition at line 107 of file lpc17xx_i2c.h.

#define I2C_I2STAT_M_RX_DAT_ACK ((0x50))

Data has been received, ACK has been returned

Definition at line 113 of file lpc17xx_i2c.h.

#define I2C_I2STAT_M_RX_DAT_NACK ((0x58))

Data has been received, NACK has been return

Definition at line 115 of file lpc17xx_i2c.h.

#define I2C_I2STAT_M_RX_RESTART ((0x10))

A repeat start condition has been transmitted

Definition at line 105 of file lpc17xx_i2c.h.

#define I2C_I2STAT_M_RX_SLAR_ACK ((0x40))

SLA+R has been transmitted, ACK has been received

Definition at line 109 of file lpc17xx_i2c.h.

#define I2C_I2STAT_M_RX_SLAR_NACK ((0x48))

SLA+R has been transmitted, NACK has been received

Definition at line 111 of file lpc17xx_i2c.h.

#define I2C_I2STAT_M_RX_START ((0x08))

A start condition has been transmitted

Definition at line 103 of file lpc17xx_i2c.h.

#define I2C_I2STAT_M_TX_ARB_LOST ((0x38))

Arbitration lost in SLA+R/W or Data bytes

Definition at line 99 of file lpc17xx_i2c.h.

#define I2C_I2STAT_M_TX_DAT_ACK ((0x28))

Data has been transmitted, ACK has been received

Definition at line 95 of file lpc17xx_i2c.h.

#define I2C_I2STAT_M_TX_DAT_NACK ((0x30))

Data has been transmitted, NACK has been received

Definition at line 97 of file lpc17xx_i2c.h.

#define I2C_I2STAT_M_TX_RESTART ((0x10))

A repeat start condition has been transmitted

Definition at line 89 of file lpc17xx_i2c.h.

#define I2C_I2STAT_M_TX_SLAW_ACK ((0x18))

SLA+W has been transmitted, ACK has been received

Definition at line 91 of file lpc17xx_i2c.h.

#define I2C_I2STAT_M_TX_SLAW_NACK ((0x20))

SLA+W has been transmitted, NACK has been received

Definition at line 93 of file lpc17xx_i2c.h.

#define I2C_I2STAT_M_TX_START ((0x08))

A start condition has been transmitted

Definition at line 87 of file lpc17xx_i2c.h.

#define I2C_I2STAT_NO_INF ((0xF8))

No relevant information

Definition at line 83 of file lpc17xx_i2c.h.

#define I2C_I2STAT_S_RX_ARB_LOST_M_GENCALL ((0x78))

Arbitration lost in SLA+R/W (GENERAL CALL) as master

Definition at line 130 of file lpc17xx_i2c.h.

#define I2C_I2STAT_S_RX_ARB_LOST_M_SLA ((0x68))

Arbitration lost in SLA+R/W as master

Definition at line 122 of file lpc17xx_i2c.h.

#define I2C_I2STAT_S_RX_GENCALL_ACK ((0x70))

Own SLA+W has been received, ACK returned General call address has been received, ACK has been returned

Definition at line 127 of file lpc17xx_i2c.h.

#define I2C_I2STAT_S_RX_PRE_GENCALL_DAT_ACK ((0x90))

Previously addressed with General Call; Data has been received and ACK has been return

Definition at line 142 of file lpc17xx_i2c.h.

#define I2C_I2STAT_S_RX_PRE_GENCALL_DAT_NACK ((0x98))

Previously addressed with General Call; Data has been received and NOT ACK has been return

Definition at line 145 of file lpc17xx_i2c.h.

#define I2C_I2STAT_S_RX_PRE_SLA_DAT_ACK ((0x80))

General call address has been received, ACK has been returned Previously addressed with own SLV address; Data has been received, ACK has been return

Definition at line 136 of file lpc17xx_i2c.h.

#define I2C_I2STAT_S_RX_PRE_SLA_DAT_NACK ((0x88))

Previously addressed with own SLA; Data has been received and NOT ACK has been return

Definition at line 139 of file lpc17xx_i2c.h.

#define I2C_I2STAT_S_RX_SLAW_ACK ((0x60))

Own slave address has been received, ACK has been returned

Definition at line 119 of file lpc17xx_i2c.h.

#define I2C_I2STAT_S_RX_STA_STO_SLVREC_SLVTRX ((0xA0))

A STOP condition or repeated START condition has been received while still addressed as SLV/REC (Slave Receive) or SLV/TRX (Slave Transmit)

Definition at line 149 of file lpc17xx_i2c.h.

#define I2C_I2STAT_S_TX_ARB_LOST_M_SLA ((0xB0))

Arbitration lost in SLA+R/W as master

Definition at line 156 of file lpc17xx_i2c.h.

#define I2C_I2STAT_S_TX_DAT_ACK ((0xB8))

Own SLA+R has been received, ACK has been returned Data has been transmitted, ACK has been received

Definition at line 161 of file lpc17xx_i2c.h.

#define I2C_I2STAT_S_TX_DAT_NACK ((0xC0))

Data has been transmitted, NACK has been received

Definition at line 163 of file lpc17xx_i2c.h.

#define I2C_I2STAT_S_TX_LAST_DAT_ACK ((0xC8))

Last data byte in I2DAT has been transmitted (AA = 0); ACK has been received

Definition at line 166 of file lpc17xx_i2c.h.

#define I2C_I2STAT_S_TX_SLAR_ACK ((0xA8))

Slave transmit mode Own SLA+R has been received, ACK has been returned

Definition at line 153 of file lpc17xx_i2c.h.

#define I2C_MONITOR_CFG_MATCHALL I2C_I2MMCTRL_MATCH_ALL

Select interrupt register match

Definition at line 231 of file lpc17xx_i2c.h.

#define I2C_MONITOR_CFG_SCL_OUTPUT I2C_I2MMCTRL_ENA_SCL

I2C monitor control configuration defines SCL output enable

Definition at line 230 of file lpc17xx_i2c.h.

#define I2C_SETUP_STATUS_ARBF (1<<8)

Arbitration false

Definition at line 223 of file lpc17xx_i2c.h.

#define I2C_SETUP_STATUS_DONE (1<<10)

Status DONE

Definition at line 225 of file lpc17xx_i2c.h.

#define I2C_SETUP_STATUS_NOACKF (1<<9)

No ACK returned

Definition at line 224 of file lpc17xx_i2c.h.

#define I2C_SLAVE_TIME_OUT 0x10000UL

Time out in case of using I2C slave mode

Definition at line 169 of file lpc17xx_i2c.h.

#define I2C_STAT_CODE_BITMASK ((0xF8))

I2C Status Code definition (I2C Status register)

Definition at line 78 of file lpc17xx_i2c.h.

#define I2DATA_BUFFER_BITMASK ((0xFF))

I2C Data buffer register description I2C Data buffer register bit mask

Definition at line 194 of file lpc17xx_i2c.h.

#define PARAM_I2C_MONITOR_CFG ( n ) ((n==I2C_MONITOR_CFG_SCL_OUTPUT) || (I2C_MONITOR_CFG_MATCHALL))

Definition at line 243 of file lpc17xx_i2c.h.

#define PARAM_I2C_SLAVEADDR_CH ( n ) ((n>=0) && (n<=3))

Definition at line 235 of file lpc17xx_i2c.h.

#define PARAM_I2Cx ( n )

Value:

((((uint32_t *)n)==((uint32_t *)LPC_I2C0)) \
|| (((uint32_t *)n)==((uint32_t *)LPC_I2C1)) \
|| (((uint32_t *)n)==((uint32_t *)LPC_I2C2)))
Macro to determine if it is valid SSP port number

Definition at line 238 of file lpc17xx_i2c.h.

Generated on Tue Jun 7 14:59:34 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: I2C Public Types

I2C Public Types
[I2C]

Data Structures

struct | I2C_OWNSLAVEADDR_CFG_Type
I2C Own slave address setting structure. More...
struct | I2C_M_SETUP_Type
Master transfer setup data structure definitions. More...
struct | I2C_S_SETUP_Type
Slave transfer setup data structure definitions. More...

Enumerations

enum | I2C_TRANSFER_OPT_Type { I2C_TRANSFER_POLLING = 0, I2C_TRANSFER_INTERRUPT }
Transfer option type definitions. More...

Enumeration Type Documentation

enum I2C_TRANSFER_OPT_Type

Transfer option type definitions.

Enumerator:
I2C_TRANSFER_POLLING | Transfer in polling mode
I2C_TRANSFER_INTERRUPT | Transfer in interrupt mode

Definition at line 322 of file lpc17xx_i2c.h.

Generated on Tue Jun 7 14:59:34 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: I2C Public Functions

I2C Public Functions
[I2C]

Functions

void | I2C_Init (LPC_I2C_TypeDef *I2Cx, uint32_t clockrate)
Initializes the I2Cx peripheral with specified parameter.
void | I2C_DeInit (LPC_I2C_TypeDef *I2Cx)
De-initializes the I2C peripheral registers to their default reset values.
void | I2C_Cmd (LPC_I2C_TypeDef *I2Cx, FunctionalState NewState)
Enable or disable I2C peripheral's operation.
Status | I2C_MasterTransferData (LPC_I2C_TypeDef *I2Cx, I2C_M_SETUP_Type *TransferCfg, I2C_TRANSFER_OPT_Type Opt)
Transmit and Receive data in master mode.
Status | I2C_SlaveTransferData (LPC_I2C_TypeDef *I2Cx, I2C_S_SETUP_Type *TransferCfg, I2C_TRANSFER_OPT_Type Opt)
Receive and Transmit data in slave mode.
uint32_t | I2C_MasterTransferComplete (LPC_I2C_TypeDef *I2Cx)
Get status of Master Transfer.
uint32_t | I2C_SlaveTransferComplete (LPC_I2C_TypeDef *I2Cx)
Get status of Slave Transfer.
void | I2C_SetOwnSlaveAddr (LPC_I2C_TypeDef *I2Cx, I2C_OWNSLAVEADDR_CFG_Type *OwnSlaveAddrConfigStruct)
Set Own slave address in I2C peripheral corresponding to parameter specified in OwnSlaveAddrConfigStruct.
uint8_t | I2C_GetLastStatusCode (LPC_I2C_TypeDef *I2Cx)
void | I2C_MonitorModeConfig (LPC_I2C_TypeDef *I2Cx, uint32_t MonitorCfgType, FunctionalState NewState)
Configures functionality in I2C monitor mode.
void | I2C_MonitorModeCmd (LPC_I2C_TypeDef *I2Cx, FunctionalState NewState)
Enable/Disable I2C monitor mode.
uint8_t | I2C_MonitorGetDatabuffer (LPC_I2C_TypeDef *I2Cx)
Get data from I2C data buffer in monitor mode.
BOOL_8 | I2C_MonitorHandler (LPC_I2C_TypeDef *I2Cx, uint8_t *buffer, uint32_t size)
Get data from I2C data buffer in monitor mode.
void | I2C_IntCmd (LPC_I2C_TypeDef *I2Cx, Bool NewState)
Enable/Disable interrupt for I2C peripheral.
void | I2C_MasterHandler (LPC_I2C_TypeDef *I2Cx)
General Master Interrupt handler for I2C peripheral.
void | I2C_SlaveHandler (LPC_I2C_TypeDef *I2Cx)
General Slave Interrupt handler for I2C peripheral.

Function Documentation

void I2C_Cmd | ( | LPC_I2C_TypeDef * | I2Cx,
 |  | FunctionalState | NewState
 | ) |  |

Enable or disable I2C peripheral's operation.

Parameters:
[in] I2Cx I2C peripheral selected, should be
  • LPC_I2C0
    • LPC_I2C1
    • LPC_I2C2
[in] NewState New State of I2Cx peripheral's operation
Returns:
none

Definition at line 342 of file lpc17xx_i2c.c.

void I2C_DeInit ( LPC_I2C_TypeDef * I2Cx )

De-initializes the I2C peripheral registers to their default reset values.

Parameters:
[in] I2Cx I2C peripheral selected, should be
  • LPC_I2C0
    • LPC_I2C1
    • LPC_I2C2
Returns:
None

Definition at line 309 of file lpc17xx_i2c.c.

uint8_t I2C_GetLastStatusCode ( LPC_I2C_TypeDef * I2Cx )

void I2C_Init | ( | LPC_I2C_TypeDef * | I2Cx,
 |  | uint32_t | clockrate
 | ) |  |

Initializes the I2Cx peripheral with specified parameter.

Parameters:
[in] I2Cx I2C peripheral selected, should be
  • LPC_I2C0
  • LPC_I2C1
  • LPC_I2C2
[in] clockrate Target clock rate value to initialized I2C peripheral (Hz)
Returns:
None

Definition at line 261 of file lpc17xx_i2c.c.

void I2C_IntCmd | ( | LPC_I2C_TypeDef * | I2Cx,
 |  | Bool | NewState
 | ) |  |

Enable/Disable interrupt for I2C peripheral.

Parameters:
[in] I2Cx I2C peripheral selected, should be:
  • LPC_I2C0
  • LPC_I2C1
  • LPC_I2C2
[in] NewState New State of I2C peripheral interrupt in NVIC core should be:
  • ENABLE: enable interrupt for this I2C peripheral
  • DISABLE: disable interrupt for this I2C peripheral
Returns:
None

Definition at line 369 of file lpc17xx_i2c.c.

void I2C_MasterHandler ( LPC_I2C_TypeDef * I2Cx )

General Master Interrupt handler for I2C peripheral.

Parameters:
[in] I2Cx I2C peripheral selected, should be:
  • LPC_I2C
  • LPC_I2C1
  • LPC_I2C2
Returns:
None

Definition at line 413 of file lpc17xx_i2c.c.

uint32_t I2C_MasterTransferComplete ( LPC_I2C_TypeDef * I2Cx )

Get status of Master Transfer.

Parameters:
[in] I2Cx I2C peripheral selected, should be:
  • LPC_I2C0
    • LPC_I2C1
    • LPC_I2C2
Returns:
Master transfer status, could be:
  • TRUE master transfer completed
  • FALSE master transfer have not completed yet

Definition at line 1342 of file lpc17xx_i2c.c.

Status I2C_MasterTransferData | ( | LPC_I2C_TypeDef * | I2Cx,
 |  | I2C_M_SETUP_Type * | TransferCfg,
 |  | I2C_TRANSFER_OPT_Type | Opt
 | ) |  |

Transmit and Receive data in master mode.

Parameters:
[in] I2Cx I2C peripheral selected, should be:
  • LPC_I2C0
    • LPC_I2C1
    • LPC_I2C2
[in] | TransferCfg | Pointer to a I2C_M_SETUP_Type structure that contains specified information about the configuration for master transfer.
[in] | Opt | a I2C_TRANSFER_OPT_Type type that selected for interrupt or polling mode.
Returns:
SUCCESS or ERROR
Note:
  • In case of using I2C to transmit data only, either transmit length set to 0 or transmit data pointer set to NULL.
  • In case of using I2C to receive data only, either receive length set to 0 or receive data pointer set to NULL.
  • In case of using I2C to transmit followed by receive data, transmit length, transmit data pointer, receive length and receive data pointer should be set corresponding.

Definition at line 778 of file lpc17xx_i2c.c.

uint8_t I2C_MonitorGetDatabuffer ( LPC_I2C_TypeDef * I2Cx )

Get data from I2C data buffer in monitor mode.

Parameters:
[in] I2Cx I2C peripheral selected, should be
  • LPC_I2C0
    • LPC_I2C1
    • LPC_I2C2
Returns:
None Note: In monitor mode, the I2C module may lose the ability to stretch the clock (stall the bus) if the ENA_SCL bit is not set. This means that the processor will have a limited amount of time to read the contents of the data received on the bus. If the processor reads the I2DAT shift register, as it ordinarily would, it could have only one bit-time to respond to the interrupt before the received data is overwritten by new data.

Definition at line 1297 of file lpc17xx_i2c.c.

BOOL_8 I2C_MonitorHandler | ( | LPC_I2C_TypeDef * | I2Cx,
 |  | uint8_t * | buffer,
 |  | uint32_t | size
 | ) |  |

Get data from I2C data buffer in monitor mode.

Parameters:
[in] I2Cx I2C peripheral selected, should be
  • LPC_I2C0
    • LPC_I2C1
    • LPC_I2C2
Returns:
None Note: In monitor mode, the I2C module may lose the ability to stretch the clock (stall the bus) if the ENA_SCL bit is not set. This means that the processor will have a limited amount of time to read the contents of the data received on the bus. If the processor reads the I2DAT shift register, as it ordinarily would, it could have only one bit-time to respond to the interrupt before the received data is overwritten by new data.

Definition at line 1318 of file lpc17xx_i2c.c.

void I2C_MonitorModeCmd | ( | LPC_I2C_TypeDef * | I2Cx,
 |  | FunctionalState | NewState
 | ) |  |

Enable/Disable I2C monitor mode.

Parameters:
[in] I2Cx I2C peripheral selected, should be
  • LPC_I2C0
    • LPC_I2C1
    • LPC_I2C2
[in] NewState New State of this function, should be:
  • ENABLE: Enable monitor mode.
  • DISABLE: Disable monitor mode.
Returns:
None

Definition at line 1262 of file lpc17xx_i2c.c.

void I2C_MonitorModeConfig | ( | LPC_I2C_TypeDef * | I2Cx,
 |  | uint32_t | MonitorCfgType,
 |  | FunctionalState | NewState
 | ) |  |

Configures functionality in I2C monitor mode.

Parameters:
[in] I2Cx I2C peripheral selected, should be
  • LPC_I2C0
    • LPC_I2C1
    • LPC_I2C2
[in] MonitorCfgType Monitor Configuration type, should be:
  • I2C_MONITOR_CFG_SCL_OUTPUT: I2C module can 'stretch' the clock line (hold it low) until it has had time to respond to an I2C interrupt.
  • I2C_MONITOR_CFG_MATCHALL: When this bit is set to '1' and the I2C is in monitor mode, an interrupt will be generated on ANY address received.
[in] NewState New State of this function, should be:
  • ENABLE: Enable this function.
  • DISABLE: Disable this function.
Returns:
None

Definition at line 1234 of file lpc17xx_i2c.c.

void I2C_SetOwnSlaveAddr | ( | LPC_I2C_TypeDef * | I2Cx,
 |  | I2C_OWNSLAVEADDR_CFG_Type * | OwnSlaveAddrConfigStruct
 | ) |  |

Set Own slave address in I2C peripheral corresponding to parameter specified in OwnSlaveAddrConfigStruct.

Parameters:
[in] I2Cx I2C peripheral selected, should be
  • LPC_I2C0
    • LPC_I2C1
    • LPC_I2C2
[in] OwnSlaveAddrConfigStruct Pointer to a I2C_OWNSLAVEADDR_CFG_Type structure that contains the configuration information for the specified I2C slave address.
Returns:
None

Definition at line 1181 of file lpc17xx_i2c.c.

void I2C_SlaveHandler ( LPC_I2C_TypeDef * I2Cx )

General Slave Interrupt handler for I2C peripheral.

Parameters:
[in] I2Cx I2C peripheral selected, should be:
  • LPC_I2C0
  • LPC_I2C1
  • LPC_I2C2
Returns:
None

Definition at line 617 of file lpc17xx_i2c.c.

uint32_t I2C_SlaveTransferComplete ( LPC_I2C_TypeDef * I2Cx )

Get status of Slave Transfer.

Parameters:
[in] I2Cx I2C peripheral selected, should be:
  • LPC_I2C0
  • LPC_I2C1
  • LPC_I2C2
Returns:
Complete status, could be: TRUE/FALSE

Definition at line 1359 of file lpc17xx_i2c.c.

Status I2C_SlaveTransferData | ( | LPC_I2C_TypeDef * | I2Cx,
 |  | I2C_S_SETUP_Type * | TransferCfg,
 |  | I2C_TRANSFER_OPT_Type | Opt
 | ) |  |

Receive and Transmit data in slave mode.

Parameters:
[in] I2Cx I2C peripheral selected, should be
  • LPC_I2C0
    • LPC_I2C1
    • LPC_I2C2
[in] | TransferCfg | Pointer to a I2C_S_SETUP_Type structure that contains specified information about the configuration for master transfer.
[in] | Opt | I2C_TRANSFER_OPT_Type type that selected for interrupt or polling mode.
Returns:
SUCCESS or ERROR
Note: The mode of slave's operation depends on the command sent from master on the I2C bus. If the master send a SLA+W command, this sub-routine will use receive data length and receive data pointer. If the master send a SLA+R command, this sub-routine will use transmit data length and transmit data pointer. If the master issue an repeat start command or a stop command, the slave will enable an time out condition, during time out condition, if there's no activity on I2C bus, the slave will exit, otherwise (i.e. the master send a SLA+R/W), the slave then switch to relevant operation mode. The time out should be used because the return status code can not show difference from stop and repeat start command in slave operation. In case of the expected data length from master is greater than data length that slave can support:
  • In case of reading operation (from master): slave will return I2C_I2DAT_IDLE_CHAR value.
  • In case of writing operation (from master): slave will ignore remain data from master.

Definition at line 990 of file lpc17xx_i2c.c.

Generated on Tue Jun 7 14:59:34 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: I2C Private Types

I2C Private Types
[I2C]

Data Structures

struct I2C_CFG_T
I2C device configuration structure type. More...
Generated on Tue Jun 7 14:59:43 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: I2S

I2S
[LPC1700CMSIS Firmware Library]

Modules

I2S Public Macros
I2S Private Macros
I2S Public Types
I2S Public Functions
Generated on Tue Jun 7 14:59:34 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: I2S Public Macros

I2S Public Macros
[I2S]

Defines

#define | I2S_WORDWIDTH_8 ((uint32_t)(0))
#define | I2S_WORDWIDTH_16 ((uint32_t)(1))
#define | I2S_WORDWIDTH_32 ((uint32_t)(3))
#define | I2S_STEREO ((uint32_t)(0))
#define | I2S_MONO ((uint32_t)(1))
#define | I2S_MASTER_MODE ((uint8_t)(0))
#define | I2S_SLAVE_MODE ((uint8_t)(1))
#define | I2S_STOP_ENABLE ((uint8_t)(1))
#define | I2S_STOP_DISABLE ((uint8_t)(0))
#define | I2S_RESET_ENABLE ((uint8_t)(1))
#define | I2S_RESET_DISABLE ((uint8_t)(0))
#define | I2S_MUTE_ENABLE ((uint8_t)(1))
#define | I2S_MUTE_DISABLE ((uint8_t)(0))
#define | I2S_TX_MODE ((uint8_t)(0))
#define | I2S_RX_MODE ((uint8_t)(1))
#define | I2S_CLKSEL_FRDCLK ((uint8_t)(0))
#define | I2S_CLKSEL_MCLK ((uint8_t)(2))
#define | I2S_4PIN_ENABLE ((uint8_t)(1))
#define | I2S_4PIN_DISABLE ((uint8_t)(0))
#define | I2S_MCLK_ENABLE ((uint8_t)(1))
#define | I2S_MCLK_DISABLE ((uint8_t)(0))
#define | I2S_DMA_1 ((uint8_t)(0))
#define | I2S_DMA_2 ((uint8_t)(1))

Define Documentation

#define I2S_4PIN_DISABLE ((uint8_t)(0))

Definition at line 81 of file lpc17xx_i2s.h.

#define I2S_4PIN_ENABLE ((uint8_t)(1))

I2S 4-pin Mode bit

Definition at line 80 of file lpc17xx_i2s.h.

#define I2S_CLKSEL_FRDCLK ((uint8_t)(0))

I2S Clock Select bit

Definition at line 77 of file lpc17xx_i2s.h.

#define I2S_CLKSEL_MCLK ((uint8_t)(2))

Definition at line 78 of file lpc17xx_i2s.h.

#define I2S_DMA_1 ((uint8_t)(0))

I2S select DMA bit

Definition at line 86 of file lpc17xx_i2s.h.

#define I2S_DMA_2 ((uint8_t)(1))

Definition at line 87 of file lpc17xx_i2s.h.

#define I2S_MASTER_MODE ((uint8_t)(0))

I2S Master/Slave mode bit

Definition at line 62 of file lpc17xx_i2s.h.

#define I2S_MCLK_DISABLE ((uint8_t)(0))

Definition at line 84 of file lpc17xx_i2s.h.

#define I2S_MCLK_ENABLE ((uint8_t)(1))

I2S MCLK Enable bit

Definition at line 83 of file lpc17xx_i2s.h.

#define I2S_MONO ((uint32_t)(1))

Definition at line 60 of file lpc17xx_i2s.h.

#define I2S_MUTE_DISABLE ((uint8_t)(0))

Definition at line 72 of file lpc17xx_i2s.h.

#define I2S_MUTE_ENABLE ((uint8_t)(1))

I2S Mute bit

Definition at line 71 of file lpc17xx_i2s.h.

#define I2S_RESET_DISABLE ((uint8_t)(0))

Definition at line 69 of file lpc17xx_i2s.h.

#define I2S_RESET_ENABLE ((uint8_t)(1))

I2S Reset bit

Definition at line 68 of file lpc17xx_i2s.h.

#define I2S_RX_MODE ((uint8_t)(1))

Definition at line 75 of file lpc17xx_i2s.h.

#define I2S_SLAVE_MODE ((uint8_t)(1))

Definition at line 63 of file lpc17xx_i2s.h.

#define I2S_STEREO ((uint32_t)(0))

I2S Channel bit

Definition at line 59 of file lpc17xx_i2s.h.

#define I2S_STOP_DISABLE ((uint8_t)(0))

Definition at line 66 of file lpc17xx_i2s.h.

#define I2S_STOP_ENABLE ((uint8_t)(1))

I2S Stop bit

Definition at line 65 of file lpc17xx_i2s.h.

#define I2S_TX_MODE ((uint8_t)(0))

I2S Transmit/Receive bit

Definition at line 74 of file lpc17xx_i2s.h.

#define I2S_WORDWIDTH_16 ((uint32_t)(1))

Definition at line 56 of file lpc17xx_i2s.h.

#define I2S_WORDWIDTH_32 ((uint32_t)(3))

Definition at line 57 of file lpc17xx_i2s.h.

#define I2S_WORDWIDTH_8 ((uint32_t)(0))

I2S configuration parameter defines I2S Wordwidth bit

Definition at line 55 of file lpc17xx_i2s.h.

Generated on Tue Jun 7 14:59:34 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: I2S Private Macros

I2S Private Macros
[I2S]

Defines

#define | I2S_DAO_WORDWIDTH_8 ((uint32_t)(0))
#define | I2S_DAO_WORDWIDTH_16 ((uint32_t)(1))
#define | I2S_DAO_WORDWIDTH_32 ((uint32_t)(3))
#define | I2S_DAO_MONO ((uint32_t)(1<<2))
#define | I2S_DAO_STOP ((uint32_t)(1<<3))
#define | I2S_DAO_RESET ((uint32_t)(1<<4))
#define | I2S_DAO_SLAVE ((uint32_t)(1<<5))
#define | I2S_DAO_WS_HALFPERIOD(n) ((uint32_t)(n<<6))
#define | I2S_DAO_MUTE ((uint32_t)(1<<15))
#define | I2S_DAI_WORDWIDTH_8 ((uint32_t)(0))
#define | I2S_DAI_WORDWIDTH_16 ((uint32_t)(1))
#define | I2S_DAI_WORDWIDTH_32 ((uint32_t)(3))
#define | I2S_DAI_MONO ((uint32_t)(1<<2))
#define | I2S_DAI_STOP ((uint32_t)(1<<3))
#define | I2S_DAI_RESET ((uint32_t)(1<<4))
#define | I2S_DAI_SLAVE ((uint32_t)(1<<5))
#define | I2S_DAI_WS_HALFPERIOD(n) ((uint32_t)((n&0x1FF)<<6))
#define | I2S_DAI_MUTE ((uint32_t)(1<<15))
#define | I2S_STATE_IRQ ((uint32_t)(1))
#define | I2S_STATE_DMA1 ((uint32_t)(1<<1))
#define | I2S_STATE_DMA2 ((uint32_t)(1<<2))
#define | I2S_STATE_RX_LEVEL(n) ((uint32_t)((n&1F)<<8))
#define | I2S_STATE_TX_LEVEL(n) ((uint32_t)((n&1F)<<16))
#define | I2S_DMA1_RX_ENABLE ((uint32_t)(1))
#define | I2S_DMA1_TX_ENABLE ((uint32_t)(1<<1))
#define | I2S_DMA1_RX_DEPTH(n) ((uint32_t)((n&0x1F)<<8))
#define | I2S_DMA1_TX_DEPTH(n) ((uint32_t)((n&0x1F)<<16))
#define | I2S_DMA2_RX_ENABLE ((uint32_t)(1))
#define | I2S_DMA2_TX_ENABLE ((uint32_t)(1<<1))
#define | I2S_DMA2_RX_DEPTH(n) ((uint32_t)((n&0x1F)<<8))
#define | I2S_DMA2_TX_DEPTH(n) ((uint32_t)((n&0x1F)<<16))
#define | I2S_IRQ_RX_ENABLE ((uint32_t)(1))
#define | I2S_IRQ_TX_ENABLE ((uint32_t)(1<<1))
#define | I2S_IRQ_RX_DEPTH(n) ((uint32_t)((n&0x1F)<<8))
#define | I2S_IRQ_TX_DEPTH(n) ((uint32_t)((n&0x1F)<<16))
#define | I2S_TXRATE_Y_DIVIDER(n) ((uint32_t)(n&0xFF))
#define | I2S_TXRATE_X_DIVIDER(n) ((uint32_t)((n&0xFF)<<8))
#define | I2S_RXRATE_Y_DIVIDER(n) ((uint32_t)(n&0xFF))
#define | I2S_RXRATE_X_DIVIDER(n) ((uint32_t)((n&0xFF)<<8))
#define | I2S_TXBITRATE(n) ((uint32_t)(n&0x3F))
#define | I2S_RXBITRATE(n) ((uint32_t)(n&0x3F))
#define | I2S_TXMODE_CLKSEL(n) ((uint32_t)(n&0x03))
#define | I2S_TXMODE_4PIN_ENABLE ((uint32_t)(1<<2))
#define | I2S_TXMODE_MCENA ((uint32_t)(1<<3))
#define | I2S_RXMODE_CLKSEL(n) ((uint32_t)(n&0x03))
#define | I2S_RXMODE_4PIN_ENABLE ((uint32_t)(1<<2))
#define | I2S_RXMODE_MCENA ((uint32_t)(1<<3))
#define | PARAM_I2Sx(n) (((uint32_t *)n)==((uint32_t *)LPC_I2S))
#define | PRAM_I2S_FREQ(freq) ((freq>=16000)&&(freq <= 96000))
#define | PARAM_I2S_WORDWIDTH(n)
#define | PARAM_I2S_CHANNEL(n) ((n==I2S_STEREO)||(n==I2S_MONO))
#define | PARAM_I2S_WS_SEL(n) ((n==I2S_MASTER_MODE)||(n==I2S_SLAVE_MODE))
#define | PARAM_I2S_STOP(n) ((n==I2S_STOP_ENABLE)||(n==I2S_STOP_DISABLE))
#define | PARAM_I2S_RESET(n) ((n==I2S_RESET_ENABLE)||(n==I2S_RESET_DISABLE))
#define | PARAM_I2S_MUTE(n) ((n==I2S_MUTE_ENABLE)||(n==I2S_MUTE_DISABLE))
#define | PARAM_I2S_TRX(n) ((n==I2S_TX_MODE)||(n==I2S_RX_MODE))
#define | PARAM_I2S_CLKSEL(n) ((n==I2S_CLKSEL_FRDCLK)||(n==I2S_CLKSEL_MCLK))
#define | PARAM_I2S_4PIN(n) ((n==I2S_4PIN_ENABLE)||(n==I2S_4PIN_DISABLE))
#define | PARAM_I2S_MCLK(n) ((n==I2S_MCLK_ENABLE)||(n==I2S_MCLK_DISABLE))
#define | PARAM_I2S_DMA(n) ((n==I2S_DMA_1)||(n==I2S_DMA_2))
#define | PARAM_I2S_DMA_DEPTH(n) (n<=31)
#define | PARAM_I2S_IRQ_LEVEL(n) (n<=31)
#define | PARAM_I2S_HALFPERIOD(n) (n<512)
#define | PARAM_I2S_BITRATE(n) (n<=63)

Define Documentation

#define I2S_DAI_MONO ((uint32_t)(1<<2))

I2S control mono or stereo format

Definition at line 126 of file lpc17xx_i2s.h.

#define I2S_DAI_MUTE ((uint32_t)(1<<15))

I2S control mute mode

Definition at line 136 of file lpc17xx_i2s.h.

#define I2S_DAI_RESET ((uint32_t)(1<<4))

I2S control reset mode

Definition at line 130 of file lpc17xx_i2s.h.

#define I2S_DAI_SLAVE ((uint32_t)(1<<5))

I2S control master/slave mode

Definition at line 132 of file lpc17xx_i2s.h.

#define I2S_DAI_STOP ((uint32_t)(1<<3))

I2S control stop mode

Definition at line 128 of file lpc17xx_i2s.h.

#define I2S_DAI_WORDWIDTH_16 ((uint32_t)(1))

Definition at line 123 of file lpc17xx_i2s.h.

#define I2S_DAI_WORDWIDTH_32 ((uint32_t)(3))

Definition at line 124 of file lpc17xx_i2s.h.

#define I2S_DAI_WORDWIDTH_8 ((uint32_t)(0))

Macro defines for DAI-Digital Audio Input register I2S wordwide - the number of bytes in data

Definition at line 122 of file lpc17xx_i2s.h.

#define I2S_DAI_WS_HALFPERIOD ( n ) ((uint32_t)((n&0x1FF)<<6))

I2S word select half period minus one (9 bits)

Definition at line 134 of file lpc17xx_i2s.h.

#define I2S_DAO_MONO ((uint32_t)(1<<2))

I2S control mono or stereo format

Definition at line 106 of file lpc17xx_i2s.h.

#define I2S_DAO_MUTE ((uint32_t)(1<<15))

I2S control mute mode

Definition at line 116 of file lpc17xx_i2s.h.

#define I2S_DAO_RESET ((uint32_t)(1<<4))

I2S control reset mode

Definition at line 110 of file lpc17xx_i2s.h.

#define I2S_DAO_SLAVE ((uint32_t)(1<<5))

I2S control master/slave mode

Definition at line 112 of file lpc17xx_i2s.h.

#define I2S_DAO_STOP ((uint32_t)(1<<3))

I2S control stop mode

Definition at line 108 of file lpc17xx_i2s.h.

#define I2S_DAO_WORDWIDTH_16 ((uint32_t)(1))

Definition at line 103 of file lpc17xx_i2s.h.

#define I2S_DAO_WORDWIDTH_32 ((uint32_t)(3))

Definition at line 104 of file lpc17xx_i2s.h.

#define I2S_DAO_WORDWIDTH_8 ((uint32_t)(0))

Macro defines for DAO-Digital Audio Output register I2S wordwide - the number of bytes in data

Definition at line 102 of file lpc17xx_i2s.h.

#define I2S_DAO_WS_HALFPERIOD ( n ) ((uint32_t)(n<<6))

I2S word select half period minus one

Definition at line 114 of file lpc17xx_i2s.h.

#define I2S_DMA1_RX_DEPTH ( n ) ((uint32_t)((n&0x1F)<<8))

I2S set FIFO level that trigger a receive DMA request on DMA1

Definition at line 160 of file lpc17xx_i2s.h.

#define I2S_DMA1_RX_ENABLE ((uint32_t)(1))

Macro defines for DMA1 register (DMA1 Configuration register) I2S control DMA1 for I2S receive

Definition at line 156 of file lpc17xx_i2s.h.

#define I2S_DMA1_TX_DEPTH ( n ) ((uint32_t)((n&0x1F)<<16))

I2S set FIFO level that trigger a transmit DMA request on DMA1

Definition at line 162 of file lpc17xx_i2s.h.

#define I2S_DMA1_TX_ENABLE ((uint32_t)(1<<1))

I2S control DMA1 for I2S transmit

Definition at line 158 of file lpc17xx_i2s.h.

#define I2S_DMA2_RX_DEPTH ( n ) ((uint32_t)((n&0x1F)<<8))

I2S set FIFO level that trigger a receive DMA request on DMA1

Definition at line 172 of file lpc17xx_i2s.h.

#define I2S_DMA2_RX_ENABLE ((uint32_t)(1))

Macro defines for DMA2 register (DMA2 Configuration register) I2S control DMA2 for I2S receive

Definition at line 168 of file lpc17xx_i2s.h.

#define I2S_DMA2_TX_DEPTH ( n ) ((uint32_t)((n&0x1F)<<16))

I2S set FIFO level that trigger a transmit DMA request on DMA1

Definition at line 174 of file lpc17xx_i2s.h.

#define I2S_DMA2_TX_ENABLE ((uint32_t)(1<<1))

I2S control DMA1 for I2S transmit

Definition at line 170 of file lpc17xx_i2s.h.

#define I2S_IRQ_RX_DEPTH ( n ) ((uint32_t)((n&0x1F)<<8))

I2S set the FIFO level on which to create an irq request

Definition at line 184 of file lpc17xx_i2s.h.

#define I2S_IRQ_RX_ENABLE ((uint32_t)(1))

Macro defines for IRQ register (Interrupt Request Control register) I2S control I2S receive interrupt

Definition at line 180 of file lpc17xx_i2s.h.

#define I2S_IRQ_TX_DEPTH ( n ) ((uint32_t)((n&0x1F)<<16))

I2S set the FIFO level on which to create an irq request

Definition at line 186 of file lpc17xx_i2s.h.

#define I2S_IRQ_TX_ENABLE ((uint32_t)(1<<1))

I2S control I2S transmit interrupt

Definition at line 182 of file lpc17xx_i2s.h.

#define I2S_RXBITRATE ( n ) ((uint32_t)(n&0x3F))

Definition at line 204 of file lpc17xx_i2s.h.

#define I2S_RXMODE_4PIN_ENABLE ((uint32_t)(1<<2))

I2S Receive control 4-pin mode

Definition at line 218 of file lpc17xx_i2s.h.

#define I2S_RXMODE_CLKSEL ( n ) ((uint32_t)(n&0x03))

I2S Receive select clock source

Definition at line 216 of file lpc17xx_i2s.h.

#define I2S_RXMODE_MCENA ((uint32_t)(1<<3))

I2S Receive control the TX_MCLK output

Definition at line 220 of file lpc17xx_i2s.h.

#define I2S_RXRATE_X_DIVIDER ( n ) ((uint32_t)((n&0xFF)<<8))

I2S Receive MCLK rate denominator

Definition at line 198 of file lpc17xx_i2s.h.

#define I2S_RXRATE_Y_DIVIDER ( n ) ((uint32_t)(n&0xFF))

I2S Receive MCLK rate denominator

Definition at line 196 of file lpc17xx_i2s.h.

#define I2S_STATE_DMA1 ((uint32_t)(1<<1))

I2S Status Receive or Transmit DMA1

Definition at line 144 of file lpc17xx_i2s.h.

#define I2S_STATE_DMA2 ((uint32_t)(1<<2))

I2S Status Receive or Transmit DMA2

Definition at line 146 of file lpc17xx_i2s.h.

#define I2S_STATE_IRQ ((uint32_t)(1))

Macro defines for STAT register (Status Feedback register) I2S Status Receive or Transmit Interrupt

Definition at line 142 of file lpc17xx_i2s.h.

#define I2S_STATE_RX_LEVEL ( n ) ((uint32_t)((n&1F)<<8))

I2S Status Current level of the Receive FIFO (5 bits)

Definition at line 148 of file lpc17xx_i2s.h.

#define I2S_STATE_TX_LEVEL ( n ) ((uint32_t)((n&1F)<<16))

I2S Status Current level of the Transmit FIFO (5 bits)

Definition at line 150 of file lpc17xx_i2s.h.

#define I2S_TXBITRATE ( n ) ((uint32_t)(n&0x3F))

Macro defines for TXBITRATE & RXBITRATE register (Transmit/Receive Bit Rate register)

Definition at line 203 of file lpc17xx_i2s.h.

#define I2S_TXMODE_4PIN_ENABLE ((uint32_t)(1<<2))

I2S Transmit control 4-pin mode

Definition at line 212 of file lpc17xx_i2s.h.

#define I2S_TXMODE_CLKSEL ( n ) ((uint32_t)(n&0x03))

Macro defines for TXMODE/RXMODE register (Transmit/Receive Mode Control register) I2S Transmit select clock source (2 bits)

Definition at line 210 of file lpc17xx_i2s.h.

#define I2S_TXMODE_MCENA ((uint32_t)(1<<3))

I2S Transmit control the TX_MCLK output

Definition at line 214 of file lpc17xx_i2s.h.

#define I2S_TXRATE_X_DIVIDER ( n ) ((uint32_t)((n&0xFF)<<8))

I2S Transmit MCLK rate denominator

Definition at line 194 of file lpc17xx_i2s.h.

#define I2S_TXRATE_Y_DIVIDER ( n ) ((uint32_t)(n&0xFF))

Macro defines for TXRATE/RXRATE register (Transmit/Receive Clock Rate register) I2S Transmit MCLK rate denominator

Definition at line 192 of file lpc17xx_i2s.h.

#define PARAM_I2S_4PIN ( n ) ((n==I2S_4PIN_ENABLE)||(n==I2S_4PIN_DISABLE))

Definition at line 246 of file lpc17xx_i2s.h.

#define PARAM_I2S_BITRATE ( n ) (n<=63)

Definition at line 258 of file lpc17xx_i2s.h.

#define PARAM_I2S_CHANNEL ( n ) ((n==I2S_STEREO)||(n==I2S_MONO))

Definition at line 232 of file lpc17xx_i2s.h.

#define PARAM_I2S_CLKSEL ( n ) ((n==I2S_CLKSEL_FRDCLK)||(n==I2S_CLKSEL_MCLK))

Definition at line 244 of file lpc17xx_i2s.h.

#define PARAM_I2S_DMA ( n ) ((n==I2S_DMA_1)||(n==I2S_DMA_2))

Definition at line 250 of file lpc17xx_i2s.h.

#define PARAM_I2S_DMA_DEPTH ( n ) (n<=31)

Definition at line 252 of file lpc17xx_i2s.h.

#define PARAM_I2S_HALFPERIOD ( n ) (n<512)

Definition at line 256 of file lpc17xx_i2s.h.

#define PARAM_I2S_IRQ_LEVEL ( n ) (n<=31)

Definition at line 254 of file lpc17xx_i2s.h.

#define PARAM_I2S_MCLK ( n ) ((n==I2S_MCLK_ENABLE)||(n==I2S_MCLK_DISABLE))

Definition at line 248 of file lpc17xx_i2s.h.

#define PARAM_I2S_MUTE ( n ) ((n==I2S_MUTE_ENABLE)||(n==I2S_MUTE_DISABLE))

Definition at line 240 of file lpc17xx_i2s.h.

#define PARAM_I2S_RESET ( n ) ((n==I2S_RESET_ENABLE)||(n==I2S_RESET_DISABLE))

Definition at line 238 of file lpc17xx_i2s.h.

#define PARAM_I2S_STOP ( n ) ((n==I2S_STOP_ENABLE)||(n==I2S_STOP_DISABLE))

Definition at line 236 of file lpc17xx_i2s.h.

#define PARAM_I2S_TRX ( n ) ((n==I2S_TX_MODE)||(n==I2S_RX_MODE))

Definition at line 242 of file lpc17xx_i2s.h.

#define PARAM_I2S_WORDWIDTH ( n )

Value:

((n==I2S_WORDWIDTH_8)||(n==I2S_WORDWIDTH_16)\
||(n==I2S_WORDWIDTH_32))

Definition at line 229 of file lpc17xx_i2s.h.

#define PARAM_I2S_WS_SEL ( n ) ((n==I2S_MASTER_MODE)||(n==I2S_SLAVE_MODE))

Definition at line 234 of file lpc17xx_i2s.h.

#define PARAM_I2Sx ( n ) (((uint32_t *)n)==((uint32_t *)LPC_I2S))

Macro to determine if it is valid I2S peripheral

Definition at line 225 of file lpc17xx_i2s.h.

#define PRAM_I2S_FREQ ( freq ) ((freq>=16000)&&(freq <= 96000))

Macro to check Data to send valid

Definition at line 227 of file lpc17xx_i2s.h.

Generated on Tue Jun 7 14:59:34 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: I2S Public Types

I2S Public Types
[I2S]

Data Structures

struct | I2S_CFG_Type
I2S configuration structure definition. More...
struct | I2S_DMAConf_Type
I2S DMA configuration structure definition. More...
struct | I2S_MODEConf_Type
I2S mode configuration structure definition. More...
Generated on Tue Jun 7 14:59:34 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: I2S Public Functions

I2S Public Functions
[I2S]

Functions

void | I2S_Init (LPC_I2S_TypeDef *I2Sx)
Initialize I2S
  • Turn on power and clock.

void | I2S_DeInit (LPC_I2S_TypeDef *I2Sx)
DeInitial both I2S transmit or receive.
void | I2S_Config (LPC_I2S_TypeDef *I2Sx, uint8_t TRMode, I2S_CFG_Type *ConfigStruct)
Configuration I2S, setting:
  • master/slave mode
  • wordwidth value
  • channel mode.

Status | I2S_FreqConfig (LPC_I2S_TypeDef *I2Sx, uint32_t Freq, uint8_t TRMode)
Set frequency for I2S.
void | I2S_SetBitRate (LPC_I2S_TypeDef *I2Sx, uint8_t bitrate, uint8_t TRMode)
I2S set bitrate.
void | I2S_ModeConfig (LPC_I2S_TypeDef *I2Sx, I2S_MODEConf_Type *ModeConfig, uint8_t TRMode)
Configuration operating mode for I2S.
uint8_t | I2S_GetLevel (LPC_I2S_TypeDef *I2Sx, uint8_t TRMode)
Get I2S Buffer Level.
void | I2S_Send (LPC_I2S_TypeDef *I2Sx, uint32_t BufferData)
I2S Send data.
uint32_t | I2S_Receive (LPC_I2S_TypeDef *I2Sx)
I2S Receive Data.
void | I2S_Start (LPC_I2S_TypeDef *I2Sx)
I2S Start: clear all STOP,RESET and MUTE bit, ready to operate.
void | I2S_Pause (LPC_I2S_TypeDef *I2Sx, uint8_t TRMode)
I2S Pause.
void | I2S_Mute (LPC_I2S_TypeDef *I2Sx, uint8_t TRMode)
I2S Mute.
void | I2S_Stop (LPC_I2S_TypeDef *I2Sx, uint8_t TRMode)
I2S Stop.
void | I2S_DMAConfig (LPC_I2S_TypeDef *I2Sx, I2S_DMAConf_Type *DMAConfig, uint8_t TRMode)
Configure DMA operation for I2S.
void | I2S_DMACmd (LPC_I2S_TypeDef *I2Sx, uint8_t DMAIndex, uint8_t TRMode, FunctionalState NewState)
Enable/Disable DMA operation for I2S.
void | I2S_IRQCmd (LPC_I2S_TypeDef *I2Sx, uint8_t TRMode, FunctionalState NewState)
Enable/Disable IRQ for I2S.
void | I2S_IRQConfig (LPC_I2S_TypeDef *I2Sx, uint8_t TRMode, uint8_t level)
Configure IRQ for I2S.
FunctionalState | I2S_GetIRQStatus (LPC_I2S_TypeDef *I2Sx, uint8_t TRMode)
Get I2S interrupt status.
uint8_t | I2S_GetIRQDepth (LPC_I2S_TypeDef *I2Sx, uint8_t TRMode)
Get I2S interrupt depth.

Function Documentation

void I2S_Config | ( | LPC_I2S_TypeDef * | I2Sx,
 |  | uint8_t | TRMode,
 |  | I2S_CFG_Type * | ConfigStruct
 | ) |  |

Configuration I2S, setting:

  • master/slave mode
  • wordwidth value
  • channel mode.

Parameters:
[in] | I2Sx | I2S peripheral selected, should be: LPC_I2S
[in] TRMode transmit/receive mode, should be:
  • I2S_TX_MODE = 0: transmit mode
  • I2S_RX_MODE = 1: receive mode
[in] | ConfigStruct | pointer to I2S_CFG_Type structure which will be initialized.
Returns:
none

Definition at line 142 of file lpc17xx_i2s.c.

void I2S_DeInit ( LPC_I2S_TypeDef * I2Sx )

DeInitial both I2S transmit or receive.

Parameters:
[in] I2Sx I2S peripheral selected, should be: LPC_I2S
Returns:
none

Definition at line 174 of file lpc17xx_i2s.c.

void I2S_DMACmd | ( | LPC_I2S_TypeDef * | I2Sx,
 |  | uint8_t | DMAIndex,
 |  | uint8_t | TRMode,
 |  | FunctionalState | NewState
 | ) |  |

Enable/Disable DMA operation for I2S.

Parameters:
[in] I2Sx,: I2S peripheral selected, should be: LPC_I2S
[in] DMAIndex chose what DMA is used, should be:
  • I2S_DMA_1 = 0: DMA1
  • I2S_DMA_2 = 1: DMA2
[in] TRMode is transmit/receive mode, should be:
  • I2S_TX_MODE = 0: transmit mode
  • I2S_RX_MODE = 1: receive mode
[in] NewState is new state of DMA operation, should be:
  • ENABLE
  • DISABLE
Returns:
none

Definition at line 469 of file lpc17xx_i2s.c.

void I2S_DMAConfig | ( | LPC_I2S_TypeDef * | I2Sx,
 |  | I2S_DMAConf_Type * | DMAConfig,
 |  | uint8_t | TRMode
 | ) |  |

Configure DMA operation for I2S.

Parameters:
[in] | I2Sx | I2S peripheral selected, should be: LPC_I2S
[in] | DMAConfig | pointer to I2S_DMAConf_Type will be used to configure
[in] TRMode is transmit/receive mode, should be:
  • I2S_TX_MODE = 0: transmit mode
  • I2S_RX_MODE = 1: receive mode
Returns:
none

Definition at line 432 of file lpc17xx_i2s.c.

Status I2S_FreqConfig | ( | LPC_I2S_TypeDef * | I2Sx,
 |  | uint32_t | Freq,
 |  | uint8_t | TRMode
 | ) |  |

Set frequency for I2S.

Parameters:
[in] | I2Sx | I2S peripheral selected, should be: LPC_I2S
[in] | Freq | is the frequency for I2S will be set. It can range from 16-96 kHz(16, 22.05, 32, 44.1, 48, 96kHz)
[in] TRMode is transmit/receive mode, should be:
  • I2S_TX_MODE = 0: transmit mode
  • I2S_RX_MODE = 1: receive mode
Returns:
Status: ERROR or SUCCESS

Definition at line 319 of file lpc17xx_i2s.c.

uint8_t I2S_GetIRQDepth | ( | LPC_I2S_TypeDef * | I2Sx,
 |  | uint8_t | TRMode
 | ) |  |

Get I2S interrupt depth.

Parameters:
[in] I2Sx I2S peripheral selected, should be: LPC_I2S
[in] TRMode is transmit/receive mode, should be:
  • I2S_TX_MODE = 0: transmit mode
  • I2S_RX_MODE = 1: receive mode
Returns:
depth of FIFO level on which to create an irq request

Definition at line 582 of file lpc17xx_i2s.c.

FunctionalState I2S_GetIRQStatus | ( | LPC_I2S_TypeDef * | I2Sx,
 |  | uint8_t | TRMode
 | ) |  |

Get I2S interrupt status.

Parameters:
[in] I2Sx I2S peripheral selected, should be: LPC_I2S
[in] TRMode is transmit/receive mode, should be:
  • I2S_TX_MODE = 0: transmit mode
  • I2S_RX_MODE = 1: receive mode
Returns:
FunctionState should be:
  • ENABLE: interrupt is enable
  • DISABLE: interrupt is disable

Definition at line 565 of file lpc17xx_i2s.c.

uint8_t I2S_GetLevel | ( | LPC_I2S_TypeDef * | I2Sx,
 |  | uint8_t | TRMode
 | ) |  |

Get I2S Buffer Level.

Parameters:
[in] I2Sx I2S peripheral selected, should be: LPC_I2S
[in] TRMode Transmit/receive mode, should be:
  • I2S_TX_MODE = 0: transmit mode
  • I2S_RX_MODE = 1: receive mode
Returns:
current level of Transmit/Receive Buffer

Definition at line 189 of file lpc17xx_i2s.c.

void I2S_Init ( LPC_I2S_TypeDef * I2Sx )

Initialize I2S

  • Turn on power and clock.

Parameters:
[in] I2Sx I2S peripheral selected, should be: LPC_I2S
Returns:
none

Definition at line 121 of file lpc17xx_i2s.c.

void I2S_IRQCmd | ( | LPC_I2S_TypeDef * | I2Sx,
 |  | uint8_t | TRMode,
 |  | FunctionalState | NewState
 | ) |  |

Enable/Disable IRQ for I2S.

Parameters:
[in] I2Sx I2S peripheral selected, should be: LPC_I2S
[in] TRMode is transmit/receive mode, should be:
  • I2S_TX_MODE = 0: transmit mode
  • I2S_RX_MODE = 1: receive mode
[in] NewState is new state of DMA operation, should be:
  • ENABLE
  • DISABLE
Returns:
none

Definition at line 536 of file lpc17xx_i2s.c.

void I2S_IRQConfig | ( | LPC_I2S_TypeDef * | I2Sx,
 |  | uint8_t | TRMode,
 |  | uint8_t | level
 | ) |  |

Configure IRQ for I2S.

Parameters:
[in] | I2Sx | I2S peripheral selected, should be: LPC_I2S
[in] TRMode is transmit/receive mode, should be:
  • I2S_TX_MODE = 0: transmit mode
  • I2S_RX_MODE = 1: receive mode
[in] | level | is the FIFO level that triggers IRQ request
Returns:
none

Definition at line 513 of file lpc17xx_i2s.c.

void I2S_ModeConfig | ( | LPC_I2S_TypeDef * | I2Sx,
 |  | I2S_MODEConf_Type * | ModeConfig,
 |  | uint8_t | TRMode
 | ) |  |

Configuration operating mode for I2S.

Parameters:
[in] | I2Sx | I2S peripheral selected, should be: LPC_I2S
[in] | ModeConfig | pointer to I2S_MODEConf_Type will be used to configure
[in] TRMode is transmit/receive mode, should be:
  • I2S_TX_MODE = 0: transmit mode
  • I2S_RX_MODE = 1: receive mode
Returns:
none

Definition at line 389 of file lpc17xx_i2s.c.

void I2S_Mute | ( | LPC_I2S_TypeDef * | I2Sx,
 |  | uint8_t | TRMode
 | ) |  |

I2S Mute.

Parameters:
[in] I2Sx I2S peripheral selected, should be: LPC_I2S
[in] TRMode is transmit/receive mode, should be:
  • I2S_TX_MODE = 0: transmit mode
  • I2S_RX_MODE = 1: receive mode
Returns:
none

Definition at line 272 of file lpc17xx_i2s.c.

void I2S_Pause | ( | LPC_I2S_TypeDef * | I2Sx,
 |  | uint8_t | TRMode
 | ) |  |

I2S Pause.

Parameters:
[in] I2Sx I2S peripheral selected, should be: LPC_I2S
[in] TRMode is transmit/receive mode, should be:
  • I2S_TX_MODE = 0: transmit mode
  • I2S_RX_MODE = 1: receive mode
Returns:
none

Definition at line 251 of file lpc17xx_i2s.c.

uint32_t I2S_Receive ( LPC_I2S_TypeDef * I2Sx )

I2S Receive Data.

Parameters:
[in] I2Sx pointer to LPC_I2S_TypeDef
Returns:
received value

Definition at line 236 of file lpc17xx_i2s.c.

void I2S_Send | ( | LPC_I2S_TypeDef * | I2Sx,
 |  | uint32_t | BufferData
 | ) |  |

I2S Send data.

Parameters:
[in] | I2Sx | I2S peripheral selected, should be: LPC_I2S
[in] | BufferData | pointer to uint32_t is the data will be send
Returns:
none

Definition at line 225 of file lpc17xx_i2s.c.

void I2S_SetBitRate | ( | LPC_I2S_TypeDef * | I2Sx,
 |  | uint8_t | bitrate,
 |  | uint8_t | TRMode
 | ) |  |

I2S set bitrate.

Parameters:
[in] | I2Sx | I2S peripheral selected, should be: LPC_I2S
[in] | bitrate | value will be set bitrate value should be in range: 0 .. 63
[in] TRMode is transmit/receive mode, should be:
  • I2S_TX_MODE = 0: transmit mode
  • I2S_RX_MODE = 1: receive mode
Returns:
none

Definition at line 363 of file lpc17xx_i2s.c.

void I2S_Start ( LPC_I2S_TypeDef * I2Sx )

I2S Start: clear all STOP,RESET and MUTE bit, ready to operate.

Parameters:
[in] I2Sx I2S peripheral selected, should be: LPC_I2S
Returns:
none

Definition at line 209 of file lpc17xx_i2s.c.

void I2S_Stop | ( | LPC_I2S_TypeDef * | I2Sx,
 |  | uint8_t | TRMode
 | ) |  |

I2S Stop.

Parameters:
[in] I2Sx I2S peripheral selected, should be: LPC_I2S
[in] TRMode is transmit/receive mode, should be:
  • I2S_TX_MODE = 0: transmit mode
  • I2S_RX_MODE = 1: receive mode
Returns:
none

Definition at line 293 of file lpc17xx_i2s.c.

Generated on Tue Jun 7 14:59:34 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: LIBCFG_DEFAULT

LIBCFG_DEFAULT
[LPC1700CMSIS Firmware Library]

Modules

LIBCFG_DEFAULT Public Macros
LIBCFG_DEFAULT Public Functions
Generated on Tue Jun 7 14:59:34 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: LIBCFG_DEFAULT Public Macros

LIBCFG_DEFAULT Public Macros
[LIBCFG_DEFAULT]

Defines

#define | DEBUG
#define | _DBGFWK
#define | _GPIO
#define | _EXTI
#define | _UART
#define | _UART0
#define | _UART1
#define | _UART2
#define | _UART3
#define | _SPI
#define | _SYSTICK
#define | _SSP
#define | _SSP0
#define | _SSP1
#define | _I2C
#define | _I2C0
#define | _I2C1
#define | _I2C2
#define | _TIM
#define | _WDT
#define | _GPDMA
#define | _DAC
#define | _ADC
#define | _PWM
#define | _PWM1
#define | _RTC
#define | _I2S
#define | _USBDEV
#define | _USB_DMA
#define | _QEI
#define | _MCPWM
#define | _CAN
#define | _RIT
#define | _EMAC
#define | CHECK_PARAM(expr) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))

Define Documentation

#define _ADC

Definition at line 103 of file lpc17xx_libcfg_default.h.

#define _CAN

Definition at line 127 of file lpc17xx_libcfg_default.h.

#define _DAC

Definition at line 100 of file lpc17xx_libcfg_default.h.

#define _DBGFWK

Definition at line 55 of file lpc17xx_libcfg_default.h.

#define _EMAC

Definition at line 133 of file lpc17xx_libcfg_default.h.

#define _EXTI

Definition at line 61 of file lpc17xx_libcfg_default.h.

#define _GPDMA

Definition at line 96 of file lpc17xx_libcfg_default.h.

#define _GPIO

Definition at line 58 of file lpc17xx_libcfg_default.h.

#define _I2C

Definition at line 83 of file lpc17xx_libcfg_default.h.

#define _I2C0

Definition at line 84 of file lpc17xx_libcfg_default.h.

#define _I2C1

Definition at line 85 of file lpc17xx_libcfg_default.h.

#define _I2C2

Definition at line 86 of file lpc17xx_libcfg_default.h.

#define _I2S

Definition at line 114 of file lpc17xx_libcfg_default.h.

#define _MCPWM

Definition at line 124 of file lpc17xx_libcfg_default.h.

#define _PWM

Definition at line 107 of file lpc17xx_libcfg_default.h.

#define _PWM1

Definition at line 108 of file lpc17xx_libcfg_default.h.

#define _QEI

Definition at line 121 of file lpc17xx_libcfg_default.h.

#define _RIT

Definition at line 130 of file lpc17xx_libcfg_default.h.

#define _RTC

Definition at line 111 of file lpc17xx_libcfg_default.h.

#define _SPI

Definition at line 71 of file lpc17xx_libcfg_default.h.

#define _SSP

Definition at line 77 of file lpc17xx_libcfg_default.h.

#define _SSP0

Definition at line 78 of file lpc17xx_libcfg_default.h.

#define _SSP1

Definition at line 79 of file lpc17xx_libcfg_default.h.

#define _SYSTICK

Definition at line 74 of file lpc17xx_libcfg_default.h.

#define _TIM

Definition at line 89 of file lpc17xx_libcfg_default.h.

#define _UART

Definition at line 64 of file lpc17xx_libcfg_default.h.

#define _UART0

Definition at line 65 of file lpc17xx_libcfg_default.h.

#define _UART1

Definition at line 66 of file lpc17xx_libcfg_default.h.

#define _UART2

Definition at line 67 of file lpc17xx_libcfg_default.h.

#define _UART3

Definition at line 68 of file lpc17xx_libcfg_default.h.

#define _USB_DMA

Definition at line 118 of file lpc17xx_libcfg_default.h.

#define _USBDEV

Definition at line 117 of file lpc17xx_libcfg_default.h.

#define _WDT

Definition at line 92 of file lpc17xx_libcfg_default.h.

#define CHECK_PARAM ( expr ) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))

Definition at line 147 of file lpc17xx_libcfg_default.h.

#define DEBUG

Definition at line 48 of file lpc17xx_libcfg_default.h.

Generated on Tue Jun 7 14:59:35 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: LIBCFG_DEFAULT Public Functions

LIBCFG_DEFAULT Public Functions
[LIBCFG_DEFAULT]

Functions

void check_failed (uint8_t *file, uint32_t line)

Function Documentation

void check_failed | ( | uint8_t * | file,
 |  | uint32_t | line
 | ) |  |

Definition at line 50 of file lpc17xx_libcfg_default.c.

Generated on Tue Jun 7 14:59:35 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: MCPWM

MCPWM
[LPC1700CMSIS Firmware Library]

Modules

MCPWM Public Macros
MCPWM Private Macros
MCPWM Public Types
MCPWM Public Functions
Generated on Tue Jun 7 14:59:35 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: MCPWM Public Macros

MCPWM Public Macros
[MCPWM]

Defines

#define | MCPWM_CHANNEL_EDGE_MODE ((uint32_t)(0))
#define | MCPWM_CHANNEL_CENTER_MODE ((uint32_t)(1))
#define | MCPWM_CHANNEL_PASSIVE_LO ((uint32_t)(0))
#define | MCPWM_CHANNEL_PASSIVE_HI ((uint32_t)(1))
#define | MCPWM_PATENT_A0 ((uint32_t)(1<<0))
#define | MCPWM_PATENT_B0 ((uint32_t)(1<<1))
#define | MCPWM_PATENT_A1 ((uint32_t)(1<<2))
#define | MCPWM_PATENT_B1 ((uint32_t)(1<<3))
#define | MCPWM_PATENT_A2 ((uint32_t)(1<<4))
#define | MCPWM_PATENT_B2 ((uint32_t)(1<<5))
#define | MCPWM_INTFLAG_LIM0 MCPWM_INT_ILIM(0)
#define | MCPWM_INTFLAG_MAT0 MCPWM_INT_IMAT(0)
#define | MCPWM_INTFLAG_CAP0 MCPWM_INT_ICAP(0)
#define | MCPWM_INTFLAG_LIM1 MCPWM_INT_ILIM(1)
#define | MCPWM_INTFLAG_MAT1 MCPWM_INT_IMAT(1)
#define | MCPWM_INTFLAG_CAP1 MCPWM_INT_ICAP(1)
#define | MCPWM_INTFLAG_LIM2 MCPWM_INT_ILIM(2)
#define | MCPWM_INTFLAG_MAT2 MCPWM_INT_IMAT(2)
#define | MCPWM_INTFLAG_CAP2 MCPWM_INT_ICAP(2)
#define | MCPWM_INTFLAG_ABORT MCPWM_INT_ABORT

Define Documentation

#define MCPWM_CHANNEL_CENTER_MODE ((uint32_t)(1))

Center aligned mode for channel in MCPWM

Definition at line 55 of file lpc17xx_mcpwm.h.

#define MCPWM_CHANNEL_EDGE_MODE ((uint32_t)(0))

Edge aligned mode for channel in MCPWM

Definition at line 53 of file lpc17xx_mcpwm.h.

#define MCPWM_CHANNEL_PASSIVE_HI ((uint32_t)(1))

Polarity of the MCOA and MCOB pins: Passive state is HIGH, active state is LOW

Definition at line 60 of file lpc17xx_mcpwm.h.

#define MCPWM_CHANNEL_PASSIVE_LO ((uint32_t)(0))

Polarity of the MCOA and MCOB pins: Passive state is LOW, active state is HIGH

Definition at line 58 of file lpc17xx_mcpwm.h.

#define MCPWM_INTFLAG_ABORT MCPWM_INT_ABORT

Fast abort interrupt

Definition at line 94 of file lpc17xx_mcpwm.h.

#define MCPWM_INTFLAG_CAP0 MCPWM_INT_ICAP(0)

Capture interrupt for channel (0)

Definition at line 77 of file lpc17xx_mcpwm.h.

#define MCPWM_INTFLAG_CAP1 MCPWM_INT_ICAP(1)

Capture interrupt for channel (1)

Definition at line 84 of file lpc17xx_mcpwm.h.

#define MCPWM_INTFLAG_CAP2 MCPWM_INT_ICAP(2)

Capture interrupt for channel (2)

Definition at line 91 of file lpc17xx_mcpwm.h.

#define MCPWM_INTFLAG_LIM0 MCPWM_INT_ILIM(0)

Limit interrupt for channel (0)

Definition at line 73 of file lpc17xx_mcpwm.h.

#define MCPWM_INTFLAG_LIM1 MCPWM_INT_ILIM(1)

Limit interrupt for channel (1)

Definition at line 80 of file lpc17xx_mcpwm.h.

#define MCPWM_INTFLAG_LIM2 MCPWM_INT_ILIM(2)

Limit interrupt for channel (2)

Definition at line 87 of file lpc17xx_mcpwm.h.

#define MCPWM_INTFLAG_MAT0 MCPWM_INT_IMAT(0)

Match interrupt for channel (0)

Definition at line 75 of file lpc17xx_mcpwm.h.

#define MCPWM_INTFLAG_MAT1 MCPWM_INT_IMAT(1)

Match interrupt for channel (1)

Definition at line 82 of file lpc17xx_mcpwm.h.

#define MCPWM_INTFLAG_MAT2 MCPWM_INT_IMAT(2)

Match interrupt for channel (2)

Definition at line 89 of file lpc17xx_mcpwm.h.

#define MCPWM_PATENT_A0 ((uint32_t)(1<<0))

MCOA0 tracks internal MCOA0

Definition at line 64 of file lpc17xx_mcpwm.h.

#define MCPWM_PATENT_A1 ((uint32_t)(1<<2))

MCOA1 tracks internal MCOA0

Definition at line 66 of file lpc17xx_mcpwm.h.

#define MCPWM_PATENT_A2 ((uint32_t)(1<<4))

MCOA2 tracks internal MCOA0

Definition at line 68 of file lpc17xx_mcpwm.h.

#define MCPWM_PATENT_B0 ((uint32_t)(1<<1))

MCOB0 tracks internal MCOA0

Definition at line 65 of file lpc17xx_mcpwm.h.

#define MCPWM_PATENT_B1 ((uint32_t)(1<<3))

MCOB1 tracks internal MCOA0

Definition at line 67 of file lpc17xx_mcpwm.h.

#define MCPWM_PATENT_B2 ((uint32_t)(1<<5))

MCOB2 tracks internal MCOA0

Definition at line 69 of file lpc17xx_mcpwm.h.

Generated on Tue Jun 7 14:59:35 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: MCPWM Private Macros

MCPWM Private Macros
[MCPWM]

Defines

#define | MCPWM_CON_RUN(n) ((n<=2) ? ((uint32_t)(1<<((n*8)+0))) : (0))
#define | MCPWM_CON_CENTER(n) ((n<=2) ? ((uint32_t)(1<<((n*8)+1))) : (0))
#define | MCPWM_CON_POLAR(n) ((n<=2) ? ((uint32_t)(1<<((n*8)+2))) : (0))
#define | MCPWM_CON_DTE(n) ((n<=2) ? ((uint32_t)(1<<((n*8)+3))) : (0))
#define | MCPWM_CON_DISUP(n) ((n<=2) ? ((uint32_t)(1<<((n*8)+4))) : (0))
#define | MCPWM_CON_INVBDC ((uint32_t)(1<<29))
#define | MCPWM_CON_ACMODE ((uint32_t)(1<<30))
#define | MCPWM_CON_DCMODE ((uint32_t)(1<<31))
#define | MCPWM_CAPCON_CAPMCI_RE(cap, mci) (((cap<=2)&&(mci<=2)) ? ((uint32_t)(1<<((cap*6)+(mci*2)+0))) : (0))
#define | MCPWM_CAPCON_CAPMCI_FE(cap, mci) (((cap<=2)&&(mci<=2)) ? ((uint32_t)(1<<((cap*6)+(mci*2)+1))) : (0))
#define | MCPWM_CAPCON_RT(n) ((n<=2) ? ((uint32_t)(1<<(18+(n)))) : (0))
#define | MCPWM_CAPCON_HNFCAP(n) ((n<=2) ? ((uint32_t)(1<<(21+(n)))) : (0))
#define | MCPWM_INT_ILIM(n) (((n>=0)&&(n<=2)) ? ((uint32_t)(1<<((n*4)+0))) : (0))
#define | MCPWM_INT_IMAT(n) (((n>=0)&&(n<=2)) ? ((uint32_t)(1<<((n*4)+1))) : (0))
#define | MCPWM_INT_ICAP(n) (((n>=0)&&(n<=2)) ? ((uint32_t)(1<<((n*4)+2))) : (0))
#define | MCPWM_INT_ABORT ((uint32_t)(1<<15))
#define | MCPWM_CNTCON_TCMCI_RE(tc, mci) (((tc>=0)&&(tc<=2)&&(mci>=0)&&(mci<=2)) ? ((uint32_t)(1<<((6*tc)+(2*mci)+0))) : (0))
#define | MCPWM_CNTCON_TCMCI_FE(tc, mci) (((tc>=0)&&(tc<=2)&&(mci>=0)&&(mci<=2)) ? ((uint32_t)(1<<((6*tc)+(2*mci)+1))) : (0))
#define | MCPWM_CNTCON_CNTR(n) (((n>=0)&&(n<=2)) ? ((uint32_t)(1<<(29+n))) : (0))
#define | MCPWM_DT(n, x) ((n<=2) ? ((uint32_t)((x&0x3FF)<<(n*10))) : (0))
#define | MCPWM_CP_A0 ((uint32_t)(1<<0))
#define | MCPWM_CP_B0 ((uint32_t)(1<<1))
#define | MCPWM_CP_A1 ((uint32_t)(1<<2))
#define | MCPWM_CP_B1 ((uint32_t)(1<<3))
#define | MCPWM_CP_A2 ((uint32_t)(1<<4))
#define | MCPWM_CP_B2 ((uint32_t)(1<<5))
#define | MCPWM_CAPCLR_CAP(n) ((n<=2) ? ((uint32_t)(1<<n)) : (0))

Define Documentation

#define MCPWM_CAPCLR_CAP ( n ) ((n<=2) ? ((uint32_t)(1<<n)) : (0))

Macro defines for MCPWM Capture clear address register Clear the MCCAP (n) register

Definition at line 198 of file lpc17xx_mcpwm.h.

#define MCPWM_CAPCON_CAPMCI_FE | ( | cap,
 |  | mci | ) | (((cap<=2)&&(mci<=2)) ? ((uint32_t)(1<<((cap*6)+(mci*2)+1))) : (0))

Enables/Disable channel (cap) capture event on a falling edge on MCI(mci)

Definition at line 135 of file lpc17xx_mcpwm.h.

#define MCPWM_CAPCON_CAPMCI_RE | ( | cap,
 |  | mci | ) | (((cap<=2)&&(mci<=2)) ? ((uint32_t)(1<<((cap*6)+(mci*2)+0))) : (0))

Macro defines for MCPWM Capture Control register Enables/Disable channel (cap) capture event on a rising edge on MCI(mci)

Definition at line 133 of file lpc17xx_mcpwm.h.

#define MCPWM_CAPCON_HNFCAP ( n ) ((n<=2) ? ((uint32_t)(1<<(21+(n)))) : (0))

Hardware noise filter: channel (n) capture events are delayed

Definition at line 139 of file lpc17xx_mcpwm.h.

#define MCPWM_CAPCON_RT ( n ) ((n<=2) ? ((uint32_t)(1<<(18+(n)))) : (0))

TC(n) is reset by channel (n) capture event

Definition at line 137 of file lpc17xx_mcpwm.h.

#define MCPWM_CNTCON_CNTR ( n ) (((n>=0)&&(n<=2)) ? ((uint32_t)(1<<(29+n))) : (0))

Channel (n) is in counter mode

Definition at line 176 of file lpc17xx_mcpwm.h.

#define MCPWM_CNTCON_TCMCI_FE | ( | tc,
 |  | mci | ) | (((tc>=0)&&(tc<=2)&&(mci>=0)&&(mci<=2)) ? ((uint32_t)(1<<((6*tc)+(2*mci)+1))) : (0))

Counter(cnt) advances on a falling edge on MCI(mci) pin

Definition at line 174 of file lpc17xx_mcpwm.h.

#define MCPWM_CNTCON_TCMCI_RE | ( | tc,
 |  | mci | ) | (((tc>=0)&&(tc<=2)&&(mci>=0)&&(mci<=2)) ? ((uint32_t)(1<<((6*tc)+(2*mci)+0))) : (0))

Macro defines for MCPWM Count Control register Counter(tc) advances on a rising edge on MCI(mci) pin

Definition at line 172 of file lpc17xx_mcpwm.h.

#define MCPWM_CON_ACMODE ((uint32_t)(1<<30))

3-phase AC mode select

Definition at line 120 of file lpc17xx_mcpwm.h.

#define MCPWM_CON_CENTER ( n ) ((n<=2) ? ((uint32_t)(1<<((n*8)+1))) : (0))

Edge/center aligned operation for channel n

Definition at line 115 of file lpc17xx_mcpwm.h.

#define MCPWM_CON_DCMODE ((uint32_t)(1<<31))

3-phase DC mode select

Definition at line 121 of file lpc17xx_mcpwm.h.

#define MCPWM_CON_DISUP ( n ) ((n<=2) ? ((uint32_t)(1<<((n*8)+4))) : (0))

Enable/Disable update of functional register for channel n

Definition at line 118 of file lpc17xx_mcpwm.h.

#define MCPWM_CON_DTE ( n ) ((n<=2) ? ((uint32_t)(1<<((n*8)+3))) : (0))

Control the dead-time feature for channel n

Definition at line 117 of file lpc17xx_mcpwm.h.

#define MCPWM_CON_INVBDC ((uint32_t)(1<<29))

Control the polarity for all 3 channels

Definition at line 119 of file lpc17xx_mcpwm.h.

#define MCPWM_CON_POLAR ( n ) ((n<=2) ? ((uint32_t)(1<<((n*8)+2))) : (0))

Select polarity of the MCOAn and MCOBn pin

Definition at line 116 of file lpc17xx_mcpwm.h.

#define MCPWM_CON_RUN ( n ) ((n<=2) ? ((uint32_t)(1<<((n*8)+0))) : (0))

Macro defines for MCPWM Control register Stops/starts timer channel n

Definition at line 114 of file lpc17xx_mcpwm.h.

#define MCPWM_CP_A0 ((uint32_t)(1<<0))

Macro defines for MCPWM Communication Pattern register MCOA0 tracks internal MCOA0

Definition at line 187 of file lpc17xx_mcpwm.h.

#define MCPWM_CP_A1 ((uint32_t)(1<<2))

MCOA1 tracks internal MCOA0

Definition at line 189 of file lpc17xx_mcpwm.h.

#define MCPWM_CP_A2 ((uint32_t)(1<<4))

MCOA2 tracks internal MCOA0

Definition at line 191 of file lpc17xx_mcpwm.h.

#define MCPWM_CP_B0 ((uint32_t)(1<<1))

MCOB0 tracks internal MCOA0

Definition at line 188 of file lpc17xx_mcpwm.h.

#define MCPWM_CP_B1 ((uint32_t)(1<<3))

MCOB1 tracks internal MCOA0

Definition at line 190 of file lpc17xx_mcpwm.h.

#define MCPWM_CP_B2 ((uint32_t)(1<<5))

MCOB2 tracks internal MCOA0

Definition at line 192 of file lpc17xx_mcpwm.h.

#define MCPWM_DT | ( | n,
 |  | x | ) | ((n<=2) ? ((uint32_t)((x&0x3FF)<<(n*10))) : (0))

Macro defines for MCPWM Dead-time register Dead time value x for channel n

Definition at line 182 of file lpc17xx_mcpwm.h.

#define MCPWM_INT_ABORT ((uint32_t)(1<<15))

Fast abort interrupt

Definition at line 160 of file lpc17xx_mcpwm.h.

#define MCPWM_INT_ICAP ( n ) (((n>=0)&&(n<=2)) ? ((uint32_t)(1<<((n*4)+2))) : (0))

Capture interrupt for channel (n)

Definition at line 158 of file lpc17xx_mcpwm.h.

#define MCPWM_INT_ILIM ( n ) (((n>=0)&&(n<=2)) ? ((uint32_t)(1<<((n*4)+0))) : (0))

Macro defines for MCPWM Interrupt register Limit interrupt for channel (n)

Definition at line 154 of file lpc17xx_mcpwm.h.

#define MCPWM_INT_IMAT ( n ) (((n>=0)&&(n<=2)) ? ((uint32_t)(1<<((n*4)+1))) : (0))

Match interrupt for channel (n)

Definition at line 156 of file lpc17xx_mcpwm.h.

Generated on Tue Jun 7 14:59:35 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: MCPWM Public Types

MCPWM Public Types
[MCPWM]

Data Structures

struct | MCPWM_CHANNEL_CFG_Type
Motor Control PWM Channel Configuration structure type definition. More...
struct | MCPWM_CAPTURE_CFG_Type
MCPWM Capture Configuration type definition. More...
struct | MCPWM_COUNT_CFG_Type
MCPWM Count Control Configuration type definition. More...
Generated on Tue Jun 7 14:59:35 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: MCPWM Public Functions

MCPWM Public Functions
[MCPWM]

Functions

void | MCPWM_Init (LPC_MCPWM_TypeDef *MCPWMx)
Initializes the MCPWM peripheral.
void | MCPWM_ConfigChannel (LPC_MCPWM_TypeDef *MCPWMx, uint32_t channelNum, MCPWM_CHANNEL_CFG_Type *channelSetup)
Configures each channel in MCPWM peripheral according to the specified parameters in the MCPWM_CHANNEL_CFG_Type.
void | MCPWM_WriteToShadow (LPC_MCPWM_TypeDef *MCPWMx, uint32_t channelNum, MCPWM_CHANNEL_CFG_Type *channelSetup)
Write to MCPWM shadow registers - Update the value for period and pulse width in MCPWM peripheral.
void | MCPWM_ConfigCapture (LPC_MCPWM_TypeDef *MCPWMx, uint32_t channelNum, MCPWM_CAPTURE_CFG_Type *captureConfig)
Configures capture function in MCPWM peripheral.
void | MCPWM_ClearCapture (LPC_MCPWM_TypeDef *MCPWMx, uint32_t captureChannel)
Clears current captured value in specified capture channel.
uint32_t | MCPWM_GetCapture (LPC_MCPWM_TypeDef *MCPWMx, uint32_t captureChannel)
Get current captured value in specified capture channel.
void | MCPWM_CountConfig (LPC_MCPWM_TypeDef *MCPWMx, uint32_t channelNum, uint32_t countMode, MCPWM_COUNT_CFG_Type *countConfig)
Configures Count control in MCPWM peripheral.
void | MCPWM_Start (LPC_MCPWM_TypeDef *MCPWMx, uint32_t channel0, uint32_t channel1, uint32_t channel2)
Start MCPWM activity for each MCPWM channel.
void | MCPWM_Stop (LPC_MCPWM_TypeDef *MCPWMx, uint32_t channel0, uint32_t channel1, uint32_t channel2)
Stop MCPWM activity for each MCPWM channel.
void | MCPWM_ACMode (LPC_MCPWM_TypeDef *MCPWMx, uint32_t acMode)
Enables/Disables 3-phase AC motor mode on MCPWM peripheral.
void | MCPWM_DCMode (LPC_MCPWM_TypeDef *MCPWMx, uint32_t dcMode, uint32_t outputInvered, uint32_t outputPattern)
Enables/Disables 3-phase DC motor mode on MCPWM peripheral.
void | MCPWM_IntConfig (LPC_MCPWM_TypeDef *MCPWMx, uint32_t ulIntType, FunctionalState NewState)
Configures the specified interrupt in MCPWM peripheral.
void | MCPWM_IntSet (LPC_MCPWM_TypeDef *MCPWMx, uint32_t ulIntType)
Sets/Forces the specified interrupt for MCPWM peripheral.
void | MCPWM_IntClear (LPC_MCPWM_TypeDef *MCPWMx, uint32_t ulIntType)
Clear the specified interrupt pending for MCPWM peripheral.
FlagStatus | MCPWM_GetIntStatus (LPC_MCPWM_TypeDef *MCPWMx, uint32_t ulIntType)
Check whether if the specified interrupt in MCPWM is set or not.

Function Documentation

void MCPWM_ACMode | ( | LPC_MCPWM_TypeDef * | MCPWMx,
 |  | uint32_t | acMode
 | ) |  |

Enables/Disables 3-phase AC motor mode on MCPWM peripheral.

Parameters:
[in] MCPWMx Motor Control PWM peripheral selected Should be: LPC_MCPWM
[in] acMode State of this command, should be:
  • ENABLE.
  • DISABLE.
Returns:
None

Definition at line 337 of file lpc17xx_mcpwm.c.

void MCPWM_ClearCapture | ( | LPC_MCPWM_TypeDef * | MCPWMx,
 |  | uint32_t | captureChannel
 | ) |  |

Clears current captured value in specified capture channel.

Parameters:
[in] | MCPWMx | Motor Control PWM peripheral selected Should be: LPC_MCPWM
[in] | captureChannel | Capture channel number, should be: 0..2
Returns:
None

Definition at line 217 of file lpc17xx_mcpwm.c.

void MCPWM_ConfigCapture | ( | LPC_MCPWM_TypeDef * | MCPWMx,
 |  | uint32_t | channelNum,
 |  | MCPWM_CAPTURE_CFG_Type * | captureConfig
 | ) |  |

Configures capture function in MCPWM peripheral.

Parameters:
[in] | MCPWMx | Motor Control PWM peripheral selected Should be: LPC_MCPWM
[in] | channelNum | MCI (Motor Control Input pin) number Should be: 0..2
[in] | captureConfig | Pointer to a MCPWM_CAPTURE_CFG_Type structure that contains the configuration information for the specified MCPWM capture.
Returns:

Definition at line 178 of file lpc17xx_mcpwm.c.

void MCPWM_ConfigChannel | ( | LPC_MCPWM_TypeDef * | MCPWMx,
 |  | uint32_t | channelNum,
 |  | MCPWM_CHANNEL_CFG_Type * | channelSetup
 | ) |  |

Configures each channel in MCPWM peripheral according to the specified parameters in the MCPWM_CHANNEL_CFG_Type.

Parameters:
[in] | MCPWMx | Motor Control PWM peripheral selected should be: LPC_MCPWM
[in] | channelNum | Channel number, should be: 0..2.
[in] | channelSetup | Pointer to a MCPWM_CHANNEL_CFG_Type structure that contains the configuration information for the specified MCPWM channel.
Returns:
None

Definition at line 90 of file lpc17xx_mcpwm.c.

void MCPWM_CountConfig | ( | LPC_MCPWM_TypeDef * | MCPWMx,
 |  | uint32_t | channelNum,
 |  | uint32_t | countMode,
 |  | MCPWM_COUNT_CFG_Type * | countConfig
 | ) |  |

Configures Count control in MCPWM peripheral.

Parameters:
[in] | MCPWMx | Motor Control PWM peripheral selected Should be: LPC_MCPWM
[in] | channelNum | Channel number, should be: 0..2
[in] countMode Count mode, should be:
  • ENABLE: Enables count mode.
  • DISABLE: Disable count mode, the channel is in timer mode.
[in] | countConfig | Pointer to a MCPWM_COUNT_CFG_Type structure that contains the configuration information for the specified MCPWM count control.
Returns:
None

Definition at line 255 of file lpc17xx_mcpwm.c.

void MCPWM_DCMode | ( | LPC_MCPWM_TypeDef * | MCPWMx,
 |  | uint32_t | dcMode,
 |  | uint32_t | outputInvered,
 |  | uint32_t | outputPattern
 | ) |  |

Enables/Disables 3-phase DC motor mode on MCPWM peripheral.

Parameters:
[in] MCPWMx Motor Control PWM peripheral selected Should be: LPC_MCPWM
[in] dcMode State of this command, should be:
  • ENABLE.
  • DISABLE.
[in] outputInvered Polarity of the MCOB outputs for all 3 channels, should be:
  • ENABLE: The MCOB outputs have opposite polarity from the MCOA outputs.
  • DISABLE: The MCOB outputs have the same basic polarity as the MCOA outputs.
[in] outputPattern A value contains bits that enables/disables the specified output pins route to the internal MCOA0 signal, should be:
  • MCPWM_PATENT_A0: MCOA0 tracks internal MCOA0
  • MCPWM_PATENT_B0: MCOB0 tracks internal MCOA0
  • MCPWM_PATENT_A1: MCOA1 tracks internal MCOA0
  • MCPWM_PATENT_B1: MCOB1 tracks internal MCOA0
  • MCPWM_PATENT_A2: MCOA2 tracks internal MCOA0
  • MCPWM_PATENT_B2: MCOB2 tracks internal MCOA0
Returns:
None
Note: all these outputPatent values above can be ORed together for using as input parameter.

Definition at line 372 of file lpc17xx_mcpwm.c.

uint32_t MCPWM_GetCapture | ( | LPC_MCPWM_TypeDef * | MCPWMx,
 |  | uint32_t | captureChannel
 | ) |  |

Get current captured value in specified capture channel.

Parameters:
[in] | MCPWMx | Motor Control PWM peripheral selected, Should be: LPC_MCPWM
[in] | captureChannel | Capture channel number, should be: 0..2
Returns:
None

Definition at line 229 of file lpc17xx_mcpwm.c.

FlagStatus MCPWM_GetIntStatus | ( | LPC_MCPWM_TypeDef * | MCPWMx,
 |  | uint32_t | ulIntType
 | ) |  |

Check whether if the specified interrupt in MCPWM is set or not.

Parameters:
[in] MCPWMx Motor Control PWM peripheral selected, should be: LPC_MCPWM
[in] ulIntType Interrupt type, should be:
  • MCPWM_INTFLAG_LIM0: Limit interrupt for channel (0)
  • MCPWM_INTFLAG_MAT0: Match interrupt for channel (0)
  • MCPWM_INTFLAG_CAP0: Capture interrupt for channel (0)
  • MCPWM_INTFLAG_LIM1: Limit interrupt for channel (1)
  • MCPWM_INTFLAG_MAT1: Match interrupt for channel (1)
  • MCPWM_INTFLAG_CAP1: Capture interrupt for channel (1)
  • MCPWM_INTFLAG_LIM2: Limit interrupt for channel (2)
  • MCPWM_INTFLAG_MAT2: Match interrupt for channel (2)
  • MCPWM_INTFLAG_CAP2: Capture interrupt for channel (2)
  • MCPWM_INTFLAG_ABORT: Fast abort interrupt
Returns:
None

Definition at line 488 of file lpc17xx_mcpwm.c.

void MCPWM_Init ( LPC_MCPWM_TypeDef * MCPWMx )

Initializes the MCPWM peripheral.

Parameters:
[in] MCPWMx Motor Control PWM peripheral selected, Should be: LPC_MCPWM
Returns:
None

Definition at line 60 of file lpc17xx_mcpwm.c.

void MCPWM_IntClear | ( | LPC_MCPWM_TypeDef * | MCPWMx,
 |  | uint32_t | ulIntType
 | ) |  |

Clear the specified interrupt pending for MCPWM peripheral.

Parameters:
[in] MCPWMx Motor Control PWM peripheral selected, should be: LPC_MCPWM
[in] ulIntType Interrupt type, should be:
  • MCPWM_INTFLAG_LIM0: Limit interrupt for channel (0)
  • MCPWM_INTFLAG_MAT0: Match interrupt for channel (0)
  • MCPWM_INTFLAG_CAP0: Capture interrupt for channel (0)
  • MCPWM_INTFLAG_LIM1: Limit interrupt for channel (1)
  • MCPWM_INTFLAG_MAT1: Match interrupt for channel (1)
  • MCPWM_INTFLAG_CAP1: Capture interrupt for channel (1)
  • MCPWM_INTFLAG_LIM2: Limit interrupt for channel (2)
  • MCPWM_INTFLAG_MAT2: Match interrupt for channel (2)
  • MCPWM_INTFLAG_CAP2: Capture interrupt for channel (2)
  • MCPWM_INTFLAG_ABORT: Fast abort interrupt
Returns:
None Note: all these ulIntType values above can be ORed together for using as input parameter.

Definition at line 465 of file lpc17xx_mcpwm.c.

void MCPWM_IntConfig | ( | LPC_MCPWM_TypeDef * | MCPWMx,
 |  | uint32_t | ulIntType,
 |  | FunctionalState | NewState
 | ) |  |

Configures the specified interrupt in MCPWM peripheral.

Parameters:
[in] MCPWMx Motor Control PWM peripheral selected Should be: LPC_MCPWM
[in] ulIntType Interrupt type, should be:
  • MCPWM_INTFLAG_LIM0: Limit interrupt for channel (0)
  • MCPWM_INTFLAG_MAT0: Match interrupt for channel (0)
  • MCPWM_INTFLAG_CAP0: Capture interrupt for channel (0)
  • MCPWM_INTFLAG_LIM1: Limit interrupt for channel (1)
  • MCPWM_INTFLAG_MAT1: Match interrupt for channel (1)
  • MCPWM_INTFLAG_CAP1: Capture interrupt for channel (1)
  • MCPWM_INTFLAG_LIM2: Limit interrupt for channel (2)
  • MCPWM_INTFLAG_MAT2: Match interrupt for channel (2)
  • MCPWM_INTFLAG_CAP2: Capture interrupt for channel (2)
  • MCPWM_INTFLAG_ABORT: Fast abort interrupt
[in] NewState New State of this command, should be:
  • ENABLE.
  • DISABLE.
Returns:
None
Note: all these ulIntType values above can be ORed together for using as input parameter.

Definition at line 413 of file lpc17xx_mcpwm.c.

void MCPWM_IntSet | ( | LPC_MCPWM_TypeDef * | MCPWMx,
 |  | uint32_t | ulIntType
 | ) |  |

Sets/Forces the specified interrupt for MCPWM peripheral.

Parameters:
[in] MCPWMx Motor Control PWM peripheral selected Should be LPC_MCPWM
[in] ulIntType Interrupt type, should be:
  • MCPWM_INTFLAG_LIM0: Limit interrupt for channel (0)
  • MCPWM_INTFLAG_MAT0: Match interrupt for channel (0)
  • MCPWM_INTFLAG_CAP0: Capture interrupt for channel (0)
  • MCPWM_INTFLAG_LIM1: Limit interrupt for channel (1)
  • MCPWM_INTFLAG_MAT1: Match interrupt for channel (1)
  • MCPWM_INTFLAG_CAP1: Capture interrupt for channel (1)
  • MCPWM_INTFLAG_LIM2: Limit interrupt for channel (2)
  • MCPWM_INTFLAG_MAT2: Match interrupt for channel (2)
  • MCPWM_INTFLAG_CAP2: Capture interrupt for channel (2)
  • MCPWM_INTFLAG_ABORT: Fast abort interrupt
Returns:
None Note: all these ulIntType values above can be ORed together for using as input parameter.

Definition at line 441 of file lpc17xx_mcpwm.c.

void MCPWM_Start | ( | LPC_MCPWM_TypeDef * | MCPWMx,
 |  | uint32_t | channel0,
 |  | uint32_t | channel1,
 |  | uint32_t | channel2
 | ) |  |

Start MCPWM activity for each MCPWM channel.

Parameters:
[in] MCPWMx Motor Control PWM peripheral selected Should be: LPC_MCPWM
[in] channel0 State of this command on channel 0:
  • ENABLE: 'Start' command will effect on channel 0
  • DISABLE: 'Start' command will not effect on channel 0
[in] channel1 State of this command on channel 1:
  • ENABLE: 'Start' command will effect on channel 1
  • DISABLE: 'Start' command will not effect on channel 1
[in] channel2 State of this command on channel 2:
  • ENABLE: 'Start' command will effect on channel 2
  • DISABLE: 'Start' command will not effect on channel 2
Returns:
None

Definition at line 293 of file lpc17xx_mcpwm.c.

void MCPWM_Stop | ( | LPC_MCPWM_TypeDef * | MCPWMx,
 |  | uint32_t | channel0,
 |  | uint32_t | channel1,
 |  | uint32_t | channel2
 | ) |  |

Stop MCPWM activity for each MCPWM channel.

Parameters:
[in] MCPWMx Motor Control PWM peripheral selected Should be: LPC_MCPWM
[in] channel0 State of this command on channel 0:
  • ENABLE: 'Stop' command will effect on channel 0
  • DISABLE: 'Stop' command will not effect on channel 0
[in] channel1 State of this command on channel 1:
  • ENABLE: 'Stop' command will effect on channel 1
  • DISABLE: 'Stop' command will not effect on channel 1
[in] channel2 State of this command on channel 2:
  • ENABLE: 'Stop' command will effect on channel 2
  • DISABLE: 'Stop' command will not effect on channel 2
Returns:
None

Definition at line 318 of file lpc17xx_mcpwm.c.

void MCPWM_WriteToShadow | ( | LPC_MCPWM_TypeDef * | MCPWMx,
 |  | uint32_t | channelNum,
 |  | MCPWM_CHANNEL_CFG_Type * | channelSetup
 | ) |  |

Write to MCPWM shadow registers - Update the value for period and pulse width in MCPWM peripheral.

Parameters:
[in] | MCPWMx | Motor Control PWM peripheral selected Should be: LPC_MCPWM
[in] | channelNum | Channel Number, should be: 0..2.
[in] | channelSetup | Pointer to a MCPWM_CHANNEL_CFG_Type structure that contains the configuration information for the specified MCPWM channel.
Returns:
None

Definition at line 150 of file lpc17xx_mcpwm.c.

Generated on Tue Jun 7 14:59:35 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: NVIC

NVIC
[LPC1700CMSIS Firmware Library]

Modules

NVIC Public Functions
NVIC_Private_Macros
Generated on Tue Jun 7 14:59:35 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: NVIC Public Functions

NVIC Public Functions
[NVIC]

Functions

void | NVIC_DeInit (void)
De-initializes the NVIC peripheral registers to their default reset values.
void | NVIC_SCBDeInit (void)
De-initializes the SCB peripheral registers to their default reset values.
void | NVIC_SetVTOR (uint32_t offset)
Set Vector Table Offset value.

Function Documentation

void NVIC_DeInit ( void )

De-initializes the NVIC peripheral registers to their default reset values.

Parameters:
None
Returns:
None
These following NVIC peripheral registers will be de-initialized:
  • Disable Interrupt (32 IRQ interrupt sources that matched with LPC17xx)
  • Clear all Pending Interrupts (32 IRQ interrupt source that matched with LPC17xx)
  • Clear all Interrupt Priorities (32 IRQ interrupt source that matched with LPC17xx)

Definition at line 67 of file lpc17xx_nvic.c.

void NVIC_SCBDeInit ( void )

De-initializes the SCB peripheral registers to their default reset values.

Parameters:
none
Returns:
none
These following SCB NVIC peripheral registers will be de-initialized:
  • Interrupt Control State register
  • Interrupt Vector Table Offset register
  • Application Interrupt/Reset Control register
  • System Control register
  • Configuration Control register
  • System Handlers Priority Registers
  • System Handler Control and State Register
  • Configurable Fault Status Register
  • Hard Fault Status Register
  • Debug Fault Status Register

Definition at line 102 of file lpc17xx_nvic.c.

void NVIC_SetVTOR ( uint32_t offset )

Set Vector Table Offset value.

Parameters:
offset Offset value
Returns:
None

Definition at line 128 of file lpc17xx_nvic.c.

Generated on Tue Jun 7 14:59:35 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: NVIC_Private_Macros

NVIC_Private_Macros
[NVIC]

Defines

#define NVIC_VTOR_MASK 0x3FFFFF80

Define Documentation

#define NVIC_VTOR_MASK 0x3FFFFF80

Definition at line 43 of file lpc17xx_nvic.c.

Generated on Tue Jun 7 15:00:02 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: PINSEL

PINSEL
[LPC1700CMSIS Firmware Library]

Modules

PINSEL Public Macros
PINSEL Private Macros
PINSEL Public Types
PINSEL Public Functions
Generated on Tue Jun 7 14:59:35 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: PINSEL Public Macros

PINSEL Public Macros
[PINSEL]

Defines

#define | PINSEL_PORT_0 ((0))
#define | PINSEL_PORT_1 ((1))
#define | PINSEL_PORT_2 ((2))
#define | PINSEL_PORT_3 ((3))
#define | PINSEL_PORT_4 ((4))
#define | PINSEL_FUNC_0 ((0))
#define | PINSEL_FUNC_1 ((1))
#define | PINSEL_FUNC_2 ((2))
#define | PINSEL_FUNC_3 ((3))
#define | PINSEL_PIN_0 ((0))
#define | PINSEL_PIN_1 ((1))
#define | PINSEL_PIN_2 ((2))
#define | PINSEL_PIN_3 ((3))
#define | PINSEL_PIN_4 ((4))
#define | PINSEL_PIN_5 ((5))
#define | PINSEL_PIN_6 ((6))
#define | PINSEL_PIN_7 ((7))
#define | PINSEL_PIN_8 ((8))
#define | PINSEL_PIN_9 ((9))
#define | PINSEL_PIN_10 ((10))
#define | PINSEL_PIN_11 ((11))
#define | PINSEL_PIN_12 ((12))
#define | PINSEL_PIN_13 ((13))
#define | PINSEL_PIN_14 ((14))
#define | PINSEL_PIN_15 ((15))
#define | PINSEL_PIN_16 ((16))
#define | PINSEL_PIN_17 ((17))
#define | PINSEL_PIN_18 ((18))
#define | PINSEL_PIN_19 ((19))
#define | PINSEL_PIN_20 ((20))
#define | PINSEL_PIN_21 ((21))
#define | PINSEL_PIN_22 ((22))
#define | PINSEL_PIN_23 ((23))
#define | PINSEL_PIN_24 ((24))
#define | PINSEL_PIN_25 ((25))
#define | PINSEL_PIN_26 ((26))
#define | PINSEL_PIN_27 ((27))
#define | PINSEL_PIN_28 ((28))
#define | PINSEL_PIN_29 ((29))
#define | PINSEL_PIN_30 ((30))
#define | PINSEL_PIN_31 ((31))
#define | PINSEL_PINMODE_PULLUP ((0))
#define | PINSEL_PINMODE_TRISTATE ((2))
#define | PINSEL_PINMODE_PULLDOWN ((3))
#define | PINSEL_PINMODE_NORMAL ((0))
#define | PINSEL_PINMODE_OPENDRAIN ((1))
#define | PINSEL_I2C_Normal_Mode ((0))
#define | PINSEL_I2C_Fast_Mode ((1))

Define Documentation

#define PINSEL_FUNC_0 ((0))

default function

Definition at line 62 of file lpc17xx_pinsel.h.

#define PINSEL_FUNC_1 ((1))

first alternate function

Definition at line 63 of file lpc17xx_pinsel.h.

#define PINSEL_FUNC_2 ((2))

second alternate function

Definition at line 64 of file lpc17xx_pinsel.h.

#define PINSEL_FUNC_3 ((3))

third or reserved alternate function

Definition at line 65 of file lpc17xx_pinsel.h.

#define PINSEL_I2C_Fast_Mode ((1))

Fast Mode Plus drive mode

Definition at line 120 of file lpc17xx_pinsel.h.

#define PINSEL_I2C_Normal_Mode ((0))

The standard drive mode

Definition at line 119 of file lpc17xx_pinsel.h.

#define PINSEL_PIN_0 ((0))

Pin 0

Definition at line 70 of file lpc17xx_pinsel.h.

#define PINSEL_PIN_1 ((1))

Pin 1

Definition at line 71 of file lpc17xx_pinsel.h.

#define PINSEL_PIN_10 ((10))

Pin 10

Definition at line 80 of file lpc17xx_pinsel.h.

#define PINSEL_PIN_11 ((11))

Pin 11

Definition at line 81 of file lpc17xx_pinsel.h.

#define PINSEL_PIN_12 ((12))

Pin 12

Definition at line 82 of file lpc17xx_pinsel.h.

#define PINSEL_PIN_13 ((13))

Pin 13

Definition at line 83 of file lpc17xx_pinsel.h.

#define PINSEL_PIN_14 ((14))

Pin 14

Definition at line 84 of file lpc17xx_pinsel.h.

#define PINSEL_PIN_15 ((15))

Pin 15

Definition at line 85 of file lpc17xx_pinsel.h.

#define PINSEL_PIN_16 ((16))

Pin 16

Definition at line 86 of file lpc17xx_pinsel.h.

#define PINSEL_PIN_17 ((17))

Pin 17

Definition at line 87 of file lpc17xx_pinsel.h.

#define PINSEL_PIN_18 ((18))

Pin 18

Definition at line 88 of file lpc17xx_pinsel.h.

#define PINSEL_PIN_19 ((19))

Pin 19

Definition at line 89 of file lpc17xx_pinsel.h.

#define PINSEL_PIN_2 ((2))

Pin 2

Definition at line 72 of file lpc17xx_pinsel.h.

#define PINSEL_PIN_20 ((20))

Pin 20

Definition at line 90 of file lpc17xx_pinsel.h.

#define PINSEL_PIN_21 ((21))

Pin 21

Definition at line 91 of file lpc17xx_pinsel.h.

#define PINSEL_PIN_22 ((22))

Pin 22

Definition at line 92 of file lpc17xx_pinsel.h.

#define PINSEL_PIN_23 ((23))

Pin 23

Definition at line 93 of file lpc17xx_pinsel.h.

#define PINSEL_PIN_24 ((24))

Pin 24

Definition at line 94 of file lpc17xx_pinsel.h.

#define PINSEL_PIN_25 ((25))

Pin 25

Definition at line 95 of file lpc17xx_pinsel.h.

#define PINSEL_PIN_26 ((26))

Pin 26

Definition at line 96 of file lpc17xx_pinsel.h.

#define PINSEL_PIN_27 ((27))

Pin 27

Definition at line 97 of file lpc17xx_pinsel.h.

#define PINSEL_PIN_28 ((28))

Pin 28

Definition at line 98 of file lpc17xx_pinsel.h.

#define PINSEL_PIN_29 ((29))

Pin 29

Definition at line 99 of file lpc17xx_pinsel.h.

#define PINSEL_PIN_3 ((3))

Pin 3

Definition at line 73 of file lpc17xx_pinsel.h.

#define PINSEL_PIN_30 ((30))

Pin 30

Definition at line 100 of file lpc17xx_pinsel.h.

#define PINSEL_PIN_31 ((31))

Pin 31

Definition at line 101 of file lpc17xx_pinsel.h.

#define PINSEL_PIN_4 ((4))

Pin 4

Definition at line 74 of file lpc17xx_pinsel.h.

#define PINSEL_PIN_5 ((5))

Pin 5

Definition at line 75 of file lpc17xx_pinsel.h.

#define PINSEL_PIN_6 ((6))

Pin 6

Definition at line 76 of file lpc17xx_pinsel.h.

#define PINSEL_PIN_7 ((7))

Pin 7

Definition at line 77 of file lpc17xx_pinsel.h.

#define PINSEL_PIN_8 ((8))

Pin 8

Definition at line 78 of file lpc17xx_pinsel.h.

#define PINSEL_PIN_9 ((9))

Pin 9

Definition at line 79 of file lpc17xx_pinsel.h.

#define PINSEL_PINMODE_NORMAL ((0))

Pin is in the normal (not open drain) mode.

Definition at line 113 of file lpc17xx_pinsel.h.

#define PINSEL_PINMODE_OPENDRAIN ((1))

Pin is in the open drain mode

Definition at line 114 of file lpc17xx_pinsel.h.

#define PINSEL_PINMODE_PULLDOWN ((3))

Internal pull-down resistor

Definition at line 108 of file lpc17xx_pinsel.h.

#define PINSEL_PINMODE_PULLUP ((0))

Internal pull-up resistor

Definition at line 106 of file lpc17xx_pinsel.h.

#define PINSEL_PINMODE_TRISTATE ((2))

Tri-state

Definition at line 107 of file lpc17xx_pinsel.h.

#define PINSEL_PORT_0 ((0))

!< Macros define for PORT Selection PORT 0

Definition at line 53 of file lpc17xx_pinsel.h.

#define PINSEL_PORT_1 ((1))

PORT 1

Definition at line 54 of file lpc17xx_pinsel.h.

#define PINSEL_PORT_2 ((2))

PORT 2

Definition at line 55 of file lpc17xx_pinsel.h.

#define PINSEL_PORT_3 ((3))

PORT 3

Definition at line 56 of file lpc17xx_pinsel.h.

#define PINSEL_PORT_4 ((4))

PORT 4

Definition at line 57 of file lpc17xx_pinsel.h.

Generated on Tue Jun 7 14:59:35 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: PINSEL Private Macros

PINSEL Private Macros
[PINSEL]

Defines

#define | PINSEL_I2CPADCFG_SDADRV0 _BIT(0)
#define | PINSEL_I2CPADCFG_SDAI2C0 _BIT(1)
#define | PINSEL_I2CPADCFG_SCLDRV0 _BIT(2)
#define | PINSEL_I2CPADCFG_SCLI2C0 _BIT(3)

Define Documentation

#define PINSEL_I2CPADCFG_SCLDRV0 _BIT(2)

Drive mode control for the SCL0 pin, P0.28

Definition at line 135 of file lpc17xx_pinsel.h.

#define PINSEL_I2CPADCFG_SCLI2C0 _BIT(3)

I2C mode control for the SCL0 pin, P0.28

Definition at line 136 of file lpc17xx_pinsel.h.

#define PINSEL_I2CPADCFG_SDADRV0 _BIT(0)

Drive mode control for the SDA0 pin, P0.27

Definition at line 133 of file lpc17xx_pinsel.h.

#define PINSEL_I2CPADCFG_SDAI2C0 _BIT(1)

I2C mode control for the SDA0 pin, P0.27

Definition at line 134 of file lpc17xx_pinsel.h.

Generated on Tue Jun 7 14:59:36 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: PINSEL Public Types

PINSEL Public Types
[PINSEL]

Data Structures

struct PINSEL_CFG_Type
Pin configuration structure. More...
Generated on Tue Jun 7 14:59:36 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: PINSEL Public Functions

PINSEL Public Functions
[PINSEL]

Functions

void | PINSEL_ConfigPin (PINSEL_CFG_Type *PinCfg)
Configure Pin corresponding to specified parameters passed in the PinCfg.
void | PINSEL_ConfigTraceFunc (FunctionalState NewState)
Configure trace function.
void | PINSEL_SetI2C0Pins (uint8_t i2cPinMode, FunctionalState filterSlewRateEnable)
Setup I2C0 pins.

Function Documentation

void PINSEL_ConfigPin ( PINSEL_CFG_Type * PinCfg )

Configure Pin corresponding to specified parameters passed in the PinCfg.

Parameters:
[in] PinCfg Pointer to a PINSEL_CFG_Type structure that contains the configuration information for the specified pin.
Returns:
None

Definition at line 296 of file lpc17xx_pinsel.c.

void PINSEL_ConfigTraceFunc ( FunctionalState NewState )

Configure trace function.

Parameters:
[in] NewState State of the Trace function configuration, should be one of the following:
  • ENABLE : Enable Trace Function
  • DISABLE : Disable Trace Function
Returns:
None

Definition at line 251 of file lpc17xx_pinsel.c.

void PINSEL_SetI2C0Pins | ( | uint8_t | i2cPinMode,
 |  | FunctionalState | filterSlewRateEnable
 | ) |  |

Setup I2C0 pins.

Parameters:
[in] i2cPinMode I2C pin mode, should be one of the following:
  • PINSEL_I2C_Normal_Mode : The standard drive mode
  • PINSEL_I2C_Fast_Mode : Fast Mode Plus drive mode
[in] filterSlewRateEnable should be:
  • ENABLE: Enable filter and slew rate.
  • DISABLE: Disable filter and slew rate.
Returns:
None

Definition at line 273 of file lpc17xx_pinsel.c.

Generated on Tue Jun 7 14:59:36 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: PWM

PWM
[LPC1700CMSIS Firmware Library]

Modules

PWM Private Macros
PWM Public Types
PWM Public Functions
Generated on Tue Jun 7 14:59:36 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: PWM Private Macros

PWM Private Macros
[PWM]

Defines

#define | PWM_IR_PWMMRn(n) ((uint32_t)((n<4)?(1<<n):(1<<(n+4))))
#define | PWM_IR_PWMCAPn(n) ((uint32_t)(1<<(n+4)))
#define | PWM_IR_BITMASK ((uint32_t)(0x0000073F))
#define | PWM_TCR_BITMASK ((uint32_t)(0x0000000B))
#define | PWM_TCR_COUNTER_ENABLE ((uint32_t)(1<<0))
#define | PWM_TCR_COUNTER_RESET ((uint32_t)(1<<1))
#define | PWM_TCR_PWM_ENABLE ((uint32_t)(1<<3))
#define | PWM_CTCR_BITMASK ((uint32_t)(0x0000000F))
#define | PWM_CTCR_MODE(n) ((uint32_t)(n&0x03))
#define | PWM_CTCR_SELECT_INPUT(n) ((uint32_t)((n&0x03)<<2))
#define | PWM_MCR_BITMASK ((uint32_t)(0x001FFFFF))
#define | PWM_MCR_INT_ON_MATCH(n) ((uint32_t)(1<<(((n&0x7)<<1)+(n&0x07))))
#define | PWM_MCR_RESET_ON_MATCH(n) ((uint32_t)(1<<(((n&0x7)<<1)+(n&0x07)+1)))
#define | PWM_MCR_STOP_ON_MATCH(n) ((uint32_t)(1<<(((n&0x7)<<1)+(n&0x07)+2)))
#define | PWM_CCR_BITMASK ((uint32_t)(0x0000003F))
#define | PWM_CCR_CAP_RISING(n) ((uint32_t)(1<<(((n&0x2)<<1)+(n&0x1))))
#define | PWM_CCR_CAP_FALLING(n) ((uint32_t)(1<<(((n&0x2)<<1)+(n&0x1)+1)))
#define | PWM_CCR_INT_ON_CAP(n) ((uint32_t)(1<<(((n&0x2)<<1)+(n&0x1)+2)))
#define | PWM_PCR_BITMASK (uint32_t)0x00007E7C
#define | PWM_PCR_PWMSELn(n) ((uint32_t)(((n&0x7)<2) ? 0 : (1<<n)))
#define | PWM_PCR_PWMENAn(n) ((uint32_t)(((n&0x7)<1) ? 0 : (1<<(n+8))))
#define | PWM_LER_BITMASK ((uint32_t)(0x0000007F))
#define | PWM_LER_EN_MATCHn_LATCH(n) ((uint32_t)((n<7) ? (1<<n) : 0))
#define | PARAM_PWMx(n) (((uint32_t *)n)==((uint32_t *)LPC_PWM1))
#define | PARAM_PWM1_MATCH_CHANNEL(n) ((n>=0) && (n<=6))
#define | PARAM_PWM1_CHANNEL(n) ((n>=1) && (n<=6))
#define | PARAM_PWM1_EDGE_MODE_CHANNEL(n) ((n>=2) && (n<=6))
#define | PARAM_PWM1_CAPTURE_CHANNEL(n) ((n==0) || (n==1))
#define | PARAM_PWM_INTSTAT(n)

Define Documentation

#define PARAM_PWM1_CAPTURE_CHANNEL ( n ) ((n==0) || (n==1))

Macro check PWM1 capture channel mode

Definition at line 138 of file lpc17xx_pwm.h.

#define PARAM_PWM1_CHANNEL ( n ) ((n>=1) && (n<=6))

Macro check PWM1 channel value

Definition at line 132 of file lpc17xx_pwm.h.

#define PARAM_PWM1_EDGE_MODE_CHANNEL ( n ) ((n>=2) && (n<=6))

Macro check PWM1 edge channel mode

Definition at line 135 of file lpc17xx_pwm.h.

#define PARAM_PWM1_MATCH_CHANNEL ( n ) ((n>=0) && (n<=6))

Macro check PWM1 match channel value

Definition at line 129 of file lpc17xx_pwm.h.

#define PARAM_PWM_INTSTAT ( n )

Value:

((n==PWM_INTSTAT_MR0) || (n==PWM_INTSTAT_MR1) || (n==PWM_INTSTAT_MR2) \
|| (n==PWM_INTSTAT_MR3) || (n==PWM_INTSTAT_MR4) || (n==PWM_INTSTAT_MR5) \
|| (n==PWM_INTSTAT_MR6) || (n==PWM_INTSTAT_CAP0) || (n==PWM_INTSTAT_CAP1))
Macro check PWM1 interrupt status type

Definition at line 141 of file lpc17xx_pwm.h.

#define PARAM_PWMx ( n ) (((uint32_t *)n)==((uint32_t *)LPC_PWM1))

Macro to determine if it is valid PWM peripheral or not

Definition at line 126 of file lpc17xx_pwm.h.

#define PWM_CCR_BITMASK ((uint32_t)(0x0000003F))

CCR register mask

Definition at line 98 of file lpc17xx_pwm.h.

#define PWM_CCR_CAP_FALLING ( n ) ((uint32_t)(1<<(((n&0x2)<<1)+(n&0x1)+1)))

PCAPn is falling edge sensitive

Definition at line 102 of file lpc17xx_pwm.h.

#define PWM_CCR_CAP_RISING ( n ) ((uint32_t)(1<<(((n&0x2)<<1)+(n&0x1))))

PCAPn is rising edge sensitive

Definition at line 100 of file lpc17xx_pwm.h.

#define PWM_CCR_INT_ON_CAP ( n ) ((uint32_t)(1<<(((n&0x2)<<1)+(n&0x1)+2)))

PWM interrupt is generated on a PCAP event

Definition at line 104 of file lpc17xx_pwm.h.

#define PWM_CTCR_BITMASK ((uint32_t)(0x0000000F))

CTCR register mask

Definition at line 76 of file lpc17xx_pwm.h.

#define PWM_CTCR_MODE ( n ) ((uint32_t)(n&0x03))

PWM Counter-Timer Mode

Definition at line 78 of file lpc17xx_pwm.h.

#define PWM_CTCR_SELECT_INPUT ( n ) ((uint32_t)((n&0x03)<<2))

PWM Capture input select

Definition at line 80 of file lpc17xx_pwm.h.

#define PWM_IR_BITMASK ((uint32_t)(0x0000073F))

IR register mask

Definition at line 61 of file lpc17xx_pwm.h.

#define PWM_IR_PWMCAPn ( n ) ((uint32_t)(1<<(n+4)))

Interrupt flag for capture input

Definition at line 59 of file lpc17xx_pwm.h.

#define PWM_IR_PWMMRn ( n ) ((uint32_t)((n<4)?(1<<n):(1<<(n+4))))

Interrupt flag for PWM match channel for 6 channel

Definition at line 57 of file lpc17xx_pwm.h.

#define PWM_LER_BITMASK ((uint32_t)(0x0000007F))

LER register mask

Definition at line 120 of file lpc17xx_pwm.h.

#define PWM_LER_EN_MATCHn_LATCH ( n ) ((uint32_t)((n<7) ? (1<<n) : 0))

PWM MATCHn register update control

Definition at line 122 of file lpc17xx_pwm.h.

#define PWM_MCR_BITMASK ((uint32_t)(0x001FFFFF))

MCR register mask

Definition at line 86 of file lpc17xx_pwm.h.

#define PWM_MCR_INT_ON_MATCH ( n ) ((uint32_t)(1<<(((n&0x7)<<1)+(n&0x07))))

generate a PWM interrupt when a MATCHn occurs

Definition at line 88 of file lpc17xx_pwm.h.

#define PWM_MCR_RESET_ON_MATCH ( n ) ((uint32_t)(1<<(((n&0x7)<<1)+(n&0x07)+1)))

reset the PWM when a MATCHn occurs

Definition at line 90 of file lpc17xx_pwm.h.

#define PWM_MCR_STOP_ON_MATCH ( n ) ((uint32_t)(1<<(((n&0x7)<<1)+(n&0x07)+2)))

stop the PWM when a MATCHn occurs

Definition at line 92 of file lpc17xx_pwm.h.

#define PWM_PCR_BITMASK (uint32_t)0x00007E7C

PCR register mask

Definition at line 110 of file lpc17xx_pwm.h.

#define PWM_PCR_PWMENAn ( n ) ((uint32_t)(((n&0x7)<1) ? 0 : (1<<(n+8))))

enable PWM output n

Definition at line 114 of file lpc17xx_pwm.h.

#define PWM_PCR_PWMSELn ( n ) ((uint32_t)(((n&0x7)<2) ? 0 : (1<<n)))

PWM output n is a single edge controlled output

Definition at line 112 of file lpc17xx_pwm.h.

#define PWM_TCR_BITMASK ((uint32_t)(0x0000000B))

TCR register mask

Definition at line 67 of file lpc17xx_pwm.h.

#define PWM_TCR_COUNTER_ENABLE ((uint32_t)(1<<0))

PWM Counter Enable

Definition at line 68 of file lpc17xx_pwm.h.

#define PWM_TCR_COUNTER_RESET ((uint32_t)(1<<1))

PWM Counter Reset

Definition at line 69 of file lpc17xx_pwm.h.

#define PWM_TCR_PWM_ENABLE ((uint32_t)(1<<3))

PWM Enable

Definition at line 70 of file lpc17xx_pwm.h.

Generated on Tue Jun 7 14:59:36 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: PWM Public Types

PWM Public Types
[PWM]

Data Structures

struct | PWM_TIMERCFG_Type
Configuration structure in PWM TIMER mode. More...
struct | PWM_COUNTERCFG_Type
Configuration structure in PWM COUNTER mode. More...
struct | PWM_MATCHCFG_Type
PWM Match channel configuration structure. More...
struct | PWM_CAPTURECFG_Type
PWM Capture Input configuration structure. More...
struct | PWM_Match_T
Match update structure. More...

Defines

#define | PARAM_PWM_TC_MODE(n) ((n==PWM_MODE_TIMER) || (n==PWM_MODE_COUNTER))
#define | PARAM_PWM_TIMER_PRESCALE(n) ((n==PWM_TIMER_PRESCALE_TICKVAL) || (n==PWM_TIMER_PRESCALE_USVAL))
#define | PARAM_PWM_COUNTER_INPUTSEL(n) ((n==PWM_COUNTER_PCAP1_0) || (n==PWM_COUNTER_PCAP1_1))
#define | PARAM_PWM_COUNTER_EDGE(n)
#define | PARAM_PWM_CHANNEL_EDGE(n) ((n==PWM_CHANNEL_SINGLE_EDGE) || (n==PWM_CHANNEL_DUAL_EDGE))
#define | PARAM_PWM_MATCH_UPDATE(n) ((n==PWM_MATCH_UPDATE_NOW) || (n==PWM_MATCH_UPDATE_NEXT_RST))

Enumerations

enum | PWM_TC_MODE_OPT { PWM_MODE_TIMER = 0, PWM_MODE_COUNTER }
PMW TC mode select option. More...
enum | PWM_TIMER_PRESCALE_OPT { PWM_TIMER_PRESCALE_TICKVAL = 0, PWM_TIMER_PRESCALE_USVAL }
PWM Timer/Counter prescale option. More...
enum | PWM_COUNTER_INPUTSEL_OPT { PWM_COUNTER_PCAP1_0 = 0, PWM_COUNTER_PCAP1_1 }
PWM Input Select in counter mode. More...
enum | PWM_COUNTER_EDGE_OPT { PWM_COUNTER_RISING = 1, PWM_COUNTER_FALLING = 2, PWM_COUNTER_ANY = 3 }
PWM Input Edge Option in counter mode. More...
enum | PWM_CHANNEL_EDGE_OPT { PWM_CHANNEL_SINGLE_EDGE, PWM_CHANNEL_DUAL_EDGE }
PWM operating mode options. More...
enum | PWM_MATCH_UPDATE_OPT { PWM_MATCH_UPDATE_NOW = 0, PWM_MATCH_UPDATE_NEXT_RST }
PWM update type. More...
enum PWM_INTSTAT_TYPE {
PWM_INTSTAT_MR0 = PWM_IR_PWMMRn(0), PWM_INTSTAT_MR1 = PWM_IR_PWMMRn(1), PWM_INTSTAT_MR2 = PWM_IR_PWMMRn(2), PWM_INTSTAT_MR3 = PWM_IR_PWMMRn(3),
PWM_INTSTAT_CAP0 = PWM_IR_PWMCAPn(0), PWM_INTSTAT_CAP1 = PWM_IR_PWMCAPn(1), PWM_INTSTAT_MR4 = PWM_IR_PWMMRn(4), PWM_INTSTAT_MR6 = PWM_IR_PWMMRn(5),
PWM_INTSTAT_MR5 = PWM_IR_PWMMRn(6)
}
PWM interrupt status type definition -----------------------------------------------------. More...

Define Documentation

#define PARAM_PWM_CHANNEL_EDGE ( n ) ((n==PWM_CHANNEL_SINGLE_EDGE) || (n==PWM_CHANNEL_DUAL_EDGE))

Definition at line 266 of file lpc17xx_pwm.h.

#define PARAM_PWM_COUNTER_EDGE ( n )

Value:

((n==PWM_COUNTER_RISING) || (n==PWM_COUNTER_FALLING) \
|| (n==PWM_COUNTER_ANY))

Definition at line 255 of file lpc17xx_pwm.h.

#define PARAM_PWM_COUNTER_INPUTSEL ( n ) ((n==PWM_COUNTER_PCAP1_0) || (n==PWM_COUNTER_PCAP1_1))

Definition at line 246 of file lpc17xx_pwm.h.

#define PARAM_PWM_MATCH_UPDATE ( n ) ((n==PWM_MATCH_UPDATE_NOW) || (n==PWM_MATCH_UPDATE_NEXT_RST))

Definition at line 276 of file lpc17xx_pwm.h.

#define PARAM_PWM_TC_MODE ( n ) ((n==PWM_MODE_TIMER) || (n==PWM_MODE_COUNTER))

Definition at line 227 of file lpc17xx_pwm.h.

#define PARAM_PWM_TIMER_PRESCALE ( n ) ((n==PWM_TIMER_PRESCALE_TICKVAL) || (n==PWM_TIMER_PRESCALE_USVAL))

Definition at line 237 of file lpc17xx_pwm.h.

Enumeration Type Documentation

enum PWM_CHANNEL_EDGE_OPT

PWM operating mode options.

Enumerator:
PWM_CHANNEL_SINGLE_EDGE | PWM Channel Single edge mode
PWM_CHANNEL_DUAL_EDGE | PWM Channel Dual edge mode

Definition at line 261 of file lpc17xx_pwm.h.

enum PWM_COUNTER_EDGE_OPT

PWM Input Edge Option in counter mode.

Enumerator:
PWM_COUNTER_RISING | Rising edge mode
PWM_COUNTER_FALLING | Falling edge mode
PWM_COUNTER_ANY | Both rising and falling mode

Definition at line 249 of file lpc17xx_pwm.h.

enum PWM_COUNTER_INPUTSEL_OPT

PWM Input Select in counter mode.

Enumerator:
PWM_COUNTER_PCAP1_0 | PWM Counter input selected is PCAP1.0 pin
PWM_COUNTER_PCAP1_1 | PWM counter input selected is CAP1.1 pin

Definition at line 241 of file lpc17xx_pwm.h.

enum PWM_INTSTAT_TYPE

PWM interrupt status type definition -----------------------------------------------------.

PWM Interrupt status type

Enumerator:
PWM_INTSTAT_MR0 | Interrupt flag for PWM match channel 0
PWM_INTSTAT_MR1 | Interrupt flag for PWM match channel 1
PWM_INTSTAT_MR2 | Interrupt flag for PWM match channel 2
PWM_INTSTAT_MR3 | Interrupt flag for PWM match channel 3
PWM_INTSTAT_CAP0 | Interrupt flag for capture input 0
PWM_INTSTAT_CAP1 | Interrupt flag for capture input 1
PWM_INTSTAT_MR4 | Interrupt flag for PWM match channel 4
PWM_INTSTAT_MR6 | Interrupt flag for PWM match channel 5
PWM_INTSTAT_MR5 | Interrupt flag for PWM match channel 6

Definition at line 281 of file lpc17xx_pwm.h.

enum PWM_MATCH_UPDATE_OPT

PWM update type.

Enumerator:
PWM_MATCH_UPDATE_NOW | PWM Match Channel Update Now
PWM_MATCH_UPDATE_NEXT_RST | PWM Match Channel Update on next PWM Counter resetting

Definition at line 270 of file lpc17xx_pwm.h.

enum PWM_TC_MODE_OPT

PMW TC mode select option.

Enumerator:
PWM_MODE_TIMER | PWM using Timer mode
PWM_MODE_COUNTER | PWM using Counter mode

Definition at line 222 of file lpc17xx_pwm.h.

enum PWM_TIMER_PRESCALE_OPT

PWM Timer/Counter prescale option.

Enumerator:
PWM_TIMER_PRESCALE_TICKVAL | Prescale in absolute value
PWM_TIMER_PRESCALE_USVAL | Prescale in microsecond value

Definition at line 231 of file lpc17xx_pwm.h.

Generated on Tue Jun 7 14:59:36 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: PWM Public Functions

PWM Public Functions
[PWM]

Functions

void | PWM_PinConfig (LPC_PWM_TypeDef *PWMx, uint8_t PWM_Channel, uint8_t PinselOption)
IntStatus | PWM_GetIntStatus (LPC_PWM_TypeDef *PWMx, uint32_t IntFlag)
Check whether specified interrupt flag in PWM is set or not.
void | PWM_ClearIntPending (LPC_PWM_TypeDef *PWMx, uint32_t IntFlag)
Clear specified PWM Interrupt pending.
void | PWM_ConfigStructInit (uint8_t PWMTimerCounterMode, void *PWM_InitStruct)
Fills each PWM_InitStruct member with its default value:
  • If PWMCounterMode = PWM_MODE_TIMER: + PrescaleOption = PWM_TIMER_PRESCALE_USVAL + PrescaleValue = 1
  • If PWMCounterMode = PWM_MODE_COUNTER: + CountInputSelect = PWM_COUNTER_PCAP1_0 + CounterOption = PWM_COUNTER_RISING.

void | PWM_Init (LPC_PWM_TypeDef *PWMx, uint32_t PWMTimerCounterMode, void *PWM_ConfigStruct)
Initializes the PWMx peripheral corresponding to the specified parameters in the PWM_ConfigStruct.
void | PWM_DeInit (LPC_PWM_TypeDef *PWMx)
De-initializes the PWM peripheral registers to their default reset values.
void | PWM_Cmd (LPC_PWM_TypeDef *PWMx, FunctionalState NewState)
Enable/Disable PWM peripheral.
void | PWM_CounterCmd (LPC_PWM_TypeDef *PWMx, FunctionalState NewState)
Enable/Disable Counter in PWM peripheral.
void | PWM_ResetCounter (LPC_PWM_TypeDef *PWMx)
Reset Counter in PWM peripheral.
void | PWM_ConfigMatch (LPC_PWM_TypeDef *PWMx, PWM_MATCHCFG_Type *PWM_MatchConfigStruct)
Configures match for PWM peripheral.
void | PWM_ConfigCapture (LPC_PWM_TypeDef *PWMx, PWM_CAPTURECFG_Type *PWM_CaptureConfigStruct)
Configures capture input for PWM peripheral.
uint32_t | PWM_GetCaptureValue (LPC_PWM_TypeDef *PWMx, uint8_t CaptureChannel)
Read value of capture register PWM peripheral.
void | PWM_MatchUpdate (LPC_PWM_TypeDef *PWMx, uint8_t MatchChannel, uint32_t MatchValue, uint8_t UpdateType)
Update value for each PWM channel with update type option.
void | PWM_ChannelConfig (LPC_PWM_TypeDef *PWMx, uint8_t PWMChannel, uint8_t ModeOption)
Configure Edge mode for each PWM channel.
void | PWM_ChannelCmd (LPC_PWM_TypeDef *PWMx, uint8_t PWMChannel, FunctionalState NewState)
Enable/Disable PWM channel output.
void | PWM_MultiMatchUpdate (LPC_PWM_TypeDef *PWMx, PWM_Match_T *MatchStruct, uint8_t UpdateType)
Update value for multi PWM channel with update type option at the same time.

Function Documentation

void PWM_ChannelCmd | ( | LPC_PWM_TypeDef * | PWMx,
 |  | uint8_t | PWMChannel,
 |  | FunctionalState | NewState
 | ) |  |

Enable/Disable PWM channel output.

Parameters:
[in] | PWMx | PWM peripheral selected, should be LPC_PWM1
[in] | PWMChannel | PWM channel, should be in range from 1 to 6
[in] NewState New State of this function, should be:
  • ENABLE: Enable this PWM channel output
  • DISABLE: Disable this PWM channel output
Returns:
None

Definition at line 557 of file lpc17xx_pwm.c.

void PWM_ChannelConfig | ( | LPC_PWM_TypeDef * | PWMx,
 |  | uint8_t | PWMChannel,
 |  | uint8_t | ModeOption
 | ) |  |

Configure Edge mode for each PWM channel.

Parameters:
[in] | PWMx | PWM peripheral selected, should be LPC_PWM1
[in] | PWMChannel | PWM channel, should be in range from 2 to 6
[in] ModeOption PWM mode option, should be:
  • PWM_CHANNEL_SINGLE_EDGE: Single Edge mode
  • PWM_CHANNEL_DUAL_EDGE: Dual Edge mode
Returns:
None Note: PWM Channel 1 can not be selected for mode option

Definition at line 528 of file lpc17xx_pwm.c.

void PWM_ClearIntPending | ( | LPC_PWM_TypeDef * | PWMx,
 |  | uint32_t | IntFlag
 | ) |  |

Clear specified PWM Interrupt pending.

Parameters:
[in] PWMx,: PWM peripheral, should be LPC_PWM1
[in] IntFlag,: PWM interrupt flag, should be:
  • PWM_INTSTAT_MR0: Interrupt flag for PWM match channel 0
  • PWM_INTSTAT_MR1: Interrupt flag for PWM match channel 1
  • PWM_INTSTAT_MR2: Interrupt flag for PWM match channel 2
  • PWM_INTSTAT_MR3: Interrupt flag for PWM match channel 3
  • PWM_INTSTAT_MR4: Interrupt flag for PWM match channel 4
  • PWM_INTSTAT_MR5: Interrupt flag for PWM match channel 5
  • PWM_INTSTAT_MR6: Interrupt flag for PWM match channel 6
  • PWM_INTSTAT_CAP0: Interrupt flag for capture input 0
  • PWM_INTSTAT_CAP1: Interrupt flag for capture input 1
Returns:
None

Definition at line 95 of file lpc17xx_pwm.c.

void PWM_Cmd | ( | LPC_PWM_TypeDef * | PWMx,
 |  | FunctionalState | NewState
 | ) |  |

Enable/Disable PWM peripheral.

Parameters:
[in] PWMx PWM peripheral selected, should be LPC_PWM1
[in] NewState New State of this function, should be:
  • ENABLE: Enable PWM peripheral
  • DISABLE: Disable PWM peripheral
Returns:
None

Definition at line 236 of file lpc17xx_pwm.c.

void PWM_ConfigCapture | ( | LPC_PWM_TypeDef * | PWMx,
 |  | PWM_CAPTURECFG_Type * | PWM_CaptureConfigStruct
 | ) |  |

Configures capture input for PWM peripheral.

Parameters:
[in] | PWMx | PWM peripheral selected, should be LPC_PWM1
[in] | PWM_CaptureConfigStruct | Pointer to a PWM_CAPTURECFG_Type structure that contains the configuration information for the specified PWM capture input function.
Returns:
None

Definition at line 347 of file lpc17xx_pwm.c.

void PWM_ConfigMatch | ( | LPC_PWM_TypeDef * | PWMx,
 |  | PWM_MATCHCFG_Type * | PWM_MatchConfigStruct
 | ) |  |

Configures match for PWM peripheral.

Parameters:
[in] | PWMx | PWM peripheral selected, should be LPC_PWM1
[in] | PWM_MatchConfigStruct | Pointer to a PWM_MATCHCFG_Type structure that contains the configuration information for the specified PWM match function.
Returns:
None

Definition at line 296 of file lpc17xx_pwm.c.

void PWM_ConfigStructInit | ( | uint8_t | PWMTimerCounterMode,
 |  | void * | PWM_InitStruct
 | ) |  |

Fills each PWM_InitStruct member with its default value:

  • If PWMCounterMode = PWM_MODE_TIMER: + PrescaleOption = PWM_TIMER_PRESCALE_USVAL + PrescaleValue = 1
  • If PWMCounterMode = PWM_MODE_COUNTER: + CountInputSelect = PWM_COUNTER_PCAP1_0 + CounterOption = PWM_COUNTER_RISING.

Parameters:
[in] PWMTimerCounterMode Timer or Counter mode, should be:
  • PWM_MODE_TIMER: Counter of PWM peripheral is in Timer mode
  • PWM_MODE_COUNTER: Counter of PWM peripheral is in Counter mode
[in] PWM_InitStruct Pointer to structure (PWM_TIMERCFG_Type or PWM_COUNTERCFG_Type) which will be initialized.
Returns:
None Note: PWM_InitStruct pointer will be assigned to corresponding structure (PWM_TIMERCFG_Type or PWM_COUNTERCFG_Type) due to PWMTimerCounterMode.

Definition at line 121 of file lpc17xx_pwm.c.

void PWM_CounterCmd | ( | LPC_PWM_TypeDef * | PWMx,
 |  | FunctionalState | NewState
 | ) |  |

Enable/Disable Counter in PWM peripheral.

Parameters:
[in] PWMx PWM peripheral selected, should be LPC_PWM1
[in] NewState New State of this function, should be:
  • ENABLE: Enable Counter in PWM peripheral
  • DISABLE: Disable Counter in PWM peripheral
Returns:
None

Definition at line 260 of file lpc17xx_pwm.c.

void PWM_DeInit ( LPC_PWM_TypeDef * PWMx )

De-initializes the PWM peripheral registers to their default reset values.

Parameters:
[in] PWMx PWM peripheral selected, should be LPC_PWM1
Returns:
None

Definition at line 217 of file lpc17xx_pwm.c.

uint32_t PWM_GetCaptureValue | ( | LPC_PWM_TypeDef * | PWMx,
 |  | uint8_t | CaptureChannel
 | ) |  |

Read value of capture register PWM peripheral.

Parameters:
[in] PWMx PWM peripheral selected, should be LPC_PWM1
[in] CaptureChannel,: capture channel number, should be in range 0 to 1
Returns:
Value of capture register

Definition at line 394 of file lpc17xx_pwm.c.

IntStatus PWM_GetIntStatus | ( | LPC_PWM_TypeDef * | PWMx,
 |  | uint32_t | IntFlag
 | ) |  |

Check whether specified interrupt flag in PWM is set or not.

Parameters:
[in] PWMx,: PWM peripheral, should be LPC_PWM1
[in] IntFlag,: PWM interrupt flag, should be:
  • PWM_INTSTAT_MR0: Interrupt flag for PWM match channel 0
  • PWM_INTSTAT_MR1: Interrupt flag for PWM match channel 1
  • PWM_INTSTAT_MR2: Interrupt flag for PWM match channel 2
  • PWM_INTSTAT_MR3: Interrupt flag for PWM match channel 3
  • PWM_INTSTAT_MR4: Interrupt flag for PWM match channel 4
  • PWM_INTSTAT_MR5: Interrupt flag for PWM match channel 5
  • PWM_INTSTAT_MR6: Interrupt flag for PWM match channel 6
  • PWM_INTSTAT_CAP0: Interrupt flag for capture input 0
  • PWM_INTSTAT_CAP1: Interrupt flag for capture input 1
Returns:
New State of PWM interrupt flag (SET or RESET)

Definition at line 70 of file lpc17xx_pwm.c.

void PWM_Init | ( | LPC_PWM_TypeDef * | PWMx,
 |  | uint32_t | PWMTimerCounterMode,
 |  | void * | PWM_ConfigStruct
 | ) |  |

Initializes the PWMx peripheral corresponding to the specified parameters in the PWM_ConfigStruct.

Parameters:
[in] | PWMx | PWM peripheral, should be LPC_PWM1
[in] PWMTimerCounterMode Timer or Counter mode, should be:
  • PWM_MODE_TIMER: Counter of PWM peripheral is in Timer mode
  • PWM_MODE_COUNTER: Counter of PWM peripheral is in Counter mode
[in] | PWM_ConfigStruct | Pointer to structure (PWM_TIMERCFG_Type or PWM_COUNTERCFG_Type) which will be initialized.
Returns:
None Note: PWM_ConfigStruct pointer will be assigned to corresponding structure (PWM_TIMERCFG_Type or PWM_COUNTERCFG_Type) due to PWMTimerCounterMode.

Definition at line 156 of file lpc17xx_pwm.c.

void PWM_MatchUpdate | ( | LPC_PWM_TypeDef * | PWMx,
 |  | uint8_t | MatchChannel,
 |  | uint32_t | MatchValue,
 |  | uint8_t | UpdateType
 | ) |  |

Update value for each PWM channel with update type option.

Parameters:
[in] | PWMx | PWM peripheral selected, should be LPC_PWM1
[in] | MatchChannel | Match channel
[in] | MatchValue | Match value
[in] UpdateType Type of Update, should be:
  • PWM_MATCH_UPDATE_NOW: The update value will be updated for this channel immediately
  • PWM_MATCH_UPDATE_NEXT_RST: The update value will be updated for this channel on next reset by a PWM Match event.
Returns:
None

Definition at line 425 of file lpc17xx_pwm.c.

void PWM_MultiMatchUpdate | ( | LPC_PWM_TypeDef * | PWMx,
 |  | PWM_Match_T * | MatchStruct,
 |  | uint8_t | UpdateType
 | ) |  |

Update value for multi PWM channel with update type option at the same time.

Parameters:
[in] | PWMx | PWM peripheral selected, should be LPC_PWM1
[in] | MatchStruct | Structure that contents match value of 7 pwm channels
[in] UpdateType Type of Update, should be:
  • PWM_MATCH_UPDATE_NOW: The update value will be updated for this channel immediately
  • PWM_MATCH_UPDATE_NEXT_RST: The update value will be updated for this channel on next reset by a PWM Match event.
Returns:
None

Definition at line 486 of file lpc17xx_pwm.c.

void PWM_PinConfig | ( | LPC_PWM_TypeDef * | PWMx,
 |  | uint8_t | PWM_Channel,
 |  | uint8_t | PinselOption
 | ) |  |

void PWM_ResetCounter ( LPC_PWM_TypeDef * PWMx )

Reset Counter in PWM peripheral.

Parameters:
[in] PWMx PWM peripheral selected, should be LPC_PWM1
Returns:
None

Definition at line 280 of file lpc17xx_pwm.c.

Generated on Tue Jun 7 14:59:36 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: QEI

QEI
[LPC1700CMSIS Firmware Library]

Modules

QEI Public Macros
QEI Private Macros
QEI Public Types
QEI Public Functions
QEI Private Types
Generated on Tue Jun 7 14:59:36 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: QEI Public Macros

QEI Public Macros
[QEI]

Defines

#define | QEI_RESET_POS QEI_CON_RESP
#define | QEI_RESET_POSOnIDX QEI_CON_RESPI
#define | QEI_RESET_VEL QEI_CON_RESV
#define | QEI_RESET_IDX QEI_CON_RESI
#define | QEI_DIRINV_NONE ((uint32_t)(0))
#define | QEI_DIRINV_CMPL ((uint32_t)(1))
#define | QEI_SIGNALMODE_QUAD ((uint32_t)(0))
#define | QEI_SIGNALMODE_CLKDIR ((uint32_t)(1))
#define | QEI_CAPMODE_2X ((uint32_t)(0))
#define | QEI_CAPMODE_4X ((uint32_t)(1))
#define | QEI_INVINX_NONE ((uint32_t)(0))
#define | QEI_INVINX_EN ((uint32_t)(1))
#define | QEI_TIMERRELOAD_TICKVAL ((uint8_t)(0))
#define | QEI_TIMERRELOAD_USVAL ((uint8_t)(1))
#define | QEI_STATUS_DIR ((uint32_t)(1<<0))
#define | QEI_COMPPOS_CH_0 ((uint8_t)(0))
#define | QEI_COMPPOS_CH_1 ((uint8_t)(1))
#define | QEI_COMPPOS_CH_2 ((uint8_t)(2))
#define | QEI_INTFLAG_INX_Int ((uint32_t)(1<<0))
#define | QEI_INTFLAG_TIM_Int ((uint32_t)(1<<1))
#define | QEI_INTFLAG_VELC_Int ((uint32_t)(1<<2))
#define | QEI_INTFLAG_DIR_Int ((uint32_t)(1<<3))
#define | QEI_INTFLAG_ERR_Int ((uint32_t)(1<<4))
#define | QEI_INTFLAG_ENCLK_Int ((uint32_t)(1<<5))
#define | QEI_INTFLAG_POS0_Int ((uint32_t)(1<<6))
#define | QEI_INTFLAG_POS1_Int ((uint32_t)(1<<7))
#define | QEI_INTFLAG_POS2_Int ((uint32_t)(1<<8))
#define | QEI_INTFLAG_REV_Int ((uint32_t)(1<<9))
#define | QEI_INTFLAG_POS0REV_Int ((uint32_t)(1<<10))
#define | QEI_INTFLAG_POS1REV_Int ((uint32_t)(1<<11))
#define | QEI_INTFLAG_POS2REV_Int ((uint32_t)(1<<12))

Define Documentation

#define QEI_CAPMODE_2X ((uint32_t)(0))

Capture mode: Only Phase-A edges are counted (2X)

Definition at line 66 of file lpc17xx_qei.h.

#define QEI_CAPMODE_4X ((uint32_t)(1))

Capture mode: BOTH PhA and PhB edges are counted (4X)

Definition at line 67 of file lpc17xx_qei.h.

#define QEI_COMPPOS_CH_0 ((uint8_t)(0))

QEI compare position channel 0

Definition at line 81 of file lpc17xx_qei.h.

#define QEI_COMPPOS_CH_1 ((uint8_t)(1))

QEI compare position channel 1

Definition at line 82 of file lpc17xx_qei.h.

#define QEI_COMPPOS_CH_2 ((uint8_t)(2))

QEI compare position channel 2

Definition at line 83 of file lpc17xx_qei.h.

#define QEI_DIRINV_CMPL ((uint32_t)(1))

Direction is complemented

Definition at line 59 of file lpc17xx_qei.h.

#define QEI_DIRINV_NONE ((uint32_t)(0))

Direction is not inverted

Definition at line 58 of file lpc17xx_qei.h.

#define QEI_INTFLAG_DIR_Int ((uint32_t)(1<<3))

Change of direction interrupt

Definition at line 89 of file lpc17xx_qei.h.

#define QEI_INTFLAG_ENCLK_Int ((uint32_t)(1<<5))

An encoder clock pulse was detected interrupt

Definition at line 91 of file lpc17xx_qei.h.

#define QEI_INTFLAG_ERR_Int ((uint32_t)(1<<4))

An encoder phase error interrupt

Definition at line 90 of file lpc17xx_qei.h.

#define QEI_INTFLAG_INX_Int ((uint32_t)(1<<0))

index pulse was detected interrupt

Definition at line 86 of file lpc17xx_qei.h.

#define QEI_INTFLAG_POS0_Int ((uint32_t)(1<<6))

position 0 compare value is equal to the current position interrupt

Definition at line 92 of file lpc17xx_qei.h.

#define QEI_INTFLAG_POS0REV_Int ((uint32_t)(1<<10))

Combined position 0 and revolution count interrupt

Definition at line 100 of file lpc17xx_qei.h.

#define QEI_INTFLAG_POS1_Int ((uint32_t)(1<<7))

position 1 compare value is equal to the current position interrupt

Definition at line 94 of file lpc17xx_qei.h.

#define QEI_INTFLAG_POS1REV_Int ((uint32_t)(1<<11))

Combined position 1 and revolution count interrupt

Definition at line 101 of file lpc17xx_qei.h.

#define QEI_INTFLAG_POS2_Int ((uint32_t)(1<<8))

position 2 compare value is equal to the current position interrupt

Definition at line 96 of file lpc17xx_qei.h.

#define QEI_INTFLAG_POS2REV_Int ((uint32_t)(1<<12))

Combined position 2 and revolution count interrupt

Definition at line 102 of file lpc17xx_qei.h.

#define QEI_INTFLAG_REV_Int ((uint32_t)(1<<9))

Index compare value is equal to the current index count interrupt

Definition at line 98 of file lpc17xx_qei.h.

#define QEI_INTFLAG_TIM_Int ((uint32_t)(1<<1))

Velocity timer over flow interrupt

Definition at line 87 of file lpc17xx_qei.h.

#define QEI_INTFLAG_VELC_Int ((uint32_t)(1<<2))

Capture velocity is less than compare interrupt

Definition at line 88 of file lpc17xx_qei.h.

#define QEI_INVINX_EN ((uint32_t)(1))

Invert Index signal option: Enable

Definition at line 71 of file lpc17xx_qei.h.

#define QEI_INVINX_NONE ((uint32_t)(0))

Invert Index signal option: None

Definition at line 70 of file lpc17xx_qei.h.

#define QEI_RESET_IDX QEI_CON_RESI

Reset Index Counter

Definition at line 55 of file lpc17xx_qei.h.

#define QEI_RESET_POS QEI_CON_RESP

Reset position counter

Definition at line 52 of file lpc17xx_qei.h.

#define QEI_RESET_POSOnIDX QEI_CON_RESPI

Reset Posistion Counter on Index

Definition at line 53 of file lpc17xx_qei.h.

#define QEI_RESET_VEL QEI_CON_RESV

Reset Velocity

Definition at line 54 of file lpc17xx_qei.h.

#define QEI_SIGNALMODE_CLKDIR ((uint32_t)(1))

Signal operation: Clock/Direction mode

Definition at line 63 of file lpc17xx_qei.h.

#define QEI_SIGNALMODE_QUAD ((uint32_t)(0))

Signal operation: Quadrature phase mode

Definition at line 62 of file lpc17xx_qei.h.

#define QEI_STATUS_DIR ((uint32_t)(1<<0))

Direction status

Definition at line 78 of file lpc17xx_qei.h.

#define QEI_TIMERRELOAD_TICKVAL ((uint8_t)(0))

Reload value in absolute value

Definition at line 74 of file lpc17xx_qei.h.

#define QEI_TIMERRELOAD_USVAL ((uint8_t)(1))

Reload value in microsecond value

Definition at line 75 of file lpc17xx_qei.h.

Generated on Tue Jun 7 14:59:36 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: QEI Private Macros

QEI Private Macros
[QEI]

Defines

#define | QEI_CON_RESP ((uint32_t)(1<<0))
#define | QEI_CON_RESPI ((uint32_t)(1<<1))
#define | QEI_CON_RESV ((uint32_t)(1<<2))
#define | QEI_CON_RESI ((uint32_t)(1<<3))
#define | QEI_CON_BITMASK ((uint32_t)(0x0F))
#define | QEI_CONF_DIRINV ((uint32_t)(1<<0))
#define | QEI_CONF_SIGMODE ((uint32_t)(1<<1))
#define | QEI_CONF_CAPMODE ((uint32_t)(1<<2))
#define | QEI_CONF_INVINX ((uint32_t)(1<<3))
#define | QEI_CONF_BITMASK ((uint32_t)(0x0F))
#define | QEI_STAT_DIR ((uint32_t)(1<<0))
#define | QEI_STAT_BITMASK ((uint32_t)(1<<0))
#define | QEI_INTSTAT_INX_Int ((uint32_t)(1<<0))
#define | QEI_INTSTAT_TIM_Int ((uint32_t)(1<<1))
#define | QEI_INTSTAT_VELC_Int ((uint32_t)(1<<2))
#define | QEI_INTSTAT_DIR_Int ((uint32_t)(1<<3))
#define | QEI_INTSTAT_ERR_Int ((uint32_t)(1<<4))
#define | QEI_INTSTAT_ENCLK_Int ((uint32_t)(1<<5))
#define | QEI_INTSTAT_POS0_Int ((uint32_t)(1<<6))
#define | QEI_INTSTAT_POS1_Int ((uint32_t)(1<<7))
#define | QEI_INTSTAT_POS2_Int ((uint32_t)(1<<8))
#define | QEI_INTSTAT_REV_Int ((uint32_t)(1<<9))
#define | QEI_INTSTAT_POS0REV_Int ((uint32_t)(1<<10))
#define | QEI_INTSTAT_POS1REV_Int ((uint32_t)(1<<11))
#define | QEI_INTSTAT_POS2REV_Int ((uint32_t)(1<<12))
#define | QEI_INTSTAT_BITMASK ((uint32_t)(0x1FFF))
#define | QEI_INTSET_INX_Int ((uint32_t)(1<<0))
#define | QEI_INTSET_TIM_Int ((uint32_t)(1<<1))
#define | QEI_INTSET_VELC_Int ((uint32_t)(1<<2))
#define | QEI_INTSET_DIR_Int ((uint32_t)(1<<3))
#define | QEI_INTSET_ERR_Int ((uint32_t)(1<<4))
#define | QEI_INTSET_ENCLK_Int ((uint32_t)(1<<5))
#define | QEI_INTSET_POS0_Int ((uint32_t)(1<<6))
#define | QEI_INTSET_POS1_Int ((uint32_t)(1<<7))
#define | QEI_INTSET_POS2_Int ((uint32_t)(1<<8))
#define | QEI_INTSET_REV_Int ((uint32_t)(1<<9))
#define | QEI_INTSET_POS0REV_Int ((uint32_t)(1<<10))
#define | QEI_INTSET_POS1REV_Int ((uint32_t)(1<<11))
#define | QEI_INTSET_POS2REV_Int ((uint32_t)(1<<12))
#define | QEI_INTSET_BITMASK ((uint32_t)(0x1FFF))
#define | QEI_INTCLR_INX_Int ((uint32_t)(1<<0))
#define | QEI_INTCLR_TIM_Int ((uint32_t)(1<<1))
#define | QEI_INTCLR_VELC_Int ((uint32_t)(1<<2))
#define | QEI_INTCLR_DIR_Int ((uint32_t)(1<<3))
#define | QEI_INTCLR_ERR_Int ((uint32_t)(1<<4))
#define | QEI_INTCLR_ENCLK_Int ((uint32_t)(1<<5))
#define | QEI_INTCLR_POS0_Int ((uint32_t)(1<<6))
#define | QEI_INTCLR_POS1_Int ((uint32_t)(1<<7))
#define | QEI_INTCLR_POS2_Int ((uint32_t)(1<<8))
#define | QEI_INTCLR_REV_Int ((uint32_t)(1<<9))
#define | QEI_INTCLR_POS0REV_Int ((uint32_t)(1<<10))
#define | QEI_INTCLR_POS1REV_Int ((uint32_t)(1<<11))
#define | QEI_INTCLR_POS2REV_Int ((uint32_t)(1<<12))
#define | QEI_INTCLR_BITMASK ((uint32_t)(0x1FFF))
#define | QEI_INTEN_INX_Int ((uint32_t)(1<<0))
#define | QEI_INTEN_TIM_Int ((uint32_t)(1<<1))
#define | QEI_INTEN_VELC_Int ((uint32_t)(1<<2))
#define | QEI_INTEN_DIR_Int ((uint32_t)(1<<3))
#define | QEI_INTEN_ERR_Int ((uint32_t)(1<<4))
#define | QEI_INTEN_ENCLK_Int ((uint32_t)(1<<5))
#define | QEI_INTEN_POS0_Int ((uint32_t)(1<<6))
#define | QEI_INTEN_POS1_Int ((uint32_t)(1<<7))
#define | QEI_INTEN_POS2_Int ((uint32_t)(1<<8))
#define | QEI_INTEN_REV_Int ((uint32_t)(1<<9))
#define | QEI_INTEN_POS0REV_Int ((uint32_t)(1<<10))
#define | QEI_INTEN_POS1REV_Int ((uint32_t)(1<<11))
#define | QEI_INTEN_POS2REV_Int ((uint32_t)(1<<12))
#define | QEI_INTEN_BITMASK ((uint32_t)(0x1FFF))
#define | QEI_IESET_INX_Int ((uint32_t)(1<<0))
#define | QEI_IESET_TIM_Int ((uint32_t)(1<<1))
#define | QEI_IESET_VELC_Int ((uint32_t)(1<<2))
#define | QEI_IESET_DIR_Int ((uint32_t)(1<<3))
#define | QEI_IESET_ERR_Int ((uint32_t)(1<<4))
#define | QEI_IESET_ENCLK_Int ((uint32_t)(1<<5))
#define | QEI_IESET_POS0_Int ((uint32_t)(1<<6))
#define | QEI_IESET_POS1_Int ((uint32_t)(1<<7))
#define | QEI_IESET_POS2_Int ((uint32_t)(1<<8))
#define | QEI_IESET_REV_Int ((uint32_t)(1<<9))
#define | QEI_IESET_POS0REV_Int ((uint32_t)(1<<10))
#define | QEI_IESET_POS1REV_Int ((uint32_t)(1<<11))
#define | QEI_IESET_POS2REV_Int ((uint32_t)(1<<12))
#define | QEI_IESET_BITMASK ((uint32_t)(0x1FFF))
#define | QEI_IECLR_INX_Int ((uint32_t)(1<<0))
#define | QEI_IECLR_TIM_Int ((uint32_t)(1<<1))
#define | QEI_IECLR_VELC_Int ((uint32_t)(1<<2))
#define | QEI_IECLR_DIR_Int ((uint32_t)(1<<3))
#define | QEI_IECLR_ERR_Int ((uint32_t)(1<<4))
#define | QEI_IECLR_ENCLK_Int ((uint32_t)(1<<5))
#define | QEI_IECLR_POS0_Int ((uint32_t)(1<<6))
#define | QEI_IECLR_POS1_Int ((uint32_t)(1<<7))
#define | QEI_IECLR_POS2_Int ((uint32_t)(1<<8))
#define | QEI_IECLR_REV_Int ((uint32_t)(1<<9))
#define | QEI_IECLR_POS0REV_Int ((uint32_t)(1<<10))
#define | QEI_IECLR_POS1REV_Int ((uint32_t)(1<<11))
#define | QEI_IECLR_POS2REV_Int ((uint32_t)(1<<12))
#define | QEI_IECLR_BITMASK ((uint32_t)(0x1FFF))
#define | PARAM_QEIx(n) ((n==LPC_QEI))
#define | PARAM_QEI_RESET(n)
#define | PARAM_QEI_DIRINV(n) ((n==QEI_DIRINV_NONE) || (n==QEI_DIRINV_CMPL))
#define | PARAM_QEI_SIGNALMODE(n) ((n==QEI_SIGNALMODE_QUAD) || (n==QEI_SIGNALMODE_CLKDIR))
#define | PARAM_QEI_CAPMODE(n) ((n==QEI_CAPMODE_2X) || (n==QEI_CAPMODE_4X))
#define | PARAM_QEI_INVINX(n) ((n==QEI_INVINX_NONE) || (n==QEI_INVINX_EN))
#define | PARAM_QEI_TIMERRELOAD(n) ((n==QEI_TIMERRELOAD_TICKVAL) || (n==QEI_TIMERRELOAD_USVAL))
#define | PARAM_QEI_STATUS(n) ((n==QEI_STATUS_DIR))
#define | PARAM_QEI_COMPPOS_CH(n) ((n==QEI_COMPPOS_CH_0) || (n==QEI_COMPPOS_CH_1) || (n==QEI_COMPPOS_CH_2))
#define | PARAM_QEI_INTFLAG(n)

Define Documentation

#define PARAM_QEI_CAPMODE ( n ) ((n==QEI_CAPMODE_2X) || (n==QEI_CAPMODE_4X))

Definition at line 294 of file lpc17xx_qei.h.

#define PARAM_QEI_COMPPOS_CH ( n ) ((n==QEI_COMPPOS_CH_0) || (n==QEI_COMPPOS_CH_1) || (n==QEI_COMPPOS_CH_2))

Definition at line 306 of file lpc17xx_qei.h.

#define PARAM_QEI_DIRINV ( n ) ((n==QEI_DIRINV_NONE) || (n==QEI_DIRINV_CMPL))

Definition at line 288 of file lpc17xx_qei.h.

#define PARAM_QEI_INTFLAG ( n )

Value:

((n==QEI_INTFLAG_INX_Int) \
|| (n==QEI_INTFLAG_TIM_Int) \
|| (n==QEI_INTFLAG_VELC_Int) \
|| (n==QEI_INTFLAG_DIR_Int) \
|| (n==QEI_INTFLAG_ERR_Int) \
|| (n==QEI_INTFLAG_ENCLK_Int) \
|| (n==QEI_INTFLAG_POS0_Int) \
|| (n==QEI_INTFLAG_POS1_Int) \
|| (n==QEI_INTFLAG_POS2_Int) \
|| (n==QEI_INTFLAG_REV_Int) \
|| (n==QEI_INTFLAG_POS0REV_Int) \
|| (n==QEI_INTFLAG_POS1REV_Int) \
|| (n==QEI_INTFLAG_POS2REV_Int))

Definition at line 309 of file lpc17xx_qei.h.

#define PARAM_QEI_INVINX ( n ) ((n==QEI_INVINX_NONE) || (n==QEI_INVINX_EN))

Definition at line 297 of file lpc17xx_qei.h.

#define PARAM_QEI_RESET ( n )

Value:

((n==QEI_CON_RESP) \
|| (n==QEI_RESET_POSOnIDX) \
|| (n==QEI_RESET_VEL) \
|| (n==QEI_RESET_IDX))

Definition at line 282 of file lpc17xx_qei.h.

#define PARAM_QEI_SIGNALMODE ( n ) ((n==QEI_SIGNALMODE_QUAD) || (n==QEI_SIGNALMODE_CLKDIR))

Definition at line 291 of file lpc17xx_qei.h.

#define PARAM_QEI_STATUS ( n ) ((n==QEI_STATUS_DIR))

Definition at line 303 of file lpc17xx_qei.h.

#define PARAM_QEI_TIMERRELOAD ( n ) ((n==QEI_TIMERRELOAD_TICKVAL) || (n==QEI_TIMERRELOAD_USVAL))

Definition at line 300 of file lpc17xx_qei.h.

#define PARAM_QEIx ( n ) ((n==LPC_QEI))

Definition at line 279 of file lpc17xx_qei.h.

#define QEI_CON_BITMASK ((uint32_t)(0x0F))

QEI Control register bit-mask

Definition at line 123 of file lpc17xx_qei.h.

#define QEI_CON_RESI ((uint32_t)(1<<3))

Reset Index Counter

Definition at line 122 of file lpc17xx_qei.h.

#define QEI_CON_RESP ((uint32_t)(1<<0))

Macro defines for QEI Control register Reset position counter

Definition at line 119 of file lpc17xx_qei.h.

#define QEI_CON_RESPI ((uint32_t)(1<<1))

Reset Posistion Counter on Index

Definition at line 120 of file lpc17xx_qei.h.

#define QEI_CON_RESV ((uint32_t)(1<<2))

Reset Velocity

Definition at line 121 of file lpc17xx_qei.h.

#define QEI_CONF_BITMASK ((uint32_t)(0x0F))

QEI Configuration register bit-mask

Definition at line 132 of file lpc17xx_qei.h.

#define QEI_CONF_CAPMODE ((uint32_t)(1<<2))

Capture mode

Definition at line 130 of file lpc17xx_qei.h.

#define QEI_CONF_DIRINV ((uint32_t)(1<<0))

Macro defines for QEI Configuration register Direction Invert

Definition at line 128 of file lpc17xx_qei.h.

#define QEI_CONF_INVINX ((uint32_t)(1<<3))

Invert index

Definition at line 131 of file lpc17xx_qei.h.

#define QEI_CONF_SIGMODE ((uint32_t)(1<<1))

Signal mode

Definition at line 129 of file lpc17xx_qei.h.

#define QEI_IECLR_BITMASK ((uint32_t)(0x1FFF))

QEI Interrupt Enable Clear register bit-mask

Definition at line 274 of file lpc17xx_qei.h.

#define QEI_IECLR_DIR_Int ((uint32_t)(1<<3))

Clear Enabled Interrupt Bit Indicates that a change of direction was detected

Definition at line 260 of file lpc17xx_qei.h.

#define QEI_IECLR_ENCLK_Int ((uint32_t)(1<<5))

Clear Enabled Interrupt Bit Indicates that and encoder clock pulse was detected

Definition at line 262 of file lpc17xx_qei.h.

#define QEI_IECLR_ERR_Int ((uint32_t)(1<<4))

Clear Enabled Interrupt Bit Indicates that an encoder phase error was detected

Definition at line 261 of file lpc17xx_qei.h.

#define QEI_IECLR_INX_Int ((uint32_t)(1<<0))

Macro defines for QEI Interrupt Enable Clear register Clear Enabled Interrupt Bit Indicates that an index pulse was detected

Definition at line 257 of file lpc17xx_qei.h.

#define QEI_IECLR_POS0_Int ((uint32_t)(1<<6))

Clear Enabled Interrupt Bit Indicates that the position 0 compare value is equal to the current position

Definition at line 263 of file lpc17xx_qei.h.

#define QEI_IECLR_POS0REV_Int ((uint32_t)(1<<10))

Clear Enabled Interrupt Bit that combined position 0 and revolution count interrupt

Definition at line 271 of file lpc17xx_qei.h.

#define QEI_IECLR_POS1_Int ((uint32_t)(1<<7))

Clear Enabled Interrupt Bit Indicates that the position 1compare value is equal to the current position

Definition at line 265 of file lpc17xx_qei.h.

#define QEI_IECLR_POS1REV_Int ((uint32_t)(1<<11))

Clear Enabled Interrupt Bit that Combined position 1 and revolution count interrupt

Definition at line 272 of file lpc17xx_qei.h.

#define QEI_IECLR_POS2_Int ((uint32_t)(1<<8))

Clear Enabled Interrupt Bit Indicates that the position 2 compare value is equal to the current position

Definition at line 267 of file lpc17xx_qei.h.

#define QEI_IECLR_POS2REV_Int ((uint32_t)(1<<12))

Clear Enabled Interrupt Bit that Combined position 2 and revolution count interrupt

Definition at line 273 of file lpc17xx_qei.h.

#define QEI_IECLR_REV_Int ((uint32_t)(1<<9))

Clear Enabled Interrupt Bit Indicates that the index compare value is equal to the current index count

Definition at line 269 of file lpc17xx_qei.h.

#define QEI_IECLR_TIM_Int ((uint32_t)(1<<1))

Clear Enabled Interrupt Bit Indicates that a velocity timer overflow occurred

Definition at line 258 of file lpc17xx_qei.h.

#define QEI_IECLR_VELC_Int ((uint32_t)(1<<2))

Clear Enabled Interrupt Bit Indicates that capture velocity is less than compare velocity

Definition at line 259 of file lpc17xx_qei.h.

#define QEI_IESET_BITMASK ((uint32_t)(0x1FFF))

QEI Interrupt Enable Set register bit-mask

Definition at line 252 of file lpc17xx_qei.h.

#define QEI_IESET_DIR_Int ((uint32_t)(1<<3))

Set Enable Interrupt Bit Indicates that a change of direction was detected

Definition at line 238 of file lpc17xx_qei.h.

#define QEI_IESET_ENCLK_Int ((uint32_t)(1<<5))

Set Enable Interrupt Bit Indicates that and encoder clock pulse was detected

Definition at line 240 of file lpc17xx_qei.h.

#define QEI_IESET_ERR_Int ((uint32_t)(1<<4))

Set Enable Interrupt Bit Indicates that an encoder phase error was detected

Definition at line 239 of file lpc17xx_qei.h.

#define QEI_IESET_INX_Int ((uint32_t)(1<<0))

Macro defines for QEI Interrupt Enable Set register Set Enable Interrupt Bit Indicates that an index pulse was detected

Definition at line 235 of file lpc17xx_qei.h.

#define QEI_IESET_POS0_Int ((uint32_t)(1<<6))

Set Enable Interrupt Bit Indicates that the position 0 compare value is equal to the current position

Definition at line 241 of file lpc17xx_qei.h.

#define QEI_IESET_POS0REV_Int ((uint32_t)(1<<10))

Set Enable Interrupt Bit that combined position 0 and revolution count interrupt

Definition at line 249 of file lpc17xx_qei.h.

#define QEI_IESET_POS1_Int ((uint32_t)(1<<7))

Set Enable Interrupt Bit Indicates that the position 1compare value is equal to the current position

Definition at line 243 of file lpc17xx_qei.h.

#define QEI_IESET_POS1REV_Int ((uint32_t)(1<<11))

Set Enable Interrupt Bit that Combined position 1 and revolution count interrupt

Definition at line 250 of file lpc17xx_qei.h.

#define QEI_IESET_POS2_Int ((uint32_t)(1<<8))

Set Enable Interrupt Bit Indicates that the position 2 compare value is equal to the current position

Definition at line 245 of file lpc17xx_qei.h.

#define QEI_IESET_POS2REV_Int ((uint32_t)(1<<12))

Set Enable Interrupt Bit that Combined position 2 and revolution count interrupt

Definition at line 251 of file lpc17xx_qei.h.

#define QEI_IESET_REV_Int ((uint32_t)(1<<9))

Set Enable Interrupt Bit Indicates that the index compare value is equal to the current index count

Definition at line 247 of file lpc17xx_qei.h.

#define QEI_IESET_TIM_Int ((uint32_t)(1<<1))

Set Enable Interrupt Bit Indicates that a velocity timer overflow occurred

Definition at line 236 of file lpc17xx_qei.h.

#define QEI_IESET_VELC_Int ((uint32_t)(1<<2))

Set Enable Interrupt Bit Indicates that capture velocity is less than compare velocity

Definition at line 237 of file lpc17xx_qei.h.

#define QEI_INTCLR_BITMASK ((uint32_t)(0x1FFF))

QEI Interrupt Clear register bit-mask

Definition at line 208 of file lpc17xx_qei.h.

#define QEI_INTCLR_DIR_Int ((uint32_t)(1<<3))

Clear Bit Indicates that a change of direction was detected

Definition at line 194 of file lpc17xx_qei.h.

#define QEI_INTCLR_ENCLK_Int ((uint32_t)(1<<5))

Clear Bit Indicates that and encoder clock pulse was detected

Definition at line 196 of file lpc17xx_qei.h.

#define QEI_INTCLR_ERR_Int ((uint32_t)(1<<4))

Clear Bit Indicates that an encoder phase error was detected

Definition at line 195 of file lpc17xx_qei.h.

#define QEI_INTCLR_INX_Int ((uint32_t)(1<<0))

Macro defines for QEI Interrupt Clear register Clear Bit Indicates that an index pulse was detected

Definition at line 191 of file lpc17xx_qei.h.

#define QEI_INTCLR_POS0_Int ((uint32_t)(1<<6))

Clear Bit Indicates that the position 0 compare value is equal to the current position

Definition at line 197 of file lpc17xx_qei.h.

#define QEI_INTCLR_POS0REV_Int ((uint32_t)(1<<10))

Clear Bit that combined position 0 and revolution count interrupt

Definition at line 205 of file lpc17xx_qei.h.

#define QEI_INTCLR_POS1_Int ((uint32_t)(1<<7))

Clear Bit Indicates that the position 1compare value is equal to the current position

Definition at line 199 of file lpc17xx_qei.h.

#define QEI_INTCLR_POS1REV_Int ((uint32_t)(1<<11))

Clear Bit that Combined position 1 and revolution count interrupt

Definition at line 206 of file lpc17xx_qei.h.

#define QEI_INTCLR_POS2_Int ((uint32_t)(1<<8))

Clear Bit Indicates that the position 2 compare value is equal to the current position

Definition at line 201 of file lpc17xx_qei.h.

#define QEI_INTCLR_POS2REV_Int ((uint32_t)(1<<12))

Clear Bit that Combined position 2 and revolution count interrupt

Definition at line 207 of file lpc17xx_qei.h.

#define QEI_INTCLR_REV_Int ((uint32_t)(1<<9))

Clear Bit Indicates that the index compare value is equal to the current index count

Definition at line 203 of file lpc17xx_qei.h.

#define QEI_INTCLR_TIM_Int ((uint32_t)(1<<1))

Clear Bit Indicates that a velocity timer overflow occurred

Definition at line 192 of file lpc17xx_qei.h.

#define QEI_INTCLR_VELC_Int ((uint32_t)(1<<2))

Clear Bit Indicates that capture velocity is less than compare velocity

Definition at line 193 of file lpc17xx_qei.h.

#define QEI_INTEN_BITMASK ((uint32_t)(0x1FFF))

QEI Interrupt Enable register bit-mask

Definition at line 230 of file lpc17xx_qei.h.

#define QEI_INTEN_DIR_Int ((uint32_t)(1<<3))

Enabled Interrupt Bit Indicates that a change of direction was detected

Definition at line 216 of file lpc17xx_qei.h.

#define QEI_INTEN_ENCLK_Int ((uint32_t)(1<<5))

Enabled Interrupt Bit Indicates that and encoder clock pulse was detected

Definition at line 218 of file lpc17xx_qei.h.

#define QEI_INTEN_ERR_Int ((uint32_t)(1<<4))

Enabled Interrupt Bit Indicates that an encoder phase error was detected

Definition at line 217 of file lpc17xx_qei.h.

#define QEI_INTEN_INX_Int ((uint32_t)(1<<0))

Macro defines for QEI Interrupt Enable register Enabled Interrupt Bit Indicates that an index pulse was detected

Definition at line 213 of file lpc17xx_qei.h.

#define QEI_INTEN_POS0_Int ((uint32_t)(1<<6))

Enabled Interrupt Bit Indicates that the position 0 compare value is equal to the current position

Definition at line 219 of file lpc17xx_qei.h.

#define QEI_INTEN_POS0REV_Int ((uint32_t)(1<<10))

Enabled Interrupt Bit that combined position 0 and revolution count interrupt

Definition at line 227 of file lpc17xx_qei.h.

#define QEI_INTEN_POS1_Int ((uint32_t)(1<<7))

Enabled Interrupt Bit Indicates that the position 1compare value is equal to the current position

Definition at line 221 of file lpc17xx_qei.h.

#define QEI_INTEN_POS1REV_Int ((uint32_t)(1<<11))

Enabled Interrupt Bit that Combined position 1 and revolution count interrupt

Definition at line 228 of file lpc17xx_qei.h.

#define QEI_INTEN_POS2_Int ((uint32_t)(1<<8))

Enabled Interrupt Bit Indicates that the position 2 compare value is equal to the current position

Definition at line 223 of file lpc17xx_qei.h.

#define QEI_INTEN_POS2REV_Int ((uint32_t)(1<<12))

Enabled Interrupt Bit that Combined position 2 and revolution count interrupt

Definition at line 229 of file lpc17xx_qei.h.

#define QEI_INTEN_REV_Int ((uint32_t)(1<<9))

Enabled Interrupt Bit Indicates that the index compare value is equal to the current index count

Definition at line 225 of file lpc17xx_qei.h.

#define QEI_INTEN_TIM_Int ((uint32_t)(1<<1))

Enabled Interrupt Bit Indicates that a velocity timer overflow occurred

Definition at line 214 of file lpc17xx_qei.h.

#define QEI_INTEN_VELC_Int ((uint32_t)(1<<2))

Enabled Interrupt Bit Indicates that capture velocity is less than compare velocity

Definition at line 215 of file lpc17xx_qei.h.

#define QEI_INTSET_BITMASK ((uint32_t)(0x1FFF))

QEI Interrupt Set register bit-mask

Definition at line 186 of file lpc17xx_qei.h.

#define QEI_INTSET_DIR_Int ((uint32_t)(1<<3))

Set Bit Indicates that a change of direction was detected

Definition at line 172 of file lpc17xx_qei.h.

#define QEI_INTSET_ENCLK_Int ((uint32_t)(1<<5))

Set Bit Indicates that and encoder clock pulse was detected

Definition at line 174 of file lpc17xx_qei.h.

#define QEI_INTSET_ERR_Int ((uint32_t)(1<<4))

Set Bit Indicates that an encoder phase error was detected

Definition at line 173 of file lpc17xx_qei.h.

#define QEI_INTSET_INX_Int ((uint32_t)(1<<0))

Macro defines for QEI Interrupt Set register Set Bit Indicates that an index pulse was detected

Definition at line 169 of file lpc17xx_qei.h.

#define QEI_INTSET_POS0_Int ((uint32_t)(1<<6))

Set Bit Indicates that the position 0 compare value is equal to the current position

Definition at line 175 of file lpc17xx_qei.h.

#define QEI_INTSET_POS0REV_Int ((uint32_t)(1<<10))

Set Bit that combined position 0 and revolution count interrupt

Definition at line 183 of file lpc17xx_qei.h.

#define QEI_INTSET_POS1_Int ((uint32_t)(1<<7))

Set Bit Indicates that the position 1compare value is equal to the current position

Definition at line 177 of file lpc17xx_qei.h.

#define QEI_INTSET_POS1REV_Int ((uint32_t)(1<<11))

Set Bit that Combined position 1 and revolution count interrupt

Definition at line 184 of file lpc17xx_qei.h.

#define QEI_INTSET_POS2_Int ((uint32_t)(1<<8))

Set Bit Indicates that the position 2 compare value is equal to the current position

Definition at line 179 of file lpc17xx_qei.h.

#define QEI_INTSET_POS2REV_Int ((uint32_t)(1<<12))

Set Bit that Combined position 2 and revolution count interrupt

Definition at line 185 of file lpc17xx_qei.h.

#define QEI_INTSET_REV_Int ((uint32_t)(1<<9))

Set Bit Indicates that the index compare value is equal to the current index count

Definition at line 181 of file lpc17xx_qei.h.

#define QEI_INTSET_TIM_Int ((uint32_t)(1<<1))

Set Bit Indicates that a velocity timer overflow occurred

Definition at line 170 of file lpc17xx_qei.h.

#define QEI_INTSET_VELC_Int ((uint32_t)(1<<2))

Set Bit Indicates that capture velocity is less than compare velocity

Definition at line 171 of file lpc17xx_qei.h.

#define QEI_INTSTAT_BITMASK ((uint32_t)(0x1FFF))

QEI Interrupt Status register bit-mask

Definition at line 164 of file lpc17xx_qei.h.

#define QEI_INTSTAT_DIR_Int ((uint32_t)(1<<3))

Indicates that a change of direction was detected

Definition at line 147 of file lpc17xx_qei.h.

#define QEI_INTSTAT_ENCLK_Int ((uint32_t)(1<<5))

Indicates that and encoder clock pulse was detected

Definition at line 149 of file lpc17xx_qei.h.

#define QEI_INTSTAT_ERR_Int ((uint32_t)(1<<4))

Indicates that an encoder phase error was detected

Definition at line 148 of file lpc17xx_qei.h.

#define QEI_INTSTAT_INX_Int ((uint32_t)(1<<0))

Macro defines for QEI Interrupt Status register Indicates that an index pulse was detected

Definition at line 144 of file lpc17xx_qei.h.

#define QEI_INTSTAT_POS0_Int ((uint32_t)(1<<6))

Indicates that the position 0 compare value is equal to the current position

Definition at line 150 of file lpc17xx_qei.h.

#define QEI_INTSTAT_POS0REV_Int ((uint32_t)(1<<10))

Combined position 0 and revolution count interrupt. Set when both the POS0_Int bit is set and the REV_Int is set

Definition at line 158 of file lpc17xx_qei.h.

#define QEI_INTSTAT_POS1_Int ((uint32_t)(1<<7))

Indicates that the position 1compare value is equal to the current position

Definition at line 152 of file lpc17xx_qei.h.

#define QEI_INTSTAT_POS1REV_Int ((uint32_t)(1<<11))

Combined position 1 and revolution count interrupt. Set when both the POS1_Int bit is set and the REV_Int is set

Definition at line 160 of file lpc17xx_qei.h.

#define QEI_INTSTAT_POS2_Int ((uint32_t)(1<<8))

Indicates that the position 2 compare value is equal to the current position

Definition at line 154 of file lpc17xx_qei.h.

#define QEI_INTSTAT_POS2REV_Int ((uint32_t)(1<<12))

Combined position 2 and revolution count interrupt. Set when both the POS2_Int bit is set and the REV_Int is set

Definition at line 162 of file lpc17xx_qei.h.

#define QEI_INTSTAT_REV_Int ((uint32_t)(1<<9))

Indicates that the index compare value is equal to the current index count

Definition at line 156 of file lpc17xx_qei.h.

#define QEI_INTSTAT_TIM_Int ((uint32_t)(1<<1))

Indicates that a velocity timer overflow occurred

Definition at line 145 of file lpc17xx_qei.h.

#define QEI_INTSTAT_VELC_Int ((uint32_t)(1<<2))

Indicates that capture velocity is less than compare velocity

Definition at line 146 of file lpc17xx_qei.h.

#define QEI_STAT_BITMASK ((uint32_t)(1<<0))

QEI status register bit-mask

Definition at line 138 of file lpc17xx_qei.h.

#define QEI_STAT_DIR ((uint32_t)(1<<0))

Macro defines for QEI Status register Direction bit

Definition at line 137 of file lpc17xx_qei.h.

Generated on Tue Jun 7 14:59:37 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: QEI Public Types

QEI Public Types
[QEI]

Data Structures

struct | QEI_CFG_Type
QEI Configuration structure type definition. More...
struct | QEI_RELOADCFG_Type
Timer Reload Configuration structure type definition. More...
Generated on Tue Jun 7 14:59:37 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: QEI Public Functions

QEI Public Functions
[QEI]

Functions

void | QEI_Reset (LPC_QEI_TypeDef *QEIx, uint32_t ulResetType)
Resets value for each type of QEI value, such as velocity, counter, position, etc..
void | QEI_Init (LPC_QEI_TypeDef *QEIx, QEI_CFG_Type *QEI_ConfigStruct)
Initializes the QEI peripheral according to the specified parameters in the QEI_ConfigStruct.
void | QEI_ConfigStructInit (QEI_CFG_Type *QIE_InitStruct)
Fills each QIE_InitStruct member with its default value:
  • DirectionInvert = QEI_DIRINV_NONE
  • SignalMode = QEI_SIGNALMODE_QUAD
  • CaptureMode = QEI_CAPMODE_4X
  • InvertIndex = QEI_INVINX_NONE.

void | QEI_DeInit (LPC_QEI_TypeDef *QEIx)
De-initializes the QEI peripheral registers to their default reset values.
FlagStatus | QEI_GetStatus (LPC_QEI_TypeDef *QEIx, uint32_t ulFlagType)
Check whether if specified flag status is set or not.
uint32_t | QEI_GetPosition (LPC_QEI_TypeDef *QEIx)
Get current position value in QEI peripheral.
void | QEI_SetMaxPosition (LPC_QEI_TypeDef *QEIx, uint32_t ulMaxPos)
Set max position value for QEI peripheral.
void | QEI_SetPositionComp (LPC_QEI_TypeDef *QEIx, uint8_t bPosCompCh, uint32_t ulPosComp)
Set position compare value for QEI peripheral.
uint32_t | QEI_GetIndex (LPC_QEI_TypeDef *QEIx)
Get current index counter of QEI peripheral.
void | QEI_SetIndexComp (LPC_QEI_TypeDef *QEIx, uint32_t ulIndexComp)
Set value for index compare in QEI peripheral.
void | QEI_SetTimerReload (LPC_QEI_TypeDef *QEIx, QEI_RELOADCFG_Type *QEIReloadStruct)
Set timer reload value for QEI peripheral. When the velocity timer is over-flow, the value that set for Timer Reload register will be loaded into the velocity timer for next period. The calculated velocity in RPM therefore will be affect by this value.
uint32_t | QEI_GetTimer (LPC_QEI_TypeDef *QEIx)
Get current timer counter in QEI peripheral.
uint32_t | QEI_GetVelocity (LPC_QEI_TypeDef *QEIx)
Get current velocity pulse counter in current time period.
uint32_t | QEI_GetVelocityCap (LPC_QEI_TypeDef *QEIx)
Get the most recently measured velocity of the QEI. When the Velocity timer in QEI is over-flow, the current velocity value will be loaded into Velocity Capture register.
void | QEI_SetVelocityComp (LPC_QEI_TypeDef *QEIx, uint32_t ulVelComp)
Set Velocity Compare value for QEI peripheral.
void | QEI_SetDigiFilter (LPC_QEI_TypeDef *QEIx, uint32_t ulSamplingPulse)
Set value of sampling count for the digital filter in QEI peripheral.
FlagStatus | QEI_GetIntStatus (LPC_QEI_TypeDef *QEIx, uint32_t ulIntType)
Check whether if specified interrupt flag status in QEI peripheral is set or not.
void | QEI_IntCmd (LPC_QEI_TypeDef *QEIx, uint32_t ulIntType, FunctionalState NewState)
Enable/Disable specified interrupt in QEI peripheral.
void | QEI_IntSet (LPC_QEI_TypeDef *QEIx, uint32_t ulIntType)
Sets (forces) specified interrupt in QEI peripheral.
void | QEI_IntClear (LPC_QEI_TypeDef *QEIx, uint32_t ulIntType)
Clear (force) specified interrupt (pending) in QEI peripheral.
uint32_t | QEI_CalculateRPM (LPC_QEI_TypeDef *QEIx, uint32_t ulVelCapValue, uint32_t ulPPR)
Calculates the actual velocity in RPM passed via velocity capture value and Pulse Per Round (of the encoder) value parameter input.

Function Documentation

uint32_t QEI_CalculateRPM | ( | LPC_QEI_TypeDef * | QEIx,
 |  | uint32_t | ulVelCapValue,
 |  | uint32_t | ulPPR
 | ) |  |

Calculates the actual velocity in RPM passed via velocity capture value and Pulse Per Round (of the encoder) value parameter input.

Parameters:
[in] | QEIx | QEI peripheral, should be LPC_QEI
[in] | ulVelCapValue | Velocity capture input value that can be got from QEI_GetVelocityCap() function
[in] | ulPPR | Pulse per round of encoder
Returns:
The actual value of velocity in RPM (Round per minute)

Definition at line 480 of file lpc17xx_qei.c.

void QEI_ConfigStructInit ( QEI_CFG_Type * QIE_InitStruct )

Fills each QIE_InitStruct member with its default value:

  • DirectionInvert = QEI_DIRINV_NONE
  • SignalMode = QEI_SIGNALMODE_QUAD
  • CaptureMode = QEI_CAPMODE_4X
  • InvertIndex = QEI_INVINX_NONE.

Parameters:
[in] QIE_InitStruct Pointer to a QEI_CFG_Type structure which will be initialized.
Returns:
None

Definition at line 160 of file lpc17xx_qei.c.

void QEI_DeInit ( LPC_QEI_TypeDef * QEIx )

De-initializes the QEI peripheral registers to their default reset values.

Parameters:
[in] QEIx QEI peripheral, should be LPC_QEI
Returns:
None

Definition at line 141 of file lpc17xx_qei.c.

uint32_t QEI_GetIndex ( LPC_QEI_TypeDef * QEIx )

Get current index counter of QEI peripheral.

Parameters:
[in] QEIx QEI peripheral, should be LPC_QEI
Returns:
Current value of QEI index counter

Definition at line 232 of file lpc17xx_qei.c.

FlagStatus QEI_GetIntStatus | ( | LPC_QEI_TypeDef * | QEIx,
 |  | uint32_t | ulIntType
 | ) |  |

Check whether if specified interrupt flag status in QEI peripheral is set or not.

Parameters:
[in] QEIx QEI peripheral, should be LPC_QEI
[in] ulIntType Interrupt Flag Status type, should be:
  • QEI_INTFLAG_INX_Int: index pulse was detected interrupt
  • QEI_INTFLAG_TIM_Int: Velocity timer over flow interrupt
  • QEI_INTFLAG_VELC_Int: Capture velocity is less than compare interrupt
  • QEI_INTFLAG_DIR_Int: Change of direction interrupt
  • QEI_INTFLAG_ERR_Int: An encoder phase error interrupt
  • QEI_INTFLAG_ENCLK_Int: An encoder clock pulse was detected interrupt
  • QEI_INTFLAG_POS0_Int: position 0 compare value is equal to the current position interrupt
  • QEI_INTFLAG_POS1_Int: position 1 compare value is equal to the current position interrupt
  • QEI_INTFLAG_POS2_Int: position 2 compare value is equal to the current position interrupt
  • QEI_INTFLAG_REV_Int: Index compare value is equal to the current index count interrupt
  • QEI_INTFLAG_POS0REV_Int: Combined position 0 and revolution count interrupt
  • QEI_INTFLAG_POS1REV_Int: Combined position 1 and revolution count interrupt
  • QEI_INTFLAG_POS2REV_Int: Combined position 2 and revolution count interrupt
Returns:
New State of specified interrupt flag status (SET or RESET)

Definition at line 359 of file lpc17xx_qei.c.

uint32_t QEI_GetPosition ( LPC_QEI_TypeDef * QEIx )

Get current position value in QEI peripheral.

Parameters:
[in] QEIx QEI peripheral, should be LPC_QEI
Returns:
Current position value of QEI peripheral

Definition at line 188 of file lpc17xx_qei.c.

FlagStatus QEI_GetStatus | ( | LPC_QEI_TypeDef * | QEIx,
 |  | uint32_t | ulFlagType
 | ) |  |

Check whether if specified flag status is set or not.

Parameters:
[in] QEIx QEI peripheral, should be LPC_QEI
[in] ulFlagType Status Flag Type, should be one of the following:
  • QEI_STATUS_DIR: Direction Status
Returns:
New Status of this status flag (SET or RESET)

Definition at line 176 of file lpc17xx_qei.c.

uint32_t QEI_GetTimer ( LPC_QEI_TypeDef * QEIx )

Get current timer counter in QEI peripheral.

Parameters:
[in] QEIx QEI peripheral, should be LPC_QEI
Returns:
Current timer counter in QEI peripheral

Definition at line 280 of file lpc17xx_qei.c.

uint32_t QEI_GetVelocity ( LPC_QEI_TypeDef * QEIx )

Get current velocity pulse counter in current time period.

Parameters:
[in] QEIx QEI peripheral, should be LPC_QEI
Returns:
Current velocity pulse counter value

Definition at line 291 of file lpc17xx_qei.c.

uint32_t QEI_GetVelocityCap ( LPC_QEI_TypeDef * QEIx )

Get the most recently measured velocity of the QEI. When the Velocity timer in QEI is over-flow, the current velocity value will be loaded into Velocity Capture register.

Parameters:
[in] QEIx QEI peripheral, should be LPC_QEI
Returns:
The most recently measured velocity value

Definition at line 304 of file lpc17xx_qei.c.

void QEI_Init | ( | LPC_QEI_TypeDef * | QEIx,
 |  | QEI_CFG_Type * | QEI_ConfigStruct
 | ) |  |

Initializes the QEI peripheral according to the specified parameters in the QEI_ConfigStruct.

Parameters:
[in] | QEIx | QEI peripheral, should be LPC_QEI
[in] | QEI_ConfigStruct | Pointer to a QEI_CFG_Type structure that contains the configuration information for the specified QEI peripheral
Returns:
None

Definition at line 100 of file lpc17xx_qei.c.

void QEI_IntClear | ( | LPC_QEI_TypeDef * | QEIx,
 |  | uint32_t | ulIntType
 | ) |  |

Clear (force) specified interrupt (pending) in QEI peripheral.

Parameters:
[in] QEIx QEI peripheral, should be LPC_QEI
[in] ulIntType Interrupt Flag Status type, should be:
  • QEI_INTFLAG_INX_Int: index pulse was detected interrupt
  • QEI_INTFLAG_TIM_Int: Velocity timer over flow interrupt
  • QEI_INTFLAG_VELC_Int: Capture velocity is less than compare interrupt
  • QEI_INTFLAG_DIR_Int: Change of direction interrupt
  • QEI_INTFLAG_ERR_Int: An encoder phase error interrupt
  • QEI_INTFLAG_ENCLK_Int: An encoder clock pulse was detected interrupt
  • QEI_INTFLAG_POS0_Int: position 0 compare value is equal to the current position interrupt
  • QEI_INTFLAG_POS1_Int: position 1 compare value is equal to the current position interrupt
  • QEI_INTFLAG_POS2_Int: position 2 compare value is equal to the current position interrupt
  • QEI_INTFLAG_REV_Int: Index compare value is equal to the current index count interrupt
  • QEI_INTFLAG_POS0REV_Int: Combined position 0 and revolution count interrupt
  • QEI_INTFLAG_POS1REV_Int: Combined position 1 and revolution count interrupt
  • QEI_INTFLAG_POS2REV_Int: Combined position 2 and revolution count interrupt
Returns:
None

Definition at line 461 of file lpc17xx_qei.c.

void QEI_IntCmd | ( | LPC_QEI_TypeDef * | QEIx,
 |  | uint32_t | ulIntType,
 |  | FunctionalState | NewState
 | ) |  |

Enable/Disable specified interrupt in QEI peripheral.

Parameters:
[in] QEIx QEI peripheral, should be LPC_QEI
[in] ulIntType Interrupt Flag Status type, should be:
  • QEI_INTFLAG_INX_Int: index pulse was detected interrupt
  • QEI_INTFLAG_TIM_Int: Velocity timer over flow interrupt
  • QEI_INTFLAG_VELC_Int: Capture velocity is less than compare interrupt
  • QEI_INTFLAG_DIR_Int: Change of direction interrupt
  • QEI_INTFLAG_ERR_Int: An encoder phase error interrupt
    • QEI_INTFLAG_ENCLK_Int: An encoder clock pulse was detected interrupt
    • QEI_INTFLAG_POS0_Int: position 0 compare value is equal to the current position interrupt
    • QEI_INTFLAG_POS1_Int: position 1 compare value is equal to the current position interrupt
    • QEI_INTFLAG_POS2_Int: position 2 compare value is equal to the current position interrupt
    • QEI_INTFLAG_REV_Int: Index compare value is equal to the current index count interrupt
    • QEI_INTFLAG_POS0REV_Int: Combined position 0 and revolution count interrupt
    • QEI_INTFLAG_POS1REV_Int: Combined position 1 and revolution count interrupt
    • QEI_INTFLAG_POS2REV_Int: Combined position 2 and revolution count interrupt
      Parameters:
      [in] NewState New function state, should be:
    • DISABLE
    • ENABLE
      Returns:
      None

Definition at line 393 of file lpc17xx_qei.c.

void QEI_IntSet | ( | LPC_QEI_TypeDef * | QEIx,
 |  | uint32_t | ulIntType
 | ) |  |

Sets (forces) specified interrupt in QEI peripheral.

Parameters:
[in] QEIx QEI peripheral, should be LPC_QEI
[in] ulIntType Interrupt Flag Status type, should be:
  • QEI_INTFLAG_INX_Int: index pulse was detected interrupt
  • QEI_INTFLAG_TIM_Int: Velocity timer over flow interrupt
  • QEI_INTFLAG_VELC_Int: Capture velocity is less than compare interrupt
  • QEI_INTFLAG_DIR_Int: Change of direction interrupt
  • QEI_INTFLAG_ERR_Int: An encoder phase error interrupt
  • QEI_INTFLAG_ENCLK_Int: An encoder clock pulse was detected interrupt
  • QEI_INTFLAG_POS0_Int: position 0 compare value is equal to the current position interrupt
  • QEI_INTFLAG_POS1_Int: position 1 compare value is equal to the current position interrupt
  • QEI_INTFLAG_POS2_Int: position 2 compare value is equal to the current position interrupt
  • QEI_INTFLAG_REV_Int: Index compare value is equal to the current index count interrupt
  • QEI_INTFLAG_POS0REV_Int: Combined position 0 and revolution count interrupt
  • QEI_INTFLAG_POS1REV_Int: Combined position 1 and revolution count interrupt
  • QEI_INTFLAG_POS2REV_Int: Combined position 2 and revolution count interrupt
Returns:
None

Definition at line 430 of file lpc17xx_qei.c.

void QEI_Reset | ( | LPC_QEI_TypeDef * | QEIx,
 |  | uint32_t | ulResetType
 | ) |  |

Resets value for each type of QEI value, such as velocity, counter, position, etc..

Parameters:
[in] QEIx QEI peripheral, should be LPC_QEI
[in] ulResetType QEI Reset Type, should be one of the following:
  • QEI_RESET_POS: Reset Position Counter
  • QEI_RESET_POSOnIDX: Reset Position Counter on Index signal
  • QEI_RESET_VEL: Reset Velocity
  • QEI_RESET_IDX: Reset Index Counter
Returns:
None

Definition at line 83 of file lpc17xx_qei.c.

void QEI_SetDigiFilter | ( | LPC_QEI_TypeDef * | QEIx,
 |  | uint32_t | ulSamplingPulse
 | ) |  |

Set value of sampling count for the digital filter in QEI peripheral.

Parameters:
[in] | QEIx | QEI peripheral, should be LPC_QEI
[in] | ulSamplingPulse | Value of sampling count to set
Returns:
None

Definition at line 329 of file lpc17xx_qei.c.

void QEI_SetIndexComp | ( | LPC_QEI_TypeDef * | QEIx,
 |  | uint32_t | ulIndexComp
 | ) |  |

Set value for index compare in QEI peripheral.

Parameters:
[in] | QEIx | QEI peripheral, should be LPC_QEI
[in] | ulIndexComp | Compare Index Value to set
Returns:
None

Definition at line 244 of file lpc17xx_qei.c.

void QEI_SetMaxPosition | ( | LPC_QEI_TypeDef * | QEIx,
 |  | uint32_t | ulMaxPos
 | ) |  |

Set max position value for QEI peripheral.

Parameters:
[in] | QEIx | QEI peripheral, should be LPC_QEI
[in] | ulMaxPos | Max position value to set
Returns:
None

Definition at line 200 of file lpc17xx_qei.c.

void QEI_SetPositionComp | ( | LPC_QEI_TypeDef * | QEIx,
 |  | uint8_t | bPosCompCh,
 |  | uint32_t | ulPosComp
 | ) |  |

Set position compare value for QEI peripheral.

Parameters:
[in] | QEIx | QEI peripheral, should be LPC_QEI
[in] bPosCompCh Compare Position channel, should be:
  • QEI_COMPPOS_CH_0: QEI compare position channel 0
  • QEI_COMPPOS_CH_1: QEI compare position channel 1
  • QEI_COMPPOS_CH_2: QEI compare position channel 2
[in] | ulPosComp | Compare Position value to set
Returns:
None

Definition at line 216 of file lpc17xx_qei.c.

void QEI_SetTimerReload | ( | LPC_QEI_TypeDef * | QEIx,
 |  | QEI_RELOADCFG_Type * | QEIReloadStruct
 | ) |  |

Set timer reload value for QEI peripheral. When the velocity timer is over-flow, the value that set for Timer Reload register will be loaded into the velocity timer for next period. The calculated velocity in RPM therefore will be affect by this value.

Parameters:
[in] | QEIx | QEI peripheral, should be LPC_QEI
[in] | QEIReloadStruct | QEI reload structure
Returns:
None

Definition at line 259 of file lpc17xx_qei.c.

void QEI_SetVelocityComp | ( | LPC_QEI_TypeDef * | QEIx,
 |  | uint32_t | ulVelComp
 | ) |  |

Set Velocity Compare value for QEI peripheral.

Parameters:
[in] | QEIx | QEI peripheral, should be LPC_QEI
[in] | ulVelComp | Compare Velocity value to set
Returns:
None

Definition at line 316 of file lpc17xx_qei.c.

Generated on Tue Jun 7 14:59:37 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: QEI Private Types

QEI Private Types
[QEI]

Data Structures

union QEI_CFGOPT_Type
QEI configuration union type definition. More...
Generated on Tue Jun 7 14:59:43 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: RIT

RIT
[LPC1700CMSIS Firmware Library]

Modules

RIT Private Macros
RIT Public Functions
Generated on Tue Jun 7 14:59:37 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: RIT Private Macros

RIT Private Macros
[RIT]

Defines

#define | RIT_CTRL_INTEN ((uint32_t) (1))
#define | RIT_CTRL_ENCLR ((uint32_t) _BIT(1))
#define | RIT_CTRL_ENBR ((uint32_t) _BIT(2))
#define | RIT_CTRL_TEN ((uint32_t) _BIT(3))
#define | PARAM_RITx(n) (((uint32_t *)n)==((uint32_t *)LPC_RIT))

Define Documentation

#define PARAM_RITx ( n ) (((uint32_t *)n)==((uint32_t *)LPC_RIT))

Macro to determine if it is valid RIT peripheral

Definition at line 66 of file lpc17xx_rit.h.

#define RIT_CTRL_ENBR ((uint32_t) _BIT(2))

Set timer enable on debug

Definition at line 61 of file lpc17xx_rit.h.

#define RIT_CTRL_ENCLR ((uint32_t) _BIT(1))

Set timer enable clear to 0 when the counter value equals the masked compare value

Definition at line 59 of file lpc17xx_rit.h.

#define RIT_CTRL_INTEN ((uint32_t) (1))

Macro defines for RIT control register Set interrupt flag when the counter value equals the masked compare value

Definition at line 57 of file lpc17xx_rit.h.

#define RIT_CTRL_TEN ((uint32_t) _BIT(3))

Set timer enable

Definition at line 63 of file lpc17xx_rit.h.

Generated on Tue Jun 7 14:59:37 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: RIT Public Functions

RIT Public Functions
[RIT]

Functions

void | RIT_Init (LPC_RIT_TypeDef *RITx)
void | RIT_DeInit (LPC_RIT_TypeDef *RITx)
void | RIT_TimerConfig (LPC_RIT_TypeDef *RITx, uint32_t time_interval)
void | RIT_TimerClearCmd (LPC_RIT_TypeDef *RITx, FunctionalState NewState)
void | RIT_Cmd (LPC_RIT_TypeDef *RITx, FunctionalState NewState)
void | RIT_TimerDebugCmd (LPC_RIT_TypeDef *RITx, FunctionalState NewState)
IntStatus | RIT_GetIntStatus (LPC_RIT_TypeDef *RITx)

Function Documentation

void RIT_Cmd | ( | LPC_RIT_TypeDef * | RITx,
 |  | FunctionalState | NewState
 | ) |  |

Definition at line 128 of file lpc17xx_rit.c.

void RIT_DeInit ( LPC_RIT_TypeDef * RITx )

Definition at line 78 of file lpc17xx_rit.c.

IntStatus RIT_GetIntStatus ( LPC_RIT_TypeDef * RITx )

Definition at line 172 of file lpc17xx_rit.c.

void RIT_Init ( LPC_RIT_TypeDef * RITx )

Definition at line 59 of file lpc17xx_rit.c.

void RIT_TimerClearCmd | ( | LPC_RIT_TypeDef * | RITx,
 |  | FunctionalState | NewState
 | ) |  |

void RIT_TimerConfig | ( | LPC_RIT_TypeDef * | RITx,
 |  | uint32_t | time_interval
 | ) |  |

Definition at line 97 of file lpc17xx_rit.c.

void RIT_TimerDebugCmd | ( | LPC_RIT_TypeDef * | RITx,
 |  | FunctionalState | NewState
 | ) |  |

Definition at line 152 of file lpc17xx_rit.c.

Generated on Tue Jun 7 14:59:37 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: RTC

RTC
[LPC1700CMSIS Firmware Library]

Modules

RTC Private Macros
RTC Public Types
RTC Public Functions
Generated on Tue Jun 7 14:59:37 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: RTC Private Macros

RTC Private Macros
[RTC]

Defines

#define | RTC_ILR_BITMASK ((0x00000003))
#define | RTC_IRL_RTCCIF ((1<<0))
#define | RTC_IRL_RTCALF ((1<<1))
#define | RTC_CCR_BITMASK ((0x00000013))
#define | RTC_CCR_CLKEN ((1<<0))
#define | RTC_CCR_CTCRST ((1<<1))
#define | RTC_CCR_CCALEN ((1<<4))
#define | RTC_CIIR_IMSEC ((1<<0))
#define | RTC_CIIR_IMMIN ((1<<1))
#define | RTC_CIIR_IMHOUR ((1<<2))
#define | RTC_CIIR_IMDOM ((1<<3))
#define | RTC_CIIR_IMDOW ((1<<4))
#define | RTC_CIIR_IMDOY ((1<<5))
#define | RTC_CIIR_IMMON ((1<<6))
#define | RTC_CIIR_IMYEAR ((1<<7))
#define | RTC_CIIR_BITMASK ((0xFF))
#define | RTC_AMR_AMRSEC ((1<<0))
#define | RTC_AMR_AMRMIN ((1<<1))
#define | RTC_AMR_AMRHOUR ((1<<2))
#define | RTC_AMR_AMRDOM ((1<<3))
#define | RTC_AMR_AMRDOW ((1<<4))
#define | RTC_AMR_AMRDOY ((1<<5))
#define | RTC_AMR_AMRMON ((1<<6))
#define | RTC_AMR_AMRYEAR ((1<<7))
#define | RTC_AMR_BITMASK ((0xFF))
#define | RTC_AUX_RTC_OSCF ((1<<4))
#define | RTC_AUXEN_RTC_OSCFEN ((1<<4))
#define | RTC_CTIME0_SECONDS_MASK ((0x3F))
#define | RTC_CTIME0_MINUTES_MASK ((0x3F00))
#define | RTC_CTIME0_HOURS_MASK ((0x1F0000))
#define | RTC_CTIME0_DOW_MASK ((0x7000000))
#define | RTC_CTIME1_DOM_MASK ((0x1F))
#define | RTC_CTIME1_MONTH_MASK ((0xF00))
#define | RTC_CTIME1_YEAR_MASK ((0xFFF0000))
#define | RTC_CTIME2_DOY_MASK ((0xFFF))
#define | RTC_SEC_MASK (0x0000003F)
#define | RTC_MIN_MASK (0x0000003F)
#define | RTC_HOUR_MASK (0x0000001F)
#define | RTC_DOM_MASK (0x0000001F)
#define | RTC_DOW_MASK (0x00000007)
#define | RTC_DOY_MASK (0x000001FF)
#define | RTC_MONTH_MASK (0x0000000F)
#define | RTC_YEAR_MASK (0x00000FFF)
#define | RTC_SECOND_MAX 59
#define | RTC_MINUTE_MAX 59
#define | RTC_HOUR_MAX 23
#define | RTC_MONTH_MIN 1
#define | RTC_MONTH_MAX 12
#define | RTC_DAYOFMONTH_MIN 1
#define | RTC_DAYOFMONTH_MAX 31
#define | RTC_DAYOFWEEK_MAX 6
#define | RTC_DAYOFYEAR_MIN 1
#define | RTC_DAYOFYEAR_MAX 366
#define | RTC_YEAR_MAX 4095
#define | RTC_CALIBRATION_CALVAL_MASK ((0x1FFFF))
#define | RTC_CALIBRATION_LIBDIR ((1<<17))
#define | RTC_CALIBRATION_MAX ((0x20000))
#define | RTC_CALIB_DIR_FORWARD ((uint8_t)(0))
#define | RTC_CALIB_DIR_BACKWARD ((uint8_t)(1))
#define | PARAM_RTCx(x) (((uint32_t *)x)==((uint32_t *)LPC_RTC))
#define | PARAM_RTC_INT(n) ((n==RTC_INT_COUNTER_INCREASE) || (n==RTC_INT_ALARM))
#define | PARAM_RTC_TIMETYPE(n)
#define | PARAM_RTC_CALIB_DIR(n) ((n==RTC_CALIB_DIR_FORWARD) || (n==RTC_CALIB_DIR_BACKWARD))
#define | PARAM_RTC_GPREG_CH(n) ((n>=0) && (n<=4))

Define Documentation

#define PARAM_RTC_CALIB_DIR ( n ) ((n==RTC_CALIB_DIR_FORWARD) || (n==RTC_CALIB_DIR_BACKWARD))

Definition at line 214 of file lpc17xx_rtc.h.

#define PARAM_RTC_GPREG_CH ( n ) ((n>=0) && (n<=4))

Definition at line 217 of file lpc17xx_rtc.h.

#define PARAM_RTC_INT ( n ) ((n==RTC_INT_COUNTER_INCREASE) || (n==RTC_INT_ALARM))

Definition at line 205 of file lpc17xx_rtc.h.

#define PARAM_RTC_TIMETYPE ( n )

Value:

((n==RTC_TIMETYPE_SECOND) || (n==RTC_TIMETYPE_MINUTE) \
|| (n==RTC_TIMETYPE_HOUR) || (n==RTC_TIMETYPE_DAYOFWEEK) \
|| (n==RTC_TIMETYPE_DAYOFMONTH) || (n==RTC_TIMETYPE_DAYOFYEAR) \
|| (n==RTC_TIMETYPE_MONTH) || (n==RTC_TIMETYPE_YEAR))

Definition at line 208 of file lpc17xx_rtc.h.

#define PARAM_RTCx ( x ) (((uint32_t *)x)==((uint32_t *)LPC_RTC))

Macro to determine if it is valid RTC peripheral

Definition at line 202 of file lpc17xx_rtc.h.

#define RTC_AMR_AMRDOM ((1<<3))

Counter Increment Select Mask bit for day of month

Definition at line 108 of file lpc17xx_rtc.h.

#define RTC_AMR_AMRDOW ((1<<4))

Counter Increment Select Mask bit for day of week

Definition at line 110 of file lpc17xx_rtc.h.

#define RTC_AMR_AMRDOY ((1<<5))

Counter Increment Select Mask bit for day of year

Definition at line 112 of file lpc17xx_rtc.h.

#define RTC_AMR_AMRHOUR ((1<<2))

Counter Increment Select Mask bit for hour

Definition at line 106 of file lpc17xx_rtc.h.

#define RTC_AMR_AMRMIN ((1<<1))

Counter Increment Select Mask bit for minute

Definition at line 104 of file lpc17xx_rtc.h.

#define RTC_AMR_AMRMON ((1<<6))

Counter Increment Select Mask bit for month

Definition at line 114 of file lpc17xx_rtc.h.

#define RTC_AMR_AMRSEC ((1<<0))

Counter Increment Select Mask bit for second

Definition at line 102 of file lpc17xx_rtc.h.

#define RTC_AMR_AMRYEAR ((1<<7))

Counter Increment Select Mask bit for year

Definition at line 116 of file lpc17xx_rtc.h.

#define RTC_AMR_BITMASK ((0xFF))

AMR bit mask

Definition at line 118 of file lpc17xx_rtc.h.

#define RTC_AUX_RTC_OSCF ((1<<4))

RTC Oscillator Fail detect flag

Definition at line 124 of file lpc17xx_rtc.h.

#define RTC_AUXEN_RTC_OSCFEN ((1<<4))

Oscillator Fail Detect interrupt enable

Definition at line 130 of file lpc17xx_rtc.h.

#define RTC_CALIB_DIR_BACKWARD ((uint8_t)(1))

Definition at line 197 of file lpc17xx_rtc.h.

#define RTC_CALIB_DIR_FORWARD ((uint8_t)(0))

Calibration definitions

Definition at line 196 of file lpc17xx_rtc.h.

#define RTC_CALIBRATION_CALVAL_MASK ((0x1FFFF))

Calibration value

Definition at line 190 of file lpc17xx_rtc.h.

#define RTC_CALIBRATION_LIBDIR ((1<<17))

Calibration direction

Definition at line 192 of file lpc17xx_rtc.h.

#define RTC_CALIBRATION_MAX ((0x20000))

Calibration max value

Definition at line 194 of file lpc17xx_rtc.h.

#define RTC_CCR_BITMASK ((0x00000013))

CCR register mask

Definition at line 68 of file lpc17xx_rtc.h.

#define RTC_CCR_CCALEN ((1<<4))

Calibration counter enable

Definition at line 74 of file lpc17xx_rtc.h.

#define RTC_CCR_CLKEN ((1<<0))

Clock enable

Definition at line 70 of file lpc17xx_rtc.h.

#define RTC_CCR_CTCRST ((1<<1))

Clock reset

Definition at line 72 of file lpc17xx_rtc.h.

#define RTC_CIIR_BITMASK ((0xFF))

CIIR bit mask

Definition at line 96 of file lpc17xx_rtc.h.

#define RTC_CIIR_IMDOM ((1<<3))

Counter Increment Interrupt bit for day of month

Definition at line 86 of file lpc17xx_rtc.h.

#define RTC_CIIR_IMDOW ((1<<4))

Counter Increment Interrupt bit for day of week

Definition at line 88 of file lpc17xx_rtc.h.

#define RTC_CIIR_IMDOY ((1<<5))

Counter Increment Interrupt bit for day of year

Definition at line 90 of file lpc17xx_rtc.h.

#define RTC_CIIR_IMHOUR ((1<<2))

Counter Increment Interrupt bit for hour

Definition at line 84 of file lpc17xx_rtc.h.

#define RTC_CIIR_IMMIN ((1<<1))

Counter Increment Interrupt bit for minute

Definition at line 82 of file lpc17xx_rtc.h.

#define RTC_CIIR_IMMON ((1<<6))

Counter Increment Interrupt bit for month

Definition at line 92 of file lpc17xx_rtc.h.

#define RTC_CIIR_IMSEC ((1<<0))

Counter Increment Interrupt bit for second

Definition at line 80 of file lpc17xx_rtc.h.

#define RTC_CIIR_IMYEAR ((1<<7))

Counter Increment Interrupt bit for year

Definition at line 94 of file lpc17xx_rtc.h.

#define RTC_CTIME0_DOW_MASK ((0x7000000))

Definition at line 139 of file lpc17xx_rtc.h.

#define RTC_CTIME0_HOURS_MASK ((0x1F0000))

Definition at line 138 of file lpc17xx_rtc.h.

#define RTC_CTIME0_MINUTES_MASK ((0x3F00))

Definition at line 137 of file lpc17xx_rtc.h.

#define RTC_CTIME0_SECONDS_MASK ((0x3F))

Definition at line 136 of file lpc17xx_rtc.h.

#define RTC_CTIME1_DOM_MASK ((0x1F))

Definition at line 144 of file lpc17xx_rtc.h.

#define RTC_CTIME1_MONTH_MASK ((0xF00))

Definition at line 145 of file lpc17xx_rtc.h.

#define RTC_CTIME1_YEAR_MASK ((0xFFF0000))

Definition at line 146 of file lpc17xx_rtc.h.

#define RTC_CTIME2_DOY_MASK ((0xFFF))

Definition at line 151 of file lpc17xx_rtc.h.

#define RTC_DAYOFMONTH_MAX 31

Maximum value of day of month

Definition at line 179 of file lpc17xx_rtc.h.

#define RTC_DAYOFMONTH_MIN 1

Minimum value of day of month

Definition at line 178 of file lpc17xx_rtc.h.

#define RTC_DAYOFWEEK_MAX 6

Maximum value of day of week

Definition at line 180 of file lpc17xx_rtc.h.

#define RTC_DAYOFYEAR_MAX 366

Maximum value of day of year

Definition at line 182 of file lpc17xx_rtc.h.

#define RTC_DAYOFYEAR_MIN 1

Minimum value of day of year

Definition at line 181 of file lpc17xx_rtc.h.

#define RTC_DOM_MASK (0x0000001F)

DOM register mask

Definition at line 163 of file lpc17xx_rtc.h.

#define RTC_DOW_MASK (0x00000007)

DOW register mask

Definition at line 165 of file lpc17xx_rtc.h.

#define RTC_DOY_MASK (0x000001FF)

DOY register mask

Definition at line 167 of file lpc17xx_rtc.h.

#define RTC_HOUR_MASK (0x0000001F)

HOUR register mask

Definition at line 161 of file lpc17xx_rtc.h.

#define RTC_HOUR_MAX 23

Maximum value of hour

Definition at line 175 of file lpc17xx_rtc.h.

#define RTC_ILR_BITMASK ((0x00000003))

ILR register mask

Definition at line 58 of file lpc17xx_rtc.h.

#define RTC_IRL_RTCALF ((1<<1))

Bit inform the source interrupt is alarm match

Definition at line 62 of file lpc17xx_rtc.h.

#define RTC_IRL_RTCCIF ((1<<0))

Bit inform the source interrupt is counter increment

Definition at line 60 of file lpc17xx_rtc.h.

#define RTC_MIN_MASK (0x0000003F)

MIN register mask

Definition at line 159 of file lpc17xx_rtc.h.

#define RTC_MINUTE_MAX 59

Maximum value of minute

Definition at line 174 of file lpc17xx_rtc.h.

#define RTC_MONTH_MASK (0x0000000F)

MONTH register mask

Definition at line 169 of file lpc17xx_rtc.h.

#define RTC_MONTH_MAX 12

Maximum value of month

Definition at line 177 of file lpc17xx_rtc.h.

#define RTC_MONTH_MIN 1

Minimum value of month

Definition at line 176 of file lpc17xx_rtc.h.

#define RTC_SEC_MASK (0x0000003F)

SEC register mask

Definition at line 157 of file lpc17xx_rtc.h.

#define RTC_SECOND_MAX 59

Maximum value of second

Definition at line 173 of file lpc17xx_rtc.h.

#define RTC_YEAR_MASK (0x00000FFF)

YEAR register mask

Definition at line 171 of file lpc17xx_rtc.h.

#define RTC_YEAR_MAX 4095

Maximum value of year

Definition at line 183 of file lpc17xx_rtc.h.

Generated on Tue Jun 7 14:59:38 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: RTC Public Types

RTC Public Types
[RTC]

Data Structures

struct | RTC_TIME_Type
Time structure definitions for easy manipulate the data. More...

Enumerations

enum | RTC_INT_OPT { RTC_INT_COUNTER_INCREASE = RTC_IRL_RTCCIF, RTC_INT_ALARM = RTC_IRL_RTCALF }
RTC interrupt source. More...
enum RTC_TIMETYPE_Num {
RTC_TIMETYPE_SECOND = 0, RTC_TIMETYPE_MINUTE = 1, RTC_TIMETYPE_HOUR = 2, RTC_TIMETYPE_DAYOFWEEK = 3,
RTC_TIMETYPE_DAYOFMONTH = 4, RTC_TIMETYPE_DAYOFYEAR = 5, RTC_TIMETYPE_MONTH = 6, RTC_TIMETYPE_YEAR = 7
}
RTC time type option. More...

Enumeration Type Documentation

enum RTC_INT_OPT

RTC interrupt source.

Enumerator:
RTC_INT_COUNTER_INCREASE | Counter Increment Interrupt
RTC_INT_ALARM | The alarm interrupt

Definition at line 242 of file lpc17xx_rtc.h.

enum RTC_TIMETYPE_Num

RTC time type option.

Enumerator:
RTC_TIMETYPE_SECOND | Second
RTC_TIMETYPE_MINUTE | Month
RTC_TIMETYPE_HOUR | Hour
RTC_TIMETYPE_DAYOFWEEK | Day of week
RTC_TIMETYPE_DAYOFMONTH | Day of month
RTC_TIMETYPE_DAYOFYEAR | Day of year
RTC_TIMETYPE_MONTH | Month
RTC_TIMETYPE_YEAR | Year

Definition at line 249 of file lpc17xx_rtc.h.

Generated on Tue Jun 7 14:59:38 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: RTC Public Functions

RTC Public Functions
[RTC]

Functions

void | RTC_Init (LPC_RTC_TypeDef *RTCx)
Initializes the RTC peripheral.
void | RTC_DeInit (LPC_RTC_TypeDef *RTCx)
De-initializes the RTC peripheral registers to their default reset values.
void | RTC_ResetClockTickCounter (LPC_RTC_TypeDef *RTCx)
Reset clock tick counter in RTC peripheral.
void | RTC_Cmd (LPC_RTC_TypeDef *RTCx, FunctionalState NewState)
Start/Stop RTC peripheral.
void | RTC_CntIncrIntConfig (LPC_RTC_TypeDef *RTCx, uint32_t CntIncrIntType, FunctionalState NewState)
Enable/Disable Counter increment interrupt for each time type in RTC peripheral.
void | RTC_AlarmIntConfig (LPC_RTC_TypeDef *RTCx, uint32_t AlarmTimeType, FunctionalState NewState)
Enable/Disable Alarm interrupt for each time type in RTC peripheral.
void | RTC_SetTime (LPC_RTC_TypeDef *RTCx, uint32_t Timetype, uint32_t TimeValue)
Set current time value for each time type in RTC peripheral.
uint32_t | RTC_GetTime (LPC_RTC_TypeDef *RTCx, uint32_t Timetype)
Get current time value for each type time type.
void | RTC_SetFullTime (LPC_RTC_TypeDef *RTCx, RTC_TIME_Type *pFullTime)
Set full of time in RTC peripheral.
void | RTC_GetFullTime (LPC_RTC_TypeDef *RTCx, RTC_TIME_Type *pFullTime)
Get full of time in RTC peripheral.
void | RTC_SetAlarmTime (LPC_RTC_TypeDef *RTCx, uint32_t Timetype, uint32_t ALValue)
Set alarm time value for each time type.
uint32_t | RTC_GetAlarmTime (LPC_RTC_TypeDef *RTCx, uint32_t Timetype)
Get alarm time value for each time type.
void | RTC_SetFullAlarmTime (LPC_RTC_TypeDef *RTCx, RTC_TIME_Type *pFullTime)
Set full of alarm time in RTC peripheral.
void | RTC_GetFullAlarmTime (LPC_RTC_TypeDef *RTCx, RTC_TIME_Type *pFullTime)
Get full of alarm time in RTC peripheral.
IntStatus | RTC_GetIntPending (LPC_RTC_TypeDef *RTCx, uint32_t IntType)
Check whether if specified Location interrupt in RTC peripheral is set or not.
void | RTC_ClearIntPending (LPC_RTC_TypeDef *RTCx, uint32_t IntType)
Clear specified Location interrupt pending in RTC peripheral.
void | RTC_CalibCounterCmd (LPC_RTC_TypeDef *RTCx, FunctionalState NewState)
Enable/Disable calibration counter in RTC peripheral.
void | RTC_CalibConfig (LPC_RTC_TypeDef *RTCx, uint32_t CalibValue, uint8_t CalibDir)
Configures Calibration in RTC peripheral.
void | RTC_WriteGPREG (LPC_RTC_TypeDef *RTCx, uint8_t Channel, uint32_t Value)
Write value to General purpose registers.
uint32_t | RTC_ReadGPREG (LPC_RTC_TypeDef *RTCx, uint8_t Channel)
Read value from General purpose registers.

Function Documentation

void RTC_AlarmIntConfig | ( | LPC_RTC_TypeDef * | RTCx,
 |  | uint32_t | AlarmTimeType,
 |  | FunctionalState | NewState
 | ) |  |

Enable/Disable Alarm interrupt for each time type in RTC peripheral.

Parameters:
[in] RTCx RTC peripheral selected, should be LPC_RTC
[in] AlarmTimeType,: Alarm Time Interrupt type, an matching of this type value below with current time in RTC will generates an interrupt, should be:
  • RTC_TIMETYPE_SECOND
  • RTC_TIMETYPE_MINUTE
  • RTC_TIMETYPE_HOUR
  • RTC_TIMETYPE_DAYOFWEEK
  • RTC_TIMETYPE_DAYOFMONTH
  • RTC_TIMETYPE_DAYOFYEAR
  • RTC_TIMETYPE_MONTH
  • RTC_TIMETYPE_YEAR
[in] NewState New State of this function, should be:
  • ENABLE: Alarm interrupt for this time type are enabled
  • DISABLE: Alarm interrupt for this time type are disabled
Returns:
None

Definition at line 242 of file lpc17xx_rtc.c.

void RTC_CalibConfig | ( | LPC_RTC_TypeDef * | RTCx,
 |  | uint32_t | CalibValue,
 |  | uint8_t | CalibDir
 | ) |  |

Configures Calibration in RTC peripheral.

Parameters:
[in] | RTCx | RTC peripheral selected, should be LPC_RTC
[in] | CalibValue | Calibration value, should be in range from 0 to 131,072
[in] CalibDir Calibration Direction, should be:
  • RTC_CALIB_DIR_FORWARD: Forward calibration
  • RTC_CALIB_DIR_BACKWARD: Backward calibration
Returns:
None

Definition at line 707 of file lpc17xx_rtc.c.

void RTC_CalibCounterCmd | ( | LPC_RTC_TypeDef * | RTCx,
 |  | FunctionalState | NewState
 | ) |  |

Enable/Disable calibration counter in RTC peripheral.

Parameters:
[in] RTCx RTC peripheral selected, should be LPC_RTC
[in] NewState New State of this function, should be:
  • ENABLE: The calibration counter is enabled and counting
  • DISABLE: The calibration counter is disabled and reset to zero
Returns:
None

Definition at line 681 of file lpc17xx_rtc.c.

void RTC_ClearIntPending | ( | LPC_RTC_TypeDef * | RTCx,
 |  | uint32_t | IntType
 | ) |  |

Clear specified Location interrupt pending in RTC peripheral.

Parameters:
[in] RTCx RTC peripheral selected, should be LPC_RTC
[in] IntType Interrupt location type, should be:
  • RTC_INT_COUNTER_INCREASE: Clear Counter Increment Interrupt pending.
  • RTC_INT_ALARM: Clear alarm interrupt pending
Returns:
None

Definition at line 665 of file lpc17xx_rtc.c.

void RTC_Cmd | ( | LPC_RTC_TypeDef * | RTCx,
 |  | FunctionalState | NewState
 | ) |  |

Start/Stop RTC peripheral.

Parameters:
[in] RTCx RTC peripheral selected, should be LPC_RTC
[in] NewState New State of this function, should be:
  • ENABLE: The time counters are enabled
  • DISABLE: The time counters are disabled
Returns:
None

Definition at line 112 of file lpc17xx_rtc.c.

void RTC_CntIncrIntConfig | ( | LPC_RTC_TypeDef * | RTCx,
 |  | uint32_t | CntIncrIntType,
 |  | FunctionalState | NewState
 | ) |  |

Enable/Disable Counter increment interrupt for each time type in RTC peripheral.

Parameters:
[in] RTCx RTC peripheral selected, should be LPC_RTC
[in] CntIncrIntType,: Counter Increment Interrupt type, an increment of this type value below will generates an interrupt, should be:
  • RTC_TIMETYPE_SECOND
  • RTC_TIMETYPE_MINUTE
  • RTC_TIMETYPE_HOUR
  • RTC_TIMETYPE_DAYOFWEEK
  • RTC_TIMETYPE_DAYOFMONTH
  • RTC_TIMETYPE_DAYOFYEAR
  • RTC_TIMETYPE_MONTH
  • RTC_TIMETYPE_YEAR
[in] NewState New State of this function, should be:
  • ENABLE: Counter Increment interrupt for this time type are enabled
  • DISABLE: Counter Increment interrupt for this time type are disabled
Returns:
None

Definition at line 150 of file lpc17xx_rtc.c.

void RTC_DeInit ( LPC_RTC_TypeDef * RTCx )

De-initializes the RTC peripheral registers to their default reset values.

Parameters:
[in] RTCx RTC peripheral selected, should be LPC_RTC
Returns:
None

Definition at line 82 of file lpc17xx_rtc.c.

uint32_t RTC_GetAlarmTime | ( | LPC_RTC_TypeDef * | RTCx,
 |  | uint32_t | Timetype
 | ) |  |

Get alarm time value for each time type.

Parameters:
[in] RTCx RTC peripheral selected, should be LPC_RTC
[in] Timetype,: Time Type, should be:
  • RTC_TIMETYPE_SECOND
  • RTC_TIMETYPE_MINUTE
  • RTC_TIMETYPE_HOUR
  • RTC_TIMETYPE_DAYOFWEEK
  • RTC_TIMETYPE_DAYOFMONTH
  • RTC_TIMETYPE_DAYOFYEAR
  • RTC_TIMETYPE_MONTH
  • RTC_TIMETYPE_YEAR
Returns:
Value of Alarm time according to specified time type

Definition at line 564 of file lpc17xx_rtc.c.

void RTC_GetFullAlarmTime | ( | LPC_RTC_TypeDef * | RTCx,
 |  | RTC_TIME_Type * | pFullTime
 | ) |  |

Get full of alarm time in RTC peripheral.

Parameters:
[in] | RTCx | RTC peripheral selected, should be LPC_RTC
[in] | pFullTime | Pointer to a RTC_TIME_Type structure that will be stored alarm time in full.
Returns:
None

Definition at line 619 of file lpc17xx_rtc.c.

void RTC_GetFullTime | ( | LPC_RTC_TypeDef * | RTCx,
 |  | RTC_TIME_Type * | pFullTime
 | ) |  |

Get full of time in RTC peripheral.

Parameters:
[in] | RTCx | RTC peripheral selected, should be LPC_RTC
[in] | pFullTime | Pointer to a RTC_TIME_Type structure that will be stored time in full.
Returns:
None

Definition at line 459 of file lpc17xx_rtc.c.

IntStatus RTC_GetIntPending | ( | LPC_RTC_TypeDef * | RTCx,
 |  | uint32_t | IntType
 | ) |  |

Check whether if specified Location interrupt in RTC peripheral is set or not.

Parameters:
[in] RTCx RTC peripheral selected, should be LPC_RTC
[in] IntType Interrupt location type, should be:
  • RTC_INT_COUNTER_INCREASE: Counter Increment Interrupt block generated an interrupt.
  • RTC_INT_ALARM: Alarm generated an interrupt.
Returns:
New state of specified Location interrupt in RTC peripheral (SET or RESET)

Definition at line 646 of file lpc17xx_rtc.c.

uint32_t RTC_GetTime | ( | LPC_RTC_TypeDef * | RTCx,
 |  | uint32_t | Timetype
 | ) |  |

Get current time value for each type time type.

Parameters:
[in] RTCx RTC peripheral selected, should be LPC_RTC
[in] Timetype,: Time Type, should be:
  • RTC_TIMETYPE_SECOND
  • RTC_TIMETYPE_MINUTE
  • RTC_TIMETYPE_HOUR
  • RTC_TIMETYPE_DAYOFWEEK
  • RTC_TIMETYPE_DAYOFMONTH
  • RTC_TIMETYPE_DAYOFYEAR
  • RTC_TIMETYPE_MONTH
  • RTC_TIMETYPE_YEAR
Returns:
Value of time according to specified time type

Definition at line 401 of file lpc17xx_rtc.c.

void RTC_Init ( LPC_RTC_TypeDef * RTCx )

Initializes the RTC peripheral.

Parameters:
[in] RTCx RTC peripheral selected, should be LPC_RTC
Returns:
None

Definition at line 60 of file lpc17xx_rtc.c.

uint32_t RTC_ReadGPREG | ( | LPC_RTC_TypeDef * | RTCx,
 |  | uint8_t | Channel
 | ) |  |

Read value from General purpose registers.

Parameters:
[in] | RTCx | RTC peripheral selected, should be LPC_RTC
[in] | Channel | General purpose registers Channel number, should be in range from 0 to 4.
Returns:
Read Value Note: These General purpose registers can be used to store important information when the main power supply is off. The value in these registers is not affected by chip reset.

Definition at line 752 of file lpc17xx_rtc.c.

void RTC_ResetClockTickCounter ( LPC_RTC_TypeDef * RTCx )

Reset clock tick counter in RTC peripheral.

Parameters:
[in] RTCx RTC peripheral selected, should be LPC_RTC
Returns:
None

Definition at line 96 of file lpc17xx_rtc.c.

void RTC_SetAlarmTime | ( | LPC_RTC_TypeDef * | RTCx,
 |  | uint32_t | Timetype,
 |  | uint32_t | ALValue
 | ) |  |

Set alarm time value for each time type.

Parameters:
[in] | RTCx | RTC peripheral selected, should be LPC_RTC
[in] Timetype,: Time Type, should be:
  • RTC_TIMETYPE_SECOND
  • RTC_TIMETYPE_MINUTE
  • RTC_TIMETYPE_HOUR
  • RTC_TIMETYPE_DAYOFWEEK
  • RTC_TIMETYPE_DAYOFMONTH
  • RTC_TIMETYPE_DAYOFYEAR
  • RTC_TIMETYPE_MONTH
  • RTC_TIMETYPE_YEAR
[in] | ALValue | Alarm time value to set
Returns:
None

Definition at line 489 of file lpc17xx_rtc.c.

void RTC_SetFullAlarmTime | ( | LPC_RTC_TypeDef * | RTCx,
 |  | RTC_TIME_Type * | pFullTime
 | ) |  |

Set full of alarm time in RTC peripheral.

Parameters:
[in] | RTCx | RTC peripheral selected, should be LPC_RTC
[in] | pFullTime | Pointer to a RTC_TIME_Type structure that contains alarm time value in full.
Returns:
None

Definition at line 597 of file lpc17xx_rtc.c.

void RTC_SetFullTime | ( | LPC_RTC_TypeDef * | RTCx,
 |  | RTC_TIME_Type * | pFullTime
 | ) |  |

Set full of time in RTC peripheral.

Parameters:
[in] | RTCx | RTC peripheral selected, should be LPC_RTC
[in] | pFullTime | Pointer to a RTC_TIME_Type structure that contains time value in full.
Returns:
None

Definition at line 437 of file lpc17xx_rtc.c.

void RTC_SetTime | ( | LPC_RTC_TypeDef * | RTCx,
 |  | uint32_t | Timetype,
 |  | uint32_t | TimeValue
 | ) |  |

Set current time value for each time type in RTC peripheral.

Parameters:
[in] | RTCx | RTC peripheral selected, should be LPC_RTC
[in] Timetype,: Time Type, should be:
  • RTC_TIMETYPE_SECOND
  • RTC_TIMETYPE_MINUTE
  • RTC_TIMETYPE_HOUR
  • RTC_TIMETYPE_DAYOFWEEK
  • RTC_TIMETYPE_DAYOFMONTH
  • RTC_TIMETYPE_DAYOFYEAR
  • RTC_TIMETYPE_MONTH
  • RTC_TIMETYPE_YEAR
[in] | TimeValue | Time value to set
Returns:
None

Definition at line 327 of file lpc17xx_rtc.c.

void RTC_WriteGPREG | ( | LPC_RTC_TypeDef * | RTCx,
 |  | uint8_t | Channel,
 |  | uint32_t | Value
 | ) |  |

Write value to General purpose registers.

Parameters:
[in] | RTCx | RTC peripheral selected, should be LPC_RTC
[in] | Channel | General purpose registers Channel number, should be in range from 0 to 4.
[in] | Value | Value to write
Returns:
None Note: These General purpose registers can be used to store important information when the main power supply is off. The value in these registers is not affected by chip reset.

Definition at line 729 of file lpc17xx_rtc.c.

Generated on Tue Jun 7 14:59:38 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: SPI

SPI
[LPC1700CMSIS Firmware Library]

Modules

SPI Public Macros
SPI Private Macros
SPI Public Types
SPI Public Functions
Generated on Tue Jun 7 14:59:38 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: SPI Public Macros

SPI Public Macros
[SPI]

Defines

#define | SPI_CPHA_FIRST ((uint32_t)(0))
#define | SPI_CPHA_SECOND ((uint32_t)(1<<3))
#define | SPI_CPOL_HI ((uint32_t)(0))
#define | SPI_CPOL_LO ((uint32_t)(1<<4))
#define | SPI_SLAVE_MODE ((uint32_t)(0))
#define | SPI_MASTER_MODE ((uint32_t)(1<<5))
#define | SPI_DATA_MSB_FIRST ((uint32_t)(0))
#define | SPI_DATA_LSB_FIRST ((uint32_t)(1<<6))
#define | SPI_DATABIT_16 SPI_SPCR_BITS(0)
#define | SPI_DATABIT_8 SPI_SPCR_BITS(0x08)
#define | SPI_DATABIT_9 SPI_SPCR_BITS(0x09)
#define | SPI_DATABIT_10 SPI_SPCR_BITS(0x0A)
#define | SPI_DATABIT_11 SPI_SPCR_BITS(0x0B)
#define | SPI_DATABIT_12 SPI_SPCR_BITS(0x0C)
#define | SPI_DATABIT_13 SPI_SPCR_BITS(0x0D)
#define | SPI_DATABIT_14 SPI_SPCR_BITS(0x0E)
#define | SPI_DATABIT_15 SPI_SPCR_BITS(0x0F)
#define | SPI_STAT_ABRT SPI_SPSR_ABRT
#define | SPI_STAT_MODF SPI_SPSR_MODF
#define | SPI_STAT_ROVR SPI_SPSR_ROVR
#define | SPI_STAT_WCOL SPI_SPSR_WCOL
#define | SPI_STAT_SPIF SPI_SPSR_SPIF
#define | SPI_STAT_DONE (1UL<<8)
#define | SPI_STAT_ERROR (1UL<<9)

Define Documentation

#define SPI_CPHA_FIRST ((uint32_t)(0))

SPI configuration parameter defines Clock phase control bit

Definition at line 55 of file lpc17xx_spi.h.

#define SPI_CPHA_SECOND ((uint32_t)(1<<3))

Definition at line 56 of file lpc17xx_spi.h.

#define SPI_CPOL_HI ((uint32_t)(0))

Clock polarity control bit

Definition at line 59 of file lpc17xx_spi.h.

#define SPI_CPOL_LO ((uint32_t)(1<<4))

Definition at line 60 of file lpc17xx_spi.h.

#define SPI_DATA_LSB_FIRST ((uint32_t)(1<<6))

Definition at line 68 of file lpc17xx_spi.h.

#define SPI_DATA_MSB_FIRST ((uint32_t)(0))

LSB enable bit

Definition at line 67 of file lpc17xx_spi.h.

#define SPI_DATABIT_10 SPI_SPCR_BITS(0x0A)

Databit number = 10

Definition at line 74 of file lpc17xx_spi.h.

#define SPI_DATABIT_11 SPI_SPCR_BITS(0x0B)

Databit number = 11

Definition at line 75 of file lpc17xx_spi.h.

#define SPI_DATABIT_12 SPI_SPCR_BITS(0x0C)

Databit number = 12

Definition at line 76 of file lpc17xx_spi.h.

#define SPI_DATABIT_13 SPI_SPCR_BITS(0x0D)

Databit number = 13

Definition at line 77 of file lpc17xx_spi.h.

#define SPI_DATABIT_14 SPI_SPCR_BITS(0x0E)

Databit number = 14

Definition at line 78 of file lpc17xx_spi.h.

#define SPI_DATABIT_15 SPI_SPCR_BITS(0x0F)

Databit number = 15

Definition at line 79 of file lpc17xx_spi.h.

#define SPI_DATABIT_16 SPI_SPCR_BITS(0)

SPI data bit number defines Databit number = 16

Definition at line 71 of file lpc17xx_spi.h.

#define SPI_DATABIT_8 SPI_SPCR_BITS(0x08)

Databit number = 8

Definition at line 72 of file lpc17xx_spi.h.

#define SPI_DATABIT_9 SPI_SPCR_BITS(0x09)

Databit number = 9

Definition at line 73 of file lpc17xx_spi.h.

#define SPI_MASTER_MODE ((uint32_t)(1<<5))

Definition at line 64 of file lpc17xx_spi.h.

#define SPI_SLAVE_MODE ((uint32_t)(0))

SPI master mode enable

Definition at line 63 of file lpc17xx_spi.h.

#define SPI_STAT_ABRT SPI_SPSR_ABRT

SPI Status Flag defines Slave abort

Definition at line 85 of file lpc17xx_spi.h.

#define SPI_STAT_DONE (1UL<<8)

Done

Definition at line 96 of file lpc17xx_spi.h.

#define SPI_STAT_ERROR (1UL<<9)

Error

Definition at line 97 of file lpc17xx_spi.h.

#define SPI_STAT_MODF SPI_SPSR_MODF

Mode fault

Definition at line 87 of file lpc17xx_spi.h.

#define SPI_STAT_ROVR SPI_SPSR_ROVR

Read overrun

Definition at line 89 of file lpc17xx_spi.h.

#define SPI_STAT_SPIF SPI_SPSR_SPIF

SPI transfer complete flag

Definition at line 93 of file lpc17xx_spi.h.

#define SPI_STAT_WCOL SPI_SPSR_WCOL

Write collision

Definition at line 91 of file lpc17xx_spi.h.

Generated on Tue Jun 7 14:59:38 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: SPI Private Macros

SPI Private Macros
[SPI]

Defines

#define | SPI_SPCR_BIT_EN ((uint32_t)(1<<2))
#define | SPI_SPCR_CPHA_SECOND ((uint32_t)(1<<3))
#define | SPI_SPCR_CPOL_LOW ((uint32_t)(1<<4))
#define | SPI_SPCR_MSTR ((uint32_t)(1<<5))
#define | SPI_SPCR_LSBF ((uint32_t)(1<<6))
#define | SPI_SPCR_SPIE ((uint32_t)(1<<7))
#define | SPI_SPCR_BITS(n) ((n==0) ? ((uint32_t)0) : ((uint32_t)((n&0x0F)<<8)))
#define | SPI_SPCR_BITMASK ((uint32_t)(0xFFC))
#define | SPI_SPSR_ABRT ((uint32_t)(1<<3))
#define | SPI_SPSR_MODF ((uint32_t)(1<<4))
#define | SPI_SPSR_ROVR ((uint32_t)(1<<5))
#define | SPI_SPSR_WCOL ((uint32_t)(1<<6))
#define | SPI_SPSR_SPIF ((uint32_t)(1<<7))
#define | SPI_SPSR_BITMASK ((uint32_t)(0xF8))
#define | SPI_SPDR_LO_MASK ((uint32_t)(0xFF))
#define | SPI_SPDR_HI_MASK ((uint32_t)(0xFF00))
#define | SPI_SPDR_BITMASK ((uint32_t)(0xFFFF))
#define | SPI_SPCCR_COUNTER(n) ((uint32_t)(n&0xFF))
#define | SPI_SPCCR_BITMASK ((uint32_t)(0xFF))
#define | SPI_SPTCR_TEST_MASK ((uint32_t)(0xFE))
#define | SPI_SPTCR_BITMASK ((uint32_t)(0xFE))
#define | SPI_SPTSR_ABRT ((uint32_t)(1<<3))
#define | SPI_SPTSR_MODF ((uint32_t)(1<<4))
#define | SPI_SPTSR_ROVR ((uint32_t)(1<<5))
#define | SPI_SPTSR_WCOL ((uint32_t)(1<<6))
#define | SPI_SPTSR_SPIF ((uint32_t)(1<<7))
#define | SPI_SPTSR_MASKBIT ((uint32_t)(0xF8))
#define | SPI_SPINT_INTFLAG ((uint32_t)(1<<0))
#define | SPI_SPINT_BITMASK ((uint32_t)(0x01))
#define | PARAM_SPIx(n) (((uint32_t *)n)==((uint32_t *)LPC_SPI))
#define | PARAM_SPI_CPHA(n) ((n==SPI_CPHA_FIRST) || (n==SPI_CPHA_SECOND))
#define | PARAM_SPI_CPOL(n) ((n==SPI_CPOL_HI) || (n==SPI_CPOL_LO))
#define | PARAM_SPI_MODE(n) ((n==SPI_SLAVE_MODE) || (n==SPI_MASTER_MODE))
#define | PARAM_SPI_DATA_ORDER(n) ((n==SPI_DATA_MSB_FIRST) || (n==SPI_DATA_LSB_FIRST))
#define | PARAM_SPI_DATABIT(n)
#define | PARAM_SPI_STAT(n)

Define Documentation

#define PARAM_SPI_CPHA ( n ) ((n==SPI_CPHA_FIRST) || (n==SPI_CPHA_SECOND))

Macro check Clock phase control mode

Definition at line 204 of file lpc17xx_spi.h.

#define PARAM_SPI_CPOL ( n ) ((n==SPI_CPOL_HI) || (n==SPI_CPOL_LO))

Macro check Clock polarity control mode

Definition at line 207 of file lpc17xx_spi.h.

#define PARAM_SPI_DATA_ORDER ( n ) ((n==SPI_DATA_MSB_FIRST) || (n==SPI_DATA_LSB_FIRST))

Macro check LSB/MSB mode

Definition at line 213 of file lpc17xx_spi.h.

#define PARAM_SPI_DATABIT ( n )

Value:

((n==SPI_DATABIT_16) || (n==SPI_DATABIT_8) \
|| (n==SPI_DATABIT_9) || (n==SPI_DATABIT_10) \
|| (n==SPI_DATABIT_11) || (n==SPI_DATABIT_12) \
|| (n==SPI_DATABIT_13) || (n==SPI_DATABIT_14) \
|| (n==SPI_DATABIT_15))
Macro check databit value

Definition at line 216 of file lpc17xx_spi.h.

#define PARAM_SPI_MODE ( n ) ((n==SPI_SLAVE_MODE) || (n==SPI_MASTER_MODE))

Macro check master/slave mode

Definition at line 210 of file lpc17xx_spi.h.

#define PARAM_SPI_STAT ( n )

Value:

((n==SPI_STAT_ABRT) || (n==SPI_STAT_MODF) \
|| (n==SPI_STAT_ROVR) || (n==SPI_STAT_WCOL) \
|| (n==SPI_STAT_SPIF))
Macro check status flag

Definition at line 223 of file lpc17xx_spi.h.

#define PARAM_SPIx ( n ) (((uint32_t *)n)==((uint32_t *)LPC_SPI))

Macro to determine if it is valid SPI port number

Definition at line 201 of file lpc17xx_spi.h.

#define SPI_SPCCR_BITMASK ((uint32_t)(0xFF))

SPI clock counter bit-mask

Definition at line 164 of file lpc17xx_spi.h.

#define SPI_SPCCR_COUNTER ( n ) ((uint32_t)(n&0xFF))

Macro defines for SPI Clock Counter Register SPI clock counter setting

Definition at line 162 of file lpc17xx_spi.h.

#define SPI_SPCR_BIT_EN ((uint32_t)(1<<2))

Macro defines for SPI Control Register Bit enable, the SPI controller sends and receives the number of bits selected by bits 11:8

Definition at line 115 of file lpc17xx_spi.h.

#define SPI_SPCR_BITMASK ((uint32_t)(0xFFC))

SPI Control bit mask

Definition at line 130 of file lpc17xx_spi.h.

#define SPI_SPCR_BITS ( n ) ((n==0) ? ((uint32_t)0) : ((uint32_t)((n&0x0F)<<8)))

When bit 2 of this register is 1, this field controls the number of bits per transfer

Definition at line 128 of file lpc17xx_spi.h.

#define SPI_SPCR_CPHA_SECOND ((uint32_t)(1<<3))

Clock phase control bit

Definition at line 117 of file lpc17xx_spi.h.

#define SPI_SPCR_CPOL_LOW ((uint32_t)(1<<4))

Clock polarity control bit

Definition at line 119 of file lpc17xx_spi.h.

#define SPI_SPCR_LSBF ((uint32_t)(1<<6))

LSB enable bit

Definition at line 123 of file lpc17xx_spi.h.

#define SPI_SPCR_MSTR ((uint32_t)(1<<5))

SPI master mode enable

Definition at line 121 of file lpc17xx_spi.h.

#define SPI_SPCR_SPIE ((uint32_t)(1<<7))

SPI interrupt enable bit

Definition at line 125 of file lpc17xx_spi.h.

#define SPI_SPDR_BITMASK ((uint32_t)(0xFFFF))

SPI Data bit-mask

Definition at line 156 of file lpc17xx_spi.h.

#define SPI_SPDR_HI_MASK ((uint32_t)(0xFF00))

SPI Data high bit-mask

Definition at line 154 of file lpc17xx_spi.h.

#define SPI_SPDR_LO_MASK ((uint32_t)(0xFF))

Macro defines for SPI Data Register SPI Data low bit-mask

Definition at line 152 of file lpc17xx_spi.h.

#define SPI_SPINT_BITMASK ((uint32_t)(0x01))

SPI interrupt register bit mask

Definition at line 196 of file lpc17xx_spi.h.

#define SPI_SPINT_INTFLAG ((uint32_t)(1<<0))

Macro defines for SPI Interrupt Register SPI interrupt flag

Definition at line 194 of file lpc17xx_spi.h.

#define SPI_SPSR_ABRT ((uint32_t)(1<<3))

Macro defines for SPI Status Register Slave abort

Definition at line 136 of file lpc17xx_spi.h.

#define SPI_SPSR_BITMASK ((uint32_t)(0xF8))

SPI Status bit mask

Definition at line 146 of file lpc17xx_spi.h.

#define SPI_SPSR_MODF ((uint32_t)(1<<4))

Mode fault

Definition at line 138 of file lpc17xx_spi.h.

#define SPI_SPSR_ROVR ((uint32_t)(1<<5))

Read overrun

Definition at line 140 of file lpc17xx_spi.h.

#define SPI_SPSR_SPIF ((uint32_t)(1<<7))

SPI transfer complete flag

Definition at line 144 of file lpc17xx_spi.h.

#define SPI_SPSR_WCOL ((uint32_t)(1<<6))

Write collision

Definition at line 142 of file lpc17xx_spi.h.

#define SPI_SPTCR_BITMASK ((uint32_t)(0xFE))

SPI Test register bit mask

Definition at line 172 of file lpc17xx_spi.h.

#define SPI_SPTCR_TEST_MASK ((uint32_t)(0xFE))

SPI Test bit

Definition at line 170 of file lpc17xx_spi.h.

#define SPI_SPTSR_ABRT ((uint32_t)(1<<3))

Macro defines for SPI Test Status Register Slave abort

Definition at line 178 of file lpc17xx_spi.h.

#define SPI_SPTSR_MASKBIT ((uint32_t)(0xF8))

SPI Status bit mask

Definition at line 188 of file lpc17xx_spi.h.

#define SPI_SPTSR_MODF ((uint32_t)(1<<4))

Mode fault

Definition at line 180 of file lpc17xx_spi.h.

#define SPI_SPTSR_ROVR ((uint32_t)(1<<5))

Read overrun

Definition at line 182 of file lpc17xx_spi.h.

#define SPI_SPTSR_SPIF ((uint32_t)(1<<7))

SPI transfer complete flag

Definition at line 186 of file lpc17xx_spi.h.

#define SPI_SPTSR_WCOL ((uint32_t)(1<<6))

Write collision

Definition at line 184 of file lpc17xx_spi.h.

Generated on Tue Jun 7 14:59:38 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: SPI Public Types

SPI Public Types
[SPI]

Data Structures

struct | SPI_CFG_Type
SPI configuration structure. More...
struct | SPI_DATA_SETUP_Type
SPI Data configuration structure definitions. More...

Enumerations

enum | SPI_TRANSFER_Type { SPI_TRANSFER_POLLING = 0, SPI_TRANSFER_INTERRUPT }
SPI Transfer Type definitions. More...

Enumeration Type Documentation

enum SPI_TRANSFER_Type

SPI Transfer Type definitions.

Enumerator:
SPI_TRANSFER_POLLING | Polling transfer
SPI_TRANSFER_INTERRUPT | Interrupt transfer

Definition at line 261 of file lpc17xx_spi.h.

Generated on Tue Jun 7 14:59:38 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: SPI Public Functions

SPI Public Functions
[SPI]

Functions

void | SPI_Init (LPC_SPI_TypeDef *SPIx, SPI_CFG_Type *SPI_ConfigStruct)
Initializes the SPIx peripheral according to the specified parameters in the UART_ConfigStruct.
void | SPI_DeInit (LPC_SPI_TypeDef *SPIx)
De-initializes the SPIx peripheral registers to their default reset values.
void | SPI_SetClock (LPC_SPI_TypeDef *SPIx, uint32_t target_clock)
Setup clock rate for SPI device.
void | SPI_ConfigStructInit (SPI_CFG_Type *SPI_InitStruct)
Fills each SPI_InitStruct member with its default value:
  • CPHA = SPI_CPHA_FIRST
  • CPOL = SPI_CPOL_HI
  • ClockRate = 1000000
  • DataOrder = SPI_DATA_MSB_FIRST
  • Databit = SPI_DATABIT_8
  • Mode = SPI_MASTER_MODE.

void | SPI_SendData (LPC_SPI_TypeDef *SPIx, uint16_t Data)
Transmit a single data through SPIx peripheral.
uint16_t | SPI_ReceiveData (LPC_SPI_TypeDef *SPIx)
Receive a single data from SPIx peripheral.
int32_t | SPI_ReadWrite (LPC_SPI_TypeDef *SPIx, SPI_DATA_SETUP_Type *dataCfg, SPI_TRANSFER_Type xfType)
SPI Read write data function.
void | SPI_IntCmd (LPC_SPI_TypeDef *SPIx, FunctionalState NewState)
Enable or disable SPIx interrupt.
IntStatus | SPI_GetIntStatus (LPC_SPI_TypeDef *SPIx)
Checks whether the SPI interrupt flag is set or not.
void | SPI_ClearIntPending (LPC_SPI_TypeDef *SPIx)
Clear SPI interrupt flag.
uint8_t | SPI_GetDataSize (LPC_SPI_TypeDef *SPIx)
Get data bit size per transfer.
uint32_t | SPI_GetStatus (LPC_SPI_TypeDef *SPIx)
Get current value of SPI Status register in SPIx peripheral.
FlagStatus | SPI_CheckStatus (uint32_t inputSPIStatus, uint8_t SPIStatus)
Checks whether the specified SPI Status flag is set or not via inputSPIStatus parameter.

Function Documentation

FlagStatus SPI_CheckStatus | ( | uint32_t | inputSPIStatus,
 |  | uint8_t | SPIStatus
 | ) |  |

Checks whether the specified SPI Status flag is set or not via inputSPIStatus parameter.

Parameters:
[in] inputSPIStatus Value to check status of each flag type. This value is the return value from SPI_GetStatus().
[in] SPIStatus Specifies the SPI status flag to check, should be one of the following:
  • SPI_STAT_ABRT: Slave abort.
  • SPI_STAT_MODF: Mode fault.
  • SPI_STAT_ROVR: Read overrun.
  • SPI_STAT_WCOL: Write collision.
  • SPI_STAT_SPIF: SPI transfer complete.
Returns:
The new state of SPIStatus (SET or RESET)

Definition at line 419 of file lpc17xx_spi.c.

void SPI_ClearIntPending ( LPC_SPI_TypeDef * SPIx )

Clear SPI interrupt flag.

Parameters:
[in] SPIx SPI peripheral selected, should be LPC_SPI
Returns:
None

Definition at line 379 of file lpc17xx_spi.c.

void SPI_ConfigStructInit ( SPI_CFG_Type * SPI_InitStruct )

Fills each SPI_InitStruct member with its default value:

  • CPHA = SPI_CPHA_FIRST
  • CPOL = SPI_CPOL_HI
  • ClockRate = 1000000
  • DataOrder = SPI_DATA_MSB_FIRST
  • Databit = SPI_DATABIT_8
  • Mode = SPI_MASTER_MODE.

Parameters:
[in] SPI_InitStruct Pointer to a SPI_CFG_Type structure which will be initialized.
Returns:
None

Definition at line 169 of file lpc17xx_spi.c.

void SPI_DeInit ( LPC_SPI_TypeDef * SPIx )

De-initializes the SPIx peripheral registers to their default reset values.

Parameters:
[in] SPIx SPI peripheral selected, should be LPC_SPI
Returns:
None

Definition at line 96 of file lpc17xx_spi.c.

uint8_t SPI_GetDataSize ( LPC_SPI_TypeDef * SPIx )

Get data bit size per transfer.

Parameters:
[in] SPIx SPI peripheral selected, should be LPC_SPI
Returns:
number of bit per transfer, could be 8-16

Definition at line 111 of file lpc17xx_spi.c.

IntStatus SPI_GetIntStatus ( LPC_SPI_TypeDef * SPIx )

Checks whether the SPI interrupt flag is set or not.

Parameters:
[in] SPIx SPI peripheral selected, should be LPC_SPI
Returns:
The new state of SPI Interrupt Flag (SET or RESET)

Definition at line 367 of file lpc17xx_spi.c.

uint32_t SPI_GetStatus ( LPC_SPI_TypeDef * SPIx )

Get current value of SPI Status register in SPIx peripheral.

Parameters:
[in] SPIx SPI peripheral selected, should be LPC_SPI
Returns:
Current value of SPI Status register in SPI peripheral. Note: The return value of this function must be used with SPI_CheckStatus() to determine current flag status corresponding to each SPI status type. Because some flags in SPI Status register will be cleared after reading, the next reading SPI Status register could not be correct. So this function used to read SPI status register in one time only, then the return value used to check all flags.

Definition at line 398 of file lpc17xx_spi.c.

void SPI_Init | ( | LPC_SPI_TypeDef * | SPIx,
 |  | SPI_CFG_Type * | SPI_ConfigStruct
 | ) |  |

Initializes the SPIx peripheral according to the specified parameters in the UART_ConfigStruct.

Parameters:
[in] | SPIx | SPI peripheral selected, should be LPC_SPI
[in] | SPI_ConfigStruct | Pointer to a SPI_CFG_Type structure that contains the configuration information for the specified SPI peripheral.
Returns:
None

Definition at line 126 of file lpc17xx_spi.c.

void SPI_IntCmd | ( | LPC_SPI_TypeDef * | SPIx,
 |  | FunctionalState | NewState
 | ) |  |

Enable or disable SPIx interrupt.

Parameters:
[in] SPIx SPI peripheral selected, should be LPC_SPI
[in] NewState New state of specified UART interrupt type, should be:
  • ENALBE: Enable this SPI interrupt.
  • DISALBE: Disable this SPI interrupt.
Returns:
None

Definition at line 346 of file lpc17xx_spi.c.

int32_t SPI_ReadWrite | ( | LPC_SPI_TypeDef * | SPIx,
 |  | SPI_DATA_SETUP_Type * | dataCfg,
 |  | SPI_TRANSFER_Type | xfType
 | ) |  |

SPI Read write data function.

Parameters:
[in] | SPIx | Pointer to SPI peripheral, should be LPC_SPI
[in] | dataCfg | Pointer to a SPI_DATA_SETUP_Type structure that contains specified information about transmit data configuration.
[in] xfType Transfer type, should be:
  • SPI_TRANSFER_POLLING: Polling mode
  • SPI_TRANSFER_INTERRUPT: Interrupt mode
Returns:
Actual Data length has been transferred in polling mode. In interrupt mode, always return (0) Return (-1) if error. Note: This function can be used in both master and slave mode.

Definition at line 221 of file lpc17xx_spi.c.

uint16_t SPI_ReceiveData ( LPC_SPI_TypeDef * SPIx )

Receive a single data from SPIx peripheral.

Parameters:
[in] SPIx SPI peripheral selected, should be LPC_SPI
Returns:
Data received (16-bit long)

Definition at line 200 of file lpc17xx_spi.c.

void SPI_SendData | ( | LPC_SPI_TypeDef * | SPIx,
 |  | uint16_t | Data
 | ) |  |

Transmit a single data through SPIx peripheral.

Parameters:
[in] | SPIx | SPI peripheral selected, should be LPC_SPI
[in] | Data | Data to transmit (must be 16 or 8-bit long, this depend on SPI data bit number configured)
Returns:
none

Definition at line 186 of file lpc17xx_spi.c.

void SPI_SetClock | ( | LPC_SPI_TypeDef * | SPIx,
 |  | uint32_t | target_clock
 | ) |  |

Setup clock rate for SPI device.

Parameters:
[in] | SPIx | SPI peripheral definition, should be LPC_SPI
[in] | target_clock | : clock of SPI (Hz)
Returns:
None

Definition at line 59 of file lpc17xx_spi.c.

Generated on Tue Jun 7 14:59:38 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: SSP

SSP
[LPC1700CMSIS Firmware Library]

Modules

SSP Public Macros
SSP Private Macros
SSP Public Types
SSP Public Functions
Generated on Tue Jun 7 14:59:39 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: SSP Public Macros

SSP Public Macros
[SSP]

Defines

#define | SSP_CPHA_FIRST ((uint32_t)(0))
#define | SSP_CPHA_SECOND SSP_CR0_CPHA_SECOND
#define | SSP_CPOL_HI ((uint32_t)(0))
#define | SSP_CPOL_LO SSP_CR0_CPOL_HI
#define | SSP_SLAVE_MODE SSP_CR1_SLAVE_EN
#define | SSP_MASTER_MODE ((uint32_t)(0))
#define | SSP_DATABIT_4 SSP_CR0_DSS(4)
#define | SSP_DATABIT_5 SSP_CR0_DSS(5)
#define | SSP_DATABIT_6 SSP_CR0_DSS(6)
#define | SSP_DATABIT_7 SSP_CR0_DSS(7)
#define | SSP_DATABIT_8 SSP_CR0_DSS(8)
#define | SSP_DATABIT_9 SSP_CR0_DSS(9)
#define | SSP_DATABIT_10 SSP_CR0_DSS(10)
#define | SSP_DATABIT_11 SSP_CR0_DSS(11)
#define | SSP_DATABIT_12 SSP_CR0_DSS(12)
#define | SSP_DATABIT_13 SSP_CR0_DSS(13)
#define | SSP_DATABIT_14 SSP_CR0_DSS(14)
#define | SSP_DATABIT_15 SSP_CR0_DSS(15)
#define | SSP_DATABIT_16 SSP_CR0_DSS(16)
#define | SSP_FRAME_SPI SSP_CR0_FRF_SPI
#define | SSP_FRAME_TI SSP_CR0_FRF_TI
#define | SSP_FRAME_MICROWIRE SSP_CR0_FRF_MICROWIRE
#define | SSP_STAT_TXFIFO_EMPTY SSP_SR_TFE
#define | SSP_STAT_TXFIFO_NOTFULL SSP_SR_TNF
#define | SSP_STAT_RXFIFO_NOTEMPTY SSP_SR_RNE
#define | SSP_STAT_RXFIFO_FULL SSP_SR_RFF
#define | SSP_STAT_BUSY SSP_SR_BSY
#define | SSP_INTCFG_ROR SSP_IMSC_ROR
#define | SSP_INTCFG_RT SSP_IMSC_RT
#define | SSP_INTCFG_RX SSP_IMSC_RX
#define | SSP_INTCFG_TX SSP_IMSC_TX
#define | SSP_INTSTAT_ROR SSP_MIS_ROR
#define | SSP_INTSTAT_RT SSP_MIS_RT
#define | SSP_INTSTAT_RX SSP_MIS_RX
#define | SSP_INTSTAT_TX SSP_MIS_TX
#define | SSP_INTSTAT_RAW_ROR SSP_RIS_ROR
#define | SSP_INTSTAT_RAW_RT SSP_RIS_RT
#define | SSP_INTSTAT_RAW_RX SSP_RIS_RX
#define | SSP_INTSTAT_RAW_TX SSP_RIS_TX
#define | SSP_INTCLR_ROR SSP_ICR_ROR
#define | SSP_INTCLR_RT SSP_ICR_RT
#define | SSP_DMA_RX SSP_DMA_RXDMA_EN
#define | SSP_DMA_TX SSP_DMA_TXDMA_EN
#define | SSP_STAT_DONE (1UL<<8)
#define | SSP_STAT_ERROR (1UL<<9)

Define Documentation

#define SSP_CPHA_FIRST ((uint32_t)(0))

SSP configuration parameter defines Clock phase control bit

Definition at line 55 of file lpc17xx_ssp.h.

#define SSP_CPHA_SECOND SSP_CR0_CPHA_SECOND

Definition at line 56 of file lpc17xx_ssp.h.

#define SSP_CPOL_HI ((uint32_t)(0))

Clock polarity control bit

Definition at line 66 of file lpc17xx_ssp.h.

#define SSP_CPOL_LO SSP_CR0_CPOL_HI

Definition at line 67 of file lpc17xx_ssp.h.

#define SSP_DATABIT_10 SSP_CR0_DSS(10)

Databit number = 10

Definition at line 80 of file lpc17xx_ssp.h.

#define SSP_DATABIT_11 SSP_CR0_DSS(11)

Databit number = 11

Definition at line 81 of file lpc17xx_ssp.h.

#define SSP_DATABIT_12 SSP_CR0_DSS(12)

Databit number = 12

Definition at line 82 of file lpc17xx_ssp.h.

#define SSP_DATABIT_13 SSP_CR0_DSS(13)

Databit number = 13

Definition at line 83 of file lpc17xx_ssp.h.

#define SSP_DATABIT_14 SSP_CR0_DSS(14)

Databit number = 14

Definition at line 84 of file lpc17xx_ssp.h.

#define SSP_DATABIT_15 SSP_CR0_DSS(15)

Databit number = 15

Definition at line 85 of file lpc17xx_ssp.h.

#define SSP_DATABIT_16 SSP_CR0_DSS(16)

Databit number = 16

Definition at line 86 of file lpc17xx_ssp.h.

#define SSP_DATABIT_4 SSP_CR0_DSS(4)

SSP data bit number defines Databit number = 4

Definition at line 74 of file lpc17xx_ssp.h.

#define SSP_DATABIT_5 SSP_CR0_DSS(5)

Databit number = 5

Definition at line 75 of file lpc17xx_ssp.h.

#define SSP_DATABIT_6 SSP_CR0_DSS(6)

Databit number = 6

Definition at line 76 of file lpc17xx_ssp.h.

#define SSP_DATABIT_7 SSP_CR0_DSS(7)

Databit number = 7

Definition at line 77 of file lpc17xx_ssp.h.

#define SSP_DATABIT_8 SSP_CR0_DSS(8)

Databit number = 8

Definition at line 78 of file lpc17xx_ssp.h.

#define SSP_DATABIT_9 SSP_CR0_DSS(9)

Databit number = 9

Definition at line 79 of file lpc17xx_ssp.h.

#define SSP_DMA_RX SSP_DMA_RXDMA_EN

SSP DMA defines SSP bit for enabling RX DMA

Definition at line 160 of file lpc17xx_ssp.h.

#define SSP_DMA_TX SSP_DMA_TXDMA_EN

SSP bit for enabling TX DMA

Definition at line 162 of file lpc17xx_ssp.h.

#define SSP_FRAME_MICROWIRE SSP_CR0_FRF_MICROWIRE

National Micro-wire mode

Definition at line 94 of file lpc17xx_ssp.h.

#define SSP_FRAME_SPI SSP_CR0_FRF_SPI

SSP Frame Format definition Motorola SPI mode

Definition at line 90 of file lpc17xx_ssp.h.

#define SSP_FRAME_TI SSP_CR0_FRF_TI

TI synchronous serial mode

Definition at line 92 of file lpc17xx_ssp.h.

#define SSP_INTCFG_ROR SSP_IMSC_ROR

SSP Interrupt Configuration defines Receive Overrun

Definition at line 114 of file lpc17xx_ssp.h.

#define SSP_INTCFG_RT SSP_IMSC_RT

Receive TimeOut

Definition at line 116 of file lpc17xx_ssp.h.

#define SSP_INTCFG_RX SSP_IMSC_RX

Rx FIFO is at least half full

Definition at line 118 of file lpc17xx_ssp.h.

#define SSP_INTCFG_TX SSP_IMSC_TX

Tx FIFO is at least half empty

Definition at line 120 of file lpc17xx_ssp.h.

#define SSP_INTCLR_ROR SSP_ICR_ROR

SSP Interrupt Clear defines Writing a 1 to this bit clears the "frame was received when RxFIFO was full" interrupt

Definition at line 151 of file lpc17xx_ssp.h.

#define SSP_INTCLR_RT SSP_ICR_RT

Writing a 1 to this bit clears the "Rx FIFO was not empty and has not been read for a timeout period" interrupt

Definition at line 154 of file lpc17xx_ssp.h.

#define SSP_INTSTAT_RAW_ROR SSP_RIS_ROR

SSP Raw Interrupt Status defines Receive Overrun

Definition at line 138 of file lpc17xx_ssp.h.

#define SSP_INTSTAT_RAW_RT SSP_RIS_RT

Receive TimeOut

Definition at line 140 of file lpc17xx_ssp.h.

#define SSP_INTSTAT_RAW_RX SSP_RIS_RX

Rx FIFO is at least half full

Definition at line 142 of file lpc17xx_ssp.h.

#define SSP_INTSTAT_RAW_TX SSP_RIS_TX

Tx FIFO is at least half empty

Definition at line 144 of file lpc17xx_ssp.h.

#define SSP_INTSTAT_ROR SSP_MIS_ROR

SSP Configured Interrupt Status defines Receive Overrun

Definition at line 126 of file lpc17xx_ssp.h.

#define SSP_INTSTAT_RT SSP_MIS_RT

Receive TimeOut

Definition at line 128 of file lpc17xx_ssp.h.

#define SSP_INTSTAT_RX SSP_MIS_RX

Rx FIFO is at least half full

Definition at line 130 of file lpc17xx_ssp.h.

#define SSP_INTSTAT_TX SSP_MIS_TX

Tx FIFO is at least half empty

Definition at line 132 of file lpc17xx_ssp.h.

#define SSP_MASTER_MODE ((uint32_t)(0))

Definition at line 71 of file lpc17xx_ssp.h.

#define SSP_SLAVE_MODE SSP_CR1_SLAVE_EN

SSP master mode enable

Definition at line 70 of file lpc17xx_ssp.h.

#define SSP_STAT_BUSY SSP_SR_BSY

SSP status SSP Busy bit

Definition at line 108 of file lpc17xx_ssp.h.

#define SSP_STAT_DONE (1UL<<8)

Done

Definition at line 165 of file lpc17xx_ssp.h.

#define SSP_STAT_ERROR (1UL<<9)

Error

Definition at line 166 of file lpc17xx_ssp.h.

#define SSP_STAT_RXFIFO_FULL SSP_SR_RFF

SSP status RX FIFO full bit

Definition at line 106 of file lpc17xx_ssp.h.

#define SSP_STAT_RXFIFO_NOTEMPTY SSP_SR_RNE

SSP status RX FIFO not empty bit

Definition at line 104 of file lpc17xx_ssp.h.

#define SSP_STAT_TXFIFO_EMPTY SSP_SR_TFE

SSP Status defines SSP status TX FIFO Empty bit

Definition at line 100 of file lpc17xx_ssp.h.

#define SSP_STAT_TXFIFO_NOTFULL SSP_SR_TNF

SSP status TX FIFO not full bit

Definition at line 102 of file lpc17xx_ssp.h.

Generated on Tue Jun 7 14:59:39 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: SSP Private Macros

SSP Private Macros
[SSP]

Defines

#define | SSP_CR0_DSS(n) ((uint32_t)((n-1)&0xF))
#define | SSP_CR0_FRF_SPI ((uint32_t)(0<<4))
#define | SSP_CR0_FRF_TI ((uint32_t)(1<<4))
#define | SSP_CR0_FRF_MICROWIRE ((uint32_t)(2<<4))
#define | SSP_CR0_CPOL_HI ((uint32_t)(1<<6))
#define | SSP_CR0_CPHA_SECOND ((uint32_t)(1<<7))
#define | SSP_CR0_SCR(n) ((uint32_t)((n&0xFF)<<8))
#define | SSP_CR0_BITMASK ((uint32_t)(0xFFFF))
#define | SSP_CR1_LBM_EN ((uint32_t)(1<<0))
#define | SSP_CR1_SSP_EN ((uint32_t)(1<<1))
#define | SSP_CR1_SLAVE_EN ((uint32_t)(1<<2))
#define | SSP_CR1_SO_DISABLE ((uint32_t)(1<<3))
#define | SSP_CR1_BITMASK ((uint32_t)(0x0F))
#define | SSP_DR_BITMASK(n) ((n)&0xFFFF)
#define | SSP_SR_TFE ((uint32_t)(1<<0))
#define | SSP_SR_TNF ((uint32_t)(1<<1))
#define | SSP_SR_RNE ((uint32_t)(1<<2))
#define | SSP_SR_RFF ((uint32_t)(1<<3))
#define | SSP_SR_BSY ((uint32_t)(1<<4))
#define | SSP_SR_BITMASK ((uint32_t)(0x1F))
#define | SSP_CPSR_CPDVSR(n) ((uint32_t)(n&0xFF))
#define | SSP_CPSR_BITMASK ((uint32_t)(0xFF))
#define | SSP_IMSC_ROR ((uint32_t)(1<<0))
#define | SSP_IMSC_RT ((uint32_t)(1<<1))
#define | SSP_IMSC_RX ((uint32_t)(1<<2))
#define | SSP_IMSC_TX ((uint32_t)(1<<3))
#define | SSP_IMSC_BITMASK ((uint32_t)(0x0F))
#define | SSP_RIS_ROR ((uint32_t)(1<<0))
#define | SSP_RIS_RT ((uint32_t)(1<<1))
#define | SSP_RIS_RX ((uint32_t)(1<<2))
#define | SSP_RIS_TX ((uint32_t)(1<<3))
#define | SSP_RIS_BITMASK ((uint32_t)(0x0F))
#define | SSP_MIS_ROR ((uint32_t)(1<<0))
#define | SSP_MIS_RT ((uint32_t)(1<<1))
#define | SSP_MIS_RX ((uint32_t)(1<<2))
#define | SSP_MIS_TX ((uint32_t)(1<<3))
#define | SSP_MIS_BITMASK ((uint32_t)(0x0F))
#define | SSP_ICR_ROR ((uint32_t)(1<<0))
#define | SSP_ICR_RT ((uint32_t)(1<<1))
#define | SSP_ICR_BITMASK ((uint32_t)(0x03))
#define | SSP_DMA_RXDMA_EN ((uint32_t)(1<<0))
#define | SSP_DMA_TXDMA_EN ((uint32_t)(1<<1))
#define | SSP_DMA_BITMASK ((uint32_t)(0x03))
#define | PARAM_SSPx(n)
#define | PARAM_SSP_CPHA(n) ((n==SSP_CPHA_FIRST) || (n==SSP_CPHA_SECOND))
#define | PARAM_SSP_CPOL(n) ((n==SSP_CPOL_HI) || (n==SSP_CPOL_LO))
#define | PARAM_SSP_MODE(n) ((n==SSP_SLAVE_MODE) || (n==SSP_MASTER_MODE))
#define | PARAM_SSP_DATABIT(n)
#define | PARAM_SSP_FRAME(n)
#define | PARAM_SSP_STAT(n)
#define | PARAM_SSP_INTCFG(n)
#define | PARAM_SSP_INTSTAT(n)
#define | PARAM_SSP_INTSTAT_RAW(n)
#define | PARAM_SSP_INTCLR(n) ((n==SSP_INTCLR_ROR) || (n==SSP_INTCLR_RT))
#define | PARAM_SSP_DMA(n) ((n==SSP_DMA_TX) || (n==SSP_DMA_RX))

Define Documentation

#define PARAM_SSP_CPHA ( n ) ((n==SSP_CPHA_FIRST) || (n==SSP_CPHA_SECOND))

Macro check clock phase control mode

Definition at line 317 of file lpc17xx_ssp.h.

#define PARAM_SSP_CPOL ( n ) ((n==SSP_CPOL_HI) || (n==SSP_CPOL_LO))

Macro check clock polarity mode

Definition at line 320 of file lpc17xx_ssp.h.

#define PARAM_SSP_DATABIT ( n )

Value:

((n==SSP_DATABIT_4) || (n==SSP_DATABIT_5) \
|| (n==SSP_DATABIT_6) || (n==SSP_DATABIT_16) \
|| (n==SSP_DATABIT_7) || (n==SSP_DATABIT_8) \
|| (n==SSP_DATABIT_9) || (n==SSP_DATABIT_10) \
|| (n==SSP_DATABIT_11) || (n==SSP_DATABIT_12) \
|| (n==SSP_DATABIT_13) || (n==SSP_DATABIT_14) \
|| (n==SSP_DATABIT_15))

Definition at line 326 of file lpc17xx_ssp.h.

#define PARAM_SSP_DMA ( n ) ((n==SSP_DMA_TX) || (n==SSP_DMA_RX))

Definition at line 359 of file lpc17xx_ssp.h.

#define PARAM_SSP_FRAME ( n )

Value:

((n==SSP_FRAME_SPI) || (n==SSP_FRAME_TI)\
|| (n==SSP_FRAME_MICROWIRE))

Definition at line 335 of file lpc17xx_ssp.h.

#define PARAM_SSP_INTCFG ( n )

Value:

((n==SSP_INTCFG_ROR) || (n==SSP_INTCFG_RT) \
|| (n==SSP_INTCFG_RX) || (n==SSP_INTCFG_TX))

Definition at line 344 of file lpc17xx_ssp.h.

#define PARAM_SSP_INTCLR ( n ) ((n==SSP_INTCLR_ROR) || (n==SSP_INTCLR_RT))

Definition at line 356 of file lpc17xx_ssp.h.

#define PARAM_SSP_INTSTAT ( n )

Value:

((n==SSP_INTSTAT_ROR) || (n==SSP_INTSTAT_RT) \
|| (n==SSP_INTSTAT_RX) || (n==SSP_INTSTAT_TX))

Definition at line 348 of file lpc17xx_ssp.h.

#define PARAM_SSP_INTSTAT_RAW ( n )

Value:

((n==SSP_INTSTAT_RAW_ROR) || (n==SSP_INTSTAT_RAW_RT) \
|| (n==SSP_INTSTAT_RAW_RX) || (n==SSP_INTSTAT_RAW_TX))

Definition at line 352 of file lpc17xx_ssp.h.

#define PARAM_SSP_MODE ( n ) ((n==SSP_SLAVE_MODE) || (n==SSP_MASTER_MODE))

Definition at line 323 of file lpc17xx_ssp.h.

#define PARAM_SSP_STAT ( n )

Value:

((n==SSP_STAT_TXFIFO_EMPTY) || (n==SSP_STAT_TXFIFO_NOTFULL) \
|| (n==SSP_STAT_RXFIFO_NOTEMPTY) || (n==SSP_STAT_RXFIFO_FULL) \
|| (n==SSP_STAT_BUSY))

Definition at line 339 of file lpc17xx_ssp.h.

#define PARAM_SSPx ( n )

Value:

((((uint32_t *)n)==((uint32_t *)LPC_SSP0)) \
|| (((uint32_t *)n)==((uint32_t *)LPC_SSP1)))
Macro to determine if it is valid SSP port number

Definition at line 313 of file lpc17xx_ssp.h.

#define SSP_CPSR_BITMASK ((uint32_t)(0xFF))

SSP CPSR bit mask

Definition at line 244 of file lpc17xx_ssp.h.

#define SSP_CPSR_CPDVSR ( n ) ((uint32_t)(n&0xFF))

Macro defines for CPSR register SSP clock prescaler

Definition at line 242 of file lpc17xx_ssp.h.

#define SSP_CR0_BITMASK ((uint32_t)(0xFFFF))

SSP CR0 bit mask

Definition at line 199 of file lpc17xx_ssp.h.

#define SSP_CR0_CPHA_SECOND ((uint32_t)(1<<7))

SPI clock out phase bit (used in SPI mode only), (1) = captures data on the second clock transition of the frame, (0) = first

Definition at line 194 of file lpc17xx_ssp.h.

#define SSP_CR0_CPOL_HI ((uint32_t)(1<<6))

SPI clock polarity bit (used in SPI mode only), (1) = maintains the bus clock high between frames, (0) = low

Definition at line 191 of file lpc17xx_ssp.h.

#define SSP_CR0_DSS ( n ) ((uint32_t)((n-1)&0xF))

Macro defines for CR0 register SSP data size select, must be 4 bits to 16 bits

Definition at line 182 of file lpc17xx_ssp.h.

#define SSP_CR0_FRF_MICROWIRE ((uint32_t)(2<<4))

SSP control 0 National Micro-wire mode

Definition at line 188 of file lpc17xx_ssp.h.

#define SSP_CR0_FRF_SPI ((uint32_t)(0<<4))

SSP control 0 Motorola SPI mode

Definition at line 184 of file lpc17xx_ssp.h.

#define SSP_CR0_FRF_TI ((uint32_t)(1<<4))

SSP control 0 TI synchronous serial mode

Definition at line 186 of file lpc17xx_ssp.h.

#define SSP_CR0_SCR ( n ) ((uint32_t)((n&0xFF)<<8))

SSP serial clock rate value load macro, divider rate is PERIPH_CLK / (cpsr * (SCR + 1))

Definition at line 197 of file lpc17xx_ssp.h.

#define SSP_CR1_BITMASK ((uint32_t)(0x0F))

SSP CR1 bit mask

Definition at line 214 of file lpc17xx_ssp.h.

#define SSP_CR1_LBM_EN ((uint32_t)(1<<0))

Macro defines for CR1 register SSP control 1 loopback mode enable bit

Definition at line 205 of file lpc17xx_ssp.h.

#define SSP_CR1_SLAVE_EN ((uint32_t)(1<<2))

SSP control 1 slave enable

Definition at line 209 of file lpc17xx_ssp.h.

#define SSP_CR1_SO_DISABLE ((uint32_t)(1<<3))

SSP control 1 slave out disable bit, disables transmit line in slave mode

Definition at line 212 of file lpc17xx_ssp.h.

#define SSP_CR1_SSP_EN ((uint32_t)(1<<1))

SSP control 1 enable bit

Definition at line 207 of file lpc17xx_ssp.h.

#define SSP_DMA_BITMASK ((uint32_t)(0x03))

DMACR bit mask

Definition at line 308 of file lpc17xx_ssp.h.

#define SSP_DMA_RXDMA_EN ((uint32_t)(1<<0))

Macro defines for DMACR register SSP bit for enabling RX DMA

Definition at line 304 of file lpc17xx_ssp.h.

#define SSP_DMA_TXDMA_EN ((uint32_t)(1<<1))

SSP bit for enabling TX DMA

Definition at line 306 of file lpc17xx_ssp.h.

#define SSP_DR_BITMASK ( n ) ((n)&0xFFFF)

Macro defines for DR register SSP data bit mask

Definition at line 220 of file lpc17xx_ssp.h.

#define SSP_ICR_BITMASK ((uint32_t)(0x03))

ICR bit mask

Definition at line 298 of file lpc17xx_ssp.h.

#define SSP_ICR_ROR ((uint32_t)(1<<0))

Macro define for (ICR) Interrupt Clear registers Writing a 1 to this bit clears the "frame was received when RxFIFO was full" interrupt

Definition at line 293 of file lpc17xx_ssp.h.

#define SSP_ICR_RT ((uint32_t)(1<<1))

Writing a 1 to this bit clears the "Rx FIFO was not empty and has not been read for a timeout period" interrupt

Definition at line 296 of file lpc17xx_ssp.h.

#define SSP_IMSC_BITMASK ((uint32_t)(0x0F))

IMSC bit mask

Definition at line 258 of file lpc17xx_ssp.h.

#define SSP_IMSC_ROR ((uint32_t)(1<<0))

Macro define for (IMSC) Interrupt Mask Set/Clear registers Receive Overrun

Definition at line 250 of file lpc17xx_ssp.h.

#define SSP_IMSC_RT ((uint32_t)(1<<1))

Receive TimeOut

Definition at line 252 of file lpc17xx_ssp.h.

#define SSP_IMSC_RX ((uint32_t)(1<<2))

Rx FIFO is at least half full

Definition at line 254 of file lpc17xx_ssp.h.

#define SSP_IMSC_TX ((uint32_t)(1<<3))

Tx FIFO is at least half empty

Definition at line 256 of file lpc17xx_ssp.h.

#define SSP_MIS_BITMASK ((uint32_t)(0x0F))

MIS bit mask

Definition at line 286 of file lpc17xx_ssp.h.

#define SSP_MIS_ROR ((uint32_t)(1<<0))

Macro define for (MIS) Masked Interrupt Status registers Receive Overrun

Definition at line 278 of file lpc17xx_ssp.h.

#define SSP_MIS_RT ((uint32_t)(1<<1))

Receive TimeOut

Definition at line 280 of file lpc17xx_ssp.h.

#define SSP_MIS_RX ((uint32_t)(1<<2))

Rx FIFO is at least half full

Definition at line 282 of file lpc17xx_ssp.h.

#define SSP_MIS_TX ((uint32_t)(1<<3))

Tx FIFO is at least half empty

Definition at line 284 of file lpc17xx_ssp.h.

#define SSP_RIS_BITMASK ((uint32_t)(0x0F))

RIS bit mask

Definition at line 272 of file lpc17xx_ssp.h.

#define SSP_RIS_ROR ((uint32_t)(1<<0))

Macro define for (RIS) Raw Interrupt Status registers Receive Overrun

Definition at line 264 of file lpc17xx_ssp.h.

#define SSP_RIS_RT ((uint32_t)(1<<1))

Receive TimeOut

Definition at line 266 of file lpc17xx_ssp.h.

#define SSP_RIS_RX ((uint32_t)(1<<2))

Rx FIFO is at least half full

Definition at line 268 of file lpc17xx_ssp.h.

#define SSP_RIS_TX ((uint32_t)(1<<3))

Tx FIFO is at least half empty

Definition at line 270 of file lpc17xx_ssp.h.

#define SSP_SR_BITMASK ((uint32_t)(0x1F))

SSP SR bit mask

Definition at line 236 of file lpc17xx_ssp.h.

#define SSP_SR_BSY ((uint32_t)(1<<4))

SSP status SSP Busy bit

Definition at line 234 of file lpc17xx_ssp.h.

#define SSP_SR_RFF ((uint32_t)(1<<3))

SSP status RX FIFO full bit

Definition at line 232 of file lpc17xx_ssp.h.

#define SSP_SR_RNE ((uint32_t)(1<<2))

SSP status RX FIFO not empty bit

Definition at line 230 of file lpc17xx_ssp.h.

#define SSP_SR_TFE ((uint32_t)(1<<0))

Macro defines for SR register SSP status TX FIFO Empty bit

Definition at line 226 of file lpc17xx_ssp.h.

#define SSP_SR_TNF ((uint32_t)(1<<1))

SSP status TX FIFO not full bit

Definition at line 228 of file lpc17xx_ssp.h.

Generated on Tue Jun 7 14:59:39 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: SSP Public Types

SSP Public Types
[SSP]

Data Structures

struct | SSP_CFG_Type
SSP configuration structure. More...
struct | SSP_DATA_SETUP_Type
SPI Data configuration structure definitions. More...

Enumerations

enum | SSP_TRANSFER_Type { SSP_TRANSFER_POLLING = 0, SSP_TRANSFER_INTERRUPT }
SSP Transfer Type definitions. More...

Enumeration Type Documentation

enum SSP_TRANSFER_Type

SSP Transfer Type definitions.

Enumerator:
SSP_TRANSFER_POLLING | Polling transfer
SSP_TRANSFER_INTERRUPT | Interrupt transfer

Definition at line 393 of file lpc17xx_ssp.h.

Generated on Tue Jun 7 14:59:39 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: SSP Public Functions

SSP Public Functions
[SSP]

Functions

void | SSP_Init (LPC_SSP_TypeDef *SSPx, SSP_CFG_Type *SSP_ConfigStruct)
Initializes the SSPx peripheral according to the specified parameters in the SSP_ConfigStruct.
void | SSP_DeInit (LPC_SSP_TypeDef *SSPx)
De-initializes the SSPx peripheral registers to their default reset values.
void | SSP_ConfigStructInit (SSP_CFG_Type *SSP_InitStruct)
Fills each SSP_InitStruct member with its default value:
  • CPHA = SSP_CPHA_FIRST
  • CPOL = SSP_CPOL_HI
  • ClockRate = 1000000
  • Databit = SSP_DATABIT_8
  • Mode = SSP_MASTER_MODE
  • FrameFormat = SSP_FRAME_SSP.

void | SSP_Cmd (LPC_SSP_TypeDef *SSPx, FunctionalState NewState)
Enable or disable SSP peripheral's operation.
void | SSP_LoopBackCmd (LPC_SSP_TypeDef *SSPx, FunctionalState NewState)
Enable or disable Loop Back mode function in SSP peripheral.
void | SSP_SlaveOutputCmd (LPC_SSP_TypeDef *SSPx, FunctionalState NewState)
Enable or disable Slave Output function in SSP peripheral.
void | SSP_DMACmd (LPC_SSP_TypeDef *SSPx, uint32_t DMAMode, FunctionalState NewState)
Enable/Disable DMA function for SSP peripheral.
FlagStatus | SSP_GetStatus (LPC_SSP_TypeDef *SSPx, uint32_t FlagType)
Checks whether the specified SSP status flag is set or not.
uint8_t | SSP_GetDataSize (LPC_SSP_TypeDef *SSPx)
Get data size bit selected.
IntStatus | SSP_GetRawIntStatus (LPC_SSP_TypeDef *SSPx, uint32_t RawIntType)
Check whether the specified Raw interrupt status flag is set or not.
uint32_t | SSP_GetRawIntStatusReg (LPC_SSP_TypeDef *SSPx)
Get Raw Interrupt Status register.
IntStatus | SSP_GetIntStatus (LPC_SSP_TypeDef *SSPx, uint32_t IntType)
Check whether the specified interrupt status flag is set or not.
void | SSP_SendData (LPC_SSP_TypeDef *SSPx, uint16_t Data)
Transmit a single data through SSPx peripheral.
uint16_t | SSP_ReceiveData (LPC_SSP_TypeDef *SSPx)
Receive a single data from SSPx peripheral.
int32_t | SSP_ReadWrite (LPC_SSP_TypeDef *SSPx, SSP_DATA_SETUP_Type *dataCfg, SSP_TRANSFER_Type xfType)
SSP Read write data function.
void | SSP_IntConfig (LPC_SSP_TypeDef *SSPx, uint32_t IntType, FunctionalState NewState)
Enable or disable specified interrupt type in SSP peripheral.
void | SSP_ClearIntPending (LPC_SSP_TypeDef *SSPx, uint32_t IntType)
Clear specified interrupt pending in SSP peripheral.

Function Documentation

void SSP_ClearIntPending | ( | LPC_SSP_TypeDef * | SSPx,
 |  | uint32_t | IntType
 | ) |  |

Clear specified interrupt pending in SSP peripheral.

Parameters:
[in] SSPx SSP peripheral selected, should be:
  • LPC_SSP0: SSP0 peripheral
    • LPC_SSP1: SSP1 peripheral
[in] IntType Interrupt pending to clear, should be:
  • SSP_INTCLR_ROR: clears the "frame was received when RxFIFO was full" interrupt.
  • SSP_INTCLR_RT: clears the "Rx FIFO was not empty and has not been read for a timeout period" interrupt.
Returns:
None

Definition at line 639 of file lpc17xx_ssp.c.

void SSP_Cmd | ( | LPC_SSP_TypeDef * | SSPx,
 |  | FunctionalState | NewState
 | ) |  |

Enable or disable SSP peripheral's operation.

Parameters:
[in] SSPx SSP peripheral, should be:
  • LPC_SSP0: SSP0 peripheral
  • LPC_SSP1: SSP1 peripheral
[in] NewState New State of SSPx peripheral's operation
Returns:
none

Definition at line 227 of file lpc17xx_ssp.c.

void SSP_ConfigStructInit ( SSP_CFG_Type * SSP_InitStruct )

Fills each SSP_InitStruct member with its default value:

  • CPHA = SSP_CPHA_FIRST
  • CPOL = SSP_CPOL_HI
  • ClockRate = 1000000
  • Databit = SSP_DATABIT_8
  • Mode = SSP_MASTER_MODE
  • FrameFormat = SSP_FRAME_SSP.

Parameters:
[in] SSP_InitStruct Pointer to a SSP_CFG_Type structure which will be initialized.
Returns:
None

Definition at line 208 of file lpc17xx_ssp.c.

void SSP_DeInit ( LPC_SSP_TypeDef * SSPx )

De-initializes the SSPx peripheral registers to their default reset values.

Parameters:
[in] SSPx SSP peripheral selected, should be:
  • LPC_SSP0: SSP0 peripheral
  • LPC_SSP1: SSP1 peripheral
Returns:
None

Definition at line 166 of file lpc17xx_ssp.c.

void SSP_DMACmd | ( | LPC_SSP_TypeDef * | SSPx,
 |  | uint32_t | DMAMode,
 |  | FunctionalState | NewState
 | ) |  |

Enable/Disable DMA function for SSP peripheral.

Parameters:
[in] SSPx SSP peripheral selected, should be:
  • LPC_SSP0: SSP0 peripheral
    • LPC_SSP1: SSP1 peripheral
[in] DMAMode Type of DMA, should be:
  • SSP_DMA_TX: DMA for the transmit FIFO
  • SSP_DMA_RX: DMA for the Receive FIFO
[in] NewState New State of DMA function on SSP peripheral, should be:
  • ENALBE: Enable this function
  • DISABLE: Disable this function
Returns:
None

Definition at line 661 of file lpc17xx_ssp.c.

uint8_t SSP_GetDataSize ( LPC_SSP_TypeDef * SSPx )

Get data size bit selected.

Parameters:
[in] SSPx pointer to LPC_SSP_TypeDef structure, should be:
  • LPC_SSP0: SSP0 peripheral
  • LPC_SSP1: SSP1 peripheral
Returns:
Data size, could be:
  • SSP_DATABIT_4: 4 bit transfer
  • SSP_DATABIT_5: 5 bit transfer ...
  • SSP_DATABIT_16: 16 bit transfer

Definition at line 190 of file lpc17xx_ssp.c.

IntStatus SSP_GetIntStatus | ( | LPC_SSP_TypeDef * | SSPx,
 |  | uint32_t | IntType
 | ) |  |

Check whether the specified interrupt status flag is set or not.

Parameters:
[in] SSPx SSP peripheral selected, should be:
  • LPC_SSP0: SSP0 peripheral
  • LPC_SSP1: SSP1 peripheral
[in] IntType Raw Interrupt Type, should be:
  • SSP_INTSTAT_ROR: Receive Overrun interrupt
  • SSP_INTSTAT_RT: Receive Time out interrupt
  • SSP_INTSTAT_RX: RX FIFO is at least half full interrupt
  • SSP_INTSTAT_TX: TX FIFO is at least half empty interrupt
Returns:
New State of specified interrupt status flag in SSP peripheral Note: Enabling/Disabling specified interrupt in SSP peripheral effects to Interrupt Status flag.

Definition at line 619 of file lpc17xx_ssp.c.

IntStatus SSP_GetRawIntStatus | ( | LPC_SSP_TypeDef * | SSPx,
 |  | uint32_t | RawIntType
 | ) |  |

Check whether the specified Raw interrupt status flag is set or not.

Parameters:
[in] SSPx SSP peripheral selected, should be:
  • LPC_SSP0: SSP0 peripheral
  • LPC_SSP1: SSP1 peripheral
[in] RawIntType Raw Interrupt Type, should be:
  • SSP_INTSTAT_RAW_ROR: Receive Overrun interrupt
  • SSP_INTSTAT_RAW_RT: Receive Time out interrupt
  • SSP_INTSTAT_RAW_RX: RX FIFO is at least half full interrupt
  • SSP_INTSTAT_RAW_TX: TX FIFO is at least half empty interrupt
Returns:
New State of specified Raw interrupt status flag in SSP peripheral Note: Enabling/Disabling specified interrupt in SSP peripheral does not effect to Raw Interrupt Status flag.

Definition at line 583 of file lpc17xx_ssp.c.

uint32_t SSP_GetRawIntStatusReg ( LPC_SSP_TypeDef * SSPx )

Get Raw Interrupt Status register.

Parameters:
[in] SSPx SSP peripheral selected, should be:
  • LPC_SSP0: SSP0 peripheral
  • LPC_SSP1: SSP1 peripheral
Returns:
Raw Interrupt Status (RIS) register value

Definition at line 598 of file lpc17xx_ssp.c.

FlagStatus SSP_GetStatus | ( | LPC_SSP_TypeDef * | SSPx,
 |  | uint32_t | FlagType
 | ) |  |

Checks whether the specified SSP status flag is set or not.

Parameters:
[in] SSPx SSP peripheral selected, should be:
  • LPC_SSP0: SSP0 peripheral
  • LPC_SSP1: SSP1 peripheral
[in] FlagType Type of flag to check status, should be one of following:
  • SSP_STAT_TXFIFO_EMPTY: TX FIFO is empty
  • SSP_STAT_TXFIFO_NOTFULL: TX FIFO is not full
  • SSP_STAT_RXFIFO_NOTEMPTY: RX FIFO is not empty
  • SSP_STAT_RXFIFO_FULL: RX FIFO is full
  • SSP_STAT_BUSY: SSP peripheral is busy
Returns:
New State of specified SSP status flag

Definition at line 530 of file lpc17xx_ssp.c.

void SSP_Init | ( | LPC_SSP_TypeDef * | SSPx,
 |  | SSP_CFG_Type * | SSP_ConfigStruct
 | ) |  |

Initializes the SSPx peripheral according to the specified parameters in the SSP_ConfigStruct.

Parameters:
[in] SSPx SSP peripheral selected, should be:
  • LPC_SSP0: SSP0 peripheral
  • LPC_SSP1: SSP1 peripheral
[in] SSP_ConfigStruct Pointer to a SSP_CFG_Type structure that contains the configuration information for the specified SSP peripheral.
Returns:
None

Definition at line 125 of file lpc17xx_ssp.c.

void SSP_IntConfig | ( | LPC_SSP_TypeDef * | SSPx,
 |  | uint32_t | IntType,
 |  | FunctionalState | NewState
 | ) |  |

Enable or disable specified interrupt type in SSP peripheral.

Parameters:
[in] SSPx SSP peripheral selected, should be:
  • LPC_SSP0: SSP0 peripheral
  • LPC_SSP1: SSP1 peripheral
[in] IntType Interrupt type in SSP peripheral, should be:
  • SSP_INTCFG_ROR: Receive Overrun interrupt
  • SSP_INTCFG_RT: Receive Time out interrupt
  • SSP_INTCFG_RX: RX FIFO is at least half full interrupt
  • SSP_INTCFG_TX: TX FIFO is at least half empty interrupt
[in] NewState New State of specified interrupt type, should be:
  • ENABLE: Enable this interrupt type
  • DISABLE: Disable this interrupt type
Returns:
None Note: We can enable/disable multi-interrupt type by OR multi value

Definition at line 554 of file lpc17xx_ssp.c.

void SSP_LoopBackCmd | ( | LPC_SSP_TypeDef * | SSPx,
 |  | FunctionalState | NewState
 | ) |  |

Enable or disable Loop Back mode function in SSP peripheral.

Parameters:
[in] SSPx SSP peripheral selected, should be:
  • LPC_SSP0: SSP0 peripheral
    • LPC_SSP1: SSP1 peripheral
[in] NewState New State of Loop Back mode, should be:
  • ENABLE: Enable this function
  • DISABLE: Disable this function
Returns:
None

Definition at line 252 of file lpc17xx_ssp.c.

int32_t SSP_ReadWrite | ( | LPC_SSP_TypeDef * | SSPx,
 |  | SSP_DATA_SETUP_Type * | dataCfg,
 |  | SSP_TRANSFER_Type | xfType
 | ) |  |

SSP Read write data function.

Parameters:
[in] SSPx Pointer to SSP peripheral, should be
  • LPC_SSP0: SSP0 peripheral
  • LPC_SSP1: SSP1 peripheral
[in] dataCfg Pointer to a SSP_DATA_SETUP_Type structure that contains specified information about transmit data configuration.
[in] xfType Transfer type, should be:
  • SSP_TRANSFER_POLLING: Polling mode
  • SSP_TRANSFER_INTERRUPT: Interrupt mode
Returns:
Actual Data length has been transferred in polling mode. In interrupt mode, always return (0) Return (-1) if error. Note: This function can be used in both master and slave mode.

Definition at line 345 of file lpc17xx_ssp.c.

uint16_t SSP_ReceiveData ( LPC_SSP_TypeDef * SSPx )

Receive a single data from SSPx peripheral.

Parameters:
[in] SSPx SSP peripheral selected, should be
  • LPC_SSP0: SSP0 peripheral
  • LPC_SSP1: SSP1 peripheral
Returns:
Data received (16-bit long)

Definition at line 322 of file lpc17xx_ssp.c.

void SSP_SendData | ( | LPC_SSP_TypeDef * | SSPx,
 |  | uint16_t | Data
 | ) |  |

Transmit a single data through SSPx peripheral.

Parameters:
[in] SSPx SSP peripheral selected, should be:
  • LPC_SSP0: SSP0 peripheral
  • LPC_SSP1: SSP1 peripheral
[in] Data Data to transmit (must be 16 or 8-bit long, this depend on SSP data bit number configured)
Returns:
none

Definition at line 306 of file lpc17xx_ssp.c.

void SSP_SlaveOutputCmd | ( | LPC_SSP_TypeDef * | SSPx,
 |  | FunctionalState | NewState
 | ) |  |

Enable or disable Slave Output function in SSP peripheral.

Parameters:
[in] SSPx SSP peripheral selected, should be:
  • LPC_SSP0: SSP0 peripheral
  • LPC_SSP1: SSP1 peripheral
[in] NewState New State of Slave Output function, should be:
  • ENABLE: Slave Output in normal operation
  • DISABLE: Slave Output is disabled. This blocks SSP controller from driving the transmit data line (MISO) Note: This function is available when SSP peripheral in Slave mode
Returns:
None

Definition at line 280 of file lpc17xx_ssp.c.

Generated on Tue Jun 7 14:59:39 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: SYSTICK

SYSTICK
[LPC1700CMSIS Firmware Library]

Modules

SYSTICK Private Macros
SYSTICK Public Functions
Generated on Tue Jun 7 14:59:40 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: SYSTICK Private Macros

SYSTICK Private Macros
[SYSTICK]

Defines

#define | ST_CTRL_ENABLE ((uint32_t)(1<<0))
#define | ST_CTRL_TICKINT ((uint32_t)(1<<1))
#define | ST_CTRL_CLKSOURCE ((uint32_t)(1<<2))
#define | ST_CTRL_COUNTFLAG ((uint32_t)(1<<16))
#define | ST_RELOAD_RELOAD(n) ((uint32_t)(n & 0x00FFFFFF))
#define | ST_RELOAD_CURRENT(n) ((uint32_t)(n & 0x00FFFFFF))
#define | ST_CALIB_TENMS(n) ((uint32_t)(n & 0x00FFFFFF))
#define | ST_CALIB_SKEW ((uint32_t)(1<<30))
#define | ST_CALIB_NOREF ((uint32_t)(1<<31))
#define | CLKSOURCE_EXT ((uint32_t)(0))
#define | CLKSOURCE_CPU ((uint32_t)(1))

Define Documentation

#define CLKSOURCE_CPU ((uint32_t)(1))

Definition at line 77 of file lpc17xx_systick.h.

#define CLKSOURCE_EXT ((uint32_t)(0))

Definition at line 76 of file lpc17xx_systick.h.

#define ST_CALIB_NOREF ((uint32_t)(1<<31))

Definition at line 74 of file lpc17xx_systick.h.

#define ST_CALIB_SKEW ((uint32_t)(1<<30))

Definition at line 73 of file lpc17xx_systick.h.

#define ST_CALIB_TENMS ( n ) ((uint32_t)(n & 0x00FFFFFF))

Macro defines for System Timer Calibration value (STCALIB) register

Definition at line 72 of file lpc17xx_systick.h.

#define ST_CTRL_CLKSOURCE ((uint32_t)(1<<2))

Definition at line 56 of file lpc17xx_systick.h.

#define ST_CTRL_COUNTFLAG ((uint32_t)(1<<16))

Definition at line 57 of file lpc17xx_systick.h.

#define ST_CTRL_ENABLE ((uint32_t)(1<<0))

Macro defines for System Timer Control and status (STCTRL) register

Definition at line 54 of file lpc17xx_systick.h.

#define ST_CTRL_TICKINT ((uint32_t)(1<<1))

Definition at line 55 of file lpc17xx_systick.h.

#define ST_RELOAD_CURRENT ( n ) ((uint32_t)(n & 0x00FFFFFF))

Macro defines for System Timer Current value (STCURRENT) register

Definition at line 67 of file lpc17xx_systick.h.

#define ST_RELOAD_RELOAD ( n ) ((uint32_t)(n & 0x00FFFFFF))

Macro defines for System Timer Reload value (STRELOAD) register

Definition at line 62 of file lpc17xx_systick.h.

Generated on Tue Jun 7 14:59:40 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: SYSTICK Public Functions

SYSTICK Public Functions
[SYSTICK]

Functions

void | SYSTICK_InternalInit (uint32_t time)
Initial System Tick with using internal CPU clock source.
void | SYSTICK_ExternalInit (uint32_t freq, uint32_t time)
Initial System Tick with using external clock source.
void | SYSTICK_Cmd (FunctionalState NewState)
Enable/disable System Tick counter.
void | SYSTICK_IntCmd (FunctionalState NewState)
Enable/disable System Tick interrupt.
uint32_t | SYSTICK_GetCurrentValue (void)
Get current value of System Tick counter.
void | SYSTICK_ClearCounterFlag (void)
Clear Counter flag.

Function Documentation

void SYSTICK_ClearCounterFlag ( void )

Clear Counter flag.

Parameters:
[in] None
Returns:
None

Definition at line 172 of file lpc17xx_systick.c.

void SYSTICK_Cmd ( FunctionalState NewState )

Enable/disable System Tick counter.

Parameters:
[in] NewState System Tick counter status, should be:
  • ENABLE
  • DISABLE
Returns:
None

Definition at line 126 of file lpc17xx_systick.c.

void SYSTICK_ExternalInit | ( | uint32_t | freq,
 |  | uint32_t | time
 | ) |  |

Initial System Tick with using external clock source.

Parameters:
[in] | freq | external clock frequency(Hz)
[in] | time | time interval(ms)
Returns:
None

Definition at line 92 of file lpc17xx_systick.c.

uint32_t SYSTICK_GetCurrentValue ( void )

Get current value of System Tick counter.

Parameters:
[in] None
Returns:
current value of System Tick counter

Definition at line 162 of file lpc17xx_systick.c.

void SYSTICK_IntCmd ( FunctionalState NewState )

Enable/disable System Tick interrupt.

Parameters:
[in] NewState System Tick interrupt status, should be:
  • ENABLE
  • DISABLE
Returns:
None

Definition at line 145 of file lpc17xx_systick.c.

void SYSTICK_InternalInit ( uint32_t time )

Initial System Tick with using internal CPU clock source.

Parameters:
[in] time time interval(ms)
Returns:
None

Definition at line 58 of file lpc17xx_systick.c.

Generated on Tue Jun 7 14:59:40 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: TIM

TIM
[LPC1700CMSIS Firmware Library]

Modules

TIM Private Macros
TIM Public Types
TIM Public Functions
Generated on Tue Jun 7 14:59:40 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: TIM Private Macros

TIM Private Macros
[TIM]

Defines

#define | TIM_IR_CLR(n) _BIT(n)
#define | TIM_MATCH_INT(n) (_BIT(n & 0x0F))
#define | TIM_CAP_INT(n) (_BIT(((n & 0x0F) + 4)))
#define | TIM_ENABLE ((uint32_t)(1<<0))
#define | TIM_RESET ((uint32_t)(1<<1))
#define | TIM_TCR_MASKBIT ((uint32_t)(3))
#define | TIM_INT_ON_MATCH(n) (_BIT((n * 3)))
#define | TIM_RESET_ON_MATCH(n) (_BIT(((n * 3) + 1)))
#define | TIM_STOP_ON_MATCH(n) (_BIT(((n * 3) + 2)))
#define | TIM_MCR_MASKBIT ((uint32_t)(0x0FFF))
#define | TIM_MCR_CHANNEL_MASKBIT(n) ((uint32_t)(7<<(n*3)))
#define | TIM_CAP_RISING(n) (_BIT((n * 3)))
#define | TIM_CAP_FALLING(n) (_BIT(((n * 3) + 1)))
#define | TIM_INT_ON_CAP(n) (_BIT(((n * 3) + 2)))
#define | TIM_EDGE_MASK(n) (_SBF((n * 3), 0x03))
#define | TIM_CCR_MASKBIT ((uint32_t)(0x3F))
#define | TIM_CCR_CHANNEL_MASKBIT(n) ((uint32_t)(7<<(n*3)))
#define | TIM_EM(n) _BIT(n)
#define | TIM_EM_NOTHING ((uint8_t)(0x0))
#define | TIM_EM_LOW ((uint8_t)(0x1))
#define | TIM_EM_HIGH ((uint8_t)(0x2))
#define | TIM_EM_TOGGLE ((uint8_t)(0x3))
#define | TIM_EM_SET(n, s) (_SBF(((n << 1) + 4), (s & 0x03)))
#define | TIM_EM_MASK(n) (_SBF(((n << 1) + 4), 0x03))
#define | TIM_EMR_MASKBIT 0x0FFF
#define | TIM_CTCR_MODE_MASK 0x3
#define | TIM_CTCR_INPUT_MASK 0xC
#define | TIM_CTCR_MASKBIT 0xF
#define | TIM_COUNTER_MODE ((uint8_t)(1))
#define | PARAM_TIMx(n)
#define | PARAM_TIM_INT_TYPE(TYPE)
#define | PARAM_TIM_MODE_OPT(MODE)
#define | PARAM_TIM_PRESCALE_OPT(OPT) ((OPT == TIM_PRESCALE_TICKVAL)||(OPT == TIM_PRESCALE_USVAL))
#define | PARAM_TIM_COUNTER_INPUT_OPT(OPT) ((OPT == TIM_COUNTER_INCAP0)||(OPT == TIM_COUNTER_INCAP1))
#define | PARAM_TIM_EXTMATCH_OPT(OPT)
#define | PARAM_TIM_CAP_MODE_OPT(OPT)

Define Documentation

#define PARAM_TIM_CAP_MODE_OPT ( OPT )

Value:

((OPT == TIM_CAPTURE_NONE)||(OPT == TIM_CAPTURE_RISING) \
||(OPT == TIM_CAPTURE_FALLING)||(OPT == TIM_CAPTURE_ANY))

Definition at line 163 of file lpc17xx_timer.h.

#define PARAM_TIM_COUNTER_INPUT_OPT ( OPT ) ((OPT == TIM_COUNTER_INCAP0)||(OPT == TIM_COUNTER_INCAP1))

Definition at line 156 of file lpc17xx_timer.h.

#define PARAM_TIM_EXTMATCH_OPT ( OPT )

Value:

((OPT == TIM_EXTMATCH_NOTHING)||(OPT == TIM_EXTMATCH_LOW)\
||(OPT == TIM_EXTMATCH_HIGH)||(OPT == TIM_EXTMATCH_TOGGLE))

Definition at line 159 of file lpc17xx_timer.h.

#define PARAM_TIM_INT_TYPE ( TYPE )

Value:

((TYPE ==TIM_MR0_INT)||(TYPE ==TIM_MR1_INT)\
||(TYPE ==TIM_MR2_INT)||(TYPE ==TIM_MR3_INT)\
||(TYPE ==TIM_CR0_INT)||(TYPE ==TIM_CR1_INT))

Definition at line 144 of file lpc17xx_timer.h.

#define PARAM_TIM_MODE_OPT ( MODE )

Value:

((MODE == TIM_TIMER_MODE)||(MODE == TIM_COUNTER_RISING_MODE)\
|| (MODE == TIM_COUNTER_RISING_MODE)||(MODE == TIM_COUNTER_RISING_MODE))

Definition at line 149 of file lpc17xx_timer.h.

#define PARAM_TIM_PRESCALE_OPT ( OPT ) ((OPT == TIM_PRESCALE_TICKVAL)||(OPT == TIM_PRESCALE_USVAL))

Definition at line 153 of file lpc17xx_timer.h.

#define PARAM_TIMx ( n )

Value:

((((uint32_t *)n)==((uint32_t *)LPC_TIM0)) || (((uint32_t *)n)==((uint32_t *)LPC_TIM1)) \
|| (((uint32_t *)n)==((uint32_t *)LPC_TIM2)) || (((uint32_t *)n)==((uint32_t *)LPC_TIM3)))
Macro to determine if it is valid TIMER peripheral

Definition at line 140 of file lpc17xx_timer.h.

#define TIM_CAP_FALLING ( n ) (_BIT(((n * 3) + 1)))

Bit location for CAP.n on CRx falling edge, n = 0 to 3

Definition at line 95 of file lpc17xx_timer.h.

#define TIM_CAP_INT ( n ) (_BIT(((n & 0x0F) + 4)))

Macro for getting a capture event interrupt bit

Definition at line 63 of file lpc17xx_timer.h.

#define TIM_CAP_RISING ( n ) (_BIT((n * 3)))

Bit location for CAP.n on CRx rising edge, n = 0 to 3

Definition at line 93 of file lpc17xx_timer.h.

#define TIM_CCR_CHANNEL_MASKBIT ( n ) ((uint32_t)(7<<(n*3)))

Timer Capture control bit mask for specific channel

Definition at line 103 of file lpc17xx_timer.h.

#define TIM_CCR_MASKBIT ((uint32_t)(0x3F))

Timer capture control bit mask

Definition at line 101 of file lpc17xx_timer.h.

#define TIM_COUNTER_MODE ((uint8_t)(1))

Definition at line 135 of file lpc17xx_timer.h.

#define TIM_CTCR_INPUT_MASK 0xC

Mask to get the count input select bits

Definition at line 132 of file lpc17xx_timer.h.

#define TIM_CTCR_MASKBIT 0xF

Timer Count control bit mask

Definition at line 134 of file lpc17xx_timer.h.

#define TIM_CTCR_MODE_MASK 0x3

Mask to get the Counter/timer mode bits

Definition at line 130 of file lpc17xx_timer.h.

#define TIM_EDGE_MASK ( n ) (_SBF((n * 3), 0x03))

Mask bit for rising and falling edge bit

Definition at line 99 of file lpc17xx_timer.h.

#define TIM_EM ( n ) _BIT(n)

Bit location for output state change of MAT.n when external match happens, n = 0 to 3

Definition at line 110 of file lpc17xx_timer.h.

#define TIM_EM_HIGH ((uint8_t)(0x2))

Output state change of MAT.n when external match happens: high

Definition at line 116 of file lpc17xx_timer.h.

#define TIM_EM_LOW ((uint8_t)(0x1))

Output state change of MAT.n when external match happens: low

Definition at line 114 of file lpc17xx_timer.h.

#define TIM_EM_MASK ( n ) (_SBF(((n << 1) + 4), 0x03))

Mask for the MAT.n change state bits

Definition at line 122 of file lpc17xx_timer.h.

#define TIM_EM_NOTHING ((uint8_t)(0x0))

Output state change of MAT.n when external match happens: no change

Definition at line 112 of file lpc17xx_timer.h.

#define TIM_EM_SET | ( | n,
 |  | s | ) | (_SBF(((n << 1) + 4), (s & 0x03)))

Macro for setting for the MAT.n change state bits

Definition at line 120 of file lpc17xx_timer.h.

#define TIM_EM_TOGGLE ((uint8_t)(0x3))

Output state change of MAT.n when external match happens: toggle

Definition at line 118 of file lpc17xx_timer.h.

#define TIM_EMR_MASKBIT 0x0FFF

Timer external match bit mask

Definition at line 124 of file lpc17xx_timer.h.

#define TIM_ENABLE ((uint32_t)(1<<0))

Timer/counter enable bit

Definition at line 69 of file lpc17xx_timer.h.

#define TIM_INT_ON_CAP ( n ) (_BIT(((n * 3) + 2)))

Bit location for CAP.n on CRx interrupt enable, n = 0 to 3

Definition at line 97 of file lpc17xx_timer.h.

#define TIM_INT_ON_MATCH ( n ) (_BIT((n * 3)))

Bit location for interrupt on MRx match, n = 0 to 3

Definition at line 79 of file lpc17xx_timer.h.

#define TIM_IR_CLR ( n ) _BIT(n)

Macro to clean interrupt pending

Definition at line 55 of file lpc17xx_timer.h.

#define TIM_MATCH_INT ( n ) (_BIT(n & 0x0F))

Macro for getting a timer match interrupt bit

Definition at line 61 of file lpc17xx_timer.h.

#define TIM_MCR_CHANNEL_MASKBIT ( n ) ((uint32_t)(7<<(n*3)))

Timer Match control bit mask for specific channel

Definition at line 87 of file lpc17xx_timer.h.

#define TIM_MCR_MASKBIT ((uint32_t)(0x0FFF))

Timer Match control bit mask

Definition at line 85 of file lpc17xx_timer.h.

#define TIM_RESET ((uint32_t)(1<<1))

Timer/counter reset bit

Definition at line 71 of file lpc17xx_timer.h.

#define TIM_RESET_ON_MATCH ( n ) (_BIT(((n * 3) + 1)))

Bit location for reset on MRx match, n = 0 to 3

Definition at line 81 of file lpc17xx_timer.h.

#define TIM_STOP_ON_MATCH ( n ) (_BIT(((n * 3) + 2)))

Bit location for stop on MRx match, n = 0 to 3

Definition at line 83 of file lpc17xx_timer.h.

#define TIM_TCR_MASKBIT ((uint32_t)(3))

Timer control bit mask

Definition at line 73 of file lpc17xx_timer.h.

Generated on Tue Jun 7 14:59:40 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: TIM Public Types

TIM Public Types
[TIM]

Data Structures

struct | TIM_TIMERCFG_Type
Configuration structure in TIMER mode. More...
struct | TIM_COUNTERCFG_Type
Configuration structure in COUNTER mode. More...
struct | TIM_MATCHCFG_Type
Match channel configuration structure. More...
struct | TIM_CAPTURECFG_Type
Capture Input configuration structure. More...

Enumerations

enum TIM_INT_TYPE {
TIM_MR0_INT = 0, TIM_MR1_INT = 1, TIM_MR2_INT = 2, TIM_MR3_INT = 3,
TIM_CR0_INT = 4, TIM_CR1_INT = 5
}
interrupt type More...
enum | TIM_MODE_OPT { TIM_TIMER_MODE = 0, TIM_COUNTER_RISING_MODE, TIM_COUNTER_FALLING_MODE, TIM_COUNTER_ANY_MODE }
Timer/counter operating mode. More...
enum | TIM_PRESCALE_OPT { TIM_PRESCALE_TICKVAL = 0, TIM_PRESCALE_USVAL }
Timer/Counter prescale option. More...
enum | TIM_COUNTER_INPUT_OPT { TIM_COUNTER_INCAP0 = 0, TIM_COUNTER_INCAP1 }
Counter input option. More...
enum | TIM_EXTMATCH_OPT { TIM_EXTMATCH_NOTHING = 0, TIM_EXTMATCH_LOW, TIM_EXTMATCH_HIGH, TIM_EXTMATCH_TOGGLE }
Timer/Counter external match option. More...
enum | TIM_CAP_MODE_OPT { TIM_CAPTURE_NONE = 0, TIM_CAPTURE_RISING, TIM_CAPTURE_FALLING, TIM_CAPTURE_ANY }
Timer/counter capture mode options. More...

Enumeration Type Documentation

enum TIM_CAP_MODE_OPT

Timer/counter capture mode options.

Enumerator:
TIM_CAPTURE_NONE | No Capture
TIM_CAPTURE_RISING | Rising capture mode
TIM_CAPTURE_FALLING | Falling capture mode
TIM_CAPTURE_ANY | On both edges

Definition at line 223 of file lpc17xx_timer.h.

enum TIM_COUNTER_INPUT_OPT

Counter input option.

Enumerator:
TIM_COUNTER_INCAP0 | CAPn.0 input pin for TIMERn
TIM_COUNTER_INCAP1 | CAPn.1 input pin for TIMERn

Definition at line 207 of file lpc17xx_timer.h.

enum TIM_EXTMATCH_OPT

Timer/Counter external match option.

Enumerator:
TIM_EXTMATCH_NOTHING | Do nothing for external output pin if match
TIM_EXTMATCH_LOW | Force external output pin to low if match
TIM_EXTMATCH_HIGH | Force external output pin to high if match
TIM_EXTMATCH_TOGGLE | Toggle external output pin if match

Definition at line 214 of file lpc17xx_timer.h.

enum TIM_INT_TYPE

interrupt type

Enumerator:
TIM_MR0_INT | interrupt for Match channel 0
TIM_MR1_INT | interrupt for Match channel 1
TIM_MR2_INT | interrupt for Match channel 2
TIM_MR3_INT | interrupt for Match channel 3
TIM_CR0_INT | interrupt for Capture channel 0
TIM_CR1_INT | interrupt for Capture channel 1

Definition at line 180 of file lpc17xx_timer.h.

enum TIM_MODE_OPT

Timer/counter operating mode.

Enumerator:
TIM_TIMER_MODE | Timer mode
TIM_COUNTER_RISING_MODE | Counter rising mode
TIM_COUNTER_FALLING_MODE | Counter falling mode
TIM_COUNTER_ANY_MODE | Counter on both edges

Definition at line 191 of file lpc17xx_timer.h.

enum TIM_PRESCALE_OPT

Timer/Counter prescale option.

Enumerator:
TIM_PRESCALE_TICKVAL | Prescale in absolute value
TIM_PRESCALE_USVAL | Prescale in microsecond value

Definition at line 200 of file lpc17xx_timer.h.

Generated on Tue Jun 7 14:59:40 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: TIM Public Functions

TIM Public Functions
[TIM]

Functions

void | TIM_Init (LPC_TIM_TypeDef *TIMx, TIM_MODE_OPT TimerCounterMode, void *TIM_ConfigStruct)
Initial Timer/Counter device Set Clock frequency for Timer Set initial configuration for Timer.
void | TIM_DeInit (LPC_TIM_TypeDef *TIMx)
Close Timer/Counter device.
void | TIM_ClearIntPending (LPC_TIM_TypeDef *TIMx, TIM_INT_TYPE IntFlag)
Clear Interrupt pending.
void | TIM_ClearIntCapturePending (LPC_TIM_TypeDef *TIMx, TIM_INT_TYPE IntFlag)
Clear Capture Interrupt pending.
FlagStatus | TIM_GetIntStatus (LPC_TIM_TypeDef *TIMx, TIM_INT_TYPE IntFlag)
Get Interrupt Status.
FlagStatus | TIM_GetIntCaptureStatus (LPC_TIM_TypeDef *TIMx, TIM_INT_TYPE IntFlag)
Get Capture Interrupt Status.
void | TIM_ConfigStructInit (TIM_MODE_OPT TimerCounterMode, void *TIM_ConfigStruct)
Configuration for Timer at initial time.
void | TIM_ConfigMatch (LPC_TIM_TypeDef *TIMx, TIM_MATCHCFG_Type *TIM_MatchConfigStruct)
Configuration for Match register.
void | TIM_UpdateMatchValue (LPC_TIM_TypeDef *TIMx, uint8_t MatchChannel, uint32_t MatchValue)
Update Match value.
void | TIM_SetMatchExt (LPC_TIM_TypeDef *TIMx, TIM_EXTMATCH_OPT ext_match)
void | TIM_ConfigCapture (LPC_TIM_TypeDef *TIMx, TIM_CAPTURECFG_Type *TIM_CaptureConfigStruct)
Configuration for Capture register.
void | TIM_Cmd (LPC_TIM_TypeDef *TIMx, FunctionalState NewState)
Start/Stop Timer/Counter device.
uint32_t | TIM_GetCaptureValue (LPC_TIM_TypeDef *TIMx, TIM_COUNTER_INPUT_OPT CaptureChannel)
Read value of capture register in timer/counter device.
void | TIM_ResetCounter (LPC_TIM_TypeDef *TIMx)
Reset Timer/Counter device, Make TC and PC are synchronously reset on the next positive edge of PCLK.

Function Documentation

void TIM_ClearIntCapturePending | ( | LPC_TIM_TypeDef * | TIMx,
 |  | TIM_INT_TYPE | IntFlag
 | ) |  |

Clear Capture Interrupt pending.

Parameters:
[in] TIMx Timer selection, should be
  • LPC_TIM0: TIMER0 peripheral
    • LPC_TIM1: TIMER1 peripheral
    • LPC_TIM2: TIMER2 peripheral
    • LPC_TIM3: TIMER3 peripheral
[in] IntFlag interrupt type, should be:
  • TIM_MR0_INT: Interrupt for Match channel 0
  • TIM_MR1_INT: Interrupt for Match channel 1
  • TIM_MR2_INT: Interrupt for Match channel 2
  • TIM_MR3_INT: Interrupt for Match channel 3
  • TIM_CR0_INT: Interrupt for Capture channel 0
  • TIM_CR1_INT: Interrupt for Capture channel 1
Returns:
None

Definition at line 242 of file lpc17xx_timer.c.

void TIM_ClearIntPending | ( | LPC_TIM_TypeDef * | TIMx,
 |  | TIM_INT_TYPE | IntFlag
 | ) |  |

Clear Interrupt pending.

Parameters:
[in] TIMx Timer selection, should be:
  • LPC_TIM0: TIMER0 peripheral
    • LPC_TIM1: TIMER1 peripheral
    • LPC_TIM2: TIMER2 peripheral
    • LPC_TIM3: TIMER3 peripheral
[in] IntFlag,: interrupt type, should be:
  • TIM_MR0_INT: Interrupt for Match channel 0
  • TIM_MR1_INT: Interrupt for Match channel 1
  • TIM_MR2_INT: Interrupt for Match channel 2
  • TIM_MR3_INT: Interrupt for Match channel 3
  • TIM_CR0_INT: Interrupt for Capture channel 0
  • TIM_CR1_INT: Interrupt for Capture channel 1
Returns:
None

Definition at line 219 of file lpc17xx_timer.c.

void TIM_Cmd | ( | LPC_TIM_TypeDef * | TIMx,
 |  | FunctionalState | NewState
 | ) |  |

Start/Stop Timer/Counter device.

Parameters:
[in] TIMx Pointer to timer device, should be:
  • LPC_TIM0: TIMER0 peripheral
    • LPC_TIM1: TIMER1 peripheral
    • LPC_TIM2: TIMER2 peripheral
    • LPC_TIM3: TIMER3 peripheral
[in] NewState
  • ENABLE : set timer enable
  • DISABLE : disable timer
Returns:
None

Definition at line 408 of file lpc17xx_timer.c.

void TIM_ConfigCapture | ( | LPC_TIM_TypeDef * | TIMx,
 |  | TIM_CAPTURECFG_Type * | TIM_CaptureConfigStruct
 | ) |  |

Configuration for Capture register.

Parameters:
[in] TIMx Pointer to timer device, should be:
  • LPC_TIM0: TIMER0 peripheral
    • LPC_TIM1: TIMER1 peripheral
    • LPC_TIM2: TIMER2 peripheral
    • LPC_TIM3: TIMER3 peripheral
      • CaptureChannel: set the channel to capture data
      • RisingEdge : if SET, Capture at rising edge
      • FallingEdge : if SET, Capture at falling edge
      • IntOnCaption : if SET, Capture generate interrupt
[in] TIM_CaptureConfigStruct Pointer to TIM_CAPTURECFG_Type
Returns:
None

Definition at line 554 of file lpc17xx_timer.c.

void TIM_ConfigMatch | ( | LPC_TIM_TypeDef * | TIMx,
 |  | TIM_MATCHCFG_Type * | TIM_MatchConfigStruct
 | ) |  |

Configuration for Match register.

Parameters:
[in] TIMx Pointer to timer device, should be:
  • LPC_TIM0: TIMER0 peripheral
    • LPC_TIM1: TIMER1 peripheral
    • LPC_TIM2: TIMER2 peripheral
    • LPC_TIM3: TIMER3 peripheral
[in] TIM_MatchConfigStruct Pointer to TIM_MATCHCFG_Type
  • MatchChannel : choose channel 0 or 1
  • IntOnMatch : if SET, interrupt will be generated when MRxx match the value in TC
  • StopOnMatch : if SET, TC and PC will be stopped whenM Rxx match the value in TC
  • ResetOnMatch : if SET, Reset on MR0 when MRxx match the value in TC -ExtMatchOutputType: Select output for external match + 0: Do nothing for external output pin if match + 1: Force external output pin to low if match + 2: Force external output pin to high if match + 3: Toggle external output pin if match MatchValue: Set the value to be compared with TC value
Returns:
None

Definition at line 462 of file lpc17xx_timer.c.

void TIM_ConfigStructInit | ( | TIM_MODE_OPT | TimerCounterMode,
 |  | void * | TIM_ConfigStruct
 | ) |  |

Configuration for Timer at initial time.

Parameters:
[in] TimerCounterMode timer counter mode, should be:
  • TIM_TIMER_MODE: Timer mode
  • TIM_COUNTER_RISING_MODE: Counter rising mode
  • TIM_COUNTER_FALLING_MODE: Counter falling mode
  • TIM_COUNTER_ANY_MODE:Counter on both edges
[in] TIM_ConfigStruct pointer to TIM_TIMERCFG_Type or TIM_COUNTERCFG_Type
Returns:
None

Definition at line 260 of file lpc17xx_timer.c.

void TIM_DeInit ( LPC_TIM_TypeDef * TIMx )

Close Timer/Counter device.

Parameters:
[in] TIMx Pointer to timer device, should be:
  • LPC_TIM0: TIMER0 peripheral
  • LPC_TIM1: TIMER1 peripheral
  • LPC_TIM2: TIMER2 peripheral
  • LPC_TIM3: TIMER3 peripheral
Returns:
None

Definition at line 375 of file lpc17xx_timer.c.

uint32_t TIM_GetCaptureValue | ( | LPC_TIM_TypeDef * | TIMx,
 |  | TIM_COUNTER_INPUT_OPT | CaptureChannel
 | ) |  |

Read value of capture register in timer/counter device.

Parameters:
[in] TIMx Pointer to timer/counter device, should be:
  • LPC_TIM0: TIMER0 peripheral
    • LPC_TIM1: TIMER1 peripheral
    • LPC_TIM2: TIMER2 peripheral
    • LPC_TIM3: TIMER3 peripheral
[in] CaptureChannel,: capture channel number, should be:
  • TIM_COUNTER_INCAP0: CAPn.0 input pin for TIMERn
  • TIM_COUNTER_INCAP1: CAPn.1 input pin for TIMERn
Returns:
Value of capture register

Definition at line 582 of file lpc17xx_timer.c.

FlagStatus TIM_GetIntCaptureStatus | ( | LPC_TIM_TypeDef * | TIMx,
 |  | TIM_INT_TYPE | IntFlag
 | ) |  |

Get Capture Interrupt Status.

Parameters:
[in] TIMx Timer selection, should be:
  • LPC_TIM0: TIMER0 peripheral
    • LPC_TIM1: TIMER1 peripheral
    • LPC_TIM2: TIMER2 peripheral
    • LPC_TIM3: TIMER3 peripheral
[in] IntFlag,: interrupt type, should be:
  • TIM_MR0_INT: Interrupt for Match channel 0
  • TIM_MR1_INT: Interrupt for Match channel 1
  • TIM_MR2_INT: Interrupt for Match channel 2
  • TIM_MR3_INT: Interrupt for Match channel 3
  • TIM_CR0_INT: Interrupt for Capture channel 0
  • TIM_CR1_INT: Interrupt for Capture channel 1
Returns:
FlagStatus
  • SET : interrupt
  • RESET : no interrupt

Definition at line 193 of file lpc17xx_timer.c.

FlagStatus TIM_GetIntStatus | ( | LPC_TIM_TypeDef * | TIMx,
 |  | TIM_INT_TYPE | IntFlag
 | ) |  |

Get Interrupt Status.

Parameters:
[in] TIMx Timer selection, should be:
  • LPC_TIM0: TIMER0 peripheral
    • LPC_TIM1: TIMER1 peripheral
    • LPC_TIM2: TIMER2 peripheral
    • LPC_TIM3: TIMER3 peripheral
[in] IntFlag,: interrupt type, should be:
  • TIM_MR0_INT: Interrupt for Match channel 0
  • TIM_MR1_INT: Interrupt for Match channel 1
  • TIM_MR2_INT: Interrupt for Match channel 2
  • TIM_MR3_INT: Interrupt for Match channel 3
  • TIM_CR0_INT: Interrupt for Capture channel 0
  • TIM_CR1_INT: Interrupt for Capture channel 1
Returns:
FlagStatus
  • SET : interrupt
  • RESET : no interrupt

Definition at line 163 of file lpc17xx_timer.c.

void TIM_Init | ( | LPC_TIM_TypeDef * | TIMx,
 |  | TIM_MODE_OPT | TimerCounterMode,
 |  | void * | TIM_ConfigStruct
 | ) |  |

Initial Timer/Counter device Set Clock frequency for Timer Set initial configuration for Timer.

Parameters:
[in] TIMx Timer selection, should be:
  • LPC_TIM0: TIMER0 peripheral
  • LPC_TIM1: TIMER1 peripheral
  • LPC_TIM2: TIMER2 peripheral
  • LPC_TIM3: TIMER3 peripheral
[in] TimerCounterMode Timer counter mode, should be:
  • TIM_TIMER_MODE: Timer mode
  • TIM_COUNTER_RISING_MODE: Counter rising mode
  • TIM_COUNTER_FALLING_MODE: Counter falling mode
  • TIM_COUNTER_ANY_MODE:Counter on both edges
[in] TIM_ConfigStruct pointer to TIM_TIMERCFG_Type that contains the configuration information for the specified Timer peripheral.
Returns:
None

Definition at line 294 of file lpc17xx_timer.c.

void TIM_ResetCounter ( LPC_TIM_TypeDef * TIMx )

Reset Timer/Counter device, Make TC and PC are synchronously reset on the next positive edge of PCLK.

Parameters:
[in] TIMx Pointer to timer device, should be:
  • LPC_TIM0: TIMER0 peripheral
    • LPC_TIM1: TIMER1 peripheral
    • LPC_TIM2: TIMER2 peripheral
    • LPC_TIM3: TIMER3 peripheral
Returns:
None

Definition at line 432 of file lpc17xx_timer.c.

void TIM_SetMatchExt | ( | LPC_TIM_TypeDef * | TIMx,
 |  | TIM_EXTMATCH_OPT | ext_match
 | ) |  |

void TIM_UpdateMatchValue | ( | LPC_TIM_TypeDef * | TIMx,
 |  | uint8_t | MatchChannel,
 |  | uint32_t | MatchValue
 | ) |  |

Update Match value.

Parameters:
[in] TIMx Pointer to timer device, should be:
  • LPC_TIM0: TIMER0 peripheral
    • LPC_TIM1: TIMER1 peripheral
    • LPC_TIM2: TIMER2 peripheral
    • LPC_TIM3: TIMER3 peripheral
[in] | MatchChannel | Match channel, should be: 0..3
[in] | MatchValue | updated match value
Returns:
None

Definition at line 517 of file lpc17xx_timer.c.

Generated on Tue Jun 7 14:59:40 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: UART

UART
[LPC1700CMSIS Firmware Library]

Modules

UART Public Macros
UART Private Macros
UART Public Types
UART Public Functions
Generated on Tue Jun 7 14:59:40 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: UART Public Macros

UART Public Macros
[UART]

Defines

#define UART_BLOCKING_TIMEOUT (0xFFFFFFFFUL)

Define Documentation

#define UART_BLOCKING_TIMEOUT (0xFFFFFFFFUL)

UART time-out definitions in case of using Read() and Write function with Blocking Flag mode

Definition at line 54 of file lpc17xx_uart.h.

Generated on Tue Jun 7 14:59:40 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: UART Private Macros

UART Private Macros
[UART]

Defines

#define | UART_ACCEPTED_BAUDRATE_ERROR (3)
#define | UART_RBR_MASKBIT ((uint8_t)0xFF)
#define | UART_THR_MASKBIT ((uint8_t)0xFF)
#define | UART_LOAD_DLL(div) ((div) & 0xFF)
#define | UART_DLL_MASKBIT ((uint8_t)0xFF)
#define | UART_DLM_MASKBIT ((uint8_t)0xFF)
#define | UART_LOAD_DLM(div) (((div) >> 8) & 0xFF)
#define | UART_IER_RBRINT_EN ((uint32_t)(1<<0))
#define | UART_IER_THREINT_EN ((uint32_t)(1<<1))
#define | UART_IER_RLSINT_EN ((uint32_t)(1<<2))
#define | UART1_IER_MSINT_EN ((uint32_t)(1<<3))
#define | UART1_IER_CTSINT_EN ((uint32_t)(1<<7))
#define | UART_IER_ABEOINT_EN ((uint32_t)(1<<8))
#define | UART_IER_ABTOINT_EN ((uint32_t)(1<<9))
#define | UART_IER_BITMASK ((uint32_t)(0x307))
#define | UART1_IER_BITMASK ((uint32_t)(0x38F))
#define | UART_IIR_INTSTAT_PEND ((uint32_t)(1<<0))
#define | UART_IIR_INTID_RLS ((uint32_t)(3<<1))
#define | UART_IIR_INTID_RDA ((uint32_t)(2<<1))
#define | UART_IIR_INTID_CTI ((uint32_t)(6<<1))
#define | UART_IIR_INTID_THRE ((uint32_t)(1<<1))
#define | UART1_IIR_INTID_MODEM ((uint32_t)(0<<1))
#define | UART_IIR_INTID_MASK ((uint32_t)(7<<1))
#define | UART_IIR_FIFO_EN ((uint32_t)(3<<6))
#define | UART_IIR_ABEO_INT ((uint32_t)(1<<8))
#define | UART_IIR_ABTO_INT ((uint32_t)(1<<9))
#define | UART_IIR_BITMASK ((uint32_t)(0x3CF))
#define | UART_FCR_FIFO_EN ((uint8_t)(1<<0))
#define | UART_FCR_RX_RS ((uint8_t)(1<<1))
#define | UART_FCR_TX_RS ((uint8_t)(1<<2))
#define | UART_FCR_DMAMODE_SEL ((uint8_t)(1<<3))
#define | UART_FCR_TRG_LEV0 ((uint8_t)(0))
#define | UART_FCR_TRG_LEV1 ((uint8_t)(1<<6))
#define | UART_FCR_TRG_LEV2 ((uint8_t)(2<<6))
#define | UART_FCR_TRG_LEV3 ((uint8_t)(3<<6))
#define | UART_FCR_BITMASK ((uint8_t)(0xCF))
#define | UART_TX_FIFO_SIZE (16)
#define | UART_LCR_WLEN5 ((uint8_t)(0))
#define | UART_LCR_WLEN6 ((uint8_t)(1<<0))
#define | UART_LCR_WLEN7 ((uint8_t)(2<<0))
#define | UART_LCR_WLEN8 ((uint8_t)(3<<0))
#define | UART_LCR_STOPBIT_SEL ((uint8_t)(1<<2))
#define | UART_LCR_PARITY_EN ((uint8_t)(1<<3))
#define | UART_LCR_PARITY_ODD ((uint8_t)(0))
#define | UART_LCR_PARITY_EVEN ((uint8_t)(1<<4))
#define | UART_LCR_PARITY_F_1 ((uint8_t)(2<<4))
#define | UART_LCR_PARITY_F_0 ((uint8_t)(3<<4))
#define | UART_LCR_BREAK_EN ((uint8_t)(1<<6))
#define | UART_LCR_DLAB_EN ((uint8_t)(1<<7))
#define | UART_LCR_BITMASK ((uint8_t)(0xFF))
#define | UART1_MCR_DTR_CTRL ((uint8_t)(1<<0))
#define | UART1_MCR_RTS_CTRL ((uint8_t)(1<<1))
#define | UART1_MCR_LOOPB_EN ((uint8_t)(1<<4))
#define | UART1_MCR_AUTO_RTS_EN ((uint8_t)(1<<6))
#define | UART1_MCR_AUTO_CTS_EN ((uint8_t)(1<<7))
#define | UART1_MCR_BITMASK ((uint8_t)(0x0F3))
#define | UART_LSR_RDR ((uint8_t)(1<<0))
#define | UART_LSR_OE ((uint8_t)(1<<1))
#define | UART_LSR_PE ((uint8_t)(1<<2))
#define | UART_LSR_FE ((uint8_t)(1<<3))
#define | UART_LSR_BI ((uint8_t)(1<<4))
#define | UART_LSR_THRE ((uint8_t)(1<<5))
#define | UART_LSR_TEMT ((uint8_t)(1<<6))
#define | UART_LSR_RXFE ((uint8_t)(1<<7))
#define | UART_LSR_BITMASK ((uint8_t)(0xFF))
#define | UART1_MSR_DELTA_CTS ((uint8_t)(1<<0))
#define | UART1_MSR_DELTA_DSR ((uint8_t)(1<<1))
#define | UART1_MSR_LO2HI_RI ((uint8_t)(1<<2))
#define | UART1_MSR_DELTA_DCD ((uint8_t)(1<<3))
#define | UART1_MSR_CTS ((uint8_t)(1<<4))
#define | UART1_MSR_DSR ((uint8_t)(1<<5))
#define | UART1_MSR_RI ((uint8_t)(1<<6))
#define | UART1_MSR_DCD ((uint8_t)(1<<7))
#define | UART1_MSR_BITMASK ((uint8_t)(0xFF))
#define | UART_SCR_BIMASK ((uint8_t)(0xFF))
#define | UART_ACR_START ((uint32_t)(1<<0))
#define | UART_ACR_MODE ((uint32_t)(1<<1))
#define | UART_ACR_AUTO_RESTART ((uint32_t)(1<<2))
#define | UART_ACR_ABEOINT_CLR ((uint32_t)(1<<8))
#define | UART_ACR_ABTOINT_CLR ((uint32_t)(1<<9))
#define | UART_ACR_BITMASK ((uint32_t)(0x307))
#define | UART_ICR_IRDAEN ((uint32_t)(1<<0))
#define | UART_ICR_IRDAINV ((uint32_t)(1<<1))
#define | UART_ICR_FIXPULSE_EN ((uint32_t)(1<<2))
#define | UART_ICR_PULSEDIV(n) ((uint32_t)((n&0x07)<<3))
#define | UART_ICR_BITMASK ((uint32_t)(0x3F))
#define | UART_FDR_DIVADDVAL(n) ((uint32_t)(n&0x0F))
#define | UART_FDR_MULVAL(n) ((uint32_t)((n<<4)&0xF0))
#define | UART_FDR_BITMASK ((uint32_t)(0xFF))
#define | UART_TER_TXEN ((uint8_t)(1<<7))
#define | UART_TER_BITMASK ((uint8_t)(0x80))
#define | UART1_RS485CTRL_NMM_EN ((uint32_t)(1<<0))
#define | UART1_RS485CTRL_RX_DIS ((uint32_t)(1<<1))
#define | UART1_RS485CTRL_AADEN ((uint32_t)(1<<2))
#define | UART1_RS485CTRL_SEL_DTR ((uint32_t)(1<<3))
#define | UART1_RS485CTRL_DCTRL_EN ((uint32_t)(1<<4))
#define | UART1_RS485CTRL_OINV_1 ((uint32_t)(1<<5))
#define | UART1_RS485CTRL_BITMASK ((uint32_t)(0x3F))
#define | UART1_RS485ADRMATCH_BITMASK ((uint8_t)(0xFF))
#define | UART1_RS485DLY_BITMASK ((uint8_t)(0xFF))
#define | UART_FIFOLVL_RXFIFOLVL(n) ((uint32_t)(n&0x0F))
#define | UART_FIFOLVL_TXFIFOLVL(n) ((uint32_t)((n>>8)&0x0F))
#define | UART_FIFOLVL_BITMASK ((uint32_t)(0x0F0F))
#define | PARAM_UART_DATABIT(databit)
#define | PARAM_UART_STOPBIT(stopbit) ((stopbit==UART_STOPBIT_1) || (stopbit==UART_STOPBIT_2))
#define | PARAM_UART_PARITY(parity)
#define | PARAM_UART_FIFO_LEVEL(fifo)
#define | PARAM_UART_INTCFG(IntCfg)
#define | PARAM_UART1_INTCFG(IntCfg) ((IntCfg==UART1_INTCFG_MS) || (IntCfg==UART1_INTCFG_CTS))
#define | PARAM_UART_AUTOBAUD_MODE(ABmode) ((ABmode==UART_AUTOBAUD_MODE0) || (ABmode==UART_AUTOBAUD_MODE1))
#define | PARAM_UART_AUTOBAUD_INTSTAT(ABIntStat)
#define | PARAM_UART_IrDA_PULSEDIV(PulseDiv)
#define | PARAM_UART1_SIGNALSTATE(x) ((x==INACTIVE) || (x==ACTIVE))
#define | PARAM_UART1_MODEM_PIN(x) ((x==UART1_MODEM_PIN_DTR) || (x==UART1_MODEM_PIN_RTS))
#define | PARAM_UART1_MODEM_MODE(x)
#define | PARAM_UART_RS485_DIRCTRL_PIN(x) ((x==UART1_RS485_DIRCTRL_RTS) || (x==UART1_RS485_DIRCTRL_DTR))
#define | PARAM_UARTx(x)
#define | PARAM_UART_IrDA(x) (((uint32_t *)x)==((uint32_t *)LPC_UART3))
#define | PARAM_UART1_MODEM(x) (((uint32_t *)x)==((uint32_t *)LPC_UART1))
#define | PARAM_UART1_RS485_CFG_MATCHADDRVALUE(x) ((x<0xFF))
#define | PARAM_UART1_RS485_CFG_DELAYVALUE(x) ((x<0xFF))

Define Documentation

#define PARAM_UART1_INTCFG ( IntCfg ) ((IntCfg==UART1_INTCFG_MS) || (IntCfg==UART1_INTCFG_CTS))

Macro to check the input UART1_INTCFG parameters - expansion input parameter for UART1

Definition at line 283 of file lpc17xx_uart.h.

#define PARAM_UART1_MODEM ( x ) (((uint32_t *)x)==((uint32_t *)LPC_UART1))

Definition at line 317 of file lpc17xx_uart.h.

#define PARAM_UART1_MODEM_MODE ( x )

Value:

((x==UART1_MODEM_MODE_LOOPBACK) || (x==UART1_MODEM_MODE_AUTO_RTS) \
|| (x==UART1_MODEM_MODE_AUTO_CTS))
Macro to check the input PARAM_UART1_MODEM_MODE parameters

Definition at line 305 of file lpc17xx_uart.h.

#define PARAM_UART1_MODEM_PIN ( x ) ((x==UART1_MODEM_PIN_DTR) || (x==UART1_MODEM_PIN_RTS))

Macro to check the input PARAM_UART1_MODEM_PIN parameters

Definition at line 302 of file lpc17xx_uart.h.

#define PARAM_UART1_RS485_CFG_DELAYVALUE ( x ) ((x<0xFF))

Macro to check the input value for UART1_RS485_CFG_DELAYVALUE parameter

Definition at line 323 of file lpc17xx_uart.h.

#define PARAM_UART1_RS485_CFG_MATCHADDRVALUE ( x ) ((x<0xFF))

Macro to check the input value for UART1_RS485_CFG_MATCHADDRVALUE parameter

Definition at line 320 of file lpc17xx_uart.h.

#define PARAM_UART1_SIGNALSTATE ( x ) ((x==INACTIVE) || (x==ACTIVE))

Definition at line 299 of file lpc17xx_uart.h.

#define PARAM_UART_AUTOBAUD_INTSTAT ( ABIntStat )

Value:

((ABIntStat==UART_AUTOBAUD_INTSTAT_ABEO) || \
                (ABIntStat==UART_AUTOBAUD_INTSTAT_ABTO))
Macro to check the input UART_AUTOBAUD_INTSTAT parameters

Definition at line 289 of file lpc17xx_uart.h.

#define PARAM_UART_AUTOBAUD_MODE ( ABmode ) ((ABmode==UART_AUTOBAUD_MODE0) || (ABmode==UART_AUTOBAUD_MODE1))

Macro to check the input UART_AUTOBAUD_MODE parameters

Definition at line 286 of file lpc17xx_uart.h.

#define PARAM_UART_DATABIT ( databit )

Value:

((databit==UART_DATABIT_5) || (databit==UART_DATABIT_6)\
|| (databit==UART_DATABIT_7) || (databit==UART_DATABIT_8))
Macro to check the input UART_DATABIT parameters

Definition at line 261 of file lpc17xx_uart.h.

#define PARAM_UART_FIFO_LEVEL ( fifo )

Value:

((fifo==UART_FIFO_TRGLEV0) \
|| (fifo==UART_FIFO_TRGLEV1) || (fifo==UART_FIFO_TRGLEV2) \
|| (fifo==UART_FIFO_TRGLEV3))
Macro to check the input UART_FIFO parameters

Definition at line 273 of file lpc17xx_uart.h.

#define PARAM_UART_INTCFG ( IntCfg )

Value:

((IntCfg==UART_INTCFG_RBR) || (IntCfg==UART_INTCFG_THRE) \
|| (IntCfg==UART_INTCFG_RLS) || (IntCfg==UART_INTCFG_ABEO) \
|| (IntCfg==UART_INTCFG_ABTO))
Macro to check the input UART_INTCFG parameters

Definition at line 278 of file lpc17xx_uart.h.

#define PARAM_UART_IrDA ( x ) (((uint32_t *)x)==((uint32_t *)LPC_UART3))

Definition at line 316 of file lpc17xx_uart.h.

#define PARAM_UART_IrDA_PULSEDIV ( PulseDiv )

Value:

((PulseDiv==UART_IrDA_PULSEDIV2) || (PulseDiv==UART_IrDA_PULSEDIV4) \
|| (PulseDiv==UART_IrDA_PULSEDIV8) || (PulseDiv==UART_IrDA_PULSEDIV16) \
|| (PulseDiv==UART_IrDA_PULSEDIV32) || (PulseDiv==UART_IrDA_PULSEDIV64) \
|| (PulseDiv==UART_IrDA_PULSEDIV128) || (PulseDiv==UART_IrDA_PULSEDIV256))
Macro to check the input UART_IrDA_PULSEDIV parameters

Definition at line 293 of file lpc17xx_uart.h.

#define PARAM_UART_PARITY ( parity )

Value:

((parity==UART_PARITY_NONE) || (parity==UART_PARITY_ODD) \
|| (parity==UART_PARITY_EVEN) || (parity==UART_PARITY_SP_1) \
|| (parity==UART_PARITY_SP_0))
Macro to check the input UART_PARITY parameters

Definition at line 268 of file lpc17xx_uart.h.

#define PARAM_UART_RS485_DIRCTRL_PIN ( x ) ((x==UART1_RS485_DIRCTRL_RTS) || (x==UART1_RS485_DIRCTRL_DTR))

Macro to check the direction control pin type

Definition at line 309 of file lpc17xx_uart.h.

#define PARAM_UART_STOPBIT ( stopbit ) ((stopbit==UART_STOPBIT_1) || (stopbit==UART_STOPBIT_2))

Macro to check the input UART_STOPBIT parameters

Definition at line 265 of file lpc17xx_uart.h.

#define PARAM_UARTx ( x )

Value:

((((uint32_t *)x)==((uint32_t *)LPC_UART0)) \
|| (((uint32_t *)x)==((uint32_t *)LPC_UART1)) \
|| (((uint32_t *)x)==((uint32_t *)LPC_UART2)) \
|| (((uint32_t *)x)==((uint32_t *)LPC_UART3)))

Definition at line 312 of file lpc17xx_uart.h.

#define UART1_IER_BITMASK ((uint32_t)(0x38F))

UART1 interrupt enable register bit mask

Definition at line 103 of file lpc17xx_uart.h.

#define UART1_IER_CTSINT_EN ((uint32_t)(1<<7))

CTS1 signal transition interrupt enable

Definition at line 99 of file lpc17xx_uart.h.

#define UART1_IER_MSINT_EN ((uint32_t)(1<<3))

Modem status interrupt enable

Definition at line 98 of file lpc17xx_uart.h.

#define UART1_IIR_INTID_MODEM ((uint32_t)(0<<1))

Interrupt identification: Modem interrupt

Definition at line 113 of file lpc17xx_uart.h.

#define UART1_MCR_AUTO_CTS_EN ((uint8_t)(1<<7))

Enable Auto CTS flow-control

Definition at line 158 of file lpc17xx_uart.h.

#define UART1_MCR_AUTO_RTS_EN ((uint8_t)(1<<6))

Enable Auto RTS flow-control

Definition at line 157 of file lpc17xx_uart.h.

#define UART1_MCR_BITMASK ((uint8_t)(0x0F3))

UART1 bit mask value

Definition at line 159 of file lpc17xx_uart.h.

#define UART1_MCR_DTR_CTRL ((uint8_t)(1<<0))

Macro defines for Macro defines for UART1 Modem Control Register Source for modem output pin DTR

Definition at line 154 of file lpc17xx_uart.h.

#define UART1_MCR_LOOPB_EN ((uint8_t)(1<<4))

Loop back mode select

Definition at line 156 of file lpc17xx_uart.h.

#define UART1_MCR_RTS_CTRL ((uint8_t)(1<<1))

Source for modem output pin RTS

Definition at line 155 of file lpc17xx_uart.h.

#define UART1_MSR_BITMASK ((uint8_t)(0xFF))

MSR register bit-mask value

Definition at line 185 of file lpc17xx_uart.h.

#define UART1_MSR_CTS ((uint8_t)(1<<4))

Clear To Send State

Definition at line 181 of file lpc17xx_uart.h.

#define UART1_MSR_DCD ((uint8_t)(1<<7))

Data Carrier Detect State

Definition at line 184 of file lpc17xx_uart.h.

#define UART1_MSR_DELTA_CTS ((uint8_t)(1<<0))

Macro defines for Macro defines for UART Modem (UART1 only) status register Set upon state change of input CTS

Definition at line 177 of file lpc17xx_uart.h.

#define UART1_MSR_DELTA_DCD ((uint8_t)(1<<3))

Set upon state change of input DCD

Definition at line 180 of file lpc17xx_uart.h.

#define UART1_MSR_DELTA_DSR ((uint8_t)(1<<1))

Set upon state change of input DSR

Definition at line 178 of file lpc17xx_uart.h.

#define UART1_MSR_DSR ((uint8_t)(1<<5))

Data Set Ready State

Definition at line 182 of file lpc17xx_uart.h.

#define UART1_MSR_LO2HI_RI ((uint8_t)(1<<2))

Set upon low to high transition of input RI

Definition at line 179 of file lpc17xx_uart.h.

#define UART1_MSR_RI ((uint8_t)(1<<6))

Ring Indicator State

Definition at line 183 of file lpc17xx_uart.h.

#define UART1_RS485ADRMATCH_BITMASK ((uint8_t)(0xFF))

Macro defines for Macro defines for UART1 RS-485 Address Match register Bit mask value

Definition at line 242 of file lpc17xx_uart.h.

#define UART1_RS485CTRL_AADEN ((uint32_t)(1<<2))

Auto Address Detect (AAD) is enabled

Definition at line 230 of file lpc17xx_uart.h.

#define UART1_RS485CTRL_BITMASK ((uint32_t)(0x3F))

RS485 control bit-mask value

Definition at line 237 of file lpc17xx_uart.h.

#define UART1_RS485CTRL_DCTRL_EN ((uint32_t)(1<<4))

Enable Auto Direction Control

Definition at line 233 of file lpc17xx_uart.h.

#define UART1_RS485CTRL_NMM_EN ((uint32_t)(1<<0))

Macro defines for Macro defines for UART1 RS485 Control register RS-485/EIA-485 Normal Multi-drop Mode (NMM) is disabled

Definition at line 227 of file lpc17xx_uart.h.

#define UART1_RS485CTRL_OINV_1 ((uint32_t)(1<<5))

This bit reverses the polarity of the direction control signal on the RTS (or DTR) pin. The direction control pin will be driven to logic "1" when the transmitter has data to be sent

Definition at line 234 of file lpc17xx_uart.h.

#define UART1_RS485CTRL_RX_DIS ((uint32_t)(1<<1))

The receiver is disabled

Definition at line 229 of file lpc17xx_uart.h.

#define UART1_RS485CTRL_SEL_DTR ((uint32_t)(1<<3))

If direction control is enabled (bit DCTRL = 1), pin DTR is used for direction control

Definition at line 231 of file lpc17xx_uart.h.

#define UART1_RS485DLY_BITMASK ((uint8_t)(0xFF))

Macro defines for Macro defines for UART1 RS-485 Delay value register

Definition at line 248 of file lpc17xx_uart.h.

#define UART_ACCEPTED_BAUDRATE_ERROR (3)

Acceptable UART baudrate error

Definition at line 66 of file lpc17xx_uart.h.

#define UART_ACR_ABEOINT_CLR ((uint32_t)(1<<8))

UART End of auto-baud interrupt clear

Definition at line 198 of file lpc17xx_uart.h.

#define UART_ACR_ABTOINT_CLR ((uint32_t)(1<<9))

UART Auto-baud time-out interrupt clear

Definition at line 199 of file lpc17xx_uart.h.

#define UART_ACR_AUTO_RESTART ((uint32_t)(1<<2))

UART Auto baudrate restart

Definition at line 197 of file lpc17xx_uart.h.

#define UART_ACR_BITMASK ((uint32_t)(0x307))

UART Auto Baudrate register bit mask

Definition at line 200 of file lpc17xx_uart.h.

#define UART_ACR_MODE ((uint32_t)(1<<1))

UART Auto baudrate Mode 1

Definition at line 196 of file lpc17xx_uart.h.

#define UART_ACR_START ((uint32_t)(1<<0))

Macro defines for Macro defines for UART Auto baudrate control register UART Auto-baud start

Definition at line 195 of file lpc17xx_uart.h.

#define UART_DLL_MASKBIT ((uint8_t)0xFF)

Divisor latch LSB bit mask

Definition at line 84 of file lpc17xx_uart.h.

#define UART_DLM_MASKBIT ((uint8_t)0xFF)

Macro defines for Macro defines for UARTn Divisor Latch MSB register Divisor latch MSB bit mask

Definition at line 89 of file lpc17xx_uart.h.

#define UART_FCR_BITMASK ((uint8_t)(0xCF))

UART FIFO control bit mask

Definition at line 131 of file lpc17xx_uart.h.

#define UART_FCR_DMAMODE_SEL ((uint8_t)(1<<3))

UART DMA mode selection

Definition at line 126 of file lpc17xx_uart.h.

#define UART_FCR_FIFO_EN ((uint8_t)(1<<0))

Macro defines for Macro defines for UART FIFO control register UART FIFO enable

Definition at line 123 of file lpc17xx_uart.h.

#define UART_FCR_RX_RS ((uint8_t)(1<<1))

UART FIFO RX reset

Definition at line 124 of file lpc17xx_uart.h.

#define UART_FCR_TRG_LEV0 ((uint8_t)(0))

UART FIFO trigger level 0: 1 character

Definition at line 127 of file lpc17xx_uart.h.

#define UART_FCR_TRG_LEV1 ((uint8_t)(1<<6))

UART FIFO trigger level 1: 4 character

Definition at line 128 of file lpc17xx_uart.h.

#define UART_FCR_TRG_LEV2 ((uint8_t)(2<<6))

UART FIFO trigger level 2: 8 character

Definition at line 129 of file lpc17xx_uart.h.

#define UART_FCR_TRG_LEV3 ((uint8_t)(3<<6))

UART FIFO trigger level 3: 14 character

Definition at line 130 of file lpc17xx_uart.h.

#define UART_FCR_TX_RS ((uint8_t)(1<<2))

UART FIFO TX reset

Definition at line 125 of file lpc17xx_uart.h.

#define UART_FDR_BITMASK ((uint32_t)(0xFF))

UART Fractional Divider register bit mask

Definition at line 216 of file lpc17xx_uart.h.

#define UART_FDR_DIVADDVAL ( n ) ((uint32_t)(n&0x0F))

Macro defines for Macro defines for UART Fractional divider register Baud-rate generation pre-scaler divisor

Definition at line 214 of file lpc17xx_uart.h.

#define UART_FDR_MULVAL ( n ) ((uint32_t)((n<<4)&0xF0))

Baud-rate pre-scaler multiplier value

Definition at line 215 of file lpc17xx_uart.h.

#define UART_FIFOLVL_BITMASK ((uint32_t)(0x0F0F))

UART FIFO Level Register bit mask

Definition at line 255 of file lpc17xx_uart.h.

#define UART_FIFOLVL_RXFIFOLVL ( n ) ((uint32_t)(n&0x0F))

Macro defines for Macro defines for UART FIFO Level register Reflects the current level of the UART receiver FIFO

Definition at line 253 of file lpc17xx_uart.h.

#define UART_FIFOLVL_TXFIFOLVL ( n ) ((uint32_t)((n>>8)&0x0F))

Reflects the current level of the UART transmitter FIFO

Definition at line 254 of file lpc17xx_uart.h.

#define UART_ICR_BITMASK ((uint32_t)(0x3F))

UART IRDA bit mask

Definition at line 209 of file lpc17xx_uart.h.

#define UART_ICR_FIXPULSE_EN ((uint32_t)(1<<2))

IrDA fixed pulse width mode

Definition at line 207 of file lpc17xx_uart.h.

#define UART_ICR_IRDAEN ((uint32_t)(1<<0))

Macro defines for Macro defines for UART IrDA control register IrDA mode enable

Definition at line 205 of file lpc17xx_uart.h.

#define UART_ICR_IRDAINV ((uint32_t)(1<<1))

IrDA serial input inverted

Definition at line 206 of file lpc17xx_uart.h.

#define UART_ICR_PULSEDIV ( n ) ((uint32_t)((n&0x07)<<3))

PulseDiv - Configures the pulse when FixPulseEn = 1

Definition at line 208 of file lpc17xx_uart.h.

#define UART_IER_ABEOINT_EN ((uint32_t)(1<<8))

Enables the end of auto-baud interrupt

Definition at line 100 of file lpc17xx_uart.h.

#define UART_IER_ABTOINT_EN ((uint32_t)(1<<9))

Enables the auto-baud time-out interrupt

Definition at line 101 of file lpc17xx_uart.h.

#define UART_IER_BITMASK ((uint32_t)(0x307))

UART interrupt enable register bit mask

Definition at line 102 of file lpc17xx_uart.h.

#define UART_IER_RBRINT_EN ((uint32_t)(1<<0))

Macro defines for Macro defines for UART interrupt enable register RBR Interrupt enable

Definition at line 95 of file lpc17xx_uart.h.

#define UART_IER_RLSINT_EN ((uint32_t)(1<<2))

RX line status interrupt enable

Definition at line 97 of file lpc17xx_uart.h.

#define UART_IER_THREINT_EN ((uint32_t)(1<<1))

THR Interrupt enable

Definition at line 96 of file lpc17xx_uart.h.

#define UART_IIR_ABEO_INT ((uint32_t)(1<<8))

End of auto-baud interrupt

Definition at line 116 of file lpc17xx_uart.h.

#define UART_IIR_ABTO_INT ((uint32_t)(1<<9))

Auto-baud time-out interrupt

Definition at line 117 of file lpc17xx_uart.h.

#define UART_IIR_BITMASK ((uint32_t)(0x3CF))

UART interrupt identification register bit mask

Definition at line 118 of file lpc17xx_uart.h.

#define UART_IIR_FIFO_EN ((uint32_t)(3<<6))

These bits are equivalent to UnFCR[0]

Definition at line 115 of file lpc17xx_uart.h.

#define UART_IIR_INTID_CTI ((uint32_t)(6<<1))

Interrupt identification: Character time-out indicator

Definition at line 111 of file lpc17xx_uart.h.

#define UART_IIR_INTID_MASK ((uint32_t)(7<<1))

Interrupt identification: Interrupt ID mask

Definition at line 114 of file lpc17xx_uart.h.

#define UART_IIR_INTID_RDA ((uint32_t)(2<<1))

Interrupt identification: Receive data available

Definition at line 110 of file lpc17xx_uart.h.

#define UART_IIR_INTID_RLS ((uint32_t)(3<<1))

Interrupt identification: Receive line status

Definition at line 109 of file lpc17xx_uart.h.

#define UART_IIR_INTID_THRE ((uint32_t)(1<<1))

Interrupt identification: THRE interrupt

Definition at line 112 of file lpc17xx_uart.h.

#define UART_IIR_INTSTAT_PEND ((uint32_t)(1<<0))

Macro defines for Macro defines for UART interrupt identification registerInterrupt Status - Active low

Definition at line 108 of file lpc17xx_uart.h.

#define UART_LCR_BITMASK ((uint8_t)(0xFF))

UART line control bit mask

Definition at line 149 of file lpc17xx_uart.h.

#define UART_LCR_BREAK_EN ((uint8_t)(1<<6))

UART Transmission Break enable

Definition at line 147 of file lpc17xx_uart.h.

#define UART_LCR_DLAB_EN ((uint8_t)(1<<7))

UART Divisor Latches Access bit enable

Definition at line 148 of file lpc17xx_uart.h.

#define UART_LCR_PARITY_EN ((uint8_t)(1<<3))

UART Parity Enable

Definition at line 142 of file lpc17xx_uart.h.

#define UART_LCR_PARITY_EVEN ((uint8_t)(1<<4))

UART Even Parity Select

Definition at line 144 of file lpc17xx_uart.h.

#define UART_LCR_PARITY_F_0 ((uint8_t)(3<<4))

UART force 0 stick parity

Definition at line 146 of file lpc17xx_uart.h.

#define UART_LCR_PARITY_F_1 ((uint8_t)(2<<4))

UART force 1 stick parity

Definition at line 145 of file lpc17xx_uart.h.

#define UART_LCR_PARITY_ODD ((uint8_t)(0))

UART Odd Parity Select

Definition at line 143 of file lpc17xx_uart.h.

#define UART_LCR_STOPBIT_SEL ((uint8_t)(1<<2))

UART Two Stop Bits Select

Definition at line 141 of file lpc17xx_uart.h.

#define UART_LCR_WLEN5 ((uint8_t)(0))

Macro defines for Macro defines for UART line control register UART 5 bit data mode

Definition at line 137 of file lpc17xx_uart.h.

#define UART_LCR_WLEN6 ((uint8_t)(1<<0))

UART 6 bit data mode

Definition at line 138 of file lpc17xx_uart.h.

#define UART_LCR_WLEN7 ((uint8_t)(2<<0))

UART 7 bit data mode

Definition at line 139 of file lpc17xx_uart.h.

#define UART_LCR_WLEN8 ((uint8_t)(3<<0))

UART 8 bit data mode

Definition at line 140 of file lpc17xx_uart.h.

#define UART_LOAD_DLL ( div ) ((div) & 0xFF)

Macro defines for Macro defines for UARTn Divisor Latch LSB register Macro for loading least significant halfs of divisors

Definition at line 83 of file lpc17xx_uart.h.

#define UART_LOAD_DLM ( div ) (((div) >> 8) & 0xFF)

Macro for loading most significant halfs of divisors

Definition at line 90 of file lpc17xx_uart.h.

#define UART_LSR_BI ((uint8_t)(1<<4))

Line status register: Break interrupt

Definition at line 168 of file lpc17xx_uart.h.

#define UART_LSR_BITMASK ((uint8_t)(0xFF))

UART Line status bit mask

Definition at line 172 of file lpc17xx_uart.h.

#define UART_LSR_FE ((uint8_t)(1<<3))

Line status register: Framing error

Definition at line 167 of file lpc17xx_uart.h.

#define UART_LSR_OE ((uint8_t)(1<<1))

Line status register: Overrun error

Definition at line 165 of file lpc17xx_uart.h.

#define UART_LSR_PE ((uint8_t)(1<<2))

Line status register: Parity error

Definition at line 166 of file lpc17xx_uart.h.

#define UART_LSR_RDR ((uint8_t)(1<<0))

Macro defines for Macro defines for UART line status registerLine status register: Receive data ready

Definition at line 164 of file lpc17xx_uart.h.

#define UART_LSR_RXFE ((uint8_t)(1<<7))

Error in RX FIFO

Definition at line 171 of file lpc17xx_uart.h.

#define UART_LSR_TEMT ((uint8_t)(1<<6))

Line status register: Transmitter empty

Definition at line 170 of file lpc17xx_uart.h.

#define UART_LSR_THRE ((uint8_t)(1<<5))

Line status register: Transmit holding register empty

Definition at line 169 of file lpc17xx_uart.h.

#define UART_RBR_MASKBIT ((uint8_t)0xFF)

Macro defines for Macro defines for UARTn Receiver Buffer Register UART Received Buffer mask bit (8 bits)

Definition at line 73 of file lpc17xx_uart.h.

#define UART_SCR_BIMASK ((uint8_t)(0xFF))

Macro defines for Macro defines for UART Scratch Pad Register UART Scratch Pad bit mask

Definition at line 190 of file lpc17xx_uart.h.

#define UART_TER_BITMASK ((uint8_t)(0x80))

UART Transmit Enable Register bit mask

Definition at line 222 of file lpc17xx_uart.h.

#define UART_TER_TXEN ((uint8_t)(1<<7))

Macro defines for Macro defines for UART Tx Enable register Transmit enable bit

Definition at line 221 of file lpc17xx_uart.h.

#define UART_THR_MASKBIT ((uint8_t)0xFF)

Macro defines for Macro defines for UARTn Transmit Holding Register UART Transmit Holding mask bit (8 bits)

Definition at line 78 of file lpc17xx_uart.h.

#define UART_TX_FIFO_SIZE (16)

Definition at line 132 of file lpc17xx_uart.h.

Generated on Tue Jun 7 14:59:41 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: UART Public Types

UART Public Types
[UART]

Data Structures

struct | UART_AB_CFG_Type
Auto Baudrate mode configuration type definition. More...
struct | UART_CFG_Type
UART Configuration Structure definition. More...
struct | UART_FIFO_CFG_Type
UART FIFO Configuration Structure definition. More...
struct | UART1_RS485_CTRLCFG_Type
UART1 Full modem - RS485 Control configuration type. More...

Enumerations

enum | UART_DATABIT_Type { UART_DATABIT_5 = 0, UART_DATABIT_6, UART_DATABIT_7, UART_DATABIT_8 }
UART Databit type definitions. More...
enum | UART_STOPBIT_Type { UART_STOPBIT_1 = (0), UART_STOPBIT_2 }
UART Stop bit type definitions. More...
enum UART_PARITY_Type {
UART_PARITY_NONE = 0, UART_PARITY_ODD, UART_PARITY_EVEN, UART_PARITY_SP_1,
UART_PARITY_SP_0
}
UART Parity type definitions. More...
enum | UART_FITO_LEVEL_Type { UART_FIFO_TRGLEV0 = 0, UART_FIFO_TRGLEV1, UART_FIFO_TRGLEV2, UART_FIFO_TRGLEV3 }
FIFO Level type definitions. More...
enum UART_INT_Type {
UART_INTCFG_RBR = 0, UART_INTCFG_THRE, UART_INTCFG_RLS, UART1_INTCFG_MS,
UART1_INTCFG_CTS, UART_INTCFG_ABEO, UART_INTCFG_ABTO
}
UART Interrupt Type definitions. More...
enum UART_LS_Type {
UART_LINESTAT_RDR = UART_LSR_RDR, UART_LINESTAT_OE = UART_LSR_OE, UART_LINESTAT_PE = UART_LSR_PE, UART_LINESTAT_FE = UART_LSR_FE,
UART_LINESTAT_BI = UART_LSR_BI, UART_LINESTAT_THRE = UART_LSR_THRE, UART_LINESTAT_TEMT = UART_LSR_TEMT, UART_LINESTAT_RXFE = UART_LSR_RXFE
}
UART Line Status Type definition. More...
enum | UART_AB_MODE_Type { UART_AUTOBAUD_MODE0 = 0, UART_AUTOBAUD_MODE1 }
UART Auto-baudrate mode type definition. More...
enum | UART_ABEO_Type { UART_AUTOBAUD_INTSTAT_ABEO = UART_IIR_ABEO_INT, UART_AUTOBAUD_INTSTAT_ABTO = UART_IIR_ABTO_INT }
UART End of Auto-baudrate type definition. More...
enum UART_IrDA_PULSE_Type {
UART_IrDA_PULSEDIV2 = 0, UART_IrDA_PULSEDIV4, UART_IrDA_PULSEDIV8, UART_IrDA_PULSEDIV16,
UART_IrDA_PULSEDIV32, UART_IrDA_PULSEDIV64, UART_IrDA_PULSEDIV128, UART_IrDA_PULSEDIV256
}
enum | UART1_SignalState { INACTIVE = 0, ACTIVE = !INACTIVE }
UART1 Full modem - Signal states definition. More...
enum UART_MODEM_STAT_type {
UART1_MODEM_STAT_DELTA_CTS = UART1_MSR_DELTA_CTS, UART1_MODEM_STAT_DELTA_DSR = UART1_MSR_DELTA_DSR, UART1_MODEM_STAT_LO2HI_RI = UART1_MSR_LO2HI_RI, UART1_MODEM_STAT_DELTA_DCD = UART1_MSR_DELTA_DCD,
UART1_MODEM_STAT_CTS = UART1_MSR_CTS, UART1_MODEM_STAT_DSR = UART1_MSR_DSR, UART1_MODEM_STAT_RI = UART1_MSR_RI, UART1_MODEM_STAT_DCD = UART1_MSR_DCD
}
UART modem status type definition. More...
enum | UART_MODEM_PIN_Type { UART1_MODEM_PIN_DTR = 0, UART1_MODEM_PIN_RTS }
Modem output pin type definition. More...
enum | UART_MODEM_MODE_Type { UART1_MODEM_MODE_LOOPBACK = 0, UART1_MODEM_MODE_AUTO_RTS, UART1_MODEM_MODE_AUTO_CTS }
UART Modem mode type definition. More...
enum | UART_RS485_DIRCTRL_PIN_Type { UART1_RS485_DIRCTRL_RTS = 0, UART1_RS485_DIRCTRL_DTR }
UART Direction Control Pin type definition. More...

Enumeration Type Documentation

enum UART1_SignalState

UART1 Full modem - Signal states definition.

Enumerator:
INACTIVE
ACTIVE

Definition at line 450 of file lpc17xx_uart.h.

enum UART_AB_MODE_Type

UART Auto-baudrate mode type definition.

Enumerator:
UART_AUTOBAUD_MODE0 | UART Auto baudrate Mode 0
UART_AUTOBAUD_MODE1 | UART Auto baudrate Mode 1

Definition at line 404 of file lpc17xx_uart.h.

enum UART_ABEO_Type

UART End of Auto-baudrate type definition.

Enumerator:
UART_AUTOBAUD_INTSTAT_ABEO | UART End of auto-baud interrupt
UART_AUTOBAUD_INTSTAT_ABTO | UART Auto-baud time-out interrupt

Definition at line 420 of file lpc17xx_uart.h.

enum UART_DATABIT_Type

UART Databit type definitions.

Enumerator:
UART_DATABIT_5 | UART 5 bit data mode
UART_DATABIT_6 | UART 6 bit data mode
UART_DATABIT_7 | UART 7 bit data mode
UART_DATABIT_8 | UART 8 bit data mode

Definition at line 338 of file lpc17xx_uart.h.

enum UART_FITO_LEVEL_Type

FIFO Level type definitions.

Enumerator:
UART_FIFO_TRGLEV0 | UART FIFO trigger level 0: 1 character
UART_FIFO_TRGLEV1 | UART FIFO trigger level 1: 4 character
UART_FIFO_TRGLEV2 | UART FIFO trigger level 2: 8 character
UART_FIFO_TRGLEV3 | UART FIFO trigger level 3: 14 character

Definition at line 367 of file lpc17xx_uart.h.

enum UART_INT_Type

UART Interrupt Type definitions.

Enumerator:
UART_INTCFG_RBR | RBR Interrupt enable
UART_INTCFG_THRE | THR Interrupt enable
UART_INTCFG_RLS | RX line status interrupt enable
UART1_INTCFG_MS | Modem status interrupt enable (UART1 only)
UART1_INTCFG_CTS | CTS1 signal transition interrupt enable (UART1 only)
UART_INTCFG_ABEO | Enables the end of auto-baud interrupt
UART_INTCFG_ABTO | Enables the auto-baud time-out interrupt

Definition at line 377 of file lpc17xx_uart.h.

enum UART_IrDA_PULSE_Type

UART IrDA Control type Definition

Enumerator:
UART_IrDA_PULSEDIV2 Pulse width = 2 * Tpclk
  • Configures the pulse when FixPulseEn = 1
UART_IrDA_PULSEDIV4 Pulse width = 4 * Tpclk
  • Configures the pulse when FixPulseEn = 1
UART_IrDA_PULSEDIV8 Pulse width = 8 * Tpclk
  • Configures the pulse when FixPulseEn = 1
UART_IrDA_PULSEDIV16 Pulse width = 16 * Tpclk
  • Configures the pulse when FixPulseEn = 1
UART_IrDA_PULSEDIV32 Pulse width = 32 * Tpclk
  • Configures the pulse when FixPulseEn = 1
UART_IrDA_PULSEDIV64 Pulse width = 64 * Tpclk
  • Configures the pulse when FixPulseEn = 1
UART_IrDA_PULSEDIV128 Pulse width = 128 * Tpclk
  • Configures the pulse when FixPulseEn = 1
UART_IrDA_PULSEDIV256 Pulse width = 256 * Tpclk
  • Configures the pulse when FixPulseEn = 1

Definition at line 428 of file lpc17xx_uart.h.

enum UART_LS_Type

UART Line Status Type definition.

Enumerator:
UART_LINESTAT_RDR | Line status register: Receive data ready
UART_LINESTAT_OE | Line status register: Overrun error
UART_LINESTAT_PE | Line status register: Parity error
UART_LINESTAT_FE | Line status register: Framing error
UART_LINESTAT_BI | Line status register: Break interrupt
UART_LINESTAT_THRE | Line status register: Transmit holding register empty
UART_LINESTAT_TEMT | Line status register: Transmitter empty
UART_LINESTAT_RXFE | Error in RX FIFO

Definition at line 390 of file lpc17xx_uart.h.

enum UART_MODEM_MODE_Type

UART Modem mode type definition.

Enumerator:
UART1_MODEM_MODE_LOOPBACK | Loop back mode select
UART1_MODEM_MODE_AUTO_RTS | Enable Auto RTS flow-control
UART1_MODEM_MODE_AUTO_CTS | Enable Auto CTS flow-control

Definition at line 480 of file lpc17xx_uart.h.

enum UART_MODEM_PIN_Type

Modem output pin type definition.

Enumerator:
UART1_MODEM_PIN_DTR | Source for modem output pin DTR
UART1_MODEM_PIN_RTS | Source for modem output pin RTS

Definition at line 472 of file lpc17xx_uart.h.

enum UART_MODEM_STAT_type

UART modem status type definition.

Enumerator:
UART1_MODEM_STAT_DELTA_CTS | Set upon state change of input CTS
UART1_MODEM_STAT_DELTA_DSR | Set upon state change of input DSR
UART1_MODEM_STAT_LO2HI_RI | Set upon low to high transition of input RI
UART1_MODEM_STAT_DELTA_DCD | Set upon state change of input DCD
UART1_MODEM_STAT_CTS | Clear To Send State
UART1_MODEM_STAT_DSR | Data Set Ready State
UART1_MODEM_STAT_RI | Ring Indicator State
UART1_MODEM_STAT_DCD | Data Carrier Detect State

Definition at line 458 of file lpc17xx_uart.h.

enum UART_PARITY_Type

UART Parity type definitions.

Enumerator:
UART_PARITY_NONE | No parity
UART_PARITY_ODD | Odd parity
UART_PARITY_EVEN | Even parity
UART_PARITY_SP_1 | Forced "1" stick parity
UART_PARITY_SP_0 | Forced "0" stick parity

Definition at line 356 of file lpc17xx_uart.h.

enum UART_RS485_DIRCTRL_PIN_Type

UART Direction Control Pin type definition.

Enumerator:
UART1_RS485_DIRCTRL_RTS | Pin RTS is used for direction control
UART1_RS485_DIRCTRL_DTR | Pin DTR is used for direction control

Definition at line 489 of file lpc17xx_uart.h.

enum UART_STOPBIT_Type

UART Stop bit type definitions.

Enumerator:
UART_STOPBIT_1 | UART 1 Stop Bits Select
UART_STOPBIT_2 | UART Two Stop Bits Select

Definition at line 348 of file lpc17xx_uart.h.

Generated on Tue Jun 7 14:59:42 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: UART Public Functions

UART Public Functions
[UART]

Functions

void | UART_Init (LPC_UART_TypeDef *UARTx, UART_CFG_Type *UART_ConfigStruct)
Initializes the UARTx peripheral according to the specified parameters in the UART_ConfigStruct.
void | UART_DeInit (LPC_UART_TypeDef *UARTx)
De-initializes the UARTx peripheral registers to their default reset values.
void | UART_ConfigStructInit (UART_CFG_Type *UART_InitStruct)
Fills each UART_InitStruct member with its default value:
  • 9600 bps
  • 8-bit data
  • 1 Stopbit
  • None Parity.

void | UART_SendByte (LPC_UART_TypeDef *UARTx, uint8_t Data)
Transmit a single data through UART peripheral.
uint8_t | UART_ReceiveByte (LPC_UART_TypeDef *UARTx)
Receive a single data from UART peripheral.
uint32_t | UART_Send (LPC_UART_TypeDef *UARTx, uint8_t *txbuf, uint32_t buflen, TRANSFER_BLOCK_Type flag)
Send a block of data via UART peripheral.
uint32_t | UART_Receive (LPC_UART_TypeDef *UARTx, uint8_t *rxbuf, uint32_t buflen, TRANSFER_BLOCK_Type flag)
Receive a block of data via UART peripheral.
void | UART_FIFOConfig (LPC_UART_TypeDef *UARTx, UART_FIFO_CFG_Type *FIFOCfg)
Configure FIFO function on selected UART peripheral.
void | UART_FIFOConfigStructInit (UART_FIFO_CFG_Type *UART_FIFOInitStruct)
Fills each UART_FIFOInitStruct member with its default value:
  • FIFO_DMAMode = DISABLE
  • FIFO_Level = UART_FIFO_TRGLEV0
  • FIFO_ResetRxBuf = ENABLE
  • FIFO_ResetTxBuf = ENABLE
  • FIFO_State = ENABLE.

uint32_t | UART_GetIntId (LPC_UART_TypeDef *UARTx)
Get Interrupt Identification value.
uint8_t | UART_GetLineStatus (LPC_UART_TypeDef *UARTx)
Get current value of Line Status register in UART peripheral.
void | UART_IntConfig (LPC_UART_TypeDef *UARTx, UART_INT_Type UARTIntCfg, FunctionalState NewState)
Enable or disable specified UART interrupt.
void | UART_TxCmd (LPC_UART_TypeDef *UARTx, FunctionalState NewState)
Enable/Disable transmission on UART TxD pin.
FlagStatus | UART_CheckBusy (LPC_UART_TypeDef *UARTx)
Check whether if UART is busy or not.
void | UART_ForceBreak (LPC_UART_TypeDef *UARTx)
Force BREAK character on UART line, output pin UARTx TXD is forced to logic 0.
void | UART_ABClearIntPending (LPC_UART_TypeDef *UARTx, UART_ABEO_Type ABIntType)
Clear Autobaud Interrupt Pending.
void | UART_ABCmd (LPC_UART_TypeDef *UARTx, UART_AB_CFG_Type *ABConfigStruct, FunctionalState NewState)
Start/Stop Auto Baudrate activity.
void | UART_FullModemForcePinState (LPC_UART1_TypeDef *UARTx, UART_MODEM_PIN_Type Pin, UART1_SignalState NewState)
Force pin DTR/RTS corresponding to given state (Full modem mode).
void | UART_FullModemConfigMode (LPC_UART1_TypeDef *UARTx, UART_MODEM_MODE_Type Mode, FunctionalState NewState)
Configure Full Modem mode for UART peripheral.
uint8_t | UART_FullModemGetStatus (LPC_UART1_TypeDef *UARTx)
Get current status of modem status register.
void | UART_RS485Config (LPC_UART1_TypeDef *UARTx, UART1_RS485_CTRLCFG_Type *RS485ConfigStruct)
Configure UART peripheral in RS485 mode according to the specified parameters in the RS485ConfigStruct.
void | UART_RS485ReceiverCmd (LPC_UART1_TypeDef *UARTx, FunctionalState NewState)
Enable/Disable receiver in RS485 module in UART1.
void | UART_RS485SendSlvAddr (LPC_UART1_TypeDef *UARTx, uint8_t SlvAddr)
Send Slave address frames on RS485 bus.
uint32_t | UART_RS485SendData (LPC_UART1_TypeDef *UARTx, uint8_t *pData, uint32_t size)
Send Data frames on RS485 bus.
void | UART_IrDAInvtInputCmd (LPC_UART_TypeDef *UARTx, FunctionalState NewState)
Enable or disable inverting serial input function of IrDA on UART peripheral.
void | UART_IrDACmd (LPC_UART_TypeDef *UARTx, FunctionalState NewState)
Enable or disable IrDA function on UART peripheral.
void | UART_IrDAPulseDivConfig (LPC_UART_TypeDef *UARTx, UART_IrDA_PULSE_Type PulseDiv)
Configure Pulse divider for IrDA function on UART peripheral.
uint32_t | UART_RS485Send (LPC_UART1_TypeDef *UARTx, uint8_t *pDatFrm, uint32_t size, uint8_t ParityStick)
Send data on RS485 bus with specified parity stick value (9-bit mode).

Function Documentation

void UART_ABClearIntPending | ( | LPC_UART_TypeDef * | UARTx,
 |  | UART_ABEO_Type | ABIntType
 | ) |  |

Clear Autobaud Interrupt Pending.

Parameters:
[in] UARTx UART peripheral selected, should be
  • LPC_UART0: UART0 peripheral
    • LPC_UART1: UART1 peripheral
    • LPC_UART2: UART2 peripheral
    • LPC_UART3: UART3 peripheral
[in] ABIntType type of auto-baud interrupt, should be:
  • UART_AUTOBAUD_INTSTAT_ABEO: End of Auto-baud interrupt
  • UART_AUTOBAUD_INTSTAT_ABTO: Auto-baud time out interrupt
Returns:
none

Definition at line 978 of file lpc17xx_uart.c.

void UART_ABCmd | ( | LPC_UART_TypeDef * | UARTx,
 |  | UART_AB_CFG_Type * | ABConfigStruct,
 |  | FunctionalState | NewState
 | ) |  |

Start/Stop Auto Baudrate activity.

Parameters:
[in] UARTx UART peripheral selected, should be
  • LPC_UART0: UART0 peripheral
    • LPC_UART1: UART1 peripheral
    • LPC_UART2: UART2 peripheral
    • LPC_UART3: UART3 peripheral
[in] ABConfigStruct A pointer to UART_AB_CFG_Type structure that contains specified information about UART auto baudrate configuration
[in] NewState New State of Auto baudrate activity, should be:
  • ENABLE: Start this activity
  • DISABLE: Stop this activity Note: Auto-baudrate mode enable bit will be cleared once this mode completed.
Returns:
none

Definition at line 910 of file lpc17xx_uart.c.

FlagStatus UART_CheckBusy ( LPC_UART_TypeDef * UARTx )

Check whether if UART is busy or not.

Parameters:
[in] UARTx UART peripheral selected, should be:
  • LPC_UART0: UART0 peripheral
    • LPC_UART1: UART1 peripheral
    • LPC_UART2: UART2 peripheral
    • LPC_UART3: UART3 peripheral
Returns:
RESET if UART is not busy, otherwise return SET.

Definition at line 799 of file lpc17xx_uart.c.

void UART_ConfigStructInit ( UART_CFG_Type * UART_InitStruct )

Fills each UART_InitStruct member with its default value:

  • 9600 bps
  • 8-bit data
  • 1 Stopbit
  • None Parity.

Parameters:
[in] UART_InitStruct Pointer to a UART_CFG_Type structure which will be initialized.
Returns:
None

Definition at line 453 of file lpc17xx_uart.c.

void UART_DeInit ( LPC_UART_TypeDef * UARTx )

De-initializes the UARTx peripheral registers to their default reset values.

Parameters:
[in] UARTx UART peripheral selected, should be:
  • LPC_UART0: UART0 peripheral
    • LPC_UART1: UART1 peripheral
    • LPC_UART2: UART2 peripheral
    • LPC_UART3: UART3 peripheral
Returns:
None

Definition at line 403 of file lpc17xx_uart.c.

void UART_FIFOConfig | ( | LPC_UART_TypeDef * | UARTx,
 |  | UART_FIFO_CFG_Type * | FIFOCfg
 | ) |  |

Configure FIFO function on selected UART peripheral.

Parameters:
[in] UARTx UART peripheral selected, should be:
  • LPC_UART0: UART0 peripheral
    • LPC_UART1: UART1 peripheral
    • LPC_UART2: UART2 peripheral
    • LPC_UART3: UART3 peripheral
[in] FIFOCfg Pointer to a UART_FIFO_CFG_Type Structure that contains specified information about FIFO configuration
Returns:
none

Definition at line 820 of file lpc17xx_uart.c.

void UART_FIFOConfigStructInit ( UART_FIFO_CFG_Type * UART_FIFOInitStruct )

Fills each UART_FIFOInitStruct member with its default value:

  • FIFO_DMAMode = DISABLE
  • FIFO_Level = UART_FIFO_TRGLEV0
  • FIFO_ResetRxBuf = ENABLE
  • FIFO_ResetTxBuf = ENABLE
  • FIFO_State = ENABLE.

Parameters:
[in] UART_FIFOInitStruct Pointer to a UART_FIFO_CFG_Type structure which will be initialized.
Returns:
None

Definition at line 884 of file lpc17xx_uart.c.

void UART_ForceBreak ( LPC_UART_TypeDef * UARTx )

Force BREAK character on UART line, output pin UARTx TXD is forced to logic 0.

Parameters:
[in] UARTx UART peripheral selected, should be:
  • LPC_UART0: UART0 peripheral
    • LPC_UART1: UART1 peripheral
    • LPC_UART2: UART2 peripheral
    • LPC_UART3: UART3 peripheral
Returns:
None

Definition at line 643 of file lpc17xx_uart.c.

void UART_FullModemConfigMode | ( | LPC_UART1_TypeDef * | UARTx,
 |  | UART_MODEM_MODE_Type | Mode,
 |  | FunctionalState | NewState
 | ) |  |

Configure Full Modem mode for UART peripheral.

Parameters:
[in] UARTx LPC_UART1 (only)
[in] Mode Full Modem mode, should be:
  • UART1_MODEM_MODE_LOOPBACK: Loop back mode.
  • UART1_MODEM_MODE_AUTO_RTS: Auto-RTS mode.
  • UART1_MODEM_MODE_AUTO_CTS: Auto-CTS mode.
[in] NewState New State of this mode, should be:
  • ENABLE: Enable this mode.
  • DISABLE: Disable this mode.
Returns:
none

Definition at line 1169 of file lpc17xx_uart.c.

void UART_FullModemForcePinState | ( | LPC_UART1_TypeDef * | UARTx,
 |  | UART_MODEM_PIN_Type | Pin,
 |  | UART1_SignalState | NewState
 | ) |  |

Force pin DTR/RTS corresponding to given state (Full modem mode).

Parameters:
[in] UARTx LPC_UART1 (only)
[in] Pin Pin that NewState will be applied to, should be:
  • UART1_MODEM_PIN_DTR: DTR pin.
  • UART1_MODEM_PIN_RTS: RTS pin.
[in] NewState New State of DTR/RTS pin, should be:
  • INACTIVE: Force the pin to inactive signal.
  • ACTIVE: Force the pin to active signal.
Returns:
none

Definition at line 1129 of file lpc17xx_uart.c.

uint8_t UART_FullModemGetStatus ( LPC_UART1_TypeDef * UARTx )

Get current status of modem status register.

Parameters:
[in] UARTx LPC_UART1 (only)
Returns:
Current value of modem status register Note: The return value of this function must be ANDed with each member UART_MODEM_STAT_type enumeration to determine current flag status corresponding to each modem flag status. Because some flags in modem status register will be cleared after reading, the next reading modem register could not be correct. So this function used to read modem status register in one time only, then the return value used to check all flags.

Definition at line 1215 of file lpc17xx_uart.c.

uint32_t UART_GetIntId ( LPC_UART_TypeDef * UARTx )

Get Interrupt Identification value.

Parameters:
[in] UARTx UART peripheral selected, should be:
  • LPC_UART0: UART0 peripheral
    • LPC_UART1: UART1 peripheral
    • LPC_UART2: UART2 peripheral
    • LPC_UART3: UART3 peripheral
Returns:
Current value of UART UIIR register in UART peripheral.

Definition at line 784 of file lpc17xx_uart.c.

uint8_t UART_GetLineStatus ( LPC_UART_TypeDef * UARTx )

Get current value of Line Status register in UART peripheral.

Parameters:
[in] UARTx UART peripheral selected, should be:
  • LPC_UART0: UART0 peripheral
    • LPC_UART1: UART1 peripheral
    • LPC_UART2: UART2 peripheral
    • LPC_UART3: UART3 peripheral
Returns:
Current value of Line Status register in UART peripheral. Note: The return value of this function must be ANDed with each member in UART_LS_Type enumeration to determine current flag status corresponding to each Line status type. Because some flags in Line Status register will be cleared after reading, the next reading Line Status register could not be correct. So this function used to read Line status register in one time only, then the return value used to check all flags.

Definition at line 761 of file lpc17xx_uart.c.

void UART_Init | ( | LPC_UART_TypeDef * | UARTx,
 |  | UART_CFG_Type * | UART_ConfigStruct
 | ) |  |

Initializes the UARTx peripheral according to the specified parameters in the UART_ConfigStruct.

Parameters:
[in] UARTx UART peripheral selected, should be:
  • LPC_UART0: UART0 peripheral
    • LPC_UART1: UART1 peripheral
    • LPC_UART2: UART2 peripheral
    • LPC_UART3: UART3 peripheral
[in] UART_ConfigStruct Pointer to a UART_CFG_Type structure that contains the configuration information for the specified UART peripheral.
Returns:
None

Definition at line 197 of file lpc17xx_uart.c.

void UART_IntConfig | ( | LPC_UART_TypeDef * | UARTx,
 |  | UART_INT_Type | UARTIntCfg,
 |  | FunctionalState | NewState
 | ) |  |

Enable or disable specified UART interrupt.

Parameters:
[in] UARTx UART peripheral selected, should be
  • LPC_UART0: UART0 peripheral
    • LPC_UART1: UART1 peripheral
    • LPC_UART2: UART2 peripheral
    • LPC_UART3: UART3 peripheral
[in] UARTIntCfg Specifies the interrupt flag, should be one of the following:
  • UART_INTCFG_RBR : RBR Interrupt enable
  • UART_INTCFG_THRE : THR Interrupt enable
  • UART_INTCFG_RLS : RX line status interrupt enable
  • UART1_INTCFG_MS : Modem status interrupt enable (UART1 only)
  • UART1_INTCFG_CTS : CTS1 signal transition interrupt enable (UART1 only)
  • UART_INTCFG_ABEO : Enables the end of auto-baud interrupt
  • UART_INTCFG_ABTO : Enables the auto-baud time-out interrupt
[in] NewState New state of specified UART interrupt type, should be:
  • ENALBE: Enable this UART interrupt type.
  • DISALBE: Disable this UART interrupt type.
Returns:
None

Definition at line 680 of file lpc17xx_uart.c.

void UART_IrDACmd | ( | LPC_UART_TypeDef * | UARTx,
 |  | FunctionalState | NewState
 | ) |  |

Enable or disable IrDA function on UART peripheral.

Parameters:
[in] UARTx UART peripheral selected, should be LPC_UART3 (only)
[in] NewState New state of IrDA function, should be:
  • ENABLE: Enable this function.
  • DISABLE: Disable this function.
Returns:
none

Definition at line 1067 of file lpc17xx_uart.c.

void UART_IrDAInvtInputCmd | ( | LPC_UART_TypeDef * | UARTx,
 |  | FunctionalState | NewState
 | ) |  |

Enable or disable inverting serial input function of IrDA on UART peripheral.

Parameters:
[in] UARTx UART peripheral selected, should be LPC_UART3 (only)
[in] NewState New state of inverting serial input, should be:
  • ENABLE: Enable this function.
  • DISABLE: Disable this function.
Returns:
none

Definition at line 1043 of file lpc17xx_uart.c.

void UART_IrDAPulseDivConfig | ( | LPC_UART_TypeDef * | UARTx,
 |  | UART_IrDA_PULSE_Type | PulseDiv
 | ) |  |

Configure Pulse divider for IrDA function on UART peripheral.

Parameters:
[in] UARTx UART peripheral selected, should be LPC_UART3 (only)
[in] PulseDiv Pulse Divider value from Peripheral clock, should be one of the following:
  • UART_IrDA_PULSEDIV2 : Pulse width = 2 * Tpclk
  • UART_IrDA_PULSEDIV4 : Pulse width = 4 * Tpclk
  • UART_IrDA_PULSEDIV8 : Pulse width = 8 * Tpclk
  • UART_IrDA_PULSEDIV16 : Pulse width = 16 * Tpclk
  • UART_IrDA_PULSEDIV32 : Pulse width = 32 * Tpclk
  • UART_IrDA_PULSEDIV64 : Pulse width = 64 * Tpclk
  • UART_IrDA_PULSEDIV128 : Pulse width = 128 * Tpclk
  • UART_IrDA_PULSEDIV256 : Pulse width = 256 * Tpclk
Returns:
none

Definition at line 1099 of file lpc17xx_uart.c.

uint32_t UART_Receive | ( | LPC_UART_TypeDef * | UARTx,
 |  | uint8_t * | rxbuf,
 |  | uint32_t | buflen,
 |  | TRANSFER_BLOCK_Type | flag
 | ) |  |

Receive a block of data via UART peripheral.

Parameters:
[in] UARTx Selected UART peripheral used to send data, should be:
  • LPC_UART0: UART0 peripheral
    • LPC_UART1: UART1 peripheral
    • LPC_UART2: UART2 peripheral
    • LPC_UART3: UART3 peripheral
[out] | rxbuf | Pointer to Received buffer
[in] | buflen | Length of Received buffer
[in] | flag | Flag mode, should be NONE_BLOCKING or BLOCKING
Returns:
Number of bytes received
Note: when using UART in BLOCKING mode, a time-out condition is used via defined symbol UART_BLOCKING_TIMEOUT.

Definition at line 592 of file lpc17xx_uart.c.

uint8_t UART_ReceiveByte ( LPC_UART_TypeDef * UARTx )

Receive a single data from UART peripheral.

Parameters:
[in] UARTx UART peripheral selected, should be:
  • LPC_UART0: UART0 peripheral
    • LPC_UART1: UART1 peripheral
    • LPC_UART2: UART2 peripheral
    • LPC_UART3: UART3 peripheral
Returns:
Data received

Definition at line 497 of file lpc17xx_uart.c.

void UART_RS485Config | ( | LPC_UART1_TypeDef * | UARTx,
 |  | UART1_RS485_CTRLCFG_Type * | RS485ConfigStruct
 | ) |  |

Configure UART peripheral in RS485 mode according to the specified parameters in the RS485ConfigStruct.

Parameters:
[in] | UARTx | LPC_UART1 (only)
[in] | RS485ConfigStruct | Pointer to a UART1_RS485_CTRLCFG_Type structure that contains the configuration information for specified UART in RS485 mode.
Returns:
None

Definition at line 1233 of file lpc17xx_uart.c.

void UART_RS485ReceiverCmd | ( | LPC_UART1_TypeDef * | UARTx,
 |  | FunctionalState | NewState
 | ) |  |

Enable/Disable receiver in RS485 module in UART1.

Parameters:
[in] UARTx LPC_UART1 (only)
[in] NewState New State of command, should be:
  • ENABLE: Enable this function.
  • DISABLE: Disable this function.
Returns:
None

Definition at line 1305 of file lpc17xx_uart.c.

uint32_t UART_RS485Send | ( | LPC_UART1_TypeDef * | UARTx,
 |  | uint8_t * | pDatFrm,
 |  | uint32_t | size,
 |  | uint8_t | ParityStick
 | ) |  |

Send data on RS485 bus with specified parity stick value (9-bit mode).

Parameters:
[in] | UARTx | LPC_UART1 (only)
[in] | pDatFrm | Pointer to data frame.
[in] | size | Size of data.
[in] | ParityStick | Parity Stick value, should be 0 or 1.
Returns:
None

Definition at line 1322 of file lpc17xx_uart.c.

uint32_t UART_RS485SendData | ( | LPC_UART1_TypeDef * | UARTx,
 |  | uint8_t * | pData,
 |  | uint32_t | size
 | ) |  |

Send Data frames on RS485 bus.

Parameters:
[in] | UARTx | LPC_UART1 (only)
[in] | pData | Pointer to data to be sent.
[in] | size | Size of data frame to be sent.
Returns:
None

Definition at line 1360 of file lpc17xx_uart.c.

void UART_RS485SendSlvAddr | ( | LPC_UART1_TypeDef * | UARTx,
 |  | uint8_t | SlvAddr
 | ) |  |

Send Slave address frames on RS485 bus.

Parameters:
[in] | UARTx | LPC_UART1 (only)
[in] | SlvAddr | Slave Address.
Returns:
None

Definition at line 1348 of file lpc17xx_uart.c.

uint32_t UART_Send | ( | LPC_UART_TypeDef * | UARTx,
 |  | uint8_t * | txbuf,
 |  | uint32_t | buflen,
 |  | TRANSFER_BLOCK_Type | flag
 | ) |  |

Send a block of data via UART peripheral.

Parameters:
[in] UARTx Selected UART peripheral used to send data, should be:
  • LPC_UART0: UART0 peripheral
    • LPC_UART1: UART1 peripheral
    • LPC_UART2: UART2 peripheral
    • LPC_UART3: UART3 peripheral
[in] | txbuf | Pointer to Transmit buffer
[in] | buflen | Length of Transmit buffer
[in] | flag | Flag used in UART transfer, should be NONE_BLOCKING or BLOCKING
Returns:
Number of bytes sent.
Note: when using UART in BLOCKING mode, a time-out condition is used via defined symbol UART_BLOCKING_TIMEOUT.

Definition at line 527 of file lpc17xx_uart.c.

void UART_SendByte | ( | LPC_UART_TypeDef * | UARTx,
 |  | uint8_t | Data
 | ) |  |

Transmit a single data through UART peripheral.

Parameters:
[in] UARTx UART peripheral selected, should be:
  • LPC_UART0: UART0 peripheral
    • LPC_UART1: UART1 peripheral
    • LPC_UART2: UART2 peripheral
    • LPC_UART3: UART3 peripheral
[in] Data Data to transmit (must be 8-bit long)
Returns:
None

Definition at line 472 of file lpc17xx_uart.c.

void UART_TxCmd | ( | LPC_UART_TypeDef * | UARTx,
 |  | FunctionalState | NewState
 | ) |  |

Enable/Disable transmission on UART TxD pin.

Parameters:
[in] UARTx UART peripheral selected, should be:
  • LPC_UART0: UART0 peripheral
    • LPC_UART1: UART1 peripheral
    • LPC_UART2: UART2 peripheral
    • LPC_UART3: UART3 peripheral
[in] NewState New State of Tx transmission function, should be:
  • ENABLE: Enable this function
  • DISABLE: Disable this function
Returns:
none

Definition at line 1001 of file lpc17xx_uart.c.

Generated on Tue Jun 7 14:59:42 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: WDT

WDT
[LPC1700CMSIS Firmware Library]

Modules

WDT Private Macros
WDT Public Types
WDT Public Functions
Generated on Tue Jun 7 14:59:42 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: WDT Private Macros

WDT Private Macros
[WDT]

Defines

#define | WDT_WDMOD_WDEN ((uint32_t)(1<<0))
#define | WDT_WDMOD_WDRESET ((uint32_t)(1<<1))
#define | WDT_WDMOD_WDTOF ((uint32_t)(1<<2))
#define | WDT_WDMOD_WDINT ((uint32_t)(1<<3))
#define | WDT_WDMOD(n) ((uint32_t)(1<<1))
#define | WDT_US_INDEX ((uint32_t)(1000000))
#define | WDT_TIMEOUT_MIN ((uint32_t)(0xFF))
#define | WDT_TIMEOUT_MAX ((uint32_t)(0xFFFFFFFF))
#define | WDT_WDMOD_MASK (uint8_t)(0x02)
#define | WDT_WDTC_MASK (uint8_t)(0xFFFFFFFF)
#define | WDT_WDFEED_MASK (uint8_t)(0x000000FF)
#define | WDT_WDCLKSEL_MASK (uint8_t)(0x03)
#define | WDT_WDCLKSEL_RC (uint8_t)(0x00)
#define | WDT_WDCLKSEL_PCLK (uint8_t)(0x01)
#define | WDT_WDCLKSEL_RTC (uint8_t)(0x02)
#define | PARAM_WDT_CLK_OPT(OPTION)
#define | PARAM_WDT_MODE_OPT(OPTION) ((OPTION ==WDT_MODE_INT_ONLY)||(OPTION ==WDT_MODE_RESET))

Define Documentation

#define PARAM_WDT_CLK_OPT ( OPTION )

Value:

((OPTION ==WDT_CLKSRC_IRC)||(OPTION ==WDT_CLKSRC_IRC)\
||(OPTION ==WDT_CLKSRC_IRC))

Definition at line 88 of file lpc17xx_wdt.h.

#define PARAM_WDT_MODE_OPT ( OPTION ) ((OPTION ==WDT_MODE_INT_ONLY)||(OPTION ==WDT_MODE_RESET))

Definition at line 92 of file lpc17xx_wdt.h.

#define WDT_TIMEOUT_MAX ((uint32_t)(0xFFFFFFFF))

WDT Time out maximum value

Definition at line 69 of file lpc17xx_wdt.h.

#define WDT_TIMEOUT_MIN ((uint32_t)(0xFF))

WDT Time out minimum value

Definition at line 67 of file lpc17xx_wdt.h.

#define WDT_US_INDEX ((uint32_t)(1000000))

Define divider index for microsecond ( us )

Definition at line 65 of file lpc17xx_wdt.h.

#define WDT_WDCLKSEL_MASK (uint8_t)(0x03)

Watchdog timer value register mask

Definition at line 78 of file lpc17xx_wdt.h.

#define WDT_WDCLKSEL_PCLK (uint8_t)(0x01)

Clock selected from PCLK

Definition at line 82 of file lpc17xx_wdt.h.

#define WDT_WDCLKSEL_RC (uint8_t)(0x00)

Clock selected from internal RC

Definition at line 80 of file lpc17xx_wdt.h.

#define WDT_WDCLKSEL_RTC (uint8_t)(0x02)

Clock selected from external RTC

Definition at line 84 of file lpc17xx_wdt.h.

#define WDT_WDFEED_MASK (uint8_t)(0x000000FF)

Watchdog feed sequence register mask

Definition at line 76 of file lpc17xx_wdt.h.

#define WDT_WDMOD ( n ) ((uint32_t)(1<<1))

WDT Mode

Definition at line 62 of file lpc17xx_wdt.h.

#define WDT_WDMOD_MASK (uint8_t)(0x02)

Watchdog mode register mask

Definition at line 72 of file lpc17xx_wdt.h.

#define WDT_WDMOD_WDEN ((uint32_t)(1<<0))

WDT interrupt enable bit

Definition at line 54 of file lpc17xx_wdt.h.

#define WDT_WDMOD_WDINT ((uint32_t)(1<<3))

WDT Time Out flag bit

Definition at line 60 of file lpc17xx_wdt.h.

#define WDT_WDMOD_WDRESET ((uint32_t)(1<<1))

WDT interrupt enable bit

Definition at line 56 of file lpc17xx_wdt.h.

#define WDT_WDMOD_WDTOF ((uint32_t)(1<<2))

WDT time out flag bit

Definition at line 58 of file lpc17xx_wdt.h.

#define WDT_WDTC_MASK (uint8_t)(0xFFFFFFFF)

Watchdog timer constant register mask

Definition at line 74 of file lpc17xx_wdt.h.

Generated on Tue Jun 7 14:59:42 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: WDT Public Types

WDT Public Types
[WDT]

Enumerations

enum | WDT_CLK_OPT { WDT_CLKSRC_IRC = 0, WDT_CLKSRC_PCLK = 1, WDT_CLKSRC_RTC = 2 }
Clock source option for WDT. More...
enum | WDT_MODE_OPT { WDT_MODE_INT_ONLY = 0, WDT_MODE_RESET = 1 }
WDT operation mode. More...

Enumeration Type Documentation

enum WDT_CLK_OPT

Clock source option for WDT.

Enumerator:
WDT_CLKSRC_IRC | Clock source from Internal RC oscillator
WDT_CLKSRC_PCLK | Selects the APB peripheral clock (PCLK)
WDT_CLKSRC_RTC | Selects the RTC oscillator

Definition at line 104 of file lpc17xx_wdt.h.

enum WDT_MODE_OPT

WDT operation mode.

Enumerator:
WDT_MODE_INT_ONLY | Use WDT to generate interrupt only
WDT_MODE_RESET | Use WDT to generate interrupt and reset MCU

Definition at line 111 of file lpc17xx_wdt.h.

Generated on Tue Jun 7 14:59:43 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: WDT Public Functions

WDT Public Functions
[WDT]

Functions

void | WDT_Init (WDT_CLK_OPT ClkSrc, WDT_MODE_OPT WDTMode)
Initial for Watchdog function Clock source = RTC ,.
void | WDT_Start (uint32_t TimeOut)
Start WDT activity with given timeout value.
void | WDT_Feed (void)
After set WDTEN, call this function to start Watchdog or reload the Watchdog timer.
void | WDT_UpdateTimeOut (uint32_t TimeOut)
Update WDT timeout value and feed.
FlagStatus | WDT_ReadTimeOutFlag (void)
Read WDT Time out flag.
void | WDT_ClrTimeOutFlag (void)
Clear WDT Time out flag.
uint32_t | WDT_GetCurrentCount (void)
Get the current value of WDT.

Function Documentation

void WDT_ClrTimeOutFlag ( void )

Clear WDT Time out flag.

Parameters:
[in] None
Returns:
None

Definition at line 211 of file lpc17xx_wdt.c.

void WDT_Feed ( void )

After set WDTEN, call this function to start Watchdog or reload the Watchdog timer.

Parameters:
[in] None
Returns:
None

Definition at line 238 of file lpc17xx_wdt.c.

uint32_t WDT_GetCurrentCount ( void )

Get the current value of WDT.

Parameters:
[in] None
Returns:
current value of WDT

Definition at line 253 of file lpc17xx_wdt.c.

void WDT_Init | ( | WDT_CLK_OPT | ClkSrc,
 |  | WDT_MODE_OPT | WDTMode
 | ) |  |

Initial for Watchdog function Clock source = RTC ,.

Parameters:
[in] ClkSrc Select clock source, should be:
  • WDT_CLKSRC_IRC: Clock source from Internal RC oscillator
  • WDT_CLKSRC_PCLK: Selects the APB peripheral clock (PCLK)
  • WDT_CLKSRC_RTC: Selects the RTC oscillator
[in] WDTMode WDT mode, should be:
  • WDT_MODE_INT_ONLY: Use WDT to generate interrupt only
  • WDT_MODE_RESET: Use WDT to generate interrupt and reset MCU
Returns:
None

Definition at line 164 of file lpc17xx_wdt.c.

FlagStatus WDT_ReadTimeOutFlag ( void )

Read WDT Time out flag.

Parameters:
[in] None
Returns:
Time out flag status of WDT

Definition at line 201 of file lpc17xx_wdt.c.

void WDT_Start ( uint32_t TimeOut )

Start WDT activity with given timeout value.

Parameters:
[in] TimeOut WDT reset after timeout if it is not feed
Returns:
None

Definition at line 184 of file lpc17xx_wdt.c.

void WDT_UpdateTimeOut ( uint32_t TimeOut )

Update WDT timeout value and feed.

Parameters:
[in] TimeOut TimeOut value to be updated
Returns:
None

Definition at line 221 of file lpc17xx_wdt.c.

Generated on Tue Jun 7 14:59:43 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: LPC_Types

LPC_Types
[LPC1700CMSIS Firmware Library]

Modules

LPC_Types Public Types
LPC_Types Public Macros
Generated on Tue Jun 7 14:59:43 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: LPC_Types Public Types

LPC_Types Public Types
[LPC_Types]

Defines

#define | PARAM_SETSTATE(State) ((State==RESET) || (State==SET))
#define | PARAM_FUNCTIONALSTATE(State) ((State==DISABLE) || (State==ENABLE))

Typedefs

typedef enum FlagStatus | IntStatus
typedef enum FlagStatus | SetState
typedef void(* | PFV )()
typedef int32_t(* | PFI )()
typedef char | CHAR
typedef uint8_t | UNS_8
typedef int8_t | INT_8
typedef uint16_t | UNS_16
typedef int16_t | INT_16
typedef uint32_t | UNS_32
typedef int32_t | INT_32
typedef int64_t | INT_64
typedef uint64_t | UNS_64
typedef Bool | BOOL_32
typedef Bool | BOOL_16
typedef Bool | BOOL_8

Enumerations

enum | Bool { FALSE = 0, TRUE = !FALSE }
Boolean Type definition. More...
enum | FlagStatus { RESET = 0, SET = !RESET }
Flag Status and Interrupt Flag Status type definition. More...
enum | FunctionalState { DISABLE = 0, ENABLE = !DISABLE }
Functional State Definition. More...
enum | Status { ERROR = 0, SUCCESS = !ERROR }
enum | TRANSFER_BLOCK_Type { NONE_BLOCKING = 0, BLOCKING }

Define Documentation

#define PARAM_FUNCTIONALSTATE ( State ) ((State==DISABLE) || (State==ENABLE))

Definition at line 62 of file lpc_types.h.

#define PARAM_SETSTATE ( State ) ((State==RESET) || (State==SET))

Definition at line 56 of file lpc_types.h.

Typedef Documentation

typedef Bool BOOL_16

16 bit boolean type

Definition at line 186 of file lpc_types.h.

typedef Bool BOOL_32

32 bit boolean type

Definition at line 183 of file lpc_types.h.

typedef Bool BOOL_8

8 bit boolean type

Definition at line 189 of file lpc_types.h.

typedef char CHAR

SMA type for character type

Definition at line 156 of file lpc_types.h.

typedef int16_t INT_16

SMA type for 16 bit signed value

Definition at line 168 of file lpc_types.h.

typedef int32_t INT_32

SMA type for 32 bit signed value

Definition at line 174 of file lpc_types.h.

typedef int64_t INT_64

SMA type for 64 bit signed value

Definition at line 177 of file lpc_types.h.

typedef int8_t INT_8

SMA type for 8 bit signed value

Definition at line 162 of file lpc_types.h.

typedef enum FlagStatus IntStatus

typedef int32_t(* PFI)()

Pointer to Function returning int32_t (any number of parameters)

Definition at line 84 of file lpc_types.h.

typedef void(* PFV)()

Pointer to Function returning Void (any number of parameters)

Definition at line 81 of file lpc_types.h.

typedef enum FlagStatus SetState

typedef uint16_t UNS_16

SMA type for 16 bit unsigned value

Definition at line 165 of file lpc_types.h.

typedef uint32_t UNS_32

SMA type for 32 bit unsigned value

Definition at line 171 of file lpc_types.h.

typedef uint64_t UNS_64

SMA type for 64 bit unsigned value

Definition at line 180 of file lpc_types.h.

typedef uint8_t UNS_8

SMA type for 8 bit unsigned value

Definition at line 159 of file lpc_types.h.

Enumeration Type Documentation

enum Bool

Boolean Type definition.

Enumerator:
FALSE
TRUE

Definition at line 50 of file lpc_types.h.

enum FlagStatus

Flag Status and Interrupt Flag Status type definition.

Enumerator:
RESET
SET

Definition at line 55 of file lpc_types.h.

enum FunctionalState

Functional State Definition.

Enumerator:
DISABLE
ENABLE

Definition at line 61 of file lpc_types.h.

enum Status

@ Status type definition

Enumerator:
ERROR
SUCCESS

Definition at line 67 of file lpc_types.h.

enum TRANSFER_BLOCK_Type

Read/Write transfer type mode (Block or non-block)

Enumerator:
NONE_BLOCKING | None Blocking type
BLOCKING | Blocking type

Definition at line 73 of file lpc_types.h.

Generated on Tue Jun 7 14:59:43 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: LPC_Types Public Macros

LPC_Types Public Macros
[LPC_Types]

Defines

#define | _BIT(n) (1<<n)
#define | _SBF(f, v) (v<<f)
#define | _BITMASK(field_width) ( _BIT(field_width) - 1)
#define | NULL ((void*) 0)
#define | NELEMENTS(array) (sizeof (array) / sizeof (array[0]))
#define | STATIC static
#define | EXTERN extern
#define | MAX(a, b) (((a) > (b)) ? (a) : (b))
#define | MIN(a, b) (((a) < (b)) ? (a) : (b))

Define Documentation

#define _BIT ( n ) (1<<n)

Definition at line 102 of file lpc_types.h.

#define _BITMASK ( field_width ) ( _BIT(field_width) - 1)

Definition at line 127 of file lpc_types.h.

#define _SBF | ( | f,
 |  | v | ) | (v<<f)

Definition at line 110 of file lpc_types.h.

#define EXTERN extern

Definition at line 140 of file lpc_types.h.

#define MAX | ( | a,
 |  | b | ) | (((a) > (b)) ? (a) : (b))

Definition at line 142 of file lpc_types.h.

#define MIN | ( | a,
 |  | b | ) | (((a) < (b)) ? (a) : (b))

Definition at line 143 of file lpc_types.h.

#define NELEMENTS ( array ) (sizeof (array) / sizeof (array[0]))

Definition at line 135 of file lpc_types.h.

#define NULL ((void*) 0)

Definition at line 131 of file lpc_types.h.

#define STATIC static

Definition at line 138 of file lpc_types.h.

Generated on Tue Jun 7 14:59:43 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: LPC1700CMSIS Examples

LPC1700CMSIS Examples

Modules

ADC
CAN
Cortex-M3
DAC
EMAC
GPDMA
GPIO
I2C
I2S
LCD
MCPWM
NVIC
PWM
PWR
QEI
RIT
RTC
SPI
SSP
SysTick
TIMER
UART
USBDEV
WDT
Generated on Tue Jun 7 14:59:46 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: ADC

ADC
[LPC1700CMSIS Examples]

Modules

Burst
DMA
HardwareTrigger
INTERRUPT
Polling
Generated on Tue Jun 7 14:59:46 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Burst

Burst
[ADC]

Defines

#define | MCB_LPC_1768
#define | MCB_LPC17XX_ADC_INJECT_TEST
#define | MCB_LPC_1768_ADC_BURST_MULTI
#define | _ADC_INT ADC_ADINTEN2
#define | _ADC_CHANNEL ADC_CHANNEL_2
#define | _ADC_INT_3 ADC_ADINTEN3
#define | _ADC_CHANNEL_3 ADC_CHANNEL_3
#define | DMA_SIZE 8
#define | GPIO_INT (1<<10)
#define | POLL_LED (1<<4)

Functions

int | c_entry (void)
c_entry: Main ADC program body
int | main (void)
void | check_failed (uint8_t *file, uint32_t line)

Variables

uint8_t | menu1 []

Define Documentation

#define _ADC_CHANNEL ADC_CHANNEL_2

Definition at line 49 of file adc_burst_test.c.

#define _ADC_CHANNEL_3 ADC_CHANNEL_3

Definition at line 53 of file adc_burst_test.c.

#define _ADC_INT ADC_ADINTEN2

Definition at line 48 of file adc_burst_test.c.

#define _ADC_INT_3 ADC_ADINTEN3

Definition at line 52 of file adc_burst_test.c.

#define DMA_SIZE 8

DMA size of transfer

Definition at line 62 of file adc_burst_test.c.

#define GPIO_INT (1<<10)

Definition at line 65 of file adc_burst_test.c.

#define MCB_LPC17XX_ADC_INJECT_TEST

Definition at line 41 of file adc_burst_test.c.

#define MCB_LPC_1768

Definition at line 39 of file adc_burst_test.c.

#define MCB_LPC_1768_ADC_BURST_MULTI

Definition at line 44 of file adc_burst_test.c.

#define POLL_LED (1<<4)

Definition at line 66 of file adc_burst_test.c.

Function Documentation

int c_entry ( void )

c_entry: Main ADC program body

Parameters:
[in] None
Returns:
int

Definition at line 132 of file adc_burst_test.c.

void check_failed | ( | uint8_t * | file,
 |  | uint32_t | line
 | ) |  |

Definition at line 250 of file adc_burst_test.c.

int main ( void )

Definition at line 238 of file adc_burst_test.c.

Variable Documentation

uint8_t menu1[]

Initial value:

"********************************************************************************\n\r"
"Hello NXP Semiconductors \n\r"
" ADC burst demo \n\r"
"\t - MCU: LPC17xx \n\r"
"\t - Core: ARM CORTEX-M3 \n\r"
"\t - Communicate via: UART0 - 115200 bps \n\r"
" Use ADC with 12-bit resolution rate of 200KHz, running burst mode (single or multiple input)\n\r"
" Display ADC value via UART0\n\r"
" Turn the potentiometer to see how ADC value changes\n\r"
"********************************************************************************\n\r"

Definition at line 69 of file adc_burst_test.c.

Generated on Tue Jun 7 14:59:47 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: DMA

DMA
[ADC]

Defines

#define | MCB_LPC_1768
#define | _ADC_INT ADC_ADINTEN2
#define | _ADC_CHANNEL ADC_CHANNEL_2
#define | DMA_SIZE 1

Functions

void | print_menu (void)
Print menu.
int | c_entry (void)
c_entry: Main ADC program body
int | main (void)
void | check_failed (uint8_t *file, uint32_t line)

Variables

uint8_t | menu1 []
uint8_t | menu2 [] = "ADC value on channel 2: "
__IO uint32_t | Channel0_TC
__IO uint32_t | Channel0_Err

Define Documentation

#define _ADC_CHANNEL ADC_CHANNEL_2

Definition at line 44 of file adc_dma_test.c.

#define _ADC_INT ADC_ADINTEN2

Definition at line 43 of file adc_dma_test.c.

#define DMA_SIZE 1

DMA size of transfer

Definition at line 51 of file adc_dma_test.c.

#define MCB_LPC_1768

Definition at line 39 of file adc_dma_test.c.

Function Documentation

int c_entry ( void )

c_entry: Main ADC program body

Parameters:
[in] None
Returns:
int

Definition at line 125 of file adc_dma_test.c.

void check_failed | ( | uint8_t * | file,
 |  | uint32_t | line
 | ) |  |

Definition at line 266 of file adc_dma_test.c.

int main ( void )

Definition at line 253 of file adc_dma_test.c.

void print_menu ( void )

Print menu.

Parameters:
[in] None
Returns:
None
Print menu.

Parameters:
[in] none
Returns:
none

Definition at line 209 of file can_test_two_kit.c.

Variable Documentation

__IO uint32_t Channel0_Err

Definition at line 76 of file adc_dma_test.c.

__IO uint32_t Channel0_TC

Definition at line 73 of file adc_dma_test.c.

uint8_t menu1[]

Initial value:

                "********************************************************************************\n\r"
                "Hello NXP Semiconductors \n\r"
                " ADC demo \n\r"
                "\t - MCU: LPC17xx \n\r"
                "\t - Core: ARM CORTEX-M3 \n\r"
                "\t - Communicate via: UART0 - 115200bps \n\r"
                " DMA testing : ADC peripheral to memory\n\r"
                " Use ADC with 12-bit resolution rate of 200KHz\n\r"
                " Value ADC channel is displayed by UART, this value is taken from destination memory value of DMA function \n\r"
                " Turn the potentiometer to see how ADC value changes\n\r"
                "********************************************************************************\n\r"

Definition at line 54 of file adc_dma_test.c.

uint8_t menu2[] = "ADC value on channel 2: "

Definition at line 67 of file adc_dma_test.c.

Generated on Tue Jun 7 14:59:47 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: HardwareTrigger

HardwareTrigger
[ADC]

Defines

#define | _ADC_INT ADC_ADINTEN2
#define | _ADC_CHANNEL ADC_CHANNEL_2

Functions

void | print_menu (void)
Print menu.
int | c_entry (void)
c_entry: Main ADC program body
int | main (void)
void | check_failed (uint8_t *file, uint32_t line)

Variables

uint8_t | menu1 []
uint32_t | adc_value

Define Documentation

#define _ADC_CHANNEL ADC_CHANNEL_2

Definition at line 39 of file adc_hardware_trigger_test.c.

#define _ADC_INT ADC_ADINTEN2

Definition at line 38 of file adc_hardware_trigger_test.c.

Function Documentation

int c_entry ( void )

c_entry: Main ADC program body

Parameters:
[in] None
Returns:
int

Definition at line 96 of file adc_hardware_trigger_test.c.

void check_failed | ( | uint8_t * | file,
 |  | uint32_t | line
 | ) |  |

Definition at line 183 of file adc_hardware_trigger_test.c.

int main ( void )

Definition at line 171 of file adc_hardware_trigger_test.c.

void print_menu ( void )

Print menu.

Parameters:
[in] None
Returns:
None
Print menu.

Parameters:
[in] none
Returns:
none

Definition at line 209 of file can_test_two_kit.c.

Variable Documentation

uint32_t adc_value

Definition at line 55 of file adc_hardware_trigger_test.c.

uint8_t menu1[]

Initial value:

"********************************************************************************\n\r"
"Hello NXP Semiconductors \n\r"
" ADC demo \n\r"
"\t - MCU: LPC17xx \n\r"
"\t - Core: ARM CORTEX-M3 \n\r"
"\t - Communicate via: UART0 - 115200 bps \n\r"
" Use ADC with 12-bit resolution rate of 200KHz, read in hardware-triggred mode\n\r"
" Press INT0 button to start ADC conversion, ADC interrupt when conversion completed\n\r"
" ADC channel value is read back and displayed via UART0\n\r"
" Turn the potentiometer to see how ADC value changes\n\r"
"********************************************************************************\n\r"

Definition at line 42 of file adc_hardware_trigger_test.c.

Generated on Tue Jun 7 14:59:47 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: INTERRUPT

INTERRUPT
[ADC]

Defines

#define | MCB_LPC_1768
#define | _ADC_INT ADC_ADINTEN2
#define | _ADC_CHANNEL ADC_CHANNEL_2

Functions

void | ADC_IRQHandler (void)
ADC interrupt handler sub-routine.
void | print_menu (void)
Print menu.
int | c_entry (void)
c_entry: Main ADC program body
int | main (void)
void | check_failed (uint8_t *file, uint32_t line)

Variables

uint8_t | menu1 []
uint32_t | adc_value

Define Documentation

#define _ADC_CHANNEL ADC_CHANNEL_2

Definition at line 43 of file adc_interrupt_test.c.

#define _ADC_INT ADC_ADINTEN2

Definition at line 42 of file adc_interrupt_test.c.

#define MCB_LPC_1768

Definition at line 38 of file adc_interrupt_test.c.

Function Documentation

void ADC_IRQHandler ( void )

ADC interrupt handler sub-routine.

Parameters:
[in] None
Returns:
None

int c_entry ( void )

c_entry: Main ADC program body

Parameters:
[in] None
Returns:
int

Definition at line 111 of file adc_interrupt_test.c.

void check_failed | ( | uint8_t * | file,
 |  | uint32_t | line
 | ) |  |

Definition at line 203 of file adc_interrupt_test.c.

int main ( void )

Definition at line 191 of file adc_interrupt_test.c.

void print_menu ( void )

Print menu.

Parameters:
[in] None
Returns:
None
Print menu.

Parameters:
[in] none
Returns:
none

Definition at line 209 of file can_test_two_kit.c.

Variable Documentation

uint32_t adc_value

Definition at line 62 of file adc_interrupt_test.c.

uint8_t menu1[]

Initial value:

"********************************************************************************\n\r"
"Hello NXP Semiconductors \n\r"
" ADC demo \n\r"
"\t - MCU: LPC17xx \n\r"
"\t - Core: ARM CORTEX-M3 \n\r"
"\t - Communicate via: UART0 - 115200 bps \n\r"
" Use ADC with 12-bit resolution rate of 200KHz, read in interrupt mode\n\r"
" To get ADC channel value and display via UART0\n\r"
" Turn the potentiometer to see how ADC value changes\n\r"
"********************************************************************************\n\r"

Definition at line 50 of file adc_interrupt_test.c.

Generated on Tue Jun 7 14:59:47 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Polling

Polling
[ADC]

Defines

#define | MCB_LPC_1768
#define | _ADC_INT ADC_ADINTEN2
#define | _ADC_CHANNEL ADC_CHANNEL_2

Functions

void | print_menu (void)
Print menu.
int | c_entry (void)
c_entry: Main ADC program body
int | main (void)
void | check_failed (uint8_t *file, uint32_t line)

Variables

uint8_t | menu1 []

Define Documentation

#define _ADC_CHANNEL ADC_CHANNEL_2

Definition at line 43 of file adc_polling_test.c.

#define _ADC_INT ADC_ADINTEN2

Definition at line 42 of file adc_polling_test.c.

#define MCB_LPC_1768

Definition at line 38 of file adc_polling_test.c.

Function Documentation

int c_entry ( void )

c_entry: Main ADC program body

Parameters:
[in] None
Returns:
int

Definition at line 84 of file adc_polling_test.c.

void check_failed | ( | uint8_t * | file,
 |  | uint32_t | line
 | ) |  |

Definition at line 177 of file adc_polling_test.c.

int main ( void )

Definition at line 165 of file adc_polling_test.c.

void print_menu ( void )

Print menu.

Parameters:
[in] None
Returns:
None
Print menu.

Parameters:
[in] none
Returns:
none

Definition at line 209 of file can_test_two_kit.c.

Variable Documentation

uint8_t menu1[]

Initial value:

"********************************************************************************\n\r"
"Hello NXP Semiconductors \n\r"
" ADC demo \n\r"
"\t - MCU: LPC1768 \n\r"
"\t - Core: ARM CORTEX-M3 \n\r"
"\t - Communicate via: UART0 - 115200 bps \n\r"
" Use ADC with 12-bit resolution rate of 200KHz, read in polling mode\n\r"
" To get ADC value and display via UART0\n\r"
" Turn the potentiometer to see how ADC value changes\n\r"
"********************************************************************************\n\r"

Definition at line 50 of file adc_polling_test.c.

Generated on Tue Jun 7 14:59:48 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: CAN

CAN
[LPC1700CMSIS Examples]

Modules

CAN_LedControl
CAN_self_test
CAN_test_aflut
CAN_test_bypass_mode
CAN_test_two_kit
Generated on Tue Jun 7 14:59:46 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: CAN_LedControl

CAN_LedControl
[CAN]

Functions

void | print_menu ()
print menu
int | c_entry (void)
c_entry: Main CAN program body
int | main (void)
void | check_failed (uint8_t *file, uint32_t line)

Variables

uint8_t | menu []
CAN_MSG_Type TXMsg
CAN_MSG_Type RXMsg
uint8_t | LED_Value
uint32_t | LED [8] = {(1<<6),(1<<5),(1<<4),(1<<3),(1<<2),(1<<31),(1<<29),(1<<28)}

Function Documentation

int c_entry ( void )

c_entry: Main CAN program body

Parameters:
[in] none
Returns:
int

Definition at line 140 of file can_ledcontrol.c.

void check_failed | ( | uint8_t * | file,
 |  | uint32_t | line
 | ) |  |

Definition at line 277 of file can_ledcontrol.c.

int main ( void )

Definition at line 265 of file can_ledcontrol.c.

void print_menu ( void )

print menu

Parameters:
[in] none
Returns:
none
Print menu.

Parameters:
[in] none
Returns:
none

Definition at line 209 of file can_test_two_kit.c.

Variable Documentation

uint32_t LED[8] = {(1<<6),(1<<5),(1<<4),(1<<3),(1<<2),(1<<31),(1<<29),(1<<28)}

Definition at line 53 of file can_ledcontrol.c.

uint8_t LED_Value

Definition at line 52 of file can_ledcontrol.c.

uint8_t menu[]

Initial value:

        "*******************************************************************************\n\r"
        "Hello NXP Semiconductors \n\r"
        "CAN demo \n\r"
        "\t - MCU: LPC17xx \n\r"
        "\t - Core: ARM CORTEX-M3 \n\r"
        "\t - Communicate via: UART0 - 115200 bps \n\r"
        "Use two CAN peripherals: CAN1 and CAN2 to communicate\n\r"
        "Use CAN frames to control LED display\n\r"
        "*******************************************************************************\n\r"

Definition at line 39 of file can_ledcontrol.c.

CAN_MSG_Type RXMsg

Definition at line 51 of file can_ledcontrol.c.

CAN_MSG_Type TXMsg

CAN variable definition

Definition at line 51 of file can_ledcontrol.c.

Generated on Tue Jun 7 14:59:48 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: CAN_self_test

CAN_self_test
[CAN]

Functions

void | CAN_IRQHandler ()
CAN_IRQ Handler, control receive message operation param[in] none.
void | CAN_InitMessage (void)
Initialize transmit and receive message for Bypass operation.
void | print_menu ()
print menu
Bool | Check_Message (CAN_MSG_Type *TX_Msg, CAN_MSG_Type *RX_Msg)
Compare two message.
int | c_entry (void)
c_entry: Main CAN program body
int | main (void)
void | check_failed (uint8_t *file, uint32_t line)

Variables

uint8_t | menu []
CAN_MSG_Type TXMsg
CAN_MSG_Type RXMsg
uint32_t | CANRxCount
uint32_t | CANTxCount = 0

Function Documentation

int c_entry ( void )

c_entry: Main CAN program body

Parameters:
[in] none
Returns:
int

To test Bypass Mode: we send infinite messages to CAN2 and check receive process via COM1

Definition at line 179 of file can_self_test.c.

void CAN_InitMessage ( void )

Initialize transmit and receive message for Bypass operation.

Parameters:
[in] none
Returns:
none

void CAN_IRQHandler ( void )

CAN_IRQ Handler, control receive message operation param[in] none.

Returns:
none

void check_failed | ( | uint8_t * | file,
 |  | uint32_t | line
 | ) |  |

Definition at line 236 of file can_self_test.c.

Bool Check_Message | ( | CAN_MSG_Type * | TX_Msg,
 |  | CAN_MSG_Type * | RX_Msg
 | ) |  |

Compare two message.

Parameters:
[in] | Tx_Msg | transmit message
[in] | Rx_Msg | receive message
Returns:
Bool should be:
  • TRUE: if two message is the same
  • FALSE: if two message is different

Definition at line 160 of file can_self_test.c.

int main ( void )

Definition at line 224 of file can_self_test.c.

void print_menu ( void )

print menu

Parameters:
[in] none
Returns:
none
Print menu.

Parameters:
[in] none
Returns:
none

Definition at line 209 of file can_test_two_kit.c.

Variable Documentation

uint32_t CANRxCount

Definition at line 48 of file can_self_test.c.

uint32_t CANTxCount = 0

Definition at line 48 of file can_self_test.c.

uint8_t menu[]

Initial value:

        "*******************************************************************************\n\r"
        "Hello NXP Semiconductors \n\r"
        "CAN Self-test demo \n\r"
        "\t - MCU: LPC17xx \n\r"
        "\t - Core: ARM CORTEX-M3 \n\r"
        "\t - Communicate via: UART0 - 115200 bps \n\r"
        "Use only CAN1 peripherals to test\n\r"
        "This example used to test Self test mode\n\r"
        "*******************************************************************************\n\r"

Definition at line 35 of file can_self_test.c.

CAN_MSG_Type RXMsg

Definition at line 47 of file can_self_test.c.

CAN_MSG_Type TXMsg

CAN variable definition

Definition at line 47 of file can_self_test.c.

Generated on Tue Jun 7 14:59:48 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: CAN_test_aflut

CAN_test_aflut
[CAN]

Defines

#define | MAX_ENTRY 512
#define | CAN_TX_MSG_CNT 10
#define | CAN_RX_MSG_CNT 5

Functions

void | CAN_IRQHandler (void)
CAN IRQ Handler.
void | CAN_PinCfg (void)
void | CAN_InitMessage (void)
void | PrintMessage (CAN_MSG_Type *CAN_Msg)
Print Message via COM1 param[in] msg: point to CAN_MSG_Type object that will be printed.
void | print_menu ()
print menu
void | CAN_ChangeAFTable (void)
Change AFLUT table.
int | c_entry (void)
c_entry: Main CAN program body
int | main (void)
void | check_failed (uint8_t *file, uint32_t line)

Variables

uint8_t | menu []
CAN_MSG_Type | AFTxMsg [CAN_TX_MSG_CNT]
CAN_MSG_Type | AFRxMsg [CAN_RX_MSG_CNT]
uint32_t | CANRxCount = 0
uint32_t | CANTxCount = 0
uint32_t | CANErrCount = 0
AF_SectionDef AFTable
FullCAN_Entry | FullCAN_Table [6]
SFF_Entry | SFF_Table [6]
SFF_GPR_Entry | SFF_GPR_Table [6]
EFF_Entry | EFF_Table [6]
EFF_GPR_Entry | EFF_GPR_Table [6]

Define Documentation

#define CAN_RX_MSG_CNT 5

Definition at line 40 of file can_test_aflut.c.

#define CAN_TX_MSG_CNT 10

Definition at line 39 of file can_test_aflut.c.

#define MAX_ENTRY 512

Definition at line 38 of file can_test_aflut.c.

Function Documentation

int c_entry ( void )

c_entry: Main CAN program body

Parameters:
[in] none
Returns:
int

Definition at line 404 of file can_test_aflut.c.

void CAN_ChangeAFTable ( void )

Change AFLUT table.

Parameters:
[in] none
Returns:
none

Definition at line 270 of file can_test_aflut.c.

void CAN_InitMessage ( void )

void CAN_IRQHandler ( void )

CAN IRQ Handler.

Parameters:
[in] none
Returns:
none

void CAN_PinCfg ( void )

void check_failed | ( | uint8_t * | file,
 |  | uint32_t | line
 | ) |  |

Definition at line 544 of file can_test_aflut.c.

int main ( void )

Definition at line 532 of file can_test_aflut.c.

void print_menu ( void )

print menu

Parameters:
[in] none
Returns:
none
Print menu.

Parameters:
[in] none
Returns:
none

Definition at line 209 of file can_test_two_kit.c.

void PrintMessage ( CAN_MSG_Type * CAN_Msg )

Print Message via COM1 param[in] msg: point to CAN_MSG_Type object that will be printed.

Returns:
none

Variable Documentation

CAN_MSG_Type AFRxMsg[CAN_RX_MSG_CNT]

Definition at line 56 of file can_test_aflut.c.

AF_SectionDef AFTable

Definition at line 60 of file can_test_aflut.c.

CAN_MSG_Type AFTxMsg[CAN_TX_MSG_CNT]

Definition at line 56 of file can_test_aflut.c.

uint32_t CANErrCount = 0

Definition at line 58 of file can_test_aflut.c.

uint32_t CANRxCount = 0

Definition at line 57 of file can_test_aflut.c.

uint32_t CANTxCount = 0

Definition at line 57 of file can_test_aflut.c.

EFF_GPR_Entry EFF_GPR_Table[6]

Definition at line 65 of file can_test_aflut.c.

EFF_Entry EFF_Table[6]

Definition at line 64 of file can_test_aflut.c.

FullCAN_Entry FullCAN_Table[6]

Definition at line 61 of file can_test_aflut.c.

uint8_t menu[]

Initial value:

        "********************************************************************************\n\r"
        "Hello NXP Semiconductors \n\r"
        "CAN demo \n\r"
        "\t - MCU: LPC17xx \n\r"
        "\t - Core: ARM CORTEX-M3 \n\r"
        "\t - Communicate via: UART0 - 115200 bps \n\r"
        "Use 2 CAN peripherals: CAN1&CAN2 to transfer data\n\r"
        "This example tests full Acceptance Filter operation \n\r"
        "and load/remove AFLUT entry dynamically functions \n\r"
        "********************************************************************************\n\r"

Definition at line 43 of file can_test_aflut.c.

SFF_GPR_Entry SFF_GPR_Table[6]

Definition at line 63 of file can_test_aflut.c.

SFF_Entry SFF_Table[6]

Definition at line 62 of file can_test_aflut.c.

Generated on Tue Jun 7 14:59:48 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: CAN_test_bypass_mode

CAN_test_bypass_mode
[CAN]

Functions

void | CAN_IRQHandler ()
CAN_IRQ Handler, control receive message operation param[in] none.
void | CAN_InitMessage (void)
Initialize transmit and receive message for Bypass operation.
void | PrintMessage (CAN_MSG_Type *CAN_Msg)
Print Message via COM1 param[in] msg: point to CAN_MSG_Type object that will be printed.
void | print_menu ()
print menu
int | c_entry (void)
c_entry: Main CAN program body
int | main (void)
void | check_failed (uint8_t *file, uint32_t line)

Variables

uint8_t | menu []
CAN_MSG_Type TXMsg
CAN_MSG_Type RXMsg
uint32_t | CANRxCount
uint32_t | CANTxCount = 0

Function Documentation

int c_entry ( void )

c_entry: Main CAN program body

Parameters:
[in] none
Returns:
int

To test Bypass Mode: we send infinite messages to CAN2 and check receive process via COM1

Definition at line 167 of file can_test_bypass_mode.c.

void CAN_InitMessage ( void )

Initialize transmit and receive message for Bypass operation.

Parameters:
[in] none
Returns:
none

void CAN_IRQHandler ( void )

CAN_IRQ Handler, control receive message operation param[in] none.

Returns:
none

void check_failed | ( | uint8_t * | file,
 |  | uint32_t | line
 | ) |  |

Definition at line 245 of file can_test_bypass_mode.c.

int main ( void )

Definition at line 233 of file can_test_bypass_mode.c.

void print_menu ( void )

print menu

Parameters:
[in] none
Returns:
none
Print menu.

Parameters:
[in] none
Returns:
none

Definition at line 209 of file can_test_two_kit.c.

void PrintMessage ( CAN_MSG_Type * CAN_Msg )

Print Message via COM1 param[in] msg: point to CAN_MSG_Type object that will be printed.

Returns:
none

Variable Documentation

uint32_t CANRxCount

Definition at line 49 of file can_test_bypass_mode.c.

uint32_t CANTxCount = 0

Definition at line 49 of file can_test_bypass_mode.c.

uint8_t menu[]

Initial value:

        "*******************************************************************************\n\r"
        "Hello NXP Semiconductors \n\r"
        "CAN bypass demo \n\r"
        "\t - MCU: LPC17xx \n\r"
        "\t - Core: ARM CORTEX-M3 \n\r"
        "\t - Communicate via: UART0 - 115200 bps \n\r"
        "Use two CAN peripherals: CAN1 and CAN2 to communicate\n\r"
        "This example used to test Bypass mode\n\r"
        "*******************************************************************************\n\r"

Definition at line 36 of file can_test_bypass_mode.c.

CAN_MSG_Type RXMsg

Definition at line 48 of file can_test_bypass_mode.c.

CAN_MSG_Type TXMsg

CAN variable definition

Definition at line 48 of file can_test_bypass_mode.c.

Generated on Tue Jun 7 14:59:48 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: CAN_test_two_kit

CAN_test_two_kit
[CAN]

Defines

#define | CAN_TRANSMIT 1
#define | CAN_RECEIVE !CAN_TRANSMIT
#define | TX_BUFFER_SIZE 4
#define | RX_BUFFER_SIZE 2

Functions

void | CAN_IRQHandler ()
CAN_IRQ Handler, control receive message operation param[in] none.
void | CAN_InitMessage (void)
Bool | CAN_VerifyMessage (CAN_MSG_Type Msg1, CAN_MSG_Type Msg2)
CAN_ERROR | CAN_SetupAFTable (void)
Setup Acceptance Filter Table.
void | CAN_InitAFMessage (void)
Initialize transmit and receive message for testing AF operation.
void | PrintMessage (CAN_MSG_Type *CAN_Msg)
Print Message via COM1 param[in] msg: point to CAN_MSG_Type object that will be printed.
void | print_menu (void)
print menu
int | c_entry (void)
c_entry: Main CAN program body
int | main (void)
void | check_failed (uint8_t *file, uint32_t line)

Variables

uint8_t | menu []
CAN_MSG_Type TXMsg
CAN_MSG_Type RXMsg
CAN_MSG_Type | AFTxMsg [TX_BUFFER_SIZE]
CAN_MSG_Type | AFRxMsg [RX_BUFFER_SIZE]
uint32_t | CANRxCount = 0
uint32_t | CANTxCount = 0
uint32_t | CANErrCount = 0

Define Documentation

#define CAN_RECEIVE !CAN_TRANSMIT

Definition at line 37 of file can_test_two_kit.c.

#define CAN_TRANSMIT 1

Definition at line 36 of file can_test_two_kit.c.

#define RX_BUFFER_SIZE 2

Definition at line 39 of file can_test_two_kit.c.

#define TX_BUFFER_SIZE 4

Definition at line 38 of file can_test_two_kit.c.

Function Documentation

int c_entry ( void )

c_entry: Main CAN program body

Parameters:
[in] none
Returns:
int

Definition at line 220 of file can_test_two_kit.c.

void CAN_InitAFMessage ( void )

Initialize transmit and receive message for testing AF operation.

Parameters:
[in] none
Returns:
none

void CAN_InitMessage ( void )

void CAN_IRQHandler ( void )

CAN_IRQ Handler, control receive message operation param[in] none.

Returns:
none

CAN_ERROR CAN_SetupAFTable ( void )

Setup Acceptance Filter Table.

Parameters:
[in] none
Returns:
none Note: not use Group Standard Frame, just use for Explicit Standard and Extended Frame

Bool CAN_VerifyMessage | ( | CAN_MSG_Type | Msg1,
 |  | CAN_MSG_Type | Msg2
 | ) |  |

void check_failed | ( | uint8_t * | file,
 |  | uint32_t | line
 | ) |  |

Definition at line 306 of file can_test_two_kit.c.

int main ( void )

Definition at line 294 of file can_test_two_kit.c.

void print_menu ( void )

print menu

Print Welcome Screen Menu subroutine.

print_menu

Print menu screen.

Print Welcome menu.

Print menu.

Parameters:
[in] none
Returns:
none

Definition at line 209 of file can_test_two_kit.c.

void PrintMessage ( CAN_MSG_Type * CAN_Msg )

Print Message via COM1 param[in] msg: point to CAN_MSG_Type object that will be printed.

Returns:
none

Variable Documentation

CAN_MSG_Type AFRxMsg[RX_BUFFER_SIZE]

Definition at line 54 of file can_test_two_kit.c.

CAN_MSG_Type AFTxMsg[TX_BUFFER_SIZE]

Definition at line 54 of file can_test_two_kit.c.

uint32_t CANErrCount = 0

Definition at line 56 of file can_test_two_kit.c.

uint32_t CANRxCount = 0

Definition at line 55 of file can_test_two_kit.c.

uint32_t CANTxCount = 0

Definition at line 55 of file can_test_two_kit.c.

uint8_t menu[]

Initial value:

        "********************************************************************************\n\r"
        "Hello NXP Semiconductors \n\r"
        "CAN demo \n\r"
        "\t - MCU: LPC17xx \n\r"
        "\t - Core: ARM CORTEX-M3 \n\r"
        "\t - Communicate via: UART0 - 115200 bps \n\r"
        "Use 2 CAN peripherals on 2 boards to transfer data \n\r"
        "********************************************************************************\n\r"

Definition at line 42 of file can_test_two_kit.c.

CAN_MSG_Type RXMsg

Definition at line 53 of file can_test_two_kit.c.

CAN_MSG_Type TXMsg

CAN variable definition

Definition at line 53 of file can_test_two_kit.c.

Generated on Tue Jun 7 14:59:48 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Cortex-M3

Cortex-M3
[LPC1700CMSIS Examples]

Modules

Bit-banding
MPU
Privilege_mode
Generated on Tue Jun 7 14:59:46 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Bit-banding

Bit-banding
[Cortex-M3]

Defines

#define | BITBAND_SRAM_REF 0x20000000
#define | BITBAND_SRAM_BASE 0x22000000
#define | BITBAND_SRAM(a, b) ((BITBAND_SRAM_BASE + ((a-BITBAND_SRAM_REF)<<5) + (b<<2)))
#define | BITBAND_PERI_REF 0x40000000
#define | BITBAND_PERI_BASE 0x42000000
#define | BITBAND_PERI(a, b) ((BITBAND_PERI_BASE + ((a-BITBAND_PERI_REF)<<5) + (b<<2)))
#define | BITBAND_SRAM_ClearBit(a, b) (*(volatile uint32_t *) (BITBAND_SRAM(a,b)) = 0)
#define | BITBAND_SRAM_SetBit(a, b) (*(volatile uint32_t *) (BITBAND_SRAM(a,b)) = 1)
#define | BITBAND_SRAM_GetBit(a, b) (*(volatile uint32_t *) (BITBAND_SRAM(a,b)))
#define | BITBAND_PERI_ClearBit(a, b) (*(volatile uint32_t *) (BITBAND_PERI(a,b)) = 0)
#define | BITBAND_PERI_SetBit(a, b) (*(volatile uint32_t *) (BITBAND_PERI(a,b)) = 1)
#define | BITBAND_PERI_GetBit(a, b) (*(volatile uint32_t *) (BITBAND_PERI(a,b)))
#define | VAR_ADDRESS 0x2007C000
#define | VAR_BIT 3
#define | PERI_ADDRESS 0x40020000
#define | PERI_BIT 5

Functions

int | c_entry (void)
c_entry: main function
int | main (void)
void | check_failed (uint8_t *file, uint32_t line)

Variables

uint8_t | menu []

Define Documentation

#define BITBAND_PERI | ( | a,
 |  | b | ) | ((BITBAND_PERI_BASE + ((a-BITBAND_PERI_REF)<<5) + (b<<2)))

Definition at line 68 of file bitband.c.

#define BITBAND_PERI_BASE 0x42000000

Definition at line 66 of file bitband.c.

#define BITBAND_PERI_ClearBit | ( | a,
 |  | b | ) | (*(volatile uint32_t *) (BITBAND_PERI(a,b)) = 0)

Definition at line 75 of file bitband.c.

#define BITBAND_PERI_GetBit | ( | a,
 |  | b | ) | (*(volatile uint32_t *) (BITBAND_PERI(a,b)))

Definition at line 77 of file bitband.c.

#define BITBAND_PERI_REF 0x40000000

Definition at line 65 of file bitband.c.

#define BITBAND_PERI_SetBit | ( | a,
 |  | b | ) | (*(volatile uint32_t *) (BITBAND_PERI(a,b)) = 1)

Definition at line 76 of file bitband.c.

#define BITBAND_SRAM | ( | a,
 |  | b | ) | ((BITBAND_SRAM_BASE + ((a-BITBAND_SRAM_REF)<<5) + (b<<2)))

Definition at line 62 of file bitband.c.

#define BITBAND_SRAM_BASE 0x22000000

Definition at line 60 of file bitband.c.

#define BITBAND_SRAM_ClearBit | ( | a,
 |  | b | ) | (*(volatile uint32_t *) (BITBAND_SRAM(a,b)) = 0)

Definition at line 71 of file bitband.c.

#define BITBAND_SRAM_GetBit | ( | a,
 |  | b | ) | (*(volatile uint32_t *) (BITBAND_SRAM(a,b)))

Definition at line 73 of file bitband.c.

#define BITBAND_SRAM_REF 0x20000000

Definition at line 59 of file bitband.c.

#define BITBAND_SRAM_SetBit | ( | a,
 |  | b | ) | (*(volatile uint32_t *) (BITBAND_SRAM(a,b)) = 1)

Definition at line 72 of file bitband.c.

#define PERI_ADDRESS 0x40020000

Definition at line 90 of file bitband.c.

#define PERI_BIT 5

Definition at line 91 of file bitband.c.

#define VAR_ADDRESS 0x2007C000

Definition at line 84 of file bitband.c.

#define VAR_BIT 3

Definition at line 85 of file bitband.c.

Function Documentation

int c_entry ( void )

c_entry: main function

Parameters:
[in] none
Returns:
int

Definition at line 110 of file bitband.c.

void check_failed | ( | uint8_t * | file,
 |  | uint32_t | line
 | ) |  |

Definition at line 203 of file bitband.c.

int main ( void )

Definition at line 191 of file bitband.c.

Variable Documentation

uint8_t menu[]

Initial value:

        "********************************************************************************\n\r"
        "Hello NXP Semiconductors \n\r"
        "Bit-banding demo \n\r"
        "\t - MCU: LPC17xx \n\r"
        "\t - Core: ARM CORTEX-M3 \n\r"
        "\t - Communicate via: UART0 - 115200 bps \n\r"
        "This example used to test Bit-banding feature of Cortex-M3 processor\n\r"
        "********************************************************************************\n\r"

Definition at line 94 of file bitband.c.

Generated on Tue Jun 7 14:59:48 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: MPU

MPU
[Cortex-M3]

Functions

void | MemManage_Handler (void)
Memory Management interrupt handler sub-routine.
int | c_entry (void)
c_entry: Main MPU program body
int | main (void)
void | check_failed (uint8_t *file, uint32_t line)

Variables

uint8_t | menu []
Bool | Led_State = FALSE

Function Documentation

int c_entry ( void )

c_entry: Main MPU program body

Parameters:
[in] None
Returns:
int

Definition at line 126 of file mpu_test.c.

void check_failed | ( | uint8_t * | file,
 |  | uint32_t | line
 | ) |  |

Definition at line 275 of file mpu_test.c.

int main ( void )

Definition at line 262 of file mpu_test.c.

void MemManage_Handler ( void )

Memory Management interrupt handler sub-routine.

Parameters:
[in] None
Returns:
None

Definition at line 102 of file mpu_test.c.

Variable Documentation

Bool Led_State = FALSE

Definition at line 91 of file mpu_test.c.

uint8_t menu[]

Initial value:

        "********************************************************************************\n\r"
        "Hello NXP Semiconductors \n\r"
        "MPU demo \n\r"
        "\t - MCU: LPC17xx \n\r"
        "\t - Core: ARM CORTEX-M3 \n\r"
        "\t - Communicate via: UART0 - 115200 bps \n\r"
        "Set up 6 region memory and try to access memory that don't allow to invoke\n\r"
        "Memory Management Handler\n\r"
        "********************************************************************************\n\r"

Definition at line 81 of file mpu_test.c.

Generated on Tue Jun 7 14:59:48 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Privilege_mode

Privilege_mode
[Cortex-M3]

Defines

#define | IAR_LPC_1768
#define | THREAD_PRIVILEGED 0
#define | THREAD_UNPRIVILEGED 1
#define | THREAD_PRIVILEDGED_MASK 0xFFFFFFFE
#define | PRIVILEGE_LED 25
#define | PRIVILEGE_LEDPORT 1
#define | UNPRIVILEGE_LED 4
#define | UNPRIVILEGE_LEDPORT 0

Functions

void | SVC_Handler (void)
SVC Hander.
void | Turn_on_LED (uint8_t Led_num)
Turn on LED.
void | Turn_off_LED (uint8_t Led_num)
Turn off LED.
int | c_entry (void)
c_entry: main function
int | main (void)
void | check_failed (uint8_t *file, uint32_t line)

Variables

uint8_t | menu []
uint8_t | menu2 []

Define Documentation

#define IAR_LPC_1768

Definition at line 40 of file privilege.c.

#define PRIVILEGE_LED 25

Definition at line 56 of file privilege.c.

#define PRIVILEGE_LEDPORT 1

Definition at line 57 of file privilege.c.

#define THREAD_PRIVILEDGED_MASK 0xFFFFFFFE

Definition at line 47 of file privilege.c.

#define THREAD_PRIVILEGED 0

Definition at line 45 of file privilege.c.

#define THREAD_UNPRIVILEGED 1

Definition at line 46 of file privilege.c.

#define UNPRIVILEGE_LED 4

Definition at line 58 of file privilege.c.

#define UNPRIVILEGE_LEDPORT 0

Definition at line 59 of file privilege.c.

Function Documentation

int c_entry ( void )

c_entry: main function

Parameters:
[in] none
Returns:
int

Definition at line 185 of file privilege.c.

void check_failed | ( | uint8_t * | file,
 |  | uint32_t | line
 | ) |  |

Definition at line 277 of file privilege.c.

int main ( void )

Definition at line 265 of file privilege.c.

void SVC_Handler ( void )

SVC Hander.

Parameters:
None
Return values:
None

Definition at line 100 of file privilege.c.

void Turn_off_LED ( uint8_t Led_num )

Turn off LED.

Parameters:
[in] Led_num LED number, should be:
  • PRIVILEGE_LED
  • UNPRIVILEGE_LED
Returns:
None

Definition at line 162 of file privilege.c.

void Turn_on_LED ( uint8_t Led_num )

Turn on LED.

Parameters:
[in] Led_num LED number, should be:
  • PRIVILEGE_LED
  • UNPRIVILEGE_LED
Returns:
None

Definition at line 138 of file privilege.c.

Variable Documentation

uint8_t menu[]

Initial value:

        "********************************************************************************\n\r"
        "Hello NXP Semiconductors \n\r"
        "Privileged demo \n\r"
        "\t - MCU: LPC17xx \n\r"
        "\t - Core: ARM CORTEX-M3 \n\r"
        "\t - Communicate via: UART0 - 115200 bps \n\r"
        "This example used to test Privileged feature of Cortex-M3 processor\n\r"
        "********************************************************************************\n\r"

Definition at line 63 of file privilege.c.

uint8_t menu2[]

Initial value:

        "LED1 (P1.25) will be turned on in privilege mode \n\r"
        "LED2 (P0.4) will blink in un-privilege mode\n\r"

Definition at line 77 of file privilege.c.

Generated on Tue Jun 7 14:59:48 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: DAC

DAC
[LPC1700CMSIS Examples]

Modules

DMA
SineWave
Speaker
WaveGenerate
Generated on Tue Jun 7 14:59:46 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: DMA

DMA
[DAC]

Defines

#define | DMA_SIZE 1

Functions

void | DMA_IRQHandler (void)
GPDMA interrupt handler sub-routine.
int | c_entry (void)
c_entry: Main DAC program body
int | main (void)
void | check_failed (uint8_t *file, uint32_t line)

Variables

__IO uint32_t | Channel0_TC
__IO uint32_t | Channel0_Err
GPDMA_Channel_CFG_Type GPDMACfg

Define Documentation

#define DMA_SIZE 1

DMA size of transfer

Definition at line 39 of file dac_dma.c.

Function Documentation

int c_entry ( void )

c_entry: Main DAC program body

Parameters:
[in] None
Returns:
int

Definition at line 84 of file dac_dma.c.

void check_failed | ( | uint8_t * | file,
 |  | uint32_t | line
 | ) |  |

Definition at line 192 of file dac_dma.c.

void DMA_IRQHandler ( void )

GPDMA interrupt handler sub-routine.

Parameters:
[in] None
Returns:
None

int main ( void )

Definition at line 179 of file dac_dma.c.

Variable Documentation

__IO uint32_t Channel0_Err

Definition at line 46 of file dac_dma.c.

__IO uint32_t Channel0_TC

Definition at line 43 of file dac_dma.c.

GPDMA_Channel_CFG_Type GPDMACfg

Definition at line 48 of file dac_dma.c.

Generated on Tue Jun 7 14:59:48 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: SineWave

SineWave
[DAC]

Defines

#define | DMA_SIZE 60
#define | NUM_SINE_SAMPLE 60
#define | SINE_FREQ_IN_HZ 60
#define | PCLK_DAC_IN_MHZ 25

Functions

int | c_entry (void)
c_entry: Main DAC program body
int | main (void)
void | check_failed (uint8_t *file, uint32_t line)

Variables

GPDMA_Channel_CFG_Type GPDMACfg

Define Documentation

#define DMA_SIZE 60

DMA size of transfer

Definition at line 39 of file dac_sinewave_test.c.

#define NUM_SINE_SAMPLE 60

Definition at line 40 of file dac_sinewave_test.c.

#define PCLK_DAC_IN_MHZ 25

Definition at line 42 of file dac_sinewave_test.c.

#define SINE_FREQ_IN_HZ 60

Definition at line 41 of file dac_sinewave_test.c.

Function Documentation

int c_entry ( void )

c_entry: Main DAC program body

Parameters:
[in] None
Returns:
int

Definition at line 53 of file dac_sinewave_test.c.

void check_failed | ( | uint8_t * | file,
 |  | uint32_t | line
 | ) |  |

Definition at line 168 of file dac_sinewave_test.c.

int main ( void )

Definition at line 155 of file dac_sinewave_test.c.

Variable Documentation

GPDMA_Channel_CFG_Type GPDMACfg

Definition at line 45 of file dac_sinewave_test.c.

Generated on Tue Jun 7 14:59:48 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Speaker

Speaker
[DAC]

Functions

int | c_entry (void)
c_entry: Main DAC program body
int | main (void)
void | check_failed (uint8_t *file, uint32_t line)

Function Documentation

int c_entry ( void )

c_entry: Main DAC program body

Parameters:
[in] None
Returns:
int

Definition at line 42 of file dac_speaker.c.

void check_failed | ( | uint8_t * | file,
 |  | uint32_t | line
 | ) |  |

Definition at line 101 of file dac_speaker.c.

int main ( void )

Definition at line 88 of file dac_speaker.c.

Generated on Tue Jun 7 14:59:48 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: WaveGenerate

WaveGenerate
[DAC]

Defines

#define | DMA_SIZE_SINE 60
#define | NUM_SAMPLE_SINE 60
#define | DMA_SIZE 64
#define | NUM_SAMPLE 64
#define | SIGNAL_FREQ_IN_HZ 60
#define | PCLK_DAC_IN_MHZ 25
#define | DAC_GENERATE_SINE 1
#define | DAC_GENERATE_TRIANGLE 2
#define | DAC_GENERATE_ESCALATOR 3
#define | DAC_GENERATE_NONE 0

Functions

void | print_menu (void)
Print menu.
int | c_entry (void)
c_entry: Main DAC program body
int | main (void)
void | check_failed (uint8_t *file, uint32_t line)

Variables

uint8_t | menu1 []

Define Documentation

#define DAC_GENERATE_ESCALATOR 3

Definition at line 50 of file dac_wave_generate.c.

#define DAC_GENERATE_NONE 0

Definition at line 51 of file dac_wave_generate.c.

#define DAC_GENERATE_SINE 1

Definition at line 48 of file dac_wave_generate.c.

#define DAC_GENERATE_TRIANGLE 2

Definition at line 49 of file dac_wave_generate.c.

#define DMA_SIZE 64

Definition at line 42 of file dac_wave_generate.c.

#define DMA_SIZE_SINE 60

DMA size of transfer

Definition at line 40 of file dac_wave_generate.c.

#define NUM_SAMPLE 64

Definition at line 43 of file dac_wave_generate.c.

#define NUM_SAMPLE_SINE 60

Definition at line 41 of file dac_wave_generate.c.

#define PCLK_DAC_IN_MHZ 25

Definition at line 46 of file dac_wave_generate.c.

#define SIGNAL_FREQ_IN_HZ 60

Definition at line 45 of file dac_wave_generate.c.

Function Documentation

int c_entry ( void )

c_entry: Main DAC program body

Parameters:
[in] None
Returns:
int

Definition at line 85 of file dac_wave_generate.c.

void check_failed | ( | uint8_t * | file,
 |  | uint32_t | line
 | ) |  |

Definition at line 280 of file dac_wave_generate.c.

int main ( void )

Definition at line 267 of file dac_wave_generate.c.

void print_menu ( void )

Print menu.

Parameters:
[in] None
Returns:
None
Print menu.

Parameters:
[in] none
Returns:
none

Definition at line 209 of file can_test_two_kit.c.

Variable Documentation

uint8_t menu1[]

Initial value:

"********************************************************************************\n\r"
"Hello NXP Semiconductors \n\r"
" DAC generate signals demo \n\r"
"\t - MCU: LPC17xx \n\r"
"\t - Core: ARM Cortex-M3 \n\r"
"\t - Communicate via: UART0 - 115200 kbps \n\r"
" Use DAC to generate sine, triangle, escalator wave, frequency adjustable\n\r"
" Signal samples are transmitted to DAC by DMA memory to peripheral\n\r"
"********************************************************************************\n\r"

Definition at line 54 of file dac_wave_generate.c.

Generated on Tue Jun 7 14:59:48 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: EMAC

EMAC
[LPC1700CMSIS Examples]

Modules

Easy_Web
EmacRaw
uIP
Generated on Tue Jun 7 14:59:46 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Easy_Web

Easy_Web
[EMAC]

Functions

int | main (void)
void | HTTPServer (void)
unsigned int | GetAD7Val (void)
unsigned int | GetTempVal (void)
void | InsertDynamicValues (void)
void | check_failed (uint8_t *file, uint32_t line)

Function Documentation

void check_failed | ( | uint8_t * | file,
 |  | uint32_t | line
 | ) |  |

Definition at line 175 of file easyweb.c.

unsigned int GetAD7Val ( void )

Definition at line 112 of file easyweb.c.

unsigned int GetTempVal ( void )

Definition at line 123 of file easyweb.c.

void HTTPServer ( void )

Definition at line 58 of file easyweb.c.

void InsertDynamicValues ( void )

Definition at line 133 of file easyweb.c.

int main ( void )

Definition at line 34 of file easyweb.c.

Generated on Tue Jun 7 14:59:48 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: EmacRaw

EmacRaw
[EMAC]

Defines

#define | TX_ONLY 0
#define | BOUNCE_RX 1
#define | ENABLE_WOL 1
#define | ENABLE_HASH 1
#define | EMAC_ADDR12 0x0000E386
#define | EMAC_ADDR34 0x00006BDA
#define | EMAC_ADDR56 0x00005000
#define | EMAC_DST_ADDR12 0x0000101F
#define | EMAC_DST_ADDR34 0x0000E012
#define | EMAC_DST_ADDR56 0x00001D0C
#define | PD_LED_PIN (1<<6)
#define | TX_LED_PIN (1<<5)
#define | RX_LED_PIN (1<<4)
#define | KB_LED_PIN (1<<3)
#define | BLINK_LED_PIN (1<<2)
#define | LED2_MASK ((1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6))
#define | LED1_MASK ((1<<28) | (1<<29) | (1<<31))
#define | TX_PACKET_SIZE 114
#define | MYMAC_1 ((EMAC_ADDR12 & 0xFF00) >> 8)
#define | MYMAC_2 ((EMAC_ADDR12 & 0xFF))
#define | MYMAC_3 ((EMAC_ADDR34 & 0xFF00) >> 8)
#define | MYMAC_4 ((EMAC_ADDR34 & 0xFF))
#define | MYMAC_5 ((EMAC_ADDR56 & 0xFF00) >> 8)
#define | MYMAC_6 ((EMAC_ADDR56 & 0xFF))
#define | DB _DBG((uint8_t *)db_)

Functions

uint8_t | __attribute__ ((aligned(4)))
void | ENET_IRQHandler (void)
Ethernet service routine handler.
void | PacketGen (uint8_t *txptr)
Create a perfect packet for TX.
void | LED_Init (void)
Init LEDs.
void | LED_Blink (uint32_t pattern)
LED blink. This is used for WOL test only.
void | Usr_Init_Emac (void)
User EMAC initialize.
int | c_entry (void)
c_entry: Main EMAC program body
int | main (void)
void | check_failed (uint8_t *file, uint32_t line)

Variables

char | db_ [64]
__IO uint32_t | RXOverrunCount = 0
__IO uint32_t | RXErrorCount = 0
__IO uint32_t | TXUnderrunCount = 0
__IO uint32_t | TXErrorCount = 0
__IO uint32_t | RxFinishedCount = 0
__IO uint32_t | TxFinishedCount = 0
__IO uint32_t | TxDoneCount = 0
__IO uint32_t | RxDoneCount = 0
__IO uint32_t | ReceiveLength = 0
__IO Bool | PacketReceived = FALSE
__IO uint32_t | WOLCount = 0

Define Documentation

#define BLINK_LED_PIN (1<<2)

Definition at line 93 of file emactest.c.

#define BOUNCE_RX 1

Definition at line 59 of file emactest.c.

#define DB _DBG((uint8_t *)db_)

Definition at line 109 of file emactest.c.

#define EMAC_ADDR12 0x0000E386

Definition at line 78 of file emactest.c.

#define EMAC_ADDR34 0x00006BDA

Definition at line 79 of file emactest.c.

#define EMAC_ADDR56 0x00005000

Definition at line 80 of file emactest.c.

#define EMAC_DST_ADDR12 0x0000101F

Definition at line 83 of file emactest.c.

#define EMAC_DST_ADDR34 0x0000E012

Definition at line 84 of file emactest.c.

#define EMAC_DST_ADDR56 0x00001D0C

Definition at line 85 of file emactest.c.

#define ENABLE_HASH 1

Definition at line 61 of file emactest.c.

#define ENABLE_WOL 1

Definition at line 60 of file emactest.c.

#define KB_LED_PIN (1<<3)

Definition at line 92 of file emactest.c.

#define LED1_MASK ((1<<28) | (1<<29) | (1<<31))

Definition at line 95 of file emactest.c.

#define LED2_MASK ((1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6))

Definition at line 94 of file emactest.c.

#define MYMAC_1 ((EMAC_ADDR12 & 0xFF00) >> 8)

Definition at line 102 of file emactest.c.

#define MYMAC_2 ((EMAC_ADDR12 & 0xFF))

Definition at line 103 of file emactest.c.

#define MYMAC_3 ((EMAC_ADDR34 & 0xFF00) >> 8)

Definition at line 104 of file emactest.c.

#define MYMAC_4 ((EMAC_ADDR34 & 0xFF))

Definition at line 105 of file emactest.c.

#define MYMAC_5 ((EMAC_ADDR56 & 0xFF00) >> 8)

Definition at line 106 of file emactest.c.

#define MYMAC_6 ((EMAC_ADDR56 & 0xFF))

Definition at line 107 of file emactest.c.

#define PD_LED_PIN (1<<6)

Definition at line 89 of file emactest.c.

#define RX_LED_PIN (1<<4)

Definition at line 91 of file emactest.c.

#define TX_LED_PIN (1<<5)

Definition at line 90 of file emactest.c.

#define TX_ONLY 0

Definition at line 58 of file emactest.c.

#define TX_PACKET_SIZE 114

Definition at line 100 of file emactest.c.

Function Documentation

uint8_t __attribute__ ( (aligned(4)) )

Definition at line 124 of file emactest.c.

int c_entry ( void )

c_entry: Main EMAC program body

Parameters:
[in] None
Returns:
int

Definition at line 576 of file emactest.c.

void check_failed | ( | uint8_t * | file,
 |  | uint32_t | line
 | ) |  |

Definition at line 747 of file emactest.c.

void ENET_IRQHandler ( void )

Ethernet service routine handler.

Parameters:
[in] none
Returns:
none

Definition at line 177 of file emactest.c.

void LED_Blink ( uint32_t pattern )

LED blink. This is used for WOL test only.

Parameters:
[in] none
Returns:
none

Definition at line 415 of file emactest.c.

void LED_Init ( void )

Init LEDs.

Parameters:
[in] none
Returns:
none
Init LEDs.

Initialize LEDs.

Init LEDs.

Parameters:
[in] None
Returns:
None
Parameters:
[in] none
Returns:
none

Definition at line 55 of file tcpip.c.

int main ( void )

Definition at line 733 of file emactest.c.

void PacketGen ( uint8_t * txptr )

Create a perfect packet for TX.

Parameters:
[in] pointer to TX packet
Returns:
none

Definition at line 328 of file emactest.c.

void Usr_Init_Emac ( void )

User EMAC initialize.

Parameters:
[in] none
Returns:
none

Definition at line 501 of file emactest.c.

Variable Documentation

char db_[64]

Definition at line 113 of file emactest.c.

__IO Bool PacketReceived = FALSE

Definition at line 142 of file emactest.c.

__IO uint32_t ReceiveLength = 0

Definition at line 141 of file emactest.c.

__IO uint32_t RxDoneCount = 0

Definition at line 140 of file emactest.c.

__IO uint32_t RXErrorCount = 0

Definition at line 134 of file emactest.c.

__IO uint32_t RxFinishedCount = 0

Definition at line 137 of file emactest.c.

__IO uint32_t RXOverrunCount = 0

Definition at line 133 of file emactest.c.

__IO uint32_t TxDoneCount = 0

Definition at line 139 of file emactest.c.

__IO uint32_t TXErrorCount = 0

Definition at line 136 of file emactest.c.

__IO uint32_t TxFinishedCount = 0

Definition at line 138 of file emactest.c.

__IO uint32_t TXUnderrunCount = 0

Definition at line 135 of file emactest.c.

__IO uint32_t WOLCount = 0

Definition at line 150 of file emactest.c.

Generated on Tue Jun 7 14:59:48 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: uIP

uIP
[EMAC, The uIP TCP/IP stack]

Modules

Clock interface
Protosockets library
Timer library
The uIP TCP/IP stack
Configuration options for uIP
Apps
Pt

Files

file | uip.c

Defines

#define | DB _DBG((uint8_t *)db)
#define | TCP_FIN 0x01
#define | TCP_SYN 0x02
#define | TCP_RST 0x04
#define | TCP_PSH 0x08
#define | TCP_ACK 0x10
#define | TCP_URG 0x20
#define | TCP_CTL 0x3f
#define | TCP_OPT_END 0
#define | TCP_OPT_NOOP 1
#define | TCP_OPT_MSS 2
#define | TCP_OPT_MSS_LEN 4
#define | ICMP_ECHO_REPLY 0
#define | ICMP_ECHO 8
#define | ICMP6_ECHO_REPLY 129
#define | ICMP6_ECHO 128
#define | ICMP6_NEIGHBOR_SOLICITATION 135
#define | ICMP6_NEIGHBOR_ADVERTISEMENT 136
#define | ICMP6_FLAG_S (1 << 6)
#define | ICMP6_OPTION_SOURCE_LINK_ADDRESS 1
#define | ICMP6_OPTION_TARGET_LINK_ADDRESS 2
#define | BUF ((struct uip_tcpip_hdr *)&uip_buf[UIP_LLH_LEN])
#define | FBUF ((struct uip_tcpip_hdr *)&uip_reassbuf[0])
#define | ICMPBUF ((struct uip_icmpip_hdr *)&uip_buf[UIP_LLH_LEN])
#define | UDPBUF ((struct uip_udpip_hdr *)&uip_buf[UIP_LLH_LEN])
#define | UIP_STAT(s)
#define | UIP_LOG(m)

Functions

BOOL_8 | tapdev_init (void)
UNS_32 | tapdev_read (void *pPacket)
BOOL_8 | tapdev_send (void *pPacket, UNS_32 size)
void | uip_setipid (u16_t id)
void | uip_add32 (u8_t *op32, u16_t op16)
u16_t | uip_chksum (u16_t *data, u16_t len)
u16_t | uip_ipchksum (void)
u16_t | uip_tcpchksum (void)
void | uip_init (void)
struct uip_conn * | uip_connect (uip_ipaddr_t *ripaddr, u16_t rport)
void | uip_unlisten (u16_t port)
void | uip_listen (u16_t port)
void | uip_process (u8_t flag)
u16_t | htons (u16_t val)
void | uip_send (const void *data, int len)

Variables

char | db [64]
unsigned short | left
const u8_t * | sendptr
u8_t * readptr
char * | bufptr
u16_t sendlen
u16_t readlen
struct psock_buf | buf
unsigned int | bufsize
unsigned char | state
clock_time_t interval
uip_ipaddr_t uip_hostaddr
uip_ipaddr_t uip_draddr
uip_ipaddr_t uip_netmask
struct uip_eth_addr | uip_ethaddr = {{0,0,0,0,0,0}}
void * | uip_appdata
void * | uip_sappdata
u16_t uip_len
u16_t uip_slen
u8_t uip_flags
struct uip_conn * | uip_conn
struct uip_conn | uip_conns [UIP_CONNS]
u16_t | uip_listenports [UIP_LISTENPORTS]
u8_t | uip_acc32 [4]

Define Documentation

#define BUF ((struct uip_tcpip_hdr *)&uip_buf[UIP_LLH_LEN])

Definition at line 242 of file uip.c.

#define DB _DBG((uint8_t *)db)

Definition at line 18 of file emac.c.

#define FBUF ((struct uip_tcpip_hdr *)&uip_reassbuf[0])

Definition at line 243 of file uip.c.

#define ICMP6_ECHO 128

Definition at line 231 of file uip.c.

#define ICMP6_ECHO_REPLY 129

Definition at line 230 of file uip.c.

#define ICMP6_FLAG_S (1 << 6)

Definition at line 235 of file uip.c.

#define ICMP6_NEIGHBOR_ADVERTISEMENT 136

Definition at line 233 of file uip.c.

#define ICMP6_NEIGHBOR_SOLICITATION 135

Definition at line 232 of file uip.c.

#define ICMP6_OPTION_SOURCE_LINK_ADDRESS 1

Definition at line 237 of file uip.c.

#define ICMP6_OPTION_TARGET_LINK_ADDRESS 2

Definition at line 238 of file uip.c.

#define ICMP_ECHO 8

Definition at line 228 of file uip.c.

#define ICMP_ECHO_REPLY 0

Definition at line 227 of file uip.c.

#define ICMPBUF ((struct uip_icmpip_hdr *)&uip_buf[UIP_LLH_LEN])

Definition at line 244 of file uip.c.

#define TCP_ACK 0x10

Definition at line 217 of file uip.c.

#define TCP_CTL 0x3f

Definition at line 219 of file uip.c.

#define TCP_FIN 0x01

Definition at line 213 of file uip.c.

#define TCP_OPT_END 0

Definition at line 221 of file uip.c.

#define TCP_OPT_MSS 2

Definition at line 223 of file uip.c.

#define TCP_OPT_MSS_LEN 4

Definition at line 225 of file uip.c.

#define TCP_OPT_NOOP 1

Definition at line 222 of file uip.c.

#define TCP_PSH 0x08

Definition at line 216 of file uip.c.

#define TCP_RST 0x04

Definition at line 215 of file uip.c.

#define TCP_SYN 0x02

Definition at line 214 of file uip.c.

#define TCP_URG 0x20

Definition at line 218 of file uip.c.

#define UDPBUF ((struct uip_udpip_hdr *)&uip_buf[UIP_LLH_LEN])

Definition at line 245 of file uip.c.

#define UIP_LOG ( m )

Definition at line 260 of file uip.c.

#define UIP_STAT ( s )

Definition at line 252 of file uip.c.

Function Documentation

u16_t htons ( u16_t val )

Convert 16-bit quantity from host byte order to network byte order.

This function is primarily used for converting variables from host byte order to network byte order. For converting constants to network byte order, use the HTONS() macro instead.

Definition at line 1902 of file uip.c.

BOOL_8 tapdev_init ( void )

Definition at line 22 of file emac.c.

UNS_32 tapdev_read ( void * pPacket )

Definition at line 114 of file emac.c.

BOOL_8 tapdev_send | ( | void * | pPacket,
 |  | UNS_32 | size
 | ) |  |

Definition at line 141 of file emac.c.

void uip_add32 | ( | u8_t * | op32,
 |  | u16_t | op16
 | ) |  |

Carry out a 32-bit addition.

Because not all architectures for which uIP is intended has native 32-bit arithmetic, uIP uses an external C function for doing the required 32-bit additions in the TCP protocol processing. This function should add the two arguments and place the result in the global variable uip_acc32.

Note:
The 32-bit integer pointed to by the op32 parameter and the result in the uip_acc32 variable are in network byte order (big endian).
Parameters:
op32 | A pointer to a 4-byte array representing a 32-bit integer in network byte order (big endian).
op16 | A 16-bit integer in host byte order.

Definition at line 265 of file uip.c.

u16_t uip_chksum | ( | u16_t * | buf,
 |  | u16_t | len
 | ) |  |

Calculate the Internet checksum over a buffer.

The Internet checksum is the one's complement of the one's complement sum of all 16-bit words in the buffer.

See RFC1071.

Parameters:
buf | A pointer to the buffer over which the checksum is to be computed.
len | The length of the buffer over which the checksum is to be computed.
Returns:
The Internet checksum of the buffer.

Definition at line 327 of file uip.c.

struct uip_conn* uip_connect | ( | uip_ipaddr_t * | ripaddr,
 |  | u16_t | port |
 | ) |  |  | [read]

Connect to a remote host using TCP.

This function is used to start a new connection to the specified port on the specied host. It allocates a new connection identifier, sets the connection to the SYN_SENT state and sets the retransmission timer to 0. This will cause a TCP SYN segment to be sent out the next time this connection is periodically processed, which usually is done within 0.5 seconds after the call to uip_connect().

Note:
This function is avaliable only if support for active open has been configured by defining UIP_ACTIVE_OPEN to 1 in uipopt.h.

Since this function requires the port number to be in network byte order, a conversion using HTONS() or htons() is necessary.

 uip_ipaddr_t ipaddr;

 uip_ipaddr(&ipaddr, 192,168,1,2);
 uip_connect(&ipaddr, HTONS(80));

Parameters:
ripaddr | The IP address of the remote hot.
port | A 16-bit port number in network byte order.
Returns:
A pointer to the uIP connection identifier for the new connection, or NULL if no connection could be allocated.

Definition at line 423 of file uip.c.

void uip_init ( void )

uIP initialization function.

This function should be called at boot up to initilize the uIP TCP/IP stack.

Definition at line 395 of file uip.c.

u16_t uip_ipchksum ( void )

Calculate the IP header checksum of the packet header in uip_buf.

The IP header checksum is the Internet checksum of the 20 bytes of the IP header.

Returns:
The IP header checksum of the IP header in the uip_buf buffer.

Definition at line 334 of file uip.c.

void uip_listen ( u16_t port )

Start listening to the specified port.

Note:
Since this function expects the port number in network byte order, a conversion using HTONS() or htons() is necessary.
 uip_listen(HTONS(80));

Parameters:
port A 16-bit port number in network byte order.

Definition at line 545 of file uip.c.

void uip_process ( u8_t flag )

Definition at line 698 of file uip.c.

void uip_send | ( | const void * | data,
 |  | int | len
 | ) |  |

Send data on the current connection.

This function is used to send out a single segment of TCP data. Only applications that have been invoked by uIP for event processing can send data.

The amount of data that actually is sent out after a call to this funcion is determined by the maximum amount of data TCP allows. uIP will automatically crop the data so that only the appropriate amount of data is sent. The function uip_mss() can be used to query uIP for the amount of data that actually will be sent.

Note:
This function does not guarantee that the sent data will arrive at the destination. If the data is lost in the network, the application will be invoked with the uip_rexmit() event being set. The application will then have to resend the data using this function.
Parameters:
data | A pointer to the data which is to be sent.
len | The maximum amount of data bytes to be sent.

Definition at line 1908 of file uip.c.

void uip_setipid ( u16_t id )

uIP initialization function.

This function may be used at boot time to set the initial ip_id.

Definition at line 197 of file uip.c.

u16_t uip_tcpchksum ( void )

Calculate the TCP checksum of the packet in uip_buf and uip_appdata.

The TCP checksum is the Internet checksum of data contents of the TCP segment, and a pseudo-header as defined in RFC793.

Returns:
The TCP checksum of the TCP segment in uip_buf and pointed to by uip_appdata.

Definition at line 380 of file uip.c.

void uip_unlisten ( u16_t port )

Stop listening to the specified port.

Note:
Since this function expects the port number in network byte order, a conversion using HTONS() or htons() is necessary.
 uip_unlisten(HTONS(80));

Parameters:
port A 16-bit port number in network byte order.

Definition at line 534 of file uip.c.

Variable Documentation

struct psock_buf buf [read, inherited]

Definition at line 123 of file psock.h.

char* bufptr [inherited]

Definition at line 117 of file psock.h.

unsigned int bufsize [inherited]

Definition at line 125 of file psock.h.

char db[64]

Definition at line 19 of file emac.c.

clock_time_t interval [inherited]

Definition at line 80 of file timer.h.

unsigned short left [inherited]

Definition at line 101 of file psock.h.

u16_t readlen [inherited]

Definition at line 121 of file psock.h.

u8_t* readptr [inherited]

Definition at line 115 of file psock.h.

u16_t sendlen [inherited]

Definition at line 120 of file psock.h.

const u8_t* sendptr [inherited]

Definition at line 114 of file psock.h.

unsigned char state [inherited]

Definition at line 127 of file psock.h.

u8_t uip_acc32[4]

4-byte array used for the 32-bit sequence number calculations.

Definition at line 208 of file uip.c.

void* uip_appdata

Pointer to the application data in the packet buffer.

This pointer points to the application data when the application is called. If the application wishes to send data, the application may use this space to write the data into before calling uip_send().

Definition at line 159 of file uip.c.

struct uip_conn* uip_conn

Pointer to the current TCP connection.

The uip_conn pointer can be used to access the current TCP connection.

Definition at line 179 of file uip.c.

struct uip_conn uip_conns[UIP_CONNS]

Definition at line 182 of file uip.c.

uip_ipaddr_t uip_draddr

Definition at line 117 of file uip.c.

struct uip_eth_addr uip_ethaddr = {{0,0,0,0,0,0}}

Definition at line 141 of file uip.c.

u8_t uip_flags

Definition at line 176 of file uip.c.

uip_ipaddr_t uip_hostaddr

Definition at line 117 of file uip.c.

u16_t uip_len

The length of the packet in the uip_buf buffer.

The global variable uip_len holds the length of the packet in the uip_buf buffer.

When the network device driver calls the uIP input function, uip_len should be set to the length of the packet in the uip_buf buffer.

When sending packets, the device driver should use the contents of the uip_len variable to determine the length of the outgoing packet.

Definition at line 171 of file uip.c.

u16_t uip_listenports[UIP_LISTENPORTS]

Definition at line 185 of file uip.c.

uip_ipaddr_t uip_netmask

Definition at line 117 of file uip.c.

void* uip_sappdata

Definition at line 161 of file uip.c.

u16_t uip_slen

Definition at line 171 of file uip.c.

Generated on Tue Jun 7 14:59:50 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Clock interface

Clock interface
[uIP]

Defines

#define | CLOCK_SECOND

Functions

void | clock_init (void)
clock_time_t | clock_time (void)

Detailed Description

The clock interface is the interface between the timer library and the platform specific clock functionality. The clock interface must be implemented for each platform that uses the timer library.

The clock interface does only one this: it measures time. The clock interface provides a macro, CLOCK_SECOND, which corresponds to one second of system time.

See also:
Timer library

Define Documentation

#define CLOCK_SECOND

A second, measured in system clock time.

Definition at line 87 of file clock.h.

Function Documentation

void clock_init ( void )

Initialize the clock library.

This function initializes the clock library and should be called from the main() function of the system.

Definition at line 18 of file clock-arch.c.

clock_time_t clock_time ( void )

Get the current clock time.

This function returns the current system clock time.

Returns:
The current clock time, measured in system ticks.

Definition at line 31 of file clock-arch.c.

Generated on Tue Jun 7 14:59:50 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Protosockets library

Protosockets library
[uIP]

Data Structures

struct | psock_buf
struct | psock

Files

file | psock.h

Defines

#define | PSOCK_INIT(psock, buffer, buffersize)
#define | PSOCK_BEGIN(psock)
#define | PSOCK_SEND(psock, data, datalen)
#define | PSOCK_SEND_STR(psock, str)
Send a null-terminated string.
#define | PSOCK_GENERATOR_SEND(psock, generator, arg)
Generate data with a function and send it.
#define | PSOCK_CLOSE(psock)
#define | PSOCK_READBUF(psock)
#define | PSOCK_READTO(psock, c)
#define | PSOCK_DATALEN(psock)
#define | PSOCK_EXIT(psock)
#define | PSOCK_CLOSE_EXIT(psock)
#define | PSOCK_END(psock)
#define | PSOCK_NEWDATA(psock)
#define | PSOCK_WAIT_UNTIL(psock, condition)
#define | PSOCK_WAIT_THREAD(psock, condition) PT_WAIT_THREAD(&((psock)->pt), (condition))

Functions

void | psock_init (struct psock *psock, char *buffer, unsigned int buffersize)
PT_THREAD (psock_send(struct psock *psock, const char *buf, unsigned int len))
PT_THREAD (psock_generator_send(struct psock *psock, unsigned short(*f)(void *), void *arg))
PT_THREAD (psock_readbuf(struct psock *psock))
PT_THREAD (psock_readto(struct psock *psock, unsigned char c))
u16_t | psock_datalen (struct psock *psock)
char | psock_newdata (struct psock *s)

Detailed Description

The protosocket library provides an interface to the uIP stack that is similar to the traditional BSD socket interface. Unlike programs written for the ordinary uIP event-driven interface, programs written with the protosocket library are executed in a sequential fashion and does not have to be implemented as explicit state machines.

Protosockets only work with TCP connections.

The protosocket library uses Pt protothreads to provide sequential control flow. This makes the protosockets lightweight in terms of memory, but also means that protosockets inherits the functional limitations of protothreads. Each protosocket lives only within a single function. Automatic variables (stack variables) are not retained across a protosocket library function call.

Note:
Because the protosocket library uses protothreads, local variables will not always be saved across a call to a protosocket library function. It is therefore advised that local variables are used with extreme care.
The protosocket library provides functions for sending data without having to deal with retransmissions and acknowledgements, as well as functions for reading data without having to deal with data being split across more than one TCP segment.

Because each protosocket runs as a protothread, the protosocket has to be started with a call to PSOCK_BEGIN() at the start of the function in which the protosocket is used. Similarly, the protosocket protothread can be terminated by a call to PSOCK_EXIT().

Define Documentation

#define PSOCK_BEGIN ( psock )

Start the protosocket protothread in a function.

This macro starts the protothread associated with the protosocket and must come before other protosocket calls in the function it is used.

Parameters:
psock (struct psock *) A pointer to the protosocket to be started.

Definition at line 162 of file psock.h.

#define PSOCK_CLOSE ( psock )

Close a protosocket.

This macro closes a protosocket and can only be called from within the protothread in which the protosocket lives.

Parameters:
psock (struct psock *) A pointer to the protosocket that is to be closed.

Definition at line 239 of file psock.h.

#define PSOCK_CLOSE_EXIT ( psock )

Close a protosocket and exit the protosocket's protothread.

This macro closes a protosocket and exits the protosocket's protothread.

Parameters:
psock (struct psock *) A pointer to the protosocket.

Definition at line 312 of file psock.h.

#define PSOCK_DATALEN ( psock )

The length of the data that was previously read.

This macro returns the length of the data that was previously read using PSOCK_READTO() or PSOCK_READ().

Parameters:
psock (struct psock *) A pointer to the protosocket holding the data.

Definition at line 285 of file psock.h.

#define PSOCK_END ( psock )

Declare the end of a protosocket's protothread.

This macro is used for declaring that the protosocket's protothread ends. It must always be used together with a matching PSOCK_BEGIN() macro.

Parameters:
psock (struct psock *) A pointer to the protosocket.

Definition at line 329 of file psock.h.

#define PSOCK_EXIT ( psock )

Exit the protosocket's protothread.

This macro terminates the protothread of the protosocket and should almost always be used in conjunction with PSOCK_CLOSE().

See also:
PSOCK_CLOSE_EXIT()
Parameters:
psock (struct psock *) A pointer to the protosocket.

Definition at line 301 of file psock.h.

#define PSOCK_GENERATOR_SEND | ( | psock,
 |  | generator,
 |  | arg | )

Generate data with a function and send it.

Parameters:
psock | Pointer to the protosocket.
generator | Pointer to the generator function
arg | Argument to the generator function
This function generates data and sends it over the protosocket. This can be used to dynamically generate data for a transmission, instead of generating the data in a buffer beforehand. This function reduces the need for buffer memory. The generator function is implemented by the application, and a pointer to the function is given as an argument with the call to PSOCK_GENERATOR_SEND().

The generator function should place the generated data directly in the uip_appdata buffer, and return the length of the generated data. The generator function is called by the protosocket layer when the data first is sent, and once for every retransmission that is needed.

Definition at line 223 of file psock.h.

#define PSOCK_INIT | ( | psock,
 |  | buffer,
 |  | buffersize | )

Initialize a protosocket.

This macro initializes a protosocket and must be called before the protosocket is used. The initialization also specifies the input buffer for the protosocket.

Parameters:
psock | (struct psock *) A pointer to the protosocket to be initialized
buffer | (char *) A pointer to the input buffer for the protosocket.
buffersize | (unsigned int) The size of the input buffer.

Definition at line 148 of file psock.h.

#define PSOCK_NEWDATA ( psock )

Check if new data has arrived on a protosocket.

This macro is used in conjunction with the PSOCK_WAIT_UNTIL() macro to check if data has arrived on a protosocket.

Parameters:
psock (struct psock *) A pointer to the protosocket.

Definition at line 343 of file psock.h.

#define PSOCK_READBUF ( psock )

Read data until the buffer is full.

This macro will block waiting for data and read the data into the input buffer specified with the call to PSOCK_INIT(). Data is read until the buffer is full..

Parameters:
psock (struct psock *) A pointer to the protosocket from which data should be read.

Definition at line 254 of file psock.h.

#define PSOCK_READTO | ( | psock,
 |  | c | )

Read data up to a specified character.

This macro will block waiting for data and read the data into the input buffer specified with the call to PSOCK_INIT(). Data is only read until the specifieed character appears in the data stream.

Parameters:
psock | (struct psock *) A pointer to the protosocket from which data should be read.
c | (char) The character at which to stop reading.

Definition at line 272 of file psock.h.

#define PSOCK_SEND | ( | psock,
 |  | data,
 |  | datalen | )

Send data.

This macro sends data over a protosocket. The protosocket protothread blocks until all data has been sent and is known to have been received by the remote end of the TCP connection.

Parameters:
psock | (struct psock *) A pointer to the protosocket over which data is to be sent.
data | (char *) A pointer to the data that is to be sent.
datalen | (unsigned int) The length of the data that is to be sent.

Definition at line 182 of file psock.h.

#define PSOCK_SEND_STR | ( | psock,
 |  | str | )

Send a null-terminated string.

Parameters:
psock | Pointer to the protosocket.
str | The string to be sent.
This function sends a null-terminated string over the protosocket.

Definition at line 195 of file psock.h.

#define PSOCK_WAIT_THREAD | ( | psock,
 |  | condition | ) | PT_WAIT_THREAD(&((psock)->pt), (condition))

Definition at line 379 of file psock.h.

#define PSOCK_WAIT_UNTIL | ( | psock,
 |  | condition | )

Wait until a condition is true.

This macro blocks the protothread until the specified condition is true. The macro PSOCK_NEWDATA() can be used to check if new data arrives when the protosocket is waiting.

Typically, this macro is used as follows:

 PT_THREAD(thread(struct psock *s, struct timer *t))
 {
   PSOCK_BEGIN(s);

   PSOCK_WAIT_UNTIL(s, PSOCK_NEWADATA(s) || timer_expired(t));

   if(PSOCK_NEWDATA(s)) {
     PSOCK_READTO(s, '\n');
   } else {
     handle_timed_out(s);
   }

   PSOCK_END(s);
 }

Parameters:
psock | (struct psock *) A pointer to the protosocket.
condition | The condition to wait for.

Definition at line 376 of file psock.h.

Function Documentation

u16_t psock_datalen ( struct psock * psock )

Definition at line 248 of file psock.c.

void psock_init | ( | struct psock * | psock,
 |  | char * | buffer,
 |  | unsigned int | buffersize
 | ) |  |

char psock_newdata ( struct psock * s )

Definition at line 254 of file psock.c.

PT_THREAD ( psock_readto(struct psock *psock, unsigned char c) )

PT_THREAD ( psock_readbuf(struct psock *psock) )

PT_THREAD ( psock_generator_send(struct psock *psock, unsigned short(*f)(void *), void *arg) )

PT_THREAD ( psock_send(struct psock *psock, const char *buf, unsigned int len) )

Generated on Tue Jun 7 14:59:50 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Timer library

Timer library
[uIP]

Data Structures

struct | timer

Files

file | timer.c
file | timer.h

Functions

void | timer_set (struct timer *t, clock_time_t interval)
void | timer_reset (struct timer *t)
void | timer_restart (struct timer *t)
int | timer_expired (struct timer *t)

Detailed Description

The timer library provides functions for setting, resetting and restarting timers, and for checking if a timer has expired. An application must "manually" check if its timers have expired; this is not done automatically.

A timer is declared as a struct timer and all access to the timer is made by a pointer to the declared timer.

Note:
The timer library uses the Clock library to measure time. Intervals should be specified in the format used by the clock library.

Function Documentation

int timer_expired ( struct timer * t )

Check if a timer has expired.

This function tests if a timer has expired and returns true or false depending on its status.

Parameters:
t A pointer to the timer
Returns:
Non-zero if the timer has expired, zero otherwise.

Definition at line 121 of file timer.c.

void timer_reset ( struct timer * t )

Reset the timer with the same interval.

This function resets the timer with the same interval that was given to the timer_set() function. The start point of the interval is the exact time that the timer last expired. Therefore, this function will cause the timer to be stable over time, unlike the timer_rester() function.

Parameters:
t A pointer to the timer.
See also:
timer_restart()

Definition at line 84 of file timer.c.

void timer_restart ( struct timer * t )

Restart the timer from the current point in time

This function restarts a timer with the same interval that was given to the timer_set() function. The timer will start at the current time.

Note:
A periodic timer will drift if this function is used to reset it. For preioric timers, use the timer_reset() function instead.
Parameters:
t A pointer to the timer.
See also:
timer_reset()

Definition at line 104 of file timer.c.

void timer_set | ( | struct timer * | t,
 |  | clock_time_t | interval
 | ) |  |

Set a timer.

This function is used to set a timer for a time sometime in the future. The function timer_expired() will evaluate to true after the timer has expired.

Parameters:
t | A pointer to the timer
interval | The interval before the timer expires.

Definition at line 64 of file timer.c.

Generated on Tue Jun 7 14:59:50 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: The uIP TCP/IP stack

The uIP TCP/IP stack
[uIP]

Data Structures

struct | uip_conn
struct | uip_stats
struct | uip_tcpip_hdr
struct | uip_icmpip_hdr
struct | uip_udpip_hdr
struct | uip_eth_addr

Modules

uIP packet forwarding
uIP TCP throughput booster hack
uIP configuration functions
uIP initialization functions
uIP device driver functions
uIP application functions
uIP conversion functions
Variables used in uIP device drivers
uIP Address Resolution Protocol
uIP
Architecture specific uIP functions

Files

file | uip.h

Defines

#define | UIP_ACKDATA 1
#define | UIP_NEWDATA 2
#define | UIP_REXMIT 4
#define | UIP_POLL 8
#define | UIP_CLOSE 16
#define | UIP_ABORT 32
#define | UIP_CONNECTED 64
#define | UIP_TIMEDOUT 128
#define | UIP_DATA 1
#define | UIP_TIMER 2
#define | UIP_POLL_REQUEST 3
#define | UIP_UDP_SEND_CONN 4
#define | UIP_CLOSED 0
#define | UIP_SYN_RCVD 1
#define | UIP_SYN_SENT 2
#define | UIP_ESTABLISHED 3
#define | UIP_FIN_WAIT_1 4
#define | UIP_FIN_WAIT_2 5
#define | UIP_CLOSING 6
#define | UIP_TIME_WAIT 7
#define | UIP_LAST_ACK 8
#define | UIP_TS_MASK 15
#define | UIP_STOPPED 16
#define | UIP_APPDATA_SIZE
#define | UIP_PROTO_ICMP 1
#define | UIP_PROTO_TCP 6
#define | UIP_PROTO_UDP 17
#define | UIP_PROTO_ICMP6 58
#define | UIP_IPH_LEN 20
#define | UIP_UDPH_LEN 8
#define | UIP_TCPH_LEN 20
#define | UIP_IPUDPH_LEN (UIP_UDPH_LEN + UIP_IPH_LEN)
#define | UIP_IPTCPH_LEN (UIP_TCPH_LEN + UIP_IPH_LEN)
#define | UIP_TCPIP_HLEN UIP_IPTCPH_LEN

Typedefs

typedef u16_t | uip_ip4addr_t [2]
typedef u16_t | uip_ip6addr_t [8]
typedef uip_ip4addr_t | uip_ipaddr_t

Functions

void | uip_process (u8_t flag)
u16_t | uip_chksum (u16_t *buf, u16_t len)
u16_t | uip_ipchksum (void)
u16_t | uip_tcpchksum (void)
u16_t | uip_udpchksum (void)

Variables

void * | uip_appdata
struct uip_conn * | uip_conn
struct uip_conn | uip_conns [UIP_CONNS]
struct uip_stats | uip_stat
u8_t uip_flags
uip_ipaddr_t uip_hostaddr
uip_ipaddr_t uip_netmask
uip_ipaddr_t uip_draddr

Detailed Description

uIP is an implementation of the TCP/IP protocol stack intended for small 8-bit and 16-bit microcontrollers.

uIP provides the necessary protocols for Internet communication, with a very small code footprint and RAM requirements - the uIP code size is on the order of a few kilobytes and RAM usage is on the order of a few hundred bytes.

{@

Define Documentation

#define UIP_ABORT 32

Definition at line 1334 of file uip.h.

#define UIP_ACKDATA 1

Definition at line 1318 of file uip.h.

#define UIP_APPDATA_SIZE

The buffer size available for user data in the uip_buf buffer.

This macro holds the available size for user data in the uip_buf buffer. The macro is intended to be used for checking bounds of available user data.

Example:

 snprintf(uip_appdata, UIP_APPDATA_SIZE, "%u\n", i);

Definition at line 1553 of file uip.h.

#define UIP_CLOSE 16

Definition at line 1329 of file uip.h.

#define UIP_CLOSED 0

Definition at line 1376 of file uip.h.

#define UIP_CLOSING 6

Definition at line 1382 of file uip.h.

#define UIP_CONNECTED 64

Definition at line 1339 of file uip.h.

#define UIP_DATA 1

Definition at line 1360 of file uip.h.

#define UIP_ESTABLISHED 3

Definition at line 1379 of file uip.h.

#define UIP_FIN_WAIT_1 4

Definition at line 1380 of file uip.h.

#define UIP_FIN_WAIT_2 5

Definition at line 1381 of file uip.h.

#define UIP_IPH_LEN 20

Definition at line 1565 of file uip.h.

#define UIP_IPTCPH_LEN (UIP_TCPH_LEN + UIP_IPH_LEN)

Definition at line 1572 of file uip.h.

#define UIP_IPUDPH_LEN (UIP_UDPH_LEN + UIP_IPH_LEN)

Definition at line 1569 of file uip.h.

#define UIP_LAST_ACK 8

Definition at line 1384 of file uip.h.

#define UIP_NEWDATA 2

Definition at line 1322 of file uip.h.

#define UIP_POLL 8

Definition at line 1326 of file uip.h.

#define UIP_POLL_REQUEST 3

Definition at line 1366 of file uip.h.

#define UIP_PROTO_ICMP 1

Definition at line 1556 of file uip.h.

#define UIP_PROTO_ICMP6 58

Definition at line 1559 of file uip.h.

#define UIP_PROTO_TCP 6

Definition at line 1557 of file uip.h.

#define UIP_PROTO_UDP 17

Definition at line 1558 of file uip.h.

#define UIP_REXMIT 4

Definition at line 1324 of file uip.h.

#define UIP_STOPPED 16

Definition at line 1387 of file uip.h.

#define UIP_SYN_RCVD 1

Definition at line 1377 of file uip.h.

#define UIP_SYN_SENT 2

Definition at line 1378 of file uip.h.

#define UIP_TCPH_LEN 20

Definition at line 1568 of file uip.h.

#define UIP_TCPIP_HLEN UIP_IPTCPH_LEN

Definition at line 1575 of file uip.h.

#define UIP_TIME_WAIT 7

Definition at line 1383 of file uip.h.

#define UIP_TIMEDOUT 128

Definition at line 1344 of file uip.h.

#define UIP_TIMER 2

Definition at line 1364 of file uip.h.

#define UIP_TS_MASK 15

Definition at line 1385 of file uip.h.

#define UIP_UDP_SEND_CONN 4

Definition at line 1368 of file uip.h.

#define UIP_UDPH_LEN 8

Definition at line 1567 of file uip.h.

Typedef Documentation

typedef u16_t uip_ip4addr_t[2]

Repressentation of an IP address.

Definition at line 62 of file uip.h.

typedef u16_t uip_ip6addr_t[8]

Definition at line 63 of file uip.h.

typedef uip_ip4addr_t uip_ipaddr_t

Definition at line 67 of file uip.h.

Function Documentation

u16_t uip_chksum | ( | u16_t * | buf,
 |  | u16_t | len
 | ) |  |

Calculate the Internet checksum over a buffer.

The Internet checksum is the one's complement of the one's complement sum of all 16-bit words in the buffer.

See RFC1071.

Parameters:
buf | A pointer to the buffer over which the checksum is to be computed.
len | The length of the buffer over which the checksum is to be computed.
Returns:
The Internet checksum of the buffer.

Definition at line 327 of file uip.c.

u16_t uip_ipchksum ( void )

Calculate the IP header checksum of the packet header in uip_buf.

The IP header checksum is the Internet checksum of the 20 bytes of the IP header.

Returns:
The IP header checksum of the IP header in the uip_buf buffer.

Definition at line 334 of file uip.c.

void uip_process ( u8_t flag )

Definition at line 698 of file uip.c.

u16_t uip_tcpchksum ( void )

Calculate the TCP checksum of the packet in uip_buf and uip_appdata.

The TCP checksum is the Internet checksum of data contents of the TCP segment, and a pseudo-header as defined in RFC793.

Returns:
The TCP checksum of the TCP segment in uip_buf and pointed to by uip_appdata.

Definition at line 380 of file uip.c.

u16_t uip_udpchksum ( void )

Calculate the UDP checksum of the packet in uip_buf and uip_appdata.

The UDP checksum is the Internet checksum of data contents of the UDP segment, and a pseudo-header as defined in RFC768.

Returns:
The UDP checksum of the UDP segment in uip_buf and pointed to by uip_appdata.

Variable Documentation

void* uip_appdata

Pointer to the application data in the packet buffer.

This pointer points to the application data when the application is called. If the application wishes to send data, the application may use this space to write the data into before calling uip_send().

Definition at line 159 of file uip.c.

struct uip_conn* uip_conn

Pointer to the current TCP connection.

The uip_conn pointer can be used to access the current TCP connection.

Definition at line 179 of file uip.c.

struct uip_conn uip_conns[UIP_CONNS]

Definition at line 182 of file uip.c.

uip_ipaddr_t uip_draddr

Definition at line 117 of file uip.c.

u8_t uip_flags

Definition at line 176 of file uip.c.

uip_ipaddr_t uip_hostaddr

Definition at line 117 of file uip.c.

uip_ipaddr_t uip_netmask

Definition at line 117 of file uip.c.

struct uip_stats uip_stat

The uIP TCP/IP statistics.

This is the variable in which the uIP TCP/IP statistics are gathered.

Generated on Tue Jun 7 14:59:51 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: uIP packet forwarding

uIP packet forwarding
[The uIP TCP/IP stack]

Data Structures

struct | tcpip_hdr
struct | icmpip_hdr
struct | fwcache_entry
struct | uip_fw_netif

Files

file | uip-fw.c
file | uip-fw.h

Defines

#define | ICMP_ECHO 8
#define | ICMP_TE 11
#define | BUF ((struct tcpip_hdr *)&uip_buf[UIP_LLH_LEN])
#define | ICMPBUF ((struct icmpip_hdr *)&uip_buf[UIP_LLH_LEN])
#define | FWCACHE_SIZE 2
#define | FW_TIME 20
#define | UIP_FW_NETIF(ip1, ip2, ip3, ip4, nm1, nm2, nm3, nm4, outputfunc)
#define | uip_fw_setipaddr(netif, addr)
#define | uip_fw_setnetmask(netif, addr)
#define | UIP_FW_LOCAL
#define | UIP_FW_OK
#define | UIP_FW_FORWARDED
#define | UIP_FW_ZEROLEN
#define | UIP_FW_TOOLARGE
#define | UIP_FW_NOROUTE
#define | UIP_FW_DROPPED

Functions

void | uip_fw_init (void)
u8_t | uip_fw_output (void)
u8_t | uip_fw_forward (void)
void | uip_fw_register (struct uip_fw_netif *netif)
void | uip_fw_default (struct uip_fw_netif *netif)
void | uip_fw_periodic (void)

Variables

u16_t len
u16_t ipid
u16_t ipoffset
u8_t ttl
u8_t proto
u16_t ipchksum
u16_t | srcipaddr [2]
u16_t | destipaddr [2]
u16_t srcport
u16_t destport
u8_t | seqno [4]
u8_t | ackno [4]
u8_t tcpoffset
u8_t flags
u8_t | wnd [2]
u16_t tcpchksum
u8_t | urgp [2]
u8_t | optdata [4]
u16_t ipchksum
u16_t | srcipaddr [2]
u16_t | destipaddr [2]
u8_t type
u8_t icode
u16_t icmpchksum
u16_t id
u16_t seqno
u8_t | payload [1]
u16_t | srcipaddr [2]
u16_t | destipaddr [2]
u16_t ipid
u8_t proto
u8_t unused

Define Documentation

#define BUF ((struct tcpip_hdr *)&uip_buf[UIP_LLH_LEN])

Definition at line 126 of file uip-fw.c.

#define FW_TIME 20

Definition at line 175 of file uip-fw.c.

#define FWCACHE_SIZE 2

Definition at line 161 of file uip-fw.c.

#define ICMP_ECHO 8

Definition at line 118 of file uip-fw.c.

#define ICMP_TE 11

Definition at line 121 of file uip-fw.c.

#define ICMPBUF ((struct icmpip_hdr *)&uip_buf[UIP_LLH_LEN])

Definition at line 131 of file uip-fw.c.

#define UIP_FW_DROPPED

An error message that indicates that a packet that should be forwarded or output was dropped.

Definition at line 171 of file uip-fw.h.

#define UIP_FW_FORWARDED

A non-error message that indicates that a packet was forwarded.

Definition at line 139 of file uip-fw.h.

#define UIP_FW_LOCAL

A non-error message that indicates that a packet should be processed locally.

Definition at line 125 of file uip-fw.h.

#define UIP_FW_NETIF | ( | ip1,
 |  | ip2,
 |  | ip3,
 |  | ip4,
 |  | nm1,
 |  | nm2,
 |  | nm3,
 |  | nm4,
 |  | outputfunc | )

Intantiating macro for a uIP network interface.

Example:

 struct uip_fw_netif slipnetif =
   {UIP_FW_NETIF(192,168,76,1, 255,255,255,0, slip_output)};
Parameters:
ip1,ip2,ip3,ip4 | The IP address of the network interface.
nm1,nm2,nm3,nm4 | The netmask of the network interface.
outputfunc | A pointer to the output function of the network interface.

Definition at line 80 of file uip-fw.h.

#define UIP_FW_NOROUTE

An error message that indicates that no suitable interface could be found for an outbound packet.

Definition at line 163 of file uip-fw.h.

#define UIP_FW_OK

A non-error message that indicates that something went OK.

Definition at line 132 of file uip-fw.h.

#define uip_fw_setipaddr | ( | netif,
 |  | addr | )

Set the IP address of a network interface.

Parameters:
netif | A pointer to the uip_fw_netif structure for the network interface.
addr | A pointer to an IP address.

Definition at line 95 of file uip-fw.h.

#define uip_fw_setnetmask | ( | netif,
 |  | addr | )

Set the netmask of a network interface.

Parameters:
netif | A pointer to the uip_fw_netif structure for the network interface.
addr | A pointer to an IP address representing the netmask.

Definition at line 107 of file uip-fw.h.

#define UIP_FW_TOOLARGE

An error message that indicates that a packet that was too large for the outbound network interface was detected.

Definition at line 155 of file uip-fw.h.

#define UIP_FW_ZEROLEN

A non-error message that indicates that a zero-length packet transmission was attempted, and that no packet was sent.

Definition at line 147 of file uip-fw.h.

Function Documentation

void uip_fw_default ( struct uip_fw_netif * netif )

Register a default network interface.

All packets that don't go out on any of the other interfaces will be routed to the default interface.

Parameters:
netif A pointer to the network interface that is to be registered.

Definition at line 513 of file uip-fw.c.

u8_t uip_fw_forward ( void )

Forward an IP packet in the uip_buf buffer.

Returns:
UIP_FW_FORWARDED if the packet was forwarded, UIP_FW_LOCAL if the packet should be processed locally.

Definition at line 406 of file uip-fw.c.

void uip_fw_init ( void )

Initialize the uIP packet forwarding module.

Definition at line 183 of file uip-fw.c.

u8_t uip_fw_output ( void )

Output an IP packet on the correct network interface.

The IP packet should be present in the uip_buf buffer and its length in the global uip_len variable.

Return values:
UIP_FW_ZEROLEN | Indicates that a zero-length packet transmission was attempted and that no packet was sent.
UIP_FW_NOROUTE | No suitable network interface could be found for the outbound packet, and the packet was not sent.
Returns:
The return value from the actual network interface output function is passed unmodified as a return value.

Definition at line 358 of file uip-fw.c.

void uip_fw_periodic ( void )

Perform periodic processing.

Definition at line 523 of file uip-fw.c.

void uip_fw_register ( struct uip_fw_netif * netif )

Register a network interface with the forwarding module.

Parameters:
netif A pointer to the network interface that is to be registered.

Definition at line 496 of file uip-fw.c.

Variable Documentation

u8_t ackno[4] [inherited]

Definition at line 88 of file uip-fw.c.

u16_t destipaddr[2] [inherited]

Definition at line 141 of file uip-fw.c.

u16_t destipaddr[2] [inherited]

Definition at line 108 of file uip-fw.c.

u16_t destipaddr[2] [inherited]

Definition at line 82 of file uip-fw.c.

u16_t destport [inherited]

Definition at line 86 of file uip-fw.c.

u8_t flags [inherited]

Definition at line 88 of file uip-fw.c.

u16_t icmpchksum [inherited]

Definition at line 112 of file uip-fw.c.

u8_t icode [inherited]

Definition at line 111 of file uip-fw.c.

u16_t id [inherited]

Definition at line 113 of file uip-fw.c.

u16_t ipchksum [inherited]

Definition at line 107 of file uip-fw.c.

u16_t ipchksum [inherited]

Definition at line 81 of file uip-fw.c.

u16_t ipid [inherited]

Definition at line 142 of file uip-fw.c.

u16_t ipid [inherited]

Definition at line 76 of file uip-fw.c.

u16_t ipoffset [inherited]

Definition at line 76 of file uip-fw.c.

u16_t len [inherited]

Definition at line 76 of file uip-fw.c.

u8_t optdata[4] [inherited]

Definition at line 95 of file uip-fw.c.

u8_t payload[1] [inherited]

Definition at line 114 of file uip-fw.c.

u8_t proto [inherited]

Definition at line 143 of file uip-fw.c.

u8_t proto [inherited]

Definition at line 79 of file uip-fw.c.

u16_t seqno [inherited]

Definition at line 113 of file uip-fw.c.

u8_t seqno[4] [inherited]

Definition at line 88 of file uip-fw.c.

u16_t srcipaddr[2] [inherited]

Definition at line 140 of file uip-fw.c.

u16_t srcipaddr[2] [inherited]

Definition at line 108 of file uip-fw.c.

u16_t srcipaddr[2] [inherited]

Definition at line 82 of file uip-fw.c.

u16_t srcport [inherited]

Definition at line 86 of file uip-fw.c.

u16_t tcpchksum [inherited]

Definition at line 93 of file uip-fw.c.

u8_t tcpoffset [inherited]

Definition at line 88 of file uip-fw.c.

u8_t ttl [inherited]

Definition at line 79 of file uip-fw.c.

u8_t type [inherited]

Definition at line 111 of file uip-fw.c.

u8_t unused [inherited]

Definition at line 144 of file uip-fw.c.

u8_t urgp[2] [inherited]

Definition at line 94 of file uip-fw.c.

u8_t wnd[2] [inherited]

Definition at line 88 of file uip-fw.c.

Generated on Tue Jun 7 14:59:50 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: uIP TCP throughput booster hack

uIP TCP throughput booster hack
[The uIP TCP/IP stack]

Files

file | uip-split.h

Functions

void | uip_split_output (void)

Detailed Description

The basic uIP TCP implementation only allows each TCP connection to have a single TCP segment in flight at any given time. Because of the delayed ACK algorithm employed by most TCP receivers, uIP's limit on the amount of in-flight TCP segments seriously reduces the maximum achievable throughput for sending data from uIP.

The uip-split module is a hack which tries to remedy this situation. By splitting maximum sized outgoing TCP segments into two, the delayed ACK algorithm is not invoked at TCP receivers. This improves the throughput when sending data from uIP by orders of magnitude.

The uip-split module uses the uip-fw module (uIP IP packet forwarding) for sending packets. Therefore, the uip-fw module must be set up with the appropriate network interfaces for this module to work.

Function Documentation

void uip_split_output ( void )

Handle outgoing packets.

This function inspects an outgoing packet in the uip_buf buffer and sends it out using the uip_fw_output() function. If the packet is a full-sized TCP segment it will be split into two segments and transmitted separately. This function should be called instead of the actual device driver output function, or the uip_fw_output() function.

The headers of the outgoing packet is assumed to be in the uip_buf buffer and the payload is assumed to be wherever uip_appdata points. The length of the outgoing packet is assumed to be in the uip_len variable.

Definition at line 49 of file uip-split.c.

Generated on Tue Jun 7 14:59:50 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: uIP configuration functions

uIP configuration functions
[The uIP TCP/IP stack]

Defines

#define | uip_sethostaddr(addr)
#define | uip_gethostaddr(addr)
#define | uip_setdraddr(addr)
#define | uip_setnetmask(addr)
#define | uip_getdraddr(addr)
#define | uip_getnetmask(addr)
#define | uip_setethaddr(eaddr)

Detailed Description

The uIP configuration functions are used for setting run-time parameters in uIP such as IP addresses.

Define Documentation

#define uip_getdraddr ( addr )

Get the default router's IP address.

Parameters:
addr A pointer to a uip_ipaddr_t variable that will be filled in with the IP address of the default router.

Definition at line 161 of file uip.h.

#define uip_gethostaddr ( addr )

Get the IP address of this host.

The IP address is represented as a 4-byte array where the first octet of the IP address is put in the first member of the 4-byte array.

Example:

 uip_ipaddr_t hostaddr;

 uip_gethostaddr(&hostaddr);
Parameters:
addr A pointer to a uip_ipaddr_t variable that will be filled in with the currently configured IP address.

Definition at line 126 of file uip.h.

#define uip_getnetmask ( addr )

Get the netmask.

Parameters:
addr A pointer to a uip_ipaddr_t variable that will be filled in with the value of the netmask.

Definition at line 171 of file uip.h.

#define uip_setdraddr ( addr )

Set the default router's IP address.

Parameters:
addr A pointer to a uip_ipaddr_t variable containing the IP address of the default router.
See also:
uip_ipaddr()

Definition at line 138 of file uip.h.

#define uip_setethaddr ( eaddr )

Specifiy the Ethernet MAC address.

The ARP code needs to know the MAC address of the Ethernet card in order to be able to respond to ARP queries and to generate working Ethernet headers.

Note:
This macro only specifies the Ethernet MAC address to the ARP code. It cannot be used to change the MAC address of the Ethernet card.
Parameters:
eaddr A pointer to a struct uip_eth_addr containing the Ethernet MAC address of the Ethernet card.

Definition at line 147 of file uip_arp.h.

#define uip_sethostaddr ( addr )

Set the IP address of this host.

The IP address is represented as a 4-byte array where the first octet of the IP address is put in the first member of the 4-byte array.

Example:

 uip_ipaddr_t addr;

 uip_ipaddr(&addr, 192,168,1,2);
 uip_sethostaddr(&addr);
Parameters:
addr A pointer to an IP address of type uip_ipaddr_t;
See also:
uip_ipaddr()

Definition at line 106 of file uip.h.

#define uip_setnetmask ( addr )

Set the netmask.

Parameters:
addr A pointer to a uip_ipaddr_t variable containing the IP address of the netmask.
See also:
uip_ipaddr()

Definition at line 150 of file uip.h.

Generated on Tue Jun 7 14:59:51 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: uIP initialization functions

uIP initialization functions
[The uIP TCP/IP stack]

Functions

void | uip_init (void)
void | uip_setipid (u16_t id)

Detailed Description

The uIP initialization functions are used for booting uIP.

Function Documentation

void uip_init ( void )

uIP initialization function.

This function should be called at boot up to initilize the uIP TCP/IP stack.

Definition at line 395 of file uip.c.

void uip_setipid ( u16_t id )

uIP initialization function.

This function may be used at boot time to set the initial ip_id.

Definition at line 197 of file uip.c.

Generated on Tue Jun 7 14:59:51 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: uIP device driver functions

uIP device driver functions
[The uIP TCP/IP stack]

Defines

#define | uip_input()
#define | uip_periodic(conn)
#define | uip_conn_active(conn) (uip_conns[conn].tcpstateflags != UIP_CLOSED)
#define | uip_periodic_conn(conn)
#define | uip_poll_conn(conn)

Variables

u8_t | uip_buf [UIP_BUFSIZE+2]

Detailed Description

These functions are used by a network device driver for interacting with uIP.

Define Documentation

#define uip_conn_active ( conn ) (uip_conns[conn].tcpstateflags != UIP_CLOSED)

Definition at line 308 of file uip.h.

#define uip_input ( )

Process an incoming packet.

This function should be called when the device driver has received a packet from the network. The packet from the device driver must be present in the uip_buf buffer, and the length of the packet should be placed in the uip_len variable.

When the function returns, there may be an outbound packet placed in the uip_buf packet buffer. If so, the uip_len variable is set to the length of the packet. If no packet is to be sent out, the uip_len variable is set to 0.

The usual way of calling the function is presented by the source code below.

  uip_len = devicedriver_poll();
  if(uip_len > 0) {
    uip_input();
    if(uip_len > 0) {
      devicedriver_send();
    }
  }

Note:
If you are writing a uIP device driver that needs ARP (Address Resolution Protocol), e.g., when running uIP over Ethernet, you will need to call the uIP ARP code before calling this function:
  #define BUF ((struct uip_eth_hdr *)&uip_buf[0])
  uip_len = ethernet_devicedrver_poll();
  if(uip_len > 0) {
    if(BUF->type == HTONS(UIP_ETHTYPE_IP)) {
      uip_arp_ipin();
      uip_input();
      if(uip_len > 0) {
        uip_arp_out();
        ethernet_devicedriver_send();
      }
    } else if(BUF->type == HTONS(UIP_ETHTYPE_ARP)) {
      uip_arp_arpin();
      if(uip_len > 0) {
        ethernet_devicedriver_send();
      }
    }

Definition at line 257 of file uip.h.

#define uip_periodic ( conn )

Periodic processing for a connection identified by its number.

This function does the necessary periodic processing (timers, polling) for a uIP TCP conneciton, and should be called when the periodic uIP timer goes off. It should be called for every connection, regardless of whether they are open of closed.

When the function returns, it may have an outbound packet waiting for service in the uIP packet buffer, and if so the uip_len variable is set to a value larger than zero. The device driver should be called to send out the packet.

The ususal way of calling the function is through a for() loop like this:

  for(i = 0; i < UIP_CONNS; ++i) {
    uip_periodic(i);
    if(uip_len > 0) {
      devicedriver_send();
    }
  }

Note:
If you are writing a uIP device driver that needs ARP (Address Resolution Protocol), e.g., when running uIP over Ethernet, you will need to call the uip_arp_out() function before calling the device driver:
  for(i = 0; i < UIP_CONNS; ++i) {
    uip_periodic(i);
    if(uip_len > 0) {
      uip_arp_out();
      ethernet_devicedriver_send();
    }
  }
Parameters:
conn The number of the connection which is to be periodically polled.

Definition at line 301 of file uip.h.

#define uip_periodic_conn ( conn )

Perform periodic processing for a connection identified by a pointer to its structure.

Same as uip_periodic() but takes a pointer to the actual uip_conn struct instead of an integer as its argument. This function can be used to force periodic processing of a specific connection.

Parameters:
conn A pointer to the uip_conn struct for the connection to be processed.

Definition at line 323 of file uip.h.

#define uip_poll_conn ( conn )

Reuqest that a particular connection should be polled.

Similar to uip_periodic_conn() but does not perform any timer processing. The application is polled for new data.

Parameters:
conn A pointer to the uip_conn struct for the connection to be processed.

Definition at line 337 of file uip.h.

Variable Documentation

u8_t uip_buf[UIP_BUFSIZE+2]

The uIP packet buffer.

The uip_buf array is used to hold incoming and outgoing packets. The device driver should place incoming data into this buffer. When sending data, the device driver should read the link level headers and the TCP/IP headers from this buffer. The size of the link level headers is configured by the UIP_LLH_LEN define.

Note:
The application data need not be placed in this buffer, so the device driver must read it from the place pointed to by the uip_appdata pointer as illustrated by the following example:
 void
 devicedriver_send(void)
 {
    hwsend(&uip_buf[0], UIP_LLH_LEN);
    if(uip_len <= UIP_LLH_LEN + UIP_TCPIP_HLEN) {
      hwsend(&uip_buf[UIP_LLH_LEN], uip_len - UIP_LLH_LEN);
    } else {
      hwsend(&uip_buf[UIP_LLH_LEN], UIP_TCPIP_HLEN);
      hwsend(uip_appdata, uip_len - UIP_TCPIP_HLEN - UIP_LLH_LEN);
    }
 }

Generated on Tue Jun 7 14:59:51 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: uIP application functions

uIP application functions
[The uIP TCP/IP stack]

Defines

#define | uip_outstanding(conn) ((conn)->len)
#define | uip_datalen()
#define | uip_urgdatalen()
#define | uip_close()
#define | uip_abort()
#define | uip_stop()
#define | uip_stopped(conn)
#define | uip_restart()
#define | uip_udpconnection()
#define | uip_newdata()
#define | uip_acked()
#define | uip_connected()
#define | uip_closed()
#define | uip_aborted()
#define | uip_timedout()
#define | uip_rexmit()
#define | uip_poll()
#define | uip_initialmss()
#define | uip_mss()
#define | uip_udp_remove(conn)
#define | uip_udp_bind(conn, port)
#define | uip_udp_send(len)

Functions

void | uip_listen (u16_t port)
void | uip_unlisten (u16_t port)
struct uip_conn * | uip_connect (uip_ipaddr_t *ripaddr, u16_t port)
void | uip_send (const void *data, int len)
struct uip_udp_conn * | uip_udp_new (uip_ipaddr_t *ripaddr, u16_t rport)

Detailed Description

Functions used by an application running of top of uIP.

Define Documentation

#define uip_abort ( )

Abort the current connection.

This function will abort (reset) the current connection, and is usually used when an error has occured that prevents using the uip_close() function.

Definition at line 585 of file uip.h.

#define uip_aborted ( )

Has the connection been aborted by the other end?

Non-zero if the current connection has been aborted (reset) by the remote host.

Definition at line 684 of file uip.h.

#define uip_acked ( )

Has previously sent data been acknowledged?

Will reduce to non-zero if the previously sent data has been acknowledged by the remote host. This means that the application can send new data.

Definition at line 652 of file uip.h.

#define uip_close ( )

Close the current connection.

This function will close the current connection in a nice way.

Definition at line 574 of file uip.h.

#define uip_closed ( )

Has the connection been closed by the other end?

Is non-zero if the connection has been closed by the remote host. The application may then do the necessary clean-ups.

Definition at line 674 of file uip.h.

#define uip_connected ( )

Has the connection just been connected?

Reduces to non-zero if the current connection has been connected to a remote host. This will happen both if the connection has been actively opened (with uip_connect()) or passively opened (with uip_listen()).

Definition at line 664 of file uip.h.

#define uip_datalen ( )

The length of any incoming data that is currently avaliable (if avaliable) in the uip_appdata buffer.

The test function uip_data() must first be used to check if there is any data available at all.

Definition at line 554 of file uip.h.

#define uip_initialmss ( )

Get the initial maxium segment size (MSS) of the current connection.

Definition at line 728 of file uip.h.

#define uip_mss ( )

Get the current maxium segment size that can be sent on the current connection.

The current maxiumum segment size that can be sent on the connection is computed from the receiver's window and the MSS of the connection (which also is available by calling uip_initialmss()).

Definition at line 741 of file uip.h.

#define uip_newdata ( )

Is new incoming data available?

Will reduce to non-zero if there is new data for the application present at the uip_appdata pointer. The size of the data is avaliable through the uip_len variable.

Definition at line 641 of file uip.h.

#define uip_outstanding ( conn ) ((conn)->len)

Definition at line 515 of file uip.h.

#define uip_poll ( )

Is the connection being polled by uIP?

Is non-zero if the reason the application is invoked is that the current connection has been idle for a while and should be polled.

The polling event can be used for sending data without having to wait for the remote host to send data.

Definition at line 720 of file uip.h.

#define uip_restart ( )

Restart the current connection, if is has previously been stopped with uip_stop().

This function will open the receiver's window again so that we start receiving data for the current connection.

Definition at line 614 of file uip.h.

#define uip_rexmit ( )

Do we need to retransmit previously data?

Reduces to non-zero if the previously sent data has been lost in the network, and the application should retransmit it. The application should send the exact same data as it did the last time, using the uip_send() function.

Definition at line 706 of file uip.h.

#define uip_stop ( )

Tell the sending host to stop sending data.

This function will close our receiver's window so that we stop receiving data for the current connection.

Definition at line 595 of file uip.h.

#define uip_stopped ( conn )

Find out if the current connection has been previously stopped with uip_stop().

Definition at line 603 of file uip.h.

#define uip_timedout ( )

Has the connection timed out?

Non-zero if the current connection has been aborted due to too many retransmissions.

Definition at line 694 of file uip.h.

#define uip_udp_bind | ( | conn,
 |  | port | )

Bind a UDP connection to a local port.

Parameters:
conn | A pointer to the uip_udp_conn structure for the connection.
port | The local port number, in network byte order.

Definition at line 791 of file uip.h.

#define uip_udp_remove ( conn )

Removed a UDP connection.

Parameters:
conn A pointer to the uip_udp_conn structure for the connection.

Definition at line 779 of file uip.h.

#define uip_udp_send ( len )

Send a UDP datagram of length len on the current connection.

This function can only be called in response to a UDP event (poll or newdata). The data must be present in the uip_buf buffer, at the place pointed to by the uip_appdata pointer.

Parameters:
len The length of the data in the uip_buf buffer.

Definition at line 804 of file uip.h.

#define uip_udpconnection ( )

Is the current connection a UDP connection?

This function checks whether the current connection is a UDP connection.

Definition at line 630 of file uip.h.

#define uip_urgdatalen ( )

The length of any out-of-band data (urgent data) that has arrived on the connection.

Note:
The configuration parameter UIP_URGDATA must be set for this function to be enabled.

Definition at line 565 of file uip.h.

Function Documentation

struct uip_conn* uip_connect | ( | uip_ipaddr_t * | ripaddr,
 |  | u16_t | port |
 | ) |  |  | [read]

Connect to a remote host using TCP.

This function is used to start a new connection to the specified port on the specied host. It allocates a new connection identifier, sets the connection to the SYN_SENT state and sets the retransmission timer to 0. This will cause a TCP SYN segment to be sent out the next time this connection is periodically processed, which usually is done within 0.5 seconds after the call to uip_connect().

Note:
This function is avaliable only if support for active open has been configured by defining UIP_ACTIVE_OPEN to 1 in uipopt.h.

Since this function requires the port number to be in network byte order, a conversion using HTONS() or htons() is necessary.

 uip_ipaddr_t ipaddr;

 uip_ipaddr(&ipaddr, 192,168,1,2);
 uip_connect(&ipaddr, HTONS(80));

Parameters:
ripaddr | The IP address of the remote hot.
port | A 16-bit port number in network byte order.
Returns:
A pointer to the uIP connection identifier for the new connection, or NULL if no connection could be allocated.

Definition at line 423 of file uip.c.

void uip_listen ( u16_t port )

Start listening to the specified port.

Note:
Since this function expects the port number in network byte order, a conversion using HTONS() or htons() is necessary.
 uip_listen(HTONS(80));

Parameters:
port A 16-bit port number in network byte order.

Definition at line 545 of file uip.c.

void uip_send | ( | const void * | data,
 |  | int | len
 | ) |  |

Send data on the current connection.

This function is used to send out a single segment of TCP data. Only applications that have been invoked by uIP for event processing can send data.

The amount of data that actually is sent out after a call to this funcion is determined by the maximum amount of data TCP allows. uIP will automatically crop the data so that only the appropriate amount of data is sent. The function uip_mss() can be used to query uIP for the amount of data that actually will be sent.

Note:
This function does not guarantee that the sent data will arrive at the destination. If the data is lost in the network, the application will be invoked with the uip_rexmit() event being set. The application will then have to resend the data using this function.
Parameters:
data | A pointer to the data which is to be sent.
len | The maximum amount of data bytes to be sent.

Definition at line 1908 of file uip.c.

struct uip_udp_conn* uip_udp_new | ( | uip_ipaddr_t * | ripaddr,
 |  | u16_t | rport |
 | ) |  |  | [read]

Set up a new UDP connection.

This function sets up a new UDP connection. The function will automatically allocate an unused local port for the new connection. However, another port can be chosen by using the uip_udp_bind() call, after the uip_udp_new() function has been called.

Example:

 uip_ipaddr_t addr;
 struct uip_udp_conn *c;

 uip_ipaddr(&addr, 192,168,2,1);
 c = uip_udp_new(&addr, HTONS(12345));
 if(c != NULL) {
   uip_udp_bind(c, HTONS(12344));
 }
Parameters:
ripaddr | The IP address of the remote host.
rport | The remote port number in network byte order.
Returns:
The uip_udp_conn structure for the new connection or NULL if no connection could be allocated.

void uip_unlisten ( u16_t port )

Stop listening to the specified port.

Note:
Since this function expects the port number in network byte order, a conversion using HTONS() or htons() is necessary.
 uip_unlisten(HTONS(80));

Parameters:
port A 16-bit port number in network byte order.

Definition at line 534 of file uip.c.

Generated on Tue Jun 7 14:59:51 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: uIP conversion functions

uIP conversion functions
[The uIP TCP/IP stack]

Defines

#define | uip_ipaddr(addr, addr0, addr1, addr2, addr3)
#define | uip_ip6addr(addr, addr0, addr1, addr2, addr3, addr4, addr5, addr6, addr7)
#define | uip_ipaddr_copy(dest, src)
#define | uip_ipaddr_cmp(addr1, addr2)
#define | uip_ipaddr_maskcmp(addr1, addr2, mask)
#define | uip_ipaddr_mask(dest, src, mask)
#define | uip_ipaddr1(addr)
#define | uip_ipaddr2(addr)
#define | uip_ipaddr3(addr)
#define | uip_ipaddr4(addr)
#define | HTONS(n)
#define | ntohs htons

Functions

u16_t | htons (u16_t val)
unsigned char | uiplib_ipaddrconv (char *addrstr, unsigned char *addr)

Detailed Description

These functions can be used for converting between different data formats used by uIP.

Define Documentation

#define HTONS ( n )

Convert 16-bit quantity from host byte order to network byte order.

This macro is primarily used for converting constants from host byte order to network byte order. For converting variables to network byte order, use the htons() function instead.

Definition at line 1074 of file uip.h.

#define ntohs htons

Definition at line 1091 of file uip.h.

#define uip_ip6addr | ( | addr,
 |  | addr0,
 |  | addr1,
 |  | addr2,
 |  | addr3,
 |  | addr4,
 |  | addr5,
 |  | addr6,
 |  | addr7 | )

Construct an IPv6 address from eight 16-bit words.

This function constructs an IPv6 address.

Definition at line 856 of file uip.h.

#define uip_ipaddr | ( | addr,
 |  | addr0,
 |  | addr1,
 |  | addr2,
 |  | addr3 | )

Construct an IP address from four bytes.

This function constructs an IP address of the type that uIP handles internally from four bytes. The function is handy for specifying IP addresses to use with e.g. the uip_connect() function.

Example:

 uip_ipaddr_t ipaddr;
 struct uip_conn *c;

 uip_ipaddr(&ipaddr, 192,168,1,2);
 c = uip_connect(&ipaddr, HTONS(80));

Parameters:
addr | A pointer to a uip_ipaddr_t variable that will be filled in with the IP address.
addr0 | The first octet of the IP address.
addr1 | The second octet of the IP address.
addr2 | The third octet of the IP address.
addr3 | The forth octet of the IP address.

Definition at line 844 of file uip.h.

#define uip_ipaddr1 ( addr )

Pick the first octet of an IP address.

Picks out the first octet of an IP address.

Example:

 uip_ipaddr_t ipaddr;
 u8_t octet;

 uip_ipaddr(&ipaddr, 1,2,3,4);
 octet = uip_ipaddr1(&ipaddr);

In the example above, the variable "octet" will contain the value 1.

Definition at line 999 of file uip.h.

#define uip_ipaddr2 ( addr )

Pick the second octet of an IP address.

Picks out the second octet of an IP address.

Example:

 uip_ipaddr_t ipaddr;
 u8_t octet;

 uip_ipaddr(&ipaddr, 1,2,3,4);
 octet = uip_ipaddr2(&ipaddr);

In the example above, the variable "octet" will contain the value 2.

Definition at line 1019 of file uip.h.

#define uip_ipaddr3 ( addr )

Pick the third octet of an IP address.

Picks out the third octet of an IP address.

Example:

 uip_ipaddr_t ipaddr;
 u8_t octet;

 uip_ipaddr(&ipaddr, 1,2,3,4);
 octet = uip_ipaddr3(&ipaddr);

In the example above, the variable "octet" will contain the value 3.

Definition at line 1039 of file uip.h.

#define uip_ipaddr4 ( addr )

Pick the fourth octet of an IP address.

Picks out the fourth octet of an IP address.

Example:

 uip_ipaddr_t ipaddr;
 u8_t octet;

 uip_ipaddr(&ipaddr, 1,2,3,4);
 octet = uip_ipaddr4(&ipaddr);

In the example above, the variable "octet" will contain the value 4.

Definition at line 1059 of file uip.h.

#define uip_ipaddr_cmp | ( | addr1,
 |  | addr2 | )

Compare two IP addresses

Compares two IP addresses.

Example:

 uip_ipaddr_t ipaddr1, ipaddr2;

 uip_ipaddr(&ipaddr1, 192,16,1,2);
 if(uip_ipaddr_cmp(&ipaddr2, &ipaddr1)) {
    printf("They are the same");
 }

Parameters:
addr1 | The first IP address.
addr2 | The second IP address.

Definition at line 915 of file uip.h.

#define uip_ipaddr_copy | ( | dest,
 |  | src | )

Copy an IP address to another IP address.

Copies an IP address from one place to another.

Example:

 uip_ipaddr_t ipaddr1, ipaddr2;

 uip_ipaddr(&ipaddr1, 192,16,1,2);
 uip_ipaddr_copy(&ipaddr2, &ipaddr1);

Parameters:
dest | The destination for the copy.
src | The source from where to copy.

Definition at line 886 of file uip.h.

#define uip_ipaddr_mask | ( | dest,
 |  | src,
 |  | mask | )

Mask out the network part of an IP address.

Masks out the network part of an IP address, given the address and the netmask.

Example:

 uip_ipaddr_t ipaddr1, ipaddr2, netmask;

 uip_ipaddr(&ipaddr1, 192,16,1,2);
 uip_ipaddr(&netmask, 255,255,255,0);
 uip_ipaddr_mask(&ipaddr2, &ipaddr1, &netmask);

In the example above, the variable "ipaddr2" will contain the IP address 192.168.1.0.

Parameters:
dest | Where the result is to be placed.
src | The IP address.
mask | The netmask.

Definition at line 976 of file uip.h.

#define uip_ipaddr_maskcmp | ( | addr1,
 |  | addr2,
 |  | mask | )

Compare two IP addresses with netmasks

Compares two IP addresses with netmasks. The masks are used to mask out the bits that are to be compared.

Example:

 uip_ipaddr_t ipaddr1, ipaddr2, mask;

 uip_ipaddr(&mask, 255,255,255,0);
 uip_ipaddr(&ipaddr1, 192,16,1,2);
 uip_ipaddr(&ipaddr2, 192,16,1,3);
 if(uip_ipaddr_maskcmp(&ipaddr1, &ipaddr2, &mask)) {
    printf("They are the same");
 }

Parameters:
addr1 | The first IP address.
addr2 | The second IP address.
mask | The netmask.

Definition at line 945 of file uip.h.

Function Documentation

u16_t htons ( u16_t val )

Convert 16-bit quantity from host byte order to network byte order.

This function is primarily used for converting variables from host byte order to network byte order. For converting constants to network byte order, use the HTONS() macro instead.

Definition at line 1902 of file uip.c.

unsigned char uiplib_ipaddrconv | ( | char * | addrstr,
 |  | unsigned char * | addr
 | ) |  |

Convert a textual representation of an IP address to a numerical representation.

This function takes a textual representation of an IP address in the form a.b.c.d and converts it into a 4-byte array that can be used by other uIP functions.

Parameters:
addrstr | A pointer to a string containing the IP address in textual form.
addr | A pointer to a 4-byte array that will be filled in with the numerical representation of the address.
Return values:
0 | If the IP address could not be parsed.
Non-zero | If the IP address was parsed.

Definition at line 43 of file uiplib.c.

Generated on Tue Jun 7 14:59:52 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Variables used in uIP device drivers

Variables used in uIP device drivers
[The uIP TCP/IP stack]

Variables

u16_t uip_len

Detailed Description

uIP has a few global variables that are used in device drivers for uIP.

Variable Documentation

u16_t uip_len

The length of the packet in the uip_buf buffer.

The global variable uip_len holds the length of the packet in the uip_buf buffer.

When the network device driver calls the uIP input function, uip_len should be set to the length of the packet in the uip_buf buffer.

When sending packets, the device driver should use the contents of the uip_len variable to determine the length of the outgoing packet.

Definition at line 171 of file uip.c.

Generated on Tue Jun 7 14:59:52 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: uIP Address Resolution Protocol

uIP Address Resolution Protocol
[The uIP TCP/IP stack]

Data Structures

struct | arp_hdr
struct | ethip_hdr
struct | arp_entry
struct | uip_eth_hdr

Files

file | uip_arp.c
file | uip_arp.h

Defines

#define | ARP_REQUEST 1
#define | ARP_REPLY 2
#define | ARP_HWTYPE_ETH 1
#define | BUF ((struct arp_hdr *)&uip_buf[0])
#define | IPBUF ((struct ethip_hdr *)&uip_buf[0])
#define | UIP_ETHTYPE_ARP 0x0806
#define | UIP_ETHTYPE_IP 0x0800
#define | UIP_ETHTYPE_IP6 0x86dd

Functions

void | uip_arp_init (void)
void | uip_arp_timer (void)
void | uip_arp_ipin (void)
void | uip_arp_arpin (void)
void | uip_arp_out (void)

Variables

struct uip_eth_addr | uip_ethaddr

Detailed Description

The Address Resolution Protocol ARP is used for mapping between IP addresses and link level addresses such as the Ethernet MAC addresses. ARP uses broadcast queries to ask for the link level address of a known IP address and the host which is configured with the IP address for which the query was meant, will respond with its link level address.

Note:
This ARP implementation only supports Ethernet.

Define Documentation

#define ARP_HWTYPE_ETH 1

Definition at line 123 of file uip_arp.c.

#define ARP_REPLY 2

Definition at line 121 of file uip_arp.c.

#define ARP_REQUEST 1

Definition at line 120 of file uip_arp.c.

#define BUF ((struct arp_hdr *)&uip_buf[0])

Definition at line 142 of file uip_arp.c.

#define IPBUF ((struct ethip_hdr *)&uip_buf[0])

Definition at line 143 of file uip_arp.c.

#define UIP_ETHTYPE_ARP 0x0806

Definition at line 82 of file uip_arp.h.

#define UIP_ETHTYPE_IP 0x0800

Definition at line 83 of file uip_arp.h.

#define UIP_ETHTYPE_IP6 0x86dd

Definition at line 84 of file uip_arp.h.

Function Documentation

void uip_arp_arpin ( void )

ARP processing for incoming ARP packets.

This function should be called by the device driver when an ARP packet has been received. The function will act differently depending on the ARP packet type: if it is a reply for a request that we previously sent out, the ARP cache will be filled in with the values from the ARP reply. If the incoming ARP packet is an ARP request for our IP address, an ARP reply packet is created and put into the uip_buf[] buffer.

When the function returns, the value of the global variable uip_len indicates whether the device driver should send out a packet or not. If uip_len is zero, no packet should be sent. If uip_len is non-zero, it contains the length of the outbound packet that is present in the uip_buf[] buffer.

This function expects an ARP packet with a prepended Ethernet header in the uip_buf[] buffer, and the length of the packet in the global variable uip_len.

Definition at line 304 of file uip_arp.c.

void uip_arp_init ( void )

Initialize the ARP module.

Definition at line 151 of file uip_arp.c.

void uip_arp_ipin ( void )

ARP processing for incoming IP packets

This function should be called by the device driver when an IP packet has been received. The function will check if the address is in the ARP cache, and if so the ARP cache entry will be refreshed. If no ARP cache entry was found, a new one is created.

This function expects an IP packet with a prepended Ethernet header in the uip_buf[] buffer, and the length of the packet in the global variable uip_len.

Definition at line 261 of file uip_arp.c.

void uip_arp_out ( void )

Prepend Ethernet header to an outbound IP packet and see if we need to send out an ARP request.

This function should be called before sending out an IP packet. The function checks the destination IP address of the IP packet to see what Ethernet MAC address that should be used as a destination MAC address on the Ethernet.

If the destination IP address is in the local network (determined by logical ANDing of netmask and our IP address), the function checks the ARP cache to see if an entry for the destination IP address is found. If so, an Ethernet header is prepended and the function returns. If no ARP cache entry is found for the destination IP address, the packet in the uip_buf[] is replaced by an ARP request packet for the IP address. The IP packet is dropped and it is assumed that they higher level protocols (e.g., TCP) eventually will retransmit the dropped packet.

If the destination IP address is not on the local network, the IP address of the default router is used instead.

When the function returns, a packet is present in the uip_buf[] buffer, and the length of the packet is in the global variable uip_len.

Definition at line 380 of file uip_arp.c.

void uip_arp_timer ( void )

Periodic ARP processing function.

This function performs periodic timer processing in the ARP module and should be called at regular intervals. The recommended interval is 10 seconds between the calls.

Definition at line 168 of file uip_arp.c.

Variable Documentation

struct uip_eth_addr uip_ethaddr

Definition at line 141 of file uip.c.

Generated on Tue Jun 7 14:59:52 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Architecture specific uIP functions

Architecture specific uIP functions
[The uIP TCP/IP stack]

Files

file | uip_arch.h

Functions

void | uip_add32 (u8_t *op32, u16_t op16)
u16_t | uip_chksum (u16_t *buf, u16_t len)
u16_t | uip_ipchksum (void)
u16_t | uip_tcpchksum (void)
u16_t | uip_udpchksum (void)

Variables

u8_t | uip_acc32 [4]

Detailed Description

The functions in the architecture specific module implement the IP check sum and 32-bit additions.

The IP checksum calculation is the most computationally expensive operation in the TCP/IP stack and it therefore pays off to implement this in efficient assembler. The purpose of the uip-arch module is to let the checksum functions to be implemented in architecture specific assembler.

Function Documentation

void uip_add32 | ( | u8_t * | op32,
 |  | u16_t | op16
 | ) |  |

Carry out a 32-bit addition.

Because not all architectures for which uIP is intended has native 32-bit arithmetic, uIP uses an external C function for doing the required 32-bit additions in the TCP protocol processing. This function should add the two arguments and place the result in the global variable uip_acc32.

Note:
The 32-bit integer pointed to by the op32 parameter and the result in the uip_acc32 variable are in network byte order (big endian).
Parameters:
op32 | A pointer to a 4-byte array representing a 32-bit integer in network byte order (big endian).
op16 | A 16-bit integer in host byte order.

Definition at line 265 of file uip.c.

u16_t uip_chksum | ( | u16_t * | buf,
 |  | u16_t | len
 | ) |  |

Calculate the Internet checksum over a buffer.

The Internet checksum is the one's complement of the one's complement sum of all 16-bit words in the buffer.

See RFC1071.

Note:
This function is not called in the current version of uIP, but future versions might make use of it.
Parameters:
buf | A pointer to the buffer over which the checksum is to be computed.
len | The length of the buffer over which the checksum is to be computed.
Returns:
The Internet checksum of the buffer.
Calculate the Internet checksum over a buffer.

The Internet checksum is the one's complement of the one's complement sum of all 16-bit words in the buffer.

See RFC1071.

Parameters:
buf | A pointer to the buffer over which the checksum is to be computed.
len | The length of the buffer over which the checksum is to be computed.
Returns:
The Internet checksum of the buffer.

Definition at line 327 of file uip.c.

u16_t uip_ipchksum ( void )

Calculate the IP header checksum of the packet header in uip_buf.

The IP header checksum is the Internet checksum of the 20 bytes of the IP header.

Returns:
The IP header checksum of the IP header in the uip_buf buffer.

Definition at line 334 of file uip.c.

u16_t uip_tcpchksum ( void )

Calculate the TCP checksum of the packet in uip_buf and uip_appdata.

The TCP checksum is the Internet checksum of data contents of the TCP segment, and a pseudo-header as defined in RFC793.

Note:
The uip_appdata pointer that points to the packet data may point anywhere in memory, so it is not possible to simply calculate the Internet checksum of the contents of the uip_buf buffer.
Returns:
The TCP checksum of the TCP segment in uip_buf and pointed to by uip_appdata.
Calculate the TCP checksum of the packet in uip_buf and uip_appdata.

The TCP checksum is the Internet checksum of data contents of the TCP segment, and a pseudo-header as defined in RFC793.

Returns:
The TCP checksum of the TCP segment in uip_buf and pointed to by uip_appdata.

Definition at line 380 of file uip.c.

u16_t uip_udpchksum ( void )

Variable Documentation

u8_t uip_acc32[4]

4-byte array used for the 32-bit sequence number calculations.

Definition at line 208 of file uip.c.

Generated on Tue Jun 7 14:59:52 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Configuration options for uIP

Configuration options for uIP
[uIP]

Files

file | uip-conf.h
file | uipopt.h

Defines

#define | UIP_LITTLE_ENDIAN 3412
#define | UIP_BIG_ENDIAN 1234

Project-specific configuration options

uIP has a number of configuration options that can be overridden for each project. These are kept in a project-specific uip-conf.h file and all configuration names have the prefix UIP_CONF.

typedef uint8_t | u8_t
typedef uint16_t | u16_t
typedef unsigned short | uip_stats_t
#define | UIP_CONF_MAX_CONNECTIONS
#define | UIP_CONF_MAX_LISTENPORTS
#define | UIP_CONF_BUFFER_SIZE
#define | UIP_CONF_BYTE_ORDER
#define | UIP_CONF_LOGGING
#define | UIP_CONF_UDP
#define | UIP_CONF_UDP_CHECKSUMS
#define | UIP_CONF_STATISTICS

Appication specific configurations

An uIP application is implemented using a single application function that is called by uIP whenever a TCP/IP event occurs. The name of this function must be registered with uIP at compile time using the UIP_APPCALL definition.

uIP applications can store the application state within the uip_conn structure by specifying the type of the application structure by typedef:ing the type uip_tcp_appstate_t and uip_udp_appstate_t.

The file containing the definitions must be included in the uipopt.h file.

The following example illustrates how this can look.

void httpd_appcall(void);
#define UIP_APPCALL     httpd_appcall

struct httpd_state {
  u8_t state;
  u16_t count;
  char *dataptr;
  char *script;
};
typedef struct httpd_state uip_tcp_appstate_t

typedef struct hello_world_state | uip_tcp_appstate_t
typedef struct dhcpc_state | uip_udp_appstate_t
#define | UIP_APPCALL hello_world_appcall

General configuration options

void | uip_log (char *msg)
#define | UIP_BUFSIZE
#define | UIP_STATISTICS
#define | UIP_LOGGING
#define | UIP_BROADCAST
#define | UIP_LLH_LEN

Static configuration options

These configuration options can be used for setting the IP address settings statically, but only if UIP_FIXEDADDR is set to 1. The configuration options for a specific node includes IP address, netmask and default router as well as the Ethernet address. The netmask, default router and Ethernet address are appliciable only if uIP should be run over Ethernet.

All of these should be changed to suit your project.

#define | UIP_FIXEDADDR
#define | UIP_PINGADDRCONF
#define | UIP_FIXEDETHADDR

IP configuration options

#define | UIP_TTL 64
#define | UIP_REASSEMBLY
#define | UIP_REASS_MAXAGE 40

UDP configuration options

#define | UIP_UDP
#define | UIP_UDP_CHECKSUMS
#define | UIP_UDP_CONNS

TCP configuration options

The name of the function that should be called when UDP datagrams arrive.

#define | UIP_ACTIVE_OPEN
#define | UIP_CONNS
#define | UIP_LISTENPORTS
#define | UIP_URGDATA
#define | UIP_RTO 3
#define | UIP_MAXRTX 8
#define | UIP_MAXSYNRTX 5
#define | UIP_TCP_MSS (UIP_BUFSIZE - UIP_LLH_LEN - UIP_TCPIP_HLEN)
#define | UIP_RECEIVE_WINDOW
#define | UIP_TIME_WAIT_TIMEOUT 120

ARP configuration options

#define | UIP_ARPTAB_SIZE
#define | UIP_ARP_MAXAGE 120

CPU architecture configuration

The CPU architecture configuration is where the endianess of the CPU on which uIP is to be run is specified. Most CPUs today are little endian, and the most notable exception are the Motorolas which are big endian. The BYTE_ORDER macro should be changed to reflect the CPU architecture on which uIP is to be run.

#define | UIP_BYTE_ORDER

Detailed Description

uIP is configured using the per-project configuration file uipopt.h. This file contains all compile-time options for uIP and should be tweaked to match each specific project. The uIP distribution contains a documented example "uipopt.h" that can be copied and modified for each project.

Note:
Most of the configuration options in the uipopt.h should not be changed, but rather the per-project uip-conf.h file.

Define Documentation

#define UIP_ACTIVE_OPEN

Determines if support for opening connections from uIP should be compiled in.

If the applications that are running on top of uIP for this project do not need to open outgoing TCP connections, this configration option can be turned off to reduce the code size of uIP.

Definition at line 237 of file uipopt.h.

define UIP_APPCALL hello_world_appcall

The name of the application function that uIP should call in response to TCP/IP events.

Definition at line 49 of file hello-world.h.

#define UIP_ARP_MAXAGE 120

The maxium age of ARP table entries measured in 10ths of seconds.

An UIP_ARP_MAXAGE of 120 corresponds to 20 minutes (BSD default).

Definition at line 362 of file uipopt.h.

#define UIP_ARPTAB_SIZE

The size of the ARP table.

This option should be set to a larger value if this uIP node will have many connections from the local network.

Definition at line 353 of file uipopt.h.

#define UIP_BIG_ENDIAN 1234

Definition at line 71 of file uipopt.h.

#define UIP_BROADCAST

Broadcast support.

This flag configures IP broadcast support. This is useful only together with UDP.

Definition at line 427 of file uipopt.h.

#define UIP_BUFSIZE

The size of the uIP packet buffer.

The uIP packet buffer should not be smaller than 60 bytes, and does not need to be larger than 1500 bytes. Lower size results in lower TCP throughput, larger size results in higher TCP throughput.

Definition at line 383 of file uipopt.h.

#define UIP_BYTE_ORDER

The byte order of the CPU architecture on which uIP is to be run.

This option can be either BIG_ENDIAN (Motorola byte order) or LITTLE_ENDIAN (Intel byte order).

Definition at line 479 of file uipopt.h.

#define UIP_CONF_BUFFER_SIZE

uIP buffer size.

Definition at line 107 of file uip-conf.h.

#define UIP_CONF_BYTE_ORDER

CPU byte order.

Definition at line 114 of file uip-conf.h.

#define UIP_CONF_LOGGING

Logging on or off

Definition at line 121 of file uip-conf.h.

#define UIP_CONF_MAX_CONNECTIONS

Maximum number of TCP connections.

Definition at line 93 of file uip-conf.h.

#define UIP_CONF_MAX_LISTENPORTS

Maximum number of listening TCP ports.

Definition at line 100 of file uip-conf.h.

#define UIP_CONF_STATISTICS

uIP statistics on or off

Definition at line 142 of file uip-conf.h.

#define UIP_CONF_UDP

UDP support on or off

Definition at line 128 of file uip-conf.h.

#define UIP_CONF_UDP_CHECKSUMS

UDP checksums on or off

Definition at line 135 of file uip-conf.h.

#define UIP_CONNS

The maximum number of simultaneously open TCP connections.

Since the TCP connections are statically allocated, turning this configuration knob down results in less RAM used. Each TCP connection requires approximatly 30 bytes of memory.

Definition at line 249 of file uipopt.h.

#define UIP_FIXEDADDR

Determines if uIP should use a fixed IP address or not.

If uIP should use a fixed IP address, the settings are set in the uipopt.h file. If not, the macros uip_sethostaddr(), uip_setdraddr() and uip_setnetmask() should be used instead.

Definition at line 101 of file uipopt.h.

#define UIP_FIXEDETHADDR

Specifies if the uIP ARP module should be compiled with a fixed Ethernet MAC address or not.

If this configuration option is 0, the macro uip_setethaddr() can be used to specify the Ethernet address at run-time.

Definition at line 131 of file uipopt.h.

#define UIP_LISTENPORTS

The maximum number of simultaneously listening TCP ports.

Each listening TCP port requires 2 bytes of memory.

Definition at line 263 of file uipopt.h.

#define UIP_LITTLE_ENDIAN 3412

Definition at line 68 of file uipopt.h.

#define UIP_LLH_LEN

The link level header length.

This is the offset into the uip_buf where the IP header can be found. For Ethernet, this should be set to 14. For SLIP, this should be set to 0.

Definition at line 452 of file uipopt.h.

#define UIP_LOGGING

Determines if logging of certain events should be compiled in.

This is useful mostly for debugging. The function uip_log() must be implemented to suit the architecture of the project, if logging is turned on.

Definition at line 412 of file uipopt.h.

#define UIP_MAXRTX 8

The maximum number of times a segment should be retransmitted before the connection should be aborted.

This should not be changed.

Definition at line 292 of file uipopt.h.

#define UIP_MAXSYNRTX 5

The maximum number of times a SYN segment should be retransmitted before a connection request should be deemed to have been unsuccessful.

This should not need to be changed.

Definition at line 301 of file uipopt.h.

#define UIP_PINGADDRCONF

Ping IP address asignment.

uIP uses a "ping" packets for setting its own IP address if this option is set. If so, uIP will start with an empty IP address and the destination IP address of the first incoming "ping" (ICMP echo) packet will be used for setting the hosts IP address.

Note:
This works only if UIP_FIXEDADDR is 0.

Definition at line 118 of file uipopt.h.

#define UIP_REASS_MAXAGE 40

The maximum time an IP fragment should wait in the reassembly buffer before it is dropped.

Definition at line 167 of file uipopt.h.

#define UIP_REASSEMBLY

Turn on support for IP packet reassembly.

uIP supports reassembly of fragmented IP packets. This features requires an additonal amount of RAM to hold the reassembly buffer and the reassembly code size is approximately 700 bytes. The reassembly buffer is of the same size as the uip_buf buffer (configured by UIP_BUFSIZE).

Note:
IP packet reassembly is not heavily tested.

Definition at line 160 of file uipopt.h.

#define UIP_RECEIVE_WINDOW

The size of the advertised receiver's window.

Should be set low (i.e., to the size of the uip_buf buffer) is the application is slow to process incoming data, or high (32768 bytes) if the application processes data quickly.

Definition at line 321 of file uipopt.h.

#define UIP_RTO 3

The initial retransmission timeout counted in timer pulses.

This should not be changed.

Definition at line 284 of file uipopt.h.

#define UIP_STATISTICS

Determines if statistics support should be compiled in.

The statistics is useful for debugging and to show the user.

Definition at line 397 of file uipopt.h.

#define UIP_TCP_MSS (UIP_BUFSIZE - UIP_LLH_LEN - UIP_TCPIP_HLEN)

The TCP maximum segment size.

This is should not be to set to more than UIP_BUFSIZE - UIP_LLH_LEN - UIP_TCPIP_HLEN.

Definition at line 309 of file uipopt.h.

#define UIP_TIME_WAIT_TIMEOUT 120

How long a connection should stay in the TIME_WAIT state.

This configiration option has no real implication, and it should be left untouched.

Definition at line 332 of file uipopt.h.

#define UIP_TTL 64

The IP TTL (time to live) of IP packets sent by uIP.

This should normally not be changed.

Definition at line 145 of file uipopt.h.

#define UIP_UDP

Toggles wether UDP support should be compiled in or not.

Definition at line 185 of file uipopt.h.

#define UIP_UDP_CHECKSUMS

Toggles if UDP checksums should be used or not.

Note:
Support for UDP checksums is currently not included in uIP, so this option has no function.

Definition at line 199 of file uipopt.h.

#define UIP_UDP_CONNS

The maximum amount of concurrent UDP connections.

Definition at line 210 of file uipopt.h.

#define UIP_URGDATA

Determines if support for TCP urgent data notification should be compiled in.

Urgent data (out-of-band data) is a rarely used TCP feature that very seldom would be required.

Definition at line 277 of file uipopt.h.

Typedef Documentation

typedef uint16_t u16_t

16 bit datatype

This typedef defines the 16-bit type used throughout uIP.

Definition at line 76 of file uip-conf.h.

typedef uint8_t u8_t

8 bit datatype

This typedef defines the 8-bit type used throughout uIP.

Definition at line 67 of file uip-conf.h.

typedef unsigned short uip_stats_t

Statistics datatype

This typedef defines the dataype used for keeping statistics in uIP.

Definition at line 86 of file uip-conf.h.

typedef uip_tcp_appstate_t

The type of the application state that is to be stored in the uip_conn structure. This usually is typedef:ed to a struct holding application state information.

typedef uip_udp_appstate_t

The type of the application state that is to be stored in the uip_conn structure. This usually is typedef:ed to a struct holding application state information.

Definition at line 64 of file dhcpc.h.

Function Documentation

void uip_log ( char * msg )

Print out a uIP log message.

This function must be implemented by the module that uses uIP, and is called by uIP whenever a log message is generated.

Definition at line 74 of file main.c.

Generated on Tue Jun 7 14:59:52 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Apps

Apps
[uIP]

Modules

Hello, world
DNS resolver
SMTP E-mail sender
Web client
Web server
Generated on Tue Jun 7 15:00:02 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Hello, world

Hello, world
[Apps]

Data Structures

struct | hello_world_state

Files

file | hello-world.c
file | hello-world.h

Functions

void | hello_world_init (void)
void | hello_world_appcall (void)

Detailed Description

A small example showing how to write applications with protosockets.

Function Documentation

void hello_world_appcall ( void )

Definition at line 55 of file hello-world.c.

void hello_world_init ( void )

Definition at line 41 of file hello-world.c.

Generated on Tue Jun 7 14:59:48 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: DNS resolver

DNS resolver
[Apps]

Data Structures

struct | dns_hdr
struct | dns_answer
struct | namemap

Files

file | resolv.c
file | resolv.h

Defines

#define | NULL (void *)0
#define | MAX_RETRIES 8
#define | RESOLV_ENTRIES 4
#define | UIP_UDP_APPCALL resolv_appcall

Typedefs

typedef int | uip_udp_appstate_t

Functions

void | resolv_appcall (void)
void | resolv_query (char *name)
u16_t * | resolv_lookup (char *name)
u16_t * | resolv_getserver (void)
void | resolv_conf (u16_t *dnsserver)
void | resolv_init (void)
void | resolv_found (char *name, u16_t *ipaddr)

Detailed Description

The uIP DNS resolver functions are used to lookup a hostname and map it to a numerical IP address. It maintains a list of resolved hostnames that can be queried with the resolv_lookup() function. New hostnames can be resolved using the resolv_query() function.

When a hostname has been resolved (or found to be non-existant), the resolver code calls a callback function called resolv_found() that must be implemented by the module that uses the resolver.

Define Documentation

#define MAX_RETRIES 8

Definition at line 77 of file resolv.c.

#define NULL (void *)0

Definition at line 73 of file resolv.c.

#define RESOLV_ENTRIES 4

Definition at line 127 of file resolv.c.

#define UIP_UDP_APPCALL resolv_appcall

Definition at line 49 of file resolv.h.

Typedef Documentation

typedef int uip_udp_appstate_t

Definition at line 47 of file resolv.h.

Function Documentation

void resolv_appcall ( void )

Definition at line 335 of file resolv.c.

void resolv_conf ( u16_t * dnsserver )

Configure which DNS server to use for queries.

Parameters:
dnsserver A pointer to a 4-byte representation of the IP address of the DNS server to be configured.

Definition at line 442 of file resolv.c.

void resolv_found | ( | char * | name,
 |  | u16_t * | ipaddr
 | ) |  |

Callback function which is called when a hostname is found.

This function must be implemented by the module that uses the DNS resolver. It is called when a hostname is found, or when a hostname was not found.

Parameters:
name | A pointer to the name that was looked up.
ipaddr | A pointer to a 4-byte array containing the IP address of the hostname, or NULL if the hostname could not be found.

u16_t * resolv_getserver ( void )

Obtain the currently configured DNS server.

Returns:
A pointer to a 4-byte representation of the IP address of the currently configured DNS server or NULL if no DNS server has been configured.

Definition at line 426 of file resolv.c.

void resolv_init ( void )

Initalize the resolver.

Definition at line 456 of file resolv.c.

u16_t * resolv_lookup ( char * name )

Look up a hostname in the array of known hostnames.

Note:
This function only looks in the internal array of known hostnames, it does not send out a query for the hostname if none was found. The function resolv_query() can be used to send a query for a hostname.
Returns:
A pointer to a 4-byte representation of the hostname's IP address, or NULL if the hostname was not found in the array of hostnames.

Definition at line 400 of file resolv.c.

void resolv_query ( char * name )

Queues a name so that a question for the name will be sent out.

Parameters:
name The hostname that is to be queried.

Definition at line 354 of file resolv.c.

Generated on Tue Jun 7 14:59:49 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: SMTP E-mail sender

SMTP E-mail sender
[Apps]

Data Structures

struct | smtp_state

Files

file | smtp.c
file | smtp.h

Defines

#define | ISO_nl 0x0a
#define | ISO_cr 0x0d
#define | ISO_period 0x2e
#define | ISO_2 0x32
#define | ISO_3 0x33
#define | ISO_4 0x34
#define | ISO_5 0x35
#define | SMTP_ERR_OK 0
#define | SMTP_SEND(to, cc, from, subject, msg) smtp_send(to, cc, from, subject, msg, strlen(msg))
#define | UIP_APPCALL smtp_appcall

Typedefs

typedef struct smtp_state | uip_tcp_appstate_t

Functions

void | smtp_appcall (void)
void | smtp_configure (char *lhostname, void *server)
unsigned char | smtp_send (char *to, char *cc, char *from, char *subject, char *msg, u16_t msglen)
void | smtp_init (void)
void | smtp_done (unsigned char error)
void | smtp_configure (char *localhostname, u16_t *smtpserver)
unsigned char | smtp_send (char *to, char *from, char *subject, char *msg, u16_t msglen)

Detailed Description

The Simple Mail Transfer Protocol (SMTP) as defined by RFC821 is the standard way of sending and transfering e-mail on the Internet. This simple example implementation is intended as an example of how to implement protocols in uIP, and is able to send out e-mail but has not been extensively tested.

Define Documentation

#define ISO_2 0x32

Definition at line 78 of file smtp.c.

#define ISO_3 0x33

Definition at line 79 of file smtp.c.

#define ISO_4 0x34

Definition at line 80 of file smtp.c.

#define ISO_5 0x35

Definition at line 81 of file smtp.c.

#define ISO_cr 0x0d

Definition at line 74 of file smtp.c.

#define ISO_nl 0x0a

Definition at line 73 of file smtp.c.

#define ISO_period 0x2e

Definition at line 76 of file smtp.c.

#define SMTP_ERR_OK 0

Error number that signifies a non-error condition.

Definition at line 55 of file smtp.h.

#define SMTP_SEND | ( | to,
 |  | cc,
 |  | from,
 |  | subject,
 |  | msg | ) | smtp_send(to, cc, from, subject, msg, strlen(msg))

Definition at line 76 of file smtp.h.

#define UIP_APPCALL smtp_appcall

Definition at line 96 of file smtp.h.

Typedef Documentation

typedef struct smtp_state uip_tcp_appstate_t

Definition at line 98 of file smtp.h.

Function Documentation

void smtp_appcall ( void )

Definition at line 193 of file smtp.c.

void smtp_configure | ( | char * | localhostname,
 |  | u16_t * | smtpserver
 | ) |  |

void smtp_configure | ( | char * | lhostname,
 |  | void * | server
 | ) |  |

Specificy an SMTP server and hostname.

This function is used to configure the SMTP module with an SMTP server and the hostname of the host.

Parameters:
lhostname | The hostname of the uIP host.
server | A pointer to a 4-byte array representing the IP address of the SMTP server to be configured.

Definition at line 219 of file smtp.c.

void smtp_done ( unsigned char error )

Callback function that is called when an e-mail transmission is done.

This function must be implemented by the module that uses the SMTP module.

Parameters:
error The number of the error if an error occured, or SMTP_ERR_OK.

void smtp_init ( void )

Definition at line 259 of file smtp.c.

unsigned char smtp_send | ( | char * | to,
 |  | char * | from,
 |  | char * | subject,
 |  | char * | msg,
 |  | u16_t | msglen
 | ) |  |

unsigned char smtp_send | ( | char * | to,
 |  | char * | cc,
 |  | char * | from,
 |  | char * | subject,
 |  | char * | msg,
 |  | u16_t | msglen
 | ) |  |

Send an e-mail.

Parameters:
to | The e-mail address of the receiver of the e-mail.
cc | The e-mail address of the CC: receivers of the e-mail.
from | The e-mail address of the sender of the e-mail.
subject | The subject of the e-mail.
msg | The actual e-mail message.
msglen | The length of the e-mail message.

Definition at line 236 of file smtp.c.

Generated on Tue Jun 7 14:59:49 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Web client

Web client
[Apps]

Data Structures

struct | webclient_state

Files

file | webclient.c
file | webclient.h

Defines

#define | WEBCLIENT_TIMEOUT 100
#define | WEBCLIENT_STATE_STATUSLINE 0
#define | WEBCLIENT_STATE_HEADERS 1
#define | WEBCLIENT_STATE_DATA 2
#define | WEBCLIENT_STATE_CLOSE 3
#define | HTTPFLAG_NONE 0
#define | HTTPFLAG_OK 1
#define | HTTPFLAG_MOVED 2
#define | HTTPFLAG_ERROR 3
#define | ISO_nl 0x0a
#define | ISO_cr 0x0d
#define | ISO_space 0x20
#define | WEBCLIENT_CONF_MAX_URLLEN 100
#define | UIP_APPCALL webclient_appcall

Typedefs

typedef struct webclient_state | uip_tcp_appstate_t

Functions

char * | webclient_mimetype (void)
char * | webclient_filename (void)
char * | webclient_hostname (void)
unsigned short | webclient_port (void)
void | webclient_init (void)
void | webclient_close (void)
unsigned char | webclient_get (char *host, u16_t port, char *file)
void | webclient_appcall (void)
void | webclient_datahandler (char *data, u16_t len)
void | webclient_connected (void)
void | webclient_timedout (void)
void | webclient_aborted (void)
void | webclient_closed (void)

Detailed Description

This example shows a HTTP client that is able to download web pages and files from web servers. It requires a number of callback functions to be implemented by the module that utilizes the code: webclient_datahandler(), webclient_connected(), webclient_timedout(), webclient_aborted(), webclient_closed().

Define Documentation

#define HTTPFLAG_ERROR 3

Definition at line 78 of file webclient.c.

#define HTTPFLAG_MOVED 2

Definition at line 77 of file webclient.c.

#define HTTPFLAG_NONE 0

Definition at line 75 of file webclient.c.

#define HTTPFLAG_OK 1

Definition at line 76 of file webclient.c.

#define ISO_cr 0x0d

Definition at line 82 of file webclient.c.

#define ISO_nl 0x0a

Definition at line 81 of file webclient.c.

#define ISO_space 0x20

Definition at line 83 of file webclient.c.

#define UIP_APPCALL webclient_appcall

Definition at line 73 of file webclient.h.

#define WEBCLIENT_CONF_MAX_URLLEN 100

Definition at line 53 of file webclient.h.

#define WEBCLIENT_STATE_CLOSE 3

Definition at line 73 of file webclient.c.

#define WEBCLIENT_STATE_DATA 2

Definition at line 72 of file webclient.c.

#define WEBCLIENT_STATE_HEADERS 1

Definition at line 71 of file webclient.c.

#define WEBCLIENT_STATE_STATUSLINE 0

Definition at line 70 of file webclient.c.

#define WEBCLIENT_TIMEOUT 100

Definition at line 68 of file webclient.c.

Typedef Documentation

typedef struct webclient_state uip_tcp_appstate_t

Definition at line 72 of file webclient.h.

Function Documentation

void webclient_aborted ( void )

Callback function that is called from the webclient code if the HTTP connection to the web server has been aborted by the web server.

This function must be implemented by the module that uses the webclient code.

void webclient_appcall ( void )

Definition at line 381 of file webclient.c.

void webclient_close ( void )

Close the currently open HTTP connection.

Definition at line 137 of file webclient.c.

void webclient_closed ( void )

Callback function that is called from the webclient code when the HTTP connection to the web server has been closed.

This function must be implemented by the module that uses the webclient code.

void webclient_connected ( void )

Callback function that is called from the webclient code when the HTTP connection has been connected to the web server.

This function must be implemented by the module that uses the webclient code.

void webclient_datahandler | ( | char * | data,
 |  | u16_t | len
 | ) |  |

Callback function that is called from the webclient code when HTTP data has been received.

This function must be implemented by the module that uses the webclient code. The function is called from the webclient module when HTTP data has been received. The function is not called when HTTP headers are received, only for the actual data.

Note:
This function is called many times, repetedly, when data is being received, and not once when all data has been received.
Parameters:
data | A pointer to the data that has been received.
len | The length of the data that has been received.

char * webclient_filename ( void )

Obtain the filename of the current HTTP data stream.

The filename of an HTTP request may be changed by the web server, and may therefore not be the same as when the original GET request was made with webclient_get(). This function is used for obtaining the current filename.

Returns:
A pointer to the current filename.

Definition at line 96 of file webclient.c.

unsigned char webclient_get | ( | char * | host,
 |  | u16_t | port,
 |  | char * | file
 | ) |  |

Open an HTTP connection to a web server and ask for a file using the GET method.

This function opens an HTTP connection to the specified web server and requests the specified file using the GET method. When the HTTP connection has been connected, the webclient_connected() callback function is called and when the HTTP data arrives the webclient_datahandler() callback function is called.

The callback function webclient_timedout() is called if the web server could not be contacted, and the webclient_aborted() callback function is called if the HTTP connection is aborted by the web server.

When the HTTP request has been completed and the HTTP connection is closed, the webclient_closed() callback function will be called.

Note:
If the function is passed a host name, it must already be in the resolver cache in order for the function to connect to the web server. It is therefore up to the calling module to implement the resolver calls and the signal handler used for reporting a resolv query answer.
Parameters:
host | A pointer to a string containing either a host name or a numerical IP address in dotted decimal notation (e.g., 192.168.23.1).
port | The port number to which to connect, in host byte order.
file | A pointer to the name of the file to get.
Return values:
0 | if the host name could not be found in the cache, or if a TCP connection could not be created.
1 | if the connection was initiated.

Definition at line 143 of file webclient.c.

char * webclient_hostname ( void )

Obtain the hostname of the current HTTP data stream.

The hostname of the web server of an HTTP request may be changed by the web server, and may therefore not be the same as when the original GET request was made with webclient_get(). This function is used for obtaining the current hostname.

Returns:
A pointer to the current hostname.

Definition at line 102 of file webclient.c.

void webclient_init ( void )

Initialize the webclient module.

Definition at line 114 of file webclient.c.

char * webclient_mimetype ( void )

Obtain the MIME type of the current HTTP data stream.

Returns:
A pointer to a string contaning the MIME type. The string may be empty if no MIME type was reported by the web server.

Definition at line 90 of file webclient.c.

unsigned short webclient_port ( void )

Obtain the port number of the current HTTP data stream.

The port number of an HTTP request may be changed by the web server, and may therefore not be the same as when the original GET request was made with webclient_get(). This function is used for obtaining the current port number.

Returns:
The port number of the current HTTP data stream, in host byte order.

Definition at line 108 of file webclient.c.

void webclient_timedout ( void )

Callback function that is called from the webclient code if the HTTP connection to the web server has timed out.

This function must be implemented by the module that uses the webclient code.

Generated on Tue Jun 7 14:59:49 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Web server

Web server
[Apps]

Data Structures

struct | httpd_cgi_call

Files

file | httpd-cgi.c
file | httpd-cgi.h
file | httpd.c

Defines

#define | HTTPD_CGI_CALL(name, str, function)
HTTPD CGI function declaration.
#define | STATE_WAITING 0
#define | STATE_OUTPUT 1
#define | ISO_nl 0x0a
#define | ISO_space 0x20
#define | ISO_bang 0x21
#define | ISO_percent 0x25
#define | ISO_period 0x2e
#define | ISO_slash 0x2f
#define | ISO_colon 0x3a

Functions

HTTPD_CGI_CALL (file,"file-stats", file_stats)
HTTPD_CGI_CALL (tcp,"tcp-connections", tcp_stats)
HTTPD_CGI_CALL (net,"net-stats", net_stats)
httpd_cgifunction | httpd_cgi (char *name)
typedef | PT_THREAD ((*httpd_cgifunction)(struct httpd_state *, char *))
void | httpd_cgi_init (void)
void | httpd_appcall (void)
void | httpd_init (void)
Initialize the web server.

Detailed Description

The uIP web server is a very simplistic implementation of an HTTP server. It can serve web pages and files from a read-only ROM filesystem, and provides a very small scripting language.

Define Documentation

#define HTTPD_CGI_CALL | ( | name,
 |  | str,
 |  | function | )

HTTPD CGI function declaration.

Parameters:
name | The C variable name of the function
str | The string name of the function, used in the script file
function | A pointer to the function that implements it
This macro is used for declaring a HTTPD CGI function. This function is then added to the list of HTTPD CGI functions with the httpd_cgi_add() function.

Definition at line 77 of file httpd-cgi.h.

#define ISO_bang 0x21

Definition at line 74 of file httpd.c.

#define ISO_colon 0x3a

Definition at line 78 of file httpd.c.

#define ISO_nl 0x0a

Definition at line 72 of file httpd.c.

#define ISO_percent 0x25

Definition at line 75 of file httpd.c.

#define ISO_period 0x2e

Definition at line 76 of file httpd.c.

#define ISO_slash 0x2f

Definition at line 77 of file httpd.c.

#define ISO_space 0x20

Definition at line 73 of file httpd.c.

#define STATE_OUTPUT 1

Definition at line 70 of file httpd.c.

#define STATE_WAITING 0

Definition at line 69 of file httpd.c.

Function Documentation

void httpd_appcall ( void )

Definition at line 301 of file httpd.c.

httpd_cgifunction httpd_cgi ( char * name )

Definition at line 72 of file httpd-cgi.c.

HTTPD_CGI_CALL | ( | net | ,
 |  | "net-stats" | ,
 |  | net_stats |
 | ) |  |

HTTPD_CGI_CALL | ( | tcp | ,
 |  | "tcp-connections" | ,
 |  | tcp_stats |
 | ) |  |

HTTPD_CGI_CALL | ( | file | ,
 |  | "file-stats" | ,
 |  | file_stats |
 | ) |  |

void httpd_cgi_init ( void )

void httpd_init ( void )

Initialize the web server.

This function initializes the web server and should be called at system boot-up.

Definition at line 336 of file httpd.c.

typedef PT_THREAD ( (*)(struct httpd_state *, char *) httpd_cgifunction )

Generated on Tue Jun 7 14:59:49 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Pt

Pt
[uIP]

Data Structures

struct | pt

Modules

Local continuations

Files

file | pt.h

Defines

#define | PT_WAITING 0
#define | PT_EXITED 1
#define | PT_ENDED 2
#define | PT_YIELDED 3

Initialization

#define | PT_INIT(pt)

Declaration and definition

#define | PT_THREAD(name_args)
#define | PT_BEGIN(pt)
#define | PT_END(pt)

Blocked wait

#define | PT_WAIT_UNTIL(pt, condition)
#define | PT_WAIT_WHILE(pt, cond)

Hierarchical protothreads

#define | PT_WAIT_THREAD(pt, thread)
#define | PT_SPAWN(pt, child, thread)

Exiting and restarting

#define | PT_RESTART(pt)
#define | PT_EXIT(pt)

Calling a protothread

#define | PT_SCHEDULE(f)

Yielding from a protothread

#define | PT_YIELD(pt)
#define | PT_YIELD_UNTIL(pt, cond)
Yield from the protothread until a condition occurs.

Define Documentation

#define PT_BEGIN ( pt )

Declare the start of a protothread inside the C function implementing the protothread.

This macro is used to declare the starting point of a protothread. It should be placed at the start of the function in which the protothread runs. All C statements above the PT_BEGIN() invokation will be executed each time the protothread is scheduled.

Parameters:
pt A pointer to the protothread control structure.

Definition at line 115 of file pt.h.

#define PT_END ( pt )

Declare the end of a protothread.

This macro is used for declaring that a protothread ends. It must always be used together with a matching PT_BEGIN() macro.

Parameters:
pt A pointer to the protothread control structure.

Definition at line 127 of file pt.h.

#define PT_ENDED 2

Definition at line 60 of file pt.h.

#define PT_EXIT ( pt )

Exit the protothread.

This macro causes the protothread to exit. If the protothread was spawned by another protothread, the parent protothread will become unblocked and can continue to run.

Parameters:
pt A pointer to the protothread control structure.

Definition at line 246 of file pt.h.

#define PT_EXITED 1

Definition at line 59 of file pt.h.

#define PT_INIT ( pt )

Initialize a protothread.

Initializes a protothread. Initialization must be done prior to starting to execute the protothread.

Parameters:
pt A pointer to the protothread control structure.
See also:
PT_SPAWN()

Definition at line 80 of file pt.h.

#define PT_RESTART ( pt )

Restart the protothread.

This macro will block and cause the running protothread to restart its execution at the place of the PT_BEGIN() call.

Parameters:
pt A pointer to the protothread control structure.

Definition at line 229 of file pt.h.

#define PT_SCHEDULE ( f )

Schedule a protothread.

This function shedules a protothread. The return value of the function is non-zero if the protothread is running or zero if the protothread has exited.

Parameters:
f The call to the C function implementing the protothread to be scheduled

Definition at line 271 of file pt.h.

#define PT_SPAWN | ( | pt,
 |  | child,
 |  | thread | )

Spawn a child protothread and wait until it exits.

This macro spawns a child protothread and waits until it exits. The macro can only be used within a protothread.

Parameters:
pt | A pointer to the protothread control structure.
child | A pointer to the child protothread's control structure.
thread | The child protothread with arguments

Definition at line 206 of file pt.h.

#define PT_THREAD ( name_args )

Declaration of a protothread.

This macro is used to declare a protothread. All protothreads must be declared with this macro.

Parameters:
name_args The name and arguments of the C function implementing the protothread.

Definition at line 100 of file pt.h.

#define PT_WAIT_THREAD | ( | pt,
 |  | thread | )

Block and wait until a child protothread completes.

This macro schedules a child protothread. The current protothread will block until the child protothread completes.

Note:
The child protothread must be manually initialized with the PT_INIT() function before this function is used.
Parameters:
pt | A pointer to the protothread control structure.
thread | The child protothread with arguments
See also:
PT_SPAWN()

Definition at line 192 of file pt.h.

#define PT_WAIT_UNTIL | ( | pt,
 |  | condition | )

Block and wait until condition is true.

This macro blocks the protothread until the specified condition is true.

Parameters:
pt | A pointer to the protothread control structure.
condition | The condition.

Definition at line 148 of file pt.h.

#define PT_WAIT_WHILE | ( | pt,
 |  | cond | )

Block and wait while condition is true.

This function blocks and waits while condition is true. See PT_WAIT_UNTIL().

Parameters:
pt | A pointer to the protothread control structure.
cond | The condition.

Definition at line 167 of file pt.h.

#define PT_WAITING 0

Definition at line 58 of file pt.h.

#define PT_YIELD ( pt )

Yield from the current protothread.

This function will yield the protothread, thereby allowing other processing to take place in the system.

Parameters:
pt A pointer to the protothread control structure.

Definition at line 290 of file pt.h.

#define PT_YIELD_UNTIL | ( | pt,
 |  | cond | )

Yield from the protothread until a condition occurs.

Parameters:
pt | A pointer to the protothread control structure.
cond | The condition.
This function will yield the protothread, until the specified condition evaluates to true.

Definition at line 310 of file pt.h.

#define PT_YIELDED 3

Definition at line 61 of file pt.h.

Generated on Tue Jun 7 15:00:02 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Local continuations

Local continuations
[Pt]

Files

file | lc-addrlabels.h
file | lc-switch.h
file | lc.h

Defines

#define | LC_INIT(s) s = NULL
#define | LC_RESUME(s)
#define | LC_SET(s) do { ({ __label__ resume; resume: (s) = &&resume; }); }while(0)
#define | LC_END(s)
#define | __LC_SWTICH_H__
#define | LC_INIT(s) s = 0;
#define | LC_RESUME(s) switch(s) { case 0:
#define | LC_SET(s) s = __LINE__; case __LINE__:
#define | LC_END(s) }

Typedefs

typedef void * | lc_t
typedef unsigned short | lc_t

Detailed Description

Local continuations form the basis for implementing protothreads. A local continuation can be set in a specific function to capture the state of the function. After a local continuation has been set can be resumed in order to restore the state of the function at the point where the local continuation was set.

Define Documentation

#define __LC_SWTICH_H__

Definition at line 58 of file lc-switch.h.

#define LC_END ( s ) }

Definition at line 72 of file lc-switch.h.

#define LC_END ( s )

Definition at line 79 of file lc-addrlabels.h.

#define LC_INIT ( s ) s = 0;

Definition at line 66 of file lc-switch.h.

#define LC_INIT ( s ) s = NULL

Definition at line 66 of file lc-addrlabels.h.

#define LC_RESUME ( s ) switch(s) { case 0:

Definition at line 68 of file lc-switch.h.

#define LC_RESUME ( s )

Value:

do {                                          \
    if(s != NULL) {                             \
      goto *s;                                  \
    }                                           \
  } while(0)

Definition at line 69 of file lc-addrlabels.h.

#define LC_SET ( s ) s = __LINE__; case __LINE__:

Definition at line 70 of file lc-switch.h.

#define LC_SET ( s ) do { ({ __label__ resume; resume: (s) = &&resume; }); }while(0)

Definition at line 76 of file lc-addrlabels.h.

Typedef Documentation

typedef unsigned short lc_t

Definition at line 64 of file lc-switch.h.

typedef void* lc_t

Definition at line 64 of file lc-addrlabels.h.

Generated on Tue Jun 7 14:59:50 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: GPDMA

GPDMA
[LPC1700CMSIS Examples]

Modules

Flash_2_Ram_Test
GPDMA_Sleep
Link_list
Ram_2_Ram_Test
Generated on Tue Jun 7 14:59:46 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Flash_2_Ram_Test

Flash_2_Ram_Test
[GPDMA]

Defines

#define | DMA_SIZE 16

Functions

void | DMA_IRQHandler (void)
GPDMA interrupt handler sub-routine.
void | print_menu (void)
Print Welcome menu.
void | Buffer_Verify (void)
Verify buffer.
int | c_entry (void)
c_entry: Main program body
int | main (void)
void | check_failed (uint8_t *file, uint32_t line)

Variables

uint8_t | menu []
uint8_t | menu2 [] = "Demo terminated! \n\r"
uint8_t | err_menu [] = "Buffer Check fail!"
uint8_t | compl_menu [] = "Buffer Check success!"
const uint32_t | DMASrc_Buffer [DMA_SIZE]
uint32_t | DMADest_Buffer [DMA_SIZE]
__IO uint32_t | Channel0_TC
__IO uint32_t | Channel0_Err

Define Documentation

#define DMA_SIZE 16

DMA transfer size

Definition at line 38 of file flash_2_ram.c.

Function Documentation

void Buffer_Verify ( void )

Verify buffer.

Parameters:
[in] none
Returns:
None
Parameters:
[in] none
Returns:
TRUE - if two buffers are similar FALSE - if two buffers are different
Parameters:
[in] none
Returns:
TRUE: if two buffers are similar FALSE: if two buffers are different

Definition at line 120 of file flash_2_ram.c.

int c_entry ( void )

c_entry: Main program body

Parameters:
[in] None
Returns:
int

Definition at line 157 of file flash_2_ram.c.

void check_failed | ( | uint8_t * | file,
 |  | uint32_t | line
 | ) |  |

Definition at line 247 of file flash_2_ram.c.

void DMA_IRQHandler ( void )

GPDMA interrupt handler sub-routine.

Parameters:
[in] None
Returns:
None

int main ( void )

Definition at line 235 of file flash_2_ram.c.

void print_menu ( void )

Print Welcome menu.

Parameters:
[in] none
Returns:
None
Print Welcome menu.

Print menu.

Parameters:
[in] none
Returns:
none

Definition at line 209 of file can_test_two_kit.c.

Variable Documentation

__IO uint32_t Channel0_Err

Definition at line 70 of file flash_2_ram.c.

__IO uint32_t Channel0_TC

Definition at line 67 of file flash_2_ram.c.

uint8_t compl_menu[] = "Buffer Check success!"

Definition at line 53 of file flash_2_ram.c.

uint32_t DMADest_Buffer[DMA_SIZE]

Definition at line 64 of file flash_2_ram.c.

const uint32_t DMASrc_Buffer[DMA_SIZE]

Initial value:

{
        0x01020304,0x05060708,0x090A0B0C,0x0D0E0F10,
        0x11121314,0x15161718,0x191A1B1C,0x1D1E1F20,
        0x21222324,0x25262728,0x292A2B2C,0x2D2E2F30,
        0x31323334,0x35363738,0x393A3B3C,0x3D3E3F40
}

Definition at line 56 of file flash_2_ram.c.

uint8_t err_menu[] = "Buffer Check fail!"

Definition at line 52 of file flash_2_ram.c.

uint8_t menu[]

Initial value:

        "********************************************************************************\n\r"
        "Hello NXP Semiconductors \n\r"
        "GPDMA demo \n\r"
        "\t - MCU: LPC17xx \n\r"
        "\t - Core: ARM CORTEX-M3 \n\r"
        "\t - Communicate via: UART0 - 115200 bps \n\r"
        "This example used to test GPDMA function by transfer data from Flash \n\r"
        "to RAM memory\n\r"
        "********************************************************************************\n\r"

Definition at line 41 of file flash_2_ram.c.

uint8_t menu2[] = "Demo terminated! \n\r"

Definition at line 51 of file flash_2_ram.c.

Generated on Tue Jun 7 14:59:52 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: GPDMA_Sleep

GPDMA_Sleep
[GPDMA]

Defines

#define | DMA_SIZE 0x100UL
#define | DMA_SRC LPC_AHBRAM1_BASE
#define | DMA_DST (DMA_SRC+DMA_SIZE)

Functions

void | DMA_IRQHandler (void)
GPDMA interrupt handler sub-routine.
void | print_menu (void)
Print Welcome menu.
void | Buffer_Init (void)
Initialize buffer.
void | Error_Loop (void)
Error Loop (called by Buffer_Verify() if any error).
void | Buffer_Verify (void)
Verify buffer.
int | c_entry (void)
c_entry: Main program body
int | main (void)
void | check_failed (uint8_t *file, uint32_t line)

Variables

uint8_t | menu1 []
uint8_t | menu2 [] = "Demo terminated! \n\r"
uint8_t | err_menu [] = "Buffer Check fail!"
uint8_t | compl_menu [] = "Buffer Check success!"
__IO uint32_t | Channel0_TC
__IO uint32_t | Channel0_Err

Define Documentation

#define DMA_DST (DMA_SRC+DMA_SIZE)

DMA Source Address is (AHBRAM1_BASE + DMA_SIZE) that used for USB RAM purpose, but it is not used in this example, so this memory section can be used for general purpose memory

Definition at line 49 of file gpdma_sleep.c.

#define DMA_SIZE 0x100UL

DMA transfer size

Definition at line 39 of file gpdma_sleep.c.

#define DMA_SRC LPC_AHBRAM1_BASE

DMA Source Address is AHBRAM1_BASE that used for USB RAM purpose, but it is not used in this example, so this memory section can be used for general purpose memory

Definition at line 44 of file gpdma_sleep.c.

Function Documentation

void Buffer_Init ( void )

Initialize buffer.

Parameters:
[in] none
Returns:
None

void Buffer_Verify ( void )

Verify buffer.

Parameters:
[in] none
Returns:
None

Definition at line 141 of file gpdma_sleep.c.

int c_entry ( void )

c_entry: Main program body

Parameters:
[in] None
Returns:
int

Definition at line 178 of file gpdma_sleep.c.

void check_failed | ( | uint8_t * | file,
 |  | uint32_t | line
 | ) |  |

Definition at line 277 of file gpdma_sleep.c.

void DMA_IRQHandler ( void )

GPDMA interrupt handler sub-routine.

Parameters:
[in] None
Returns:
None

void Error_Loop ( void )

Error Loop (called by Buffer_Verify() if any error).

Parameters:
[in] none
Returns:
None

int main ( void )

Definition at line 263 of file gpdma_sleep.c.

void print_menu ( void )

Print Welcome menu.

Parameters:
[in] none
Returns:
None
Print Welcome menu.

Print menu.

Parameters:
[in] none
Returns:
none

Definition at line 209 of file can_test_two_kit.c.

Variable Documentation

__IO uint32_t Channel0_Err

Definition at line 72 of file gpdma_sleep.c.

__IO uint32_t Channel0_TC

Definition at line 69 of file gpdma_sleep.c.

uint8_t compl_menu[] = "Buffer Check success!"

Definition at line 66 of file gpdma_sleep.c.

uint8_t err_menu[] = "Buffer Check fail!"

Definition at line 65 of file gpdma_sleep.c.

uint8_t menu1[]

Initial value:

        "********************************************************************************\n\r"
        "Hello NXP Semiconductors \n\r"
        "GPDMA demo \n\r"
        "\t - MCU: LPC17xx \n\r"
        "\t - Core: ARM Cortex-M3 \n\r"
        "\t - Communicate via: UART0 - 115200bps \n\r"
        " This example used to test GPDMA function in sleep mode\n\r"
        " It will transfer 2 blocks of data from memory boundary \n\r"
        " to the other memory boundary on RAM using GPDMA module in sleep mode \n\r"
        "********************************************************************************\n\r"

Definition at line 53 of file gpdma_sleep.c.

uint8_t menu2[] = "Demo terminated! \n\r"

Definition at line 64 of file gpdma_sleep.c.

Generated on Tue Jun 7 14:59:53 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Link_list

Link_list
[GPDMA]

Defines

#define | DMA_SIZE 32

Functions

uint32_t DMASrc_Buffer1[DMA_SIZE/2] | __attribute__ ((at(0x2007C000)))
uint32_t DMASrc_Buffer2[DMA_SIZE/2] | __attribute__ ((at(0x2007C200)))
void | DMA_IRQHandler (void)
GPDMA interrupt handler sub-routine.
void | print_menu (void)
Print Welcome menu.
void | Error_Loop (void)
Error Loop (called by Buffer_Verify() if any error).
void | Buffer_Verify (void)
Verify buffer.
int | c_entry (void)
c_entry: Main program body
int | main (void)
void | check_failed (uint8_t *file, uint32_t line)

Variables

uint8_t | menu []
uint8_t | menu2 [] = "Demo terminated! \n\r"
uint8_t | err_menu [] = "Buffer Check fail!\n\r"
uint8_t | compl_menu [] = "Buffer Check success!\n\r"
uint32_t | DMADest_Buffer [DMA_SIZE]
__IO uint32_t | Channel0_TC
__IO uint32_t | Channel0_Err

Define Documentation

#define DMA_SIZE 32

DMA transfer size

Definition at line 37 of file link_list.c.

Function Documentation

uint32_t DMASrc_Buffer2 [DMA_SIZE/2] __attribute__ ( (at(0x2007C200)) )

uint32_t DMASrc_Buffer1 [DMA_SIZE/2] __attribute__ ( (at(0x2007C000)) )

void Buffer_Verify ( void )

Verify buffer.

Parameters:
[in] none
Returns:
None

Definition at line 134 of file link_list.c.

int c_entry ( void )

c_entry: Main program body

Parameters:
[in] None
Returns:
int

Definition at line 180 of file link_list.c.

void check_failed | ( | uint8_t * | file,
 |  | uint32_t | line
 | ) |  |

Definition at line 291 of file link_list.c.

void DMA_IRQHandler ( void )

GPDMA interrupt handler sub-routine.

Parameters:
[in] None
Returns:
None

void Error_Loop ( void )

Error Loop (called by Buffer_Verify() if any error).

Parameters:
[in] none
Returns:
None

int main ( void )

Definition at line 279 of file link_list.c.

void print_menu ( void )

Print Welcome menu.

Parameters:
[in] none
Returns:
None
Print Welcome menu.

Print menu.

Parameters:
[in] none
Returns:
none

Definition at line 209 of file can_test_two_kit.c.

Variable Documentation

__IO uint32_t Channel0_Err

Definition at line 72 of file link_list.c.

__IO uint32_t Channel0_TC

Definition at line 69 of file link_list.c.

uint8_t compl_menu[] = "Buffer Check success!\n\r"

Definition at line 51 of file link_list.c.

uint32_t DMADest_Buffer[DMA_SIZE]

Definition at line 53 of file link_list.c.

uint8_t err_menu[] = "Buffer Check fail!\n\r"

Definition at line 50 of file link_list.c.

uint8_t menu[]

Initial value:

        "********************************************************************************\n\r"
        "Hello NXP Semiconductors \n\r"
        "GPDMA demo \n\r"
        "\t - MCU: LPC17xx \n\r"
        "\t - Core: ARM CORTEX-M3 \n\r"
        "\t - Communicate via: UART0 - 115200 bps \n\r"
        "This example used to test GPDMA link list function \n\r"
        "********************************************************************************\n\r"

Definition at line 40 of file link_list.c.

uint8_t menu2[] = "Demo terminated! \n\r"

Definition at line 49 of file link_list.c.

Generated on Tue Jun 7 14:59:53 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Ram_2_Ram_Test

Ram_2_Ram_Test
[GPDMA]

Defines

#define | DMA_SIZE 0x100UL
#define | DMA_SRC LPC_AHBRAM1_BASE
#define | DMA_DST (DMA_SRC+DMA_SIZE)

Functions

void | DMA_IRQHandler (void)
GPDMA interrupt handler sub-routine.
void | print_menu (void)
Print Welcome menu.
void | Buffer_Init (void)
Initialize buffer.
void | Error_Loop (void)
Error Loop (called by Buffer_Verify() if any error).
void | Buffer_Verify (void)
Verify buffer.
int | c_entry (void)
c_entry: Main program body
int | main (void)
void | check_failed (uint8_t *file, uint32_t line)

Variables

uint8_t | menu1 []
uint8_t | menu2 [] = "Demo terminated! \n\r"
uint8_t | err_menu [] = "Buffer Check fail!"
uint8_t | compl_menu [] = "Buffer Check success!"
__IO uint32_t | Channel0_TC
__IO uint32_t | Channel0_Err

Define Documentation

#define DMA_DST (DMA_SRC+DMA_SIZE)

DMA Source Address is (AHBRAM1_BASE + DMA_SIZE) that used for USB RAM purpose, but it is not used in this example, so this memory section can be used for general purpose memory

Definition at line 48 of file gpdma_r2r_test.c.

#define DMA_SIZE 0x100UL

DMA transfer size

Definition at line 38 of file gpdma_r2r_test.c.

#define DMA_SRC LPC_AHBRAM1_BASE

DMA Source Address is AHBRAM1_BASE that used for USB RAM purpose, but it is not used in this example, so this memory section can be used for general purpose memory

Definition at line 43 of file gpdma_r2r_test.c.

Function Documentation

void Buffer_Init ( void )

Initialize buffer.

Parameters:
[in] none
Returns:
None

void Buffer_Verify ( void )

Verify buffer.

Parameters:
[in] none
Returns:
None

Definition at line 139 of file gpdma_r2r_test.c.

int c_entry ( void )

c_entry: Main program body

Parameters:
[in] None
Returns:
int

Definition at line 176 of file gpdma_r2r_test.c.

void check_failed | ( | uint8_t * | file,
 |  | uint32_t | line
 | ) |  |

Definition at line 272 of file gpdma_r2r_test.c.

void DMA_IRQHandler ( void )

GPDMA interrupt handler sub-routine.

Parameters:
[in] None
Returns:
None

void Error_Loop ( void )

Error Loop (called by Buffer_Verify() if any error).

Parameters:
[in] none
Returns:
None

int main ( void )

Definition at line 258 of file gpdma_r2r_test.c.

void print_menu ( void )

Print Welcome menu.

Parameters:
[in] none
Returns:
None
Print Welcome menu.

Print menu.

Parameters:
[in] none
Returns:
none

Definition at line 209 of file can_test_two_kit.c.

Variable Documentation

__IO uint32_t Channel0_Err

Definition at line 70 of file gpdma_r2r_test.c.

__IO uint32_t Channel0_TC

Definition at line 67 of file gpdma_r2r_test.c.

uint8_t compl_menu[] = "Buffer Check success!"

Definition at line 64 of file gpdma_r2r_test.c.

uint8_t err_menu[] = "Buffer Check fail!"

Definition at line 63 of file gpdma_r2r_test.c.

uint8_t menu1[]

Initial value:

"********************************************************************************\n\r"
"Hello NXP Semiconductors \n\r"
"GPDMA demo \n\r"
"\t - MCU: LPC17xx \n\r"
"\t - Core: ARM Cortex-M3 \n\r"
"\t - Communicate via: UART0 - 115200bps \n\r"
" This example will transfer 2 blocks of data from memory boundary \n\r"
" to the other memory boundary on RAM using GPDMA module with interrupt \n\r"
"********************************************************************************\n\r"

Definition at line 52 of file gpdma_r2r_test.c.

uint8_t menu2[] = "Demo terminated! \n\r"

Definition at line 62 of file gpdma_r2r_test.c.

Generated on Tue Jun 7 14:59:53 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: GPIO

GPIO
[LPC1700CMSIS Examples]

Modules

GPIO_Interrupt
LedBlinky
Generated on Tue Jun 7 14:59:46 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: GPIO_Interrupt

GPIO_Interrupt
[GPIO]

Defines

#define | MCB_LPC_1768
#define | POLL_LED (1<<4)
#define | INT3_LED (1<<5)
#define | GPIO_INT (1<<25)

Functions

void | EINT3_IRQHandler (void)
External interrupt 3 handler sub-routine.
int | c_entry (void)
c_entry: Main program body
int | main (void)
void | check_failed (uint8_t *file, uint32_t line)

Define Documentation

#define GPIO_INT (1<<25)

Definition at line 44 of file gpio_int.c.

#define INT3_LED (1<<5)

Definition at line 43 of file gpio_int.c.

#define MCB_LPC_1768

Definition at line 37 of file gpio_int.c.

#define POLL_LED (1<<4)

Definition at line 42 of file gpio_int.c.

Function Documentation

int c_entry ( void )

c_entry: Main program body

Parameters:
[in] None
Returns:
int

Use: LEDs for polling when idle and when GPIO interrupt occurs If using MCB1700 board: Polling led: P1.28; Interrupt led: P1.29 If using IAR KS board: Polling led: P1.25 (LED1); Interrupt led: P0.4 (LED2)

Definition at line 112 of file gpio_int.c.

void check_failed | ( | uint8_t * | file,
 |  | uint32_t | line
 | ) |  |

Definition at line 168 of file gpio_int.c.

void EINT3_IRQHandler ( void )

External interrupt 3 handler sub-routine.

Parameters:
[in] None
Returns:
None

int main ( void )

Definition at line 155 of file gpio_int.c.

Generated on Tue Jun 7 14:59:53 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: LedBlinky

LedBlinky
[GPIO]

Defines

#define | MCB_LPC_1768
#define | LED_NUM 8

Functions

void | SysTick_Handler (void)
SysTick handler sub-routine (1ms).
void | Delay (unsigned long tick)
Delay function.
int | c_entry (void)
c_entry: Main program body
int | main (void)
void | check_failed (uint8_t *file, uint32_t line)

Variables

const unsigned long | led_mask [] = { 1<<28, 1<<29, 1UL<<31, 1<<2, 1<<3, 1<<4, 1<<5, 1<<6 }
volatile unsigned long | SysTickCnt

Define Documentation

#define LED_NUM 8

Definition at line 41 of file LedBlinky.c.

#define MCB_LPC_1768

Definition at line 36 of file LedBlinky.c.

Function Documentation

int c_entry ( void )

c_entry: Main program body

Parameters:
[in] None
Returns:
int

Definition at line 83 of file LedBlinky.c.

void check_failed | ( | uint8_t * | file,
 |  | uint32_t | line
 | ) |  |

Definition at line 149 of file LedBlinky.c.

void Delay ( unsigned long tick )

Delay function.

Parameters:
[in] tick - number milisecond of delay time
Returns:
None

Definition at line 70 of file LedBlinky.c.

int main ( void )

Definition at line 136 of file LedBlinky.c.

void SysTick_Handler ( void )

SysTick handler sub-routine (1ms).

Parameters:
[in] None
Returns:
None
SysTick interrupt handler.

Parameters:
[in] None
Returns:
None
Parameters:
None
Returns:
None

Definition at line 9 of file clock-arch.c.

Variable Documentation

const unsigned long led_mask[] = { 1<<28, 1<<29, 1UL<<31, 1<<2, 1<<3, 1<<4, 1<<5, 1<<6 }

Definition at line 42 of file LedBlinky.c.

volatile unsigned long SysTickCnt

Definition at line 47 of file LedBlinky.c.

Generated on Tue Jun 7 14:59:53 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: I2C

I2C
[LPC1700CMSIS Examples]

Modules

master
Master_Slave_Interrupt
Monitor
pca8581_polling
sc16is750_int
sc16is750_polling
slave
Generated on Tue Jun 7 14:59:46 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: master

master
[I2C]

Defines

#define | USEDI2CDEV_M 0
#define | I2CDEV_S_ADDR (0x90>>1)
#define | BUFFER_SIZE 0x10
#define | I2CDEV_M LPC_I2C0

Functions

void | print_menu (void)
Print Welcome menu.
int | c_entry (void)
c_entry: Main program body
int | main (void)
void | check_failed (uint8_t *file, uint32_t line)

Variables

uint8_t | menu1 []
uint8_t | Master_Buf [BUFFER_SIZE]
uint8_t | master_test [2]

Define Documentation

#define BUFFER_SIZE 0x10

Max buffer length

Definition at line 43 of file master.c.

#define I2CDEV_M LPC_I2C0

Definition at line 46 of file master.c.

#define I2CDEV_S_ADDR (0x90>>1)

Own Slave address in Slave I2C device

Definition at line 40 of file master.c.

#define USEDI2CDEV_M 0

Used I2C device as slave definition

Definition at line 38 of file master.c.

Function Documentation

int c_entry ( void )

c_entry: Main program body

Parameters:
[in] None
Returns:
int

Definition at line 118 of file master.c.

void check_failed | ( | uint8_t * | file,
 |  | uint32_t | line
 | ) |  |

Definition at line 270 of file master.c.

int main ( void )

Definition at line 256 of file master.c.

void print_menu ( void )

Print Welcome menu.

Parameters:
[in] none
Returns:
None
Print Welcome menu.

Print menu.

Parameters:
[in] none
Returns:
none

Definition at line 209 of file can_test_two_kit.c.

Variable Documentation

uint8_t Master_Buf[BUFFER_SIZE]

These global variables below used in interrupt mode - Slave device ----------------

Definition at line 66 of file master.c.

uint8_t master_test[2]

Definition at line 67 of file master.c.

uint8_t menu1[]

Initial value:

"********************************************************************************\n\r"
"Hello NXP Semiconductors \n\r"
"I2C demo \n\r"
"\t - MCU: LPC17xx \n\r"
"\t - Core: ARM Cortex-M3 \n\r"
"\t - This example uses two I2C peripheral, one set as master and \n\r"
"\t the other set as slave \n\r"
"\t Test Master mode as alone device \n\r"
"********************************************************************************\n\r"

Definition at line 54 of file master.c.

Generated on Tue Jun 7 14:59:53 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Master_Slave_Interrupt

Master_Slave_Interrupt
[I2C]

Defines

#define | USEDI2CDEV_M 2
#define | USEDI2CDEV_S 0
#define | I2CDEV_S_OWN_ADDR (0x90>>1)
#define | BUFFER_SIZE 0x10
#define | I2CDEV_M LPC_I2C2
#define | I2CDEV_S LPC_I2C0

Functions

void | I2C2_IRQHandler (void)
Main I2C2 interrupt handler sub-routine.
void | print_menu (void)
Print Welcome menu.
void | Error_Loop_M (uint8_t ErrorCode)
A subroutine that will be called if there's any error on I2C operation (master).
void | Error_Loop_S (uint8_t ErrorCode)
A subroutine that will be called if there's any error on I2C operation (slave).
void | Buffer_Init (uint8_t type)
Initialize buffer.
int | c_entry (void)
c_entry: Main program body
int | main (void)
void | check_failed (uint8_t *file, uint32_t line)

Variables

uint8_t | menu1 []
__IO FlagStatus | complete_M
uint8_t | Master_Buf [BUFFER_SIZE]
__IO FlagStatus | complete_S
uint8_t | Slave_Buf [BUFFER_SIZE]
uint8_t | master_test [2]
uint8_t | slave_test [2]

Define Documentation

#define BUFFER_SIZE 0x10

Max buffer length

Definition at line 47 of file i2c_master_slave_int_test.c.

#define I2CDEV_M LPC_I2C2

Definition at line 57 of file i2c_master_slave_int_test.c.

#define I2CDEV_S LPC_I2C0

Definition at line 64 of file i2c_master_slave_int_test.c.

#define I2CDEV_S_OWN_ADDR (0x90>>1)

Own Slave address in Slave I2C device

Definition at line 44 of file i2c_master_slave_int_test.c.

#define USEDI2CDEV_M 2

Used I2C device as master definition

Definition at line 39 of file i2c_master_slave_int_test.c.

#define USEDI2CDEV_S 0

Used I2C device as slave definition

Definition at line 42 of file i2c_master_slave_int_test.c.

Function Documentation

void Buffer_Init ( uint8_t type )

Initialize buffer.

Parameters:
[in] type,:
  • 0: Initialize Master_Buf with increment value from 0 Fill all member in Slave_Buf with 0
  • 1: Initialize Slave_Buf with increment value from 0 Fill all member in Master_Buf with 0
Returns:
None

Definition at line 183 of file i2c_master_slave_int_test.c.

int c_entry ( void )

c_entry: Main program body

Parameters:
[in] None
Returns:
int

Definition at line 237 of file i2c_master_slave_int_test.c.

void check_failed | ( | uint8_t * | file,
 |  | uint32_t | line
 | ) |  |

Definition at line 507 of file i2c_master_slave_int_test.c.

void Error_Loop_M ( uint8_t ErrorCode )

A subroutine that will be called if there's any error on I2C operation (master).

Parameters:
[in] ErrorCode Error Code Input
Returns:
None

Definition at line 209 of file i2c_master_slave_int_test.c.

void Error_Loop_S ( uint8_t ErrorCode )

A subroutine that will be called if there's any error on I2C operation (slave).

Parameters:
[in] ErrorCode Error Code Input
Returns:
None

Definition at line 223 of file i2c_master_slave_int_test.c.

void I2C2_IRQHandler ( void )

Main I2C2 interrupt handler sub-routine.

Parameters:
[in] None
Returns:
None

Definition at line 145 of file i2c_master_slave_int_test.c.

int main ( void )

Definition at line 493 of file i2c_master_slave_int_test.c.

void print_menu ( void )

Print Welcome menu.

Parameters:
[in] none
Returns:
None
Print Welcome menu.

Print menu.

Parameters:
[in] none
Returns:
none

Definition at line 209 of file can_test_two_kit.c.

Variable Documentation

__IO FlagStatus complete_M

These global variables below used in interrupt mode - Master device -----------

Definition at line 86 of file i2c_master_slave_int_test.c.

__IO FlagStatus complete_S

These global variables below used in interrupt mode - Slave device ------------

Definition at line 91 of file i2c_master_slave_int_test.c.

uint8_t Master_Buf[BUFFER_SIZE]

Definition at line 87 of file i2c_master_slave_int_test.c.

uint8_t master_test[2]

Definition at line 95 of file i2c_master_slave_int_test.c.

uint8_t menu1[]

Initial value:

"********************************************************************************\n\r"
"Hello NXP Semiconductors \n\r"
"I2C demo \n\r"
"\t - MCU: LPC17xx \n\r"
"\t - Core: ARM Cortex-M3 \n\r"
"\t - This example uses two I2C peripheral, one set as master and \n\r"
"\t the other set as slave \n\r"
"\t First, the master send 16 bytes of data to slave \n\r"
"\t Then, the master receive 16 bytes of data from slave \n\r"
"\t Both of them used in interrupt mode \n\r"
"********************************************************************************\n\r"

Definition at line 72 of file i2c_master_slave_int_test.c.

uint8_t Slave_Buf[BUFFER_SIZE]

Definition at line 92 of file i2c_master_slave_int_test.c.

uint8_t slave_test[2]

Definition at line 96 of file i2c_master_slave_int_test.c.

Generated on Tue Jun 7 14:59:53 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Monitor

Monitor
[I2C]

Defines

#define | I2CDEV LPC_I2C0
#define | BUFFER_SIZE 0x80

Functions

void | I2C0_IRQHandler (void)
Main I2C0 interrupt handler sub-routine.
void | print_menu (void)
Print Welcome menu.
int | c_entry (void)
c_entry: Main program body
int | main (void)
void | check_failed (uint8_t *file, uint32_t line)

Variables

uint8_t | menu1 []
uint8_t | buffer [BUFFER_SIZE]
BOOL_8 | done = FALSE
uint32_t | count = 0

Define Documentation

#define BUFFER_SIZE 0x80

Max buffer length

Definition at line 41 of file i2c_monitor.c.

#define I2CDEV LPC_I2C0

Definition at line 38 of file i2c_monitor.c.

Function Documentation

int c_entry ( void )

c_entry: Main program body

Parameters:
[in] None
Returns:
int

Definition at line 95 of file i2c_monitor.c.

void check_failed | ( | uint8_t * | file,
 |  | uint32_t | line
 | ) |  |

Definition at line 224 of file i2c_monitor.c.

void I2C0_IRQHandler ( void )

Main I2C0 interrupt handler sub-routine.

Parameters:
[in] None
Returns:
None

int main ( void )

Definition at line 210 of file i2c_monitor.c.

void print_menu ( void )

Print Welcome menu.

Parameters:
[in] none
Returns:
None
Print Welcome menu.

Print menu.

Parameters:
[in] none
Returns:
none

Definition at line 209 of file can_test_two_kit.c.

Variable Documentation

uint8_t buffer[BUFFER_SIZE]

Definition at line 55 of file i2c_monitor.c.

uint32_t count = 0

Definition at line 57 of file i2c_monitor.c.

BOOL_8 done = FALSE

Definition at line 56 of file i2c_monitor.c.

uint8_t menu1[]

Initial value:

"********************************************************************************\n\r"
"Hello NXP Semiconductors \n\r"
"I2C monitor I2C bus demo \n\r"
"\t - MCU: LPC17xx \n\r"
"\t - Core: ARM Cortex-M3 \n\r"
"\t - This example describes how to uses I2C peripheral on LPC1768 \n\r"
"\t in monitor mode. \n\r"
"\t I2C0 monitors I2C data transfered on I2C bus. \n\r"
"\t UART0 (115200bps, 8 data bit, no parity, 1 stop bit, no flow control) \n\r"
"\t is used to display captured data. \n\r"
"********************************************************************************\n\r"

Definition at line 43 of file i2c_monitor.c.

Generated on Tue Jun 7 14:59:53 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: pca8581_polling

pca8581_polling
[I2C]

Defines

#define | USEDI2CDEV 0
#define | PCA8581_SLVADDR (0xA0>>1)
#define | I2CDEV LPC_I2C0

Functions

int32_t | PCA8581_Write (void)
Write a number of data byte into EEPROM PCA8581.
int32_t | PCA8581_Read (void)
Read a number of data byte from EEPROM PCA8581.
void | print_menu (void)
Print Welcome menu.
int | c_entry (void)
c_entry: Main program body
int | main (void)
void | check_failed (uint8_t *file, uint32_t line)

Variables

uint8_t | menu1 []
uint8_t | menu2 [] = "Demo terminated! \n\r"
uint8_t | pca8581_wrdat []
uint8_t | pca8581_rddat []
I2C_M_SETUP_Type txsetup
I2C_M_SETUP_Type rxsetup

Define Documentation

#define I2CDEV LPC_I2C0

Definition at line 46 of file pca8581_test.c.

#define PCA8581_SLVADDR (0xA0>>1)

Definition at line 43 of file pca8581_test.c.

#define USEDI2CDEV 0

Used I2C device definition, should be 0 or 2

Definition at line 39 of file pca8581_test.c.

Function Documentation

int c_entry ( void )

c_entry: Main program body

Parameters:
[in] None
Returns:
int

Definition at line 183 of file pca8581_test.c.

void check_failed | ( | uint8_t * | file,
 |  | uint32_t | line
 | ) |  |

Definition at line 285 of file pca8581_test.c.

int main ( void )

Definition at line 271 of file pca8581_test.c.

int32_t PCA8581_Read ( void )

Read a number of data byte from EEPROM PCA8581.

Parameters:
[in] None
Returns:
0: if success, otherwise (-1) returned.

Definition at line 132 of file pca8581_test.c.

int32_t PCA8581_Write ( void )

Write a number of data byte into EEPROM PCA8581.

Parameters:
[in] None
Returns:
0: if success, otherwise (-1) returned.

Definition at line 111 of file pca8581_test.c.

void print_menu ( void )

Print Welcome menu.

Parameters:
[in] none
Returns:
None
Print Welcome menu.

Print menu.

Parameters:
[in] none
Returns:
none

Definition at line 209 of file can_test_two_kit.c.

Variable Documentation

uint8_t menu1[]

Initial value:

"********************************************************************************\n\r"
"Hello NXP Semiconductors \n\r"
"I2C demo \n\r"
"\t - MCU: LPC17xx \n\r"
"\t - Core: ARM Cortex-M3 \n\r"
"\t - Communicate via: UART0 - 115.2 kbps \n\r"
" An example of I2C using polling mode to test the I2C driver \n\r"
" EEPROM PCA8581 to transfer a number of data byte \n\r"
"********************************************************************************\n\r"

Definition at line 55 of file pca8581_test.c.

uint8_t menu2[] = "Demo terminated! \n\r"

Definition at line 65 of file pca8581_test.c.

uint8_t pca8581_rddat[]

Initial value:

 {

                0x00,
                0x00,
                0x00,
                0x00,
                0x00,
                0x00,
                0x00,
                0x00,
}

Definition at line 81 of file pca8581_test.c.

uint8_t pca8581_wrdat[]

Initial value:

 {
                (0x01<<3),

                0x00,
                0x11,
                0x22,
                0x33,
                0x44,
                0x55,
                0x66,
                0x77,
}

Definition at line 68 of file pca8581_test.c.

I2C_M_SETUP_Type rxsetup

Definition at line 97 of file pca8581_test.c.

I2C_M_SETUP_Type txsetup

Definition at line 95 of file pca8581_test.c.

Generated on Tue Jun 7 14:59:53 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: sc16is750_int

sc16is750_int
[I2C]

Defines

#define | USEDI2CDEV 0
#define | IODIR 0x0A
#define | IOSTATE 0x0B
#define | IOCON 0x0E
#define | SLVADDR (0x90>>1)
#define | REGS_ADDR(n) (n<<3)
#define | I2CDEV LPC_I2C0

Functions

void | I2C0_IRQHandler (void)
Main I2C0 interrupt handler sub-routine.
void | print_menu (void)
Print Welcome menu.
void | Error_Loop (uint8_t ErrorCode)
A subroutine that will be called if there's any error on I2C operation.
int | c_entry (void)
c_entry: Main program body
int | main (void)
void | check_failed (uint8_t *file, uint32_t line)

Variables

uint8_t | menu1 []
uint8_t | menu2 [] = "Demo terminated! \n\r"
uint8_t | iocon_cfg [2] = {REGS_ADDR(IOCON), 0x00}
uint8_t | iodir_cfg [2] = {REGS_ADDR(IODIR), 0xFF}
uint8_t | iostate_cfg_0 [2] = {REGS_ADDR(IOSTATE), 0x00}
uint8_t | iostate_cfg_1 [2] = {REGS_ADDR(IOSTATE), 0xFF}
__IO FlagStatus | complete

Define Documentation

#define I2CDEV LPC_I2C0

Definition at line 51 of file i2c_interrupt_test.c.

#define IOCON 0x0E

Definition at line 45 of file i2c_interrupt_test.c.

#define IODIR 0x0A

Definition at line 43 of file i2c_interrupt_test.c.

#define IOSTATE 0x0B

Definition at line 44 of file i2c_interrupt_test.c.

#define REGS_ADDR ( n ) (n<<3)

Definition at line 47 of file i2c_interrupt_test.c.

#define SLVADDR (0x90>>1)

Definition at line 46 of file i2c_interrupt_test.c.

#define USEDI2CDEV 0

Used I2C device definition, should be 0 or 2

Definition at line 40 of file i2c_interrupt_test.c.

Function Documentation

int c_entry ( void )

c_entry: Main program body

Parameters:
[in] None
Returns:
int

Definition at line 153 of file i2c_interrupt_test.c.

void check_failed | ( | uint8_t * | file,
 |  | uint32_t | line
 | ) |  |

Definition at line 370 of file i2c_interrupt_test.c.

void Error_Loop ( uint8_t ErrorCode )

A subroutine that will be called if there's any error on I2C operation.

Parameters:
[in] ErrorCode Error Code Input
Returns:
None

Definition at line 138 of file i2c_interrupt_test.c.

void I2C0_IRQHandler ( void )

Main I2C0 interrupt handler sub-routine.

Parameters:
[in] None
Returns:
None

int main ( void )

Definition at line 356 of file i2c_interrupt_test.c.

void print_menu ( void )

Print Welcome menu.

Parameters:
[in] none
Returns:
None
Print Welcome menu.

Print menu.

Parameters:
[in] none
Returns:
none

Definition at line 209 of file can_test_two_kit.c.

Variable Documentation

__IO FlagStatus complete

Definition at line 78 of file i2c_interrupt_test.c.

uint8_t iocon_cfg[2] = {REGS_ADDR(IOCON), 0x00}

Definition at line 73 of file i2c_interrupt_test.c.

uint8_t iodir_cfg[2] = {REGS_ADDR(IODIR), 0xFF}

Definition at line 74 of file i2c_interrupt_test.c.

uint8_t iostate_cfg_0[2] = {REGS_ADDR(IOSTATE), 0x00}

Definition at line 75 of file i2c_interrupt_test.c.

uint8_t iostate_cfg_1[2] = {REGS_ADDR(IOSTATE), 0xFF}

Definition at line 76 of file i2c_interrupt_test.c.

uint8_t menu1[]

Initial value:

"********************************************************************************\n\r"
"Hello NXP Semiconductors \n\r"
"I2C demo \n\r"
"\t - MCU: LPC17xx \n\r"
"\t - Core: ARM Cortex-M3 \n\r"
"\t - Communicate via: UART0 - 115.2 kbps \n\r"
" Communicate with I2C function on SC16IS750/760 Demo Board\n\r"
" Use IO function on SC16IS740/750/760 chip to turn ON/OFF LEDs\n\r"
"Press '1' to turn ON LEDs, '2' to turn OFF LEDs \n\r"
"********************************************************************************\n\r"

Definition at line 59 of file i2c_interrupt_test.c.

uint8_t menu2[] = "Demo terminated! \n\r"

Definition at line 70 of file i2c_interrupt_test.c.

Generated on Tue Jun 7 14:59:53 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: sc16is750_polling

sc16is750_polling
[I2C]

Defines

#define | USEDI2CDEV 0
#define | IODIR 0x0A
#define | IOSTATE 0x0B
#define | IOCON 0x0E
#define | SLVADDR (0x90>>1)
#define | REGS_ADDR(n) (n<<3)
#define | I2CDEV LPC_I2C0

Functions

void | print_menu (void)
Print Welcome menu.
void | Error_Loop (uint32_t ErrorCode)
A subroutine that will be called if there's any error on I2C operation.
int | c_entry (void)
c_entry: Main program body
int | main (void)
void | check_failed (uint8_t *file, uint32_t line)

Variables

uint8_t | menu1 []
uint8_t | menu2 [] = "Demo terminated! \n\r"
uint8_t | iocon_cfg [2] = {REGS_ADDR(IOCON), 0x00}
uint8_t | iodir_cfg [2] = {REGS_ADDR(IODIR), 0xFF}
uint8_t | iostate_cfg_0 [2] = {REGS_ADDR(IOSTATE), 0x00}
uint8_t | iostate_cfg_1 [2] = {REGS_ADDR(IOSTATE), 0xFF}

Define Documentation

#define I2CDEV LPC_I2C0

Definition at line 50 of file i2c_polling_test.c.

#define IOCON 0x0E

Definition at line 45 of file i2c_polling_test.c.

#define IODIR 0x0A

Definition at line 43 of file i2c_polling_test.c.

#define IOSTATE 0x0B

Definition at line 44 of file i2c_polling_test.c.

#define REGS_ADDR ( n ) (n<<3)

Definition at line 47 of file i2c_polling_test.c.

#define SLVADDR (0x90>>1)

Definition at line 46 of file i2c_polling_test.c.

#define USEDI2CDEV 0

Used I2C device definition, should be 0 or 2

Definition at line 40 of file i2c_polling_test.c.

Function Documentation

int c_entry ( void )

c_entry: Main program body

Parameters:
[in] None
Returns:
int

Definition at line 120 of file i2c_polling_test.c.

void check_failed | ( | uint8_t * | file,
 |  | uint32_t | line
 | ) |  |

Definition at line 319 of file i2c_polling_test.c.

void Error_Loop ( uint32_t ErrorCode )

A subroutine that will be called if there's any error on I2C operation.

Parameters:
[in] ErrorCode Error Code Input
Returns:
None

int main ( void )

Definition at line 305 of file i2c_polling_test.c.

void print_menu ( void )

Print Welcome menu.

Parameters:
[in] none
Returns:
None
Print Welcome menu.

Print menu.

Parameters:
[in] none
Returns:
none

Definition at line 209 of file can_test_two_kit.c.

Variable Documentation

uint8_t iocon_cfg[2] = {REGS_ADDR(IOCON), 0x00}

Definition at line 73 of file i2c_polling_test.c.

uint8_t iodir_cfg[2] = {REGS_ADDR(IODIR), 0xFF}

Definition at line 74 of file i2c_polling_test.c.

uint8_t iostate_cfg_0[2] = {REGS_ADDR(IOSTATE), 0x00}

Definition at line 75 of file i2c_polling_test.c.

uint8_t iostate_cfg_1[2] = {REGS_ADDR(IOSTATE), 0xFF}

Definition at line 76 of file i2c_polling_test.c.

uint8_t menu1[]

Initial value:

"********************************************************************************\n\r"
"Hello NXP Semiconductors \n\r"
"I2C demo \n\r"
"\t - MCU: LPC17xx \n\r"
"\t - Core: ARM Cortex-M3 \n\r"
"\t - Communicate via: UART0 - 115.2 kbps \n\r"
" An example of I2C using polling mode to test the I2C driver \n\r"
" Using I2C at mode I2C master/8bit on LPC1766 to communicate with \n\r"
" SC16IS750/760 Demo Board \n\r"
" Press '1' to turn ON, '2' to turn OFF LEDs \n\r"
"********************************************************************************\n\r"

Definition at line 58 of file i2c_polling_test.c.

uint8_t menu2[] = "Demo terminated! \n\r"

Definition at line 70 of file i2c_polling_test.c.

Generated on Tue Jun 7 14:59:53 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: slave

slave
[I2C]

Defines

#define | USEDI2CDEV_S 0
#define | I2CDEV_S_OWN_ADDR (0x90>>1)
#define | BUFFER_SIZE 0x10
#define | I2CDEV_S LPC_I2C0

Functions

void | print_menu (void)
Print Welcome menu.
void | Buffer_Init (uint8_t type)
Initialize buffer.
int | c_entry (void)
c_entry: Main program body
int | main (void)
void | check_failed (uint8_t *file, uint32_t line)

Variables

uint8_t | menu1 []
uint8_t | Slave_Buf [BUFFER_SIZE]
uint8_t | slave_test [2]

Define Documentation

#define BUFFER_SIZE 0x10

Max buffer length

Definition at line 43 of file slave.c.

#define I2CDEV_S LPC_I2C0

Definition at line 46 of file slave.c.

#define I2CDEV_S_OWN_ADDR (0x90>>1)

Own Slave address in Slave I2C device

Definition at line 40 of file slave.c.

#define USEDI2CDEV_S 0

Used I2C device as slave definition

Definition at line 38 of file slave.c.

Function Documentation

void Buffer_Init ( uint8_t type )

Initialize buffer.

Parameters:
[in] type,:
  • 0: Initialize Master_Buf with increment value from 0 Fill all member in Slave_Buf with 0
  • 1: Initialize Slave_Buf with increment value from 0 Fill all member in Master_Buf with 0
Returns:
None

Definition at line 183 of file i2c_master_slave_int_test.c.

int c_entry ( void )

c_entry: Main program body

Parameters:
[in] None
Returns:
int

Definition at line 118 of file slave.c.

void check_failed | ( | uint8_t * | file,
 |  | uint32_t | line
 | ) |  |

Definition at line 264 of file slave.c.

int main ( void )

Definition at line 250 of file slave.c.

void print_menu ( void )

Print Welcome menu.

Parameters:
[in] none
Returns:
None
Print Welcome menu.

Print menu.

Parameters:
[in] none
Returns:
none

Definition at line 209 of file can_test_two_kit.c.

Variable Documentation

uint8_t menu1[]

Initial value:

"********************************************************************************\n\r"
"Hello NXP Semiconductors \n\r"
"I2C demo \n\r"
"\t - MCU: LPC17xx \n\r"
"\t - Core: ARM Cortex-M3 \n\r"
"\t - This example uses I2C as slave device to transfer data \n\r"
" to/from I2C master device \n\r"
"********************************************************************************\n\r"

Definition at line 54 of file slave.c.

uint8_t Slave_Buf[BUFFER_SIZE]

These global variables below used in interrupt mode - Slave device -----------

Definition at line 65 of file slave.c.

uint8_t slave_test[2]

Definition at line 66 of file slave.c.

Generated on Tue Jun 7 14:59:53 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: I2S

I2S
[LPC1700CMSIS Examples]

Modules

I2S_DMA
I2S_IRQ
I2S_MCLK
I2S_test_4_wire
I2S_two_kit
Polling
Generated on Tue Jun 7 14:59:46 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: I2S_DMA

I2S_DMA
[I2S]

Defines

#define | BUFFER_SIZE 0x0A
#define | DMA_SIZE 0x100UL
#define | DMA_SRC LPC_AHBRAM1_BASE
#define | DMA_DST (DMA_SRC+DMA_SIZE)

Functions

void | DMA_IRQHandler (void)
GPDMA interrupt handler sub-routine.
void | Buffer_Init (void)
Initialize buffer.
Bool | Buffer_Verify (void)
Verify buffer.
void | print_menu (void)
Print menu screen.
int | c_entry (void)
c_entry: Main program body
int | main (void)
void | check_failed (uint8_t *file, uint32_t line)

Variables

uint8_t | menu []
__IO uint32_t | Channel0_TC
__IO uint32_t | Channel0_Err
__IO uint32_t | Channel1_TC
__IO uint32_t | Channel1_Err
volatile uint32_t * | I2STXBuffer = (uint32_t*)(DMA_SRC)
volatile uint32_t * | I2SRXBuffer = (uint32_t*)(DMA_DST)

Define Documentation

#define BUFFER_SIZE 0x0A

Max buffer length

Definition at line 40 of file i2s_dma_test.c.

#define DMA_DST (DMA_SRC+DMA_SIZE)

DMA Source Address is (AHBRAM1_BASE + DMA_SIZE) that used for USB RAM purpose, but it is not used in this example, so this memory section can be used for general purpose memory

Definition at line 52 of file i2s_dma_test.c.

#define DMA_SIZE 0x100UL

DMA transfer size

Definition at line 42 of file i2s_dma_test.c.

#define DMA_SRC LPC_AHBRAM1_BASE

DMA Source Address is AHBRAM1_BASE that used for USB RAM purpose, but it is not used in this example, so this memory section can be used for general purpose memory

Definition at line 47 of file i2s_dma_test.c.

Function Documentation

void Buffer_Init ( void )

Initialize buffer.

Parameters:
[in] None
Returns:
None

Bool Buffer_Verify ( void )

Verify buffer.

Parameters:
[in] none
Returns:
None
Parameters:
[in] none
Returns:
None
Parameters:
[in] none
Returns:
TRUE - if two buffers are similar FALSE - if two buffers are different
Parameters:
[in] none
Returns:
TRUE: if two buffers are similar FALSE: if two buffers are different

Definition at line 120 of file flash_2_ram.c.

int c_entry ( void )

c_entry: Main program body

Parameters:
[in] None
Returns:
int

Definition at line 176 of file i2s_dma_test.c.

void check_failed | ( | uint8_t * | file,
 |  | uint32_t | line
 | ) |  |

Definition at line 412 of file i2s_dma_test.c.

void DMA_IRQHandler ( void )

GPDMA interrupt handler sub-routine.

Parameters:
[in] None
Returns:
None

int main ( void )

Definition at line 399 of file i2s_dma_test.c.

void print_menu ( void )

Print menu screen.

Parameters:
[in] none
Returns:
None
Print menu screen.

Print Welcome menu.

Print menu.

Parameters:
[in] none
Returns:
none

Definition at line 209 of file can_test_two_kit.c.

Variable Documentation

__IO uint32_t Channel0_Err

Definition at line 69 of file i2s_dma_test.c.

__IO uint32_t Channel0_TC

Definition at line 66 of file i2s_dma_test.c.

__IO uint32_t Channel1_Err

Definition at line 75 of file i2s_dma_test.c.

__IO uint32_t Channel1_TC

Definition at line 72 of file i2s_dma_test.c.

volatile uint32_t* I2SRXBuffer = (uint32_t*)(DMA_DST)

Definition at line 78 of file i2s_dma_test.c.

volatile uint32_t* I2STXBuffer = (uint32_t*)(DMA_SRC)

Definition at line 77 of file i2s_dma_test.c.

uint8_t menu[]

Initial value:

        "********************************************************************************\n\r"
        "Hello NXP Semiconductors \n\r"
        " I2S test DMA mode demo \n\r"
        "\t - MCU: LPC17xx \n\r"
        "\t - Core: ARM CORTEX-M3 \n\r"
        "\t - Communicate via: UART0 - 115200 bps \n\r"
        " Use two I2S channels in the same board to transfer data use DMA mode\n\r"
        "********************************************************************************\n\r"

Definition at line 55 of file i2s_dma_test.c.

Generated on Tue Jun 7 14:59:54 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: I2S_IRQ

I2S_IRQ
[I2S]

Defines

#define | BUFFER_SIZE 0x400
#define | I2S_BUFFER_SRC LPC_AHBRAM1_BASE
#define | I2S_BUFFER_DST (I2S_BUFFER_SRC+0x1000UL)
#define | RXFIFO_EMPTY 0
#define | TXFIFO_FULL 8

Functions

void | Buffer_Init (void)
Initialize buffer.
Bool | Buffer_Verify (void)
Verify buffer.
void | print_menu (void)
print menu
int | c_entry (void)
c_entry: Main program body
int | main (void)
void | check_failed (uint8_t *file, uint32_t line)

Variables

uint8_t | menu []
volatile uint8_t | I2STXDone = 0
volatile uint8_t | I2SRXDone = 0
volatile uint32_t * | I2STXBuffer = (uint32_t*)(I2S_BUFFER_SRC)
volatile uint32_t * | I2SRXBuffer = (uint32_t *)(I2S_BUFFER_DST)
volatile uint32_t | I2SReadLength = 0
volatile uint32_t | I2SWriteLength = 0
uint8_t | tx_depth_irq = 0
uint8_t | rx_depth_irq = 0
uint8_t | dummy = 0

Define Documentation

#define BUFFER_SIZE 0x400

Max buffer length

Definition at line 39 of file i2s_irq_test.c.

#define I2S_BUFFER_DST (I2S_BUFFER_SRC+0x1000UL)

I2S Buffer Destination Address is (AHBRAM1_BASE + 0x100UL) that used for USB RAM purpose, but it is not used in this example, so this memory section can be used for general purpose memory

Definition at line 49 of file i2s_irq_test.c.

#define I2S_BUFFER_SRC LPC_AHBRAM1_BASE

I2S Buffer Source Address is AHBRAM1_BASE that used for USB RAM purpose, but it is not used in this example, so this memory section can be used for general purpose memory

Definition at line 44 of file i2s_irq_test.c.

#define RXFIFO_EMPTY 0

Definition at line 51 of file i2s_irq_test.c.

#define TXFIFO_FULL 8

Definition at line 52 of file i2s_irq_test.c.

Function Documentation

void Buffer_Init ( void )

Initialize buffer.

Parameters:
[in] None
Returns:
None

Bool Buffer_Verify ( void )

Verify buffer.

Parameters:
[in] none
Returns:
TRUE - if two buffers are similar FALSE - if two buffers are different
Parameters:
[in] none
Returns:
None
Parameters:
[in] none
Returns:
TRUE - if two buffers are similar FALSE - if two buffers are different
Parameters:
[in] none
Returns:
TRUE: if two buffers are similar FALSE: if two buffers are different
Parameters:
[in] none
Returns:
None

Definition at line 120 of file flash_2_ram.c.

int c_entry ( void )

c_entry: Main program body

Parameters:
[in] None
Returns:
int

Definition at line 176 of file i2s_irq_test.c.

void check_failed | ( | uint8_t * | file,
 |  | uint32_t | line
 | ) |  |

Definition at line 319 of file i2s_irq_test.c.

int main ( void )

Definition at line 306 of file i2s_irq_test.c.

void print_menu ( void )

print menu

Parameters:
[in] none
Returns:
None
Print menu screen.

Print Welcome menu.

Print menu.

Parameters:
[in] none
Returns:
none

Definition at line 209 of file can_test_two_kit.c.

Variable Documentation

uint8_t dummy = 0

Definition at line 75 of file i2s_irq_test.c.

volatile uint32_t I2SReadLength = 0

Definition at line 70 of file i2s_irq_test.c.

volatile uint32_t* I2SRXBuffer = (uint32_t *)(I2S_BUFFER_DST)

Definition at line 68 of file i2s_irq_test.c.

volatile uint8_t I2SRXDone = 0

Definition at line 65 of file i2s_irq_test.c.

volatile uint32_t* I2STXBuffer = (uint32_t*)(I2S_BUFFER_SRC)

Definition at line 67 of file i2s_irq_test.c.

volatile uint8_t I2STXDone = 0

Definition at line 64 of file i2s_irq_test.c.

volatile uint32_t I2SWriteLength = 0

Definition at line 71 of file i2s_irq_test.c.

uint8_t menu[]

Initial value:

        "********************************************************************************\n\r"
        "Hello NXP Semiconductors \n\r"
        " I2S interrupt mode demo \n\r"
        "\t - MCU: LPC17xx \n\r"
        "\t - Core: ARM CORTEX-M3 \n\r"
        "\t - Communicate via: UART0 - 115200 bps \n\r"
        " Use two I2S channels in the same board to transfer data in interrupt mode\n\r"
        "********************************************************************************\n\r"

Definition at line 54 of file i2s_irq_test.c.

uint8_t rx_depth_irq = 0

Definition at line 74 of file i2s_irq_test.c.

uint8_t tx_depth_irq = 0

Definition at line 73 of file i2s_irq_test.c.

Generated on Tue Jun 7 14:59:54 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: I2S_MCLK

I2S_MCLK
[I2S]

Defines

#define | BUFFER_SIZE 0x400
#define | I2S_BUFFER_SRC LPC_AHBRAM1_BASE
#define | I2S_BUFFER_DST (I2S_BUFFER_SRC+0x1000UL)
#define | RXFIFO_EMPTY 0
#define | TXFIFO_FULL 8

Functions

void | I2S_IRQHandler ()
I2S IRQ Handler.
void | Buffer_Init (void)
Initialize buffer.
Bool | Buffer_Verify (void)
Verify buffer.
void | print_menu (void)
print menu
int | c_entry (void)
c_entry: Main program body
int | main (void)
void | check_failed (uint8_t *file, uint32_t line)

Variables

uint8_t | menu []
volatile uint8_t | I2STXDone = 0
volatile uint8_t | I2SRXDone = 0
volatile uint32_t * | I2STXBuffer = (uint32_t*)(I2S_BUFFER_SRC)
volatile uint32_t * | I2SRXBuffer = (uint32_t *)(I2S_BUFFER_DST)
volatile uint32_t | I2SReadLength = 0
volatile uint32_t | I2SWriteLength = 0
uint8_t | tx_depth_irq = 0
uint8_t | rx_depth_irq = 0
uint8_t | dummy = 0

Define Documentation

#define BUFFER_SIZE 0x400

Max buffer length

Definition at line 38 of file i2s_mclk.c.

#define I2S_BUFFER_DST (I2S_BUFFER_SRC+0x1000UL)

I2S Buffer Destination Address is (AHBRAM1_BASE + 0x100UL) that used for USB RAM purpose, but it is not used in this example, so this memory section can be used for general purpose memory

Definition at line 48 of file i2s_mclk.c.

#define I2S_BUFFER_SRC LPC_AHBRAM1_BASE

I2S Buffer Source Address is AHBRAM1_BASE that used for USB RAM purpose, but it is not used in this example, so this memory section can be used for general purpose memory

Definition at line 43 of file i2s_mclk.c.

#define RXFIFO_EMPTY 0

Definition at line 50 of file i2s_mclk.c.

#define TXFIFO_FULL 8

Definition at line 51 of file i2s_mclk.c.

Function Documentation

void Buffer_Init ( void )

Initialize buffer.

Parameters:
[in] None
Returns:
None

Bool Buffer_Verify ( void )

Verify buffer.

Parameters:
[in] none
Returns:
TRUE - if two buffers are similar FALSE - if two buffers are different
Parameters:
[in] none
Returns:
None
Parameters:
[in] none
Returns:
TRUE - if two buffers are similar FALSE - if two buffers are different
Parameters:
[in] none
Returns:
TRUE: if two buffers are similar FALSE: if two buffers are different
Parameters:
[in] none
Returns:
None

Definition at line 120 of file flash_2_ram.c.

int c_entry ( void )

c_entry: Main program body

Parameters:
[in] None
Returns:
int

Definition at line 175 of file i2s_mclk.c.

void check_failed | ( | uint8_t * | file,
 |  | uint32_t | line
 | ) |  |

Definition at line 337 of file i2s_mclk.c.

void I2S_IRQHandler ( void )

I2S IRQ Handler.

Parameters:
[in] None
Returns:
None

int main ( void )

Definition at line 324 of file i2s_mclk.c.

void print_menu ( void )

print menu

Parameters:
[in] none
Returns:
None
Print menu screen.

Print Welcome menu.

Print menu.

Parameters:
[in] none
Returns:
none

Definition at line 209 of file can_test_two_kit.c.

Variable Documentation

uint8_t dummy = 0

Definition at line 74 of file i2s_mclk.c.

volatile uint32_t I2SReadLength = 0

Definition at line 69 of file i2s_mclk.c.

volatile uint32_t* I2SRXBuffer = (uint32_t *)(I2S_BUFFER_DST)

Definition at line 67 of file i2s_mclk.c.

volatile uint8_t I2SRXDone = 0

Definition at line 64 of file i2s_mclk.c.

volatile uint32_t* I2STXBuffer = (uint32_t*)(I2S_BUFFER_SRC)

Definition at line 66 of file i2s_mclk.c.

volatile uint8_t I2STXDone = 0

Definition at line 63 of file i2s_mclk.c.

volatile uint32_t I2SWriteLength = 0

Definition at line 70 of file i2s_mclk.c.

uint8_t menu[]

Initial value:

        "********************************************************************************\n\r"
        "Hello NXP Semiconductors \n\r"
        " I2S MCLK demo \n\r"
        "\t - MCU: LPC17xx \n\r"
        "\t - Core: ARM CORTEX-M3 \n\r"
        "\t - Communicate via: UART0 - 115200 bps \n\r"
        " This example describes how to use I2S master clock as I2S clock source\n\r"
        "********************************************************************************\n\r"

Definition at line 53 of file i2s_mclk.c.

uint8_t rx_depth_irq = 0

Definition at line 73 of file i2s_mclk.c.

uint8_t tx_depth_irq = 0

Definition at line 72 of file i2s_mclk.c.

Generated on Tue Jun 7 14:59:54 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: I2S_test_4_wire

I2S_test_4_wire
[I2S]

Defines

#define | BUFFER_SIZE 0x400
************************** PRIVATE DEFINITIONS *************************/
#define | I2S_BUFFER_SRC LPC_AHBRAM1_BASE
#define | I2S_BUFFER_DST (I2S_BUFFER_SRC+0x1000UL)

Functions

void | Buffer_Init (void)
Initialize buffer.
Bool | Buffer_Verify (void)
Verify buffer.
void | print_menu (void)
Print menu.
int | c_entry (void)
c_entry: Main I2S program body
int | main (void)
void | check_failed (uint8_t *file, uint32_t line)

Variables

uint8_t | menu []
volatile uint8_t | I2STXDone = 0
volatile uint8_t | I2SRXDone = 0
volatile uint32_t * | I2STXBuffer = (uint32_t*)(I2S_BUFFER_SRC)
volatile uint32_t * | I2SRXBuffer = (uint32_t *)(I2S_BUFFER_DST)
volatile uint32_t | I2SReadLength = 0
volatile uint32_t | I2SWriteLength = 0

Define Documentation

#define BUFFER_SIZE 0x400

************************** PRIVATE DEFINITIONS *************************/

Max buffer length

Definition at line 38 of file i2s_test_4_wire.c.

#define I2S_BUFFER_DST (I2S_BUFFER_SRC+0x1000UL)

I2S Buffer Destination Address is (AHBRAM1_BASE + 0x100UL) that used for USB RAM purpose, but it is not used in this example, so this memory section can be used for general purpose memory

Definition at line 48 of file i2s_test_4_wire.c.

#define I2S_BUFFER_SRC LPC_AHBRAM1_BASE

I2S Buffer Source Address is AHBRAM1_BASE that used for USB RAM purpose, but it is not used in this example, so this memory section can be used for general purpose memory

Definition at line 43 of file i2s_test_4_wire.c.

Function Documentation

void Buffer_Init ( void )

Initialize buffer.

Parameters:
[in] None
Returns:
None

Bool Buffer_Verify ( void )

Verify buffer.

Parameters:
[in] none
Returns:
TRUE - if two buffers are similar FALSE - if two buffers are different
Parameters:
[in] none
Returns:
None
Parameters:
[in] none
Returns:
TRUE - if two buffers are similar FALSE - if two buffers are different
Parameters:
[in] none
Returns:
TRUE: if two buffers are similar FALSE: if two buffers are different
Parameters:
[in] none
Returns:
None

Definition at line 120 of file flash_2_ram.c.

int c_entry ( void )

c_entry: Main I2S program body

Parameters:
[in] None
Returns:
int

Definition at line 127 of file i2s_test_4_wire.c.

void check_failed | ( | uint8_t * | file,
 |  | uint32_t | line
 | ) |  |

Definition at line 273 of file i2s_test_4_wire.c.

int main ( void )

Definition at line 260 of file i2s_test_4_wire.c.

void print_menu ( void )

Print menu.

Parameters:
[in] none
Returns:
None
Print menu screen.

Print Welcome menu.

Print menu.

Parameters:
[in] none
Returns:
none

Definition at line 209 of file can_test_two_kit.c.

Variable Documentation

volatile uint32_t I2SReadLength = 0

Definition at line 66 of file i2s_test_4_wire.c.

volatile uint32_t* I2SRXBuffer = (uint32_t *)(I2S_BUFFER_DST)

Definition at line 64 of file i2s_test_4_wire.c.

volatile uint8_t I2SRXDone = 0

Definition at line 61 of file i2s_test_4_wire.c.

volatile uint32_t* I2STXBuffer = (uint32_t*)(I2S_BUFFER_SRC)

Definition at line 63 of file i2s_test_4_wire.c.

volatile uint8_t I2STXDone = 0

Definition at line 60 of file i2s_test_4_wire.c.

volatile uint32_t I2SWriteLength = 0

Definition at line 67 of file i2s_test_4_wire.c.

uint8_t menu[]

Initial value:

        "********************************************************************************\n\r"
        "Hello NXP Semiconductors \n\r"
        " I2S 4-wire demo \n\r"
        "\t - MCU: LPC17xx \n\r"
        "\t - Core: ARM CORTEX-M3 \n\r"
        "\t - Communicate via: UART0 - 115200 bps \n\r"
        " Use two I2S channels in the same board to transfer data in 4-wire mode\n\r"
        "********************************************************************************\n\r"

Definition at line 51 of file i2s_test_4_wire.c.

Generated on Tue Jun 7 14:59:54 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: I2S_two_kit

I2S_two_kit
[I2S]

Defines

#define | I2S_TRANSMIT 0
#define | I2S_RECEIVE !I2S_TRANSMIT

Functions

void | I2S_IRQHandler ()
I2S IRQ Handler.
void | print_menu ()
print_menu
int | c_entry (void)
c_entry: Main I2S program body
int | main (void)
void | check_failed (uint8_t *file, uint32_t line)

Variables

uint8_t | menu []
uint8_t | tx_depth_irq = 0
uint8_t | rx_depth_irq = 0
uint32_t | data

Define Documentation

#define I2S_RECEIVE !I2S_TRANSMIT

Definition at line 40 of file i2s_two_kit.c.

#define I2S_TRANSMIT 0

Definition at line 39 of file i2s_two_kit.c.

Function Documentation

int c_entry ( void )

c_entry: Main I2S program body

Parameters:
[in] None
Returns:
int

Definition at line 127 of file i2s_two_kit.c.

void check_failed | ( | uint8_t * | file,
 |  | uint32_t | line
 | ) |  |

Definition at line 268 of file i2s_two_kit.c.

void I2S_IRQHandler ( void )

I2S IRQ Handler.

Parameters:
[in] None
Returns:
None

int main ( void )

Definition at line 255 of file i2s_two_kit.c.

void print_menu ( void )

print_menu

Parameters:
[in] None
Returns:
None
print_menu

Print menu screen.

Print Welcome menu.

Print menu.

Parameters:
[in] none
Returns:
none

Definition at line 209 of file can_test_two_kit.c.

Variable Documentation

uint32_t data

Definition at line 55 of file i2s_two_kit.c.

uint8_t menu[]

Initial value:

        "********************************************************************************\n\r"
        "Hello NXP Semiconductors \n\r"
        " I2S polling mode demo \n\r"
        "\t - MCU: LPC17xx \n\r"
        "\t - Core: ARM CORTEX-M3 \n\r"
        "\t - Communicate via: UART0 - 115200 bps \n\r"
        " Use two I2S channels on 2 board to transfer data \n\r"
        "********************************************************************************\n\r"

Definition at line 44 of file i2s_two_kit.c.

uint8_t rx_depth_irq = 0

Definition at line 54 of file i2s_two_kit.c.

uint8_t tx_depth_irq = 0

Definition at line 53 of file i2s_two_kit.c.

Generated on Tue Jun 7 14:59:54 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Polling

Polling
[I2S]

Defines

#define | BUFFER_SIZE 0x400
#define | I2S_BUFFER_SRC LPC_AHBRAM1_BASE
#define | I2S_BUFFER_DST (I2S_BUFFER_SRC+0x1000UL)

Functions

void | Buffer_Init (void)
Initialize buffer.
Bool | Buffer_Verify (void)
Verify buffer.
void | print_menu (void)
Print menu.
int | c_entry (void)
c_entry: Main I2S program body
int | main (void)
void | check_failed (uint8_t *file, uint32_t line)

Variables

uint8_t | menu []
volatile uint8_t | I2STXDone = 0
volatile uint8_t | I2SRXDone = 0
volatile uint32_t * | I2STXBuffer = (uint32_t*)(I2S_BUFFER_SRC)
volatile uint32_t * | I2SRXBuffer = (uint32_t *)(I2S_BUFFER_DST)
volatile uint32_t | I2SReadLength = 0
volatile uint32_t | I2SWriteLength = 0

Define Documentation

#define BUFFER_SIZE 0x400

Max buffer length

Definition at line 39 of file i2s_polling.c.

#define I2S_BUFFER_DST (I2S_BUFFER_SRC+0x1000UL)

I2S Buffer Destination Address is (AHBRAM1_BASE + 0x100UL) that used for USB RAM purpose, but it is not used in this example, so this memory section can be used for general purpose memory

Definition at line 49 of file i2s_polling.c.

#define I2S_BUFFER_SRC LPC_AHBRAM1_BASE

I2S Buffer Source Address is AHBRAM1_BASE that used for USB RAM purpose, but it is not used in this example, so this memory section can be used for general purpose memory

Definition at line 44 of file i2s_polling.c.

Function Documentation

void Buffer_Init ( void )

Initialize buffer.

Parameters:
[in] None
Returns:
None

Bool Buffer_Verify ( void )

Verify buffer.

Parameters:
[in] none
Returns:
TRUE: if two buffers are similar FALSE: if two buffers are different
Parameters:
[in] none
Returns:
None
Parameters:
[in] none
Returns:
TRUE - if two buffers are similar FALSE - if two buffers are different
Parameters:
[in] none
Returns:
TRUE: if two buffers are similar FALSE: if two buffers are different
Parameters:
[in] none
Returns:
None

Definition at line 120 of file flash_2_ram.c.

int c_entry ( void )

c_entry: Main I2S program body

Parameters:
[in] None
Returns:
int

Definition at line 130 of file i2s_polling.c.

void check_failed | ( | uint8_t * | file,
 |  | uint32_t | line
 | ) |  |

Definition at line 280 of file i2s_polling.c.

int main ( void )

Definition at line 267 of file i2s_polling.c.

void print_menu ( void )

Print menu.

Parameters:
[in] none
Returns:
None
print_menu

Print menu screen.

Print Welcome menu.

Print menu.

Parameters:
[in] none
Returns:
none

Definition at line 209 of file can_test_two_kit.c.

Variable Documentation

volatile uint32_t I2SReadLength = 0

Definition at line 68 of file i2s_polling.c.

volatile uint32_t* I2SRXBuffer = (uint32_t *)(I2S_BUFFER_DST)

Definition at line 66 of file i2s_polling.c.

volatile uint8_t I2SRXDone = 0

Definition at line 63 of file i2s_polling.c.

volatile uint32_t* I2STXBuffer = (uint32_t*)(I2S_BUFFER_SRC)

Definition at line 65 of file i2s_polling.c.

volatile uint8_t I2STXDone = 0

Definition at line 62 of file i2s_polling.c.

volatile uint32_t I2SWriteLength = 0

Definition at line 69 of file i2s_polling.c.

uint8_t menu[]

Initial value:

        "********************************************************************************\n\r"
        "Hello NXP Semiconductors \n\r"
        " I2S polling mode demo \n\r"
        "\t - MCU: LPC17xx \n\r"
        "\t - Core: ARM CORTEX-M3 \n\r"
        "\t - Communicate via: UART0 - 115200 bps \n\r"
        " Use two I2S channels in the same board to transfer data in polling mode\n\r"
        "********************************************************************************\n\r"

Definition at line 52 of file i2s_polling.c.

Generated on Tue Jun 7 14:59:54 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: LCD

LCD
[LPC1700CMSIS Examples]

Modules

NOKIA6610_LCD
QVGA_TFT_LCD
Generated on Tue Jun 7 14:59:46 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: NOKIA6610_LCD

NOKIA6610_LCD
[LCD]

Defines

#define | TIMER0_TICK_PER_SEC 20

Functions

void | Dly100us (void *arg)
Delay 100us.
int | c_entry (void)
c_entry: Main LCD program body
int | main (void)
void | check_failed (uint8_t *file, uint32_t line)

Variables

FontType_t Terminal_6_8_6
FontType_t Terminal_9_12_6
FontType_t Terminal_18_24_12
volatile Bool | CntrSel = FALSE
uint32_t | CriticalSecCntr

Define Documentation

#define TIMER0_TICK_PER_SEC 20

Definition at line 44 of file lcdtest.c.

Function Documentation

int c_entry ( void )

c_entry: Main LCD program body

Parameters:
[in] None
Returns:
int

Definition at line 105 of file lcdtest.c.

void check_failed | ( | uint8_t * | file,
 |  | uint32_t | line
 | ) |  |

Definition at line 250 of file lcdtest.c.

void Dly100us ( void * arg )

Delay 100us.

Parameters:
[in] void *arg
Returns:
None

int main ( void )

Definition at line 237 of file lcdtest.c.

Variable Documentation

volatile Bool CntrSel = FALSE

Definition at line 52 of file lcdtest.c.

uint32_t CriticalSecCntr

Definition at line 55 of file lcdtest.c.

FontType_t Terminal_18_24_12

FontType_t Terminal_6_8_6

FontType_t Terminal_9_12_6

Definition at line 406 of file Terminal_9_12x6.c.

Generated on Tue Jun 7 14:59:54 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: QVGA_TFT_LCD

QVGA_TFT_LCD
[LCD]

Defines

#define | TIME_OUT 10000

Functions

void | print_menu (void)
print menu
int | c_entry (void)
Print Welcome menu.
int | main (void)
void | check_failed (uint8_t *file, uint32_t line)

Variables

uint8_t | lcd_text [2][16+1]

Define Documentation

#define TIME_OUT 10000

Definition at line 38 of file lcdtest.c.

Function Documentation

int c_entry ( void )

Print Welcome menu.

Parameters:
[in] none
Returns:
None c_entry: Main LCD program body
Parameters:
[in] None
Returns:
int

Definition at line 79 of file lcdtest.c.

void check_failed | ( | uint8_t * | file,
 |  | uint32_t | line
 | ) |  |

Definition at line 124 of file lcdtest.c.

int main ( void )

Definition at line 110 of file lcdtest.c.

void print_menu ( void )

print menu

print_menu

Print menu screen.

Print Welcome menu.

Print menu.

Parameters:
[in] none
Returns:
none

Definition at line 209 of file can_test_two_kit.c.

Variable Documentation

uint8_t lcd_text[2][16+1]

Initial value:

 {"   NXP SEMI.    ",
                          "  LPC1768/CM3" }

Definition at line 56 of file lcdtest.c.

Generated on Tue Jun 7 14:59:54 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: MCPWM

MCPWM
[LPC1700CMSIS Examples]

Modules

MCPWMSimple
Generated on Tue Jun 7 14:59:46 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: MCPWMSimple

MCPWMSimple
[MCPWM]

Defines

#define | DC_MODE_TEST 1
#define | AC_MODE_TEST 0
#define | CAPTURE_MODE_TEST 0

Functions

void | MCPWM_IRQHandler (void)
MCPWM interrupt handler sub-routine.
int | c_entry (void)
c_entry: Main MCPWM program body
int | main (void)
void | check_failed (uint8_t *file, uint32_t line)

Define Documentation

#define AC_MODE_TEST 0

MCPWM in 3-phase AC motor mode test

Definition at line 42 of file mcpwm_simple.c.

#define CAPTURE_MODE_TEST 0

MCPWM tested with Capture function

Definition at line 44 of file mcpwm_simple.c.

#define DC_MODE_TEST 1

MCPWM in 3-phase DC motor mode test

Definition at line 40 of file mcpwm_simple.c.

Function Documentation

int c_entry ( void )

c_entry: Main MCPWM program body

Parameters:
[in] None
Returns:
int

Definition at line 91 of file mcpwm_simple.c.

void check_failed | ( | uint8_t * | file,
 |  | uint32_t | line
 | ) |  |

Definition at line 275 of file mcpwm_simple.c.

int main ( void )

Definition at line 261 of file mcpwm_simple.c.

void MCPWM_IRQHandler ( void )

MCPWM interrupt handler sub-routine.

Parameters:
[in] None
Returns:
None

Definition at line 65 of file mcpwm_simple.c.

Generated on Tue Jun 7 14:59:54 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: NVIC

NVIC
[LPC1700CMSIS Examples]

Modules

Priority
VecTable_Relocation
Generated on Tue Jun 7 14:59:46 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Priority

Priority
[NVIC]

Defines

#define | INT_MODE 1

Functions

void | EINT0_IRQHandler (void)
External interrupt 0 handler This interrupt occurs when pressing button INT0.
void | EINT3_IRQHandler (void)
External interrupt 3 handler This interrupt occurs when turn ADC potentiometer.
void | print_menu (void)
print menu
void | delay (void)
delay function
int | c_entry (void)
c_entry: Main program body
int | main (void)
void | check_failed (uint8_t *file, uint32_t line)

Define Documentation

#define INT_MODE 1

Definition at line 43 of file nvic_priority.c.

Function Documentation

int c_entry ( void )

c_entry: Main program body

Parameters:
[in] None
Returns:
int

Definition at line 112 of file nvic_priority.c.

void check_failed | ( | uint8_t * | file,
 |  | uint32_t | line
 | ) |  |

Definition at line 176 of file nvic_priority.c.

void delay ( void )

delay function

Parameters:
[in] none
Returns:
None

void EINT0_IRQHandler ( void )

External interrupt 0 handler This interrupt occurs when pressing button INT0.

Parameters:
None
Returns:
None

Definition at line 59 of file nvic_priority.c.

void EINT3_IRQHandler ( void )

External interrupt 3 handler This interrupt occurs when turn ADC potentiometer.

Parameters:
None
Returns:
None

int main ( void )

Definition at line 164 of file nvic_priority.c.

void print_menu ( void )

print menu

print_menu

Print menu screen.

Print Welcome menu.

Print menu.

Parameters:
[in] none
Returns:
none

Definition at line 209 of file can_test_two_kit.c.

Generated on Tue Jun 7 14:59:54 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: VecTable_Relocation

VecTable_Relocation
[NVIC]

Defines

#define | VTOR_OFFSET 0x20080000

Functions

void | SysTick_Handler (void)
SysTick interrupt handler.
void | print_menu (void)
Print Welcome menu.
int | c_entry (void)
c_entry: Main program body
int | main (void)
void | check_failed (uint8_t *file, uint32_t line)

Variables

uint8_t | menu []
FunctionalState | Cur_State = DISABLE

Define Documentation

#define VTOR_OFFSET 0x20080000

Definition at line 43 of file vt_relocation.c.

Function Documentation

int c_entry ( void )

c_entry: Main program body

Parameters:
[in] None
Returns:
int

Definition at line 103 of file vt_relocation.c.

void check_failed | ( | uint8_t * | file,
 |  | uint32_t | line
 | ) |  |

Definition at line 165 of file vt_relocation.c.

int main ( void )

Definition at line 153 of file vt_relocation.c.

void print_menu ( void )

Print Welcome menu.

Parameters:
[in] none
Returns:
None
print_menu

Print menu screen.

Print Welcome menu.

Print menu.

Parameters:
[in] none
Returns:
none

Definition at line 209 of file can_test_two_kit.c.

void SysTick_Handler ( void )

SysTick interrupt handler.

Parameters:
None
Returns:
None
SysTick interrupt handler.

SysTick interrupt handler.

Parameters:
[in] None
Returns:
None
Parameters:
None
Returns:
None

Definition at line 9 of file clock-arch.c.

Variable Documentation

FunctionalState Cur_State = DISABLE

Definition at line 55 of file vt_relocation.c.

uint8_t menu[]

Initial value:

        "********************************************************************************\n\r"
        "Hello NXP Semiconductors \n\r"
        "Privileged demo \n\r"
        "\t - MCU: LPC17xx \n\r"
        "\t - Core: ARM CORTEX-M3 \n\r"
        "\t - Communicate via: UART0 - 115200 bps \n\r"
        "This example used to test NVIC Vector Table Relocation function\n\r"
        "********************************************************************************\n\r"

Definition at line 46 of file vt_relocation.c.

Generated on Tue Jun 7 14:59:54 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: PWM

PWM
[LPC1700CMSIS Examples]

Modules

Dual_Edge
Match_Interrupt
Single_Edge
Generated on Tue Jun 7 14:59:46 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Dual_Edge

Dual_Edge
[PWM]

Functions

int | c_entry (void)
c_entry: Main PWM program body
int | main (void)
void | check_failed (uint8_t *file, uint32_t line)

Function Documentation

int c_entry ( void )

c_entry: Main PWM program body

Parameters:
[in] None
Returns:
int

Definition at line 42 of file pwm_dual_edge.c.

void check_failed | ( | uint8_t * | file,
 |  | uint32_t | line
 | ) |  |

Definition at line 159 of file pwm_dual_edge.c.

int main ( void )

Definition at line 145 of file pwm_dual_edge.c.

Generated on Tue Jun 7 14:59:54 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Match_Interrupt

Match_Interrupt
[PWM]

Defines

#define | TIME_OUT 10000

Functions

void | PWM1_IRQHandler (void)
GPDMA interrupt handler sub-routine.
int | c_entry (void)
c_entry: Main PWM program body
int | main (void)
void | check_failed (uint8_t *file, uint32_t line)

Variables

__IO uint32_t | match_cnt = 0
__IO uint32_t | long_duty = 0

Define Documentation

#define TIME_OUT 10000

Definition at line 37 of file pwm_match_int.c.

Function Documentation

int c_entry ( void )

c_entry: Main PWM program body

Parameters:
[in] None
Returns:
int

Definition at line 72 of file pwm_match_int.c.

void check_failed | ( | uint8_t * | file,
 |  | uint32_t | line
 | ) |  |

Definition at line 199 of file pwm_match_int.c.

int main ( void )

Definition at line 185 of file pwm_match_int.c.

void PWM1_IRQHandler ( void )

GPDMA interrupt handler sub-routine.

Parameters:
[in] None
Returns:
None

Definition at line 54 of file pwm_match_int.c.

Variable Documentation

__IO uint32_t long_duty = 0

Definition at line 42 of file pwm_match_int.c.

__IO uint32_t match_cnt = 0

Definition at line 41 of file pwm_match_int.c.

Generated on Tue Jun 7 14:59:54 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Single_Edge

Single_Edge
[PWM]

Functions

int | c_entry (void)
c_entry: Main PWM program body
int | main (void)
void | check_failed (uint8_t *file, uint32_t line)

Function Documentation

int c_entry ( void )

c_entry: Main PWM program body

Parameters:
[in] None
Returns:
int

Definition at line 42 of file pwm_single_edge.c.

void check_failed | ( | uint8_t * | file,
 |  | uint32_t | line
 | ) |  |

Definition at line 146 of file pwm_single_edge.c.

int main ( void )

Definition at line 132 of file pwm_single_edge.c.

Generated on Tue Jun 7 14:59:54 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: PWR

PWR
[LPC1700CMSIS Examples]

Modules

EXTINT_Sleep
NMI_PowerDown
RTC_DeepPWD
WDT_DeepSleep
Generated on Tue Jun 7 14:59:46 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: EXTINT_Sleep

EXTINT_Sleep
[PWR]

Defines

#define | IAR_LPC_1768
#define | _EXT_IRQ EINT2_IRQn
#define | _EXTINT EXTI_EINT2

Functions

void | EINT2_IRQHandler (void)
External interrupt 3 handler sub-routine.
void | print_menu (void)
Print Welcome menu.
void | delay (void)
Delay function.
void | InitLED (void)
Initialize LEDs.
int | c_entry (void)
c_entry: Main program body
int | main (void)
void | check_failed (uint8_t *file, uint32_t line)

Variables

uint8_t | menu []

Define Documentation

#define _EXT_IRQ EINT2_IRQn

Definition at line 50 of file extint_sleep.c.

#define _EXTINT EXTI_EINT2

Definition at line 51 of file extint_sleep.c.

#define IAR_LPC_1768

Definition at line 43 of file extint_sleep.c.

Function Documentation

int c_entry ( void )

c_entry: Main program body

Parameters:
[in] None
Returns:
int

Definition at line 153 of file extint_sleep.c.

void check_failed | ( | uint8_t * | file,
 |  | uint32_t | line
 | ) |  |

Definition at line 285 of file extint_sleep.c.

void delay ( void )

Delay function.

Parameters:
[in] None
Returns:
None

void EINT2_IRQHandler ( void )

External interrupt 3 handler sub-routine.

Parameters:
[in] None
Returns:
None

Definition at line 96 of file extint_sleep.c.

void InitLED ( void )

Initialize LEDs.

Parameters:
[in] None
Returns:
None

Definition at line 131 of file extint_sleep.c.

int main ( void )

Definition at line 272 of file extint_sleep.c.

void print_menu ( void )

Print Welcome menu.

Parameters:
[in] none
Returns:
None
print_menu

Print menu screen.

Print Welcome menu.

Print menu.

Parameters:
[in] none
Returns:
none

Definition at line 209 of file can_test_two_kit.c.

Variable Documentation

uint8_t menu[]

Initial value:

        "********************************************************************************\n\r"
        "Hello NXP Semiconductors \n\r"
        "Power control demo \n\r"
        "\t - MCU: LPC17xx \n\r"
        "\t - Core: ARM CORTEX-M3 \n\r"
        "\t - Communicate via: UART0 - 115200 bps \n\r"
        "This example used to enter system in sleep mode and wake up it by using external \n\r"
        "interrupt\n\r"
        "********************************************************************************\n\r"

Definition at line 55 of file extint_sleep.c.

Generated on Tue Jun 7 14:59:55 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: NMI_PowerDown

NMI_PowerDown
[PWR]

Functions

void | print_menu (void)
Print Welcome menu.
void | NMI_Handler (void)
Non-Maskable interrupt handler.
int | c_entry (void)
c_entry: Main program body
int | main (void)
void | check_failed (uint8_t *file, uint32_t line)

Variables

uint8_t | menu []

Function Documentation

int c_entry ( void )

c_entry: Main program body

Parameters:
[in] None
Returns:
int

Definition at line 82 of file nmi_powerdown.c.

void check_failed | ( | uint8_t * | file,
 |  | uint32_t | line
 | ) |  |

Definition at line 157 of file nmi_powerdown.c.

int main ( void )

Definition at line 144 of file nmi_powerdown.c.

void NMI_Handler ( void )

Non-Maskable interrupt handler.

Parameters:
[in] none
Returns:
None

Definition at line 60 of file nmi_powerdown.c.

void print_menu ( void )

Print Welcome menu.

Parameters:
[in] none
Returns:
None
print_menu

Print menu screen.

Print Welcome menu.

Print menu.

Parameters:
[in] none
Returns:
none

Definition at line 209 of file can_test_two_kit.c.

Variable Documentation

uint8_t menu[]

Initial value:

        "********************************************************************************\n\r"
        "Hello NXP Semiconductors \n\r"
        "Power control demo \n\r"
        "\t - MCU: LPC17xx \n\r"
        "\t - Core: ARM CORTEX-M3 \n\r"
        "\t - Communicate via: UART0 - 115200 bps \n\r"
        "This example used to enter system in PowerDown mode and wake up it by using \n\r "
        "NMI (Non-Maskable Interrupt) \n\r"
        "********************************************************************************\n\r"

Definition at line 40 of file nmi_powerdown.c.

Generated on Tue Jun 7 14:59:55 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: RTC_DeepPWD

RTC_DeepPWD
[PWR]

Functions

void | print_menu (void)
Print Welcome menu.
int | c_entry (void)
c_entry: Main program body
int | main (void)
void | check_failed (uint8_t *file, uint32_t line)

Variables

uint8_t | menu []

Function Documentation

int c_entry ( void )

c_entry: Main program body

Parameters:
[in] None
Returns:
int

Definition at line 88 of file rtc_deeppwd.c.

void check_failed | ( | uint8_t * | file,
 |  | uint32_t | line
 | ) |  |

Definition at line 155 of file rtc_deeppwd.c.

int main ( void )

Definition at line 142 of file rtc_deeppwd.c.

void print_menu ( void )

Print Welcome menu.

Parameters:
[in] none
Returns:
None
print_menu

Print menu screen.

Print Welcome menu.

Print menu.

Parameters:
[in] none
Returns:
none

Definition at line 209 of file can_test_two_kit.c.

Variable Documentation

uint8_t menu[]

Initial value:

        "********************************************************************************\n\r"
        "Hello NXP Semiconductors \n\r"
        "Power control demo \n\r"
        "\t - MCU: LPC17xx \n\r"
        "\t - Core: ARM CORTEX-M3 \n\r"
        "\t - Communicate via: UART0 - 115200 bps \n\r"
        "This example used to enter system in Deep PowerDown mode and wake up it by\n\r "
        "using RTC Interrupt \n\r"
        "********************************************************************************\n\r"

Definition at line 40 of file rtc_deeppwd.c.

Generated on Tue Jun 7 14:59:55 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: WDT_DeepSleep

WDT_DeepSleep
[PWR]

Defines

#define | WDT_TIMEOUT 2000000

Functions

void | print_menu (void)
Print Welcome menu.
int | c_entry (void)
c_entry: Main program body
int | main (void)
void | check_failed (uint8_t *file, uint32_t line)

Variables

uint8_t | menu []

Define Documentation

#define WDT_TIMEOUT 2000000

Definition at line 50 of file wdt_deepsleep.c.

Function Documentation

int c_entry ( void )

c_entry: Main program body

Parameters:
[in] None
Returns:
int

Definition at line 81 of file wdt_deepsleep.c.

void check_failed | ( | uint8_t * | file,
 |  | uint32_t | line
 | ) |  |

Definition at line 148 of file wdt_deepsleep.c.

int main ( void )

Definition at line 135 of file wdt_deepsleep.c.

void print_menu ( void )

Print Welcome menu.

Parameters:
[in] none
Returns:
None
print_menu

Print menu screen.

Print Welcome menu.

Print menu.

Parameters:
[in] none
Returns:
none

Definition at line 209 of file can_test_two_kit.c.

Variable Documentation

uint8_t menu[]

Initial value:

        "********************************************************************************\n\r"
        "Hello NXP Semiconductors \n\r"
        "Power control demo \n\r"
        "\t - MCU: LPC17xx \n\r"
        "\t - Core: ARM CORTEX-M3 \n\r"
        "\t - Communicate via: UART0 - 115200 bps \n\r"
        "This example used to enter system in deep sleep mode and wake up it by using \n\r "
        "Watchdog timer interrupt \n\r"
        "********************************************************************************\n\r"

Definition at line 39 of file wdt_deepsleep.c.

Generated on Tue Jun 7 14:59:55 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: QEI

QEI
[LPC1700CMSIS Examples]

Modules

QEI_Velo
Generated on Tue Jun 7 14:59:46 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: QEI_Velo

QEI_Velo
[QEI]

Defines

#define | VIRTUAL_QEI_SIGNAL 1
#define | SIGNAL_MODE 0
#define | CAP_MODE 1
#define | CAP_PERIOD 250000UL
#define | DISP_TIME 3000000UL
#define | MAX_CAP_TIMES (DISP_TIME/CAP_PERIOD)
#define | ENC_RES 2048UL
#define | MAX_VEL 600UL
#define | COUNT_MODE 4
#define | PHASE_A_PIN (1<<19)
#define | PHASE_B_PIN (1<<21)

Functions

void | VirtualQEISignal_Init (void)
Initializes signal supplying for QEI peripheral by using timer match interrupt output, that will generate two virtual signal on Phase-A and Phase-B. These two clock are 90 degrees out of phase. In this case, a 'virtual encoder' that has these following parameter:
  • Encoder type : Quadrature encoder
  • Max velocity : MAX_VEL (Round Per Minute)
  • Encoder Resolution : ENC_RES (Pulse Per Round) The calculated frequency is: Freq = (MAX_VEL * ENC_RES * COUNT_MODE) / 60 (Hz) The timer therefore should be set to tick every cycle T = 1/Freq (second) Figure: |-----| |-----| Phase A --| |-----| |----- |-----| |-----| Phase B -----| |-----| |--.

void | TIMER0_IRQHandler (void)
Timer 0 interrupt handler. This sub-routine will set/clear two Phase A-B output pin to their phase state.
void | QEI_IRQHandler (void)
QEI interrupt handler. This sub-routine will update current value of captured velocity in to velocity accumulate.
int | c_entry (void)
c_entry: Main QEI program body
int | main (void)
void | check_failed (uint8_t *file, uint32_t line)

Variables

__IO uint8_t | PhaseCnt
__IO uint64_t | VeloAcc
__IO uint32_t | VeloCapCnt
__IO FlagStatus | VeloAccFlag
const PINSEL_CFG_Type | qei_phaA_pin [1] = {{1, 20, 1, 0, 0}}
const PINSEL_CFG_Type | qei_phaB_pin [1] = {{1, 23, 1, 0, 0}}
const PINSEL_CFG_Type | qei_idx_pin [1] = {{1, 24, 1, 0, 0}}

Define Documentation

#define CAP_MODE 1

Capture Mode setting:

  • When = 0, only PhA edges are counted (2X).
  • When = 1, BOTH PhA and PhB edges are counted (4X), increasing resolution but decreasing range

Definition at line 57 of file qei_test_velo.c.

#define CAP_PERIOD 250000UL

Velocity capture period definition (in microsecond)

Definition at line 60 of file qei_test_velo.c.

#define COUNT_MODE 4

Definition at line 75 of file qei_test_velo.c.

#define DISP_TIME 3000000UL

Delay time to Read Velocity Accumulator and display (in microsecond)

Definition at line 63 of file qei_test_velo.c.

#define ENC_RES 2048UL

Encoder resolution (PPR)

Definition at line 67 of file qei_test_velo.c.

#define MAX_CAP_TIMES (DISP_TIME/CAP_PERIOD)

Max velocity capture times calculated

Definition at line 65 of file qei_test_velo.c.

#define MAX_VEL 600UL

Max velocity (RPM)

Definition at line 73 of file qei_test_velo.c.

#define PHASE_A_PIN (1<<19)

Definition at line 82 of file qei_test_velo.c.

#define PHASE_B_PIN (1<<21)

Definition at line 84 of file qei_test_velo.c.

#define SIGNAL_MODE 0

Signal Mode setting:

  • When = 0, PhA and PhB function as quadrature encoder inputs.
  • When = 1, PhA functions as the direction signal and PhB functions as the clock signal

Definition at line 50 of file qei_test_velo.c.

#define VIRTUAL_QEI_SIGNAL 1

In case of using QEI virtual signal, this macro below must be set to 1

Definition at line 43 of file qei_test_velo.c.

Function Documentation

int c_entry ( void )

c_entry: Main QEI program body

Parameters:
[in] None
Returns:
int

Definition at line 273 of file qei_test_velo.c.

void check_failed | ( | uint8_t * | file,
 |  | uint32_t | line
 | ) |  |

Definition at line 396 of file qei_test_velo.c.

int main ( void )

Definition at line 382 of file qei_test_velo.c.

void QEI_IRQHandler ( void )

QEI interrupt handler. This sub-routine will update current value of captured velocity in to velocity accumulate.

Parameters:
[in] None
Returns:
None

Definition at line 176 of file qei_test_velo.c.

void TIMER0_IRQHandler ( void )

Timer 0 interrupt handler. This sub-routine will set/clear two Phase A-B output pin to their phase state.

Parameters:
[in] None
Returns:
None
Timer 0 interrupt handler. This sub-routine will set/clear two Phase A-B output pin to their phase state.

TIMER0 interrupt handler.

TIMER0 interrupt handler sub-routine.

Timer 0 interrupt handler. This sub-routine will set/clear two Phase A-B output pin to their phase state.

Parameters:
[in] None
Returns:
None
Parameters:
None
Returns:
None

Definition at line 73 of file usbdmain.c.

void VirtualQEISignal_Init ( void )

Initializes signal supplying for QEI peripheral by using timer match interrupt output, that will generate two virtual signal on Phase-A and Phase-B. These two clock are 90 degrees out of phase. In this case, a 'virtual encoder' that has these following parameter:

  • Encoder type : Quadrature encoder
  • Max velocity : MAX_VEL (Round Per Minute)
  • Encoder Resolution : ENC_RES (Pulse Per Round) The calculated frequency is: Freq = (MAX_VEL * ENC_RES * COUNT_MODE) / 60 (Hz) The timer therefore should be set to tick every cycle T = 1/Freq (second) Figure: |-----| |-----| Phase A --| |-----| |----- |-----| |-----| Phase B -----| |-----| |--.

|--|--|--|--|--|--|--|-- T T T T T T T

Parameters:
[in] None
Returns:
None

Definition at line 226 of file qei_test_velo.c.

Variable Documentation

__IO uint8_t PhaseCnt

Phase Counter:

  • 0: Phase A = 1, Phase B = 0
  • 1: Phase A = 1, Phase B = 1
  • 2: Phase A = 0, Phase B = 1
  • 3: Phase A = 0, Phase B = 0

Definition at line 94 of file qei_test_velo.c.

const PINSEL_CFG_Type qei_idx_pin[1] = {{1, 24, 1, 0, 0}}

QEI Index Pin

Definition at line 118 of file qei_test_velo.c.

const PINSEL_CFG_Type qei_phaA_pin[1] = {{1, 20, 1, 0, 0}}

QEI Phase-A Pin

Definition at line 114 of file qei_test_velo.c.

const PINSEL_CFG_Type qei_phaB_pin[1] = {{1, 23, 1, 0, 0}}

QEI Phase-B Pin

Definition at line 116 of file qei_test_velo.c.

__IO uint64_t VeloAcc

Velocity Accumulator

Definition at line 98 of file qei_test_velo.c.

__IO FlagStatus VeloAccFlag

Flag indicates Times of Velocity capture is enough to read out

Definition at line 102 of file qei_test_velo.c.

__IO uint32_t VeloCapCnt

Times of Velocity capture

Definition at line 100 of file qei_test_velo.c.

Generated on Tue Jun 7 14:59:55 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: RIT

RIT
[LPC1700CMSIS Examples]

Modules

Interrupt
Generated on Tue Jun 7 14:59:46 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Interrupt

Interrupt
[RIT]

Defines

#define | MCB_LPC_1768
#define | TIME_INTERVAL 1000

Functions

void | RIT_IRQHandler (void)
RIT interrupt handler sub-routine.
int | c_entry (void)
c_entry: Main RIT program body
int | main (void)
void | check_failed (uint8_t *file, uint32_t line)

Variables

uint8_t | menu []
FunctionalState | LEDStatus = ENABLE

Define Documentation

#define MCB_LPC_1768

Definition at line 37 of file rit_interrupt.c.

#define TIME_INTERVAL 1000

Definition at line 40 of file rit_interrupt.c.

Function Documentation

int c_entry ( void )

c_entry: Main RIT program body

Parameters:
[in] None
Returns:
int

Definition at line 94 of file rit_interrupt.c.

void check_failed | ( | uint8_t * | file,
 |  | uint32_t | line
 | ) |  |

Definition at line 148 of file rit_interrupt.c.

int main ( void )

Definition at line 135 of file rit_interrupt.c.

void RIT_IRQHandler ( void )

RIT interrupt handler sub-routine.

Parameters:
[in] None
Returns:
None

Definition at line 63 of file rit_interrupt.c.

Variable Documentation

FunctionalState LEDStatus = ENABLE

Definition at line 52 of file rit_interrupt.c.

uint8_t menu[]

Initial value:

        "********************************************************************************\n\r"
        "Hello NXP Semiconductors \n\r"
        " RIT demo \n\r"
        "\t - MCU: LPC17xx \n\r"
        "\t - Core: ARM CORTEX-M3 \n\r"
        "\t - Communicate via: UART0 - 115200 bps \n\r"
        " Use RIT as a timer to generate interrupt to turn on/off LED each 1s \n\r"
        "********************************************************************************\n\r"

Definition at line 43 of file rit_interrupt.c.

Generated on Tue Jun 7 14:59:55 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: RTC

RTC
[LPC1700CMSIS Examples]

Modules

AlarmCntIncrInterrupt
Calibration
Generated on Tue Jun 7 14:59:47 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: AlarmCntIncrInterrupt

AlarmCntIncrInterrupt
[RTC]

Functions

void | RTC_IRQHandler (void)
RTC interrupt handler sub-routine.
void | print_menu (void)
Print menu.
int | c_entry (void)
c_entry: Main RTC program body
int | main (void)
void | check_failed (uint8_t *file, uint32_t line)

Variables

uint8_t | menu1 []

Function Documentation

int c_entry ( void )

c_entry: Main RTC program body

Parameters:
[in] None
Returns:
int

Definition at line 108 of file rtc_alarm_cntincr_int.c.

void check_failed | ( | uint8_t * | file,
 |  | uint32_t | line
 | ) |  |

Definition at line 198 of file rtc_alarm_cntincr_int.c.

int main ( void )

Definition at line 184 of file rtc_alarm_cntincr_int.c.

void print_menu ( void )

Print menu.

Parameters:
[in] None
Returns:
None
print_menu

Print menu screen.

Print Welcome menu.

Print menu.

Parameters:
[in] none
Returns:
none

Definition at line 209 of file can_test_two_kit.c.

void RTC_IRQHandler ( void )

RTC interrupt handler sub-routine.

Parameters:
[in] None
Returns:
None
RTC(Real-time clock) interrupt handler.

Parameters:
[in] None
Returns:
None

Definition at line 59 of file rtc_calib.c.

Variable Documentation

uint8_t menu1[]

Initial value:

"********************************************************************************\n\r"
"Hello NXP Semiconductors \n\r"
" RTC demo \n\r"
"\t - MCU: LPC17xx \n\r"
"\t - Core: ARM CORTEX-M3 \n\r"
"\t - Communicate via: UART0 - 115200 bps \n\r"
" A simple RTC example. \n\r"
" To generate interrupt in Second Counter Increment Interrupt (1s) \n\r"
" and generate Alarm interrupt at 10s \n\r"
"********************************************************************************\n\r"

Definition at line 39 of file rtc_alarm_cntincr_int.c.

Generated on Tue Jun 7 14:59:55 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Calibration

Calibration
[RTC]

Functions

void | print_menu (void)
Print Welcome menu.
void | RTC_IRQHandle (void)
void | RTC_IRQHandler (void)
RTC interrupt handler sub-routine.
int | c_entry (void)
c_entry: Main program body
int | main (void)
void | check_failed (uint8_t *file, uint32_t line)

Variables

uint8_t | menu []

Function Documentation

int c_entry ( void )

c_entry: Main program body

Parameters:
[in] None
Returns:
int

Definition at line 94 of file rtc_calib.c.

void check_failed | ( | uint8_t * | file,
 |  | uint32_t | line
 | ) |  |

Definition at line 162 of file rtc_calib.c.

int main ( void )

Definition at line 149 of file rtc_calib.c.

void print_menu ( void )

Print Welcome menu.

Parameters:
[in] none
Returns:
None
print_menu

Print menu screen.

Print Welcome menu.

Print menu.

Parameters:
[in] none
Returns:
none

Definition at line 209 of file can_test_two_kit.c.

void RTC_IRQHandle ( void )

void RTC_IRQHandler ( void )

RTC interrupt handler sub-routine.

RTC(Real-time clock) interrupt handler.

Parameters:
[in] None
Returns:
None

Definition at line 59 of file rtc_calib.c.

Variable Documentation

uint8_t menu[]

Initial value:

        "********************************************************************************\n\r"
        "Hello NXP Semiconductors \n\r"
        "RTC Calibration demo \n\r"
        "\t - MCU: LPC17xx \n\r"
        "\t - Core: ARM CORTEX-M3 \n\r"
        "\t - Communicate via: UART0 - 115200 bps \n\r"
        "This example describes how to calibrate RTC \n\r"
        "********************************************************************************\n\r"

Definition at line 39 of file rtc_calib.c.

Generated on Tue Jun 7 14:59:55 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: SPI

SPI
[LPC1700CMSIS Examples]

Modules

LoopBack
Master
sc16is750_int
sc16is750_polling
SDCard
slave
Generated on Tue Jun 7 14:59:47 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: LoopBack

LoopBack
[SPI]

Defines

#define | CS_PORT_NUM 0
#define | CS_PIN_NUM 16
#define | SPI_DATABIT_SIZE 10
#define | BUFFER_SIZE 0x40

Functions

void | print_menu (void)
Print Welcome menu.
void | Buffer_Init (void)
Initialize buffer.
void | Error_Loop (void)
Error Loop (called by Buffer_Verify() if any error).
void | Buffer_Verify (void)
Verify buffer.
int | c_entry (void)
c_entry: Main SPI program body
int | main (void)
void | check_failed (uint8_t *file, uint32_t line)

Variables

uint8_t | menu1 []
uint8_t | menu2 [] = "Demo terminated! \n\r"
SPI_CFG_Type SPI_ConfigStruct
uint16_t | Tx_Buf [BUFFER_SIZE]
uint16_t | Rx_Buf [BUFFER_SIZE]

Define Documentation

#define BUFFER_SIZE 0x40

Max buffer length

Definition at line 46 of file spi_loopback_test.c.

#define CS_PIN_NUM 16

Definition at line 43 of file spi_loopback_test.c.

#define CS_PORT_NUM 0

Definition at line 41 of file spi_loopback_test.c.

#define SPI_DATABIT_SIZE 10

Definition at line 44 of file spi_loopback_test.c.

Function Documentation

void Buffer_Init ( void )

Initialize buffer.

Parameters:
[in] None
Returns:
None

void Buffer_Verify ( void )

Verify buffer.

Parameters:
[in] none
Returns:
None
Parameters:
[in] none
Returns:
None
Parameters:
[in] none
Returns:
TRUE - if two buffers are similar FALSE - if two buffers are different
Parameters:
[in] none
Returns:
TRUE: if two buffers are similar FALSE: if two buffers are different

Definition at line 120 of file flash_2_ram.c.

int c_entry ( void )

c_entry: Main SPI program body

Parameters:
[in] None
Returns:
int

Definition at line 163 of file spi_loopback_test.c.

void check_failed | ( | uint8_t * | file,
 |  | uint32_t | line
 | ) |  |

Definition at line 248 of file spi_loopback_test.c.

void Error_Loop ( void )

Error Loop (called by Buffer_Verify() if any error).

Parameters:
[in] none
Returns:
None

int main ( void )

Definition at line 234 of file spi_loopback_test.c.

void print_menu ( void )

Print Welcome menu.

Parameters:
[in] none
Returns:
None
print_menu

Print menu screen.

Print Welcome menu.

Print menu.

Parameters:
[in] none
Returns:
none

Definition at line 209 of file can_test_two_kit.c.

Variable Documentation

uint8_t menu1[]

Initial value:

"********************************************************************************\n\r"
"Hello NXP Semiconductors \n\r"
"SPI demo \n\r"
"\t - MCU: LPC17xx \n\r"
"\t - Core: ARM Cortex-M3 \n\r"
"\t - Communicate via: UART0 - 115200bps \n\r"
"\t An example of SPI using polling mode with loop-back (MISO <-> MOSI) \n\r"
"\t connection to test SPI driver \n\r"
"********************************************************************************\n\r"

Definition at line 49 of file spi_loopback_test.c.

uint8_t menu2[] = "Demo terminated! \n\r"

Definition at line 59 of file spi_loopback_test.c.

uint16_t Rx_Buf[BUFFER_SIZE]

Definition at line 69 of file spi_loopback_test.c.

SPI_CFG_Type SPI_ConfigStruct

Definition at line 62 of file spi_loopback_test.c.

uint16_t Tx_Buf[BUFFER_SIZE]

Definition at line 68 of file spi_loopback_test.c.

Generated on Tue Jun 7 14:59:55 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Master

Master
[SPI]

Defines

#define | CS_PORT_NUM 0
#define | CS_PIN_NUM 16
#define | SPI_DATABIT_SIZE 10
#define | BUFFER_SIZE 0x40

Functions

void | print_menu (void)
Print Welcome menu.
void | Buffer_Init (void)
Initialize buffer.
void | Error_Loop (void)
Error Loop (called by Buffer_Verify() if any error).
void | Buffer_Verify (void)
Verify buffer.
int | c_entry (void)
c_entry: Main SPI program body
int | main (void)
void | check_failed (uint8_t *file, uint32_t line)

Variables

uint8_t | menu1 []
uint8_t | menu2 [] = "Demo terminated! \n\r"
SPI_CFG_Type SPI_ConfigStruct
uint16_t | Tx_Buf [BUFFER_SIZE]
uint16_t | Rx_Buf [BUFFER_SIZE]

Define Documentation

#define BUFFER_SIZE 0x40

Max buffer length

Definition at line 45 of file spi_master.c.

#define CS_PIN_NUM 16

Definition at line 41 of file spi_master.c.

#define CS_PORT_NUM 0

Definition at line 39 of file spi_master.c.

#define SPI_DATABIT_SIZE 10

Definition at line 42 of file spi_master.c.

Function Documentation

void Buffer_Init ( void )

Initialize buffer.

Parameters:
[in] None
Returns:
None

void Buffer_Verify ( void )

Verify buffer.

Parameters:
[in] none
Returns:
None
Parameters:
[in] none
Returns:
None
Parameters:
[in] none
Returns:
TRUE - if two buffers are similar FALSE - if two buffers are different
Parameters:
[in] none
Returns:
TRUE: if two buffers are similar FALSE: if two buffers are different

Definition at line 120 of file flash_2_ram.c.

int c_entry ( void )

c_entry: Main SPI program body

Parameters:
[in] None
Returns:
int

Definition at line 194 of file spi_master.c.

void check_failed | ( | uint8_t * | file,
 |  | uint32_t | line
 | ) |  |

Definition at line 293 of file spi_master.c.

void Error_Loop ( void )

Error Loop (called by Buffer_Verify() if any error).

Parameters:
[in] none
Returns:
None

int main ( void )

Definition at line 279 of file spi_master.c.

void print_menu ( void )

Print Welcome menu.

Parameters:
[in] none
Returns:
None
print_menu

Print menu screen.

Print Welcome menu.

Print menu.

Parameters:
[in] none
Returns:
none

Definition at line 209 of file can_test_two_kit.c.

Variable Documentation

uint8_t menu1[]

Initial value:

"********************************************************************************\n\r"
"Hello NXP Semiconductors \n\r"
"SPI demo \n\r"
"\t - MCU: LPC17xx \n\r"
"\t - Core: ARM Cortex-M3 \n\r"
"\t - Communicate via: UART0 - 115200bps \n\r"
"\t An example of SPI using interrupt mode to test the SPI driver \n\r"
" This example uses SPI in master mode to communicate with SPI slave device \n\r"
" The master and slave transfer together a number of data byte \n\r"
"********************************************************************************\n\r"

Definition at line 48 of file spi_master.c.

uint8_t menu2[] = "Demo terminated! \n\r"

Definition at line 59 of file spi_master.c.

uint16_t Rx_Buf[BUFFER_SIZE]

Definition at line 69 of file spi_master.c.

SPI_CFG_Type SPI_ConfigStruct

Definition at line 62 of file spi_master.c.

uint16_t Tx_Buf[BUFFER_SIZE]

Definition at line 68 of file spi_master.c.

Generated on Tue Jun 7 14:59:55 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: sc16is750_int

sc16is750_int
[SPI]

Defines

#define | CS_PORT_NUM 0
#define | CS_PIN_NUM 16
#define | IDLE_CHAR 0xFF
#define | SC16IS740_WR_CMD(x) ((uint8_t) (x << 3))
#define | SC16IS740_RD_CMD(x) ((uint8_t) ((x << 3) | 0x80))
#define | SC16IS740_IODIR_REG 0x0A
#define | SC16IS740_IOSTATE_REG 0x0B
#define | SC16IS740_IOCON_REG 0x0E

Functions

void | SPI_IRQHandler (void)
SPI Interrupt used for reading and writing handler.
void | CS_Init (void)
Initialize CS pin as GPIO function to drive /CS pin due to definition of CS_PORT_NUM and CS_PORT_NUM.
void | CS_Force (int32_t state)
Drive CS output pin to low/high level to select slave device via /CS pin state.
void | print_menu (void)
Print Welcome menu.
int | c_entry (void)
c_entry: Main SPI program body
int | main (void)
void | check_failed (uint8_t *file, uint32_t line)

Variables

uint8_t | menu1 []
uint8_t | menu2 [] = "Demo terminated! \n\r"
uint8_t | iocon_cfg [2] = {SC16IS740_WR_CMD(SC16IS740_IOCON_REG), 0x00}
uint8_t | iodir_cfg [2] = {SC16IS740_WR_CMD(SC16IS740_IODIR_REG), 0xFF}
uint8_t | iostate_on [2] = {SC16IS740_WR_CMD(SC16IS740_IOSTATE_REG), 0x00}
uint8_t | iostate_off [2] = {SC16IS740_WR_CMD(SC16IS740_IOSTATE_REG), 0xFF}
uint8_t | spireadbuf [2]
__IO FlagStatus | complete
SPI_CFG_Type SPI_ConfigStruct
SPI_DATA_SETUP_Type xferConfig

Define Documentation

#define CS_PIN_NUM 16

Definition at line 43 of file spi_interrupt_test.c.

#define CS_PORT_NUM 0

Definition at line 41 of file spi_interrupt_test.c.

#define IDLE_CHAR 0xFF

Definition at line 46 of file spi_interrupt_test.c.

#define SC16IS740_IOCON_REG 0x0E

Definition at line 55 of file spi_interrupt_test.c.

#define SC16IS740_IODIR_REG 0x0A

Definition at line 53 of file spi_interrupt_test.c.

#define SC16IS740_IOSTATE_REG 0x0B

Definition at line 54 of file spi_interrupt_test.c.

#define SC16IS740_RD_CMD ( x ) ((uint8_t) ((x << 3) | 0x80))

Definition at line 50 of file spi_interrupt_test.c.

#define SC16IS740_WR_CMD ( x ) ((uint8_t) (x << 3))

Definition at line 49 of file spi_interrupt_test.c.

Function Documentation

int c_entry ( void )

c_entry: Main SPI program body

Parameters:
[in] None
Returns:
int

Definition at line 221 of file spi_interrupt_test.c.

void check_failed | ( | uint8_t * | file,
 |  | uint32_t | line
 | ) |  |

Definition at line 361 of file spi_interrupt_test.c.

void CS_Force ( int32_t state )

Drive CS output pin to low/high level to select slave device via /CS pin state.

Parameters:
[in] state State of CS output pin that will be driven:
  • 0: Drive CS pin to low level
  • 1: Drive CS pin to high level
Returns:
None

void CS_Init ( void )

Initialize CS pin as GPIO function to drive /CS pin due to definition of CS_PORT_NUM and CS_PORT_NUM.

Parameters:
None
Returns:
None

int main ( void )

Definition at line 347 of file spi_interrupt_test.c.

void print_menu ( void )

Print Welcome menu.

Parameters:
[in] none
Returns:
None
print_menu

Print menu screen.

Print Welcome menu.

Print menu.

Parameters:
[in] none
Returns:
none

Definition at line 209 of file can_test_two_kit.c.

void SPI_IRQHandler ( void )

SPI Interrupt used for reading and writing handler.

Parameters:
None
Returns:
None

Definition at line 99 of file spi_interrupt_test.c.

Variable Documentation

__IO FlagStatus complete

Definition at line 78 of file spi_interrupt_test.c.

uint8_t iocon_cfg[2] = {SC16IS740_WR_CMD(SC16IS740_IOCON_REG), 0x00}

Definition at line 71 of file spi_interrupt_test.c.

uint8_t iodir_cfg[2] = {SC16IS740_WR_CMD(SC16IS740_IODIR_REG), 0xFF}

Definition at line 72 of file spi_interrupt_test.c.

uint8_t iostate_off[2] = {SC16IS740_WR_CMD(SC16IS740_IOSTATE_REG), 0xFF}

Definition at line 74 of file spi_interrupt_test.c.

uint8_t iostate_on[2] = {SC16IS740_WR_CMD(SC16IS740_IOSTATE_REG), 0x00}

Definition at line 73 of file spi_interrupt_test.c.

uint8_t menu1[]

Initial value:

"********************************************************************************\n\r"
"Hello NXP Semiconductors \n\r"
"SPI demo \n\r"
"\t - MCU: LPC17xx \n\r"
"\t - Core: ARM Cortex-M3 \n\r"
"\t - Communicate via: UART0 - 115200bps \n\r"
" Communicate with SPI function on SC16IS750/760 Demo Board\n\r"
" Use IO function on SC16IS740/750/760 chip to turn ON/OFF LEDs\n\r"
"Press '1' to turn ON LEDs, '2' to turn OFF LEDs \n\r"
"********************************************************************************\n\r"

Definition at line 58 of file spi_interrupt_test.c.

uint8_t menu2[] = "Demo terminated! \n\r"

Definition at line 69 of file spi_interrupt_test.c.

SPI_CFG_Type SPI_ConfigStruct

Definition at line 81 of file spi_interrupt_test.c.

uint8_t spireadbuf[2]

Definition at line 75 of file spi_interrupt_test.c.

SPI_DATA_SETUP_Type xferConfig

Definition at line 83 of file spi_interrupt_test.c.

Generated on Tue Jun 7 14:59:56 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: sc16is750_polling

sc16is750_polling
[SPI]

Defines

#define | CS_PORT_NUM 0
#define | CS_PIN_NUM 16
#define | SC16IS740_WR_CMD(x) ((uint8_t) (x << 3))
#define | SC16IS740_RD_CMD(x) ((uint8_t) ((x << 3) | 0x80))
#define | SC16IS740_IODIR_REG 0x0A
#define | SC16IS740_IOSTATE_REG 0x0B
#define | SC16IS740_IOCON_REG 0x0E

Functions

void | CS_Init (void)
Initialize CS pin as GPIO function to drive /CS pin due to definition of CS_PORT_NUM and CS_PORT_NUM.
void | CS_Force (int32_t state)
Drive CS output pin to low/high level to select slave device via /CS pin state.
void | print_menu (void)
Print Welcome menu.
int | c_entry (void)
c_entry: Main SPI program body
int | main (void)
void | check_failed (uint8_t *file, uint32_t line)

Variables

uint8_t | menu1 []
uint8_t | menu2 [] = "Demo terminated! \n\r"
SPI_CFG_Type SPI_ConfigStruct
uint8_t | iocon_cfg [2] = {SC16IS740_WR_CMD(SC16IS740_IOCON_REG), 0x00}
uint8_t | iodir_cfg [2] = {SC16IS740_WR_CMD(SC16IS740_IODIR_REG), 0xFF}
uint8_t | iostate_on [2] = {SC16IS740_WR_CMD(SC16IS740_IOSTATE_REG), 0x00}
uint8_t | iostate_off [2] = {SC16IS740_WR_CMD(SC16IS740_IOSTATE_REG), 0xFF}
uint8_t | spireadbuf [2]

Define Documentation

#define CS_PIN_NUM 16

Definition at line 44 of file spi_polling_test.c.

#define CS_PORT_NUM 0

Definition at line 42 of file spi_polling_test.c.

#define SC16IS740_IOCON_REG 0x0E

Definition at line 53 of file spi_polling_test.c.

#define SC16IS740_IODIR_REG 0x0A

Definition at line 51 of file spi_polling_test.c.

#define SC16IS740_IOSTATE_REG 0x0B

Definition at line 52 of file spi_polling_test.c.

#define SC16IS740_RD_CMD ( x ) ((uint8_t) ((x << 3) | 0x80))

Definition at line 48 of file spi_polling_test.c.

#define SC16IS740_WR_CMD ( x ) ((uint8_t) (x << 3))

Definition at line 47 of file spi_polling_test.c.

Function Documentation

int c_entry ( void )

c_entry: Main SPI program body

Parameters:
[in] None
Returns:
int

Definition at line 134 of file spi_polling_test.c.

void check_failed | ( | uint8_t * | file,
 |  | uint32_t | line
 | ) |  |

Definition at line 263 of file spi_polling_test.c.

void CS_Force ( int32_t state )

Drive CS output pin to low/high level to select slave device via /CS pin state.

Parameters:
[in] state State of CS output pin that will be driven:
  • 0: Drive CS pin to low level
  • 1: Drive CS pin to high level
Returns:
None

void CS_Init ( void )

Initialize CS pin as GPIO function to drive /CS pin due to definition of CS_PORT_NUM and CS_PORT_NUM.

Parameters:
None
Returns:
None

int main ( void )

Definition at line 249 of file spi_polling_test.c.

void print_menu ( void )

Print Welcome menu.

Parameters:
[in] none
Returns:
None
print_menu

Print menu screen.

Print Welcome menu.

Print menu.

Parameters:
[in] none
Returns:
none

Definition at line 209 of file can_test_two_kit.c.

Variable Documentation

uint8_t iocon_cfg[2] = {SC16IS740_WR_CMD(SC16IS740_IOCON_REG), 0x00}

Definition at line 73 of file spi_polling_test.c.

uint8_t iodir_cfg[2] = {SC16IS740_WR_CMD(SC16IS740_IODIR_REG), 0xFF}

Definition at line 74 of file spi_polling_test.c.

uint8_t iostate_off[2] = {SC16IS740_WR_CMD(SC16IS740_IOSTATE_REG), 0xFF}

Definition at line 76 of file spi_polling_test.c.

uint8_t iostate_on[2] = {SC16IS740_WR_CMD(SC16IS740_IOSTATE_REG), 0x00}

Definition at line 75 of file spi_polling_test.c.

uint8_t menu1[]

Initial value:

"********************************************************************************\n\r"
"Hello NXP Semiconductors \n\r"
"SPI demo \n\r"
"\t - MCU: LPC17xx \n\r"
"\t - Core: ARM Cortex-M3 \n\r"
"\t - Communicate via: UART0 - 115200 kbps \n\r"
" Communicate with SPI function on SC16IS750/760 Demo Board\n\r"
" Use IO function on SC16IS740/750/760 chip to turn ON/OFF LEDs\n\r"
"Press '1' to turn ON LEDs, '2' to turn OFF LEDs \n\r"
"********************************************************************************\n\r"

Definition at line 57 of file spi_polling_test.c.

uint8_t menu2[] = "Demo terminated! \n\r"

Definition at line 68 of file spi_polling_test.c.

SPI_CFG_Type SPI_ConfigStruct

Definition at line 71 of file spi_polling_test.c.

uint8_t spireadbuf[2]

Definition at line 77 of file spi_polling_test.c.

Generated on Tue Jun 7 14:59:56 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: SDCard

SDCard
[SPI]

Defines

#define | CS_PORT_NUM 0
#define | CS_PIN_NUM 16
#define | SD_DETECT_PORTNUM 4
#define | SD_DETECT_PINNUM 29
#define | CMD0_GO_IDLE_STATE 0x00
#define | CMD1_SEND_OPCOND 0x01
#define | CMD9_SEND_CSD 0x09
#define | CMD10_SEND_CID 0x0a
#define | CMD12_STOP_TRANSMISSION 0x0b
#define | CMD13_SEND_STATUS 0x0c
#define | CMD16_SET_BLOCKLEN 0x10
#define | CMD17_READ_SINGLE_BLOCK 0x11
#define | CMD18_READ_MULTIPLE_BLOCK 0x12
#define | CMD24_WRITE_BLOCK 0x18
#define | CMD25_WRITE_MULTIPLE_BLOCK 0x19
#define | CMD27_PROGRAM_CSD 0x1b
#define | CMD28_SET_WRITE_PROT 0x1c
#define | CMD29_CLR_WRITE_PROT 0x1d
#define | CMD30_SEND_WRITE_PROT 0x1e
#define | CMD32_ERASE_WR_BLK_START_ADDR 0x20
#define | CMD33_ERASE_WR_BLK_END_ADDR 0x21
#define | CMD38_ERASE 0x26
#define | CMD55_APP_CMD 0x37
#define | CMD56_GEN_CMD 0x38
#define | CMD58_READ_OCR 0x3a
#define | CMD59_CRC_ON_OFF 0x3b
#define | ACMD13_SD_STATUS 0x0d
#define | ACMD22_SEND_NUM_WR_BLOCKS 0x16
#define | ACMD23_SET_WR_BLK_ERASE_COUNT 0x17
#define | ACMD41_SEND_OP_COND 0x29
#define | ACMD42_SET_CLR_CARD_DETECT 0x2a
#define | ACMD51_SEND_SCR 0x33
#define | R1_NOERROR 0x00
#define | R1_IDLE 0x01
#define | R1_ERASE 0x02
#define | R1_ILLEGAL 0x04
#define | R1_CRC_ERR 0x08
#define | R1_ERASE_SEQ 0x10
#define | R1_ADDR_ERR 0x20
#define | R1_PARAM_ERR 0x40
#define | R2_LOCKED 0x01
#define | R2_WP_FAILED 0x02
#define | R2_ERROR 0x04
#define | R2_CTRL_ERR 0x08
#define | R2_ECC_FAIL 0x10
#define | R2_WP_VIOL 0x20
#define | R2_ERASE_PARAM 0x40
#define | R2_RANGE_ERR 0x80
#define | GETBIT(in, bit) ((in & (1<<bit)) >> bit)
#define | SD_CMD_BLOCK_LENGTH 6
#define | SD_DATA_BLOCK_LENGTH 515
#define | SD_WAIT_R1_TIMEOUT 100000

Typedefs

typedef enum _sd_connect_status | sd_connect_status
typedef enum _sd_error | sd_error

Enumerations

enum | _sd_connect_status { SD_CONNECTED, SD_DISCONNECTED }
enum _sd_error {
SD_OK, SD_NG, SD_CMD_BAD_PARAMETER, SD_ERROR_TOKEN,
SD_ERROR_TIMEOUT, SD_ERROR_BUS_NOT_IDLE, SD_ERROR_CMD0, SD_ERROR_CMD55,
SD_ERROR_ACMD41, SD_ERROR_CMD59
}

Functions

void | CS_Init (void)
Initialize CS pin as GPIO function to drive /CS pin due to definition of CS_PORT_NUM and CS_PORT_NUM.
void | CS_Force (int32_t state)
Drive CS output pin to low/high level to select slave device via /CS pin state.
void | print_menu (void)
Print Welcome menu.
sd_connect_status | SD_GetCardConnectStatus (void)
check if SD card is inserted or not
uint8_t | crc_7 (uint8_t old_crc, uint8_t data)
Calculate CRC-7 as required by SD specification.
uint8_t | crc_7final (uint8_t old_crc)
Provides the zero-padding final step to CRC-7.
uint32_t | SD_SendReceiveData_Polling (void *tx_buf, void *rx_buf, uint32_t length)
Send/receive data over SPI bus.
void | SD_SendCommand (uint8_t cmd, uint8_t *arg)
Send command to SD card.
sd_error | SD_WaitR1 (uint8_t *buffer, uint32_t length, uint32_t timeout)
Wait for SD card R1 response.
sd_error | SD_WaitDeviceIdle (uint32_t num_char)
Wait for SD card idle.
sd_error | SD_Init (uint8_t retries)
Initialize SD card in SPI mode.
sd_error | SD_GetCID (void)
Get SD card's CID register.
int | c_entry (void)
c_entry: Main SPI program body
int | main (void)
void | check_failed (uint8_t *file, uint32_t line)

Variables

uint8_t | menu1 []
SPI_CFG_Type SPI_ConfigStruct
SPI_DATA_SETUP_Type xferConfig
uint8_t | sd_cmd_buf [SD_CMD_BLOCK_LENGTH]
uint8_t | sd_data_buf [SD_DATA_BLOCK_LENGTH]

Define Documentation

#define ACMD13_SD_STATUS 0x0d

Definition at line 88 of file spi_sdcard.c.

#define ACMD22_SEND_NUM_WR_BLOCKS 0x16

Definition at line 89 of file spi_sdcard.c.

#define ACMD23_SET_WR_BLK_ERASE_COUNT 0x17

Definition at line 90 of file spi_sdcard.c.

#define ACMD41_SEND_OP_COND 0x29

Definition at line 91 of file spi_sdcard.c.

#define ACMD42_SET_CLR_CARD_DETECT 0x2a

Definition at line 92 of file spi_sdcard.c.

#define ACMD51_SEND_SCR 0x33

Definition at line 93 of file spi_sdcard.c.

#define CMD0_GO_IDLE_STATE 0x00

Definition at line 65 of file spi_sdcard.c.

#define CMD10_SEND_CID 0x0a

Definition at line 68 of file spi_sdcard.c.

#define CMD12_STOP_TRANSMISSION 0x0b

Definition at line 69 of file spi_sdcard.c.

#define CMD13_SEND_STATUS 0x0c

Definition at line 70 of file spi_sdcard.c.

#define CMD16_SET_BLOCKLEN 0x10

Definition at line 71 of file spi_sdcard.c.

#define CMD17_READ_SINGLE_BLOCK 0x11

Definition at line 72 of file spi_sdcard.c.

#define CMD18_READ_MULTIPLE_BLOCK 0x12

Definition at line 73 of file spi_sdcard.c.

#define CMD1_SEND_OPCOND 0x01

Definition at line 66 of file spi_sdcard.c.

#define CMD24_WRITE_BLOCK 0x18

Definition at line 74 of file spi_sdcard.c.

#define CMD25_WRITE_MULTIPLE_BLOCK 0x19

Definition at line 75 of file spi_sdcard.c.

#define CMD27_PROGRAM_CSD 0x1b

Definition at line 76 of file spi_sdcard.c.

#define CMD28_SET_WRITE_PROT 0x1c

Definition at line 77 of file spi_sdcard.c.

#define CMD29_CLR_WRITE_PROT 0x1d

Definition at line 78 of file spi_sdcard.c.

#define CMD30_SEND_WRITE_PROT 0x1e

Definition at line 79 of file spi_sdcard.c.

#define CMD32_ERASE_WR_BLK_START_ADDR 0x20

Definition at line 80 of file spi_sdcard.c.

#define CMD33_ERASE_WR_BLK_END_ADDR 0x21

Definition at line 81 of file spi_sdcard.c.

#define CMD38_ERASE 0x26

Definition at line 82 of file spi_sdcard.c.

#define CMD55_APP_CMD 0x37

Definition at line 83 of file spi_sdcard.c.

#define CMD56_GEN_CMD 0x38

Definition at line 84 of file spi_sdcard.c.

#define CMD58_READ_OCR 0x3a

Definition at line 85 of file spi_sdcard.c.

#define CMD59_CRC_ON_OFF 0x3b

Definition at line 86 of file spi_sdcard.c.

#define CMD9_SEND_CSD 0x09

Definition at line 67 of file spi_sdcard.c.

#define CS_PIN_NUM 16

Definition at line 41 of file spi_sdcard.c.

#define CS_PORT_NUM 0

Definition at line 39 of file spi_sdcard.c.

#define GETBIT | ( | in,
 |  | bit | ) | ((in & (1<<bit)) >> bit)

Definition at line 113 of file spi_sdcard.c.

#define R1_ADDR_ERR 0x20

Definition at line 101 of file spi_sdcard.c.

#define R1_CRC_ERR 0x08

Definition at line 99 of file spi_sdcard.c.

#define R1_ERASE 0x02

Definition at line 97 of file spi_sdcard.c.

#define R1_ERASE_SEQ 0x10

Definition at line 100 of file spi_sdcard.c.

#define R1_IDLE 0x01

Definition at line 96 of file spi_sdcard.c.

#define R1_ILLEGAL 0x04

Definition at line 98 of file spi_sdcard.c.

#define R1_NOERROR 0x00

Definition at line 95 of file spi_sdcard.c.

#define R1_PARAM_ERR 0x40

Definition at line 102 of file spi_sdcard.c.

#define R2_CTRL_ERR 0x08

Definition at line 107 of file spi_sdcard.c.

#define R2_ECC_FAIL 0x10

Definition at line 108 of file spi_sdcard.c.

#define R2_ERASE_PARAM 0x40

Definition at line 110 of file spi_sdcard.c.

#define R2_ERROR 0x04

Definition at line 106 of file spi_sdcard.c.

#define R2_LOCKED 0x01

Definition at line 104 of file spi_sdcard.c.

#define R2_RANGE_ERR 0x80

Definition at line 111 of file spi_sdcard.c.

#define R2_WP_FAILED 0x02

Definition at line 105 of file spi_sdcard.c.

#define R2_WP_VIOL 0x20

Definition at line 109 of file spi_sdcard.c.

#define SD_CMD_BLOCK_LENGTH 6

Definition at line 114 of file spi_sdcard.c.

#define SD_DATA_BLOCK_LENGTH 515

Definition at line 115 of file spi_sdcard.c.

#define SD_DETECT_PINNUM 29

Definition at line 44 of file spi_sdcard.c.

#define SD_DETECT_PORTNUM 4

Definition at line 43 of file spi_sdcard.c.

#define SD_WAIT_R1_TIMEOUT 100000

Definition at line 116 of file spi_sdcard.c.

Typedef Documentation

typedef enum _sd_connect_status sd_connect_status

typedef enum _sd_error sd_error

Enumeration Type Documentation

enum _sd_connect_status

Enumerator:
SD_CONNECTED
SD_DISCONNECTED

Definition at line 45 of file spi_sdcard.c.

enum _sd_error

Enumerator:
SD_OK
SD_NG
SD_CMD_BAD_PARAMETER
SD_ERROR_TOKEN
SD_ERROR_TIMEOUT
SD_ERROR_BUS_NOT_IDLE
SD_ERROR_CMD0
SD_ERROR_CMD55
SD_ERROR_ACMD41
SD_ERROR_CMD59

Definition at line 50 of file spi_sdcard.c.

Function Documentation

int c_entry ( void )

c_entry: Main SPI program body

Parameters:
[in] None
Returns:
int

Definition at line 467 of file spi_sdcard.c.

void check_failed | ( | uint8_t * | file,
 |  | uint32_t | line
 | ) |  |

Definition at line 599 of file spi_sdcard.c.

uint8_t crc_7 | ( | uint8_t | old_crc,
 |  | uint8_t | data
 | ) |  |

Calculate CRC-7 as required by SD specification.

Parameters:
[in] - old_crc: 0x00 to start new CRC or value from previous call to continue.
  • data: data byte to add to CRC computation
Returns:
CRC-7 checksum which MUST be augmented by crc_7augment() before used

Definition at line 208 of file spi_sdcard.c.

uint8_t crc_7final ( uint8_t old_crc )

Provides the zero-padding final step to CRC-7.

Parameters:
[in] - old_crc: value from last crc_7()call
Returns:
Finalized CRC-7 checksum

Definition at line 228 of file spi_sdcard.c.

void CS_Force ( int32_t state )

Drive CS output pin to low/high level to select slave device via /CS pin state.

Parameters:
[in] state State of CS output pin that will be driven:
  • 0: Drive CS pin to low level
  • 1: Drive CS pin to high level
Returns:
None

void CS_Init ( void )

Initialize CS pin as GPIO function to drive /CS pin due to definition of CS_PORT_NUM and CS_PORT_NUM.

Parameters:
None
Returns:
None

int main ( void )

Definition at line 585 of file spi_sdcard.c.

void print_menu ( void )

Print Welcome menu.

Parameters:
[in] none
Returns:
None
print_menu

Print menu screen.

Print Welcome menu.

Print menu.

Parameters:
[in] none
Returns:
none

Definition at line 209 of file can_test_two_kit.c.

sd_connect_status SD_GetCardConnectStatus ( void )

check if SD card is inserted or not

Parameters:
[in] none
Returns:
SD_CONNECTED or SD_DISCONNECTED

Definition at line 192 of file spi_sdcard.c.

sd_error SD_GetCID ( void )

Get SD card's CID register.

Parameters:
[in] none
Returns:
OK or NG OK: the returned data from SD card is stored in sd_data_buf

Definition at line 452 of file spi_sdcard.c.

sd_error SD_Init ( uint8_t retries )

Initialize SD card in SPI mode.

Parameters:
[in] - retries: number retry time
Returns:
initialization successful or terminated with specific error code

Definition at line 385 of file spi_sdcard.c.

void SD_SendCommand | ( | uint8_t | cmd,
 |  | uint8_t * | arg
 | ) |  |

Send command to SD card.

Parameters:
[in] - cmd: SD command code
  • arg: pointer to array of 4x8 bytes, argument of command
Returns:
n/a

Definition at line 272 of file spi_sdcard.c.

uint32_t SD_SendReceiveData_Polling | ( | void * | tx_buf,
 |  | void * | rx_buf,
 |  | uint32_t | length
 | ) |  |

Send/receive data over SPI bus.

Parameters:
[in] - tx_buf: pointer to transmit buffer. NULL if send 0xFF.
  • rx_buf: pointer to receive buffer NULL if nothing to receive.
  • length: number of data to send or receive
    Returns:
    the actual data sent or received.

Definition at line 250 of file spi_sdcard.c.

sd_error SD_WaitDeviceIdle ( uint32_t num_char )

Wait for SD card idle.

Parameters:
[in] - num_char: number characters (8 bits clock) to wait
Returns:
device already in idle state or need more time

Definition at line 355 of file spi_sdcard.c.

sd_error SD_WaitR1 | ( | uint8_t * | buffer,
 |  | uint32_t | length,
 |  | uint32_t | timeout
 | ) |  |

Wait for SD card R1 response.

Parameters:
[in] - buffer: pointer to receive buffer
  • length: length of receive data, must equal 1+actual length of data length = 0 if receive R1 only
    • timeout: timeout for retry
Returns:
error code

Definition at line 301 of file spi_sdcard.c.

Variable Documentation

uint8_t menu1[]

Initial value:

"********************************************************************************\n\r"
"Hello NXP Semiconductors \n\r"
"SPI communicate with SD card demo \n\r"
"\t - MCU: LPC17xx \n\r"
"\t - Core: ARM Cortex-M3 \n\r"
"\t - Communicate via: UART0 - 115200bps \n\r"
" Demo SPI module, read SD card's CID register and display via UART0\n\r"
"********************************************************************************\n\r"

Definition at line 118 of file spi_sdcard.c.

uint8_t sd_cmd_buf[SD_CMD_BLOCK_LENGTH]

Definition at line 132 of file spi_sdcard.c.

uint8_t sd_data_buf[SD_DATA_BLOCK_LENGTH]

Definition at line 133 of file spi_sdcard.c.

SPI_CFG_Type SPI_ConfigStruct

Definition at line 128 of file spi_sdcard.c.

SPI_DATA_SETUP_Type xferConfig

Definition at line 130 of file spi_sdcard.c.

Generated on Tue Jun 7 14:59:57 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: slave

slave
[SPI]

Defines

#define | BUFFER_SIZE 0x40
#define | SPI_DATABIT_SIZE 10

Functions

void | print_menu (void)
Print Welcome menu.
void | Buffer_Init (void)
Initialize buffer.
void | Error_Loop (void)
Error Loop (called by Buffer_Verify() if any error).
void | Buffer_Verify (void)
Verify buffer.
int | c_entry (void)
c_entry: Main SPI program body
int | main (void)
void | check_failed (uint8_t *file, uint32_t line)

Variables

uint8_t | menu1 []
uint8_t | menu2 [] = "Demo terminated! \n\r"
SPI_CFG_Type SPI_ConfigStruct
uint16_t | Tx_Buf [BUFFER_SIZE]
uint16_t | Rx_Buf [BUFFER_SIZE]

Define Documentation

#define BUFFER_SIZE 0x40

Max buffer length

Definition at line 39 of file spi_slave.c.

#define SPI_DATABIT_SIZE 10

Definition at line 40 of file spi_slave.c.

Function Documentation

void Buffer_Init ( void )

Initialize buffer.

Parameters:
[in] None
Returns:
None

void Buffer_Verify ( void )

Verify buffer.

Parameters:
[in] none
Returns:
None
Parameters:
[in] none
Returns:
None
Parameters:
[in] none
Returns:
TRUE - if two buffers are similar FALSE - if two buffers are different
Parameters:
[in] none
Returns:
TRUE: if two buffers are similar FALSE: if two buffers are different

Definition at line 120 of file flash_2_ram.c.

int c_entry ( void )

c_entry: Main SPI program body

Parameters:
[in] None
Returns:
int

Definition at line 162 of file spi_slave.c.

void check_failed | ( | uint8_t * | file,
 |  | uint32_t | line
 | ) |  |

Definition at line 248 of file spi_slave.c.

void Error_Loop ( void )

Error Loop (called by Buffer_Verify() if any error).

Parameters:
[in] none
Returns:
None

int main ( void )

Definition at line 234 of file spi_slave.c.

void print_menu ( void )

Print Welcome menu.

Parameters:
[in] none
Returns:
None
print_menu

Print menu screen.

Print Welcome menu.

Print menu.

Parameters:
[in] none
Returns:
none

Definition at line 209 of file can_test_two_kit.c.

Variable Documentation

uint8_t menu1[]

Initial value:

"********************************************************************************\n\r"
"Hello NXP Semiconductors \n\r"
"SPI demo \n\r"
"\t - MCU: LPC17xx \n\r"
"\t - Core: ARM Cortex-M3 \n\r"
"\t - Communicate via: UART0 - 115200bps \n\r"
"\t An example of SPI using interrupt mode to test the SPI driver \n\r"
" This example uses SPI in slave mode to communicate with SPI slave device \n\r"
" The master and slave transfer together a number of data byte \n\r"
"********************************************************************************\n\r"

Definition at line 43 of file spi_slave.c.

uint8_t menu2[] = "Demo terminated! \n\r"

Definition at line 54 of file spi_slave.c.

uint16_t Rx_Buf[BUFFER_SIZE]

Definition at line 64 of file spi_slave.c.

SPI_CFG_Type SPI_ConfigStruct

Definition at line 57 of file spi_slave.c.

uint16_t Tx_Buf[BUFFER_SIZE]

Definition at line 63 of file spi_slave.c.

Generated on Tue Jun 7 14:59:57 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: SSP

SSP
[LPC1700CMSIS Examples]

Modules

dma
Master
MicroWire
sc16is750_int
sc16is750_polling
Slave
TI
Generated on Tue Jun 7 14:59:47 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: dma

dma
[SSP]

Defines

#define | DMA_DATA_SIZE 65

Functions

void | DMA_IRQHandler (void)
GPDMA interrupt handler sub-routine.
void | print_menu (void)
Print Welcome menu.
void | Buffer_Init (void)
Initialize buffer.
void | Buffer_Verify (void)
Verify buffer.
void | Error_Loop (void)
Error Loop (called by Buffer_Verify() if any error).
int | c_entry (void)
c_entry: Main SSP program body
int | main (void)
void | check_failed (uint8_t *file, uint32_t line)

Variables

uint8_t | menu1 []
uint8_t | menu2 [] = "Demo terminated! \n\r"
SSP_CFG_Type SSP_ConfigStruct
__IO uint32_t | Channel0_TC
__IO uint32_t | Channel0_Err
__IO uint32_t | Channel1_TC
__IO uint32_t | Channel1_Err
uint8_t | dma_src [DMA_DATA_SIZE]
uint8_t | dma_dst [DMA_DATA_SIZE]

Define Documentation

#define DMA_DATA_SIZE 65

Definition at line 41 of file ssp_dma.c.

Function Documentation

void Buffer_Init ( void )

Initialize buffer.

Parameters:
[in] none
Returns:
None

void Buffer_Verify ( void )

Verify buffer.

Parameters:
[in] none
Returns:
None
Parameters:
[in] none
Returns:
None
Parameters:
[in] none
Returns:
TRUE - if two buffers are similar FALSE - if two buffers are different
Parameters:
[in] none
Returns:
TRUE: if two buffers are similar FALSE: if two buffers are different

Definition at line 120 of file flash_2_ram.c.

int c_entry ( void )

c_entry: Main SSP program body

Parameters:
[in] None
Returns:
int

Definition at line 196 of file ssp_dma.c.

void check_failed | ( | uint8_t * | file,
 |  | uint32_t | line
 | ) |  |

Definition at line 366 of file ssp_dma.c.

void DMA_IRQHandler ( void )

GPDMA interrupt handler sub-routine.

Parameters:
[in] None
Returns:
None

void Error_Loop ( void )

Error Loop (called by Buffer_Verify() if any error).

Parameters:
[in] none
Returns:
None

int main ( void )

Definition at line 352 of file ssp_dma.c.

void print_menu ( void )

Print Welcome menu.

Parameters:
[in] none
Returns:
None
print_menu

Print menu screen.

Print Welcome menu.

Print menu.

Parameters:
[in] none
Returns:
none

Definition at line 209 of file can_test_two_kit.c.

Variable Documentation

__IO uint32_t Channel0_Err

Definition at line 65 of file ssp_dma.c.

__IO uint32_t Channel0_TC

Definition at line 62 of file ssp_dma.c.

__IO uint32_t Channel1_Err

Definition at line 71 of file ssp_dma.c.

__IO uint32_t Channel1_TC

Definition at line 68 of file ssp_dma.c.

uint8_t dma_dst[DMA_DATA_SIZE]

Definition at line 77 of file ssp_dma.c.

uint8_t dma_src[DMA_DATA_SIZE]

Definition at line 74 of file ssp_dma.c.

uint8_t menu1[]

Initial value:

"********************************************************************************\n\r"
"Hello NXP Semiconductors \n\r"
"SSP demo \n\r"
"\t - MCU: LPC17xx \n\r"
"\t - Core: ARM Cortex-M3 \n\r"
"\t - Communicate via: UART0 - 115200bps \n\r"
" This example uses SSP function in MASTER mode \n\r"
" with Loop-back mode (MOSI <-> MISO) \n\r"
" Transfer 64 bytes of data (in DMA mode for both Tx and Rx \n\r"
" channel) \n\r"
"********************************************************************************\n\r"

Definition at line 44 of file ssp_dma.c.

uint8_t menu2[] = "Demo terminated! \n\r"

Definition at line 56 of file ssp_dma.c.

SSP_CFG_Type SSP_ConfigStruct

Definition at line 59 of file ssp_dma.c.

Generated on Tue Jun 7 14:59:57 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Master

Master
[SSP]

Defines

#define | BUFFER_SIZE 0x40

Functions

void | print_menu (void)
Print Welcome menu.
void | Buffer_Init (void)
Initialize buffer.
void | Error_Loop (void)
Error Loop (called by Buffer_Verify() if any error).
void | Buffer_Verify (void)
Verify buffer.
int | c_entry (void)
c_entry: Main SSP program body
int | main (void)
void | check_failed (uint8_t *file, uint32_t line)

Variables

uint8_t | menu1 []
uint8_t | menu2 [] = "Demo terminated! \n\r"
SSP_CFG_Type SSP_ConfigStruct
uint8_t | Tx_Buf [BUFFER_SIZE]
uint8_t | Rx_Buf [BUFFER_SIZE]

Define Documentation

#define BUFFER_SIZE 0x40

Max buffer length

Definition at line 39 of file ssp_master.c.

Function Documentation

void Buffer_Init ( void )

Initialize buffer.

Parameters:
[in] None
Returns:
None

void Buffer_Verify ( void )

Verify buffer.

Parameters:
[in] none
Returns:
None
Parameters:
[in] none
Returns:
None
Parameters:
[in] none
Returns:
TRUE - if two buffers are similar FALSE - if two buffers are different
Parameters:
[in] none
Returns:
TRUE: if two buffers are similar FALSE: if two buffers are different

Definition at line 120 of file flash_2_ram.c.

int c_entry ( void )

c_entry: Main SSP program body

Parameters:
[in] None
Returns:
int

Definition at line 138 of file ssp_master.c.

void check_failed | ( | uint8_t * | file,
 |  | uint32_t | line
 | ) |  |

Definition at line 225 of file ssp_master.c.

void Error_Loop ( void )

Error Loop (called by Buffer_Verify() if any error).

Parameters:
[in] none
Returns:
None

int main ( void )

Definition at line 211 of file ssp_master.c.

void print_menu ( void )

Print Welcome menu.

Parameters:
[in] none
Returns:
None
print_menu

Print menu screen.

Print Welcome menu.

Print menu.

Parameters:
[in] none
Returns:
none

Definition at line 209 of file can_test_two_kit.c.

Variable Documentation

uint8_t menu1[]

Initial value:

"********************************************************************************\n\r"
"Hello NXP Semiconductors \n\r"
"SSP demo \n\r"
"\t - MCU: LPC17xx \n\r"
"\t - Core: ARM Cortex-M3 \n\r"
"\t - Communicate via: UART0 - 115200bps \n\r"
"\t An example of SSP using polling mode to test the SSP driver \n\r"
" This example uses SSP in SPI mode as master to communicate with an SSP slave device \n\r"
" The master and slave transfer together a number of data byte \n\r"
"********************************************************************************\n\r"

Definition at line 43 of file ssp_master.c.

uint8_t menu2[] = "Demo terminated! \n\r"

Definition at line 54 of file ssp_master.c.

uint8_t Rx_Buf[BUFFER_SIZE]

Definition at line 63 of file ssp_master.c.

SSP_CFG_Type SSP_ConfigStruct

Definition at line 57 of file ssp_master.c.

uint8_t Tx_Buf[BUFFER_SIZE]

Definition at line 60 of file ssp_master.c.

Generated on Tue Jun 7 14:59:57 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: MicroWire

MicroWire
[SSP]

Defines

#define | IDLE_CHAR 0xFF
#define | USEDSSPDEV_M 0
#define | USEDSSPDEV_S 1
#define | BUFFER_SIZE 0x40
#define | MicroWire_WR_CMD ((uint8_t)(0x00))
#define | MicroWire_RD_CMD ((uint8_t)(0x01))
#define | SSPDEV_M LPC_SSP0
#define | SSPDEV_S LPC_SSP1

Functions

void | ssp_MW_SendCMD (LPC_SSP_TypeDef *SSPx, uint8_t cmd)
Send command to slave in master mode.
uint16_t | ssp_MW_GetRSP (LPC_SSP_TypeDef *SSPx)
Get respond from slave after sending a command in master mode.
uint8_t | ssp_MW_GetCMD (LPC_SSP_TypeDef *SSPx)
Get command from master in slave mode.
void | ssp_MW_SendRSP (LPC_SSP_TypeDef *SSPx, uint16_t Rsp)
Send respond to master in slave mode.
void | print_menu (void)
Print Welcome menu.
void | Buffer_Init (void)
Initialize buffer.
void | Buffer_Verify (void)
Verify buffer.
void | Error_Loop (void)
Error Loop (called by Buffer_Verify() if any error).
int | c_entry (void)
c_entry: Main MICROWIRE program body
int | main (void)
void | check_failed (uint8_t *file, uint32_t line)

Variables

uint8_t * | pRdBuf_M
uint32_t | RdIdx_M
uint32_t | DatLen_M
uint8_t | Master_Rx_Buf [BUFFER_SIZE]
uint8_t * | pWrBuf_S
uint32_t | WrIdx_S
uint32_t | DatLen_S
uint8_t | Slave_Tx_Buf [BUFFER_SIZE]
uint8_t | Last_cmd
uint8_t | menu1 []
SSP_CFG_Type SSP_ConfigStruct

Define Documentation

#define BUFFER_SIZE 0x40

Max buffer length

Definition at line 49 of file microwire_test.c.

#define IDLE_CHAR 0xFF

Definition at line 40 of file microwire_test.c.

#define MicroWire_RD_CMD ((uint8_t)(0x01))

Definition at line 58 of file microwire_test.c.

#define MicroWire_WR_CMD ((uint8_t)(0x00))

Definition at line 56 of file microwire_test.c.

#define SSPDEV_M LPC_SSP0

Definition at line 66 of file microwire_test.c.

#define SSPDEV_S LPC_SSP1

Definition at line 76 of file microwire_test.c.

#define USEDSSPDEV_M 0

Used SSP device as master definition

Definition at line 43 of file microwire_test.c.

#define USEDSSPDEV_S 1

Used SSP device as slave definition

Definition at line 46 of file microwire_test.c.

Function Documentation

void Buffer_Init ( void )

Initialize buffer.

Parameters:
[in] None
Returns:
None

void Buffer_Verify ( void )

Verify buffer.

Parameters:
[in] none
Returns:
None
Parameters:
[in] none
Returns:
None
Parameters:
[in] none
Returns:
TRUE - if two buffers are similar FALSE - if two buffers are different
Parameters:
[in] none
Returns:
TRUE: if two buffers are similar FALSE: if two buffers are different

Definition at line 120 of file flash_2_ram.c.

int c_entry ( void )

c_entry: Main MICROWIRE program body

Parameters:
[in] None
Returns:
int

Definition at line 248 of file microwire_test.c.

void check_failed | ( | uint8_t * | file,
 |  | uint32_t | line
 | ) |  |

Definition at line 412 of file microwire_test.c.

void Error_Loop ( void )

Error Loop (called by Buffer_Verify() if any error).

Parameters:
[in] none
Returns:
None

int main ( void )

Definition at line 398 of file microwire_test.c.

void print_menu ( void )

Print Welcome menu.

Parameters:
[in] none
Returns:
None
print_menu

Print menu screen.

Print Welcome menu.

Print menu.

Parameters:
[in] none
Returns:
none

Definition at line 209 of file can_test_two_kit.c.

uint8_t ssp_MW_GetCMD ( LPC_SSP_TypeDef * SSPx )

Get command from master in slave mode.

Parameters:
[in] None
Returns:
None

Definition at line 161 of file microwire_test.c.

uint16_t ssp_MW_GetRSP ( LPC_SSP_TypeDef * SSPx )

Get respond from slave after sending a command in master mode.

Parameters:
[in] None
Returns:
None

Definition at line 150 of file microwire_test.c.

void ssp_MW_SendCMD | ( | LPC_SSP_TypeDef * | SSPx,
 |  | uint8_t | cmd
 | ) |  |

Send command to slave in master mode.

Parameters:
[in] None
Returns:
None

Definition at line 137 of file microwire_test.c.

void ssp_MW_SendRSP | ( | LPC_SSP_TypeDef * | SSPx,
 |  | uint16_t | Rsp
 | ) |  |

Send respond to master in slave mode.

Parameters:
[in] None
Returns:
None

Definition at line 174 of file microwire_test.c.

Variable Documentation

uint32_t DatLen_M

Definition at line 87 of file microwire_test.c.

uint32_t DatLen_S

Definition at line 98 of file microwire_test.c.

uint8_t Last_cmd

Definition at line 102 of file microwire_test.c.

uint8_t Master_Rx_Buf[BUFFER_SIZE]

Definition at line 89 of file microwire_test.c.

uint8_t menu1[]

Initial value:

"********************************************************************************\n\r"
"Hello NXP Semiconductors \n\r"
"SSP demo \n\r"
"\t - MCU: LPC17xx \n\r"
"\t - Core: ARM Cortex-M3 \n\r"
"\t - Communicate via: UART0 - 115200 bps \n\r"
" This example uses two SSP peripherals in MicroWire frame format \n\r"
" \t one is set as master mode and the other is set as slave mode. \n\r"
"\t The master and slave transfer a number of data bytes together \n\r"
"\t in polling mode \n\r"
"********************************************************************************\n\r"

Definition at line 105 of file microwire_test.c.

uint8_t* pRdBuf_M

Definition at line 83 of file microwire_test.c.

uint8_t* pWrBuf_S

Definition at line 94 of file microwire_test.c.

uint32_t RdIdx_M

Definition at line 85 of file microwire_test.c.

uint8_t Slave_Tx_Buf[BUFFER_SIZE]

Definition at line 100 of file microwire_test.c.

SSP_CFG_Type SSP_ConfigStruct

Definition at line 119 of file microwire_test.c.

uint32_t WrIdx_S

Definition at line 96 of file microwire_test.c.

Generated on Tue Jun 7 14:59:57 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: sc16is750_int

sc16is750_int
[SSP]

Defines

#define | CS_PORT_NUM 0
#define | CS_PIN_NUM 16
#define | IDLE_CHAR 0xFF
#define | SC16IS740_WR_CMD(x) ((uint8_t) (x << 3))
#define | SC16IS740_RD_CMD(x) ((uint8_t) ((x << 3) | 0x80))
#define | SC16IS740_IODIR_REG 0x0A
#define | SC16IS740_IOSTATE_REG 0x0B
#define | SC16IS740_IOCON_REG 0x0E

Functions

void | CS_Init (void)
Initialize CS pin as GPIO function to drive /CS pin due to definition of CS_PORT_NUM and CS_PORT_NUM.
void | CS_Force (int32_t state)
Drive CS output pin to low/high level to select slave device via /CS pin state.
void | print_menu (void)
Print Welcome menu.
int | c_entry (void)
c_entry: Main SSP program body
int | main (void)
void | check_failed (uint8_t *file, uint32_t line)

Variables

uint8_t | menu1 []
uint8_t | menu2 [] = "Demo terminated! \n\r"
uint8_t | iocon_cfg [2] = {SC16IS740_WR_CMD(SC16IS740_IOCON_REG), 0x00}
uint8_t | iodir_cfg [2] = {SC16IS740_WR_CMD(SC16IS740_IODIR_REG), 0xFF}
uint8_t | iostate_on [2] = {SC16IS740_WR_CMD(SC16IS740_IOSTATE_REG), 0x00}
uint8_t | iostate_off [2] = {SC16IS740_WR_CMD(SC16IS740_IOSTATE_REG), 0xFF}
uint8_t | sspreadbuf [2]
__IO FlagStatus | complete
SSP_CFG_Type SSP_ConfigStruct
SSP_DATA_SETUP_Type xferConfig

Define Documentation

#define CS_PIN_NUM 16

Definition at line 42 of file sc16is750_int.c.

#define CS_PORT_NUM 0

Definition at line 40 of file sc16is750_int.c.

#define IDLE_CHAR 0xFF

Definition at line 45 of file sc16is750_int.c.

#define SC16IS740_IOCON_REG 0x0E

Definition at line 54 of file sc16is750_int.c.

#define SC16IS740_IODIR_REG 0x0A

Definition at line 52 of file sc16is750_int.c.

#define SC16IS740_IOSTATE_REG 0x0B

Definition at line 53 of file sc16is750_int.c.

#define SC16IS740_RD_CMD ( x ) ((uint8_t) ((x << 3) | 0x80))

Definition at line 49 of file sc16is750_int.c.

#define SC16IS740_WR_CMD ( x ) ((uint8_t) (x << 3))

Definition at line 48 of file sc16is750_int.c.

Function Documentation

int c_entry ( void )

c_entry: Main SSP program body

Parameters:
[in] None
Returns:
int

Definition at line 263 of file sc16is750_int.c.

void check_failed | ( | uint8_t * | file,
 |  | uint32_t | line
 | ) |  |

Definition at line 410 of file sc16is750_int.c.

void CS_Force ( int32_t state )

Drive CS output pin to low/high level to select slave device via /CS pin state.

Parameters:
[in] state State of CS output pin that will be driven:
  • 0: Drive CS pin to low level
  • 1: Drive CS pin to high level
Returns:
None

void CS_Init ( void )

Initialize CS pin as GPIO function to drive /CS pin due to definition of CS_PORT_NUM and CS_PORT_NUM.

Parameters:
None
Returns:
None

int main ( void )

Definition at line 396 of file sc16is750_int.c.

void print_menu ( void )

Print Welcome menu.

Parameters:
[in] none
Returns:
None
print_menu

Print menu screen.

Print Welcome menu.

Print menu.

Parameters:
[in] none
Returns:
none

Definition at line 209 of file can_test_two_kit.c.

Variable Documentation

__IO FlagStatus complete

Definition at line 79 of file sc16is750_int.c.

uint8_t iocon_cfg[2] = {SC16IS740_WR_CMD(SC16IS740_IOCON_REG), 0x00}

Definition at line 72 of file sc16is750_int.c.

uint8_t iodir_cfg[2] = {SC16IS740_WR_CMD(SC16IS740_IODIR_REG), 0xFF}

Definition at line 73 of file sc16is750_int.c.

uint8_t iostate_off[2] = {SC16IS740_WR_CMD(SC16IS740_IOSTATE_REG), 0xFF}

Definition at line 75 of file sc16is750_int.c.

uint8_t iostate_on[2] = {SC16IS740_WR_CMD(SC16IS740_IOSTATE_REG), 0x00}

Definition at line 74 of file sc16is750_int.c.

uint8_t menu1[]

Initial value:

"********************************************************************************\n\r"
"Hello NXP Semiconductors \n\r"
"SSP demo \n\r"
"\t - MCU: LPC17xx \n\r"
"\t - Core: ARM Cortex-M3 \n\r"
"\t - Communicate via: UART0 - 9.6 kbps \n\r"
" An example of SSP using interrupt mode - SPI frame format \n\r"
"to test SSP driver \n\r"
" Using SSP at mode SSP master/8bit on LPC1768 to communicate with \n\r"
" SC16IS750/760 Demo Board \n\r"
" Press '1' to turn on LEDs, '2' to turn off LEDs \n\r"
"********************************************************************************\n\r"

Definition at line 57 of file sc16is750_int.c.

uint8_t menu2[] = "Demo terminated! \n\r"

Definition at line 70 of file sc16is750_int.c.

SSP_CFG_Type SSP_ConfigStruct

Definition at line 82 of file sc16is750_int.c.

uint8_t sspreadbuf[2]

Definition at line 76 of file sc16is750_int.c.

SSP_DATA_SETUP_Type xferConfig

Definition at line 83 of file sc16is750_int.c.

Generated on Tue Jun 7 14:59:57 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: sc16is750_polling

sc16is750_polling
[SSP]

Defines

#define | CS_PORT_NUM 0
#define | CS_PIN_NUM 16
#define | SC16IS740_WR_CMD(x) ((uint8_t) (x << 3))
#define | SC16IS740_RD_CMD(x) ((uint8_t) ((x << 3) | 0x80))
#define | SC16IS740_IODIR_REG 0x0A
#define | SC16IS740_IOSTATE_REG 0x0B
#define | SC16IS740_IOCON_REG 0x0E

Functions

void | CS_Init (void)
Initialize CS pin as GPIO function to drive /CS pin due to definition of CS_PORT_NUM and CS_PORT_NUM.
void | CS_Force (int32_t state)
Drive CS output pin to low/high level to select slave device via /CS pin state.
void | print_menu (void)
Print Welcome menu.
int | c_entry (void)
c_entry: Main SSP program body
int | main (void)
void | check_failed (uint8_t *file, uint32_t line)

Variables

uint8_t | menu1 []
uint8_t | menu2 [] = "Demo terminated! \n\r"
SSP_CFG_Type SSP_ConfigStruct
uint8_t | iocon_cfg [2] = {SC16IS740_WR_CMD(SC16IS740_IOCON_REG), 0x00}
uint8_t | iodir_cfg [2] = {SC16IS740_WR_CMD(SC16IS740_IODIR_REG), 0xFF}
uint8_t | iostate_on [2] = {SC16IS740_WR_CMD(SC16IS740_IOSTATE_REG), 0x00}
uint8_t | iostate_off [2] = {SC16IS740_WR_CMD(SC16IS740_IOSTATE_REG), 0xFF}
uint8_t | sspreadbuf [2]

Define Documentation

#define CS_PIN_NUM 16

Definition at line 43 of file sc16is750_polling.c.

#define CS_PORT_NUM 0

Definition at line 41 of file sc16is750_polling.c.

#define SC16IS740_IOCON_REG 0x0E

Definition at line 52 of file sc16is750_polling.c.

#define SC16IS740_IODIR_REG 0x0A

Definition at line 50 of file sc16is750_polling.c.

#define SC16IS740_IOSTATE_REG 0x0B

Definition at line 51 of file sc16is750_polling.c.

#define SC16IS740_RD_CMD ( x ) ((uint8_t) ((x << 3) | 0x80))

Definition at line 47 of file sc16is750_polling.c.

#define SC16IS740_WR_CMD ( x ) ((uint8_t) (x << 3))

Definition at line 46 of file sc16is750_polling.c.

Function Documentation

int c_entry ( void )

c_entry: Main SSP program body

Parameters:
[in] None
Returns:
int

Definition at line 132 of file sc16is750_polling.c.

void check_failed | ( | uint8_t * | file,
 |  | uint32_t | line
 | ) |  |

Definition at line 271 of file sc16is750_polling.c.

void CS_Force ( int32_t state )

Drive CS output pin to low/high level to select slave device via /CS pin state.

Parameters:
[in] state State of CS output pin that will be driven:
  • 0: Drive CS pin to low level
  • 1: Drive CS pin to high level
Returns:
None

void CS_Init ( void )

Initialize CS pin as GPIO function to drive /CS pin due to definition of CS_PORT_NUM and CS_PORT_NUM.

Parameters:
None
Returns:
None

int main ( void )

Definition at line 257 of file sc16is750_polling.c.

void print_menu ( void )

Print Welcome menu.

Parameters:
[in] none
Returns:
None
print_menu

Print menu screen.

Print Welcome menu.

Print menu.

Parameters:
[in] none
Returns:
none

Definition at line 209 of file can_test_two_kit.c.

Variable Documentation

uint8_t iocon_cfg[2] = {SC16IS740_WR_CMD(SC16IS740_IOCON_REG), 0x00}

Definition at line 73 of file sc16is750_polling.c.

uint8_t iodir_cfg[2] = {SC16IS740_WR_CMD(SC16IS740_IODIR_REG), 0xFF}

Definition at line 74 of file sc16is750_polling.c.

uint8_t iostate_off[2] = {SC16IS740_WR_CMD(SC16IS740_IOSTATE_REG), 0xFF}

Definition at line 76 of file sc16is750_polling.c.

uint8_t iostate_on[2] = {SC16IS740_WR_CMD(SC16IS740_IOSTATE_REG), 0x00}

Definition at line 75 of file sc16is750_polling.c.

uint8_t menu1[]

Initial value:

"********************************************************************************\n\r"
"Hello NXP Semiconductors \n\r"
"SSP demo \n\r"
"\t - MCU: LPC17xx \n\r"
"\t - Core: ARM Cortex-M3 \n\r"
"\t - Communicate via: UART0 - 9.6 kbps \n\r"
" Communicate with SSP0 function on SC16IS750/760 Demo Board\n\r"
" in polling mode\n\r"
" Use IO function on SC16IS740/750/760 chip to turn ON/OFF LEDs\n\r"
" Press '1' to turn ON LEDs, '2' to turn OFF LEDs \n\r"
"********************************************************************************\n\r"

Definition at line 56 of file sc16is750_polling.c.

uint8_t menu2[] = "Demo terminated! \n\r"

Definition at line 68 of file sc16is750_polling.c.

SSP_CFG_Type SSP_ConfigStruct

Definition at line 71 of file sc16is750_polling.c.

uint8_t sspreadbuf[2]

Definition at line 77 of file sc16is750_polling.c.

Generated on Tue Jun 7 14:59:58 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Slave

Slave
[SSP]

Defines

#define | BUFFER_SIZE 0x40

Functions

void | SSP0_IRQHandler (void)
SSP0 Interrupt used for reading and writing handler.
void | print_menu (void)
Print Welcome menu.
void | Buffer_Init (void)
Initialize buffer.
void | Error_Loop (void)
Error Loop (called by Buffer_Verify() if any error).
void | Buffer_Verify (void)
Verify buffer.
int | c_entry (void)
c_entry: Main SSP program body
int | main (void)
void | check_failed (uint8_t *file, uint32_t line)

Variables

uint8_t | menu1 []
uint8_t | menu2 [] = "Demo terminated! \n\r"
SSP_CFG_Type SSP_ConfigStruct
SSP_DATA_SETUP_Type xferConfig
uint8_t | Tx_Buf [BUFFER_SIZE]
uint8_t | Rx_Buf [BUFFER_SIZE]
__IO FlagStatus | complete

Define Documentation

#define BUFFER_SIZE 0x40

Max buffer length

Definition at line 40 of file ssp_slave.c.

Function Documentation

void Buffer_Init ( void )

Initialize buffer.

Parameters:
[in] None
Returns:
None

void Buffer_Verify ( void )

Verify buffer.

Parameters:
[in] none
Returns:
None
Parameters:
[in] none
Returns:
None
Parameters:
[in] none
Returns:
TRUE - if two buffers are similar FALSE - if two buffers are different
Parameters:
[in] none
Returns:
TRUE: if two buffers are similar FALSE: if two buffers are different

Definition at line 120 of file flash_2_ram.c.

int c_entry ( void )

c_entry: Main SSP program body

Parameters:
[in] None
Returns:
int

Definition at line 266 of file ssp_slave.c.

void check_failed | ( | uint8_t * | file,
 |  | uint32_t | line
 | ) |  |

Definition at line 356 of file ssp_slave.c.

void Error_Loop ( void )

Error Loop (called by Buffer_Verify() if any error).

Parameters:
[in] none
Returns:
None

int main ( void )

Definition at line 342 of file ssp_slave.c.

void print_menu ( void )

Print Welcome menu.

Parameters:
[in] none
Returns:
None
print_menu

Print menu screen.

Print Welcome menu.

Print menu.

Parameters:
[in] none
Returns:
none

Definition at line 209 of file can_test_two_kit.c.

void SSP0_IRQHandler ( void )

SSP0 Interrupt used for reading and writing handler.

Parameters:
None
Returns:
None

Variable Documentation

__IO FlagStatus complete

Definition at line 68 of file ssp_slave.c.

uint8_t menu1[]

Initial value:

"********************************************************************************\n\r"
"Hello NXP Semiconductors \n\r"
"SSP demo \n\r"
"\t - MCU: LPC17xx \n\r"
"\t - Core: ARM Cortex-M3 \n\r"
"\t - Communicate via: UART0 - 115200bps \n\r"
"\t An example of SSP using interrupt mode to test the SSP driver \n\r"
" This example uses SSP in SPI mode as slave to communicate with an SSP master device \n\r"
" The master and slave transfer together a number of data byte \n\r"
"********************************************************************************\n\r"

Definition at line 44 of file ssp_slave.c.

uint8_t menu2[] = "Demo terminated! \n\r"

Definition at line 55 of file ssp_slave.c.

uint8_t Rx_Buf[BUFFER_SIZE]

Definition at line 65 of file ssp_slave.c.

SSP_CFG_Type SSP_ConfigStruct

Definition at line 58 of file ssp_slave.c.

uint8_t Tx_Buf[BUFFER_SIZE]

Definition at line 63 of file ssp_slave.c.

SSP_DATA_SETUP_Type xferConfig

Definition at line 60 of file ssp_slave.c.

Generated on Tue Jun 7 14:59:58 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: TI

TI
[SSP]

Defines

#define | IDLE_CHAR 0xFF
#define | USEDSSPDEV_M 0
#define | USEDSSPDEV_S 1
#define | BUFFER_SIZE 0x40
#define | SSPDEV_M LPC_SSP0
#define | SSPDEV_S LPC_SSP1

Functions

void | SSP0_IRQHandler (void)
SSP0 Interrupt used for reading and writing handler.
void | SSP1_IRQHandler (void)
SSP1 Interrupt used for reading and writing handler.
void | ssp_Master_IntHandler (void)
SSP Master Interrupt sub-routine used for reading and writing handler.
void | ssp_Slave_IntHandler (void)
SSP Slave Interrupt sub-routine used for reading and writing handler.
int32_t | ssp_MasterReadWrite (LPC_SSP_TypeDef *SSPx, void *rbuffer, void *wbuffer, uint32_t length)
SSP Read write in polling mode function (Master mode).
int32_t | ssp_SlaveReadWrite (LPC_SSP_TypeDef *SSPx, void *rbuffer, void *wbuffer, uint32_t length)
SSP Read write in polling mode function (Slave mode).
void | print_menu (void)
Print Welcome menu.
void | Buffer_Init (void)
Initialize buffer.
void | Buffer_Verify (void)
Verify buffer.
void | Error_Loop (void)
Error Loop (called by Buffer_Verify() if any error).
int | c_entry (void)
c_entry: Main TI program body
int | main (void)
void | check_failed (uint8_t *file, uint32_t line)

Variables

uint8_t | menu1 []
uint8_t | menu2 [] = "Demo terminated! \n\r"
SSP_CFG_Type SSP_ConfigStruct
uint8_t * | pRdBuf_M
uint8_t * | pWrBuf_M
uint32_t | RdIdx_M
uint32_t | WrIdx_M
uint32_t | DatLen_M
__IO Bool | complete_M
uint8_t | Master_Tx_Buf [BUFFER_SIZE]
uint8_t | Master_Rx_Buf [BUFFER_SIZE]
uint8_t * | pRdBuf_S
uint8_t * | pWrBuf_S
uint32_t | RdIdx_S
uint32_t | WrIdx_S
uint32_t | DatLen_S
__IO Bool | complete_S
uint8_t | Slave_Tx_Buf [BUFFER_SIZE]
uint8_t | Slave_Rx_Buf [BUFFER_SIZE]

Define Documentation

#define BUFFER_SIZE 0x40

Max buffer length

Definition at line 48 of file ti_test.c.

#define IDLE_CHAR 0xFF

Definition at line 39 of file ti_test.c.

#define SSPDEV_M LPC_SSP0

Definition at line 55 of file ti_test.c.

#define SSPDEV_S LPC_SSP1

Definition at line 65 of file ti_test.c.

#define USEDSSPDEV_M 0

Used SSP device as master definition

Definition at line 42 of file ti_test.c.

#define USEDSSPDEV_S 1

Used SSP device as slave definition

Definition at line 45 of file ti_test.c.

Function Documentation

void Buffer_Init ( void )

Initialize buffer.

Parameters:
[in] None
Returns:
None

void Buffer_Verify ( void )

Verify buffer.

Parameters:
[in] none
Returns:
None
Parameters:
[in] none
Returns:
None
Parameters:
[in] none
Returns:
TRUE - if two buffers are similar FALSE - if two buffers are different
Parameters:
[in] none
Returns:
TRUE: if two buffers are similar FALSE: if two buffers are different

Definition at line 120 of file flash_2_ram.c.

int c_entry ( void )

c_entry: Main TI program body

Parameters:
[in] None
Returns:
int

Definition at line 517 of file ti_test.c.

void check_failed | ( | uint8_t * | file,
 |  | uint32_t | line
 | ) |  |

Definition at line 656 of file ti_test.c.

void Error_Loop ( void )

Error Loop (called by Buffer_Verify() if any error).

Parameters:
[in] none
Returns:
None

int main ( void )

Definition at line 642 of file ti_test.c.

void print_menu ( void )

Print Welcome menu.

Parameters:
[in] none
Returns:
None
print_menu

Print menu screen.

Print Welcome menu.

Print menu.

Parameters:
[in] none
Returns:
none

Definition at line 209 of file can_test_two_kit.c.

void SSP0_IRQHandler ( void )

SSP0 Interrupt used for reading and writing handler.

Parameters:
None
Returns:
None

void SSP1_IRQHandler ( void )

SSP1 Interrupt used for reading and writing handler.

Parameters:
None
Returns:
None

Definition at line 338 of file ti_test.c.

void ssp_Master_IntHandler ( void )

SSP Master Interrupt sub-routine used for reading and writing handler.

Parameters:
None
Returns:
None

Definition at line 152 of file ti_test.c.

int32_t ssp_MasterReadWrite | ( | LPC_SSP_TypeDef * | SSPx,
 |  | void * | rbuffer,
 |  | void * | wbuffer,
 |  | uint32_t | length
 | ) |  |

SSP Read write in polling mode function (Master mode).

Parameters:
[in] SSPdev,: Pointer to SSP device
[out] rbuffer,: pointer to read buffer
[in] wbuffer,: pointer to write buffer
[in] length,: length of data to read and write
Returns:
0 if there no data to send, otherwise return 1

Definition at line 359 of file ti_test.c.

void ssp_Slave_IntHandler ( void )

SSP Slave Interrupt sub-routine used for reading and writing handler.

Parameters:
None
Returns:
None

Definition at line 238 of file ti_test.c.

int32_t ssp_SlaveReadWrite | ( | LPC_SSP_TypeDef * | SSPx,
 |  | void * | rbuffer,
 |  | void * | wbuffer,
 |  | uint32_t | length
 | ) |  |

SSP Read write in polling mode function (Slave mode).

Parameters:
[in] SSPdev,: Pointer to SSP device
[out] rbuffer,: pointer to read buffer
[in] wbuffer,: pointer to write buffer
[in] length,: length of data to read and write
Returns:
0 if there no data to send, otherwise return 1

Definition at line 405 of file ti_test.c.

Variable Documentation

__IO Bool complete_M

Definition at line 100 of file ti_test.c.

__IO Bool complete_S

Definition at line 119 of file ti_test.c.

uint32_t DatLen_M

Definition at line 98 of file ti_test.c.

uint32_t DatLen_S

Definition at line 117 of file ti_test.c.

uint8_t Master_Rx_Buf[BUFFER_SIZE]

Definition at line 104 of file ti_test.c.

uint8_t Master_Tx_Buf[BUFFER_SIZE]

Definition at line 102 of file ti_test.c.

uint8_t menu1[]

Initial value:

"********************************************************************************\n\r"
"Hello NXP Semiconductors \n\r"
"SSP demo \n\r"
"\t - MCU: LPC17xx \n\r"
"\t - Core: ARM Cortex-M3 \n\r"
"\t - Communicate via: UART0 - 115.200 kbps \n\r"
" This example uses two SSP peripherals in TI frame format \n\r"
" \t one is set as master mode and the other is set as slave mode. \n\r"
"\t The master and slave transfer a number of data bytes together \n\r"
"\t in interrupt mode \n\r"
"********************************************************************************\n\r"

Definition at line 71 of file ti_test.c.

uint8_t menu2[] = "Demo terminated! \n\r"

Definition at line 83 of file ti_test.c.

uint8_t* pRdBuf_M

Definition at line 90 of file ti_test.c.

uint8_t* pRdBuf_S

Definition at line 109 of file ti_test.c.

uint8_t* pWrBuf_M

Definition at line 92 of file ti_test.c.

uint8_t* pWrBuf_S

Definition at line 111 of file ti_test.c.

uint32_t RdIdx_M

Definition at line 94 of file ti_test.c.

uint32_t RdIdx_S

Definition at line 113 of file ti_test.c.

uint8_t Slave_Rx_Buf[BUFFER_SIZE]

Definition at line 123 of file ti_test.c.

uint8_t Slave_Tx_Buf[BUFFER_SIZE]

Definition at line 121 of file ti_test.c.

SSP_CFG_Type SSP_ConfigStruct

Definition at line 86 of file ti_test.c.

uint32_t WrIdx_M

Definition at line 96 of file ti_test.c.

uint32_t WrIdx_S

Definition at line 115 of file ti_test.c.

Generated on Tue Jun 7 14:59:58 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: SysTick

SysTick
[LPC1700CMSIS Examples]

Modules

10ms_base
STCLK
Generated on Tue Jun 7 14:59:47 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: 10ms_base

10ms_base
[SysTick]

Functions

void | SysTick_Handler (void)
SysTick interrupt handler.
int | c_entry (void)
c_entry: Main program body
int | main (void)
void | check_failed (uint8_t *file, uint32_t line)

Variables

FunctionalState | Cur_State = ENABLE

Function Documentation

int c_entry ( void )

c_entry: Main program body

Parameters:
[in] None
Returns:
int

Definition at line 73 of file 10ms_base.c.

void check_failed | ( | uint8_t * | file,
 |  | uint32_t | line
 | ) |  |

Definition at line 108 of file 10ms_base.c.

int main ( void )

Definition at line 95 of file 10ms_base.c.

void SysTick_Handler ( void )

SysTick interrupt handler.

Parameters:
None
Returns:
None
SysTick interrupt handler.

SysTick interrupt handler.

Parameters:
[in] None
Returns:
None
Parameters:
None
Returns:
None

Definition at line 9 of file clock-arch.c.

Variable Documentation

FunctionalState Cur_State = ENABLE

Definition at line 37 of file 10ms_base.c.

Generated on Tue Jun 7 14:59:58 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: STCLK

STCLK
[SysTick]

Functions

void | SysTick_Handler (void)
SysTick interrupt handler.
int | c_entry (void)
c_entry: Main program body
int | main (void)
void | check_failed (uint8_t *file, uint32_t line)

Variables

FunctionalState | Cur_State = ENABLE
Bool | IO_State = FALSE

Function Documentation

int c_entry ( void )

c_entry: Main program body

Parameters:
[in] None
Returns:
int

Definition at line 76 of file systick_stclk.c.

void check_failed | ( | uint8_t * | file,
 |  | uint32_t | line
 | ) |  |

Definition at line 155 of file systick_stclk.c.

int main ( void )

Definition at line 142 of file systick_stclk.c.

void SysTick_Handler ( void )

SysTick interrupt handler.

Parameters:
None
Returns:
None
SysTick interrupt handler.

SysTick interrupt handler.

Parameters:
[in] None
Returns:
None
Parameters:
None
Returns:
None

Definition at line 9 of file clock-arch.c.

Variable Documentation

FunctionalState Cur_State = ENABLE

Definition at line 39 of file systick_stclk.c.

Bool IO_State = FALSE

Definition at line 40 of file systick_stclk.c.

Generated on Tue Jun 7 14:59:58 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: TIMER

TIMER
[LPC1700CMSIS Examples]

Modules

Capture
FreqMeasure
Gen_Diff_Delay
Gen_Diff_Freqs
Interrupt_Match
Polling_Match
PWMSignal
Generated on Tue Jun 7 14:59:47 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Capture

Capture
[TIMER]

Functions

void | TIMER0_IRQHandler (void)
TIMER0 interrupt handler sub-routine.
void | print_menu (void)
Print menu.
int | c_entry (void)
c_entry: Main TIMER program body
int | main (void)
void | check_failed (uint8_t *file, uint32_t line)

Variables

uint8_t | menu1 []
UART_CFG_Type UARTConfigStruct
uint32_t | MatchCount
TIM_TIMERCFG_Type TIM_ConfigStruct
TIM_MATCHCFG_Type TIM_MatchConfigStruct
TIM_CAPTURECFG_Type TIM_CaptureConfigStruct
uint8_t volatile | timer0_flag = FALSE
uint8_t volatile | timer1_flag = FALSE

Function Documentation

int c_entry ( void )

c_entry: Main TIMER program body

Parameters:
[in] None
Returns:
int

Definition at line 114 of file timer_capture.c.

void check_failed | ( | uint8_t * | file,
 |  | uint32_t | line
 | ) |  |

Definition at line 182 of file timer_capture.c.

int main ( void )

Definition at line 170 of file timer_capture.c.

void print_menu ( void )

Print menu.

Parameters:
[in] None
Returns:
None
print_menu

Print menu screen.

Print Welcome menu.

Print menu.

Parameters:
[in] none
Returns:
none

Definition at line 209 of file can_test_two_kit.c.

void TIMER0_IRQHandler ( void )

TIMER0 interrupt handler sub-routine.

Parameters:
[in] None
Returns:
None
TIMER0 interrupt handler sub-routine.

Timer 0 interrupt handler. This sub-routine will set/clear two Phase A-B output pin to their phase state.

TIMER0 interrupt handler.

TIMER0 interrupt handler sub-routine.

Timer 0 interrupt handler. This sub-routine will set/clear two Phase A-B output pin to their phase state.

Parameters:
[in] None
Returns:
None
Parameters:
None
Returns:
None

Definition at line 73 of file usbdmain.c.

Variable Documentation

uint32_t MatchCount

Definition at line 51 of file timer_capture.c.

uint8_t menu1[]

Initial value:

"********************************************************************************\n\r"
"Hello NXP Semiconductors \n\r"
"Timer Match interrupt demo \n\r"
"\t - MCU: LPC17xx \n\r"
"\t - Core: ARM Cortex-M3 \n\r"
"\t - Communicate via: UART0 -  115200 bps \n\r"
" Use timer 0 to take a snapshot of the timer value when an input signal \n\r"
" on CAP0.0 transitions \n\r"
"********************************************************************************\n\r"

Definition at line 38 of file timer_capture.c.

TIM_CAPTURECFG_Type TIM_CaptureConfigStruct

Definition at line 56 of file timer_capture.c.

TIM_TIMERCFG_Type TIM_ConfigStruct

Definition at line 54 of file timer_capture.c.

TIM_MATCHCFG_Type TIM_MatchConfigStruct

Definition at line 55 of file timer_capture.c.

uint8_t volatile timer0_flag = FALSE

Definition at line 57 of file timer_capture.c.

uint8_t volatile timer1_flag = FALSE

Definition at line 57 of file timer_capture.c.

UART_CFG_Type UARTConfigStruct

Definition at line 50 of file timer_capture.c.

Generated on Tue Jun 7 14:59:58 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: FreqMeasure

FreqMeasure
[TIMER]

Functions

void | TIMER0_IRQHandler (void)
TIMER0 interrupt handler sub-routine.
void | print_menu (void)
Print menu.
int | c_entry (void)
c_entry: Main TIMER program body
int | main (void)
void | check_failed (uint8_t *file, uint32_t line)

Variables

uint8_t | menu1 []
TIM_TIMERCFG_Type TIM_ConfigStruct
TIM_CAPTURECFG_Type TIM_CaptureConfigStruct
BOOL_8 first_capture
BOOL_8 done
uint32_t | capture
uint8_t | count = 0

Function Documentation

int c_entry ( void )

c_entry: Main TIMER program body

Parameters:
[in] None
Returns:
int

Definition at line 107 of file freqmeasure.c.

void check_failed | ( | uint8_t * | file,
 |  | uint32_t | line
 | ) |  |

Definition at line 238 of file freqmeasure.c.

int main ( void )

Definition at line 226 of file freqmeasure.c.

void print_menu ( void )

Print menu.

Parameters:
[in] None
Returns:
None
print_menu

Print menu screen.

Print Welcome menu.

Print menu.

Parameters:
[in] none
Returns:
none

Definition at line 209 of file can_test_two_kit.c.

void TIMER0_IRQHandler ( void )

TIMER0 interrupt handler sub-routine.

Parameters:
[in] None
Returns:
None
TIMER0 interrupt handler sub-routine.

Timer 0 interrupt handler. This sub-routine will set/clear two Phase A-B output pin to their phase state.

TIMER0 interrupt handler.

TIMER0 interrupt handler sub-routine.

Timer 0 interrupt handler. This sub-routine will set/clear two Phase A-B output pin to their phase state.

Parameters:
[in] None
Returns:
None
Parameters:
None
Returns:
None

Definition at line 73 of file usbdmain.c.

Variable Documentation

uint32_t capture

Definition at line 54 of file freqmeasure.c.

uint8_t count = 0

Definition at line 55 of file freqmeasure.c.

BOOL_8 done

Definition at line 53 of file freqmeasure.c.

BOOL_8 first_capture

Definition at line 53 of file freqmeasure.c.

uint8_t menu1[]

Initial value:

"********************************************************************************\n\r"
"Hello NXP Semiconductors \n\r"
"Timer measure frequency demo \n\r"
"\t - MCU: LPC17xx \n\r"
"\t - Core: ARM Cortex-M3 \n\r"
"\t - Communicate via: UART0 -  115200 bps \n\r"
" Use timer 0 to measure input signal frequency through its CAP0.0 \n\r"
" Use timer 2 to generate different frequency signals \n\r"
"********************************************************************************\n\r"

Definition at line 39 of file freqmeasure.c.

TIM_CAPTURECFG_Type TIM_CaptureConfigStruct

Definition at line 51 of file freqmeasure.c.

TIM_TIMERCFG_Type TIM_ConfigStruct

Definition at line 50 of file freqmeasure.c.

Generated on Tue Jun 7 14:59:59 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Gen_Diff_Delay

Gen_Diff_Delay
[TIMER]

Functions

void | print_menu (void)
Print menu.
void | TIMER0_IRQHandler (void)
TIMER0 IRQ Handler.
int | c_entry (void)
c_entry: Main TIMER program body
int | main (void)
void | check_failed (uint8_t *file, uint32_t line)

Variables

uint8_t | menu1 []
BOOL_8 | toggle = TRUE
uint32_t | T1
uint32_t | T2

Function Documentation

int c_entry ( void )

c_entry: Main TIMER program body

Parameters:
[in] None
Returns:
int

Definition at line 91 of file gen_diff_delay.c.

void check_failed | ( | uint8_t * | file,
 |  | uint32_t | line
 | ) |  |

Definition at line 215 of file gen_diff_delay.c.

int main ( void )

Definition at line 202 of file gen_diff_delay.c.

void print_menu ( void )

Print menu.

Parameters:
[in] None
Returns:
None
print_menu

Print menu screen.

Print Welcome menu.

Print menu.

Parameters:
[in] none
Returns:
none

Definition at line 209 of file can_test_two_kit.c.

void TIMER0_IRQHandler ( void )

TIMER0 IRQ Handler.

TIMER0 interrupt handler sub-routine.

Timer 0 interrupt handler. This sub-routine will set/clear two Phase A-B output pin to their phase state.

TIMER0 interrupt handler.

TIMER0 interrupt handler sub-routine.

Timer 0 interrupt handler. This sub-routine will set/clear two Phase A-B output pin to their phase state.

Parameters:
[in] None
Returns:
None
Parameters:
None
Returns:
None

Definition at line 73 of file usbdmain.c.

Variable Documentation

uint8_t menu1[]

Initial value:

"********************************************************************************\n\r"
"Hello NXP Semiconductors \n\r"
"Timer generate different delay signal demo \n\r"
"\t - MCU: LPC17xx \n\r"
"\t - Core: ARM Cortex-M3 \n\r"
"\t - Communicate via: UART0 - 115200 bps \n\r"
" Use timer 0 to generate different delay signals\n\r"
" UART0 used to display and input configuration\n\r"
"********************************************************************************\n\r"

Definition at line 38 of file gen_diff_delay.c.

uint32_t T1

Definition at line 49 of file gen_diff_delay.c.

uint32_t T2

Definition at line 49 of file gen_diff_delay.c.

BOOL_8 toggle = TRUE

Definition at line 48 of file gen_diff_delay.c.

Generated on Tue Jun 7 14:59:59 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Gen_Diff_Freqs

Gen_Diff_Freqs
[TIMER]

Functions

void | print_menu (void)
Print menu.
int | c_entry (void)
c_entry: Main TIMER program body
int | main (void)
void | check_failed (uint8_t *file, uint32_t line)

Variables

uint8_t | menu1 []

Function Documentation

int c_entry ( void )

c_entry: Main TIMER program body

Parameters:
[in] None
Returns:
int

Definition at line 71 of file gen_diff_freqs.c.

void check_failed | ( | uint8_t * | file,
 |  | uint32_t | line
 | ) |  |

Definition at line 204 of file gen_diff_freqs.c.

int main ( void )

Definition at line 191 of file gen_diff_freqs.c.

void print_menu ( void )

Print menu.

Parameters:
[in] None
Returns:
None
print_menu

Print menu screen.

Print Welcome menu.

Print menu.

Parameters:
[in] none
Returns:
none

Definition at line 209 of file can_test_two_kit.c.

Variable Documentation

uint8_t menu1[]

Initial value:

"********************************************************************************\n\r"
"Hello NXP Semiconductors \n\r"
"Timer generate different frequencies demo \n\r"
"\t - MCU: LPC17xx \n\r"
"\t - Core: ARM Cortex-M3 \n\r"
"\t - Communicate via: UART0 - 115200 bps \n\r"
" Use timer 0 and timer 2 to generate 2 different frequency signals\n\r"
" UART0 used to display and input frequency\n\r"
"********************************************************************************\n\r"

Definition at line 38 of file gen_diff_freqs.c.

Generated on Tue Jun 7 14:59:59 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Interrupt_Match

Interrupt_Match
[TIMER]

Functions

void | TIMER0_IRQHandler (void)
TIMER0 interrupt handler sub-routine.
void | print_menu (void)
Print menu.
int | c_entry (void)
c_entry: Main TIMER program body
int | main (void)
void | check_failed (uint8_t *file, uint32_t line)

Variables

uint8_t | menu1 []
TIM_TIMERCFG_Type TIM_ConfigStruct
TIM_MATCHCFG_Type TIM_MatchConfigStruct
uint8_t volatile | timer0_flag = FALSE
uint8_t volatile | timer1_flag = FALSE
FunctionalState | LEDStatus = ENABLE

Function Documentation

int c_entry ( void )

c_entry: Main TIMER program body

Parameters:
[in] None
Returns:
int

Definition at line 93 of file timer_int_match.c.

void check_failed | ( | uint8_t * | file,
 |  | uint32_t | line
 | ) |  |

Definition at line 163 of file timer_int_match.c.

int main ( void )

Definition at line 151 of file timer_int_match.c.

void print_menu ( void )

Print menu.

Parameters:
[in] None
Returns:
None
print_menu

Print menu screen.

Print Welcome menu.

Print menu.

Parameters:
[in] none
Returns:
none

Definition at line 209 of file can_test_two_kit.c.

void TIMER0_IRQHandler ( void )

TIMER0 interrupt handler sub-routine.

Parameters:
[in] None
Returns:
None
TIMER0 interrupt handler sub-routine.

Timer 0 interrupt handler. This sub-routine will set/clear two Phase A-B output pin to their phase state.

TIMER0 interrupt handler.

TIMER0 interrupt handler sub-routine.

Timer 0 interrupt handler. This sub-routine will set/clear two Phase A-B output pin to their phase state.

Parameters:
[in] None
Returns:
None
Parameters:
None
Returns:
None

Definition at line 73 of file usbdmain.c.

Variable Documentation

FunctionalState LEDStatus = ENABLE

Definition at line 52 of file timer_int_match.c.

uint8_t menu1[]

Initial value:

"********************************************************************************\n\r"
"Hello NXP Semiconductors \n\r"
"Timer Match interrupt demo \n\r"
"\t - MCU: LPC17xx \n\r"
"\t - Core: ARM Cortex-M3 \n\r"
"\t - Communicate via: UART0 -  115200 bps \n\r"
" Use timer 0 toggle MAT0.0, pin P1.28 at frequency 1Hz\n\r"
"********************************************************************************\n\r"

Definition at line 38 of file timer_int_match.c.

TIM_TIMERCFG_Type TIM_ConfigStruct

Definition at line 49 of file timer_int_match.c.

TIM_MATCHCFG_Type TIM_MatchConfigStruct

Definition at line 50 of file timer_int_match.c.

uint8_t volatile timer0_flag = FALSE

Definition at line 51 of file timer_int_match.c.

uint8_t volatile timer1_flag = FALSE

Definition at line 51 of file timer_int_match.c.

Generated on Tue Jun 7 14:59:59 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Polling_Match

Polling_Match
[TIMER]

Functions

void | print_menu (void)
Print menu.
int | c_entry (void)
c_entry: Main TIMER program body
int | main (void)
void | check_failed (uint8_t *file, uint32_t line)

Variables

uint8_t | menu1 []
TIM_TIMERCFG_Type TIM_ConfigStruct
TIM_MATCHCFG_Type TIM_MatchConfigStruct

Function Documentation

int c_entry ( void )

c_entry: Main TIMER program body

Parameters:
[in] None
Returns:
int

Definition at line 74 of file timer_poll_match.c.

void check_failed | ( | uint8_t * | file,
 |  | uint32_t | line
 | ) |  |

Definition at line 144 of file timer_poll_match.c.

int main ( void )

Definition at line 131 of file timer_poll_match.c.

void print_menu ( void )

Print menu.

Parameters:
[in] None
Returns:
None
print_menu

Print menu screen.

Print Welcome menu.

Print menu.

Parameters:
[in] none
Returns:
none

Definition at line 209 of file can_test_two_kit.c.

Variable Documentation

uint8_t menu1[]

Initial value:

"********************************************************************************\n\r"
"Hello NXP Semiconductors \n\r"
"Timer delay demo \n\r"
"\t - MCU: LPC17xx \n\r"
"\t - Core: ARM Cortex-M3 \n\r"
"\t - Communicate via: UART0 - 115200 bps \n\r"
" Use timer 0 in polling mode \n\r"
" Toggle MAT0.0 at frequency 10Hz \n\r"
"********************************************************************************\n\r"

Definition at line 38 of file timer_poll_match.c.

TIM_TIMERCFG_Type TIM_ConfigStruct

Definition at line 49 of file timer_poll_match.c.

TIM_MATCHCFG_Type TIM_MatchConfigStruct

Definition at line 50 of file timer_poll_match.c.

Generated on Tue Jun 7 14:59:59 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: PWMSignal

PWMSignal
[TIMER]

Functions

void | TIMER0_IRQHandler (void)
TIMER0 interrupt handler.
void | TIMER1_IRQHandler (void)
TIMER1 interrupt handler.
void | TIMER2_IRQHandler (void)
TIMER2 interrupt handler.
void | TIMER3_IRQHandler (void)
TIMER3 interrupt handler.
void | print_menu (void)
Print Welcome menu.
int | c_entry (void)
c_entry: Main TIMER program body
int | main (void)
void | check_failed (uint8_t *file, uint32_t line)

Variables

uint8_t | menu []
FunctionalState | PWM0_State = ENABLE
FunctionalState | PWM1_State = ENABLE
FunctionalState | PWM2_State = ENABLE
FunctionalState | PWM3_State = ENABLE
TIM_TIMERCFG_Type TIM_ConfigStruct
TIM_MATCHCFG_Type TIM_MatchConfigStruct

Function Documentation

int c_entry ( void )

c_entry: Main TIMER program body

Parameters:
[in] None
Returns:
int

Definition at line 170 of file pwm_signal.c.

void check_failed | ( | uint8_t * | file,
 |  | uint32_t | line
 | ) |  |

Definition at line 288 of file pwm_signal.c.

int main ( void )

Definition at line 275 of file pwm_signal.c.

void print_menu ( void )

Print Welcome menu.

Parameters:
[in] none
Returns:
None
print_menu

Print menu screen.

Print Welcome menu.

Print menu.

Parameters:
[in] none
Returns:
none

Definition at line 209 of file can_test_two_kit.c.

void TIMER0_IRQHandler ( void )

TIMER0 interrupt handler.

Parameters:
None
Returns:
None
TIMER0 interrupt handler.

TIMER0 interrupt handler sub-routine.

Timer 0 interrupt handler. This sub-routine will set/clear two Phase A-B output pin to their phase state.

TIMER0 interrupt handler.

TIMER0 interrupt handler sub-routine.

Timer 0 interrupt handler. This sub-routine will set/clear two Phase A-B output pin to their phase state.

Parameters:
[in] None
Returns:
None
Parameters:
None
Returns:
None

Definition at line 73 of file usbdmain.c.

void TIMER1_IRQHandler ( void )

TIMER1 interrupt handler.

Parameters:
None
Returns:
None

void TIMER2_IRQHandler ( void )

TIMER2 interrupt handler.

Parameters:
None
Returns:
None

Definition at line 118 of file pwm_signal.c.

void TIMER3_IRQHandler ( void )

TIMER3 interrupt handler.

Parameters:
None
Returns:
None

Definition at line 142 of file pwm_signal.c.

Variable Documentation

uint8_t menu[]

Initial value:

        "********************************************************************************\n\r"
        "Hello NXP Semiconductors \n\r"
        "System Tick demo \n\r"
        "\t - MCU: LPC17xx \n\r"
        "\t - Core: ARM CORTEX-M3 \n\r"
        "\t - Communicate via: UART0 - 115200 bps \n\r"
        "This example used TIMERs to generate 4 PWM signals with different duty cycles \n\r"
        "********************************************************************************\n\r"

Definition at line 39 of file pwm_signal.c.

FunctionalState PWM0_State = ENABLE

Definition at line 48 of file pwm_signal.c.

FunctionalState PWM1_State = ENABLE

Definition at line 49 of file pwm_signal.c.

FunctionalState PWM2_State = ENABLE

Definition at line 50 of file pwm_signal.c.

FunctionalState PWM3_State = ENABLE

Definition at line 51 of file pwm_signal.c.

TIM_TIMERCFG_Type TIM_ConfigStruct

Definition at line 53 of file pwm_signal.c.

TIM_MATCHCFG_Type TIM_MatchConfigStruct

Definition at line 54 of file pwm_signal.c.

Generated on Tue Jun 7 14:59:59 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: UART

UART
[LPC1700CMSIS Examples]

Modules

IrDA
AutoBaud
DMA
HWFlowControl
Interrupt
Polling
RS485_Master
RS485_Slave
UART1_FullModem
Generated on Tue Jun 7 14:59:47 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: IrDA

IrDA
[UART]

Modules

Receive
Transmit
Generated on Tue Jun 7 14:59:47 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Receive

Receive
[IrDA]

Defines

#define | UART_PORT 0
#define | TEST_UART LPC_UART0
#define | TEST_IRDA LPC_UART3

Functions

void | print_menu (void)
Print Welcome menu.
int | c_entry (void)
c_entry: Main UART program body
int | main (void)
void | check_failed (uint8_t *file, uint32_t line)

Variables

uint8_t | menu1 [] = "Hello NXP Semiconductors \n\r"
uint8_t | menu2 [] = "UART IrDA mode demo \n\r\t MCU LPC17xx - ARM Cortex-M3 \n\r\t UART0 - 9600bps communicates with PC \n\r\t UART3 - 9600bps receives infrared signal\n\r"
uint8_t | menu3 [] = "\t The demo keep reading input infrared signal and display through 8 led bank \n\r"

Define Documentation

#define TEST_IRDA LPC_UART3

Definition at line 44 of file uart_irda_receive.c.

#define TEST_UART LPC_UART0

Definition at line 40 of file uart_irda_receive.c.

#define UART_PORT 0

Definition at line 37 of file uart_irda_receive.c.

Function Documentation

int c_entry ( void )

c_entry: Main UART program body

Parameters:
[in] None
Returns:
int

Definition at line 74 of file uart_irda_receive.c.

void check_failed | ( | uint8_t * | file,
 |  | uint32_t | line
 | ) |  |

Definition at line 223 of file uart_irda_receive.c.

int main ( void )

Definition at line 209 of file uart_irda_receive.c.

void print_menu ( void )

Print Welcome menu.

Parameters:
[in] none
Returns:
None
Print Welcome Screen Menu subroutine.

print_menu

Print menu screen.

Print Welcome menu.

Print menu.

Parameters:
[in] none
Returns:
none

Definition at line 209 of file can_test_two_kit.c.

Variable Documentation

uint8_t menu1[] = "Hello NXP Semiconductors \n\r"

Definition at line 47 of file uart_irda_receive.c.

uint8_t menu2[] = "UART IrDA mode demo \n\r\t MCU LPC17xx - ARM Cortex-M3 \n\r\t UART0 - 9600bps communicates with PC \n\r\t UART3 - 9600bps receives infrared signal\n\r"

Definition at line 48 of file uart_irda_receive.c.

uint8_t menu3[] = "\t The demo keep reading input infrared signal and display through 8 led bank \n\r"

Definition at line 49 of file uart_irda_receive.c.

Generated on Tue Jun 7 15:00:00 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Transmit

Transmit
[IrDA]

Defines

#define | UART_PORT 0
#define | TEST_UART LPC_UART0
#define | TEST_IRDA LPC_UART3

Functions

void | print_menu (void)
Print Welcome menu.
int | c_entry (void)
c_entry: Main UART program body
int | main (void)
void | check_failed (uint8_t *file, uint32_t line)

Variables

uint8_t | menu1 [] = "Hello NXP Semiconductors \n\r"
uint8_t | menu2 [] = "UART IrDA mode demo \n\r\t MCU LPC17xx - ARM Cortex-M3 \n\r\t UART0 - 9600bps communicates with PC \n\r\t UART3 - 9600bps transmits infrared signals\n\r"
uint8_t | menu3 [] = "\t\t- Press Esc to terminate this demo \n\r\t\t- Press 'r' to re-print this menu \n\r"
uint8_t | menu4 [] = "\n\rUART demo terminated!"
uint8_t | menu5 [] = "\n\rEnter a hex byte value to transmit: 0x"

Define Documentation

#define TEST_IRDA LPC_UART3

Definition at line 43 of file uart_irda_transmit.c.

#define TEST_UART LPC_UART0

Definition at line 39 of file uart_irda_transmit.c.

#define UART_PORT 0

Definition at line 36 of file uart_irda_transmit.c.

Function Documentation

int c_entry ( void )

c_entry: Main UART program body

Parameters:
[in] None
Returns:
int

Definition at line 75 of file uart_irda_transmit.c.

void check_failed | ( | uint8_t * | file,
 |  | uint32_t | line
 | ) |  |

Definition at line 258 of file uart_irda_transmit.c.

int main ( void )

Definition at line 244 of file uart_irda_transmit.c.

void print_menu ( void )

Print Welcome menu.

Parameters:
[in] none
Returns:
None
Print Welcome Screen Menu subroutine.

print_menu

Print menu screen.

Print Welcome menu.

Print menu.

Parameters:
[in] none
Returns:
none

Definition at line 209 of file can_test_two_kit.c.

Variable Documentation

uint8_t menu1[] = "Hello NXP Semiconductors \n\r"

Definition at line 46 of file uart_irda_transmit.c.

uint8_t menu2[] = "UART IrDA mode demo \n\r\t MCU LPC17xx - ARM Cortex-M3 \n\r\t UART0 - 9600bps communicates with PC \n\r\t UART3 - 9600bps transmits infrared signals\n\r"

Definition at line 47 of file uart_irda_transmit.c.

uint8_t menu3[] = "\t\t- Press Esc to terminate this demo \n\r\t\t- Press 'r' to re-print this menu \n\r"

Definition at line 48 of file uart_irda_transmit.c.

uint8_t menu4[] = "\n\rUART demo terminated!"

Definition at line 49 of file uart_irda_transmit.c.

uint8_t menu5[] = "\n\rEnter a hex byte value to transmit: 0x"

Definition at line 50 of file uart_irda_transmit.c.

Generated on Tue Jun 7 15:00:00 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: AutoBaud

AutoBaud
[UART]

Functions

void | print_menu (void)
Print menu.
int | c_entry (void)
c_entry: Main UART program body
int | main (void)
void | check_failed (uint8_t *file, uint32_t line)

Variables

uint8_t | syncmenu [] = "AutoBaudrate Status: Synchronous! \n\r"
uint8_t | menu1 [] = "Hello NXP Semiconductors \n\r"
uint8_t | menu2 []
uint8_t | menu3 [] = "UART demo terminated!\n"
__IO FlagStatus | Synchronous

Function Documentation

int c_entry ( void )

c_entry: Main UART program body

Parameters:
[in] None
Returns:
int

Definition at line 132 of file uart_autobaud_test.c.

void check_failed | ( | uint8_t * | file,
 |  | uint32_t | line
 | ) |  |

Definition at line 289 of file uart_autobaud_test.c.

int main ( void )

Definition at line 275 of file uart_autobaud_test.c.

void print_menu ( void )

Print menu.

Parameters:
[in] None
Returns:
None
print_menu

Print menu screen.

Print Welcome menu.

Print menu.

Parameters:
[in] none
Returns:
none

Definition at line 209 of file can_test_two_kit.c.

Variable Documentation

uint8_t menu1[] = "Hello NXP Semiconductors \n\r"

Definition at line 38 of file uart_autobaud_test.c.

uint8_t menu2[]

Initial value:

"UART Auto Baudrate demo\n\r\t "
"MCU LPC17xx - ARM Cortex-M3 \n\r\t "
"UART0 - Auto Baud rate mode used \n\r"

Definition at line 39 of file uart_autobaud_test.c.

uint8_t menu3[] = "UART demo terminated!\n"

Definition at line 43 of file uart_autobaud_test.c.

__IO FlagStatus Synchronous

Definition at line 46 of file uart_autobaud_test.c.

uint8_t syncmenu[] = "AutoBaudrate Status: Synchronous! \n\r"

Definition at line 37 of file uart_autobaud_test.c.

Generated on Tue Jun 7 14:59:59 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: DMA

DMA
[UART]

Defines

#define | RX_BUF_SIZE 0x10

Functions

void | DMA_IRQHandler (void)
GPDMA interrupt handler sub-routine.
void | print_menu (void)
print menu
int | c_entry (void)
c_entry: Main UART program body
int | main (void)
void | check_failed (uint8_t *file, uint32_t line)

Variables

uint8_t | menu1 []
uint8_t | menu3 [] = "UART demo terminated!\n"
__IO uint8_t | rx_buf [RX_BUF_SIZE]
__IO uint32_t | Channel0_TC
__IO uint32_t | Channel0_Err
__IO uint32_t | Channel1_TC
__IO uint32_t | Channel1_Err

Define Documentation

#define RX_BUF_SIZE 0x10

Definition at line 38 of file uart_dma_test.c.

Function Documentation

int c_entry ( void )

c_entry: Main UART program body

Parameters:
[in] None
Returns:
int

Definition at line 130 of file uart_dma_test.c.

void check_failed | ( | uint8_t * | file,
 |  | uint32_t | line
 | ) |  |

Definition at line 315 of file uart_dma_test.c.

void DMA_IRQHandler ( void )

GPDMA interrupt handler sub-routine.

Parameters:
[in] None
Returns:
None

int main ( void )

Definition at line 301 of file uart_dma_test.c.

void print_menu ( void )

print menu

print_menu

Print menu screen.

Print Welcome menu.

Print menu.

Parameters:
[in] none
Returns:
none

Definition at line 209 of file can_test_two_kit.c.

Variable Documentation

__IO uint32_t Channel0_Err

Definition at line 58 of file uart_dma_test.c.

__IO uint32_t Channel0_TC

Definition at line 55 of file uart_dma_test.c.

__IO uint32_t Channel1_Err

Definition at line 64 of file uart_dma_test.c.

__IO uint32_t Channel1_TC

Definition at line 61 of file uart_dma_test.c.

uint8_t menu1[]

Initial value:

"Hello NXP Semiconductors \n\r"
"UART interrupt mode demo using ring buffer \n\r\t "
"MCU LPC17xx - ARM Cortex-M3 \n\r\t "
"UART0 - 9600bps \n\r"
" This is a long string. It transferred in to DMA memory and transmit through Tx line \n\r"
" on UART0 peripheral. To use UART with DMA mode, FIFO function must be enabled \n\r"

Definition at line 41 of file uart_dma_test.c.

uint8_t menu3[] = "UART demo terminated!\n"

Definition at line 49 of file uart_dma_test.c.

__IO uint8_t rx_buf[RX_BUF_SIZE]

Definition at line 52 of file uart_dma_test.c.

Generated on Tue Jun 7 14:59:59 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: HWFlowControl

HWFlowControl
[UART]

Defines

#define | TEST_UART (LPC_UART_TypeDef *)LPC_UART1

Functions

void | print_menu (void)
Print Welcome menu.
int | c_entry (void)
c_entry: Main UART program body
int | main (void)
void | check_failed (uint8_t *file, uint32_t line)

Variables

uint8_t | menu1 [] = "Hello NXP Semiconductors \n\r"
uint8_t | menu2 [] = "UART hardware flow control mode demo \n\r\t MCU LPC17xx - ARM Cortex-M3 \n\r\t UART1 - 9600bps \n\r"
uint8_t | menu3 [] = "UART demo terminated!"

Define Documentation

#define TEST_UART (LPC_UART_TypeDef *)LPC_UART1

Definition at line 37 of file uart_hw_flow_control.c.

Function Documentation

int c_entry ( void )

c_entry: Main UART program body

Parameters:
[in] None
Returns:
int

Definition at line 65 of file uart_hw_flow_control.c.

void check_failed | ( | uint8_t * | file,
 |  | uint32_t | line
 | ) |  |

Definition at line 191 of file uart_hw_flow_control.c.

int main ( void )

Definition at line 177 of file uart_hw_flow_control.c.

void print_menu ( void )

Print Welcome menu.

Parameters:
[in] none
Returns:
None
print_menu

Print menu screen.

Print Welcome menu.

Print menu.

Parameters:
[in] none
Returns:
none

Definition at line 209 of file can_test_two_kit.c.

Variable Documentation

uint8_t menu1[] = "Hello NXP Semiconductors \n\r"

Definition at line 40 of file uart_hw_flow_control.c.

uint8_t menu2[] = "UART hardware flow control mode demo \n\r\t MCU LPC17xx - ARM Cortex-M3 \n\r\t UART1 - 9600bps \n\r"

Definition at line 41 of file uart_hw_flow_control.c.

uint8_t menu3[] = "UART demo terminated!"

Definition at line 42 of file uart_hw_flow_control.c.

Generated on Tue Jun 7 14:59:59 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Interrupt

Interrupt
[UART]

Data Structures

struct | UART_RING_BUFFER_T
UART Ring buffer structure. More...

Defines

#define | UART_RING_BUFSIZE 256
#define | __BUF_MASK (UART_RING_BUFSIZE-1)
#define | __BUF_IS_FULL(head, tail) ((tail&__BUF_MASK)==((head+1)&__BUF_MASK))
#define | __BUF_WILL_FULL(head, tail) ((tail&__BUF_MASK)==((head+2)&__BUF_MASK))
#define | __BUF_IS_EMPTY(head, tail) ((head&__BUF_MASK)==(tail&__BUF_MASK))
#define | __BUF_RESET(bufidx) (bufidx=0)
#define | __BUF_INCR(bufidx) (bufidx=(bufidx+1)&__BUF_MASK)

Functions

void | UART0_IRQHandler (void)
UART0 interrupt handler sub-routine.
void | UART_IntTransmit (void)
UART transmit function (ring buffer used).
void | print_menu (void)
Print Welcome Screen Menu subroutine.
int | c_entry (void)
c_entry: Main UART program body
int | main (void)
void | check_failed (uint8_t *file, uint32_t line)

Variables

__IO uint32_t | tx_tail
__IO uint32_t | rx_head
__IO uint32_t | rx_tail
__IO uint8_t | tx [UART_RING_BUFSIZE]
__IO uint8_t | rx [UART_RING_BUFSIZE]
uint8_t | menu1 [] = "Hello NXP Semiconductors \n\r"
uint8_t | menu2 []
uint8_t | menu3 [] = "UART demo terminated!\n"
UART_RING_BUFFER_T rb
__IO FlagStatus | TxIntStat

Define Documentation

#define __BUF_INCR ( bufidx ) (bufidx=(bufidx+1)&__BUF_MASK)

Definition at line 49 of file uart_interrupt_test.c.

#define __BUF_IS_EMPTY | ( | head,
 |  | tail | ) | ((head&__BUF_MASK)==(tail&__BUF_MASK))

Definition at line 46 of file uart_interrupt_test.c.

#define __BUF_IS_FULL | ( | head,
 |  | tail | ) | ((tail&__BUF_MASK)==((head+1)&__BUF_MASK))

Definition at line 42 of file uart_interrupt_test.c.

#define __BUF_MASK (UART_RING_BUFSIZE-1)

Definition at line 40 of file uart_interrupt_test.c.

#define __BUF_RESET ( bufidx ) (bufidx=0)

Definition at line 48 of file uart_interrupt_test.c.

#define __BUF_WILL_FULL | ( | head,
 |  | tail | ) | ((tail&__BUF_MASK)==((head+2)&__BUF_MASK))

Definition at line 44 of file uart_interrupt_test.c.

#define UART_RING_BUFSIZE 256

Definition at line 37 of file uart_interrupt_test.c.

Function Documentation

int c_entry ( void )

c_entry: Main UART program body

Parameters:
[in] None
Returns:
int

Definition at line 347 of file uart_interrupt_test.c.

void check_failed | ( | uint8_t * | file,
 |  | uint32_t | line
 | ) |  |

Definition at line 491 of file uart_interrupt_test.c.

int main ( void )

Definition at line 478 of file uart_interrupt_test.c.

void print_menu ( void )

Print Welcome Screen Menu subroutine.

Parameters:
None
Returns:
None
Print Welcome Screen Menu subroutine.

print_menu

Print menu screen.

Print Welcome menu.

Print menu.

Parameters:
[in] none
Returns:
none

Definition at line 209 of file can_test_two_kit.c.

void UART0_IRQHandler ( void )

UART0 interrupt handler sub-routine.

Parameters:
[in] None
Returns:
None
Parameters:
None
Returns:
None
Parameters:
[in] None
Returns:
None

Definition at line 353 of file serial.c.

void UART_IntTransmit ( void )

UART transmit function (ring buffer used).

Parameters:
[in] None
Returns:
None

Definition at line 166 of file uart_interrupt_test.c.

Variable Documentation

uint8_t menu1[] = "Hello NXP Semiconductors \n\r"

Definition at line 67 of file uart_interrupt_test.c.

uint8_t menu2[]

Initial value:

"UART interrupt mode demo using ring buffer \n\r\t "
"MCU LPC17xx - ARM Cortex-M3 \n\r\t "
"UART0 - 9600bps \n\r"

Definition at line 68 of file uart_interrupt_test.c.

uint8_t menu3[] = "UART demo terminated!\n"

Definition at line 72 of file uart_interrupt_test.c.

UART_RING_BUFFER_T rb

Definition at line 75 of file uart_interrupt_test.c.

__IO uint8_t rx [inherited]

UART Rx data ring buffer

Definition at line 62 of file uart_interrupt_test.c.

__IO uint32_t rx_head [inherited]

UART Rx ring buffer head index

Definition at line 59 of file uart_interrupt_test.c.

__IO uint32_t rx_tail [inherited]

UART Rx ring buffer tail index

Definition at line 60 of file uart_interrupt_test.c.

__IO uint8_t tx [inherited]

UART Tx data ring buffer

Definition at line 61 of file uart_interrupt_test.c.

__IO uint32_t tx_tail [inherited]

UART Tx ring buffer tail index

Definition at line 58 of file uart_interrupt_test.c.

__IO FlagStatus TxIntStat

Definition at line 78 of file uart_interrupt_test.c.

Generated on Tue Jun 7 15:00:00 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Polling

Polling
[UART]

Defines

#define | UART_PORT 0
#define | TEST_UART LPC_UART0

Functions

void | print_menu (void)
Print Welcome menu.
int | c_entry (void)
c_entry: Main UART program body
int | main (void)
void | check_failed (uint8_t *file, uint32_t line)

Variables

uint8_t | menu1 [] = "Hello NXP Semiconductors \n\r"
uint8_t | menu2 [] = "UART polling mode demo \n\r\t MCU LPC17xx - ARM Cortex-M3 \n\r\t UART0 - 9600bps \n\r"
uint8_t | menu3 [] = "UART demo terminated!"

Define Documentation

#define TEST_UART LPC_UART0

Definition at line 39 of file uart_polling_test.c.

#define UART_PORT 0

Definition at line 36 of file uart_polling_test.c.

Function Documentation

int c_entry ( void )

c_entry: Main UART program body

Parameters:
[in] None
Returns:
int

Definition at line 73 of file uart_polling_test.c.

void check_failed | ( | uint8_t * | file,
 |  | uint32_t | line
 | ) |  |

Definition at line 209 of file uart_polling_test.c.

int main ( void )

Definition at line 195 of file uart_polling_test.c.

void print_menu ( void )

Print Welcome menu.

Parameters:
[in] none
Returns:
None
Print Welcome Screen Menu subroutine.

print_menu

Print menu screen.

Print Welcome menu.

Print menu.

Parameters:
[in] none
Returns:
none

Definition at line 209 of file can_test_two_kit.c.

Variable Documentation

uint8_t menu1[] = "Hello NXP Semiconductors \n\r"

Definition at line 46 of file uart_polling_test.c.

uint8_t menu2[] = "UART polling mode demo \n\r\t MCU LPC17xx - ARM Cortex-M3 \n\r\t UART0 - 9600bps \n\r"

Definition at line 47 of file uart_polling_test.c.

uint8_t menu3[] = "UART demo terminated!"

Definition at line 48 of file uart_polling_test.c.

Generated on Tue Jun 7 15:00:00 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: RS485_Master

RS485_Master
[UART]

Data Structures

struct | UART_RING_BUFFER_T
UART Ring buffer structure. More...

Defines

#define | SLAVE_ADDR_A 'A'
#define | SLAVE_ADDR_B 'B'
#define | UART_RING_BUFSIZE 256
#define | __BUF_MASK (UART_RING_BUFSIZE-1)
#define | __BUF_IS_FULL(head, tail) ((tail&__BUF_MASK)==((head+1)&__BUF_MASK))
#define | __BUF_WILL_FULL(head, tail) ((tail&__BUF_MASK)==((head+2)&__BUF_MASK))
#define | __BUF_IS_EMPTY(head, tail) ((head&__BUF_MASK)==(tail&__BUF_MASK))
#define | __BUF_RESET(bufidx) (bufidx=0)
#define | __BUF_INCR(bufidx) (bufidx=(bufidx+1)&__BUF_MASK)

Functions

void | UART_IntReceive (void)
UART receive function (ring buffer used).
void | UART_IntErr (uint8_t bLSErrType)
UART Line Status Error.
uint32_t | UARTReceive (LPC_UART_TypeDef *UARTPort, uint8_t *rxbuf, uint8_t buflen)
UART read function for interrupt mode (using ring buffers).
void | print_menu (void)
Print Welcome menu.
int | c_entry (void)
c_entry: Main UART-RS485 program body
int | main (void)
void | check_failed (uint8_t *file, uint32_t line)

Variables

uint8_t | menu1 [] = "Hello NXP Semiconductors \n\r"
uint8_t | menu2 [] = "RS485 demo in Master mode \n\r"
uint8_t | send_menu [] = "Sending... \n\r"
uint8_t | recv_menu [] = "Receive: "
uint8_t | p_err_menu [] = "Parity error \n\r"
uint8_t | f_err_menu [] = "Frame error \n\r"
uint8_t | nextline [] = "\n\r"
uint8_t | slaveA_msg [] = "Msg A: Hello NXP"
uint8_t | slaveB_msg [] = "Msg B: Hello NXP"
uint8_t | terminator = 13
UART_RING_BUFFER_T rb

Define Documentation

#define __BUF_INCR ( bufidx ) (bufidx=(bufidx+1)&__BUF_MASK)

Definition at line 55 of file rs485_master.c.

#define __BUF_IS_EMPTY | ( | head,
 |  | tail | ) | ((head&__BUF_MASK)==(tail&__BUF_MASK))

Definition at line 52 of file rs485_master.c.

#define __BUF_IS_FULL | ( | head,
 |  | tail | ) | ((tail&__BUF_MASK)==((head+1)&__BUF_MASK))

Definition at line 48 of file rs485_master.c.

#define __BUF_MASK (UART_RING_BUFSIZE-1)

Definition at line 46 of file rs485_master.c.

#define __BUF_RESET ( bufidx ) (bufidx=0)

Definition at line 54 of file rs485_master.c.

#define __BUF_WILL_FULL | ( | head,
 |  | tail | ) | ((tail&__BUF_MASK)==((head+2)&__BUF_MASK))

Definition at line 50 of file rs485_master.c.

#define SLAVE_ADDR_A 'A'

Definition at line 39 of file rs485_master.c.

#define SLAVE_ADDR_B 'B'

Definition at line 40 of file rs485_master.c.

#define UART_RING_BUFSIZE 256

Definition at line 43 of file rs485_master.c.

Function Documentation

int c_entry ( void )

c_entry: Main UART-RS485 program body

Parameters:
[in] None
Returns:
int

Definition at line 237 of file rs485_master.c.

void check_failed | ( | uint8_t * | file,
 |  | uint32_t | line
 | ) |  |

Definition at line 449 of file rs485_master.c.

int main ( void )

Definition at line 435 of file rs485_master.c.

void print_menu ( void )

Print Welcome menu.

Parameters:
[in] none
Returns:
None
Print Welcome Screen Menu subroutine.

print_menu

Print menu screen.

Print Welcome menu.

Print menu.

Parameters:
[in] none
Returns:
none

Definition at line 209 of file can_test_two_kit.c.

void UART_IntErr ( uint8_t bLSErrType )

UART Line Status Error.

Parameters:
[in] bLSErrType UART Line Status Error Type
Returns:
None

void UART_IntReceive ( void )

UART receive function (ring buffer used).

Parameters:
[in] None
Returns:
None

uint32_t UARTReceive | ( | LPC_UART_TypeDef * | UARTPort,
 |  | uint8_t * | rxbuf,
 |  | uint8_t | buflen
 | ) |  |

UART read function for interrupt mode (using ring buffers).

Parameters:
[in] | UARTPort | Selected UART peripheral used to send data, should be UART0
[out] | rxbuf | Pointer to Received buffer
[in] | buflen | Length of Received buffer
Returns:
Number of bytes actually read from the ring buffer

Variable Documentation

uint8_t f_err_menu[] = "Frame error \n\r"

Definition at line 63 of file rs485_master.c.

uint8_t menu1[] = "Hello NXP Semiconductors \n\r"

Definition at line 58 of file rs485_master.c.

uint8_t menu2[] = "RS485 demo in Master mode \n\r"

Definition at line 59 of file rs485_master.c.

uint8_t nextline[] = "\n\r"

Definition at line 64 of file rs485_master.c.

uint8_t p_err_menu[] = "Parity error \n\r"

Definition at line 62 of file rs485_master.c.

UART_RING_BUFFER_T rb

Definition at line 84 of file rs485_master.c.

uint8_t recv_menu[] = "Receive: "

Definition at line 61 of file rs485_master.c.

uint8_t send_menu[] = "Sending... \n\r"

Definition at line 60 of file rs485_master.c.

uint8_t slaveA_msg[] = "Msg A: Hello NXP"

Definition at line 66 of file rs485_master.c.

uint8_t slaveB_msg[] = "Msg B: Hello NXP"

Definition at line 67 of file rs485_master.c.

uint8_t terminator = 13

Definition at line 68 of file rs485_master.c.

Generated on Tue Jun 7 15:00:00 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: RS485_Slave

RS485_Slave
[UART]

Data Structures

struct | UART_RING_BUFFER_T
UART Ring buffer structure. More...

Defines

#define | RECEIVER_ALWAYS_EN 0
#define | AUTO_SLVADDR_DETECT 1
#define | SLAVE_ADDR 'A'
#define | UART_RING_BUFSIZE 256
#define | __BUF_MASK (UART_RING_BUFSIZE-1)
#define | __BUF_IS_FULL(head, tail) ((tail&__BUF_MASK)==((head+1)&__BUF_MASK))
#define | __BUF_WILL_FULL(head, tail) ((tail&__BUF_MASK)==((head+2)&__BUF_MASK))
#define | __BUF_IS_EMPTY(head, tail) ((head&__BUF_MASK)==(tail&__BUF_MASK))
#define | __BUF_RESET(bufidx) (bufidx=0)
#define | __BUF_INCR(bufidx) (bufidx=(bufidx+1)&__BUF_MASK)

Functions

void | UART1_IRQHandler (void)
UART1 interrupt handler sub-routine.
void | UART_IntReceive (void)
UART receive function (ring buffer used).
void | UART_IntErr (uint8_t bLSErrType)
UART Line Status Error.
uint32_t | UARTReceive (LPC_UART_TypeDef *UARTPort, uint8_t *rxbuf, uint8_t buflen)
UART read function for interrupt mode (using ring buffers).
void | print_menu (void)
Print Welcome menu.
int | c_entry (void)
c_entry: Main UART-RS485 program body
int | main (void)
void | check_failed (uint8_t *file, uint32_t line)

Variables

uint8_t | menu1 []
uint8_t | send_msg [] = "Sending... \n\r"
uint8_t | recv_msg [] = "Receive: "
uint8_t | p_err_menu [] = "Parity error"
uint8_t | addr_menu [] = " - Slv Addr Frm received\n\r"
uint8_t | addr_acc [] = " - Slave Addr accepted\n\r"
uint8_t | addr_una [] = " - Slave Addr unaccepted\n\r"
uint8_t | addr_auto [] = "Slave Addr detected!\n\r"
uint8_t | f_err_menu [] = "Frame error \n\r"
uint8_t | nextline [] = "\n\r"
uint8_t | ack_msg [] = "ACK"
uint8_t | terminator = 13
UART_RING_BUFFER_T rb

Define Documentation

#define __BUF_INCR ( bufidx ) (bufidx=(bufidx+1)&__BUF_MASK)

Definition at line 85 of file rs485_slave.c.

#define __BUF_IS_EMPTY | ( | head,
 |  | tail | ) | ((head&__BUF_MASK)==(tail&__BUF_MASK))

Definition at line 82 of file rs485_slave.c.

#define __BUF_IS_FULL | ( | head,
 |  | tail | ) | ((tail&__BUF_MASK)==((head+1)&__BUF_MASK))

Definition at line 78 of file rs485_slave.c.

#define __BUF_MASK (UART_RING_BUFSIZE-1)

Definition at line 76 of file rs485_slave.c.

#define __BUF_RESET ( bufidx ) (bufidx=0)

Definition at line 84 of file rs485_slave.c.

#define __BUF_WILL_FULL | ( | head,
 |  | tail | ) | ((tail&__BUF_MASK)==((head+2)&__BUF_MASK))

Definition at line 80 of file rs485_slave.c.

#define AUTO_SLVADDR_DETECT 1

Definition at line 68 of file rs485_slave.c.

#define RECEIVER_ALWAYS_EN 0

Definition at line 52 of file rs485_slave.c.

#define SLAVE_ADDR 'A'

Definition at line 69 of file rs485_slave.c.

#define UART_RING_BUFSIZE 256

Definition at line 73 of file rs485_slave.c.

Function Documentation

int c_entry ( void )

c_entry: Main UART-RS485 program body

Parameters:
[in] None
Returns:
int

Definition at line 373 of file rs485_slave.c.

void check_failed | ( | uint8_t * | file,
 |  | uint32_t | line
 | ) |  |

Definition at line 562 of file rs485_slave.c.

int main ( void )

Definition at line 548 of file rs485_slave.c.

void print_menu ( void )

Print Welcome menu.

Parameters:
[in] none
Returns:
None
Print Welcome Screen Menu subroutine.

print_menu

Print menu screen.

Print Welcome menu.

Print menu.

Parameters:
[in] none
Returns:
none

Definition at line 209 of file can_test_two_kit.c.

void UART1_IRQHandler ( void )

UART1 interrupt handler sub-routine.

Parameters:
[in] None
Returns:
None

Definition at line 380 of file serial.c.

void UART_IntErr ( uint8_t bLSErrType )

UART Line Status Error.

Parameters:
[in] bLSErrType UART Line Status Error Type
Returns:
None

void UART_IntReceive ( void )

UART receive function (ring buffer used).

Parameters:
[in] None
Returns:
None

uint32_t UARTReceive | ( | LPC_UART_TypeDef * | UARTPort,
 |  | uint8_t * | rxbuf,
 |  | uint8_t | buflen
 | ) |  |

UART read function for interrupt mode (using ring buffers).

Parameters:
[in] | UARTPort | Selected UART peripheral used to send data, should be UART0
[out] | rxbuf | Pointer to Received buffer
[in] | buflen | Length of Received buffer
Returns:
Number of bytes actually read from the ring buffer

Variable Documentation

uint8_t ack_msg[] = "ACK"

Definition at line 129 of file rs485_slave.c.

uint8_t addr_acc[] = " - Slave Addr accepted\n\r"

Definition at line 123 of file rs485_slave.c.

uint8_t addr_auto[] = "Slave Addr detected!\n\r"

Definition at line 125 of file rs485_slave.c.

uint8_t addr_menu[] = " - Slv Addr Frm received\n\r"

Definition at line 122 of file rs485_slave.c.

uint8_t addr_una[] = " - Slave Addr unaccepted\n\r"

Definition at line 124 of file rs485_slave.c.

uint8_t f_err_menu[] = "Frame error \n\r"

Definition at line 126 of file rs485_slave.c.

uint8_t menu1[]

Initial value:

"Hello NXP Semiconductors \n\r"
"RS485 demo in Slave mode \n\r"
"Slave's Receiver is not always enabled - Auto Address Detection is enabled\n\r"

Definition at line 112 of file rs485_slave.c.

uint8_t nextline[] = "\n\r"

Definition at line 127 of file rs485_slave.c.

uint8_t p_err_menu[] = "Parity error"

Definition at line 121 of file rs485_slave.c.

UART_RING_BUFFER_T rb

Definition at line 133 of file rs485_slave.c.

uint8_t recv_msg[] = "Receive: "

Definition at line 120 of file rs485_slave.c.

uint8_t send_msg[] = "Sending... \n\r"

Definition at line 119 of file rs485_slave.c.

uint8_t terminator = 13

Definition at line 130 of file rs485_slave.c.

Generated on Tue Jun 7 15:00:01 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: UART1_FullModem

UART1_FullModem
[UART]

Data Structures

struct | UART_RING_BUFFER_T
UART Ring buffer structure. More...

Defines

#define | MCB_LPC_1768
#define | UART_RING_BUFSIZE 256
#define | AUTO_RTS_CTS_USE 0
#define | __BUF_MASK (UART_RING_BUFSIZE-1)
#define | __BUF_IS_FULL(head, tail) ((tail&__BUF_MASK)==((head+1)&__BUF_MASK))
#define | __BUF_WILL_FULL(head, tail) ((tail&__BUF_MASK)==((head+2)&__BUF_MASK))
#define | __BUF_IS_EMPTY(head, tail) ((head&__BUF_MASK)==(tail&__BUF_MASK))
#define | __BUF_RESET(bufidx) (bufidx=0)
#define | __BUF_INCR(bufidx) (bufidx=(bufidx+1)&__BUF_MASK)

Functions

void | UART1_IRQHandler (void)
UART1 interrupt handler sub-routine.
void | UART1_IntTransmit (void)
UART1 transmit function (ring buffer used).
void | UART1_IntReceive (void)
UART1 receive function (ring buffer used).
void | UART1_IntErr (uint8_t bLSErrType)
UART Line Status Error.
uint32_t | UARTReceive (LPC_UART_TypeDef *UARTPort, uint8_t *rxbuf, uint8_t buflen)
UART read function for interrupt mode (using ring buffers).
uint32_t | UARTSend (LPC_UART_TypeDef *UARTPort, uint8_t *txbuf, uint8_t buflen)
UART transmit function for interrupt mode (using ring buffers).
void | print_menu (void)
Print Welcome Screen Menu subroutine.
int | c_entry (void)
c_entry: Main UART-FULLMODEM program body
int | main (void)
void | check_failed (uint8_t *file, uint32_t line)

Variables

uint8_t | menu1 [] = "Hello NXP Semiconductors \n\r"
uint8_t | menu2 []
uint8_t | menu3 [] = "UART demo terminated!\n"
UART_RING_BUFFER_T rb
__IO int32_t | RTS_State
__IO FlagStatus | TxIntStat

Define Documentation

#define __BUF_INCR ( bufidx ) (bufidx=(bufidx+1)&__BUF_MASK)

Definition at line 58 of file uart_fullmodem_test.c.

#define __BUF_IS_EMPTY | ( | head,
 |  | tail | ) | ((head&__BUF_MASK)==(tail&__BUF_MASK))

Definition at line 55 of file uart_fullmodem_test.c.

#define __BUF_IS_FULL | ( | head,
 |  | tail | ) | ((tail&__BUF_MASK)==((head+1)&__BUF_MASK))

Definition at line 51 of file uart_fullmodem_test.c.

#define __BUF_MASK (UART_RING_BUFSIZE-1)

Definition at line 49 of file uart_fullmodem_test.c.

#define __BUF_RESET ( bufidx ) (bufidx=0)

Definition at line 57 of file uart_fullmodem_test.c.

#define __BUF_WILL_FULL | ( | head,
 |  | tail | ) | ((tail&__BUF_MASK)==((head+2)&__BUF_MASK))

Definition at line 53 of file uart_fullmodem_test.c.

#define AUTO_RTS_CTS_USE 0

Definition at line 46 of file uart_fullmodem_test.c.

#define MCB_LPC_1768

Definition at line 37 of file uart_fullmodem_test.c.

#define UART_RING_BUFSIZE 256

Definition at line 41 of file uart_fullmodem_test.c.

Function Documentation

int c_entry ( void )

c_entry: Main UART-FULLMODEM program body

Parameters:
[in] None
Returns:
int

Definition at line 419 of file uart_fullmodem_test.c.

void check_failed | ( | uint8_t * | file,
 |  | uint32_t | line
 | ) |  |

Definition at line 599 of file uart_fullmodem_test.c.

int main ( void )

Definition at line 585 of file uart_fullmodem_test.c.

void print_menu ( void )

Print Welcome Screen Menu subroutine.

Parameters:
None
Returns:
None
Print Welcome Screen Menu subroutine.

print_menu

Print menu screen.

Print Welcome menu.

Print menu.

Parameters:
[in] none
Returns:
none

Definition at line 209 of file can_test_two_kit.c.

void UART1_IntErr ( uint8_t bLSErrType )

UART Line Status Error.

Parameters:
[in] bLSErrType UART Line Status Error Type
Returns:
None

Definition at line 263 of file uart_fullmodem_test.c.

void UART1_IntReceive ( void )

UART1 receive function (ring buffer used).

Parameters:
[in] None
Returns:
None

Definition at line 173 of file uart_fullmodem_test.c.

void UART1_IntTransmit ( void )

UART1 transmit function (ring buffer used).

Parameters:
[in] None
Returns:
None

Definition at line 221 of file uart_fullmodem_test.c.

void UART1_IRQHandler ( void )

UART1 interrupt handler sub-routine.

Parameters:
[in] None
Returns:
None

Definition at line 380 of file serial.c.

uint32_t UARTReceive | ( | LPC_UART_TypeDef * | UARTPort,
 |  | uint8_t * | rxbuf,
 |  | uint8_t | buflen
 | ) |  |

UART read function for interrupt mode (using ring buffers).

Parameters:
[in] | UARTPort | Selected UART peripheral used to send data, should be UART1.
[out] | rxbuf | Pointer to Received buffer
[in] | buflen | Length of Received buffer
Returns:
Number of bytes actually read from the ring buffer

uint32_t UARTSend | ( | LPC_UART_TypeDef * | UARTPort,
 |  | uint8_t * | txbuf,
 |  | uint8_t | buflen
 | ) |  |

UART transmit function for interrupt mode (using ring buffers).

Parameters:
[in] | UARTPort | Selected UART peripheral used to send data, should be UART1.
[out] | txbuf | Pointer to Transmit buffer
[in] | buflen | Length of Transmit buffer
Returns:
Number of bytes actually sent to the ring buffer

Variable Documentation

uint8_t menu1[] = "Hello NXP Semiconductors \n\r"

Definition at line 75 of file uart_fullmodem_test.c.

uint8_t menu2[]

Initial value:

"UART1 Full Modem \n\r\t "
"MCU LPC17xx - ARM Cortex-M3 \n\r\t "
"UART1 - 9600bps \n\r"

Definition at line 76 of file uart_fullmodem_test.c.

uint8_t menu3[] = "UART demo terminated!\n"

Definition at line 80 of file uart_fullmodem_test.c.

UART_RING_BUFFER_T rb

Definition at line 83 of file uart_fullmodem_test.c.

__IO int32_t RTS_State

Definition at line 86 of file uart_fullmodem_test.c.

__IO FlagStatus TxIntStat

Definition at line 89 of file uart_fullmodem_test.c.

Generated on Tue Jun 7 15:00:01 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: USBDEV

USBDEV
[LPC1700CMSIS Examples]

Modules

USBAudio
USBCDC
USBHID
USBMassStorage
Generated on Tue Jun 7 14:59:47 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: USBAudio

USBAudio
[USBDEV]

Functions

void | get_potval (void)
void | TIMER0_IRQHandler (void)
TIMER0 IRQ Handler.
int | main (void)

Variables

uint8_t | Mute
uint32_t | Volume
uint32_t | InfoBuf [P_C]
short | DataBuf [B_S]
uint16_t | DataOut
uint16_t | DataIn
uint8_t | DataRun
uint16_t | PotVal
uint32_t | VUM
uint32_t | Tick

Function Documentation

void get_potval ( void )

Definition at line 55 of file usbdmain.c.

int main ( void )

Definition at line 124 of file usbdmain.c.

void TIMER0_IRQHandler ( void )

TIMER0 IRQ Handler.

TIMER0 interrupt handler.

TIMER0 interrupt handler sub-routine.

Timer 0 interrupt handler. This sub-routine will set/clear two Phase A-B output pin to their phase state.

TIMER0 interrupt handler.

TIMER0 interrupt handler sub-routine.

Timer 0 interrupt handler. This sub-routine will set/clear two Phase A-B output pin to their phase state.

Parameters:
[in] None
Returns:
None
Parameters:
None
Returns:
None

Definition at line 73 of file usbdmain.c.

Variable Documentation

short DataBuf[B_S]

Definition at line 39 of file usbdmain.c.

uint16_t DataIn

Definition at line 43 of file usbdmain.c.

uint16_t DataOut

Definition at line 42 of file usbdmain.c.

uint8_t DataRun

Definition at line 45 of file usbdmain.c.

uint32_t InfoBuf[P_C]

Definition at line 38 of file usbdmain.c.

uint8_t Mute

Definition at line 31 of file usbdmain.c.

uint16_t PotVal

Definition at line 46 of file usbdmain.c.

uint32_t Tick

Definition at line 48 of file usbdmain.c.

uint32_t Volume

Definition at line 32 of file usbdmain.c.

uint32_t VUM

Definition at line 47 of file usbdmain.c.

Generated on Tue Jun 7 15:00:01 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: USBCDC

USBCDC
[USBDEV]

Functions

void | VCOM_Init (void)
void | VCOM_Serial2Usb (void)
void | VCOM_Usb2Serial (void)
void | VCOM_CheckSerialState (void)
int | main (void)

Function Documentation

int main ( void )

Definition at line 105 of file vcomdemo.c.

void VCOM_CheckSerialState ( void )

Definition at line 91 of file vcomdemo.c.

void VCOM_Init ( void )

Definition at line 39 of file vcomdemo.c.

void VCOM_Serial2Usb ( void )

Definition at line 51 of file vcomdemo.c.

void VCOM_Usb2Serial ( void )

Definition at line 70 of file vcomdemo.c.

Generated on Tue Jun 7 15:00:01 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: USBHID

USBHID
[USBDEV]

Functions

void | GetInReport (void)
void | SetOutReport (void)
int | main (void)
void | check_failed (uint8_t *file, uint32_t line)

Variables

uint8_t | InReport
uint8_t | OutReport

Function Documentation

void check_failed | ( | uint8_t * | file,
 |  | uint32_t | line
 | ) |  |

Definition at line 141 of file demo.c.

void GetInReport ( void )

Definition at line 50 of file demo.c.

int main ( void )

Definition at line 123 of file demo.c.

void SetOutReport ( void )

Definition at line 64 of file demo.c.

Variable Documentation

uint8_t InReport

Definition at line 38 of file demo.c.

uint8_t OutReport

Definition at line 42 of file demo.c.

Generated on Tue Jun 7 15:00:01 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: USBMassStorage

USBMassStorage
[USBDEV]

Functions

int | main (void)
void | check_failed (uint8_t *file, uint32_t line)

Variables

uint8_t | Memory [MSC_MemorySize]

Function Documentation

void check_failed | ( | uint8_t * | file,
 |  | uint32_t | line
 | ) |  |

Definition at line 64 of file memory.c.

int main ( void )

Definition at line 43 of file memory.c.

Variable Documentation

uint8_t Memory[MSC_MemorySize]

Definition at line 33 of file mscuser.c.

Generated on Tue Jun 7 15:00:01 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: WDT

WDT
[LPC1700CMSIS Examples]

Modules

INTERRUPT
RESET
Generated on Tue Jun 7 14:59:47 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: INTERRUPT

INTERRUPT
[WDT]

Defines

#define | MCB_LPC_1768
#define | WDT_TIMEOUT 5000000

Functions

void | WDT_IRQHandler (void)
WDT interrupt handler sub-routine.
void | print_menu (void)
Print menu.
void | LED_Init (void)
Initialize LEDs.
int | c_entry (void)
c_entry: Main WDT program body
int | main (void)
void | check_failed (uint8_t *file, uint32_t line)

Variables

uint8_t | menu1 []
uint8_t | info1 [] = "BEFORE WDT interrupt!\n\r"
uint8_t | info2 [] = "AFTER WDT interrupt\n\r"
__IO Bool | wdt_flag = FALSE
__IO Bool | LED_toggle = FALSE

Define Documentation

#define MCB_LPC_1768

Definition at line 39 of file wdt_interrupt_test.c.

#define WDT_TIMEOUT 5000000

Definition at line 43 of file wdt_interrupt_test.c.

Function Documentation

int c_entry ( void )

c_entry: Main WDT program body

Parameters:
[in] None
Returns:
int

Definition at line 122 of file wdt_interrupt_test.c.

void check_failed | ( | uint8_t * | file,
 |  | uint32_t | line
 | ) |  |

Definition at line 208 of file wdt_interrupt_test.c.

void LED_Init ( void )

Initialize LEDs.

Parameters:
[in] None
Returns:
None
Initialize LEDs.

Init LEDs.

Initialize LEDs.

Init LEDs.

Parameters:
[in] None
Returns:
None
Parameters:
[in] none
Returns:
none

Definition at line 55 of file tcpip.c.

int main ( void )

Definition at line 196 of file wdt_interrupt_test.c.

void print_menu ( void )

Print menu.

Parameters:
[in] None
Returns:
None
Print Welcome Screen Menu subroutine.

print_menu

Print menu screen.

Print Welcome menu.

Print menu.

Parameters:
[in] none
Returns:
none

Definition at line 209 of file can_test_two_kit.c.

void WDT_IRQHandler ( void )

WDT interrupt handler sub-routine.

Parameters:
[in] None
Returns:
None

Variable Documentation

uint8_t info1[] = "BEFORE WDT interrupt!\n\r"

Definition at line 57 of file wdt_interrupt_test.c.

uint8_t info2[] = "AFTER WDT interrupt\n\r"

Definition at line 58 of file wdt_interrupt_test.c.

__IO Bool LED_toggle = FALSE

Definition at line 61 of file wdt_interrupt_test.c.

uint8_t menu1[]

Initial value:

"********************************************************************************\n\r"
"Hello NXP Semiconductors \n\r"
" Watch dog timer interrupt (test or debug mode) demo \n\r"
"\t - MCU: LPC17xx \n\r"
"\t - Core: Cortex M3 \n\r"
"\t - Communicate via: UART0 -  115200 bps \n\r"
" Use WDT with Internal RC OSC, interrupt mode (test only), timeout = 1 seconds \n\r"
" To generate an interrupt, after interrupt WDT interrupt is disabled immediately! \n\r"
"********************************************************************************\n\r"

Definition at line 47 of file wdt_interrupt_test.c.

__IO Bool wdt_flag = FALSE

Definition at line 60 of file wdt_interrupt_test.c.

Generated on Tue Jun 7 15:00:01 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: RESET

RESET
[WDT]

Defines

#define | IAR_LPC_1768
#define | WDT_TIMEOUT 5000000

Functions

int | c_entry (void)
c_entry: Main WDT program body
int | main (void)
void | check_failed (uint8_t *file, uint32_t line)

Variables

uint8_t | menu1 []
uint8_t | info1 [] = "Last MCU reset caused by WDT TimeOut!\n\r"
uint8_t | info2 [] = "Last MCU reset caused by External!\n\r"

Define Documentation

#define IAR_LPC_1768

Definition at line 39 of file wdt_reset_test.c.

#define WDT_TIMEOUT 5000000

Definition at line 42 of file wdt_reset_test.c.

Function Documentation

int c_entry ( void )

c_entry: Main WDT program body

Parameters:
[in] None
Returns:
int

Definition at line 67 of file wdt_reset_test.c.

void check_failed | ( | uint8_t * | file,
 |  | uint32_t | line
 | ) |  |

Definition at line 114 of file wdt_reset_test.c.

int main ( void )

Definition at line 102 of file wdt_reset_test.c.

Variable Documentation

uint8_t info1[] = "Last MCU reset caused by WDT TimeOut!\n\r"

Definition at line 58 of file wdt_reset_test.c.

uint8_t info2[] = "Last MCU reset caused by External!\n\r"

Definition at line 59 of file wdt_reset_test.c.

uint8_t menu1[]

Initial value:

"********************************************************************************\n\r"
"This Welcome Screen below will executive after reset event \n\r"
"Hello NXP Semiconductors \n\r"
" Watch dog timer reset when timeout demo \n\r"
"\t - MCU: LPC17xx \n\r"
"\t - Core: Cortex M3 \n\r"
"\t - Communicate via: UART0 - 115200 bps \n\r"
" Use WDT with Internal RC OSC, reset mode, timeout = 5 seconds \n\r"
" To reset MCU when time out. After reset, program will determine what cause of "
" last reset time (external reset or WDT time-out)\n\r"
"********************************************************************************\n\r"

Definition at line 46 of file wdt_reset_test.c.

Generated on Tue Jun 7 15:00:01 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Data Structures

  • Data Structures
  • Data Fields

Data Structures

Here are the data structures with brief descriptions:
__CDC_BUF_T |
__FILE |
__SER_BUF_T |
_ASCSET_Data_t |
_Bmp_t |
_COLMOD_Data_t |
_DATCTR_Data_t |
_FontType_t |
_GLCD_CmdCtrl_t |
_MADCTR_Data_t |
_USB_DMA_DESCRIPTOR |
_USB_EP_DATA |
AF_SectionDef | Acceptance Filter Section Table structure
APSR_Type | Union type to access the Application Program Status Register (APSR)
arp_entry |
arp_hdr |
CAN_MSG_Type | CAN message object structure
CAN_PinCFG_Type | Pin Configuration structure
CONTROL_Type | Union type to access the Control Registers (CONTROL)
CoreDebug_Type | Structure type to access the Core Debug Register (CoreDebug)
DAC_CONVERTER_CFG_Type | Configuration for DAC converter control register
dhcp_msg |
dhcpc_state |
dns_answer |
dns_hdr |
EFF_Entry | Extended ID Frame Format Entry structure
EFF_GPR_Entry | Group of Extended ID Frame Format Entry structure
EMAC_CFG_Type | EMAC configuration structure definition
EMAC_PACKETBUF_Type | TX Data Buffer structure definition
ethip_hdr |
EXTI_InitTypeDef | EXTI Initialize structure
FullCAN_Entry | FullCAN Entry structure
fwcache_entry |
GPDMA_Channel_CFG_Type | GPDMA Channel configuration structure type definition
GPDMA_LLI_Type | GPDMA Linker List Item structure type definition
GPIO_Byte_TypeDef | Fast GPIO port byte type definition
GPIO_HalfWord_TypeDef | Fast GPIO port half-word type definition
hello_world_state |
httpd_cgi_call |
httpd_fs_file |
httpd_fsdata_file |
httpd_fsdata_file_noconst |
httpd_state |
I2C_CFG_T | I2C device configuration structure type
I2C_M_SETUP_Type | Master transfer setup data structure definitions
I2C_OWNSLAVEADDR_CFG_Type | I2C Own slave address setting structure
I2C_S_SETUP_Type | Slave transfer setup data structure definitions
I2S_CFG_Type | I2S configuration structure definition
I2S_DMAConf_Type | I2S DMA configuration structure definition
I2S_MODEConf_Type | I2S mode configuration structure definition
icmpip_hdr |
InterruptType_Type | Structure type to access the Interrupt Type Register
IPSR_Type | Union type to access the Interrupt Program Status Register (IPSR)
ITM_Type | Structure type to access the Instrumentation Trace Macrocell Register (ITM)
LPC_ADC_TypeDef | Analog-to-Digital Converter (ADC) register structure definition
LPC_CAN_TypeDef | Controller Area Network Controller (CAN) register structure definition
LPC_CANAF_RAM_TypeDef | Controller Area Network Acceptance Filter RAM (CANAF_RAM)structure definition
LPC_CANAF_TypeDef | Controller Area Network Acceptance Filter(CANAF) register structure definition
LPC_CANCR_TypeDef | Controller Area Network Central (CANCR) register structure definition
LPC_DAC_TypeDef | Digital-to-Analog Converter (DAC) register structure definition
LPC_EMAC_TypeDef | Ethernet Media Access Controller (EMAC) register structure definition
LPC_GPDMA_TypeDef | General Purpose Direct Memory Access (GPDMA) register structure definition
LPC_GPDMACH_TypeDef | General Purpose Direct Memory Access Channel (GPDMACH) register structure definition
LPC_GPIO_TypeDef | General Purpose Input/Output (GPIO) register structure definition
LPC_GPIOINT_TypeDef | General Purpose Input/Output interrupt (GPIOINT) register structure definition
LPC_I2C_TypeDef | Inter-Integrated Circuit (I2C) register structure definition
LPC_I2S_TypeDef | Inter IC Sound (I2S) register structure definition
LPC_MCPWM_TypeDef | Motor Control Pulse-Width Modulation (MCPWM) register structure definition
LPC_PINCON_TypeDef | Pin Connect Block (PINCON) register structure definition
LPC_PWM_TypeDef | Pulse-Width Modulation (PWM) register structure definition
LPC_QEI_TypeDef | Quadrature Encoder Interface (QEI) register structure definition
LPC_RIT_TypeDef | Repetitive Interrupt Timer (RIT) register structure definition
LPC_RTC_TypeDef | Real-Time Clock (RTC) register structure definition
LPC_SC_TypeDef | System Control (SC) register structure definition
LPC_SPI_TypeDef | Serial Peripheral Interface (SPI) register structure definition
LPC_SSP_TypeDef | Synchronous Serial Communication (SSP) register structure definition
LPC_TIM_TypeDef | Timer (TIM) register structure definition
LPC_UART0_TypeDef | Universal Asynchronous Receiver Transmitter 0 (UART0) register structure definition
LPC_UART1_TypeDef | Universal Asynchronous Receiver Transmitter 1 (UART1) register structure definition
LPC_UART_TypeDef | Universal Asynchronous Receiver Transmitter (UART) register structure definition
LPC_USB_TypeDef | Universal Serial Bus (USB) register structure definition
LPC_WDT_TypeDef | Watchdog Timer (WDT) register structure definition
MCPWM_CAPTURE_CFG_Type | MCPWM Capture Configuration type definition
MCPWM_CHANNEL_CFG_Type | Motor Control PWM Channel Configuration structure type definition
MCPWM_COUNT_CFG_Type | MCPWM Count Control Configuration type definition
namemap |
neighbor_entry |
NVIC_Type | Structure type to access the Nested Vectored Interrupt Controller (NVIC)
PINSEL_CFG_Type | Pin configuration structure
psock |
psock_buf |
pt |
ptentry |
PWM_CAPTURECFG_Type | PWM Capture Input configuration structure
PWM_COUNTERCFG_Type | Configuration structure in PWM COUNTER mode
PWM_Match_T | Match update structure
PWM_MATCHCFG_Type | PWM Match channel configuration structure
PWM_TIMERCFG_Type | Configuration structure in PWM TIMER mode
QEI_CFG_Type | QEI Configuration structure type definition
QEI_CFGOPT_Type | QEI configuration union type definition
QEI_RELOADCFG_Type | Timer Reload Configuration structure type definition
RTC_TIME_Type | Time structure definitions for easy manipulate the data
RX_Desc | RX Descriptor structure type definition
RX_Stat | RX Status structure type definition
SCB_Type | Structure type to access the System Control Block (SCB)
SFF_Entry | Standard ID Frame Format Entry structure
SFF_GPR_Entry | Group of Standard ID Frame Format Entry structure
smtp_state |
SPI_CFG_Type | SPI configuration structure
SPI_DATA_SETUP_Type | SPI Data configuration structure definitions
SSP_CFG_Type | SSP configuration structure
SSP_DATA_SETUP_Type | SPI Data configuration structure definitions
SysTick_Type | Structure type to access the System Timer (SysTick)
tcpip_hdr |
telnetd_line |
telnetd_state |
TIM_CAPTURECFG_Type | Capture Input configuration structure
TIM_COUNTERCFG_Type | Configuration structure in COUNTER mode
TIM_MATCHCFG_Type | Match channel configuration structure
TIM_TIMERCFG_Type | Configuration structure in TIMER mode
timer |
TX_Desc | TX Descriptor structure type definition
TX_Stat | TX Status structure type definition
UART1_RS485_CTRLCFG_Type | UART1 Full modem - RS485 Control configuration type
UART_AB_CFG_Type | Auto Baudrate mode configuration type definition
UART_CFG_Type | UART Configuration Structure definition
UART_FIFO_CFG_Type | UART FIFO Configuration Structure definition
UART_RING_BUFFER_T | UART Ring buffer structure
uip_conn |
uip_eth_addr |
uip_eth_hdr |
uip_fw_netif |
uip_icmpip_hdr |
uip_neighbor_addr |
uip_stats |
uip_tcpip_hdr |
uip_udpip_hdr |
webclient_state |
xPSR_Type | Union type to access the Special-Purpose Program Status Registers (xPSR)
Generated on Tue Jun 7 15:00:02 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: __CDC_BUF_T Struct Reference

  • Data Structures
  • Data Fields

__CDC_BUF_T Struct Reference

Data Fields

unsigned char | data [CDC_BUF_SIZE]
unsigned int | wrIdx
unsigned int | rdIdx

Detailed Description

Definition at line 57 of file cdcuser.c.

Field Documentation

unsigned char data[CDC_BUF_SIZE]

Definition at line 58 of file cdcuser.c.

unsigned int rdIdx

Definition at line 60 of file cdcuser.c.

unsigned int wrIdx

Definition at line 59 of file cdcuser.c.

The documentation for this struct was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBCDC/cdcuser.c
Generated on Tue Jun 7 15:00:03 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: __FILE Struct Reference

  • Data Structures
  • Data Fields

__FILE Struct Reference

Data Fields

int handle

Detailed Description

Definition at line 21 of file Retarget.c.

Field Documentation

int handle

Definition at line 21 of file Retarget.c.

The documentation for this struct was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/common/Retarget.c
Generated on Tue Jun 7 15:00:03 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: __SER_BUF_T Struct Reference

  • Data Structures
  • Data Fields

__SER_BUF_T Struct Reference

Data Fields

unsigned char | data [SER_BUF_SIZE]
unsigned int | wrIdx
unsigned int | rdIdx

Detailed Description

Definition at line 36 of file serial.c.

Field Documentation

unsigned char data[SER_BUF_SIZE]

Definition at line 37 of file serial.c.

unsigned int rdIdx

Definition at line 39 of file serial.c.

unsigned int wrIdx

Definition at line 38 of file serial.c.

The documentation for this struct was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBCDC/serial.c
Generated on Tue Jun 7 15:00:03 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: _ASCSET_Data_t Struct Reference

  • Data Structures
  • Data Fields

_ASCSET_Data_t Struct Reference

#include <drv_glcd.h>

Data Fields

uint8_t | Ssl
uint8_t | Sel
uint8_t | Sfl
uint8_t | Smd

Detailed Description

Definition at line 129 of file drv_glcd.h.

Field Documentation

uint8_t Sel

Definition at line 131 of file drv_glcd.h.

uint8_t Sfl

Definition at line 132 of file drv_glcd.h.

uint8_t Smd

Definition at line 133 of file drv_glcd.h.

uint8_t Ssl

Definition at line 130 of file drv_glcd.h.

The documentation for this struct was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Examples/LCD/NOKIA6610_LCD/drv_glcd.h
Generated on Tue Jun 7 15:00:03 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: _Bmp_t Struct Reference

  • Data Structures
  • Data Fields

_Bmp_t Struct Reference

#include <drv_glcd.h>

Data Fields

uint32_t | H_Size
uint32_t | V_Size
uint32_t | BitsPP
uint32_t | BytesPP
unsigned int * | pPalette
unsigned int * | pPicStream
unsigned char * | pPicDesc

Detailed Description

Definition at line 214 of file drv_glcd.h.

Field Documentation

uint32_t BitsPP

Definition at line 217 of file drv_glcd.h.

uint32_t BytesPP

Definition at line 218 of file drv_glcd.h.

uint32_t H_Size

Definition at line 215 of file drv_glcd.h.

unsigned int* pPalette

Definition at line 219 of file drv_glcd.h.

unsigned char* pPicDesc

Definition at line 221 of file drv_glcd.h.

unsigned int* pPicStream

Definition at line 220 of file drv_glcd.h.

uint32_t V_Size

Definition at line 216 of file drv_glcd.h.

The documentation for this struct was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Examples/LCD/NOKIA6610_LCD/drv_glcd.h
Generated on Tue Jun 7 15:00:03 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: _COLMOD_Data_t Struct Reference

  • Data Structures
  • Data Fields

_COLMOD_Data_t Struct Reference

#include <drv_glcd.h>

Data Fields

union {
uint8_t ColourMode
struct {
uint8_t Mode: 3
uint8_t Reversed: 5
}
};

Detailed Description

Definition at line 190 of file drv_glcd.h.

Field Documentation

union { ... }

uint8_t ColourMode

Definition at line 193 of file drv_glcd.h.

uint8_t Mode

Definition at line 196 of file drv_glcd.h.

uint8_t Reversed

Definition at line 197 of file drv_glcd.h.

The documentation for this struct was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Examples/LCD/NOKIA6610_LCD/drv_glcd.h
Generated on Tue Jun 7 15:00:03 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: _DATCTR_Data_t Struct Reference

  • Data Structures
  • Data Fields

_DATCTR_Data_t Struct Reference

#include <drv_glcd.h>

Data Fields

union {
uint8_t RC_AddMode
struct {
uint8_t MY: 1
uint8_t MX: 1
uint8_t MV: 1
uint8_t ML: 1
uint8_t __pad0__: 4
}
};
union {
uint8_t RGB_Mode
struct {
uint8_t RGB: 1
uint8_t __pad0__: 7
}
};
union {
uint8_t GrayScale
struct {
uint8_t GS: 3
uint8_t Reversed: 5
}
};

Detailed Description

Definition at line 140 of file drv_glcd.h.

Field Documentation

union { ... }

union { ... }

union { ... }

uint8_t __pad0__

Definition at line 150 of file drv_glcd.h.

uint8_t GrayScale

Definition at line 164 of file drv_glcd.h.

uint8_t GS

Definition at line 167 of file drv_glcd.h.

uint8_t ML

Definition at line 149 of file drv_glcd.h.

uint8_t MV

Definition at line 148 of file drv_glcd.h.

uint8_t MX

Definition at line 147 of file drv_glcd.h.

uint8_t MY

Definition at line 146 of file drv_glcd.h.

uint8_t RC_AddMode

Definition at line 143 of file drv_glcd.h.

uint8_t Reversed

Definition at line 168 of file drv_glcd.h.

uint8_t RGB

Definition at line 158 of file drv_glcd.h.

uint8_t RGB_Mode

Definition at line 155 of file drv_glcd.h.

The documentation for this struct was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Examples/LCD/NOKIA6610_LCD/drv_glcd.h
Generated on Tue Jun 7 15:00:03 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: _FontType_t Struct Reference

  • Data Structures
  • Data Fields

_FontType_t Struct Reference

#include <drv_glcd.h>

Data Fields

uint32_t | H_Size
uint32_t | V_Size
uint32_t | CharacterOffset
uint32_t | CharactersNuber
unsigned char * | pFontStream
unsigned char * | pFontDesc

Detailed Description

Definition at line 205 of file drv_glcd.h.

Field Documentation

uint32_t CharacterOffset

Definition at line 208 of file drv_glcd.h.

uint32_t CharactersNuber

Definition at line 209 of file drv_glcd.h.

uint32_t H_Size

Definition at line 206 of file drv_glcd.h.

unsigned char* pFontDesc

Definition at line 211 of file drv_glcd.h.

unsigned char* pFontStream

Definition at line 210 of file drv_glcd.h.

uint32_t V_Size

Definition at line 207 of file drv_glcd.h.

The documentation for this struct was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Examples/LCD/NOKIA6610_LCD/drv_glcd.h
Generated on Tue Jun 7 15:00:03 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: _GLCD_CmdCtrl_t Struct Reference

  • Data Structures
  • Data Fields

_GLCD_CmdCtrl_t Struct Reference

#include <drv_glcd.h>

Data Fields

uint32_t | Cmd
GLCD_CmdDir_t Dir
Bool Pulse
uint32_t | Param

Detailed Description

Definition at line 121 of file drv_glcd.h.

Field Documentation

uint32_t Cmd

Definition at line 122 of file drv_glcd.h.

GLCD_CmdDir_t Dir

Definition at line 123 of file drv_glcd.h.

uint32_t Param

Definition at line 125 of file drv_glcd.h.

Bool Pulse

Definition at line 124 of file drv_glcd.h.

The documentation for this struct was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Examples/LCD/NOKIA6610_LCD/drv_glcd.h
Generated on Tue Jun 7 15:00:03 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: _MADCTR_Data_t Struct Reference

  • Data Structures
  • Data Fields

_MADCTR_Data_t Struct Reference

#include <drv_glcd.h>

Data Fields

union {
uint8_t MemDataAccCtrl
struct {
uint8_t Reversed: 3
uint8_t RGB: 1
uint8_t ML: 1
uint8_t MV: 1
uint8_t MX: 1
uint8_t MY: 1
}
};

Detailed Description

Definition at line 173 of file drv_glcd.h.

Field Documentation

union { ... }

uint8_t MemDataAccCtrl

Definition at line 176 of file drv_glcd.h.

uint8_t ML

Definition at line 181 of file drv_glcd.h.

uint8_t MV

Definition at line 182 of file drv_glcd.h.

uint8_t MX

Definition at line 183 of file drv_glcd.h.

uint8_t MY

Definition at line 184 of file drv_glcd.h.

uint8_t Reversed

Definition at line 179 of file drv_glcd.h.

uint8_t RGB

Definition at line 180 of file drv_glcd.h.

The documentation for this struct was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Examples/LCD/NOKIA6610_LCD/drv_glcd.h
Generated on Tue Jun 7 15:00:03 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: _USB_DMA_DESCRIPTOR Struct Reference

  • Data Structures
  • Data Fields

_USB_DMA_DESCRIPTOR Struct Reference

#include <usbhw.h>

Data Fields

uint32_t | BufAdr
uint16_t | BufLen
uint16_t | MaxSize
uint32_t | InfoAdr
union {
struct {
uint32_t Link: 1
uint32_t IsoEP: 1
uint32_t ATLE: 1
uint32_t Rsrvd: 5
uint32_t LenPos: 8
} Type
uint32_t Val
} Cfg
union {
struct {
uint32_t Link: 1
uint32_t IsoEP: 1
uint32_t ATLE: 1
uint32_t Rsrvd: 5
uint32_t LenPos: 8
} Type
uint32_t Val
} Cfg
union {
struct {
uint32_t Link: 1
uint32_t IsoEP: 1
uint32_t ATLE: 1
uint32_t Rsrvd: 5
uint32_t LenPos: 8
} Type
uint32_t Val
} Cfg
union {
struct {
uint32_t Link: 1
uint32_t IsoEP: 1
uint32_t ATLE: 1
uint32_t Rsrvd: 5
uint32_t LenPos: 8
} Type
uint32_t Val
} Cfg

Detailed Description

Definition at line 65 of file usbhw.h.

Field Documentation

uint32_t ATLE

Definition at line 74 of file usbhw.h.

uint32_t BufAdr

Definition at line 66 of file usbhw.h.

uint16_t BufLen

Definition at line 67 of file usbhw.h.

union { ... } Cfg

union { ... } Cfg

union { ... } Cfg

union { ... } Cfg

uint32_t InfoAdr

Definition at line 69 of file usbhw.h.

uint32_t IsoEP

Definition at line 73 of file usbhw.h.

uint32_t LenPos

Definition at line 76 of file usbhw.h.

uint32_t Link

Definition at line 72 of file usbhw.h.

uint16_t MaxSize

Definition at line 68 of file usbhw.h.

uint32_t Rsrvd

Definition at line 75 of file usbhw.h.

struct { ... } Type

struct { ... } Type

struct { ... } Type

struct { ... } Type

uint32_t Val

Definition at line 78 of file usbhw.h.

The documentation for this struct was generated from the following files:
  • C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBAudio/usbhw.h
  • C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBCDC/usbhw.h
  • C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBHID/usbhw.h
  • C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBMassStorage/usbhw.h
Generated on Tue Jun 7 15:00:03 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: _USB_EP_DATA Struct Reference

  • Data Structures
  • Data Fields

_USB_EP_DATA Struct Reference

#include <usbcore.h>

Data Fields

uint8_t * | pData
uint16_t | Count

Detailed Description

Definition at line 24 of file usbcore.h.

Field Documentation

uint16_t Count

Definition at line 26 of file usbcore.h.

uint8_t * pData

Definition at line 25 of file usbcore.h.

The documentation for this struct was generated from the following files:
  • C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBAudio/usbcore.h
  • C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBCDC/usbcore.h
  • C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBHID/usbcore.h
  • C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBMassStorage/usbcore.h
Generated on Tue Jun 7 15:00:03 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: AF_SectionDef Struct Reference

  • Data Structures
  • Data Fields

AF_SectionDef Struct Reference
[CAN Public Types]

Acceptance Filter Section Table structure. More...

#include <lpc17xx_can.h>

Data Fields

FullCAN_Entry * FullCAN_Sec
uint8_t | FC_NumEntry
SFF_Entry * SFF_Sec
uint8_t | SFF_NumEntry
SFF_GPR_Entry * SFF_GPR_Sec
uint8_t | SFF_GPR_NumEntry
EFF_Entry * EFF_Sec
uint8_t | EFF_NumEntry
EFF_GPR_Entry * EFF_GPR_Sec
uint8_t | EFF_GPR_NumEntry

Detailed Description

Acceptance Filter Section Table structure.

Definition at line 794 of file lpc17xx_can.h.

Field Documentation

uint8_t EFF_GPR_NumEntry

Group Extended ID Entry Number

Definition at line 804 of file lpc17xx_can.h.

EFF_GPR_Entry* EFF_GPR_Sec

The pointer point to EFF_GPR_Entry

Definition at line 803 of file lpc17xx_can.h.

uint8_t EFF_NumEntry

Extended ID Entry Number

Definition at line 802 of file lpc17xx_can.h.

EFF_Entry* EFF_Sec

The pointer point to EFF_Entry

Definition at line 801 of file lpc17xx_can.h.

uint8_t FC_NumEntry

FullCAN Entry Number

Definition at line 796 of file lpc17xx_can.h.

FullCAN_Entry* FullCAN_Sec

The pointer point to FullCAN_Entry

Definition at line 795 of file lpc17xx_can.h.

uint8_t SFF_GPR_NumEntry

Group Standard ID Entry Number

Definition at line 800 of file lpc17xx_can.h.

SFF_GPR_Entry* SFF_GPR_Sec

The pointer point to SFF_GPR_Entry

Definition at line 799 of file lpc17xx_can.h.

uint8_t SFF_NumEntry

Standard ID Entry Number

Definition at line 798 of file lpc17xx_can.h.

SFF_Entry* SFF_Sec

The pointer point to SFF_Entry

Definition at line 797 of file lpc17xx_can.h.

The documentation for this struct was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_can.h
Generated on Tue Jun 7 15:00:03 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: APSR_Type Union Reference

  • Data Structures
  • Data Fields

APSR_Type Union Reference
[CMSIS Core]

Union type to access the Application Program Status Register (APSR). More...

#include <core_cm3.h>

Data Fields

struct {
uint32_t _reserved0:27
uint32_t Q:1
uint32_t V:1
uint32_t C:1
uint32_t Z:1
uint32_t N:1
} b
uint32_t w

Detailed Description

Union type to access the Application Program Status Register (APSR).

Definition at line 130 of file core_cm3.h.

Field Documentation

uint32_t _reserved0

bit: 0..26 Reserved

Definition at line 135 of file core_cm3.h.

struct { ... } b

Structure used for bit access

uint32_t C

bit: 29 Carry condition code flag

Definition at line 143 of file core_cm3.h.

uint32_t N

bit: 31 Negative condition code flag

Definition at line 145 of file core_cm3.h.

uint32_t Q

bit: 27 Saturation condition flag

Definition at line 141 of file core_cm3.h.

uint32_t V

bit: 28 Overflow condition code flag

Definition at line 142 of file core_cm3.h.

uint32_t w

Type used for word access

Definition at line 147 of file core_cm3.h.

uint32_t Z

bit: 30 Zero condition code flag

Definition at line 144 of file core_cm3.h.

The documentation for this union was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Core/CM3/CoreSupport/core_cm3.h
Generated on Tue Jun 7 15:00:03 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: arp_entry Struct Reference

  • Data Structures
  • Data Fields

arp_entry Struct Reference
[uIP Address Resolution Protocol]

Data Fields

u16_t | ipaddr [2]
struct uip_eth_addr | ethaddr
u8_t time

Detailed Description

Definition at line 125 of file uip_arp.c.

Field Documentation

struct uip_eth_addr ethaddr [read]

Definition at line 127 of file uip_arp.c.

u16_t ipaddr[2]

Definition at line 126 of file uip_arp.c.

u8_t time

Definition at line 128 of file uip_arp.c.

The documentation for this struct was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/uip/uip_arp.c
Generated on Tue Jun 7 15:00:03 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: arp_hdr Struct Reference

  • Data Structures
  • Data Fields

arp_hdr Struct Reference
[uIP Address Resolution Protocol]

Data Fields

struct uip_eth_hdr | ethhdr
u16_t hwtype
u16_t protocol
u8_t hwlen
u8_t protolen
u16_t opcode
struct uip_eth_addr | shwaddr
u16_t | sipaddr [2]
struct uip_eth_addr | dhwaddr
u16_t | dipaddr [2]

Detailed Description

Definition at line 75 of file uip_arp.c.

Field Documentation

struct uip_eth_addr dhwaddr [read]

Definition at line 84 of file uip_arp.c.

u16_t dipaddr[2]

Definition at line 85 of file uip_arp.c.

struct uip_eth_hdr ethhdr [read]

Definition at line 76 of file uip_arp.c.

u8_t hwlen

Definition at line 79 of file uip_arp.c.

u16_t hwtype

Definition at line 77 of file uip_arp.c.

u16_t opcode

Definition at line 81 of file uip_arp.c.

u16_t protocol

Definition at line 78 of file uip_arp.c.

u8_t protolen

Definition at line 80 of file uip_arp.c.

struct uip_eth_addr shwaddr [read]

Definition at line 82 of file uip_arp.c.

u16_t sipaddr[2]

Definition at line 83 of file uip_arp.c.

The documentation for this struct was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/uip/uip_arp.c
Generated on Tue Jun 7 15:00:03 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: CAN_MSG_Type Struct Reference

  • Data Structures
  • Data Fields

CAN_MSG_Type Struct Reference
[CAN Public Types]

CAN message object structure. More...

#include <lpc17xx_can.h>

Data Fields

uint32_t | id
uint8_t | dataA [4]
uint8_t | dataB [4]
uint8_t | len
uint8_t | format
uint8_t | type

Detailed Description

CAN message object structure.

Definition at line 684 of file lpc17xx_can.h.

Field Documentation

uint8_t dataA[4]

Data field A

Definition at line 689 of file lpc17xx_can.h.

uint8_t dataB[4]

Data field B

Definition at line 690 of file lpc17xx_can.h.

uint8_t format

Identifier Format, should be:

  • STD_ID_FORMAT: Standard ID - 11 bit format
  • EXT_ID_FORMAT: Extended ID - 29 bit format

Definition at line 695 of file lpc17xx_can.h.

uint32_t id

29 bit identifier, it depend on "format" value

  • if format = STD_ID_FORMAT, id should be 11 bit identifier
  • if format = EXT_ID_FORMAT, id should be 29 bit identifier

Definition at line 685 of file lpc17xx_can.h.

uint8_t len

Length of data field in bytes, should be:

  • 0000b-0111b: 0-7 bytes
  • 1xxxb: 8 bytes

Definition at line 691 of file lpc17xx_can.h.

uint8_t type

Remote Frame transmission, should be:

  • DATA_FRAME: the number of data bytes called out by the DLC field are send from the CANxTDA and CANxTDB registers
  • REMOTE_FRAME: Remote Frame is sent

Definition at line 699 of file lpc17xx_can.h.

The documentation for this struct was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_can.h
Generated on Tue Jun 7 15:00:03 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: CAN_PinCFG_Type Struct Reference

  • Data Structures
  • Data Fields

CAN_PinCFG_Type Struct Reference
[CAN Public Types]

Pin Configuration structure. More...

#include <lpc17xx_can.h>

Data Fields

uint8_t | RD
uint8_t | TD

Detailed Description

Pin Configuration structure.

Definition at line 662 of file lpc17xx_can.h.

Field Documentation

uint8_t RD

Serial Inputs, from CAN transceivers, should be: For CAN1:

  • CAN_RD1_P0_0: RD pin is on P0.0
  • CAN_RD1_P0_21 : RD pin is on P0.21 For CAN2:
  • CAN_RD2_P0_4: RD pin is on P0.4
  • CAN_RD2_P2_7: RD pin is on P2.7

Definition at line 663 of file lpc17xx_can.h.

uint8_t TD

Serial Outputs, To CAN transceivers, should be: For CAN1:

  • CAN_TD1_P0_1: TD pin is on P0.1
  • CAN_TD1_P0_22: TD pin is on P0.22 For CAN2:
  • CAN_TD2_P0_5: TD pin is on P0.5
  • CAN_TD2_P2_8: TD pin is on P2.8

Definition at line 671 of file lpc17xx_can.h.

The documentation for this struct was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_can.h
Generated on Tue Jun 7 15:00:04 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: CONTROL_Type Union Reference

  • Data Structures
  • Data Fields

CONTROL_Type Union Reference
[CMSIS Core]

Union type to access the Control Registers (CONTROL). More...

#include <core_cm3.h>

Data Fields

struct {
uint32_t nPRIV:1
uint32_t SPSEL:1
uint32_t FPCA:1
uint32_t _reserved0:29
} b
uint32_t w

Detailed Description

Union type to access the Control Registers (CONTROL).

Definition at line 192 of file core_cm3.h.

Field Documentation

uint32_t _reserved0

bit: 3..31 Reserved

Definition at line 199 of file core_cm3.h.

struct { ... } b

Structure used for bit access

uint32_t FPCA

bit: 2 FP extension active flag

Definition at line 198 of file core_cm3.h.

uint32_t nPRIV

bit: 0 Execution privilege in Thread mode

Definition at line 196 of file core_cm3.h.

uint32_t SPSEL

bit: 1 Stack to be used

Definition at line 197 of file core_cm3.h.

uint32_t w

Type used for word access

Definition at line 201 of file core_cm3.h.

The documentation for this union was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Core/CM3/CoreSupport/core_cm3.h
Generated on Tue Jun 7 15:00:04 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: CoreDebug_Type Struct Reference

  • Data Structures
  • Data Fields

CoreDebug_Type Struct Reference
[CMSIS Core Debug]

Structure type to access the Core Debug Register (CoreDebug). More...

#include <core_cm3.h>

Data Fields

__IO uint32_t | DHCSR
__O uint32_t | DCRSR
__IO uint32_t | DCRDR
__IO uint32_t | DEMCR

Detailed Description

Structure type to access the Core Debug Register (CoreDebug).

Definition at line 732 of file core_cm3.h.

Field Documentation

__IO uint32_t DCRDR

Offset: 0x008 (R/W) Debug Core Register Data Register

Definition at line 736 of file core_cm3.h.

__O uint32_t DCRSR

Offset: 0x004 ( /W) Debug Core Register Selector Register

Definition at line 735 of file core_cm3.h.

__IO uint32_t DEMCR

Offset: 0x00C (R/W) Debug Exception and Monitor Control Register

Definition at line 737 of file core_cm3.h.

__IO uint32_t DHCSR

Offset: 0x000 (R/W) Debug Halting Control and Status Register

Definition at line 734 of file core_cm3.h.

The documentation for this struct was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Core/CM3/CoreSupport/core_cm3.h
Generated on Tue Jun 7 15:00:04 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: DAC_CONVERTER_CFG_Type Struct Reference

  • Data Structures
  • Data Fields

DAC_CONVERTER_CFG_Type Struct Reference
[DAC Public Types]

Configuration for DAC converter control register. More...

#include <lpc17xx_dac.h>

Data Fields

uint8_t | DBLBUF_ENA
uint8_t | CNT_ENA
uint8_t | DMA_ENA
uint8_t | RESERVED

Detailed Description

Configuration for DAC converter control register.

Definition at line 98 of file lpc17xx_dac.h.

Field Documentation

uint8_t CNT_ENA

-0: Time out counter is disable -1: Time out conter is enable

Definition at line 105 of file lpc17xx_dac.h.

uint8_t DBLBUF_ENA

-0: Disable DACR double buffering -1: when bit CNT_ENA, enable DACR double buffering feature

Definition at line 101 of file lpc17xx_dac.h.

uint8_t DMA_ENA

-0: DMA access is disable -1: DMA burst request

Definition at line 109 of file lpc17xx_dac.h.

uint8_t RESERVED

Definition at line 113 of file lpc17xx_dac.h.

The documentation for this struct was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_dac.h
Generated on Tue Jun 7 15:00:04 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: dhcp_msg Struct Reference

  • Data Structures
  • Data Fields

dhcp_msg Struct Reference

Data Fields

u8_t op
u8_t htype
u8_t hlen
u8_t hops
u8_t | xid [4]
u16_t secs
u16_t flags
u8_t | ciaddr [4]
u8_t | yiaddr [4]
u8_t | siaddr [4]
u8_t | giaddr [4]
u8_t | chaddr [16]
u8_t | sname [64]
u8_t | file [128]
u8_t | options [312]

Detailed Description

Definition at line 49 of file dhcpc.c.

Field Documentation

u8_t chaddr[16]

Definition at line 57 of file dhcpc.c.

u8_t ciaddr[4]

Definition at line 53 of file dhcpc.c.

u8_t file[128]

Definition at line 60 of file dhcpc.c.

u16_t flags

Definition at line 52 of file dhcpc.c.

u8_t giaddr[4]

Definition at line 56 of file dhcpc.c.

u8_t hlen

Definition at line 50 of file dhcpc.c.

u8_t hops

Definition at line 50 of file dhcpc.c.

u8_t htype

Definition at line 50 of file dhcpc.c.

u8_t op

Definition at line 50 of file dhcpc.c.

u8_t options[312]

Definition at line 62 of file dhcpc.c.

u16_t secs

Definition at line 52 of file dhcpc.c.

u8_t siaddr[4]

Definition at line 55 of file dhcpc.c.

u8_t sname[64]

Definition at line 59 of file dhcpc.c.

u8_t xid[4]

Definition at line 51 of file dhcpc.c.

u8_t yiaddr[4]

Definition at line 54 of file dhcpc.c.

The documentation for this struct was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/dhcpc/dhcpc.c
Generated on Tue Jun 7 15:00:04 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: dhcpc_state Struct Reference

  • Data Structures
  • Data Fields

dhcpc_state Struct Reference

#include <dhcpc.h>

Data Fields

struct pt | pt
char | state
struct uip_udp_conn * | conn
struct timer | timer
u16_t ticks
const void * | mac_addr
int | mac_len
u8_t | serverid [4]
u16_t | lease_time [2]
u16_t | ipaddr [2]
u16_t | netmask [2]
u16_t | dnsaddr [2]
u16_t | default_router [2]

Detailed Description

Definition at line 39 of file dhcpc.h.

Field Documentation

struct uip_udp_conn* conn [read]

Definition at line 42 of file dhcpc.h.

u16_t default_router[2]

Definition at line 54 of file dhcpc.h.

u16_t dnsaddr[2]

Definition at line 53 of file dhcpc.h.

u16_t ipaddr[2]

Definition at line 51 of file dhcpc.h.

u16_t lease_time[2]

Definition at line 50 of file dhcpc.h.

const void* mac_addr

Definition at line 45 of file dhcpc.h.

int mac_len

Definition at line 46 of file dhcpc.h.

u16_t netmask[2]

Definition at line 52 of file dhcpc.h.

struct pt pt [read]

Definition at line 40 of file dhcpc.h.

u8_t serverid[4]

Definition at line 48 of file dhcpc.h.

char state

Definition at line 41 of file dhcpc.h.

u16_t ticks

Definition at line 44 of file dhcpc.h.

struct timer timer [read]

Definition at line 43 of file dhcpc.h.

The documentation for this struct was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/dhcpc/dhcpc.h
Generated on Tue Jun 7 15:00:04 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: dns_answer Struct Reference

  • Data Structures
  • Data Fields

dns_answer Struct Reference
[DNS resolver]

Data Fields

u16_t type
u16_t class
u16_t ttl [2]
u16_t len
uip_ipaddr_t ipaddr

Detailed Description

Definition at line 101 of file resolv.c.

Field Documentation

u16_t class

Definition at line 105 of file resolv.c.

uip_ipaddr_t ipaddr

Definition at line 108 of file resolv.c.

u16_t len

Definition at line 107 of file resolv.c.

u16_t ttl[2]

Definition at line 106 of file resolv.c.

u16_t type

Definition at line 104 of file resolv.c.

The documentation for this struct was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/resolv/resolv.c
Generated on Tue Jun 7 15:00:04 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: dns_hdr Struct Reference

  • Data Structures
  • Data Fields

dns_hdr Struct Reference
[DNS resolver]

Data Fields

u16_t id
u8_t flags1
u8_t flags2
u16_t numquestions
u16_t numanswers
u16_t numauthrr
u16_t numextrarr

Detailed Description

Definition at line 80 of file resolv.c.

Field Documentation

u8_t flags1

Definition at line 82 of file resolv.c.

u8_t flags2

Definition at line 82 of file resolv.c.

u16_t id

Definition at line 81 of file resolv.c.

u16_t numanswers

Definition at line 95 of file resolv.c.

u16_t numauthrr

Definition at line 96 of file resolv.c.

u16_t numextrarr

Definition at line 97 of file resolv.c.

u16_t numquestions

Definition at line 94 of file resolv.c.

The documentation for this struct was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/resolv/resolv.c
Generated on Tue Jun 7 15:00:04 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: EFF_Entry Struct Reference

  • Data Structures
  • Data Fields

EFF_Entry Struct Reference
[CAN Public Types]

Extended ID Frame Format Entry structure. More...

#include <lpc17xx_can.h>

Data Fields

uint8_t | controller
uint32_t | ID_29

Detailed Description

Extended ID Frame Format Entry structure.

Definition at line 765 of file lpc17xx_can.h.

Field Documentation

uint8_t controller

CAN Controller, should be:

  • CAN1_CTRL: CAN1 Controller
  • CAN2_CTRL: CAN2 Controller

Definition at line 766 of file lpc17xx_can.h.

uint32_t ID_29

Extend ID, shoud be 29-bit value

Definition at line 770 of file lpc17xx_can.h.

The documentation for this struct was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_can.h
Generated on Tue Jun 7 15:00:04 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: EFF_GPR_Entry Struct Reference

  • Data Structures
  • Data Fields

EFF_GPR_Entry Struct Reference
[CAN Public Types]

Group of Extended ID Frame Format Entry structure. More...

#include <lpc17xx_can.h>

Data Fields

uint8_t | controller1
uint8_t | controller2
uint32_t | lowerEID
uint32_t | upperEID

Detailed Description

Group of Extended ID Frame Format Entry structure.

Definition at line 777 of file lpc17xx_can.h.

Field Documentation

uint8_t controller1

First CAN Controller, should be:

  • CAN1_CTRL: CAN1 Controller
  • CAN2_CTRL: CAN2 Controller

Definition at line 778 of file lpc17xx_can.h.

uint8_t controller2

Second Disable bit, should be:

  • MSG_ENABLE: disable bit = 0(default)
  • MSG_DISABLE: disable bit = 1

Definition at line 782 of file lpc17xx_can.h.

uint32_t lowerEID

Extended ID lower bound, should be 29-bit value

Definition at line 786 of file lpc17xx_can.h.

uint32_t upperEID

Extended ID upper bound, should be 29-bit value

Definition at line 787 of file lpc17xx_can.h.

The documentation for this struct was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_can.h
Generated on Tue Jun 7 15:00:04 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: EMAC_CFG_Type Struct Reference

  • Data Structures
  • Data Fields

EMAC_CFG_Type Struct Reference
[EMAC Public Types]

EMAC configuration structure definition. More...

#include <lpc17xx_emac.h>

Data Fields

uint32_t | Mode
uint8_t * | pbEMAC_Addr

Detailed Description

EMAC configuration structure definition.

Definition at line 637 of file lpc17xx_emac.h.

Field Documentation

uint32_t Mode

Supported EMAC PHY device speed, should be one of the following:

  • EMAC_MODE_AUTO
  • EMAC_MODE_10M_FULL
  • EMAC_MODE_10M_HALF
  • EMAC_MODE_100M_FULL
  • EMAC_MODE_100M_HALF

Definition at line 638 of file lpc17xx_emac.h.

uint8_t* pbEMAC_Addr

Pointer to EMAC Station address that contains 6-bytes of MAC address, it must be sorted in order (bEMAC_Addr[0]..[5])

Definition at line 645 of file lpc17xx_emac.h.

The documentation for this struct was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_emac.h
Generated on Tue Jun 7 15:00:04 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: EMAC_PACKETBUF_Type Struct Reference

  • Data Structures
  • Data Fields

EMAC_PACKETBUF_Type Struct Reference
[EMAC Public Types]

TX Data Buffer structure definition. More...

#include <lpc17xx_emac.h>

Data Fields

uint32_t | ulDataLen
uint32_t * | pbDataBuf

Detailed Description

TX Data Buffer structure definition.

Definition at line 629 of file lpc17xx_emac.h.

Field Documentation

uint32_t* pbDataBuf

A word-align data pointer to data buffer

Definition at line 631 of file lpc17xx_emac.h.

uint32_t ulDataLen

Data length

Definition at line 630 of file lpc17xx_emac.h.

The documentation for this struct was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_emac.h
Generated on Tue Jun 7 15:00:04 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: ethip_hdr Struct Reference

  • Data Structures
  • Data Fields

ethip_hdr Struct Reference
[uIP Address Resolution Protocol]

Data Fields

struct uip_eth_hdr | ethhdr
u8_t vhl
u8_t tos
u8_t | len [2]
u8_t | ipid [2]
u8_t | ipoffset [2]
u8_t ttl
u8_t proto
u16_t ipchksum
u16_t | srcipaddr [2]
u16_t | destipaddr [2]

Detailed Description

Definition at line 101 of file uip_arp.c.

Field Documentation

u16_t destipaddr[2]

Definition at line 112 of file uip_arp.c.

struct uip_eth_hdr ethhdr [read]

Definition at line 102 of file uip_arp.c.

u16_t ipchksum

Definition at line 111 of file uip_arp.c.

u8_t ipid[2]

Definition at line 104 of file uip_arp.c.

u8_t ipoffset[2]

Definition at line 104 of file uip_arp.c.

u8_t len[2]

Definition at line 104 of file uip_arp.c.

u8_t proto

Definition at line 104 of file uip_arp.c.

u16_t srcipaddr[2]

Definition at line 112 of file uip_arp.c.

u8_t tos

Definition at line 104 of file uip_arp.c.

u8_t ttl

Definition at line 104 of file uip_arp.c.

u8_t vhl

Definition at line 104 of file uip_arp.c.

The documentation for this struct was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/uip/uip_arp.c
Generated on Tue Jun 7 15:00:04 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: EXTI_InitTypeDef Struct Reference

  • Data Structures
  • Data Fields

EXTI_InitTypeDef Struct Reference
[EXTI Public Types]

EXTI Initialize structure. More...

#include <lpc17xx_exti.h>

Data Fields

EXTI_LINE_ENUM EXTI_Line
EXTI_MODE_ENUM EXTI_Mode
EXTI_POLARITY_ENUM EXTI_polarity

Detailed Description

EXTI Initialize structure.

Definition at line 102 of file lpc17xx_exti.h.

Field Documentation

EXTI_LINE_ENUM EXTI_Line

Select external interrupt pin (EINT0, EINT1, EINT 2, EINT3)

Definition at line 104 of file lpc17xx_exti.h.

EXTI_MODE_ENUM EXTI_Mode

Choose between Level-sensitivity or Edge sensitivity

Definition at line 106 of file lpc17xx_exti.h.

EXTI_POLARITY_ENUM EXTI_polarity

If EXTI mode is level-sensitive: this element use to select low or high active level if EXTI mode is polarity-sensitive: this element use to select falling or rising edge

Definition at line 108 of file lpc17xx_exti.h.

The documentation for this struct was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_exti.h
Generated on Tue Jun 7 15:00:04 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: FullCAN_Entry Struct Reference

  • Data Structures
  • Data Fields

FullCAN_Entry Struct Reference
[CAN Public Types]

FullCAN Entry structure. More...

#include <lpc17xx_can.h>

Data Fields

uint8_t | controller
uint8_t | disable
uint16_t | id_11

Detailed Description

FullCAN Entry structure.

Definition at line 709 of file lpc17xx_can.h.

Field Documentation

uint8_t controller

CAN Controller, should be:

  • CAN1_CTRL: CAN1 Controller
  • CAN2_CTRL: CAN2 Controller

Definition at line 710 of file lpc17xx_can.h.

uint8_t disable

Disable bit, should be:

  • MSG_ENABLE: disable bit = 0
  • MSG_DISABLE: disable bit = 1

Definition at line 714 of file lpc17xx_can.h.

uint16_t id_11

Standard ID, should be 11-bit value

Definition at line 718 of file lpc17xx_can.h.

The documentation for this struct was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_can.h
Generated on Tue Jun 7 15:00:04 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: fwcache_entry Struct Reference

  • Data Structures
  • Data Fields

fwcache_entry Struct Reference
[uIP packet forwarding]

Data Fields

u16_t timer
u16_t | srcipaddr [2]
u16_t | destipaddr [2]
u16_t ipid
u8_t proto
u8_t unused

Detailed Description

Definition at line 137 of file uip-fw.c.

Field Documentation

u16_t timer

Definition at line 138 of file uip-fw.c.

The documentation for this struct was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/uip/uip-fw.c
Generated on Tue Jun 7 15:00:04 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: GPDMA_Channel_CFG_Type Struct Reference

  • Data Structures
  • Data Fields

GPDMA_Channel_CFG_Type Struct Reference
[GPDMA Public Types]

GPDMA Channel configuration structure type definition. More...

#include <lpc17xx_gpdma.h>

Data Fields

uint32_t | ChannelNum
uint32_t | TransferSize
uint32_t | TransferWidth
uint32_t | SrcMemAddr
uint32_t | DstMemAddr
uint32_t | TransferType
uint32_t | SrcConn
uint32_t | DstConn
uint32_t | DMALLI

Detailed Description

GPDMA Channel configuration structure type definition.

Definition at line 317 of file lpc17xx_gpdma.h.

Field Documentation

uint32_t ChannelNum

DMA channel number, should be in range from 0 to 7. Note: DMA channel 0 has the highest priority and DMA channel 7 the lowest priority.

Definition at line 318 of file lpc17xx_gpdma.h.

uint32_t DMALLI

Linker List Item structure data address if there's no Linker List, set as '0'

Definition at line 375 of file lpc17xx_gpdma.h.

uint32_t DstConn

Peripheral Destination Connection type, used in case TransferType is chosen as GPDMA_TRANSFERTYPE_M2P or GPDMA_TRANSFERTYPE_P2P, should be one of following:

  • GPDMA_CONN_SSP0_Tx: SSP0, Tx
  • GPDMA_CONN_SSP0_Rx: SSP0, Rx
  • GPDMA_CONN_SSP1_Tx: SSP1, Tx
  • GPDMA_CONN_SSP1_Rx: SSP1, Rx
  • GPDMA_CONN_ADC: ADC
  • GPDMA_CONN_I2S_Channel_0: I2S Channel 0
  • GPDMA_CONN_I2S_Channel_1: I2S Channel 1
  • GPDMA_CONN_DAC: DAC
  • GPDMA_CONN_UART0_Tx_MAT0_0: UART0 Tx / MAT0.0
  • GPDMA_CONN_UART0_Rx_MAT0_1: UART0 Rx / MAT0.1
  • GPDMA_CONN_UART1_Tx_MAT1_0: UART1 Tx / MAT1.0
  • GPDMA_CONN_UART1_Rx_MAT1_1: UART1 Rx / MAT1.1
  • GPDMA_CONN_UART2_Tx_MAT2_0: UART2 Tx / MAT2.0
  • GPDMA_CONN_UART2_Rx_MAT2_1: UART2 Rx / MAT2.1
  • GPDMA_CONN_UART3_Tx_MAT3_0: UART3 Tx / MAT3.0
  • GPDMA_CONN_UART3_Rx_MAT3_1: UART3 Rx / MAT3.1

Definition at line 355 of file lpc17xx_gpdma.h.

uint32_t DstMemAddr

Physical Destination Address, used in case TransferType is chosen as GPDMA_TRANSFERTYPE_M2M or GPDMA_TRANSFERTYPE_P2M

Definition at line 327 of file lpc17xx_gpdma.h.

uint32_t SrcConn

Peripheral Source Connection type, used in case TransferType is chosen as GPDMA_TRANSFERTYPE_P2M or GPDMA_TRANSFERTYPE_P2P, should be one of following:

  • GPDMA_CONN_SSP0_Tx: SSP0, Tx
  • GPDMA_CONN_SSP0_Rx: SSP0, Rx
  • GPDMA_CONN_SSP1_Tx: SSP1, Tx
  • GPDMA_CONN_SSP1_Rx: SSP1, Rx
  • GPDMA_CONN_ADC: ADC
  • GPDMA_CONN_I2S_Channel_0: I2S Channel 0
  • GPDMA_CONN_I2S_Channel_1: I2S Channel 1
  • GPDMA_CONN_DAC: DAC
  • GPDMA_CONN_UART0_Tx_MAT0_0: UART0 Tx / MAT0.0
  • GPDMA_CONN_UART0_Rx_MAT0_1: UART0 Rx / MAT0.1
  • GPDMA_CONN_UART1_Tx_MAT1_0: UART1 Tx / MAT1.0
  • GPDMA_CONN_UART1_Rx_MAT1_1: UART1 Rx / MAT1.1
  • GPDMA_CONN_UART2_Tx_MAT2_0: UART2 Tx / MAT2.0
  • GPDMA_CONN_UART2_Rx_MAT2_1: UART2 Rx / MAT2.1
  • GPDMA_CONN_UART3_Tx_MAT3_0: UART3 Tx / MAT3.0
  • GPDMA_CONN_UART3_Rx_MAT3_1: UART3 Rx / MAT3.1

Definition at line 335 of file lpc17xx_gpdma.h.

uint32_t SrcMemAddr

Physical Source Address, used in case TransferType is chosen as GPDMA_TRANSFERTYPE_M2M or GPDMA_TRANSFERTYPE_M2P

Definition at line 325 of file lpc17xx_gpdma.h.

uint32_t TransferSize

Length/Size of transfer

Definition at line 323 of file lpc17xx_gpdma.h.

uint32_t TransferType

Transfer Type, should be one of the following:

  • GPDMA_TRANSFERTYPE_M2M: Memory to memory - DMA control
  • GPDMA_TRANSFERTYPE_M2P: Memory to peripheral - DMA control
  • GPDMA_TRANSFERTYPE_P2M: Peripheral to memory - DMA control
  • GPDMA_TRANSFERTYPE_P2P: Source peripheral to destination peripheral - DMA control

Definition at line 329 of file lpc17xx_gpdma.h.

uint32_t TransferWidth

Transfer width - used for TransferType is GPDMA_TRANSFERTYPE_M2M only

Definition at line 324 of file lpc17xx_gpdma.h.

The documentation for this struct was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_gpdma.h
Generated on Tue Jun 7 15:00:04 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: GPDMA_LLI_Type Struct Reference

  • Data Structures
  • Data Fields

GPDMA_LLI_Type Struct Reference
[GPDMA Public Types]

GPDMA Linker List Item structure type definition. More...

#include <lpc17xx_gpdma.h>

Data Fields

uint32_t | SrcAddr
uint32_t | DstAddr
uint32_t | NextLLI
uint32_t | Control

Detailed Description

GPDMA Linker List Item structure type definition.

Definition at line 383 of file lpc17xx_gpdma.h.

Field Documentation

uint32_t Control

GPDMA Control of this LLI

Definition at line 387 of file lpc17xx_gpdma.h.

uint32_t DstAddr

Destination address

Definition at line 385 of file lpc17xx_gpdma.h.

uint32_t NextLLI

Next LLI address, otherwise set to '0'

Definition at line 386 of file lpc17xx_gpdma.h.

uint32_t SrcAddr

Source Address

Definition at line 384 of file lpc17xx_gpdma.h.

The documentation for this struct was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_gpdma.h
Generated on Tue Jun 7 15:00:04 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: GPIO_Byte_TypeDef Struct Reference

  • Data Structures
  • Data Fields

GPIO_Byte_TypeDef Struct Reference
[GPIO Public Types]

Fast GPIO port byte type definition. More...

#include <lpc17xx_gpio.h>

Data Fields

__IO uint8_t | FIODIR [4]
uint32_t | RESERVED0 [3]
__IO uint8_t | FIOMASK [4]
__IO uint8_t | FIOPIN [4]
__IO uint8_t | FIOSET [4]
__O uint8_t | FIOCLR [4]

Detailed Description

Fast GPIO port byte type definition.

Definition at line 86 of file lpc17xx_gpio.h.

Field Documentation

__O uint8_t FIOCLR[4]

FIO clear register in byte-align

Definition at line 92 of file lpc17xx_gpio.h.

__IO uint8_t FIODIR[4]

FIO direction register in byte-align

Definition at line 87 of file lpc17xx_gpio.h.

__IO uint8_t FIOMASK[4]

FIO mask register in byte-align

Definition at line 89 of file lpc17xx_gpio.h.

__IO uint8_t FIOPIN[4]

FIO pin register in byte align

Definition at line 90 of file lpc17xx_gpio.h.

__IO uint8_t FIOSET[4]

FIO set register in byte-align

Definition at line 91 of file lpc17xx_gpio.h.

uint32_t RESERVED0[3]

Reserved

Definition at line 88 of file lpc17xx_gpio.h.

The documentation for this struct was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_gpio.h
Generated on Tue Jun 7 15:00:04 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: GPIO_HalfWord_TypeDef Struct Reference

  • Data Structures
  • Data Fields

GPIO_HalfWord_TypeDef Struct Reference
[GPIO Public Types]

Fast GPIO port half-word type definition. More...

#include <lpc17xx_gpio.h>

Data Fields

__IO uint16_t | FIODIRL
__IO uint16_t | FIODIRU
uint32_t | RESERVED0 [3]
__IO uint16_t | FIOMASKL
__IO uint16_t | FIOMASKU
__IO uint16_t | FIOPINL
__IO uint16_t | FIOPINU
__IO uint16_t | FIOSETL
__IO uint16_t | FIOSETU
__O uint16_t | FIOCLRL
__O uint16_t | FIOCLRU

Detailed Description

Fast GPIO port half-word type definition.

Definition at line 99 of file lpc17xx_gpio.h.

Field Documentation

__O uint16_t FIOCLRL

FIO clear register lower halfword part

Definition at line 109 of file lpc17xx_gpio.h.

__O uint16_t FIOCLRU

FIO clear register upper halfword part

Definition at line 110 of file lpc17xx_gpio.h.

__IO uint16_t FIODIRL

FIO direction register lower halfword part

Definition at line 100 of file lpc17xx_gpio.h.

__IO uint16_t FIODIRU

FIO direction register upper halfword part

Definition at line 101 of file lpc17xx_gpio.h.

__IO uint16_t FIOMASKL

FIO mask register lower halfword part

Definition at line 103 of file lpc17xx_gpio.h.

__IO uint16_t FIOMASKU

FIO mask register upper halfword part

Definition at line 104 of file lpc17xx_gpio.h.

__IO uint16_t FIOPINL

FIO pin register lower halfword part

Definition at line 105 of file lpc17xx_gpio.h.

__IO uint16_t FIOPINU

FIO pin register upper halfword part

Definition at line 106 of file lpc17xx_gpio.h.

__IO uint16_t FIOSETL

FIO set register lower halfword part

Definition at line 107 of file lpc17xx_gpio.h.

__IO uint16_t FIOSETU

FIO set register upper halfword part

Definition at line 108 of file lpc17xx_gpio.h.

uint32_t RESERVED0[3]

Reserved

Definition at line 102 of file lpc17xx_gpio.h.

The documentation for this struct was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_gpio.h
Generated on Tue Jun 7 15:00:04 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: hello_world_state Struct Reference

  • Data Structures
  • Data Fields

hello_world_state Struct Reference
[Hello, world]

#include <hello-world.h>

Data Fields

struct psock | p
char | inputbuffer [10]
char | name [40]

Detailed Description

Definition at line 40 of file hello-world.h.

Field Documentation

char inputbuffer[10]

Definition at line 42 of file hello-world.h.

char name[40]

Definition at line 43 of file hello-world.h.

struct psock p [read]

Definition at line 41 of file hello-world.h.

The documentation for this struct was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/hello-world/hello-world.h
Generated on Tue Jun 7 15:00:04 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: httpd_cgi_call Struct Reference

  • Data Structures
  • Data Fields

httpd_cgi_call Struct Reference
[Web server]

#include <httpd-cgi.h>

Data Fields

const char * | name
const httpd_cgifunction | function

Detailed Description

Definition at line 60 of file httpd-cgi.h.

Field Documentation

const httpd_cgifunction function

Definition at line 62 of file httpd-cgi.h.

const char* name

Definition at line 61 of file httpd-cgi.h.

The documentation for this struct was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/webserver/httpd-cgi.h
Generated on Tue Jun 7 15:00:04 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: httpd_fs_file Struct Reference

  • Data Structures
  • Data Fields

httpd_fs_file Struct Reference

#include <httpd-fs.h>

Data Fields

char * | data
int | len

Detailed Description

Definition at line 40 of file httpd-fs.h.

Field Documentation

char* data

Definition at line 41 of file httpd-fs.h.

int len

Definition at line 42 of file httpd-fs.h.

The documentation for this struct was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/webserver/httpd-fs.h
Generated on Tue Jun 7 15:00:04 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: httpd_fsdata_file Struct Reference

  • Data Structures
  • Data Fields

httpd_fsdata_file Struct Reference

#include <httpd-fsdata.h>

Data Fields

struct httpd_fsdata_file * | next
const char * | name
const char * | data
const int | len

Detailed Description

Definition at line 40 of file httpd-fsdata.h.

Field Documentation

const char* data

Definition at line 43 of file httpd-fsdata.h.

const int len

Definition at line 44 of file httpd-fsdata.h.

const char* name

Definition at line 42 of file httpd-fsdata.h.

struct httpd_fsdata_file* next [read]

Definition at line 41 of file httpd-fsdata.h.

The documentation for this struct was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/webserver/httpd-fsdata.h
Generated on Tue Jun 7 15:00:04 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: httpd_fsdata_file_noconst Struct Reference

  • Data Structures
  • Data Fields

httpd_fsdata_file_noconst Struct Reference

#include <httpd-fsdata.h>

Data Fields

struct httpd_fsdata_file * | next
char * | name
char * | data
int | len

Detailed Description

Definition at line 52 of file httpd-fsdata.h.

Field Documentation

char* data

Definition at line 55 of file httpd-fsdata.h.

int len

Definition at line 56 of file httpd-fsdata.h.

char* name

Definition at line 54 of file httpd-fsdata.h.

struct httpd_fsdata_file* next [read]

Definition at line 53 of file httpd-fsdata.h.

The documentation for this struct was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/webserver/httpd-fsdata.h
Generated on Tue Jun 7 15:00:04 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: httpd_state Struct Reference

  • Data Structures
  • Data Fields

httpd_state Struct Reference

#include <httpd.h>

Data Fields

unsigned char | timer
struct psock sin | sout
struct pt outputpt | scriptpt
char | inputbuf [50]
char | filename [20]
char | state
struct httpd_fs_file | file
int | len
char * | scriptptr
int | scriptlen
unsigned short | count

Detailed Description

Definition at line 41 of file httpd.h.

Field Documentation

unsigned short count

Definition at line 53 of file httpd.h.

struct httpd_fs_file file [read]

Definition at line 48 of file httpd.h.

char filename[20]

Definition at line 46 of file httpd.h.

char inputbuf[50]

Definition at line 45 of file httpd.h.

int len

Definition at line 49 of file httpd.h.

int scriptlen

Definition at line 51 of file httpd.h.

struct pt outputpt scriptpt [read]

Definition at line 44 of file httpd.h.

char* scriptptr

Definition at line 50 of file httpd.h.

struct psock sin sout [read]

Definition at line 43 of file httpd.h.

char state

Definition at line 47 of file httpd.h.

unsigned char timer

Definition at line 42 of file httpd.h.

The documentation for this struct was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/webserver/httpd.h
Generated on Tue Jun 7 15:00:05 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: I2C_CFG_T Struct Reference

  • Data Structures
  • Data Fields

I2C_CFG_T Struct Reference
[I2C Private Types]

I2C device configuration structure type. More...

Data Fields

uint32_t | txrx_setup
int32_t | dir

Detailed Description

I2C device configuration structure type.

Definition at line 60 of file lpc17xx_i2c.c.

Field Documentation

int32_t dir

Definition at line 63 of file lpc17xx_i2c.c.

uint32_t txrx_setup

Definition at line 62 of file lpc17xx_i2c.c.

The documentation for this struct was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Drivers/source/lpc17xx_i2c.c
Generated on Tue Jun 7 15:00:05 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: I2C_M_SETUP_Type Struct Reference

  • Data Structures
  • Data Fields

I2C_M_SETUP_Type Struct Reference
[I2C Public Types]

Master transfer setup data structure definitions. More...

#include <lpc17xx_i2c.h>

Data Fields

uint32_t | sl_addr7bit
uint8_t * | tx_data
uint32_t | tx_length
uint32_t | tx_count
uint8_t * | rx_data
uint32_t | rx_length
uint32_t | rx_count
uint32_t | retransmissions_max
uint32_t | retransmissions_count
uint32_t | status
void(* | callback )(void)

Detailed Description

Master transfer setup data structure definitions.

Definition at line 283 of file lpc17xx_i2c.h.

Field Documentation

void(* callback)(void)

Pointer to Call back function when transmission complete used in interrupt transfer mode

uint32_t retransmissions_count

Current Re-Transmission counter

Definition at line 297 of file lpc17xx_i2c.h.

uint32_t retransmissions_max

Max Re-Transmission value

Definition at line 296 of file lpc17xx_i2c.h.

uint32_t rx_count

Current Receive data counter

Definition at line 295 of file lpc17xx_i2c.h.

uint8_t* rx_data

Pointer to Receive data - NULL if data receive is not used

Definition at line 291 of file lpc17xx_i2c.h.

uint32_t rx_length

Receive data length - 0 if data receive is not used

Definition at line 293 of file lpc17xx_i2c.h.

uint32_t sl_addr7bit

Slave address in 7bit mode

Definition at line 285 of file lpc17xx_i2c.h.

uint32_t status

Current status of I2C activity

Definition at line 298 of file lpc17xx_i2c.h.

uint32_t tx_count

Current Transmit data counter

Definition at line 290 of file lpc17xx_i2c.h.

uint8_t* tx_data

Pointer to Transmit data - NULL if data transmit is not used

Definition at line 286 of file lpc17xx_i2c.h.

uint32_t tx_length

Transmit data length - 0 if data transmit is not used

Definition at line 288 of file lpc17xx_i2c.h.

The documentation for this struct was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_i2c.h
Generated on Tue Jun 7 15:00:05 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: I2C_OWNSLAVEADDR_CFG_Type Struct Reference

  • Data Structures
  • Data Fields

I2C_OWNSLAVEADDR_CFG_Type Struct Reference
[I2C Public Types]

I2C Own slave address setting structure. More...

#include <lpc17xx_i2c.h>

Data Fields

uint8_t | SlaveAddrChannel
uint8_t | SlaveAddr_7bit
uint8_t | GeneralCallState
uint8_t | SlaveAddrMaskValue

Detailed Description

I2C Own slave address setting structure.

Definition at line 259 of file lpc17xx_i2c.h.

Field Documentation

uint8_t GeneralCallState

Enable/Disable General Call Functionality when I2C control being in Slave mode, should be:

  • ENABLE: Enable General Call function.
  • DISABLE: Disable General Call function.

Definition at line 264 of file lpc17xx_i2c.h.

uint8_t SlaveAddr_7bit

Value of 7-bit slave address

Definition at line 263 of file lpc17xx_i2c.h.

uint8_t SlaveAddrChannel

Slave Address channel in I2C control, should be in range from 0..3

Definition at line 260 of file lpc17xx_i2c.h.

uint8_t SlaveAddrMaskValue

Any bit in this 8-bit value (bit 7:1) which is set to '1' will cause an automatic compare on the corresponding bit of the received address when it is compared to the SlaveAddr_7bit value associated with this mask register. In other words, bits in SlaveAddr_7bit value which are masked are not taken into account in determining an address match

Definition at line 269 of file lpc17xx_i2c.h.

The documentation for this struct was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_i2c.h
Generated on Tue Jun 7 15:00:05 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: I2C_S_SETUP_Type Struct Reference

  • Data Structures
  • Data Fields

I2C_S_SETUP_Type Struct Reference
[I2C Public Types]

Slave transfer setup data structure definitions. More...

#include <lpc17xx_i2c.h>

Data Fields

uint8_t * | tx_data
uint32_t | tx_length
uint32_t | tx_count
uint8_t * | rx_data
uint32_t | rx_length
uint32_t | rx_count
uint32_t | status
void(* | callback )(void)

Detailed Description

Slave transfer setup data structure definitions.

Definition at line 307 of file lpc17xx_i2c.h.

Field Documentation

void(* callback)(void)

uint32_t rx_count

Definition at line 314 of file lpc17xx_i2c.h.

uint8_t* rx_data

Definition at line 312 of file lpc17xx_i2c.h.

uint32_t rx_length

Definition at line 313 of file lpc17xx_i2c.h.

uint32_t status

Definition at line 315 of file lpc17xx_i2c.h.

uint32_t tx_count

Definition at line 311 of file lpc17xx_i2c.h.

uint8_t* tx_data

Definition at line 309 of file lpc17xx_i2c.h.

uint32_t tx_length

Definition at line 310 of file lpc17xx_i2c.h.

The documentation for this struct was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_i2c.h
Generated on Tue Jun 7 15:00:05 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: I2S_CFG_Type Struct Reference

  • Data Structures
  • Data Fields

I2S_CFG_Type Struct Reference
[I2S Public Types]

I2S configuration structure definition. More...

#include <lpc17xx_i2s.h>

Data Fields

uint8_t | wordwidth
uint8_t | mono
uint8_t | stop
uint8_t | reset
uint8_t | ws_sel
uint8_t | mute
uint8_t | Reserved0 [2]

Detailed Description

I2S configuration structure definition.

Definition at line 273 of file lpc17xx_i2s.h.

Field Documentation

uint8_t mono

the number of bytes in data as follow: -I2S_WORDWIDTH_8: 8 bit data -I2S_WORDWIDTH_16: 16 bit data -I2S_WORDWIDTH_32: 32 bit data

Definition at line 278 of file lpc17xx_i2s.h.

uint8_t mute

Set Master/Slave mode, should be:

  • I2S_MASTER_MODE: I2S master mode
  • I2S_SLAVE_MODE: I2S slave mode

Definition at line 290 of file lpc17xx_i2s.h.

uint8_t Reserved0[2]

MUTE mode: when true, the transmit channel sends only zeroes, shoule be:

  • I2S_MUTE_ENABLE: enable mute mode
  • I2S_MUTE_DISABLE: disable mute mode

Definition at line 293 of file lpc17xx_i2s.h.

uint8_t reset

Disables accesses on FIFOs, should be:

  • I2S_STOP_ENABLE: enable stop mode
  • I2S_STOP_DISABLE: disable stop mode

Definition at line 284 of file lpc17xx_i2s.h.

uint8_t stop

Set mono/stereo mode, should be:

  • I2S_STEREO: stereo mode
  • I2S_MONO: mono mode

Definition at line 281 of file lpc17xx_i2s.h.

uint8_t wordwidth

Definition at line 274 of file lpc17xx_i2s.h.

uint8_t ws_sel

Asynchronously reset tje transmit channel and FIFO, should be:

  • I2S_RESET_ENABLE: enable reset mode
  • I2S_RESET_DISABLE: disable reset mode

Definition at line 287 of file lpc17xx_i2s.h.

The documentation for this struct was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_i2s.h
Generated on Tue Jun 7 15:00:05 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: I2S_DMAConf_Type Struct Reference

  • Data Structures
  • Data Fields

I2S_DMAConf_Type Struct Reference
[I2S Public Types]

I2S DMA configuration structure definition. More...

#include <lpc17xx_i2s.h>

Data Fields

uint8_t | DMAIndex
uint8_t | depth
uint8_t | Reserved0 [2]

Detailed Description

I2S DMA configuration structure definition.

Definition at line 299 of file lpc17xx_i2s.h.

Field Documentation

uint8_t depth

Select DMA1 or DMA2, should be:

  • I2S_DMA_1: DMA1
  • I2S_DMA_2: DMA2

Definition at line 303 of file lpc17xx_i2s.h.

uint8_t DMAIndex

Definition at line 300 of file lpc17xx_i2s.h.

uint8_t Reserved0[2]

FIFO level that triggers a DMA request

Definition at line 304 of file lpc17xx_i2s.h.

The documentation for this struct was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_i2s.h
Generated on Tue Jun 7 15:00:05 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: I2S_MODEConf_Type Struct Reference

  • Data Structures
  • Data Fields

I2S_MODEConf_Type Struct Reference
[I2S Public Types]

I2S mode configuration structure definition. More...

#include <lpc17xx_i2s.h>

Data Fields

uint8_t | clksel
uint8_t | fpin
uint8_t | mcena
uint8_t | Reserved

Detailed Description

I2S mode configuration structure definition.

Definition at line 310 of file lpc17xx_i2s.h.

Field Documentation

uint8_t clksel

Definition at line 311 of file lpc17xx_i2s.h.

uint8_t fpin

Clock source selection, should be:

  • I2S_CLKSEL_FRDCLK: Select the fractional rate divider clock output
  • I2S_CLKSEL_MCLK: Select the MCLK signal as the clock source

Definition at line 314 of file lpc17xx_i2s.h.

uint8_t mcena

Select four pin mode, should be:

  • I2S_4PIN_ENABLE: 4-pin enable
  • I2S_4PIN_DISABLE: 4-pin disable

Definition at line 317 of file lpc17xx_i2s.h.

uint8_t Reserved

Select MCLK mode, should be:

  • I2S_MCLK_ENABLE: MCLK enable for output
  • I2S_MCLK_DISABLE: MCLK disable for output

Definition at line 320 of file lpc17xx_i2s.h.

The documentation for this struct was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_i2s.h
Generated on Tue Jun 7 15:00:05 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: icmpip_hdr Struct Reference

  • Data Structures
  • Data Fields

icmpip_hdr Struct Reference
[uIP packet forwarding]

Data Fields

u8_t vhl
u8_t tos
u8_t | len [2]
u8_t | ipid [2]
u8_t | ipoffset [2]
u8_t ttl
u8_t proto
u16_t ipchksum
u16_t | srcipaddr [2]
u16_t | destipaddr [2]
u8_t type
u8_t icode
u16_t icmpchksum
u16_t id
u16_t seqno
u8_t | payload [1]

Detailed Description

Definition at line 98 of file uip-fw.c.

Field Documentation

u8_t ipid[2]

Definition at line 100 of file uip-fw.c.

u8_t ipoffset[2]

Definition at line 100 of file uip-fw.c.

u8_t len[2]

Definition at line 100 of file uip-fw.c.

u8_t proto

Definition at line 100 of file uip-fw.c.

u8_t tos

Definition at line 100 of file uip-fw.c.

u8_t ttl

Definition at line 100 of file uip-fw.c.

u8_t vhl

Definition at line 100 of file uip-fw.c.

The documentation for this struct was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/uip/uip-fw.c
Generated on Tue Jun 7 15:00:05 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: InterruptType_Type Struct Reference

  • Data Structures
  • Data Fields

InterruptType_Type Struct Reference
[CMSIS Interrupt Type]

Structure type to access the Interrupt Type Register. More...

#include <core_cm3.h>

Data Fields

uint32_t | RESERVED0
__I uint32_t | ICTR
uint32_t | RESERVED1

Detailed Description

Structure type to access the Interrupt Type Register.

Definition at line 606 of file core_cm3.h.

Field Documentation

__I uint32_t ICTR

Offset: 0x004 (R/ ) Interrupt Control Type Register

Definition at line 609 of file core_cm3.h.

uint32_t RESERVED0

Definition at line 608 of file core_cm3.h.

uint32_t RESERVED1

Definition at line 613 of file core_cm3.h.

The documentation for this struct was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Core/CM3/CoreSupport/core_cm3.h
Generated on Tue Jun 7 15:00:05 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: IPSR_Type Union Reference

  • Data Structures
  • Data Fields

IPSR_Type Union Reference
[CMSIS Core]

Union type to access the Interrupt Program Status Register (IPSR). More...

#include <core_cm3.h>

Data Fields

struct {
uint32_t ISR:9
uint32_t _reserved0:23
} b
uint32_t w

Detailed Description

Union type to access the Interrupt Program Status Register (IPSR).

Definition at line 153 of file core_cm3.h.

Field Documentation

uint32_t _reserved0

bit: 9..31 Reserved

Definition at line 158 of file core_cm3.h.

struct { ... } b

Structure used for bit access

uint32_t ISR

bit: 0.. 8 Exception number

Definition at line 157 of file core_cm3.h.

uint32_t w

Type used for word access

Definition at line 160 of file core_cm3.h.

The documentation for this union was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Core/CM3/CoreSupport/core_cm3.h
Generated on Tue Jun 7 15:00:05 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: ITM_Type Struct Reference

  • Data Structures
  • Data Fields

ITM_Type Struct Reference
[CMSIS ITM]

Structure type to access the Instrumentation Trace Macrocell Register (ITM). More...

#include <core_cm3.h>

Data Fields

union {
__O uint8_t u8
__O uint16_t u16
__O uint32_t u32
} PORT [32]
uint32_t | RESERVED0 [864]
__IO uint32_t | TER
uint32_t | RESERVED1 [15]
__IO uint32_t | TPR
uint32_t | RESERVED2 [15]
__IO uint32_t | TCR
uint32_t | RESERVED3 [29]
__IO uint32_t | IWR
__IO uint32_t | IRR
__IO uint32_t | IMCR
uint32_t | RESERVED4 [43]
__IO uint32_t | LAR
__IO uint32_t | LSR
uint32_t | RESERVED5 [6]
__I uint32_t | PID4
__I uint32_t | PID5
__I uint32_t | PID6
__I uint32_t | PID7
__I uint32_t | PID0
__I uint32_t | PID1
__I uint32_t | PID2
__I uint32_t | PID3
__I uint32_t | CID0
__I uint32_t | CID1
__I uint32_t | CID2
__I uint32_t | CID3

Detailed Description

Structure type to access the Instrumentation Trace Macrocell Register (ITM).

Definition at line 508 of file core_cm3.h.

Field Documentation

__I uint32_t CID0

Offset: (R/ ) ITM Component Identification Register #0

Definition at line 538 of file core_cm3.h.

__I uint32_t CID1

Offset: (R/ ) ITM Component Identification Register #1

Definition at line 539 of file core_cm3.h.

__I uint32_t CID2

Offset: (R/ ) ITM Component Identification Register #2

Definition at line 540 of file core_cm3.h.

__I uint32_t CID3

Offset: (R/ ) ITM Component Identification Register #3

Definition at line 541 of file core_cm3.h.

__IO uint32_t IMCR

Offset: (R/W) ITM Integration Mode Control Register

Definition at line 525 of file core_cm3.h.

__IO uint32_t IRR

Offset: (R/W) ITM Integration Read Register

Definition at line 524 of file core_cm3.h.

__IO uint32_t IWR

Offset: (R/W) ITM Integration Write Register

Definition at line 523 of file core_cm3.h.

__IO uint32_t LAR

Offset: (R/W) ITM Lock Access Register

Definition at line 527 of file core_cm3.h.

__IO uint32_t LSR

Offset: (R/W) ITM Lock Status Register

Definition at line 528 of file core_cm3.h.

__I uint32_t PID0

Offset: (R/ ) ITM Peripheral Identification Register #0

Definition at line 534 of file core_cm3.h.

__I uint32_t PID1

Offset: (R/ ) ITM Peripheral Identification Register #1

Definition at line 535 of file core_cm3.h.

__I uint32_t PID2

Offset: (R/ ) ITM Peripheral Identification Register #2

Definition at line 536 of file core_cm3.h.

__I uint32_t PID3

Offset: (R/ ) ITM Peripheral Identification Register #3

Definition at line 537 of file core_cm3.h.

__I uint32_t PID4

Offset: (R/ ) ITM Peripheral Identification Register #4

Definition at line 530 of file core_cm3.h.

__I uint32_t PID5

Offset: (R/ ) ITM Peripheral Identification Register #5

Definition at line 531 of file core_cm3.h.

__I uint32_t PID6

Offset: (R/ ) ITM Peripheral Identification Register #6

Definition at line 532 of file core_cm3.h.

__I uint32_t PID7

Offset: (R/ ) ITM Peripheral Identification Register #7

Definition at line 533 of file core_cm3.h.

__O { ... } PORT[32]

Offset: 0x000 ( /W) ITM Stimulus Port Registers

uint32_t RESERVED0[864]

Definition at line 516 of file core_cm3.h.

uint32_t RESERVED1[15]

Definition at line 518 of file core_cm3.h.

uint32_t RESERVED2[15]

Definition at line 520 of file core_cm3.h.

uint32_t RESERVED3[29]

Definition at line 522 of file core_cm3.h.

uint32_t RESERVED4[43]

Definition at line 526 of file core_cm3.h.

uint32_t RESERVED5[6]

Definition at line 529 of file core_cm3.h.

__IO uint32_t TCR

Offset: (R/W) ITM Trace Control Register

Definition at line 521 of file core_cm3.h.

__IO uint32_t TER

Offset: (R/W) ITM Trace Enable Register

Definition at line 517 of file core_cm3.h.

__IO uint32_t TPR

Offset: (R/W) ITM Trace Privilege Register

Definition at line 519 of file core_cm3.h.

__O uint16_t u16

Offset: 0x000 ( /W) ITM Stimulus Port 16-bit

Definition at line 513 of file core_cm3.h.

__O uint32_t u32

Offset: 0x000 ( /W) ITM Stimulus Port 32-bit

Definition at line 514 of file core_cm3.h.

__O uint8_t u8

Offset: 0x000 ( /W) ITM Stimulus Port 8-bit

Definition at line 512 of file core_cm3.h.

The documentation for this struct was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Core/CM3/CoreSupport/core_cm3.h
Generated on Tue Jun 7 15:00:05 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: LPC_ADC_TypeDef Struct Reference

  • Data Structures
  • Data Fields

LPC_ADC_TypeDef Struct Reference
[LPC17xx System]

Analog-to-Digital Converter (ADC) register structure definition. More...

#include <LPC17xx.h>

Data Fields

__IO uint32_t | ADCR
__IO uint32_t | ADGDR
uint32_t | RESERVED0
__IO uint32_t | ADINTEN
__I uint32_t | ADDR0
__I uint32_t | ADDR1
__I uint32_t | ADDR2
__I uint32_t | ADDR3
__I uint32_t | ADDR4
__I uint32_t | ADDR5
__I uint32_t | ADDR6
__I uint32_t | ADDR7
__I uint32_t | ADSTAT
__IO uint32_t | ADTRM

Detailed Description

Analog-to-Digital Converter (ADC) register structure definition.

Definition at line 596 of file LPC17xx.h.

Field Documentation

__IO uint32_t ADCR

Definition at line 598 of file LPC17xx.h.

__I uint32_t ADDR0

Definition at line 602 of file LPC17xx.h.

__I uint32_t ADDR1

Definition at line 603 of file LPC17xx.h.

__I uint32_t ADDR2

Definition at line 604 of file LPC17xx.h.

__I uint32_t ADDR3

Definition at line 605 of file LPC17xx.h.

__I uint32_t ADDR4

Definition at line 606 of file LPC17xx.h.

__I uint32_t ADDR5

Definition at line 607 of file LPC17xx.h.

__I uint32_t ADDR6

Definition at line 608 of file LPC17xx.h.

__I uint32_t ADDR7

Definition at line 609 of file LPC17xx.h.

__IO uint32_t ADGDR

Definition at line 599 of file LPC17xx.h.

__IO uint32_t ADINTEN

Definition at line 601 of file LPC17xx.h.

__I uint32_t ADSTAT

Definition at line 610 of file LPC17xx.h.

__IO uint32_t ADTRM

Definition at line 611 of file LPC17xx.h.

uint32_t RESERVED0

Definition at line 600 of file LPC17xx.h.

The documentation for this struct was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Core/CM3/DeviceSupport/NXP/LPC17xx/LPC17xx.h
Generated on Tue Jun 7 15:00:05 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: LPC_CAN_TypeDef Struct Reference

  • Data Structures
  • Data Fields

LPC_CAN_TypeDef Struct Reference
[LPC17xx System]

Controller Area Network Controller (CAN) register structure definition. More...

#include <LPC17xx.h>

Data Fields

__IO uint32_t | MOD
__O uint32_t | CMR
__IO uint32_t | GSR
__I uint32_t | ICR
__IO uint32_t | IER
__IO uint32_t | BTR
__IO uint32_t | EWL
__I uint32_t | SR
__IO uint32_t | RFS
__IO uint32_t | RID
__IO uint32_t | RDA
__IO uint32_t | RDB
__IO uint32_t | TFI1
__IO uint32_t | TID1
__IO uint32_t | TDA1
__IO uint32_t | TDB1
__IO uint32_t | TFI2
__IO uint32_t | TID2
__IO uint32_t | TDA2
__IO uint32_t | TDB2
__IO uint32_t | TFI3
__IO uint32_t | TID3
__IO uint32_t | TDA3
__IO uint32_t | TDB3

Detailed Description

Controller Area Network Controller (CAN) register structure definition.

Definition at line 720 of file LPC17xx.h.

Field Documentation

__IO uint32_t BTR

Definition at line 727 of file LPC17xx.h.

__O uint32_t CMR

Definition at line 723 of file LPC17xx.h.

__IO uint32_t EWL

Definition at line 728 of file LPC17xx.h.

__IO uint32_t GSR

Definition at line 724 of file LPC17xx.h.

__I uint32_t ICR

Definition at line 725 of file LPC17xx.h.

__IO uint32_t IER

Definition at line 726 of file LPC17xx.h.

__IO uint32_t MOD

Definition at line 722 of file LPC17xx.h.

__IO uint32_t RDA

Definition at line 732 of file LPC17xx.h.

__IO uint32_t RDB

Definition at line 733 of file LPC17xx.h.

__IO uint32_t RFS

Definition at line 730 of file LPC17xx.h.

__IO uint32_t RID

Definition at line 731 of file LPC17xx.h.

__I uint32_t SR

Definition at line 729 of file LPC17xx.h.

__IO uint32_t TDA1

Definition at line 736 of file LPC17xx.h.

__IO uint32_t TDA2

Definition at line 740 of file LPC17xx.h.

__IO uint32_t TDA3

Definition at line 744 of file LPC17xx.h.

__IO uint32_t TDB1

Definition at line 737 of file LPC17xx.h.

__IO uint32_t TDB2

Definition at line 741 of file LPC17xx.h.

__IO uint32_t TDB3

Definition at line 745 of file LPC17xx.h.

__IO uint32_t TFI1

Definition at line 734 of file LPC17xx.h.

__IO uint32_t TFI2

Definition at line 738 of file LPC17xx.h.

__IO uint32_t TFI3

Definition at line 742 of file LPC17xx.h.

__IO uint32_t TID1

Definition at line 735 of file LPC17xx.h.

__IO uint32_t TID2

Definition at line 739 of file LPC17xx.h.

__IO uint32_t TID3

Definition at line 743 of file LPC17xx.h.

The documentation for this struct was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Core/CM3/DeviceSupport/NXP/LPC17xx/LPC17xx.h
Generated on Tue Jun 7 15:00:06 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: LPC_CANAF_RAM_TypeDef Struct Reference

  • Data Structures
  • Data Fields

LPC_CANAF_RAM_TypeDef Struct Reference
[LPC17xx System]

Controller Area Network Acceptance Filter RAM (CANAF_RAM)structure definition. More...

#include <LPC17xx.h>

Data Fields

__IO uint32_t mask [512]

Detailed Description

Controller Area Network Acceptance Filter RAM (CANAF_RAM)structure definition.

Definition at line 690 of file LPC17xx.h.

Field Documentation

__IO uint32_t mask[512]

Definition at line 692 of file LPC17xx.h.

The documentation for this struct was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Core/CM3/DeviceSupport/NXP/LPC17xx/LPC17xx.h
Generated on Tue Jun 7 15:00:06 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: LPC_CANAF_TypeDef Struct Reference

  • Data Structures
  • Data Fields

LPC_CANAF_TypeDef Struct Reference
[LPC17xx System]

Controller Area Network Acceptance Filter(CANAF) register structure definition. More...

#include <LPC17xx.h>

Data Fields

__IO uint32_t | AFMR
__IO uint32_t | SFF_sa
__IO uint32_t | SFF_GRP_sa
__IO uint32_t | EFF_sa
__IO uint32_t | EFF_GRP_sa
__IO uint32_t | ENDofTable
__I uint32_t | LUTerrAd
__I uint32_t | LUTerr
__IO uint32_t | FCANIE
__IO uint32_t | FCANIC0
__IO uint32_t | FCANIC1

Detailed Description

Controller Area Network Acceptance Filter(CANAF) register structure definition.

Definition at line 696 of file LPC17xx.h.

Field Documentation

__IO uint32_t AFMR

Definition at line 698 of file LPC17xx.h.

__IO uint32_t EFF_GRP_sa

Definition at line 702 of file LPC17xx.h.

__IO uint32_t EFF_sa

Definition at line 701 of file LPC17xx.h.

__IO uint32_t ENDofTable

Definition at line 703 of file LPC17xx.h.

__IO uint32_t FCANIC0

Definition at line 707 of file LPC17xx.h.

__IO uint32_t FCANIC1

Definition at line 708 of file LPC17xx.h.

__IO uint32_t FCANIE

Definition at line 706 of file LPC17xx.h.

__I uint32_t LUTerr

Definition at line 705 of file LPC17xx.h.

__I uint32_t LUTerrAd

Definition at line 704 of file LPC17xx.h.

__IO uint32_t SFF_GRP_sa

Definition at line 700 of file LPC17xx.h.

__IO uint32_t SFF_sa

Definition at line 699 of file LPC17xx.h.

The documentation for this struct was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Core/CM3/DeviceSupport/NXP/LPC17xx/LPC17xx.h
Generated on Tue Jun 7 15:00:06 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: LPC_CANCR_TypeDef Struct Reference

  • Data Structures
  • Data Fields

LPC_CANCR_TypeDef Struct Reference
[LPC17xx System]

Controller Area Network Central (CANCR) register structure definition. More...

#include <LPC17xx.h>

Data Fields

__I uint32_t | CANTxSR
__I uint32_t | CANRxSR
__I uint32_t | CANMSR

Detailed Description

Controller Area Network Central (CANCR) register structure definition.

Definition at line 712 of file LPC17xx.h.

Field Documentation

__I uint32_t CANMSR

Definition at line 716 of file LPC17xx.h.

__I uint32_t CANRxSR

Definition at line 715 of file LPC17xx.h.

__I uint32_t CANTxSR

Definition at line 714 of file LPC17xx.h.

The documentation for this struct was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Core/CM3/DeviceSupport/NXP/LPC17xx/LPC17xx.h
Generated on Tue Jun 7 15:00:06 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: LPC_DAC_TypeDef Struct Reference

  • Data Structures
  • Data Fields

LPC_DAC_TypeDef Struct Reference
[LPC17xx System]

Digital-to-Analog Converter (DAC) register structure definition. More...

#include <LPC17xx.h>

Data Fields

__IO uint32_t | DACR
__IO uint32_t | DACCTRL
__IO uint16_t | DACCNTVAL

Detailed Description

Digital-to-Analog Converter (DAC) register structure definition.

Definition at line 616 of file LPC17xx.h.

Field Documentation

__IO uint16_t DACCNTVAL

Definition at line 620 of file LPC17xx.h.

__IO uint32_t DACCTRL

Definition at line 619 of file LPC17xx.h.

__IO uint32_t DACR

Definition at line 618 of file LPC17xx.h.

The documentation for this struct was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Core/CM3/DeviceSupport/NXP/LPC17xx/LPC17xx.h
Generated on Tue Jun 7 15:00:06 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: LPC_EMAC_TypeDef Struct Reference

  • Data Structures
  • Data Fields

LPC_EMAC_TypeDef Struct Reference
[LPC17xx System]

Ethernet Media Access Controller (EMAC) register structure definition. More...

#include <LPC17xx.h>

Data Fields

__IO uint32_t | MAC1
__IO uint32_t | MAC2
__IO uint32_t | IPGT
__IO uint32_t | IPGR
__IO uint32_t | CLRT
__IO uint32_t | MAXF
__IO uint32_t | SUPP
__IO uint32_t | TEST
__IO uint32_t | MCFG
__IO uint32_t | MCMD
__IO uint32_t | MADR
__O uint32_t | MWTD
__I uint32_t | MRDD
__I uint32_t | MIND
uint32_t | RESERVED0 [2]
__IO uint32_t | SA0
__IO uint32_t | SA1
__IO uint32_t | SA2
uint32_t | RESERVED1 [45]
__IO uint32_t | Command
__I uint32_t | Status
__IO uint32_t | RxDescriptor
__IO uint32_t | RxStatus
__IO uint32_t | RxDescriptorNumber
__I uint32_t | RxProduceIndex
__IO uint32_t | RxConsumeIndex
__IO uint32_t | TxDescriptor
__IO uint32_t | TxStatus
__IO uint32_t | TxDescriptorNumber
__IO uint32_t | TxProduceIndex
__I uint32_t | TxConsumeIndex
uint32_t | RESERVED2 [10]
__I uint32_t | TSV0
__I uint32_t | TSV1
__I uint32_t | RSV
uint32_t | RESERVED3 [3]
__IO uint32_t | FlowControlCounter
__I uint32_t | FlowControlStatus
uint32_t | RESERVED4 [34]
__IO uint32_t | RxFilterCtrl
__IO uint32_t | RxFilterWoLStatus
__IO uint32_t | RxFilterWoLClear
uint32_t | RESERVED5
__IO uint32_t | HashFilterL
__IO uint32_t | HashFilterH
uint32_t | RESERVED6 [882]
__I uint32_t | IntStatus
__IO uint32_t | IntEnable
__O uint32_t | IntClear
__O uint32_t | IntSet
uint32_t | RESERVED7
__IO uint32_t | PowerDown
uint32_t | RESERVED8
__IO uint32_t | Module_ID

Detailed Description

Ethernet Media Access Controller (EMAC) register structure definition.

Definition at line 885 of file LPC17xx.h.

Field Documentation

__IO uint32_t CLRT

Definition at line 891 of file LPC17xx.h.

__IO uint32_t Command

Definition at line 906 of file LPC17xx.h.

__IO uint32_t FlowControlCounter

Definition at line 923 of file LPC17xx.h.

__I uint32_t FlowControlStatus

Definition at line 924 of file LPC17xx.h.

__IO uint32_t HashFilterH

Definition at line 931 of file LPC17xx.h.

__IO uint32_t HashFilterL

Definition at line 930 of file LPC17xx.h.

__O uint32_t IntClear

Definition at line 935 of file LPC17xx.h.

__IO uint32_t IntEnable

Definition at line 934 of file LPC17xx.h.

__O uint32_t IntSet

Definition at line 936 of file LPC17xx.h.

__I uint32_t IntStatus

Definition at line 933 of file LPC17xx.h.

__IO uint32_t IPGR

Definition at line 890 of file LPC17xx.h.

__IO uint32_t IPGT

Definition at line 889 of file LPC17xx.h.

__IO uint32_t MAC1

Definition at line 887 of file LPC17xx.h.

__IO uint32_t MAC2

Definition at line 888 of file LPC17xx.h.

__IO uint32_t MADR

Definition at line 897 of file LPC17xx.h.

__IO uint32_t MAXF

Definition at line 892 of file LPC17xx.h.

__IO uint32_t MCFG

Definition at line 895 of file LPC17xx.h.

__IO uint32_t MCMD

Definition at line 896 of file LPC17xx.h.

__I uint32_t MIND

Definition at line 900 of file LPC17xx.h.

__IO uint32_t Module_ID

Definition at line 940 of file LPC17xx.h.

__I uint32_t MRDD

Definition at line 899 of file LPC17xx.h.

__O uint32_t MWTD

Definition at line 898 of file LPC17xx.h.

__IO uint32_t PowerDown

Definition at line 938 of file LPC17xx.h.

uint32_t RESERVED0[2]

Definition at line 901 of file LPC17xx.h.

uint32_t RESERVED1[45]

Definition at line 905 of file LPC17xx.h.

uint32_t RESERVED2[10]

Definition at line 918 of file LPC17xx.h.

uint32_t RESERVED3[3]

Definition at line 922 of file LPC17xx.h.

uint32_t RESERVED4[34]

Definition at line 925 of file LPC17xx.h.

uint32_t RESERVED5

Definition at line 929 of file LPC17xx.h.

uint32_t RESERVED6[882]

Definition at line 932 of file LPC17xx.h.

uint32_t RESERVED7

Definition at line 937 of file LPC17xx.h.

uint32_t RESERVED8

Definition at line 939 of file LPC17xx.h.

__I uint32_t RSV

Definition at line 921 of file LPC17xx.h.

__IO uint32_t RxConsumeIndex

Definition at line 912 of file LPC17xx.h.

__IO uint32_t RxDescriptor

Definition at line 908 of file LPC17xx.h.

__IO uint32_t RxDescriptorNumber

Definition at line 910 of file LPC17xx.h.

__IO uint32_t RxFilterCtrl

Definition at line 926 of file LPC17xx.h.

__IO uint32_t RxFilterWoLClear

Definition at line 928 of file LPC17xx.h.

__IO uint32_t RxFilterWoLStatus

Definition at line 927 of file LPC17xx.h.

__I uint32_t RxProduceIndex

Definition at line 911 of file LPC17xx.h.

__IO uint32_t RxStatus

Definition at line 909 of file LPC17xx.h.

__IO uint32_t SA0

Definition at line 902 of file LPC17xx.h.

__IO uint32_t SA1

Definition at line 903 of file LPC17xx.h.

__IO uint32_t SA2

Definition at line 904 of file LPC17xx.h.

__I uint32_t Status

Definition at line 907 of file LPC17xx.h.

__IO uint32_t SUPP

Definition at line 893 of file LPC17xx.h.

__IO uint32_t TEST

Definition at line 894 of file LPC17xx.h.

__I uint32_t TSV0

Definition at line 919 of file LPC17xx.h.

__I uint32_t TSV1

Definition at line 920 of file LPC17xx.h.

__I uint32_t TxConsumeIndex

Definition at line 917 of file LPC17xx.h.

__IO uint32_t TxDescriptor

Definition at line 913 of file LPC17xx.h.

__IO uint32_t TxDescriptorNumber

Definition at line 915 of file LPC17xx.h.

__IO uint32_t TxProduceIndex

Definition at line 916 of file LPC17xx.h.

__IO uint32_t TxStatus

Definition at line 914 of file LPC17xx.h.

The documentation for this struct was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Core/CM3/DeviceSupport/NXP/LPC17xx/LPC17xx.h
Generated on Tue Jun 7 15:00:06 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: LPC_GPDMA_TypeDef Struct Reference

  • Data Structures
  • Data Fields

LPC_GPDMA_TypeDef Struct Reference
[LPC17xx System]

General Purpose Direct Memory Access (GPDMA) register structure definition. More...

#include <LPC17xx.h>

Data Fields

__I uint32_t | DMACIntStat
__I uint32_t | DMACIntTCStat
__O uint32_t | DMACIntTCClear
__I uint32_t | DMACIntErrStat
__O uint32_t | DMACIntErrClr
__I uint32_t | DMACRawIntTCStat
__I uint32_t | DMACRawIntErrStat
__I uint32_t | DMACEnbldChns
__IO uint32_t | DMACSoftBReq
__IO uint32_t | DMACSoftSReq
__IO uint32_t | DMACSoftLBReq
__IO uint32_t | DMACSoftLSReq
__IO uint32_t | DMACConfig
__IO uint32_t | DMACSync

Detailed Description

General Purpose Direct Memory Access (GPDMA) register structure definition.

Definition at line 750 of file LPC17xx.h.

Field Documentation

__IO uint32_t DMACConfig

Definition at line 764 of file LPC17xx.h.

__I uint32_t DMACEnbldChns

Definition at line 759 of file LPC17xx.h.

__O uint32_t DMACIntErrClr

Definition at line 756 of file LPC17xx.h.

__I uint32_t DMACIntErrStat

Definition at line 755 of file LPC17xx.h.

__I uint32_t DMACIntStat

Definition at line 752 of file LPC17xx.h.

__O uint32_t DMACIntTCClear

Definition at line 754 of file LPC17xx.h.

__I uint32_t DMACIntTCStat

Definition at line 753 of file LPC17xx.h.

__I uint32_t DMACRawIntErrStat

Definition at line 758 of file LPC17xx.h.

__I uint32_t DMACRawIntTCStat

Definition at line 757 of file LPC17xx.h.

__IO uint32_t DMACSoftBReq

Definition at line 760 of file LPC17xx.h.

__IO uint32_t DMACSoftLBReq

Definition at line 762 of file LPC17xx.h.

__IO uint32_t DMACSoftLSReq

Definition at line 763 of file LPC17xx.h.

__IO uint32_t DMACSoftSReq

Definition at line 761 of file LPC17xx.h.

__IO uint32_t DMACSync

Definition at line 765 of file LPC17xx.h.

The documentation for this struct was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Core/CM3/DeviceSupport/NXP/LPC17xx/LPC17xx.h
Generated on Tue Jun 7 15:00:06 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: LPC_GPDMACH_TypeDef Struct Reference

  • Data Structures
  • Data Fields

LPC_GPDMACH_TypeDef Struct Reference
[LPC17xx System]

General Purpose Direct Memory Access Channel (GPDMACH) register structure definition. More...

#include <LPC17xx.h>

Data Fields

__IO uint32_t | DMACCSrcAddr
__IO uint32_t | DMACCDestAddr
__IO uint32_t | DMACCLLI
__IO uint32_t | DMACCControl
__IO uint32_t | DMACCConfig

Detailed Description

General Purpose Direct Memory Access Channel (GPDMACH) register structure definition.

Definition at line 769 of file LPC17xx.h.

Field Documentation

__IO uint32_t DMACCConfig

Definition at line 775 of file LPC17xx.h.

__IO uint32_t DMACCControl

Definition at line 774 of file LPC17xx.h.

__IO uint32_t DMACCDestAddr

Definition at line 772 of file LPC17xx.h.

__IO uint32_t DMACCLLI

Definition at line 773 of file LPC17xx.h.

__IO uint32_t DMACCSrcAddr

Definition at line 771 of file LPC17xx.h.

The documentation for this struct was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Core/CM3/DeviceSupport/NXP/LPC17xx/LPC17xx.h
Generated on Tue Jun 7 15:00:06 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: LPC_GPIO_TypeDef Struct Reference

  • Data Structures
  • Data Fields

LPC_GPIO_TypeDef Struct Reference
[LPC17xx System]

General Purpose Input/Output (GPIO) register structure definition. More...

#include <LPC17xx.h>

Data Fields

union {
__IO uint32_t FIODIR
struct {
__IO uint16_t FIODIRL
__IO uint16_t FIODIRH
}
struct {
__IO uint8_t FIODIR0
__IO uint8_t FIODIR1
__IO uint8_t FIODIR2
__IO uint8_t FIODIR3
}
};
uint32_t RESERVED0 [3]
union {
__IO uint32_t FIOMASK
struct {
__IO uint16_t FIOMASKL
__IO uint16_t FIOMASKH
}
struct {
__IO uint8_t FIOMASK0
__IO uint8_t FIOMASK1
__IO uint8_t FIOMASK2
__IO uint8_t FIOMASK3
}
};
union {
__IO uint32_t FIOPIN
struct {
__IO uint16_t FIOPINL
__IO uint16_t FIOPINH
}
struct {
__IO uint8_t FIOPIN0
__IO uint8_t FIOPIN1
__IO uint8_t FIOPIN2
__IO uint8_t FIOPIN3
}
};
union {
__IO uint32_t FIOSET
struct {
__IO uint16_t FIOSETL
__IO uint16_t FIOSETH
}
struct {
__IO uint8_t FIOSET0
__IO uint8_t FIOSET1
__IO uint8_t FIOSET2
__IO uint8_t FIOSET3
}
};
union {
__O uint32_t FIOCLR
struct {
__O uint16_t FIOCLRL
__O uint16_t FIOCLRH
}
struct {
__O uint8_t FIOCLR0
__O uint8_t FIOCLR1
__O uint8_t FIOCLR2
__O uint8_t FIOCLR3
}
};

Detailed Description

General Purpose Input/Output (GPIO) register structure definition.

Definition at line 193 of file LPC17xx.h.

Field Documentation

union { ... }

union { ... }

union { ... }

union { ... }

union { ... }

__O uint32_t FIOCLR

Definition at line 249 of file LPC17xx.h.

__O uint8_t FIOCLR0

Definition at line 255 of file LPC17xx.h.

__O uint8_t FIOCLR1

Definition at line 256 of file LPC17xx.h.

__O uint8_t FIOCLR2

Definition at line 257 of file LPC17xx.h.

__O uint8_t FIOCLR3

Definition at line 258 of file LPC17xx.h.

__O uint16_t FIOCLRH

Definition at line 252 of file LPC17xx.h.

__O uint16_t FIOCLRL

Definition at line 251 of file LPC17xx.h.

__IO uint32_t FIODIR

Definition at line 196 of file LPC17xx.h.

__IO uint8_t FIODIR0

Definition at line 202 of file LPC17xx.h.

__IO uint8_t FIODIR1

Definition at line 203 of file LPC17xx.h.

__IO uint8_t FIODIR2

Definition at line 204 of file LPC17xx.h.

__IO uint8_t FIODIR3

Definition at line 205 of file LPC17xx.h.

__IO uint16_t FIODIRH

Definition at line 199 of file LPC17xx.h.

__IO uint16_t FIODIRL

Definition at line 198 of file LPC17xx.h.

__IO uint32_t FIOMASK

Definition at line 210 of file LPC17xx.h.

__IO uint8_t FIOMASK0

Definition at line 216 of file LPC17xx.h.

__IO uint8_t FIOMASK1

Definition at line 217 of file LPC17xx.h.

__IO uint8_t FIOMASK2

Definition at line 218 of file LPC17xx.h.

__IO uint8_t FIOMASK3

Definition at line 219 of file LPC17xx.h.

__IO uint16_t FIOMASKH

Definition at line 213 of file LPC17xx.h.

__IO uint16_t FIOMASKL

Definition at line 212 of file LPC17xx.h.

__IO uint32_t FIOPIN

Definition at line 223 of file LPC17xx.h.

__IO uint8_t FIOPIN0

Definition at line 229 of file LPC17xx.h.

__IO uint8_t FIOPIN1

Definition at line 230 of file LPC17xx.h.

__IO uint8_t FIOPIN2

Definition at line 231 of file LPC17xx.h.

__IO uint8_t FIOPIN3

Definition at line 232 of file LPC17xx.h.

__IO uint16_t FIOPINH

Definition at line 226 of file LPC17xx.h.

__IO uint16_t FIOPINL

Definition at line 225 of file LPC17xx.h.

__IO uint32_t FIOSET

Definition at line 236 of file LPC17xx.h.

__IO uint8_t FIOSET0

Definition at line 242 of file LPC17xx.h.

__IO uint8_t FIOSET1

Definition at line 243 of file LPC17xx.h.

__IO uint8_t FIOSET2

Definition at line 244 of file LPC17xx.h.

__IO uint8_t FIOSET3

Definition at line 245 of file LPC17xx.h.

__IO uint16_t FIOSETH

Definition at line 239 of file LPC17xx.h.

__IO uint16_t FIOSETL

Definition at line 238 of file LPC17xx.h.

uint32_t RESERVED0[3]

Definition at line 208 of file LPC17xx.h.

The documentation for this struct was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Core/CM3/DeviceSupport/NXP/LPC17xx/LPC17xx.h
Generated on Tue Jun 7 15:00:06 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: LPC_GPIOINT_TypeDef Struct Reference

  • Data Structures
  • Data Fields

LPC_GPIOINT_TypeDef Struct Reference
[LPC17xx System]

General Purpose Input/Output interrupt (GPIOINT) register structure definition. More...

#include <LPC17xx.h>

Data Fields

__I uint32_t | IntStatus
__I uint32_t | IO0IntStatR
__I uint32_t | IO0IntStatF
__O uint32_t | IO0IntClr
__IO uint32_t | IO0IntEnR
__IO uint32_t | IO0IntEnF
uint32_t | RESERVED0 [3]
__I uint32_t | IO2IntStatR
__I uint32_t | IO2IntStatF
__O uint32_t | IO2IntClr
__IO uint32_t | IO2IntEnR
__IO uint32_t | IO2IntEnF

Detailed Description

General Purpose Input/Output interrupt (GPIOINT) register structure definition.

Definition at line 264 of file LPC17xx.h.

Field Documentation

__I uint32_t IntStatus

Definition at line 266 of file LPC17xx.h.

__O uint32_t IO0IntClr

Definition at line 269 of file LPC17xx.h.

__IO uint32_t IO0IntEnF

Definition at line 271 of file LPC17xx.h.

__IO uint32_t IO0IntEnR

Definition at line 270 of file LPC17xx.h.

__I uint32_t IO0IntStatF

Definition at line 268 of file LPC17xx.h.

__I uint32_t IO0IntStatR

Definition at line 267 of file LPC17xx.h.

__O uint32_t IO2IntClr

Definition at line 275 of file LPC17xx.h.

__IO uint32_t IO2IntEnF

Definition at line 277 of file LPC17xx.h.

__IO uint32_t IO2IntEnR

Definition at line 276 of file LPC17xx.h.

__I uint32_t IO2IntStatF

Definition at line 274 of file LPC17xx.h.

__I uint32_t IO2IntStatR

Definition at line 273 of file LPC17xx.h.

uint32_t RESERVED0[3]

Definition at line 272 of file LPC17xx.h.

The documentation for this struct was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Core/CM3/DeviceSupport/NXP/LPC17xx/LPC17xx.h
Generated on Tue Jun 7 15:00:07 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: LPC_I2C_TypeDef Struct Reference

  • Data Structures
  • Data Fields

LPC_I2C_TypeDef Struct Reference
[LPC17xx System]

Inter-Integrated Circuit (I2C) register structure definition. More...

#include <LPC17xx.h>

Data Fields

__IO uint32_t | I2CONSET
__I uint32_t | I2STAT
__IO uint32_t | I2DAT
__IO uint32_t | I2ADR0
__IO uint32_t | I2SCLH
__IO uint32_t | I2SCLL
__O uint32_t | I2CONCLR
__IO uint32_t | MMCTRL
__IO uint32_t | I2ADR1
__IO uint32_t | I2ADR2
__IO uint32_t | I2ADR3
__I uint32_t | I2DATA_BUFFER
__IO uint32_t | I2MASK0
__IO uint32_t | I2MASK1
__IO uint32_t | I2MASK2
__IO uint32_t | I2MASK3

Detailed Description

Inter-Integrated Circuit (I2C) register structure definition.

Definition at line 471 of file LPC17xx.h.

Field Documentation

__IO uint32_t I2ADR0

Definition at line 476 of file LPC17xx.h.

__IO uint32_t I2ADR1

Definition at line 481 of file LPC17xx.h.

__IO uint32_t I2ADR2

Definition at line 482 of file LPC17xx.h.

__IO uint32_t I2ADR3

Definition at line 483 of file LPC17xx.h.

__O uint32_t I2CONCLR

Definition at line 479 of file LPC17xx.h.

__IO uint32_t I2CONSET

Definition at line 473 of file LPC17xx.h.

__IO uint32_t I2DAT

Definition at line 475 of file LPC17xx.h.

__I uint32_t I2DATA_BUFFER

Definition at line 484 of file LPC17xx.h.

__IO uint32_t I2MASK0

Definition at line 485 of file LPC17xx.h.

__IO uint32_t I2MASK1

Definition at line 486 of file LPC17xx.h.

__IO uint32_t I2MASK2

Definition at line 487 of file LPC17xx.h.

__IO uint32_t I2MASK3

Definition at line 488 of file LPC17xx.h.

__IO uint32_t I2SCLH

Definition at line 477 of file LPC17xx.h.

__IO uint32_t I2SCLL

Definition at line 478 of file LPC17xx.h.

__I uint32_t I2STAT

Definition at line 474 of file LPC17xx.h.

__IO uint32_t MMCTRL

Definition at line 480 of file LPC17xx.h.

The documentation for this struct was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Core/CM3/DeviceSupport/NXP/LPC17xx/LPC17xx.h
Generated on Tue Jun 7 15:00:07 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: LPC_I2S_TypeDef Struct Reference

  • Data Structures
  • Data Fields

LPC_I2S_TypeDef Struct Reference
[LPC17xx System]

Inter IC Sound (I2S) register structure definition. More...

#include <LPC17xx.h>

Data Fields

__IO uint32_t | I2SDAO
__IO uint32_t | I2SDAI
__O uint32_t | I2STXFIFO
__I uint32_t | I2SRXFIFO
__I uint32_t | I2SSTATE
__IO uint32_t | I2SDMA1
__IO uint32_t | I2SDMA2
__IO uint32_t | I2SIRQ
__IO uint32_t | I2STXRATE
__IO uint32_t | I2SRXRATE
__IO uint32_t | I2STXBITRATE
__IO uint32_t | I2SRXBITRATE
__IO uint32_t | I2STXMODE
__IO uint32_t | I2SRXMODE

Detailed Description

Inter IC Sound (I2S) register structure definition.

Definition at line 493 of file LPC17xx.h.

Field Documentation

__IO uint32_t I2SDAI

Definition at line 496 of file LPC17xx.h.

__IO uint32_t I2SDAO

Definition at line 495 of file LPC17xx.h.

__IO uint32_t I2SDMA1

Definition at line 500 of file LPC17xx.h.

__IO uint32_t I2SDMA2

Definition at line 501 of file LPC17xx.h.

__IO uint32_t I2SIRQ

Definition at line 502 of file LPC17xx.h.

__IO uint32_t I2SRXBITRATE

Definition at line 506 of file LPC17xx.h.

__I uint32_t I2SRXFIFO

Definition at line 498 of file LPC17xx.h.

__IO uint32_t I2SRXMODE

Definition at line 508 of file LPC17xx.h.

__IO uint32_t I2SRXRATE

Definition at line 504 of file LPC17xx.h.

__I uint32_t I2SSTATE

Definition at line 499 of file LPC17xx.h.

__IO uint32_t I2STXBITRATE

Definition at line 505 of file LPC17xx.h.

__O uint32_t I2STXFIFO

Definition at line 497 of file LPC17xx.h.

__IO uint32_t I2STXMODE

Definition at line 507 of file LPC17xx.h.

__IO uint32_t I2STXRATE

Definition at line 503 of file LPC17xx.h.

The documentation for this struct was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Core/CM3/DeviceSupport/NXP/LPC17xx/LPC17xx.h
Generated on Tue Jun 7 15:00:07 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: LPC_MCPWM_TypeDef Struct Reference

  • Data Structures
  • Data Fields

LPC_MCPWM_TypeDef Struct Reference
[LPC17xx System]

Motor Control Pulse-Width Modulation (MCPWM) register structure definition. More...

#include <LPC17xx.h>

Data Fields

__I uint32_t | MCCON
__O uint32_t | MCCON_SET
__O uint32_t | MCCON_CLR
__I uint32_t | MCCAPCON
__O uint32_t | MCCAPCON_SET
__O uint32_t | MCCAPCON_CLR
__IO uint32_t | MCTIM0
__IO uint32_t | MCTIM1
__IO uint32_t | MCTIM2
__IO uint32_t | MCPER0
__IO uint32_t | MCPER1
__IO uint32_t | MCPER2
__IO uint32_t | MCPW0
__IO uint32_t | MCPW1
__IO uint32_t | MCPW2
__IO uint32_t | MCDEADTIME
__IO uint32_t | MCCCP
__IO uint32_t | MCCR0
__IO uint32_t | MCCR1
__IO uint32_t | MCCR2
__I uint32_t | MCINTEN
__O uint32_t | MCINTEN_SET
__O uint32_t | MCINTEN_CLR
__I uint32_t | MCCNTCON
__O uint32_t | MCCNTCON_SET
__O uint32_t | MCCNTCON_CLR
__I uint32_t | MCINTFLAG
__O uint32_t | MCINTFLAG_SET
__O uint32_t | MCINTFLAG_CLR
__O uint32_t | MCCAP_CLR

Detailed Description

Motor Control Pulse-Width Modulation (MCPWM) register structure definition.

Definition at line 625 of file LPC17xx.h.

Field Documentation

__O uint32_t MCCAP_CLR

Definition at line 656 of file LPC17xx.h.

__I uint32_t MCCAPCON

Definition at line 630 of file LPC17xx.h.

__O uint32_t MCCAPCON_CLR

Definition at line 632 of file LPC17xx.h.

__O uint32_t MCCAPCON_SET

Definition at line 631 of file LPC17xx.h.

__IO uint32_t MCCCP

Definition at line 643 of file LPC17xx.h.

__I uint32_t MCCNTCON

Definition at line 650 of file LPC17xx.h.

__O uint32_t MCCNTCON_CLR

Definition at line 652 of file LPC17xx.h.

__O uint32_t MCCNTCON_SET

Definition at line 651 of file LPC17xx.h.

__I uint32_t MCCON

Definition at line 627 of file LPC17xx.h.

__O uint32_t MCCON_CLR

Definition at line 629 of file LPC17xx.h.

__O uint32_t MCCON_SET

Definition at line 628 of file LPC17xx.h.

__IO uint32_t MCCR0

Definition at line 644 of file LPC17xx.h.

__IO uint32_t MCCR1

Definition at line 645 of file LPC17xx.h.

__IO uint32_t MCCR2

Definition at line 646 of file LPC17xx.h.

__IO uint32_t MCDEADTIME

Definition at line 642 of file LPC17xx.h.

__I uint32_t MCINTEN

Definition at line 647 of file LPC17xx.h.

__O uint32_t MCINTEN_CLR

Definition at line 649 of file LPC17xx.h.

__O uint32_t MCINTEN_SET

Definition at line 648 of file LPC17xx.h.

__I uint32_t MCINTFLAG

Definition at line 653 of file LPC17xx.h.

__O uint32_t MCINTFLAG_CLR

Definition at line 655 of file LPC17xx.h.

__O uint32_t MCINTFLAG_SET

Definition at line 654 of file LPC17xx.h.

__IO uint32_t MCPER0

Definition at line 636 of file LPC17xx.h.

__IO uint32_t MCPER1

Definition at line 637 of file LPC17xx.h.

__IO uint32_t MCPER2

Definition at line 638 of file LPC17xx.h.

__IO uint32_t MCPW0

Definition at line 639 of file LPC17xx.h.

__IO uint32_t MCPW1

Definition at line 640 of file LPC17xx.h.

__IO uint32_t MCPW2

Definition at line 641 of file LPC17xx.h.

__IO uint32_t MCTIM0

Definition at line 633 of file LPC17xx.h.

__IO uint32_t MCTIM1

Definition at line 634 of file LPC17xx.h.

__IO uint32_t MCTIM2

Definition at line 635 of file LPC17xx.h.

The documentation for this struct was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Core/CM3/DeviceSupport/NXP/LPC17xx/LPC17xx.h
Generated on Tue Jun 7 15:00:07 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: LPC_PINCON_TypeDef Struct Reference

  • Data Structures
  • Data Fields

LPC_PINCON_TypeDef Struct Reference
[LPC17xx System]

Pin Connect Block (PINCON) register structure definition. More...

#include <LPC17xx.h>

Data Fields

__IO uint32_t | PINSEL0
__IO uint32_t | PINSEL1
__IO uint32_t | PINSEL2
__IO uint32_t | PINSEL3
__IO uint32_t | PINSEL4
__IO uint32_t | PINSEL5
__IO uint32_t | PINSEL6
__IO uint32_t | PINSEL7
__IO uint32_t | PINSEL8
__IO uint32_t | PINSEL9
__IO uint32_t | PINSEL10
uint32_t | RESERVED0 [5]
__IO uint32_t | PINMODE0
__IO uint32_t | PINMODE1
__IO uint32_t | PINMODE2
__IO uint32_t | PINMODE3
__IO uint32_t | PINMODE4
__IO uint32_t | PINMODE5
__IO uint32_t | PINMODE6
__IO uint32_t | PINMODE7
__IO uint32_t | PINMODE8
__IO uint32_t | PINMODE9
__IO uint32_t | PINMODE_OD0
__IO uint32_t | PINMODE_OD1
__IO uint32_t | PINMODE_OD2
__IO uint32_t | PINMODE_OD3
__IO uint32_t | PINMODE_OD4
__IO uint32_t | I2CPADCFG

Detailed Description

Pin Connect Block (PINCON) register structure definition.

Definition at line 159 of file LPC17xx.h.

Field Documentation

__IO uint32_t I2CPADCFG

Definition at line 188 of file LPC17xx.h.

__IO uint32_t PINMODE0

Definition at line 173 of file LPC17xx.h.

__IO uint32_t PINMODE1

Definition at line 174 of file LPC17xx.h.

__IO uint32_t PINMODE2

Definition at line 175 of file LPC17xx.h.

__IO uint32_t PINMODE3

Definition at line 176 of file LPC17xx.h.

__IO uint32_t PINMODE4

Definition at line 177 of file LPC17xx.h.

__IO uint32_t PINMODE5

Definition at line 178 of file LPC17xx.h.

__IO uint32_t PINMODE6

Definition at line 179 of file LPC17xx.h.

__IO uint32_t PINMODE7

Definition at line 180 of file LPC17xx.h.

__IO uint32_t PINMODE8

Definition at line 181 of file LPC17xx.h.

__IO uint32_t PINMODE9

Definition at line 182 of file LPC17xx.h.

__IO uint32_t PINMODE_OD0

Definition at line 183 of file LPC17xx.h.

__IO uint32_t PINMODE_OD1

Definition at line 184 of file LPC17xx.h.

__IO uint32_t PINMODE_OD2

Definition at line 185 of file LPC17xx.h.

__IO uint32_t PINMODE_OD3

Definition at line 186 of file LPC17xx.h.

__IO uint32_t PINMODE_OD4

Definition at line 187 of file LPC17xx.h.

__IO uint32_t PINSEL0

Definition at line 161 of file LPC17xx.h.

__IO uint32_t PINSEL1

Definition at line 162 of file LPC17xx.h.

__IO uint32_t PINSEL10

Definition at line 171 of file LPC17xx.h.

__IO uint32_t PINSEL2

Definition at line 163 of file LPC17xx.h.

__IO uint32_t PINSEL3

Definition at line 164 of file LPC17xx.h.

__IO uint32_t PINSEL4

Definition at line 165 of file LPC17xx.h.

__IO uint32_t PINSEL5

Definition at line 166 of file LPC17xx.h.

__IO uint32_t PINSEL6

Definition at line 167 of file LPC17xx.h.

__IO uint32_t PINSEL7

Definition at line 168 of file LPC17xx.h.

__IO uint32_t PINSEL8

Definition at line 169 of file LPC17xx.h.

__IO uint32_t PINSEL9

Definition at line 170 of file LPC17xx.h.

uint32_t RESERVED0[5]

Definition at line 172 of file LPC17xx.h.

The documentation for this struct was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Core/CM3/DeviceSupport/NXP/LPC17xx/LPC17xx.h
Generated on Tue Jun 7 15:00:07 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: LPC_PWM_TypeDef Struct Reference

  • Data Structures
  • Data Fields

LPC_PWM_TypeDef Struct Reference
[LPC17xx System]

Pulse-Width Modulation (PWM) register structure definition. More...

#include <LPC17xx.h>

Data Fields

__IO uint32_t | IR
__IO uint32_t | TCR
__IO uint32_t | TC
__IO uint32_t | PR
__IO uint32_t | PC
__IO uint32_t | MCR
__IO uint32_t | MR0
__IO uint32_t | MR1
__IO uint32_t | MR2
__IO uint32_t | MR3
__IO uint32_t | CCR
__I uint32_t | CR0
__I uint32_t | CR1
__I uint32_t | CR2
__I uint32_t | CR3
uint32_t | RESERVED0
__IO uint32_t | MR4
__IO uint32_t | MR5
__IO uint32_t | MR6
__IO uint32_t | PCR
__IO uint32_t | LER
uint32_t | RESERVED1 [7]
__IO uint32_t | CTCR

Detailed Description

Pulse-Width Modulation (PWM) register structure definition.

Definition at line 305 of file LPC17xx.h.

Field Documentation

__IO uint32_t CCR

Definition at line 317 of file LPC17xx.h.

__I uint32_t CR0

Definition at line 318 of file LPC17xx.h.

__I uint32_t CR1

Definition at line 319 of file LPC17xx.h.

__I uint32_t CR2

Definition at line 320 of file LPC17xx.h.

__I uint32_t CR3

Definition at line 321 of file LPC17xx.h.

__IO uint32_t CTCR

Definition at line 329 of file LPC17xx.h.

__IO uint32_t IR

Definition at line 307 of file LPC17xx.h.

__IO uint32_t LER

Definition at line 327 of file LPC17xx.h.

__IO uint32_t MCR

Definition at line 312 of file LPC17xx.h.

__IO uint32_t MR0

Definition at line 313 of file LPC17xx.h.

__IO uint32_t MR1

Definition at line 314 of file LPC17xx.h.

__IO uint32_t MR2

Definition at line 315 of file LPC17xx.h.

__IO uint32_t MR3

Definition at line 316 of file LPC17xx.h.

__IO uint32_t MR4

Definition at line 323 of file LPC17xx.h.

__IO uint32_t MR5

Definition at line 324 of file LPC17xx.h.

__IO uint32_t MR6

Definition at line 325 of file LPC17xx.h.

__IO uint32_t PC

Definition at line 311 of file LPC17xx.h.

__IO uint32_t PCR

Definition at line 326 of file LPC17xx.h.

__IO uint32_t PR

Definition at line 310 of file LPC17xx.h.

uint32_t RESERVED0

Definition at line 322 of file LPC17xx.h.

uint32_t RESERVED1[7]

Definition at line 328 of file LPC17xx.h.

__IO uint32_t TC

Definition at line 309 of file LPC17xx.h.

__IO uint32_t TCR

Definition at line 308 of file LPC17xx.h.

The documentation for this struct was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Core/CM3/DeviceSupport/NXP/LPC17xx/LPC17xx.h
Generated on Tue Jun 7 15:00:07 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: LPC_QEI_TypeDef Struct Reference

  • Data Structures
  • Data Fields

LPC_QEI_TypeDef Struct Reference
[LPC17xx System]

Quadrature Encoder Interface (QEI) register structure definition. More...

#include <LPC17xx.h>

Data Fields

__O uint32_t | QEICON
__I uint32_t | QEISTAT
__IO uint32_t | QEICONF
__I uint32_t | QEIPOS
__IO uint32_t | QEIMAXPOS
__IO uint32_t | CMPOS0
__IO uint32_t | CMPOS1
__IO uint32_t | CMPOS2
__I uint32_t | INXCNT
__IO uint32_t | INXCMP
__IO uint32_t | QEILOAD
__I uint32_t | QEITIME
__I uint32_t | QEIVEL
__I uint32_t | QEICAP
__IO uint32_t | VELCOMP
__IO uint32_t | FILTER
uint32_t | RESERVED0 [998]
__O uint32_t | QEIIEC
__O uint32_t | QEIIES
__I uint32_t | QEIINTSTAT
__I uint32_t | QEIIE
__O uint32_t | QEICLR
__O uint32_t | QEISET

Detailed Description

Quadrature Encoder Interface (QEI) register structure definition.

Definition at line 661 of file LPC17xx.h.

Field Documentation

__IO uint32_t CMPOS0

Definition at line 668 of file LPC17xx.h.

__IO uint32_t CMPOS1

Definition at line 669 of file LPC17xx.h.

__IO uint32_t CMPOS2

Definition at line 670 of file LPC17xx.h.

__IO uint32_t FILTER

Definition at line 678 of file LPC17xx.h.

__IO uint32_t INXCMP

Definition at line 672 of file LPC17xx.h.

__I uint32_t INXCNT

Definition at line 671 of file LPC17xx.h.

__I uint32_t QEICAP

Definition at line 676 of file LPC17xx.h.

__O uint32_t QEICLR

Definition at line 684 of file LPC17xx.h.

__O uint32_t QEICON

Definition at line 663 of file LPC17xx.h.

__IO uint32_t QEICONF

Definition at line 665 of file LPC17xx.h.

__I uint32_t QEIIE

Definition at line 683 of file LPC17xx.h.

__O uint32_t QEIIEC

Definition at line 680 of file LPC17xx.h.

__O uint32_t QEIIES

Definition at line 681 of file LPC17xx.h.

__I uint32_t QEIINTSTAT

Definition at line 682 of file LPC17xx.h.

__IO uint32_t QEILOAD

Definition at line 673 of file LPC17xx.h.

__IO uint32_t QEIMAXPOS

Definition at line 667 of file LPC17xx.h.

__I uint32_t QEIPOS

Definition at line 666 of file LPC17xx.h.

__O uint32_t QEISET

Definition at line 685 of file LPC17xx.h.

__I uint32_t QEISTAT

Definition at line 664 of file LPC17xx.h.

__I uint32_t QEITIME

Definition at line 674 of file LPC17xx.h.

__I uint32_t QEIVEL

Definition at line 675 of file LPC17xx.h.

uint32_t RESERVED0[998]

Definition at line 679 of file LPC17xx.h.

__IO uint32_t VELCOMP

Definition at line 677 of file LPC17xx.h.

The documentation for this struct was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Core/CM3/DeviceSupport/NXP/LPC17xx/LPC17xx.h
Generated on Tue Jun 7 15:00:08 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: LPC_RIT_TypeDef Struct Reference

  • Data Structures
  • Data Fields

LPC_RIT_TypeDef Struct Reference
[LPC17xx System]

Repetitive Interrupt Timer (RIT) register structure definition. More...

#include <LPC17xx.h>

Data Fields

__IO uint32_t | RICOMPVAL
__IO uint32_t | RIMASK
__IO uint8_t | RICTRL
uint8_t | RESERVED0 [3]
__IO uint32_t | RICOUNTER

Detailed Description

Repetitive Interrupt Timer (RIT) register structure definition.

Definition at line 513 of file LPC17xx.h.

Field Documentation

uint8_t RESERVED0[3]

Definition at line 518 of file LPC17xx.h.

__IO uint32_t RICOMPVAL

Definition at line 515 of file LPC17xx.h.

__IO uint32_t RICOUNTER

Definition at line 519 of file LPC17xx.h.

__IO uint8_t RICTRL

Definition at line 517 of file LPC17xx.h.

__IO uint32_t RIMASK

Definition at line 516 of file LPC17xx.h.

The documentation for this struct was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Core/CM3/DeviceSupport/NXP/LPC17xx/LPC17xx.h
Generated on Tue Jun 7 15:00:08 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: LPC_RTC_TypeDef Struct Reference

  • Data Structures
  • Data Fields

LPC_RTC_TypeDef Struct Reference
[LPC17xx System]

Real-Time Clock (RTC) register structure definition. More...

#include <LPC17xx.h>

Data Fields

__IO uint8_t | ILR
uint8_t | RESERVED0 [7]
__IO uint8_t | CCR
uint8_t | RESERVED1 [3]
__IO uint8_t | CIIR
uint8_t | RESERVED2 [3]
__IO uint8_t | AMR
uint8_t | RESERVED3 [3]
__I uint32_t | CTIME0
__I uint32_t | CTIME1
__I uint32_t | CTIME2
__IO uint8_t | SEC
uint8_t | RESERVED4 [3]
__IO uint8_t | MIN
uint8_t | RESERVED5 [3]
__IO uint8_t | HOUR
uint8_t | RESERVED6 [3]
__IO uint8_t | DOM
uint8_t | RESERVED7 [3]
__IO uint8_t | DOW
uint8_t | RESERVED8 [3]
__IO uint16_t | DOY
uint16_t | RESERVED9
__IO uint8_t | MONTH
uint8_t | RESERVED10 [3]
__IO uint16_t | YEAR
uint16_t | RESERVED11
__IO uint32_t | CALIBRATION
__IO uint32_t | GPREG0
__IO uint32_t | GPREG1
__IO uint32_t | GPREG2
__IO uint32_t | GPREG3
__IO uint32_t | GPREG4
__IO uint8_t | RTC_AUXEN
uint8_t | RESERVED12 [3]
__IO uint8_t | RTC_AUX
uint8_t | RESERVED13 [3]
__IO uint8_t | ALSEC
uint8_t | RESERVED14 [3]
__IO uint8_t | ALMIN
uint8_t | RESERVED15 [3]
__IO uint8_t | ALHOUR
uint8_t | RESERVED16 [3]
__IO uint8_t | ALDOM
uint8_t | RESERVED17 [3]
__IO uint8_t | ALDOW
uint8_t | RESERVED18 [3]
__IO uint16_t | ALDOY
uint16_t | RESERVED19
__IO uint8_t | ALMON
uint8_t | RESERVED20 [3]
__IO uint16_t | ALYEAR
uint16_t | RESERVED21

Detailed Description

Real-Time Clock (RTC) register structure definition.

Definition at line 524 of file LPC17xx.h.

Field Documentation

__IO uint8_t ALDOM

Definition at line 569 of file LPC17xx.h.

__IO uint8_t ALDOW

Definition at line 571 of file LPC17xx.h.

__IO uint16_t ALDOY

Definition at line 573 of file LPC17xx.h.

__IO uint8_t ALHOUR

Definition at line 567 of file LPC17xx.h.

__IO uint8_t ALMIN

Definition at line 565 of file LPC17xx.h.

__IO uint8_t ALMON

Definition at line 575 of file LPC17xx.h.

__IO uint8_t ALSEC

Definition at line 563 of file LPC17xx.h.

__IO uint16_t ALYEAR

Definition at line 577 of file LPC17xx.h.

__IO uint8_t AMR

Definition at line 532 of file LPC17xx.h.

__IO uint32_t CALIBRATION

Definition at line 553 of file LPC17xx.h.

__IO uint8_t CCR

Definition at line 528 of file LPC17xx.h.

__IO uint8_t CIIR

Definition at line 530 of file LPC17xx.h.

__I uint32_t CTIME0

Definition at line 534 of file LPC17xx.h.

__I uint32_t CTIME1

Definition at line 535 of file LPC17xx.h.

__I uint32_t CTIME2

Definition at line 536 of file LPC17xx.h.

__IO uint8_t DOM

Definition at line 543 of file LPC17xx.h.

__IO uint8_t DOW

Definition at line 545 of file LPC17xx.h.

__IO uint16_t DOY

Definition at line 547 of file LPC17xx.h.

__IO uint32_t GPREG0

Definition at line 554 of file LPC17xx.h.

__IO uint32_t GPREG1

Definition at line 555 of file LPC17xx.h.

__IO uint32_t GPREG2

Definition at line 556 of file LPC17xx.h.

__IO uint32_t GPREG3

Definition at line 557 of file LPC17xx.h.

__IO uint32_t GPREG4

Definition at line 558 of file LPC17xx.h.

__IO uint8_t HOUR

Definition at line 541 of file LPC17xx.h.

__IO uint8_t ILR

Definition at line 526 of file LPC17xx.h.

__IO uint8_t MIN

Definition at line 539 of file LPC17xx.h.

__IO uint8_t MONTH

Definition at line 549 of file LPC17xx.h.

uint8_t RESERVED0[7]

Definition at line 527 of file LPC17xx.h.

uint8_t RESERVED1[3]

Definition at line 529 of file LPC17xx.h.

uint8_t RESERVED10[3]

Definition at line 550 of file LPC17xx.h.

uint16_t RESERVED11

Definition at line 552 of file LPC17xx.h.

uint8_t RESERVED12[3]

Definition at line 560 of file LPC17xx.h.

uint8_t RESERVED13[3]

Definition at line 562 of file LPC17xx.h.

uint8_t RESERVED14[3]

Definition at line 564 of file LPC17xx.h.

uint8_t RESERVED15[3]

Definition at line 566 of file LPC17xx.h.

uint8_t RESERVED16[3]

Definition at line 568 of file LPC17xx.h.

uint8_t RESERVED17[3]

Definition at line 570 of file LPC17xx.h.

uint8_t RESERVED18[3]

Definition at line 572 of file LPC17xx.h.

uint16_t RESERVED19

Definition at line 574 of file LPC17xx.h.

uint8_t RESERVED2[3]

Definition at line 531 of file LPC17xx.h.

uint8_t RESERVED20[3]

Definition at line 576 of file LPC17xx.h.

uint16_t RESERVED21

Definition at line 578 of file LPC17xx.h.

uint8_t RESERVED3[3]

Definition at line 533 of file LPC17xx.h.

uint8_t RESERVED4[3]

Definition at line 538 of file LPC17xx.h.

uint8_t RESERVED5[3]

Definition at line 540 of file LPC17xx.h.

uint8_t RESERVED6[3]

Definition at line 542 of file LPC17xx.h.

uint8_t RESERVED7[3]

Definition at line 544 of file LPC17xx.h.

uint8_t RESERVED8[3]

Definition at line 546 of file LPC17xx.h.

uint16_t RESERVED9

Definition at line 548 of file LPC17xx.h.

__IO uint8_t RTC_AUX

Definition at line 561 of file LPC17xx.h.

__IO uint8_t RTC_AUXEN

Definition at line 559 of file LPC17xx.h.

__IO uint8_t SEC

Definition at line 537 of file LPC17xx.h.

__IO uint16_t YEAR

Definition at line 551 of file LPC17xx.h.

The documentation for this struct was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Core/CM3/DeviceSupport/NXP/LPC17xx/LPC17xx.h
Generated on Tue Jun 7 15:00:08 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: LPC_SC_TypeDef Struct Reference

  • Data Structures
  • Data Fields

LPC_SC_TypeDef Struct Reference
[LPC17xx System]

System Control (SC) register structure definition. More...

#include <LPC17xx.h>

Data Fields

__IO uint32_t | FLASHCFG
uint32_t | RESERVED0 [31]
__IO uint32_t | PLL0CON
__IO uint32_t | PLL0CFG
__I uint32_t | PLL0STAT
__O uint32_t | PLL0FEED
uint32_t | RESERVED1 [4]
__IO uint32_t | PLL1CON
__IO uint32_t | PLL1CFG
__I uint32_t | PLL1STAT
__O uint32_t | PLL1FEED
uint32_t | RESERVED2 [4]
__IO uint32_t | PCON
__IO uint32_t | PCONP
uint32_t | RESERVED3 [15]
__IO uint32_t | CCLKCFG
__IO uint32_t | USBCLKCFG
__IO uint32_t | CLKSRCSEL
__IO uint32_t | CANSLEEPCLR
__IO uint32_t | CANWAKEFLAGS
uint32_t | RESERVED4 [10]
__IO uint32_t | EXTINT
uint32_t | RESERVED5
__IO uint32_t | EXTMODE
__IO uint32_t | EXTPOLAR
uint32_t | RESERVED6 [12]
__IO uint32_t | RSID
uint32_t | RESERVED7 [7]
__IO uint32_t | SCS
__IO uint32_t | IRCTRIM
__IO uint32_t | PCLKSEL0
__IO uint32_t | PCLKSEL1
uint32_t | RESERVED8 [4]
__IO uint32_t | USBIntSt
__IO uint32_t | DMAREQSEL
__IO uint32_t | CLKOUTCFG

Detailed Description

System Control (SC) register structure definition.

Definition at line 117 of file LPC17xx.h.

Field Documentation

__IO uint32_t CANSLEEPCLR

Definition at line 137 of file LPC17xx.h.

__IO uint32_t CANWAKEFLAGS

Definition at line 138 of file LPC17xx.h.

__IO uint32_t CCLKCFG

Definition at line 134 of file LPC17xx.h.

__IO uint32_t CLKOUTCFG

Definition at line 154 of file LPC17xx.h.

__IO uint32_t CLKSRCSEL

Definition at line 136 of file LPC17xx.h.

__IO uint32_t DMAREQSEL

Definition at line 153 of file LPC17xx.h.

__IO uint32_t EXTINT

Definition at line 140 of file LPC17xx.h.

__IO uint32_t EXTMODE

Definition at line 142 of file LPC17xx.h.

__IO uint32_t EXTPOLAR

Definition at line 143 of file LPC17xx.h.

__IO uint32_t FLASHCFG

Definition at line 119 of file LPC17xx.h.

__IO uint32_t IRCTRIM

Definition at line 148 of file LPC17xx.h.

__IO uint32_t PCLKSEL0

Definition at line 149 of file LPC17xx.h.

__IO uint32_t PCLKSEL1

Definition at line 150 of file LPC17xx.h.

__IO uint32_t PCON

Definition at line 131 of file LPC17xx.h.

__IO uint32_t PCONP

Definition at line 132 of file LPC17xx.h.

__IO uint32_t PLL0CFG

Definition at line 122 of file LPC17xx.h.

__IO uint32_t PLL0CON

Definition at line 121 of file LPC17xx.h.

__O uint32_t PLL0FEED

Definition at line 124 of file LPC17xx.h.

__I uint32_t PLL0STAT

Definition at line 123 of file LPC17xx.h.

__IO uint32_t PLL1CFG

Definition at line 127 of file LPC17xx.h.

__IO uint32_t PLL1CON

Definition at line 126 of file LPC17xx.h.

__O uint32_t PLL1FEED

Definition at line 129 of file LPC17xx.h.

__I uint32_t PLL1STAT

Definition at line 128 of file LPC17xx.h.

uint32_t RESERVED0[31]

Definition at line 120 of file LPC17xx.h.

uint32_t RESERVED1[4]

Definition at line 125 of file LPC17xx.h.

uint32_t RESERVED2[4]

Definition at line 130 of file LPC17xx.h.

uint32_t RESERVED3[15]

Definition at line 133 of file LPC17xx.h.

uint32_t RESERVED4[10]

Definition at line 139 of file LPC17xx.h.

uint32_t RESERVED5

Definition at line 141 of file LPC17xx.h.

uint32_t RESERVED6[12]

Definition at line 144 of file LPC17xx.h.

uint32_t RESERVED7[7]

Definition at line 146 of file LPC17xx.h.

uint32_t RESERVED8[4]

Definition at line 151 of file LPC17xx.h.

__IO uint32_t RSID

Definition at line 145 of file LPC17xx.h.

__IO uint32_t SCS

Definition at line 147 of file LPC17xx.h.

__IO uint32_t USBCLKCFG

Definition at line 135 of file LPC17xx.h.

__IO uint32_t USBIntSt

Definition at line 152 of file LPC17xx.h.

The documentation for this struct was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Core/CM3/DeviceSupport/NXP/LPC17xx/LPC17xx.h
Generated on Tue Jun 7 15:00:09 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: LPC_SPI_TypeDef Struct Reference

  • Data Structures
  • Data Fields

LPC_SPI_TypeDef Struct Reference
[LPC17xx System]

Serial Peripheral Interface (SPI) register structure definition. More...

#include <LPC17xx.h>

Data Fields

__IO uint32_t | SPCR
__I uint32_t | SPSR
__IO uint32_t | SPDR
__IO uint32_t | SPCCR
uint32_t | RESERVED0 [3]
__IO uint32_t | SPINT

Detailed Description

Serial Peripheral Interface (SPI) register structure definition.

Definition at line 443 of file LPC17xx.h.

Field Documentation

uint32_t RESERVED0[3]

Definition at line 449 of file LPC17xx.h.

__IO uint32_t SPCCR

Definition at line 448 of file LPC17xx.h.

__IO uint32_t SPCR

Definition at line 445 of file LPC17xx.h.

__IO uint32_t SPDR

Definition at line 447 of file LPC17xx.h.

__IO uint32_t SPINT

Definition at line 450 of file LPC17xx.h.

__I uint32_t SPSR

Definition at line 446 of file LPC17xx.h.

The documentation for this struct was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Core/CM3/DeviceSupport/NXP/LPC17xx/LPC17xx.h
Generated on Tue Jun 7 15:00:09 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: LPC_SSP_TypeDef Struct Reference

  • Data Structures
  • Data Fields

LPC_SSP_TypeDef Struct Reference
[LPC17xx System]

Synchronous Serial Communication (SSP) register structure definition. More...

#include <LPC17xx.h>

Data Fields

__IO uint32_t | CR0
__IO uint32_t | CR1
__IO uint32_t | DR
__I uint32_t | SR
__IO uint32_t | CPSR
__IO uint32_t | IMSC
__IO uint32_t | RIS
__IO uint32_t | MIS
__IO uint32_t | ICR
__IO uint32_t | DMACR

Detailed Description

Synchronous Serial Communication (SSP) register structure definition.

Definition at line 455 of file LPC17xx.h.

Field Documentation

__IO uint32_t CPSR

Definition at line 461 of file LPC17xx.h.

__IO uint32_t CR0

Definition at line 457 of file LPC17xx.h.

__IO uint32_t CR1

Definition at line 458 of file LPC17xx.h.

__IO uint32_t DMACR

Definition at line 466 of file LPC17xx.h.

__IO uint32_t DR

Definition at line 459 of file LPC17xx.h.

__IO uint32_t ICR

Definition at line 465 of file LPC17xx.h.

__IO uint32_t IMSC

Definition at line 462 of file LPC17xx.h.

__IO uint32_t MIS

Definition at line 464 of file LPC17xx.h.

__IO uint32_t RIS

Definition at line 463 of file LPC17xx.h.

__I uint32_t SR

Definition at line 460 of file LPC17xx.h.

The documentation for this struct was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Core/CM3/DeviceSupport/NXP/LPC17xx/LPC17xx.h
Generated on Tue Jun 7 15:00:09 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: LPC_TIM_TypeDef Struct Reference

  • Data Structures
  • Data Fields

LPC_TIM_TypeDef Struct Reference
[LPC17xx System]

Timer (TIM) register structure definition. More...

#include <LPC17xx.h>

Data Fields

__IO uint32_t | IR
__IO uint32_t | TCR
__IO uint32_t | TC
__IO uint32_t | PR
__IO uint32_t | PC
__IO uint32_t | MCR
__IO uint32_t | MR0
__IO uint32_t | MR1
__IO uint32_t | MR2
__IO uint32_t | MR3
__IO uint32_t | CCR
__I uint32_t | CR0
__I uint32_t | CR1
uint32_t | RESERVED0 [2]
__IO uint32_t | EMR
uint32_t | RESERVED1 [12]
__IO uint32_t | CTCR

Detailed Description

Timer (TIM) register structure definition.

Definition at line 282 of file LPC17xx.h.

Field Documentation

__IO uint32_t CCR

Definition at line 294 of file LPC17xx.h.

__I uint32_t CR0

Definition at line 295 of file LPC17xx.h.

__I uint32_t CR1

Definition at line 296 of file LPC17xx.h.

__IO uint32_t CTCR

Definition at line 300 of file LPC17xx.h.

__IO uint32_t EMR

Definition at line 298 of file LPC17xx.h.

__IO uint32_t IR

Definition at line 284 of file LPC17xx.h.

__IO uint32_t MCR

Definition at line 289 of file LPC17xx.h.

__IO uint32_t MR0

Definition at line 290 of file LPC17xx.h.

__IO uint32_t MR1

Definition at line 291 of file LPC17xx.h.

__IO uint32_t MR2

Definition at line 292 of file LPC17xx.h.

__IO uint32_t MR3

Definition at line 293 of file LPC17xx.h.

__IO uint32_t PC

Definition at line 288 of file LPC17xx.h.

__IO uint32_t PR

Definition at line 287 of file LPC17xx.h.

uint32_t RESERVED0[2]

Definition at line 297 of file LPC17xx.h.

uint32_t RESERVED1[12]

Definition at line 299 of file LPC17xx.h.

__IO uint32_t TC

Definition at line 286 of file LPC17xx.h.

__IO uint32_t TCR

Definition at line 285 of file LPC17xx.h.

The documentation for this struct was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Core/CM3/DeviceSupport/NXP/LPC17xx/LPC17xx.h
Generated on Tue Jun 7 15:00:09 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: LPC_UART0_TypeDef Struct Reference

  • Data Structures
  • Data Fields

LPC_UART0_TypeDef Struct Reference
[LPC17xx System]

Universal Asynchronous Receiver Transmitter 0 (UART0) register structure definition. More...

#include <LPC17xx.h>

Data Fields

union {
__I uint8_t RBR
__O uint8_t THR
__IO uint8_t DLL
uint32_t RESERVED0
};
union {
__IO uint8_t DLM
__IO uint32_t IER
};
union {
__I uint32_t IIR
__O uint8_t FCR
};
__IO uint8_t | LCR
uint8_t | RESERVED1 [7]
__I uint8_t | LSR
uint8_t | RESERVED2 [7]
__IO uint8_t | SCR
uint8_t | RESERVED3 [3]
__IO uint32_t | ACR
__IO uint8_t | ICR
uint8_t | RESERVED4 [3]
__IO uint8_t | FDR
uint8_t | RESERVED5 [7]
__IO uint8_t | TER
uint8_t | RESERVED6 [39]
__I uint8_t | FIFOLVL

Detailed Description

Universal Asynchronous Receiver Transmitter 0 (UART0) register structure definition.

Definition at line 367 of file LPC17xx.h.

Field Documentation

union { ... }

union { ... }

union { ... }

__IO uint32_t ACR

Definition at line 389 of file LPC17xx.h.

__IO uint8_t DLL

Definition at line 372 of file LPC17xx.h.

__IO uint8_t DLM

Definition at line 376 of file LPC17xx.h.

__O uint8_t FCR

Definition at line 381 of file LPC17xx.h.

__IO uint8_t FDR

Definition at line 392 of file LPC17xx.h.

__I uint8_t FIFOLVL

Definition at line 396 of file LPC17xx.h.

__IO uint8_t ICR

Definition at line 390 of file LPC17xx.h.

__IO uint32_t IER

Definition at line 377 of file LPC17xx.h.

__I uint32_t IIR

Definition at line 380 of file LPC17xx.h.

__IO uint8_t LCR

Definition at line 383 of file LPC17xx.h.

__I uint8_t LSR

Definition at line 385 of file LPC17xx.h.

__I uint8_t RBR

Definition at line 370 of file LPC17xx.h.

uint32_t RESERVED0

Definition at line 373 of file LPC17xx.h.

uint8_t RESERVED1[7]

Definition at line 384 of file LPC17xx.h.

uint8_t RESERVED2[7]

Definition at line 386 of file LPC17xx.h.

uint8_t RESERVED3[3]

Definition at line 388 of file LPC17xx.h.

uint8_t RESERVED4[3]

Definition at line 391 of file LPC17xx.h.

uint8_t RESERVED5[7]

Definition at line 393 of file LPC17xx.h.

uint8_t RESERVED6[39]

Definition at line 395 of file LPC17xx.h.

__IO uint8_t SCR

Definition at line 387 of file LPC17xx.h.

__IO uint8_t TER

Definition at line 394 of file LPC17xx.h.

__O uint8_t THR

Definition at line 371 of file LPC17xx.h.

The documentation for this struct was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Core/CM3/DeviceSupport/NXP/LPC17xx/LPC17xx.h
Generated on Tue Jun 7 15:00:09 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: LPC_UART1_TypeDef Struct Reference

  • Data Structures
  • Data Fields

LPC_UART1_TypeDef Struct Reference
[LPC17xx System]

Universal Asynchronous Receiver Transmitter 1 (UART1) register structure definition. More...

#include <LPC17xx.h>

Data Fields

union {
__I uint8_t RBR
__O uint8_t THR
__IO uint8_t DLL
uint32_t RESERVED0
};
union {
__IO uint8_t DLM
__IO uint32_t IER
};
union {
__I uint32_t IIR
__O uint8_t FCR
};
__IO uint8_t | LCR
uint8_t | RESERVED1 [3]
__IO uint8_t | MCR
uint8_t | RESERVED2 [3]
__I uint8_t | LSR
uint8_t | RESERVED3 [3]
__I uint8_t | MSR
uint8_t | RESERVED4 [3]
__IO uint8_t | SCR
uint8_t | RESERVED5 [3]
__IO uint32_t | ACR
uint32_t | RESERVED6
__IO uint32_t | FDR
uint32_t | RESERVED7
__IO uint8_t | TER
uint8_t | RESERVED8 [27]
__IO uint8_t | RS485CTRL
uint8_t | RESERVED9 [3]
__IO uint8_t | ADRMATCH
uint8_t | RESERVED10 [3]
__IO uint8_t | RS485DLY
uint8_t | RESERVED11 [3]
__I uint8_t | FIFOLVL

Detailed Description

Universal Asynchronous Receiver Transmitter 1 (UART1) register structure definition.

Definition at line 400 of file LPC17xx.h.

Field Documentation

union { ... }

union { ... }

union { ... }

__IO uint32_t ACR

Definition at line 426 of file LPC17xx.h.

__IO uint8_t ADRMATCH

Definition at line 434 of file LPC17xx.h.

__IO uint8_t DLL

Definition at line 405 of file LPC17xx.h.

__IO uint8_t DLM

Definition at line 409 of file LPC17xx.h.

__O uint8_t FCR

Definition at line 414 of file LPC17xx.h.

__IO uint32_t FDR

Definition at line 428 of file LPC17xx.h.

__I uint8_t FIFOLVL

Definition at line 438 of file LPC17xx.h.

__IO uint32_t IER

Definition at line 410 of file LPC17xx.h.

__I uint32_t IIR

Definition at line 413 of file LPC17xx.h.

__IO uint8_t LCR

Definition at line 416 of file LPC17xx.h.

__I uint8_t LSR

Definition at line 420 of file LPC17xx.h.

__IO uint8_t MCR

Definition at line 418 of file LPC17xx.h.

__I uint8_t MSR

Definition at line 422 of file LPC17xx.h.

__I uint8_t RBR

Definition at line 403 of file LPC17xx.h.

uint32_t RESERVED0

Definition at line 406 of file LPC17xx.h.

uint8_t RESERVED1[3]

Definition at line 417 of file LPC17xx.h.

uint8_t RESERVED10[3]

Definition at line 435 of file LPC17xx.h.

uint8_t RESERVED11[3]

Definition at line 437 of file LPC17xx.h.

uint8_t RESERVED2[3]

Definition at line 419 of file LPC17xx.h.

uint8_t RESERVED3[3]

Definition at line 421 of file LPC17xx.h.

uint8_t RESERVED4[3]

Definition at line 423 of file LPC17xx.h.

uint8_t RESERVED5[3]

Definition at line 425 of file LPC17xx.h.

uint32_t RESERVED6

Definition at line 427 of file LPC17xx.h.

uint32_t RESERVED7

Definition at line 429 of file LPC17xx.h.

uint8_t RESERVED8[27]

Definition at line 431 of file LPC17xx.h.

uint8_t RESERVED9[3]

Definition at line 433 of file LPC17xx.h.

__IO uint8_t RS485CTRL

Definition at line 432 of file LPC17xx.h.

__IO uint8_t RS485DLY

Definition at line 436 of file LPC17xx.h.

__IO uint8_t SCR

Definition at line 424 of file LPC17xx.h.

__IO uint8_t TER

Definition at line 430 of file LPC17xx.h.

__O uint8_t THR

Definition at line 404 of file LPC17xx.h.

The documentation for this struct was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Core/CM3/DeviceSupport/NXP/LPC17xx/LPC17xx.h
Generated on Tue Jun 7 15:00:09 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: LPC_UART_TypeDef Struct Reference

  • Data Structures
  • Data Fields

LPC_UART_TypeDef Struct Reference
[LPC17xx System]

Universal Asynchronous Receiver Transmitter (UART) register structure definition. More...

#include <LPC17xx.h>

Data Fields

union {
__I uint8_t RBR
__O uint8_t THR
__IO uint8_t DLL
uint32_t RESERVED0
};
union {
__IO uint8_t DLM
__IO uint32_t IER
};
union {
__I uint32_t IIR
__O uint8_t FCR
};
__IO uint8_t | LCR
uint8_t | RESERVED1 [7]
__I uint8_t | LSR
uint8_t | RESERVED2 [7]
__IO uint8_t | SCR
uint8_t | RESERVED3 [3]
__IO uint32_t | ACR
__IO uint8_t | ICR
uint8_t | RESERVED4 [3]
__IO uint8_t | FDR
uint8_t | RESERVED5 [7]
__IO uint8_t | TER
uint8_t | RESERVED6 [39]
__I uint8_t | FIFOLVL

Detailed Description

Universal Asynchronous Receiver Transmitter (UART) register structure definition.

Definition at line 334 of file LPC17xx.h.

Field Documentation

union { ... }

union { ... }

union { ... }

__IO uint32_t ACR

Definition at line 356 of file LPC17xx.h.

__IO uint8_t DLL

Definition at line 339 of file LPC17xx.h.

__IO uint8_t DLM

Definition at line 343 of file LPC17xx.h.

__O uint8_t FCR

Definition at line 348 of file LPC17xx.h.

__IO uint8_t FDR

Definition at line 359 of file LPC17xx.h.

__I uint8_t FIFOLVL

Definition at line 363 of file LPC17xx.h.

__IO uint8_t ICR

Definition at line 357 of file LPC17xx.h.

__IO uint32_t IER

Definition at line 344 of file LPC17xx.h.

__I uint32_t IIR

Definition at line 347 of file LPC17xx.h.

__IO uint8_t LCR

Definition at line 350 of file LPC17xx.h.

__I uint8_t LSR

Definition at line 352 of file LPC17xx.h.

__I uint8_t RBR

Definition at line 337 of file LPC17xx.h.

uint32_t RESERVED0

Definition at line 340 of file LPC17xx.h.

uint8_t RESERVED1[7]

Definition at line 351 of file LPC17xx.h.

uint8_t RESERVED2[7]

Definition at line 353 of file LPC17xx.h.

uint8_t RESERVED3[3]

Definition at line 355 of file LPC17xx.h.

uint8_t RESERVED4[3]

Definition at line 358 of file LPC17xx.h.

uint8_t RESERVED5[7]

Definition at line 360 of file LPC17xx.h.

uint8_t RESERVED6[39]

Definition at line 362 of file LPC17xx.h.

__IO uint8_t SCR

Definition at line 354 of file LPC17xx.h.

__IO uint8_t TER

Definition at line 361 of file LPC17xx.h.

__O uint8_t THR

Definition at line 338 of file LPC17xx.h.

The documentation for this struct was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Core/CM3/DeviceSupport/NXP/LPC17xx/LPC17xx.h
Generated on Tue Jun 7 15:00:09 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: LPC_USB_TypeDef Struct Reference

  • Data Structures
  • Data Fields

LPC_USB_TypeDef Struct Reference
[LPC17xx System]

Universal Serial Bus (USB) register structure definition. More...

#include <LPC17xx.h>

Data Fields

__I uint32_t | HcRevision
__IO uint32_t | HcControl
__IO uint32_t | HcCommandStatus
__IO uint32_t | HcInterruptStatus
__IO uint32_t | HcInterruptEnable
__IO uint32_t | HcInterruptDisable
__IO uint32_t | HcHCCA
__I uint32_t | HcPeriodCurrentED
__IO uint32_t | HcControlHeadED
__IO uint32_t | HcControlCurrentED
__IO uint32_t | HcBulkHeadED
__IO uint32_t | HcBulkCurrentED
__I uint32_t | HcDoneHead
__IO uint32_t | HcFmInterval
__I uint32_t | HcFmRemaining
__I uint32_t | HcFmNumber
__IO uint32_t | HcPeriodicStart
__IO uint32_t | HcLSTreshold
__IO uint32_t | HcRhDescriptorA
__IO uint32_t | HcRhDescriptorB
__IO uint32_t | HcRhStatus
__IO uint32_t | HcRhPortStatus1
__IO uint32_t | HcRhPortStatus2
uint32_t | RESERVED0 [40]
__I uint32_t | Module_ID
__I uint32_t | OTGIntSt
__IO uint32_t | OTGIntEn
__O uint32_t | OTGIntSet
__O uint32_t | OTGIntClr
__IO uint32_t | OTGStCtrl
__IO uint32_t | OTGTmr
uint32_t | RESERVED1 [58]
__I uint32_t | USBDevIntSt
__IO uint32_t | USBDevIntEn
__O uint32_t | USBDevIntClr
__O uint32_t | USBDevIntSet
__O uint32_t | USBCmdCode
__I uint32_t | USBCmdData
__I uint32_t | USBRxData
__O uint32_t | USBTxData
__I uint32_t | USBRxPLen
__O uint32_t | USBTxPLen
__IO uint32_t | USBCtrl
__O uint32_t | USBDevIntPri
__I uint32_t | USBEpIntSt
__IO uint32_t | USBEpIntEn
__O uint32_t | USBEpIntClr
__O uint32_t | USBEpIntSet
__O uint32_t | USBEpIntPri
__IO uint32_t | USBReEp
__O uint32_t | USBEpInd
__IO uint32_t | USBMaxPSize
__I uint32_t | USBDMARSt
__O uint32_t | USBDMARClr
__O uint32_t | USBDMARSet
uint32_t | RESERVED2 [9]
__IO uint32_t | USBUDCAH
__I uint32_t | USBEpDMASt
__O uint32_t | USBEpDMAEn
__O uint32_t | USBEpDMADis
__I uint32_t | USBDMAIntSt
__IO uint32_t | USBDMAIntEn
uint32_t | RESERVED3 [2]
__I uint32_t | USBEoTIntSt
__O uint32_t | USBEoTIntClr
__O uint32_t | USBEoTIntSet
__I uint32_t | USBNDDRIntSt
__O uint32_t | USBNDDRIntClr
__O uint32_t | USBNDDRIntSet
__I uint32_t | USBSysErrIntSt
__O uint32_t | USBSysErrIntClr
__O uint32_t | USBSysErrIntSet
uint32_t | RESERVED4 [15]
union {
__I uint32_t I2C_RX
__O uint32_t I2C_TX
};
__I uint32_t | I2C_STS
__IO uint32_t | I2C_CTL
__IO uint32_t | I2C_CLKHI
__O uint32_t | I2C_CLKLO
uint32_t | RESERVED5 [824]
union {
__IO uint32_t USBClkCtrl
__IO uint32_t OTGClkCtrl
};
union {
__I uint32_t USBClkSt
__I uint32_t OTGClkSt
};

Detailed Description

Universal Serial Bus (USB) register structure definition.

Definition at line 780 of file LPC17xx.h.

Field Documentation

union { ... }

union { ... }

union { ... }

__IO uint32_t HcBulkCurrentED

Definition at line 793 of file LPC17xx.h.

__IO uint32_t HcBulkHeadED

Definition at line 792 of file LPC17xx.h.

__IO uint32_t HcCommandStatus

Definition at line 784 of file LPC17xx.h.

__IO uint32_t HcControl

Definition at line 783 of file LPC17xx.h.

__IO uint32_t HcControlCurrentED

Definition at line 791 of file LPC17xx.h.

__IO uint32_t HcControlHeadED

Definition at line 790 of file LPC17xx.h.

__I uint32_t HcDoneHead

Definition at line 794 of file LPC17xx.h.

__IO uint32_t HcFmInterval

Definition at line 795 of file LPC17xx.h.

__I uint32_t HcFmNumber

Definition at line 797 of file LPC17xx.h.

__I uint32_t HcFmRemaining

Definition at line 796 of file LPC17xx.h.

__IO uint32_t HcHCCA

Definition at line 788 of file LPC17xx.h.

__IO uint32_t HcInterruptDisable

Definition at line 787 of file LPC17xx.h.

__IO uint32_t HcInterruptEnable

Definition at line 786 of file LPC17xx.h.

__IO uint32_t HcInterruptStatus

Definition at line 785 of file LPC17xx.h.

__IO uint32_t HcLSTreshold

Definition at line 799 of file LPC17xx.h.

__I uint32_t HcPeriodCurrentED

Definition at line 789 of file LPC17xx.h.

__IO uint32_t HcPeriodicStart

Definition at line 798 of file LPC17xx.h.

__I uint32_t HcRevision

Definition at line 782 of file LPC17xx.h.

__IO uint32_t HcRhDescriptorA

Definition at line 800 of file LPC17xx.h.

__IO uint32_t HcRhDescriptorB

Definition at line 801 of file LPC17xx.h.

__IO uint32_t HcRhPortStatus1

Definition at line 803 of file LPC17xx.h.

__IO uint32_t HcRhPortStatus2

Definition at line 804 of file LPC17xx.h.

__IO uint32_t HcRhStatus

Definition at line 802 of file LPC17xx.h.

__IO uint32_t I2C_CLKHI

Definition at line 869 of file LPC17xx.h.

__O uint32_t I2C_CLKLO

Definition at line 870 of file LPC17xx.h.

__IO uint32_t I2C_CTL

Definition at line 868 of file LPC17xx.h.

__I uint32_t I2C_RX

Definition at line 864 of file LPC17xx.h.

__I uint32_t I2C_STS

Definition at line 867 of file LPC17xx.h.

__O uint32_t I2C_TX

Definition at line 865 of file LPC17xx.h.

__I uint32_t Module_ID

Definition at line 806 of file LPC17xx.h.

__IO uint32_t OTGClkCtrl

Definition at line 875 of file LPC17xx.h.

__I uint32_t OTGClkSt

Definition at line 879 of file LPC17xx.h.

__O uint32_t OTGIntClr

Definition at line 811 of file LPC17xx.h.

__IO uint32_t OTGIntEn

Definition at line 809 of file LPC17xx.h.

__O uint32_t OTGIntSet

Definition at line 810 of file LPC17xx.h.

__I uint32_t OTGIntSt

Definition at line 808 of file LPC17xx.h.

__IO uint32_t OTGStCtrl

Definition at line 812 of file LPC17xx.h.

__IO uint32_t OTGTmr

Definition at line 813 of file LPC17xx.h.

uint32_t RESERVED0[40]

Definition at line 805 of file LPC17xx.h.

uint32_t RESERVED1[58]

Definition at line 814 of file LPC17xx.h.

uint32_t RESERVED2[9]

Definition at line 844 of file LPC17xx.h.

uint32_t RESERVED3[2]

Definition at line 851 of file LPC17xx.h.

uint32_t RESERVED4[15]

Definition at line 861 of file LPC17xx.h.

uint32_t RESERVED5[824]

Definition at line 871 of file LPC17xx.h.

__IO uint32_t USBClkCtrl

Definition at line 874 of file LPC17xx.h.

__I uint32_t USBClkSt

Definition at line 878 of file LPC17xx.h.

__O uint32_t USBCmdCode

Definition at line 821 of file LPC17xx.h.

__I uint32_t USBCmdData

Definition at line 822 of file LPC17xx.h.

__IO uint32_t USBCtrl

Definition at line 828 of file LPC17xx.h.

__O uint32_t USBDevIntClr

Definition at line 818 of file LPC17xx.h.

__IO uint32_t USBDevIntEn

Definition at line 817 of file LPC17xx.h.

__O uint32_t USBDevIntPri

Definition at line 829 of file LPC17xx.h.

__O uint32_t USBDevIntSet

Definition at line 819 of file LPC17xx.h.

__I uint32_t USBDevIntSt

Definition at line 816 of file LPC17xx.h.

__IO uint32_t USBDMAIntEn

Definition at line 850 of file LPC17xx.h.

__I uint32_t USBDMAIntSt

Definition at line 849 of file LPC17xx.h.

__O uint32_t USBDMARClr

Definition at line 842 of file LPC17xx.h.

__O uint32_t USBDMARSet

Definition at line 843 of file LPC17xx.h.

__I uint32_t USBDMARSt

Definition at line 841 of file LPC17xx.h.

__O uint32_t USBEoTIntClr

Definition at line 853 of file LPC17xx.h.

__O uint32_t USBEoTIntSet

Definition at line 854 of file LPC17xx.h.

__I uint32_t USBEoTIntSt

Definition at line 852 of file LPC17xx.h.

__O uint32_t USBEpDMADis

Definition at line 848 of file LPC17xx.h.

__O uint32_t USBEpDMAEn

Definition at line 847 of file LPC17xx.h.

__I uint32_t USBEpDMASt

Definition at line 846 of file LPC17xx.h.

__O uint32_t USBEpInd

Definition at line 838 of file LPC17xx.h.

__O uint32_t USBEpIntClr

Definition at line 833 of file LPC17xx.h.

__IO uint32_t USBEpIntEn

Definition at line 832 of file LPC17xx.h.

__O uint32_t USBEpIntPri

Definition at line 835 of file LPC17xx.h.

__O uint32_t USBEpIntSet

Definition at line 834 of file LPC17xx.h.

__I uint32_t USBEpIntSt

Definition at line 831 of file LPC17xx.h.

__IO uint32_t USBMaxPSize

Definition at line 839 of file LPC17xx.h.

__O uint32_t USBNDDRIntClr

Definition at line 856 of file LPC17xx.h.

__O uint32_t USBNDDRIntSet

Definition at line 857 of file LPC17xx.h.

__I uint32_t USBNDDRIntSt

Definition at line 855 of file LPC17xx.h.

__IO uint32_t USBReEp

Definition at line 837 of file LPC17xx.h.

__I uint32_t USBRxData

Definition at line 824 of file LPC17xx.h.

__I uint32_t USBRxPLen

Definition at line 826 of file LPC17xx.h.

__O uint32_t USBSysErrIntClr

Definition at line 859 of file LPC17xx.h.

__O uint32_t USBSysErrIntSet

Definition at line 860 of file LPC17xx.h.

__I uint32_t USBSysErrIntSt

Definition at line 858 of file LPC17xx.h.

__O uint32_t USBTxData

Definition at line 825 of file LPC17xx.h.

__O uint32_t USBTxPLen

Definition at line 827 of file LPC17xx.h.

__IO uint32_t USBUDCAH

Definition at line 845 of file LPC17xx.h.

The documentation for this struct was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Core/CM3/DeviceSupport/NXP/LPC17xx/LPC17xx.h
Generated on Tue Jun 7 15:00:10 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: LPC_WDT_TypeDef Struct Reference

  • Data Structures
  • Data Fields

LPC_WDT_TypeDef Struct Reference
[LPC17xx System]

Watchdog Timer (WDT) register structure definition. More...

#include <LPC17xx.h>

Data Fields

__IO uint8_t | WDMOD
uint8_t | RESERVED0 [3]
__IO uint32_t | WDTC
__O uint8_t | WDFEED
uint8_t | RESERVED1 [3]
__I uint32_t | WDTV
__IO uint32_t | WDCLKSEL

Detailed Description

Watchdog Timer (WDT) register structure definition.

Definition at line 583 of file LPC17xx.h.

Field Documentation

uint8_t RESERVED0[3]

Definition at line 586 of file LPC17xx.h.

uint8_t RESERVED1[3]

Definition at line 589 of file LPC17xx.h.

__IO uint32_t WDCLKSEL

Definition at line 591 of file LPC17xx.h.

__O uint8_t WDFEED

Definition at line 588 of file LPC17xx.h.

__IO uint8_t WDMOD

Definition at line 585 of file LPC17xx.h.

__IO uint32_t WDTC

Definition at line 587 of file LPC17xx.h.

__I uint32_t WDTV

Definition at line 590 of file LPC17xx.h.

The documentation for this struct was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Core/CM3/DeviceSupport/NXP/LPC17xx/LPC17xx.h
Generated on Tue Jun 7 15:00:10 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: MCPWM_CAPTURE_CFG_Type Struct Reference

  • Data Structures
  • Data Fields

MCPWM_CAPTURE_CFG_Type Struct Reference
[MCPWM Public Types]

MCPWM Capture Configuration type definition. More...

#include <lpc17xx_mcpwm.h>

Data Fields

uint32_t | captureChannel
uint32_t | captureRising
uint32_t | captureFalling
uint32_t | timerReset
uint32_t | hnfEnable

Detailed Description

MCPWM Capture Configuration type definition.

Definition at line 242 of file lpc17xx_mcpwm.h.

Field Documentation

uint32_t captureChannel

Capture Channel Number, should be in range from 0 to 2

Definition at line 243 of file lpc17xx_mcpwm.h.

uint32_t captureFalling

Enable/Disable Capture on Falling Edge event, should be:

  • ENABLE.
  • DISABLE.

Definition at line 248 of file lpc17xx_mcpwm.h.

uint32_t captureRising

Enable/Disable Capture on Rising Edge event, should be:

  • ENABLE.
  • DISABLE.

Definition at line 244 of file lpc17xx_mcpwm.h.

uint32_t hnfEnable

Enable/Disable Hardware noise filter function, should be:

  • ENABLE.
  • DISABLE.

Definition at line 256 of file lpc17xx_mcpwm.h.

uint32_t timerReset

Enable/Disable Timer reset function an capture, should be:

  • ENABLE.
  • DISABLE.

Definition at line 252 of file lpc17xx_mcpwm.h.

The documentation for this struct was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_mcpwm.h
Generated on Tue Jun 7 15:00:10 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: MCPWM_CHANNEL_CFG_Type Struct Reference

  • Data Structures
  • Data Fields

MCPWM_CHANNEL_CFG_Type Struct Reference
[MCPWM Public Types]

Motor Control PWM Channel Configuration structure type definition. More...

#include <lpc17xx_mcpwm.h>

Data Fields

uint32_t | channelType
uint32_t | channelPolarity
uint32_t | channelDeadtimeEnable
uint32_t | channelDeadtimeValue
uint32_t | channelUpdateEnable
uint32_t | channelTimercounterValue
uint32_t | channelPeriodValue
uint32_t | channelPulsewidthValue

Detailed Description

Motor Control PWM Channel Configuration structure type definition.

Definition at line 214 of file lpc17xx_mcpwm.h.

Field Documentation

uint32_t channelDeadtimeEnable

Enable/Disable DeadTime function for channel, should be:

  • ENABLE.
  • DISABLE.

Definition at line 224 of file lpc17xx_mcpwm.h.

uint32_t channelDeadtimeValue

DeadTime value, should be less than 0x3FF

Definition at line 228 of file lpc17xx_mcpwm.h.

uint32_t channelPeriodValue

MCPWM Period value

Definition at line 235 of file lpc17xx_mcpwm.h.

uint32_t channelPolarity

Polarity of the MCOA and MCOB pins, should be:

  • MCPWM_CHANNEL_PASSIVE_LO: Passive state is LOW, active state is HIGH
  • MCPWM_CHANNEL_PASSIVE_HI: Passive state is HIGH, active state is LOW

Definition at line 220 of file lpc17xx_mcpwm.h.

uint32_t channelPulsewidthValue

MCPWM Pulse Width value

Definition at line 236 of file lpc17xx_mcpwm.h.

uint32_t channelTimercounterValue

MCPWM Timer Counter value

Definition at line 234 of file lpc17xx_mcpwm.h.

uint32_t channelType

Edge/center aligned mode for this channel, should be:

  • MCPWM_CHANNEL_EDGE_MODE: Channel is in Edge mode
  • MCPWM_CHANNEL_CENTER_MODE: Channel is in Center mode

Definition at line 215 of file lpc17xx_mcpwm.h.

uint32_t channelUpdateEnable

Enable/Disable updates of functional registers, should be:

  • ENABLE.
  • DISABLE.

Definition at line 229 of file lpc17xx_mcpwm.h.

The documentation for this struct was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_mcpwm.h
Generated on Tue Jun 7 15:00:10 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: MCPWM_COUNT_CFG_Type Struct Reference

  • Data Structures
  • Data Fields

MCPWM_COUNT_CFG_Type Struct Reference
[MCPWM Public Types]

MCPWM Count Control Configuration type definition. More...

#include <lpc17xx_mcpwm.h>

Data Fields

uint32_t | counterChannel
uint32_t | countRising
uint32_t | countFalling

Detailed Description

MCPWM Count Control Configuration type definition.

Definition at line 266 of file lpc17xx_mcpwm.h.

Field Documentation

uint32_t counterChannel

Counter Channel Number, should be in range from 0 to 2

Definition at line 267 of file lpc17xx_mcpwm.h.

uint32_t countFalling

Enable/Disable Capture on Falling Edge event, should be:

  • ENABLE.
  • DISABLE.

Definition at line 272 of file lpc17xx_mcpwm.h.

uint32_t countRising

Enable/Disable Capture on Rising Edge event, should be:

  • ENABLE.
  • DISABLE.

Definition at line 268 of file lpc17xx_mcpwm.h.

The documentation for this struct was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_mcpwm.h
Generated on Tue Jun 7 15:00:11 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: namemap Struct Reference

  • Data Structures
  • Data Fields

namemap Struct Reference
[DNS resolver]

Data Fields

u8_t state
u8_t tmr
u8_t retries
u8_t seqno
u8_t err
char name [32]
uip_ipaddr_t ipaddr

Detailed Description

Definition at line 111 of file resolv.c.

Field Documentation

u8_t err

Definition at line 121 of file resolv.c.

uip_ipaddr_t ipaddr

Definition at line 123 of file resolv.c.

char name[32]

Definition at line 122 of file resolv.c.

u8_t retries

Definition at line 119 of file resolv.c.

u8_t seqno

Definition at line 120 of file resolv.c.

u8_t state

Definition at line 117 of file resolv.c.

u8_t tmr

Definition at line 118 of file resolv.c.

The documentation for this struct was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/resolv/resolv.c
Generated on Tue Jun 7 15:00:11 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: neighbor_entry Struct Reference

  • Data Structures
  • Data Fields

neighbor_entry Struct Reference

Data Fields

uip_ipaddr_t ipaddr
struct uip_neighbor_addr addr
u8_t time

Detailed Description

Definition at line 55 of file uip-neighbor.c.

Field Documentation

struct uip_neighbor_addr addr [read]

Definition at line 57 of file uip-neighbor.c.

uip_ipaddr_t ipaddr

Definition at line 56 of file uip-neighbor.c.

u8_t time

Definition at line 58 of file uip-neighbor.c.

The documentation for this struct was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/uip/uip-neighbor.c
Generated on Tue Jun 7 15:00:11 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: NVIC_Type Struct Reference

  • Data Structures
  • Data Fields

NVIC_Type Struct Reference
[CMSIS NVIC]

Structure type to access the Nested Vectored Interrupt Controller (NVIC). More...

#include <core_cm3.h>

Data Fields

__IO uint32_t | ISER [8]
uint32_t | RESERVED0 [24]
__IO uint32_t | ICER [8]
uint32_t | RSERVED1 [24]
__IO uint32_t | ISPR [8]
uint32_t | RESERVED2 [24]
__IO uint32_t | ICPR [8]
uint32_t | RESERVED3 [24]
__IO uint32_t | IABR [8]
uint32_t | RESERVED4 [56]
__IO uint8_t | IP [240]
uint32_t | RESERVED5 [644]
__O uint32_t | STIR

Detailed Description

Structure type to access the Nested Vectored Interrupt Controller (NVIC).

Definition at line 215 of file core_cm3.h.

Field Documentation

__IO uint32_t IABR[8]

Offset: 0x200 (R/W) Interrupt Active bit Register

Definition at line 225 of file core_cm3.h.

__IO uint32_t ICER[8]

Offset: 0x080 (R/W) Interrupt Clear Enable Register

Definition at line 219 of file core_cm3.h.

__IO uint32_t ICPR[8]

Offset: 0x180 (R/W) Interrupt Clear Pending Register

Definition at line 223 of file core_cm3.h.

__IO uint8_t IP[240]

Offset: 0x300 (R/W) Interrupt Priority Register (8Bit wide)

Definition at line 227 of file core_cm3.h.

__IO uint32_t ISER[8]

Offset: 0x000 (R/W) Interrupt Set Enable Register

Definition at line 217 of file core_cm3.h.

__IO uint32_t ISPR[8]

Offset: 0x100 (R/W) Interrupt Set Pending Register

Definition at line 221 of file core_cm3.h.

uint32_t RESERVED0[24]

Definition at line 218 of file core_cm3.h.

uint32_t RESERVED2[24]

Definition at line 222 of file core_cm3.h.

uint32_t RESERVED3[24]

Definition at line 224 of file core_cm3.h.

uint32_t RESERVED4[56]

Definition at line 226 of file core_cm3.h.

uint32_t RESERVED5[644]

Definition at line 228 of file core_cm3.h.

uint32_t RSERVED1[24]

Definition at line 220 of file core_cm3.h.

__O uint32_t STIR

Offset: 0xE00 ( /W) Software Trigger Interrupt Register

Definition at line 229 of file core_cm3.h.

The documentation for this struct was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Core/CM3/CoreSupport/core_cm3.h
Generated on Tue Jun 7 15:00:11 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: PINSEL_CFG_Type Struct Reference

  • Data Structures
  • Data Fields

PINSEL_CFG_Type Struct Reference
[PINSEL Public Types]

Pin configuration structure. More...

#include <lpc17xx_pinsel.h>

Data Fields

uint8_t | Portnum
uint8_t | Pinnum
uint8_t | Funcnum
uint8_t | Pinmode
uint8_t | OpenDrain

Detailed Description

Pin configuration structure.

Definition at line 149 of file lpc17xx_pinsel.h.

Field Documentation

uint8_t Funcnum

Function Number, should be PINSEL_FUNC_x, where x should be in range from 0 to 3

Definition at line 155 of file lpc17xx_pinsel.h.

uint8_t OpenDrain

OpenDrain mode, should be:

  • PINSEL_PINMODE_NORMAL: Pin is in the normal (not open drain) mode
  • PINSEL_PINMODE_OPENDRAIN: Pin is in the open drain mode

Definition at line 161 of file lpc17xx_pinsel.h.

uint8_t Pinmode

Pin Mode, should be:

  • PINSEL_PINMODE_PULLUP: Internal pull-up resistor
  • PINSEL_PINMODE_TRISTATE: Tri-state
  • PINSEL_PINMODE_PULLDOWN: Internal pull-down resistor

Definition at line 157 of file lpc17xx_pinsel.h.

uint8_t Pinnum

Pin Number, should be PINSEL_PIN_x, where x should be in range from 0 to 31

Definition at line 153 of file lpc17xx_pinsel.h.

uint8_t Portnum

Port Number, should be PINSEL_PORT_x, where x should be in range from 0 to 4

Definition at line 151 of file lpc17xx_pinsel.h.

The documentation for this struct was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_pinsel.h
Generated on Tue Jun 7 15:00:11 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: psock Struct Reference

  • Data Structures
  • Data Fields

psock Struct Reference
[Protosockets library]

#include <psock.h>

Data Fields

struct pt pt | psockpt
const u8_t * | sendptr
u8_t * readptr
char * | bufptr
u16_t sendlen
u16_t readlen
struct psock_buf | buf
unsigned int | bufsize
unsigned char | state

Detailed Description

The representation of a protosocket.

The protosocket structrure is an opaque structure with no user-visible elements.

Definition at line 110 of file psock.h.

Field Documentation

struct pt pt psockpt [read]

Definition at line 111 of file psock.h.

The documentation for this struct was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/uip/psock.h
Generated on Tue Jun 7 15:00:11 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: psock_buf Struct Reference

  • Data Structures
  • Data Fields

psock_buf Struct Reference
[Protosockets library]

#include <psock.h>

Data Fields

u8_t * ptr
unsigned short left

Detailed Description

Definition at line 99 of file psock.h.

Field Documentation

u8_t* ptr

Definition at line 100 of file psock.h.

The documentation for this struct was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/uip/psock.h
Generated on Tue Jun 7 15:00:11 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: pt Struct Reference

  • Data Structures
  • Data Fields

pt Struct Reference
[Pt]

#include <pt.h>

Data Fields

lc_t lc

Detailed Description

Definition at line 54 of file pt.h.

Field Documentation

lc_t lc

Definition at line 55 of file pt.h.

The documentation for this struct was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/uip/pt.h
Generated on Tue Jun 7 15:00:11 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: ptentry Struct Reference

  • Data Structures
  • Data Fields

ptentry Struct Reference

Data Fields

char * | commandstr
void(* | pfunc )(char *str)

Detailed Description

Definition at line 39 of file shell.c.

Field Documentation

char* commandstr

Definition at line 40 of file shell.c.

void(* pfunc)(char *str)

The documentation for this struct was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/telnetd/shell.c
Generated on Tue Jun 7 15:00:11 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: PWM_CAPTURECFG_Type Struct Reference

  • Data Structures
  • Data Fields

PWM_CAPTURECFG_Type Struct Reference
[PWM Public Types]

PWM Capture Input configuration structure. More...

#include <lpc17xx_pwm.h>

Data Fields

uint8_t | CaptureChannel
uint8_t | RisingEdge
uint8_t | FallingEdge
uint8_t | IntOnCaption

Detailed Description

PWM Capture Input configuration structure.

Definition at line 202 of file lpc17xx_pwm.h.

Field Documentation

uint8_t CaptureChannel

Capture channel, should be in range from 0..1

Definition at line 203 of file lpc17xx_pwm.h.

uint8_t FallingEdge

caption falling edge, should be:

  • ENABLE: Enable falling edge.
  • DISABLE: Disable this function.

Definition at line 209 of file lpc17xx_pwm.h.

uint8_t IntOnCaption

Interrupt On caption, should be:

  • ENABLE: Enable interrupt function.
  • DISABLE: Disable this function.

Definition at line 213 of file lpc17xx_pwm.h.

uint8_t RisingEdge

caption rising edge, should be:

  • ENABLE: Enable rising edge.
  • DISABLE: Disable this function.

Definition at line 205 of file lpc17xx_pwm.h.

The documentation for this struct was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_pwm.h
Generated on Tue Jun 7 15:00:11 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: PWM_COUNTERCFG_Type Struct Reference

  • Data Structures
  • Data Fields

PWM_COUNTERCFG_Type Struct Reference
[PWM Public Types]

Configuration structure in PWM COUNTER mode. More...

#include <lpc17xx_pwm.h>

Data Fields

uint8_t | CounterOption
uint8_t | CountInputSelect
uint8_t | Reserved [2]

Detailed Description

Configuration structure in PWM COUNTER mode.

Definition at line 168 of file lpc17xx_pwm.h.

Field Documentation

uint8_t CounterOption

Counter Option, should be:

  • PWM_COUNTER_RISING: Rising Edge
  • PWM_COUNTER_FALLING: Falling Edge
  • PWM_COUNTER_ANY: Both rising and falling mode

Definition at line 170 of file lpc17xx_pwm.h.

uint8_t CountInputSelect

Counter input select, should be:

  • PWM_COUNTER_PCAP1_0: PWM Counter input selected is PCAP1.0 pin
  • PWM_COUNTER_PCAP1_1: PWM Counter input selected is PCAP1.1 pin

Definition at line 175 of file lpc17xx_pwm.h.

uint8_t Reserved[2]

Definition at line 179 of file lpc17xx_pwm.h.

The documentation for this struct was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_pwm.h
Generated on Tue Jun 7 15:00:11 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: PWM_Match_T Struct Reference

  • Data Structures
  • Data Fields

PWM_Match_T Struct Reference
[PWM Public Types]

Match update structure. More...

#include <lpc17xx_pwm.h>

Data Fields

uint32_t Matchvalue
FlagStatus Status

Detailed Description

Match update structure.

Definition at line 295 of file lpc17xx_pwm.h.

Field Documentation

uint32_t Matchvalue

Definition at line 297 of file lpc17xx_pwm.h.

FlagStatus Status

Definition at line 298 of file lpc17xx_pwm.h.

The documentation for this struct was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_pwm.h
Generated on Tue Jun 7 15:00:11 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: PWM_MATCHCFG_Type Struct Reference

  • Data Structures
  • Data Fields

PWM_MATCHCFG_Type Struct Reference
[PWM Public Types]

PWM Match channel configuration structure. More...

#include <lpc17xx_pwm.h>

Data Fields

uint8_t | MatchChannel
uint8_t | IntOnMatch
uint8_t | StopOnMatch
uint8_t | ResetOnMatch

Detailed Description

PWM Match channel configuration structure.

Definition at line 183 of file lpc17xx_pwm.h.

Field Documentation

uint8_t IntOnMatch

Interrupt On match, should be:

  • ENABLE: Enable this function.
  • DISABLE: Disable this function.

Definition at line 186 of file lpc17xx_pwm.h.

uint8_t MatchChannel

Match channel, should be in range from 0..6

Definition at line 184 of file lpc17xx_pwm.h.

uint8_t ResetOnMatch

Reset On match, should be:

  • ENABLE: Enable this function.
  • DISABLE: Disable this function.

Definition at line 194 of file lpc17xx_pwm.h.

uint8_t StopOnMatch

Stop On match, should be:

  • ENABLE: Enable this function.
  • DISABLE: Disable this function.

Definition at line 190 of file lpc17xx_pwm.h.

The documentation for this struct was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_pwm.h
Generated on Tue Jun 7 15:00:11 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: PWM_TIMERCFG_Type Struct Reference

  • Data Structures
  • Data Fields

PWM_TIMERCFG_Type Struct Reference
[PWM Public Types]

Configuration structure in PWM TIMER mode. More...

#include <lpc17xx_pwm.h>

Data Fields

uint8_t | PrescaleOption
uint8_t | Reserved [3]
uint32_t | PrescaleValue

Detailed Description

Configuration structure in PWM TIMER mode.

Definition at line 155 of file lpc17xx_pwm.h.

Field Documentation

uint8_t PrescaleOption

Prescale option, should be:

  • PWM_TIMER_PRESCALE_TICKVAL: Prescale in absolute value
  • PWM_TIMER_PRESCALE_USVAL: Prescale in microsecond value

Definition at line 157 of file lpc17xx_pwm.h.

uint32_t PrescaleValue

Prescale value, 32-bit long, should be matched with PrescaleOption

Definition at line 162 of file lpc17xx_pwm.h.

uint8_t Reserved[3]

Definition at line 161 of file lpc17xx_pwm.h.

The documentation for this struct was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_pwm.h
Generated on Tue Jun 7 15:00:11 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: QEI_CFG_Type Struct Reference

  • Data Structures
  • Data Fields

QEI_CFG_Type Struct Reference
[QEI Public Types]

QEI Configuration structure type definition. More...

#include <lpc17xx_qei.h>

Data Fields

uint32_t | DirectionInvert:1
uint32_t | SignalMode:1
uint32_t | CaptureMode:1
uint32_t | InvertIndex:1

Detailed Description

QEI Configuration structure type definition.

Definition at line 334 of file lpc17xx_qei.h.

Field Documentation

uint32_t CaptureMode

Capture Mode Option:

  • QEI_CAPMODE_2X: Only Phase-A edges are counted (2X)
  • QEI_CAPMODE_4X: BOTH Phase-A and Phase-B edges are counted (4X)

Definition at line 343 of file lpc17xx_qei.h.

uint32_t DirectionInvert

Direction invert option:

  • QEI_DIRINV_NONE: QEI Direction is normal
  • QEI_DIRINV_CMPL: QEI Direction is complemented

Definition at line 335 of file lpc17xx_qei.h.

uint32_t InvertIndex

Invert Index Option:

  • QEI_INVINX_NONE: the sense of the index input is normal
  • QEI_INVINX_EN: inverts the sense of the index input

Definition at line 347 of file lpc17xx_qei.h.

uint32_t SignalMode

Signal mode Option:

  • QEI_SIGNALMODE_QUAD: Signal is in Quadrature phase mode
  • QEI_SIGNALMODE_CLKDIR: Signal is in Clock/Direction mode

Definition at line 339 of file lpc17xx_qei.h.

The documentation for this struct was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_qei.h
Generated on Tue Jun 7 15:00:11 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: QEI_CFGOPT_Type Union Reference

  • Data Structures
  • Data Fields

QEI_CFGOPT_Type Union Reference
[QEI Private Types]

QEI configuration union type definition. More...

Data Fields

QEI_CFG_Type bmQEIConfig
uint32_t ulQEIConfig

Detailed Description

QEI configuration union type definition.

Definition at line 57 of file lpc17xx_qei.c.

Field Documentation

QEI_CFG_Type bmQEIConfig

Definition at line 58 of file lpc17xx_qei.c.

uint32_t ulQEIConfig

Definition at line 59 of file lpc17xx_qei.c.

The documentation for this union was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Drivers/source/lpc17xx_qei.c
Generated on Tue Jun 7 15:00:11 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: QEI_RELOADCFG_Type Struct Reference

  • Data Structures
  • Data Fields

QEI_RELOADCFG_Type Struct Reference
[QEI Public Types]

Timer Reload Configuration structure type definition. More...

#include <lpc17xx_qei.h>

Data Fields

uint8_t | ReloadOption
uint8_t | Reserved [3]
uint32_t | ReloadValue

Detailed Description

Timer Reload Configuration structure type definition.

Definition at line 356 of file lpc17xx_qei.h.

Field Documentation

uint8_t ReloadOption

Velocity Timer Reload Option, should be:

  • QEI_TIMERRELOAD_TICKVAL: Reload value in absolute value
  • QEI_TIMERRELOAD_USVAL: Reload value in microsecond value

Definition at line 358 of file lpc17xx_qei.h.

uint32_t ReloadValue

Velocity Timer Reload Value, 32-bit long, should be matched with Velocity Timer Reload Option

Definition at line 363 of file lpc17xx_qei.h.

uint8_t Reserved[3]

Definition at line 362 of file lpc17xx_qei.h.

The documentation for this struct was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_qei.h
Generated on Tue Jun 7 15:00:11 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: RTC_TIME_Type Struct Reference

  • Data Structures
  • Data Fields

RTC_TIME_Type Struct Reference
[RTC Public Types]

Time structure definitions for easy manipulate the data. More...

#include <lpc17xx_rtc.h>

Data Fields

uint32_t | SEC
uint32_t | MIN
uint32_t | HOUR
uint32_t | DOM
uint32_t | DOW
uint32_t | DOY
uint32_t | MONTH
uint32_t | YEAR

Detailed Description

Time structure definitions for easy manipulate the data.

Definition at line 230 of file lpc17xx_rtc.h.

Field Documentation

uint32_t DOM

Day of Month Register

Definition at line 234 of file lpc17xx_rtc.h.

uint32_t DOW

Day of Week Register

Definition at line 235 of file lpc17xx_rtc.h.

uint32_t DOY

Day of Year Register

Definition at line 236 of file lpc17xx_rtc.h.

uint32_t HOUR

Hours Register

Definition at line 233 of file lpc17xx_rtc.h.

uint32_t MIN

Minutes Register

Definition at line 232 of file lpc17xx_rtc.h.

uint32_t MONTH

Months Register

Definition at line 237 of file lpc17xx_rtc.h.

uint32_t SEC

Seconds Register

Definition at line 231 of file lpc17xx_rtc.h.

uint32_t YEAR

Years Register

Definition at line 238 of file lpc17xx_rtc.h.

The documentation for this struct was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_rtc.h
Generated on Tue Jun 7 15:00:11 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: RX_Desc Struct Reference

  • Data Structures
  • Data Fields

RX_Desc Struct Reference
[EMAC Public Types]

RX Descriptor structure type definition. More...

#include <lpc17xx_emac.h>

Data Fields

uint32_t | Packet
uint32_t | Ctrl

Detailed Description

RX Descriptor structure type definition.

Definition at line 597 of file lpc17xx_emac.h.

Field Documentation

uint32_t Ctrl

Receive Control Descriptor

Definition at line 599 of file lpc17xx_emac.h.

uint32_t Packet

Receive Packet Descriptor

Definition at line 598 of file lpc17xx_emac.h.

The documentation for this struct was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_emac.h
Generated on Tue Jun 7 15:00:12 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: RX_Stat Struct Reference

  • Data Structures
  • Data Fields

RX_Stat Struct Reference
[EMAC Public Types]

RX Status structure type definition. More...

#include <lpc17xx_emac.h>

Data Fields

uint32_t | Info
uint32_t | HashCRC

Detailed Description

RX Status structure type definition.

Definition at line 605 of file lpc17xx_emac.h.

Field Documentation

uint32_t HashCRC

Receive Hash CRC Status

Definition at line 607 of file lpc17xx_emac.h.

uint32_t Info

Receive Information Status

Definition at line 606 of file lpc17xx_emac.h.

The documentation for this struct was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_emac.h
Generated on Tue Jun 7 15:00:12 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: SCB_Type Struct Reference

  • Data Structures
  • Data Fields

SCB_Type Struct Reference
[CMSIS SCB]

Structure type to access the System Control Block (SCB). More...

#include <core_cm3.h>

Data Fields

__I uint32_t | CPUID
__IO uint32_t | ICSR
__IO uint32_t | VTOR
__IO uint32_t | AIRCR
__IO uint32_t | SCR
__IO uint32_t | CCR
__IO uint8_t | SHP [12]
__IO uint32_t | SHCSR
__IO uint32_t | CFSR
__IO uint32_t | HFSR
__IO uint32_t | DFSR
__IO uint32_t | MMFAR
__IO uint32_t | BFAR
__IO uint32_t | AFSR
__I uint32_t | PFR [2]
__I uint32_t | DFR
__I uint32_t | ADR
__I uint32_t | MMFR [4]
__I uint32_t | ISAR [5]

Detailed Description

Structure type to access the System Control Block (SCB).

Definition at line 243 of file core_cm3.h.

Field Documentation

__I uint32_t ADR

Offset: 0x04C (R/ ) Auxiliary Feature Register

Definition at line 261 of file core_cm3.h.

__IO uint32_t AFSR

Offset: 0x03C (R/W) Auxiliary Fault Status Register

Definition at line 258 of file core_cm3.h.

__IO uint32_t AIRCR

Offset: 0x00C (R/W) Application Interrupt / Reset Control Register

Definition at line 248 of file core_cm3.h.

__IO uint32_t BFAR

Offset: 0x038 (R/W) Bus Fault Address Register

Definition at line 257 of file core_cm3.h.

__IO uint32_t CCR

Offset: 0x014 (R/W) Configuration Control Register

Definition at line 250 of file core_cm3.h.

__IO uint32_t CFSR

Offset: 0x028 (R/W) Configurable Fault Status Register

Definition at line 253 of file core_cm3.h.

__I uint32_t CPUID

Offset: 0x000 (R/ ) CPU ID Base Register

Definition at line 245 of file core_cm3.h.

__I uint32_t DFR

Offset: 0x048 (R/ ) Debug Feature Register

Definition at line 260 of file core_cm3.h.

__IO uint32_t DFSR

Offset: 0x030 (R/W) Debug Fault Status Register

Definition at line 255 of file core_cm3.h.

__IO uint32_t HFSR

Offset: 0x02C (R/W) Hard Fault Status Register

Definition at line 254 of file core_cm3.h.

__IO uint32_t ICSR

Offset: 0x004 (R/W) Interrupt Control State Register

Definition at line 246 of file core_cm3.h.

__I uint32_t ISAR[5]

Offset: 0x060 (R/ ) ISA Feature Register

Definition at line 263 of file core_cm3.h.

__IO uint32_t MMFAR

Offset: 0x034 (R/W) Mem Manage Address Register

Definition at line 256 of file core_cm3.h.

__I uint32_t MMFR[4]

Offset: 0x050 (R/ ) Memory Model Feature Register

Definition at line 262 of file core_cm3.h.

__I uint32_t PFR[2]

Offset: 0x040 (R/ ) Processor Feature Register

Definition at line 259 of file core_cm3.h.

__IO uint32_t SCR

Offset: 0x010 (R/W) System Control Register

Definition at line 249 of file core_cm3.h.

__IO uint32_t SHCSR

Offset: 0x024 (R/W) System Handler Control and State Register

Definition at line 252 of file core_cm3.h.

__IO uint8_t SHP[12]

Offset: 0x018 (R/W) System Handlers Priority Registers (4-7, 8-11, 12-15)

Definition at line 251 of file core_cm3.h.

__IO uint32_t VTOR

Offset: 0x008 (R/W) Vector Table Offset Register

Definition at line 247 of file core_cm3.h.

The documentation for this struct was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Core/CM3/CoreSupport/core_cm3.h
Generated on Tue Jun 7 15:00:12 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: SFF_Entry Struct Reference

  • Data Structures
  • Data Fields

SFF_Entry Struct Reference
[CAN Public Types]

Standard ID Frame Format Entry structure. More...

#include <lpc17xx_can.h>

Data Fields

uint8_t | controller
uint8_t | disable
uint16_t | id_11

Detailed Description

Standard ID Frame Format Entry structure.

Definition at line 724 of file lpc17xx_can.h.

Field Documentation

uint8_t controller

CAN Controller, should be:

  • CAN1_CTRL: CAN1 Controller
  • CAN2_CTRL: CAN2 Controller

Definition at line 725 of file lpc17xx_can.h.

uint8_t disable

Disable bit, should be:

  • MSG_ENABLE: disable bit = 0
  • MSG_DISABLE: disable bit = 1

Definition at line 729 of file lpc17xx_can.h.

uint16_t id_11

Standard ID, should be 11-bit value

Definition at line 733 of file lpc17xx_can.h.

The documentation for this struct was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_can.h
Generated on Tue Jun 7 15:00:12 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: SFF_GPR_Entry Struct Reference

  • Data Structures
  • Data Fields

SFF_GPR_Entry Struct Reference
[CAN Public Types]

Group of Standard ID Frame Format Entry structure. More...

#include <lpc17xx_can.h>

Data Fields

uint8_t | controller1
uint8_t | disable1
uint16_t | lowerID
uint8_t | controller2
uint8_t | disable2
uint16_t | upperID

Detailed Description

Group of Standard ID Frame Format Entry structure.

Definition at line 739 of file lpc17xx_can.h.

Field Documentation

uint8_t controller1

First CAN Controller, should be:

  • CAN1_CTRL: CAN1 Controller
  • CAN2_CTRL: CAN2 Controller

Definition at line 740 of file lpc17xx_can.h.

uint8_t controller2

Second CAN Controller, should be:

  • CAN1_CTRL: CAN1 Controller
  • CAN2_CTRL: CAN2 Controller

Definition at line 749 of file lpc17xx_can.h.

uint8_t disable1

First Disable bit, should be:

  • MSG_ENABLE: disable bit = 0)
  • MSG_DISABLE: disable bit = 1

Definition at line 744 of file lpc17xx_can.h.

uint8_t disable2

Second Disable bit, should be:

  • MSG_ENABLE: disable bit = 0
  • MSG_DISABLE: disable bit = 1

Definition at line 753 of file lpc17xx_can.h.

uint16_t lowerID

ID lower bound, should be 11-bit value

Definition at line 748 of file lpc17xx_can.h.

uint16_t upperID

ID upper bound, should be 11-bit value and equal or greater than lowerID

Definition at line 757 of file lpc17xx_can.h.

The documentation for this struct was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_can.h
Generated on Tue Jun 7 15:00:12 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: smtp_state Struct Reference

  • Data Structures
  • Data Fields

smtp_state Struct Reference
[SMTP E-mail sender]

#include <smtp.h>

Data Fields

u8_t state
char * | to
char * | from
char * | subject
char * | msg
u16_t msglen
u16_t sentlen
u16_t textlen
u16_t sendptr

Detailed Description

Definition at line 81 of file smtp.h.

Field Documentation

char* from

Definition at line 84 of file smtp.h.

char* msg

Definition at line 86 of file smtp.h.

u16_t msglen

Definition at line 87 of file smtp.h.

u16_t sendptr

Definition at line 90 of file smtp.h.

u16_t sentlen

Definition at line 89 of file smtp.h.

u8_t state

Definition at line 82 of file smtp.h.

char* subject

Definition at line 85 of file smtp.h.

u16_t textlen

Definition at line 89 of file smtp.h.

char* to

Definition at line 83 of file smtp.h.

The documentation for this struct was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/smtp/smtp.h
Generated on Tue Jun 7 15:00:12 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: SPI_CFG_Type Struct Reference

  • Data Structures
  • Data Fields

SPI_CFG_Type Struct Reference
[SPI Public Types]

SPI configuration structure. More...

#include <lpc17xx_spi.h>

Data Fields

uint32_t | Databit
uint32_t | CPHA
uint32_t | CPOL
uint32_t | Mode
uint32_t | DataOrder
uint32_t | ClockRate

Detailed Description

SPI configuration structure.

Definition at line 238 of file lpc17xx_spi.h.

Field Documentation

uint32_t ClockRate

Data order, should be:

  • SPI_DATA_MSB_FIRST: MSB first
  • SPI_DATA_LSB_FIRST: LSB first

Definition at line 253 of file lpc17xx_spi.h.

uint32_t CPHA

Databit number, should be SPI_DATABIT_x, where x is in range from 8 - 16

Definition at line 241 of file lpc17xx_spi.h.

uint32_t CPOL

Clock phase, should be:

  • SPI_CPHA_FIRST: first clock edge
  • SPI_CPHA_SECOND: second clock edge

Definition at line 244 of file lpc17xx_spi.h.

uint32_t Databit

Definition at line 239 of file lpc17xx_spi.h.

uint32_t DataOrder

SPI mode, should be:

  • SPI_MASTER_MODE: Master mode
  • SPI_SLAVE_MODE: Slave mode

Definition at line 250 of file lpc17xx_spi.h.

uint32_t Mode

Clock polarity, should be:

  • SPI_CPOL_HI: high level
  • SPI_CPOL_LO: low level

Definition at line 247 of file lpc17xx_spi.h.

The documentation for this struct was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_spi.h
Generated on Tue Jun 7 15:00:12 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: SPI_DATA_SETUP_Type Struct Reference

  • Data Structures
  • Data Fields

SPI_DATA_SETUP_Type Struct Reference
[SPI Public Types]

SPI Data configuration structure definitions. More...

#include <lpc17xx_spi.h>

Data Fields

void * | tx_data
void * | rx_data
uint32_t | length
uint32_t | counter
uint32_t | status

Detailed Description

SPI Data configuration structure definitions.

Definition at line 269 of file lpc17xx_spi.h.

Field Documentation

uint32_t counter

Data counter index

Definition at line 273 of file lpc17xx_spi.h.

uint32_t length

Length of transfer data

Definition at line 272 of file lpc17xx_spi.h.

void* rx_data

Pointer to transmit data

Definition at line 271 of file lpc17xx_spi.h.

uint32_t status

Current status of SPI activity

Definition at line 274 of file lpc17xx_spi.h.

void* tx_data

Pointer to transmit data

Definition at line 270 of file lpc17xx_spi.h.

The documentation for this struct was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_spi.h
Generated on Tue Jun 7 15:00:12 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: SSP_CFG_Type Struct Reference

  • Data Structures
  • Data Fields

SSP_CFG_Type Struct Reference
[SSP Public Types]

SSP configuration structure. More...

#include <lpc17xx_ssp.h>

Data Fields

uint32_t | Databit
uint32_t | CPHA
uint32_t | CPOL
uint32_t | Mode
uint32_t | FrameFormat
uint32_t | ClockRate

Detailed Description

SSP configuration structure.

Definition at line 371 of file lpc17xx_ssp.h.

Field Documentation

uint32_t ClockRate

Frame Format:

  • SSP_FRAME_SPI: Motorola SPI frame format
  • SSP_FRAME_TI: TI frame format
  • SSP_FRAME_MICROWIRE: National Microwire frame format

Definition at line 387 of file lpc17xx_ssp.h.

uint32_t CPHA

Databit number, should be SSP_DATABIT_x, where x is in range from 4 - 16

Definition at line 374 of file lpc17xx_ssp.h.

uint32_t CPOL

Clock phase, should be:

  • SSP_CPHA_FIRST: first clock edge
  • SSP_CPHA_SECOND: second clock edge

Definition at line 377 of file lpc17xx_ssp.h.

uint32_t Databit

Definition at line 372 of file lpc17xx_ssp.h.

uint32_t FrameFormat

SSP mode, should be:

  • SSP_MASTER_MODE: Master mode
  • SSP_SLAVE_MODE: Slave mode

Definition at line 383 of file lpc17xx_ssp.h.

uint32_t Mode

Clock polarity, should be:

  • SSP_CPOL_HI: high level
  • SSP_CPOL_LO: low level

Definition at line 380 of file lpc17xx_ssp.h.

The documentation for this struct was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_ssp.h
Generated on Tue Jun 7 15:00:12 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: SSP_DATA_SETUP_Type Struct Reference

  • Data Structures
  • Data Fields

SSP_DATA_SETUP_Type Struct Reference
[SSP Public Types]

SPI Data configuration structure definitions. More...

#include <lpc17xx_ssp.h>

Data Fields

void * | tx_data
uint32_t | tx_cnt
void * | rx_data
uint32_t | rx_cnt
uint32_t | length
uint32_t | status

Detailed Description

SPI Data configuration structure definitions.

Definition at line 401 of file lpc17xx_ssp.h.

Field Documentation

uint32_t length

Length of transfer data

Definition at line 406 of file lpc17xx_ssp.h.

uint32_t rx_cnt

Receive counter

Definition at line 405 of file lpc17xx_ssp.h.

void* rx_data

Pointer to transmit data

Definition at line 404 of file lpc17xx_ssp.h.

uint32_t status

Current status of SSP activity

Definition at line 407 of file lpc17xx_ssp.h.

uint32_t tx_cnt

Transmit counter

Definition at line 403 of file lpc17xx_ssp.h.

void* tx_data

Pointer to transmit data

Definition at line 402 of file lpc17xx_ssp.h.

The documentation for this struct was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_ssp.h
Generated on Tue Jun 7 15:00:12 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: SysTick_Type Struct Reference

  • Data Structures
  • Data Fields

SysTick_Type Struct Reference
[CMSIS SysTick]

Structure type to access the System Timer (SysTick). More...

#include <core_cm3.h>

Data Fields

__IO uint32_t | CTRL
__IO uint32_t | LOAD
__IO uint32_t | VAL
__I uint32_t | CALIB

Detailed Description

Structure type to access the System Timer (SysTick).

Definition at line 458 of file core_cm3.h.

Field Documentation

__I uint32_t CALIB

Offset: 0x00C (R/ ) SysTick Calibration Register

Definition at line 463 of file core_cm3.h.

__IO uint32_t CTRL

Offset: 0x000 (R/W) SysTick Control and Status Register

Definition at line 460 of file core_cm3.h.

__IO uint32_t LOAD

Offset: 0x004 (R/W) SysTick Reload Value Register

Definition at line 461 of file core_cm3.h.

__IO uint32_t VAL

Offset: 0x008 (R/W) SysTick Current Value Register

Definition at line 462 of file core_cm3.h.

The documentation for this struct was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Core/CM3/CoreSupport/core_cm3.h
Generated on Tue Jun 7 15:00:12 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: tcpip_hdr Struct Reference

  • Data Structures
  • Data Fields

tcpip_hdr Struct Reference
[uIP packet forwarding]

Data Fields

u8_t vhl
u8_t tos
u16_t len
u16_t ipid
u16_t ipoffset
u8_t ttl
u8_t proto
u16_t ipchksum
u16_t | srcipaddr [2]
u16_t | destipaddr [2]
u16_t srcport
u16_t destport
u8_t | seqno [4]
u8_t | ackno [4]
u8_t tcpoffset
u8_t flags
u8_t | wnd [2]
u16_t tcpchksum
u8_t | urgp [2]
u8_t | optdata [4]

Detailed Description

Definition at line 72 of file uip-fw.c.

Field Documentation

u8_t tos

Definition at line 74 of file uip-fw.c.

u8_t vhl

Definition at line 74 of file uip-fw.c.

The documentation for this struct was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/uip/uip-fw.c
Generated on Tue Jun 7 15:00:13 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: telnetd_line Struct Reference

  • Data Structures
  • Data Fields

telnetd_line Struct Reference

Data Fields

char line [TELNETD_CONF_LINELEN]

Detailed Description

Definition at line 45 of file telnetd.c.

Field Documentation

char line[TELNETD_CONF_LINELEN]

Definition at line 46 of file telnetd.c.

The documentation for this struct was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/telnetd/telnetd.c
Generated on Tue Jun 7 15:00:13 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: telnetd_state Struct Reference

  • Data Structures
  • Data Fields

telnetd_state Struct Reference

#include <telnetd.h>

Data Fields

char * | lines [TELNETD_CONF_NUMLINES]
char | buf [TELNETD_CONF_LINELEN]
char | bufptr
u8_t numsent
u8_t state

Detailed Description

Definition at line 49 of file telnetd.h.

Field Documentation

char buf[TELNETD_CONF_LINELEN]

Definition at line 51 of file telnetd.h.

char bufptr

Definition at line 52 of file telnetd.h.

char* lines[TELNETD_CONF_NUMLINES]

Definition at line 50 of file telnetd.h.

u8_t numsent

Definition at line 53 of file telnetd.h.

u8_t state

Definition at line 54 of file telnetd.h.

The documentation for this struct was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/telnetd/telnetd.h
Generated on Tue Jun 7 15:00:13 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: TIM_CAPTURECFG_Type Struct Reference

  • Data Structures
  • Data Fields

TIM_CAPTURECFG_Type Struct Reference
[TIM Public Types]

Capture Input configuration structure. More...

#include <lpc17xx_timer.h>

Data Fields

uint8_t | CaptureChannel
uint8_t | RisingEdge
uint8_t | FallingEdge
uint8_t | IntOnCaption

Detailed Description

Capture Input configuration structure.

Definition at line 281 of file lpc17xx_timer.h.

Field Documentation

uint8_t CaptureChannel

Capture channel, should be in range from 0..1

Definition at line 282 of file lpc17xx_timer.h.

uint8_t FallingEdge

caption falling edge, should be:

  • ENABLE: Enable falling edge.
  • DISABLE: Disable this function.

Definition at line 288 of file lpc17xx_timer.h.

uint8_t IntOnCaption

Interrupt On caption, should be:

  • ENABLE: Enable interrupt function.
  • DISABLE: Disable this function.

Definition at line 292 of file lpc17xx_timer.h.

uint8_t RisingEdge

caption rising edge, should be:

  • ENABLE: Enable rising edge.
  • DISABLE: Disable this function.

Definition at line 284 of file lpc17xx_timer.h.

The documentation for this struct was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_timer.h
Generated on Tue Jun 7 15:00:13 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: TIM_COUNTERCFG_Type Struct Reference

  • Data Structures
  • Data Fields

TIM_COUNTERCFG_Type Struct Reference
[TIM Public Types]

Configuration structure in COUNTER mode. More...

#include <lpc17xx_timer.h>

Data Fields

uint8_t | CounterOption
uint8_t | CountInputSelect
uint8_t | Reserved [2]

Detailed Description

Configuration structure in COUNTER mode.

Definition at line 243 of file lpc17xx_timer.h.

Field Documentation

uint8_t CounterOption

Counter Option, should be:

  • TIM_COUNTER_INCAP0: CAPn.0 input pin for TIMERn
  • TIM_COUNTER_INCAP1: CAPn.1 input pin for TIMERn

Definition at line 245 of file lpc17xx_timer.h.

uint8_t CountInputSelect

Definition at line 249 of file lpc17xx_timer.h.

uint8_t Reserved[2]

Definition at line 250 of file lpc17xx_timer.h.

The documentation for this struct was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_timer.h
Generated on Tue Jun 7 15:00:13 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: TIM_MATCHCFG_Type Struct Reference

  • Data Structures
  • Data Fields

TIM_MATCHCFG_Type Struct Reference
[TIM Public Types]

Match channel configuration structure. More...

#include <lpc17xx_timer.h>

Data Fields

uint8_t | MatchChannel
uint8_t | IntOnMatch
uint8_t | StopOnMatch
uint8_t | ResetOnMatch
uint8_t | ExtMatchOutputType
uint8_t | Reserved [3]
uint32_t | MatchValue

Detailed Description

Match channel configuration structure.

Definition at line 254 of file lpc17xx_timer.h.

Field Documentation

uint8_t ExtMatchOutputType

External Match Output type, should be:

  • TIM_EXTMATCH_NOTHING: Do nothing for external output pin if match
  • TIM_EXTMATCH_LOW: Force external output pin to low if match
  • TIM_EXTMATCH_HIGH: Force external output pin to high if match
  • TIM_EXTMATCH_TOGGLE: Toggle external output pin if match.

Definition at line 270 of file lpc17xx_timer.h.

uint8_t IntOnMatch

Interrupt On match, should be:

  • ENABLE: Enable this function.
  • DISABLE: Disable this function.

Definition at line 257 of file lpc17xx_timer.h.

uint8_t MatchChannel

Match channel, should be in range from 0..3

Definition at line 255 of file lpc17xx_timer.h.

uint32_t MatchValue

Reserved

Definition at line 277 of file lpc17xx_timer.h.

uint8_t Reserved[3]

Definition at line 276 of file lpc17xx_timer.h.

uint8_t ResetOnMatch

Reset On match, should be:

  • ENABLE: Enable this function.
  • DISABLE: Disable this function.

Definition at line 265 of file lpc17xx_timer.h.

uint8_t StopOnMatch

Stop On match, should be:

  • ENABLE: Enable this function.
  • DISABLE: Disable this function.

Definition at line 261 of file lpc17xx_timer.h.

The documentation for this struct was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_timer.h
Generated on Tue Jun 7 15:00:13 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: TIM_TIMERCFG_Type Struct Reference

  • Data Structures
  • Data Fields

TIM_TIMERCFG_Type Struct Reference
[TIM Public Types]

Configuration structure in TIMER mode. More...

#include <lpc17xx_timer.h>

Data Fields

uint8_t | PrescaleOption
uint8_t | Reserved [3]
uint32_t | PrescaleValue

Detailed Description

Configuration structure in TIMER mode.

Definition at line 231 of file lpc17xx_timer.h.

Field Documentation

uint8_t PrescaleOption

Timer Prescale option, should be:

  • TIM_PRESCALE_TICKVAL: Prescale in absolute value
  • TIM_PRESCALE_USVAL: Prescale in microsecond value

Definition at line 234 of file lpc17xx_timer.h.

uint32_t PrescaleValue

Prescale value

Definition at line 239 of file lpc17xx_timer.h.

uint8_t Reserved[3]

Reserved

Definition at line 238 of file lpc17xx_timer.h.

The documentation for this struct was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_timer.h
Generated on Tue Jun 7 15:00:13 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: timer Struct Reference

  • Data Structures
  • Data Fields

timer Struct Reference
[Timer library]

#include <timer.h>

Data Fields

clock_time_t start
clock_time_t interval

Detailed Description

A timer.

This structure is used for declaring a timer. The timer must be set with timer_set() before it can be used.

Definition at line 78 of file timer.h.

Field Documentation

clock_time_t start

Definition at line 79 of file timer.h.

The documentation for this struct was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/uip/timer.h
Generated on Tue Jun 7 15:00:13 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: TX_Desc Struct Reference

  • Data Structures
  • Data Fields

TX_Desc Struct Reference
[EMAC Public Types]

TX Descriptor structure type definition. More...

#include <lpc17xx_emac.h>

Data Fields

uint32_t | Packet
uint32_t | Ctrl

Detailed Description

TX Descriptor structure type definition.

Definition at line 613 of file lpc17xx_emac.h.

Field Documentation

uint32_t Ctrl

Transmit Control Descriptor

Definition at line 615 of file lpc17xx_emac.h.

uint32_t Packet

Transmit Packet Descriptor

Definition at line 614 of file lpc17xx_emac.h.

The documentation for this struct was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_emac.h
Generated on Tue Jun 7 15:00:13 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: TX_Stat Struct Reference

  • Data Structures
  • Data Fields

TX_Stat Struct Reference
[EMAC Public Types]

TX Status structure type definition. More...

#include <lpc17xx_emac.h>

Data Fields

uint32_t Info

Detailed Description

TX Status structure type definition.

Definition at line 621 of file lpc17xx_emac.h.

Field Documentation

uint32_t Info

Transmit Information Status

Definition at line 622 of file lpc17xx_emac.h.

The documentation for this struct was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_emac.h
Generated on Tue Jun 7 15:00:13 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: UART1_RS485_CTRLCFG_Type Struct Reference

  • Data Structures
  • Data Fields

UART1_RS485_CTRLCFG_Type Struct Reference
[UART Public Types]

UART1 Full modem - RS485 Control configuration type. More...

#include <lpc17xx_uart.h>

Data Fields

FunctionalState NormalMultiDropMode_State
FunctionalState Rx_State
FunctionalState AutoAddrDetect_State
FunctionalState AutoDirCtrl_State
UART_RS485_DIRCTRL_PIN_Type DirCtrlPin
SetState DirCtrlPol_Level
uint8_t | MatchAddrValue
uint8_t | DelayValue

Detailed Description

UART1 Full modem - RS485 Control configuration type.

Definition at line 546 of file lpc17xx_uart.h.

Field Documentation

FunctionalState AutoAddrDetect_State

Auto Address Detect mode state:

  • ENABLE: ENABLE this function.
  • DISABLE: Disable this function.

Definition at line 553 of file lpc17xx_uart.h.

FunctionalState AutoDirCtrl_State

Auto Direction Control State:

  • ENABLE: Enable this function.
  • DISABLE: Disable this function.

Definition at line 556 of file lpc17xx_uart.h.

uint8_t DelayValue

delay time is in periods of the baud clock, 8-bit long

Definition at line 571 of file lpc17xx_uart.h.

UART_RS485_DIRCTRL_PIN_Type DirCtrlPin

If direction control is enabled, state:

  • UART1_RS485_DIRCTRL_RTS: pin RTS is used for direction control.
  • UART1_RS485_DIRCTRL_DTR: pin DTR is used for direction control.

Definition at line 559 of file lpc17xx_uart.h.

SetState DirCtrlPol_Level

Polarity of the direction control signal on the RTS (or DTR) pin:

  • RESET: The direction control pin will be driven to logic "0" when the transmitter has data to be sent.
  • SET: The direction control pin will be driven to logic "1" when the transmitter has data to be sent.

Definition at line 564 of file lpc17xx_uart.h.

uint8_t MatchAddrValue

address match value for RS-485/EIA-485 mode, 8-bit long

Definition at line 570 of file lpc17xx_uart.h.

FunctionalState NormalMultiDropMode_State

Normal MultiDrop mode State:

  • ENABLE: Enable this function.
  • DISABLE: Disable this function.

Definition at line 547 of file lpc17xx_uart.h.

FunctionalState Rx_State

Receiver State:

  • ENABLE: Enable Receiver.
  • DISABLE: Disable Receiver.

Definition at line 550 of file lpc17xx_uart.h.

The documentation for this struct was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_uart.h
Generated on Tue Jun 7 15:00:13 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: UART_AB_CFG_Type Struct Reference

  • Data Structures
  • Data Fields

UART_AB_CFG_Type Struct Reference
[UART Public Types]

Auto Baudrate mode configuration type definition. More...

#include <lpc17xx_uart.h>

Data Fields

UART_AB_MODE_Type ABMode
FunctionalState AutoRestart

Detailed Description

Auto Baudrate mode configuration type definition.

Definition at line 412 of file lpc17xx_uart.h.

Field Documentation

UART_AB_MODE_Type ABMode

Autobaudrate mode

Definition at line 413 of file lpc17xx_uart.h.

FunctionalState AutoRestart

Auto Restart state

Definition at line 414 of file lpc17xx_uart.h.

The documentation for this struct was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_uart.h
Generated on Tue Jun 7 15:00:13 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: UART_CFG_Type Struct Reference

  • Data Structures
  • Data Fields

UART_CFG_Type Struct Reference
[UART Public Types]

UART Configuration Structure definition. More...

#include <lpc17xx_uart.h>

Data Fields

uint32_t Baud_rate
UART_PARITY_Type Parity
UART_DATABIT_Type Databits
UART_STOPBIT_Type Stopbits

Detailed Description

UART Configuration Structure definition.

Definition at line 497 of file lpc17xx_uart.h.

Field Documentation

uint32_t Baud_rate

UART baud rate

Definition at line 498 of file lpc17xx_uart.h.

UART_DATABIT_Type Databits

Number of data bits, should be:

  • UART_DATABIT_5: UART 5 bit data mode
  • UART_DATABIT_6: UART 6 bit data mode
  • UART_DATABIT_7: UART 7 bit data mode
  • UART_DATABIT_8: UART 8 bit data mode

Definition at line 506 of file lpc17xx_uart.h.

UART_PARITY_Type Parity

Parity selection, should be:

  • UART_PARITY_NONE: No parity
  • UART_PARITY_ODD: Odd parity
  • UART_PARITY_EVEN: Even parity
  • UART_PARITY_SP_1: Forced "1" stick parity
  • UART_PARITY_SP_0: Forced "0" stick parity

Definition at line 499 of file lpc17xx_uart.h.

UART_STOPBIT_Type Stopbits

Number of stop bits, should be:

  • UART_STOPBIT_1: UART 1 Stop Bits Select
  • UART_STOPBIT_2: UART 2 Stop Bits Select

Definition at line 512 of file lpc17xx_uart.h.

The documentation for this struct was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_uart.h
Generated on Tue Jun 7 15:00:13 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: UART_FIFO_CFG_Type Struct Reference

  • Data Structures
  • Data Fields

UART_FIFO_CFG_Type Struct Reference
[UART Public Types]

UART FIFO Configuration Structure definition. More...

#include <lpc17xx_uart.h>

Data Fields

FunctionalState FIFO_ResetRxBuf
FunctionalState FIFO_ResetTxBuf
FunctionalState FIFO_DMAMode
UART_FITO_LEVEL_Type FIFO_Level

Detailed Description

UART FIFO Configuration Structure definition.

Definition at line 522 of file lpc17xx_uart.h.

Field Documentation

FunctionalState FIFO_DMAMode

DMA mode, should be:

  • ENABLE: Enable DMA mode in UART
  • DISABLE: Disable DMA mode in UART

Definition at line 531 of file lpc17xx_uart.h.

UART_FITO_LEVEL_Type FIFO_Level

Rx FIFO trigger level, should be:

  • UART_FIFO_TRGLEV0: UART FIFO trigger level 0: 1 character
  • UART_FIFO_TRGLEV1: UART FIFO trigger level 1: 4 character
  • UART_FIFO_TRGLEV2: UART FIFO trigger level 2: 8 character
  • UART_FIFO_TRGLEV3: UART FIFO trigger level 3: 14 character

Definition at line 535 of file lpc17xx_uart.h.

FunctionalState FIFO_ResetRxBuf

Reset Rx FIFO command state , should be:

  • ENABLE: Reset Rx FIFO in UART
  • DISABLE: Do not reset Rx FIFO in UART

Definition at line 523 of file lpc17xx_uart.h.

FunctionalState FIFO_ResetTxBuf

Reset Tx FIFO command state , should be:

  • ENABLE: Reset Tx FIFO in UART
  • DISABLE: Do not reset Tx FIFO in UART

Definition at line 527 of file lpc17xx_uart.h.

The documentation for this struct was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_uart.h
Generated on Tue Jun 7 15:00:13 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: UART_RING_BUFFER_T Struct Reference

  • Data Structures
  • Data Fields

UART_RING_BUFFER_T Struct Reference
[Interrupt, RS485_Master, RS485_Slave, UART1_FullModem]

UART Ring buffer structure. More...

Data Fields

__IO uint32_t | tx_head
__IO uint32_t | tx_tail
__IO uint32_t | rx_head
__IO uint32_t | rx_tail
__IO uint8_t | tx [UART_RING_BUFSIZE]
__IO uint8_t | rx [UART_RING_BUFSIZE]

Detailed Description

UART Ring buffer structure.

Definition at line 55 of file uart_interrupt_test.c.

Field Documentation

__IO uint32_t tx_head

UART Tx ring buffer head index

Definition at line 57 of file uart_interrupt_test.c.

The documentation for this struct was generated from the following files:
  • C:/nxpdrv/LPC1700CMSIS/Examples/UART/Interrupt/uart_interrupt_test.c
  • C:/nxpdrv/LPC1700CMSIS/Examples/UART/RS485_Master/rs485_master.c
  • C:/nxpdrv/LPC1700CMSIS/Examples/UART/RS485_Slave/rs485_slave.c
  • C:/nxpdrv/LPC1700CMSIS/Examples/UART/UART1_FullModem/uart_fullmodem_test.c
Generated on Tue Jun 7 15:00:13 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: uip_conn Struct Reference

  • Data Structures
  • Data Fields

uip_conn Struct Reference
[The uIP TCP/IP stack]

#include <uip.h>

Data Fields

uip_ipaddr_t ripaddr
u16_t lport
u16_t rport
u8_t | rcv_nxt [4]
u8_t | snd_nxt [4]
u16_t len
u16_t mss
u16_t initialmss
u8_t sa
u8_t sv
u8_t rto
u8_t tcpstateflags
u8_t timer
u8_t nrtx
uip_tcp_appstate_t appstate

Detailed Description

Representation of a uIP TCP connection.

The uip_conn structure is used for identifying a connection. All but one field in the structure are to be considered read-only by an application. The only exception is the appstate field whos purpose is to let the application store application-specific state (e.g., file pointers) for the connection. The type of this field is configured in the "uipopt.h" header file.

Definition at line 1157 of file uip.h.

Field Documentation

uip_tcp_appstate_t appstate

The application state.

Definition at line 1184 of file uip.h.

u16_t initialmss

Initial maximum segment size for the connection.

Definition at line 1171 of file uip.h.

u16_t len

Length of the data that was previously sent.

Definition at line 1168 of file uip.h.

u16_t lport

The local TCP port, in network byte order.

Definition at line 1160 of file uip.h.

u16_t mss

Current maximum segment size for the connection.

Definition at line 1169 of file uip.h.

u8_t nrtx

The number of retransmissions for the last segment sent.

Definition at line 1180 of file uip.h.

u8_t rcv_nxt[4]

The sequence number that we expect to receive next.

Definition at line 1164 of file uip.h.

uip_ipaddr_t ripaddr

The IP address of the remote host.

Definition at line 1158 of file uip.h.

u16_t rport

The local remote TCP port, in network byte order.

Definition at line 1161 of file uip.h.

u8_t rto

Retransmission time-out.

Definition at line 1177 of file uip.h.

u8_t sa

Retransmission time-out calculation state variable.

Definition at line 1173 of file uip.h.

u8_t snd_nxt[4]

The sequence number that was last sent by us.

Definition at line 1166 of file uip.h.

u8_t sv

Retransmission time-out calculation state variable.

Definition at line 1175 of file uip.h.

u8_t tcpstateflags

TCP state and flags.

Definition at line 1178 of file uip.h.

u8_t timer

The retransmission timer.

Definition at line 1179 of file uip.h.

The documentation for this struct was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/uip/uip.h
Generated on Tue Jun 7 15:00:14 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: uip_eth_addr Struct Reference

  • Data Structures
  • Data Fields

uip_eth_addr Struct Reference
[The uIP TCP/IP stack]

#include <uip.h>

Data Fields

u8_t addr [6]

Detailed Description

Representation of a 48-bit Ethernet address.

Definition at line 1599 of file uip.h.

Field Documentation

u8_t addr[6]

Definition at line 1600 of file uip.h.

The documentation for this struct was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/uip/uip.h
Generated on Tue Jun 7 15:00:14 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: uip_eth_hdr Struct Reference

  • Data Structures
  • Data Fields

uip_eth_hdr Struct Reference
[uIP Address Resolution Protocol]

#include <uip_arp.h>

Data Fields

struct uip_eth_addr | dest
struct uip_eth_addr | src
u16_t type

Detailed Description

The Ethernet header.

Definition at line 72 of file uip_arp.h.

Field Documentation

struct uip_eth_addr dest [read]

Definition at line 73 of file uip_arp.h.

struct uip_eth_addr src [read]

Definition at line 74 of file uip_arp.h.

u16_t type

Definition at line 75 of file uip_arp.h.

The documentation for this struct was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/uip/uip_arp.h
Generated on Tue Jun 7 15:00:14 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: uip_fw_netif Struct Reference

  • Data Structures
  • Data Fields

uip_fw_netif Struct Reference
[uIP packet forwarding]

#include <uip-fw.h>

Data Fields

struct uip_fw_netif * | next
u16_t | ipaddr [2]
u16_t | netmask [2]
u8_t(* | output )(void)

Detailed Description

Representation of a uIP network interface.

Definition at line 54 of file uip-fw.h.

Field Documentation

u16_t ipaddr[2]

The IP address of this interface.

Definition at line 57 of file uip-fw.h.

u16_t netmask[2]

The netmask of the interface.

Definition at line 58 of file uip-fw.h.

struct uip_fw_netif* next [read]

Pointer to the next interface when linked in a list.

Definition at line 55 of file uip-fw.h.

u8_t(* output)(void)

A pointer to the function that sends a packet.

The documentation for this struct was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/uip/uip-fw.h
Generated on Tue Jun 7 15:00:14 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: uip_icmpip_hdr Struct Reference

  • Data Structures
  • Data Fields

uip_icmpip_hdr Struct Reference
[The uIP TCP/IP stack]

#include <uip.h>

Data Fields

u8_t vhl
u8_t tos
u8_t | len [2]
u8_t | ipid [2]
u8_t | ipoffset [2]
u8_t ttl
u8_t proto
u16_t ipchksum
u16_t | srcipaddr [2]
u16_t | destipaddr [2]
u8_t type
u8_t icode
u16_t icmpchksum
u16_t id
u16_t seqno

Detailed Description

Definition at line 1452 of file uip.h.

Field Documentation

u16_t destipaddr[2]

Definition at line 1471 of file uip.h.

u16_t icmpchksum

Definition at line 1477 of file uip.h.

u8_t icode

Definition at line 1476 of file uip.h.

u16_t id

Definition at line 1479 of file uip.h.

u16_t ipchksum

Definition at line 1470 of file uip.h.

u8_t ipid[2]

Definition at line 1463 of file uip.h.

u8_t ipoffset[2]

Definition at line 1463 of file uip.h.

u8_t len[2]

Definition at line 1463 of file uip.h.

u8_t proto

Definition at line 1463 of file uip.h.

u16_t seqno

Definition at line 1479 of file uip.h.

u16_t srcipaddr[2]

Definition at line 1471 of file uip.h.

u8_t tos

Definition at line 1463 of file uip.h.

u8_t ttl

Definition at line 1463 of file uip.h.

u8_t type

Definition at line 1476 of file uip.h.

u8_t vhl

Definition at line 1463 of file uip.h.

The documentation for this struct was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/uip/uip.h
Generated on Tue Jun 7 15:00:14 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: uip_neighbor_addr Struct Reference

  • Data Structures
  • Data Fields

uip_neighbor_addr Struct Reference

#include <uip-neighbor.h>

Data Fields

struct uip_eth_addr addr

Detailed Description

Definition at line 47 of file uip-neighbor.h.

Field Documentation

struct uip_eth_addr addr [read]

Definition at line 51 of file uip-neighbor.h.

The documentation for this struct was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/uip/uip-neighbor.h
Generated on Tue Jun 7 15:00:14 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: uip_stats Struct Reference

  • Data Structures
  • Data Fields

uip_stats Struct Reference
[The uIP TCP/IP stack]

#include <uip.h>

Data Fields

struct {
uip_stats_t drop
uip_stats_t recv
uip_stats_t sent
uip_stats_t vhlerr
uip_stats_t hblenerr
uip_stats_t lblenerr
uip_stats_t fragerr
uip_stats_t chkerr
uip_stats_t protoerr
} ip
struct {
uip_stats_t drop
uip_stats_t recv
uip_stats_t sent
uip_stats_t typeerr
} icmp
struct {
uip_stats_t drop
uip_stats_t recv
uip_stats_t sent
uip_stats_t chkerr
uip_stats_t ackerr
uip_stats_t rst
uip_stats_t rexmit
uip_stats_t syndrop
uip_stats_t synrst
} tcp

Detailed Description

The structure holding the TCP/IP statistics that are gathered if UIP_STATISTICS is set to 1.

Definition at line 1236 of file uip.h.

Field Documentation

uip_stats_t ackerr

Number of TCP segments with a bad ACK number.

Definition at line 1270 of file uip.h.

uip_stats_t chkerr

Number of packets dropped due to IP checksum errors.

Number of TCP segments with a bad checksum.

Definition at line 1252 of file uip.h.

uip_stats_t drop

Number of dropped packets at the IP layer.

Number of dropped ICMP packets.

Number of dropped TCP segments.

Definition at line 1238 of file uip.h.

uip_stats_t fragerr

Number of packets dropped since they were IP fragments.

Definition at line 1250 of file uip.h.

uip_stats_t hblenerr

Number of packets dropped due to wrong IP length, high byte.

Definition at line 1246 of file uip.h.

struct { ... } icmp

ICMP statistics.

struct { ... } ip

IP statistics.

uip_stats_t lblenerr

Number of packets dropped due to wrong IP length, low byte.

Definition at line 1248 of file uip.h.

uip_stats_t protoerr

Number of packets dropped since they were neither ICMP, UDP nor TCP.

Definition at line 1254 of file uip.h.

uip_stats_t recv

Number of received packets at the IP layer.

Number of received ICMP packets.

Number of recived TCP segments.

Definition at line 1240 of file uip.h.

uip_stats_t rexmit

Number of retransmitted TCP segments.

Definition at line 1273 of file uip.h.

uip_stats_t rst

Number of recevied TCP RST (reset) segments.

Definition at line 1272 of file uip.h.

uip_stats_t sent

Number of sent packets at the IP layer.

Number of sent ICMP packets.

Number of sent TCP segments.

Definition at line 1242 of file uip.h.

uip_stats_t syndrop

Number of dropped SYNs due to too few connections was avaliable.

Definition at line 1274 of file uip.h.

uip_stats_t synrst

Number of SYNs for closed ports, triggering a RST.

Definition at line 1276 of file uip.h.

struct { ... } tcp

TCP statistics.

uip_stats_t typeerr

Number of ICMP packets with a wrong type.

Definition at line 1261 of file uip.h.

uip_stats_t vhlerr

Number of packets dropped due to wrong IP version or header length.

Definition at line 1244 of file uip.h.

The documentation for this struct was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/uip/uip.h
Generated on Tue Jun 7 15:00:14 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: uip_tcpip_hdr Struct Reference

  • Data Structures
  • Data Fields

uip_tcpip_hdr Struct Reference
[The uIP TCP/IP stack]

#include <uip.h>

Data Fields

u8_t vhl
u8_t tos
u8_t | len [2]
u8_t | ipid [2]
u8_t | ipoffset [2]
u8_t ttl
u8_t proto
u16_t ipchksum
u16_t | srcipaddr [2]
u16_t | destipaddr [2]
u16_t srcport
u16_t destport
u8_t | seqno [4]
u8_t | ackno [4]
u8_t tcpoffset
u8_t flags
u8_t | wnd [2]
u16_t tcpchksum
u8_t | urgp [2]
u8_t | optdata [4]

Detailed Description

Definition at line 1401 of file uip.h.

Field Documentation

u8_t ackno[4]

Definition at line 1427 of file uip.h.

u16_t destipaddr[2]

Definition at line 1420 of file uip.h.

u16_t destport

Definition at line 1425 of file uip.h.

u8_t flags

Definition at line 1427 of file uip.h.

u16_t ipchksum

Definition at line 1419 of file uip.h.

u8_t ipid[2]

Definition at line 1412 of file uip.h.

u8_t ipoffset[2]

Definition at line 1412 of file uip.h.

u8_t len[2]

Definition at line 1412 of file uip.h.

u8_t optdata[4]

Definition at line 1434 of file uip.h.

u8_t proto

Definition at line 1412 of file uip.h.

u8_t seqno[4]

Definition at line 1427 of file uip.h.

u16_t srcipaddr[2]

Definition at line 1420 of file uip.h.

u16_t srcport

Definition at line 1425 of file uip.h.

u16_t tcpchksum

Definition at line 1432 of file uip.h.

u8_t tcpoffset

Definition at line 1427 of file uip.h.

u8_t tos

Definition at line 1412 of file uip.h.

u8_t ttl

Definition at line 1412 of file uip.h.

u8_t urgp[2]

Definition at line 1433 of file uip.h.

u8_t vhl

Definition at line 1412 of file uip.h.

u8_t wnd[2]

Definition at line 1427 of file uip.h.

The documentation for this struct was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/uip/uip.h
Generated on Tue Jun 7 15:00:14 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: uip_udpip_hdr Struct Reference

  • Data Structures
  • Data Fields

uip_udpip_hdr Struct Reference
[The uIP TCP/IP stack]

#include <uip.h>

Data Fields

u8_t vhl
u8_t tos
u8_t | len [2]
u8_t | ipid [2]
u8_t | ipoffset [2]
u8_t ttl
u8_t proto
u16_t ipchksum
u16_t | srcipaddr [2]
u16_t | destipaddr [2]
u16_t srcport
u16_t destport
u16_t udplen
u16_t udpchksum

Detailed Description

Definition at line 1503 of file uip.h.

Field Documentation

u16_t destipaddr[2]

Definition at line 1522 of file uip.h.

u16_t destport

Definition at line 1527 of file uip.h.

u16_t ipchksum

Definition at line 1521 of file uip.h.

u8_t ipid[2]

Definition at line 1514 of file uip.h.

u8_t ipoffset[2]

Definition at line 1514 of file uip.h.

u8_t len[2]

Definition at line 1514 of file uip.h.

u8_t proto

Definition at line 1514 of file uip.h.

u16_t srcipaddr[2]

Definition at line 1522 of file uip.h.

u16_t srcport

Definition at line 1527 of file uip.h.

u8_t tos

Definition at line 1514 of file uip.h.

u8_t ttl

Definition at line 1514 of file uip.h.

u16_t udpchksum

Definition at line 1530 of file uip.h.

u16_t udplen

Definition at line 1529 of file uip.h.

u8_t vhl

Definition at line 1514 of file uip.h.

The documentation for this struct was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/uip/uip.h
Generated on Tue Jun 7 15:00:14 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: webclient_state Struct Reference

  • Data Structures
  • Data Fields

webclient_state Struct Reference
[Web client]

#include <webclient.h>

Data Fields

u8_t timer
u8_t state
u8_t httpflag
u16_t port
char | host [40]
char | file [WEBCLIENT_CONF_MAX_URLLEN]
u16_t getrequestptr
u16_t getrequestleft
char | httpheaderline [200]
u16_t httpheaderlineptr
char | mimetype [32]

Detailed Description

Definition at line 55 of file webclient.h.

Field Documentation

char file[WEBCLIENT_CONF_MAX_URLLEN]

Definition at line 62 of file webclient.h.

u16_t getrequestleft

Definition at line 64 of file webclient.h.

u16_t getrequestptr

Definition at line 63 of file webclient.h.

char host[40]

Definition at line 61 of file webclient.h.

u8_t httpflag

Definition at line 58 of file webclient.h.

char httpheaderline[200]

Definition at line 66 of file webclient.h.

u16_t httpheaderlineptr

Definition at line 67 of file webclient.h.

char mimetype[32]

Definition at line 69 of file webclient.h.

u16_t port

Definition at line 60 of file webclient.h.

u8_t state

Definition at line 57 of file webclient.h.

u8_t timer

Definition at line 56 of file webclient.h.

The documentation for this struct was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/webclient/webclient.h
Generated on Tue Jun 7 15:00:15 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: xPSR_Type Union Reference

  • Data Structures
  • Data Fields

xPSR_Type Union Reference
[CMSIS Core]

Union type to access the Special-Purpose Program Status Registers (xPSR). More...

#include <core_cm3.h>

Data Fields

struct {
uint32_t ISR:9
uint32_t _reserved0:15
uint32_t T:1
uint32_t IT:2
uint32_t Q:1
uint32_t V:1
uint32_t C:1
uint32_t Z:1
uint32_t N:1
} b
uint32_t w

Detailed Description

Union type to access the Special-Purpose Program Status Registers (xPSR).

Definition at line 166 of file core_cm3.h.

Field Documentation

uint32_t _reserved0

bit: 9..23 Reserved

Definition at line 172 of file core_cm3.h.

struct { ... } b

Structure used for bit access

uint32_t C

bit: 29 Carry condition code flag

Definition at line 182 of file core_cm3.h.

uint32_t ISR

bit: 0.. 8 Exception number

Definition at line 170 of file core_cm3.h.

uint32_t IT

bit: 25..26 saved IT state (read 0)

Definition at line 179 of file core_cm3.h.

uint32_t N

bit: 31 Negative condition code flag

Definition at line 184 of file core_cm3.h.

uint32_t Q

bit: 27 Saturation condition flag

Definition at line 180 of file core_cm3.h.

uint32_t T

bit: 24 Thumb bit (read 0)

Definition at line 178 of file core_cm3.h.

uint32_t V

bit: 28 Overflow condition code flag

Definition at line 181 of file core_cm3.h.

uint32_t w

Type used for word access

Definition at line 186 of file core_cm3.h.

uint32_t Z

bit: 30 Zero condition code flag

Definition at line 183 of file core_cm3.h.

The documentation for this union was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Core/CM3/CoreSupport/core_cm3.h
Generated on Tue Jun 7 15:00:15 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Data Fields

  • Data Structures
  • Data Fields
  • All
  • Variables
  • _
  • a
  • b
  • c
  • d
  • e
  • f
  • g
  • h
  • i
  • l
  • m
  • n
  • o
  • p
  • q
  • r
  • s
  • t
  • u
  • v
  • w
  • x
  • y
  • z
Here is a list of all struct and union fields with links to the structures/unions they belong to:

- _ -

  • __pad0__ : _DATCTR_Data_t
  • _reserved0 : CONTROL_Type , xPSR_Type , IPSR_Type , APSR_Type
Generated on Tue Jun 7 15:00:02 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: File Index

  • File List
  • Globals

File List

Here is a list of all files with brief descriptions:
C:/nxpdrv/LPC1700CMSIS/_htmlsrc/ummainpage.h [code] | This file just used to dummy information for UM document generating
C:/nxpdrv/LPC1700CMSIS/Core/CM3/CoreSupport/core_cm3.c [code] | CMSIS Cortex-M3 Core Peripheral Access Layer Source File
C:/nxpdrv/LPC1700CMSIS/Core/CM3/CoreSupport/core_cm3.h [code] | CMSIS Cortex-M3 Core Peripheral Access Layer Header File
C:/nxpdrv/LPC1700CMSIS/Core/CM3/CoreSupport/core_cmFunc.h [code] | CMSIS Cortex-M Core Function Access Header File
C:/nxpdrv/LPC1700CMSIS/Core/CM3/CoreSupport/core_cmInstr.h [code] | CMSIS Cortex-M Core Instruction Access Header File
C:/nxpdrv/LPC1700CMSIS/Core/CM3/DeviceSupport/NXP/LPC17xx/LPC17xx.h [code] | CMSIS Cortex-M3 Core Peripheral Access Layer Header File for NXP LPC17xx Device Series
C:/nxpdrv/LPC1700CMSIS/Core/CM3/DeviceSupport/NXP/LPC17xx/system_LPC17xx.c [code] | CMSIS Cortex-M3 Device Peripheral Access Layer Source File for the NXP LPC17xx Device Series
C:/nxpdrv/LPC1700CMSIS/Core/CM3/DeviceSupport/NXP/LPC17xx/system_LPC17xx.h [code] | CMSIS Cortex-M3 Device Peripheral Access Layer Header File for the NXP LPC17xx Device Series
C:/nxpdrv/LPC1700CMSIS/Drivers/include/debug_frmwrk.h [code] | Contains some utilities that used for debugging through UART
C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_adc.h [code] | Contains the NXP ABL typedefs for C standard types. It is intended to be used in ISO C conforming development environments and checks for this insofar as it is possible to do so
C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_can.h [code] | Contains all macro definitions and function prototypes support for CAN firmware library on LPC17xx
C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_clkpwr.h [code] | Contains all macro definitions and function prototypes support for Clock and Power Control firmware library on LPC17xx
C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_dac.h [code] | Contains all macro definitions and function prototypes support for Clock and Power Control firmware library on LPC17xx
C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_emac.h [code] | Contains all macro definitions and function prototypes support for Ethernet MAC firmware library on LPC17xx
C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_exti.h [code] | Contains all macro definitions and function prototypes support for External interrupt firmware library on LPC17xx
C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_gpdma.h [code] | Contains all macro definitions and function prototypes support for GPDMA firmware library on LPC17xx
C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_gpio.h [code] | Contains all macro definitions and function prototypes support for GPDMA firmware library on LPC17xx
C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_i2c.h [code] | Contains all macro definitions and function prototypes support for I2C firmware library on LPC17xx
C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_i2s.h [code] | Contains all macro definitions and function prototypes support for I2S firmware library on LPC17xx
C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_libcfg_default.h [code] | Default Library configuration header file
C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_mcpwm.h [code] | Contains all macro definitions and function prototypes support for Motor Control PWM firmware library on LPC17xx
C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_nvic.h [code] | Contains all macro definitions and function prototypes support for Nesting Vectored Interrupt firmware library on LPC17xx
C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_pinsel.h [code] | Contains all macro definitions and function prototypes support for Pin connect block firmware library on LPC17xx
C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_pwm.h [code] | Contains all macro definitions and function prototypes support for PWM firmware library on LPC17xx
C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_qei.h [code] | Contains all macro definitions and function prototypes support for QEI firmware library on LPC17xx
C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_rit.h [code] | Contains all macro definitions and function prototypes support for RIT firmware library on LPC17xx
C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_rtc.h [code] | Contains all macro definitions and function prototypes support for RTC firmware library on LPC17xx
C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_spi.h [code] | Contains all macro definitions and function prototypes support for SPI firmware library on LPC17xx
C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_ssp.h [code] | Contains all macro definitions and function prototypes support for SSP firmware library on LPC17xx
C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_systick.h [code] | Contains all macro definitions and function prototypes support for SYSTICK firmware library on LPC17xx
C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_timer.h [code] | Contains all macro definitions and function prototypes support for Timer firmware library on LPC17xx
C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_uart.h [code] | Contains all macro definitions and function prototypes support for UART firmware library on LPC17xx
C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_wdt.h [code] | Contains all macro definitions and function prototypes support for WDT firmware library on LPC17xx
C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc_types.h [code] | Contains the NXP ABL typedefs for C standard types. It is intended to be used in ISO C conforming development environments and checks for this insofar as it is possible to do so
C:/nxpdrv/LPC1700CMSIS/Drivers/source/debug_frmwrk.c [code] | Contains some utilities that used for debugging through UART
C:/nxpdrv/LPC1700CMSIS/Drivers/source/lpc17xx_adc.c [code] | Contains all functions support for ADC firmware library on LPC17xx
C:/nxpdrv/LPC1700CMSIS/Drivers/source/lpc17xx_can.c [code] | Contains all functions support for CAN firmware library on LPC17xx
C:/nxpdrv/LPC1700CMSIS/Drivers/source/lpc17xx_clkpwr.c [code] | Contains all functions support for Clock and Power Control firmware library on LPC17xx
C:/nxpdrv/LPC1700CMSIS/Drivers/source/lpc17xx_dac.c [code] | Contains all functions support for DAC firmware library on LPC17xx
C:/nxpdrv/LPC1700CMSIS/Drivers/source/lpc17xx_emac.c [code] |
C:/nxpdrv/LPC1700CMSIS/Drivers/source/lpc17xx_exti.c [code] | Contains all functions support for External interrupt firmware library on LPC17xx
C:/nxpdrv/LPC1700CMSIS/Drivers/source/lpc17xx_gpdma.c [code] | Contains all functions support for GPDMA firmware library on LPC17xx
C:/nxpdrv/LPC1700CMSIS/Drivers/source/lpc17xx_gpio.c [code] | Contains all functions support for GPIO firmware library on LPC17xx
C:/nxpdrv/LPC1700CMSIS/Drivers/source/lpc17xx_i2c.c [code] |
C:/nxpdrv/LPC1700CMSIS/Drivers/source/lpc17xx_i2s.c [code] |
C:/nxpdrv/LPC1700CMSIS/Drivers/source/lpc17xx_libcfg_default.c [code] | Library configuration source file (default), used to build library without examples
C:/nxpdrv/LPC1700CMSIS/Drivers/source/lpc17xx_mcpwm.c [code] | Contains all functions support for Motor Control PWM firmware library on LPC17xx
C:/nxpdrv/LPC1700CMSIS/Drivers/source/lpc17xx_nvic.c [code] | Contains all expansion functions support for NVIC firmware library on LPC17xx. The main NVIC functions are defined in core_cm3.h
C:/nxpdrv/LPC1700CMSIS/Drivers/source/lpc17xx_pinsel.c [code] | Contains all functions support for Pin connect block firmware library on LPC17xx
C:/nxpdrv/LPC1700CMSIS/Drivers/source/lpc17xx_pwm.c [code] | Contains all functions support for PWM firmware library on LPC17xx
C:/nxpdrv/LPC1700CMSIS/Drivers/source/lpc17xx_qei.c [code] | Contains all functions support for QEI firmware library on LPC17xx
C:/nxpdrv/LPC1700CMSIS/Drivers/source/lpc17xx_rit.c [code] | Contains all functions support for RIT firmware library on LPC17xx
C:/nxpdrv/LPC1700CMSIS/Drivers/source/lpc17xx_rtc.c [code] | Contains all functions support for RTC firmware library on LPC17xx
C:/nxpdrv/LPC1700CMSIS/Drivers/source/lpc17xx_spi.c [code] | Contains all functions support for SPI firmware library on LPC17xx
C:/nxpdrv/LPC1700CMSIS/Drivers/source/lpc17xx_ssp.c [code] | Contains all functions support for SSP firmware library on LPC17xx
C:/nxpdrv/LPC1700CMSIS/Drivers/source/lpc17xx_systick.c [code] | Contains all functions support for SYSTICK firmware library on LPC17xx
C:/nxpdrv/LPC1700CMSIS/Drivers/source/lpc17xx_timer.c [code] | Contains all functions support for Timer firmware library on LPC17xx
C:/nxpdrv/LPC1700CMSIS/Drivers/source/lpc17xx_uart.c [code] | Contains all functions support for UART firmware library on LPC17xx
C:/nxpdrv/LPC1700CMSIS/Drivers/source/lpc17xx_wdt.c [code] | Contains all functions support for WDT firmware library on LPC17xx
C:/nxpdrv/LPC1700CMSIS/Examples/ADC/Burst/adc_burst_test.c [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/ADC/Burst/lpc17xx_libcfg.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/ADC/DMA/adc_dma_test.c [code] | This example describes how to use ADC conversions and transfer converted data by using DMA
C:/nxpdrv/LPC1700CMSIS/Examples/ADC/DMA/lpc17xx_libcfg.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/ADC/HardwareTrigger/adc_hardware_trigger_test.c [code] | This example describes how to use ADC conversion in hardware-triggered mode
C:/nxpdrv/LPC1700CMSIS/Examples/ADC/HardwareTrigger/lpc17xx_libcfg.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/ADC/INTERRUPT/adc_interrupt_test.c [code] | This example describes how to use ADC conversion in burst mode
C:/nxpdrv/LPC1700CMSIS/Examples/ADC/INTERRUPT/lpc17xx_libcfg.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/ADC/Polling/adc_polling_test.c [code] | This example describes how to use ADC conversion in polling mode
C:/nxpdrv/LPC1700CMSIS/Examples/ADC/Polling/lpc17xx_libcfg.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/CAN/CAN_LedControl/can_ledcontrol.c [code] | This example describes how to use CAN frames to control LED display
C:/nxpdrv/LPC1700CMSIS/Examples/CAN/CAN_LedControl/lpc17xx_libcfg.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/CAN/CAN_self_test/can_self_test.c [code] | This example used to test Self-test mode
C:/nxpdrv/LPC1700CMSIS/Examples/CAN/CAN_self_test/lpc17xx_libcfg.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/CAN/CAN_test_aflut/can_test_aflut.c [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/CAN/CAN_test_aflut/lpc17xx_libcfg.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/CAN/CAN_test_bypass_mode/can_test_bypass_mode.c [code] | This example used to test Bypass mode
C:/nxpdrv/LPC1700CMSIS/Examples/CAN/CAN_test_bypass_mode/lpc17xx_libcfg.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/CAN/CAN_test_two_kit/can_test_two_kit.c [code] | This example used to CAN operation in two board
C:/nxpdrv/LPC1700CMSIS/Examples/CAN/CAN_test_two_kit/lpc17xx_libcfg.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/Cortex-M3/Bit-banding/bitband.c [code] | This example used to test bit-banding feature of Cortex-M3 processor
C:/nxpdrv/LPC1700CMSIS/Examples/Cortex-M3/Bit-banding/lpc17xx_libcfg.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/Cortex-M3/MPU/lpc17xx_libcfg.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/Cortex-M3/MPU/mpu_test.c [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/Cortex-M3/Privilege_mode/lpc17xx_libcfg.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/Cortex-M3/Privilege_mode/privilege.c [code] | This example used to test privilege feature of Cortex-M3 processor
C:/nxpdrv/LPC1700CMSIS/Examples/DAC/DMA/dac_dma.c [code] | This example describes how to use DAC conversion and using DMA to transfer data
C:/nxpdrv/LPC1700CMSIS/Examples/DAC/DMA/lpc17xx_libcfg.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/DAC/SineWave/dac_sinewave_test.c [code] | This example describes how to use DAC to generate a sine wave using DMA to transfer data
C:/nxpdrv/LPC1700CMSIS/Examples/DAC/SineWave/lpc17xx_libcfg.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/DAC/Speaker/dac_speaker.c [code] | This example used to test DAC peripheral through speaker
C:/nxpdrv/LPC1700CMSIS/Examples/DAC/Speaker/lpc17xx_libcfg.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/DAC/WaveGenerate/dac_wave_generate.c [code] | This example describes how to use DAC to generate a sine wave, triangle wave or escalator wave
C:/nxpdrv/LPC1700CMSIS/Examples/DAC/WaveGenerate/lpc17xx_libcfg.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/Easy_Web/ADC.c [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/Easy_Web/ADC.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/Easy_Web/easyweb.c [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/Easy_Web/easyweb.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/Easy_Web/EMAC.c [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/Easy_Web/EMAC.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/Easy_Web/lpc17xx_libcfg.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/Easy_Web/Retarget.c [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/Easy_Web/tcpip.c [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/Easy_Web/tcpip.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/Easy_Web/webpage.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/EmacRaw/crc32.c [code] | Ethernet CRC module file for NXP LPC230x Family Microprocessors
C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/EmacRaw/crc32.h [code] | Ethernet CRC module file for NXP LPC230x Family Microprocessors
C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/EmacRaw/emactest.c [code] | This example used to test EMAC operation on LPC1768
C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/EmacRaw/libnosys_gnu.c [code] | Definitions for OS interface, stub function required by newlibc used by Codesourcery GNU compiler
C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/EmacRaw/lpc17xx_libcfg.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/dhcpc/dhcpc.c [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/dhcpc/dhcpc.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/hello-world/hello-world.c [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/hello-world/hello-world.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/resolv/resolv.c [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/resolv/resolv.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/smtp/smtp-strings.c [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/smtp/smtp-strings.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/smtp/smtp.c [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/smtp/smtp.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/telnetd/shell.c [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/telnetd/shell.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/telnetd/telnetd.c [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/telnetd/telnetd.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/webclient/webclient-strings.c [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/webclient/webclient-strings.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/webclient/webclient.c [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/webclient/webclient.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/webserver/http-strings.c [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/webserver/http-strings.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/webserver/httpd-cgi.c [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/webserver/httpd-cgi.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/webserver/httpd-fs.c [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/webserver/httpd-fs.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/webserver/httpd-fsdata.c [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/webserver/httpd-fsdata.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/webserver/httpd.c [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/webserver/httpd.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/webserver/webserver.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/common/printf-stdarg.c [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/common/Retarget.c [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/common/Serial.c [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/common/syscalls.c [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/lpc17xx_port/clock-arch.c [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/lpc17xx_port/clock-arch.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/lpc17xx_port/emac.c [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/lpc17xx_port/emac.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/lpc17xx_port/lpc17xx_libcfg.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/lpc17xx_port/main.c [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/lpc17xx_port/uip-conf.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/uip/clock.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/uip/lc-addrlabels.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/uip/lc-switch.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/uip/lc.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/uip/psock.c [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/uip/psock.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/uip/pt.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/uip/timer.c [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/uip/timer.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/uip/uip-fw.c [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/uip/uip-fw.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/uip/uip-neighbor.c [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/uip/uip-neighbor.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/uip/uip-split.c [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/uip/uip-split.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/uip/uip.c [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/uip/uip.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/uip/uip_arch.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/uip/uip_arp.c [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/uip/uip_arp.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/uip/uiplib.c [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/uip/uiplib.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/uip/uipopt.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/GPDMA/Flash_2_Ram_Test/flash_2_ram.c [code] | This example used to test GPDMA function by transferring data from flash to ram memory
C:/nxpdrv/LPC1700CMSIS/Examples/GPDMA/Flash_2_Ram_Test/lpc17xx_libcfg.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/GPDMA/GPDMA_Sleep/gpdma_sleep.c [code] | This example used to test GPDMA operation in sleep mode
C:/nxpdrv/LPC1700CMSIS/Examples/GPDMA/GPDMA_Sleep/lpc17xx_libcfg.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/GPDMA/Link_list/link_list.c [code] | This example used to test GPDMA Link list function
C:/nxpdrv/LPC1700CMSIS/Examples/GPDMA/Link_list/lpc17xx_libcfg.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/GPDMA/Ram_2_Ram_Test/gpdma_r2r_test.c [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/GPDMA/Ram_2_Ram_Test/lpc17xx_libcfg.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/GPIO/GPIO_Interrupt/gpio_int.c [code] | This example used to test GPIO interrupt function
C:/nxpdrv/LPC1700CMSIS/Examples/GPIO/GPIO_Interrupt/lpc17xx_libcfg.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/GPIO/LedBlinky/LedBlinky.c [code] | This example describes how to use GPIO interrupt to drive LEDs
C:/nxpdrv/LPC1700CMSIS/Examples/GPIO/LedBlinky/lpc17xx_libcfg.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/I2C/master/lpc17xx_libcfg.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/I2C/master/master.c [code] | This example describes how to configure I2C as master device
C:/nxpdrv/LPC1700CMSIS/Examples/I2C/Master_Slave_Interrupt/i2c_master_slave_int_test.c [code] | This example describes how to uses two I2C peripheral on LPC1768 to communicate together. One set as master and the other set as slave
C:/nxpdrv/LPC1700CMSIS/Examples/I2C/Master_Slave_Interrupt/lpc17xx_libcfg.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/I2C/Monitor/i2c_monitor.c [code] | This example describes how to uses I2C peripheral on LPC1768 in monitor mode
C:/nxpdrv/LPC1700CMSIS/Examples/I2C/Monitor/lpc17xx_libcfg.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/I2C/pca8581_polling/lpc17xx_libcfg.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/I2C/pca8581_polling/pca8581_test.c [code] | An example of I2C using polling mode to test the I2C driver. Using EEPROM PCA8581 to transfer a number of data byte
C:/nxpdrv/LPC1700CMSIS/Examples/I2C/sc16is750_int/i2c_interrupt_test.c [code] | An example of I2C using interrupt mode to test the I2C driver. Using I2C at mode I2C master/8bit on LPC1766 to communicate with SC16IS750/760 Demo Board
C:/nxpdrv/LPC1700CMSIS/Examples/I2C/sc16is750_int/lpc17xx_libcfg.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/I2C/sc16is750_polling/i2c_polling_test.c [code] | An example of I2C using polling mode to test the I2C driver. Using I2C at mode I2C master/8bit on LPC1766 to communicate with SC16IS750/760 Demo Board
C:/nxpdrv/LPC1700CMSIS/Examples/I2C/sc16is750_polling/lpc17xx_libcfg.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/I2C/slave/lpc17xx_libcfg.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/I2C/slave/slave.c [code] | This example describes how to use I2C peripheral as a slave
C:/nxpdrv/LPC1700CMSIS/Examples/I2S/I2S_DMA/i2s_dma_test.c [code] | This example describes how to use DMA mode to test the I2S driver
C:/nxpdrv/LPC1700CMSIS/Examples/I2S/I2S_DMA/lpc17xx_libcfg.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/I2S/I2S_IRQ/i2s_irq_test.c [code] | This example describes how to use I2S transfer in interrupt mode
C:/nxpdrv/LPC1700CMSIS/Examples/I2S/I2S_IRQ/lpc17xx_libcfg.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/I2S/I2S_MCLK/i2s_mclk.c [code] | This example describes how to test I2S master clock
C:/nxpdrv/LPC1700CMSIS/Examples/I2S/I2S_MCLK/lpc17xx_libcfg.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/I2S/I2S_test_4_wire/i2s_test_4_wire.c [code] | This example describes how to use I2S 4-wire mode
C:/nxpdrv/LPC1700CMSIS/Examples/I2S/I2S_test_4_wire/lpc17xx_libcfg.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/I2S/I2S_two_kit/i2s_two_kit.c [code] | This example describes how to use I2S transfer data between two board
C:/nxpdrv/LPC1700CMSIS/Examples/I2S/I2S_two_kit/lpc17xx_libcfg.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/I2S/Polling/i2s_polling.c [code] | This example describes how to use I2S transfer in polling mode
C:/nxpdrv/LPC1700CMSIS/Examples/I2S/Polling/lpc17xx_libcfg.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/LCD/NOKIA6610_LCD/drv_glcd.c [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/LCD/NOKIA6610_LCD/drv_glcd.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/LCD/NOKIA6610_LCD/drv_glcd_cnfg.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/LCD/NOKIA6610_LCD/glcd_ll.c [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/LCD/NOKIA6610_LCD/glcd_ll.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/LCD/NOKIA6610_LCD/lcdtest.c [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/LCD/NOKIA6610_LCD/lpc17xx_libcfg.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/LCD/NOKIA6610_LCD/NXP_logo.c [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/LCD/NOKIA6610_LCD/NXP_logo.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/LCD/NOKIA6610_LCD/Terminal_9_12x6.c [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/LCD/QVGA_TFT_LCD/Font_24x16.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/LCD/QVGA_TFT_LCD/GLCD.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/LCD/QVGA_TFT_LCD/GLCD_SPI_LPC1700.c [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/LCD/QVGA_TFT_LCD/lcdtest.c [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/LCD/QVGA_TFT_LCD/lpc17xx_libcfg.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/MCPWM/MCPWMSimple/lpc17xx_libcfg.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/MCPWM/MCPWMSimple/mcpwm_simple.c [code] | This example used to test MCPWM driver
C:/nxpdrv/LPC1700CMSIS/Examples/NVIC/Priority/lpc17xx_libcfg.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/NVIC/Priority/nvic_priority.c [code] | This example used to test NVIC Grouping Priority function
C:/nxpdrv/LPC1700CMSIS/Examples/NVIC/VecTable_Relocation/lpc17xx_libcfg.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/NVIC/VecTable_Relocation/vt_relocation.c [code] | This example used to test NVIC Vector Table relocation function
C:/nxpdrv/LPC1700CMSIS/Examples/Project_Template/Eclipse_GNU/lpc17xx_libcfg.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/Project_Template/Eclipse_GNU/template.c [code] | A simple template for GNU example
C:/nxpdrv/LPC1700CMSIS/Examples/PWM/Dual_Edge/lpc17xx_libcfg.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/PWM/Dual_Edge/pwm_dual_edge.c [code] | This program illustrates the PWM signal on 3 Channels in both edge mode and single mode
C:/nxpdrv/LPC1700CMSIS/Examples/PWM/Match_Interrupt/lpc17xx_libcfg.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/PWM/Match_Interrupt/pwm_match_int.c [code] | PWM match interrupt example
C:/nxpdrv/LPC1700CMSIS/Examples/PWM/Single_Edge/lpc17xx_libcfg.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/PWM/Single_Edge/pwm_single_edge.c [code] | This program illustrates the PWM signal on 6 Channels in single edge mode
C:/nxpdrv/LPC1700CMSIS/Examples/PWR/EXTINT_Sleep/extint_sleep.c [code] | This example describes how to enter the system in sleep mode and wake-up by using external interrupt
C:/nxpdrv/LPC1700CMSIS/Examples/PWR/EXTINT_Sleep/lpc17xx_libcfg.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/PWR/NMI_PowerDown/lpc17xx_libcfg.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/PWR/NMI_PowerDown/nmi_powerdown.c [code] | This example describes how to enter the system in Power Down mode and wake-up by using NMI (Non-maskable Interrupt)
C:/nxpdrv/LPC1700CMSIS/Examples/PWR/RTC_DeepPWD/lpc17xx_libcfg.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/PWR/RTC_DeepPWD/rtc_deeppwd.c [code] | This example describes how to enter the system in Deep PowerDown and wake-up by using RTC Interrupt
C:/nxpdrv/LPC1700CMSIS/Examples/PWR/WDT_DeepSleep/lpc17xx_libcfg.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/PWR/WDT_DeepSleep/wdt_deepsleep.c [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/QEI/QEI_Velo/lpc17xx_libcfg.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/QEI/QEI_Velo/qei_test_velo.c [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/RIT/Interrupt/lpc17xx_libcfg.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/RIT/Interrupt/rit_interrupt.c [code] | This example used RIT to generate interrupt each 1s
C:/nxpdrv/LPC1700CMSIS/Examples/RTC/AlarmCntIncrInterrupt/lpc17xx_libcfg.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/RTC/AlarmCntIncrInterrupt/rtc_alarm_cntincr_int.c [code] | This example describes how to use RTC to generate interrupt in Second Counter Increment Interrupt (1s) and generate alarm interrupt at 10s
C:/nxpdrv/LPC1700CMSIS/Examples/RTC/Calibration/lpc17xx_libcfg.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/RTC/Calibration/rtc_calib.c [code] | This example describes how to calibrate real time clock
C:/nxpdrv/LPC1700CMSIS/Examples/SPI/LoopBack/lpc17xx_libcfg.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/SPI/LoopBack/spi_loopback_test.c [code] | An example of SPI using polling mode with loop-back (MISO <-> MOSI)connection to test SPI driver
C:/nxpdrv/LPC1700CMSIS/Examples/SPI/Master/lpc17xx_libcfg.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/SPI/Master/spi_master.c [code] | This example describes how to use SPI in master mode
C:/nxpdrv/LPC1700CMSIS/Examples/SPI/sc16is750_int/lpc17xx_libcfg.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/SPI/sc16is750_int/spi_interrupt_test.c [code] | This example describes how to use SPI at mode SPI master/8bit on LPC1768 to communicate with SC16IS750/760 Demo board in interrupt mode
C:/nxpdrv/LPC1700CMSIS/Examples/SPI/sc16is750_polling/lpc17xx_libcfg.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/SPI/sc16is750_polling/spi_polling_test.c [code] | This example describes how to use SPI at mode SPI master/8bit on LPC1768 to communicate with SC16IS750/760 Demo board in polling mode
C:/nxpdrv/LPC1700CMSIS/Examples/SPI/SDCard/lpc17xx_libcfg.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/SPI/SDCard/spi_sdcard.c [code] | This example describes how to use SPI to read SD card's CID register
C:/nxpdrv/LPC1700CMSIS/Examples/SPI/Slave/lpc17xx_libcfg.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/SPI/Slave/spi_slave.c [code] | This example describes how to use SPI in slave mode
C:/nxpdrv/LPC1700CMSIS/Examples/SSP/dma/lpc17xx_libcfg.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/SSP/dma/ssp_dma.c [code] | This example describes how to use SPP in Master mode with loop-back mode (MOSI <-> MISO), using DMA for both Tx and Rx channel
C:/nxpdrv/LPC1700CMSIS/Examples/SSP/Master/lpc17xx_libcfg.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/SSP/Master/ssp_master.c [code] | This example describes how to use SPP in master mode
C:/nxpdrv/LPC1700CMSIS/Examples/SSP/MicroWire/lpc17xx_libcfg.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/SSP/MicroWire/microwire_test.c [code] | This example describes how to use SPP peripheral in MicroWire frame format
C:/nxpdrv/LPC1700CMSIS/Examples/SSP/sc16is750_int/lpc17xx_libcfg.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/SSP/sc16is750_int/sc16is750_int.c [code] | This example describes how to use SPP using interrupt mode, SSP frame format to communicate with SC16IS750/760 Demo board
C:/nxpdrv/LPC1700CMSIS/Examples/SSP/sc16is750_polling/lpc17xx_libcfg.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/SSP/sc16is750_polling/sc16is750_polling.c [code] | This example describes how to use SPP using polling mode, SSP frame format to communicate with SC16IS750/760 Demo board
C:/nxpdrv/LPC1700CMSIS/Examples/SSP/Slave/lpc17xx_libcfg.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/SSP/Slave/ssp_slave.c [code] | This example describes how to use SPP in slave mode
C:/nxpdrv/LPC1700CMSIS/Examples/SSP/TI/lpc17xx_libcfg.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/SSP/TI/ti_test.c [code] | This example describes how to use SPP using TI frame format (interrupt mode)
C:/nxpdrv/LPC1700CMSIS/Examples/SysTick/10ms_base/10ms_base.c [code] | This example describes how to configure System Tick to generate interrupt each 10ms
C:/nxpdrv/LPC1700CMSIS/Examples/SysTick/10ms_base/lpc17xx_libcfg.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/SysTick/STCLK/lpc17xx_libcfg.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/SysTick/STCLK/systick_stclk.c [code] | This example describes how to configure System Tick to use with external clock source STCLK
C:/nxpdrv/LPC1700CMSIS/Examples/TIMER/Capture/lpc17xx_libcfg.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/TIMER/Capture/timer_capture.c [code] | This example describes how to use TIMER capture function
C:/nxpdrv/LPC1700CMSIS/Examples/TIMER/FreqMeasure/freqmeasure.c [code] | This example describes how to use Timer to measure a signal's frequency
C:/nxpdrv/LPC1700CMSIS/Examples/TIMER/FreqMeasure/lpc17xx_libcfg.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/TIMER/Gen_Diff_Delay/gen_diff_delay.c [code] | This example describes how to use TIMER0 and TIMER2 to generate 2 different delay signals
C:/nxpdrv/LPC1700CMSIS/Examples/TIMER/Gen_Diff_Delay/lpc17xx_libcfg.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/TIMER/Gen_Diff_Freqs/gen_diff_freqs.c [code] | This example describes how to use TIMER0 and TIMER2 to generate 2 different frequency signals
C:/nxpdrv/LPC1700CMSIS/Examples/TIMER/Gen_Diff_Freqs/lpc17xx_libcfg.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/TIMER/Interrupt_Match/lpc17xx_libcfg.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/TIMER/Interrupt_Match/timer_int_match.c [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/TIMER/Polling_Match/lpc17xx_libcfg.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/TIMER/Polling_Match/timer_poll_match.c [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/TIMER/PWMSignal/lpc17xx_libcfg.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/TIMER/PWMSignal/pwm_signal.c [code] | This example use TIMERs to generate 4 PWM signals with different duty cycle
C:/nxpdrv/LPC1700CMSIS/Examples/UART/AutoBaud/lpc17xx_libcfg.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/UART/AutoBaud/uart_autobaud_test.c [code] | This example describes how to configure UART using auto-baud rate in interrupt mode
C:/nxpdrv/LPC1700CMSIS/Examples/UART/DMA/lpc17xx_libcfg.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/UART/DMA/uart_dma_test.c [code] | This example describes how to using UART in DMA mode
C:/nxpdrv/LPC1700CMSIS/Examples/UART/HWFlowControl/lpc17xx_libcfg.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/UART/HWFlowControl/uart_hw_flow_control.c [code] | This example describes how to using UART Hardware flow control mode
C:/nxpdrv/LPC1700CMSIS/Examples/UART/Interrupt/lpc17xx_libcfg.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/UART/Interrupt/uart_interrupt_test.c [code] | This example describes how to using UART in interrupt mode
C:/nxpdrv/LPC1700CMSIS/Examples/UART/IrDA/Receive/lpc17xx_libcfg.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/UART/IrDA/Receive/uart_irda_receive.c [code] | This example describes how to using UART in irDA mode
C:/nxpdrv/LPC1700CMSIS/Examples/UART/IrDA/Transmit/lpc17xx_libcfg.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/UART/IrDA/Transmit/uart_irda_transmit.c [code] | This example describes how to using UART in irDA mode
C:/nxpdrv/LPC1700CMSIS/Examples/UART/Polling/lpc17xx_libcfg.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/UART/Polling/uart_polling_test.c [code] | This example describes how to using UART in polling mode
C:/nxpdrv/LPC1700CMSIS/Examples/UART/RS485_Master/lpc17xx_libcfg.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/UART/RS485_Master/rs485_master.c [code] | This example used to test RS485 functionality on UART1 of LPC1768.In this case, RS485 function on UART1 acts as Master on RS485 bus
C:/nxpdrv/LPC1700CMSIS/Examples/UART/RS485_Slave/lpc17xx_libcfg.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/UART/RS485_Slave/rs485_slave.c [code] | This example used to test RS485 functionality on UART1 of LPC1768.In this case, RS485 function on UART1 acts as SLave on RS485 bus
C:/nxpdrv/LPC1700CMSIS/Examples/UART/UART1_FullModem/lpc17xx_libcfg.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/UART/UART1_FullModem/uart_fullmodem_test.c [code] | This example describes how to use UART1 full-modem function
C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBAudio/adcuser.c [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBAudio/adcuser.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBAudio/audio.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBAudio/lpc17xx_libcfg.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBAudio/usb.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBAudio/usbaudio.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBAudio/usbcfg.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBAudio/usbcore.c [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBAudio/usbcore.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBAudio/usbdesc.c [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBAudio/usbdesc.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBAudio/usbdmain.c [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBAudio/usbhw.c [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBAudio/usbhw.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBAudio/usbreg.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBAudio/usbuser.c [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBAudio/usbuser.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBCDC/cdc.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBCDC/cdcuser.c [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBCDC/cdcuser.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBCDC/lpc17xx_libcfg.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBCDC/serial.c [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBCDC/serial.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBCDC/usb.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBCDC/usbcfg.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBCDC/usbcore.c [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBCDC/usbcore.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBCDC/usbdesc.c [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBCDC/usbdesc.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBCDC/usbhw.c [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBCDC/usbhw.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBCDC/usbreg.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBCDC/usbuser.c [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBCDC/usbuser.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBCDC/vcomdemo.c [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBCDC/vcomdemo.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBHID/demo.c [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBHID/demo.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBHID/hid.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBHID/hiduser.c [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBHID/hiduser.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBHID/lpc17xx_libcfg.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBHID/usb.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBHID/usbcfg.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBHID/usbcore.c [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBHID/usbcore.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBHID/usbdesc.c [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBHID/usbdesc.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBHID/usbhw.c [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBHID/usbhw.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBHID/usbreg.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBHID/usbuser.c [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBHID/usbuser.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBMassStorage/DiskImg.c [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBMassStorage/lpc17xx_libcfg.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBMassStorage/memory.c [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBMassStorage/memory.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBMassStorage/msc.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBMassStorage/mscuser.c [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBMassStorage/mscuser.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBMassStorage/usb.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBMassStorage/usbcfg.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBMassStorage/usbcore.c [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBMassStorage/usbcore.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBMassStorage/usbdesc.c [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBMassStorage/usbdesc.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBMassStorage/usbhw.c [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBMassStorage/usbhw.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBMassStorage/usbreg.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBMassStorage/usbuser.c [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBMassStorage/usbuser.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/WDT/INTERRUPT/lpc17xx_libcfg.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/WDT/INTERRUPT/wdt_interrupt_test.c [code] | This example describes how to use Watch-dog timer application in interrupt mode
C:/nxpdrv/LPC1700CMSIS/Examples/WDT/RESET/lpc17xx_libcfg.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/WDT/RESET/wdt_reset_test.c [code] | This example describes how to use WDT in reset mode
Generated on Tue Jun 7 15:00:15 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/_htmlsrc/ummainpage.h File Reference

C:/nxpdrv/LPC1700CMSIS/_htmlsrc/ummainpage.h File Reference

This file just used to dummy information for UM document generating. More...

Go to the source code of this file.

Detailed Description

This file just used to dummy information for UM document generating.

Author:
NXP MCU SW Application Team.
Date:
21 May 2010

Definition in file ummainpage.h.

Generated on Tue Jun 7 14:59:05 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CM3/CoreSupport/core_cm3.c File Reference

C:/nxpdrv/LPC1700CMSIS/Core/CM3/CoreSupport/core_cm3.c File Reference

CMSIS Cortex-M3 Core Peripheral Access Layer Source File. More...

#include <stdint.h>

Go to the source code of this file.

Detailed Description

CMSIS Cortex-M3 Core Peripheral Access Layer Source File.

Version:
V2.00
Date:
13. September 2010
Note:
Copyright (C) 2009-2010 ARM Limited. All rights reserved.
ARM Limited (ARM) is supplying this software for use with Cortex-M processor based microcontrollers. This file can be freely distributed within development tools that are supporting such ARM based processors.
THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file core_cm3.c.

Generated on Tue Jun 7 14:59:05 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CM3/CoreSupport/core_cm3.h File Reference

C:/nxpdrv/LPC1700CMSIS/Core/CM3/CoreSupport/core_cm3.h File Reference

CMSIS Cortex-M3 Core Peripheral Access Layer Header File. More...

#include <stdint.h>
#include "core_cmInstr.h"
#include "core_cmFunc.h"

Go to the source code of this file.

Data Structures

union | APSR_Type
Union type to access the Application Program Status Register (APSR). More...
union | IPSR_Type
Union type to access the Interrupt Program Status Register (IPSR). More...
union | xPSR_Type
Union type to access the Special-Purpose Program Status Registers (xPSR). More...
union | CONTROL_Type
Union type to access the Control Registers (CONTROL). More...
struct | NVIC_Type
Structure type to access the Nested Vectored Interrupt Controller (NVIC). More...
struct | SCB_Type
Structure type to access the System Control Block (SCB). More...
struct | SysTick_Type
Structure type to access the System Timer (SysTick). More...
struct | ITM_Type
Structure type to access the Instrumentation Trace Macrocell Register (ITM). More...
struct | InterruptType_Type
Structure type to access the Interrupt Type Register. More...
struct | CoreDebug_Type
Structure type to access the Core Debug Register (CoreDebug). More...

Defines

#define | __CM3_CMSIS_VERSION_MAIN (0x02)
#define | __CM3_CMSIS_VERSION_SUB (0x00)
#define | __CM3_CMSIS_VERSION ((__CM3_CMSIS_VERSION_MAIN << 16) | __CM3_CMSIS_VERSION_SUB)
#define | __CORTEX_M (0x03)
#define | __I volatile const
#define | __O volatile
#define | __IO volatile
#define | SCB_CPUID_IMPLEMENTER_Pos 24
#define | SCB_CPUID_IMPLEMENTER_Msk (0xFFUL << SCB_CPUID_IMPLEMENTER_Pos)
#define | SCB_CPUID_VARIANT_Pos 20
#define | SCB_CPUID_VARIANT_Msk (0xFUL << SCB_CPUID_VARIANT_Pos)
#define | SCB_CPUID_PARTNO_Pos 4
#define | SCB_CPUID_PARTNO_Msk (0xFFFUL << SCB_CPUID_PARTNO_Pos)
#define | SCB_CPUID_REVISION_Pos 0
#define | SCB_CPUID_REVISION_Msk (0xFUL << SCB_CPUID_REVISION_Pos)
#define | SCB_ICSR_NMIPENDSET_Pos 31
#define | SCB_ICSR_NMIPENDSET_Msk (1UL << SCB_ICSR_NMIPENDSET_Pos)
#define | SCB_ICSR_PENDSVSET_Pos 28
#define | SCB_ICSR_PENDSVSET_Msk (1UL << SCB_ICSR_PENDSVSET_Pos)
#define | SCB_ICSR_PENDSVCLR_Pos 27
#define | SCB_ICSR_PENDSVCLR_Msk (1UL << SCB_ICSR_PENDSVCLR_Pos)
#define | SCB_ICSR_PENDSTSET_Pos 26
#define | SCB_ICSR_PENDSTSET_Msk (1UL << SCB_ICSR_PENDSTSET_Pos)
#define | SCB_ICSR_PENDSTCLR_Pos 25
#define | SCB_ICSR_PENDSTCLR_Msk (1UL << SCB_ICSR_PENDSTCLR_Pos)
#define | SCB_ICSR_ISRPREEMPT_Pos 23
#define | SCB_ICSR_ISRPREEMPT_Msk (1UL << SCB_ICSR_ISRPREEMPT_Pos)
#define | SCB_ICSR_ISRPENDING_Pos 22
#define | SCB_ICSR_ISRPENDING_Msk (1UL << SCB_ICSR_ISRPENDING_Pos)
#define | SCB_ICSR_VECTPENDING_Pos 12
#define | SCB_ICSR_VECTPENDING_Msk (0x1FFUL << SCB_ICSR_VECTPENDING_Pos)
#define | SCB_ICSR_RETTOBASE_Pos 11
#define | SCB_ICSR_RETTOBASE_Msk (1UL << SCB_ICSR_RETTOBASE_Pos)
#define | SCB_ICSR_VECTACTIVE_Pos 0
#define | SCB_ICSR_VECTACTIVE_Msk (0x1FFUL << SCB_ICSR_VECTACTIVE_Pos)
#define | SCB_VTOR_TBLBASE_Pos 29
#define | SCB_VTOR_TBLBASE_Msk (1UL << SCB_VTOR_TBLBASE_Pos)
#define | SCB_VTOR_TBLOFF_Pos 7
#define | SCB_VTOR_TBLOFF_Msk (0x3FFFFFUL << SCB_VTOR_TBLOFF_Pos)
#define | SCB_AIRCR_VECTKEY_Pos 16
#define | SCB_AIRCR_VECTKEY_Msk (0xFFFFUL << SCB_AIRCR_VECTKEY_Pos)
#define | SCB_AIRCR_VECTKEYSTAT_Pos 16
#define | SCB_AIRCR_VECTKEYSTAT_Msk (0xFFFFUL << SCB_AIRCR_VECTKEYSTAT_Pos)
#define | SCB_AIRCR_ENDIANESS_Pos 15
#define | SCB_AIRCR_ENDIANESS_Msk (1UL << SCB_AIRCR_ENDIANESS_Pos)
#define | SCB_AIRCR_PRIGROUP_Pos 8
#define | SCB_AIRCR_PRIGROUP_Msk (7UL << SCB_AIRCR_PRIGROUP_Pos)
#define | SCB_AIRCR_SYSRESETREQ_Pos 2
#define | SCB_AIRCR_SYSRESETREQ_Msk (1UL << SCB_AIRCR_SYSRESETREQ_Pos)
#define | SCB_AIRCR_VECTCLRACTIVE_Pos 1
#define | SCB_AIRCR_VECTCLRACTIVE_Msk (1UL << SCB_AIRCR_VECTCLRACTIVE_Pos)
#define | SCB_AIRCR_VECTRESET_Pos 0
#define | SCB_AIRCR_VECTRESET_Msk (1UL << SCB_AIRCR_VECTRESET_Pos)
#define | SCB_SCR_SEVONPEND_Pos 4
#define | SCB_SCR_SEVONPEND_Msk (1UL << SCB_SCR_SEVONPEND_Pos)
#define | SCB_SCR_SLEEPDEEP_Pos 2
#define | SCB_SCR_SLEEPDEEP_Msk (1UL << SCB_SCR_SLEEPDEEP_Pos)
#define | SCB_SCR_SLEEPONEXIT_Pos 1
#define | SCB_SCR_SLEEPONEXIT_Msk (1UL << SCB_SCR_SLEEPONEXIT_Pos)
#define | SCB_CCR_STKALIGN_Pos 9
#define | SCB_CCR_STKALIGN_Msk (1UL << SCB_CCR_STKALIGN_Pos)
#define | SCB_CCR_BFHFNMIGN_Pos 8
#define | SCB_CCR_BFHFNMIGN_Msk (1UL << SCB_CCR_BFHFNMIGN_Pos)
#define | SCB_CCR_DIV_0_TRP_Pos 4
#define | SCB_CCR_DIV_0_TRP_Msk (1UL << SCB_CCR_DIV_0_TRP_Pos)
#define | SCB_CCR_UNALIGN_TRP_Pos 3
#define | SCB_CCR_UNALIGN_TRP_Msk (1UL << SCB_CCR_UNALIGN_TRP_Pos)
#define | SCB_CCR_USERSETMPEND_Pos 1
#define | SCB_CCR_USERSETMPEND_Msk (1UL << SCB_CCR_USERSETMPEND_Pos)
#define | SCB_CCR_NONBASETHRDENA_Pos 0
#define | SCB_CCR_NONBASETHRDENA_Msk (1UL << SCB_CCR_NONBASETHRDENA_Pos)
#define | SCB_SHCSR_USGFAULTENA_Pos 18
#define | SCB_SHCSR_USGFAULTENA_Msk (1UL << SCB_SHCSR_USGFAULTENA_Pos)
#define | SCB_SHCSR_BUSFAULTENA_Pos 17
#define | SCB_SHCSR_BUSFAULTENA_Msk (1UL << SCB_SHCSR_BUSFAULTENA_Pos)
#define | SCB_SHCSR_MEMFAULTENA_Pos 16
#define | SCB_SHCSR_MEMFAULTENA_Msk (1UL << SCB_SHCSR_MEMFAULTENA_Pos)
#define | SCB_SHCSR_SVCALLPENDED_Pos 15
#define | SCB_SHCSR_SVCALLPENDED_Msk (1UL << SCB_SHCSR_SVCALLPENDED_Pos)
#define | SCB_SHCSR_BUSFAULTPENDED_Pos 14
#define | SCB_SHCSR_BUSFAULTPENDED_Msk (1UL << SCB_SHCSR_BUSFAULTPENDED_Pos)
#define | SCB_SHCSR_MEMFAULTPENDED_Pos 13
#define | SCB_SHCSR_MEMFAULTPENDED_Msk (1UL << SCB_SHCSR_MEMFAULTPENDED_Pos)
#define | SCB_SHCSR_USGFAULTPENDED_Pos 12
#define | SCB_SHCSR_USGFAULTPENDED_Msk (1UL << SCB_SHCSR_USGFAULTPENDED_Pos)
#define | SCB_SHCSR_SYSTICKACT_Pos 11
#define | SCB_SHCSR_SYSTICKACT_Msk (1UL << SCB_SHCSR_SYSTICKACT_Pos)
#define | SCB_SHCSR_PENDSVACT_Pos 10
#define | SCB_SHCSR_PENDSVACT_Msk (1UL << SCB_SHCSR_PENDSVACT_Pos)
#define | SCB_SHCSR_MONITORACT_Pos 8
#define | SCB_SHCSR_MONITORACT_Msk (1UL << SCB_SHCSR_MONITORACT_Pos)
#define | SCB_SHCSR_SVCALLACT_Pos 7
#define | SCB_SHCSR_SVCALLACT_Msk (1UL << SCB_SHCSR_SVCALLACT_Pos)
#define | SCB_SHCSR_USGFAULTACT_Pos 3
#define | SCB_SHCSR_USGFAULTACT_Msk (1UL << SCB_SHCSR_USGFAULTACT_Pos)
#define | SCB_SHCSR_BUSFAULTACT_Pos 1
#define | SCB_SHCSR_BUSFAULTACT_Msk (1UL << SCB_SHCSR_BUSFAULTACT_Pos)
#define | SCB_SHCSR_MEMFAULTACT_Pos 0
#define | SCB_SHCSR_MEMFAULTACT_Msk (1UL << SCB_SHCSR_MEMFAULTACT_Pos)
#define | SCB_CFSR_USGFAULTSR_Pos 16
#define | SCB_CFSR_USGFAULTSR_Msk (0xFFFFUL << SCB_CFSR_USGFAULTSR_Pos)
#define | SCB_CFSR_BUSFAULTSR_Pos 8
#define | SCB_CFSR_BUSFAULTSR_Msk (0xFFUL << SCB_CFSR_BUSFAULTSR_Pos)
#define | SCB_CFSR_MEMFAULTSR_Pos 0
#define | SCB_CFSR_MEMFAULTSR_Msk (0xFFUL << SCB_CFSR_MEMFAULTSR_Pos)
#define | SCB_HFSR_DEBUGEVT_Pos 31
#define | SCB_HFSR_DEBUGEVT_Msk (1UL << SCB_HFSR_DEBUGEVT_Pos)
#define | SCB_HFSR_FORCED_Pos 30
#define | SCB_HFSR_FORCED_Msk (1UL << SCB_HFSR_FORCED_Pos)
#define | SCB_HFSR_VECTTBL_Pos 1
#define | SCB_HFSR_VECTTBL_Msk (1UL << SCB_HFSR_VECTTBL_Pos)
#define | SCB_DFSR_EXTERNAL_Pos 4
#define | SCB_DFSR_EXTERNAL_Msk (1UL << SCB_DFSR_EXTERNAL_Pos)
#define | SCB_DFSR_VCATCH_Pos 3
#define | SCB_DFSR_VCATCH_Msk (1UL << SCB_DFSR_VCATCH_Pos)
#define | SCB_DFSR_DWTTRAP_Pos 2
#define | SCB_DFSR_DWTTRAP_Msk (1UL << SCB_DFSR_DWTTRAP_Pos)
#define | SCB_DFSR_BKPT_Pos 1
#define | SCB_DFSR_BKPT_Msk (1UL << SCB_DFSR_BKPT_Pos)
#define | SCB_DFSR_HALTED_Pos 0
#define | SCB_DFSR_HALTED_Msk (1UL << SCB_DFSR_HALTED_Pos)
#define | SysTick_CTRL_COUNTFLAG_Pos 16
#define | SysTick_CTRL_COUNTFLAG_Msk (1UL << SysTick_CTRL_COUNTFLAG_Pos)
#define | SysTick_CTRL_CLKSOURCE_Pos 2
#define | SysTick_CTRL_CLKSOURCE_Msk (1UL << SysTick_CTRL_CLKSOURCE_Pos)
#define | SysTick_CTRL_TICKINT_Pos 1
#define | SysTick_CTRL_TICKINT_Msk (1UL << SysTick_CTRL_TICKINT_Pos)
#define | SysTick_CTRL_ENABLE_Pos 0
#define | SysTick_CTRL_ENABLE_Msk (1UL << SysTick_CTRL_ENABLE_Pos)
#define | SysTick_LOAD_RELOAD_Pos 0
#define | SysTick_LOAD_RELOAD_Msk (0xFFFFFFUL << SysTick_LOAD_RELOAD_Pos)
#define | SysTick_VAL_CURRENT_Pos 0
#define | SysTick_VAL_CURRENT_Msk (0xFFFFFFUL << SysTick_VAL_CURRENT_Pos)
#define | SysTick_CALIB_NOREF_Pos 31
#define | SysTick_CALIB_NOREF_Msk (1UL << SysTick_CALIB_NOREF_Pos)
#define | SysTick_CALIB_SKEW_Pos 30
#define | SysTick_CALIB_SKEW_Msk (1UL << SysTick_CALIB_SKEW_Pos)
#define | SysTick_CALIB_TENMS_Pos 0
#define | SysTick_CALIB_TENMS_Msk (0xFFFFFFUL << SysTick_VAL_CURRENT_Pos)
#define | ITM_TPR_PRIVMASK_Pos 0
#define | ITM_TPR_PRIVMASK_Msk (0xFUL << ITM_TPR_PRIVMASK_Pos)
#define | ITM_TCR_BUSY_Pos 23
#define | ITM_TCR_BUSY_Msk (1UL << ITM_TCR_BUSY_Pos)
#define | ITM_TCR_ATBID_Pos 16
#define | ITM_TCR_ATBID_Msk (0x7FUL << ITM_TCR_ATBID_Pos)
#define | ITM_TCR_TSPrescale_Pos 8
#define | ITM_TCR_TSPrescale_Msk (3UL << ITM_TCR_TSPrescale_Pos)
#define | ITM_TCR_SWOENA_Pos 4
#define | ITM_TCR_SWOENA_Msk (1UL << ITM_TCR_SWOENA_Pos)
#define | ITM_TCR_DWTENA_Pos 3
#define | ITM_TCR_DWTENA_Msk (1UL << ITM_TCR_DWTENA_Pos)
#define | ITM_TCR_SYNCENA_Pos 2
#define | ITM_TCR_SYNCENA_Msk (1UL << ITM_TCR_SYNCENA_Pos)
#define | ITM_TCR_TSENA_Pos 1
#define | ITM_TCR_TSENA_Msk (1UL << ITM_TCR_TSENA_Pos)
#define | ITM_TCR_ITMENA_Pos 0
#define | ITM_TCR_ITMENA_Msk (1UL << ITM_TCR_ITMENA_Pos)
#define | ITM_IWR_ATVALIDM_Pos 0
#define | ITM_IWR_ATVALIDM_Msk (1UL << ITM_IWR_ATVALIDM_Pos)
#define | ITM_IRR_ATREADYM_Pos 0
#define | ITM_IRR_ATREADYM_Msk (1UL << ITM_IRR_ATREADYM_Pos)
#define | ITM_IMCR_INTEGRATION_Pos 0
#define | ITM_IMCR_INTEGRATION_Msk (1UL << ITM_IMCR_INTEGRATION_Pos)
#define | ITM_LSR_ByteAcc_Pos 2
#define | ITM_LSR_ByteAcc_Msk (1UL << ITM_LSR_ByteAcc_Pos)
#define | ITM_LSR_Access_Pos 1
#define | ITM_LSR_Access_Msk (1UL << ITM_LSR_Access_Pos)
#define | ITM_LSR_Present_Pos 0
#define | ITM_LSR_Present_Msk (1UL << ITM_LSR_Present_Pos)
#define | IntType_ICTR_INTLINESNUM_Pos 0
#define | IntType_ICTR_INTLINESNUM_Msk (0x1FUL << IntType_ICTR_INTLINESNUM_Pos)
#define | IntType_ACTLR_DISFOLD_Pos 2
#define | IntType_ACTLR_DISFOLD_Msk (1UL << IntType_ACTLR_DISFOLD_Pos)
#define | IntType_ACTLR_DISDEFWBUF_Pos 1
#define | IntType_ACTLR_DISDEFWBUF_Msk (1UL << IntType_ACTLR_DISDEFWBUF_Pos)
#define | IntType_ACTLR_DISMCYCINT_Pos 0
#define | IntType_ACTLR_DISMCYCINT_Msk (1UL << IntType_ACTLR_DISMCYCINT_Pos)
#define | CoreDebug_DHCSR_DBGKEY_Pos 16
#define | CoreDebug_DHCSR_DBGKEY_Msk (0xFFFFUL << CoreDebug_DHCSR_DBGKEY_Pos)
#define | CoreDebug_DHCSR_S_RESET_ST_Pos 25
#define | CoreDebug_DHCSR_S_RESET_ST_Msk (1UL << CoreDebug_DHCSR_S_RESET_ST_Pos)
#define | CoreDebug_DHCSR_S_RETIRE_ST_Pos 24
#define | CoreDebug_DHCSR_S_RETIRE_ST_Msk (1UL << CoreDebug_DHCSR_S_RETIRE_ST_Pos)
#define | CoreDebug_DHCSR_S_LOCKUP_Pos 19
#define | CoreDebug_DHCSR_S_LOCKUP_Msk (1UL << CoreDebug_DHCSR_S_LOCKUP_Pos)
#define | CoreDebug_DHCSR_S_SLEEP_Pos 18
#define | CoreDebug_DHCSR_S_SLEEP_Msk (1UL << CoreDebug_DHCSR_S_SLEEP_Pos)
#define | CoreDebug_DHCSR_S_HALT_Pos 17
#define | CoreDebug_DHCSR_S_HALT_Msk (1UL << CoreDebug_DHCSR_S_HALT_Pos)
#define | CoreDebug_DHCSR_S_REGRDY_Pos 16
#define | CoreDebug_DHCSR_S_REGRDY_Msk (1UL << CoreDebug_DHCSR_S_REGRDY_Pos)
#define | CoreDebug_DHCSR_C_SNAPSTALL_Pos 5
#define | CoreDebug_DHCSR_C_SNAPSTALL_Msk (1UL << CoreDebug_DHCSR_C_SNAPSTALL_Pos)
#define | CoreDebug_DHCSR_C_MASKINTS_Pos 3
#define | CoreDebug_DHCSR_C_MASKINTS_Msk (1UL << CoreDebug_DHCSR_C_MASKINTS_Pos)
#define | CoreDebug_DHCSR_C_STEP_Pos 2
#define | CoreDebug_DHCSR_C_STEP_Msk (1UL << CoreDebug_DHCSR_C_STEP_Pos)
#define | CoreDebug_DHCSR_C_HALT_Pos 1
#define | CoreDebug_DHCSR_C_HALT_Msk (1UL << CoreDebug_DHCSR_C_HALT_Pos)
#define | CoreDebug_DHCSR_C_DEBUGEN_Pos 0
#define | CoreDebug_DHCSR_C_DEBUGEN_Msk (1UL << CoreDebug_DHCSR_C_DEBUGEN_Pos)
#define | CoreDebug_DCRSR_REGWnR_Pos 16
#define | CoreDebug_DCRSR_REGWnR_Msk (1UL << CoreDebug_DCRSR_REGWnR_Pos)
#define | CoreDebug_DCRSR_REGSEL_Pos 0
#define | CoreDebug_DCRSR_REGSEL_Msk (0x1FUL << CoreDebug_DCRSR_REGSEL_Pos)
#define | CoreDebug_DEMCR_TRCENA_Pos 24
#define | CoreDebug_DEMCR_TRCENA_Msk (1UL << CoreDebug_DEMCR_TRCENA_Pos)
#define | CoreDebug_DEMCR_MON_REQ_Pos 19
#define | CoreDebug_DEMCR_MON_REQ_Msk (1UL << CoreDebug_DEMCR_MON_REQ_Pos)
#define | CoreDebug_DEMCR_MON_STEP_Pos 18
#define | CoreDebug_DEMCR_MON_STEP_Msk (1UL << CoreDebug_DEMCR_MON_STEP_Pos)
#define | CoreDebug_DEMCR_MON_PEND_Pos 17
#define | CoreDebug_DEMCR_MON_PEND_Msk (1UL << CoreDebug_DEMCR_MON_PEND_Pos)
#define | CoreDebug_DEMCR_MON_EN_Pos 16
#define | CoreDebug_DEMCR_MON_EN_Msk (1UL << CoreDebug_DEMCR_MON_EN_Pos)
#define | CoreDebug_DEMCR_VC_HARDERR_Pos 10
#define | CoreDebug_DEMCR_VC_HARDERR_Msk (1UL << CoreDebug_DEMCR_VC_HARDERR_Pos)
#define | CoreDebug_DEMCR_VC_INTERR_Pos 9
#define | CoreDebug_DEMCR_VC_INTERR_Msk (1UL << CoreDebug_DEMCR_VC_INTERR_Pos)
#define | CoreDebug_DEMCR_VC_BUSERR_Pos 8
#define | CoreDebug_DEMCR_VC_BUSERR_Msk (1UL << CoreDebug_DEMCR_VC_BUSERR_Pos)
#define | CoreDebug_DEMCR_VC_STATERR_Pos 7
#define | CoreDebug_DEMCR_VC_STATERR_Msk (1UL << CoreDebug_DEMCR_VC_STATERR_Pos)
#define | CoreDebug_DEMCR_VC_CHKERR_Pos 6
#define | CoreDebug_DEMCR_VC_CHKERR_Msk (1UL << CoreDebug_DEMCR_VC_CHKERR_Pos)
#define | CoreDebug_DEMCR_VC_NOCPERR_Pos 5
#define | CoreDebug_DEMCR_VC_NOCPERR_Msk (1UL << CoreDebug_DEMCR_VC_NOCPERR_Pos)
#define | CoreDebug_DEMCR_VC_MMERR_Pos 4
#define | CoreDebug_DEMCR_VC_MMERR_Msk (1UL << CoreDebug_DEMCR_VC_MMERR_Pos)
#define | CoreDebug_DEMCR_VC_CORERESET_Pos 0
#define | CoreDebug_DEMCR_VC_CORERESET_Msk (1UL << CoreDebug_DEMCR_VC_CORERESET_Pos)
#define | ITM_RXBUFFER_EMPTY 0x5AA55AA5
#define | SCS_BASE (0xE000E000UL)
#define | ITM_BASE (0xE0000000UL)
#define | CoreDebug_BASE (0xE000EDF0UL)
#define | SysTick_BASE (SCS_BASE + 0x0010UL)
#define | NVIC_BASE (SCS_BASE + 0x0100UL)
#define | SCB_BASE (SCS_BASE + 0x0D00UL)
#define | InterruptType ((InterruptType_Type *) SCS_BASE)
#define | SCB ((SCB_Type *) SCB_BASE)
#define | SysTick ((SysTick_Type *) SysTick_BASE)
#define | NVIC ((NVIC_Type *) NVIC_BASE)
#define | ITM ((ITM_Type *) ITM_BASE)
#define | CoreDebug ((CoreDebug_Type *) CoreDebug_BASE)

Variables

volatile int32_t | ITM_RxBuffer

Detailed Description

CMSIS Cortex-M3 Core Peripheral Access Layer Header File.

Version:
V2.01
Date:
06. December 2010
Note:
Copyright (C) 2009-2010 ARM Limited. All rights reserved.
ARM Limited (ARM) is supplying this software for use with Cortex-M processor based microcontrollers. This file can be freely distributed within development tools that are supporting such ARM based processors.
THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file core_cm3.h.

Generated on Tue Jun 7 14:59:05 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CM3/CoreSupport/core_cmFunc.h File Reference

C:/nxpdrv/LPC1700CMSIS/Core/CM3/CoreSupport/core_cmFunc.h File Reference

CMSIS Cortex-M Core Function Access Header File. More...

Go to the source code of this file.

Detailed Description

CMSIS Cortex-M Core Function Access Header File.

Version:
V2.01
Date:
06. December 2010
Note:
Copyright (C) 2009-2010 ARM Limited. All rights reserved.
ARM Limited (ARM) is supplying this software for use with Cortex-M processor based microcontrollers. This file can be freely distributed within development tools that are supporting such ARM based processors.
THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file core_cmFunc.h.

Generated on Tue Jun 7 14:59:05 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CM3/CoreSupport/core_cmInstr.h File Reference

C:/nxpdrv/LPC1700CMSIS/Core/CM3/CoreSupport/core_cmInstr.h File Reference

CMSIS Cortex-M Core Instruction Access Header File. More...

Go to the source code of this file.

Detailed Description

CMSIS Cortex-M Core Instruction Access Header File.

Version:
V2.01
Date:
06. December 2010
Note:
Copyright (C) 2009-2010 ARM Limited. All rights reserved.
ARM Limited (ARM) is supplying this software for use with Cortex-M processor based microcontrollers. This file can be freely distributed within development tools that are supporting such ARM based processors.
THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file core_cmInstr.h.

Generated on Tue Jun 7 14:59:05 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CM3/DeviceSupport/NXP/LPC17xx/LPC17xx.h File Reference

C:/nxpdrv/LPC1700CMSIS/Core/CM3/DeviceSupport/NXP/LPC17xx/LPC17xx.h File Reference

CMSIS Cortex-M3 Core Peripheral Access Layer Header File for NXP LPC17xx Device Series. More...

#include "core_cm3.h"
#include "system_LPC17xx.h"

Go to the source code of this file.

Data Structures

struct | LPC_SC_TypeDef
System Control (SC) register structure definition. More...
struct | LPC_PINCON_TypeDef
Pin Connect Block (PINCON) register structure definition. More...
struct | LPC_GPIO_TypeDef
General Purpose Input/Output (GPIO) register structure definition. More...
struct | LPC_GPIOINT_TypeDef
General Purpose Input/Output interrupt (GPIOINT) register structure definition. More...
struct | LPC_TIM_TypeDef
Timer (TIM) register structure definition. More...
struct | LPC_PWM_TypeDef
Pulse-Width Modulation (PWM) register structure definition. More...
struct | LPC_UART_TypeDef
Universal Asynchronous Receiver Transmitter (UART) register structure definition. More...
struct | LPC_UART0_TypeDef
Universal Asynchronous Receiver Transmitter 0 (UART0) register structure definition. More...
struct | LPC_UART1_TypeDef
Universal Asynchronous Receiver Transmitter 1 (UART1) register structure definition. More...
struct | LPC_SPI_TypeDef
Serial Peripheral Interface (SPI) register structure definition. More...
struct | LPC_SSP_TypeDef
Synchronous Serial Communication (SSP) register structure definition. More...
struct | LPC_I2C_TypeDef
Inter-Integrated Circuit (I2C) register structure definition. More...
struct | LPC_I2S_TypeDef
Inter IC Sound (I2S) register structure definition. More...
struct | LPC_RIT_TypeDef
Repetitive Interrupt Timer (RIT) register structure definition. More...
struct | LPC_RTC_TypeDef
Real-Time Clock (RTC) register structure definition. More...
struct | LPC_WDT_TypeDef
Watchdog Timer (WDT) register structure definition. More...
struct | LPC_ADC_TypeDef
Analog-to-Digital Converter (ADC) register structure definition. More...
struct | LPC_DAC_TypeDef
Digital-to-Analog Converter (DAC) register structure definition. More...
struct | LPC_MCPWM_TypeDef
Motor Control Pulse-Width Modulation (MCPWM) register structure definition. More...
struct | LPC_QEI_TypeDef
Quadrature Encoder Interface (QEI) register structure definition. More...
struct | LPC_CANAF_RAM_TypeDef
Controller Area Network Acceptance Filter RAM (CANAF_RAM)structure definition. More...
struct | LPC_CANAF_TypeDef
Controller Area Network Acceptance Filter(CANAF) register structure definition. More...
struct | LPC_CANCR_TypeDef
Controller Area Network Central (CANCR) register structure definition. More...
struct | LPC_CAN_TypeDef
Controller Area Network Controller (CAN) register structure definition. More...
struct | LPC_GPDMA_TypeDef
General Purpose Direct Memory Access (GPDMA) register structure definition. More...
struct | LPC_GPDMACH_TypeDef
General Purpose Direct Memory Access Channel (GPDMACH) register structure definition. More...
struct | LPC_USB_TypeDef
Universal Serial Bus (USB) register structure definition. More...
struct | LPC_EMAC_TypeDef
Ethernet Media Access Controller (EMAC) register structure definition. More...

Defines

#define | __MPU_PRESENT 1
#define | __NVIC_PRIO_BITS 5
#define | __Vendor_SysTickConfig 0
#define | LPC_FLASH_BASE (0x00000000UL)
#define | LPC_RAM_BASE (0x10000000UL)
#define | LPC_AHBRAM0_BASE (0x2007C000UL)
#define | LPC_AHBRAM1_BASE (0x20080000UL)
#define | LPC_GPIO_BASE (0x2009C000UL)
#define | LPC_APB0_BASE (0x40000000UL)
#define | LPC_APB1_BASE (0x40080000UL)
#define | LPC_AHB_BASE (0x50000000UL)
#define | LPC_CM3_BASE (0xE0000000UL)
#define | LPC_WDT_BASE (LPC_APB0_BASE + 0x00000)
#define | LPC_TIM0_BASE (LPC_APB0_BASE + 0x04000)
#define | LPC_TIM1_BASE (LPC_APB0_BASE + 0x08000)
#define | LPC_UART0_BASE (LPC_APB0_BASE + 0x0C000)
#define | LPC_UART1_BASE (LPC_APB0_BASE + 0x10000)
#define | LPC_PWM1_BASE (LPC_APB0_BASE + 0x18000)
#define | LPC_I2C0_BASE (LPC_APB0_BASE + 0x1C000)
#define | LPC_SPI_BASE (LPC_APB0_BASE + 0x20000)
#define | LPC_RTC_BASE (LPC_APB0_BASE + 0x24000)
#define | LPC_GPIOINT_BASE (LPC_APB0_BASE + 0x28080)
#define | LPC_PINCON_BASE (LPC_APB0_BASE + 0x2C000)
#define | LPC_SSP1_BASE (LPC_APB0_BASE + 0x30000)
#define | LPC_ADC_BASE (LPC_APB0_BASE + 0x34000)
#define | LPC_CANAF_RAM_BASE (LPC_APB0_BASE + 0x38000)
#define | LPC_CANAF_BASE (LPC_APB0_BASE + 0x3C000)
#define | LPC_CANCR_BASE (LPC_APB0_BASE + 0x40000)
#define | LPC_CAN1_BASE (LPC_APB0_BASE + 0x44000)
#define | LPC_CAN2_BASE (LPC_APB0_BASE + 0x48000)
#define | LPC_I2C1_BASE (LPC_APB0_BASE + 0x5C000)
#define | LPC_SSP0_BASE (LPC_APB1_BASE + 0x08000)
#define | LPC_DAC_BASE (LPC_APB1_BASE + 0x0C000)
#define | LPC_TIM2_BASE (LPC_APB1_BASE + 0x10000)
#define | LPC_TIM3_BASE (LPC_APB1_BASE + 0x14000)
#define | LPC_UART2_BASE (LPC_APB1_BASE + 0x18000)
#define | LPC_UART3_BASE (LPC_APB1_BASE + 0x1C000)
#define | LPC_I2C2_BASE (LPC_APB1_BASE + 0x20000)
#define | LPC_I2S_BASE (LPC_APB1_BASE + 0x28000)
#define | LPC_RIT_BASE (LPC_APB1_BASE + 0x30000)
#define | LPC_MCPWM_BASE (LPC_APB1_BASE + 0x38000)
#define | LPC_QEI_BASE (LPC_APB1_BASE + 0x3C000)
#define | LPC_SC_BASE (LPC_APB1_BASE + 0x7C000)
#define | LPC_EMAC_BASE (LPC_AHB_BASE + 0x00000)
#define | LPC_GPDMA_BASE (LPC_AHB_BASE + 0x04000)
#define | LPC_GPDMACH0_BASE (LPC_AHB_BASE + 0x04100)
#define | LPC_GPDMACH1_BASE (LPC_AHB_BASE + 0x04120)
#define | LPC_GPDMACH2_BASE (LPC_AHB_BASE + 0x04140)
#define | LPC_GPDMACH3_BASE (LPC_AHB_BASE + 0x04160)
#define | LPC_GPDMACH4_BASE (LPC_AHB_BASE + 0x04180)
#define | LPC_GPDMACH5_BASE (LPC_AHB_BASE + 0x041A0)
#define | LPC_GPDMACH6_BASE (LPC_AHB_BASE + 0x041C0)
#define | LPC_GPDMACH7_BASE (LPC_AHB_BASE + 0x041E0)
#define | LPC_USB_BASE (LPC_AHB_BASE + 0x0C000)
#define | LPC_GPIO0_BASE (LPC_GPIO_BASE + 0x00000)
#define | LPC_GPIO1_BASE (LPC_GPIO_BASE + 0x00020)
#define | LPC_GPIO2_BASE (LPC_GPIO_BASE + 0x00040)
#define | LPC_GPIO3_BASE (LPC_GPIO_BASE + 0x00060)
#define | LPC_GPIO4_BASE (LPC_GPIO_BASE + 0x00080)
#define | LPC_SC ((LPC_SC_TypeDef *) LPC_SC_BASE )
#define | LPC_GPIO0 ((LPC_GPIO_TypeDef *) LPC_GPIO0_BASE )
#define | LPC_GPIO1 ((LPC_GPIO_TypeDef *) LPC_GPIO1_BASE )
#define | LPC_GPIO2 ((LPC_GPIO_TypeDef *) LPC_GPIO2_BASE )
#define | LPC_GPIO3 ((LPC_GPIO_TypeDef *) LPC_GPIO3_BASE )
#define | LPC_GPIO4 ((LPC_GPIO_TypeDef *) LPC_GPIO4_BASE )
#define | LPC_WDT ((LPC_WDT_TypeDef *) LPC_WDT_BASE )
#define | LPC_TIM0 ((LPC_TIM_TypeDef *) LPC_TIM0_BASE )
#define | LPC_TIM1 ((LPC_TIM_TypeDef *) LPC_TIM1_BASE )
#define | LPC_TIM2 ((LPC_TIM_TypeDef *) LPC_TIM2_BASE )
#define | LPC_TIM3 ((LPC_TIM_TypeDef *) LPC_TIM3_BASE )
#define | LPC_RIT ((LPC_RIT_TypeDef *) LPC_RIT_BASE )
#define | LPC_UART0 ((LPC_UART_TypeDef *) LPC_UART0_BASE )
#define | LPC_UART1 ((LPC_UART1_TypeDef *) LPC_UART1_BASE )
#define | LPC_UART2 ((LPC_UART_TypeDef *) LPC_UART2_BASE )
#define | LPC_UART3 ((LPC_UART_TypeDef *) LPC_UART3_BASE )
#define | LPC_PWM1 ((LPC_PWM_TypeDef *) LPC_PWM1_BASE )
#define | LPC_I2C0 ((LPC_I2C_TypeDef *) LPC_I2C0_BASE )
#define | LPC_I2C1 ((LPC_I2C_TypeDef *) LPC_I2C1_BASE )
#define | LPC_I2C2 ((LPC_I2C_TypeDef *) LPC_I2C2_BASE )
#define | LPC_I2S ((LPC_I2S_TypeDef *) LPC_I2S_BASE )
#define | LPC_SPI ((LPC_SPI_TypeDef *) LPC_SPI_BASE )
#define | LPC_RTC ((LPC_RTC_TypeDef *) LPC_RTC_BASE )
#define | LPC_GPIOINT ((LPC_GPIOINT_TypeDef *) LPC_GPIOINT_BASE )
#define | LPC_PINCON ((LPC_PINCON_TypeDef *) LPC_PINCON_BASE )
#define | LPC_SSP0 ((LPC_SSP_TypeDef *) LPC_SSP0_BASE )
#define | LPC_SSP1 ((LPC_SSP_TypeDef *) LPC_SSP1_BASE )
#define | LPC_ADC ((LPC_ADC_TypeDef *) LPC_ADC_BASE )
#define | LPC_DAC ((LPC_DAC_TypeDef *) LPC_DAC_BASE )
#define | LPC_CANAF_RAM ((LPC_CANAF_RAM_TypeDef *) LPC_CANAF_RAM_BASE)
#define | LPC_CANAF ((LPC_CANAF_TypeDef *) LPC_CANAF_BASE )
#define | LPC_CANCR ((LPC_CANCR_TypeDef *) LPC_CANCR_BASE )
#define | LPC_CAN1 ((LPC_CAN_TypeDef *) LPC_CAN1_BASE )
#define | LPC_CAN2 ((LPC_CAN_TypeDef *) LPC_CAN2_BASE )
#define | LPC_MCPWM ((LPC_MCPWM_TypeDef *) LPC_MCPWM_BASE )
#define | LPC_QEI ((LPC_QEI_TypeDef *) LPC_QEI_BASE )
#define | LPC_EMAC ((LPC_EMAC_TypeDef *) LPC_EMAC_BASE )
#define | LPC_GPDMA ((LPC_GPDMA_TypeDef *) LPC_GPDMA_BASE )
#define | DMAREQSEL (*(__IO uint32_t *) ( 0x4000C1C4))
#define | LPC_GPDMACH0 ((LPC_GPDMACH_TypeDef *) LPC_GPDMACH0_BASE )
#define | LPC_GPDMACH1 ((LPC_GPDMACH_TypeDef *) LPC_GPDMACH1_BASE )
#define | LPC_GPDMACH2 ((LPC_GPDMACH_TypeDef *) LPC_GPDMACH2_BASE )
#define | LPC_GPDMACH3 ((LPC_GPDMACH_TypeDef *) LPC_GPDMACH3_BASE )
#define | LPC_GPDMACH4 ((LPC_GPDMACH_TypeDef *) LPC_GPDMACH4_BASE )
#define | LPC_GPDMACH5 ((LPC_GPDMACH_TypeDef *) LPC_GPDMACH5_BASE )
#define | LPC_GPDMACH6 ((LPC_GPDMACH_TypeDef *) LPC_GPDMACH6_BASE )
#define | LPC_GPDMACH7 ((LPC_GPDMACH_TypeDef *) LPC_GPDMACH7_BASE )
#define | LPC_USB ((LPC_USB_TypeDef *) LPC_USB_BASE )

Typedefs

typedef enum IRQn | IRQn_Type
IRQ interrupt source definition.

Enumerations

enum IRQn {
NonMaskableInt_IRQn = -14, MemoryManagement_IRQn = -12, BusFault_IRQn = -11, UsageFault_IRQn = -10,
SVCall_IRQn = -5, DebugMonitor_IRQn = -4, PendSV_IRQn = -2, SysTick_IRQn = -1,
WDT_IRQn = 0, TIMER0_IRQn = 1, TIMER1_IRQn = 2, TIMER2_IRQn = 3,
TIMER3_IRQn = 4, UART0_IRQn = 5, UART1_IRQn = 6, UART2_IRQn = 7,
UART3_IRQn = 8, PWM1_IRQn = 9, I2C0_IRQn = 10, I2C1_IRQn = 11,
I2C2_IRQn = 12, SPI_IRQn = 13, SSP0_IRQn = 14, SSP1_IRQn = 15,
PLL0_IRQn = 16, RTC_IRQn = 17, EINT0_IRQn = 18, EINT1_IRQn = 19,
EINT2_IRQn = 20, EINT3_IRQn = 21, ADC_IRQn = 22, BOD_IRQn = 23,
USB_IRQn = 24, CAN_IRQn = 25, DMA_IRQn = 26, I2S_IRQn = 27,
ENET_IRQn = 28, RIT_IRQn = 29, MCPWM_IRQn = 30, QEI_IRQn = 31,
PLL1_IRQn = 32, USBActivity_IRQn = 33, CANActivity_IRQn = 34
}
IRQ interrupt source definition. More...

Detailed Description

CMSIS Cortex-M3 Core Peripheral Access Layer Header File for NXP LPC17xx Device Series.

Version:
: V1.08
Date:
: 21. December 2009
Note:
Copyright (C) 2009 ARM Limited. All rights reserved.
ARM Limited (ARM) is supplying this software for use with Cortex-M processor based microcontrollers. This file can be freely distributed within development tools that are supporting such ARM based processors.
THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file LPC17xx.h.

Generated on Tue Jun 7 14:59:05 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CM3/DeviceSupport/NXP/LPC17xx/system_LPC17xx.c File Reference

C:/nxpdrv/LPC1700CMSIS/Core/CM3/DeviceSupport/NXP/LPC17xx/system_LPC17xx.c File Reference

CMSIS Cortex-M3 Device Peripheral Access Layer Source File for the NXP LPC17xx Device Series. More...

#include <stdint.h>
#include "LPC17xx.h"

Go to the source code of this file.

Defines

#define | CLOCK_SETUP 1
#define | SCS_Val 0x00000020
#define | CLKSRCSEL_Val 0x00000001
#define | PLL0_SETUP 1
#define | PLL0CFG_Val 0x00050063
#define | PLL1_SETUP 1
#define | PLL1CFG_Val 0x00000023
#define | CCLKCFG_Val 0x00000003
#define | USBCLKCFG_Val 0x00000000
#define | PCLKSEL0_Val 0x00000000
#define | PCLKSEL1_Val 0x00000000
#define | PCONP_Val 0x042887DE
#define | CLKOUTCFG_Val 0x00000000
#define | FLASH_SETUP 1
#define | FLASHCFG_Val 0x0000303A
#define | CHECK_RANGE(val, min, max) ((val < min) || (val > max))
#define | CHECK_RSVD(val, mask) (val & mask)
#define | XTAL (12000000UL)
#define | OSC_CLK ( XTAL)
#define | RTC_CLK ( 32768UL)
#define | IRC_OSC ( 4000000UL)
#define | __M (((PLL0CFG_Val ) & 0x7FFF) + 1)
#define | __N (((PLL0CFG_Val >> 16) & 0x00FF) + 1)
#define | __FCCO(__F_IN) ((2 * __M * __F_IN) / __N)
#define | __CCLK_DIV (((CCLKCFG_Val ) & 0x00FF) + 1)
#define | __CORE_CLK (__FCCO(OSC_CLK) / __CCLK_DIV)

Functions

void | SystemCoreClockUpdate (void)
Updates the SystemCoreClock with current core Clock retrieved from cpu registers.
void | SystemInit (void)
Setup the microcontroller system. Initialize the System.

Variables

uint32_t | SystemCoreClock = __CORE_CLK

Detailed Description

CMSIS Cortex-M3 Device Peripheral Access Layer Source File for the NXP LPC17xx Device Series.

Version:
V1.03
Date:
07. October 2009
Note:
Copyright (C) 2009 ARM Limited. All rights reserved.
ARM Limited (ARM) is supplying this software for use with Cortex-M processor based microcontrollers. This file can be freely distributed within development tools that are supporting such ARM based processors.
THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file system_LPC17xx.c.

Generated on Tue Jun 7 14:59:05 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CM3/DeviceSupport/NXP/LPC17xx/system_LPC17xx.h File Reference

C:/nxpdrv/LPC1700CMSIS/Core/CM3/DeviceSupport/NXP/LPC17xx/system_LPC17xx.h File Reference

CMSIS Cortex-M3 Device Peripheral Access Layer Header File for the NXP LPC17xx Device Series. More...

#include <stdint.h>

Go to the source code of this file.

Functions

void | SystemInit (void)
Setup the microcontroller system. Initialize the System and update the SystemCoreClock variable.
void | SystemCoreClockUpdate (void)
Updates the SystemCoreClock with current core Clock retrieved from cpu registers.

Variables

uint32_t | SystemCoreClock

Detailed Description

CMSIS Cortex-M3 Device Peripheral Access Layer Header File for the NXP LPC17xx Device Series.

Version:
V1.02
Date:
08. September 2009
Note:
Copyright (C) 2009 ARM Limited. All rights reserved.
ARM Limited (ARM) is supplying this software for use with Cortex-M processor based microcontrollers. This file can be freely distributed within development tools that are supporting such ARM based processors.
THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file system_LPC17xx.h.

Generated on Tue Jun 7 14:59:05 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Drivers/include/debug_frmwrk.h File Reference

C:/nxpdrv/LPC1700CMSIS/Drivers/include/debug_frmwrk.h File Reference

Contains some utilities that used for debugging through UART. More...

#include "lpc17xx_uart.h"

Go to the source code of this file.

Defines

#define | USED_UART_DEBUG_PORT 0
#define | DEBUG_UART_PORT LPC_UART0
#define | _DBG(x) _db_msg(DEBUG_UART_PORT, x)
#define | _DBG_(x) _db_msg_(DEBUG_UART_PORT, x)
#define | _DBC(x) _db_char(DEBUG_UART_PORT, x)
#define | _DBD(x) _db_dec(DEBUG_UART_PORT, x)
#define | _DBD16(x) _db_dec_16(DEBUG_UART_PORT, x)
#define | _DBD32(x) _db_dec_32(DEBUG_UART_PORT, x)
#define | _DBH(x) _db_hex(DEBUG_UART_PORT, x)
#define | _DBH16(x) _db_hex_16(DEBUG_UART_PORT, x)
#define | _DBH32(x) _db_hex_32(DEBUG_UART_PORT, x)
#define | _DG _db_get_char(DEBUG_UART_PORT)

Functions

void | UARTPutChar (LPC_UART_TypeDef *UARTx, uint8_t ch)
Puts a character to UART port.
void | UARTPuts (LPC_UART_TypeDef *UARTx, const void *str)
Puts a string to UART port.
void | UARTPuts_ (LPC_UART_TypeDef *UARTx, const void *str)
Puts a string to UART port and print new line.
void | UARTPutDec (LPC_UART_TypeDef *UARTx, uint8_t decnum)
Puts a decimal number to UART port.
void | UARTPutDec16 (LPC_UART_TypeDef *UARTx, uint16_t decnum)
Puts a decimal number to UART port.
void | UARTPutDec32 (LPC_UART_TypeDef *UARTx, uint32_t decnum)
Puts a decimal number to UART port.
void | UARTPutHex (LPC_UART_TypeDef *UARTx, uint8_t hexnum)
Puts a hex number to UART port.
void | UARTPutHex16 (LPC_UART_TypeDef *UARTx, uint16_t hexnum)
Puts a hex number to UART port.
void | UARTPutHex32 (LPC_UART_TypeDef *UARTx, uint32_t hexnum)
Puts a hex number to UART port.
uint8_t | UARTGetChar (LPC_UART_TypeDef *UARTx)
Get a character to UART port.
void | debug_frmwrk_init (void)
*********************************************************************//**

Variables

void(* | _db_msg )(LPC_UART_TypeDef *UARTx, const void *s)
void(* | _db_msg_ )(LPC_UART_TypeDef *UARTx, const void *s)
void(* | _db_char )(LPC_UART_TypeDef *UARTx, uint8_t ch)
void(* | _db_dec )(LPC_UART_TypeDef *UARTx, uint8_t decn)
void(* | _db_dec_16 )(LPC_UART_TypeDef *UARTx, uint16_t decn)
void(* | _db_dec_32 )(LPC_UART_TypeDef *UARTx, uint32_t decn)
void(* | _db_hex )(LPC_UART_TypeDef *UARTx, uint8_t hexn)
void(* | _db_hex_16 )(LPC_UART_TypeDef *UARTx, uint16_t hexn)
void(* | _db_hex_32 )(LPC_UART_TypeDef *UARTx, uint32_t hexn)
uint8_t(* | _db_get_char )(LPC_UART_TypeDef *UARTx)

Detailed Description

Contains some utilities that used for debugging through UART.

Version:
2.0
Date:
21. May. 2010
Author:
NXP MCU SW Application Team
Copyright(C) 2010, NXP Semiconductor All rights reserved.

Software that is described herein is for illustrative purposes only which provides customers with programming information regarding the products. This software is supplied "AS IS" without any warranties. NXP Semiconductors assumes no responsibility or liability for the use of the software, conveys no license or title under any patent, copyright, or mask work right to the product. NXP Semiconductors reserves the right to make changes in the software without notification. NXP Semiconductors also make no representation or warranty that such application will be suitable for the specified use without further testing or modification.

Definition in file debug_frmwrk.h.

Define Documentation

#define _DBC ( x ) _db_char(DEBUG_UART_PORT, x)

Definition at line 41 of file debug_frmwrk.h.

#define _DBD ( x ) _db_dec(DEBUG_UART_PORT, x)

Definition at line 42 of file debug_frmwrk.h.

#define _DBD16 ( x ) _db_dec_16(DEBUG_UART_PORT, x)

Definition at line 43 of file debug_frmwrk.h.

#define _DBD32 ( x ) _db_dec_32(DEBUG_UART_PORT, x)

Definition at line 44 of file debug_frmwrk.h.

#define _DBG ( x ) _db_msg(DEBUG_UART_PORT, x)

Definition at line 39 of file debug_frmwrk.h.

#define _DBG_ ( x ) _db_msg_(DEBUG_UART_PORT, x)

Definition at line 40 of file debug_frmwrk.h.

#define _DBH ( x ) _db_hex(DEBUG_UART_PORT, x)

Definition at line 45 of file debug_frmwrk.h.

#define _DBH16 ( x ) _db_hex_16(DEBUG_UART_PORT, x)

Definition at line 46 of file debug_frmwrk.h.

#define _DBH32 ( x ) _db_hex_32(DEBUG_UART_PORT, x)

Definition at line 47 of file debug_frmwrk.h.

#define _DG _db_get_char(DEBUG_UART_PORT)

Definition at line 48 of file debug_frmwrk.h.

#define DEBUG_UART_PORT LPC_UART0

Definition at line 34 of file debug_frmwrk.h.

#define USED_UART_DEBUG_PORT 0

Definition at line 31 of file debug_frmwrk.h.

Function Documentation

void debug_frmwrk_init ( void )

*********************************************************************//**

Initialize Debug frame work through initializing UART port

Parameters:
[in] None
Returns:
None

Definition at line 253 of file debug_frmwrk.c.

uint8_t UARTGetChar ( LPC_UART_TypeDef * UARTx )

Get a character to UART port.

Parameters:
[in] UARTx Pointer to UART peripheral
Returns:
character value that returned

Definition at line 71 of file debug_frmwrk.c.

void UARTPutChar | ( | LPC_UART_TypeDef * | UARTx,
 |  | uint8_t | ch
 | ) |  |

Puts a character to UART port.

Parameters:
[in] | UARTx | Pointer to UART peripheral
[in] | ch | Character to put
Returns:
None

Definition at line 60 of file debug_frmwrk.c.

void UARTPutDec | ( | LPC_UART_TypeDef * | UARTx,
 |  | uint8_t | decnum
 | ) |  |

Puts a decimal number to UART port.

Parameters:
[in] | UARTx | Pointer to UART peripheral
[in] | decnum | Decimal number (8-bit long)
Returns:
None

Definition at line 115 of file debug_frmwrk.c.

void UARTPutDec16 | ( | LPC_UART_TypeDef * | UARTx,
 |  | uint16_t | decnum
 | ) |  |

Puts a decimal number to UART port.

Parameters:
[in] | UARTx | Pointer to UART peripheral
[in] | decnum | Decimal number (8-bit long)
Returns:
None

Definition at line 131 of file debug_frmwrk.c.

void UARTPutDec32 | ( | LPC_UART_TypeDef * | UARTx,
 |  | uint32_t | decnum
 | ) |  |

Puts a decimal number to UART port.

Parameters:
[in] | UARTx | Pointer to UART peripheral
[in] | decnum | Decimal number (8-bit long)
Returns:
None

Definition at line 151 of file debug_frmwrk.c.

void UARTPutHex | ( | LPC_UART_TypeDef * | UARTx,
 |  | uint8_t | hexnum
 | ) |  |

Puts a hex number to UART port.

Parameters:
[in] | UARTx | Pointer to UART peripheral
[in] | hexnum | Hex number (8-bit long)
Returns:
None

Definition at line 181 of file debug_frmwrk.c.

void UARTPutHex16 | ( | LPC_UART_TypeDef * | UARTx,
 |  | uint16_t | hexnum
 | ) |  |

Puts a hex number to UART port.

Parameters:
[in] | UARTx | Pointer to UART peripheral
[in] | hexnum | Hex number (16-bit long)
Returns:
None

Definition at line 200 of file debug_frmwrk.c.

void UARTPutHex32 | ( | LPC_UART_TypeDef * | UARTx,
 |  | uint32_t | hexnum
 | ) |  |

Puts a hex number to UART port.

Parameters:
[in] | UARTx | Pointer to UART peripheral
[in] | hexnum | Hex number (32-bit long)
Returns:
None

Definition at line 218 of file debug_frmwrk.c.

void UARTPuts | ( | LPC_UART_TypeDef * | UARTx,
 |  | const void * | str
 | ) |  |

Puts a string to UART port.

Parameters:
[in] | UARTx | Pointer to UART peripheral
[in] | str | string to put
Returns:
None

Definition at line 85 of file debug_frmwrk.c.

void UARTPuts_ | ( | LPC_UART_TypeDef * | UARTx,
 |  | const void * | str
 | ) |  |

Puts a string to UART port and print new line.

Parameters:
[in] | UARTx | Pointer to UART peripheral
[in] | str | String to put
Returns:
None

Definition at line 102 of file debug_frmwrk.c.

Variable Documentation

void(* _db_char)(LPC_UART_TypeDef *UARTx, uint8_t ch)

void(* _db_dec)(LPC_UART_TypeDef *UARTx, uint8_t decn)

void(* _db_dec_16)(LPC_UART_TypeDef *UARTx, uint16_t decn)

void(* _db_dec_32)(LPC_UART_TypeDef *UARTx, uint32_t decn)

uint8_t(* _db_get_char)(LPC_UART_TypeDef *UARTx)

void(* _db_hex)(LPC_UART_TypeDef *UARTx, uint8_t hexn)

void(* _db_hex_16)(LPC_UART_TypeDef *UARTx, uint16_t hexn)

void(* _db_hex_32)(LPC_UART_TypeDef *UARTx, uint32_t hexn)

void(* _db_msg)(LPC_UART_TypeDef *UARTx, const void *s)

void(* _db_msg_)(LPC_UART_TypeDef *UARTx, const void *s)

Generated on Tue Jun 7 14:59:05 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_adc.h File Reference

C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_adc.h File Reference

Contains the NXP ABL typedefs for C standard types. It is intended to be used in ISO C conforming development environments and checks for this insofar as it is possible to do so. More...

#include "LPC17xx.h"
#include "lpc_types.h"

Go to the source code of this file.

Defines

#define | ADC_CR_CH_SEL(n) ((1UL << n))
#define | ADC_CR_CLKDIV(n) ((n<<8))
#define | ADC_CR_BURST ((1UL<<16))
#define | ADC_CR_PDN ((1UL<<21))
#define | ADC_CR_START_MASK ((7UL<<24))
#define | ADC_CR_START_MODE_SEL(SEL) ((SEL<<24))
#define | ADC_CR_START_NOW ((1UL<<24))
#define | ADC_CR_START_EINT0 ((2UL<<24))
#define | ADC_CR_START_CAP01 ((3UL<<24))
#define | ADC_CR_START_MAT01 ((4UL<<24))
#define | ADC_CR_START_MAT03 ((5UL<<24))
#define | ADC_CR_START_MAT10 ((6UL<<24))
#define | ADC_CR_START_MAT11 ((7UL<<24))
#define | ADC_CR_EDGE ((1UL<<27))
#define | ADC_GDR_RESULT(n) (((n>>4)&0xFFF))
#define | ADC_GDR_CH(n) (((n>>24)&0x7))
#define | ADC_GDR_OVERRUN_FLAG ((1UL<<30))
#define | ADC_GDR_DONE_FLAG ((1UL<<31))
#define | ADC_GDR_CH_MASK ((7UL<<24))
#define | ADC_INTEN_CH(n) ((1UL<<n))
#define | ADC_INTEN_GLOBAL ((1UL<<8))
#define | ADC_DR_RESULT(n) (((n>>4)&0xFFF))
#define | ADC_DR_OVERRUN_FLAG ((1UL<<30))
#define | ADC_DR_DONE_FLAG ((1UL<<31))
#define | ADC_STAT_CH_DONE_FLAG(n) ((n&0xFF))
#define | ADC_STAT_CH_OVERRUN_FLAG(n) (((n>>8)&0xFF))
#define | ADC_STAT_INT_FLAG ((1UL<<16))
#define | ADC_ADCOFFS(n) (((n&0xF)<<4))
#define | ADC_TRIM(n) (((n&0xF)<<8))
#define | PARAM_ADCx(n) (((uint32_t *)n)==((uint32_t *)LPC_ADC))
#define | PARAM_ADC_START_ON_EDGE_OPT(OPT) ((OPT == ADC_START_ON_RISING)||(OPT == ADC_START_ON_FALLING))
#define | PARAM_ADC_DATA_STATUS(OPT) ((OPT== ADC_DATA_BURST)||(OPT== ADC_DATA_DONE))
#define | PARAM_ADC_RATE(rate) ((rate>0)&&(rate<=200000))
#define | PARAM_ADC_CHANNEL_SELECTION(SEL)
#define | PARAM_ADC_START_OPT(OPT)
#define | PARAM_ADC_TYPE_INT_OPT(OPT)

Enumerations

enum ADC_CHANNEL_SELECTION {
ADC_CHANNEL_0 = 0, ADC_CHANNEL_1, ADC_CHANNEL_2, ADC_CHANNEL_3,
ADC_CHANNEL_4, ADC_CHANNEL_5, ADC_CHANNEL_6, ADC_CHANNEL_7
}
ADC enumeration. More...
enum ADC_START_OPT {
ADC_START_CONTINUOUS = 0, ADC_START_NOW, ADC_START_ON_EINT0, ADC_START_ON_CAP01,
ADC_START_ON_MAT01, ADC_START_ON_MAT03, ADC_START_ON_MAT10, ADC_START_ON_MAT11
}
Type of start option. More...
enum | ADC_START_ON_EDGE_OPT { ADC_START_ON_RISING = 0, ADC_START_ON_FALLING }
Type of edge when start conversion on the selected CAP/MAT signal. More...
enum ADC_TYPE_INT_OPT {
ADC_ADINTEN0 = 0, ADC_ADINTEN1, ADC_ADINTEN2, ADC_ADINTEN3,
ADC_ADINTEN4, ADC_ADINTEN5, ADC_ADINTEN6, ADC_ADINTEN7,
ADC_ADGINTEN
}
* ADC type interrupt enum More...
enum | ADC_DATA_STATUS { ADC_DATA_BURST = 0, ADC_DATA_DONE }
ADC Data status. More...

Functions

void | ADC_Init (LPC_ADC_TypeDef *ADCx, uint32_t rate)
Initial for ADC + Set bit PCADC + Set clock for ADC + Set Clock Frequency.
void | ADC_DeInit (LPC_ADC_TypeDef *ADCx)
Close ADC.
void | ADC_BurstCmd (LPC_ADC_TypeDef *ADCx, FunctionalState NewState)
ADC Burst mode setting.
void | ADC_PowerdownCmd (LPC_ADC_TypeDef *ADCx, FunctionalState NewState)
Set AD conversion in power mode.
void | ADC_StartCmd (LPC_ADC_TypeDef *ADCx, uint8_t start_mode)
Set start mode for ADC.
void | ADC_ChannelCmd (LPC_ADC_TypeDef *ADCx, uint8_t Channel, FunctionalState NewState)
Enable/Disable ADC channel number.
void | ADC_EdgeStartConfig (LPC_ADC_TypeDef *ADCx, uint8_t EdgeOption)
Set Edge start configuration.
void | ADC_IntConfig (LPC_ADC_TypeDef *ADCx, ADC_TYPE_INT_OPT IntType, FunctionalState NewState)
ADC interrupt configuration.
uint16_t | ADC_ChannelGetData (LPC_ADC_TypeDef *ADCx, uint8_t channel)
Get ADC result.
FlagStatus | ADC_ChannelGetStatus (LPC_ADC_TypeDef *ADCx, uint8_t channel, uint32_t StatusType)
Get ADC Chanel status from ADC data register.
uint32_t | ADC_GlobalGetData (LPC_ADC_TypeDef *ADCx)
Get ADC Data from AD Global register.
FlagStatus | ADC_GlobalGetStatus (LPC_ADC_TypeDef *ADCx, uint32_t StatusType)
Get ADC Chanel status from AD global data register.

Detailed Description

Contains the NXP ABL typedefs for C standard types. It is intended to be used in ISO C conforming development environments and checks for this insofar as it is possible to do so.

Version:
2.0
Date:
27 Jul. 2008
Author:
NXP MCU SW Application Team
Copyright(C) 2008, NXP Semiconductor All rights reserved.

Software that is described herein is for illustrative purposes only which provides customers with programming information regarding the products. This software is supplied "AS IS" without any warranties. NXP Semiconductors assumes no responsibility or liability for the use of the software, conveys no license or title under any patent, copyright, or mask work right to the product. NXP Semiconductors reserves the right to make changes in the software without notification. NXP Semiconductors also make no representation or warranty that such application will be suitable for the specified use without further testing or modification.

Definition in file lpc17xx_adc.h.

Generated on Tue Jun 7 14:59:05 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_can.h File Reference

C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_can.h File Reference

Contains all macro definitions and function prototypes support for CAN firmware library on LPC17xx. More...

#include "LPC17xx.h"
#include "lpc_types.h"

Go to the source code of this file.

Data Structures

struct | CAN_PinCFG_Type
Pin Configuration structure. More...
struct | CAN_MSG_Type
CAN message object structure. More...
struct | FullCAN_Entry
FullCAN Entry structure. More...
struct | SFF_Entry
Standard ID Frame Format Entry structure. More...
struct | SFF_GPR_Entry
Group of Standard ID Frame Format Entry structure. More...
struct | EFF_Entry
Extended ID Frame Format Entry structure. More...
struct | EFF_GPR_Entry
Group of Extended ID Frame Format Entry structure. More...
struct | AF_SectionDef
Acceptance Filter Section Table structure. More...

Defines

#define | MSG_ENABLE ((uint8_t)(0))
#define | MSG_DISABLE ((uint8_t)(1))
#define | CAN1_CTRL ((uint8_t)(0))
#define | CAN2_CTRL ((uint8_t)(1))
#define | PARAM_FULLCAN_IC(n) ((n==FULLCAN_IC0)||(n==FULLCAN_IC1))
#define | ID_11 1
#define | MAX_HW_FULLCAN_OBJ 64
#define | MAX_SW_FULLCAN_OBJ 32
#define | CAN_MOD_RM ((uint32_t)(1))
#define | CAN_MOD_LOM ((uint32_t)(1<<1))
#define | CAN_MOD_STM ((uint32_t)(1<<2))
#define | CAN_MOD_TPM ((uint32_t)(1<<3))
#define | CAN_MOD_SM ((uint32_t)(1<<4))
#define | CAN_MOD_RPM ((uint32_t)(1<<5))
#define | CAN_MOD_TM ((uint32_t)(1<<7))
#define | CAN_CMR_TR ((uint32_t)(1))
#define | CAN_CMR_AT ((uint32_t)(1<<1))
#define | CAN_CMR_RRB ((uint32_t)(1<<2))
#define | CAN_CMR_CDO ((uint32_t)(1<<3))
#define | CAN_CMR_SRR ((uint32_t)(1<<4))
#define | CAN_CMR_STB1 ((uint32_t)(1<<5))
#define | CAN_CMR_STB2 ((uint32_t)(1<<6))
#define | CAN_CMR_STB3 ((uint32_t)(1<<7))
#define | CAN_GSR_RBS ((uint32_t)(1))
#define | CAN_GSR_DOS ((uint32_t)(1<<1))
#define | CAN_GSR_TBS ((uint32_t)(1<<2))
#define | CAN_GSR_TCS ((uint32_t)(1<<3))
#define | CAN_GSR_RS ((uint32_t)(1<<4))
#define | CAN_GSR_TS ((uint32_t)(1<<5))
#define | CAN_GSR_ES ((uint32_t)(1<<6))
#define | CAN_GSR_BS ((uint32_t)(1<<7))
#define | CAN_GSR_RXERR(n) ((uint32_t)((n&0xFF)<<16))
#define | CAN_GSR_TXERR(n) ((uint32_t)(n&0xFF)<<24))
#define | CAN_ICR_RI ((uint32_t)(1))
#define | CAN_ICR_TI1 ((uint32_t)(1<<1))
#define | CAN_ICR_EI ((uint32_t)(1<<2))
#define | CAN_ICR_DOI ((uint32_t)(1<<3))
#define | CAN_ICR_WUI ((uint32_t)(1<<4))
#define | CAN_ICR_EPI ((uint32_t)(1<<5))
#define | CAN_ICR_ALI ((uint32_t)(1<<6))
#define | CAN_ICR_BEI ((uint32_t)(1<<7))
#define | CAN_ICR_IDI ((uint32_t)(1<<8))
#define | CAN_ICR_TI2 ((uint32_t)(1<<9))
#define | CAN_ICR_TI3 ((uint32_t)(1<<10))
#define | CAN_ICR_ERRBIT(n) ((uint32_t)((n&0x1F)<<16))
#define | CAN_ICR_ERRDIR ((uint32_t)(1<<21))
#define | CAN_ICR_ERRC(n) ((uint32_t)((n&0x3)<<22))
#define | CAN_ICR_ALCBIT(n) ((uint32_t)((n&0xFF)<<24))
#define | CAN_IER_RIE ((uint32_t)(1))
#define | CAN_IER_TIE1 ((uint32_t)(1<<1))
#define | CAN_IER_EIE ((uint32_t)(1<<2))
#define | CAN_IER_DOIE ((uint32_t)(1<<3))
#define | CAN_IER_WUIE ((uint32_t)(1<<4))
#define | CAN_IER_EPIE ((uint32_t)(1<<5))
#define | CAN_IER_ALIE ((uint32_t)(1<<6))
#define | CAN_IER_BEIE ((uint32_t)(1<<7))
#define | CAN_IER_IDIE ((uint32_t)(1<<8))
#define | CAN_IER_TIE2 ((uint32_t)(1<<9))
#define | CAN_IER_TIE3 ((uint32_t)(1<<10))
#define | CAN_BTR_BRP(n) ((uint32_t)(n&0x3FF))
#define | CAN_BTR_SJM(n) ((uint32_t)((n&0x3)<<14))
#define | CAN_BTR_TESG1(n) ((uint32_t)(n&0xF)<<16))
#define | CAN_BTR_TESG2(n) ((uint32_t)(n&0xF)<<20))
#define | CAN_BTR_SAM(n) ((uint32_t)(1<<23))
#define | CAN_EWL_EWL(n) ((uint32_t)(n&0xFF))
#define | CAN_SR_RBS ((uint32_t)(1))
#define | CAN_SR_DOS ((uint32_t)(1<<1))
#define | CAN_SR_TBS1 ((uint32_t)(1<<2))
#define | CAN_SR_TCS1 ((uint32_t)(1<<3))
#define | CAN_SR_RS ((uint32_t)(1<<4))
#define | CAN_SR_TS1 ((uint32_t)(1<<5))
#define | CAN_SR_ES ((uint32_t)(1<<6))
#define | CAN_SR_BS ((uint32_t)(1<<7))
#define | CAN_SR_TBS2 ((uint32_t)(1<<10))
#define | CAN_SR_TCS2 ((uint32_t)(1<<11))
#define | CAN_SR_TS2 ((uint32_t)(1<<13))
#define | CAN_SR_TBS3 ((uint32_t)(1<<18))
#define | CAN_SR_TCS3 ((uint32_t)(1<<19))
#define | CAN_SR_TS3 ((uint32_t)(1<<21))
#define | CAN_RFS_ID_INDEX(n) ((uint32_t)(n&0x3FF))
#define | CAN_RFS_BP ((uint32_t)(1<<10))
#define | CAN_RFS_DLC(n) ((uint32_t)((n&0xF)<<16)
#define | CAN_RFS_RTR ((uint32_t)(1<<30))
#define | CAN_RFS_FF ((uint32_t)(1<<31))
#define | CAN_RID_ID_11(n) ((uint32_t)(n&0x7FF))
#define | CAN_RID_ID_29(n) ((uint32_t)(n&0x1FFFFFFF))
#define | CAN_RDA_DATA1(n) ((uint32_t)(n&0xFF))
#define | CAN_RDA_DATA2(n) ((uint32_t)((n&0xFF)<<8))
#define | CAN_RDA_DATA3(n) ((uint32_t)((n&0xFF)<<16))
#define | CAN_RDA_DATA4(n) ((uint32_t)((n&0xFF)<<24))
#define | CAN_RDB_DATA5(n) ((uint32_t)(n&0xFF))
#define | CAN_RDB_DATA6(n) ((uint32_t)((n&0xFF)<<8))
#define | CAN_RDB_DATA7(n) ((uint32_t)((n&0xFF)<<16))
#define | CAN_RDB_DATA8(n) ((uint32_t)((n&0xFF)<<24))
#define | CAN_TFI_PRIO(n) ((uint32_t)(n&0xFF))
#define | CAN_TFI_DLC(n) ((uint32_t)((n&0xF)<<16))
#define | CAN_TFI_RTR ((uint32_t)(1<<30))
#define | CAN_TFI_FF ((uint32_t)(1<<31))
#define | CAN_TID_ID11(n) ((uint32_t)(n&0x7FF))
#define | CAN_TID_ID29(n) ((uint32_t)(n&0x1FFFFFFF))
#define | CAN_TDA_DATA1(n) ((uint32_t)(n&0xFF))
#define | CAN_TDA_DATA2(n) ((uint32_t)((n&0xFF)<<8))
#define | CAN_TDA_DATA3(n) ((uint32_t)((n&0xFF)<<16))
#define | CAN_TDA_DATA4(n) ((uint32_t)((n&0xFF)<<24))
#define | CAN_TDA_DATA5(n) ((uint32_t)(n&0xFF))
#define | CAN_TDA_DATA6(n) ((uint32_t)((n&0xFF)<<8))
#define | CAN_TDA_DATA7(n) ((uint32_t)((n&0xFF)<<16))
#define | CAN_TDA_DATA8(n) ((uint32_t)((n&0xFF)<<24))
#define | CAN1SLEEPCLR ((uint32_t)(1<<1))
#define | CAN2SLEEPCLR ((uint32_t)(1<<2))
#define | CAN_WAKEFLAGES_CAN1WAKE ((uint32_t)(1<<1))
#define | CAN_WAKEFLAGES_CAN2WAKE ((uint32_t)(1<<2))
#define | CAN_TSR_TS1 ((uint32_t)(1))
#define | CAN_TSR_TS2 ((uint32_t)(1<<1))
#define | CAN_TSR_TBS1 ((uint32_t)(1<<8))
#define | CAN_TSR_TBS2 ((uint32_t)(1<<9))
#define | CAN_TSR_TCS1 ((uint32_t)(1<<16))
#define | CAN_TSR_TCS2 ((uint32_t)(1<<17))
#define | CAN_RSR_RS1 ((uint32_t)(1))
#define | CAN_RSR_RS2 ((uint32_t)(1<<1))
#define | CAN_RSR_RB1 ((uint32_t)(1<<8))
#define | CAN_RSR_RB2 ((uint32_t)(1<<9))
#define | CAN_RSR_DOS1 ((uint32_t)(1<<16))
#define | CAN_RSR_DOS2 ((uint32_t)(1<<17))
#define | CAN_MSR_E1 ((uint32_t)(1))
#define | CAN_MSR_E2 ((uint32_t)(1<<1))
#define | CAN_MSR_BS1 ((uint32_t)(1<<8))
#define | CAN_MSR_BS2 ((uint32_t)(1<<9))
#define | CAN_AFMR_AccOff ((uint32_t)(1))
#define | CAN_AFMR_AccBP ((uint32_t)(1<<1))
#define | CAN_AFMR_eFCAN ((uint32_t)(1<<2))
#define | CAN_STT_sa(n) ((uint32_t)((n&1FF)<<2))
#define | CAN_SFF_GRP_sa(n) ((uint32_t)((n&3FF)<<2))
#define | CAN_EFF_sa(n) ((uint32_t)((n&1FF)<<2))
#define | CAN_Eff_GRP_sa(n) ((uint32_t)((n&3FF)<<2))
#define | CAN_EndofTable(n) ((uint32_t)((n&3FF)<<2))
#define | CAN_LUTerrAd(n) ((uint32_t)((n&1FF)<<2))
#define | CAN_LUTerr ((uint32_t)(1))
#define | CAN_FCANIE ((uint32_t)(1))
#define | CAN_FCANIC0_IntPnd(n) ((uint32_t)(1<<n))
#define | CAN_FCANIC1_IntPnd(n) ((uint32_t)(1<<(n-32)))
#define | PARAM_CANx(x)
#define | PARAM_CANAFx(x) (((uint32_t*)x)== ((uint32_t*)LPC_CANAF))
#define | PARAM_CANAFRAMx(x) (((uint32_t*)x)== (uint32_t*)LPC_CANAF_RAM)
#define | PARAM_CANCRx(x) (((uint32_t*)x)==((uint32_t*)LPC_CANCR))
#define | PARAM_I2S_DATA(data) ((data>=0)&&(data <= 0xFFFFFFFF))
#define | PRAM_I2S_FREQ(freq) ((freq>=16000)&&(freq <= 96000))
#define | PARAM_ID_11(n) ((n>>11)==0)
#define | PARAM_ID_29(n) ((n>>29)==0)
#define | PARAM_DLC(n) ((n>>4)==0)
#define | PARAM_ID_FORMAT(n) ((n==STD_ID_FORMAT)||(n==EXT_ID_FORMAT))
#define | PARAM_GRP_ID(x, y) ((x<=y))
#define | PARAM_FRAME_TYPE(n) ((n==DATA_FRAME)||(n==REMOTE_FRAME))
#define | PARAM_CTRL_STS_TYPE(n)
#define | PARAM_CR_STS_TYPE(n)
#define | PARAM_AFMODE_TYPE(n)
#define | PARAM_MODE_TYPE(n)
#define | PARAM_CTRL(n) ((n==CAN1_CTRL)|(n==CAN2_CTRL))
#define | PARAM_MSG_DISABLE(n) ((n==MSG_ENABLE)|(n==MSG_DISABLE))
#define | PARAM_INT_EN_TYPE(n)
#define | PARAM_AFLUT_ENTRY_TYPE(n)
#define | PARAM_POSITION(n) ((n>=0)&&(n<512))

Enumerations

enum | CAN_ID_FORMAT_Type { STD_ID_FORMAT = 0, EXT_ID_FORMAT = 1 }
CAN ID format definition. More...
enum AFLUT_ENTRY_Type {
FULLCAN_ENTRY = 0, EXPLICIT_STANDARD_ENTRY, GROUP_STANDARD_ENTRY, EXPLICIT_EXTEND_ENTRY,
GROUP_EXTEND_ENTRY
}
AFLUT Entry type definition. More...
enum | CAN_FRAME_Type { DATA_FRAME = 0, REMOTE_FRAME = 1 }
Symbolic names for type of CAN message. More...
enum | CAN_CTRL_STS_Type { CANCTRL_GLOBAL_STS = 0, CANCTRL_INT_CAP, CANCTRL_ERR_WRN, CANCTRL_STS }
CAN Control status definition. More...
enum | CAN_CR_STS_Type { CANCR_TX_STS = 0, CANCR_RX_STS, CANCR_MS }
Central CAN status type definition. More...
enum | FullCAN_IC_Type { FULLCAN_IC0, FULLCAN_IC1 }
FullCAN Interrupt Capture type definition. More...
enum CAN_INT_EN_Type {
CANINT_RIE = 0, CANINT_TIE1, CANINT_EIE, CANINT_DOIE,
CANINT_WUIE, CANINT_EPIE, CANINT_ALIE, CANINT_BEIE,
CANINT_IDIE, CANINT_TIE2, CANINT_TIE3, CANINT_FCE
}
CAN interrupt enable type definition. More...
enum | CAN_AFMODE_Type { CAN_Normal = 0, CAN_AccOff, CAN_AccBP, CAN_eFCAN }
Acceptance Filter Mode type definition. More...
enum CAN_MODE_Type {
CAN_OPERATING_MODE = 0, CAN_RESET_MODE, CAN_LISTENONLY_MODE, CAN_SELFTEST_MODE,
CAN_TXPRIORITY_MODE, CAN_SLEEP_MODE, CAN_RXPOLARITY_MODE, CAN_TEST_MODE
}
CAN Mode Type definition. More...
enum CAN_ERROR {
CAN_OK = 1, CAN_OBJECTS_FULL_ERROR, CAN_FULL_OBJ_NOT_RCV, CAN_NO_RECEIVE_DATA,
CAN_AF_ENTRY_ERROR, CAN_CONFLICT_ID_ERROR, CAN_ENTRY_NOT_EXIT_ERROR
}
Error values that functions can return. More...

Functions

void | CAN_Init (LPC_CAN_TypeDef *CANx, uint32_t baudrate)
Initialize CAN peripheral with given baudrate.
void | CAN_DeInit (LPC_CAN_TypeDef *CANx)
CAN deInit.
Status | CAN_SendMsg (LPC_CAN_TypeDef *CANx, CAN_MSG_Type *CAN_Msg)
Send message data.
Status | CAN_ReceiveMsg (LPC_CAN_TypeDef *CANx, CAN_MSG_Type *CAN_Msg)
Receive message data.
CAN_ERROR | FCAN_ReadObj (LPC_CANAF_TypeDef *CANAFx, CAN_MSG_Type *CAN_Msg)
Receive FullCAN Object.
void | CAN_ModeConfig (LPC_CAN_TypeDef *CANx, CAN_MODE_Type mode, FunctionalState NewState)
Enable/Disable CAN Mode.
void | CAN_SetAFMode (LPC_CANAF_TypeDef *CANAFx, CAN_AFMODE_Type AFMode)
Setting Acceptance Filter mode.
void | CAN_SetCommand (LPC_CAN_TypeDef *CANx, uint32_t CMRType)
Set CAN command request.
CAN_ERROR | CAN_SetupAFLUT (LPC_CANAF_TypeDef *CANAFx, AF_SectionDef *AFSection)
Setup Acceptance Filter Look-Up Table.
CAN_ERROR | CAN_LoadFullCANEntry (LPC_CAN_TypeDef *CANx, uint16_t id)
Load FullCAN entry into AFLUT.
CAN_ERROR | CAN_LoadExplicitEntry (LPC_CAN_TypeDef *CANx, uint32_t id, CAN_ID_FORMAT_Type format)
Add Explicit ID into AF Look-Up Table dynamically.
CAN_ERROR | CAN_LoadGroupEntry (LPC_CAN_TypeDef *CANx, uint32_t lowerID, uint32_t upperID, CAN_ID_FORMAT_Type format)
Load Group entry into AFLUT.
CAN_ERROR | CAN_RemoveEntry (AFLUT_ENTRY_Type EntryType, uint16_t position)
Remove AFLUT entry (FullCAN entry and Explicit Standard entry).
void | CAN_IRQCmd (LPC_CAN_TypeDef *CANx, CAN_INT_EN_Type arg, FunctionalState NewState)
Enable/Disable CAN Interrupt.
uint32_t | CAN_IntGetStatus (LPC_CAN_TypeDef *CANx)
Get CAN interrupt status.
IntStatus | CAN_FullCANIntGetStatus (LPC_CANAF_TypeDef *CANAFx)
Check if FullCAN interrupt enable or not.
uint32_t | CAN_FullCANPendGetStatus (LPC_CANAF_TypeDef *CANAFx, FullCAN_IC_Type type)
Get value of FullCAN interrupt and capture register.
uint32_t | CAN_GetCTRLStatus (LPC_CAN_TypeDef *CANx, CAN_CTRL_STS_Type arg)
Get CAN Control Status.
uint32_t | CAN_GetCRStatus (LPC_CANCR_TypeDef *CANCRx, CAN_CR_STS_Type arg)
Get CAN Central Status.

Detailed Description

Contains all macro definitions and function prototypes support for CAN firmware library on LPC17xx.

Version:
3.0
Date:
18. June. 2010
Author:
NXP MCU SW Application Team
Copyright(C) 2010, NXP Semiconductor All rights reserved.

Software that is described herein is for illustrative purposes only which provides customers with programming information regarding the products. This software is supplied "AS IS" without any warranties. NXP Semiconductors assumes no responsibility or liability for the use of the software, conveys no license or title under any patent, copyright, or mask work right to the product. NXP Semiconductors reserves the right to make changes in the software without notification. NXP Semiconductors also make no representation or warranty that such application will be suitable for the specified use without further testing or modification.

Definition in file lpc17xx_can.h.

Generated on Tue Jun 7 14:59:05 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_clkpwr.h File Reference

C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_clkpwr.h File Reference

Contains all macro definitions and function prototypes support for Clock and Power Control firmware library on LPC17xx. More...

#include "lpc17xx.h"
#include "lpc_types.h"

Go to the source code of this file.

Defines

#define | CLKPWR_PCLKSEL_WDT ((uint32_t)(0))
#define | CLKPWR_PCLKSEL_TIMER0 ((uint32_t)(2))
#define | CLKPWR_PCLKSEL_TIMER1 ((uint32_t)(4))
#define | CLKPWR_PCLKSEL_UART0 ((uint32_t)(6))
#define | CLKPWR_PCLKSEL_UART1 ((uint32_t)(8))
#define | CLKPWR_PCLKSEL_PWM1 ((uint32_t)(12))
#define | CLKPWR_PCLKSEL_I2C0 ((uint32_t)(14))
#define | CLKPWR_PCLKSEL_SPI ((uint32_t)(16))
#define | CLKPWR_PCLKSEL_SSP1 ((uint32_t)(20))
#define | CLKPWR_PCLKSEL_DAC ((uint32_t)(22))
#define | CLKPWR_PCLKSEL_ADC ((uint32_t)(24))
#define | CLKPWR_PCLKSEL_CAN1 ((uint32_t)(26))
#define | CLKPWR_PCLKSEL_CAN2 ((uint32_t)(28))
#define | CLKPWR_PCLKSEL_ACF ((uint32_t)(30))
#define | CLKPWR_PCLKSEL_QEI ((uint32_t)(32))
#define | CLKPWR_PCLKSEL_PCB ((uint32_t)(36))
#define | CLKPWR_PCLKSEL_I2C1 ((uint32_t)(38))
#define | CLKPWR_PCLKSEL_SSP0 ((uint32_t)(42))
#define | CLKPWR_PCLKSEL_TIMER2 ((uint32_t)(44))
#define | CLKPWR_PCLKSEL_TIMER3 ((uint32_t)(46))
#define | CLKPWR_PCLKSEL_UART2 ((uint32_t)(48))
#define | CLKPWR_PCLKSEL_UART3 ((uint32_t)(50))
#define | CLKPWR_PCLKSEL_I2C2 ((uint32_t)(52))
#define | CLKPWR_PCLKSEL_I2S ((uint32_t)(54))
#define | CLKPWR_PCLKSEL_RIT ((uint32_t)(58))
#define | CLKPWR_PCLKSEL_SYSCON ((uint32_t)(60))
#define | CLKPWR_PCLKSEL_MC ((uint32_t)(62))
#define | CLKPWR_PCLKSEL_CCLK_DIV_4 ((uint32_t)(0))
#define | CLKPWR_PCLKSEL_CCLK_DIV_1 ((uint32_t)(1))
#define | CLKPWR_PCLKSEL_CCLK_DIV_2 ((uint32_t)(2))
#define | CLKPWR_PCONP_PCTIM0 ((uint32_t)(1<<1))
#define | CLKPWR_PCONP_PCTIM1 ((uint32_t)(1<<2))
#define | CLKPWR_PCONP_PCUART0 ((uint32_t)(1<<3))
#define | CLKPWR_PCONP_PCUART1 ((uint32_t)(1<<4))
#define | CLKPWR_PCONP_PCPWM1 ((uint32_t)(1<<6))
#define | CLKPWR_PCONP_PCI2C0 ((uint32_t)(1<<7))
#define | CLKPWR_PCONP_PCSPI ((uint32_t)(1<<8))
#define | CLKPWR_PCONP_PCRTC ((uint32_t)(1<<9))
#define | CLKPWR_PCONP_PCSSP1 ((uint32_t)(1<<10))
#define | CLKPWR_PCONP_PCAD ((uint32_t)(1<<12))
#define | CLKPWR_PCONP_PCAN1 ((uint32_t)(1<<13))
#define | CLKPWR_PCONP_PCAN2 ((uint32_t)(1<<14))
#define | CLKPWR_PCONP_PCGPIO ((uint32_t)(1<<15))
#define | CLKPWR_PCONP_PCRIT ((uint32_t)(1<<16))
#define | CLKPWR_PCONP_PCMC ((uint32_t)(1<<17))
#define | CLKPWR_PCONP_PCQEI ((uint32_t)(1<<18))
#define | CLKPWR_PCONP_PCI2C1 ((uint32_t)(1<<19))
#define | CLKPWR_PCONP_PCSSP0 ((uint32_t)(1<<21))
#define | CLKPWR_PCONP_PCTIM2 ((uint32_t)(1<<22))
#define | CLKPWR_PCONP_PCTIM3 ((uint32_t)(1<<23))
#define | CLKPWR_PCONP_PCUART2 ((uint32_t)(1<<24))
#define | CLKPWR_PCONP_PCUART3 ((uint32_t)(1<<25))
#define | CLKPWR_PCONP_PCI2C2 ((uint32_t)(1<<26))
#define | CLKPWR_PCONP_PCI2S ((uint32_t)(1<<27))
#define | CLKPWR_PCONP_PCGPDMA ((uint32_t)(1<<29))
#define | CLKPWR_PCONP_PCENET ((uint32_t)(1<<30))
#define | CLKPWR_PCONP_PCUSB ((uint32_t)(1<<31))
#define | CLKPWR_CLKSRCSEL_CLKSRC_IRC ((uint32_t)(0x00))
#define | CLKPWR_CLKSRCSEL_CLKSRC_MAINOSC ((uint32_t)(0x01))
#define | CLKPWR_CLKSRCSEL_CLKSRC_RTC ((uint32_t)(0x02))
#define | CLKPWR_CLKSRCSEL_BITMASK ((uint32_t)(0x03))
#define | CLKPWR_CLKOUTCFG_CLKOUTSEL_CPU ((uint32_t)(0x00))
#define | CLKPWR_CLKOUTCFG_CLKOUTSEL_MAINOSC ((uint32_t)(0x01))
#define | CLKPWR_CLKOUTCFG_CLKOUTSEL_RC ((uint32_t)(0x02))
#define | CLKPWR_CLKOUTCFG_CLKOUTSEL_USB ((uint32_t)(0x03))
#define | CLKPWR_CLKOUTCFG_CLKOUTSEL_RTC ((uint32_t)(0x04))
#define | CLKPWR_CLKOUTCFG_CLKOUTDIV(n) ((uint32_t)((n&0x0F)<<4))
#define | CLKPWR_CLKOUTCFG_CLKOUT_EN ((uint32_t)(1<<8))
#define | CLKPWR_CLKOUTCFG_CLKOUT_ACT ((uint32_t)(1<<9))
#define | CLKPWR_CLKOUTCFG_BITMASK ((uint32_t)(0x3FF))
#define | CLKPWR_PLL0CON_ENABLE ((uint32_t)(0x01))
#define | CLKPWR_PLL0CON_CONNECT ((uint32_t)(0x02))
#define | CLKPWR_PLL0CON_BITMASK ((uint32_t)(0x03))
#define | CLKPWR_PLL0CFG_MSEL(n) ((uint32_t)(n&0x7FFF))
#define | CLKPWR_PLL0CFG_NSEL(n) ((uint32_t)((n<<16)&0xFF0000))
#define | CLKPWR_PLL0CFG_BITMASK ((uint32_t)(0xFF7FFF))
#define | CLKPWR_PLL0STAT_MSEL(n) ((uint32_t)(n&0x7FFF))
#define | CLKPWR_PLL0STAT_NSEL(n) ((uint32_t)((n>>16)&0xFF))
#define | CLKPWR_PLL0STAT_PLLE ((uint32_t)(1<<24))
#define | CLKPWR_PLL0STAT_PLLC ((uint32_t)(1<<25))
#define | CLKPWR_PLL0STAT_PLOCK ((uint32_t)(1<<26))
#define | CLKPWR_PLL0FEED_BITMASK ((uint32_t)0xFF)
#define | CLKPWR_PLL1CON_ENABLE ((uint32_t)(0x01))
#define | CLKPWR_PLL1CON_CONNECT ((uint32_t)(0x02))
#define | CLKPWR_PLL1CON_BITMASK ((uint32_t)(0x03))
#define | CLKPWR_PLL1CFG_MSEL(n) ((uint32_t)(n&0x1F))
#define | CLKPWR_PLL1CFG_PSEL(n) ((uint32_t)((n&0x03)<<5))
#define | CLKPWR_PLL1CFG_BITMASK ((uint32_t)(0x7F))
#define | CLKPWR_PLL1STAT_MSEL(n) ((uint32_t)(n&0x1F))
#define | CLKPWR_PLL1STAT_PSEL(n) ((uint32_t)((n>>5)&0x03))
#define | CLKPWR_PLL1STAT_PLLE ((uint32_t)(1<<8))
#define | CLKPWR_PLL1STAT_PLLC ((uint32_t)(1<<9))
#define | CLKPWR_PLL1STAT_PLOCK ((uint32_t)(1<<10))
#define | CLKPWR_PLL1FEED_BITMASK ((uint32_t)0xFF)
#define | CLKPWR_CCLKCFG_BITMASK ((uint32_t)(0xFF))
#define | CLKPWR_USBCLKCFG_BITMASK ((uint32_t)(0x0F))
#define | CLKPWR_IRCTRIM_BITMASK ((uint32_t)(0x0F))
#define | CLKPWR_PCLKSEL0_BITMASK ((uint32_t)(0xFFF3F3FF))
#define | CLKPWR_PCLKSEL1_BITMASK ((uint32_t)(0xFCF3F0F3))
#define | CLKPWR_PCLKSEL_SET(p, n) _SBF(p,n)
#define | CLKPWR_PCLKSEL_BITMASK(p) _SBF(p,0x03)
#define | CLKPWR_PCLKSEL_GET(p, n) ((uint32_t)((n>>p)&0x03))
#define | CLKPWR_PCON_PM0 ((uint32_t)(1<<0))
#define | CLKPWR_PCON_PM1 ((uint32_t)(1<<1))
#define | CLKPWR_PCON_BODPDM ((uint32_t)(1<<2))
#define | CLKPWR_PCON_BOGD ((uint32_t)(1<<3))
#define | CLKPWR_PCON_BORD ((uint32_t)(1<<4))
#define | CLKPWR_PCON_SMFLAG ((uint32_t)(1<<8))
#define | CLKPWR_PCON_DSFLAG ((uint32_t)(1<<9))
#define | CLKPWR_PCON_PDFLAG ((uint32_t)(1<<10))
#define | CLKPWR_PCON_DPDFLAG ((uint32_t)(1<<11))
#define | CLKPWR_PCONP_BITMASK 0xEFEFF7DE

Functions

void | CLKPWR_SetPCLKDiv (uint32_t ClkType, uint32_t DivVal)
Set value of each Peripheral Clock Selection.
uint32_t | CLKPWR_GetPCLKSEL (uint32_t ClkType)
Get current value of each Peripheral Clock Selection.
uint32_t | CLKPWR_GetPCLK (uint32_t ClkType)
Get current value of each Peripheral Clock.
void | CLKPWR_ConfigPPWR (uint32_t PPType, FunctionalState NewState)
Configure power supply for each peripheral according to NewState.
void | CLKPWR_Sleep (void)
Enter Sleep mode with co-operated instruction by the Cortex-M3.
void | CLKPWR_DeepSleep (void)
Enter Deep Sleep mode with co-operated instruction by the Cortex-M3.
void | CLKPWR_PowerDown (void)
Enter Power Down mode with co-operated instruction by the Cortex-M3.
void | CLKPWR_DeepPowerDown (void)
Enter Deep Power Down mode with co-operated instruction by the Cortex-M3.

Detailed Description

Contains all macro definitions and function prototypes support for Clock and Power Control firmware library on LPC17xx.

Version:
2.0
Date:
21. May. 2010
Author:
NXP MCU SW Application Team
Copyright(C) 2010, NXP Semiconductor All rights reserved.

Software that is described herein is for illustrative purposes only which provides customers with programming information regarding the products. This software is supplied "AS IS" without any warranties. NXP Semiconductors assumes no responsibility or liability for the use of the software, conveys no license or title under any patent, copyright, or mask work right to the product. NXP Semiconductors reserves the right to make changes in the software without notification. NXP Semiconductors also make no representation or warranty that such application will be suitable for the specified use without further testing or modification.

Definition in file lpc17xx_clkpwr.h.

Generated on Tue Jun 7 14:59:06 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_dac.h File Reference

C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_dac.h File Reference

Contains all macro definitions and function prototypes support for Clock and Power Control firmware library on LPC17xx. More...

#include "LPC17xx.h"
#include "lpc_types.h"

Go to the source code of this file.

Data Structures

struct | DAC_CONVERTER_CFG_Type
Configuration for DAC converter control register. More...

Defines

#define | DAC_VALUE(n) ((uint32_t)((n&0x3FF)<<6))
#define | DAC_BIAS_EN ((uint32_t)(1<<16))
#define | DAC_CCNT_VALUE(n) ((uint32_t)(n&0xffff))
#define | DAC_DBLBUF_ENA ((uint32_t)(1<<1))
#define | DAC_CNT_ENA ((uint32_t)(1<<2))
#define | DAC_DMA_ENA ((uint32_t)(1<<3))
#define | DAC_DACCTRL_MASK ((uint32_t)(0x0F))
#define | PARAM_DACx(n) (((uint32_t *)n)==((uint32_t *)LPC_DAC))
#define | PARAM_DAC_CURRENT_OPT(OPTION)

Enumerations

enum | DAC_CURRENT_OPT { DAC_MAX_CURRENT_700uA = 0, DAC_MAX_CURRENT_350uA }
Current option in DAC configuration option. More...

Functions

void | DAC_Init (LPC_DAC_TypeDef *DACx)
Initial ADC configuration
  • Maximum current is 700 uA
  • Value to AOUT is 0.

void | DAC_UpdateValue (LPC_DAC_TypeDef *DACx, uint32_t dac_value)
Update value to DAC.
void | DAC_SetBias (LPC_DAC_TypeDef *DACx, uint32_t bias)
Set Maximum current for DAC.
void | DAC_ConfigDAConverterControl (LPC_DAC_TypeDef *DACx, DAC_CONVERTER_CFG_Type *DAC_ConverterConfigStruct)
To enable the DMA operation and control DMA timer.
void | DAC_SetDMATimeOut (LPC_DAC_TypeDef *DACx, uint32_t time_out)
Set reload value for interrupt/DMA counter.

Detailed Description

Contains all macro definitions and function prototypes support for Clock and Power Control firmware library on LPC17xx.

Version:
2.0
Date:
21. May. 2010
Author:
NXP MCU SW Application Team
Copyright(C) 2010, NXP Semiconductor All rights reserved.

Software that is described herein is for illustrative purposes only which provides customers with programming information regarding the products. This software is supplied "AS IS" without any warranties. NXP Semiconductors assumes no responsibility or liability for the use of the software, conveys no license or title under any patent, copyright, or mask work right to the product. NXP Semiconductors reserves the right to make changes in the software without notification. NXP Semiconductors also make no representation or warranty that such application will be suitable for the specified use without further testing or modification.

Definition in file lpc17xx_dac.h.

Generated on Tue Jun 7 14:59:06 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_emac.h File Reference

C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_emac.h File Reference

Contains all macro definitions and function prototypes support for Ethernet MAC firmware library on LPC17xx. More...

#include "LPC17xx.h"
#include "lpc_types.h"

Go to the source code of this file.

Data Structures

struct | RX_Desc
RX Descriptor structure type definition. More...
struct | RX_Stat
RX Status structure type definition. More...
struct | TX_Desc
TX Descriptor structure type definition. More...
struct | TX_Stat
TX Status structure type definition. More...
struct | EMAC_PACKETBUF_Type
TX Data Buffer structure definition. More...
struct | EMAC_CFG_Type
EMAC configuration structure definition. More...

Defines

#define | MCB_LPC_1768
#define | EMAC_PHY_STAT_LINK (0)
#define | EMAC_PHY_STAT_SPEED (1)
#define | EMAC_PHY_STAT_DUP (2)
#define | EMAC_MODE_AUTO (0)
#define | EMAC_MODE_10M_FULL (1)
#define | EMAC_MODE_10M_HALF (2)
#define | EMAC_MODE_100M_FULL (3)
#define | EMAC_MODE_100M_HALF (4)
#define | EMAC_NUM_RX_FRAG 4
#define | EMAC_NUM_TX_FRAG 3
#define | EMAC_ETH_MAX_FLEN 1536
#define | EMAC_TX_FRAME_TOUT 0x00100000
#define | EMAC_MAC1_REC_EN 0x00000001
#define | EMAC_MAC1_PASS_ALL 0x00000002
#define | EMAC_MAC1_RX_FLOWC 0x00000004
#define | EMAC_MAC1_TX_FLOWC 0x00000008
#define | EMAC_MAC1_LOOPB 0x00000010
#define | EMAC_MAC1_RES_TX 0x00000100
#define | EMAC_MAC1_RES_MCS_TX 0x00000200
#define | EMAC_MAC1_RES_RX 0x00000400
#define | EMAC_MAC1_RES_MCS_RX 0x00000800
#define | EMAC_MAC1_SIM_RES 0x00004000
#define | EMAC_MAC1_SOFT_RES 0x00008000
#define | EMAC_MAC2_FULL_DUP 0x00000001
#define | EMAC_MAC2_FRM_LEN_CHK 0x00000002
#define | EMAC_MAC2_HUGE_FRM_EN 0x00000004
#define | EMAC_MAC2_DLY_CRC 0x00000008
#define | EMAC_MAC2_CRC_EN 0x00000010
#define | EMAC_MAC2_PAD_EN 0x00000020
#define | EMAC_MAC2_VLAN_PAD_EN 0x00000040
#define | EMAC_MAC2_ADET_PAD_EN 0x00000080
#define | EMAC_MAC2_PPREAM_ENF 0x00000100
#define | EMAC_MAC2_LPREAM_ENF 0x00000200
#define | EMAC_MAC2_NO_BACKOFF 0x00001000
#define | EMAC_MAC2_BACK_PRESSURE 0x00002000
#define | EMAC_MAC2_EXCESS_DEF 0x00004000
#define | EMAC_IPGT_BBIPG(n) (n&0x7F)
#define | EMAC_IPGT_FULL_DUP (EMAC_IPGT_BBIPG(0x15))
#define | EMAC_IPGT_HALF_DUP (EMAC_IPGT_BBIPG(0x12))
#define | EMAC_IPGR_NBBIPG_P2(n) (n&0x7F)
#define | EMAC_IPGR_P2_DEF (EMAC_IPGR_NBBIPG_P2(0x12))
#define | EMAC_IPGR_NBBIPG_P1(n) ((n&0x7F)<<8)
#define | EMAC_IPGR_P1_DEF EMAC_IPGR_NBBIPG_P1(0x0C)
#define | EMAC_CLRT_MAX_RETX(n) (n&0x0F)
#define | EMAC_CLRT_COLL(n) ((n&0x3F)<<8)
#define | EMAC_CLRT_DEF ((EMAC_CLRT_MAX_RETX(0x0F))|(EMAC_CLRT_COLL(0x37)))
#define | EMAC_MAXF_MAXFRMLEN(n) (n&0xFFFF)
#define | EMAC_SUPP_SPEED 0x00000100
#define | EMAC_SUPP_RES_RMII 0x00000800
#define | EMAC_TEST_SHCUT_PQUANTA 0x00000001
#define | EMAC_TEST_TST_PAUSE 0x00000002
#define | EMAC_TEST_TST_BACKP 0x00000004
#define | EMAC_MCFG_SCAN_INC 0x00000001
#define | EMAC_MCFG_SUPP_PREAM 0x00000002
#define | EMAC_MCFG_CLK_SEL(n) ((n&0x0F)<<2)
#define | EMAC_MCFG_RES_MII 0x00008000
#define | EMAC_MCFG_MII_MAXCLK 2500000UL
#define | EMAC_MCMD_READ 0x00000001
#define | EMAC_MCMD_SCAN 0x00000002
#define | EMAC_MII_WR_TOUT 0x00050000
#define | EMAC_MII_RD_TOUT 0x00050000
#define | EMAC_MADR_REG_ADR(n) (n&0x1F)
#define | EMAC_MADR_PHY_ADR(n) ((n&0x1F)<<8)
#define | EMAC_MWTD_DATA(n) (n&0xFFFF)
#define | EMAC_MRDD_DATA(n) (n&0xFFFF)
#define | EMAC_MIND_BUSY 0x00000001
#define | EMAC_MIND_SCAN 0x00000002
#define | EMAC_MIND_NOT_VAL 0x00000004
#define | EMAC_MIND_MII_LINK_FAIL 0x00000008
#define | EMAC_CR_RX_EN 0x00000001
#define | EMAC_CR_TX_EN 0x00000002
#define | EMAC_CR_REG_RES 0x00000008
#define | EMAC_CR_TX_RES 0x00000010
#define | EMAC_CR_RX_RES 0x00000020
#define | EMAC_CR_PASS_RUNT_FRM 0x00000040
#define | EMAC_CR_PASS_RX_FILT 0x00000080
#define | EMAC_CR_TX_FLOW_CTRL 0x00000100
#define | EMAC_CR_RMII 0x00000200
#define | EMAC_CR_FULL_DUP 0x00000400
#define | EMAC_SR_RX_EN 0x00000001
#define | EMAC_SR_TX_EN 0x00000002
#define | EMAC_TSV0_CRC_ERR 0x00000001
#define | EMAC_TSV0_LEN_CHKERR 0x00000002
#define | EMAC_TSV0_LEN_OUTRNG 0x00000004
#define | EMAC_TSV0_DONE 0x00000008
#define | EMAC_TSV0_MCAST 0x00000010
#define | EMAC_TSV0_BCAST 0x00000020
#define | EMAC_TSV0_PKT_DEFER 0x00000040
#define | EMAC_TSV0_EXC_DEFER 0x00000080
#define | EMAC_TSV0_EXC_COLL 0x00000100
#define | EMAC_TSV0_LATE_COLL 0x00000200
#define | EMAC_TSV0_GIANT 0x00000400
#define | EMAC_TSV0_UNDERRUN 0x00000800
#define | EMAC_TSV0_BYTES 0x0FFFF000
#define | EMAC_TSV0_CTRL_FRAME 0x10000000
#define | EMAC_TSV0_PAUSE 0x20000000
#define | EMAC_TSV0_BACK_PRESS 0x40000000
#define | EMAC_TSV0_VLAN 0x80000000
#define | EMAC_TSV1_BYTE_CNT 0x0000FFFF
#define | EMAC_TSV1_COLL_CNT 0x000F0000
#define | EMAC_RSV_BYTE_CNT 0x0000FFFF
#define | EMAC_RSV_PKT_IGNORED 0x00010000
#define | EMAC_RSV_RXDV_SEEN 0x00020000
#define | EMAC_RSV_CARR_SEEN 0x00040000
#define | EMAC_RSV_REC_CODEV 0x00080000
#define | EMAC_RSV_CRC_ERR 0x00100000
#define | EMAC_RSV_LEN_CHKERR 0x00200000
#define | EMAC_RSV_LEN_OUTRNG 0x00400000
#define | EMAC_RSV_REC_OK 0x00800000
#define | EMAC_RSV_MCAST 0x01000000
#define | EMAC_RSV_BCAST 0x02000000
#define | EMAC_RSV_DRIB_NIBB 0x04000000
#define | EMAC_RSV_CTRL_FRAME 0x08000000
#define | EMAC_RSV_PAUSE 0x10000000
#define | EMAC_RSV_UNSUPP_OPC 0x20000000
#define | EMAC_RSV_VLAN 0x40000000
#define | EMAC_FCC_MIRR_CNT(n) (n&0xFFFF)
#define | EMAC_FCC_PAUSE_TIM(n) ((n&0xFFFF)<<16)
#define | EMAC_FCS_MIRR_CNT(n) (n&0xFFFF)
#define | EMAC_RFC_UCAST_EN 0x00000001
#define | EMAC_RFC_BCAST_EN 0x00000002
#define | EMAC_RFC_MCAST_EN 0x00000004
#define | EMAC_RFC_UCAST_HASH_EN 0x00000008
#define | EMAC_RFC_MCAST_HASH_EN 0x00000010
#define | EMAC_RFC_PERFECT_EN 0x00000020
#define | EMAC_RFC_MAGP_WOL_EN 0x00001000
#define | EMAC_RFC_PFILT_WOL_EN 0x00002000
#define | EMAC_WOL_UCAST 0x00000001
#define | EMAC_WOL_BCAST 0x00000002
#define | EMAC_WOL_MCAST 0x00000004
#define | EMAC_WOL_UCAST_HASH 0x00000008
#define | EMAC_WOL_MCAST_HASH 0x00000010
#define | EMAC_WOL_PERFECT 0x00000020
#define | EMAC_WOL_RX_FILTER 0x00000080
#define | EMAC_WOL_MAG_PACKET 0x00000100
#define | EMAC_WOL_BITMASK 0x01BF
#define | EMAC_INT_RX_OVERRUN 0x00000001
#define | EMAC_INT_RX_ERR 0x00000002
#define | EMAC_INT_RX_FIN 0x00000004
#define | EMAC_INT_RX_DONE 0x00000008
#define | EMAC_INT_TX_UNDERRUN 0x00000010
#define | EMAC_INT_TX_ERR 0x00000020
#define | EMAC_INT_TX_FIN 0x00000040
#define | EMAC_INT_TX_DONE 0x00000080
#define | EMAC_INT_SOFT_INT 0x00001000
#define | EMAC_INT_WAKEUP 0x00002000
#define | EMAC_PD_POWER_DOWN 0x80000000
#define | EMAC_RCTRL_SIZE(n) (n&0x7FF)
#define | EMAC_RCTRL_INT 0x80000000
#define | EMAC_RHASH_SA 0x000001FF
#define | EMAC_RHASH_DA 0x001FF000
#define | EMAC_RINFO_SIZE 0x000007FF
#define | EMAC_RINFO_CTRL_FRAME 0x00040000
#define | EMAC_RINFO_VLAN 0x00080000
#define | EMAC_RINFO_FAIL_FILT 0x00100000
#define | EMAC_RINFO_MCAST 0x00200000
#define | EMAC_RINFO_BCAST 0x00400000
#define | EMAC_RINFO_CRC_ERR 0x00800000
#define | EMAC_RINFO_SYM_ERR 0x01000000
#define | EMAC_RINFO_LEN_ERR 0x02000000
#define | EMAC_RINFO_RANGE_ERR 0x04000000
#define | EMAC_RINFO_ALIGN_ERR 0x08000000
#define | EMAC_RINFO_OVERRUN 0x10000000
#define | EMAC_RINFO_NO_DESCR 0x20000000
#define | EMAC_RINFO_LAST_FLAG 0x40000000
#define | EMAC_RINFO_ERR 0x80000000
#define | EMAC_RINFO_ERR_MASK
#define | EMAC_TCTRL_SIZE 0x000007FF
#define | EMAC_TCTRL_OVERRIDE 0x04000000
#define | EMAC_TCTRL_HUGE 0x08000000
#define | EMAC_TCTRL_PAD 0x10000000
#define | EMAC_TCTRL_CRC 0x20000000
#define | EMAC_TCTRL_LAST 0x40000000
#define | EMAC_TCTRL_INT 0x80000000
#define | EMAC_TINFO_COL_CNT 0x01E00000
#define | EMAC_TINFO_DEFER 0x02000000
#define | EMAC_TINFO_EXCESS_DEF 0x04000000
#define | EMAC_TINFO_EXCESS_COL 0x08000000
#define | EMAC_TINFO_LATE_COL 0x10000000
#define | EMAC_TINFO_UNDERRUN 0x20000000
#define | EMAC_TINFO_NO_DESCR 0x40000000
#define | EMAC_TINFO_ERR 0x80000000
#define | EMAC_PHY_RESP_TOUT 0x100000UL
#define | EMAC_OLD_EMAC_MODULE_ID 0x39022000
#define | EMAC_PHY_REG_BMCR 0x00
#define | EMAC_PHY_REG_BMSR 0x01
#define | EMAC_PHY_REG_IDR1 0x02
#define | EMAC_PHY_REG_IDR2 0x03
#define | EMAC_PHY_REG_ANAR 0x04
#define | EMAC_PHY_REG_ANLPAR 0x05
#define | EMAC_PHY_REG_ANER 0x06
#define | EMAC_PHY_REG_ANNPTR 0x07
#define | EMAC_PHY_REG_LPNPA 0x08
#define | EMAC_PHY_REG_STS 0x10
#define | EMAC_PHY_REG_MICR 0x11
#define | EMAC_PHY_REG_MISR 0x12
#define | EMAC_PHY_REG_FCSCR 0x14
#define | EMAC_PHY_REG_RECR 0x15
#define | EMAC_PHY_REG_PCSR 0x16
#define | EMAC_PHY_REG_RBR 0x17
#define | EMAC_PHY_REG_LEDCR 0x18
#define | EMAC_PHY_REG_PHYCR 0x19
#define | EMAC_PHY_REG_10BTSCR 0x1A
#define | EMAC_PHY_REG_CDCTRL1 0x1B
#define | EMAC_PHY_REG_EDCR 0x1D
#define | EMAC_PHY_BMCR_RESET (1<<15)
#define | EMAC_PHY_BMCR_LOOPBACK (1<<14)
#define | EMAC_PHY_BMCR_SPEED_SEL (1<<13)
#define | EMAC_PHY_BMCR_AN (1<<12)
#define | EMAC_PHY_BMCR_POWERDOWN (1<<11)
#define | EMAC_PHY_BMCR_ISOLATE (1<<10)
#define | EMAC_PHY_BMCR_RE_AN (1<<9)
#define | EMAC_PHY_BMCR_DUPLEX (1<<8)
#define | EMAC_PHY_BMSR_100BE_T4 (1<<15)
#define | EMAC_PHY_BMSR_100TX_FULL (1<<14)
#define | EMAC_PHY_BMSR_100TX_HALF (1<<13)
#define | EMAC_PHY_BMSR_10BE_FULL (1<<12)
#define | EMAC_PHY_BMSR_10BE_HALF (1<<11)
#define | EMAC_PHY_BMSR_NOPREAM (1<<6)
#define | EMAC_PHY_BMSR_AUTO_DONE (1<<5)
#define | EMAC_PHY_BMSR_REMOTE_FAULT (1<<4)
#define | EMAC_PHY_BMSR_NO_AUTO (1<<3)
#define | EMAC_PHY_BMSR_LINK_ESTABLISHED (1<<2)
#define | EMAC_PHY_SR_REMOTE_FAULT (1<<6)
#define | EMAC_PHY_SR_JABBER (1<<5)
#define | EMAC_PHY_SR_AUTO_DONE (1<<4)
#define | EMAC_PHY_SR_LOOPBACK (1<<3)
#define | EMAC_PHY_SR_DUP (1<<2)
#define | EMAC_PHY_SR_SPEED (1<<1)
#define | EMAC_PHY_SR_LINK (1<<0)
#define | EMAC_PHY_FULLD_100M 0x2100
#define | EMAC_PHY_HALFD_100M 0x2000
#define | EMAC_PHY_FULLD_10M 0x0100
#define | EMAC_PHY_HALFD_10M 0x0000
#define | EMAC_PHY_AUTO_NEG 0x3000
#define | EMAC_DEF_ADR 0x0100
#define | EMAC_DP83848C_ID 0x20005C90
#define | EMAC_PHY_SR_100_SPEED ((1<<14)|(1<<13))
#define | EMAC_PHY_SR_FULL_DUP ((1<<14)|(1<<12))
#define | EMAC_PHY_BMSR_LINK_STATUS (1<<2)

Functions

Status | EMAC_Init (EMAC_CFG_Type *EMAC_ConfigStruct)
Initializes the EMAC peripheral according to the specified parameters in the EMAC_ConfigStruct.
void | EMAC_DeInit (void)
De-initializes the EMAC peripheral registers to their default reset values.
int32_t | EMAC_CheckPHYStatus (uint32_t ulPHYState)
Check specified PHY status in EMAC peripheral.
int32_t | EMAC_SetPHYMode (uint32_t ulPHYMode)
Set specified PHY mode in EMAC peripheral.
int32_t | EMAC_UpdatePHYStatus (void)
Auto-Configures value for the EMAC configuration register to match with current PHY mode.
void | EMAC_SetHashFilter (uint8_t dstMAC_addr[], FunctionalState NewState)
Enable/Disable hash filter functionality for specified destination MAC address in EMAC module.
void | EMAC_SetFilterMode (uint32_t ulFilterMode, FunctionalState NewState)
Enable/Disable Filter mode for each specified type EMAC peripheral.
void | EMAC_WritePacketBuffer (EMAC_PACKETBUF_Type *pDataStruct)
Write data to Tx packet data buffer at current index due to TxProduceIndex.
void | EMAC_ReadPacketBuffer (EMAC_PACKETBUF_Type *pDataStruct)
Read data from Rx packet data buffer at current index due to RxConsumeIndex.
void | EMAC_IntCmd (uint32_t ulIntType, FunctionalState NewState)
Enable/Disable interrupt for each type in EMAC.
IntStatus | EMAC_IntGetStatus (uint32_t ulIntType)
Check whether if specified interrupt flag is set or not for each interrupt type in EMAC and clear interrupt pending if it is set.
Bool | EMAC_CheckReceiveIndex (void)
Check whether if the current RxConsumeIndex is not equal to the current RxProduceIndex.
Bool | EMAC_CheckTransmitIndex (void)
Check whether if the current TxProduceIndex is not equal to the current RxProduceIndex - 1.
void | EMAC_UpdateRxConsumeIndex (void)
Increase the RxConsumeIndex (after reading the Receive buffer to release the Receive buffer) and wrap-around the index if it reaches the maximum Receive Number.
void | EMAC_UpdateTxProduceIndex (void)
Increase the TxProduceIndex (after writting to the Transmit buffer to enable the Transmit buffer) and wrap-around the index if it reaches the maximum Transmit Number.
FlagStatus | EMAC_CheckReceiveDataStatus (uint32_t ulRxStatType)
Get current status value of receive data (due to RxConsumeIndex).
uint32_t | EMAC_GetReceiveDataSize (void)
Get size of current Received data in received buffer (due to RxConsumeIndex).
FlagStatus | EMAC_GetWoLStatus (uint32_t ulWoLMode)
Get status of Wake On LAN Filter for each specified type in EMAC peripheral, clear this status if it is set.

Detailed Description

Contains all macro definitions and function prototypes support for Ethernet MAC firmware library on LPC17xx.

Version:
2.0
Date:
21. May. 2010
Author:
NXP MCU SW Application Team
Copyright(C) 2010, NXP Semiconductor All rights reserved.

Software that is described herein is for illustrative purposes only which provides customers with programming information regarding the products. This software is supplied "AS IS" without any warranties. NXP Semiconductors assumes no responsibility or liability for the use of the software, conveys no license or title under any patent, copyright, or mask work right to the product. NXP Semiconductors reserves the right to make changes in the software without notification. NXP Semiconductors also make no representation or warranty that such application will be suitable for the specified use without further testing or modification.

Definition in file lpc17xx_emac.h.

Generated on Tue Jun 7 14:59:06 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_exti.h File Reference

C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_exti.h File Reference

Contains all macro definitions and function prototypes support for External interrupt firmware library on LPC17xx. More...

#include "LPC17xx.h"
#include "lpc_types.h"

Go to the source code of this file.

Data Structures

struct | EXTI_InitTypeDef
EXTI Initialize structure. More...

Defines

#define | EXTI_EINT0_BIT_MARK 0x01
#define | EXTI_EINT1_BIT_MARK 0x02
#define | EXTI_EINT2_BIT_MARK 0x04
#define | EXTI_EINT3_BIT_MARK 0x08

Enumerations

enum | EXTI_LINE_ENUM { EXTI_EINT0, EXTI_EINT1, EXTI_EINT2, EXTI_EINT3 }
EXTI external interrupt line option. More...
enum | EXTI_MODE_ENUM { EXTI_MODE_LEVEL_SENSITIVE, EXTI_MODE_EDGE_SENSITIVE }
EXTI mode option. More...
enum | EXTI_POLARITY_ENUM { EXTI_POLARITY_LOW_ACTIVE_OR_FALLING_EDGE, EXTI_POLARITY_HIGH_ACTIVE_OR_RISING_EDGE }
EXTI polarity option. More...

Functions

void | EXTI_Init (void)
Initial for EXT
  • Set EXTINT, EXTMODE, EXTPOLAR registers to default value.

void | EXTI_DeInit (void)
Close EXT.
void | EXTI_Config (EXTI_InitTypeDef *EXTICfg)
Configuration for EXT
  • Set EXTINT, EXTMODE, EXTPOLAR register.

void | EXTI_SetMode (EXTI_LINE_ENUM EXTILine, EXTI_MODE_ENUM mode)
Set mode for EXTI pin.
void | EXTI_SetPolarity (EXTI_LINE_ENUM EXTILine, EXTI_POLARITY_ENUM polarity)
Set polarity for EXTI pin.
void | EXTI_ClearEXTIFlag (EXTI_LINE_ENUM EXTILine)
Clear External interrupt flag.

Detailed Description

Contains all macro definitions and function prototypes support for External interrupt firmware library on LPC17xx.

Version:
2.0
Date:
21. May. 2010
Author:
NXP MCU SW Application Team
Copyright(C) 2010, NXP Semiconductor All rights reserved.

Software that is described herein is for illustrative purposes only which provides customers with programming information regarding the products. This software is supplied "AS IS" without any warranties. NXP Semiconductors assumes no responsibility or liability for the use of the software, conveys no license or title under any patent, copyright, or mask work right to the product. NXP Semiconductors reserves the right to make changes in the software without notification. NXP Semiconductors also make no representation or warranty that such application will be suitable for the specified use without further testing or modification.

Definition in file lpc17xx_exti.h.

Generated on Tue Jun 7 14:59:06 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_gpdma.h File Reference

C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_gpdma.h File Reference

Contains all macro definitions and function prototypes support for GPDMA firmware library on LPC17xx. More...

#include "LPC17xx.h"
#include "lpc_types.h"

Go to the source code of this file.

Data Structures

struct | GPDMA_Channel_CFG_Type
GPDMA Channel configuration structure type definition. More...
struct | GPDMA_LLI_Type
GPDMA Linker List Item structure type definition. More...

Defines

#define | GPDMA_CONN_SSP0_Tx ((0UL))
#define | GPDMA_CONN_SSP0_Rx ((1UL))
#define | GPDMA_CONN_SSP1_Tx ((2UL))
#define | GPDMA_CONN_SSP1_Rx ((3UL))
#define | GPDMA_CONN_ADC ((4UL))
#define | GPDMA_CONN_I2S_Channel_0 ((5UL))
#define | GPDMA_CONN_I2S_Channel_1 ((6UL))
#define | GPDMA_CONN_DAC ((7UL))
#define | GPDMA_CONN_UART0_Tx ((8UL))
#define | GPDMA_CONN_UART0_Rx ((9UL))
#define | GPDMA_CONN_UART1_Tx ((10UL))
#define | GPDMA_CONN_UART1_Rx ((11UL))
#define | GPDMA_CONN_UART2_Tx ((12UL))
#define | GPDMA_CONN_UART2_Rx ((13UL))
#define | GPDMA_CONN_UART3_Tx ((14UL))
#define | GPDMA_CONN_UART3_Rx ((15UL))
#define | GPDMA_CONN_MAT0_0 ((16UL))
#define | GPDMA_CONN_MAT0_1 ((17UL))
#define | GPDMA_CONN_MAT1_0 ((18UL))
#define | GPDMA_CONN_MAT1_1 ((19UL))
#define | GPDMA_CONN_MAT2_0 ((20UL))
#define | GPDMA_CONN_MAT2_1 ((21UL))
#define | GPDMA_CONN_MAT3_0 ((22UL))
#define | GPDMA_CONN_MAT3_1 ((23UL))
#define | GPDMA_TRANSFERTYPE_M2M ((0UL))
#define | GPDMA_TRANSFERTYPE_M2P ((1UL))
#define | GPDMA_TRANSFERTYPE_P2M ((2UL))
#define | GPDMA_TRANSFERTYPE_P2P ((3UL))
#define | GPDMA_BSIZE_1 ((0UL))
#define | GPDMA_BSIZE_4 ((1UL))
#define | GPDMA_BSIZE_8 ((2UL))
#define | GPDMA_BSIZE_16 ((3UL))
#define | GPDMA_BSIZE_32 ((4UL))
#define | GPDMA_BSIZE_64 ((5UL))
#define | GPDMA_BSIZE_128 ((6UL))
#define | GPDMA_BSIZE_256 ((7UL))
#define | GPDMA_WIDTH_BYTE ((0UL))
#define | GPDMA_WIDTH_HALFWORD ((1UL))
#define | GPDMA_WIDTH_WORD ((2UL))
#define | GPDMA_REQSEL_UART ((0UL))
#define | GPDMA_REQSEL_TIMER ((1UL))
#define | GPDMA_DMACIntStat_Ch(n) (((1UL<<n)&0xFF))
#define | GPDMA_DMACIntStat_BITMASK ((0xFF))
#define | GPDMA_DMACIntTCStat_Ch(n) (((1UL<<n)&0xFF))
#define | GPDMA_DMACIntTCStat_BITMASK ((0xFF))
#define | GPDMA_DMACIntTCClear_Ch(n) (((1UL<<n)&0xFF))
#define | GPDMA_DMACIntTCClear_BITMASK ((0xFF))
#define | GPDMA_DMACIntErrStat_Ch(n) (((1UL<<n)&0xFF))
#define | GPDMA_DMACIntErrStat_BITMASK ((0xFF))
#define | GPDMA_DMACIntErrClr_Ch(n) (((1UL<<n)&0xFF))
#define | GPDMA_DMACIntErrClr_BITMASK ((0xFF))
#define | GPDMA_DMACRawIntTCStat_Ch(n) (((1UL<<n)&0xFF))
#define | GPDMA_DMACRawIntTCStat_BITMASK ((0xFF))
#define | GPDMA_DMACRawIntErrStat_Ch(n) (((1UL<<n)&0xFF))
#define | GPDMA_DMACRawIntErrStat_BITMASK ((0xFF))
#define | GPDMA_DMACEnbldChns_Ch(n) (((1UL<<n)&0xFF))
#define | GPDMA_DMACEnbldChns_BITMASK ((0xFF))
#define | GPDMA_DMACSoftBReq_Src(n) (((1UL<<n)&0xFFFF))
#define | GPDMA_DMACSoftBReq_BITMASK ((0xFFFF))
#define | GPDMA_DMACSoftSReq_Src(n) (((1UL<<n)&0xFFFF))
#define | GPDMA_DMACSoftSReq_BITMASK ((0xFFFF))
#define | GPDMA_DMACSoftLBReq_Src(n) (((1UL<<n)&0xFFFF))
#define | GPDMA_DMACSoftLBReq_BITMASK ((0xFFFF))
#define | GPDMA_DMACSoftLSReq_Src(n) (((1UL<<n)&0xFFFF))
#define | GPDMA_DMACSoftLSReq_BITMASK ((0xFFFF))
#define | GPDMA_DMACConfig_E ((0x01))
#define | GPDMA_DMACConfig_M ((0x02))
#define | GPDMA_DMACConfig_BITMASK ((0x03))
#define | GPDMA_DMACSync_Src(n) (((1UL<<n)&0xFFFF))
#define | GPDMA_DMACSync_BITMASK ((0xFFFF))
#define | GPDMA_DMAReqSel_Input(n) (((1UL<<(n-8))&0xFF))
#define | GPDMA_DMAReqSel_BITMASK ((0xFF))
#define | GPDMA_DMACCxLLI_BITMASK ((0xFFFFFFFC))
#define | GPDMA_DMACCxControl_TransferSize(n) (((n&0xFFF)<<0))
#define | GPDMA_DMACCxControl_SBSize(n) (((n&0x07)<<12))
#define | GPDMA_DMACCxControl_DBSize(n) (((n&0x07)<<15))
#define | GPDMA_DMACCxControl_SWidth(n) (((n&0x07)<<18))
#define | GPDMA_DMACCxControl_DWidth(n) (((n&0x07)<<21))
#define | GPDMA_DMACCxControl_SI ((1UL<<26))
#define | GPDMA_DMACCxControl_DI ((1UL<<27))
#define | GPDMA_DMACCxControl_Prot1 ((1UL<<28))
#define | GPDMA_DMACCxControl_Prot2 ((1UL<<29))
#define | GPDMA_DMACCxControl_Prot3 ((1UL<<30))
#define | GPDMA_DMACCxControl_I ((1UL<<31))
#define | GPDMA_DMACCxControl_BITMASK ((0xFCFFFFFF))
#define | GPDMA_DMACCxConfig_E ((1UL<<0))
#define | GPDMA_DMACCxConfig_SrcPeripheral(n) (((n&0x1F)<<1))
#define | GPDMA_DMACCxConfig_DestPeripheral(n) (((n&0x1F)<<6))
#define | GPDMA_DMACCxConfig_TransferType(n) (((n&0x7)<<11))
#define | GPDMA_DMACCxConfig_IE ((1UL<<14))
#define | GPDMA_DMACCxConfig_ITC ((1UL<<15))
#define | GPDMA_DMACCxConfig_L ((1UL<<16))
#define | GPDMA_DMACCxConfig_A ((1UL<<17))
#define | GPDMA_DMACCxConfig_H ((1UL<<18))
#define | GPDMA_DMACCxConfig_BITMASK ((0x7FFFF))
#define | PARAM_GPDMA_CHANNEL(n) ((n>=0) && (n<=7))
#define | PARAM_GPDMA_CONN(n)
#define | PARAM_GPDMA_BSIZE(n)
#define | PARAM_GPDMA_WIDTH(n)
#define | PARAM_GPDMA_STAT(n)
#define | PARAM_GPDMA_TRANSFERTYPE(n)
#define | PARAM_GPDMA_STATCLR(n) ((n==GPDMA_STATCLR_INTTC) || (n==GPDMA_STATCLR_INTERR))
#define | PARAM_GPDMA_REQSEL(n) ((n==GPDMA_REQSEL_UART) || (n==GPDMA_REQSEL_TIMER))

Enumerations

enum GPDMA_Status_Type {
GPDMA_STAT_INT, GPDMA_STAT_INTTC, GPDMA_STAT_INTERR, GPDMA_STAT_RAWINTTC,
GPDMA_STAT_RAWINTERR, GPDMA_STAT_ENABLED_CH
}
GPDMA Status enumeration. More...
enum | GPDMA_StateClear_Type { GPDMA_STATCLR_INTTC, GPDMA_STATCLR_INTERR }
GPDMA Interrupt clear status enumeration. More...

Functions

void | GPDMA_Init (void)
Initialize GPDMA controller.
Status | GPDMA_Setup (GPDMA_Channel_CFG_Type *GPDMAChannelConfig)
Setup GPDMA channel peripheral according to the specified parameters in the GPDMAChannelConfig.
IntStatus | GPDMA_IntGetStatus (GPDMA_Status_Type type, uint8_t channel)
Check if corresponding channel does have an active interrupt request or not.
void | GPDMA_ClearIntPending (GPDMA_StateClear_Type type, uint8_t channel)
Clear one or more interrupt requests on DMA channels.
void | GPDMA_ChannelCmd (uint8_t channelNum, FunctionalState NewState)
Enable/Disable DMA channel.

Detailed Description

Contains all macro definitions and function prototypes support for GPDMA firmware library on LPC17xx.

Version:
2.0
Date:
21. May. 2010
Author:
NXP MCU SW Application Team
Copyright(C) 2010, NXP Semiconductor All rights reserved.

Software that is described herein is for illustrative purposes only which provides customers with programming information regarding the products. This software is supplied "AS IS" without any warranties. NXP Semiconductors assumes no responsibility or liability for the use of the software, conveys no license or title under any patent, copyright, or mask work right to the product. NXP Semiconductors reserves the right to make changes in the software without notification. NXP Semiconductors also make no representation or warranty that such application will be suitable for the specified use without further testing or modification.

Definition in file lpc17xx_gpdma.h.

Generated on Tue Jun 7 14:59:06 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_gpio.h File Reference

C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_gpio.h File Reference

Contains all macro definitions and function prototypes support for GPDMA firmware library on LPC17xx. More...

#include "LPC17xx.h"
#include "lpc_types.h"

Go to the source code of this file.

Data Structures

struct | GPIO_Byte_TypeDef
Fast GPIO port byte type definition. More...
struct | GPIO_HalfWord_TypeDef
Fast GPIO port half-word type definition. More...

Defines

#define | GPIO0_Byte ((GPIO_Byte_TypeDef *)(LPC_GPIO0_BASE))
#define | GPIO1_Byte ((GPIO_Byte_TypeDef *)(LPC_GPIO1_BASE))
#define | GPIO2_Byte ((GPIO_Byte_TypeDef *)(LPC_GPIO2_BASE))
#define | GPIO3_Byte ((GPIO_Byte_TypeDef *)(LPC_GPIO3_BASE))
#define | GPIO4_Byte ((GPIO_Byte_TypeDef *)(LPC_GPIO4_BASE))
#define | GPIO0_HalfWord ((GPIO_HalfWord_TypeDef *)(LPC_GPIO0_BASE))
#define | GPIO1_HalfWord ((GPIO_HalfWord_TypeDef *)(LPC_GPIO1_BASE))
#define | GPIO2_HalfWord ((GPIO_HalfWord_TypeDef *)(LPC_GPIO2_BASE))
#define | GPIO3_HalfWord ((GPIO_HalfWord_TypeDef *)(LPC_GPIO3_BASE))
#define | GPIO4_HalfWord ((GPIO_HalfWord_TypeDef *)(LPC_GPIO4_BASE))

Functions

void | GPIO_SetDir (uint8_t portNum, uint32_t bitValue, uint8_t dir)
Set Direction for GPIO port.
void | GPIO_SetValue (uint8_t portNum, uint32_t bitValue)
Set Value for bits that have output direction on GPIO port.
void | GPIO_ClearValue (uint8_t portNum, uint32_t bitValue)
Clear Value for bits that have output direction on GPIO port.
uint32_t | GPIO_ReadValue (uint8_t portNum)
Read Current state on port pin that have input direction of GPIO.
void | GPIO_IntCmd (uint8_t portNum, uint32_t bitValue, uint8_t edgeState)
Enable GPIO interrupt (just used for P0.0-P0.30, P2.0-P2.13).
FunctionalState | GPIO_GetIntStatus (uint8_t portNum, uint32_t pinNum, uint8_t edgeState)
Get GPIO Interrupt Status (just used for P0.0-P0.30, P2.0-P2.13).
void | GPIO_ClearInt (uint8_t portNum, uint32_t bitValue)
Clear GPIO interrupt (just used for P0.0-P0.30, P2.0-P2.13).
void | FIO_SetDir (uint8_t portNum, uint32_t bitValue, uint8_t dir)
The same with GPIO_SetDir().
void | FIO_SetValue (uint8_t portNum, uint32_t bitValue)
The same with GPIO_SetValue().
void | FIO_ClearValue (uint8_t portNum, uint32_t bitValue)
The same with GPIO_ClearValue().
uint32_t | FIO_ReadValue (uint8_t portNum)
The same with GPIO_ReadValue().
void | FIO_SetMask (uint8_t portNum, uint32_t bitValue, uint8_t maskValue)
Set mask value for bits in FIO port.
void | FIO_IntCmd (uint8_t portNum, uint32_t bitValue, uint8_t edgeState)
The same with GPIO_IntCmd().
FunctionalState | FIO_GetIntStatus (uint8_t portNum, uint32_t pinNum, uint8_t edgeState)
The same with GPIO_GetIntStatus().
void | FIO_ClearInt (uint8_t portNum, uint32_t bitValue)
The same with GPIO_ClearInt().
void | FIO_HalfWordSetDir (uint8_t portNum, uint8_t halfwordNum, uint16_t bitValue, uint8_t dir)
Set direction for FIO port in halfword accessible style.
void | FIO_HalfWordSetMask (uint8_t portNum, uint8_t halfwordNum, uint16_t bitValue, uint8_t maskValue)
Set mask value for bits in FIO port in halfword accessible style.
void | FIO_HalfWordSetValue (uint8_t portNum, uint8_t halfwordNum, uint16_t bitValue)
Set bits for FIO port in halfword accessible style.
void | FIO_HalfWordClearValue (uint8_t portNum, uint8_t halfwordNum, uint16_t bitValue)
Clear bits for FIO port in halfword accessible style.
uint16_t | FIO_HalfWordReadValue (uint8_t portNum, uint8_t halfwordNum)
Read Current state on port pin that have input direction of GPIO in halfword accessible style.
void | FIO_ByteSetDir (uint8_t portNum, uint8_t byteNum, uint8_t bitValue, uint8_t dir)
Set direction for FIO port in byte accessible style.
void | FIO_ByteSetMask (uint8_t portNum, uint8_t byteNum, uint8_t bitValue, uint8_t maskValue)
Set mask value for bits in FIO port in byte accessible style.
void | FIO_ByteSetValue (uint8_t portNum, uint8_t byteNum, uint8_t bitValue)
Set bits for FIO port in byte accessible style.
void | FIO_ByteClearValue (uint8_t portNum, uint8_t byteNum, uint8_t bitValue)
Clear bits for FIO port in byte accessible style.
uint8_t | FIO_ByteReadValue (uint8_t portNum, uint8_t byteNum)
Read Current state on port pin that have input direction of GPIO in byte accessible style.

Detailed Description

Contains all macro definitions and function prototypes support for GPDMA firmware library on LPC17xx.

Version:
3.0
Date:
18. June. 2010
Author:
NXP MCU SW Application Team
Copyright(C) 2010, NXP Semiconductor All rights reserved.

Software that is described herein is for illustrative purposes only which provides customers with programming information regarding the products. This software is supplied "AS IS" without any warranties. NXP Semiconductors assumes no responsibility or liability for the use of the software, conveys no license or title under any patent, copyright, or mask work right to the product. NXP Semiconductors reserves the right to make changes in the software without notification. NXP Semiconductors also make no representation or warranty that such application will be suitable for the specified use without further testing or modification.

Definition in file lpc17xx_gpio.h.

Generated on Tue Jun 7 14:59:06 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_i2c.h File Reference

C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_i2c.h File Reference

Contains all macro definitions and function prototypes support for I2C firmware library on LPC17xx. More...

#include "LPC17xx.h"
#include "lpc_types.h"

Go to the source code of this file.

Data Structures

struct | I2C_OWNSLAVEADDR_CFG_Type
I2C Own slave address setting structure. More...
struct | I2C_M_SETUP_Type
Master transfer setup data structure definitions. More...
struct | I2C_S_SETUP_Type
Slave transfer setup data structure definitions. More...

Defines

#define | I2C_I2CONSET_AA ((0x04))
#define | I2C_I2CONSET_SI ((0x08))
#define | I2C_I2CONSET_STO ((0x10))
#define | I2C_I2CONSET_STA ((0x20))
#define | I2C_I2CONSET_I2EN ((0x40))
#define | I2C_I2CONCLR_AAC ((1<<2))
#define | I2C_I2CONCLR_SIC ((1<<3))
#define | I2C_I2CONCLR_STAC ((1<<5))
#define | I2C_I2CONCLR_I2ENC ((1<<6))
#define | I2C_STAT_CODE_BITMASK ((0xF8))
#define | I2C_I2STAT_NO_INF ((0xF8))
#define | I2C_I2STAT_M_TX_START ((0x08))
#define | I2C_I2STAT_M_TX_RESTART ((0x10))
#define | I2C_I2STAT_M_TX_SLAW_ACK ((0x18))
#define | I2C_I2STAT_M_TX_SLAW_NACK ((0x20))
#define | I2C_I2STAT_M_TX_DAT_ACK ((0x28))
#define | I2C_I2STAT_M_TX_DAT_NACK ((0x30))
#define | I2C_I2STAT_M_TX_ARB_LOST ((0x38))
#define | I2C_I2STAT_M_RX_START ((0x08))
#define | I2C_I2STAT_M_RX_RESTART ((0x10))
#define | I2C_I2STAT_M_RX_ARB_LOST ((0x38))
#define | I2C_I2STAT_M_RX_SLAR_ACK ((0x40))
#define | I2C_I2STAT_M_RX_SLAR_NACK ((0x48))
#define | I2C_I2STAT_M_RX_DAT_ACK ((0x50))
#define | I2C_I2STAT_M_RX_DAT_NACK ((0x58))
#define | I2C_I2STAT_S_RX_SLAW_ACK ((0x60))
#define | I2C_I2STAT_S_RX_ARB_LOST_M_SLA ((0x68))
#define | I2C_I2STAT_S_RX_GENCALL_ACK ((0x70))
#define | I2C_I2STAT_S_RX_ARB_LOST_M_GENCALL ((0x78))
#define | I2C_I2STAT_S_RX_PRE_SLA_DAT_ACK ((0x80))
#define | I2C_I2STAT_S_RX_PRE_SLA_DAT_NACK ((0x88))
#define | I2C_I2STAT_S_RX_PRE_GENCALL_DAT_ACK ((0x90))
#define | I2C_I2STAT_S_RX_PRE_GENCALL_DAT_NACK ((0x98))
#define | I2C_I2STAT_S_RX_STA_STO_SLVREC_SLVTRX ((0xA0))
#define | I2C_I2STAT_S_TX_SLAR_ACK ((0xA8))
#define | I2C_I2STAT_S_TX_ARB_LOST_M_SLA ((0xB0))
#define | I2C_I2STAT_S_TX_DAT_ACK ((0xB8))
#define | I2C_I2STAT_S_TX_DAT_NACK ((0xC0))
#define | I2C_I2STAT_S_TX_LAST_DAT_ACK ((0xC8))
#define | I2C_SLAVE_TIME_OUT 0x10000UL
#define | I2C_I2DAT_BITMASK ((0xFF))
#define | I2C_I2DAT_IDLE_CHAR (0xFF)
#define | I2C_I2MMCTRL_MM_ENA ((1<<0))
#define | I2C_I2MMCTRL_ENA_SCL ((1<<1))
#define | I2C_I2MMCTRL_MATCH_ALL ((1<<2))
#define | I2C_I2MMCTRL_BITMASK ((0x07))
#define | I2DATA_BUFFER_BITMASK ((0xFF))
#define | I2C_I2ADR_GC ((1<<0))
#define | I2C_I2ADR_BITMASK ((0xFF))
#define | I2C_I2MASK_MASK(n) ((n&0xFE))
#define | I2C_I2SCLH_BITMASK ((0xFFFF))
#define | I2C_I2SCLL_BITMASK ((0xFFFF))
#define | I2C_SETUP_STATUS_ARBF (1<<8)
#define | I2C_SETUP_STATUS_NOACKF (1<<9)
#define | I2C_SETUP_STATUS_DONE (1<<10)
#define | I2C_MONITOR_CFG_SCL_OUTPUT I2C_I2MMCTRL_ENA_SCL
#define | I2C_MONITOR_CFG_MATCHALL I2C_I2MMCTRL_MATCH_ALL
#define | PARAM_I2C_SLAVEADDR_CH(n) ((n>=0) && (n<=3))
#define | PARAM_I2Cx(n)
#define | PARAM_I2C_MONITOR_CFG(n) ((n==I2C_MONITOR_CFG_SCL_OUTPUT) || (I2C_MONITOR_CFG_MATCHALL))

Enumerations

enum | I2C_TRANSFER_OPT_Type { I2C_TRANSFER_POLLING = 0, I2C_TRANSFER_INTERRUPT }
Transfer option type definitions. More...

Functions

void | I2C_Init (LPC_I2C_TypeDef *I2Cx, uint32_t clockrate)
Initializes the I2Cx peripheral with specified parameter.
void | I2C_DeInit (LPC_I2C_TypeDef *I2Cx)
De-initializes the I2C peripheral registers to their default reset values.
void | I2C_Cmd (LPC_I2C_TypeDef *I2Cx, FunctionalState NewState)
Enable or disable I2C peripheral's operation.
Status | I2C_MasterTransferData (LPC_I2C_TypeDef *I2Cx, I2C_M_SETUP_Type *TransferCfg, I2C_TRANSFER_OPT_Type Opt)
Transmit and Receive data in master mode.
Status | I2C_SlaveTransferData (LPC_I2C_TypeDef *I2Cx, I2C_S_SETUP_Type *TransferCfg, I2C_TRANSFER_OPT_Type Opt)
Receive and Transmit data in slave mode.
uint32_t | I2C_MasterTransferComplete (LPC_I2C_TypeDef *I2Cx)
Get status of Master Transfer.
uint32_t | I2C_SlaveTransferComplete (LPC_I2C_TypeDef *I2Cx)
Get status of Slave Transfer.
void | I2C_SetOwnSlaveAddr (LPC_I2C_TypeDef *I2Cx, I2C_OWNSLAVEADDR_CFG_Type *OwnSlaveAddrConfigStruct)
Set Own slave address in I2C peripheral corresponding to parameter specified in OwnSlaveAddrConfigStruct.
uint8_t | I2C_GetLastStatusCode (LPC_I2C_TypeDef *I2Cx)
void | I2C_MonitorModeConfig (LPC_I2C_TypeDef *I2Cx, uint32_t MonitorCfgType, FunctionalState NewState)
Configures functionality in I2C monitor mode.
void | I2C_MonitorModeCmd (LPC_I2C_TypeDef *I2Cx, FunctionalState NewState)
Enable/Disable I2C monitor mode.
uint8_t | I2C_MonitorGetDatabuffer (LPC_I2C_TypeDef *I2Cx)
Get data from I2C data buffer in monitor mode.
BOOL_8 | I2C_MonitorHandler (LPC_I2C_TypeDef *I2Cx, uint8_t *buffer, uint32_t size)
Get data from I2C data buffer in monitor mode.
void | I2C_IntCmd (LPC_I2C_TypeDef *I2Cx, Bool NewState)
Enable/Disable interrupt for I2C peripheral.
void | I2C_MasterHandler (LPC_I2C_TypeDef *I2Cx)
General Master Interrupt handler for I2C peripheral.
void | I2C_SlaveHandler (LPC_I2C_TypeDef *I2Cx)
General Slave Interrupt handler for I2C peripheral.

Detailed Description

Contains all macro definitions and function prototypes support for I2C firmware library on LPC17xx.

Version:
2.0
Date:
21. May. 2010
Author:
NXP MCU SW Application Team
Copyright(C) 2010, NXP Semiconductor All rights reserved.

Software that is described herein is for illustrative purposes only which provides customers with programming information regarding the products. This software is supplied "AS IS" without any warranties. NXP Semiconductors assumes no responsibility or liability for the use of the software, conveys no license or title under any patent, copyright, or mask work right to the product. NXP Semiconductors reserves the right to make changes in the software without notification. NXP Semiconductors also make no representation or warranty that such application will be suitable for the specified use without further testing or modification.

Definition in file lpc17xx_i2c.h.

Generated on Tue Jun 7 14:59:06 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_i2s.h File Reference

C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_i2s.h File Reference

Contains all macro definitions and function prototypes support for I2S firmware library on LPC17xx. More...

#include "LPC17xx.h"
#include "lpc_types.h"

Go to the source code of this file.

Data Structures

struct | I2S_CFG_Type
I2S configuration structure definition. More...
struct | I2S_DMAConf_Type
I2S DMA configuration structure definition. More...
struct | I2S_MODEConf_Type
I2S mode configuration structure definition. More...

Defines

#define | I2S_WORDWIDTH_8 ((uint32_t)(0))
#define | I2S_WORDWIDTH_16 ((uint32_t)(1))
#define | I2S_WORDWIDTH_32 ((uint32_t)(3))
#define | I2S_STEREO ((uint32_t)(0))
#define | I2S_MONO ((uint32_t)(1))
#define | I2S_MASTER_MODE ((uint8_t)(0))
#define | I2S_SLAVE_MODE ((uint8_t)(1))
#define | I2S_STOP_ENABLE ((uint8_t)(1))
#define | I2S_STOP_DISABLE ((uint8_t)(0))
#define | I2S_RESET_ENABLE ((uint8_t)(1))
#define | I2S_RESET_DISABLE ((uint8_t)(0))
#define | I2S_MUTE_ENABLE ((uint8_t)(1))
#define | I2S_MUTE_DISABLE ((uint8_t)(0))
#define | I2S_TX_MODE ((uint8_t)(0))
#define | I2S_RX_MODE ((uint8_t)(1))
#define | I2S_CLKSEL_FRDCLK ((uint8_t)(0))
#define | I2S_CLKSEL_MCLK ((uint8_t)(2))
#define | I2S_4PIN_ENABLE ((uint8_t)(1))
#define | I2S_4PIN_DISABLE ((uint8_t)(0))
#define | I2S_MCLK_ENABLE ((uint8_t)(1))
#define | I2S_MCLK_DISABLE ((uint8_t)(0))
#define | I2S_DMA_1 ((uint8_t)(0))
#define | I2S_DMA_2 ((uint8_t)(1))
#define | I2S_DAO_WORDWIDTH_8 ((uint32_t)(0))
#define | I2S_DAO_WORDWIDTH_16 ((uint32_t)(1))
#define | I2S_DAO_WORDWIDTH_32 ((uint32_t)(3))
#define | I2S_DAO_MONO ((uint32_t)(1<<2))
#define | I2S_DAO_STOP ((uint32_t)(1<<3))
#define | I2S_DAO_RESET ((uint32_t)(1<<4))
#define | I2S_DAO_SLAVE ((uint32_t)(1<<5))
#define | I2S_DAO_WS_HALFPERIOD(n) ((uint32_t)(n<<6))
#define | I2S_DAO_MUTE ((uint32_t)(1<<15))
#define | I2S_DAI_WORDWIDTH_8 ((uint32_t)(0))
#define | I2S_DAI_WORDWIDTH_16 ((uint32_t)(1))
#define | I2S_DAI_WORDWIDTH_32 ((uint32_t)(3))
#define | I2S_DAI_MONO ((uint32_t)(1<<2))
#define | I2S_DAI_STOP ((uint32_t)(1<<3))
#define | I2S_DAI_RESET ((uint32_t)(1<<4))
#define | I2S_DAI_SLAVE ((uint32_t)(1<<5))
#define | I2S_DAI_WS_HALFPERIOD(n) ((uint32_t)((n&0x1FF)<<6))
#define | I2S_DAI_MUTE ((uint32_t)(1<<15))
#define | I2S_STATE_IRQ ((uint32_t)(1))
#define | I2S_STATE_DMA1 ((uint32_t)(1<<1))
#define | I2S_STATE_DMA2 ((uint32_t)(1<<2))
#define | I2S_STATE_RX_LEVEL(n) ((uint32_t)((n&1F)<<8))
#define | I2S_STATE_TX_LEVEL(n) ((uint32_t)((n&1F)<<16))
#define | I2S_DMA1_RX_ENABLE ((uint32_t)(1))
#define | I2S_DMA1_TX_ENABLE ((uint32_t)(1<<1))
#define | I2S_DMA1_RX_DEPTH(n) ((uint32_t)((n&0x1F)<<8))
#define | I2S_DMA1_TX_DEPTH(n) ((uint32_t)((n&0x1F)<<16))
#define | I2S_DMA2_RX_ENABLE ((uint32_t)(1))
#define | I2S_DMA2_TX_ENABLE ((uint32_t)(1<<1))
#define | I2S_DMA2_RX_DEPTH(n) ((uint32_t)((n&0x1F)<<8))
#define | I2S_DMA2_TX_DEPTH(n) ((uint32_t)((n&0x1F)<<16))
#define | I2S_IRQ_RX_ENABLE ((uint32_t)(1))
#define | I2S_IRQ_TX_ENABLE ((uint32_t)(1<<1))
#define | I2S_IRQ_RX_DEPTH(n) ((uint32_t)((n&0x1F)<<8))
#define | I2S_IRQ_TX_DEPTH(n) ((uint32_t)((n&0x1F)<<16))
#define | I2S_TXRATE_Y_DIVIDER(n) ((uint32_t)(n&0xFF))
#define | I2S_TXRATE_X_DIVIDER(n) ((uint32_t)((n&0xFF)<<8))
#define | I2S_RXRATE_Y_DIVIDER(n) ((uint32_t)(n&0xFF))
#define | I2S_RXRATE_X_DIVIDER(n) ((uint32_t)((n&0xFF)<<8))
#define | I2S_TXBITRATE(n) ((uint32_t)(n&0x3F))
#define | I2S_RXBITRATE(n) ((uint32_t)(n&0x3F))
#define | I2S_TXMODE_CLKSEL(n) ((uint32_t)(n&0x03))
#define | I2S_TXMODE_4PIN_ENABLE ((uint32_t)(1<<2))
#define | I2S_TXMODE_MCENA ((uint32_t)(1<<3))
#define | I2S_RXMODE_CLKSEL(n) ((uint32_t)(n&0x03))
#define | I2S_RXMODE_4PIN_ENABLE ((uint32_t)(1<<2))
#define | I2S_RXMODE_MCENA ((uint32_t)(1<<3))
#define | PARAM_I2Sx(n) (((uint32_t *)n)==((uint32_t *)LPC_I2S))
#define | PRAM_I2S_FREQ(freq) ((freq>=16000)&&(freq <= 96000))
#define | PARAM_I2S_WORDWIDTH(n)
#define | PARAM_I2S_CHANNEL(n) ((n==I2S_STEREO)||(n==I2S_MONO))
#define | PARAM_I2S_WS_SEL(n) ((n==I2S_MASTER_MODE)||(n==I2S_SLAVE_MODE))
#define | PARAM_I2S_STOP(n) ((n==I2S_STOP_ENABLE)||(n==I2S_STOP_DISABLE))
#define | PARAM_I2S_RESET(n) ((n==I2S_RESET_ENABLE)||(n==I2S_RESET_DISABLE))
#define | PARAM_I2S_MUTE(n) ((n==I2S_MUTE_ENABLE)||(n==I2S_MUTE_DISABLE))
#define | PARAM_I2S_TRX(n) ((n==I2S_TX_MODE)||(n==I2S_RX_MODE))
#define | PARAM_I2S_CLKSEL(n) ((n==I2S_CLKSEL_FRDCLK)||(n==I2S_CLKSEL_MCLK))
#define | PARAM_I2S_4PIN(n) ((n==I2S_4PIN_ENABLE)||(n==I2S_4PIN_DISABLE))
#define | PARAM_I2S_MCLK(n) ((n==I2S_MCLK_ENABLE)||(n==I2S_MCLK_DISABLE))
#define | PARAM_I2S_DMA(n) ((n==I2S_DMA_1)||(n==I2S_DMA_2))
#define | PARAM_I2S_DMA_DEPTH(n) (n<=31)
#define | PARAM_I2S_IRQ_LEVEL(n) (n<=31)
#define | PARAM_I2S_HALFPERIOD(n) (n<512)
#define | PARAM_I2S_BITRATE(n) (n<=63)

Functions

void | I2S_Init (LPC_I2S_TypeDef *I2Sx)
Initialize I2S
  • Turn on power and clock.

void | I2S_DeInit (LPC_I2S_TypeDef *I2Sx)
DeInitial both I2S transmit or receive.
void | I2S_Config (LPC_I2S_TypeDef *I2Sx, uint8_t TRMode, I2S_CFG_Type *ConfigStruct)
Configuration I2S, setting:
  • master/slave mode
  • wordwidth value
  • channel mode.

Status | I2S_FreqConfig (LPC_I2S_TypeDef *I2Sx, uint32_t Freq, uint8_t TRMode)
Set frequency for I2S.
void | I2S_SetBitRate (LPC_I2S_TypeDef *I2Sx, uint8_t bitrate, uint8_t TRMode)
I2S set bitrate.
void | I2S_ModeConfig (LPC_I2S_TypeDef *I2Sx, I2S_MODEConf_Type *ModeConfig, uint8_t TRMode)
Configuration operating mode for I2S.
uint8_t | I2S_GetLevel (LPC_I2S_TypeDef *I2Sx, uint8_t TRMode)
Get I2S Buffer Level.
void | I2S_Send (LPC_I2S_TypeDef *I2Sx, uint32_t BufferData)
I2S Send data.
uint32_t | I2S_Receive (LPC_I2S_TypeDef *I2Sx)
I2S Receive Data.
void | I2S_Start (LPC_I2S_TypeDef *I2Sx)
I2S Start: clear all STOP,RESET and MUTE bit, ready to operate.
void | I2S_Pause (LPC_I2S_TypeDef *I2Sx, uint8_t TRMode)
I2S Pause.
void | I2S_Mute (LPC_I2S_TypeDef *I2Sx, uint8_t TRMode)
I2S Mute.
void | I2S_Stop (LPC_I2S_TypeDef *I2Sx, uint8_t TRMode)
I2S Stop.
void | I2S_DMAConfig (LPC_I2S_TypeDef *I2Sx, I2S_DMAConf_Type *DMAConfig, uint8_t TRMode)
Configure DMA operation for I2S.
void | I2S_DMACmd (LPC_I2S_TypeDef *I2Sx, uint8_t DMAIndex, uint8_t TRMode, FunctionalState NewState)
Enable/Disable DMA operation for I2S.
void | I2S_IRQCmd (LPC_I2S_TypeDef *I2Sx, uint8_t TRMode, FunctionalState NewState)
Enable/Disable IRQ for I2S.
void | I2S_IRQConfig (LPC_I2S_TypeDef *I2Sx, uint8_t TRMode, uint8_t level)
Configure IRQ for I2S.
FunctionalState | I2S_GetIRQStatus (LPC_I2S_TypeDef *I2Sx, uint8_t TRMode)
Get I2S interrupt status.
uint8_t | I2S_GetIRQDepth (LPC_I2S_TypeDef *I2Sx, uint8_t TRMode)
Get I2S interrupt depth.

Detailed Description

Contains all macro definitions and function prototypes support for I2S firmware library on LPC17xx.

Version:
3.1
Date:
06. June. 2011
Author:
NXP MCU SW Application Team
Copyright(C) 2011, NXP Semiconductor All rights reserved.

Software that is described herein is for illustrative purposes only which provides customers with programming information regarding the products. This software is supplied "AS IS" without any warranties. NXP Semiconductors assumes no responsibility or liability for the use of the software, conveys no license or title under any patent, copyright, or mask work right to the product. NXP Semiconductors reserves the right to make changes in the software without notification. NXP Semiconductors also make no representation or warranty that such application will be suitable for the specified use without further testing or modification.

Definition in file lpc17xx_i2s.h.

Generated on Tue Jun 7 14:59:06 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_libcfg_default.h File Reference

C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_libcfg_default.h File Reference

Default Library configuration header file. More...

#include "lpc_types.h"

Go to the source code of this file.

Defines

#define | DEBUG
#define | _DBGFWK
#define | _GPIO
#define | _EXTI
#define | _UART
#define | _UART0
#define | _UART1
#define | _UART2
#define | _UART3
#define | _SPI
#define | _SYSTICK
#define | _SSP
#define | _SSP0
#define | _SSP1
#define | _I2C
#define | _I2C0
#define | _I2C1
#define | _I2C2
#define | _TIM
#define | _WDT
#define | _GPDMA
#define | _DAC
#define | _ADC
#define | _PWM
#define | _PWM1
#define | _RTC
#define | _I2S
#define | _USBDEV
#define | _USB_DMA
#define | _QEI
#define | _MCPWM
#define | _CAN
#define | _RIT
#define | _EMAC
#define | CHECK_PARAM(expr) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))

Functions

void | check_failed (uint8_t *file, uint32_t line)

Detailed Description

Default Library configuration header file.

Version:
2.0
Date:
21. May. 2010
Author:
NXP MCU SW Application Team
Copyright(C) 2010, NXP Semiconductor All rights reserved.

Software that is described herein is for illustrative purposes only which provides customers with programming information regarding the products. This software is supplied "AS IS" without any warranties. NXP Semiconductors assumes no responsibility or liability for the use of the software, conveys no license or title under any patent, copyright, or mask work right to the product. NXP Semiconductors reserves the right to make changes in the software without notification. NXP Semiconductors also make no representation or warranty that such application will be suitable for the specified use without further testing or modification.

Definition in file lpc17xx_libcfg_default.h.

Generated on Tue Jun 7 14:59:06 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_mcpwm.h File Reference

C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_mcpwm.h File Reference

Contains all macro definitions and function prototypes support for Motor Control PWM firmware library on LPC17xx. More...

#include "LPC17xx.h"
#include "lpc_types.h"

Go to the source code of this file.

Data Structures

struct | MCPWM_CHANNEL_CFG_Type
Motor Control PWM Channel Configuration structure type definition. More...
struct | MCPWM_CAPTURE_CFG_Type
MCPWM Capture Configuration type definition. More...
struct | MCPWM_COUNT_CFG_Type
MCPWM Count Control Configuration type definition. More...

Defines

#define | MCPWM_CHANNEL_EDGE_MODE ((uint32_t)(0))
#define | MCPWM_CHANNEL_CENTER_MODE ((uint32_t)(1))
#define | MCPWM_CHANNEL_PASSIVE_LO ((uint32_t)(0))
#define | MCPWM_CHANNEL_PASSIVE_HI ((uint32_t)(1))
#define | MCPWM_PATENT_A0 ((uint32_t)(1<<0))
#define | MCPWM_PATENT_B0 ((uint32_t)(1<<1))
#define | MCPWM_PATENT_A1 ((uint32_t)(1<<2))
#define | MCPWM_PATENT_B1 ((uint32_t)(1<<3))
#define | MCPWM_PATENT_A2 ((uint32_t)(1<<4))
#define | MCPWM_PATENT_B2 ((uint32_t)(1<<5))
#define | MCPWM_INTFLAG_LIM0 MCPWM_INT_ILIM(0)
#define | MCPWM_INTFLAG_MAT0 MCPWM_INT_IMAT(0)
#define | MCPWM_INTFLAG_CAP0 MCPWM_INT_ICAP(0)
#define | MCPWM_INTFLAG_LIM1 MCPWM_INT_ILIM(1)
#define | MCPWM_INTFLAG_MAT1 MCPWM_INT_IMAT(1)
#define | MCPWM_INTFLAG_CAP1 MCPWM_INT_ICAP(1)
#define | MCPWM_INTFLAG_LIM2 MCPWM_INT_ILIM(2)
#define | MCPWM_INTFLAG_MAT2 MCPWM_INT_IMAT(2)
#define | MCPWM_INTFLAG_CAP2 MCPWM_INT_ICAP(2)
#define | MCPWM_INTFLAG_ABORT MCPWM_INT_ABORT
#define | MCPWM_CON_RUN(n) ((n<=2) ? ((uint32_t)(1<<((n*8)+0))) : (0))
#define | MCPWM_CON_CENTER(n) ((n<=2) ? ((uint32_t)(1<<((n*8)+1))) : (0))
#define | MCPWM_CON_POLAR(n) ((n<=2) ? ((uint32_t)(1<<((n*8)+2))) : (0))
#define | MCPWM_CON_DTE(n) ((n<=2) ? ((uint32_t)(1<<((n*8)+3))) : (0))
#define | MCPWM_CON_DISUP(n) ((n<=2) ? ((uint32_t)(1<<((n*8)+4))) : (0))
#define | MCPWM_CON_INVBDC ((uint32_t)(1<<29))
#define | MCPWM_CON_ACMODE ((uint32_t)(1<<30))
#define | MCPWM_CON_DCMODE ((uint32_t)(1<<31))
#define | MCPWM_CAPCON_CAPMCI_RE(cap, mci) (((cap<=2)&&(mci<=2)) ? ((uint32_t)(1<<((cap*6)+(mci*2)+0))) : (0))
#define | MCPWM_CAPCON_CAPMCI_FE(cap, mci) (((cap<=2)&&(mci<=2)) ? ((uint32_t)(1<<((cap*6)+(mci*2)+1))) : (0))
#define | MCPWM_CAPCON_RT(n) ((n<=2) ? ((uint32_t)(1<<(18+(n)))) : (0))
#define | MCPWM_CAPCON_HNFCAP(n) ((n<=2) ? ((uint32_t)(1<<(21+(n)))) : (0))
#define | MCPWM_INT_ILIM(n) (((n>=0)&&(n<=2)) ? ((uint32_t)(1<<((n*4)+0))) : (0))
#define | MCPWM_INT_IMAT(n) (((n>=0)&&(n<=2)) ? ((uint32_t)(1<<((n*4)+1))) : (0))
#define | MCPWM_INT_ICAP(n) (((n>=0)&&(n<=2)) ? ((uint32_t)(1<<((n*4)+2))) : (0))
#define | MCPWM_INT_ABORT ((uint32_t)(1<<15))
#define | MCPWM_CNTCON_TCMCI_RE(tc, mci) (((tc>=0)&&(tc<=2)&&(mci>=0)&&(mci<=2)) ? ((uint32_t)(1<<((6*tc)+(2*mci)+0))) : (0))
#define | MCPWM_CNTCON_TCMCI_FE(tc, mci) (((tc>=0)&&(tc<=2)&&(mci>=0)&&(mci<=2)) ? ((uint32_t)(1<<((6*tc)+(2*mci)+1))) : (0))
#define | MCPWM_CNTCON_CNTR(n) (((n>=0)&&(n<=2)) ? ((uint32_t)(1<<(29+n))) : (0))
#define | MCPWM_DT(n, x) ((n<=2) ? ((uint32_t)((x&0x3FF)<<(n*10))) : (0))
#define | MCPWM_CP_A0 ((uint32_t)(1<<0))
#define | MCPWM_CP_B0 ((uint32_t)(1<<1))
#define | MCPWM_CP_A1 ((uint32_t)(1<<2))
#define | MCPWM_CP_B1 ((uint32_t)(1<<3))
#define | MCPWM_CP_A2 ((uint32_t)(1<<4))
#define | MCPWM_CP_B2 ((uint32_t)(1<<5))
#define | MCPWM_CAPCLR_CAP(n) ((n<=2) ? ((uint32_t)(1<<n)) : (0))

Functions

void | MCPWM_Init (LPC_MCPWM_TypeDef *MCPWMx)
Initializes the MCPWM peripheral.
void | MCPWM_ConfigChannel (LPC_MCPWM_TypeDef *MCPWMx, uint32_t channelNum, MCPWM_CHANNEL_CFG_Type *channelSetup)
Configures each channel in MCPWM peripheral according to the specified parameters in the MCPWM_CHANNEL_CFG_Type.
void | MCPWM_WriteToShadow (LPC_MCPWM_TypeDef *MCPWMx, uint32_t channelNum, MCPWM_CHANNEL_CFG_Type *channelSetup)
Write to MCPWM shadow registers - Update the value for period and pulse width in MCPWM peripheral.
void | MCPWM_ConfigCapture (LPC_MCPWM_TypeDef *MCPWMx, uint32_t channelNum, MCPWM_CAPTURE_CFG_Type *captureConfig)
Configures capture function in MCPWM peripheral.
void | MCPWM_ClearCapture (LPC_MCPWM_TypeDef *MCPWMx, uint32_t captureChannel)
Clears current captured value in specified capture channel.
uint32_t | MCPWM_GetCapture (LPC_MCPWM_TypeDef *MCPWMx, uint32_t captureChannel)
Get current captured value in specified capture channel.
void | MCPWM_CountConfig (LPC_MCPWM_TypeDef *MCPWMx, uint32_t channelNum, uint32_t countMode, MCPWM_COUNT_CFG_Type *countConfig)
Configures Count control in MCPWM peripheral.
void | MCPWM_Start (LPC_MCPWM_TypeDef *MCPWMx, uint32_t channel0, uint32_t channel1, uint32_t channel2)
Start MCPWM activity for each MCPWM channel.
void | MCPWM_Stop (LPC_MCPWM_TypeDef *MCPWMx, uint32_t channel0, uint32_t channel1, uint32_t channel2)
Stop MCPWM activity for each MCPWM channel.
void | MCPWM_ACMode (LPC_MCPWM_TypeDef *MCPWMx, uint32_t acMode)
Enables/Disables 3-phase AC motor mode on MCPWM peripheral.
void | MCPWM_DCMode (LPC_MCPWM_TypeDef *MCPWMx, uint32_t dcMode, uint32_t outputInvered, uint32_t outputPattern)
Enables/Disables 3-phase DC motor mode on MCPWM peripheral.
void | MCPWM_IntConfig (LPC_MCPWM_TypeDef *MCPWMx, uint32_t ulIntType, FunctionalState NewState)
Configures the specified interrupt in MCPWM peripheral.
void | MCPWM_IntSet (LPC_MCPWM_TypeDef *MCPWMx, uint32_t ulIntType)
Sets/Forces the specified interrupt for MCPWM peripheral.
void | MCPWM_IntClear (LPC_MCPWM_TypeDef *MCPWMx, uint32_t ulIntType)
Clear the specified interrupt pending for MCPWM peripheral.
FlagStatus | MCPWM_GetIntStatus (LPC_MCPWM_TypeDef *MCPWMx, uint32_t ulIntType)
Check whether if the specified interrupt in MCPWM is set or not.

Detailed Description

Contains all macro definitions and function prototypes support for Motor Control PWM firmware library on LPC17xx.

Version:
2.0
Date:
21. May. 2010
Author:
NXP MCU SW Application Team
Copyright(C) 2010, NXP Semiconductor All rights reserved.

Software that is described herein is for illustrative purposes only which provides customers with programming information regarding the products. This software is supplied "AS IS" without any warranties. NXP Semiconductors assumes no responsibility or liability for the use of the software, conveys no license or title under any patent, copyright, or mask work right to the product. NXP Semiconductors reserves the right to make changes in the software without notification. NXP Semiconductors also make no representation or warranty that such application will be suitable for the specified use without further testing or modification.

Definition in file lpc17xx_mcpwm.h.

Generated on Tue Jun 7 14:59:06 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_nvic.h File Reference

C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_nvic.h File Reference

Contains all macro definitions and function prototypes support for Nesting Vectored Interrupt firmware library on LPC17xx. More...

#include "LPC17xx.h"
#include "lpc_types.h"

Go to the source code of this file.

Functions

void | NVIC_DeInit (void)
De-initializes the NVIC peripheral registers to their default reset values.
void | NVIC_SCBDeInit (void)
De-initializes the SCB peripheral registers to their default reset values.
void | NVIC_SetVTOR (uint32_t offset)
Set Vector Table Offset value.

Detailed Description

Contains all macro definitions and function prototypes support for Nesting Vectored Interrupt firmware library on LPC17xx.

Version:
2.0
Date:
21. May. 2010
Author:
NXP MCU SW Application Team
Copyright(C) 2010, NXP Semiconductor All rights reserved.

Software that is described herein is for illustrative purposes only which provides customers with programming information regarding the products. This software is supplied "AS IS" without any warranties. NXP Semiconductors assumes no responsibility or liability for the use of the software, conveys no license or title under any patent, copyright, or mask work right to the product. NXP Semiconductors reserves the right to make changes in the software without notification. NXP Semiconductors also make no representation or warranty that such application will be suitable for the specified use without further testing or modification.

Definition in file lpc17xx_nvic.h.

Generated on Tue Jun 7 14:59:06 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_pinsel.h File Reference

C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_pinsel.h File Reference

Contains all macro definitions and function prototypes support for Pin connect block firmware library on LPC17xx. More...

#include "lpc17xx.h"
#include "lpc_types.h"

Go to the source code of this file.

Data Structures

struct | PINSEL_CFG_Type
Pin configuration structure. More...

Defines

#define | PINSEL_PORT_0 ((0))
#define | PINSEL_PORT_1 ((1))
#define | PINSEL_PORT_2 ((2))
#define | PINSEL_PORT_3 ((3))
#define | PINSEL_PORT_4 ((4))
#define | PINSEL_FUNC_0 ((0))
#define | PINSEL_FUNC_1 ((1))
#define | PINSEL_FUNC_2 ((2))
#define | PINSEL_FUNC_3 ((3))
#define | PINSEL_PIN_0 ((0))
#define | PINSEL_PIN_1 ((1))
#define | PINSEL_PIN_2 ((2))
#define | PINSEL_PIN_3 ((3))
#define | PINSEL_PIN_4 ((4))
#define | PINSEL_PIN_5 ((5))
#define | PINSEL_PIN_6 ((6))
#define | PINSEL_PIN_7 ((7))
#define | PINSEL_PIN_8 ((8))
#define | PINSEL_PIN_9 ((9))
#define | PINSEL_PIN_10 ((10))
#define | PINSEL_PIN_11 ((11))
#define | PINSEL_PIN_12 ((12))
#define | PINSEL_PIN_13 ((13))
#define | PINSEL_PIN_14 ((14))
#define | PINSEL_PIN_15 ((15))
#define | PINSEL_PIN_16 ((16))
#define | PINSEL_PIN_17 ((17))
#define | PINSEL_PIN_18 ((18))
#define | PINSEL_PIN_19 ((19))
#define | PINSEL_PIN_20 ((20))
#define | PINSEL_PIN_21 ((21))
#define | PINSEL_PIN_22 ((22))
#define | PINSEL_PIN_23 ((23))
#define | PINSEL_PIN_24 ((24))
#define | PINSEL_PIN_25 ((25))
#define | PINSEL_PIN_26 ((26))
#define | PINSEL_PIN_27 ((27))
#define | PINSEL_PIN_28 ((28))
#define | PINSEL_PIN_29 ((29))
#define | PINSEL_PIN_30 ((30))
#define | PINSEL_PIN_31 ((31))
#define | PINSEL_PINMODE_PULLUP ((0))
#define | PINSEL_PINMODE_TRISTATE ((2))
#define | PINSEL_PINMODE_PULLDOWN ((3))
#define | PINSEL_PINMODE_NORMAL ((0))
#define | PINSEL_PINMODE_OPENDRAIN ((1))
#define | PINSEL_I2C_Normal_Mode ((0))
#define | PINSEL_I2C_Fast_Mode ((1))
#define | PINSEL_I2CPADCFG_SDADRV0 _BIT(0)
#define | PINSEL_I2CPADCFG_SDAI2C0 _BIT(1)
#define | PINSEL_I2CPADCFG_SCLDRV0 _BIT(2)
#define | PINSEL_I2CPADCFG_SCLI2C0 _BIT(3)

Functions

void | PINSEL_ConfigPin (PINSEL_CFG_Type *PinCfg)
Configure Pin corresponding to specified parameters passed in the PinCfg.
void | PINSEL_ConfigTraceFunc (FunctionalState NewState)
Configure trace function.
void | PINSEL_SetI2C0Pins (uint8_t i2cPinMode, FunctionalState filterSlewRateEnable)
Setup I2C0 pins.

Detailed Description

Contains all macro definitions and function prototypes support for Pin connect block firmware library on LPC17xx.

Version:
2.0
Date:
21. May. 2010
Author:
NXP MCU SW Application Team
Copyright(C) 2010, NXP Semiconductor All rights reserved.

Software that is described herein is for illustrative purposes only which provides customers with programming information regarding the products. This software is supplied "AS IS" without any warranties. NXP Semiconductors assumes no responsibility or liability for the use of the software, conveys no license or title under any patent, copyright, or mask work right to the product. NXP Semiconductors reserves the right to make changes in the software without notification. NXP Semiconductors also make no representation or warranty that such application will be suitable for the specified use without further testing or modification.

Definition in file lpc17xx_pinsel.h.

Generated on Tue Jun 7 14:59:07 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_pwm.h File Reference

C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_pwm.h File Reference

Contains all macro definitions and function prototypes support for PWM firmware library on LPC17xx. More...

#include "LPC17xx.h"
#include "lpc_types.h"

Go to the source code of this file.

Data Structures

struct | PWM_TIMERCFG_Type
Configuration structure in PWM TIMER mode. More...
struct | PWM_COUNTERCFG_Type
Configuration structure in PWM COUNTER mode. More...
struct | PWM_MATCHCFG_Type
PWM Match channel configuration structure. More...
struct | PWM_CAPTURECFG_Type
PWM Capture Input configuration structure. More...
struct | PWM_Match_T
Match update structure. More...

Defines

#define | PWM_IR_PWMMRn(n) ((uint32_t)((n<4)?(1<<n):(1<<(n+4))))
#define | PWM_IR_PWMCAPn(n) ((uint32_t)(1<<(n+4)))
#define | PWM_IR_BITMASK ((uint32_t)(0x0000073F))
#define | PWM_TCR_BITMASK ((uint32_t)(0x0000000B))
#define | PWM_TCR_COUNTER_ENABLE ((uint32_t)(1<<0))
#define | PWM_TCR_COUNTER_RESET ((uint32_t)(1<<1))
#define | PWM_TCR_PWM_ENABLE ((uint32_t)(1<<3))
#define | PWM_CTCR_BITMASK ((uint32_t)(0x0000000F))
#define | PWM_CTCR_MODE(n) ((uint32_t)(n&0x03))
#define | PWM_CTCR_SELECT_INPUT(n) ((uint32_t)((n&0x03)<<2))
#define | PWM_MCR_BITMASK ((uint32_t)(0x001FFFFF))
#define | PWM_MCR_INT_ON_MATCH(n) ((uint32_t)(1<<(((n&0x7)<<1)+(n&0x07))))
#define | PWM_MCR_RESET_ON_MATCH(n) ((uint32_t)(1<<(((n&0x7)<<1)+(n&0x07)+1)))
#define | PWM_MCR_STOP_ON_MATCH(n) ((uint32_t)(1<<(((n&0x7)<<1)+(n&0x07)+2)))
#define | PWM_CCR_BITMASK ((uint32_t)(0x0000003F))
#define | PWM_CCR_CAP_RISING(n) ((uint32_t)(1<<(((n&0x2)<<1)+(n&0x1))))
#define | PWM_CCR_CAP_FALLING(n) ((uint32_t)(1<<(((n&0x2)<<1)+(n&0x1)+1)))
#define | PWM_CCR_INT_ON_CAP(n) ((uint32_t)(1<<(((n&0x2)<<1)+(n&0x1)+2)))
#define | PWM_PCR_BITMASK (uint32_t)0x00007E7C
#define | PWM_PCR_PWMSELn(n) ((uint32_t)(((n&0x7)<2) ? 0 : (1<<n)))
#define | PWM_PCR_PWMENAn(n) ((uint32_t)(((n&0x7)<1) ? 0 : (1<<(n+8))))
#define | PWM_LER_BITMASK ((uint32_t)(0x0000007F))
#define | PWM_LER_EN_MATCHn_LATCH(n) ((uint32_t)((n<7) ? (1<<n) : 0))
#define | PARAM_PWMx(n) (((uint32_t *)n)==((uint32_t *)LPC_PWM1))
#define | PARAM_PWM1_MATCH_CHANNEL(n) ((n>=0) && (n<=6))
#define | PARAM_PWM1_CHANNEL(n) ((n>=1) && (n<=6))
#define | PARAM_PWM1_EDGE_MODE_CHANNEL(n) ((n>=2) && (n<=6))
#define | PARAM_PWM1_CAPTURE_CHANNEL(n) ((n==0) || (n==1))
#define | PARAM_PWM_INTSTAT(n)
#define | PARAM_PWM_TC_MODE(n) ((n==PWM_MODE_TIMER) || (n==PWM_MODE_COUNTER))
#define | PARAM_PWM_TIMER_PRESCALE(n) ((n==PWM_TIMER_PRESCALE_TICKVAL) || (n==PWM_TIMER_PRESCALE_USVAL))
#define | PARAM_PWM_COUNTER_INPUTSEL(n) ((n==PWM_COUNTER_PCAP1_0) || (n==PWM_COUNTER_PCAP1_1))
#define | PARAM_PWM_COUNTER_EDGE(n)
#define | PARAM_PWM_CHANNEL_EDGE(n) ((n==PWM_CHANNEL_SINGLE_EDGE) || (n==PWM_CHANNEL_DUAL_EDGE))
#define | PARAM_PWM_MATCH_UPDATE(n) ((n==PWM_MATCH_UPDATE_NOW) || (n==PWM_MATCH_UPDATE_NEXT_RST))

Enumerations

enum | PWM_TC_MODE_OPT { PWM_MODE_TIMER = 0, PWM_MODE_COUNTER }
PMW TC mode select option. More...
enum | PWM_TIMER_PRESCALE_OPT { PWM_TIMER_PRESCALE_TICKVAL = 0, PWM_TIMER_PRESCALE_USVAL }
PWM Timer/Counter prescale option. More...
enum | PWM_COUNTER_INPUTSEL_OPT { PWM_COUNTER_PCAP1_0 = 0, PWM_COUNTER_PCAP1_1 }
PWM Input Select in counter mode. More...
enum | PWM_COUNTER_EDGE_OPT { PWM_COUNTER_RISING = 1, PWM_COUNTER_FALLING = 2, PWM_COUNTER_ANY = 3 }
PWM Input Edge Option in counter mode. More...
enum | PWM_CHANNEL_EDGE_OPT { PWM_CHANNEL_SINGLE_EDGE, PWM_CHANNEL_DUAL_EDGE }
PWM operating mode options. More...
enum | PWM_MATCH_UPDATE_OPT { PWM_MATCH_UPDATE_NOW = 0, PWM_MATCH_UPDATE_NEXT_RST }
PWM update type. More...
enum PWM_INTSTAT_TYPE {
PWM_INTSTAT_MR0 = PWM_IR_PWMMRn(0), PWM_INTSTAT_MR1 = PWM_IR_PWMMRn(1), PWM_INTSTAT_MR2 = PWM_IR_PWMMRn(2), PWM_INTSTAT_MR3 = PWM_IR_PWMMRn(3),
PWM_INTSTAT_CAP0 = PWM_IR_PWMCAPn(0), PWM_INTSTAT_CAP1 = PWM_IR_PWMCAPn(1), PWM_INTSTAT_MR4 = PWM_IR_PWMMRn(4), PWM_INTSTAT_MR6 = PWM_IR_PWMMRn(5),
PWM_INTSTAT_MR5 = PWM_IR_PWMMRn(6)
}
PWM interrupt status type definition -----------------------------------------------------. More...

Functions

void | PWM_PinConfig (LPC_PWM_TypeDef *PWMx, uint8_t PWM_Channel, uint8_t PinselOption)
IntStatus | PWM_GetIntStatus (LPC_PWM_TypeDef *PWMx, uint32_t IntFlag)
Check whether specified interrupt flag in PWM is set or not.
void | PWM_ClearIntPending (LPC_PWM_TypeDef *PWMx, uint32_t IntFlag)
Clear specified PWM Interrupt pending.
void | PWM_ConfigStructInit (uint8_t PWMTimerCounterMode, void *PWM_InitStruct)
Fills each PWM_InitStruct member with its default value:
  • If PWMCounterMode = PWM_MODE_TIMER: + PrescaleOption = PWM_TIMER_PRESCALE_USVAL + PrescaleValue = 1
  • If PWMCounterMode = PWM_MODE_COUNTER: + CountInputSelect = PWM_COUNTER_PCAP1_0 + CounterOption = PWM_COUNTER_RISING.

void | PWM_Init (LPC_PWM_TypeDef *PWMx, uint32_t PWMTimerCounterMode, void *PWM_ConfigStruct)
Initializes the PWMx peripheral corresponding to the specified parameters in the PWM_ConfigStruct.
void | PWM_DeInit (LPC_PWM_TypeDef *PWMx)
De-initializes the PWM peripheral registers to their default reset values.
void | PWM_Cmd (LPC_PWM_TypeDef *PWMx, FunctionalState NewState)
Enable/Disable PWM peripheral.
void | PWM_CounterCmd (LPC_PWM_TypeDef *PWMx, FunctionalState NewState)
Enable/Disable Counter in PWM peripheral.
void | PWM_ResetCounter (LPC_PWM_TypeDef *PWMx)
Reset Counter in PWM peripheral.
void | PWM_ConfigMatch (LPC_PWM_TypeDef *PWMx, PWM_MATCHCFG_Type *PWM_MatchConfigStruct)
Configures match for PWM peripheral.
void | PWM_ConfigCapture (LPC_PWM_TypeDef *PWMx, PWM_CAPTURECFG_Type *PWM_CaptureConfigStruct)
Configures capture input for PWM peripheral.
uint32_t | PWM_GetCaptureValue (LPC_PWM_TypeDef *PWMx, uint8_t CaptureChannel)
Read value of capture register PWM peripheral.
void | PWM_MatchUpdate (LPC_PWM_TypeDef *PWMx, uint8_t MatchChannel, uint32_t MatchValue, uint8_t UpdateType)
Update value for each PWM channel with update type option.
void | PWM_ChannelConfig (LPC_PWM_TypeDef *PWMx, uint8_t PWMChannel, uint8_t ModeOption)
Configure Edge mode for each PWM channel.
void | PWM_ChannelCmd (LPC_PWM_TypeDef *PWMx, uint8_t PWMChannel, FunctionalState NewState)
Enable/Disable PWM channel output.

Detailed Description

Contains all macro definitions and function prototypes support for PWM firmware library on LPC17xx.

Version:
2.1
Date:
31. Mar. 2011
Author:
NXP MCU SW Application Team
Copyright(C) 2011, NXP Semiconductor All rights reserved.

Software that is described herein is for illustrative purposes only which provides customers with programming information regarding the products. This software is supplied "AS IS" without any warranties. NXP Semiconductors assumes no responsibility or liability for the use of the software, conveys no license or title under any patent, copyright, or mask work right to the product. NXP Semiconductors reserves the right to make changes in the software without notification. NXP Semiconductors also make no representation or warranty that such application will be suitable for the specified use without further testing or modification.

Definition in file lpc17xx_pwm.h.

Generated on Tue Jun 7 14:59:07 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_qei.h File Reference

C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_qei.h File Reference

Contains all macro definitions and function prototypes support for QEI firmware library on LPC17xx. More...

#include "LPC17xx.h"
#include "lpc_types.h"

Go to the source code of this file.

Data Structures

struct | QEI_CFG_Type
QEI Configuration structure type definition. More...
struct | QEI_RELOADCFG_Type
Timer Reload Configuration structure type definition. More...

Defines

#define | QEI_RESET_POS QEI_CON_RESP
#define | QEI_RESET_POSOnIDX QEI_CON_RESPI
#define | QEI_RESET_VEL QEI_CON_RESV
#define | QEI_RESET_IDX QEI_CON_RESI
#define | QEI_DIRINV_NONE ((uint32_t)(0))
#define | QEI_DIRINV_CMPL ((uint32_t)(1))
#define | QEI_SIGNALMODE_QUAD ((uint32_t)(0))
#define | QEI_SIGNALMODE_CLKDIR ((uint32_t)(1))
#define | QEI_CAPMODE_2X ((uint32_t)(0))
#define | QEI_CAPMODE_4X ((uint32_t)(1))
#define | QEI_INVINX_NONE ((uint32_t)(0))
#define | QEI_INVINX_EN ((uint32_t)(1))
#define | QEI_TIMERRELOAD_TICKVAL ((uint8_t)(0))
#define | QEI_TIMERRELOAD_USVAL ((uint8_t)(1))
#define | QEI_STATUS_DIR ((uint32_t)(1<<0))
#define | QEI_COMPPOS_CH_0 ((uint8_t)(0))
#define | QEI_COMPPOS_CH_1 ((uint8_t)(1))
#define | QEI_COMPPOS_CH_2 ((uint8_t)(2))
#define | QEI_INTFLAG_INX_Int ((uint32_t)(1<<0))
#define | QEI_INTFLAG_TIM_Int ((uint32_t)(1<<1))
#define | QEI_INTFLAG_VELC_Int ((uint32_t)(1<<2))
#define | QEI_INTFLAG_DIR_Int ((uint32_t)(1<<3))
#define | QEI_INTFLAG_ERR_Int ((uint32_t)(1<<4))
#define | QEI_INTFLAG_ENCLK_Int ((uint32_t)(1<<5))
#define | QEI_INTFLAG_POS0_Int ((uint32_t)(1<<6))
#define | QEI_INTFLAG_POS1_Int ((uint32_t)(1<<7))
#define | QEI_INTFLAG_POS2_Int ((uint32_t)(1<<8))
#define | QEI_INTFLAG_REV_Int ((uint32_t)(1<<9))
#define | QEI_INTFLAG_POS0REV_Int ((uint32_t)(1<<10))
#define | QEI_INTFLAG_POS1REV_Int ((uint32_t)(1<<11))
#define | QEI_INTFLAG_POS2REV_Int ((uint32_t)(1<<12))
#define | QEI_CON_RESP ((uint32_t)(1<<0))
#define | QEI_CON_RESPI ((uint32_t)(1<<1))
#define | QEI_CON_RESV ((uint32_t)(1<<2))
#define | QEI_CON_RESI ((uint32_t)(1<<3))
#define | QEI_CON_BITMASK ((uint32_t)(0x0F))
#define | QEI_CONF_DIRINV ((uint32_t)(1<<0))
#define | QEI_CONF_SIGMODE ((uint32_t)(1<<1))
#define | QEI_CONF_CAPMODE ((uint32_t)(1<<2))
#define | QEI_CONF_INVINX ((uint32_t)(1<<3))
#define | QEI_CONF_BITMASK ((uint32_t)(0x0F))
#define | QEI_STAT_DIR ((uint32_t)(1<<0))
#define | QEI_STAT_BITMASK ((uint32_t)(1<<0))
#define | QEI_INTSTAT_INX_Int ((uint32_t)(1<<0))
#define | QEI_INTSTAT_TIM_Int ((uint32_t)(1<<1))
#define | QEI_INTSTAT_VELC_Int ((uint32_t)(1<<2))
#define | QEI_INTSTAT_DIR_Int ((uint32_t)(1<<3))
#define | QEI_INTSTAT_ERR_Int ((uint32_t)(1<<4))
#define | QEI_INTSTAT_ENCLK_Int ((uint32_t)(1<<5))
#define | QEI_INTSTAT_POS0_Int ((uint32_t)(1<<6))
#define | QEI_INTSTAT_POS1_Int ((uint32_t)(1<<7))
#define | QEI_INTSTAT_POS2_Int ((uint32_t)(1<<8))
#define | QEI_INTSTAT_REV_Int ((uint32_t)(1<<9))
#define | QEI_INTSTAT_POS0REV_Int ((uint32_t)(1<<10))
#define | QEI_INTSTAT_POS1REV_Int ((uint32_t)(1<<11))
#define | QEI_INTSTAT_POS2REV_Int ((uint32_t)(1<<12))
#define | QEI_INTSTAT_BITMASK ((uint32_t)(0x1FFF))
#define | QEI_INTSET_INX_Int ((uint32_t)(1<<0))
#define | QEI_INTSET_TIM_Int ((uint32_t)(1<<1))
#define | QEI_INTSET_VELC_Int ((uint32_t)(1<<2))
#define | QEI_INTSET_DIR_Int ((uint32_t)(1<<3))
#define | QEI_INTSET_ERR_Int ((uint32_t)(1<<4))
#define | QEI_INTSET_ENCLK_Int ((uint32_t)(1<<5))
#define | QEI_INTSET_POS0_Int ((uint32_t)(1<<6))
#define | QEI_INTSET_POS1_Int ((uint32_t)(1<<7))
#define | QEI_INTSET_POS2_Int ((uint32_t)(1<<8))
#define | QEI_INTSET_REV_Int ((uint32_t)(1<<9))
#define | QEI_INTSET_POS0REV_Int ((uint32_t)(1<<10))
#define | QEI_INTSET_POS1REV_Int ((uint32_t)(1<<11))
#define | QEI_INTSET_POS2REV_Int ((uint32_t)(1<<12))
#define | QEI_INTSET_BITMASK ((uint32_t)(0x1FFF))
#define | QEI_INTCLR_INX_Int ((uint32_t)(1<<0))
#define | QEI_INTCLR_TIM_Int ((uint32_t)(1<<1))
#define | QEI_INTCLR_VELC_Int ((uint32_t)(1<<2))
#define | QEI_INTCLR_DIR_Int ((uint32_t)(1<<3))
#define | QEI_INTCLR_ERR_Int ((uint32_t)(1<<4))
#define | QEI_INTCLR_ENCLK_Int ((uint32_t)(1<<5))
#define | QEI_INTCLR_POS0_Int ((uint32_t)(1<<6))
#define | QEI_INTCLR_POS1_Int ((uint32_t)(1<<7))
#define | QEI_INTCLR_POS2_Int ((uint32_t)(1<<8))
#define | QEI_INTCLR_REV_Int ((uint32_t)(1<<9))
#define | QEI_INTCLR_POS0REV_Int ((uint32_t)(1<<10))
#define | QEI_INTCLR_POS1REV_Int ((uint32_t)(1<<11))
#define | QEI_INTCLR_POS2REV_Int ((uint32_t)(1<<12))
#define | QEI_INTCLR_BITMASK ((uint32_t)(0x1FFF))
#define | QEI_INTEN_INX_Int ((uint32_t)(1<<0))
#define | QEI_INTEN_TIM_Int ((uint32_t)(1<<1))
#define | QEI_INTEN_VELC_Int ((uint32_t)(1<<2))
#define | QEI_INTEN_DIR_Int ((uint32_t)(1<<3))
#define | QEI_INTEN_ERR_Int ((uint32_t)(1<<4))
#define | QEI_INTEN_ENCLK_Int ((uint32_t)(1<<5))
#define | QEI_INTEN_POS0_Int ((uint32_t)(1<<6))
#define | QEI_INTEN_POS1_Int ((uint32_t)(1<<7))
#define | QEI_INTEN_POS2_Int ((uint32_t)(1<<8))
#define | QEI_INTEN_REV_Int ((uint32_t)(1<<9))
#define | QEI_INTEN_POS0REV_Int ((uint32_t)(1<<10))
#define | QEI_INTEN_POS1REV_Int ((uint32_t)(1<<11))
#define | QEI_INTEN_POS2REV_Int ((uint32_t)(1<<12))
#define | QEI_INTEN_BITMASK ((uint32_t)(0x1FFF))
#define | QEI_IESET_INX_Int ((uint32_t)(1<<0))
#define | QEI_IESET_TIM_Int ((uint32_t)(1<<1))
#define | QEI_IESET_VELC_Int ((uint32_t)(1<<2))
#define | QEI_IESET_DIR_Int ((uint32_t)(1<<3))
#define | QEI_IESET_ERR_Int ((uint32_t)(1<<4))
#define | QEI_IESET_ENCLK_Int ((uint32_t)(1<<5))
#define | QEI_IESET_POS0_Int ((uint32_t)(1<<6))
#define | QEI_IESET_POS1_Int ((uint32_t)(1<<7))
#define | QEI_IESET_POS2_Int ((uint32_t)(1<<8))
#define | QEI_IESET_REV_Int ((uint32_t)(1<<9))
#define | QEI_IESET_POS0REV_Int ((uint32_t)(1<<10))
#define | QEI_IESET_POS1REV_Int ((uint32_t)(1<<11))
#define | QEI_IESET_POS2REV_Int ((uint32_t)(1<<12))
#define | QEI_IESET_BITMASK ((uint32_t)(0x1FFF))
#define | QEI_IECLR_INX_Int ((uint32_t)(1<<0))
#define | QEI_IECLR_TIM_Int ((uint32_t)(1<<1))
#define | QEI_IECLR_VELC_Int ((uint32_t)(1<<2))
#define | QEI_IECLR_DIR_Int ((uint32_t)(1<<3))
#define | QEI_IECLR_ERR_Int ((uint32_t)(1<<4))
#define | QEI_IECLR_ENCLK_Int ((uint32_t)(1<<5))
#define | QEI_IECLR_POS0_Int ((uint32_t)(1<<6))
#define | QEI_IECLR_POS1_Int ((uint32_t)(1<<7))
#define | QEI_IECLR_POS2_Int ((uint32_t)(1<<8))
#define | QEI_IECLR_REV_Int ((uint32_t)(1<<9))
#define | QEI_IECLR_POS0REV_Int ((uint32_t)(1<<10))
#define | QEI_IECLR_POS1REV_Int ((uint32_t)(1<<11))
#define | QEI_IECLR_POS2REV_Int ((uint32_t)(1<<12))
#define | QEI_IECLR_BITMASK ((uint32_t)(0x1FFF))
#define | PARAM_QEIx(n) ((n==LPC_QEI))
#define | PARAM_QEI_RESET(n)
#define | PARAM_QEI_DIRINV(n) ((n==QEI_DIRINV_NONE) || (n==QEI_DIRINV_CMPL))
#define | PARAM_QEI_SIGNALMODE(n) ((n==QEI_SIGNALMODE_QUAD) || (n==QEI_SIGNALMODE_CLKDIR))
#define | PARAM_QEI_CAPMODE(n) ((n==QEI_CAPMODE_2X) || (n==QEI_CAPMODE_4X))
#define | PARAM_QEI_INVINX(n) ((n==QEI_INVINX_NONE) || (n==QEI_INVINX_EN))
#define | PARAM_QEI_TIMERRELOAD(n) ((n==QEI_TIMERRELOAD_TICKVAL) || (n==QEI_TIMERRELOAD_USVAL))
#define | PARAM_QEI_STATUS(n) ((n==QEI_STATUS_DIR))
#define | PARAM_QEI_COMPPOS_CH(n) ((n==QEI_COMPPOS_CH_0) || (n==QEI_COMPPOS_CH_1) || (n==QEI_COMPPOS_CH_2))
#define | PARAM_QEI_INTFLAG(n)

Functions

void | QEI_Reset (LPC_QEI_TypeDef *QEIx, uint32_t ulResetType)
Resets value for each type of QEI value, such as velocity, counter, position, etc..
void | QEI_Init (LPC_QEI_TypeDef *QEIx, QEI_CFG_Type *QEI_ConfigStruct)
Initializes the QEI peripheral according to the specified parameters in the QEI_ConfigStruct.
void | QEI_ConfigStructInit (QEI_CFG_Type *QIE_InitStruct)
Fills each QIE_InitStruct member with its default value:
  • DirectionInvert = QEI_DIRINV_NONE
  • SignalMode = QEI_SIGNALMODE_QUAD
  • CaptureMode = QEI_CAPMODE_4X
  • InvertIndex = QEI_INVINX_NONE.

void | QEI_DeInit (LPC_QEI_TypeDef *QEIx)
De-initializes the QEI peripheral registers to their default reset values.
FlagStatus | QEI_GetStatus (LPC_QEI_TypeDef *QEIx, uint32_t ulFlagType)
Check whether if specified flag status is set or not.
uint32_t | QEI_GetPosition (LPC_QEI_TypeDef *QEIx)
Get current position value in QEI peripheral.
void | QEI_SetMaxPosition (LPC_QEI_TypeDef *QEIx, uint32_t ulMaxPos)
Set max position value for QEI peripheral.
void | QEI_SetPositionComp (LPC_QEI_TypeDef *QEIx, uint8_t bPosCompCh, uint32_t ulPosComp)
Set position compare value for QEI peripheral.
uint32_t | QEI_GetIndex (LPC_QEI_TypeDef *QEIx)
Get current index counter of QEI peripheral.
void | QEI_SetIndexComp (LPC_QEI_TypeDef *QEIx, uint32_t ulIndexComp)
Set value for index compare in QEI peripheral.
void | QEI_SetTimerReload (LPC_QEI_TypeDef *QEIx, QEI_RELOADCFG_Type *QEIReloadStruct)
Set timer reload value for QEI peripheral. When the velocity timer is over-flow, the value that set for Timer Reload register will be loaded into the velocity timer for next period. The calculated velocity in RPM therefore will be affect by this value.
uint32_t | QEI_GetTimer (LPC_QEI_TypeDef *QEIx)
Get current timer counter in QEI peripheral.
uint32_t | QEI_GetVelocity (LPC_QEI_TypeDef *QEIx)
Get current velocity pulse counter in current time period.
uint32_t | QEI_GetVelocityCap (LPC_QEI_TypeDef *QEIx)
Get the most recently measured velocity of the QEI. When the Velocity timer in QEI is over-flow, the current velocity value will be loaded into Velocity Capture register.
void | QEI_SetVelocityComp (LPC_QEI_TypeDef *QEIx, uint32_t ulVelComp)
Set Velocity Compare value for QEI peripheral.
void | QEI_SetDigiFilter (LPC_QEI_TypeDef *QEIx, uint32_t ulSamplingPulse)
Set value of sampling count for the digital filter in QEI peripheral.
FlagStatus | QEI_GetIntStatus (LPC_QEI_TypeDef *QEIx, uint32_t ulIntType)
Check whether if specified interrupt flag status in QEI peripheral is set or not.
void | QEI_IntCmd (LPC_QEI_TypeDef *QEIx, uint32_t ulIntType, FunctionalState NewState)
Enable/Disable specified interrupt in QEI peripheral.
void | QEI_IntSet (LPC_QEI_TypeDef *QEIx, uint32_t ulIntType)
Sets (forces) specified interrupt in QEI peripheral.
void | QEI_IntClear (LPC_QEI_TypeDef *QEIx, uint32_t ulIntType)
Clear (force) specified interrupt (pending) in QEI peripheral.
uint32_t | QEI_CalculateRPM (LPC_QEI_TypeDef *QEIx, uint32_t ulVelCapValue, uint32_t ulPPR)
Calculates the actual velocity in RPM passed via velocity capture value and Pulse Per Round (of the encoder) value parameter input.

Detailed Description

Contains all macro definitions and function prototypes support for QEI firmware library on LPC17xx.

Version:
2.0
Date:
21. May. 2010
Author:
NXP MCU SW Application Team
Copyright(C) 2010, NXP Semiconductor All rights reserved.

Software that is described herein is for illustrative purposes only which provides customers with programming information regarding the products. This software is supplied "AS IS" without any warranties. NXP Semiconductors assumes no responsibility or liability for the use of the software, conveys no license or title under any patent, copyright, or mask work right to the product. NXP Semiconductors reserves the right to make changes in the software without notification. NXP Semiconductors also make no representation or warranty that such application will be suitable for the specified use without further testing or modification.

Definition in file lpc17xx_qei.h.

Generated on Tue Jun 7 14:59:07 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_rit.h File Reference

C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_rit.h File Reference

Contains all macro definitions and function prototypes support for RIT firmware library on LPC17xx. More...

#include "LPC17xx.h"
#include "lpc_types.h"

Go to the source code of this file.

Defines

#define | RIT_CTRL_INTEN ((uint32_t) (1))
#define | RIT_CTRL_ENCLR ((uint32_t) _BIT(1))
#define | RIT_CTRL_ENBR ((uint32_t) _BIT(2))
#define | RIT_CTRL_TEN ((uint32_t) _BIT(3))
#define | PARAM_RITx(n) (((uint32_t *)n)==((uint32_t *)LPC_RIT))

Functions

void | RIT_Init (LPC_RIT_TypeDef *RITx)
void | RIT_DeInit (LPC_RIT_TypeDef *RITx)
void | RIT_TimerConfig (LPC_RIT_TypeDef *RITx, uint32_t time_interval)
void | RIT_TimerClearCmd (LPC_RIT_TypeDef *RITx, FunctionalState NewState)
void | RIT_Cmd (LPC_RIT_TypeDef *RITx, FunctionalState NewState)
void | RIT_TimerDebugCmd (LPC_RIT_TypeDef *RITx, FunctionalState NewState)
IntStatus | RIT_GetIntStatus (LPC_RIT_TypeDef *RITx)

Detailed Description

Contains all macro definitions and function prototypes support for RIT firmware library on LPC17xx.

Version:
2.0
Date:
21. May. 2010
Author:
NXP MCU SW Application Team
Copyright(C) 2010, NXP Semiconductor All rights reserved.

Software that is described herein is for illustrative purposes only which provides customers with programming information regarding the products. This software is supplied "AS IS" without any warranties. NXP Semiconductors assumes no responsibility or liability for the use of the software, conveys no license or title under any patent, copyright, or mask work right to the product. NXP Semiconductors reserves the right to make changes in the software without notification. NXP Semiconductors also make no representation or warranty that such application will be suitable for the specified use without further testing or modification.

Definition in file lpc17xx_rit.h.

Generated on Tue Jun 7 14:59:07 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_rtc.h File Reference

C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_rtc.h File Reference

Contains all macro definitions and function prototypes support for RTC firmware library on LPC17xx. More...

#include "LPC17xx.h"
#include "lpc_types.h"

Go to the source code of this file.

Data Structures

struct | RTC_TIME_Type
Time structure definitions for easy manipulate the data. More...

Defines

#define | RTC_ILR_BITMASK ((0x00000003))
#define | RTC_IRL_RTCCIF ((1<<0))
#define | RTC_IRL_RTCALF ((1<<1))
#define | RTC_CCR_BITMASK ((0x00000013))
#define | RTC_CCR_CLKEN ((1<<0))
#define | RTC_CCR_CTCRST ((1<<1))
#define | RTC_CCR_CCALEN ((1<<4))
#define | RTC_CIIR_IMSEC ((1<<0))
#define | RTC_CIIR_IMMIN ((1<<1))
#define | RTC_CIIR_IMHOUR ((1<<2))
#define | RTC_CIIR_IMDOM ((1<<3))
#define | RTC_CIIR_IMDOW ((1<<4))
#define | RTC_CIIR_IMDOY ((1<<5))
#define | RTC_CIIR_IMMON ((1<<6))
#define | RTC_CIIR_IMYEAR ((1<<7))
#define | RTC_CIIR_BITMASK ((0xFF))
#define | RTC_AMR_AMRSEC ((1<<0))
#define | RTC_AMR_AMRMIN ((1<<1))
#define | RTC_AMR_AMRHOUR ((1<<2))
#define | RTC_AMR_AMRDOM ((1<<3))
#define | RTC_AMR_AMRDOW ((1<<4))
#define | RTC_AMR_AMRDOY ((1<<5))
#define | RTC_AMR_AMRMON ((1<<6))
#define | RTC_AMR_AMRYEAR ((1<<7))
#define | RTC_AMR_BITMASK ((0xFF))
#define | RTC_AUX_RTC_OSCF ((1<<4))
#define | RTC_AUXEN_RTC_OSCFEN ((1<<4))
#define | RTC_CTIME0_SECONDS_MASK ((0x3F))
#define | RTC_CTIME0_MINUTES_MASK ((0x3F00))
#define | RTC_CTIME0_HOURS_MASK ((0x1F0000))
#define | RTC_CTIME0_DOW_MASK ((0x7000000))
#define | RTC_CTIME1_DOM_MASK ((0x1F))
#define | RTC_CTIME1_MONTH_MASK ((0xF00))
#define | RTC_CTIME1_YEAR_MASK ((0xFFF0000))
#define | RTC_CTIME2_DOY_MASK ((0xFFF))
#define | RTC_SEC_MASK (0x0000003F)
#define | RTC_MIN_MASK (0x0000003F)
#define | RTC_HOUR_MASK (0x0000001F)
#define | RTC_DOM_MASK (0x0000001F)
#define | RTC_DOW_MASK (0x00000007)
#define | RTC_DOY_MASK (0x000001FF)
#define | RTC_MONTH_MASK (0x0000000F)
#define | RTC_YEAR_MASK (0x00000FFF)
#define | RTC_SECOND_MAX 59
#define | RTC_MINUTE_MAX 59
#define | RTC_HOUR_MAX 23
#define | RTC_MONTH_MIN 1
#define | RTC_MONTH_MAX 12
#define | RTC_DAYOFMONTH_MIN 1
#define | RTC_DAYOFMONTH_MAX 31
#define | RTC_DAYOFWEEK_MAX 6
#define | RTC_DAYOFYEAR_MIN 1
#define | RTC_DAYOFYEAR_MAX 366
#define | RTC_YEAR_MAX 4095
#define | RTC_CALIBRATION_CALVAL_MASK ((0x1FFFF))
#define | RTC_CALIBRATION_LIBDIR ((1<<17))
#define | RTC_CALIBRATION_MAX ((0x20000))
#define | RTC_CALIB_DIR_FORWARD ((uint8_t)(0))
#define | RTC_CALIB_DIR_BACKWARD ((uint8_t)(1))
#define | PARAM_RTCx(x) (((uint32_t *)x)==((uint32_t *)LPC_RTC))
#define | PARAM_RTC_INT(n) ((n==RTC_INT_COUNTER_INCREASE) || (n==RTC_INT_ALARM))
#define | PARAM_RTC_TIMETYPE(n)
#define | PARAM_RTC_CALIB_DIR(n) ((n==RTC_CALIB_DIR_FORWARD) || (n==RTC_CALIB_DIR_BACKWARD))
#define | PARAM_RTC_GPREG_CH(n) ((n>=0) && (n<=4))

Enumerations

enum | RTC_INT_OPT { RTC_INT_COUNTER_INCREASE = RTC_IRL_RTCCIF, RTC_INT_ALARM = RTC_IRL_RTCALF }
RTC interrupt source. More...
enum RTC_TIMETYPE_Num {
RTC_TIMETYPE_SECOND = 0, RTC_TIMETYPE_MINUTE = 1, RTC_TIMETYPE_HOUR = 2, RTC_TIMETYPE_DAYOFWEEK = 3,
RTC_TIMETYPE_DAYOFMONTH = 4, RTC_TIMETYPE_DAYOFYEAR = 5, RTC_TIMETYPE_MONTH = 6, RTC_TIMETYPE_YEAR = 7
}
RTC time type option. More...

Functions

void | RTC_Init (LPC_RTC_TypeDef *RTCx)
Initializes the RTC peripheral.
void | RTC_DeInit (LPC_RTC_TypeDef *RTCx)
De-initializes the RTC peripheral registers to their default reset values.
void | RTC_ResetClockTickCounter (LPC_RTC_TypeDef *RTCx)
Reset clock tick counter in RTC peripheral.
void | RTC_Cmd (LPC_RTC_TypeDef *RTCx, FunctionalState NewState)
Start/Stop RTC peripheral.
void | RTC_CntIncrIntConfig (LPC_RTC_TypeDef *RTCx, uint32_t CntIncrIntType, FunctionalState NewState)
Enable/Disable Counter increment interrupt for each time type in RTC peripheral.
void | RTC_AlarmIntConfig (LPC_RTC_TypeDef *RTCx, uint32_t AlarmTimeType, FunctionalState NewState)
Enable/Disable Alarm interrupt for each time type in RTC peripheral.
void | RTC_SetTime (LPC_RTC_TypeDef *RTCx, uint32_t Timetype, uint32_t TimeValue)
Set current time value for each time type in RTC peripheral.
uint32_t | RTC_GetTime (LPC_RTC_TypeDef *RTCx, uint32_t Timetype)
Get current time value for each type time type.
void | RTC_SetFullTime (LPC_RTC_TypeDef *RTCx, RTC_TIME_Type *pFullTime)
Set full of time in RTC peripheral.
void | RTC_GetFullTime (LPC_RTC_TypeDef *RTCx, RTC_TIME_Type *pFullTime)
Get full of time in RTC peripheral.
void | RTC_SetAlarmTime (LPC_RTC_TypeDef *RTCx, uint32_t Timetype, uint32_t ALValue)
Set alarm time value for each time type.
uint32_t | RTC_GetAlarmTime (LPC_RTC_TypeDef *RTCx, uint32_t Timetype)
Get alarm time value for each time type.
void | RTC_SetFullAlarmTime (LPC_RTC_TypeDef *RTCx, RTC_TIME_Type *pFullTime)
Set full of alarm time in RTC peripheral.
void | RTC_GetFullAlarmTime (LPC_RTC_TypeDef *RTCx, RTC_TIME_Type *pFullTime)
Get full of alarm time in RTC peripheral.
IntStatus | RTC_GetIntPending (LPC_RTC_TypeDef *RTCx, uint32_t IntType)
Check whether if specified Location interrupt in RTC peripheral is set or not.
void | RTC_ClearIntPending (LPC_RTC_TypeDef *RTCx, uint32_t IntType)
Clear specified Location interrupt pending in RTC peripheral.
void | RTC_CalibCounterCmd (LPC_RTC_TypeDef *RTCx, FunctionalState NewState)
Enable/Disable calibration counter in RTC peripheral.
void | RTC_CalibConfig (LPC_RTC_TypeDef *RTCx, uint32_t CalibValue, uint8_t CalibDir)
Configures Calibration in RTC peripheral.
void | RTC_WriteGPREG (LPC_RTC_TypeDef *RTCx, uint8_t Channel, uint32_t Value)
Write value to General purpose registers.
uint32_t | RTC_ReadGPREG (LPC_RTC_TypeDef *RTCx, uint8_t Channel)
Read value from General purpose registers.

Detailed Description

Contains all macro definitions and function prototypes support for RTC firmware library on LPC17xx.

Version:
2.0
Date:
21. May. 2010
Author:
NXP MCU SW Application Team
Copyright(C) 2010, NXP Semiconductor All rights reserved.

Software that is described herein is for illustrative purposes only which provides customers with programming information regarding the products. This software is supplied "AS IS" without any warranties. NXP Semiconductors assumes no responsibility or liability for the use of the software, conveys no license or title under any patent, copyright, or mask work right to the product. NXP Semiconductors reserves the right to make changes in the software without notification. NXP Semiconductors also make no representation or warranty that such application will be suitable for the specified use without further testing or modification.

Definition in file lpc17xx_rtc.h.

Generated on Tue Jun 7 14:59:07 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_spi.h File Reference

C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_spi.h File Reference

Contains all macro definitions and function prototypes support for SPI firmware library on LPC17xx. More...

#include "LPC17xx.h"
#include "lpc_types.h"

Go to the source code of this file.

Data Structures

struct | SPI_CFG_Type
SPI configuration structure. More...
struct | SPI_DATA_SETUP_Type
SPI Data configuration structure definitions. More...

Defines

#define | SPI_CPHA_FIRST ((uint32_t)(0))
#define | SPI_CPHA_SECOND ((uint32_t)(1<<3))
#define | SPI_CPOL_HI ((uint32_t)(0))
#define | SPI_CPOL_LO ((uint32_t)(1<<4))
#define | SPI_SLAVE_MODE ((uint32_t)(0))
#define | SPI_MASTER_MODE ((uint32_t)(1<<5))
#define | SPI_DATA_MSB_FIRST ((uint32_t)(0))
#define | SPI_DATA_LSB_FIRST ((uint32_t)(1<<6))
#define | SPI_DATABIT_16 SPI_SPCR_BITS(0)
#define | SPI_DATABIT_8 SPI_SPCR_BITS(0x08)
#define | SPI_DATABIT_9 SPI_SPCR_BITS(0x09)
#define | SPI_DATABIT_10 SPI_SPCR_BITS(0x0A)
#define | SPI_DATABIT_11 SPI_SPCR_BITS(0x0B)
#define | SPI_DATABIT_12 SPI_SPCR_BITS(0x0C)
#define | SPI_DATABIT_13 SPI_SPCR_BITS(0x0D)
#define | SPI_DATABIT_14 SPI_SPCR_BITS(0x0E)
#define | SPI_DATABIT_15 SPI_SPCR_BITS(0x0F)
#define | SPI_STAT_ABRT SPI_SPSR_ABRT
#define | SPI_STAT_MODF SPI_SPSR_MODF
#define | SPI_STAT_ROVR SPI_SPSR_ROVR
#define | SPI_STAT_WCOL SPI_SPSR_WCOL
#define | SPI_STAT_SPIF SPI_SPSR_SPIF
#define | SPI_STAT_DONE (1UL<<8)
#define | SPI_STAT_ERROR (1UL<<9)
#define | SPI_SPCR_BIT_EN ((uint32_t)(1<<2))
#define | SPI_SPCR_CPHA_SECOND ((uint32_t)(1<<3))
#define | SPI_SPCR_CPOL_LOW ((uint32_t)(1<<4))
#define | SPI_SPCR_MSTR ((uint32_t)(1<<5))
#define | SPI_SPCR_LSBF ((uint32_t)(1<<6))
#define | SPI_SPCR_SPIE ((uint32_t)(1<<7))
#define | SPI_SPCR_BITS(n) ((n==0) ? ((uint32_t)0) : ((uint32_t)((n&0x0F)<<8)))
#define | SPI_SPCR_BITMASK ((uint32_t)(0xFFC))
#define | SPI_SPSR_ABRT ((uint32_t)(1<<3))
#define | SPI_SPSR_MODF ((uint32_t)(1<<4))
#define | SPI_SPSR_ROVR ((uint32_t)(1<<5))
#define | SPI_SPSR_WCOL ((uint32_t)(1<<6))
#define | SPI_SPSR_SPIF ((uint32_t)(1<<7))
#define | SPI_SPSR_BITMASK ((uint32_t)(0xF8))
#define | SPI_SPDR_LO_MASK ((uint32_t)(0xFF))
#define | SPI_SPDR_HI_MASK ((uint32_t)(0xFF00))
#define | SPI_SPDR_BITMASK ((uint32_t)(0xFFFF))
#define | SPI_SPCCR_COUNTER(n) ((uint32_t)(n&0xFF))
#define | SPI_SPCCR_BITMASK ((uint32_t)(0xFF))
#define | SPI_SPTCR_TEST_MASK ((uint32_t)(0xFE))
#define | SPI_SPTCR_BITMASK ((uint32_t)(0xFE))
#define | SPI_SPTSR_ABRT ((uint32_t)(1<<3))
#define | SPI_SPTSR_MODF ((uint32_t)(1<<4))
#define | SPI_SPTSR_ROVR ((uint32_t)(1<<5))
#define | SPI_SPTSR_WCOL ((uint32_t)(1<<6))
#define | SPI_SPTSR_SPIF ((uint32_t)(1<<7))
#define | SPI_SPTSR_MASKBIT ((uint32_t)(0xF8))
#define | SPI_SPINT_INTFLAG ((uint32_t)(1<<0))
#define | SPI_SPINT_BITMASK ((uint32_t)(0x01))
#define | PARAM_SPIx(n) (((uint32_t *)n)==((uint32_t *)LPC_SPI))
#define | PARAM_SPI_CPHA(n) ((n==SPI_CPHA_FIRST) || (n==SPI_CPHA_SECOND))
#define | PARAM_SPI_CPOL(n) ((n==SPI_CPOL_HI) || (n==SPI_CPOL_LO))
#define | PARAM_SPI_MODE(n) ((n==SPI_SLAVE_MODE) || (n==SPI_MASTER_MODE))
#define | PARAM_SPI_DATA_ORDER(n) ((n==SPI_DATA_MSB_FIRST) || (n==SPI_DATA_LSB_FIRST))
#define | PARAM_SPI_DATABIT(n)
#define | PARAM_SPI_STAT(n)

Enumerations

enum | SPI_TRANSFER_Type { SPI_TRANSFER_POLLING = 0, SPI_TRANSFER_INTERRUPT }
SPI Transfer Type definitions. More...

Functions

void | SPI_Init (LPC_SPI_TypeDef *SPIx, SPI_CFG_Type *SPI_ConfigStruct)
Initializes the SPIx peripheral according to the specified parameters in the UART_ConfigStruct.
void | SPI_DeInit (LPC_SPI_TypeDef *SPIx)
De-initializes the SPIx peripheral registers to their default reset values.
void | SPI_SetClock (LPC_SPI_TypeDef *SPIx, uint32_t target_clock)
Setup clock rate for SPI device.
void | SPI_ConfigStructInit (SPI_CFG_Type *SPI_InitStruct)
Fills each SPI_InitStruct member with its default value:
  • CPHA = SPI_CPHA_FIRST
  • CPOL = SPI_CPOL_HI
  • ClockRate = 1000000
  • DataOrder = SPI_DATA_MSB_FIRST
  • Databit = SPI_DATABIT_8
  • Mode = SPI_MASTER_MODE.

void | SPI_SendData (LPC_SPI_TypeDef *SPIx, uint16_t Data)
Transmit a single data through SPIx peripheral.
uint16_t | SPI_ReceiveData (LPC_SPI_TypeDef *SPIx)
Receive a single data from SPIx peripheral.
int32_t | SPI_ReadWrite (LPC_SPI_TypeDef *SPIx, SPI_DATA_SETUP_Type *dataCfg, SPI_TRANSFER_Type xfType)
SPI Read write data function.
void | SPI_IntCmd (LPC_SPI_TypeDef *SPIx, FunctionalState NewState)
Enable or disable SPIx interrupt.
IntStatus | SPI_GetIntStatus (LPC_SPI_TypeDef *SPIx)
Checks whether the SPI interrupt flag is set or not.
void | SPI_ClearIntPending (LPC_SPI_TypeDef *SPIx)
Clear SPI interrupt flag.
uint8_t | SPI_GetDataSize (LPC_SPI_TypeDef *SPIx)
Get data bit size per transfer.
uint32_t | SPI_GetStatus (LPC_SPI_TypeDef *SPIx)
Get current value of SPI Status register in SPIx peripheral.
FlagStatus | SPI_CheckStatus (uint32_t inputSPIStatus, uint8_t SPIStatus)
Checks whether the specified SPI Status flag is set or not via inputSPIStatus parameter.

Detailed Description

Contains all macro definitions and function prototypes support for SPI firmware library on LPC17xx.

Version:
2.0
Date:
21. May. 2010
Author:
NXP MCU SW Application Team
Copyright(C) 2010, NXP Semiconductor All rights reserved.

Software that is described herein is for illustrative purposes only which provides customers with programming information regarding the products. This software is supplied "AS IS" without any warranties. NXP Semiconductors assumes no responsibility or liability for the use of the software, conveys no license or title under any patent, copyright, or mask work right to the product. NXP Semiconductors reserves the right to make changes in the software without notification. NXP Semiconductors also make no representation or warranty that such application will be suitable for the specified use without further testing or modification.

Definition in file lpc17xx_spi.h.

Generated on Tue Jun 7 14:59:07 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_ssp.h File Reference

C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_ssp.h File Reference

Contains all macro definitions and function prototypes support for SSP firmware library on LPC17xx. More...

#include "LPC17xx.h"
#include "lpc_types.h"

Go to the source code of this file.

Data Structures

struct | SSP_CFG_Type
SSP configuration structure. More...
struct | SSP_DATA_SETUP_Type
SPI Data configuration structure definitions. More...

Defines

#define | SSP_CPHA_FIRST ((uint32_t)(0))
#define | SSP_CPHA_SECOND SSP_CR0_CPHA_SECOND
#define | SSP_CPOL_HI ((uint32_t)(0))
#define | SSP_CPOL_LO SSP_CR0_CPOL_HI
#define | SSP_SLAVE_MODE SSP_CR1_SLAVE_EN
#define | SSP_MASTER_MODE ((uint32_t)(0))
#define | SSP_DATABIT_4 SSP_CR0_DSS(4)
#define | SSP_DATABIT_5 SSP_CR0_DSS(5)
#define | SSP_DATABIT_6 SSP_CR0_DSS(6)
#define | SSP_DATABIT_7 SSP_CR0_DSS(7)
#define | SSP_DATABIT_8 SSP_CR0_DSS(8)
#define | SSP_DATABIT_9 SSP_CR0_DSS(9)
#define | SSP_DATABIT_10 SSP_CR0_DSS(10)
#define | SSP_DATABIT_11 SSP_CR0_DSS(11)
#define | SSP_DATABIT_12 SSP_CR0_DSS(12)
#define | SSP_DATABIT_13 SSP_CR0_DSS(13)
#define | SSP_DATABIT_14 SSP_CR0_DSS(14)
#define | SSP_DATABIT_15 SSP_CR0_DSS(15)
#define | SSP_DATABIT_16 SSP_CR0_DSS(16)
#define | SSP_FRAME_SPI SSP_CR0_FRF_SPI
#define | SSP_FRAME_TI SSP_CR0_FRF_TI
#define | SSP_FRAME_MICROWIRE SSP_CR0_FRF_MICROWIRE
#define | SSP_STAT_TXFIFO_EMPTY SSP_SR_TFE
#define | SSP_STAT_TXFIFO_NOTFULL SSP_SR_TNF
#define | SSP_STAT_RXFIFO_NOTEMPTY SSP_SR_RNE
#define | SSP_STAT_RXFIFO_FULL SSP_SR_RFF
#define | SSP_STAT_BUSY SSP_SR_BSY
#define | SSP_INTCFG_ROR SSP_IMSC_ROR
#define | SSP_INTCFG_RT SSP_IMSC_RT
#define | SSP_INTCFG_RX SSP_IMSC_RX
#define | SSP_INTCFG_TX SSP_IMSC_TX
#define | SSP_INTSTAT_ROR SSP_MIS_ROR
#define | SSP_INTSTAT_RT SSP_MIS_RT
#define | SSP_INTSTAT_RX SSP_MIS_RX
#define | SSP_INTSTAT_TX SSP_MIS_TX
#define | SSP_INTSTAT_RAW_ROR SSP_RIS_ROR
#define | SSP_INTSTAT_RAW_RT SSP_RIS_RT
#define | SSP_INTSTAT_RAW_RX SSP_RIS_RX
#define | SSP_INTSTAT_RAW_TX SSP_RIS_TX
#define | SSP_INTCLR_ROR SSP_ICR_ROR
#define | SSP_INTCLR_RT SSP_ICR_RT
#define | SSP_DMA_RX SSP_DMA_RXDMA_EN
#define | SSP_DMA_TX SSP_DMA_TXDMA_EN
#define | SSP_STAT_DONE (1UL<<8)
#define | SSP_STAT_ERROR (1UL<<9)
#define | SSP_CR0_DSS(n) ((uint32_t)((n-1)&0xF))
#define | SSP_CR0_FRF_SPI ((uint32_t)(0<<4))
#define | SSP_CR0_FRF_TI ((uint32_t)(1<<4))
#define | SSP_CR0_FRF_MICROWIRE ((uint32_t)(2<<4))
#define | SSP_CR0_CPOL_HI ((uint32_t)(1<<6))
#define | SSP_CR0_CPHA_SECOND ((uint32_t)(1<<7))
#define | SSP_CR0_SCR(n) ((uint32_t)((n&0xFF)<<8))
#define | SSP_CR0_BITMASK ((uint32_t)(0xFFFF))
#define | SSP_CR1_LBM_EN ((uint32_t)(1<<0))
#define | SSP_CR1_SSP_EN ((uint32_t)(1<<1))
#define | SSP_CR1_SLAVE_EN ((uint32_t)(1<<2))
#define | SSP_CR1_SO_DISABLE ((uint32_t)(1<<3))
#define | SSP_CR1_BITMASK ((uint32_t)(0x0F))
#define | SSP_DR_BITMASK(n) ((n)&0xFFFF)
#define | SSP_SR_TFE ((uint32_t)(1<<0))
#define | SSP_SR_TNF ((uint32_t)(1<<1))
#define | SSP_SR_RNE ((uint32_t)(1<<2))
#define | SSP_SR_RFF ((uint32_t)(1<<3))
#define | SSP_SR_BSY ((uint32_t)(1<<4))
#define | SSP_SR_BITMASK ((uint32_t)(0x1F))
#define | SSP_CPSR_CPDVSR(n) ((uint32_t)(n&0xFF))
#define | SSP_CPSR_BITMASK ((uint32_t)(0xFF))
#define | SSP_IMSC_ROR ((uint32_t)(1<<0))
#define | SSP_IMSC_RT ((uint32_t)(1<<1))
#define | SSP_IMSC_RX ((uint32_t)(1<<2))
#define | SSP_IMSC_TX ((uint32_t)(1<<3))
#define | SSP_IMSC_BITMASK ((uint32_t)(0x0F))
#define | SSP_RIS_ROR ((uint32_t)(1<<0))
#define | SSP_RIS_RT ((uint32_t)(1<<1))
#define | SSP_RIS_RX ((uint32_t)(1<<2))
#define | SSP_RIS_TX ((uint32_t)(1<<3))
#define | SSP_RIS_BITMASK ((uint32_t)(0x0F))
#define | SSP_MIS_ROR ((uint32_t)(1<<0))
#define | SSP_MIS_RT ((uint32_t)(1<<1))
#define | SSP_MIS_RX ((uint32_t)(1<<2))
#define | SSP_MIS_TX ((uint32_t)(1<<3))
#define | SSP_MIS_BITMASK ((uint32_t)(0x0F))
#define | SSP_ICR_ROR ((uint32_t)(1<<0))
#define | SSP_ICR_RT ((uint32_t)(1<<1))
#define | SSP_ICR_BITMASK ((uint32_t)(0x03))
#define | SSP_DMA_RXDMA_EN ((uint32_t)(1<<0))
#define | SSP_DMA_TXDMA_EN ((uint32_t)(1<<1))
#define | SSP_DMA_BITMASK ((uint32_t)(0x03))
#define | PARAM_SSPx(n)
#define | PARAM_SSP_CPHA(n) ((n==SSP_CPHA_FIRST) || (n==SSP_CPHA_SECOND))
#define | PARAM_SSP_CPOL(n) ((n==SSP_CPOL_HI) || (n==SSP_CPOL_LO))
#define | PARAM_SSP_MODE(n) ((n==SSP_SLAVE_MODE) || (n==SSP_MASTER_MODE))
#define | PARAM_SSP_DATABIT(n)
#define | PARAM_SSP_FRAME(n)
#define | PARAM_SSP_STAT(n)
#define | PARAM_SSP_INTCFG(n)
#define | PARAM_SSP_INTSTAT(n)
#define | PARAM_SSP_INTSTAT_RAW(n)
#define | PARAM_SSP_INTCLR(n) ((n==SSP_INTCLR_ROR) || (n==SSP_INTCLR_RT))
#define | PARAM_SSP_DMA(n) ((n==SSP_DMA_TX) || (n==SSP_DMA_RX))

Enumerations

enum | SSP_TRANSFER_Type { SSP_TRANSFER_POLLING = 0, SSP_TRANSFER_INTERRUPT }
SSP Transfer Type definitions. More...

Functions

void | SSP_Init (LPC_SSP_TypeDef *SSPx, SSP_CFG_Type *SSP_ConfigStruct)
Initializes the SSPx peripheral according to the specified parameters in the SSP_ConfigStruct.
void | SSP_DeInit (LPC_SSP_TypeDef *SSPx)
De-initializes the SSPx peripheral registers to their default reset values.
void | SSP_ConfigStructInit (SSP_CFG_Type *SSP_InitStruct)
Fills each SSP_InitStruct member with its default value:
  • CPHA = SSP_CPHA_FIRST
  • CPOL = SSP_CPOL_HI
  • ClockRate = 1000000
  • Databit = SSP_DATABIT_8
  • Mode = SSP_MASTER_MODE
  • FrameFormat = SSP_FRAME_SSP.

void | SSP_Cmd (LPC_SSP_TypeDef *SSPx, FunctionalState NewState)
Enable or disable SSP peripheral's operation.
void | SSP_LoopBackCmd (LPC_SSP_TypeDef *SSPx, FunctionalState NewState)
Enable or disable Loop Back mode function in SSP peripheral.
void | SSP_SlaveOutputCmd (LPC_SSP_TypeDef *SSPx, FunctionalState NewState)
Enable or disable Slave Output function in SSP peripheral.
void | SSP_DMACmd (LPC_SSP_TypeDef *SSPx, uint32_t DMAMode, FunctionalState NewState)
Enable/Disable DMA function for SSP peripheral.
FlagStatus | SSP_GetStatus (LPC_SSP_TypeDef *SSPx, uint32_t FlagType)
Checks whether the specified SSP status flag is set or not.
uint8_t | SSP_GetDataSize (LPC_SSP_TypeDef *SSPx)
Get data size bit selected.
IntStatus | SSP_GetRawIntStatus (LPC_SSP_TypeDef *SSPx, uint32_t RawIntType)
Check whether the specified Raw interrupt status flag is set or not.
uint32_t | SSP_GetRawIntStatusReg (LPC_SSP_TypeDef *SSPx)
Get Raw Interrupt Status register.
IntStatus | SSP_GetIntStatus (LPC_SSP_TypeDef *SSPx, uint32_t IntType)
Check whether the specified interrupt status flag is set or not.
void | SSP_SendData (LPC_SSP_TypeDef *SSPx, uint16_t Data)
Transmit a single data through SSPx peripheral.
uint16_t | SSP_ReceiveData (LPC_SSP_TypeDef *SSPx)
Receive a single data from SSPx peripheral.
int32_t | SSP_ReadWrite (LPC_SSP_TypeDef *SSPx, SSP_DATA_SETUP_Type *dataCfg, SSP_TRANSFER_Type xfType)
SSP Read write data function.
void | SSP_IntConfig (LPC_SSP_TypeDef *SSPx, uint32_t IntType, FunctionalState NewState)
Enable or disable specified interrupt type in SSP peripheral.
void | SSP_ClearIntPending (LPC_SSP_TypeDef *SSPx, uint32_t IntType)
Clear specified interrupt pending in SSP peripheral.

Detailed Description

Contains all macro definitions and function prototypes support for SSP firmware library on LPC17xx.

Version:
3.0
Date:
18. June. 2010
Author:
NXP MCU SW Application Team
Copyright(C) 2010, NXP Semiconductor All rights reserved.

Software that is described herein is for illustrative purposes only which provides customers with programming information regarding the products. This software is supplied "AS IS" without any warranties. NXP Semiconductors assumes no responsibility or liability for the use of the software, conveys no license or title under any patent, copyright, or mask work right to the product. NXP Semiconductors reserves the right to make changes in the software without notification. NXP Semiconductors also make no representation or warranty that such application will be suitable for the specified use without further testing or modification.

Definition in file lpc17xx_ssp.h.

Generated on Tue Jun 7 14:59:07 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_systick.h File Reference

C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_systick.h File Reference

Contains all macro definitions and function prototypes support for SYSTICK firmware library on LPC17xx. More...

#include "LPC17xx.h"
#include "lpc_types.h"

Go to the source code of this file.

Defines

#define | ST_CTRL_ENABLE ((uint32_t)(1<<0))
#define | ST_CTRL_TICKINT ((uint32_t)(1<<1))
#define | ST_CTRL_CLKSOURCE ((uint32_t)(1<<2))
#define | ST_CTRL_COUNTFLAG ((uint32_t)(1<<16))
#define | ST_RELOAD_RELOAD(n) ((uint32_t)(n & 0x00FFFFFF))
#define | ST_RELOAD_CURRENT(n) ((uint32_t)(n & 0x00FFFFFF))
#define | ST_CALIB_TENMS(n) ((uint32_t)(n & 0x00FFFFFF))
#define | ST_CALIB_SKEW ((uint32_t)(1<<30))
#define | ST_CALIB_NOREF ((uint32_t)(1<<31))
#define | CLKSOURCE_EXT ((uint32_t)(0))
#define | CLKSOURCE_CPU ((uint32_t)(1))

Functions

void | SYSTICK_InternalInit (uint32_t time)
Initial System Tick with using internal CPU clock source.
void | SYSTICK_ExternalInit (uint32_t freq, uint32_t time)
Initial System Tick with using external clock source.
void | SYSTICK_Cmd (FunctionalState NewState)
Enable/disable System Tick counter.
void | SYSTICK_IntCmd (FunctionalState NewState)
Enable/disable System Tick interrupt.
uint32_t | SYSTICK_GetCurrentValue (void)
Get current value of System Tick counter.
void | SYSTICK_ClearCounterFlag (void)
Clear Counter flag.

Detailed Description

Contains all macro definitions and function prototypes support for SYSTICK firmware library on LPC17xx.

Version:
2.0
Date:
21. May. 2010
Author:
NXP MCU SW Application Team
Copyright(C) 2010, NXP Semiconductor All rights reserved.

Software that is described herein is for illustrative purposes only which provides customers with programming information regarding the products. This software is supplied "AS IS" without any warranties. NXP Semiconductors assumes no responsibility or liability for the use of the software, conveys no license or title under any patent, copyright, or mask work right to the product. NXP Semiconductors reserves the right to make changes in the software without notification. NXP Semiconductors also make no representation or warranty that such application will be suitable for the specified use without further testing or modification.

Definition in file lpc17xx_systick.h.

Generated on Tue Jun 7 14:59:08 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_timer.h File Reference

C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_timer.h File Reference

Contains all macro definitions and function prototypes support for Timer firmware library on LPC17xx. More...

#include "LPC17xx.h"
#include "lpc_types.h"

Go to the source code of this file.

Data Structures

struct | TIM_TIMERCFG_Type
Configuration structure in TIMER mode. More...
struct | TIM_COUNTERCFG_Type
Configuration structure in COUNTER mode. More...
struct | TIM_MATCHCFG_Type
Match channel configuration structure. More...
struct | TIM_CAPTURECFG_Type
Capture Input configuration structure. More...

Defines

#define | TIM_IR_CLR(n) _BIT(n)
#define | TIM_MATCH_INT(n) (_BIT(n & 0x0F))
#define | TIM_CAP_INT(n) (_BIT(((n & 0x0F) + 4)))
#define | TIM_ENABLE ((uint32_t)(1<<0))
#define | TIM_RESET ((uint32_t)(1<<1))
#define | TIM_TCR_MASKBIT ((uint32_t)(3))
#define | TIM_INT_ON_MATCH(n) (_BIT((n * 3)))
#define | TIM_RESET_ON_MATCH(n) (_BIT(((n * 3) + 1)))
#define | TIM_STOP_ON_MATCH(n) (_BIT(((n * 3) + 2)))
#define | TIM_MCR_MASKBIT ((uint32_t)(0x0FFF))
#define | TIM_MCR_CHANNEL_MASKBIT(n) ((uint32_t)(7<<(n*3)))
#define | TIM_CAP_RISING(n) (_BIT((n * 3)))
#define | TIM_CAP_FALLING(n) (_BIT(((n * 3) + 1)))
#define | TIM_INT_ON_CAP(n) (_BIT(((n * 3) + 2)))
#define | TIM_EDGE_MASK(n) (_SBF((n * 3), 0x03))
#define | TIM_CCR_MASKBIT ((uint32_t)(0x3F))
#define | TIM_CCR_CHANNEL_MASKBIT(n) ((uint32_t)(7<<(n*3)))
#define | TIM_EM(n) _BIT(n)
#define | TIM_EM_NOTHING ((uint8_t)(0x0))
#define | TIM_EM_LOW ((uint8_t)(0x1))
#define | TIM_EM_HIGH ((uint8_t)(0x2))
#define | TIM_EM_TOGGLE ((uint8_t)(0x3))
#define | TIM_EM_SET(n, s) (_SBF(((n << 1) + 4), (s & 0x03)))
#define | TIM_EM_MASK(n) (_SBF(((n << 1) + 4), 0x03))
#define | TIM_EMR_MASKBIT 0x0FFF
#define | TIM_CTCR_MODE_MASK 0x3
#define | TIM_CTCR_INPUT_MASK 0xC
#define | TIM_CTCR_MASKBIT 0xF
#define | TIM_COUNTER_MODE ((uint8_t)(1))
#define | PARAM_TIMx(n)
#define | PARAM_TIM_INT_TYPE(TYPE)
#define | PARAM_TIM_MODE_OPT(MODE)
#define | PARAM_TIM_PRESCALE_OPT(OPT) ((OPT == TIM_PRESCALE_TICKVAL)||(OPT == TIM_PRESCALE_USVAL))
#define | PARAM_TIM_COUNTER_INPUT_OPT(OPT) ((OPT == TIM_COUNTER_INCAP0)||(OPT == TIM_COUNTER_INCAP1))
#define | PARAM_TIM_EXTMATCH_OPT(OPT)
#define | PARAM_TIM_CAP_MODE_OPT(OPT)

Enumerations

enum TIM_INT_TYPE {
TIM_MR0_INT = 0, TIM_MR1_INT = 1, TIM_MR2_INT = 2, TIM_MR3_INT = 3,
TIM_CR0_INT = 4, TIM_CR1_INT = 5
}
interrupt type More...
enum | TIM_MODE_OPT { TIM_TIMER_MODE = 0, TIM_COUNTER_RISING_MODE, TIM_COUNTER_FALLING_MODE, TIM_COUNTER_ANY_MODE }
Timer/counter operating mode. More...
enum | TIM_PRESCALE_OPT { TIM_PRESCALE_TICKVAL = 0, TIM_PRESCALE_USVAL }
Timer/Counter prescale option. More...
enum | TIM_COUNTER_INPUT_OPT { TIM_COUNTER_INCAP0 = 0, TIM_COUNTER_INCAP1 }
Counter input option. More...
enum | TIM_EXTMATCH_OPT { TIM_EXTMATCH_NOTHING = 0, TIM_EXTMATCH_LOW, TIM_EXTMATCH_HIGH, TIM_EXTMATCH_TOGGLE }
Timer/Counter external match option. More...
enum | TIM_CAP_MODE_OPT { TIM_CAPTURE_NONE = 0, TIM_CAPTURE_RISING, TIM_CAPTURE_FALLING, TIM_CAPTURE_ANY }
Timer/counter capture mode options. More...

Functions

void | TIM_Init (LPC_TIM_TypeDef *TIMx, TIM_MODE_OPT TimerCounterMode, void *TIM_ConfigStruct)
Initial Timer/Counter device Set Clock frequency for Timer Set initial configuration for Timer.
void | TIM_DeInit (LPC_TIM_TypeDef *TIMx)
Close Timer/Counter device.
void | TIM_ClearIntPending (LPC_TIM_TypeDef *TIMx, TIM_INT_TYPE IntFlag)
Clear Interrupt pending.
void | TIM_ClearIntCapturePending (LPC_TIM_TypeDef *TIMx, TIM_INT_TYPE IntFlag)
Clear Capture Interrupt pending.
FlagStatus | TIM_GetIntStatus (LPC_TIM_TypeDef *TIMx, TIM_INT_TYPE IntFlag)
Get Interrupt Status.
FlagStatus | TIM_GetIntCaptureStatus (LPC_TIM_TypeDef *TIMx, TIM_INT_TYPE IntFlag)
Get Capture Interrupt Status.
void | TIM_ConfigStructInit (TIM_MODE_OPT TimerCounterMode, void *TIM_ConfigStruct)
Configuration for Timer at initial time.
void | TIM_ConfigMatch (LPC_TIM_TypeDef *TIMx, TIM_MATCHCFG_Type *TIM_MatchConfigStruct)
Configuration for Match register.
void | TIM_UpdateMatchValue (LPC_TIM_TypeDef *TIMx, uint8_t MatchChannel, uint32_t MatchValue)
Update Match value.
void | TIM_SetMatchExt (LPC_TIM_TypeDef *TIMx, TIM_EXTMATCH_OPT ext_match)
void | TIM_ConfigCapture (LPC_TIM_TypeDef *TIMx, TIM_CAPTURECFG_Type *TIM_CaptureConfigStruct)
Configuration for Capture register.
void | TIM_Cmd (LPC_TIM_TypeDef *TIMx, FunctionalState NewState)
Start/Stop Timer/Counter device.
uint32_t | TIM_GetCaptureValue (LPC_TIM_TypeDef *TIMx, TIM_COUNTER_INPUT_OPT CaptureChannel)
Read value of capture register in timer/counter device.
void | TIM_ResetCounter (LPC_TIM_TypeDef *TIMx)
Reset Timer/Counter device, Make TC and PC are synchronously reset on the next positive edge of PCLK.

Detailed Description

Contains all macro definitions and function prototypes support for Timer firmware library on LPC17xx.

Version:
2.0
Date:
21. May. 2010
Author:
NXP MCU SW Application Team
Copyright(C) 2010, NXP Semiconductor All rights reserved.

Software that is described herein is for illustrative purposes only which provides customers with programming information regarding the products. This software is supplied "AS IS" without any warranties. NXP Semiconductors assumes no responsibility or liability for the use of the software, conveys no license or title under any patent, copyright, or mask work right to the product. NXP Semiconductors reserves the right to make changes in the software without notification. NXP Semiconductors also make no representation or warranty that such application will be suitable for the specified use without further testing or modification.

Definition in file lpc17xx_timer.h.

Generated on Tue Jun 7 14:59:08 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_uart.h File Reference

C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_uart.h File Reference

Contains all macro definitions and function prototypes support for UART firmware library on LPC17xx. More...

#include "LPC17xx.h"
#include "lpc_types.h"

Go to the source code of this file.

Data Structures

struct | UART_AB_CFG_Type
Auto Baudrate mode configuration type definition. More...
struct | UART_CFG_Type
UART Configuration Structure definition. More...
struct | UART_FIFO_CFG_Type
UART FIFO Configuration Structure definition. More...
struct | UART1_RS485_CTRLCFG_Type
UART1 Full modem - RS485 Control configuration type. More...

Defines

#define | UART_BLOCKING_TIMEOUT (0xFFFFFFFFUL)
#define | UART_ACCEPTED_BAUDRATE_ERROR (3)
#define | UART_RBR_MASKBIT ((uint8_t)0xFF)
#define | UART_THR_MASKBIT ((uint8_t)0xFF)
#define | UART_LOAD_DLL(div) ((div) & 0xFF)
#define | UART_DLL_MASKBIT ((uint8_t)0xFF)
#define | UART_DLM_MASKBIT ((uint8_t)0xFF)
#define | UART_LOAD_DLM(div) (((div) >> 8) & 0xFF)
#define | UART_IER_RBRINT_EN ((uint32_t)(1<<0))
#define | UART_IER_THREINT_EN ((uint32_t)(1<<1))
#define | UART_IER_RLSINT_EN ((uint32_t)(1<<2))
#define | UART1_IER_MSINT_EN ((uint32_t)(1<<3))
#define | UART1_IER_CTSINT_EN ((uint32_t)(1<<7))
#define | UART_IER_ABEOINT_EN ((uint32_t)(1<<8))
#define | UART_IER_ABTOINT_EN ((uint32_t)(1<<9))
#define | UART_IER_BITMASK ((uint32_t)(0x307))
#define | UART1_IER_BITMASK ((uint32_t)(0x38F))
#define | UART_IIR_INTSTAT_PEND ((uint32_t)(1<<0))
#define | UART_IIR_INTID_RLS ((uint32_t)(3<<1))
#define | UART_IIR_INTID_RDA ((uint32_t)(2<<1))
#define | UART_IIR_INTID_CTI ((uint32_t)(6<<1))
#define | UART_IIR_INTID_THRE ((uint32_t)(1<<1))
#define | UART1_IIR_INTID_MODEM ((uint32_t)(0<<1))
#define | UART_IIR_INTID_MASK ((uint32_t)(7<<1))
#define | UART_IIR_FIFO_EN ((uint32_t)(3<<6))
#define | UART_IIR_ABEO_INT ((uint32_t)(1<<8))
#define | UART_IIR_ABTO_INT ((uint32_t)(1<<9))
#define | UART_IIR_BITMASK ((uint32_t)(0x3CF))
#define | UART_FCR_FIFO_EN ((uint8_t)(1<<0))
#define | UART_FCR_RX_RS ((uint8_t)(1<<1))
#define | UART_FCR_TX_RS ((uint8_t)(1<<2))
#define | UART_FCR_DMAMODE_SEL ((uint8_t)(1<<3))
#define | UART_FCR_TRG_LEV0 ((uint8_t)(0))
#define | UART_FCR_TRG_LEV1 ((uint8_t)(1<<6))
#define | UART_FCR_TRG_LEV2 ((uint8_t)(2<<6))
#define | UART_FCR_TRG_LEV3 ((uint8_t)(3<<6))
#define | UART_FCR_BITMASK ((uint8_t)(0xCF))
#define | UART_TX_FIFO_SIZE (16)
#define | UART_LCR_WLEN5 ((uint8_t)(0))
#define | UART_LCR_WLEN6 ((uint8_t)(1<<0))
#define | UART_LCR_WLEN7 ((uint8_t)(2<<0))
#define | UART_LCR_WLEN8 ((uint8_t)(3<<0))
#define | UART_LCR_STOPBIT_SEL ((uint8_t)(1<<2))
#define | UART_LCR_PARITY_EN ((uint8_t)(1<<3))
#define | UART_LCR_PARITY_ODD ((uint8_t)(0))
#define | UART_LCR_PARITY_EVEN ((uint8_t)(1<<4))
#define | UART_LCR_PARITY_F_1 ((uint8_t)(2<<4))
#define | UART_LCR_PARITY_F_0 ((uint8_t)(3<<4))
#define | UART_LCR_BREAK_EN ((uint8_t)(1<<6))
#define | UART_LCR_DLAB_EN ((uint8_t)(1<<7))
#define | UART_LCR_BITMASK ((uint8_t)(0xFF))
#define | UART1_MCR_DTR_CTRL ((uint8_t)(1<<0))
#define | UART1_MCR_RTS_CTRL ((uint8_t)(1<<1))
#define | UART1_MCR_LOOPB_EN ((uint8_t)(1<<4))
#define | UART1_MCR_AUTO_RTS_EN ((uint8_t)(1<<6))
#define | UART1_MCR_AUTO_CTS_EN ((uint8_t)(1<<7))
#define | UART1_MCR_BITMASK ((uint8_t)(0x0F3))
#define | UART_LSR_RDR ((uint8_t)(1<<0))
#define | UART_LSR_OE ((uint8_t)(1<<1))
#define | UART_LSR_PE ((uint8_t)(1<<2))
#define | UART_LSR_FE ((uint8_t)(1<<3))
#define | UART_LSR_BI ((uint8_t)(1<<4))
#define | UART_LSR_THRE ((uint8_t)(1<<5))
#define | UART_LSR_TEMT ((uint8_t)(1<<6))
#define | UART_LSR_RXFE ((uint8_t)(1<<7))
#define | UART_LSR_BITMASK ((uint8_t)(0xFF))
#define | UART1_MSR_DELTA_CTS ((uint8_t)(1<<0))
#define | UART1_MSR_DELTA_DSR ((uint8_t)(1<<1))
#define | UART1_MSR_LO2HI_RI ((uint8_t)(1<<2))
#define | UART1_MSR_DELTA_DCD ((uint8_t)(1<<3))
#define | UART1_MSR_CTS ((uint8_t)(1<<4))
#define | UART1_MSR_DSR ((uint8_t)(1<<5))
#define | UART1_MSR_RI ((uint8_t)(1<<6))
#define | UART1_MSR_DCD ((uint8_t)(1<<7))
#define | UART1_MSR_BITMASK ((uint8_t)(0xFF))
#define | UART_SCR_BIMASK ((uint8_t)(0xFF))
#define | UART_ACR_START ((uint32_t)(1<<0))
#define | UART_ACR_MODE ((uint32_t)(1<<1))
#define | UART_ACR_AUTO_RESTART ((uint32_t)(1<<2))
#define | UART_ACR_ABEOINT_CLR ((uint32_t)(1<<8))
#define | UART_ACR_ABTOINT_CLR ((uint32_t)(1<<9))
#define | UART_ACR_BITMASK ((uint32_t)(0x307))
#define | UART_ICR_IRDAEN ((uint32_t)(1<<0))
#define | UART_ICR_IRDAINV ((uint32_t)(1<<1))
#define | UART_ICR_FIXPULSE_EN ((uint32_t)(1<<2))
#define | UART_ICR_PULSEDIV(n) ((uint32_t)((n&0x07)<<3))
#define | UART_ICR_BITMASK ((uint32_t)(0x3F))
#define | UART_FDR_DIVADDVAL(n) ((uint32_t)(n&0x0F))
#define | UART_FDR_MULVAL(n) ((uint32_t)((n<<4)&0xF0))
#define | UART_FDR_BITMASK ((uint32_t)(0xFF))
#define | UART_TER_TXEN ((uint8_t)(1<<7))
#define | UART_TER_BITMASK ((uint8_t)(0x80))
#define | UART1_RS485CTRL_NMM_EN ((uint32_t)(1<<0))
#define | UART1_RS485CTRL_RX_DIS ((uint32_t)(1<<1))
#define | UART1_RS485CTRL_AADEN ((uint32_t)(1<<2))
#define | UART1_RS485CTRL_SEL_DTR ((uint32_t)(1<<3))
#define | UART1_RS485CTRL_DCTRL_EN ((uint32_t)(1<<4))
#define | UART1_RS485CTRL_OINV_1 ((uint32_t)(1<<5))
#define | UART1_RS485CTRL_BITMASK ((uint32_t)(0x3F))
#define | UART1_RS485ADRMATCH_BITMASK ((uint8_t)(0xFF))
#define | UART1_RS485DLY_BITMASK ((uint8_t)(0xFF))
#define | UART_FIFOLVL_RXFIFOLVL(n) ((uint32_t)(n&0x0F))
#define | UART_FIFOLVL_TXFIFOLVL(n) ((uint32_t)((n>>8)&0x0F))
#define | UART_FIFOLVL_BITMASK ((uint32_t)(0x0F0F))
#define | PARAM_UART_DATABIT(databit)
#define | PARAM_UART_STOPBIT(stopbit) ((stopbit==UART_STOPBIT_1) || (stopbit==UART_STOPBIT_2))
#define | PARAM_UART_PARITY(parity)
#define | PARAM_UART_FIFO_LEVEL(fifo)
#define | PARAM_UART_INTCFG(IntCfg)
#define | PARAM_UART1_INTCFG(IntCfg) ((IntCfg==UART1_INTCFG_MS) || (IntCfg==UART1_INTCFG_CTS))
#define | PARAM_UART_AUTOBAUD_MODE(ABmode) ((ABmode==UART_AUTOBAUD_MODE0) || (ABmode==UART_AUTOBAUD_MODE1))
#define | PARAM_UART_AUTOBAUD_INTSTAT(ABIntStat)
#define | PARAM_UART_IrDA_PULSEDIV(PulseDiv)
#define | PARAM_UART1_SIGNALSTATE(x) ((x==INACTIVE) || (x==ACTIVE))
#define | PARAM_UART1_MODEM_PIN(x) ((x==UART1_MODEM_PIN_DTR) || (x==UART1_MODEM_PIN_RTS))
#define | PARAM_UART1_MODEM_MODE(x)
#define | PARAM_UART_RS485_DIRCTRL_PIN(x) ((x==UART1_RS485_DIRCTRL_RTS) || (x==UART1_RS485_DIRCTRL_DTR))
#define | PARAM_UARTx(x)
#define | PARAM_UART_IrDA(x) (((uint32_t *)x)==((uint32_t *)LPC_UART3))
#define | PARAM_UART1_MODEM(x) (((uint32_t *)x)==((uint32_t *)LPC_UART1))
#define | PARAM_UART1_RS485_CFG_MATCHADDRVALUE(x) ((x<0xFF))
#define | PARAM_UART1_RS485_CFG_DELAYVALUE(x) ((x<0xFF))

Enumerations

enum | UART_DATABIT_Type { UART_DATABIT_5 = 0, UART_DATABIT_6, UART_DATABIT_7, UART_DATABIT_8 }
UART Databit type definitions. More...
enum | UART_STOPBIT_Type { UART_STOPBIT_1 = (0), UART_STOPBIT_2 }
UART Stop bit type definitions. More...
enum UART_PARITY_Type {
UART_PARITY_NONE = 0, UART_PARITY_ODD, UART_PARITY_EVEN, UART_PARITY_SP_1,
UART_PARITY_SP_0
}
UART Parity type definitions. More...
enum | UART_FITO_LEVEL_Type { UART_FIFO_TRGLEV0 = 0, UART_FIFO_TRGLEV1, UART_FIFO_TRGLEV2, UART_FIFO_TRGLEV3 }
FIFO Level type definitions. More...
enum UART_INT_Type {
UART_INTCFG_RBR = 0, UART_INTCFG_THRE, UART_INTCFG_RLS, UART1_INTCFG_MS,
UART1_INTCFG_CTS, UART_INTCFG_ABEO, UART_INTCFG_ABTO
}
UART Interrupt Type definitions. More...
enum UART_LS_Type {
UART_LINESTAT_RDR = UART_LSR_RDR, UART_LINESTAT_OE = UART_LSR_OE, UART_LINESTAT_PE = UART_LSR_PE, UART_LINESTAT_FE = UART_LSR_FE,
UART_LINESTAT_BI = UART_LSR_BI, UART_LINESTAT_THRE = UART_LSR_THRE, UART_LINESTAT_TEMT = UART_LSR_TEMT, UART_LINESTAT_RXFE = UART_LSR_RXFE
}
UART Line Status Type definition. More...
enum | UART_AB_MODE_Type { UART_AUTOBAUD_MODE0 = 0, UART_AUTOBAUD_MODE1 }
UART Auto-baudrate mode type definition. More...
enum | UART_ABEO_Type { UART_AUTOBAUD_INTSTAT_ABEO = UART_IIR_ABEO_INT, UART_AUTOBAUD_INTSTAT_ABTO = UART_IIR_ABTO_INT }
UART End of Auto-baudrate type definition. More...
enum UART_IrDA_PULSE_Type {
UART_IrDA_PULSEDIV2 = 0, UART_IrDA_PULSEDIV4, UART_IrDA_PULSEDIV8, UART_IrDA_PULSEDIV16,
UART_IrDA_PULSEDIV32, UART_IrDA_PULSEDIV64, UART_IrDA_PULSEDIV128, UART_IrDA_PULSEDIV256
}
enum | UART1_SignalState { INACTIVE = 0, ACTIVE = !INACTIVE }
UART1 Full modem - Signal states definition. More...
enum UART_MODEM_STAT_type {
UART1_MODEM_STAT_DELTA_CTS = UART1_MSR_DELTA_CTS, UART1_MODEM_STAT_DELTA_DSR = UART1_MSR_DELTA_DSR, UART1_MODEM_STAT_LO2HI_RI = UART1_MSR_LO2HI_RI, UART1_MODEM_STAT_DELTA_DCD = UART1_MSR_DELTA_DCD,
UART1_MODEM_STAT_CTS = UART1_MSR_CTS, UART1_MODEM_STAT_DSR = UART1_MSR_DSR, UART1_MODEM_STAT_RI = UART1_MSR_RI, UART1_MODEM_STAT_DCD = UART1_MSR_DCD
}
UART modem status type definition. More...
enum | UART_MODEM_PIN_Type { UART1_MODEM_PIN_DTR = 0, UART1_MODEM_PIN_RTS }
Modem output pin type definition. More...
enum | UART_MODEM_MODE_Type { UART1_MODEM_MODE_LOOPBACK = 0, UART1_MODEM_MODE_AUTO_RTS, UART1_MODEM_MODE_AUTO_CTS }
UART Modem mode type definition. More...
enum | UART_RS485_DIRCTRL_PIN_Type { UART1_RS485_DIRCTRL_RTS = 0, UART1_RS485_DIRCTRL_DTR }
UART Direction Control Pin type definition. More...

Functions

void | UART_Init (LPC_UART_TypeDef *UARTx, UART_CFG_Type *UART_ConfigStruct)
Initializes the UARTx peripheral according to the specified parameters in the UART_ConfigStruct.
void | UART_DeInit (LPC_UART_TypeDef *UARTx)
De-initializes the UARTx peripheral registers to their default reset values.
void | UART_ConfigStructInit (UART_CFG_Type *UART_InitStruct)
Fills each UART_InitStruct member with its default value:
  • 9600 bps
  • 8-bit data
  • 1 Stopbit
  • None Parity.

void | UART_SendByte (LPC_UART_TypeDef *UARTx, uint8_t Data)
Transmit a single data through UART peripheral.
uint8_t | UART_ReceiveByte (LPC_UART_TypeDef *UARTx)
Receive a single data from UART peripheral.
uint32_t | UART_Send (LPC_UART_TypeDef *UARTx, uint8_t *txbuf, uint32_t buflen, TRANSFER_BLOCK_Type flag)
Send a block of data via UART peripheral.
uint32_t | UART_Receive (LPC_UART_TypeDef *UARTx, uint8_t *rxbuf, uint32_t buflen, TRANSFER_BLOCK_Type flag)
Receive a block of data via UART peripheral.
void | UART_FIFOConfig (LPC_UART_TypeDef *UARTx, UART_FIFO_CFG_Type *FIFOCfg)
Configure FIFO function on selected UART peripheral.
void | UART_FIFOConfigStructInit (UART_FIFO_CFG_Type *UART_FIFOInitStruct)
Fills each UART_FIFOInitStruct member with its default value:
  • FIFO_DMAMode = DISABLE
  • FIFO_Level = UART_FIFO_TRGLEV0
  • FIFO_ResetRxBuf = ENABLE
  • FIFO_ResetTxBuf = ENABLE
  • FIFO_State = ENABLE.

uint32_t | UART_GetIntId (LPC_UART_TypeDef *UARTx)
Get Interrupt Identification value.
uint8_t | UART_GetLineStatus (LPC_UART_TypeDef *UARTx)
Get current value of Line Status register in UART peripheral.
void | UART_IntConfig (LPC_UART_TypeDef *UARTx, UART_INT_Type UARTIntCfg, FunctionalState NewState)
Enable or disable specified UART interrupt.
void | UART_TxCmd (LPC_UART_TypeDef *UARTx, FunctionalState NewState)
Enable/Disable transmission on UART TxD pin.
FlagStatus | UART_CheckBusy (LPC_UART_TypeDef *UARTx)
Check whether if UART is busy or not.
void | UART_ForceBreak (LPC_UART_TypeDef *UARTx)
Force BREAK character on UART line, output pin UARTx TXD is forced to logic 0.
void | UART_ABClearIntPending (LPC_UART_TypeDef *UARTx, UART_ABEO_Type ABIntType)
Clear Autobaud Interrupt Pending.
void | UART_ABCmd (LPC_UART_TypeDef *UARTx, UART_AB_CFG_Type *ABConfigStruct, FunctionalState NewState)
Start/Stop Auto Baudrate activity.
void | UART_FullModemForcePinState (LPC_UART1_TypeDef *UARTx, UART_MODEM_PIN_Type Pin, UART1_SignalState NewState)
Force pin DTR/RTS corresponding to given state (Full modem mode).
void | UART_FullModemConfigMode (LPC_UART1_TypeDef *UARTx, UART_MODEM_MODE_Type Mode, FunctionalState NewState)
Configure Full Modem mode for UART peripheral.
uint8_t | UART_FullModemGetStatus (LPC_UART1_TypeDef *UARTx)
Get current status of modem status register.
void | UART_RS485Config (LPC_UART1_TypeDef *UARTx, UART1_RS485_CTRLCFG_Type *RS485ConfigStruct)
Configure UART peripheral in RS485 mode according to the specified parameters in the RS485ConfigStruct.
void | UART_RS485ReceiverCmd (LPC_UART1_TypeDef *UARTx, FunctionalState NewState)
Enable/Disable receiver in RS485 module in UART1.
void | UART_RS485SendSlvAddr (LPC_UART1_TypeDef *UARTx, uint8_t SlvAddr)
Send Slave address frames on RS485 bus.
uint32_t | UART_RS485SendData (LPC_UART1_TypeDef *UARTx, uint8_t *pData, uint32_t size)
Send Data frames on RS485 bus.
void | UART_IrDAInvtInputCmd (LPC_UART_TypeDef *UARTx, FunctionalState NewState)
Enable or disable inverting serial input function of IrDA on UART peripheral.
void | UART_IrDACmd (LPC_UART_TypeDef *UARTx, FunctionalState NewState)
Enable or disable IrDA function on UART peripheral.
void | UART_IrDAPulseDivConfig (LPC_UART_TypeDef *UARTx, UART_IrDA_PULSE_Type PulseDiv)
Configure Pulse divider for IrDA function on UART peripheral.

Detailed Description

Contains all macro definitions and function prototypes support for UART firmware library on LPC17xx.

Version:
3.0
Date:
18. June. 2010
Author:
NXP MCU SW Application Team
Copyright(C) 2010, NXP Semiconductor All rights reserved.

Software that is described herein is for illustrative purposes only which provides customers with programming information regarding the products. This software is supplied "AS IS" without any warranties. NXP Semiconductors assumes no responsibility or liability for the use of the software, conveys no license or title under any patent, copyright, or mask work right to the product. NXP Semiconductors reserves the right to make changes in the software without notification. NXP Semiconductors also make no representation or warranty that such application will be suitable for the specified use without further testing or modification.

Definition in file lpc17xx_uart.h.

Generated on Tue Jun 7 14:59:08 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_wdt.h File Reference

C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_wdt.h File Reference

Contains all macro definitions and function prototypes support for WDT firmware library on LPC17xx. More...

#include "LPC17xx.h"
#include "lpc_types.h"

Go to the source code of this file.

Defines

#define | WDT_WDMOD_WDEN ((uint32_t)(1<<0))
#define | WDT_WDMOD_WDRESET ((uint32_t)(1<<1))
#define | WDT_WDMOD_WDTOF ((uint32_t)(1<<2))
#define | WDT_WDMOD_WDINT ((uint32_t)(1<<3))
#define | WDT_WDMOD(n) ((uint32_t)(1<<1))
#define | WDT_US_INDEX ((uint32_t)(1000000))
#define | WDT_TIMEOUT_MIN ((uint32_t)(0xFF))
#define | WDT_TIMEOUT_MAX ((uint32_t)(0xFFFFFFFF))
#define | WDT_WDMOD_MASK (uint8_t)(0x02)
#define | WDT_WDTC_MASK (uint8_t)(0xFFFFFFFF)
#define | WDT_WDFEED_MASK (uint8_t)(0x000000FF)
#define | WDT_WDCLKSEL_MASK (uint8_t)(0x03)
#define | WDT_WDCLKSEL_RC (uint8_t)(0x00)
#define | WDT_WDCLKSEL_PCLK (uint8_t)(0x01)
#define | WDT_WDCLKSEL_RTC (uint8_t)(0x02)
#define | PARAM_WDT_CLK_OPT(OPTION)
#define | PARAM_WDT_MODE_OPT(OPTION) ((OPTION ==WDT_MODE_INT_ONLY)||(OPTION ==WDT_MODE_RESET))

Enumerations

enum | WDT_CLK_OPT { WDT_CLKSRC_IRC = 0, WDT_CLKSRC_PCLK = 1, WDT_CLKSRC_RTC = 2 }
Clock source option for WDT. More...
enum | WDT_MODE_OPT { WDT_MODE_INT_ONLY = 0, WDT_MODE_RESET = 1 }
WDT operation mode. More...

Functions

void | WDT_Init (WDT_CLK_OPT ClkSrc, WDT_MODE_OPT WDTMode)
Initial for Watchdog function Clock source = RTC ,.
void | WDT_Start (uint32_t TimeOut)
Start WDT activity with given timeout value.
void | WDT_Feed (void)
After set WDTEN, call this function to start Watchdog or reload the Watchdog timer.
void | WDT_UpdateTimeOut (uint32_t TimeOut)
Update WDT timeout value and feed.
FlagStatus | WDT_ReadTimeOutFlag (void)
Read WDT Time out flag.
void | WDT_ClrTimeOutFlag (void)
Clear WDT Time out flag.
uint32_t | WDT_GetCurrentCount (void)
Get the current value of WDT.

Detailed Description

Contains all macro definitions and function prototypes support for WDT firmware library on LPC17xx.

Version:
2.0
Date:
21. May. 2010
Author:
NXP MCU SW Application Team
Copyright(C) 2010, NXP Semiconductor All rights reserved.

Software that is described herein is for illustrative purposes only which provides customers with programming information regarding the products. This software is supplied "AS IS" without any warranties. NXP Semiconductors assumes no responsibility or liability for the use of the software, conveys no license or title under any patent, copyright, or mask work right to the product. NXP Semiconductors reserves the right to make changes in the software without notification. NXP Semiconductors also make no representation or warranty that such application will be suitable for the specified use without further testing or modification.

Definition in file lpc17xx_wdt.h.

Generated on Tue Jun 7 14:59:08 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc_types.h File Reference

C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc_types.h File Reference

Contains the NXP ABL typedefs for C standard types. It is intended to be used in ISO C conforming development environments and checks for this insofar as it is possible to do so. More...

#include <stdint.h>

Go to the source code of this file.

Defines

#define | PARAM_SETSTATE(State) ((State==RESET) || (State==SET))
#define | PARAM_FUNCTIONALSTATE(State) ((State==DISABLE) || (State==ENABLE))
#define | _BIT(n) (1<<n)
#define | _SBF(f, v) (v<<f)
#define | _BITMASK(field_width) ( _BIT(field_width) - 1)
#define | NULL ((void*) 0)
#define | NELEMENTS(array) (sizeof (array) / sizeof (array[0]))
#define | STATIC static
#define | EXTERN extern
#define | MAX(a, b) (((a) > (b)) ? (a) : (b))
#define | MIN(a, b) (((a) < (b)) ? (a) : (b))

Typedefs

typedef enum FlagStatus | IntStatus
typedef enum FlagStatus | SetState
typedef void(* | PFV )()
typedef int32_t(* | PFI )()
typedef char | CHAR
typedef uint8_t | UNS_8
typedef int8_t | INT_8
typedef uint16_t | UNS_16
typedef int16_t | INT_16
typedef uint32_t | UNS_32
typedef int32_t | INT_32
typedef int64_t | INT_64
typedef uint64_t | UNS_64
typedef Bool | BOOL_32
typedef Bool | BOOL_16
typedef Bool | BOOL_8

Enumerations

enum | Bool { FALSE = 0, TRUE = !FALSE }
Boolean Type definition. More...
enum | FlagStatus { RESET = 0, SET = !RESET }
Flag Status and Interrupt Flag Status type definition. More...
enum | FunctionalState { DISABLE = 0, ENABLE = !DISABLE }
Functional State Definition. More...
enum | Status { ERROR = 0, SUCCESS = !ERROR }
enum | TRANSFER_BLOCK_Type { NONE_BLOCKING = 0, BLOCKING }

Detailed Description

Contains the NXP ABL typedefs for C standard types. It is intended to be used in ISO C conforming development environments and checks for this insofar as it is possible to do so.

Version:
2.0
Date:
27 Jul. 2008
Author:
NXP MCU SW Application Team
Copyright(C) 2008, NXP Semiconductor All rights reserved.

Software that is described herein is for illustrative purposes only which provides customers with programming information regarding the products. This software is supplied "AS IS" without any warranties. NXP Semiconductors assumes no responsibility or liability for the use of the software, conveys no license or title under any patent, copyright, or mask work right to the product. NXP Semiconductors reserves the right to make changes in the software without notification. NXP Semiconductors also make no representation or warranty that such application will be suitable for the specified use without further testing or modification.

Definition in file lpc_types.h.

Generated on Tue Jun 7 14:59:08 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Drivers/source/debug_frmwrk.c File Reference

C:/nxpdrv/LPC1700CMSIS/Drivers/source/debug_frmwrk.c File Reference

Contains some utilities that used for debugging through UART. More...

#include "debug_frmwrk.h"
#include "lpc17xx_pinsel.h"
#include "lpc17xx_libcfg_default.h"

Go to the source code of this file.

Functions

void | UARTPutChar (LPC_UART_TypeDef *UARTx, uint8_t ch)
Puts a character to UART port.
uint8_t | UARTGetChar (LPC_UART_TypeDef *UARTx)
Get a character to UART port.
void | UARTPuts (LPC_UART_TypeDef *UARTx, const void *str)
Puts a string to UART port.
void | UARTPuts_ (LPC_UART_TypeDef *UARTx, const void *str)
Puts a string to UART port and print new line.
void | UARTPutDec (LPC_UART_TypeDef *UARTx, uint8_t decnum)
Puts a decimal number to UART port.
void | UARTPutDec16 (LPC_UART_TypeDef *UARTx, uint16_t decnum)
Puts a decimal number to UART port.
void | UARTPutDec32 (LPC_UART_TypeDef *UARTx, uint32_t decnum)
Puts a decimal number to UART port.
void | UARTPutHex (LPC_UART_TypeDef *UARTx, uint8_t hexnum)
Puts a hex number to UART port.
void | UARTPutHex16 (LPC_UART_TypeDef *UARTx, uint16_t hexnum)
Puts a hex number to UART port.
void | UARTPutHex32 (LPC_UART_TypeDef *UARTx, uint32_t hexnum)
Puts a hex number to UART port.
void | debug_frmwrk_init (void)
*********************************************************************//**

Variables

void(* | _db_msg )(LPC_UART_TypeDef *UARTx, const void *s)
void(* | _db_msg_ )(LPC_UART_TypeDef *UARTx, const void *s)
void(* | _db_char )(LPC_UART_TypeDef *UARTx, uint8_t ch)
void(* | _db_dec )(LPC_UART_TypeDef *UARTx, uint8_t decn)
void(* | _db_dec_16 )(LPC_UART_TypeDef *UARTx, uint16_t decn)
void(* | _db_dec_32 )(LPC_UART_TypeDef *UARTx, uint32_t decn)
void(* | _db_hex )(LPC_UART_TypeDef *UARTx, uint8_t hexn)
void(* | _db_hex_16 )(LPC_UART_TypeDef *UARTx, uint16_t hexn)
void(* | _db_hex_32 )(LPC_UART_TypeDef *UARTx, uint32_t hexn)
uint8_t(* | _db_get_char )(LPC_UART_TypeDef *UARTx)

Detailed Description

Contains some utilities that used for debugging through UART.

Version:
2.0
Date:
21. May. 2010
Author:
NXP MCU SW Application Team
Copyright(C) 2010, NXP Semiconductor All rights reserved.

Software that is described herein is for illustrative purposes only which provides customers with programming information regarding the products. This software is supplied "AS IS" without any warranties. NXP Semiconductors assumes no responsibility or liability for the use of the software, conveys no license or title under any patent, copyright, or mask work right to the product. NXP Semiconductors reserves the right to make changes in the software without notification. NXP Semiconductors also make no representation or warranty that such application will be suitable for the specified use without further testing or modification.

Definition in file debug_frmwrk.c.

Function Documentation

void debug_frmwrk_init ( void )

*********************************************************************//**

Initialize Debug frame work through initializing UART port

Parameters:
[in] None
Returns:
None

Definition at line 253 of file debug_frmwrk.c.

uint8_t UARTGetChar ( LPC_UART_TypeDef * UARTx )

Get a character to UART port.

Parameters:
[in] UARTx Pointer to UART peripheral
Returns:
character value that returned

Definition at line 71 of file debug_frmwrk.c.

void UARTPutChar | ( | LPC_UART_TypeDef * | UARTx,
 |  | uint8_t | ch
 | ) |  |

Puts a character to UART port.

Parameters:
[in] | UARTx | Pointer to UART peripheral
[in] | ch | Character to put
Returns:
None

Definition at line 60 of file debug_frmwrk.c.

void UARTPutDec | ( | LPC_UART_TypeDef * | UARTx,
 |  | uint8_t | decnum
 | ) |  |

Puts a decimal number to UART port.

Parameters:
[in] | UARTx | Pointer to UART peripheral
[in] | decnum | Decimal number (8-bit long)
Returns:
None

Definition at line 115 of file debug_frmwrk.c.

void UARTPutDec16 | ( | LPC_UART_TypeDef * | UARTx,
 |  | uint16_t | decnum
 | ) |  |

Puts a decimal number to UART port.

Parameters:
[in] | UARTx | Pointer to UART peripheral
[in] | decnum | Decimal number (8-bit long)
Returns:
None

Definition at line 131 of file debug_frmwrk.c.

void UARTPutDec32 | ( | LPC_UART_TypeDef * | UARTx,
 |  | uint32_t | decnum
 | ) |  |

Puts a decimal number to UART port.

Parameters:
[in] | UARTx | Pointer to UART peripheral
[in] | decnum | Decimal number (8-bit long)
Returns:
None

Definition at line 151 of file debug_frmwrk.c.

void UARTPutHex | ( | LPC_UART_TypeDef * | UARTx,
 |  | uint8_t | hexnum
 | ) |  |

Puts a hex number to UART port.

Parameters:
[in] | UARTx | Pointer to UART peripheral
[in] | hexnum | Hex number (8-bit long)
Returns:
None

Definition at line 181 of file debug_frmwrk.c.

void UARTPutHex16 | ( | LPC_UART_TypeDef * | UARTx,
 |  | uint16_t | hexnum
 | ) |  |

Puts a hex number to UART port.

Parameters:
[in] | UARTx | Pointer to UART peripheral
[in] | hexnum | Hex number (16-bit long)
Returns:
None

Definition at line 200 of file debug_frmwrk.c.

void UARTPutHex32 | ( | LPC_UART_TypeDef * | UARTx,
 |  | uint32_t | hexnum
 | ) |  |

Puts a hex number to UART port.

Parameters:
[in] | UARTx | Pointer to UART peripheral
[in] | hexnum | Hex number (32-bit long)
Returns:
None

Definition at line 218 of file debug_frmwrk.c.

void UARTPuts | ( | LPC_UART_TypeDef * | UARTx,
 |  | const void * | str
 | ) |  |

Puts a string to UART port.

Parameters:
[in] | UARTx | Pointer to UART peripheral
[in] | str | string to put
Returns:
None

Definition at line 85 of file debug_frmwrk.c.

void UARTPuts_ | ( | LPC_UART_TypeDef * | UARTx,
 |  | const void * | str
 | ) |  |

Puts a string to UART port and print new line.

Parameters:
[in] | UARTx | Pointer to UART peripheral
[in] | str | String to put
Returns:
None

Definition at line 102 of file debug_frmwrk.c.

Variable Documentation

void(* _db_char)(LPC_UART_TypeDef *UARTx, uint8_t ch)

void(* _db_dec)(LPC_UART_TypeDef *UARTx, uint8_t decn)

void(* _db_dec_16)(LPC_UART_TypeDef *UARTx, uint16_t decn)

void(* _db_dec_32)(LPC_UART_TypeDef *UARTx, uint32_t decn)

uint8_t(* _db_get_char)(LPC_UART_TypeDef *UARTx)

void(* _db_hex)(LPC_UART_TypeDef *UARTx, uint8_t hexn)

void(* _db_hex_16)(LPC_UART_TypeDef *UARTx, uint16_t hexn)

void(* _db_hex_32)(LPC_UART_TypeDef *UARTx, uint32_t hexn)

void(* _db_msg)(LPC_UART_TypeDef *UARTx, const void *s)

void(* _db_msg_)(LPC_UART_TypeDef *UARTx, const void *s)

Generated on Tue Jun 7 14:59:08 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Drivers/source/lpc17xx_adc.c File Reference

C:/nxpdrv/LPC1700CMSIS/Drivers/source/lpc17xx_adc.c File Reference

Contains all functions support for ADC firmware library on LPC17xx. More...

#include "lpc17xx_adc.h"
#include "lpc17xx_clkpwr.h"
#include "lpc17xx_libcfg_default.h"

Go to the source code of this file.

Functions

void | ADC_Init (LPC_ADC_TypeDef *ADCx, uint32_t rate)
Initial for ADC + Set bit PCADC + Set clock for ADC + Set Clock Frequency.
void | ADC_DeInit (LPC_ADC_TypeDef *ADCx)
Close ADC.
uint32_t | ADC_GetData (uint32_t channel)
Get Result conversion from A/D data register.
void | ADC_StartCmd (LPC_ADC_TypeDef *ADCx, uint8_t start_mode)
Set start mode for ADC.
void | ADC_BurstCmd (LPC_ADC_TypeDef *ADCx, FunctionalState NewState)
ADC Burst mode setting.
void | ADC_PowerdownCmd (LPC_ADC_TypeDef *ADCx, FunctionalState NewState)
Set AD conversion in power mode.
void | ADC_EdgeStartConfig (LPC_ADC_TypeDef *ADCx, uint8_t EdgeOption)
Set Edge start configuration.
void | ADC_IntConfig (LPC_ADC_TypeDef *ADCx, ADC_TYPE_INT_OPT IntType, FunctionalState NewState)
ADC interrupt configuration.
void | ADC_ChannelCmd (LPC_ADC_TypeDef *ADCx, uint8_t Channel, FunctionalState NewState)
Enable/Disable ADC channel number.
uint16_t | ADC_ChannelGetData (LPC_ADC_TypeDef *ADCx, uint8_t channel)
Get ADC result.
FlagStatus | ADC_ChannelGetStatus (LPC_ADC_TypeDef *ADCx, uint8_t channel, uint32_t StatusType)
Get ADC Chanel status from ADC data register.
uint32_t | ADC_GlobalGetData (LPC_ADC_TypeDef *ADCx)
Get ADC Data from AD Global register.
FlagStatus | ADC_GlobalGetStatus (LPC_ADC_TypeDef *ADCx, uint32_t StatusType)
Get ADC Chanel status from AD global data register.

Detailed Description

Contains all functions support for ADC firmware library on LPC17xx.

Version:
3.0
Date:
18. June. 2010
Author:
NXP MCU SW Application Team
Copyright(C) 2010, NXP Semiconductor All rights reserved.

Software that is described herein is for illustrative purposes only which provides customers with programming information regarding the products. This software is supplied "AS IS" without any warranties. NXP Semiconductors assumes no responsibility or liability for the use of the software, conveys no license or title under any patent, copyright, or mask work right to the product. NXP Semiconductors reserves the right to make changes in the software without notification. NXP Semiconductors also make no representation or warranty that such application will be suitable for the specified use without further testing or modification.

Definition in file lpc17xx_adc.c.

Generated on Tue Jun 7 14:59:08 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Drivers/source/lpc17xx_can.c File Reference

C:/nxpdrv/LPC1700CMSIS/Drivers/source/lpc17xx_can.c File Reference

Contains all functions support for CAN firmware library on LPC17xx. More...

#include "lpc17xx_can.h"
#include "lpc17xx_clkpwr.h"
#include "lpc17xx_libcfg_default.h"

Go to the source code of this file.

Functions

void | CAN_Init (LPC_CAN_TypeDef *CANx, uint32_t baudrate)
Initialize CAN peripheral with given baudrate.
void | CAN_DeInit (LPC_CAN_TypeDef *CANx)
CAN deInit.
CAN_ERROR | CAN_SetupAFLUT (LPC_CANAF_TypeDef *CANAFx, AF_SectionDef *AFSection)
Setup Acceptance Filter Look-Up Table.
CAN_ERROR | CAN_LoadExplicitEntry (LPC_CAN_TypeDef *CANx, uint32_t id, CAN_ID_FORMAT_Type format)
Add Explicit ID into AF Look-Up Table dynamically.
CAN_ERROR | CAN_LoadFullCANEntry (LPC_CAN_TypeDef *CANx, uint16_t id)
Load FullCAN entry into AFLUT.
CAN_ERROR | CAN_LoadGroupEntry (LPC_CAN_TypeDef *CANx, uint32_t lowerID, uint32_t upperID, CAN_ID_FORMAT_Type format)
Load Group entry into AFLUT.
CAN_ERROR | CAN_RemoveEntry (AFLUT_ENTRY_Type EntryType, uint16_t position)
Remove AFLUT entry (FullCAN entry and Explicit Standard entry).
Status | CAN_SendMsg (LPC_CAN_TypeDef *CANx, CAN_MSG_Type *CAN_Msg)
Send message data.
Status | CAN_ReceiveMsg (LPC_CAN_TypeDef *CANx, CAN_MSG_Type *CAN_Msg)
Receive message data.
CAN_ERROR | FCAN_ReadObj (LPC_CANAF_TypeDef *CANAFx, CAN_MSG_Type *CAN_Msg)
Receive FullCAN Object.
uint32_t | CAN_GetCTRLStatus (LPC_CAN_TypeDef *CANx, CAN_CTRL_STS_Type arg)
Get CAN Control Status.
uint32_t | CAN_GetCRStatus (LPC_CANCR_TypeDef *CANCRx, CAN_CR_STS_Type arg)
Get CAN Central Status.
void | CAN_IRQCmd (LPC_CAN_TypeDef *CANx, CAN_INT_EN_Type arg, FunctionalState NewState)
Enable/Disable CAN Interrupt.
void | CAN_SetAFMode (LPC_CANAF_TypeDef *CANAFx, CAN_AFMODE_Type AFMode)
Setting Acceptance Filter mode.
void | CAN_ModeConfig (LPC_CAN_TypeDef *CANx, CAN_MODE_Type mode, FunctionalState NewState)
Enable/Disable CAN Mode.
void | CAN_SetCommand (LPC_CAN_TypeDef *CANx, uint32_t CMRType)
Set CAN command request.
uint32_t | CAN_IntGetStatus (LPC_CAN_TypeDef *CANx)
Get CAN interrupt status.
IntStatus | CAN_FullCANIntGetStatus (LPC_CANAF_TypeDef *CANAFx)
Check if FullCAN interrupt enable or not.
uint32_t | CAN_FullCANPendGetStatus (LPC_CANAF_TypeDef *CANAFx, FullCAN_IC_Type type)
Get value of FullCAN interrupt and capture register.

Variables

FunctionalState FULLCAN_ENABLE
uint16_t | CANAF_FullCAN_cnt = 0
uint16_t | CANAF_std_cnt = 0
uint16_t | CANAF_gstd_cnt = 0
uint16_t | CANAF_ext_cnt = 0
uint16_t | CANAF_gext_cnt = 0

Detailed Description

Contains all functions support for CAN firmware library on LPC17xx.

Version:
3.3
Date:
09. March. 2011
Author:
NXP MCU SW Application Team
Copyright(C) 2011, NXP Semiconductor All rights reserved.

Software that is described herein is for illustrative purposes only which provides customers with programming information regarding the products. This software is supplied "AS IS" without any warranties. NXP Semiconductors assumes no responsibility or liability for the use of the software, conveys no license or title under any patent, copyright, or mask work right to the product. NXP Semiconductors reserves the right to make changes in the software without notification. NXP Semiconductors also make no representation or warranty that such application will be suitable for the specified use without further testing or modification.

Definition in file lpc17xx_can.c.

Generated on Tue Jun 7 14:59:08 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Drivers/source/lpc17xx_clkpwr.c File Reference

C:/nxpdrv/LPC1700CMSIS/Drivers/source/lpc17xx_clkpwr.c File Reference

Contains all functions support for Clock and Power Control firmware library on LPC17xx. More...

#include "lpc17xx_clkpwr.h"

Go to the source code of this file.

Functions

void | CLKPWR_SetPCLKDiv (uint32_t ClkType, uint32_t DivVal)
Set value of each Peripheral Clock Selection.
uint32_t | CLKPWR_GetPCLKSEL (uint32_t ClkType)
Get current value of each Peripheral Clock Selection.
uint32_t | CLKPWR_GetPCLK (uint32_t ClkType)
Get current value of each Peripheral Clock.
void | CLKPWR_ConfigPPWR (uint32_t PPType, FunctionalState NewState)
Configure power supply for each peripheral according to NewState.
void | CLKPWR_Sleep (void)
Enter Sleep mode with co-operated instruction by the Cortex-M3.
void | CLKPWR_DeepSleep (void)
Enter Deep Sleep mode with co-operated instruction by the Cortex-M3.
void | CLKPWR_PowerDown (void)
Enter Power Down mode with co-operated instruction by the Cortex-M3.
void | CLKPWR_DeepPowerDown (void)
Enter Deep Power Down mode with co-operated instruction by the Cortex-M3.

Detailed Description

Contains all functions support for Clock and Power Control firmware library on LPC17xx.

Version:
3.0
Date:
18. June. 2010
Author:
NXP MCU SW Application Team
Copyright(C) 2010, NXP Semiconductor All rights reserved.

Software that is described herein is for illustrative purposes only which provides customers with programming information regarding the products. This software is supplied "AS IS" without any warranties. NXP Semiconductors assumes no responsibility or liability for the use of the software, conveys no license or title under any patent, copyright, or mask work right to the product. NXP Semiconductors reserves the right to make changes in the software without notification. NXP Semiconductors also make no representation or warranty that such application will be suitable for the specified use without further testing or modification.

Definition in file lpc17xx_clkpwr.c.

Generated on Tue Jun 7 14:59:08 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Drivers/source/lpc17xx_dac.c File Reference

C:/nxpdrv/LPC1700CMSIS/Drivers/source/lpc17xx_dac.c File Reference

Contains all functions support for DAC firmware library on LPC17xx. More...

#include "lpc17xx_dac.h"
#include "lpc17xx_clkpwr.h"
#include "lpc17xx_libcfg_default.h"

Go to the source code of this file.

Functions

void | DAC_Init (LPC_DAC_TypeDef *DACx)
Initial ADC configuration
  • Maximum current is 700 uA
  • Value to AOUT is 0.

void | DAC_UpdateValue (LPC_DAC_TypeDef *DACx, uint32_t dac_value)
Update value to DAC.
void | DAC_SetBias (LPC_DAC_TypeDef *DACx, uint32_t bias)
Set Maximum current for DAC.
void | DAC_ConfigDAConverterControl (LPC_DAC_TypeDef *DACx, DAC_CONVERTER_CFG_Type *DAC_ConverterConfigStruct)
To enable the DMA operation and control DMA timer.
void | DAC_SetDMATimeOut (LPC_DAC_TypeDef *DACx, uint32_t time_out)
Set reload value for interrupt/DMA counter.

Detailed Description

Contains all functions support for DAC firmware library on LPC17xx.

Contains all functions support for Ethernet MAC firmware library on LPC17xx.

Version:
2.0
Date:
21. May. 2010
Author:
NXP MCU SW Application Team
Copyright(C) 2010, NXP Semiconductor All rights reserved.

Software that is described herein is for illustrative purposes only which provides customers with programming information regarding the products. This software is supplied "AS IS" without any warranties. NXP Semiconductors assumes no responsibility or liability for the use of the software, conveys no license or title under any patent, copyright, or mask work right to the product. NXP Semiconductors reserves the right to make changes in the software without notification. NXP Semiconductors also make no representation or warranty that such application will be suitable for the specified use without further testing or modification.

Definition in file lpc17xx_dac.c.

Generated on Tue Jun 7 14:59:08 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Drivers/source/lpc17xx_emac.c File Reference

C:/nxpdrv/LPC1700CMSIS/Drivers/source/lpc17xx_emac.c File Reference

#include "lpc17xx_emac.h"
#include "lpc17xx_clkpwr.h"
#include "lpc17xx_libcfg_default.h"

Go to the source code of this file.

Functions

Status | EMAC_Init (EMAC_CFG_Type *EMAC_ConfigStruct)
Initializes the EMAC peripheral according to the specified parameters in the EMAC_ConfigStruct.
void | EMAC_DeInit (void)
De-initializes the EMAC peripheral registers to their default reset values.
int32_t | EMAC_CheckPHYStatus (uint32_t ulPHYState)
Check specified PHY status in EMAC peripheral.
int32_t | EMAC_SetPHYMode (uint32_t ulPHYMode)
Set specified PHY mode in EMAC peripheral.
int32_t | EMAC_UpdatePHYStatus (void)
Auto-Configures value for the EMAC configuration register to match with current PHY mode.
void | EMAC_SetHashFilter (uint8_t dstMAC_addr[], FunctionalState NewState)
Enable/Disable hash filter functionality for specified destination MAC address in EMAC module.
void | EMAC_SetFilterMode (uint32_t ulFilterMode, FunctionalState NewState)
Enable/Disable Filter mode for each specified type EMAC peripheral.
FlagStatus | EMAC_GetWoLStatus (uint32_t ulWoLMode)
Get status of Wake On LAN Filter for each specified type in EMAC peripheral, clear this status if it is set.
void | EMAC_WritePacketBuffer (EMAC_PACKETBUF_Type *pDataStruct)
Write data to Tx packet data buffer at current index due to TxProduceIndex.
void | EMAC_ReadPacketBuffer (EMAC_PACKETBUF_Type *pDataStruct)
Read data from Rx packet data buffer at current index due to RxConsumeIndex.
void | EMAC_IntCmd (uint32_t ulIntType, FunctionalState NewState)
Enable/Disable interrupt for each type in EMAC.
IntStatus | EMAC_IntGetStatus (uint32_t ulIntType)
Check whether if specified interrupt flag is set or not for each interrupt type in EMAC and clear interrupt pending if it is set.
Bool | EMAC_CheckReceiveIndex (void)
Check whether if the current RxConsumeIndex is not equal to the current RxProduceIndex.
Bool | EMAC_CheckTransmitIndex (void)
Check whether if the current TxProduceIndex is not equal to the current RxProduceIndex - 1.
FlagStatus | EMAC_CheckReceiveDataStatus (uint32_t ulRxStatType)
Get current status value of receive data (due to RxConsumeIndex).
uint32_t | EMAC_GetReceiveDataSize (void)
Get size of current Received data in received buffer (due to RxConsumeIndex).
void | EMAC_UpdateRxConsumeIndex (void)
Increase the RxConsumeIndex (after reading the Receive buffer to release the Receive buffer) and wrap-around the index if it reaches the maximum Receive Number.
void | EMAC_UpdateTxProduceIndex (void)
Increase the TxProduceIndex (after writting to the Transmit buffer to enable the Transmit buffer) and wrap-around the index if it reaches the maximum Transmit Number.

Variables

const uint8_t | EMAC_clkdiv [] = { 4, 6, 8, 10, 14, 20, 28 }

Generated on Tue Jun 7 14:59:08 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Drivers/source/lpc17xx_exti.c File Reference

C:/nxpdrv/LPC1700CMSIS/Drivers/source/lpc17xx_exti.c File Reference

Contains all functions support for External interrupt firmware library on LPC17xx. More...

#include "lpc17xx_exti.h"
#include "lpc17xx_libcfg_default.h"

Go to the source code of this file.

Functions

void | EXTI_Init (void)
Initial for EXT
  • Set EXTINT, EXTMODE, EXTPOLAR registers to default value.

void | EXTI_DeInit (void)
Close EXT.
void | EXTI_Config (EXTI_InitTypeDef *EXTICfg)
Configuration for EXT
  • Set EXTINT, EXTMODE, EXTPOLAR register.

void | EXTI_SetMode (EXTI_LINE_ENUM EXTILine, EXTI_MODE_ENUM mode)
Set mode for EXTI pin.
void | EXTI_SetPolarity (EXTI_LINE_ENUM EXTILine, EXTI_POLARITY_ENUM polarity)
Set polarity for EXTI pin.
void | EXTI_ClearEXTIFlag (EXTI_LINE_ENUM EXTILine)
Clear External interrupt flag.

Detailed Description

Contains all functions support for External interrupt firmware library on LPC17xx.

Version:
3.0
Date:
18. June. 2010
Author:
NXP MCU SW Application Team
Copyright(C) 2010, NXP Semiconductor All rights reserved.

Software that is described herein is for illustrative purposes only which provides customers with programming information regarding the products. This software is supplied "AS IS" without any warranties. NXP Semiconductors assumes no responsibility or liability for the use of the software, conveys no license or title under any patent, copyright, or mask work right to the product. NXP Semiconductors reserves the right to make changes in the software without notification. NXP Semiconductors also make no representation or warranty that such application will be suitable for the specified use without further testing or modification.

Definition in file lpc17xx_exti.c.

Generated on Tue Jun 7 14:59:08 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Drivers/source/lpc17xx_gpdma.c File Reference

C:/nxpdrv/LPC1700CMSIS/Drivers/source/lpc17xx_gpdma.c File Reference

Contains all functions support for GPDMA firmware library on LPC17xx. More...

#include "lpc17xx_gpdma.h"
#include "lpc17xx_clkpwr.h"
#include "lpc17xx_libcfg_default.h"

Go to the source code of this file.

Functions

void | GPDMA_Init (void)
Initialize GPDMA controller.
Status | GPDMA_Setup (GPDMA_Channel_CFG_Type *GPDMAChannelConfig)
Setup GPDMA channel peripheral according to the specified parameters in the GPDMAChannelConfig.
void | GPDMA_ChannelCmd (uint8_t channelNum, FunctionalState NewState)
Enable/Disable DMA channel.
IntStatus | GPDMA_IntGetStatus (GPDMA_Status_Type type, uint8_t channel)
Check if corresponding channel does have an active interrupt request or not.
void | GPDMA_ClearIntPending (GPDMA_StateClear_Type type, uint8_t channel)
Clear one or more interrupt requests on DMA channels.

Variables

const uint32_t | GPDMA_LUTPerAddr []
Lookup Table of Connection Type matched with Peripheral Data (FIFO) register base address.
const LPC_GPDMACH_TypeDef * | pGPDMACh [8]
Lookup Table of GPDMA Channel Number matched with GPDMA channel pointer.
const uint8_t | GPDMA_LUTPerBurst []
Optimized Peripheral Source and Destination burst size.
const uint8_t | GPDMA_LUTPerWid []
Optimized Peripheral Source and Destination transfer width.

Detailed Description

Contains all functions support for GPDMA firmware library on LPC17xx.

Version:
2.0
Date:
21. May. 2010
Author:
NXP MCU SW Application Team
Copyright(C) 2010, NXP Semiconductor All rights reserved.

Software that is described herein is for illustrative purposes only which provides customers with programming information regarding the products. This software is supplied "AS IS" without any warranties. NXP Semiconductors assumes no responsibility or liability for the use of the software, conveys no license or title under any patent, copyright, or mask work right to the product. NXP Semiconductors reserves the right to make changes in the software without notification. NXP Semiconductors also make no representation or warranty that such application will be suitable for the specified use without further testing or modification.

Definition in file lpc17xx_gpdma.c.

Generated on Tue Jun 7 14:59:08 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Drivers/source/lpc17xx_gpio.c File Reference

C:/nxpdrv/LPC1700CMSIS/Drivers/source/lpc17xx_gpio.c File Reference

Contains all functions support for GPIO firmware library on LPC17xx. More...

#include "lpc17xx_gpio.h"
#include "lpc17xx_libcfg_default.h"

Go to the source code of this file.

Functions

void | GPIO_SetDir (uint8_t portNum, uint32_t bitValue, uint8_t dir)
Set Direction for GPIO port.
void | GPIO_SetValue (uint8_t portNum, uint32_t bitValue)
Set Value for bits that have output direction on GPIO port.
void | GPIO_ClearValue (uint8_t portNum, uint32_t bitValue)
Clear Value for bits that have output direction on GPIO port.
uint32_t | GPIO_ReadValue (uint8_t portNum)
Read Current state on port pin that have input direction of GPIO.
void | GPIO_IntCmd (uint8_t portNum, uint32_t bitValue, uint8_t edgeState)
Enable GPIO interrupt (just used for P0.0-P0.30, P2.0-P2.13).
FunctionalState | GPIO_GetIntStatus (uint8_t portNum, uint32_t pinNum, uint8_t edgeState)
Get GPIO Interrupt Status (just used for P0.0-P0.30, P2.0-P2.13).
void | GPIO_ClearInt (uint8_t portNum, uint32_t bitValue)
Clear GPIO interrupt (just used for P0.0-P0.30, P2.0-P2.13).
void | FIO_SetDir (uint8_t portNum, uint32_t bitValue, uint8_t dir)
The same with GPIO_SetDir().
void | FIO_SetValue (uint8_t portNum, uint32_t bitValue)
The same with GPIO_SetValue().
void | FIO_ClearValue (uint8_t portNum, uint32_t bitValue)
The same with GPIO_ClearValue().
uint32_t | FIO_ReadValue (uint8_t portNum)
The same with GPIO_ReadValue().
void | FIO_IntCmd (uint8_t portNum, uint32_t bitValue, uint8_t edgeState)
The same with GPIO_IntCmd().
FunctionalState | FIO_GetIntStatus (uint8_t portNum, uint32_t pinNum, uint8_t edgeState)
The same with GPIO_GetIntStatus().
void | FIO_ClearInt (uint8_t portNum, uint32_t bitValue)
The same with GPIO_ClearInt().
void | FIO_SetMask (uint8_t portNum, uint32_t bitValue, uint8_t maskValue)
Set mask value for bits in FIO port.
void | FIO_HalfWordSetDir (uint8_t portNum, uint8_t halfwordNum, uint16_t bitValue, uint8_t dir)
Set direction for FIO port in halfword accessible style.
void | FIO_HalfWordSetMask (uint8_t portNum, uint8_t halfwordNum, uint16_t bitValue, uint8_t maskValue)
Set mask value for bits in FIO port in halfword accessible style.
void | FIO_HalfWordSetValue (uint8_t portNum, uint8_t halfwordNum, uint16_t bitValue)
Set bits for FIO port in halfword accessible style.
void | FIO_HalfWordClearValue (uint8_t portNum, uint8_t halfwordNum, uint16_t bitValue)
Clear bits for FIO port in halfword accessible style.
uint16_t | FIO_HalfWordReadValue (uint8_t portNum, uint8_t halfwordNum)
Read Current state on port pin that have input direction of GPIO in halfword accessible style.
void | FIO_ByteSetDir (uint8_t portNum, uint8_t byteNum, uint8_t bitValue, uint8_t dir)
Set direction for FIO port in byte accessible style.
void | FIO_ByteSetMask (uint8_t portNum, uint8_t byteNum, uint8_t bitValue, uint8_t maskValue)
Set mask value for bits in FIO port in byte accessible style.
void | FIO_ByteSetValue (uint8_t portNum, uint8_t byteNum, uint8_t bitValue)
Set bits for FIO port in byte accessible style.
void | FIO_ByteClearValue (uint8_t portNum, uint8_t byteNum, uint8_t bitValue)
Clear bits for FIO port in byte accessible style.
uint8_t | FIO_ByteReadValue (uint8_t portNum, uint8_t byteNum)
Read Current state on port pin that have input direction of GPIO in byte accessible style.

Detailed Description

Contains all functions support for GPIO firmware library on LPC17xx.

Contains all functions support for I2S firmware library on LPC17xx.

Contains all functions support for I2C firmware library on LPC17xx.

Version:
2.0
Date:
21. May. 2010
Author:
NXP MCU SW Application Team
Copyright(C) 2010, NXP Semiconductor All rights reserved.

Software that is described herein is for illustrative purposes only which provides customers with programming information regarding the products. This software is supplied "AS IS" without any warranties. NXP Semiconductors assumes no responsibility or liability for the use of the software, conveys no license or title under any patent, copyright, or mask work right to the product. NXP Semiconductors reserves the right to make changes in the software without notification. NXP Semiconductors also make no representation or warranty that such application will be suitable for the specified use without further testing or modification.

Version:
2.1
Date:
31. Mar. 2011
Author:
NXP MCU SW Application Team
Copyright(C) 2010, NXP Semiconductor All rights reserved.

Software that is described herein is for illustrative purposes only which provides customers with programming information regarding the products. This software is supplied "AS IS" without any warranties. NXP Semiconductors assumes no responsibility or liability for the use of the software, conveys no license or title under any patent, copyright, or mask work right to the product. NXP Semiconductors reserves the right to make changes in the software without notification. NXP Semiconductors also make no representation or warranty that such application will be suitable for the specified use without further testing or modification.

Version:
3.1
Date:
23. Sep. 2010
Author:
NXP MCU SW Application Team
Copyright(C) 2010, NXP Semiconductor All rights reserved.

Software that is described herein is for illustrative purposes only which provides customers with programming information regarding the products. This software is supplied "AS IS" without any warranties. NXP Semiconductors assumes no responsibility or liability for the use of the software, conveys no license or title under any patent, copyright, or mask work right to the product. NXP Semiconductors reserves the right to make changes in the software without notification. NXP Semiconductors also make no representation or warranty that such application will be suitable for the specified use without further testing or modification.

Definition in file lpc17xx_gpio.c.

Generated on Tue Jun 7 14:59:08 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Drivers/source/lpc17xx_i2c.c File Reference

C:/nxpdrv/LPC1700CMSIS/Drivers/source/lpc17xx_i2c.c File Reference

#include "lpc17xx_i2c.h"
#include "lpc17xx_clkpwr.h"
#include "lpc17xx_pinsel.h"
#include "lpc17xx_libcfg_default.h"

Go to the source code of this file.

Data Structures

struct | I2C_CFG_T
I2C device configuration structure type. More...

Functions

void | I2C_Init (LPC_I2C_TypeDef *I2Cx, uint32_t clockrate)
Initializes the I2Cx peripheral with specified parameter.
void | I2C_DeInit (LPC_I2C_TypeDef *I2Cx)
De-initializes the I2C peripheral registers to their default reset values.
void | I2C_Cmd (LPC_I2C_TypeDef *I2Cx, FunctionalState NewState)
Enable or disable I2C peripheral's operation.
void | I2C_IntCmd (LPC_I2C_TypeDef *I2Cx, Bool NewState)
Enable/Disable interrupt for I2C peripheral.
void | I2C_MasterHandler (LPC_I2C_TypeDef *I2Cx)
General Master Interrupt handler for I2C peripheral.
void | I2C_SlaveHandler (LPC_I2C_TypeDef *I2Cx)
General Slave Interrupt handler for I2C peripheral.
Status | I2C_MasterTransferData (LPC_I2C_TypeDef *I2Cx, I2C_M_SETUP_Type *TransferCfg, I2C_TRANSFER_OPT_Type Opt)
Transmit and Receive data in master mode.
Status | I2C_SlaveTransferData (LPC_I2C_TypeDef *I2Cx, I2C_S_SETUP_Type *TransferCfg, I2C_TRANSFER_OPT_Type Opt)
Receive and Transmit data in slave mode.
void | I2C_SetOwnSlaveAddr (LPC_I2C_TypeDef *I2Cx, I2C_OWNSLAVEADDR_CFG_Type *OwnSlaveAddrConfigStruct)
Set Own slave address in I2C peripheral corresponding to parameter specified in OwnSlaveAddrConfigStruct.
void | I2C_MonitorModeConfig (LPC_I2C_TypeDef *I2Cx, uint32_t MonitorCfgType, FunctionalState NewState)
Configures functionality in I2C monitor mode.
void | I2C_MonitorModeCmd (LPC_I2C_TypeDef *I2Cx, FunctionalState NewState)
Enable/Disable I2C monitor mode.
uint8_t | I2C_MonitorGetDatabuffer (LPC_I2C_TypeDef *I2Cx)
Get data from I2C data buffer in monitor mode.
BOOL_8 | I2C_MonitorHandler (LPC_I2C_TypeDef *I2Cx, uint8_t *buffer, uint32_t size)
Get data from I2C data buffer in monitor mode.
uint32_t | I2C_MasterTransferComplete (LPC_I2C_TypeDef *I2Cx)
Get status of Master Transfer.
uint32_t | I2C_SlaveTransferComplete (LPC_I2C_TypeDef *I2Cx)
Get status of Slave Transfer.

Generated on Tue Jun 7 14:59:08 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Drivers/source/lpc17xx_i2s.c File Reference

C:/nxpdrv/LPC1700CMSIS/Drivers/source/lpc17xx_i2s.c File Reference

#include "lpc17xx_i2s.h"
#include "lpc17xx_clkpwr.h"
#include "lpc17xx_libcfg_default.h"

Go to the source code of this file.

Functions

void | I2S_Init (LPC_I2S_TypeDef *I2Sx)
Initialize I2S
  • Turn on power and clock.

void | I2S_Config (LPC_I2S_TypeDef *I2Sx, uint8_t TRMode, I2S_CFG_Type *ConfigStruct)
Configuration I2S, setting:
  • master/slave mode
  • wordwidth value
  • channel mode.

void | I2S_DeInit (LPC_I2S_TypeDef *I2Sx)
DeInitial both I2S transmit or receive.
uint8_t | I2S_GetLevel (LPC_I2S_TypeDef *I2Sx, uint8_t TRMode)
Get I2S Buffer Level.
void | I2S_Start (LPC_I2S_TypeDef *I2Sx)
I2S Start: clear all STOP,RESET and MUTE bit, ready to operate.
void | I2S_Send (LPC_I2S_TypeDef *I2Sx, uint32_t BufferData)
I2S Send data.
uint32_t | I2S_Receive (LPC_I2S_TypeDef *I2Sx)
I2S Receive Data.
void | I2S_Pause (LPC_I2S_TypeDef *I2Sx, uint8_t TRMode)
I2S Pause.
void | I2S_Mute (LPC_I2S_TypeDef *I2Sx, uint8_t TRMode)
I2S Mute.
void | I2S_Stop (LPC_I2S_TypeDef *I2Sx, uint8_t TRMode)
I2S Stop.
Status | I2S_FreqConfig (LPC_I2S_TypeDef *I2Sx, uint32_t Freq, uint8_t TRMode)
Set frequency for I2S.
void | I2S_SetBitRate (LPC_I2S_TypeDef *I2Sx, uint8_t bitrate, uint8_t TRMode)
I2S set bitrate.
void | I2S_ModeConfig (LPC_I2S_TypeDef *I2Sx, I2S_MODEConf_Type *ModeConfig, uint8_t TRMode)
Configuration operating mode for I2S.
void | I2S_DMAConfig (LPC_I2S_TypeDef *I2Sx, I2S_DMAConf_Type *DMAConfig, uint8_t TRMode)
Configure DMA operation for I2S.
void | I2S_DMACmd (LPC_I2S_TypeDef *I2Sx, uint8_t DMAIndex, uint8_t TRMode, FunctionalState NewState)
Enable/Disable DMA operation for I2S.
void | I2S_IRQConfig (LPC_I2S_TypeDef *I2Sx, uint8_t TRMode, uint8_t level)
Configure IRQ for I2S.
void | I2S_IRQCmd (LPC_I2S_TypeDef *I2Sx, uint8_t TRMode, FunctionalState NewState)
Enable/Disable IRQ for I2S.
FunctionalState | I2S_GetIRQStatus (LPC_I2S_TypeDef *I2Sx, uint8_t TRMode)
Get I2S interrupt status.
uint8_t | I2S_GetIRQDepth (LPC_I2S_TypeDef *I2Sx, uint8_t TRMode)
Get I2S interrupt depth.

Generated on Tue Jun 7 14:59:08 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Drivers/source/lpc17xx_libcfg_default.c File Reference

C:/nxpdrv/LPC1700CMSIS/Drivers/source/lpc17xx_libcfg_default.c File Reference

Library configuration source file (default), used to build library without examples. More...

#include "lpc17xx_libcfg_default.h"

Go to the source code of this file.

Functions

void check_failed (uint8_t *file, uint32_t line)

Detailed Description

Library configuration source file (default), used to build library without examples.

Version:
2.0
Date:
21. May. 2010
Author:
NXP MCU SW Application Team
Copyright(C) 2010, NXP Semiconductor All rights reserved.

Software that is described herein is for illustrative purposes only which provides customers with programming information regarding the products. This software is supplied "AS IS" without any warranties. NXP Semiconductors assumes no responsibility or liability for the use of the software, conveys no license or title under any patent, copyright, or mask work right to the product. NXP Semiconductors reserves the right to make changes in the software without notification. NXP Semiconductors also make no representation or warranty that such application will be suitable for the specified use without further testing or modification.

Definition in file lpc17xx_libcfg_default.c.

Generated on Tue Jun 7 14:59:08 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Drivers/source/lpc17xx_mcpwm.c File Reference

C:/nxpdrv/LPC1700CMSIS/Drivers/source/lpc17xx_mcpwm.c File Reference

Contains all functions support for Motor Control PWM firmware library on LPC17xx. More...

#include "lpc17xx_mcpwm.h"
#include "lpc17xx_clkpwr.h"
#include "lpc17xx_libcfg_default.h"

Go to the source code of this file.

Functions

void | MCPWM_Init (LPC_MCPWM_TypeDef *MCPWMx)
Initializes the MCPWM peripheral.
void | MCPWM_ConfigChannel (LPC_MCPWM_TypeDef *MCPWMx, uint32_t channelNum, MCPWM_CHANNEL_CFG_Type *channelSetup)
Configures each channel in MCPWM peripheral according to the specified parameters in the MCPWM_CHANNEL_CFG_Type.
void | MCPWM_WriteToShadow (LPC_MCPWM_TypeDef *MCPWMx, uint32_t channelNum, MCPWM_CHANNEL_CFG_Type *channelSetup)
Write to MCPWM shadow registers - Update the value for period and pulse width in MCPWM peripheral.
void | MCPWM_ConfigCapture (LPC_MCPWM_TypeDef *MCPWMx, uint32_t channelNum, MCPWM_CAPTURE_CFG_Type *captureConfig)
Configures capture function in MCPWM peripheral.
void | MCPWM_ClearCapture (LPC_MCPWM_TypeDef *MCPWMx, uint32_t captureChannel)
Clears current captured value in specified capture channel.
uint32_t | MCPWM_GetCapture (LPC_MCPWM_TypeDef *MCPWMx, uint32_t captureChannel)
Get current captured value in specified capture channel.
void | MCPWM_CountConfig (LPC_MCPWM_TypeDef *MCPWMx, uint32_t channelNum, uint32_t countMode, MCPWM_COUNT_CFG_Type *countConfig)
Configures Count control in MCPWM peripheral.
void | MCPWM_Start (LPC_MCPWM_TypeDef *MCPWMx, uint32_t channel0, uint32_t channel1, uint32_t channel2)
Start MCPWM activity for each MCPWM channel.
void | MCPWM_Stop (LPC_MCPWM_TypeDef *MCPWMx, uint32_t channel0, uint32_t channel1, uint32_t channel2)
Stop MCPWM activity for each MCPWM channel.
void | MCPWM_ACMode (LPC_MCPWM_TypeDef *MCPWMx, uint32_t acMode)
Enables/Disables 3-phase AC motor mode on MCPWM peripheral.
void | MCPWM_DCMode (LPC_MCPWM_TypeDef *MCPWMx, uint32_t dcMode, uint32_t outputInvered, uint32_t outputPattern)
Enables/Disables 3-phase DC motor mode on MCPWM peripheral.
void | MCPWM_IntConfig (LPC_MCPWM_TypeDef *MCPWMx, uint32_t ulIntType, FunctionalState NewState)
Configures the specified interrupt in MCPWM peripheral.
void | MCPWM_IntSet (LPC_MCPWM_TypeDef *MCPWMx, uint32_t ulIntType)
Sets/Forces the specified interrupt for MCPWM peripheral.
void | MCPWM_IntClear (LPC_MCPWM_TypeDef *MCPWMx, uint32_t ulIntType)
Clear the specified interrupt pending for MCPWM peripheral.
FlagStatus | MCPWM_GetIntStatus (LPC_MCPWM_TypeDef *MCPWMx, uint32_t ulIntType)
Check whether if the specified interrupt in MCPWM is set or not.

Detailed Description

Contains all functions support for Motor Control PWM firmware library on LPC17xx.

Version:
2.0
Date:
21. May. 2010
Author:
NXP MCU SW Application Team
Copyright(C) 2010, NXP Semiconductor All rights reserved.

Software that is described herein is for illustrative purposes only which provides customers with programming information regarding the products. This software is supplied "AS IS" without any warranties. NXP Semiconductors assumes no responsibility or liability for the use of the software, conveys no license or title under any patent, copyright, or mask work right to the product. NXP Semiconductors reserves the right to make changes in the software without notification. NXP Semiconductors also make no representation or warranty that such application will be suitable for the specified use without further testing or modification.

Definition in file lpc17xx_mcpwm.c.

Generated on Tue Jun 7 14:59:08 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Drivers/source/lpc17xx_nvic.c File Reference

C:/nxpdrv/LPC1700CMSIS/Drivers/source/lpc17xx_nvic.c File Reference

Contains all expansion functions support for NVIC firmware library on LPC17xx. The main NVIC functions are defined in core_cm3.h. More...

#include "lpc17xx_nvic.h"

Go to the source code of this file.

Defines

#define | NVIC_VTOR_MASK 0x3FFFFF80

Functions

void | NVIC_DeInit (void)
De-initializes the NVIC peripheral registers to their default reset values.
void | NVIC_SCBDeInit (void)
De-initializes the SCB peripheral registers to their default reset values.
void | NVIC_SetVTOR (uint32_t offset)
Set Vector Table Offset value.

Detailed Description

Contains all expansion functions support for NVIC firmware library on LPC17xx. The main NVIC functions are defined in core_cm3.h.

Version:
2.0
Date:
21. May. 2010
Author:
NXP MCU SW Application Team
Copyright(C) 2010, NXP Semiconductor All rights reserved.

Software that is described herein is for illustrative purposes only which provides customers with programming information regarding the products. This software is supplied "AS IS" without any warranties. NXP Semiconductors assumes no responsibility or liability for the use of the software, conveys no license or title under any patent, copyright, or mask work right to the product. NXP Semiconductors reserves the right to make changes in the software without notification. NXP Semiconductors also make no representation or warranty that such application will be suitable for the specified use without further testing or modification.

Definition in file lpc17xx_nvic.c.

Generated on Tue Jun 7 14:59:09 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Drivers/source/lpc17xx_pinsel.c File Reference

C:/nxpdrv/LPC1700CMSIS/Drivers/source/lpc17xx_pinsel.c File Reference

Contains all functions support for Pin connect block firmware library on LPC17xx. More...

#include "lpc17xx_pinsel.h"

Go to the source code of this file.

Functions

void | PINSEL_ConfigTraceFunc (FunctionalState NewState)
Configure trace function.
void | PINSEL_SetI2C0Pins (uint8_t i2cPinMode, FunctionalState filterSlewRateEnable)
Setup I2C0 pins.
void | PINSEL_ConfigPin (PINSEL_CFG_Type *PinCfg)
Configure Pin corresponding to specified parameters passed in the PinCfg.

Detailed Description

Contains all functions support for Pin connect block firmware library on LPC17xx.

Version:
2.0
Date:
21. May. 2010
Author:
NXP MCU SW Application Team
Copyright(C) 2010, NXP Semiconductor All rights reserved.

Software that is described herein is for illustrative purposes only which provides customers with programming information regarding the products. This software is supplied "AS IS" without any warranties. NXP Semiconductors assumes no responsibility or liability for the use of the software, conveys no license or title under any patent, copyright, or mask work right to the product. NXP Semiconductors reserves the right to make changes in the software without notification. NXP Semiconductors also make no representation or warranty that such application will be suitable for the specified use without further testing or modification.

Definition in file lpc17xx_pinsel.c.

Generated on Tue Jun 7 14:59:09 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Drivers/source/lpc17xx_pwm.c File Reference

C:/nxpdrv/LPC1700CMSIS/Drivers/source/lpc17xx_pwm.c File Reference

Contains all functions support for PWM firmware library on LPC17xx. More...

#include "lpc17xx_pwm.h"
#include "lpc17xx_clkpwr.h"
#include "lpc17xx_libcfg_default.h"

Go to the source code of this file.

Functions

IntStatus | PWM_GetIntStatus (LPC_PWM_TypeDef *PWMx, uint32_t IntFlag)
Check whether specified interrupt flag in PWM is set or not.
void | PWM_ClearIntPending (LPC_PWM_TypeDef *PWMx, uint32_t IntFlag)
Clear specified PWM Interrupt pending.
void | PWM_ConfigStructInit (uint8_t PWMTimerCounterMode, void *PWM_InitStruct)
Fills each PWM_InitStruct member with its default value:
  • If PWMCounterMode = PWM_MODE_TIMER: + PrescaleOption = PWM_TIMER_PRESCALE_USVAL + PrescaleValue = 1
  • If PWMCounterMode = PWM_MODE_COUNTER: + CountInputSelect = PWM_COUNTER_PCAP1_0 + CounterOption = PWM_COUNTER_RISING.

void | PWM_Init (LPC_PWM_TypeDef *PWMx, uint32_t PWMTimerCounterMode, void *PWM_ConfigStruct)
Initializes the PWMx peripheral corresponding to the specified parameters in the PWM_ConfigStruct.
void | PWM_DeInit (LPC_PWM_TypeDef *PWMx)
De-initializes the PWM peripheral registers to their default reset values.
void | PWM_Cmd (LPC_PWM_TypeDef *PWMx, FunctionalState NewState)
Enable/Disable PWM peripheral.
void | PWM_CounterCmd (LPC_PWM_TypeDef *PWMx, FunctionalState NewState)
Enable/Disable Counter in PWM peripheral.
void | PWM_ResetCounter (LPC_PWM_TypeDef *PWMx)
Reset Counter in PWM peripheral.
void | PWM_ConfigMatch (LPC_PWM_TypeDef *PWMx, PWM_MATCHCFG_Type *PWM_MatchConfigStruct)
Configures match for PWM peripheral.
void | PWM_ConfigCapture (LPC_PWM_TypeDef *PWMx, PWM_CAPTURECFG_Type *PWM_CaptureConfigStruct)
Configures capture input for PWM peripheral.
uint32_t | PWM_GetCaptureValue (LPC_PWM_TypeDef *PWMx, uint8_t CaptureChannel)
Read value of capture register PWM peripheral.
void | PWM_MatchUpdate (LPC_PWM_TypeDef *PWMx, uint8_t MatchChannel, uint32_t MatchValue, uint8_t UpdateType)
Update value for each PWM channel with update type option.
void | PWM_MultiMatchUpdate (LPC_PWM_TypeDef *PWMx, PWM_Match_T *MatchStruct, uint8_t UpdateType)
Update value for multi PWM channel with update type option at the same time.
void | PWM_ChannelConfig (LPC_PWM_TypeDef *PWMx, uint8_t PWMChannel, uint8_t ModeOption)
Configure Edge mode for each PWM channel.
void | PWM_ChannelCmd (LPC_PWM_TypeDef *PWMx, uint8_t PWMChannel, FunctionalState NewState)
Enable/Disable PWM channel output.

Detailed Description

Contains all functions support for PWM firmware library on LPC17xx.

Version:
2.1
Date:
31. Mar. 2011
Author:
NXP MCU SW Application Team
Copyright(C) 2011, NXP Semiconductor All rights reserved.

Software that is described herein is for illustrative purposes only which provides customers with programming information regarding the products. This software is supplied "AS IS" without any warranties. NXP Semiconductors assumes no responsibility or liability for the use of the software, conveys no license or title under any patent, copyright, or mask work right to the product. NXP Semiconductors reserves the right to make changes in the software without notification. NXP Semiconductors also make no representation or warranty that such application will be suitable for the specified use without further testing or modification.

Definition in file lpc17xx_pwm.c.

Generated on Tue Jun 7 14:59:09 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Drivers/source/lpc17xx_qei.c File Reference

C:/nxpdrv/LPC1700CMSIS/Drivers/source/lpc17xx_qei.c File Reference

Contains all functions support for QEI firmware library on LPC17xx. More...

#include "lpc17xx_qei.h"
#include "lpc17xx_clkpwr.h"
#include "lpc17xx_libcfg_default.h"

Go to the source code of this file.

Data Structures

union | QEI_CFGOPT_Type
QEI configuration union type definition. More...

Functions

void | QEI_Reset (LPC_QEI_TypeDef *QEIx, uint32_t ulResetType)
Resets value for each type of QEI value, such as velocity, counter, position, etc..
void | QEI_Init (LPC_QEI_TypeDef *QEIx, QEI_CFG_Type *QEI_ConfigStruct)
Initializes the QEI peripheral according to the specified parameters in the QEI_ConfigStruct.
void | QEI_DeInit (LPC_QEI_TypeDef *QEIx)
De-initializes the QEI peripheral registers to their default reset values.
void | QEI_ConfigStructInit (QEI_CFG_Type *QIE_InitStruct)
Fills each QIE_InitStruct member with its default value:
  • DirectionInvert = QEI_DIRINV_NONE
  • SignalMode = QEI_SIGNALMODE_QUAD
  • CaptureMode = QEI_CAPMODE_4X
  • InvertIndex = QEI_INVINX_NONE.

FlagStatus | QEI_GetStatus (LPC_QEI_TypeDef *QEIx, uint32_t ulFlagType)
Check whether if specified flag status is set or not.
uint32_t | QEI_GetPosition (LPC_QEI_TypeDef *QEIx)
Get current position value in QEI peripheral.
void | QEI_SetMaxPosition (LPC_QEI_TypeDef *QEIx, uint32_t ulMaxPos)
Set max position value for QEI peripheral.
void | QEI_SetPositionComp (LPC_QEI_TypeDef *QEIx, uint8_t bPosCompCh, uint32_t ulPosComp)
Set position compare value for QEI peripheral.
uint32_t | QEI_GetIndex (LPC_QEI_TypeDef *QEIx)
Get current index counter of QEI peripheral.
void | QEI_SetIndexComp (LPC_QEI_TypeDef *QEIx, uint32_t ulIndexComp)
Set value for index compare in QEI peripheral.
void | QEI_SetTimerReload (LPC_QEI_TypeDef *QEIx, QEI_RELOADCFG_Type *QEIReloadStruct)
Set timer reload value for QEI peripheral. When the velocity timer is over-flow, the value that set for Timer Reload register will be loaded into the velocity timer for next period. The calculated velocity in RPM therefore will be affect by this value.
uint32_t | QEI_GetTimer (LPC_QEI_TypeDef *QEIx)
Get current timer counter in QEI peripheral.
uint32_t | QEI_GetVelocity (LPC_QEI_TypeDef *QEIx)
Get current velocity pulse counter in current time period.
uint32_t | QEI_GetVelocityCap (LPC_QEI_TypeDef *QEIx)
Get the most recently measured velocity of the QEI. When the Velocity timer in QEI is over-flow, the current velocity value will be loaded into Velocity Capture register.
void | QEI_SetVelocityComp (LPC_QEI_TypeDef *QEIx, uint32_t ulVelComp)
Set Velocity Compare value for QEI peripheral.
void | QEI_SetDigiFilter (LPC_QEI_TypeDef *QEIx, uint32_t ulSamplingPulse)
Set value of sampling count for the digital filter in QEI peripheral.
FlagStatus | QEI_GetIntStatus (LPC_QEI_TypeDef *QEIx, uint32_t ulIntType)
Check whether if specified interrupt flag status in QEI peripheral is set or not.
void | QEI_IntCmd (LPC_QEI_TypeDef *QEIx, uint32_t ulIntType, FunctionalState NewState)
Enable/Disable specified interrupt in QEI peripheral.
void | QEI_IntSet (LPC_QEI_TypeDef *QEIx, uint32_t ulIntType)
Sets (forces) specified interrupt in QEI peripheral.
void | QEI_IntClear (LPC_QEI_TypeDef *QEIx, uint32_t ulIntType)
Clear (force) specified interrupt (pending) in QEI peripheral.
uint32_t | QEI_CalculateRPM (LPC_QEI_TypeDef *QEIx, uint32_t ulVelCapValue, uint32_t ulPPR)
Calculates the actual velocity in RPM passed via velocity capture value and Pulse Per Round (of the encoder) value parameter input.

Detailed Description

Contains all functions support for QEI firmware library on LPC17xx.

Version:
2.0
Date:
21. May. 2010
Author:
NXP MCU SW Application Team
Copyright(C) 2010, NXP Semiconductor All rights reserved.

Software that is described herein is for illustrative purposes only which provides customers with programming information regarding the products. This software is supplied "AS IS" without any warranties. NXP Semiconductors assumes no responsibility or liability for the use of the software, conveys no license or title under any patent, copyright, or mask work right to the product. NXP Semiconductors reserves the right to make changes in the software without notification. NXP Semiconductors also make no representation or warranty that such application will be suitable for the specified use without further testing or modification.

Definition in file lpc17xx_qei.c.

Generated on Tue Jun 7 14:59:09 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Drivers/source/lpc17xx_rit.c File Reference

C:/nxpdrv/LPC1700CMSIS/Drivers/source/lpc17xx_rit.c File Reference

Contains all functions support for RIT firmware library on LPC17xx. More...

#include "lpc17xx_rit.h"
#include "lpc17xx_clkpwr.h"
#include "lpc17xx_libcfg_default.h"

Go to the source code of this file.

Functions

void | RIT_Init (LPC_RIT_TypeDef *RITx)
void | RIT_DeInit (LPC_RIT_TypeDef *RITx)
void | RIT_TimerConfig (LPC_RIT_TypeDef *RITx, uint32_t time_interval)
void | RIT_Cmd (LPC_RIT_TypeDef *RITx, FunctionalState NewState)
void | RIT_TimerDebugCmd (LPC_RIT_TypeDef *RITx, FunctionalState NewState)
IntStatus | RIT_GetIntStatus (LPC_RIT_TypeDef *RITx)

Detailed Description

Contains all functions support for RIT firmware library on LPC17xx.

Version:
2.0
Date:
21. May. 2010
Author:
NXP MCU SW Application Team
Copyright(C) 2010, NXP Semiconductor All rights reserved.

Software that is described herein is for illustrative purposes only which provides customers with programming information regarding the products. This software is supplied "AS IS" without any warranties. NXP Semiconductors assumes no responsibility or liability for the use of the software, conveys no license or title under any patent, copyright, or mask work right to the product. NXP Semiconductors reserves the right to make changes in the software without notification. NXP Semiconductors also make no representation or warranty that such application will be suitable for the specified use without further testing or modification.

Definition in file lpc17xx_rit.c.

Generated on Tue Jun 7 14:59:09 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Drivers/source/lpc17xx_rtc.c File Reference

C:/nxpdrv/LPC1700CMSIS/Drivers/source/lpc17xx_rtc.c File Reference

Contains all functions support for RTC firmware library on LPC17xx. More...

#include "lpc17xx_rtc.h"
#include "lpc17xx_clkpwr.h"
#include "lpc17xx_libcfg_default.h"

Go to the source code of this file.

Functions

void | RTC_Init (LPC_RTC_TypeDef *RTCx)
Initializes the RTC peripheral.
void | RTC_DeInit (LPC_RTC_TypeDef *RTCx)
De-initializes the RTC peripheral registers to their default reset values.
void | RTC_ResetClockTickCounter (LPC_RTC_TypeDef *RTCx)
Reset clock tick counter in RTC peripheral.
void | RTC_Cmd (LPC_RTC_TypeDef *RTCx, FunctionalState NewState)
Start/Stop RTC peripheral.
void | RTC_CntIncrIntConfig (LPC_RTC_TypeDef *RTCx, uint32_t CntIncrIntType, FunctionalState NewState)
Enable/Disable Counter increment interrupt for each time type in RTC peripheral.
void | RTC_AlarmIntConfig (LPC_RTC_TypeDef *RTCx, uint32_t AlarmTimeType, FunctionalState NewState)
Enable/Disable Alarm interrupt for each time type in RTC peripheral.
void | RTC_SetTime (LPC_RTC_TypeDef *RTCx, uint32_t Timetype, uint32_t TimeValue)
Set current time value for each time type in RTC peripheral.
uint32_t | RTC_GetTime (LPC_RTC_TypeDef *RTCx, uint32_t Timetype)
Get current time value for each type time type.
void | RTC_SetFullTime (LPC_RTC_TypeDef *RTCx, RTC_TIME_Type *pFullTime)
Set full of time in RTC peripheral.
void | RTC_GetFullTime (LPC_RTC_TypeDef *RTCx, RTC_TIME_Type *pFullTime)
Get full of time in RTC peripheral.
void | RTC_SetAlarmTime (LPC_RTC_TypeDef *RTCx, uint32_t Timetype, uint32_t ALValue)
Set alarm time value for each time type.
uint32_t | RTC_GetAlarmTime (LPC_RTC_TypeDef *RTCx, uint32_t Timetype)
Get alarm time value for each time type.
void | RTC_SetFullAlarmTime (LPC_RTC_TypeDef *RTCx, RTC_TIME_Type *pFullTime)
Set full of alarm time in RTC peripheral.
void | RTC_GetFullAlarmTime (LPC_RTC_TypeDef *RTCx, RTC_TIME_Type *pFullTime)
Get full of alarm time in RTC peripheral.
IntStatus | RTC_GetIntPending (LPC_RTC_TypeDef *RTCx, uint32_t IntType)
Check whether if specified Location interrupt in RTC peripheral is set or not.
void | RTC_ClearIntPending (LPC_RTC_TypeDef *RTCx, uint32_t IntType)
Clear specified Location interrupt pending in RTC peripheral.
void | RTC_CalibCounterCmd (LPC_RTC_TypeDef *RTCx, FunctionalState NewState)
Enable/Disable calibration counter in RTC peripheral.
void | RTC_CalibConfig (LPC_RTC_TypeDef *RTCx, uint32_t CalibValue, uint8_t CalibDir)
Configures Calibration in RTC peripheral.
void | RTC_WriteGPREG (LPC_RTC_TypeDef *RTCx, uint8_t Channel, uint32_t Value)
Write value to General purpose registers.
uint32_t | RTC_ReadGPREG (LPC_RTC_TypeDef *RTCx, uint8_t Channel)
Read value from General purpose registers.

Detailed Description

Contains all functions support for RTC firmware library on LPC17xx.

Version:
3.1
Date:
6. June. 2011
Author:
NXP MCU SW Application Team
Copyright(C) 2011, NXP Semiconductor All rights reserved.

Software that is described herein is for illustrative purposes only which provides customers with programming information regarding the products. This software is supplied "AS IS" without any warranties. NXP Semiconductors assumes no responsibility or liability for the use of the software, conveys no license or title under any patent, copyright, or mask work right to the product. NXP Semiconductors reserves the right to make changes in the software without notification. NXP Semiconductors also make no representation or warranty that such application will be suitable for the specified use without further testing or modification.

Definition in file lpc17xx_rtc.c.

Generated on Tue Jun 7 14:59:09 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Drivers/source/lpc17xx_spi.c File Reference

C:/nxpdrv/LPC1700CMSIS/Drivers/source/lpc17xx_spi.c File Reference

Contains all functions support for SPI firmware library on LPC17xx. More...

#include "lpc17xx_spi.h"
#include "lpc17xx_clkpwr.h"
#include "lpc17xx_libcfg_default.h"

Go to the source code of this file.

Functions

void | SPI_SetClock (LPC_SPI_TypeDef *SPIx, uint32_t target_clock)
Setup clock rate for SPI device.
void | SPI_DeInit (LPC_SPI_TypeDef *SPIx)
De-initializes the SPIx peripheral registers to their default reset values.
uint8_t | SPI_GetDataSize (LPC_SPI_TypeDef *SPIx)
Get data bit size per transfer.
void | SPI_Init (LPC_SPI_TypeDef *SPIx, SPI_CFG_Type *SPI_ConfigStruct)
Initializes the SPIx peripheral according to the specified parameters in the UART_ConfigStruct.
void | SPI_ConfigStructInit (SPI_CFG_Type *SPI_InitStruct)
Fills each SPI_InitStruct member with its default value:
  • CPHA = SPI_CPHA_FIRST
  • CPOL = SPI_CPOL_HI
  • ClockRate = 1000000
  • DataOrder = SPI_DATA_MSB_FIRST
  • Databit = SPI_DATABIT_8
  • Mode = SPI_MASTER_MODE.

void | SPI_SendData (LPC_SPI_TypeDef *SPIx, uint16_t Data)
Transmit a single data through SPIx peripheral.
uint16_t | SPI_ReceiveData (LPC_SPI_TypeDef *SPIx)
Receive a single data from SPIx peripheral.
int32_t | SPI_ReadWrite (LPC_SPI_TypeDef *SPIx, SPI_DATA_SETUP_Type *dataCfg, SPI_TRANSFER_Type xfType)
SPI Read write data function.
void | SPI_IntCmd (LPC_SPI_TypeDef *SPIx, FunctionalState NewState)
Enable or disable SPIx interrupt.
IntStatus | SPI_GetIntStatus (LPC_SPI_TypeDef *SPIx)
Checks whether the SPI interrupt flag is set or not.
void | SPI_ClearIntPending (LPC_SPI_TypeDef *SPIx)
Clear SPI interrupt flag.
uint32_t | SPI_GetStatus (LPC_SPI_TypeDef *SPIx)
Get current value of SPI Status register in SPIx peripheral.
FlagStatus | SPI_CheckStatus (uint32_t inputSPIStatus, uint8_t SPIStatus)
Checks whether the specified SPI Status flag is set or not via inputSPIStatus parameter.

Detailed Description

Contains all functions support for SPI firmware library on LPC17xx.

Version:
2.0
Date:
21. May. 2010
Author:
NXP MCU SW Application Team
Copyright(C) 2010, NXP Semiconductor All rights reserved.

Software that is described herein is for illustrative purposes only which provides customers with programming information regarding the products. This software is supplied "AS IS" without any warranties. NXP Semiconductors assumes no responsibility or liability for the use of the software, conveys no license or title under any patent, copyright, or mask work right to the product. NXP Semiconductors reserves the right to make changes in the software without notification. NXP Semiconductors also make no representation or warranty that such application will be suitable for the specified use without further testing or modification.

Definition in file lpc17xx_spi.c.

Generated on Tue Jun 7 14:59:09 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Drivers/source/lpc17xx_ssp.c File Reference

C:/nxpdrv/LPC1700CMSIS/Drivers/source/lpc17xx_ssp.c File Reference

Contains all functions support for SSP firmware library on LPC17xx. More...

#include "lpc17xx_ssp.h"
#include "lpc17xx_clkpwr.h"
#include "lpc17xx_libcfg_default.h"

Go to the source code of this file.

Functions

void | SSP_Init (LPC_SSP_TypeDef *SSPx, SSP_CFG_Type *SSP_ConfigStruct)
Initializes the SSPx peripheral according to the specified parameters in the SSP_ConfigStruct.
void | SSP_DeInit (LPC_SSP_TypeDef *SSPx)
De-initializes the SSPx peripheral registers to their default reset values.
uint8_t | SSP_GetDataSize (LPC_SSP_TypeDef *SSPx)
Get data size bit selected.
void | SSP_ConfigStructInit (SSP_CFG_Type *SSP_InitStruct)
Fills each SSP_InitStruct member with its default value:
  • CPHA = SSP_CPHA_FIRST
  • CPOL = SSP_CPOL_HI
  • ClockRate = 1000000
  • Databit = SSP_DATABIT_8
  • Mode = SSP_MASTER_MODE
  • FrameFormat = SSP_FRAME_SSP.

void | SSP_Cmd (LPC_SSP_TypeDef *SSPx, FunctionalState NewState)
Enable or disable SSP peripheral's operation.
void | SSP_LoopBackCmd (LPC_SSP_TypeDef *SSPx, FunctionalState NewState)
Enable or disable Loop Back mode function in SSP peripheral.
void | SSP_SlaveOutputCmd (LPC_SSP_TypeDef *SSPx, FunctionalState NewState)
Enable or disable Slave Output function in SSP peripheral.
void | SSP_SendData (LPC_SSP_TypeDef *SSPx, uint16_t Data)
Transmit a single data through SSPx peripheral.
uint16_t | SSP_ReceiveData (LPC_SSP_TypeDef *SSPx)
Receive a single data from SSPx peripheral.
int32_t | SSP_ReadWrite (LPC_SSP_TypeDef *SSPx, SSP_DATA_SETUP_Type *dataCfg, SSP_TRANSFER_Type xfType)
SSP Read write data function.
FlagStatus | SSP_GetStatus (LPC_SSP_TypeDef *SSPx, uint32_t FlagType)
Checks whether the specified SSP status flag is set or not.
void | SSP_IntConfig (LPC_SSP_TypeDef *SSPx, uint32_t IntType, FunctionalState NewState)
Enable or disable specified interrupt type in SSP peripheral.
IntStatus | SSP_GetRawIntStatus (LPC_SSP_TypeDef *SSPx, uint32_t RawIntType)
Check whether the specified Raw interrupt status flag is set or not.
uint32_t | SSP_GetRawIntStatusReg (LPC_SSP_TypeDef *SSPx)
Get Raw Interrupt Status register.
IntStatus | SSP_GetIntStatus (LPC_SSP_TypeDef *SSPx, uint32_t IntType)
Check whether the specified interrupt status flag is set or not.
void | SSP_ClearIntPending (LPC_SSP_TypeDef *SSPx, uint32_t IntType)
Clear specified interrupt pending in SSP peripheral.
void | SSP_DMACmd (LPC_SSP_TypeDef *SSPx, uint32_t DMAMode, FunctionalState NewState)
Enable/Disable DMA function for SSP peripheral.

Detailed Description

Contains all functions support for SSP firmware library on LPC17xx.

Version:
3.0
Date:
18. June. 2010
Author:
NXP MCU SW Application Team
Copyright(C) 2010, NXP Semiconductor All rights reserved.

Software that is described herein is for illustrative purposes only which provides customers with programming information regarding the products. This software is supplied "AS IS" without any warranties. NXP Semiconductors assumes no responsibility or liability for the use of the software, conveys no license or title under any patent, copyright, or mask work right to the product. NXP Semiconductors reserves the right to make changes in the software without notification. NXP Semiconductors also make no representation or warranty that such application will be suitable for the specified use without further testing or modification.

Definition in file lpc17xx_ssp.c.

Generated on Tue Jun 7 14:59:09 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Drivers/source/lpc17xx_systick.c File Reference

C:/nxpdrv/LPC1700CMSIS/Drivers/source/lpc17xx_systick.c File Reference

Contains all functions support for SYSTICK firmware library on LPC17xx. More...

#include "lpc17xx_systick.h"
#include "lpc17xx_clkpwr.h"
#include "lpc17xx_libcfg_default.h"

Go to the source code of this file.

Functions

void | SYSTICK_InternalInit (uint32_t time)
Initial System Tick with using internal CPU clock source.
void | SYSTICK_ExternalInit (uint32_t freq, uint32_t time)
Initial System Tick with using external clock source.
void | SYSTICK_Cmd (FunctionalState NewState)
Enable/disable System Tick counter.
void | SYSTICK_IntCmd (FunctionalState NewState)
Enable/disable System Tick interrupt.
uint32_t | SYSTICK_GetCurrentValue (void)
Get current value of System Tick counter.
void | SYSTICK_ClearCounterFlag (void)
Clear Counter flag.

Detailed Description

Contains all functions support for SYSTICK firmware library on LPC17xx.

Version:
2.0
Date:
21. May. 2010
Author:
NXP MCU SW Application Team
Copyright(C) 2010, NXP Semiconductor All rights reserved.

Software that is described herein is for illustrative purposes only which provides customers with programming information regarding the products. This software is supplied "AS IS" without any warranties. NXP Semiconductors assumes no responsibility or liability for the use of the software, conveys no license or title under any patent, copyright, or mask work right to the product. NXP Semiconductors reserves the right to make changes in the software without notification. NXP Semiconductors also make no representation or warranty that such application will be suitable for the specified use without further testing or modification.

Definition in file lpc17xx_systick.c.

Generated on Tue Jun 7 14:59:09 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Drivers/source/lpc17xx_timer.c File Reference

C:/nxpdrv/LPC1700CMSIS/Drivers/source/lpc17xx_timer.c File Reference

Contains all functions support for Timer firmware library on LPC17xx. More...

#include "lpc17xx_timer.h"
#include "lpc17xx_clkpwr.h"
#include "lpc17xx_pinsel.h"
#include "lpc17xx_libcfg_default.h"

Go to the source code of this file.

Functions

FlagStatus | TIM_GetIntStatus (LPC_TIM_TypeDef *TIMx, TIM_INT_TYPE IntFlag)
Get Interrupt Status.
FlagStatus | TIM_GetIntCaptureStatus (LPC_TIM_TypeDef *TIMx, TIM_INT_TYPE IntFlag)
Get Capture Interrupt Status.
void | TIM_ClearIntPending (LPC_TIM_TypeDef *TIMx, TIM_INT_TYPE IntFlag)
Clear Interrupt pending.
void | TIM_ClearIntCapturePending (LPC_TIM_TypeDef *TIMx, TIM_INT_TYPE IntFlag)
Clear Capture Interrupt pending.
void | TIM_ConfigStructInit (TIM_MODE_OPT TimerCounterMode, void *TIM_ConfigStruct)
Configuration for Timer at initial time.
void | TIM_Init (LPC_TIM_TypeDef *TIMx, TIM_MODE_OPT TimerCounterMode, void *TIM_ConfigStruct)
Initial Timer/Counter device Set Clock frequency for Timer Set initial configuration for Timer.
void | TIM_DeInit (LPC_TIM_TypeDef *TIMx)
Close Timer/Counter device.
void | TIM_Cmd (LPC_TIM_TypeDef *TIMx, FunctionalState NewState)
Start/Stop Timer/Counter device.
void | TIM_ResetCounter (LPC_TIM_TypeDef *TIMx)
Reset Timer/Counter device, Make TC and PC are synchronously reset on the next positive edge of PCLK.
void | TIM_ConfigMatch (LPC_TIM_TypeDef *TIMx, TIM_MATCHCFG_Type *TIM_MatchConfigStruct)
Configuration for Match register.
void | TIM_UpdateMatchValue (LPC_TIM_TypeDef *TIMx, uint8_t MatchChannel, uint32_t MatchValue)
Update Match value.
void | TIM_ConfigCapture (LPC_TIM_TypeDef *TIMx, TIM_CAPTURECFG_Type *TIM_CaptureConfigStruct)
Configuration for Capture register.
uint32_t | TIM_GetCaptureValue (LPC_TIM_TypeDef *TIMx, TIM_COUNTER_INPUT_OPT CaptureChannel)
Read value of capture register in timer/counter device.

Detailed Description

Contains all functions support for Timer firmware library on LPC17xx.

Version:
3.1
Date:
10. March. 2011
Author:
NXP MCU SW Application Team
Copyright(C) 2011, NXP Semiconductor All rights reserved.

Software that is described herein is for illustrative purposes only which provides customers with programming information regarding the products. This software is supplied "AS IS" without any warranties. NXP Semiconductors assumes no responsibility or liability for the use of the software, conveys no license or title under any patent, copyright, or mask work right to the product. NXP Semiconductors reserves the right to make changes in the software without notification. NXP Semiconductors also make no representation or warranty that such application will be suitable for the specified use without further testing or modification.

Definition in file lpc17xx_timer.c.

Generated on Tue Jun 7 14:59:09 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Drivers/source/lpc17xx_uart.c File Reference

C:/nxpdrv/LPC1700CMSIS/Drivers/source/lpc17xx_uart.c File Reference

Contains all functions support for UART firmware library on LPC17xx. More...

#include "lpc17xx_uart.h"
#include "lpc17xx_clkpwr.h"
#include "lpc17xx_libcfg_default.h"

Go to the source code of this file.

Functions

void | UART_Init (LPC_UART_TypeDef *UARTx, UART_CFG_Type *UART_ConfigStruct)
Initializes the UARTx peripheral according to the specified parameters in the UART_ConfigStruct.
void | UART_DeInit (LPC_UART_TypeDef *UARTx)
De-initializes the UARTx peripheral registers to their default reset values.
void | UART_ConfigStructInit (UART_CFG_Type *UART_InitStruct)
Fills each UART_InitStruct member with its default value:
  • 9600 bps
  • 8-bit data
  • 1 Stopbit
  • None Parity.

void | UART_SendByte (LPC_UART_TypeDef *UARTx, uint8_t Data)
Transmit a single data through UART peripheral.
uint8_t | UART_ReceiveByte (LPC_UART_TypeDef *UARTx)
Receive a single data from UART peripheral.
uint32_t | UART_Send (LPC_UART_TypeDef *UARTx, uint8_t *txbuf, uint32_t buflen, TRANSFER_BLOCK_Type flag)
Send a block of data via UART peripheral.
uint32_t | UART_Receive (LPC_UART_TypeDef *UARTx, uint8_t *rxbuf, uint32_t buflen, TRANSFER_BLOCK_Type flag)
Receive a block of data via UART peripheral.
void | UART_ForceBreak (LPC_UART_TypeDef *UARTx)
Force BREAK character on UART line, output pin UARTx TXD is forced to logic 0.
void | UART_IntConfig (LPC_UART_TypeDef *UARTx, UART_INT_Type UARTIntCfg, FunctionalState NewState)
Enable or disable specified UART interrupt.
uint8_t | UART_GetLineStatus (LPC_UART_TypeDef *UARTx)
Get current value of Line Status register in UART peripheral.
uint32_t | UART_GetIntId (LPC_UART_TypeDef *UARTx)
Get Interrupt Identification value.
FlagStatus | UART_CheckBusy (LPC_UART_TypeDef *UARTx)
Check whether if UART is busy or not.
void | UART_FIFOConfig (LPC_UART_TypeDef *UARTx, UART_FIFO_CFG_Type *FIFOCfg)
Configure FIFO function on selected UART peripheral.
void | UART_FIFOConfigStructInit (UART_FIFO_CFG_Type *UART_FIFOInitStruct)
Fills each UART_FIFOInitStruct member with its default value:
  • FIFO_DMAMode = DISABLE
  • FIFO_Level = UART_FIFO_TRGLEV0
  • FIFO_ResetRxBuf = ENABLE
  • FIFO_ResetTxBuf = ENABLE
  • FIFO_State = ENABLE.

void | UART_ABCmd (LPC_UART_TypeDef *UARTx, UART_AB_CFG_Type *ABConfigStruct, FunctionalState NewState)
Start/Stop Auto Baudrate activity.
void | UART_ABClearIntPending (LPC_UART_TypeDef *UARTx, UART_ABEO_Type ABIntType)
Clear Autobaud Interrupt Pending.
void | UART_TxCmd (LPC_UART_TypeDef *UARTx, FunctionalState NewState)
Enable/Disable transmission on UART TxD pin.
void | UART_IrDAInvtInputCmd (LPC_UART_TypeDef *UARTx, FunctionalState NewState)
Enable or disable inverting serial input function of IrDA on UART peripheral.
void | UART_IrDACmd (LPC_UART_TypeDef *UARTx, FunctionalState NewState)
Enable or disable IrDA function on UART peripheral.
void | UART_IrDAPulseDivConfig (LPC_UART_TypeDef *UARTx, UART_IrDA_PULSE_Type PulseDiv)
Configure Pulse divider for IrDA function on UART peripheral.
void | UART_FullModemForcePinState (LPC_UART1_TypeDef *UARTx, UART_MODEM_PIN_Type Pin, UART1_SignalState NewState)
Force pin DTR/RTS corresponding to given state (Full modem mode).
void | UART_FullModemConfigMode (LPC_UART1_TypeDef *UARTx, UART_MODEM_MODE_Type Mode, FunctionalState NewState)
Configure Full Modem mode for UART peripheral.
uint8_t | UART_FullModemGetStatus (LPC_UART1_TypeDef *UARTx)
Get current status of modem status register.
void | UART_RS485Config (LPC_UART1_TypeDef *UARTx, UART1_RS485_CTRLCFG_Type *RS485ConfigStruct)
Configure UART peripheral in RS485 mode according to the specified parameters in the RS485ConfigStruct.
void | UART_RS485ReceiverCmd (LPC_UART1_TypeDef *UARTx, FunctionalState NewState)
Enable/Disable receiver in RS485 module in UART1.
uint32_t | UART_RS485Send (LPC_UART1_TypeDef *UARTx, uint8_t *pDatFrm, uint32_t size, uint8_t ParityStick)
Send data on RS485 bus with specified parity stick value (9-bit mode).
void | UART_RS485SendSlvAddr (LPC_UART1_TypeDef *UARTx, uint8_t SlvAddr)
Send Slave address frames on RS485 bus.
uint32_t | UART_RS485SendData (LPC_UART1_TypeDef *UARTx, uint8_t *pData, uint32_t size)
Send Data frames on RS485 bus.

Detailed Description

Contains all functions support for UART firmware library on LPC17xx.

Version:
3.1
Date:
06. June. 2011
Author:
NXP MCU SW Application Team
Copyright(C) 2011, NXP Semiconductor All rights reserved.

Software that is described herein is for illustrative purposes only which provides customers with programming information regarding the products. This software is supplied "AS IS" without any warranties. NXP Semiconductors assumes no responsibility or liability for the use of the software, conveys no license or title under any patent, copyright, or mask work right to the product. NXP Semiconductors reserves the right to make changes in the software without notification. NXP Semiconductors also make no representation or warranty that such application will be suitable for the specified use without further testing or modification.

Definition in file lpc17xx_uart.c.

Generated on Tue Jun 7 14:59:09 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Drivers/source/lpc17xx_wdt.c File Reference

C:/nxpdrv/LPC1700CMSIS/Drivers/source/lpc17xx_wdt.c File Reference

Contains all functions support for WDT firmware library on LPC17xx. More...

#include "lpc17xx_wdt.h"
#include "lpc17xx_clkpwr.h"
#include "lpc17xx_pinsel.h"
#include "lpc17xx_libcfg_default.h"

Go to the source code of this file.

Functions

void | WDT_Init (WDT_CLK_OPT ClkSrc, WDT_MODE_OPT WDTMode)
Initial for Watchdog function Clock source = RTC ,.
void | WDT_Start (uint32_t TimeOut)
Start WDT activity with given timeout value.
FlagStatus | WDT_ReadTimeOutFlag (void)
Read WDT Time out flag.
void | WDT_ClrTimeOutFlag (void)
Clear WDT Time out flag.
void | WDT_UpdateTimeOut (uint32_t TimeOut)
Update WDT timeout value and feed.
void | WDT_Feed (void)
After set WDTEN, call this function to start Watchdog or reload the Watchdog timer.
uint32_t | WDT_GetCurrentCount (void)
Get the current value of WDT.

Detailed Description

Contains all functions support for WDT firmware library on LPC17xx.

Version:
2.0
Date:
21. May. 2010
Author:
NXP MCU SW Application Team
Copyright(C) 2010, NXP Semiconductor All rights reserved.

Software that is described herein is for illustrative purposes only which provides customers with programming information regarding the products. This software is supplied "AS IS" without any warranties. NXP Semiconductors assumes no responsibility or liability for the use of the software, conveys no license or title under any patent, copyright, or mask work right to the product. NXP Semiconductors reserves the right to make changes in the software without notification. NXP Semiconductors also make no representation or warranty that such application will be suitable for the specified use without further testing or modification.

Definition in file lpc17xx_wdt.c.

Generated on Tue Jun 7 14:59:09 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/ADC/Burst/adc_burst_test.c File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/ADC/Burst/adc_burst_test.c File Reference

#include "lpc17xx_adc.h"
#include "lpc17xx_libcfg.h"
#include "lpc17xx_pinsel.h"
#include "debug_frmwrk.h"
#include "lpc17xx_gpio.h"

Go to the source code of this file.

Defines

#define | MCB_LPC_1768
#define | MCB_LPC17XX_ADC_INJECT_TEST
#define | MCB_LPC_1768_ADC_BURST_MULTI
#define | _ADC_INT ADC_ADINTEN2
#define | _ADC_CHANNEL ADC_CHANNEL_2
#define | _ADC_INT_3 ADC_ADINTEN3
#define | _ADC_CHANNEL_3 ADC_CHANNEL_3
#define | DMA_SIZE 8
#define | GPIO_INT (1<<10)
#define | POLL_LED (1<<4)

Functions

void | print_menu (void)
Print menu.
void | EINT3_IRQHandler (void)
External interrupt 3 handler sub-routine.
int | c_entry (void)
c_entry: Main ADC program body
int | main (void)
void | check_failed (uint8_t *file, uint32_t line)

Variables

uint8_t | menu1 []

Generated on Tue Jun 7 14:59:09 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/ADC/Burst/lpc17xx_libcfg.h File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/ADC/Burst/lpc17xx_libcfg.h File Reference

#include "lpc_types.h"

Go to the source code of this file.

Defines

#define | DEBUG
#define | _DBGFWK
#define | _GPIO
#define | _UART
#define | _UART0
#define | _ADC
#define | CHECK_PARAM(expr) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))

Functions

void | check_failed (uint8_t *file, uint32_t line)

Define Documentation

#define _ADC

Definition at line 92 of file lpc17xx_libcfg.h.

#define _DBGFWK

Definition at line 44 of file lpc17xx_libcfg.h.

#define _GPIO

Definition at line 47 of file lpc17xx_libcfg.h.

#define _UART

Definition at line 53 of file lpc17xx_libcfg.h.

#define _UART0

Definition at line 54 of file lpc17xx_libcfg.h.

#define CHECK_PARAM ( expr ) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))

Definition at line 136 of file lpc17xx_libcfg.h.

#define DEBUG

Definition at line 36 of file lpc17xx_libcfg.h.

Generated on Tue Jun 7 14:59:09 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/ADC/DMA/adc_dma_test.c File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/ADC/DMA/adc_dma_test.c File Reference

This example describes how to use ADC conversions and transfer converted data by using DMA. More...

#include "lpc17xx_adc.h"
#include "lpc17xx_libcfg.h"
#include "lpc17xx_pinsel.h"
#include "lpc17xx_nvic.h"
#include "lpc17xx_gpdma.h"
#include "debug_frmwrk.h"

Go to the source code of this file.

Defines

#define | MCB_LPC_1768
#define | _ADC_INT ADC_ADINTEN2
#define | _ADC_CHANNEL ADC_CHANNEL_2
#define | DMA_SIZE 1

Functions

void | DMA_IRQHandler (void)
GPDMA interrupt handler sub-routine.
void | print_menu (void)
Print menu.
int | c_entry (void)
c_entry: Main ADC program body
int | main (void)
void | check_failed (uint8_t *file, uint32_t line)

Variables

uint8_t | menu1 []
uint8_t | menu2 [] = "ADC value on channel 2: "
__IO uint32_t | Channel0_TC
__IO uint32_t | Channel0_Err

Detailed Description

This example describes how to use ADC conversions and transfer converted data by using DMA.

Version:
2.0
Date:
21. May. 2010
Author:
NXP MCU SW Application Team
Copyright(C) 2010, NXP Semiconductor All rights reserved.

Software that is described herein is for illustrative purposes only which provides customers with programming information regarding the products. This software is supplied "AS IS" without any warranties. NXP Semiconductors assumes no responsibility or liability for the use of the software, conveys no license or title under any patent, copyright, or mask work right to the product. NXP Semiconductors reserves the right to make changes in the software without notification. NXP Semiconductors also make no representation or warranty that such application will be suitable for the specified use without further testing or modification.

Definition in file adc_dma_test.c.

Generated on Tue Jun 7 14:59:11 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/ADC/DMA/lpc17xx_libcfg.h File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/ADC/DMA/lpc17xx_libcfg.h File Reference

#include "lpc_types.h"

Go to the source code of this file.

Defines

#define | DEBUG
#define | _DBGFWK
#define | _UART
#define | _UART0
#define | _GPDMA
#define | _ADC
#define | CHECK_PARAM(expr) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))

Functions

void | check_failed (uint8_t *file, uint32_t line)

Define Documentation

#define _ADC

Definition at line 92 of file lpc17xx_libcfg.h.

#define _DBGFWK

Definition at line 44 of file lpc17xx_libcfg.h.

#define _GPDMA

Definition at line 85 of file lpc17xx_libcfg.h.

#define _UART

Definition at line 53 of file lpc17xx_libcfg.h.

#define _UART0

Definition at line 54 of file lpc17xx_libcfg.h.

#define CHECK_PARAM ( expr ) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))

Definition at line 136 of file lpc17xx_libcfg.h.

#define DEBUG

Definition at line 36 of file lpc17xx_libcfg.h.

Generated on Tue Jun 7 14:59:09 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/ADC/HardwareTrigger/adc_hardware_trigger_test.c File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/ADC/HardwareTrigger/adc_hardware_trigger_test.c File Reference

This example describes how to use ADC conversion in hardware-triggered mode. More...

#include "lpc17xx_adc.h"
#include "lpc17xx_libcfg.h"
#include "lpc17xx_pinsel.h"
#include "debug_frmwrk.h"

Go to the source code of this file.

Defines

#define | _ADC_INT ADC_ADINTEN2
#define | _ADC_CHANNEL ADC_CHANNEL_2

Functions

void | ADC_IRQHandler (void)
ADC interrupt handler sub-routine.
void | print_menu (void)
Print menu.
int | c_entry (void)
c_entry: Main ADC program body
int | main (void)
void | check_failed (uint8_t *file, uint32_t line)

Variables

uint8_t | menu1 []
uint32_t | adc_value

Detailed Description

This example describes how to use ADC conversion in hardware-triggered mode.

Version:
1.0
Date:
18. June. 2010
Author:
NXP MCU SW Application Team
Copyright(C) 2010, NXP Semiconductor All rights reserved.

Software that is described herein is for illustrative purposes only which provides customers with programming information regarding the products. This software is supplied "AS IS" without any warranties. NXP Semiconductors assumes no responsibility or liability for the use of the software, conveys no license or title under any patent, copyright, or mask work right to the product. NXP Semiconductors reserves the right to make changes in the software without notification. NXP Semiconductors also make no representation or warranty that such application will be suitable for the specified use without further testing or modification.

Definition in file adc_hardware_trigger_test.c.

Generated on Tue Jun 7 14:59:11 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/ADC/HardwareTrigger/lpc17xx_libcfg.h File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/ADC/HardwareTrigger/lpc17xx_libcfg.h File Reference

#include "lpc_types.h"

Go to the source code of this file.

Defines

#define | DEBUG
#define | _DBGFWK
#define | _UART
#define | _UART0
#define | _ADC
#define | CHECK_PARAM(expr) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))

Functions

void | check_failed (uint8_t *file, uint32_t line)

Define Documentation

#define _ADC

Definition at line 92 of file lpc17xx_libcfg.h.

#define _DBGFWK

Definition at line 44 of file lpc17xx_libcfg.h.

#define _UART

Definition at line 53 of file lpc17xx_libcfg.h.

#define _UART0

Definition at line 54 of file lpc17xx_libcfg.h.

#define CHECK_PARAM ( expr ) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))

Definition at line 136 of file lpc17xx_libcfg.h.

#define DEBUG

Definition at line 36 of file lpc17xx_libcfg.h.

Generated on Tue Jun 7 14:59:09 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/ADC/INTERRUPT/adc_interrupt_test.c File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/ADC/INTERRUPT/adc_interrupt_test.c File Reference

This example describes how to use ADC conversion in burst mode. More...

#include "lpc17xx_adc.h"
#include "lpc17xx_libcfg.h"
#include "lpc17xx_pinsel.h"
#include "debug_frmwrk.h"

Go to the source code of this file.

Defines

#define | MCB_LPC_1768
#define | _ADC_INT ADC_ADINTEN2
#define | _ADC_CHANNEL ADC_CHANNEL_2

Functions

void | ADC_IRQHandler (void)
ADC interrupt handler sub-routine.
void | print_menu (void)
Print menu.
int | c_entry (void)
c_entry: Main ADC program body
int | main (void)
void | check_failed (uint8_t *file, uint32_t line)

Variables

uint8_t | menu1 []
uint32_t | adc_value

Detailed Description

This example describes how to use ADC conversion in burst mode.

This example describes how to use ADC conversion in interrupt mode.

Version:
2.0
Date:
16. July. 2010
Author:
NXP MCU SW Application Team
Copyright(C) 2010, NXP Semiconductor All rights reserved.

Software that is described herein is for illustrative purposes only which provides customers with programming information regarding the products. This software is supplied "AS IS" without any warranties. NXP Semiconductors assumes no responsibility or liability for the use of the software, conveys no license or title under any patent, copyright, or mask work right to the product. NXP Semiconductors reserves the right to make changes in the software without notification. NXP Semiconductors also make no representation or warranty that such application will be suitable for the specified use without further testing or modification.

Version:
2.0
Date:
21. May. 2010
Author:
NXP MCU SW Application Team
Copyright(C) 2010, NXP Semiconductor All rights reserved.

Software that is described herein is for illustrative purposes only which provides customers with programming information regarding the products. This software is supplied "AS IS" without any warranties. NXP Semiconductors assumes no responsibility or liability for the use of the software, conveys no license or title under any patent, copyright, or mask work right to the product. NXP Semiconductors reserves the right to make changes in the software without notification. NXP Semiconductors also make no representation or warranty that such application will be suitable for the specified use without further testing or modification.

Definition in file adc_interrupt_test.c.

Generated on Tue Jun 7 14:59:11 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/ADC/INTERRUPT/lpc17xx_libcfg.h File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/ADC/INTERRUPT/lpc17xx_libcfg.h File Reference

#include "lpc_types.h"

Go to the source code of this file.

Defines

#define | DEBUG
#define | _DBGFWK
#define | _UART
#define | _UART0
#define | _ADC
#define | CHECK_PARAM(expr) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))

Functions

void | check_failed (uint8_t *file, uint32_t line)

Define Documentation

#define _ADC

Definition at line 92 of file lpc17xx_libcfg.h.

#define _DBGFWK

Definition at line 44 of file lpc17xx_libcfg.h.

#define _UART

Definition at line 53 of file lpc17xx_libcfg.h.

#define _UART0

Definition at line 54 of file lpc17xx_libcfg.h.

#define CHECK_PARAM ( expr ) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))

Definition at line 136 of file lpc17xx_libcfg.h.

#define DEBUG

Definition at line 36 of file lpc17xx_libcfg.h.

Generated on Tue Jun 7 14:59:09 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/ADC/Polling/adc_polling_test.c File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/ADC/Polling/adc_polling_test.c File Reference

This example describes how to use ADC conversion in polling mode. More...

#include "lpc17xx_adc.h"
#include "lpc17xx_libcfg.h"
#include "lpc17xx_pinsel.h"
#include "debug_frmwrk.h"

Go to the source code of this file.

Defines

#define | MCB_LPC_1768
#define | _ADC_INT ADC_ADINTEN2
#define | _ADC_CHANNEL ADC_CHANNEL_2

Functions

void | print_menu (void)
Print menu.
int | c_entry (void)
c_entry: Main ADC program body
int | main (void)
void | check_failed (uint8_t *file, uint32_t line)

Variables

uint8_t | menu1 []

Detailed Description

This example describes how to use ADC conversion in polling mode.

Version:
2.0
Date:
21. May. 2010
Author:
NXP MCU SW Application Team
Copyright(C) 2010, NXP Semiconductor All rights reserved.

Software that is described herein is for illustrative purposes only which provides customers with programming information regarding the products. This software is supplied "AS IS" without any warranties. NXP Semiconductors assumes no responsibility or liability for the use of the software, conveys no license or title under any patent, copyright, or mask work right to the product. NXP Semiconductors reserves the right to make changes in the software without notification. NXP Semiconductors also make no representation or warranty that such application will be suitable for the specified use without further testing or modification.

Definition in file adc_polling_test.c.

Generated on Tue Jun 7 14:59:12 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/ADC/Polling/lpc17xx_libcfg.h File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/ADC/Polling/lpc17xx_libcfg.h File Reference

#include "lpc_types.h"

Go to the source code of this file.

Defines

#define | DEBUG
#define | _DBGFWK
#define | _UART
#define | _UART0
#define | _ADC
#define | CHECK_PARAM(expr) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))

Functions

void | check_failed (uint8_t *file, uint32_t line)

Define Documentation

#define _ADC

Definition at line 92 of file lpc17xx_libcfg.h.

#define _DBGFWK

Definition at line 44 of file lpc17xx_libcfg.h.

#define _UART

Definition at line 53 of file lpc17xx_libcfg.h.

#define _UART0

Definition at line 54 of file lpc17xx_libcfg.h.

#define CHECK_PARAM ( expr ) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))

Definition at line 136 of file lpc17xx_libcfg.h.

#define DEBUG

Definition at line 36 of file lpc17xx_libcfg.h.

Generated on Tue Jun 7 14:59:09 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/CAN/CAN_LedControl/can_ledcontrol.c File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/CAN/CAN_LedControl/can_ledcontrol.c File Reference

This example describes how to use CAN frames to control LED display. More...

#include "lpc17xx_can.h"
#include "lpc17xx_libcfg.h"
#include "lpc17xx_pinsel.h"
#include "debug_frmwrk.h"
#include "lpc17xx_gpio.h"

Go to the source code of this file.

Functions

void | CAN_IRQHandler ()
CAN_IRQ Handler, control receive message operation param[in] none.
void | CAN_InitMessage (void)
Initialize transmit and receive message for Bypass operation.
void | print_menu ()
print menu
int | c_entry (void)
c_entry: Main CAN program body
int | main (void)
void | check_failed (uint8_t *file, uint32_t line)

Variables

uint8_t | menu []
CAN_MSG_Type TXMsg
CAN_MSG_Type RXMsg
uint8_t | LED_Value
uint32_t | LED [8] = {(1<<6),(1<<5),(1<<4),(1<<3),(1<<2),(1<<31),(1<<29),(1<<28)}

Detailed Description

This example describes how to use CAN frames to control LED display.

Version:
1.0
Date:
16. July. 2010
Author:
NXP MCU SW Application Team
Copyright(C) 2010, NXP Semiconductor All rights reserved.

Software that is described herein is for illustrative purposes only which provides customers with programming information regarding the products. This software is supplied "AS IS" without any warranties. NXP Semiconductors assumes no responsibility or liability for the use of the software, conveys no license or title under any patent, copyright, or mask work right to the product. NXP Semiconductors reserves the right to make changes in the software without notification. NXP Semiconductors also make no representation or warranty that such application will be suitable for the specified use without further testing or modification.

Definition in file can_ledcontrol.c.

Generated on Tue Jun 7 14:59:12 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/CAN/CAN_LedControl/lpc17xx_libcfg.h File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/CAN/CAN_LedControl/lpc17xx_libcfg.h File Reference

#include "lpc_types.h"

Go to the source code of this file.

Defines

#define | DEBUG
#define | _DBGFWK
#define | _GPIO
#define | _UART
#define | _UART0
#define | _CAN
#define | CHECK_PARAM(expr) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))

Functions

void | check_failed (uint8_t *file, uint32_t line)

Define Documentation

#define _CAN

Definition at line 115 of file lpc17xx_libcfg.h.

#define _DBGFWK

Definition at line 44 of file lpc17xx_libcfg.h.

#define _GPIO

Definition at line 47 of file lpc17xx_libcfg.h.

#define _UART

Definition at line 53 of file lpc17xx_libcfg.h.

#define _UART0

Definition at line 54 of file lpc17xx_libcfg.h.

#define CHECK_PARAM ( expr ) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))

Definition at line 135 of file lpc17xx_libcfg.h.

#define DEBUG

Definition at line 36 of file lpc17xx_libcfg.h.

Generated on Tue Jun 7 14:59:09 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/CAN/CAN_self_test/can_self_test.c File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/CAN/CAN_self_test/can_self_test.c File Reference

This example used to test Self-test mode. More...

#include "lpc17xx_can.h"
#include "lpc17xx_libcfg.h"
#include "debug_frmwrk.h"

Go to the source code of this file.

Functions

void | CAN_IRQHandler ()
CAN_IRQ Handler, control receive message operation param[in] none.
void | CAN_InitMessage (void)
Initialize transmit and receive message for Bypass operation.
void | PrintMessage (CAN_MSG_Type *CAN_Msg)
Print Message via COM1 param[in] msg: point to CAN_MSG_Type object that will be printed.
void | print_menu ()
print menu
Bool | Check_Message (CAN_MSG_Type *TX_Msg, CAN_MSG_Type *RX_Msg)
Compare two message.
int | c_entry (void)
c_entry: Main CAN program body
int | main (void)
void | check_failed (uint8_t *file, uint32_t line)

Variables

uint8_t | menu []
CAN_MSG_Type TXMsg
CAN_MSG_Type RXMsg
uint32_t | CANRxCount
uint32_t | CANTxCount = 0

Detailed Description

This example used to test Self-test mode.

Version:
1.0
Date:
18. June. 2010
Author:
NXP MCU SW Application Team
Copyright(C) 2010, NXP Semiconductor All rights reserved.

Software that is described herein is for illustrative purposes only which provides customers with programming information regarding the products. This software is supplied "AS IS" without any warranties. NXP Semiconductors assumes no responsibility or liability for the use of the software, conveys no license or title under any patent, copyright, or mask work right to the product. NXP Semiconductors reserves the right to make changes in the software without notification. NXP Semiconductors also make no representation or warranty that such application will be suitable for the specified use without further testing or modification.

Definition in file can_self_test.c.

Generated on Tue Jun 7 14:59:12 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/CAN/CAN_self_test/lpc17xx_libcfg.h File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/CAN/CAN_self_test/lpc17xx_libcfg.h File Reference

#include "lpc_types.h"

Go to the source code of this file.

Defines

#define | DEBUG
#define | _DBGFWK
#define | _GPIO
#define | _UART
#define | _UART0
#define | _CAN
#define | CHECK_PARAM(expr) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))

Functions

void | check_failed (uint8_t *file, uint32_t line)

Define Documentation

#define _CAN

Definition at line 115 of file lpc17xx_libcfg.h.

#define _DBGFWK

Definition at line 44 of file lpc17xx_libcfg.h.

#define _GPIO

Definition at line 47 of file lpc17xx_libcfg.h.

#define _UART

Definition at line 53 of file lpc17xx_libcfg.h.

#define _UART0

Definition at line 54 of file lpc17xx_libcfg.h.

#define CHECK_PARAM ( expr ) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))

Definition at line 135 of file lpc17xx_libcfg.h.

#define DEBUG

Definition at line 36 of file lpc17xx_libcfg.h.

Generated on Tue Jun 7 14:59:09 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/CAN/CAN_test_aflut/can_test_aflut.c File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/CAN/CAN_test_aflut/can_test_aflut.c File Reference

#include "lpc17xx_can.h"
#include "lpc17xx_libcfg.h"
#include "lpc17xx_pinsel.h"
#include "debug_frmwrk.h"

Go to the source code of this file.

Defines

#define | MAX_ENTRY 512
#define | CAN_TX_MSG_CNT 10
#define | CAN_RX_MSG_CNT 5

Functions

void | CAN_IRQHandler (void)
CAN IRQ Handler.
void | CAN_PinCfg (void)
void | CAN_InitMessage (void)
void | CAN_SetupAFTable (void)
Init AF-Look Up Table Sections entry value We setup entries for 5 sections:
  • 6 entries for FullCAN Frame Format Section
  • 6 entries for Explicit Standard ID Frame Format Section
  • 6 entries for Group of Standard ID Frame Format Section
  • 6 entries for Explicit Extended ID Frame Format Section
  • 6 entries for Group of Extended ID Frame Format Section.

void | CAN_InitAFMessage (void)
Init Transmit Message We use 10 message to test Acceptance Filter operation, include:
  • 5 messages that ID exit in 5 AF Sections -> they will be receive
  • 5 messages that ID not exit in 5 AF Sections -> they will be ignored.

void | PrintMessage (CAN_MSG_Type *CAN_Msg)
Print Message via COM1 param[in] msg: point to CAN_MSG_Type object that will be printed.
void | print_menu ()
print menu
void | CAN_ChangeAFTable (void)
Change AFLUT table.
int | c_entry (void)
c_entry: Main CAN program body
int | main (void)
void | check_failed (uint8_t *file, uint32_t line)

Variables

uint8_t | menu []
CAN_MSG_Type | AFTxMsg [CAN_TX_MSG_CNT]
CAN_MSG_Type | AFRxMsg [CAN_RX_MSG_CNT]
uint32_t | CANRxCount = 0
uint32_t | CANTxCount = 0
uint32_t | CANErrCount = 0
AF_SectionDef AFTable
FullCAN_Entry | FullCAN_Table [6]
SFF_Entry | SFF_Table [6]
SFF_GPR_Entry | SFF_GPR_Table [6]
EFF_Entry | EFF_Table [6]
EFF_GPR_Entry | EFF_GPR_Table [6]

Generated on Tue Jun 7 14:59:12 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/CAN/CAN_test_aflut/lpc17xx_libcfg.h File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/CAN/CAN_test_aflut/lpc17xx_libcfg.h File Reference

#include "lpc_types.h"

Go to the source code of this file.

Defines

#define | DEBUG
#define | _DBGFWK
#define | _UART
#define | _UART0
#define | _CAN
#define | CHECK_PARAM(expr) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))

Functions

void | check_failed (uint8_t *file, uint32_t line)

Define Documentation

#define _CAN

Definition at line 115 of file lpc17xx_libcfg.h.

#define _DBGFWK

Definition at line 44 of file lpc17xx_libcfg.h.

#define _UART

Definition at line 53 of file lpc17xx_libcfg.h.

#define _UART0

Definition at line 54 of file lpc17xx_libcfg.h.

#define CHECK_PARAM ( expr ) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))

Definition at line 135 of file lpc17xx_libcfg.h.

#define DEBUG

Definition at line 36 of file lpc17xx_libcfg.h.

Generated on Tue Jun 7 14:59:09 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/CAN/CAN_test_bypass_mode/can_test_bypass_mode.c File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/CAN/CAN_test_bypass_mode/can_test_bypass_mode.c File Reference

This example used to test Bypass mode. More...

#include "lpc17xx_can.h"
#include "lpc17xx_libcfg.h"
#include "lpc17xx_pinsel.h"
#include "debug_frmwrk.h"

Go to the source code of this file.

Functions

void | CAN_IRQHandler ()
CAN_IRQ Handler, control receive message operation param[in] none.
void | CAN_InitMessage (void)
Initialize transmit and receive message for Bypass operation.
void | PrintMessage (CAN_MSG_Type *CAN_Msg)
Print Message via COM1 param[in] msg: point to CAN_MSG_Type object that will be printed.
void | print_menu ()
print menu
int | c_entry (void)
c_entry: Main CAN program body
int | main (void)
void | check_failed (uint8_t *file, uint32_t line)

Variables

uint8_t | menu []
CAN_MSG_Type TXMsg
CAN_MSG_Type RXMsg
uint32_t | CANRxCount
uint32_t | CANTxCount = 0

Detailed Description

This example used to test Bypass mode.

Version:
2.0
Date:
21. May. 2010
Author:
NXP MCU SW Application Team
Copyright(C) 2010, NXP Semiconductor All rights reserved.

Software that is described herein is for illustrative purposes only which provides customers with programming information regarding the products. This software is supplied "AS IS" without any warranties. NXP Semiconductors assumes no responsibility or liability for the use of the software, conveys no license or title under any patent, copyright, or mask work right to the product. NXP Semiconductors reserves the right to make changes in the software without notification. NXP Semiconductors also make no representation or warranty that such application will be suitable for the specified use without further testing or modification.

Definition in file can_test_bypass_mode.c.

Generated on Tue Jun 7 14:59:12 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/CAN/CAN_test_bypass_mode/lpc17xx_libcfg.h File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/CAN/CAN_test_bypass_mode/lpc17xx_libcfg.h File Reference

#include "lpc_types.h"

Go to the source code of this file.

Defines

#define | DEBUG
#define | _DBGFWK
#define | _UART
#define | _UART0
#define | _CAN
#define | CHECK_PARAM(expr) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))

Functions

void | check_failed (uint8_t *file, uint32_t line)

Define Documentation

#define _CAN

Definition at line 115 of file lpc17xx_libcfg.h.

#define _DBGFWK

Definition at line 44 of file lpc17xx_libcfg.h.

#define _UART

Definition at line 53 of file lpc17xx_libcfg.h.

#define _UART0

Definition at line 54 of file lpc17xx_libcfg.h.

#define CHECK_PARAM ( expr ) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))

Definition at line 136 of file lpc17xx_libcfg.h.

#define DEBUG

Definition at line 36 of file lpc17xx_libcfg.h.

Generated on Tue Jun 7 14:59:09 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/CAN/CAN_test_two_kit/can_test_two_kit.c File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/CAN/CAN_test_two_kit/can_test_two_kit.c File Reference

This example used to CAN operation in two board. More...

#include "lpc17xx_can.h"
#include "lpc17xx_libcfg.h"
#include "lpc17xx_pinsel.h"
#include "debug_frmwrk.h"

Go to the source code of this file.

Defines

#define | CAN_TRANSMIT 1
#define | CAN_RECEIVE !CAN_TRANSMIT
#define | TX_BUFFER_SIZE 4
#define | RX_BUFFER_SIZE 2

Functions

void | CAN_IRQHandler ()
CAN_IRQ Handler, control receive message operation param[in] none.
void | CAN_InitMessage (void)
Bool | CAN_VerifyMessage (CAN_MSG_Type Msg1, CAN_MSG_Type Msg2)
CAN_ERROR | CAN_SetupAFTable (void)
Setup Acceptance Filter Table.
void | CAN_InitAFMessage (void)
Initialize transmit and receive message for testing AF operation.
void | PrintMessage (CAN_MSG_Type *CAN_Msg)
Print Message via COM1 param[in] msg: point to CAN_MSG_Type object that will be printed.
void | print_menu (void)
print menu
int | c_entry (void)
c_entry: Main CAN program body
int | main (void)
void | check_failed (uint8_t *file, uint32_t line)

Variables

uint8_t | menu []
CAN_MSG_Type TXMsg
CAN_MSG_Type RXMsg
CAN_MSG_Type | AFTxMsg [TX_BUFFER_SIZE]
CAN_MSG_Type | AFRxMsg [RX_BUFFER_SIZE]
uint32_t | CANRxCount = 0
uint32_t | CANTxCount = 0
uint32_t | CANErrCount = 0

Detailed Description

This example used to CAN operation in two board.

Version:
2.0
Date:
21. May. 2010
Author:
NXP MCU SW Application Team
Copyright(C) 2010, NXP Semiconductor All rights reserved.

Software that is described herein is for illustrative purposes only which provides customers with programming information regarding the products. This software is supplied "AS IS" without any warranties. NXP Semiconductors assumes no responsibility or liability for the use of the software, conveys no license or title under any patent, copyright, or mask work right to the product. NXP Semiconductors reserves the right to make changes in the software without notification. NXP Semiconductors also make no representation or warranty that such application will be suitable for the specified use without further testing or modification.

Definition in file can_test_two_kit.c.

Generated on Tue Jun 7 14:59:12 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/CAN/CAN_test_two_kit/lpc17xx_libcfg.h File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/CAN/CAN_test_two_kit/lpc17xx_libcfg.h File Reference

#include "lpc_types.h"

Go to the source code of this file.

Defines

#define | DEBUG
#define | _DBGFWK
#define | _UART
#define | _UART0
#define | _CAN
#define | CHECK_PARAM(expr) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))

Functions

void | check_failed (uint8_t *file, uint32_t line)

Define Documentation

#define _CAN

Definition at line 115 of file lpc17xx_libcfg.h.

#define _DBGFWK

Definition at line 44 of file lpc17xx_libcfg.h.

#define _UART

Definition at line 53 of file lpc17xx_libcfg.h.

#define _UART0

Definition at line 54 of file lpc17xx_libcfg.h.

#define CHECK_PARAM ( expr ) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))

Definition at line 136 of file lpc17xx_libcfg.h.

#define DEBUG

Definition at line 36 of file lpc17xx_libcfg.h.

Generated on Tue Jun 7 14:59:09 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/Cortex-M3/Bit-banding/bitband.c File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/Cortex-M3/Bit-banding/bitband.c File Reference

This example used to test bit-banding feature of Cortex-M3 processor. More...

#include "lpc17xx_libcfg.h"
#include "debug_frmwrk.h"

Go to the source code of this file.

Defines

#define | BITBAND_SRAM_REF 0x20000000
#define | BITBAND_SRAM_BASE 0x22000000
#define | BITBAND_SRAM(a, b) ((BITBAND_SRAM_BASE + ((a-BITBAND_SRAM_REF)<<5) + (b<<2)))
#define | BITBAND_PERI_REF 0x40000000
#define | BITBAND_PERI_BASE 0x42000000
#define | BITBAND_PERI(a, b) ((BITBAND_PERI_BASE + ((a-BITBAND_PERI_REF)<<5) + (b<<2)))
#define | BITBAND_SRAM_ClearBit(a, b) (*(volatile uint32_t *) (BITBAND_SRAM(a,b)) = 0)
#define | BITBAND_SRAM_SetBit(a, b) (*(volatile uint32_t *) (BITBAND_SRAM(a,b)) = 1)
#define | BITBAND_SRAM_GetBit(a, b) (*(volatile uint32_t *) (BITBAND_SRAM(a,b)))
#define | BITBAND_PERI_ClearBit(a, b) (*(volatile uint32_t *) (BITBAND_PERI(a,b)) = 0)
#define | BITBAND_PERI_SetBit(a, b) (*(volatile uint32_t *) (BITBAND_PERI(a,b)) = 1)
#define | BITBAND_PERI_GetBit(a, b) (*(volatile uint32_t *) (BITBAND_PERI(a,b)))
#define | VAR_ADDRESS 0x2007C000
#define | VAR_BIT 3
#define | PERI_ADDRESS 0x40020000
#define | PERI_BIT 5

Functions

int | c_entry (void)
c_entry: main function
int | main (void)
void | check_failed (uint8_t *file, uint32_t line)

Variables

uint8_t | menu []

Detailed Description

This example used to test bit-banding feature of Cortex-M3 processor.

Version:
2.0
Date:
21. May. 2010
Author:
NXP MCU SW Application Team
Copyright(C) 2010, NXP Semiconductor All rights reserved.

Software that is described herein is for illustrative purposes only which provides customers with programming information regarding the products. This software is supplied "AS IS" without any warranties. NXP Semiconductors assumes no responsibility or liability for the use of the software, conveys no license or title under any patent, copyright, or mask work right to the product. NXP Semiconductors reserves the right to make changes in the software without notification. NXP Semiconductors also make no representation or warranty that such application will be suitable for the specified use without further testing or modification.

Definition in file bitband.c.

Generated on Tue Jun 7 14:59:12 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/Cortex-M3/Bit-banding/lpc17xx_libcfg.h File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/Cortex-M3/Bit-banding/lpc17xx_libcfg.h File Reference

#include "lpc_types.h"

Go to the source code of this file.

Defines

#define | DEBUG
#define | _DBGFWK
#define | _UART
#define | _UART0
#define | CHECK_PARAM(expr) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))

Functions

void | check_failed (uint8_t *file, uint32_t line)

Define Documentation

#define _DBGFWK

Definition at line 43 of file lpc17xx_libcfg.h.

#define _UART

Definition at line 52 of file lpc17xx_libcfg.h.

#define _UART0

Definition at line 53 of file lpc17xx_libcfg.h.

#define CHECK_PARAM ( expr ) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))

Definition at line 134 of file lpc17xx_libcfg.h.

#define DEBUG

Definition at line 35 of file lpc17xx_libcfg.h.

Generated on Tue Jun 7 14:59:09 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/Cortex-M3/MPU/lpc17xx_libcfg.h File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/Cortex-M3/MPU/lpc17xx_libcfg.h File Reference

#include "lpc_types.h"

Go to the source code of this file.

Defines

#define | DEBUG
#define | _DBGFWK
#define | _GPIO
#define | _UART
#define | _UART0
#define | _GPDMA
#define | CHECK_PARAM(expr) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))

Functions

void | check_failed (uint8_t *file, uint32_t line)

Define Documentation

#define _DBGFWK

Definition at line 44 of file lpc17xx_libcfg.h.

#define _GPDMA

Definition at line 84 of file lpc17xx_libcfg.h.

#define _GPIO

Definition at line 47 of file lpc17xx_libcfg.h.

#define _UART

Definition at line 53 of file lpc17xx_libcfg.h.

#define _UART0

Definition at line 54 of file lpc17xx_libcfg.h.

#define CHECK_PARAM ( expr ) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))

Definition at line 135 of file lpc17xx_libcfg.h.

#define DEBUG

Definition at line 36 of file lpc17xx_libcfg.h.

Generated on Tue Jun 7 14:59:09 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/Cortex-M3/MPU/mpu_test.c File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/Cortex-M3/MPU/mpu_test.c File Reference

#include "lpc17xx_libcfg.h"
#include "lpc17xx_pinsel.h"
#include "debug_frmwrk.h"
#include "lpc17xx_gpio.h"

Go to the source code of this file.

Defines

#define | MPU_REGION_SIZE_32B 0x04
#define | MPU_REGION_SIZE_64B 0x05
#define | MPU_REGION_SIZE_128B 0x06
#define | MPU_REGION_SIZE_256B 0x07
#define | MPU_REGION_SIZE_512B 0x08
#define | MPU_REGION_SIZE_1KB 0x09
#define | MPU_REGION_SIZE_2KB 0x0A
#define | MPU_REGION_SIZE_4KB 0x0B
#define | MPU_REGION_SIZE_8KB 0x0C
#define | MPU_REGION_SIZE_16KB 0x0D
#define | MPU_REGION_SIZE_32KB 0x0E
#define | MPU_REGION_SIZE_64KB 0x0F
#define | MPU_REGION_SIZE_128KB 0x10
#define | MPU_REGION_SIZE_256KB 0x11
#define | MPU_REGION_SIZE_512KB 0x12
#define | MPU_REGION_SIZE_1MB 0x13
#define | MPU_REGION_SIZE_2MB 0x14
#define | MPU_REGION_SIZE_4MB 0x15
#define | MPU_REGION_SIZE_8MB 0x16
#define | MPU_REGION_SIZE_16MB 0x17
#define | MPU_REGION_SIZE_32MB 0x18
#define | MPU_REGION_SIZE_64MB 0x19
#define | MPU_REGION_SIZE_128MB 0x1A
#define | MPU_REGION_SIZE_256MB 0x1B
#define | MPU_REGION_SIZE_512MB 0x1C
#define | MPU_REGION_SIZE_1GB 0x1D
#define | MPU_REGION_SIZE_2GB 0x1E
#define | MPU_REGION_SIZE_4GB 0x1F
#define | MPU_NO_ACCESS 0x00
#define | MPU_PRIVILEGED_ACESS_USER_NO_ACCESS 0x01
#define | MPU_PRIVILEGED_RW_USER_READ_ONLY 0x02
#define | MPU_FULL_ACCESS 0x03
#define | MPU_UNPREDICTABLE 0x04
#define | MPU_PRIVILEGED_READ_ONLY_USER_NO_ACCESS 0x05
#define | MPU_READ_ONLY 0x06
#define | MPU_RASR_REGION_SIZE(n) ((uint32_t)(n<<1))
#define | MPU_RASR_ACCESS_PERMISSION(n) ((uint32_t)(n<<24))
#define | MPU_REGION_ENABLE ((uint32_t)(1<<0))

Functions

void | MemManage_Handler (void)
Memory Management interrupt handler sub-routine.
int | c_entry (void)
c_entry: Main MPU program body
int | main (void)
void | check_failed (uint8_t *file, uint32_t line)

Variables

uint8_t | menu []
Bool | Led_State = FALSE

Define Documentation

#define MPU_FULL_ACCESS 0x03

Definition at line 65 of file mpu_test.c.

#define MPU_NO_ACCESS 0x00

Definition at line 62 of file mpu_test.c.

#define MPU_PRIVILEGED_ACESS_USER_NO_ACCESS 0x01

Definition at line 63 of file mpu_test.c.

#define MPU_PRIVILEGED_READ_ONLY_USER_NO_ACCESS 0x05

Definition at line 67 of file mpu_test.c.

#define MPU_PRIVILEGED_RW_USER_READ_ONLY 0x02

Definition at line 64 of file mpu_test.c.

#define MPU_RASR_ACCESS_PERMISSION ( n ) ((uint32_t)(n<<24))

Definition at line 72 of file mpu_test.c.

#define MPU_RASR_REGION_SIZE ( n ) ((uint32_t)(n<<1))

Definition at line 71 of file mpu_test.c.

#define MPU_READ_ONLY 0x06

Definition at line 68 of file mpu_test.c.

#define MPU_REGION_ENABLE ((uint32_t)(1<<0))

Definition at line 73 of file mpu_test.c.

#define MPU_REGION_SIZE_128B 0x06

Definition at line 34 of file mpu_test.c.

#define MPU_REGION_SIZE_128KB 0x10

Definition at line 44 of file mpu_test.c.

#define MPU_REGION_SIZE_128MB 0x1A

Definition at line 54 of file mpu_test.c.

#define MPU_REGION_SIZE_16KB 0x0D

Definition at line 41 of file mpu_test.c.

#define MPU_REGION_SIZE_16MB 0x17

Definition at line 51 of file mpu_test.c.

#define MPU_REGION_SIZE_1GB 0x1D

Definition at line 57 of file mpu_test.c.

#define MPU_REGION_SIZE_1KB 0x09

Definition at line 37 of file mpu_test.c.

#define MPU_REGION_SIZE_1MB 0x13

Definition at line 47 of file mpu_test.c.

#define MPU_REGION_SIZE_256B 0x07

Definition at line 35 of file mpu_test.c.

#define MPU_REGION_SIZE_256KB 0x11

Definition at line 45 of file mpu_test.c.

#define MPU_REGION_SIZE_256MB 0x1B

Definition at line 55 of file mpu_test.c.

#define MPU_REGION_SIZE_2GB 0x1E

Definition at line 58 of file mpu_test.c.

#define MPU_REGION_SIZE_2KB 0x0A

Definition at line 38 of file mpu_test.c.

#define MPU_REGION_SIZE_2MB 0x14

Definition at line 48 of file mpu_test.c.

#define MPU_REGION_SIZE_32B 0x04

Definition at line 32 of file mpu_test.c.

#define MPU_REGION_SIZE_32KB 0x0E

Definition at line 42 of file mpu_test.c.

#define MPU_REGION_SIZE_32MB 0x18

Definition at line 52 of file mpu_test.c.

#define MPU_REGION_SIZE_4GB 0x1F

Definition at line 59 of file mpu_test.c.

#define MPU_REGION_SIZE_4KB 0x0B

Definition at line 39 of file mpu_test.c.

#define MPU_REGION_SIZE_4MB 0x15

Definition at line 49 of file mpu_test.c.

#define MPU_REGION_SIZE_512B 0x08

Definition at line 36 of file mpu_test.c.

#define MPU_REGION_SIZE_512KB 0x12

Definition at line 46 of file mpu_test.c.

#define MPU_REGION_SIZE_512MB 0x1C

Definition at line 56 of file mpu_test.c.

#define MPU_REGION_SIZE_64B 0x05

Definition at line 33 of file mpu_test.c.

#define MPU_REGION_SIZE_64KB 0x0F

Definition at line 43 of file mpu_test.c.

#define MPU_REGION_SIZE_64MB 0x19

Definition at line 53 of file mpu_test.c.

#define MPU_REGION_SIZE_8KB 0x0C

Definition at line 40 of file mpu_test.c.

#define MPU_REGION_SIZE_8MB 0x16

Definition at line 50 of file mpu_test.c.

#define MPU_UNPREDICTABLE 0x04

Definition at line 66 of file mpu_test.c.

Generated on Tue Jun 7 14:59:12 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/Cortex-M3/Privilege_mode/lpc17xx_libcfg.h File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/Cortex-M3/Privilege_mode/lpc17xx_libcfg.h File Reference

#include "lpc_types.h"

Go to the source code of this file.

Defines

#define | DEBUG
#define | _DBGFWK
#define | _GPIO
#define | _UART
#define | _UART0
#define | CHECK_PARAM(expr) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))

Functions

void | check_failed (uint8_t *file, uint32_t line)

Define Documentation

#define _DBGFWK

Definition at line 44 of file lpc17xx_libcfg.h.

#define _GPIO

Definition at line 47 of file lpc17xx_libcfg.h.

#define _UART

Definition at line 53 of file lpc17xx_libcfg.h.

#define _UART0

Definition at line 54 of file lpc17xx_libcfg.h.

#define CHECK_PARAM ( expr ) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))

Definition at line 135 of file lpc17xx_libcfg.h.

#define DEBUG

Definition at line 36 of file lpc17xx_libcfg.h.

Generated on Tue Jun 7 14:59:09 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/Cortex-M3/Privilege_mode/privilege.c File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/Cortex-M3/Privilege_mode/privilege.c File Reference

This example used to test privilege feature of Cortex-M3 processor. More...

#include "lpc17xx_libcfg.h"
#include "debug_frmwrk.h"
#include "lpc17xx_gpio.h"

Go to the source code of this file.

Defines

#define | IAR_LPC_1768
#define | THREAD_PRIVILEGED 0
#define | THREAD_UNPRIVILEGED 1
#define | THREAD_PRIVILEDGED_MASK 0xFFFFFFFE
#define | PRIVILEGE_LED 25
#define | PRIVILEGE_LEDPORT 1
#define | UNPRIVILEGE_LED 4
#define | UNPRIVILEGE_LEDPORT 0

Functions

void | SVC_Handler (void)
SVC Hander.
void | LED_Init (void)
Initialize LED.
void | Turn_on_LED (uint8_t Led_num)
Turn on LED.
void | Turn_off_LED (uint8_t Led_num)
Turn off LED.
int | c_entry (void)
c_entry: main function
int | main (void)
void | check_failed (uint8_t *file, uint32_t line)

Variables

uint8_t | menu []
uint8_t | menu2 []

Detailed Description

This example used to test privilege feature of Cortex-M3 processor.

Version:
1.0
Date:
18. July. 2010
Author:
NXP MCU SW Application Team
Copyright(C) 2010, NXP Semiconductor All rights reserved.

Software that is described herein is for illustrative purposes only which provides customers with programming information regarding the products. This software is supplied "AS IS" without any warranties. NXP Semiconductors assumes no responsibility or liability for the use of the software, conveys no license or title under any patent, copyright, or mask work right to the product. NXP Semiconductors reserves the right to make changes in the software without notification. NXP Semiconductors also make no representation or warranty that such application will be suitable for the specified use without further testing or modification.

Definition in file privilege.c.

Generated on Tue Jun 7 14:59:12 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/DAC/DMA/dac_dma.c File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/DAC/DMA/dac_dma.c File Reference

This example describes how to use DAC conversion and using DMA to transfer data. More...

#include "lpc17xx_dac.h"
#include "lpc17xx_libcfg.h"
#include "lpc17xx_pinsel.h"
#include "lpc17xx_gpdma.h"

Go to the source code of this file.

Defines

#define | DMA_SIZE 1

Functions

void | DMA_IRQHandler (void)
GPDMA interrupt handler sub-routine.
int | c_entry (void)
c_entry: Main DAC program body
int | main (void)
void | check_failed (uint8_t *file, uint32_t line)

Variables

__IO uint32_t | Channel0_TC
__IO uint32_t | Channel0_Err
GPDMA_Channel_CFG_Type GPDMACfg

Detailed Description

This example describes how to use DAC conversion and using DMA to transfer data.

Version:
2.0
Date:
21. May. 2010
Author:
NXP MCU SW Application Team
Copyright(C) 2010, NXP Semiconductor All rights reserved.

Software that is described herein is for illustrative purposes only which provides customers with programming information regarding the products. This software is supplied "AS IS" without any warranties. NXP Semiconductors assumes no responsibility or liability for the use of the software, conveys no license or title under any patent, copyright, or mask work right to the product. NXP Semiconductors reserves the right to make changes in the software without notification. NXP Semiconductors also make no representation or warranty that such application will be suitable for the specified use without further testing or modification.

Definition in file dac_dma.c.

Generated on Tue Jun 7 14:59:12 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/DAC/DMA/lpc17xx_libcfg.h File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/DAC/DMA/lpc17xx_libcfg.h File Reference

#include "lpc_types.h"

Go to the source code of this file.

Defines

#define | DEBUG
#define | _GPDMA
#define | _DAC
#define | CHECK_PARAM(expr) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))

Functions

void | check_failed (uint8_t *file, uint32_t line)

Define Documentation

#define _DAC

Definition at line 88 of file lpc17xx_libcfg.h.

#define _GPDMA

Definition at line 84 of file lpc17xx_libcfg.h.

#define CHECK_PARAM ( expr ) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))

Definition at line 134 of file lpc17xx_libcfg.h.

#define DEBUG

Definition at line 36 of file lpc17xx_libcfg.h.

Generated on Tue Jun 7 14:59:09 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/DAC/SineWave/dac_sinewave_test.c File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/DAC/SineWave/dac_sinewave_test.c File Reference

This example describes how to use DAC to generate a sine wave using DMA to transfer data. More...

#include "lpc17xx_dac.h"
#include "lpc17xx_libcfg.h"
#include "lpc17xx_pinsel.h"
#include "lpc17xx_gpdma.h"

Go to the source code of this file.

Defines

#define | DMA_SIZE 60
#define | NUM_SINE_SAMPLE 60
#define | SINE_FREQ_IN_HZ 60
#define | PCLK_DAC_IN_MHZ 25

Functions

int | c_entry (void)
c_entry: Main DAC program body
int | main (void)
void | check_failed (uint8_t *file, uint32_t line)

Variables

GPDMA_Channel_CFG_Type GPDMACfg

Detailed Description

This example describes how to use DAC to generate a sine wave using DMA to transfer data.

Version:
2.0
Date:
04. June. 2010
Author:
NXP MCU SW Application Team
Copyright(C) 2010, NXP Semiconductor All rights reserved.

Software that is described herein is for illustrative purposes only which provides customers with programming information regarding the products. This software is supplied "AS IS" without any warranties. NXP Semiconductors assumes no responsibility or liability for the use of the software, conveys no license or title under any patent, copyright, or mask work right to the product. NXP Semiconductors reserves the right to make changes in the software without notification. NXP Semiconductors also make no representation or warranty that such application will be suitable for the specified use without further testing or modification.

Definition in file dac_sinewave_test.c.

Generated on Tue Jun 7 14:59:12 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/DAC/SineWave/lpc17xx_libcfg.h File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/DAC/SineWave/lpc17xx_libcfg.h File Reference

#include "lpc_types.h"

Go to the source code of this file.

Defines

#define | DEBUG
#define | _GPDMA
#define | _DAC
#define | CHECK_PARAM(expr) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))

Functions

void | check_failed (uint8_t *file, uint32_t line)

Define Documentation

#define _DAC

Definition at line 88 of file lpc17xx_libcfg.h.

#define _GPDMA

Definition at line 84 of file lpc17xx_libcfg.h.

#define CHECK_PARAM ( expr ) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))

Definition at line 134 of file lpc17xx_libcfg.h.

#define DEBUG

Definition at line 36 of file lpc17xx_libcfg.h.

Generated on Tue Jun 7 14:59:09 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/DAC/Speaker/dac_speaker.c File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/DAC/Speaker/dac_speaker.c File Reference

This example used to test DAC peripheral through speaker. More...

#include "lpc17xx_dac.h"
#include "lpc17xx_libcfg.h"
#include "lpc17xx_pinsel.h"
#include "debug_frmwrk.h"

Go to the source code of this file.

Functions

int | c_entry (void)
c_entry: Main DAC program body
int | main (void)
void | check_failed (uint8_t *file, uint32_t line)

Detailed Description

This example used to test DAC peripheral through speaker.

Version:
1.0
Date:
16. July. 2010
Author:
NXP MCU SW Application Team
Copyright(C) 2010, NXP Semiconductor All rights reserved.

Software that is described herein is for illustrative purposes only which provides customers with programming information regarding the products. This software is supplied "AS IS" without any warranties. NXP Semiconductors assumes no responsibility or liability for the use of the software, conveys no license or title under any patent, copyright, or mask work right to the product. NXP Semiconductors reserves the right to make changes in the software without notification. NXP Semiconductors also make no representation or warranty that such application will be suitable for the specified use without further testing or modification.

Version:
2.0
Date:
21. May. 2010
Author:
NXP MCU SW Application Team
Copyright(C) 2010, NXP Semiconductor All rights reserved.

Software that is described herein is for illustrative purposes only which provides customers with programming information regarding the products. This software is supplied "AS IS" without any warranties. NXP Semiconductors assumes no responsibility or liability for the use of the software, conveys no license or title under any patent, copyright, or mask work right to the product. NXP Semiconductors reserves the right to make changes in the software without notification. NXP Semiconductors also make no representation or warranty that such application will be suitable for the specified use without further testing or modification.

Definition in file dac_speaker.c.

Generated on Tue Jun 7 14:59:12 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/DAC/Speaker/lpc17xx_libcfg.h File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/DAC/Speaker/lpc17xx_libcfg.h File Reference

#include "lpc_types.h"

Go to the source code of this file.

Defines

#define | DEBUG
#define | _DAC
#define | CHECK_PARAM(expr) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))

Functions

void | check_failed (uint8_t *file, uint32_t line)

Define Documentation

#define _DAC

Definition at line 88 of file lpc17xx_libcfg.h.

#define CHECK_PARAM ( expr ) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))

Definition at line 135 of file lpc17xx_libcfg.h.

#define DEBUG

Definition at line 36 of file lpc17xx_libcfg.h.

Generated on Tue Jun 7 14:59:09 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/DAC/WaveGenerate/dac_wave_generate.c File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/DAC/WaveGenerate/dac_wave_generate.c File Reference

This example describes how to use DAC to generate a sine wave, triangle wave or escalator wave. More...

#include "lpc17xx_dac.h"
#include "lpc17xx_libcfg.h"
#include "lpc17xx_pinsel.h"
#include "lpc17xx_gpdma.h"
#include "debug_frmwrk.h"

Go to the source code of this file.

Defines

#define | DMA_SIZE_SINE 60
#define | NUM_SAMPLE_SINE 60
#define | DMA_SIZE 64
#define | NUM_SAMPLE 64
#define | SIGNAL_FREQ_IN_HZ 60
#define | PCLK_DAC_IN_MHZ 25
#define | DAC_GENERATE_SINE 1
#define | DAC_GENERATE_TRIANGLE 2
#define | DAC_GENERATE_ESCALATOR 3
#define | DAC_GENERATE_NONE 0

Functions

void | print_menu (void)
Print menu.
int | c_entry (void)
c_entry: Main DAC program body
int | main (void)
void | check_failed (uint8_t *file, uint32_t line)

Variables

uint8_t | menu1 []

Detailed Description

This example describes how to use DAC to generate a sine wave, triangle wave or escalator wave.

Version:
1.0
Date:
16. July. 2010
Author:
NXP MCU SW Application Team
Copyright(C) 2010, NXP Semiconductor All rights reserved.

Software that is described herein is for illustrative purposes only which provides customers with programming information regarding the products. This software is supplied "AS IS" without any warranties. NXP Semiconductors assumes no responsibility or liability for the use of the software, conveys no license or title under any patent, copyright, or mask work right to the product. NXP Semiconductors reserves the right to make changes in the software without notification. NXP Semiconductors also make no representation or warranty that such application will be suitable for the specified use without further testing or modification.

Definition in file dac_wave_generate.c.

Generated on Tue Jun 7 14:59:12 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/DAC/WaveGenerate/lpc17xx_libcfg.h File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/DAC/WaveGenerate/lpc17xx_libcfg.h File Reference

#include "lpc_types.h"

Go to the source code of this file.

Defines

#define | DEBUG
#define | _DBGFWK
#define | _UART
#define | _UART0
#define | _GPDMA
#define | _DAC
#define | CHECK_PARAM(expr) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))

Functions

void | check_failed (uint8_t *file, uint32_t line)

Define Documentation

#define _DAC

Definition at line 88 of file lpc17xx_libcfg.h.

#define _DBGFWK

Definition at line 44 of file lpc17xx_libcfg.h.

#define _GPDMA

Definition at line 84 of file lpc17xx_libcfg.h.

#define _UART

Definition at line 53 of file lpc17xx_libcfg.h.

#define _UART0

Definition at line 54 of file lpc17xx_libcfg.h.

#define CHECK_PARAM ( expr ) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))

Definition at line 134 of file lpc17xx_libcfg.h.

#define DEBUG

Definition at line 36 of file lpc17xx_libcfg.h.

Generated on Tue Jun 7 14:59:09 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/Easy_Web/ADC.c File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/Easy_Web/ADC.c File Reference

#include "LPC17xx.h"
#include "ADC.h"

Go to the source code of this file.

Functions

void | ADC_init (void)
void | ADC_startCnv (void)
void | ADC_stopCnv (void)
uint32_t | ADC_getCnv (void)

Function Documentation

uint32_t ADC_getCnv ( void )

Definition at line 74 of file ADC.c.

void ADC_init ( void )

Definition at line 26 of file ADC.c.

void ADC_startCnv ( void )

Definition at line 57 of file ADC.c.

void ADC_stopCnv ( void )

Definition at line 66 of file ADC.c.

Generated on Tue Jun 7 14:59:12 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/Easy_Web/ADC.h File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/Easy_Web/ADC.h File Reference

#include "lpc_types.h"

Go to the source code of this file.

Defines

#define | ADC_VALUE_MAX 0xFFF

Functions

void | ADC_init (void)
void | ADC_startCnv (void)
void | ADC_stopCnv (void)
uint32_t | ADC_getCnv (void)

Define Documentation

#define ADC_VALUE_MAX 0xFFF

Definition at line 25 of file ADC.h.

Function Documentation

uint32_t ADC_getCnv ( void )

Definition at line 74 of file ADC.c.

void ADC_init ( void )

Definition at line 26 of file ADC.c.

void ADC_startCnv ( void )

Definition at line 57 of file ADC.c.

void ADC_stopCnv ( void )

Definition at line 66 of file ADC.c.

Generated on Tue Jun 7 14:59:12 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/Easy_Web/easyweb.c File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/Easy_Web/easyweb.c File Reference

#include <stdlib.h>
#include <stdio.h>
#include <string.h>
#include "adc.h"
#include "lpc17xx_libcfg.h"
#include "EMAC.h"
#include "easyweb.h"
#include "tcpip.h"
#include "webpage.h"

Go to the source code of this file.

Defines

#define | extern

Functions

int | main (void)
void | HTTPServer (void)
unsigned int | GetAD7Val (void)
unsigned int | GetTempVal (void)
void | InsertDynamicValues (void)
void | check_failed (uint8_t *file, uint32_t line)

Define Documentation

#define extern

Definition at line 21 of file easyweb.c.

Generated on Tue Jun 7 14:59:12 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/Easy_Web/easyweb.h File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/Easy_Web/easyweb.h File Reference

Go to the source code of this file.

Defines

#define | HTTP_SEND_PAGE 0x01

Functions

void | InitOsc (void)
void | InitPorts (void)
void | HTTPServer (void)
void | InsertDynamicValues (void)
unsigned int | GetAD7Val (void)
unsigned int | GetTempVal (void)

Variables

const unsigned char | GetResponse []
unsigned char * | PWebSide
unsigned int | HTTPBytesToSend
unsigned char | HTTPStatus

Define Documentation

#define HTTP_SEND_PAGE 0x01

Definition at line 35 of file easyweb.h.

Function Documentation

void InitOsc ( void )

void InitPorts ( void )

Variable Documentation

const unsigned char GetResponse[]

Initial value:

{
  "HTTP/1.0 200 OK\r\n"
  "Content-Type: text/html\r\n"
  "\r\n"
}

Definition at line 17 of file easyweb.h.

unsigned int HTTPBytesToSend

Definition at line 32 of file easyweb.h.

unsigned char HTTPStatus

Definition at line 34 of file easyweb.h.

unsigned char* PWebSide

Definition at line 31 of file easyweb.h.

Generated on Tue Jun 7 14:59:12 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/Easy_Web/EMAC.c File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/Easy_Web/EMAC.c File Reference

#include "EMAC.h"
#include "tcpip.h"
#include "lpc17xx_emac.h"
#include "lpc17xx_pinsel.h"
#include "debug_frmwrk.h"
#include <stdio.h>

Go to the source code of this file.

Defines

#define | DB _DBG((uint8_t *)db)

Functions

void | Init_EMAC (void)
unsigned short | ReadFrame_EMAC (void)
unsigned short | ReadFrameBE_EMAC (void)
void | CopyFromFrame_EMAC (void *Dest, unsigned short Size)
void | DummyReadFrame_EMAC (unsigned short Size)
unsigned short | StartReadFrame (void)
void | EndReadFrame (void)
unsigned int | CheckFrameReceived (void)
void | RequestSend (unsigned short FrameSize)
unsigned int | Rdy4Tx (void)
void | WriteFrame_EMAC (unsigned short Data)
void | CopyToFrame_EMAC (void *Source, unsigned int Size)

Variables

char | db [64]

Define Documentation

#define DB _DBG((uint8_t *)db)

Definition at line 26 of file EMAC.c.

Function Documentation

unsigned int CheckFrameReceived ( void )

Definition at line 184 of file EMAC.c.

void CopyFromFrame_EMAC | ( | void * | Dest,
 |  | unsigned short | Size
 | ) |  |

Definition at line 134 of file EMAC.c.

void CopyToFrame_EMAC | ( | void * | Source,
 |  | unsigned int | Size
 | ) |  |

Definition at line 219 of file EMAC.c.

void DummyReadFrame_EMAC ( unsigned short Size )

Definition at line 152 of file EMAC.c.

void EndReadFrame ( void )

Definition at line 178 of file EMAC.c.

void Init_EMAC ( void )

Definition at line 40 of file EMAC.c.

unsigned int Rdy4Tx ( void )

Definition at line 202 of file EMAC.c.

unsigned short ReadFrame_EMAC ( void )

Definition at line 111 of file EMAC.c.

unsigned short ReadFrameBE_EMAC ( void )

Definition at line 120 of file EMAC.c.

void RequestSend ( unsigned short FrameSize )

Definition at line 194 of file EMAC.c.

unsigned short StartReadFrame ( void )

Definition at line 163 of file EMAC.c.

void WriteFrame_EMAC ( unsigned short Data )

Definition at line 209 of file EMAC.c.

Variable Documentation

char db[64]

Definition at line 27 of file EMAC.c.

Generated on Tue Jun 7 14:59:12 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/Easy_Web/EMAC.h File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/Easy_Web/EMAC.h File Reference

#include "lpc17xx_emac.h"

Go to the source code of this file.

Defines

#define | MYMAC_1 0x1E
#define | MYMAC_2 0x30
#define | MYMAC_3 0x6c
#define | MYMAC_4 0xa2
#define | MYMAC_5 0x45
#define | MYMAC_6 0x5e

Functions

void | Init_EMAC (void)
unsigned short | ReadFrameBE_EMAC (void)
void | CopyToFrame_EMAC (void *Source, unsigned int Size)
void | CopyFromFrame_EMAC (void *Dest, unsigned short Size)
void | DummyReadFrame_EMAC (unsigned short Size)
unsigned short | StartReadFrame (void)
void | EndReadFrame (void)
unsigned int | CheckFrameReceived (void)
void | RequestSend (unsigned short FrameSize)
unsigned int | Rdy4Tx (void)

Define Documentation

#define MYMAC_1 0x1E

Definition at line 16 of file EMAC.h.

#define MYMAC_2 0x30

Definition at line 17 of file EMAC.h.

#define MYMAC_3 0x6c

Definition at line 18 of file EMAC.h.

#define MYMAC_4 0xa2

Definition at line 19 of file EMAC.h.

#define MYMAC_5 0x45

Definition at line 20 of file EMAC.h.

#define MYMAC_6 0x5e

Definition at line 21 of file EMAC.h.

Function Documentation

unsigned int CheckFrameReceived ( void )

Definition at line 184 of file EMAC.c.

void CopyFromFrame_EMAC | ( | void * | Dest,
 |  | unsigned short | Size
 | ) |  |

Definition at line 134 of file EMAC.c.

void CopyToFrame_EMAC | ( | void * | Source,
 |  | unsigned int | Size
 | ) |  |

Definition at line 219 of file EMAC.c.

void DummyReadFrame_EMAC ( unsigned short Size )

Definition at line 152 of file EMAC.c.

void EndReadFrame ( void )

Definition at line 178 of file EMAC.c.

void Init_EMAC ( void )

Definition at line 40 of file EMAC.c.

unsigned int Rdy4Tx ( void )

Definition at line 202 of file EMAC.c.

unsigned short ReadFrameBE_EMAC ( void )

Definition at line 120 of file EMAC.c.

void RequestSend ( unsigned short FrameSize )

Definition at line 194 of file EMAC.c.

unsigned short StartReadFrame ( void )

Definition at line 163 of file EMAC.c.

Generated on Tue Jun 7 14:59:12 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/Easy_Web/lpc17xx_libcfg.h File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/Easy_Web/lpc17xx_libcfg.h File Reference

#include "lpc_types.h"

Go to the source code of this file.

Defines

#define | DEBUG
#define | _DBGFWK
#define | _UART
#define | _UART0
#define | _EMAC
#define | CHECK_PARAM(expr) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))

Functions

void | check_failed (uint8_t *file, uint32_t line)

Define Documentation

#define _DBGFWK

Definition at line 46 of file lpc17xx_libcfg.h.

#define _EMAC

Definition at line 123 of file lpc17xx_libcfg.h.

#define _UART

Definition at line 55 of file lpc17xx_libcfg.h.

#define _UART0

Definition at line 56 of file lpc17xx_libcfg.h.

#define CHECK_PARAM ( expr ) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))

Definition at line 137 of file lpc17xx_libcfg.h.

#define DEBUG

Definition at line 38 of file lpc17xx_libcfg.h.

Generated on Tue Jun 7 14:59:09 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/Easy_Web/Retarget.c File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/Easy_Web/Retarget.c File Reference

Go to the source code of this file.

Generated on Tue Jun 7 14:59:12 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/Easy_Web/tcpip.c File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/Easy_Web/tcpip.c File Reference

#include "tcpip.h"
#include "EMAC.h"
#include <string.h>
#include "lpc17xx_libcfg.h"
#include "lpc17xx_pinsel.h"
#include "adc.h"
#include "debug_frmwrk.h"
#include <stdio.h>

Go to the source code of this file.

Defines

#define | DB _DBG((uint8_t *)db_)
#define | LED_PIN (1<<6)
#define | LED2_MASK ((1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6))
#define | LED1_MASK ((1<<28) | (1<<29) | (1<<31))
#define | SYSTICK_PERIOD 210000UL

Functions

void | SysTick_Handler (void)
SysTick handler sub-routine (1ms).
void | LED_Init (void)
Initialize LED.
void | TCPLowLevelInit (void)
void | TCPPassiveOpen (void)
void | TCPActiveOpen (void)
void | TCPClose (void)
void | TCPReleaseRxBuffer (void)
void | TCPTransmitTxBuffer (void)
unsigned int | IsBroadcast (void)
void | DoNetworkStuff (void)
void | ProcessEthBroadcastFrame (void)
void | ProcessEthIAFrame (void)
void | ProcessICMPFrame (void)
void | ProcessTCPFrame (void)
void | PrepareARP_REQUEST (void)
void | PrepareARP_ANSWER (void)
void | PrepareICMP_ECHO_REPLY (void)
void | PrepareTCP_FRAME (unsigned short TCPCode)
void | PrepareTCP_DATA_FRAME (void)
unsigned short | CalcChecksum (void *Start, unsigned short Count, unsigned char IsTCP)
void | TCPStartRetryTimer (void)
void | TCPStartTimeWaitTimer (void)
void | TCPRestartTimer (void)
void | TCPStopTimer (void)
void | TCPHandleRetransmission (void)
void | TCPHandleTimeout (void)
void | SendFrame1 (void)
void | SendFrame2 (void)
void | WriteWBE (unsigned char *Add, unsigned short Data)
void | WriteDWBE (unsigned char *Add, unsigned long Data)
unsigned short | SwapBytes (unsigned short Data)

Variables

char | db_ [64]
uint16_t | _tickVal
const unsigned char | MyMAC [6]

Define Documentation

#define DB _DBG((uint8_t *)db_)

Definition at line 28 of file tcpip.c.

#define LED1_MASK ((1<<28) | (1<<29) | (1<<31))

Definition at line 35 of file tcpip.c.

#define LED2_MASK ((1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6))

Definition at line 34 of file tcpip.c.

#define LED_PIN (1<<6)

Definition at line 33 of file tcpip.c.

#define SYSTICK_PERIOD 210000UL

Definition at line 50 of file tcpip.c.

Function Documentation

unsigned short CalcChecksum | ( | void * | Start,
 |  | unsigned short | Count,
 |  | unsigned char | IsTCP
 | ) |  |

Definition at line 900 of file tcpip.c.

void DoNetworkStuff ( void )

Definition at line 246 of file tcpip.c.

unsigned int IsBroadcast ( void )

Definition at line 224 of file tcpip.c.

void PrepareARP_ANSWER ( void )

Definition at line 746 of file tcpip.c.

void PrepareARP_REQUEST ( void )

Definition at line 718 of file tcpip.c.

void PrepareICMP_ECHO_REPLY ( void )

Definition at line 770 of file tcpip.c.

void PrepareTCP_DATA_FRAME ( void )

Definition at line 865 of file tcpip.c.

void PrepareTCP_FRAME ( unsigned short TCPCode )

Definition at line 810 of file tcpip.c.

void ProcessEthBroadcastFrame ( void )

Definition at line 372 of file tcpip.c.

void ProcessEthIAFrame ( void )

Definition at line 395 of file tcpip.c.

void ProcessICMPFrame ( void )

Definition at line 447 of file tcpip.c.

void ProcessTCPFrame ( void )

Definition at line 467 of file tcpip.c.

void SendFrame1 ( void )

Definition at line 1023 of file tcpip.c.

void SendFrame2 ( void )

Definition at line 1031 of file tcpip.c.

unsigned short SwapBytes ( unsigned short Data )

Definition at line 1061 of file tcpip.c.

void SysTick_Handler ( void )

SysTick handler sub-routine (1ms).

SysTick interrupt handler.

Parameters:
[in] None
Returns:
None
Parameters:
None
Returns:
None

Definition at line 1006 of file tcpip.c.

void TCPActiveOpen ( void )

Definition at line 153 of file tcpip.c.

void TCPClose ( void )

Definition at line 170 of file tcpip.c.

void TCPHandleRetransmission ( void )

Definition at line 972 of file tcpip.c.

void TCPHandleTimeout ( void )

Definition at line 987 of file tcpip.c.

void TCPLowLevelInit ( void )

Definition at line 100 of file tcpip.c.

void TCPPassiveOpen ( void )

Definition at line 139 of file tcpip.c.

void TCPReleaseRxBuffer ( void )

Definition at line 196 of file tcpip.c.

void TCPRestartTimer ( void )

Definition at line 955 of file tcpip.c.

void TCPStartRetryTimer ( void )

Definition at line 934 of file tcpip.c.

void TCPStartTimeWaitTimer ( void )

Definition at line 945 of file tcpip.c.

void TCPStopTimer ( void )

Definition at line 963 of file tcpip.c.

void TCPTransmitTxBuffer ( void )

Definition at line 206 of file tcpip.c.

void WriteDWBE | ( | unsigned char * | Add,
 |  | unsigned long | Data
 | ) |  |

Definition at line 1050 of file tcpip.c.

void WriteWBE | ( | unsigned char * | Add,
 |  | unsigned short | Data
 | ) |  |

Definition at line 1040 of file tcpip.c.

Variable Documentation

uint16_t _tickVal

Definition at line 30 of file tcpip.c.

char db_[64]

Definition at line 29 of file tcpip.c.

const unsigned char MyMAC[6]

Initial value:

{
  MYMAC_1, MYMAC_2, MYMAC_3,
  MYMAC_4, MYMAC_5, MYMAC_6
}

Definition at line 42 of file tcpip.c.

Generated on Tue Jun 7 14:59:12 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/Easy_Web/tcpip.h File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/Easy_Web/tcpip.h File Reference

Go to the source code of this file.

Defines

#define | MYIP_1 192
#define | MYIP_2 168
#define | MYIP_3 0
#define | MYIP_4 100
#define | SUBMASK_1 255
#define | SUBMASK_2 255
#define | SUBMASK_3 255
#define | SUBMASK_4 0
#define | GWIP_1 192
#define | GWIP_2 168
#define | GWIP_3 0
#define | GWIP_4 254
#define | RETRY_TIMEOUT 8
#define | FIN_TIMEOUT 2
#define | MAX_RETRYS 4
#define | MAX_TCP_TX_DATA_SIZE 512
#define | MAX_TCP_RX_DATA_SIZE 256
#define | MAX_ETH_TX_DATA_SIZE 60
#define | DEFAULT_TTL 64
#define | ETH_DA_OFS 0
#define | ETH_SA_OFS 6
#define | ETH_TYPE_OFS 12
#define | ETH_DATA_OFS 14
#define | ETH_HEADER_SIZE 14
#define | FRAME_ARP 0x0806
#define | FRAME_IP 0x0800
#define | IP_VER_IHL_TOS_OFS ETH_DATA_OFS + 0
#define | IP_TOTAL_LENGTH_OFS ETH_DATA_OFS + 2
#define | IP_IDENT_OFS ETH_DATA_OFS + 4
#define | IP_FLAGS_FRAG_OFS ETH_DATA_OFS + 6
#define | IP_TTL_PROT_OFS ETH_DATA_OFS + 8
#define | IP_HEAD_CHKSUM_OFS ETH_DATA_OFS + 10
#define | IP_SOURCE_OFS ETH_DATA_OFS + 12
#define | IP_DESTINATION_OFS ETH_DATA_OFS + 16
#define | IP_DATA_OFS ETH_DATA_OFS + 20
#define | IP_HEADER_SIZE 20
#define | IP_VER_IHL 0x4500
#define | IP_TOS_D 0x0010
#define | IP_TOS_T 0x0008
#define | IP_TOS_R 0x0004
#define | IP_FLAG_DONTFRAG 0x4000
#define | IP_FLAG_MOREFRAG 0x2000
#define | IP_FRAGOFS_MASK 0x1FFF
#define | PROT_ICMP 1
#define | PROT_TCP 6
#define | PROT_UDP 17
#define | ARP_HARDW_OFS ETH_DATA_OFS + 0
#define | ARP_PROT_OFS ETH_DATA_OFS + 2
#define | ARP_HLEN_PLEN_OFS ETH_DATA_OFS + 4
#define | ARP_OPCODE_OFS ETH_DATA_OFS + 6
#define | ARP_SENDER_HA_OFS ETH_DATA_OFS + 8
#define | ARP_SENDER_IP_OFS ETH_DATA_OFS + 14
#define | ARP_TARGET_HA_OFS ETH_DATA_OFS + 18
#define | ARP_TARGET_IP_OFS ETH_DATA_OFS + 24
#define | ARP_FRAME_SIZE 28
#define | HARDW_ETH10 1
#define | IP_HLEN_PLEN 0x0604
#define | OP_ARP_REQUEST 1
#define | OP_ARP_ANSWER 2
#define | ICMP_TYPE_CODE_OFS IP_DATA_OFS + 0
#define | ICMP_CHKSUM_OFS IP_DATA_OFS + 2
#define | ICMP_DATA_OFS IP_DATA_OFS + 4
#define | ICMP_HEADER_SIZE 4
#define | ICMP_ECHO 8
#define | ICMP_ECHO_REPLY 0
#define | TCP_SRCPORT_OFS IP_DATA_OFS + 0
#define | TCP_DESTPORT_OFS IP_DATA_OFS + 2
#define | TCP_SEQNR_OFS IP_DATA_OFS + 4
#define | TCP_ACKNR_OFS IP_DATA_OFS + 8
#define | TCP_DATA_CODE_OFS IP_DATA_OFS + 12
#define | TCP_WINDOW_OFS IP_DATA_OFS + 14
#define | TCP_CHKSUM_OFS IP_DATA_OFS + 16
#define | TCP_URGENT_OFS IP_DATA_OFS + 18
#define | TCP_DATA_OFS IP_DATA_OFS + 20
#define | TCP_HEADER_SIZE 20
#define | DATA_OFS_MASK 0xF000
#define | TCP_CODE_FIN 0x0001
#define | TCP_CODE_SYN 0x0002
#define | TCP_CODE_RST 0x0004
#define | TCP_CODE_PSH 0x0008
#define | TCP_CODE_ACK 0x0010
#define | TCP_CODE_URG 0x0020
#define | TCP_OPT_MSS 0x0204
#define | TCP_OPT_MSS_SIZE 4
#define | TCP_PORT_ECHO 7
#define | TCP_PORT_DISCARD 9
#define | TCP_PORT_DAYTIME 13
#define | TCP_PORT_QOTD 17
#define | TCP_PORT_CHARGEN 19
#define | TCP_PORT_HTTP 80
#define | SWAPB(Word) ((unsigned short)((Word) << 8) | ((Word) >> 8))
#define | TxFrame1 ((unsigned char *)_TxFrame1)
#define | TxFrame2 ((unsigned char *)_TxFrame2)
#define | RxTCPBuffer ((unsigned char *)_RxTCPBuffer)
#define | SEND_FRAME1 0x01
#define | SEND_FRAME2 0x02
#define | TCP_ACTIVE_OPEN 0x01
#define | IP_ADDR_RESOLVED 0x02
#define | TCP_TIMER_RUNNING 0x04
#define | TIMER_TYPE_RETRY 0x08
#define | TCP_CLOSE_REQUESTED 0x10
#define | SOCK_ACTIVE 0x01
#define | SOCK_CONNECTED 0x02
#define | SOCK_DATA_AVAILABLE 0x04
#define | SOCK_TX_BUF_RELEASED 0x08
#define | SOCK_ERROR_MASK 0xF0
#define | SOCK_ERR_OK 0x00
#define | SOCK_ERR_ARP_TIMEOUT 0x10
#define | SOCK_ERR_TCP_TIMEOUT 0x20
#define | SOCK_ERR_CONN_RESET 0x30
#define | SOCK_ERR_REMOTE 0x40
#define | SOCK_ERR_ETHERNET 0x50
#define | TCP_TX_BUF ((unsigned char *)TxFrame1 + ETH_HEADER_SIZE + IP_HEADER_SIZE + TCP_HEADER_SIZE)
#define | TCP_RX_BUF ((unsigned char *)RxTCPBuffer)

Enumerations

enum TTCPStateMachine {
CLOSED, LISTENING, SYN_SENT, SYN_RECD,
ESTABLISHED, FIN_WAIT_1, FIN_WAIT_2, CLOSE_WAIT,
CLOSING, LAST_ACK, TIME_WAIT
}
enum TLastFrameSent {
ARP_REQUEST, TCP_SYN_FRAME, TCP_SYN_ACK_FRAME, TCP_FIN_FRAME,
TCP_DATA_FRAME
}

Functions

void | DoNetworkStuff (void)
void | ProcessEthBroadcastFrame (void)
void | ProcessEthIAFrame (void)
void | ProcessICMPFrame (void)
void | ProcessTCPFrame (void)
void | PrepareARP_REQUEST (void)
void | PrepareARP_ANSWER (void)
void | PrepareICMP_ECHO_REPLY (void)
void | PrepareTCP_FRAME (unsigned short TCPCode)
void | PrepareTCP_DATA_FRAME (void)
void | SendFrame1 (void)
void | SendFrame2 (void)
void | TCPStartRetryTimer (void)
void | TCPStartTimeWaitTimer (void)
void | TCPRestartTimer (void)
void | TCPStopTimer (void)
void | TCPHandleRetransmission (void)
void | TCPHandleTimeout (void)
unsigned short | CalcChecksum (void *Start, unsigned short Count, unsigned char IsTCP)
unsigned short | SwapBytes (unsigned short Data)
void | WriteWBE (unsigned char *Add, unsigned short Data)
void | WriteDWBE (unsigned char *Add, unsigned long Data)
void | TCPLowLevelInit (void)
void | TCPPassiveOpen (void)
void | TCPActiveOpen (void)
void | TCPClose (void)
void | TCPReleaseRxBuffer (void)
void | TCPTransmitTxBuffer (void)
void | SysTick_Handler (void)
SysTick handler sub-routine (1ms).

Variables

const unsigned short | MyIP [2]
const unsigned short | SubnetMask [2]
const unsigned short | GatewayIP [2]
const unsigned char | MyMAC [6]
TTCPStateMachine TCPStateMachine
TLastFrameSent LastFrameSent
unsigned short | ISNGenHigh
unsigned long | TCPSeqNr
unsigned long | TCPUNASeqNr
unsigned long | TCPAckNr
unsigned char | TCPTimer
unsigned char | RetryCounter
unsigned short | RecdFrameLength
unsigned short | RecdFrameMAC [3]
unsigned short | RecdFrameIP [2]
unsigned short | RecdIPFrameLength
unsigned short | TxFrame1Size
unsigned char | TxFrame2Size
unsigned char | TransmitControl
unsigned char | TCPFlags
unsigned short | TCPRxDataCount
unsigned short | TCPTxDataCount
unsigned short | TCPLocalPort
unsigned short | TCPRemotePort
unsigned short | RemoteMAC [3]
unsigned short | RemoteIP [2]
unsigned char | SocketStatus

Define Documentation

#define ARP_FRAME_SIZE 28

Definition at line 93 of file tcpip.h.

#define ARP_HARDW_OFS ETH_DATA_OFS + 0

Definition at line 85 of file tcpip.h.

#define ARP_HLEN_PLEN_OFS ETH_DATA_OFS + 4

Definition at line 87 of file tcpip.h.

#define ARP_OPCODE_OFS ETH_DATA_OFS + 6

Definition at line 88 of file tcpip.h.

#define ARP_PROT_OFS ETH_DATA_OFS + 2

Definition at line 86 of file tcpip.h.

#define ARP_SENDER_HA_OFS ETH_DATA_OFS + 8

Definition at line 89 of file tcpip.h.

#define ARP_SENDER_IP_OFS ETH_DATA_OFS + 14

Definition at line 90 of file tcpip.h.

#define ARP_TARGET_HA_OFS ETH_DATA_OFS + 18

Definition at line 91 of file tcpip.h.

#define ARP_TARGET_IP_OFS ETH_DATA_OFS + 24

Definition at line 92 of file tcpip.h.

#define DATA_OFS_MASK 0xF000

Definition at line 121 of file tcpip.h.

#define DEFAULT_TTL 64

Definition at line 47 of file tcpip.h.

#define ETH_DA_OFS 0

Definition at line 50 of file tcpip.h.

#define ETH_DATA_OFS 14

Definition at line 53 of file tcpip.h.

#define ETH_HEADER_SIZE 14

Definition at line 54 of file tcpip.h.

#define ETH_SA_OFS 6

Definition at line 51 of file tcpip.h.

#define ETH_TYPE_OFS 12

Definition at line 52 of file tcpip.h.

#define FIN_TIMEOUT 2

Definition at line 34 of file tcpip.h.

#define FRAME_ARP 0x0806

Definition at line 56 of file tcpip.h.

#define FRAME_IP 0x0800

Definition at line 57 of file tcpip.h.

#define GWIP_1 192

Definition at line 28 of file tcpip.h.

#define GWIP_2 168

Definition at line 29 of file tcpip.h.

#define GWIP_3 0

Definition at line 30 of file tcpip.h.

#define GWIP_4 254

Definition at line 31 of file tcpip.h.

#define HARDW_ETH10 1

Definition at line 95 of file tcpip.h.

#define ICMP_CHKSUM_OFS IP_DATA_OFS + 2

Definition at line 102 of file tcpip.h.

#define ICMP_DATA_OFS IP_DATA_OFS + 4

Definition at line 103 of file tcpip.h.

#define ICMP_ECHO 8

Definition at line 106 of file tcpip.h.

#define ICMP_ECHO_REPLY 0

Definition at line 107 of file tcpip.h.

#define ICMP_HEADER_SIZE 4

Definition at line 104 of file tcpip.h.

#define ICMP_TYPE_CODE_OFS IP_DATA_OFS + 0

Definition at line 101 of file tcpip.h.

#define IP_ADDR_RESOLVED 0x02

Definition at line 244 of file tcpip.h.

#define IP_DATA_OFS ETH_DATA_OFS + 20

Definition at line 68 of file tcpip.h.

#define IP_DESTINATION_OFS ETH_DATA_OFS + 16

Definition at line 67 of file tcpip.h.

#define IP_FLAG_DONTFRAG 0x4000

Definition at line 76 of file tcpip.h.

#define IP_FLAG_MOREFRAG 0x2000

Definition at line 77 of file tcpip.h.

#define IP_FLAGS_FRAG_OFS ETH_DATA_OFS + 6

Definition at line 63 of file tcpip.h.

#define IP_FRAGOFS_MASK 0x1FFF

Definition at line 78 of file tcpip.h.

#define IP_HEAD_CHKSUM_OFS ETH_DATA_OFS + 10

Definition at line 65 of file tcpip.h.

#define IP_HEADER_SIZE 20

Definition at line 69 of file tcpip.h.

#define IP_HLEN_PLEN 0x0604

Definition at line 96 of file tcpip.h.

#define IP_IDENT_OFS ETH_DATA_OFS + 4

Definition at line 62 of file tcpip.h.

#define IP_SOURCE_OFS ETH_DATA_OFS + 12

Definition at line 66 of file tcpip.h.

#define IP_TOS_D 0x0010

Definition at line 72 of file tcpip.h.

#define IP_TOS_R 0x0004

Definition at line 74 of file tcpip.h.

#define IP_TOS_T 0x0008

Definition at line 73 of file tcpip.h.

#define IP_TOTAL_LENGTH_OFS ETH_DATA_OFS + 2

Definition at line 61 of file tcpip.h.

#define IP_TTL_PROT_OFS ETH_DATA_OFS + 8

Definition at line 64 of file tcpip.h.

#define IP_VER_IHL 0x4500

Definition at line 71 of file tcpip.h.

#define IP_VER_IHL_TOS_OFS ETH_DATA_OFS + 0

Definition at line 60 of file tcpip.h.

#define MAX_ETH_TX_DATA_SIZE 60

Definition at line 44 of file tcpip.h.

#define MAX_RETRYS 4

Definition at line 36 of file tcpip.h.

#define MAX_TCP_RX_DATA_SIZE 256

Definition at line 40 of file tcpip.h.

#define MAX_TCP_TX_DATA_SIZE 512

Definition at line 39 of file tcpip.h.

#define MYIP_1 192

Definition at line 18 of file tcpip.h.

#define MYIP_2 168

Definition at line 19 of file tcpip.h.

#define MYIP_3 0

Definition at line 20 of file tcpip.h.

#define MYIP_4 100

Definition at line 21 of file tcpip.h.

#define OP_ARP_ANSWER 2

Definition at line 98 of file tcpip.h.

#define OP_ARP_REQUEST 1

Definition at line 97 of file tcpip.h.

#define PROT_ICMP 1

Definition at line 80 of file tcpip.h.

#define PROT_TCP 6

Definition at line 81 of file tcpip.h.

#define PROT_UDP 17

Definition at line 82 of file tcpip.h.

#define RETRY_TIMEOUT 8

Definition at line 33 of file tcpip.h.

#define RxTCPBuffer ((unsigned char *)_RxTCPBuffer)

Definition at line 233 of file tcpip.h.

#define SEND_FRAME1 0x01

Definition at line 239 of file tcpip.h.

#define SEND_FRAME2 0x02

Definition at line 240 of file tcpip.h.

#define SOCK_ACTIVE 0x01

Definition at line 303 of file tcpip.h.

#define SOCK_CONNECTED 0x02

Definition at line 304 of file tcpip.h.

#define SOCK_DATA_AVAILABLE 0x04

Definition at line 305 of file tcpip.h.

#define SOCK_ERR_ARP_TIMEOUT 0x10

Definition at line 310 of file tcpip.h.

#define SOCK_ERR_CONN_RESET 0x30

Definition at line 312 of file tcpip.h.

#define SOCK_ERR_ETHERNET 0x50

Definition at line 314 of file tcpip.h.

#define SOCK_ERR_OK 0x00

Definition at line 309 of file tcpip.h.

#define SOCK_ERR_REMOTE 0x40

Definition at line 313 of file tcpip.h.

#define SOCK_ERR_TCP_TIMEOUT 0x20

Definition at line 311 of file tcpip.h.

#define SOCK_ERROR_MASK 0xF0

Definition at line 308 of file tcpip.h.

#define SOCK_TX_BUF_RELEASED 0x08

Definition at line 306 of file tcpip.h.

#define SUBMASK_1 255

Definition at line 23 of file tcpip.h.

#define SUBMASK_2 255

Definition at line 24 of file tcpip.h.

#define SUBMASK_3 255

Definition at line 25 of file tcpip.h.

#define SUBMASK_4 0

Definition at line 26 of file tcpip.h.

#define SWAPB ( Word ) ((unsigned short)((Word) << 8) | ((Word) >> 8))

Definition at line 142 of file tcpip.h.

#define TCP_ACKNR_OFS IP_DATA_OFS + 8

Definition at line 113 of file tcpip.h.

#define TCP_ACTIVE_OPEN 0x01

Definition at line 243 of file tcpip.h.

#define TCP_CHKSUM_OFS IP_DATA_OFS + 16

Definition at line 116 of file tcpip.h.

#define TCP_CLOSE_REQUESTED 0x10

Definition at line 247 of file tcpip.h.

#define TCP_CODE_ACK 0x0010

Definition at line 127 of file tcpip.h.

#define TCP_CODE_FIN 0x0001

Definition at line 123 of file tcpip.h.

#define TCP_CODE_PSH 0x0008

Definition at line 126 of file tcpip.h.

#define TCP_CODE_RST 0x0004

Definition at line 125 of file tcpip.h.

#define TCP_CODE_SYN 0x0002

Definition at line 124 of file tcpip.h.

#define TCP_CODE_URG 0x0020

Definition at line 128 of file tcpip.h.

#define TCP_DATA_CODE_OFS IP_DATA_OFS + 12

Definition at line 114 of file tcpip.h.

#define TCP_DATA_OFS IP_DATA_OFS + 20

Definition at line 118 of file tcpip.h.

#define TCP_DESTPORT_OFS IP_DATA_OFS + 2

Definition at line 111 of file tcpip.h.

#define TCP_HEADER_SIZE 20

Definition at line 119 of file tcpip.h.

#define TCP_OPT_MSS 0x0204

Definition at line 130 of file tcpip.h.

#define TCP_OPT_MSS_SIZE 4

Definition at line 131 of file tcpip.h.

#define TCP_PORT_CHARGEN 19

Definition at line 138 of file tcpip.h.

#define TCP_PORT_DAYTIME 13

Definition at line 136 of file tcpip.h.

#define TCP_PORT_DISCARD 9

Definition at line 135 of file tcpip.h.

#define TCP_PORT_ECHO 7

Definition at line 134 of file tcpip.h.

#define TCP_PORT_HTTP 80

Definition at line 139 of file tcpip.h.

#define TCP_PORT_QOTD 17

Definition at line 137 of file tcpip.h.

#define TCP_RX_BUF ((unsigned char *)RxTCPBuffer)

Definition at line 318 of file tcpip.h.

#define TCP_SEQNR_OFS IP_DATA_OFS + 4

Definition at line 112 of file tcpip.h.

#define TCP_SRCPORT_OFS IP_DATA_OFS + 0

Definition at line 110 of file tcpip.h.

#define TCP_TIMER_RUNNING 0x04

Definition at line 245 of file tcpip.h.

#define TCP_TX_BUF ((unsigned char *)TxFrame1 + ETH_HEADER_SIZE + IP_HEADER_SIZE + TCP_HEADER_SIZE)

Definition at line 317 of file tcpip.h.

#define TCP_URGENT_OFS IP_DATA_OFS + 18

Definition at line 117 of file tcpip.h.

#define TCP_WINDOW_OFS IP_DATA_OFS + 14

Definition at line 115 of file tcpip.h.

#define TIMER_TYPE_RETRY 0x08

Definition at line 246 of file tcpip.h.

#define TxFrame1 ((unsigned char *)_TxFrame1)

Definition at line 231 of file tcpip.h.

#define TxFrame2 ((unsigned char *)_TxFrame2)

Definition at line 232 of file tcpip.h.

Enumeration Type Documentation

enum TLastFrameSent

Enumerator:
ARP_REQUEST
TCP_SYN_FRAME
TCP_SYN_ACK_FRAME
TCP_FIN_FRAME
TCP_DATA_FRAME

Definition at line 160 of file tcpip.h.

enum TTCPStateMachine

Enumerator:
CLOSED
LISTENING
SYN_SENT
SYN_RECD
ESTABLISHED
FIN_WAIT_1
FIN_WAIT_2
CLOSE_WAIT
CLOSING
LAST_ACK
TIME_WAIT

Definition at line 146 of file tcpip.h.

Function Documentation

unsigned short CalcChecksum | ( | void * | Start,
 |  | unsigned short | Count,
 |  | unsigned char | IsTCP
 | ) |  |

Definition at line 900 of file tcpip.c.

void DoNetworkStuff ( void )

Definition at line 246 of file tcpip.c.

void PrepareARP_ANSWER ( void )

Definition at line 746 of file tcpip.c.

void PrepareARP_REQUEST ( void )

Definition at line 718 of file tcpip.c.

void PrepareICMP_ECHO_REPLY ( void )

Definition at line 770 of file tcpip.c.

void PrepareTCP_DATA_FRAME ( void )

Definition at line 865 of file tcpip.c.

void PrepareTCP_FRAME ( unsigned short TCPCode )

Definition at line 810 of file tcpip.c.

void ProcessEthBroadcastFrame ( void )

Definition at line 372 of file tcpip.c.

void ProcessEthIAFrame ( void )

Definition at line 395 of file tcpip.c.

void ProcessICMPFrame ( void )

Definition at line 447 of file tcpip.c.

void ProcessTCPFrame ( void )

Definition at line 467 of file tcpip.c.

void SendFrame1 ( void )

Definition at line 1023 of file tcpip.c.

void SendFrame2 ( void )

Definition at line 1031 of file tcpip.c.

unsigned short SwapBytes ( unsigned short Data )

Definition at line 1061 of file tcpip.c.

void SysTick_Handler ( void )

SysTick handler sub-routine (1ms).

SysTick interrupt handler.

Parameters:
[in] None
Returns:
None
Parameters:
None
Returns:
None

Definition at line 9 of file clock-arch.c.

void TCPActiveOpen ( void )

Definition at line 153 of file tcpip.c.

void TCPClose ( void )

Definition at line 170 of file tcpip.c.

void TCPHandleRetransmission ( void )

Definition at line 972 of file tcpip.c.

void TCPHandleTimeout ( void )

Definition at line 987 of file tcpip.c.

void TCPLowLevelInit ( void )

Definition at line 100 of file tcpip.c.

void TCPPassiveOpen ( void )

Definition at line 139 of file tcpip.c.

void TCPReleaseRxBuffer ( void )

Definition at line 196 of file tcpip.c.

void TCPRestartTimer ( void )

Definition at line 955 of file tcpip.c.

void TCPStartRetryTimer ( void )

Definition at line 934 of file tcpip.c.

void TCPStartTimeWaitTimer ( void )

Definition at line 945 of file tcpip.c.

void TCPStopTimer ( void )

Definition at line 963 of file tcpip.c.

void TCPTransmitTxBuffer ( void )

Definition at line 206 of file tcpip.c.

void WriteDWBE | ( | unsigned char * | Add,
 |  | unsigned long | Data
 | ) |  |

Definition at line 1050 of file tcpip.c.

void WriteWBE | ( | unsigned char * | Add,
 |  | unsigned short | Data
 | ) |  |

Definition at line 1040 of file tcpip.c.

Variable Documentation

const unsigned short GatewayIP[2]

unsigned short ISNGenHigh

TLastFrameSent LastFrameSent

const unsigned short MyIP[2]

const unsigned char MyMAC[6]

Definition at line 42 of file tcpip.c.

unsigned short RecdFrameIP[2]

unsigned short RecdFrameLength

unsigned short RecdFrameMAC[3]

unsigned short RecdIPFrameLength

unsigned short RemoteIP[2]

unsigned short RemoteMAC[3]

unsigned char RetryCounter

unsigned char SocketStatus

const unsigned short SubnetMask[2]

unsigned long TCPAckNr

unsigned char TCPFlags

unsigned short TCPLocalPort

unsigned short TCPRemotePort

unsigned short TCPRxDataCount

unsigned long TCPSeqNr

TTCPStateMachine TCPStateMachine

unsigned char TCPTimer

unsigned short TCPTxDataCount

unsigned long TCPUNASeqNr

unsigned char TransmitControl

unsigned short TxFrame1Size

unsigned char TxFrame2Size

Generated on Tue Jun 7 14:59:13 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/Easy_Web/webpage.h File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/Easy_Web/webpage.h File Reference

Go to the source code of this file.

Variables

const unsigned char WebSide []

Variable Documentation

const unsigned char WebSide[]

Definition at line 1 of file webpage.h.

Generated on Tue Jun 7 14:59:13 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/EmacRaw/crc32.c File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/EmacRaw/crc32.c File Reference

Ethernet CRC module file for NXP LPC230x Family Microprocessors. More...

#include "lpc17xx_emac.h"
#include "crc32.h"

Go to the source code of this file.

Functions

void | crc32_init (uint32_t *pCRC)
void | crc32_add (uint32_t *pCRC, uint8_t val8)
void | crc32_end (uint32_t *pCRC)
uint32_t | crc32_bfr (void *pBfr, uint32_t size)

Detailed Description

Ethernet CRC module file for NXP LPC230x Family Microprocessors.

Version:
1.0
Date:
01. September. 2006
Author:
NXP MCU SW Application Team
Copyright(C) 2006, NXP Semiconductor All rights reserved.

Software that is described herein is for illustrative purposes only which provides customers with programming information regarding the products. This software is supplied "AS IS" without any warranties. NXP Semiconductors assumes no responsibility or liability for the use of the software, conveys no license or title under any patent, copyright, or mask work right to the product. NXP Semiconductors reserves the right to make changes in the software without notification. NXP Semiconductors also make no representation or warranty that such application will be suitable for the specified use without further testing or modification.

Definition in file crc32.c.

Function Documentation

void crc32_add | ( | uint32_t * | pCRC,
 |  | uint8_t | val8
 | ) |  |

Definition at line 51 of file crc32.c.

uint32_t crc32_bfr | ( | void * | pBfr,
 |  | uint32_t | size
 | ) |  |

Definition at line 96 of file crc32.c.

void crc32_end ( uint32_t * pCRC )

Definition at line 82 of file crc32.c.

void crc32_init ( uint32_t * pCRC )

Definition at line 37 of file crc32.c.

Generated on Tue Jun 7 14:59:13 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/EmacRaw/crc32.h File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/EmacRaw/crc32.h File Reference

Ethernet CRC module file for NXP LPC230x Family Microprocessors. More...

#include "lpc_types.h"

Go to the source code of this file.

Functions

void | crc32_init (uint32_t *pCRC)
void | crc32_add (uint32_t *pCRC, uint8_t val8)
void | crc32_end (uint32_t *pCRC)
uint32_t | crc32_bfr (void *pBfr, uint32_t size)
uint32_t | do_crc_behav (long long Addr)

Detailed Description

Ethernet CRC module file for NXP LPC230x Family Microprocessors.

Version:
1.0
Date:
01. September. 2006
Author:
NXP MCU SW Application Team
Copyright(C) 2006, NXP Semiconductor All rights reserved.

Software that is described herein is for illustrative purposes only which provides customers with programming information regarding the products. This software is supplied "AS IS" without any warranties. NXP Semiconductors assumes no responsibility or liability for the use of the software, conveys no license or title under any patent, copyright, or mask work right to the product. NXP Semiconductors reserves the right to make changes in the software without notification. NXP Semiconductors also make no representation or warranty that such application will be suitable for the specified use without further testing or modification.

Definition in file crc32.h.

Function Documentation

void crc32_add | ( | uint32_t * | pCRC,
 |  | uint8_t | val8
 | ) |  |

Definition at line 51 of file crc32.c.

uint32_t crc32_bfr | ( | void * | pBfr,
 |  | uint32_t | size
 | ) |  |

Definition at line 96 of file crc32.c.

void crc32_end ( uint32_t * pCRC )

Definition at line 82 of file crc32.c.

void crc32_init ( uint32_t * pCRC )

Definition at line 37 of file crc32.c.

uint32_t do_crc_behav ( long long Addr )

Generated on Tue Jun 7 14:59:13 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/EmacRaw/emactest.c File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/EmacRaw/emactest.c File Reference

This example used to test EMAC operation on LPC1768. More...

#include "string.h"
#include "crc32.h"
#include "lpc17xx_emac.h"
#include "lpc17xx_gpio.h"
#include "lpc17xx_pinsel.h"
#include "lpc17xx_libcfg.h"
#include "debug_frmwrk.h"
#include <stdio.h>

Go to the source code of this file.

Defines

#define | TX_ONLY 0
#define | BOUNCE_RX 1
#define | ENABLE_WOL 1
#define | ENABLE_HASH 1
#define | EMAC_ADDR12 0x0000E386
#define | EMAC_ADDR34 0x00006BDA
#define | EMAC_ADDR56 0x00005000
#define | EMAC_DST_ADDR12 0x0000101F
#define | EMAC_DST_ADDR34 0x0000E012
#define | EMAC_DST_ADDR56 0x00001D0C
#define | PD_LED_PIN (1<<6)
#define | TX_LED_PIN (1<<5)
#define | RX_LED_PIN (1<<4)
#define | KB_LED_PIN (1<<3)
#define | BLINK_LED_PIN (1<<2)
#define | LED2_MASK ((1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6))
#define | LED1_MASK ((1<<28) | (1<<29) | (1<<31))
#define | TX_PACKET_SIZE 114
#define | MYMAC_1 ((EMAC_ADDR12 & 0xFF00) >> 8)
#define | MYMAC_2 ((EMAC_ADDR12 & 0xFF))
#define | MYMAC_3 ((EMAC_ADDR34 & 0xFF00) >> 8)
#define | MYMAC_4 ((EMAC_ADDR34 & 0xFF))
#define | MYMAC_5 ((EMAC_ADDR56 & 0xFF00) >> 8)
#define | MYMAC_6 ((EMAC_ADDR56 & 0xFF))
#define | DB _DBG((uint8_t *)db_)

Functions

uint8_t | __attribute__ ((aligned(4)))
void | ENET_IRQHandler (void)
Ethernet service routine handler.
void | PacketGen (uint8_t *txptr)
Create a perfect packet for TX.
void | LED_Init (void)
Init LEDs.
void | LED_Blink (uint32_t pattern)
LED blink. This is used for WOL test only.
void | Usr_Init_Emac (void)
User EMAC initialize.
int | c_entry (void)
c_entry: Main EMAC program body
int | main (void)
void | check_failed (uint8_t *file, uint32_t line)

Variables

char | db_ [64]
__IO uint32_t | RXOverrunCount = 0
__IO uint32_t | RXErrorCount = 0
__IO uint32_t | TXUnderrunCount = 0
__IO uint32_t | TXErrorCount = 0
__IO uint32_t | RxFinishedCount = 0
__IO uint32_t | TxFinishedCount = 0
__IO uint32_t | TxDoneCount = 0
__IO uint32_t | RxDoneCount = 0
__IO uint32_t | ReceiveLength = 0
__IO Bool | PacketReceived = FALSE
__IO uint32_t | WOLCount = 0

Detailed Description

This example used to test EMAC operation on LPC1768.

Version:
2.0
Date:
21. May. 2010
Author:
NXP MCU SW Application Team
Copyright(C) 2010, NXP Semiconductor All rights reserved.

Software that is described herein is for illustrative purposes only which provides customers with programming information regarding the products. This software is supplied "AS IS" without any warranties. NXP Semiconductors assumes no responsibility or liability for the use of the software, conveys no license or title under any patent, copyright, or mask work right to the product. NXP Semiconductors reserves the right to make changes in the software without notification. NXP Semiconductors also make no representation or warranty that such application will be suitable for the specified use without further testing or modification.

Definition in file emactest.c.

Generated on Tue Jun 7 14:59:13 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/EmacRaw/libnosys_gnu.c File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/EmacRaw/libnosys_gnu.c File Reference

Definitions for OS interface, stub function required by newlibc used by Codesourcery GNU compiler. More...

Go to the source code of this file.

Detailed Description

Definitions for OS interface, stub function required by newlibc used by Codesourcery GNU compiler.

Version:
Date:
01. December. 2008
Author:
NXP MCU SW Application Team
Copyright(C) 2010, NXP Semiconductor All rights reserved.

Software that is described herein is for illustrative purposes only which provides customers with programming information regarding the products. This software is supplied "AS IS" without any warranties. NXP Semiconductors assumes no responsibility or liability for the use of the software, conveys no license or title under any patent, copyright, or mask work right to the product. NXP Semiconductors reserves the right to make changes in the software without notification. NXP Semiconductors also make no representation or warranty that such application will be suitable for the specified use without further testing or modification.

Definition in file libnosys_gnu.c.

Generated on Tue Jun 7 14:59:13 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/EmacRaw/lpc17xx_libcfg.h File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/EmacRaw/lpc17xx_libcfg.h File Reference

#include "lpc_types.h"

Go to the source code of this file.

Defines

#define | DEBUG
#define | _DBGFWK
#define | _GPIO
#define | _UART
#define | _UART0
#define | _EMAC
#define | CHECK_PARAM(expr) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))

Functions

void | check_failed (uint8_t *file, uint32_t line)

Define Documentation

#define _DBGFWK

Definition at line 44 of file lpc17xx_libcfg.h.

#define _EMAC

Definition at line 121 of file lpc17xx_libcfg.h.

#define _GPIO

Definition at line 47 of file lpc17xx_libcfg.h.

#define _UART

Definition at line 53 of file lpc17xx_libcfg.h.

#define _UART0

Definition at line 54 of file lpc17xx_libcfg.h.

#define CHECK_PARAM ( expr ) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))

Definition at line 136 of file lpc17xx_libcfg.h.

#define DEBUG

Definition at line 36 of file lpc17xx_libcfg.h.

Generated on Tue Jun 7 14:59:09 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/dhcpc/dhcpc.c File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/dhcpc/dhcpc.c File Reference

#include <stdio.h>
#include <string.h>
#include "uip.h"
#include "dhcpc.h"
#include "timer.h"
#include "pt.h"

Go to the source code of this file.

Data Structures

struct | dhcp_msg

Defines

#define | STATE_INITIAL 0
#define | STATE_SENDING 1
#define | STATE_OFFER_RECEIVED 2
#define | STATE_CONFIG_RECEIVED 3
#define | BOOTP_BROADCAST 0x8000
#define | DHCP_REQUEST 1
#define | DHCP_REPLY 2
#define | DHCP_HTYPE_ETHERNET 1
#define | DHCP_HLEN_ETHERNET 6
#define | DHCP_MSG_LEN 236
#define | DHCPC_SERVER_PORT 67
#define | DHCPC_CLIENT_PORT 68
#define | DHCPDISCOVER 1
#define | DHCPOFFER 2
#define | DHCPREQUEST 3
#define | DHCPDECLINE 4
#define | DHCPACK 5
#define | DHCPNAK 6
#define | DHCPRELEASE 7
#define | DHCP_OPTION_SUBNET_MASK 1
#define | DHCP_OPTION_ROUTER 3
#define | DHCP_OPTION_DNS_SERVER 6
#define | DHCP_OPTION_REQ_IPADDR 50
#define | DHCP_OPTION_LEASE_TIME 51
#define | DHCP_OPTION_MSG_TYPE 53
#define | DHCP_OPTION_SERVER_ID 54
#define | DHCP_OPTION_REQ_LIST 55
#define | DHCP_OPTION_END 255

Functions

void | dhcpc_init (const void *mac_addr, int mac_len)
void | dhcpc_appcall (void)
void | dhcpc_request (void)

Define Documentation

#define BOOTP_BROADCAST 0x8000

Definition at line 65 of file dhcpc.c.

#define DHCP_HLEN_ETHERNET 6

Definition at line 70 of file dhcpc.c.

#define DHCP_HTYPE_ETHERNET 1

Definition at line 69 of file dhcpc.c.

#define DHCP_MSG_LEN 236

Definition at line 71 of file dhcpc.c.

#define DHCP_OPTION_DNS_SERVER 6

Definition at line 86 of file dhcpc.c.

#define DHCP_OPTION_END 255

Definition at line 92 of file dhcpc.c.

#define DHCP_OPTION_LEASE_TIME 51

Definition at line 88 of file dhcpc.c.

#define DHCP_OPTION_MSG_TYPE 53

Definition at line 89 of file dhcpc.c.

#define DHCP_OPTION_REQ_IPADDR 50

Definition at line 87 of file dhcpc.c.

#define DHCP_OPTION_REQ_LIST 55

Definition at line 91 of file dhcpc.c.

#define DHCP_OPTION_ROUTER 3

Definition at line 85 of file dhcpc.c.

#define DHCP_OPTION_SERVER_ID 54

Definition at line 90 of file dhcpc.c.

#define DHCP_OPTION_SUBNET_MASK 1

Definition at line 84 of file dhcpc.c.

#define DHCP_REPLY 2

Definition at line 68 of file dhcpc.c.

#define DHCP_REQUEST 1

Definition at line 67 of file dhcpc.c.

#define DHCPACK 5

Definition at line 80 of file dhcpc.c.

#define DHCPC_CLIENT_PORT 68

Definition at line 74 of file dhcpc.c.

#define DHCPC_SERVER_PORT 67

Definition at line 73 of file dhcpc.c.

#define DHCPDECLINE 4

Definition at line 79 of file dhcpc.c.

#define DHCPDISCOVER 1

Definition at line 76 of file dhcpc.c.

#define DHCPNAK 6

Definition at line 81 of file dhcpc.c.

#define DHCPOFFER 2

Definition at line 77 of file dhcpc.c.

#define DHCPRELEASE 7

Definition at line 82 of file dhcpc.c.

#define DHCPREQUEST 3

Definition at line 78 of file dhcpc.c.

#define STATE_CONFIG_RECEIVED 3

Definition at line 45 of file dhcpc.c.

#define STATE_INITIAL 0

Definition at line 42 of file dhcpc.c.

#define STATE_OFFER_RECEIVED 2

Definition at line 44 of file dhcpc.c.

#define STATE_SENDING 1

Definition at line 43 of file dhcpc.c.

Function Documentation

void dhcpc_appcall ( void )

Definition at line 340 of file dhcpc.c.

void dhcpc_init | ( | const void * | mac_addr,
 |  | int | mac_len
 | ) |  |

Definition at line 323 of file dhcpc.c.

void dhcpc_request ( void )

Definition at line 346 of file dhcpc.c.

Generated on Tue Jun 7 14:59:13 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/dhcpc/dhcpc.h File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/dhcpc/dhcpc.h File Reference

#include "timer.h"
#include "pt.h"

Go to the source code of this file.

Data Structures

struct | dhcpc_state

Defines

#define | UIP_UDP_APPCALL dhcpc_appcall

Typedefs

Appication specific configurations
An uIP application is implemented using a single application function that is called by uIP whenever a TCP/IP event occurs. The name of this function must be registered with uIP at compile time using the UIP_APPCALL definition.

uIP applications can store the application state within the uip_conn structure by specifying the type of the application structure by typedef:ing the type uip_tcp_appstate_t and uip_udp_appstate_t.

The file containing the definitions must be included in the uipopt.h file.

The following example illustrates how this can look.

void httpd_appcall(void);
#define UIP_APPCALL     httpd_appcall

struct httpd_state {
  u8_t state;
  u16_t count;
  char *dataptr;
  char *script;
};
typedef struct httpd_state uip_tcp_appstate_t

typedef struct dhcpc_state | uip_udp_appstate_t

Functions

void | dhcpc_init (const void *mac_addr, int mac_len)
void | dhcpc_request (void)
void | dhcpc_appcall (void)
void | dhcpc_configured (const struct dhcpc_state *s)

Define Documentation

#define UIP_UDP_APPCALL dhcpc_appcall

Definition at line 65 of file dhcpc.h.

Function Documentation

void dhcpc_appcall ( void )

Definition at line 340 of file dhcpc.c.

void dhcpc_configured ( const struct dhcpc_state * s )

void dhcpc_init | ( | const void * | mac_addr,
 |  | int | mac_len
 | ) |  |

Definition at line 323 of file dhcpc.c.

void dhcpc_request ( void )

Definition at line 346 of file dhcpc.c.

Generated on Tue Jun 7 14:59:13 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/hello-world/hello-world.c File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/hello-world/hello-world.c File Reference

#include "hello-world.h"
#include "uip.h"
#include <string.h>

Go to the source code of this file.

Functions

void | hello_world_init (void)
void | hello_world_appcall (void)

Detailed Description

An example of how to write uIP applications with protosockets.
Author:
Adam Dunkels <adam@sics.se>

Definition in file hello-world.c.

Generated on Tue Jun 7 14:59:13 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/hello-world/hello-world.h File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/hello-world/hello-world.h File Reference

#include "uipopt.h"
#include "psock.h"

Go to the source code of this file.

Data Structures

struct | hello_world_state

Functions

void | hello_world_appcall (void)
void | hello_world_init (void)

Appication specific configurations

An uIP application is implemented using a single application function that is called by uIP whenever a TCP/IP event occurs. The name of this function must be registered with uIP at compile time using the UIP_APPCALL definition.

uIP applications can store the application state within the uip_conn structure by specifying the type of the application structure by typedef:ing the type uip_tcp_appstate_t and uip_udp_appstate_t.

The file containing the definitions must be included in the uipopt.h file.

The following example illustrates how this can look.

void httpd_appcall(void);
#define UIP_APPCALL     httpd_appcall

struct httpd_state {
  u8_t state;
  u16_t count;
  char *dataptr;
  char *script;
};
typedef struct httpd_state uip_tcp_appstate_t

#define | UIP_APPCALL hello_world_appcall
typedef struct hello_world_state | uip_tcp_appstate_t

Detailed Description

Header file for an example of how to write uIP applications with protosockets.
Author:
Adam Dunkels <adam@sics.se>

Definition in file hello-world.h.

Generated on Tue Jun 7 14:59:13 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/resolv/resolv.c File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/resolv/resolv.c File Reference

#include "resolv.h"
#include "uip.h"
#include <string.h>

Go to the source code of this file.

Data Structures

struct | dns_hdr
struct | dns_answer
struct | namemap

Defines

#define | NULL (void *)0
#define | MAX_RETRIES 8
#define | DNS_FLAG1_RESPONSE 0x80
#define | DNS_FLAG1_OPCODE_STATUS 0x10
#define | DNS_FLAG1_OPCODE_INVERSE 0x08
#define | DNS_FLAG1_OPCODE_STANDARD 0x00
#define | DNS_FLAG1_AUTHORATIVE 0x04
#define | DNS_FLAG1_TRUNC 0x02
#define | DNS_FLAG1_RD 0x01
#define | DNS_FLAG2_RA 0x80
#define | DNS_FLAG2_ERR_MASK 0x0f
#define | DNS_FLAG2_ERR_NONE 0x00
#define | DNS_FLAG2_ERR_NAME 0x03
#define | STATE_UNUSED 0
#define | STATE_NEW 1
#define | STATE_ASKING 2
#define | STATE_DONE 3
#define | STATE_ERROR 4
#define | RESOLV_ENTRIES 4

Functions

void | resolv_appcall (void)
void | resolv_query (char *name)
u16_t * | resolv_lookup (char *name)
u16_t * | resolv_getserver (void)
void | resolv_conf (u16_t *dnsserver)
void | resolv_init (void)

Detailed Description

DNS host name to IP address resolver.
Author:
Adam Dunkels <adam@dunkels.com>
This file implements a DNS host name to IP address resolver.

Definition in file resolv.c.

Define Documentation

#define DNS_FLAG1_AUTHORATIVE 0x04

Definition at line 87 of file resolv.c.

#define DNS_FLAG1_OPCODE_INVERSE 0x08

Definition at line 85 of file resolv.c.

#define DNS_FLAG1_OPCODE_STANDARD 0x00

Definition at line 86 of file resolv.c.

#define DNS_FLAG1_OPCODE_STATUS 0x10

Definition at line 84 of file resolv.c.

#define DNS_FLAG1_RD 0x01

Definition at line 89 of file resolv.c.

#define DNS_FLAG1_RESPONSE 0x80

Definition at line 83 of file resolv.c.

#define DNS_FLAG1_TRUNC 0x02

Definition at line 88 of file resolv.c.

#define DNS_FLAG2_ERR_MASK 0x0f

Definition at line 91 of file resolv.c.

#define DNS_FLAG2_ERR_NAME 0x03

Definition at line 93 of file resolv.c.

#define DNS_FLAG2_ERR_NONE 0x00

Definition at line 92 of file resolv.c.

#define DNS_FLAG2_RA 0x80

Definition at line 90 of file resolv.c.

#define STATE_ASKING 2

Definition at line 114 of file resolv.c.

#define STATE_DONE 3

Definition at line 115 of file resolv.c.

#define STATE_ERROR 4

Definition at line 116 of file resolv.c.

#define STATE_NEW 1

Definition at line 113 of file resolv.c.

#define STATE_UNUSED 0

Definition at line 112 of file resolv.c.

Generated on Tue Jun 7 14:59:13 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/resolv/resolv.h File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/resolv/resolv.h File Reference

#include "uipopt.h"

Go to the source code of this file.

Defines

#define | UIP_UDP_APPCALL resolv_appcall

Typedefs

typedef int | uip_udp_appstate_t

Functions

void | resolv_appcall (void)
void | resolv_found (char *name, u16_t *ipaddr)
void | resolv_conf (u16_t *dnsserver)
u16_t * | resolv_getserver (void)
void | resolv_init (void)
u16_t * | resolv_lookup (char *name)
void | resolv_query (char *name)

Detailed Description

DNS resolver code header file.
Author:
Adam Dunkels <adam@dunkels.com>

Definition in file resolv.h.

Generated on Tue Jun 7 14:59:13 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/smtp/smtp-strings.c File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/smtp/smtp-strings.c File Reference

Go to the source code of this file.

Variables

const char | smtp_220 [4]
const char | smtp_helo [6]
const char | smtp_mail_from [12]
const char | smtp_rcpt_to [10]
const char | smtp_data [7]
const char | smtp_to [5]
const char | smtp_cc [5]
const char | smtp_from [7]
const char | smtp_subject [10]
const char | smtp_quit [7]
const char | smtp_crnl [3]
const char | smtp_crnlperiodcrnl [6]

Variable Documentation

const char smtp_220[4]

Initial value:

{0x32, 0x32, 0x30, }

Definition at line 35 of file smtp-strings.c.

const char smtp_cc[5]

Initial value:

{0x43, 0x63, 0x3a, 0x20, }

Definition at line 53 of file smtp-strings.c.

const char smtp_crnl[3]

Initial value:

{0xd, 0xa, }

Definition at line 65 of file smtp-strings.c.

const char smtp_crnlperiodcrnl[6]

Initial value:

{0xd, 0xa, 0x2e, 0xd, 0xa, }

Definition at line 68 of file smtp-strings.c.

const char smtp_data[7]

Initial value:

{0x44, 0x41, 0x54, 0x41, 0xd, 0xa, }

Definition at line 47 of file smtp-strings.c.

const char smtp_from[7]

Initial value:

{0x46, 0x72, 0x6f, 0x6d, 0x3a, 0x20, }

Definition at line 56 of file smtp-strings.c.

const char smtp_helo[6]

Initial value:

{0x48, 0x45, 0x4c, 0x4f, 0x20, }

Definition at line 38 of file smtp-strings.c.

const char smtp_mail_from[12]

Initial value:

{0x4d, 0x41, 0x49, 0x4c, 0x20, 0x46, 0x52, 0x4f, 0x4d, 0x3a, 0x20, }

Definition at line 41 of file smtp-strings.c.

const char smtp_quit[7]

Initial value:

{0x51, 0x55, 0x49, 0x54, 0xd, 0xa, }

Definition at line 62 of file smtp-strings.c.

const char smtp_rcpt_to[10]

Initial value:

{0x52, 0x43, 0x50, 0x54, 0x20, 0x54, 0x4f, 0x3a, 0x20, }

Definition at line 44 of file smtp-strings.c.

const char smtp_subject[10]

Initial value:

{0x53, 0x75, 0x62, 0x6a, 0x65, 0x63, 0x74, 0x3a, 0x20, }

Definition at line 59 of file smtp-strings.c.

const char smtp_to[5]

Initial value:

{0x54, 0x6f, 0x3a, 0x20, }

Definition at line 50 of file smtp-strings.c.

Generated on Tue Jun 7 14:59:13 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/smtp/smtp-strings.h File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/smtp/smtp-strings.h File Reference

Go to the source code of this file.

Variables

const char | smtp_220 [4]
const char | smtp_helo [6]
const char | smtp_mail_from [12]
const char | smtp_rcpt_to [10]
const char | smtp_data [7]
const char | smtp_to [5]
const char | smtp_cc [5]
const char | smtp_from [7]
const char | smtp_subject [10]
const char | smtp_quit [7]
const char | smtp_crnl [3]
const char | smtp_crnlperiodcrnl [6]

Variable Documentation

const char smtp_220[4]

Definition at line 35 of file smtp-strings.c.

const char smtp_cc[5]

Definition at line 53 of file smtp-strings.c.

const char smtp_crnl[3]

Definition at line 65 of file smtp-strings.c.

const char smtp_crnlperiodcrnl[6]

Definition at line 68 of file smtp-strings.c.

const char smtp_data[7]

Definition at line 47 of file smtp-strings.c.

const char smtp_from[7]

Definition at line 56 of file smtp-strings.c.

const char smtp_helo[6]

Definition at line 38 of file smtp-strings.c.

const char smtp_mail_from[12]

Definition at line 41 of file smtp-strings.c.

const char smtp_quit[7]

Definition at line 62 of file smtp-strings.c.

const char smtp_rcpt_to[10]

Definition at line 44 of file smtp-strings.c.

const char smtp_subject[10]

Definition at line 59 of file smtp-strings.c.

const char smtp_to[5]

Definition at line 50 of file smtp-strings.c.

Generated on Tue Jun 7 14:59:13 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/smtp/smtp.c File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/smtp/smtp.c File Reference

#include "smtp.h"
#include "smtp-strings.h"
#include "psock.h"
#include "uip.h"
#include <string.h>

Go to the source code of this file.

Defines

#define | ISO_nl 0x0a
#define | ISO_cr 0x0d
#define | ISO_period 0x2e
#define | ISO_2 0x32
#define | ISO_3 0x33
#define | ISO_4 0x34
#define | ISO_5 0x35

Functions

void | smtp_appcall (void)
void | smtp_configure (char *lhostname, void *server)
unsigned char | smtp_send (char *to, char *cc, char *from, char *subject, char *msg, u16_t msglen)
void | smtp_init (void)

Detailed Description

SMTP example implementation
Author:
Adam Dunkels <adam@dunkels.com>

Definition in file smtp.c.

Generated on Tue Jun 7 14:59:13 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/smtp/smtp.h File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/smtp/smtp.h File Reference

#include "uipopt.h"

Go to the source code of this file.

Data Structures

struct | smtp_state

Defines

#define | SMTP_ERR_OK 0
#define | SMTP_SEND(to, cc, from, subject, msg) smtp_send(to, cc, from, subject, msg, strlen(msg))
#define | UIP_APPCALL smtp_appcall

Typedefs

typedef struct smtp_state | uip_tcp_appstate_t

Functions

void | smtp_done (unsigned char error)
void | smtp_init (void)
void | smtp_configure (char *localhostname, u16_t *smtpserver)
unsigned char | smtp_send (char *to, char *from, char *subject, char *msg, u16_t msglen)
void | smtp_appcall (void)

Detailed Description

SMTP header file
Author:
Adam Dunkels <adam@dunkels.com>

Definition in file smtp.h.

Generated on Tue Jun 7 14:59:13 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/telnetd/shell.c File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/telnetd/shell.c File Reference

#include "shell.h"
#include <string.h>

Go to the source code of this file.

Data Structures

struct | ptentry

Defines

#define | SHELL_PROMPT "uIP 1.0> "

Functions

void | shell_init (void)
void | shell_start (void)
void | shell_input (char *cmd)

Define Documentation

#define SHELL_PROMPT "uIP 1.0> "

Definition at line 44 of file shell.c.

Function Documentation

void shell_init ( void )

Initialize the shell.

Called when the shell front-end process starts. This function may be used to start listening for signals.

Definition at line 105 of file shell.c.

void shell_input ( char * command )

Process a shell command.

This function will be called by the shell GUI / telnet server whan a command has been entered that should be processed by the shell back-end.

Parameters:
command The command to be processed.

Definition at line 118 of file shell.c.

void shell_start ( void )

Start the shell back-end.

Called by the front-end when a new shell is started.

Definition at line 110 of file shell.c.

Generated on Tue Jun 7 14:59:14 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/telnetd/shell.h File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/telnetd/shell.h File Reference

Go to the source code of this file.

Functions

void | shell_init (void)
void | shell_start (void)
void | shell_input (char *command)
void | shell_quit (char *)
void | shell_output (char *str1, char *str2)
void | shell_prompt (char *prompt)

Detailed Description

Interface for the Contiki shell.
Author:
Adam Dunkels <adam@dunkels.com>
Some of the functions declared in this file must be implemented as a shell back-end in the architecture specific files of a Contiki port.

Definition in file shell.h.

Function Documentation

void shell_init ( void )

Initialize the shell.

Called when the shell front-end process starts. This function may be used to start listening for signals.

Definition at line 105 of file shell.c.

void shell_input ( char * command )

Process a shell command.

This function will be called by the shell GUI / telnet server whan a command has been entered that should be processed by the shell back-end.

Parameters:
command The command to be processed.

Definition at line 118 of file shell.c.

void shell_output | ( | char * | str1,
 |  | char * | str2
 | ) |  |

Print a string to the shell window.

This function is implemented by the shell GUI / telnet server and can be called by the shell back-end to output a string in the shell window. The string is automatically appended with a linebreak.

Parameters:
str1 | The first half of the string to be output.
str2 | The second half of the string to be output.

Definition at line 113 of file telnetd.c.

void shell_prompt ( char * prompt )

Print a prompt to the shell window.

This function can be used by the shell back-end to print out a prompt to the shell window.

Parameters:
prompt The prompt to be printed.

Definition at line 101 of file telnetd.c.

void shell_quit ( char * )

Quit the shell.

Definition at line 79 of file telnetd.c.

void shell_start ( void )

Start the shell back-end.

Called by the front-end when a new shell is started.

Definition at line 110 of file shell.c.

Generated on Tue Jun 7 14:59:14 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/telnetd/telnetd.c File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/telnetd/telnetd.c File Reference

#include "uip.h"
#include "telnetd.h"
#include "memb.h"
#include "shell.h"
#include <string.h>

Go to the source code of this file.

Data Structures

struct | telnetd_line

Defines

#define | ISO_nl 0x0a
#define | ISO_cr 0x0d
#define | STATE_NORMAL 0
#define | STATE_IAC 1
#define | STATE_WILL 2
#define | STATE_WONT 3
#define | STATE_DO 4
#define | STATE_DONT 5
#define | STATE_CLOSE 6
#define | TELNET_IAC 255
#define | TELNET_WILL 251
#define | TELNET_WONT 252
#define | TELNET_DO 253
#define | TELNET_DONT 254

Functions

MEMB (linemem, struct telnetd_line, TELNETD_CONF_NUMLINES)
void | shell_quit (char *str)
void | shell_prompt (char *str)
void | shell_output (char *str1, char *str2)
void | telnetd_init (void)
void | telnetd_appcall (void)

Define Documentation

#define ISO_cr 0x0d

Definition at line 43 of file telnetd.c.

#define ISO_nl 0x0a

Definition at line 42 of file telnetd.c.

#define STATE_CLOSE 6

Definition at line 56 of file telnetd.c.

#define STATE_DO 4

Definition at line 54 of file telnetd.c.

#define STATE_DONT 5

Definition at line 55 of file telnetd.c.

#define STATE_IAC 1

Definition at line 51 of file telnetd.c.

#define STATE_NORMAL 0

Definition at line 50 of file telnetd.c.

#define STATE_WILL 2

Definition at line 52 of file telnetd.c.

#define STATE_WONT 3

Definition at line 53 of file telnetd.c.

#define TELNET_DO 253

Definition at line 63 of file telnetd.c.

#define TELNET_DONT 254

Definition at line 64 of file telnetd.c.

#define TELNET_IAC 255

Definition at line 60 of file telnetd.c.

#define TELNET_WILL 251

Definition at line 61 of file telnetd.c.

#define TELNET_WONT 252

Definition at line 62 of file telnetd.c.

Function Documentation

MEMB | ( | linemem | ,
 |  | struct telnetd_line | ,
 |  | TELNETD_CONF_NUMLINES |
 | ) |  |

void shell_output | ( | char * | str1,
 |  | char * | str2
 | ) |  |

Print a string to the shell window.

This function is implemented by the shell GUI / telnet server and can be called by the shell back-end to output a string in the shell window. The string is automatically appended with a linebreak.

Parameters:
str1 | The first half of the string to be output.
str2 | The second half of the string to be output.

Definition at line 113 of file telnetd.c.

void shell_prompt ( char * prompt )

Print a prompt to the shell window.

This function can be used by the shell back-end to print out a prompt to the shell window.

Parameters:
prompt The prompt to be printed.

Definition at line 101 of file telnetd.c.

void shell_quit ( char * )

Quit the shell.

Definition at line 79 of file telnetd.c.

void telnetd_appcall ( void )

Definition at line 308 of file telnetd.c.

void telnetd_init ( void )

Definition at line 137 of file telnetd.c.

Generated on Tue Jun 7 14:59:14 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/telnetd/telnetd.h File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/telnetd/telnetd.h File Reference

#include "uipopt.h"

Go to the source code of this file.

Data Structures

struct | telnetd_state

Defines

#define | TELNETD_CONF_LINELEN 40
#define | TELNETD_CONF_NUMLINES 16
#define | UIP_APPCALL telnetd_appcall

Typedefs

typedef struct telnetd_state | uip_tcp_appstate_t

Functions

void | telnetd_appcall (void)

Define Documentation

#define TELNETD_CONF_LINELEN 40

Definition at line 43 of file telnetd.h.

#define TELNETD_CONF_NUMLINES 16

Definition at line 46 of file telnetd.h.

#define UIP_APPCALL telnetd_appcall

Definition at line 60 of file telnetd.h.

Typedef Documentation

typedef struct telnetd_state uip_tcp_appstate_t

Definition at line 57 of file telnetd.h.

Function Documentation

void telnetd_appcall ( void )

Definition at line 308 of file telnetd.c.

Generated on Tue Jun 7 14:59:14 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/webclient/webclient-strings.c File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/webclient/webclient-strings.c File Reference

Go to the source code of this file.

Variables

const char | http_http [8]
const char | http_200 [5]
const char | http_301 [5]
const char | http_302 [5]
const char | http_get [5]
const char | http_10 [9]
const char | http_11 [9]
const char | http_content_type [15]
const char | http_texthtml [10]
const char | http_location [11]
const char | http_host [7]
const char | http_crnl [3]
const char | http_index_html [12]
const char | http_404_html [10]
const char | http_content_type_html [28]
const char | http_content_type_css [27]
const char | http_content_type_text [28]
const char | http_content_type_png [28]
const char | http_content_type_gif [28]
const char | http_content_type_jpg [29]
const char | http_content_type_binary [43]
const char | http_html [6]
const char | http_shtml [7]
const char | http_htm [5]
const char | http_css [5]
const char | http_png [5]
const char | http_gif [5]
const char | http_jpg [5]
const char | http_text [6]
const char | http_txt [5]
const char | http_user_agent_fields [77]

Variable Documentation

const char http_10[9]

Initial value:

{0x48, 0x54, 0x54, 0x50, 0x2f, 0x31, 0x2e, 0x30, 0 }

Definition at line 16 of file webclient-strings.c.

const char http_11[9]

Initial value:

{0x48, 0x54, 0x54, 0x50, 0x2f, 0x31, 0x2e, 0x31, 0 }

Definition at line 19 of file webclient-strings.c.

const char http_200[5]

Initial value:

{0x32, 0x30, 0x30, 0x20, 0 }

Definition at line 4 of file webclient-strings.c.

const char http_301[5]

Initial value:

{0x33, 0x30, 0x31, 0x20, 0 }

Definition at line 7 of file webclient-strings.c.

const char http_302[5]

Initial value:

{0x33, 0x30, 0x32, 0x20, 0 }

Definition at line 10 of file webclient-strings.c.

const char http_404_html[10]

Initial value:

{0x2f, 0x34, 0x30, 0x34, 0x2e, 0x68, 0x74, 0x6d, 0x6c, 0 }

Definition at line 40 of file webclient-strings.c.

const char http_content_type[15]

Initial value:

{0x63, 0x6f, 0x6e, 0x74, 0x65, 0x6e, 0x74, 0x2d, 0x74, 0x79, 0x70, 0x65, 0x3a, 0x20, 0 }

Definition at line 22 of file webclient-strings.c.

const char http_content_type_binary[43]

Initial value:

{0x43, 0x6f, 0x6e, 0x74, 0x65, 0x6e, 0x74, 0x2d, 0x74, 0x79, 0x70, 0x65, 0x3a, 0x20, 0x61, 0x70, 0x70, 0x6c, 0x69, 0x63, 0x61, 0x74, 0x69, 0x6f, 0x6e, 0x2f, 0x6f, 0x63, 0x74, 0x65, 0x74, 0x2d, 0x73, 0x74, 0x72, 0x65, 0x61, 0x6d, 0xd, 0xa, 0xd, 0xa, 0 }

Definition at line 61 of file webclient-strings.c.

const char http_content_type_css[27]

Initial value:

{0x43, 0x6f, 0x6e, 0x74, 0x65, 0x6e, 0x74, 0x2d, 0x74, 0x79, 0x70, 0x65, 0x3a, 0x20, 0x74, 0x65, 0x78, 0x74, 0x2f, 0x63, 0x73, 0x73, 0xd, 0xa, 0xd, 0xa, 0 }

Definition at line 46 of file webclient-strings.c.

const char http_content_type_gif[28]

Initial value:

{0x43, 0x6f, 0x6e, 0x74, 0x65, 0x6e, 0x74, 0x2d, 0x74, 0x79, 0x70, 0x65, 0x3a, 0x20, 0x69, 0x6d, 0x61, 0x67, 0x65, 0x2f, 0x67, 0x69, 0x66, 0xd, 0xa, 0xd, 0xa, 0 }

Definition at line 55 of file webclient-strings.c.

const char http_content_type_html[28]

Initial value:

{0x43, 0x6f, 0x6e, 0x74, 0x65, 0x6e, 0x74, 0x2d, 0x74, 0x79, 0x70, 0x65, 0x3a, 0x20, 0x74, 0x65, 0x78, 0x74, 0x2f, 0x68, 0x74, 0x6d, 0x6c, 0xd, 0xa, 0xd, 0xa, 0 }

Definition at line 43 of file webclient-strings.c.

const char http_content_type_jpg[29]

Initial value:

{0x43, 0x6f, 0x6e, 0x74, 0x65, 0x6e, 0x74, 0x2d, 0x74, 0x79, 0x70, 0x65, 0x3a, 0x20, 0x69, 0x6d, 0x61, 0x67, 0x65, 0x2f, 0x6a, 0x70, 0x65, 0x67, 0xd, 0xa, 0xd, 0xa, 0 }

Definition at line 58 of file webclient-strings.c.

const char http_content_type_png[28]

Initial value:

{0x43, 0x6f, 0x6e, 0x74, 0x65, 0x6e, 0x74, 0x2d, 0x74, 0x79, 0x70, 0x65, 0x3a, 0x20, 0x69, 0x6d, 0x61, 0x67, 0x65, 0x2f, 0x70, 0x6e, 0x67, 0xd, 0xa, 0xd, 0xa, 0 }

Definition at line 52 of file webclient-strings.c.

const char http_content_type_text[28]

Initial value:

{0x43, 0x6f, 0x6e, 0x74, 0x65, 0x6e, 0x74, 0x2d, 0x74, 0x79, 0x70, 0x65, 0x3a, 0x20, 0x74, 0x65, 0x78, 0x74, 0x2f, 0x74, 0x65, 0x78, 0x74, 0xd, 0xa, 0xd, 0xa, 0 }

Definition at line 49 of file webclient-strings.c.

const char http_crnl[3]

Initial value:

{0xd, 0xa, 0 }

Definition at line 34 of file webclient-strings.c.

const char http_css[5]

Initial value:

{0x2e, 0x63, 0x73, 0x73, 0 }

Definition at line 73 of file webclient-strings.c.

const char http_get[5]

Initial value:

{0x47, 0x45, 0x54, 0x20, 0 }

Definition at line 13 of file webclient-strings.c.

const char http_gif[5]

Initial value:

{0x2e, 0x67, 0x69, 0x66, 0 }

Definition at line 79 of file webclient-strings.c.

const char http_host[7]

Initial value:

{0x68, 0x6f, 0x73, 0x74, 0x3a, 0x20, 0 }

Definition at line 31 of file webclient-strings.c.

const char http_htm[5]

Initial value:

{0x2e, 0x68, 0x74, 0x6d, 0 }

Definition at line 70 of file webclient-strings.c.

const char http_html[6]

Initial value:

{0x2e, 0x68, 0x74, 0x6d, 0x6c, 0 }

Definition at line 64 of file webclient-strings.c.

const char http_http[8]

Initial value:

{0x68, 0x74, 0x74, 0x70, 0x3a, 0x2f, 0x2f, 0 }

Definition at line 1 of file webclient-strings.c.

const char http_index_html[12]

Initial value:

{0x2f, 0x69, 0x6e, 0x64, 0x65, 0x78, 0x2e, 0x68, 0x74, 0x6d, 0x6c, 0 }

Definition at line 37 of file webclient-strings.c.

const char http_jpg[5]

Initial value:

{0x2e, 0x6a, 0x70, 0x67, 0 }

Definition at line 82 of file webclient-strings.c.

const char http_location[11]

Initial value:

{0x6c, 0x6f, 0x63, 0x61, 0x74, 0x69, 0x6f, 0x6e, 0x3a, 0x20, 0 }

Definition at line 28 of file webclient-strings.c.

const char http_png[5]

Initial value:

{0x2e, 0x70, 0x6e, 0x67, 0 }

Definition at line 76 of file webclient-strings.c.

const char http_shtml[7]

Initial value:

{0x2e, 0x73, 0x68, 0x74, 0x6d, 0x6c, 0 }

Definition at line 67 of file webclient-strings.c.

const char http_text[6]

Initial value:

{0x2e, 0x74, 0x65, 0x78, 0x74, 0 }

Definition at line 85 of file webclient-strings.c.

const char http_texthtml[10]

Initial value:

{0x74, 0x65, 0x78, 0x74, 0x2f, 0x68, 0x74, 0x6d, 0x6c, 0 }

Definition at line 25 of file webclient-strings.c.

const char http_txt[5]

Initial value:

{0x2e, 0x74, 0x78, 0x74, 0 }

Definition at line 88 of file webclient-strings.c.

const char http_user_agent_fields[77]

Initial value:

{0x43, 0x6f, 0x6e, 0x6e, 0x65, 0x63, 0x74, 0x69, 0x6f, 0x6e, 0x3a, 0x20, 0x63, 0x6c, 0x6f, 0x73, 0x65, 0xd, 0xa, 0x55, 0x73, 0x65, 0x72, 0x2d, 0x41, 0x67, 0x65, 0x6e, 0x74, 0x3a, 0x20, 0x75, 0x49, 0x50, 0x2f, 0x31, 0x2e, 0x30, 0x20, 0x28, 0x3b, 0x20, 0x68, 0x74, 0x74, 0x70, 0x3a, 0x2f, 0x2f, 0x77, 0x77, 0x77, 0x2e, 0x73, 0x69, 0x63, 0x73, 0x2e, 0x73, 0x65, 0x2f, 0x7e, 0x61, 0x64, 0x61, 0x6d, 0x2f, 0x75, 0x69, 0x70, 0x2f, 0x29, 0xd, 0xa, 0xd, 0xa, 0 }

Definition at line 91 of file webclient-strings.c.

Generated on Tue Jun 7 14:59:14 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/webclient/webclient-strings.h File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/webclient/webclient-strings.h File Reference

Go to the source code of this file.

Variables

const char | http_http [8]
const char | http_200 [5]
const char | http_301 [5]
const char | http_302 [5]
const char | http_get [5]
const char | http_10 [9]
const char | http_11 [9]
const char | http_content_type [15]
const char | http_texthtml [10]
const char | http_location [11]
const char | http_host [7]
const char | http_crnl [3]
const char | http_index_html [12]
const char | http_404_html [10]
const char | http_content_type_html [28]
const char | http_content_type_css [27]
const char | http_content_type_text [28]
const char | http_content_type_png [28]
const char | http_content_type_gif [28]
const char | http_content_type_jpg [29]
const char | http_content_type_binary [43]
const char | http_html [6]
const char | http_shtml [7]
const char | http_htm [5]
const char | http_css [5]
const char | http_png [5]
const char | http_gif [5]
const char | http_jpg [5]
const char | http_text [6]
const char | http_txt [5]
const char | http_user_agent_fields [77]

Variable Documentation

const char http_10[9]

Definition at line 16 of file webclient-strings.c.

const char http_11[9]

Definition at line 19 of file webclient-strings.c.

const char http_200[5]

Definition at line 4 of file webclient-strings.c.

const char http_301[5]

Definition at line 7 of file webclient-strings.c.

const char http_302[5]

Definition at line 10 of file webclient-strings.c.

const char http_404_html[10]

Definition at line 40 of file webclient-strings.c.

const char http_content_type[15]

Definition at line 22 of file webclient-strings.c.

const char http_content_type_binary[43]

Definition at line 61 of file webclient-strings.c.

const char http_content_type_css[27]

Definition at line 46 of file webclient-strings.c.

const char http_content_type_gif[28]

Definition at line 55 of file webclient-strings.c.

const char http_content_type_html[28]

Definition at line 43 of file webclient-strings.c.

const char http_content_type_jpg[29]

Definition at line 58 of file webclient-strings.c.

const char http_content_type_png[28]

Definition at line 52 of file webclient-strings.c.

const char http_content_type_text[28]

Definition at line 49 of file webclient-strings.c.

const char http_crnl[3]

Definition at line 34 of file webclient-strings.c.

const char http_css[5]

Definition at line 73 of file webclient-strings.c.

const char http_get[5]

Definition at line 13 of file webclient-strings.c.

const char http_gif[5]

Definition at line 79 of file webclient-strings.c.

const char http_host[7]

Definition at line 31 of file webclient-strings.c.

const char http_htm[5]

Definition at line 70 of file webclient-strings.c.

const char http_html[6]

Definition at line 64 of file webclient-strings.c.

const char http_http[8]

Definition at line 1 of file webclient-strings.c.

const char http_index_html[12]

Definition at line 37 of file webclient-strings.c.

const char http_jpg[5]

Definition at line 82 of file webclient-strings.c.

const char http_location[11]

Definition at line 28 of file webclient-strings.c.

const char http_png[5]

Definition at line 76 of file webclient-strings.c.

const char http_shtml[7]

Definition at line 67 of file webclient-strings.c.

const char http_text[6]

Definition at line 85 of file webclient-strings.c.

const char http_texthtml[10]

Definition at line 25 of file webclient-strings.c.

const char http_txt[5]

Definition at line 88 of file webclient-strings.c.

const char http_user_agent_fields[77]

Definition at line 91 of file webclient-strings.c.

Generated on Tue Jun 7 14:59:14 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/webclient/webclient.c File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/webclient/webclient.c File Reference

#include "uip.h"
#include "uiplib.h"
#include "webclient.h"
#include "resolv.h"
#include <string.h>

Go to the source code of this file.

Defines

#define | WEBCLIENT_TIMEOUT 100
#define | WEBCLIENT_STATE_STATUSLINE 0
#define | WEBCLIENT_STATE_HEADERS 1
#define | WEBCLIENT_STATE_DATA 2
#define | WEBCLIENT_STATE_CLOSE 3
#define | HTTPFLAG_NONE 0
#define | HTTPFLAG_OK 1
#define | HTTPFLAG_MOVED 2
#define | HTTPFLAG_ERROR 3
#define | ISO_nl 0x0a
#define | ISO_cr 0x0d
#define | ISO_space 0x20

Functions

char * | webclient_mimetype (void)
char * | webclient_filename (void)
char * | webclient_hostname (void)
unsigned short | webclient_port (void)
void | webclient_init (void)
void | webclient_close (void)
unsigned char | webclient_get (char *host, u16_t port, char *file)
void | webclient_appcall (void)

Detailed Description

Implementation of the HTTP client.
Author:
Adam Dunkels <adam@dunkels.com>

Definition in file webclient.c.

Generated on Tue Jun 7 14:59:14 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/webclient/webclient.h File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/webclient/webclient.h File Reference

#include "webclient-strings.h"
#include "uipopt.h"

Go to the source code of this file.

Data Structures

struct | webclient_state

Defines

#define | WEBCLIENT_CONF_MAX_URLLEN 100
#define | UIP_APPCALL webclient_appcall

Typedefs

typedef struct webclient_state | uip_tcp_appstate_t

Functions

void | webclient_datahandler (char *data, u16_t len)
void | webclient_connected (void)
void | webclient_timedout (void)
void | webclient_aborted (void)
void | webclient_closed (void)
void | webclient_init (void)
unsigned char | webclient_get (char *host, u16_t port, char *file)
void | webclient_close (void)
void | webclient_appcall (void)
char * | webclient_mimetype (void)
char * | webclient_filename (void)
char * | webclient_hostname (void)
unsigned short | webclient_port (void)

Detailed Description

Header file for the HTTP client.
Author:
Adam Dunkels <adam@dunkels.com>

Definition in file webclient.h.

Generated on Tue Jun 7 14:59:14 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/webserver/http-strings.c File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/webserver/http-strings.c File Reference

Go to the source code of this file.

Variables

const char | http_http [8]
const char | http_200 [5]
const char | http_301 [5]
const char | http_302 [5]
const char | http_get [5]
const char | http_10 [9]
const char | http_11 [9]
const char | http_content_type [15]
const char | http_texthtml [10]
const char | http_location [11]
const char | http_host [7]
const char | http_crnl [3]
const char | http_index_html [12]
const char | http_404_html [10]
const char | http_referer [9]
const char | http_header_200 [84]
const char | http_header_404 [91]
const char | http_content_type_plain [29]
const char | http_content_type_html [28]
const char | http_content_type_css [27]
const char | http_content_type_text [28]
const char | http_content_type_png [28]
const char | http_content_type_gif [28]
const char | http_content_type_jpg [29]
const char | http_content_type_binary [43]
const char | http_html [6]
const char | http_shtml [7]
const char | http_htm [5]
const char | http_css [5]
const char | http_png [5]
const char | http_gif [5]
const char | http_jpg [5]
const char | http_text [5]
const char | http_txt [5]

Variable Documentation

const char http_10[9]

Initial value:

{0x48, 0x54, 0x54, 0x50, 0x2f, 0x31, 0x2e, 0x30, }

Definition at line 16 of file http-strings.c.

const char http_11[9]

Initial value:

{0x48, 0x54, 0x54, 0x50, 0x2f, 0x31, 0x2e, 0x31, }

Definition at line 19 of file http-strings.c.

const char http_200[5]

Initial value:

{0x32, 0x30, 0x30, 0x20, }

Definition at line 4 of file http-strings.c.

const char http_301[5]

Initial value:

{0x33, 0x30, 0x31, 0x20, }

Definition at line 7 of file http-strings.c.

const char http_302[5]

Initial value:

{0x33, 0x30, 0x32, 0x20, }

Definition at line 10 of file http-strings.c.

const char http_404_html[10]

Initial value:

{0x2f, 0x34, 0x30, 0x34, 0x2e, 0x68, 0x74, 0x6d, 0x6c, }

Definition at line 40 of file http-strings.c.

const char http_content_type[15]

Initial value:

{0x63, 0x6f, 0x6e, 0x74, 0x65, 0x6e, 0x74, 0x2d, 0x74, 0x79, 0x70, 0x65, 0x3a, 0x20, }

Definition at line 22 of file http-strings.c.

const char http_content_type_binary[43]

Initial value:

{0x43, 0x6f, 0x6e, 0x74, 0x65, 0x6e, 0x74, 0x2d, 0x74, 0x79, 0x70, 0x65, 0x3a, 0x20, 0x61, 0x70, 0x70, 0x6c, 0x69, 0x63, 0x61, 0x74, 0x69, 0x6f, 0x6e, 0x2f, 0x6f, 0x63, 0x74, 0x65, 0x74, 0x2d, 0x73, 0x74, 0x72, 0x65, 0x61, 0x6d, 0xd, 0xa, 0xd, 0xa, }

Definition at line 73 of file http-strings.c.

const char http_content_type_css[27]

Initial value:

{0x43, 0x6f, 0x6e, 0x74, 0x65, 0x6e, 0x74, 0x2d, 0x74, 0x79, 0x70, 0x65, 0x3a, 0x20, 0x74, 0x65, 0x78, 0x74, 0x2f, 0x63, 0x73, 0x73, 0xd, 0xa, 0xd, 0xa, }

Definition at line 58 of file http-strings.c.

const char http_content_type_gif[28]

Initial value:

{0x43, 0x6f, 0x6e, 0x74, 0x65, 0x6e, 0x74, 0x2d, 0x74, 0x79, 0x70, 0x65, 0x3a, 0x20, 0x69, 0x6d, 0x61, 0x67, 0x65, 0x2f, 0x67, 0x69, 0x66, 0xd, 0xa, 0xd, 0xa, }

Definition at line 67 of file http-strings.c.

const char http_content_type_html[28]

Initial value:

{0x43, 0x6f, 0x6e, 0x74, 0x65, 0x6e, 0x74, 0x2d, 0x74, 0x79, 0x70, 0x65, 0x3a, 0x20, 0x74, 0x65, 0x78, 0x74, 0x2f, 0x68, 0x74, 0x6d, 0x6c, 0xd, 0xa, 0xd, 0xa, }

Definition at line 55 of file http-strings.c.

const char http_content_type_jpg[29]

Initial value:

{0x43, 0x6f, 0x6e, 0x74, 0x65, 0x6e, 0x74, 0x2d, 0x74, 0x79, 0x70, 0x65, 0x3a, 0x20, 0x69, 0x6d, 0x61, 0x67, 0x65, 0x2f, 0x6a, 0x70, 0x65, 0x67, 0xd, 0xa, 0xd, 0xa, }

Definition at line 70 of file http-strings.c.

const char http_content_type_plain[29]

Initial value:

{0x43, 0x6f, 0x6e, 0x74, 0x65, 0x6e, 0x74, 0x2d, 0x74, 0x79, 0x70, 0x65, 0x3a, 0x20, 0x74, 0x65, 0x78, 0x74, 0x2f, 0x70, 0x6c, 0x61, 0x69, 0x6e, 0xd, 0xa, 0xd, 0xa, }

Definition at line 52 of file http-strings.c.

const char http_content_type_png[28]

Initial value:

{0x43, 0x6f, 0x6e, 0x74, 0x65, 0x6e, 0x74, 0x2d, 0x74, 0x79, 0x70, 0x65, 0x3a, 0x20, 0x69, 0x6d, 0x61, 0x67, 0x65, 0x2f, 0x70, 0x6e, 0x67, 0xd, 0xa, 0xd, 0xa, }

Definition at line 64 of file http-strings.c.

const char http_content_type_text[28]

Initial value:

{0x43, 0x6f, 0x6e, 0x74, 0x65, 0x6e, 0x74, 0x2d, 0x74, 0x79, 0x70, 0x65, 0x3a, 0x20, 0x74, 0x65, 0x78, 0x74, 0x2f, 0x74, 0x65, 0x78, 0x74, 0xd, 0xa, 0xd, 0xa, }

Definition at line 61 of file http-strings.c.

const char http_crnl[3]

Initial value:

{0xd, 0xa, }

Definition at line 34 of file http-strings.c.

const char http_css[5]

Initial value:

{0x2e, 0x63, 0x73, 0x73, }

Definition at line 85 of file http-strings.c.

const char http_get[5]

Initial value:

{0x47, 0x45, 0x54, 0x20, }

Definition at line 13 of file http-strings.c.

const char http_gif[5]

Initial value:

{0x2e, 0x67, 0x69, 0x66, }

Definition at line 91 of file http-strings.c.

const char http_header_200[84]

Initial value:

{0x48, 0x54, 0x54, 0x50, 0x2f, 0x31, 0x2e, 0x30, 0x20, 0x32, 0x30, 0x30, 0x20, 0x4f, 0x4b, 0xd, 0xa, 0x53, 0x65, 0x72, 0x76, 0x65, 0x72, 0x3a, 0x20, 0x75, 0x49, 0x50, 0x2f, 0x31, 0x2e, 0x30, 0x20, 0x68, 0x74, 0x74, 0x70, 0x3a, 0x2f, 0x2f, 0x77, 0x77, 0x77, 0x2e, 0x73, 0x69, 0x63, 0x73, 0x2e, 0x73, 0x65, 0x2f, 0x7e, 0x61, 0x64, 0x61, 0x6d, 0x2f, 0x75, 0x69, 0x70, 0x2f, 0xd, 0xa, 0x43, 0x6f, 0x6e, 0x6e, 0x65, 0x63, 0x74, 0x69, 0x6f, 0x6e, 0x3a, 0x20, 0x63, 0x6c, 0x6f, 0x73, 0x65, 0xd, 0xa, }

Definition at line 46 of file http-strings.c.

const char http_header_404[91]

Initial value:

{0x48, 0x54, 0x54, 0x50, 0x2f, 0x31, 0x2e, 0x30, 0x20, 0x34, 0x30, 0x34, 0x20, 0x4e, 0x6f, 0x74, 0x20, 0x66, 0x6f, 0x75, 0x6e, 0x64, 0xd, 0xa, 0x53, 0x65, 0x72, 0x76, 0x65, 0x72, 0x3a, 0x20, 0x75, 0x49, 0x50, 0x2f, 0x31, 0x2e, 0x30, 0x20, 0x68, 0x74, 0x74, 0x70, 0x3a, 0x2f, 0x2f, 0x77, 0x77, 0x77, 0x2e, 0x73, 0x69, 0x63, 0x73, 0x2e, 0x73, 0x65, 0x2f, 0x7e, 0x61, 0x64, 0x61, 0x6d, 0x2f, 0x75, 0x69, 0x70, 0x2f, 0xd, 0xa, 0x43, 0x6f, 0x6e, 0x6e, 0x65, 0x63, 0x74, 0x69, 0x6f, 0x6e, 0x3a, 0x20, 0x63, 0x6c, 0x6f, 0x73, 0x65, 0xd, 0xa, }

Definition at line 49 of file http-strings.c.

const char http_host[7]

Initial value:

{0x68, 0x6f, 0x73, 0x74, 0x3a, 0x20, }

Definition at line 31 of file http-strings.c.

const char http_htm[5]

Initial value:

{0x2e, 0x68, 0x74, 0x6d, }

Definition at line 82 of file http-strings.c.

const char http_html[6]

Initial value:

{0x2e, 0x68, 0x74, 0x6d, 0x6c, }

Definition at line 76 of file http-strings.c.

const char http_http[8]

Initial value:

{0x68, 0x74, 0x74, 0x70, 0x3a, 0x2f, 0x2f, }

Definition at line 1 of file http-strings.c.

const char http_index_html[12]

Initial value:

{0x2f, 0x69, 0x6e, 0x64, 0x65, 0x78, 0x2e, 0x68, 0x74, 0x6d, 0x6c, }

Definition at line 37 of file http-strings.c.

const char http_jpg[5]

Initial value:

{0x2e, 0x6a, 0x70, 0x67, }

Definition at line 94 of file http-strings.c.

const char http_location[11]

Initial value:

{0x6c, 0x6f, 0x63, 0x61, 0x74, 0x69, 0x6f, 0x6e, 0x3a, 0x20, }

Definition at line 28 of file http-strings.c.

const char http_png[5]

Initial value:

{0x2e, 0x70, 0x6e, 0x67, }

Definition at line 88 of file http-strings.c.

const char http_referer[9]

Initial value:

{0x52, 0x65, 0x66, 0x65, 0x72, 0x65, 0x72, 0x3a, }

Definition at line 43 of file http-strings.c.

const char http_shtml[7]

Initial value:

{0x2e, 0x73, 0x68, 0x74, 0x6d, 0x6c, }

Definition at line 79 of file http-strings.c.

const char http_text[5]

Initial value:

{0x2e, 0x74, 0x78, 0x74, }

Definition at line 97 of file http-strings.c.

const char http_texthtml[10]

Initial value:

{0x74, 0x65, 0x78, 0x74, 0x2f, 0x68, 0x74, 0x6d, 0x6c, }

Definition at line 25 of file http-strings.c.

const char http_txt[5]

Initial value:

{0x2e, 0x74, 0x78, 0x74, }

Definition at line 100 of file http-strings.c.

Generated on Tue Jun 7 14:59:14 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/webserver/http-strings.h File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/webserver/http-strings.h File Reference

Go to the source code of this file.

Variables

const char | http_http [8]
const char | http_200 [5]
const char | http_301 [5]
const char | http_302 [5]
const char | http_get [5]
const char | http_10 [9]
const char | http_11 [9]
const char | http_content_type [15]
const char | http_texthtml [10]
const char | http_location [11]
const char | http_host [7]
const char | http_crnl [3]
const char | http_index_html [12]
const char | http_404_html [10]
const char | http_referer [9]
const char | http_header_200 [84]
const char | http_header_404 [91]
const char | http_content_type_plain [29]
const char | http_content_type_html [28]
const char | http_content_type_css [27]
const char | http_content_type_text [28]
const char | http_content_type_png [28]
const char | http_content_type_gif [28]
const char | http_content_type_jpg [29]
const char | http_content_type_binary [43]
const char | http_html [6]
const char | http_shtml [7]
const char | http_htm [5]
const char | http_css [5]
const char | http_png [5]
const char | http_gif [5]
const char | http_jpg [5]
const char | http_text [5]
const char | http_txt [5]

Variable Documentation

const char http_10[9]

Definition at line 16 of file webclient-strings.c.

const char http_11[9]

Definition at line 19 of file webclient-strings.c.

const char http_200[5]

Definition at line 4 of file webclient-strings.c.

const char http_301[5]

Definition at line 7 of file webclient-strings.c.

const char http_302[5]

Definition at line 10 of file webclient-strings.c.

const char http_404_html[10]

Definition at line 40 of file webclient-strings.c.

const char http_content_type[15]

Definition at line 22 of file webclient-strings.c.

const char http_content_type_binary[43]

Definition at line 61 of file webclient-strings.c.

const char http_content_type_css[27]

Definition at line 46 of file webclient-strings.c.

const char http_content_type_gif[28]

Definition at line 55 of file webclient-strings.c.

const char http_content_type_html[28]

Definition at line 43 of file webclient-strings.c.

const char http_content_type_jpg[29]

Definition at line 58 of file webclient-strings.c.

const char http_content_type_plain[29]

Definition at line 52 of file http-strings.c.

const char http_content_type_png[28]

Definition at line 52 of file webclient-strings.c.

const char http_content_type_text[28]

Definition at line 49 of file webclient-strings.c.

const char http_crnl[3]

Definition at line 34 of file webclient-strings.c.

const char http_css[5]

Definition at line 73 of file webclient-strings.c.

const char http_get[5]

Definition at line 13 of file webclient-strings.c.

const char http_gif[5]

Definition at line 79 of file webclient-strings.c.

const char http_header_200[84]

Definition at line 46 of file http-strings.c.

const char http_header_404[91]

Definition at line 49 of file http-strings.c.

const char http_host[7]

Definition at line 31 of file webclient-strings.c.

const char http_htm[5]

Definition at line 70 of file webclient-strings.c.

const char http_html[6]

Definition at line 64 of file webclient-strings.c.

const char http_http[8]

Definition at line 1 of file webclient-strings.c.

const char http_index_html[12]

Definition at line 37 of file webclient-strings.c.

const char http_jpg[5]

Definition at line 82 of file webclient-strings.c.

const char http_location[11]

Definition at line 28 of file webclient-strings.c.

const char http_png[5]

Definition at line 76 of file webclient-strings.c.

const char http_referer[9]

Definition at line 43 of file http-strings.c.

const char http_shtml[7]

Definition at line 67 of file webclient-strings.c.

const char http_text[5]

Definition at line 85 of file webclient-strings.c.

const char http_texthtml[10]

Definition at line 25 of file webclient-strings.c.

const char http_txt[5]

Definition at line 88 of file webclient-strings.c.

Generated on Tue Jun 7 14:59:14 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/webserver/httpd-cgi.c File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/webserver/httpd-cgi.c File Reference

#include "uip.h"
#include "psock.h"
#include "httpd.h"
#include "httpd-cgi.h"
#include "httpd-fs.h"
#include <stdio.h>
#include <string.h>

Go to the source code of this file.

Functions

HTTPD_CGI_CALL (file,"file-stats", file_stats)
HTTPD_CGI_CALL (tcp,"tcp-connections", tcp_stats)
HTTPD_CGI_CALL (net,"net-stats", net_stats)
httpd_cgifunction httpd_cgi (char *name)

Detailed Description

Web server script interface
Author:
Adam Dunkels <adam@sics.se>

Definition in file httpd-cgi.c.

Generated on Tue Jun 7 14:59:14 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/webserver/httpd-cgi.h File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/webserver/httpd-cgi.h File Reference

#include "psock.h"
#include "httpd.h"

Go to the source code of this file.

Data Structures

struct | httpd_cgi_call

Defines

#define | HTTPD_CGI_CALL(name, str, function)
HTTPD CGI function declaration.

Functions

typedef | PT_THREAD ((*httpd_cgifunction)(struct httpd_state *, char *))
httpd_cgifunction | httpd_cgi (char *name)
void | httpd_cgi_init (void)

Detailed Description

Web server script interface header file
Author:
Adam Dunkels <adam@sics.se>

Definition in file httpd-cgi.h.

Generated on Tue Jun 7 14:59:14 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/webserver/httpd-fs.c File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/webserver/httpd-fs.c File Reference

#include "httpd.h"
#include "httpd-fs.h"
#include "httpd-fsdata.h"
#include "httpd-fsdata.c"

Go to the source code of this file.

Defines

#define | NULL 0

Functions

int | httpd_fs_open (const char *name, struct httpd_fs_file *file)
void | httpd_fs_init (void)
u16_t | httpd_fs_count (char *name)

Define Documentation

#define NULL 0

Definition at line 41 of file httpd-fs.c.

Function Documentation

u16_t httpd_fs_count ( char * name )

Definition at line 114 of file httpd-fs.c.

void httpd_fs_init ( void )

Definition at line 102 of file httpd-fs.c.

int httpd_fs_open | ( | const char * | name,
 |  | struct httpd_fs_file * | file
 | ) |  |

Definition at line 74 of file httpd-fs.c.

Generated on Tue Jun 7 14:59:14 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/webserver/httpd-fs.h File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/webserver/httpd-fs.h File Reference

Go to the source code of this file.

Data Structures

struct | httpd_fs_file

Defines

#define | HTTPD_FS_STATISTICS 1

Functions

int | httpd_fs_open (const char *name, struct httpd_fs_file *file)
u16_t | httpd_fs_count (char *name)
void | httpd_fs_init (void)

Define Documentation

#define HTTPD_FS_STATISTICS 1

Definition at line 38 of file httpd-fs.h.

Function Documentation

u16_t httpd_fs_count ( char * name )

Definition at line 114 of file httpd-fs.c.

void httpd_fs_init ( void )

Definition at line 102 of file httpd-fs.c.

int httpd_fs_open | ( | const char * | name,
 |  | struct httpd_fs_file * | file
 | ) |  |

Definition at line 74 of file httpd-fs.c.

Generated on Tue Jun 7 14:59:14 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/webserver/httpd-fsdata.c File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/webserver/httpd-fsdata.c File Reference

Go to the source code of this file.

Defines

#define | HTTPD_FS_ROOT file_stats_shtml
#define | HTTPD_FS_NUMFILES 10

Variables

struct httpd_fsdata_file | file_processes_shtml [] = {{NULL, data_processes_shtml, data_processes_shtml + 17, sizeof(data_processes_shtml) - 17}}
struct httpd_fsdata_file | file_404_html [] = {{file_processes_shtml, data_404_html, data_404_html + 10, sizeof(data_404_html) - 10}}
struct httpd_fsdata_file | file_files_shtml [] = {{file_404_html, data_files_shtml, data_files_shtml + 13, sizeof(data_files_shtml) - 13}}
struct httpd_fsdata_file | file_footer_html [] = {{file_files_shtml, data_footer_html, data_footer_html + 13, sizeof(data_footer_html) - 13}}
struct httpd_fsdata_file | file_header_html [] = {{file_footer_html, data_header_html, data_header_html + 13, sizeof(data_header_html) - 13}}
struct httpd_fsdata_file | file_index_html [] = {{file_header_html, data_index_html, data_index_html + 12, sizeof(data_index_html) - 12}}
struct httpd_fsdata_file | file_style_css [] = {{file_index_html, data_style_css, data_style_css + 11, sizeof(data_style_css) - 11}}
struct httpd_fsdata_file | file_tcp_shtml [] = {{file_style_css, data_tcp_shtml, data_tcp_shtml + 11, sizeof(data_tcp_shtml) - 11}}
struct httpd_fsdata_file | file_fade_png [] = {{file_tcp_shtml, data_fade_png, data_fade_png + 10, sizeof(data_fade_png) - 10}}
struct httpd_fsdata_file | file_stats_shtml [] = {{file_fade_png, data_stats_shtml, data_stats_shtml + 13, sizeof(data_stats_shtml) - 13}}

Define Documentation

#define HTTPD_FS_NUMFILES 10

Definition at line 607 of file httpd-fsdata.c.

#define HTTPD_FS_ROOT file_stats_shtml

Definition at line 605 of file httpd-fsdata.c.

Variable Documentation

struct httpd_fsdata_file file_404_html[] = {{file_processes_shtml, data_404_html, data_404_html + 10, sizeof(data_404_html) - 10}}

Definition at line 587 of file httpd-fsdata.c.

struct httpd_fsdata_file file_fade_png[] = {{file_tcp_shtml, data_fade_png, data_fade_png + 10, sizeof(data_fade_png) - 10}}

Definition at line 601 of file httpd-fsdata.c.

struct httpd_fsdata_file file_files_shtml[] = {{file_404_html, data_files_shtml, data_files_shtml + 13, sizeof(data_files_shtml) - 13}}

Definition at line 589 of file httpd-fsdata.c.

struct httpd_fsdata_file file_footer_html[] = {{file_files_shtml, data_footer_html, data_footer_html + 13, sizeof(data_footer_html) - 13}}

Definition at line 591 of file httpd-fsdata.c.

struct httpd_fsdata_file file_header_html[] = {{file_footer_html, data_header_html, data_header_html + 13, sizeof(data_header_html) - 13}}

Definition at line 593 of file httpd-fsdata.c.

struct httpd_fsdata_file file_index_html[] = {{file_header_html, data_index_html, data_index_html + 12, sizeof(data_index_html) - 12}}

Definition at line 595 of file httpd-fsdata.c.

struct httpd_fsdata_file file_processes_shtml[] = {{NULL, data_processes_shtml, data_processes_shtml + 17, sizeof(data_processes_shtml) - 17}}

Definition at line 585 of file httpd-fsdata.c.

struct httpd_fsdata_file file_stats_shtml[] = {{file_fade_png, data_stats_shtml, data_stats_shtml + 13, sizeof(data_stats_shtml) - 13}}

Definition at line 603 of file httpd-fsdata.c.

struct httpd_fsdata_file file_style_css[] = {{file_index_html, data_style_css, data_style_css + 11, sizeof(data_style_css) - 11}}

Definition at line 597 of file httpd-fsdata.c.

struct httpd_fsdata_file file_tcp_shtml[] = {{file_style_css, data_tcp_shtml, data_tcp_shtml + 11, sizeof(data_tcp_shtml) - 11}}

Definition at line 599 of file httpd-fsdata.c.

Generated on Tue Jun 7 14:59:14 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/webserver/httpd-fsdata.h File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/webserver/httpd-fsdata.h File Reference

#include "uip.h"

Go to the source code of this file.

Data Structures

struct | httpd_fsdata_file
struct | httpd_fsdata_file_noconst

Generated on Tue Jun 7 14:59:14 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/webserver/httpd.c File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/webserver/httpd.c File Reference

#include "uip.h"
#include "httpd.h"
#include "httpd-fs.h"
#include "httpd-cgi.h"
#include "http-strings.h"
#include <string.h>

Go to the source code of this file.

Defines

#define | STATE_WAITING 0
#define | STATE_OUTPUT 1
#define | ISO_nl 0x0a
#define | ISO_space 0x20
#define | ISO_bang 0x21
#define | ISO_percent 0x25
#define | ISO_period 0x2e
#define | ISO_slash 0x2f
#define | ISO_colon 0x3a

Functions

void | httpd_appcall (void)
void | httpd_init (void)
Initialize the web server.

Detailed Description

Web server
Author:
Adam Dunkels <adam@sics.se>

Definition in file httpd.c.

Generated on Tue Jun 7 14:59:14 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/webserver/httpd.h File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/webserver/httpd.h File Reference

#include "psock.h"
#include "httpd-fs.h"

Go to the source code of this file.

Data Structures

struct | httpd_state

Functions

void | httpd_init (void)
Initialize the web server.
void | httpd_appcall (void)
void | httpd_log (char *msg)
void | httpd_log_file (u16_t *requester, char *file)

Function Documentation

void httpd_log ( char * msg )

void httpd_log_file | ( | u16_t * | requester,
 |  | char * | file
 | ) |  |

Generated on Tue Jun 7 14:59:14 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/webserver/webserver.h File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/webserver/webserver.h File Reference

#include "httpd.h"

Go to the source code of this file.

Defines

#define | UIP_APPCALL httpd_appcall

Typedefs

typedef struct httpd_state | uip_tcp_appstate_t

Define Documentation

#define UIP_APPCALL httpd_appcall

Definition at line 45 of file webserver.h.

Typedef Documentation

typedef struct httpd_state uip_tcp_appstate_t

Definition at line 40 of file webserver.h.

Generated on Tue Jun 7 14:59:14 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/common/printf-stdarg.c File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/common/printf-stdarg.c File Reference

#include <stdarg.h>

Go to the source code of this file.

Defines

#define | putchar(c) sendchar(c)
#define | PAD_RIGHT 1
#define | PAD_ZERO 2
#define | PRINT_BUF_LEN 12

Functions

int | sendchar (int ch)
int | printf (const char *format,...)
int | sprintf (char *out, const char *format,...)
int | snprintf (char *buf, unsigned int count, const char *format,...)
int | write (int i, char *c, int n)

Define Documentation

#define PAD_RIGHT 1

Definition at line 49 of file printf-stdarg.c.

#define PAD_ZERO 2

Definition at line 50 of file printf-stdarg.c.

#define PRINT_BUF_LEN 12

Definition at line 83 of file printf-stdarg.c.

#define putchar ( c ) sendchar(c)

Definition at line 31 of file printf-stdarg.c.

Function Documentation

int printf | ( | const char * | format,
 |  |  | ...
 | ) |  |

Definition at line 192 of file printf-stdarg.c.

int sendchar ( int ch )

Definition at line 22 of file Serial.c.

int snprintf | ( | char * | buf,
 |  | unsigned int | count,
 |  | const char * | format,
 |  |  | ...
 | ) |  |

Definition at line 209 of file printf-stdarg.c.

int sprintf | ( | char * | out,
 |  | const char * | format,
 |  |  | ...
 | ) |  |

Definition at line 200 of file printf-stdarg.c.

int write | ( | int | i,
 |  | char * | c,
 |  | int | n
 | ) |  |

Definition at line 289 of file printf-stdarg.c.

Generated on Tue Jun 7 14:59:14 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/common/Retarget.c File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/common/Retarget.c File Reference

#include <stdio.h>
#include <rt_misc.h>

Go to the source code of this file.

Data Structures

struct | __FILE

Functions

unsigned char | sendchar (unsigned char ch)
unsigned char | getkey (void)
int | fputc (int ch, FILE *f)
int | fgetc (FILE *fp)
int | ferror (FILE *f)
void | _ttywrch (int ch)
void | _sys_exit (int return_code)

Variables

FILE | __stdout
FILE | __stdin

Function Documentation

void _sys_exit ( int return_code )

Definition at line 55 of file Retarget.c.

void _ttywrch ( int ch )

Definition at line 50 of file Retarget.c.

int ferror ( FILE * f )

Definition at line 44 of file Retarget.c.

int fgetc ( FILE * fp )

Definition at line 31 of file Retarget.c.

int fputc | ( | int | ch,
 |  | FILE * | f
 | ) |  |

Definition at line 25 of file Retarget.c.

unsigned char getkey ( void )

Definition at line 33 of file Serial.c.

unsigned char sendchar ( unsigned char ch )

Variable Documentation

FILE __stdin

Definition at line 23 of file Retarget.c.

FILE __stdout

Definition at line 22 of file Retarget.c.

Generated on Tue Jun 7 14:59:12 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/common/Serial.c File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/common/Serial.c File Reference

#include "debug_frmwrk.h"

Go to the source code of this file.

Defines

#define | CR 0x0D

Functions

void | init_serial (void)
int | sendchar (int ch)
int | getkey (void)
unsigned char | getchar (void)

Define Documentation

#define CR 0x0D

Definition at line 13 of file Serial.c.

Function Documentation

unsigned char getchar ( void )

Definition at line 37 of file Serial.c.

int getkey ( void )

Definition at line 33 of file Serial.c.

void init_serial ( void )

Definition at line 16 of file Serial.c.

int sendchar ( int ch )

Definition at line 22 of file Serial.c.

Generated on Tue Jun 7 14:59:14 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/common/syscalls.c File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/common/syscalls.c File Reference

#include <stdlib.h>
#include <sys/stat.h>

Go to the source code of this file.

Functions

int | _read_r (struct _reent *r, int file, char *ptr, int len)
int | _lseek_r (struct _reent *r, int file, int ptr, int dir)
int | _write_r (struct _reent *r, int file, char *ptr, int len)
int | _close_r (struct _reent *r, int file)
caddr_t | _sbrk_r (struct _reent *r, int incr)
int | _fstat_r (struct _reent *r, int file, struct stat *st)
int | _isatty_r (struct _reent *r, int fd)

Function Documentation

int _close_r | ( | struct _reent * | r,
 |  | int | file
 | ) |  |

Definition at line 44 of file syscalls.c.

int _fstat_r | ( | struct _reent * | r,
 |  | int | file,
 |  | struct stat * | st
 | ) |  |

Definition at line 64 of file syscalls.c.

int _isatty_r | ( | struct _reent * | r,
 |  | int | fd
 | ) |  |

Definition at line 75 of file syscalls.c.

int _lseek_r | ( | struct _reent * | r,
 |  | int | file,
 |  | int | ptr,
 |  | int | dir
 | ) |  |

Definition at line 20 of file syscalls.c.

int _read_r | ( | struct _reent * | r,
 |  | int | file,
 |  | char * | ptr,
 |  | int | len
 | ) |  |

Definition at line 9 of file syscalls.c.

caddr_t _sbrk_r | ( | struct _reent * | r,
 |  | int | incr
 | ) |  |

Definition at line 54 of file syscalls.c.

int _write_r | ( | struct _reent * | r,
 |  | int | file,
 |  | char * | ptr,
 |  | int | len
 | ) |  |

Definition at line 32 of file syscalls.c.

Generated on Tue Jun 7 14:59:14 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/lpc17xx_port/clock-arch.c File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/lpc17xx_port/clock-arch.c File Reference

#include "clock-arch.h"
#include "LPC17xx.h"

Go to the source code of this file.

Defines

#define | LED_PIN (1<<6)

Functions

void | SysTick_Handler (void)
SysTick handler sub-routine (1ms).
void | clock_init (void)
clock_time_t | clock_time (void)

Variables

__IO clock_time_t | Ticks

Define Documentation

#define LED_PIN (1<<6)

Definition at line 6 of file clock-arch.c.

Variable Documentation

__IO clock_time_t Ticks

Definition at line 4 of file clock-arch.c.

Generated on Tue Jun 7 14:59:14 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/lpc17xx_port/clock-arch.h File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/lpc17xx_port/clock-arch.h File Reference

#include "lpc_types.h"

Go to the source code of this file.

Defines

#define | CLOCK_CONF_SECOND 100

Typedefs

typedef unsigned int | clock_time_t

Define Documentation

#define CLOCK_CONF_SECOND 100

Definition at line 8 of file clock-arch.h.

Typedef Documentation

typedef unsigned int clock_time_t

Definition at line 6 of file clock-arch.h.

Generated on Tue Jun 7 14:59:14 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/lpc17xx_port/emac.c File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/lpc17xx_port/emac.c File Reference

#include "emac.h"
#include "lpc17xx_emac.h"
#include "lpc17xx_pinsel.h"
#include <string.h>
#include <stdio.h>
#include "debug_frmwrk.h"

Go to the source code of this file.

Defines

#define | DB _DBG((uint8_t *)db)

Functions

BOOL_8 | tapdev_init (void)
UNS_32 | tapdev_read (void *pPacket)
BOOL_8 | tapdev_send (void *pPacket, UNS_32 size)

Variables

char | db [64]

Generated on Tue Jun 7 14:59:12 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/lpc17xx_port/emac.h File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/lpc17xx_port/emac.h File Reference

#include "lpc_types.h"
#include "uip-conf.h"
#include "uipopt.h"
#include "lpc17xx_emac.h"

Go to the source code of this file.

Defines

#define | EMAC_MAX_PACKET_SIZE (UIP_CONF_BUFFER_SIZE + 16)
#define | ENET_DMA_DESC_NUMB 3
#define | AUTO_NEGOTIATION_ENA 1
#define | PHY_TO 200000
#define | RMII 1
#define | EMAC_ADDR0 0x10
#define | EMAC_ADDR1 0x1F
#define | EMAC_ADDR2 0xE0
#define | EMAC_ADDR3 0x12
#define | EMAC_ADDR4 0x1D
#define | EMAC_ADDR5 0x0C
#define | SPEED_100 1
#define | SPEED_10 0
#define | FULL_DUPLEX 1
#define | HALF_DUPLEX 0
#define | FIX_SPEED SPEED_100
#define | FIX_DUPLEX FULL_DUPLEX

Functions

BOOL_8 | tapdev_init (void)
UNS_32 | tapdev_read (void *pPacket)
BOOL_8 | tapdev_send (void *pPacket, UNS_32 size)

Define Documentation

#define AUTO_NEGOTIATION_ENA 1

Definition at line 12 of file emac.h.

#define EMAC_ADDR0 0x10

Definition at line 19 of file emac.h.

#define EMAC_ADDR1 0x1F

Definition at line 20 of file emac.h.

#define EMAC_ADDR2 0xE0

Definition at line 21 of file emac.h.

#define EMAC_ADDR3 0x12

Definition at line 22 of file emac.h.

#define EMAC_ADDR4 0x1D

Definition at line 23 of file emac.h.

#define EMAC_ADDR5 0x0C

Definition at line 24 of file emac.h.

#define EMAC_MAX_PACKET_SIZE (UIP_CONF_BUFFER_SIZE + 16)

Definition at line 9 of file emac.h.

#define ENET_DMA_DESC_NUMB 3

Definition at line 11 of file emac.h.

#define FIX_DUPLEX FULL_DUPLEX

Definition at line 42 of file emac.h.

#define FIX_SPEED SPEED_100

Definition at line 41 of file emac.h.

#define FULL_DUPLEX 1

Definition at line 38 of file emac.h.

#define HALF_DUPLEX 0

Definition at line 39 of file emac.h.

#define PHY_TO 200000

Definition at line 13 of file emac.h.

#define RMII 1

Definition at line 14 of file emac.h.

#define SPEED_10 0

Definition at line 37 of file emac.h.

#define SPEED_100 1

Definition at line 36 of file emac.h.

Generated on Tue Jun 7 14:59:12 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/lpc17xx_port/lpc17xx_libcfg.h File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/lpc17xx_port/lpc17xx_libcfg.h File Reference

#include "lpc_types.h"

Go to the source code of this file.

Defines

#define | DEBUG
#define | _DBGFWK
#define | _GPIO
#define | _UART
#define | _UART0
#define | _EMAC
#define | CHECK_PARAM(expr) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))

Functions

void | check_failed (uint8_t *file, uint32_t line)

Define Documentation

#define _DBGFWK

Definition at line 46 of file lpc17xx_libcfg.h.

#define _EMAC

Definition at line 123 of file lpc17xx_libcfg.h.

#define _GPIO

Definition at line 49 of file lpc17xx_libcfg.h.

#define _UART

Definition at line 55 of file lpc17xx_libcfg.h.

#define _UART0

Definition at line 56 of file lpc17xx_libcfg.h.

#define CHECK_PARAM ( expr ) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))

Definition at line 138 of file lpc17xx_libcfg.h.

#define DEBUG

Definition at line 38 of file lpc17xx_libcfg.h.

Generated on Tue Jun 7 14:59:09 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/lpc17xx_port/main.c File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/lpc17xx_port/main.c File Reference

#include <stdio.h>
#include <string.h>
#include "debug_frmwrk.h"
#include "clock-arch.h"
#include "timer.h"
#include "uip-conf.h"
#include "uipopt.h"
#include "uip_arp.h"
#include "uip.h"
#include "emac.h"
#include "lpc_types.h"
#include "lpc17xx_libcfg.h"
#include "lpc17xx_pinsel.h"
#include "lpc17xx_gpio.h"

Go to the source code of this file.

Defines

#define | BUF ((struct uip_eth_hdr *)&uip_buf[0])
#define | LED_PIN (1<<6)
#define | LED2_MASK ((1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6))
#define | LED1_MASK ((1<<28) | (1<<29) | (1<<31))
#define | DB _DBG((uint8_t *)_db)

Functions

void | LED_Init (void)
Initialize LED.
void | uip_log (char *m)
int | c_entry (void)
int | main (void)
void | check_failed (uint8_t *file, uint32_t line)

Variables

char | _db [64]

Define Documentation

#define BUF ((struct uip_eth_hdr *)&uip_buf[0])

Definition at line 18 of file main.c.

#define DB _DBG((uint8_t *)_db)

Definition at line 27 of file main.c.

#define LED1_MASK ((1<<28) | (1<<29) | (1<<31))

Definition at line 22 of file main.c.

#define LED2_MASK ((1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6))

Definition at line 21 of file main.c.

#define LED_PIN (1<<6)

Definition at line 20 of file main.c.

Function Documentation

int c_entry ( void )

Definition at line 90 of file main.c.

int main ( void )

Definition at line 241 of file main.c.

Variable Documentation

char _db[64]

Definition at line 28 of file main.c.

Generated on Tue Jun 7 14:59:15 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/lpc17xx_port/uip-conf.h File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/lpc17xx_port/uip-conf.h File Reference

#include <inttypes.h>
#include "webserver.h"

Go to the source code of this file.

Project-specific configuration options

uIP has a number of configuration options that can be overridden for each project. These are kept in a project-specific uip-conf.h file and all configuration names have the prefix UIP_CONF.

#define | UIP_CONF_MAX_CONNECTIONS
#define | UIP_CONF_MAX_LISTENPORTS
#define | UIP_CONF_BUFFER_SIZE
#define | UIP_CONF_BYTE_ORDER
#define | UIP_CONF_LOGGING
#define | UIP_CONF_UDP
#define | UIP_CONF_UDP_CHECKSUMS
#define | UIP_CONF_STATISTICS
typedef uint8_t | u8_t
typedef uint16_t | u16_t
typedef unsigned short | uip_stats_t

Detailed Description

An example uIP configuration file
Author:
Adam Dunkels <adam@sics.se>

Definition in file uip-conf.h.

Generated on Tue Jun 7 14:59:15 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/uip/clock.h File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/uip/clock.h File Reference

#include "clock-arch.h"

Go to the source code of this file.

Defines

#define | CLOCK_SECOND

Functions

void | clock_init (void)
clock_time_t | clock_time (void)

Generated on Tue Jun 7 14:59:15 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/uip/lc-addrlabels.h File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/uip/lc-addrlabels.h File Reference

Go to the source code of this file.

Defines

#define | LC_INIT(s) s = NULL
#define | LC_RESUME(s)
#define | LC_SET(s) do { ({ __label__ resume; resume: (s) = &&resume; }); }while(0)
#define | LC_END(s)

Typedefs

typedef void * | lc_t

Detailed Description

Implementation of local continuations based on the "Labels as values" feature of gcc
Author:
Adam Dunkels <adam@sics.se>
This implementation of local continuations is based on a special feature of the GCC C compiler called "labels as values". This feature allows assigning pointers with the address of the code corresponding to a particular C label.

For more information, see the GCC documentation: http://gcc.gnu.org/onlinedocs/gcc/Labels-as-Values.html

Thanks to dividuum for finding the nice local scope label implementation.

Definition in file lc-addrlabels.h.

Generated on Tue Jun 7 14:59:15 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/uip/lc-switch.h File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/uip/lc-switch.h File Reference

Go to the source code of this file.

Defines

#define | __LC_SWTICH_H__
#define | LC_INIT(s) s = 0;
#define | LC_RESUME(s) switch(s) { case 0:
#define | LC_SET(s) s = __LINE__; case __LINE__:
#define | LC_END(s) }

Typedefs

typedef unsigned short | lc_t

Detailed Description

Implementation of local continuations based on switch() statment
Author:
Adam Dunkels <adam@sics.se>
This implementation of local continuations uses the C switch() statement to resume execution of a function somewhere inside the function's body. The implementation is based on the fact that switch() statements are able to jump directly into the bodies of control structures such as if() or while() statmenets.

This implementation borrows heavily from Simon Tatham's coroutines implementation in C: http://www.chiark.greenend.org.uk/~sgtatham/coroutines.html

Definition in file lc-switch.h.

Generated on Tue Jun 7 14:59:15 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/uip/lc.h File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/uip/lc.h File Reference

#include "lc-switch.h"

Go to the source code of this file.

Detailed Description

Local continuations
Author:
Adam Dunkels <adam@sics.se>

Definition in file lc.h.

Generated on Tue Jun 7 14:59:15 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/uip/psock.c File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/uip/psock.c File Reference

#include <stdio.h>
#include <string.h>
#include "uipopt.h"
#include "psock.h"
#include "uip.h"

Go to the source code of this file.

Defines

#define | STATE_NONE 0
#define | STATE_ACKED 1
#define | STATE_READ 2
#define | STATE_BLOCKED_NEWDATA 3
#define | STATE_BLOCKED_CLOSE 4
#define | STATE_BLOCKED_SEND 5
#define | STATE_DATA_SENT 6
#define | BUF_NOT_FULL 0
#define | BUF_NOT_FOUND 0
#define | BUF_FULL 1
#define | BUF_FOUND 2

Functions

PT_THREAD (psock_send(register struct psock *s, const char *buf, unsigned int len))
PT_THREAD (psock_generator_send(register struct psock *s, unsigned short(*generate)(void *), void *arg))
u16_t | psock_datalen (struct psock *psock)
char | psock_newdata (struct psock *s)
PT_THREAD (psock_readto(register struct psock *psock, unsigned char c))
PT_THREAD (psock_readbuf(register struct psock *psock))
void | psock_init (register struct psock *psock, char *buffer, unsigned int buffersize)

Define Documentation

#define BUF_FOUND 2

Definition at line 71 of file psock.c.

#define BUF_FULL 1

Definition at line 64 of file psock.c.

#define BUF_NOT_FOUND 0

Definition at line 57 of file psock.c.

#define BUF_NOT_FULL 0

Definition at line 56 of file psock.c.

#define STATE_ACKED 1

Definition at line 44 of file psock.c.

#define STATE_BLOCKED_CLOSE 4

Definition at line 47 of file psock.c.

#define STATE_BLOCKED_NEWDATA 3

Definition at line 46 of file psock.c.

#define STATE_BLOCKED_SEND 5

Definition at line 48 of file psock.c.

#define STATE_DATA_SENT 6

Definition at line 49 of file psock.c.

#define STATE_NONE 0

Definition at line 43 of file psock.c.

#define STATE_READ 2

Definition at line 45 of file psock.c.

Function Documentation

void psock_init | ( | register struct psock * | psock,
 |  | char * | buffer,
 |  | unsigned int | buffersize
 | ) |  |

Definition at line 329 of file psock.c.

PT_THREAD ( psock_readbuf(register struct psock *psock) )

Definition at line 300 of file psock.c.

PT_THREAD ( psock_readto(register struct psock *psock, unsigned char c) )

Definition at line 273 of file psock.c.

PT_THREAD ( psock_generator_send(register struct psock *s,unsigned short(*generate)(void *), void *arg) )

Definition at line 216 of file psock.c.

PT_THREAD ( psock_send(register struct psock *s, const char *buf,unsigned int len) )

Definition at line 177 of file psock.c.

Generated on Tue Jun 7 14:59:15 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/uip/psock.h File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/uip/psock.h File Reference

#include "uipopt.h"
#include "pt.h"

Go to the source code of this file.

Data Structures

struct | psock_buf
struct | psock

Defines

#define | PSOCK_INIT(psock, buffer, buffersize)
#define | PSOCK_BEGIN(psock)
#define | PSOCK_SEND(psock, data, datalen)
#define | PSOCK_SEND_STR(psock, str)
Send a null-terminated string.
#define | PSOCK_GENERATOR_SEND(psock, generator, arg)
Generate data with a function and send it.
#define | PSOCK_CLOSE(psock)
#define | PSOCK_READBUF(psock)
#define | PSOCK_READTO(psock, c)
#define | PSOCK_DATALEN(psock)
#define | PSOCK_EXIT(psock)
#define | PSOCK_CLOSE_EXIT(psock)
#define | PSOCK_END(psock)
#define | PSOCK_NEWDATA(psock)
#define | PSOCK_WAIT_UNTIL(psock, condition)
#define | PSOCK_WAIT_THREAD(psock, condition) PT_WAIT_THREAD(&((psock)->pt), (condition))

Functions

void | psock_init (struct psock *psock, char *buffer, unsigned int buffersize)
PT_THREAD (psock_send(struct psock *psock, const char *buf, unsigned int len))
PT_THREAD (psock_generator_send(struct psock *psock, unsigned short(*f)(void *), void *arg))
PT_THREAD (psock_readbuf(struct psock *psock))
PT_THREAD (psock_readto(struct psock *psock, unsigned char c))
u16_t | psock_datalen (struct psock *psock)
char | psock_newdata (struct psock *s)

Detailed Description

Protosocket library header file
Author:
Adam Dunkels <adam@sics.se>

Definition in file psock.h.

Generated on Tue Jun 7 14:59:15 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/uip/pt.h File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/uip/pt.h File Reference

#include "lc.h"

Go to the source code of this file.

Data Structures

struct | pt

Defines

#define | PT_WAITING 0
#define | PT_EXITED 1
#define | PT_ENDED 2
#define | PT_YIELDED 3
Initialization
#define | PT_INIT(pt)
Declaration and definition
#define | PT_THREAD(name_args)
#define | PT_BEGIN(pt)
#define | PT_END(pt)
Blocked wait
#define | PT_WAIT_UNTIL(pt, condition)
#define | PT_WAIT_WHILE(pt, cond)
Hierarchical protothreads
#define | PT_WAIT_THREAD(pt, thread)
#define | PT_SPAWN(pt, child, thread)
Exiting and restarting
#define | PT_RESTART(pt)
#define | PT_EXIT(pt)
Calling a protothread
#define | PT_SCHEDULE(f)
Yielding from a protothread
#define | PT_YIELD(pt)
#define | PT_YIELD_UNTIL(pt, cond)
Yield from the protothread until a condition occurs.

Detailed Description

Protothreads implementation.
Author:
Adam Dunkels <adam@sics.se>

Definition in file pt.h.

Generated on Tue Jun 7 14:59:15 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/uip/timer.c File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/uip/timer.c File Reference

#include "clock.h"
#include "timer.h"

Go to the source code of this file.

Functions

void | timer_set (struct timer *t, clock_time_t interval)
void | timer_reset (struct timer *t)
void | timer_restart (struct timer *t)
int | timer_expired (struct timer *t)

Detailed Description

Timer library implementation.
Author:
Adam Dunkels <adam@sics.se>

Definition in file timer.c.

Generated on Tue Jun 7 14:59:15 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/uip/timer.h File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/uip/timer.h File Reference

#include "clock.h"

Go to the source code of this file.

Data Structures

struct | timer

Functions

void | timer_set (struct timer *t, clock_time_t interval)
void | timer_reset (struct timer *t)
void | timer_restart (struct timer *t)
int | timer_expired (struct timer *t)

Detailed Description

Timer library header file.
Author:
Adam Dunkels <adam@sics.se>

Definition in file timer.h.

Generated on Tue Jun 7 14:59:15 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/uip/uip-fw.c File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/uip/uip-fw.c File Reference

#include "uip.h"
#include "uip_arch.h"
#include "uip-fw.h"
#include <string.h>

Go to the source code of this file.

Data Structures

struct | tcpip_hdr
struct | icmpip_hdr
struct | fwcache_entry

Defines

#define | ICMP_ECHO 8
#define | ICMP_TE 11
#define | BUF ((struct tcpip_hdr *)&uip_buf[UIP_LLH_LEN])
#define | ICMPBUF ((struct icmpip_hdr *)&uip_buf[UIP_LLH_LEN])
#define | FWCACHE_SIZE 2
#define | FW_TIME 20

Functions

void | uip_fw_init (void)
u8_t | uip_fw_output (void)
u8_t | uip_fw_forward (void)
void | uip_fw_register (struct uip_fw_netif *netif)
void | uip_fw_default (struct uip_fw_netif *netif)
void | uip_fw_periodic (void)

Detailed Description

uIP packet forwarding.
Author:
Adam Dunkels <adam@sics.se>
This file implements a number of simple functions which do packet forwarding over multiple network interfaces with uIP.

Definition in file uip-fw.c.

Generated on Tue Jun 7 14:59:15 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/uip/uip-fw.h File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/uip/uip-fw.h File Reference

#include "uip.h"

Go to the source code of this file.

Data Structures

struct | uip_fw_netif

Defines

#define | UIP_FW_NETIF(ip1, ip2, ip3, ip4, nm1, nm2, nm3, nm4, outputfunc)
#define | uip_fw_setipaddr(netif, addr)
#define | uip_fw_setnetmask(netif, addr)
#define | UIP_FW_LOCAL
#define | UIP_FW_OK
#define | UIP_FW_FORWARDED
#define | UIP_FW_ZEROLEN
#define | UIP_FW_TOOLARGE
#define | UIP_FW_NOROUTE
#define | UIP_FW_DROPPED

Functions

void | uip_fw_init (void)
u8_t | uip_fw_forward (void)
u8_t | uip_fw_output (void)
void | uip_fw_register (struct uip_fw_netif *netif)
void | uip_fw_default (struct uip_fw_netif *netif)
void | uip_fw_periodic (void)

Detailed Description

uIP packet forwarding header file.
Author:
Adam Dunkels <adam@sics.se>

Definition in file uip-fw.h.

Generated on Tue Jun 7 14:59:15 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/uip/uip-neighbor.c File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/uip/uip-neighbor.c File Reference

#include "uip-neighbor.h"
#include <string.h>
#include <stdio.h>

Go to the source code of this file.

Data Structures

struct | neighbor_entry

Defines

#define | MAX_TIME 128
#define | ENTRIES 8

Functions

void | uip_neighbor_init (void)
void | uip_neighbor_periodic (void)
void | uip_neighbor_add (uip_ipaddr_t ipaddr, struct uip_neighbor_addr *addr)
void | uip_neighbor_update (uip_ipaddr_t ipaddr)
struct uip_neighbor_addr * | uip_neighbor_lookup (uip_ipaddr_t ipaddr)

Detailed Description

Database of link-local neighbors, used by IPv6 code and to be used by a future ARP code rewrite.
Author:
Adam Dunkels <adam@sics.se>

Definition in file uip-neighbor.c.

Define Documentation

#define ENTRIES 8

Definition at line 52 of file uip-neighbor.c.

#define MAX_TIME 128

Definition at line 47 of file uip-neighbor.c.

Function Documentation

void uip_neighbor_add | ( | uip_ipaddr_t | ipaddr,
 |  | struct uip_neighbor_addr * | addr
 | ) |  |

Definition at line 86 of file uip-neighbor.c.

void uip_neighbor_init ( void )

Definition at line 64 of file uip-neighbor.c.

struct uip_neighbor_addr* uip_neighbor_lookup ( uip_ipaddr_t ipaddr ) [read]

Definition at line 145 of file uip-neighbor.c.

void uip_neighbor_periodic ( void )

Definition at line 74 of file uip-neighbor.c.

void uip_neighbor_update ( uip_ipaddr_t ipaddr )

Definition at line 134 of file uip-neighbor.c.

Generated on Tue Jun 7 14:59:15 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/uip/uip-neighbor.h File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/uip/uip-neighbor.h File Reference

#include "uip.h"

Go to the source code of this file.

Data Structures

struct | uip_neighbor_addr

Functions

void | uip_neighbor_init (void)
void | uip_neighbor_add (uip_ipaddr_t ipaddr, struct uip_neighbor_addr *addr)
void | uip_neighbor_update (uip_ipaddr_t ipaddr)
struct uip_neighbor_addr * | uip_neighbor_lookup (uip_ipaddr_t ipaddr)
void | uip_neighbor_periodic (void)

Detailed Description

Header file for database of link-local neighbors, used by IPv6 code and to be used by future ARP code.
Author:
Adam Dunkels <adam@sics.se>

Definition in file uip-neighbor.h.

Function Documentation

void uip_neighbor_add | ( | uip_ipaddr_t | ipaddr,
 |  | struct uip_neighbor_addr * | addr
 | ) |  |

Definition at line 86 of file uip-neighbor.c.

void uip_neighbor_init ( void )

Definition at line 64 of file uip-neighbor.c.

struct uip_neighbor_addr* uip_neighbor_lookup ( uip_ipaddr_t ipaddr ) [read]

Definition at line 145 of file uip-neighbor.c.

void uip_neighbor_periodic ( void )

Definition at line 74 of file uip-neighbor.c.

void uip_neighbor_update ( uip_ipaddr_t ipaddr )

Definition at line 134 of file uip-neighbor.c.

Generated on Tue Jun 7 14:59:15 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/uip/uip-split.c File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/uip/uip-split.c File Reference

#include <string.h>
#include "uip-split.h"
#include "uip.h"
#include "uip-fw.h"
#include "uip_arch.h"

Go to the source code of this file.

Defines

#define | BUF ((struct uip_tcpip_hdr *)&uip_buf[UIP_LLH_LEN])

Functions

void | uip_split_output (void)

Define Documentation

#define BUF ((struct uip_tcpip_hdr *)&uip_buf[UIP_LLH_LEN])

Definition at line 45 of file uip-split.c.

Generated on Tue Jun 7 14:59:15 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/uip/uip-split.h File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/uip/uip-split.h File Reference

Go to the source code of this file.

Functions

void uip_split_output (void)

Detailed Description

Module for splitting outbound TCP segments in two to avoid the delayed ACK throughput degradation.
Author:
Adam Dunkels <adam@sics.se>

Definition in file uip-split.h.

Generated on Tue Jun 7 14:59:15 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/uip/uip.c File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/uip/uip.c File Reference

#include "uip.h"
#include "uipopt.h"
#include "uip_arch.h"
#include <string.h>

Go to the source code of this file.

Defines

#define | DEBUG_PRINTF(...)
#define | TCP_FIN 0x01
#define | TCP_SYN 0x02
#define | TCP_RST 0x04
#define | TCP_PSH 0x08
#define | TCP_ACK 0x10
#define | TCP_URG 0x20
#define | TCP_CTL 0x3f
#define | TCP_OPT_END 0
#define | TCP_OPT_NOOP 1
#define | TCP_OPT_MSS 2
#define | TCP_OPT_MSS_LEN 4
#define | ICMP_ECHO_REPLY 0
#define | ICMP_ECHO 8
#define | ICMP6_ECHO_REPLY 129
#define | ICMP6_ECHO 128
#define | ICMP6_NEIGHBOR_SOLICITATION 135
#define | ICMP6_NEIGHBOR_ADVERTISEMENT 136
#define | ICMP6_FLAG_S (1 << 6)
#define | ICMP6_OPTION_SOURCE_LINK_ADDRESS 1
#define | ICMP6_OPTION_TARGET_LINK_ADDRESS 2
#define | BUF ((struct uip_tcpip_hdr *)&uip_buf[UIP_LLH_LEN])
#define | FBUF ((struct uip_tcpip_hdr *)&uip_reassbuf[0])
#define | ICMPBUF ((struct uip_icmpip_hdr *)&uip_buf[UIP_LLH_LEN])
#define | UDPBUF ((struct uip_udpip_hdr *)&uip_buf[UIP_LLH_LEN])
#define | UIP_STAT(s)
#define | UIP_LOG(m)

Functions

void | uip_setipid (u16_t id)
void | uip_add32 (u8_t *op32, u16_t op16)
u16_t | uip_chksum (u16_t *data, u16_t len)
u16_t | uip_ipchksum (void)
u16_t | uip_tcpchksum (void)
void | uip_init (void)
struct uip_conn * | uip_connect (uip_ipaddr_t *ripaddr, u16_t rport)
void | uip_unlisten (u16_t port)
void | uip_listen (u16_t port)
void | uip_process (u8_t flag)
u16_t | htons (u16_t val)
void | uip_send (const void *data, int len)

Variables

uip_ipaddr_t uip_hostaddr
uip_ipaddr_t uip_draddr
uip_ipaddr_t uip_netmask
struct uip_eth_addr | uip_ethaddr = {{0,0,0,0,0,0}}
void * | uip_appdata
void * | uip_sappdata
u16_t uip_len
u16_t uip_slen
u8_t uip_flags
struct uip_conn * | uip_conn
struct uip_conn | uip_conns [UIP_CONNS]
u16_t | uip_listenports [UIP_LISTENPORTS]
u8_t | uip_acc32 [4]

Detailed Description

The uIP TCP/IP stack code.
Author:
Adam Dunkels <adam@dunkels.com>

Definition in file uip.c.

Define Documentation

#define DEBUG_PRINTF ( ... )

Definition at line 1 of file uip.c.

Generated on Tue Jun 7 14:59:15 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/uip/uip.h File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/uip/uip.h File Reference

#include "uipopt.h"

Go to the source code of this file.

Data Structures

struct | uip_conn
struct | uip_stats
struct | uip_tcpip_hdr
struct | uip_icmpip_hdr
struct | uip_udpip_hdr
struct | uip_eth_addr

Defines

#define | uip_sethostaddr(addr)
#define | uip_gethostaddr(addr)
#define | uip_setdraddr(addr)
#define | uip_setnetmask(addr)
#define | uip_getdraddr(addr)
#define | uip_getnetmask(addr)
#define | uip_input()
#define | uip_periodic(conn)
#define | uip_conn_active(conn) (uip_conns[conn].tcpstateflags != UIP_CLOSED)
#define | uip_periodic_conn(conn)
#define | uip_poll_conn(conn)
#define | uip_outstanding(conn) ((conn)->len)
#define | uip_datalen()
#define | uip_urgdatalen()
#define | uip_close()
#define | uip_abort()
#define | uip_stop()
#define | uip_stopped(conn)
#define | uip_restart()
#define | uip_udpconnection()
#define | uip_newdata()
#define | uip_acked()
#define | uip_connected()
#define | uip_closed()
#define | uip_aborted()
#define | uip_timedout()
#define | uip_rexmit()
#define | uip_poll()
#define | uip_initialmss()
#define | uip_mss()
#define | uip_udp_remove(conn)
#define | uip_udp_bind(conn, port)
#define | uip_udp_send(len)
#define | uip_ipaddr(addr, addr0, addr1, addr2, addr3)
#define | uip_ip6addr(addr, addr0, addr1, addr2, addr3, addr4, addr5, addr6, addr7)
#define | uip_ipaddr_copy(dest, src)
#define | uip_ipaddr_cmp(addr1, addr2)
#define | uip_ipaddr_maskcmp(addr1, addr2, mask)
#define | uip_ipaddr_mask(dest, src, mask)
#define | uip_ipaddr1(addr)
#define | uip_ipaddr2(addr)
#define | uip_ipaddr3(addr)
#define | uip_ipaddr4(addr)
#define | HTONS(n)
#define | ntohs htons
#define | UIP_ACKDATA 1
#define | UIP_NEWDATA 2
#define | UIP_REXMIT 4
#define | UIP_POLL 8
#define | UIP_CLOSE 16
#define | UIP_ABORT 32
#define | UIP_CONNECTED 64
#define | UIP_TIMEDOUT 128
#define | UIP_DATA 1
#define | UIP_TIMER 2
#define | UIP_POLL_REQUEST 3
#define | UIP_UDP_SEND_CONN 4
#define | UIP_CLOSED 0
#define | UIP_SYN_RCVD 1
#define | UIP_SYN_SENT 2
#define | UIP_ESTABLISHED 3
#define | UIP_FIN_WAIT_1 4
#define | UIP_FIN_WAIT_2 5
#define | UIP_CLOSING 6
#define | UIP_TIME_WAIT 7
#define | UIP_LAST_ACK 8
#define | UIP_TS_MASK 15
#define | UIP_STOPPED 16
#define | UIP_APPDATA_SIZE
#define | UIP_PROTO_ICMP 1
#define | UIP_PROTO_TCP 6
#define | UIP_PROTO_UDP 17
#define | UIP_PROTO_ICMP6 58
#define | UIP_IPH_LEN 20
#define | UIP_UDPH_LEN 8
#define | UIP_TCPH_LEN 20
#define | UIP_IPUDPH_LEN (UIP_UDPH_LEN + UIP_IPH_LEN)
#define | UIP_IPTCPH_LEN (UIP_TCPH_LEN + UIP_IPH_LEN)
#define | UIP_TCPIP_HLEN UIP_IPTCPH_LEN

Typedefs

typedef u16_t | uip_ip4addr_t [2]
typedef u16_t | uip_ip6addr_t [8]
typedef uip_ip4addr_t | uip_ipaddr_t

Functions

void | uip_init (void)
void | uip_setipid (u16_t id)
void | uip_listen (u16_t port)
void | uip_unlisten (u16_t port)
struct uip_conn * | uip_connect (uip_ipaddr_t *ripaddr, u16_t port)
void | uip_send (const void *data, int len)
struct uip_udp_conn * | uip_udp_new (uip_ipaddr_t *ripaddr, u16_t rport)
u16_t | htons (u16_t val)
void | uip_process (u8_t flag)
u16_t | uip_chksum (u16_t *buf, u16_t len)
u16_t | uip_ipchksum (void)
u16_t | uip_tcpchksum (void)
u16_t | uip_udpchksum (void)

Variables

u8_t | uip_buf [UIP_BUFSIZE+2]
void * | uip_appdata
u16_t uip_len
struct uip_conn * | uip_conn
struct uip_conn | uip_conns [UIP_CONNS]
u8_t | uip_acc32 [4]
struct uip_stats | uip_stat
u8_t uip_flags
uip_ipaddr_t uip_hostaddr
uip_ipaddr_t uip_netmask
uip_ipaddr_t uip_draddr

Detailed Description

Header file for the uIP TCP/IP stack.
Author:
Adam Dunkels <adam@dunkels.com>
The uIP TCP/IP stack header file contains definitions for a number of C macros that are used by uIP programs as well as internal uIP structures, TCP/IP header structures and function declarations.

Definition in file uip.h.

Generated on Tue Jun 7 14:59:16 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/uip/uip_arch.h File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/uip/uip_arch.h File Reference

#include "uip.h"

Go to the source code of this file.

Functions

void | uip_add32 (u8_t *op32, u16_t op16)
u16_t | uip_chksum (u16_t *buf, u16_t len)
u16_t | uip_ipchksum (void)
u16_t | uip_tcpchksum (void)
u16_t | uip_udpchksum (void)

Detailed Description

Declarations of architecture specific functions.
Author:
Adam Dunkels <adam@dunkels.com>

Definition in file uip_arch.h.

Generated on Tue Jun 7 14:59:16 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/uip/uip_arp.c File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/uip/uip_arp.c File Reference

#include "uip_arp.h"
#include <string.h>

Go to the source code of this file.

Data Structures

struct | arp_hdr
struct | ethip_hdr
struct | arp_entry

Defines

#define | ARP_REQUEST 1
#define | ARP_REPLY 2
#define | ARP_HWTYPE_ETH 1
#define | BUF ((struct arp_hdr *)&uip_buf[0])
#define | IPBUF ((struct ethip_hdr *)&uip_buf[0])

Functions

void | uip_arp_init (void)
void | uip_arp_timer (void)
void | uip_arp_ipin (void)
void | uip_arp_arpin (void)
void | uip_arp_out (void)

Detailed Description

Implementation of the ARP Address Resolution Protocol.
Author:
Adam Dunkels <adam@dunkels.com>

Definition in file uip_arp.c.

Generated on Tue Jun 7 14:59:16 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/uip/uip_arp.h File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/uip/uip_arp.h File Reference

#include "uip.h"

Go to the source code of this file.

Data Structures

struct | uip_eth_hdr

Defines

#define | UIP_ETHTYPE_ARP 0x0806
#define | UIP_ETHTYPE_IP 0x0800
#define | UIP_ETHTYPE_IP6 0x86dd
#define | uip_setethaddr(eaddr)

Functions

void | uip_arp_init (void)
void | uip_arp_ipin (void)
void | uip_arp_arpin (void)
void | uip_arp_out (void)
void | uip_arp_timer (void)

Variables

struct uip_eth_addr | uip_ethaddr

Detailed Description

Macros and definitions for the ARP module.
Author:
Adam Dunkels <adam@dunkels.com>

Definition in file uip_arp.h.

Generated on Tue Jun 7 14:59:16 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/uip/uiplib.c File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/uip/uiplib.c File Reference

#include "uip.h"
#include "uiplib.h"

Go to the source code of this file.

Functions

unsigned char uiplib_ipaddrconv (char *addrstr, unsigned char *ipaddr)

Generated on Tue Jun 7 14:59:16 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/uip/uiplib.h File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/uip/uiplib.h File Reference

Go to the source code of this file.

Functions

unsigned char uiplib_ipaddrconv (char *addrstr, unsigned char *addr)

Detailed Description

Various uIP library functions.
Author:
Adam Dunkels <adam@sics.se>

Definition in file uiplib.h.

Generated on Tue Jun 7 14:59:16 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/uip/uipopt.h File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/uip/uipopt.h File Reference

#include "uip-conf.h"

Go to the source code of this file.

Defines

#define | UIP_LITTLE_ENDIAN 3412
#define | UIP_BIG_ENDIAN 1234
Static configuration options
These configuration options can be used for setting the IP address settings statically, but only if UIP_FIXEDADDR is set to 1. The configuration options for a specific node includes IP address, netmask and default router as well as the Ethernet address. The netmask, default router and Ethernet address are appliciable only if uIP should be run over Ethernet.

All of these should be changed to suit your project.

#define | UIP_FIXEDADDR
#define | UIP_PINGADDRCONF
#define | UIP_FIXEDETHADDR
IP configuration options
#define | UIP_TTL 64
#define | UIP_REASSEMBLY
#define | UIP_REASS_MAXAGE 40
UDP configuration options
#define | UIP_UDP
#define | UIP_UDP_CHECKSUMS
#define | UIP_UDP_CONNS
TCP configuration options
The name of the function that should be called when UDP datagrams arrive.

#define | UIP_ACTIVE_OPEN
#define | UIP_CONNS
#define | UIP_LISTENPORTS
#define | UIP_URGDATA
#define | UIP_RTO 3
#define | UIP_MAXRTX 8
#define | UIP_MAXSYNRTX 5
#define | UIP_TCP_MSS (UIP_BUFSIZE - UIP_LLH_LEN - UIP_TCPIP_HLEN)
#define | UIP_RECEIVE_WINDOW
#define | UIP_TIME_WAIT_TIMEOUT 120
ARP configuration options
#define | UIP_ARPTAB_SIZE
#define | UIP_ARP_MAXAGE 120
CPU architecture configuration
The CPU architecture configuration is where the endianess of the CPU on which uIP is to be run is specified. Most CPUs today are little endian, and the most notable exception are the Motorolas which are big endian. The BYTE_ORDER macro should be changed to reflect the CPU architecture on which uIP is to be run.

#define | UIP_BYTE_ORDER

General configuration options

#define | UIP_BUFSIZE
#define | UIP_STATISTICS
#define | UIP_LOGGING
#define | UIP_BROADCAST
#define | UIP_LLH_LEN
void | uip_log (char *msg)

Detailed Description

Configuration options for uIP.
Author:
Adam Dunkels <adam@dunkels.com>
This file is used for tweaking various configuration options for uIP. You should make a copy of this file into one of your project's directories instead of editing this example "uipopt.h" file that comes with the uIP distribution.

Definition in file uipopt.h.

Generated on Tue Jun 7 14:59:16 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/GPDMA/Flash_2_Ram_Test/flash_2_ram.c File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/GPDMA/Flash_2_Ram_Test/flash_2_ram.c File Reference

This example used to test GPDMA function by transferring data from flash to ram memory. More...

#include "lpc17xx_gpdma.h"
#include "lpc17xx_libcfg.h"
#include "debug_frmwrk.h"

Go to the source code of this file.

Defines

#define | DMA_SIZE 16

Functions

void | DMA_IRQHandler (void)
GPDMA interrupt handler sub-routine.
void | print_menu (void)
Print Welcome menu.
void | Buffer_Init (void)
Initialize buffer.
void | Error_Loop (void)
Error Loop (called by Buffer_Verify() if any error).
void | Buffer_Verify (void)
Verify buffer.
int | c_entry (void)
c_entry: Main program body
int | main (void)
void | check_failed (uint8_t *file, uint32_t line)

Variables

uint8_t | menu []
uint8_t | menu2 [] = "Demo terminated! \n\r"
uint8_t | err_menu [] = "Buffer Check fail!"
uint8_t | compl_menu [] = "Buffer Check success!"
const uint32_t | DMASrc_Buffer [DMA_SIZE]
uint32_t | DMADest_Buffer [DMA_SIZE]
__IO uint32_t | Channel0_TC
__IO uint32_t | Channel0_Err

Detailed Description

This example used to test GPDMA function by transferring data from flash to ram memory.

Version:
2.0
Date:
21. May. 2010
Author:
NXP MCU SW Application Team
Copyright(C) 2010, NXP Semiconductor All rights reserved.

Software that is described herein is for illustrative purposes only which provides customers with programming information regarding the products. This software is supplied "AS IS" without any warranties. NXP Semiconductors assumes no responsibility or liability for the use of the software, conveys no license or title under any patent, copyright, or mask work right to the product. NXP Semiconductors reserves the right to make changes in the software without notification. NXP Semiconductors also make no representation or warranty that such application will be suitable for the specified use without further testing or modification.

Definition in file flash_2_ram.c.

Generated on Tue Jun 7 14:59:16 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/GPDMA/Flash_2_Ram_Test/lpc17xx_libcfg.h File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/GPDMA/Flash_2_Ram_Test/lpc17xx_libcfg.h File Reference

#include "lpc_types.h"

Go to the source code of this file.

Defines

#define | DEBUG
#define | _DBGFWK
#define | _UART
#define | _UART0
#define | _GPDMA
#define | CHECK_PARAM(expr) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))

Functions

void | check_failed (uint8_t *file, uint32_t line)

Define Documentation

#define _DBGFWK

Definition at line 44 of file lpc17xx_libcfg.h.

#define _GPDMA

Definition at line 84 of file lpc17xx_libcfg.h.

#define _UART

Definition at line 53 of file lpc17xx_libcfg.h.

#define _UART0

Definition at line 54 of file lpc17xx_libcfg.h.

#define CHECK_PARAM ( expr ) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))

Definition at line 135 of file lpc17xx_libcfg.h.

#define DEBUG

Definition at line 36 of file lpc17xx_libcfg.h.

Generated on Tue Jun 7 14:59:09 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/GPDMA/GPDMA_Sleep/gpdma_sleep.c File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/GPDMA/GPDMA_Sleep/gpdma_sleep.c File Reference

This example used to test GPDMA operation in sleep mode. More...

#include "lpc17xx_gpdma.h"
#include "lpc17xx_libcfg.h"
#include "lpc17xx_pinsel.h"
#include "debug_frmwrk.h"
#include "lpc17xx_clkpwr.h"

Go to the source code of this file.

Defines

#define | DMA_SIZE 0x100UL
#define | DMA_SRC LPC_AHBRAM1_BASE
#define | DMA_DST (DMA_SRC+DMA_SIZE)

Functions

void | DMA_IRQHandler (void)
GPDMA interrupt handler sub-routine.
void | print_menu (void)
Print Welcome menu.
void | Buffer_Init (void)
Initialize buffer.
void | Error_Loop (void)
Error Loop (called by Buffer_Verify() if any error).
void | Buffer_Verify (void)
Verify buffer.
int | c_entry (void)
c_entry: Main program body
int | main (void)
void | check_failed (uint8_t *file, uint32_t line)

Variables

uint8_t | menu1 []
uint8_t | menu2 [] = "Demo terminated! \n\r"
uint8_t | err_menu [] = "Buffer Check fail!"
uint8_t | compl_menu [] = "Buffer Check success!"
__IO uint32_t | Channel0_TC
__IO uint32_t | Channel0_Err

Detailed Description

This example used to test GPDMA operation in sleep mode.

Version:
1.0
Date:
18. June. 2010
Author:
NXP MCU SW Application Team
Copyright(C) 2010, NXP Semiconductor All rights reserved.

Software that is described herein is for illustrative purposes only which provides customers with programming information regarding the products. This software is supplied "AS IS" without any warranties. NXP Semiconductors assumes no responsibility or liability for the use of the software, conveys no license or title under any patent, copyright, or mask work right to the product. NXP Semiconductors reserves the right to make changes in the software without notification. NXP Semiconductors also make no representation or warranty that such application will be suitable for the specified use without further testing or modification.

Definition in file gpdma_sleep.c.

Generated on Tue Jun 7 14:59:16 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/GPDMA/GPDMA_Sleep/lpc17xx_libcfg.h File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/GPDMA/GPDMA_Sleep/lpc17xx_libcfg.h File Reference

#include "lpc_types.h"

Go to the source code of this file.

Defines

#define | DEBUG
#define | _DBGFWK
#define | _UART
#define | _UART0
#define | _GPDMA
#define | CHECK_PARAM(expr) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))

Functions

void | check_failed (uint8_t *file, uint32_t line)

Define Documentation

#define _DBGFWK

Definition at line 44 of file lpc17xx_libcfg.h.

#define _GPDMA

Definition at line 84 of file lpc17xx_libcfg.h.

#define _UART

Definition at line 53 of file lpc17xx_libcfg.h.

#define _UART0

Definition at line 54 of file lpc17xx_libcfg.h.

#define CHECK_PARAM ( expr ) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))

Definition at line 135 of file lpc17xx_libcfg.h.

#define DEBUG

Definition at line 36 of file lpc17xx_libcfg.h.

Generated on Tue Jun 7 14:59:09 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/GPDMA/Link_list/link_list.c File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/GPDMA/Link_list/link_list.c File Reference

This example used to test GPDMA Link list function. More...

#include "lpc17xx_gpdma.h"
#include "lpc17xx_libcfg.h"
#include "debug_frmwrk.h"

Go to the source code of this file.

Defines

#define | DMA_SIZE 32

Functions

uint32_t DMASrc_Buffer1[DMA_SIZE/2] | __attribute__ ((at(0x2007C000)))
uint32_t DMASrc_Buffer2[DMA_SIZE/2] | __attribute__ ((at(0x2007C200)))
void | DMA_IRQHandler (void)
GPDMA interrupt handler sub-routine.
void | print_menu (void)
Print Welcome menu.
void | Error_Loop (void)
Error Loop (called by Buffer_Verify() if any error).
void | Buffer_Verify (void)
Verify buffer.
int | c_entry (void)
c_entry: Main program body
int | main (void)
void | check_failed (uint8_t *file, uint32_t line)

Variables

uint8_t | menu []
uint8_t | menu2 [] = "Demo terminated! \n\r"
uint8_t | err_menu [] = "Buffer Check fail!\n\r"
uint8_t | compl_menu [] = "Buffer Check success!\n\r"
uint32_t | DMADest_Buffer [DMA_SIZE]
__IO uint32_t | Channel0_TC
__IO uint32_t | Channel0_Err

Detailed Description

This example used to test GPDMA Link list function.

Version:
1.0
Date:
16. June. 2010
Author:
NXP MCU SW Application Team
Copyright(C) 2010, NXP Semiconductor All rights reserved.

Software that is described herein is for illustrative purposes only which provides customers with programming information regarding the products. This software is supplied "AS IS" without any warranties. NXP Semiconductors assumes no responsibility or liability for the use of the software, conveys no license or title under any patent, copyright, or mask work right to the product. NXP Semiconductors reserves the right to make changes in the software without notification. NXP Semiconductors also make no representation or warranty that such application will be suitable for the specified use without further testing or modification.

Definition in file link_list.c.

Generated on Tue Jun 7 14:59:16 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/GPDMA/Link_list/lpc17xx_libcfg.h File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/GPDMA/Link_list/lpc17xx_libcfg.h File Reference

#include "lpc_types.h"

Go to the source code of this file.

Defines

#define | DEBUG
#define | _DBGFWK
#define | _UART
#define | _UART0
#define | _GPDMA
#define | CHECK_PARAM(expr) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))

Functions

void | check_failed (uint8_t *file, uint32_t line)

Define Documentation

#define _DBGFWK

Definition at line 44 of file lpc17xx_libcfg.h.

#define _GPDMA

Definition at line 84 of file lpc17xx_libcfg.h.

#define _UART

Definition at line 53 of file lpc17xx_libcfg.h.

#define _UART0

Definition at line 54 of file lpc17xx_libcfg.h.

#define CHECK_PARAM ( expr ) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))

Definition at line 135 of file lpc17xx_libcfg.h.

#define DEBUG

Definition at line 36 of file lpc17xx_libcfg.h.

Generated on Tue Jun 7 14:59:10 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/GPDMA/Ram_2_Ram_Test/gpdma_r2r_test.c File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/GPDMA/Ram_2_Ram_Test/gpdma_r2r_test.c File Reference

#include "lpc17xx_gpdma.h"
#include "lpc17xx_libcfg.h"
#include "lpc17xx_pinsel.h"
#include "debug_frmwrk.h"

Go to the source code of this file.

Defines

#define | DMA_SIZE 0x100UL
#define | DMA_SRC LPC_AHBRAM1_BASE
#define | DMA_DST (DMA_SRC+DMA_SIZE)

Functions

void | DMA_IRQHandler (void)
GPDMA interrupt handler sub-routine.
void | print_menu (void)
Print Welcome menu.
void | Buffer_Init (void)
Initialize buffer.
void | Error_Loop (void)
Error Loop (called by Buffer_Verify() if any error).
void | Buffer_Verify (void)
Verify buffer.
int | c_entry (void)
c_entry: Main program body
int | main (void)
void | check_failed (uint8_t *file, uint32_t line)

Variables

uint8_t | menu1 []
uint8_t | menu2 [] = "Demo terminated! \n\r"
uint8_t | err_menu [] = "Buffer Check fail!"
uint8_t | compl_menu [] = "Buffer Check success!"
__IO uint32_t | Channel0_TC
__IO uint32_t | Channel0_Err

Generated on Tue Jun 7 14:59:16 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/GPDMA/Ram_2_Ram_Test/lpc17xx_libcfg.h File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/GPDMA/Ram_2_Ram_Test/lpc17xx_libcfg.h File Reference

#include "lpc_types.h"

Go to the source code of this file.

Defines

#define | DEBUG
#define | _DBGFWK
#define | _UART
#define | _UART0
#define | _GPDMA
#define | CHECK_PARAM(expr) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))

Functions

void | check_failed (uint8_t *file, uint32_t line)

Define Documentation

#define _DBGFWK

Definition at line 44 of file lpc17xx_libcfg.h.

#define _GPDMA

Definition at line 84 of file lpc17xx_libcfg.h.

#define _UART

Definition at line 53 of file lpc17xx_libcfg.h.

#define _UART0

Definition at line 54 of file lpc17xx_libcfg.h.

#define CHECK_PARAM ( expr ) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))

Definition at line 136 of file lpc17xx_libcfg.h.

#define DEBUG

Definition at line 36 of file lpc17xx_libcfg.h.

Generated on Tue Jun 7 14:59:10 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/GPIO/GPIO_Interrupt/gpio_int.c File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/GPIO/GPIO_Interrupt/gpio_int.c File Reference

This example used to test GPIO interrupt function. More...

#include "LPC17xx.h"
#include "lpc17xx_gpio.h"
#include "lpc17xx_pinsel.h"
#include "lpc17xx_libcfg.h"

Go to the source code of this file.

Defines

#define | MCB_LPC_1768
#define | POLL_LED (1<<4)
#define | INT3_LED (1<<5)
#define | GPIO_INT (1<<25)

Functions

void | EINT3_IRQHandler (void)
External interrupt 3 handler sub-routine.
void | delay (void)
Delay function.
int | c_entry (void)
c_entry: Main program body
int | main (void)
void | check_failed (uint8_t *file, uint32_t line)

Detailed Description

This example used to test GPIO interrupt function.

Version:
2.0
Date:
21. May. 2010
Author:
NXP MCU SW Application Team
Copyright(C) 2010, NXP Semiconductor All rights reserved.

Software that is described herein is for illustrative purposes only which provides customers with programming information regarding the products. This software is supplied "AS IS" without any warranties. NXP Semiconductors assumes no responsibility or liability for the use of the software, conveys no license or title under any patent, copyright, or mask work right to the product. NXP Semiconductors reserves the right to make changes in the software without notification. NXP Semiconductors also make no representation or warranty that such application will be suitable for the specified use without further testing or modification.

Definition in file gpio_int.c.

Generated on Tue Jun 7 14:59:16 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/GPIO/GPIO_Interrupt/lpc17xx_libcfg.h File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/GPIO/GPIO_Interrupt/lpc17xx_libcfg.h File Reference

#include "lpc_types.h"

Go to the source code of this file.

Defines

#define | DEBUG
#define | _GPIO
#define | CHECK_PARAM(expr) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))

Functions

void | check_failed (uint8_t *file, uint32_t line)

Define Documentation

#define _GPIO

Definition at line 47 of file lpc17xx_libcfg.h.

#define CHECK_PARAM ( expr ) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))

Definition at line 136 of file lpc17xx_libcfg.h.

#define DEBUG

Definition at line 36 of file lpc17xx_libcfg.h.

Generated on Tue Jun 7 14:59:10 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/GPIO/LedBlinky/LedBlinky.c File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/GPIO/LedBlinky/LedBlinky.c File Reference

This example describes how to use GPIO interrupt to drive LEDs. More...

#include "lpc17xx_gpio.h"
#include "lpc17xx_libcfg.h"

Go to the source code of this file.

Defines

#define | MCB_LPC_1768
#define | LED_NUM 8

Functions

void | SysTick_Handler (void)
SysTick handler sub-routine (1ms).
void | Delay (unsigned long tick)
Delay function.
int | c_entry (void)
c_entry: Main program body
int | main (void)
void | check_failed (uint8_t *file, uint32_t line)

Variables

const unsigned long | led_mask [] = { 1<<28, 1<<29, 1UL<<31, 1<<2, 1<<3, 1<<4, 1<<5, 1<<6 }
volatile unsigned long | SysTickCnt

Detailed Description

This example describes how to use GPIO interrupt to drive LEDs.

Version:
2.0
Date:
21. May. 2010
Author:
NXP MCU SW Application Team
Copyright(C) 2010, NXP Semiconductor All rights reserved.

Software that is described herein is for illustrative purposes only which provides customers with programming information regarding the products. This software is supplied "AS IS" without any warranties. NXP Semiconductors assumes no responsibility or liability for the use of the software, conveys no license or title under any patent, copyright, or mask work right to the product. NXP Semiconductors reserves the right to make changes in the software without notification. NXP Semiconductors also make no representation or warranty that such application will be suitable for the specified use without further testing or modification.

Definition in file LedBlinky.c.

Generated on Tue Jun 7 14:59:16 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/GPIO/LedBlinky/lpc17xx_libcfg.h File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/GPIO/LedBlinky/lpc17xx_libcfg.h File Reference

#include "lpc_types.h"

Go to the source code of this file.

Defines

#define | DEBUG
#define | _GPIO
#define | CHECK_PARAM(expr) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))

Functions

void | check_failed (uint8_t *file, uint32_t line)

Define Documentation

#define _GPIO

Definition at line 47 of file lpc17xx_libcfg.h.

#define CHECK_PARAM ( expr ) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))

Definition at line 135 of file lpc17xx_libcfg.h.

#define DEBUG

Definition at line 36 of file lpc17xx_libcfg.h.

Generated on Tue Jun 7 14:59:10 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/I2C/master/lpc17xx_libcfg.h File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/I2C/master/lpc17xx_libcfg.h File Reference

#include "lpc_types.h"

Go to the source code of this file.

Defines

#define | DEBUG
#define | _DBGFWK
#define | _UART
#define | _UART0
#define | _I2C
#define | _I2C0
#define | _I2C1
#define | _I2C2
#define | _GPDMA
#define | _ADC
#define | CHECK_PARAM(expr) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))

Functions

void | check_failed (uint8_t *file, uint32_t line)

Define Documentation

#define _ADC

Definition at line 90 of file lpc17xx_libcfg.h.

#define _DBGFWK

Definition at line 43 of file lpc17xx_libcfg.h.

#define _GPDMA

Definition at line 83 of file lpc17xx_libcfg.h.

#define _I2C

Definition at line 70 of file lpc17xx_libcfg.h.

#define _I2C0

Definition at line 71 of file lpc17xx_libcfg.h.

#define _I2C1

Definition at line 72 of file lpc17xx_libcfg.h.

#define _I2C2

Definition at line 73 of file lpc17xx_libcfg.h.

#define _UART

Definition at line 52 of file lpc17xx_libcfg.h.

#define _UART0

Definition at line 53 of file lpc17xx_libcfg.h.

#define CHECK_PARAM ( expr ) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))

Definition at line 134 of file lpc17xx_libcfg.h.

#define DEBUG

Definition at line 36 of file lpc17xx_libcfg.h.

Generated on Tue Jun 7 14:59:10 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/I2C/master/master.c File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/I2C/master/master.c File Reference

This example describes how to configure I2C as master device. More...

#include "lpc17xx_i2c.h"
#include "lpc17xx_libcfg.h"
#include "lpc17xx_pinsel.h"
#include "debug_frmwrk.h"

Go to the source code of this file.

Defines

#define | USEDI2CDEV_M 0
#define | I2CDEV_S_ADDR (0x90>>1)
#define | BUFFER_SIZE 0x10
#define | I2CDEV_M LPC_I2C0

Functions

void | print_menu (void)
Print Welcome menu.
void | Buffer_Init (uint8_t type)
Initialize buffer.
int | c_entry (void)
c_entry: Main program body
int | main (void)
void | check_failed (uint8_t *file, uint32_t line)

Variables

uint8_t | menu1 []
uint8_t | Master_Buf [BUFFER_SIZE]
uint8_t | master_test [2]

Detailed Description

This example describes how to configure I2C as master device.

Version:
2.0
Date:
21. May. 2010
Author:
NXP MCU SW Application Team
Copyright(C) 2010, NXP Semiconductor All rights reserved.

Software that is described herein is for illustrative purposes only which provides customers with programming information regarding the products. This software is supplied "AS IS" without any warranties. NXP Semiconductors assumes no responsibility or liability for the use of the software, conveys no license or title under any patent, copyright, or mask work right to the product. NXP Semiconductors reserves the right to make changes in the software without notification. NXP Semiconductors also make no representation or warranty that such application will be suitable for the specified use without further testing or modification.

Definition in file master.c.

Generated on Tue Jun 7 14:59:16 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/I2C/Master_Slave_Interrupt/i2c_master_slave_int_test.c File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/I2C/Master_Slave_Interrupt/i2c_master_slave_int_test.c File Reference

This example describes how to uses two I2C peripheral on LPC1768 to communicate together. One set as master and the other set as slave. More...

#include "lpc17xx_i2c.h"
#include "lpc17xx_libcfg.h"
#include "lpc17xx_pinsel.h"
#include "debug_frmwrk.h"

Go to the source code of this file.

Defines

#define | USEDI2CDEV_M 2
#define | USEDI2CDEV_S 0
#define | I2CDEV_S_OWN_ADDR (0x90>>1)
#define | BUFFER_SIZE 0x10
#define | I2CDEV_M LPC_I2C2
#define | I2CDEV_S LPC_I2C0

Functions

void | I2C0_IRQHandler (void)
Main I2C0 interrupt handler sub-routine.
void | I2C2_IRQHandler (void)
Main I2C2 interrupt handler sub-routine.
void | print_menu (void)
Print Welcome menu.
void | Error_Loop_M (uint8_t ErrorCode)
A subroutine that will be called if there's any error on I2C operation (master).
void | Error_Loop_S (uint8_t ErrorCode)
A subroutine that will be called if there's any error on I2C operation (slave).
void | Buffer_Init (uint8_t type)
Initialize buffer.
int | c_entry (void)
c_entry: Main program body
int | main (void)
void | check_failed (uint8_t *file, uint32_t line)

Variables

uint8_t | menu1 []
__IO FlagStatus | complete_M
uint8_t | Master_Buf [BUFFER_SIZE]
__IO FlagStatus | complete_S
uint8_t | Slave_Buf [BUFFER_SIZE]
uint8_t | master_test [2]
uint8_t | slave_test [2]

Detailed Description

This example describes how to uses two I2C peripheral on LPC1768 to communicate together. One set as master and the other set as slave.

Version:
2.0
Date:
21. May. 2010
Author:
NXP MCU SW Application Team
Copyright(C) 2010, NXP Semiconductor All rights reserved.

Software that is described herein is for illustrative purposes only which provides customers with programming information regarding the products. This software is supplied "AS IS" without any warranties. NXP Semiconductors assumes no responsibility or liability for the use of the software, conveys no license or title under any patent, copyright, or mask work right to the product. NXP Semiconductors reserves the right to make changes in the software without notification. NXP Semiconductors also make no representation or warranty that such application will be suitable for the specified use without further testing or modification.

Definition in file i2c_master_slave_int_test.c.

Generated on Tue Jun 7 14:59:16 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/I2C/Master_Slave_Interrupt/lpc17xx_libcfg.h File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/I2C/Master_Slave_Interrupt/lpc17xx_libcfg.h File Reference

#include "lpc_types.h"

Go to the source code of this file.

Defines

#define | DEBUG
#define | _DBGFWK
#define | _UART
#define | _UART0
#define | _I2C
#define | _I2C0
#define | _I2C1
#define | _I2C2
#define | _GPDMA
#define | _ADC
#define | CHECK_PARAM(expr) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))

Functions

void | check_failed (uint8_t *file, uint32_t line)

Define Documentation

#define _ADC

Definition at line 90 of file lpc17xx_libcfg.h.

#define _DBGFWK

Definition at line 43 of file lpc17xx_libcfg.h.

#define _GPDMA

Definition at line 83 of file lpc17xx_libcfg.h.

#define _I2C

Definition at line 70 of file lpc17xx_libcfg.h.

#define _I2C0

Definition at line 71 of file lpc17xx_libcfg.h.

#define _I2C1

Definition at line 72 of file lpc17xx_libcfg.h.

#define _I2C2

Definition at line 73 of file lpc17xx_libcfg.h.

#define _UART

Definition at line 52 of file lpc17xx_libcfg.h.

#define _UART0

Definition at line 53 of file lpc17xx_libcfg.h.

#define CHECK_PARAM ( expr ) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))

Definition at line 135 of file lpc17xx_libcfg.h.

#define DEBUG

Definition at line 36 of file lpc17xx_libcfg.h.

Generated on Tue Jun 7 14:59:10 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/I2C/Monitor/i2c_monitor.c File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/I2C/Monitor/i2c_monitor.c File Reference

This example describes how to uses I2C peripheral on LPC1768 in monitor mode. More...

#include "lpc17xx_i2c.h"
#include "lpc17xx_libcfg.h"
#include "lpc17xx_pinsel.h"
#include "debug_frmwrk.h"

Go to the source code of this file.

Defines

#define | I2CDEV LPC_I2C0
#define | BUFFER_SIZE 0x80

Functions

void | I2C0_IRQHandler (void)
Main I2C0 interrupt handler sub-routine.
void | print_menu (void)
Print Welcome menu.
int | c_entry (void)
c_entry: Main program body
int | main (void)
void | check_failed (uint8_t *file, uint32_t line)

Variables

uint8_t | menu1 []
uint8_t | buffer [BUFFER_SIZE]
BOOL_8 | done = FALSE
uint32_t | count = 0

Detailed Description

This example describes how to uses I2C peripheral on LPC1768 in monitor mode.

Version:
1.0
Date:
16. July. 2010
Author:
NXP MCU SW Application Team
Copyright(C) 2010, NXP Semiconductor All rights reserved.

Software that is described herein is for illustrative purposes only which provides customers with programming information regarding the products. This software is supplied "AS IS" without any warranties. NXP Semiconductors assumes no responsibility or liability for the use of the software, conveys no license or title under any patent, copyright, or mask work right to the product. NXP Semiconductors reserves the right to make changes in the software without notification. NXP Semiconductors also make no representation or warranty that such application will be suitable for the specified use without further testing or modification.

Definition in file i2c_monitor.c.

Generated on Tue Jun 7 14:59:16 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/I2C/Monitor/lpc17xx_libcfg.h File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/I2C/Monitor/lpc17xx_libcfg.h File Reference

#include "lpc_types.h"

Go to the source code of this file.

Defines

#define | DEBUG
#define | _DBGFWK
#define | _UART
#define | _UART0
#define | _I2C
#define | _I2C0
#define | CHECK_PARAM(expr) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))

Functions

void | check_failed (uint8_t *file, uint32_t line)

Define Documentation

#define _DBGFWK

Definition at line 43 of file lpc17xx_libcfg.h.

#define _I2C

Definition at line 70 of file lpc17xx_libcfg.h.

#define _I2C0

Definition at line 71 of file lpc17xx_libcfg.h.

#define _UART

Definition at line 52 of file lpc17xx_libcfg.h.

#define _UART0

Definition at line 53 of file lpc17xx_libcfg.h.

#define CHECK_PARAM ( expr ) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))

Definition at line 135 of file lpc17xx_libcfg.h.

#define DEBUG

Definition at line 36 of file lpc17xx_libcfg.h.

Generated on Tue Jun 7 14:59:10 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/I2C/pca8581_polling/lpc17xx_libcfg.h File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/I2C/pca8581_polling/lpc17xx_libcfg.h File Reference

#include "lpc_types.h"

Go to the source code of this file.

Defines

#define | DEBUG
#define | _DBGFWK
#define | _UART
#define | _UART0
#define | _I2C
#define | _I2C0
#define | _I2C1
#define | _I2C2
#define | _GPDMA
#define | _ADC
#define | CHECK_PARAM(expr) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))

Functions

void | check_failed (uint8_t *file, uint32_t line)

Define Documentation

#define _ADC

Definition at line 90 of file lpc17xx_libcfg.h.

#define _DBGFWK

Definition at line 43 of file lpc17xx_libcfg.h.

#define _GPDMA

Definition at line 83 of file lpc17xx_libcfg.h.

#define _I2C

Definition at line 70 of file lpc17xx_libcfg.h.

#define _I2C0

Definition at line 71 of file lpc17xx_libcfg.h.

#define _I2C1

Definition at line 72 of file lpc17xx_libcfg.h.

#define _I2C2

Definition at line 73 of file lpc17xx_libcfg.h.

#define _UART

Definition at line 52 of file lpc17xx_libcfg.h.

#define _UART0

Definition at line 53 of file lpc17xx_libcfg.h.

#define CHECK_PARAM ( expr ) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))

Definition at line 135 of file lpc17xx_libcfg.h.

#define DEBUG

Definition at line 35 of file lpc17xx_libcfg.h.

Generated on Tue Jun 7 14:59:10 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/I2C/pca8581_polling/pca8581_test.c File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/I2C/pca8581_polling/pca8581_test.c File Reference

An example of I2C using polling mode to test the I2C driver. Using EEPROM PCA8581 to transfer a number of data byte. More...

#include "lpc17xx_i2c.h"
#include "lpc17xx_libcfg.h"
#include "lpc17xx_pinsel.h"
#include "debug_frmwrk.h"

Go to the source code of this file.

Defines

#define | USEDI2CDEV 0
#define | PCA8581_SLVADDR (0xA0>>1)
#define | I2CDEV LPC_I2C0

Functions

int32_t | PCA8581_Write (void)
Write a number of data byte into EEPROM PCA8581.
int32_t | PCA8581_Read (void)
Read a number of data byte from EEPROM PCA8581.
void | print_menu (void)
Print Welcome menu.
void | Error_Loop (uint32_t ErrorCode)
A subroutine that will be called if there's any error on I2C operation.
int | c_entry (void)
c_entry: Main program body
int | main (void)
void | check_failed (uint8_t *file, uint32_t line)

Variables

uint8_t | menu1 []
uint8_t | menu2 [] = "Demo terminated! \n\r"
uint8_t | pca8581_wrdat []
uint8_t | pca8581_rddat []
I2C_M_SETUP_Type txsetup
I2C_M_SETUP_Type rxsetup

Detailed Description

An example of I2C using polling mode to test the I2C driver. Using EEPROM PCA8581 to transfer a number of data byte.

Version:
2.0
Date:
21. May. 2010
Author:
NXP MCU SW Application Team
Copyright(C) 2010, NXP Semiconductor All rights reserved.

Software that is described herein is for illustrative purposes only which provides customers with programming information regarding the products. This software is supplied "AS IS" without any warranties. NXP Semiconductors assumes no responsibility or liability for the use of the software, conveys no license or title under any patent, copyright, or mask work right to the product. NXP Semiconductors reserves the right to make changes in the software without notification. NXP Semiconductors also make no representation or warranty that such application will be suitable for the specified use without further testing or modification.

Definition in file pca8581_test.c.

Generated on Tue Jun 7 14:59:16 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/I2C/sc16is750_int/i2c_interrupt_test.c File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/I2C/sc16is750_int/i2c_interrupt_test.c File Reference

An example of I2C using interrupt mode to test the I2C driver. Using I2C at mode I2C master/8bit on LPC1766 to communicate with SC16IS750/760 Demo Board. More...

#include "lpc17xx_i2c.h"
#include "lpc17xx_libcfg.h"
#include "lpc17xx_pinsel.h"
#include "debug_frmwrk.h"

Go to the source code of this file.

Defines

#define | USEDI2CDEV 0
#define | IODIR 0x0A
#define | IOSTATE 0x0B
#define | IOCON 0x0E
#define | SLVADDR (0x90>>1)
#define | REGS_ADDR(n) (n<<3)
#define | I2CDEV LPC_I2C0

Functions

void | I2C0_IRQHandler (void)
Main I2C0 interrupt handler sub-routine.
void | print_menu (void)
Print Welcome menu.
void | Error_Loop (uint8_t ErrorCode)
A subroutine that will be called if there's any error on I2C operation.
int | c_entry (void)
c_entry: Main program body
int | main (void)
void | check_failed (uint8_t *file, uint32_t line)

Variables

uint8_t | menu1 []
uint8_t | menu2 [] = "Demo terminated! \n\r"
uint8_t | iocon_cfg [2] = {REGS_ADDR(IOCON), 0x00}
uint8_t | iodir_cfg [2] = {REGS_ADDR(IODIR), 0xFF}
uint8_t | iostate_cfg_0 [2] = {REGS_ADDR(IOSTATE), 0x00}
uint8_t | iostate_cfg_1 [2] = {REGS_ADDR(IOSTATE), 0xFF}
__IO FlagStatus | complete

Detailed Description

An example of I2C using interrupt mode to test the I2C driver. Using I2C at mode I2C master/8bit on LPC1766 to communicate with SC16IS750/760 Demo Board.

Version:
2.0
Date:
21. May. 2010
Author:
NXP MCU SW Application Team
Copyright(C) 2010, NXP Semiconductor All rights reserved.

Software that is described herein is for illustrative purposes only which provides customers with programming information regarding the products. This software is supplied "AS IS" without any warranties. NXP Semiconductors assumes no responsibility or liability for the use of the software, conveys no license or title under any patent, copyright, or mask work right to the product. NXP Semiconductors reserves the right to make changes in the software without notification. NXP Semiconductors also make no representation or warranty that such application will be suitable for the specified use without further testing or modification.

Definition in file i2c_interrupt_test.c.

Generated on Tue Jun 7 14:59:16 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/I2C/sc16is750_int/lpc17xx_libcfg.h File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/I2C/sc16is750_int/lpc17xx_libcfg.h File Reference

#include "lpc_types.h"

Go to the source code of this file.

Defines

#define | DEBUG
#define | _DBGFWK
#define | _UART
#define | _UART0
#define | _I2C
#define | _I2C0
#define | _I2C1
#define | _I2C2
#define | _GPDMA
#define | _ADC
#define | CHECK_PARAM(expr) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))

Functions

void | check_failed (uint8_t *file, uint32_t line)

Define Documentation

#define _ADC

Definition at line 91 of file lpc17xx_libcfg.h.

#define _DBGFWK

Definition at line 44 of file lpc17xx_libcfg.h.

#define _GPDMA

Definition at line 84 of file lpc17xx_libcfg.h.

#define _I2C

Definition at line 71 of file lpc17xx_libcfg.h.

#define _I2C0

Definition at line 72 of file lpc17xx_libcfg.h.

#define _I2C1

Definition at line 73 of file lpc17xx_libcfg.h.

#define _I2C2

Definition at line 74 of file lpc17xx_libcfg.h.

#define _UART

Definition at line 53 of file lpc17xx_libcfg.h.

#define _UART0

Definition at line 54 of file lpc17xx_libcfg.h.

#define CHECK_PARAM ( expr ) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))

Definition at line 136 of file lpc17xx_libcfg.h.

#define DEBUG

Definition at line 36 of file lpc17xx_libcfg.h.

Generated on Tue Jun 7 14:59:10 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/I2C/sc16is750_polling/i2c_polling_test.c File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/I2C/sc16is750_polling/i2c_polling_test.c File Reference

An example of I2C using polling mode to test the I2C driver. Using I2C at mode I2C master/8bit on LPC1766 to communicate with SC16IS750/760 Demo Board. More...

#include "lpc17xx_i2c.h"
#include "lpc17xx_libcfg.h"
#include "lpc17xx_pinsel.h"
#include "debug_frmwrk.h"

Go to the source code of this file.

Defines

#define | USEDI2CDEV 0
#define | IODIR 0x0A
#define | IOSTATE 0x0B
#define | IOCON 0x0E
#define | SLVADDR (0x90>>1)
#define | REGS_ADDR(n) (n<<3)
#define | I2CDEV LPC_I2C0

Functions

void | print_menu (void)
Print Welcome menu.
void | Error_Loop (uint32_t ErrorCode)
A subroutine that will be called if there's any error on I2C operation.
int | c_entry (void)
c_entry: Main program body
int | main (void)
void | check_failed (uint8_t *file, uint32_t line)

Variables

uint8_t | menu1 []
uint8_t | menu2 [] = "Demo terminated! \n\r"
uint8_t | iocon_cfg [2] = {REGS_ADDR(IOCON), 0x00}
uint8_t | iodir_cfg [2] = {REGS_ADDR(IODIR), 0xFF}
uint8_t | iostate_cfg_0 [2] = {REGS_ADDR(IOSTATE), 0x00}
uint8_t | iostate_cfg_1 [2] = {REGS_ADDR(IOSTATE), 0xFF}

Detailed Description

An example of I2C using polling mode to test the I2C driver. Using I2C at mode I2C master/8bit on LPC1766 to communicate with SC16IS750/760 Demo Board.

Version:
2.0
Date:
21. May. 2010
Author:
NXP MCU SW Application Team
Copyright(C) 2010, NXP Semiconductor All rights reserved.

Software that is described herein is for illustrative purposes only which provides customers with programming information regarding the products. This software is supplied "AS IS" without any warranties. NXP Semiconductors assumes no responsibility or liability for the use of the software, conveys no license or title under any patent, copyright, or mask work right to the product. NXP Semiconductors reserves the right to make changes in the software without notification. NXP Semiconductors also make no representation or warranty that such application will be suitable for the specified use without further testing or modification.

Definition in file i2c_polling_test.c.

Generated on Tue Jun 7 14:59:16 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/I2C/sc16is750_polling/lpc17xx_libcfg.h File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/I2C/sc16is750_polling/lpc17xx_libcfg.h File Reference

#include "lpc_types.h"

Go to the source code of this file.

Defines

#define | DEBUG
#define | _DBGFWK
#define | _UART
#define | _UART0
#define | _I2C
#define | _I2C0
#define | _I2C1
#define | _I2C2
#define | _GPDMA
#define | _ADC
#define | CHECK_PARAM(expr) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))

Functions

void | check_failed (uint8_t *file, uint32_t line)

Define Documentation

#define _ADC

Definition at line 90 of file lpc17xx_libcfg.h.

#define _DBGFWK

Definition at line 43 of file lpc17xx_libcfg.h.

#define _GPDMA

Definition at line 83 of file lpc17xx_libcfg.h.

#define _I2C

Definition at line 70 of file lpc17xx_libcfg.h.

#define _I2C0

Definition at line 71 of file lpc17xx_libcfg.h.

#define _I2C1

Definition at line 72 of file lpc17xx_libcfg.h.

#define _I2C2

Definition at line 73 of file lpc17xx_libcfg.h.

#define _UART

Definition at line 52 of file lpc17xx_libcfg.h.

#define _UART0

Definition at line 53 of file lpc17xx_libcfg.h.

#define CHECK_PARAM ( expr ) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))

Definition at line 135 of file lpc17xx_libcfg.h.

#define DEBUG

Definition at line 35 of file lpc17xx_libcfg.h.

Generated on Tue Jun 7 14:59:10 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/I2C/slave/lpc17xx_libcfg.h File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/I2C/slave/lpc17xx_libcfg.h File Reference

#include "lpc_types.h"

Go to the source code of this file.

Defines

#define | DEBUG
#define | _DBGFWK
#define | _UART
#define | _UART0
#define | _I2C
#define | _I2C0
#define | _I2C1
#define | _I2C2
#define | _GPDMA
#define | _ADC
#define | CHECK_PARAM(expr) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))

Functions

void | check_failed (uint8_t *file, uint32_t line)

Define Documentation

#define _ADC

Definition at line 89 of file lpc17xx_libcfg.h.

#define _DBGFWK

Definition at line 42 of file lpc17xx_libcfg.h.

#define _GPDMA

Definition at line 82 of file lpc17xx_libcfg.h.

#define _I2C

Definition at line 69 of file lpc17xx_libcfg.h.

#define _I2C0

Definition at line 70 of file lpc17xx_libcfg.h.

#define _I2C1

Definition at line 71 of file lpc17xx_libcfg.h.

#define _I2C2

Definition at line 72 of file lpc17xx_libcfg.h.

#define _UART

Definition at line 51 of file lpc17xx_libcfg.h.

#define _UART0

Definition at line 52 of file lpc17xx_libcfg.h.

#define CHECK_PARAM ( expr ) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))

Definition at line 133 of file lpc17xx_libcfg.h.

#define DEBUG

Definition at line 35 of file lpc17xx_libcfg.h.

Generated on Tue Jun 7 14:59:10 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/I2C/slave/slave.c File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/I2C/slave/slave.c File Reference

This example describes how to use I2C peripheral as a slave. More...

#include "lpc17xx_i2c.h"
#include "lpc17xx_libcfg.h"
#include "lpc17xx_pinsel.h"
#include "debug_frmwrk.h"

Go to the source code of this file.

Defines

#define | USEDI2CDEV_S 0
#define | I2CDEV_S_OWN_ADDR (0x90>>1)
#define | BUFFER_SIZE 0x10
#define | I2CDEV_S LPC_I2C0

Functions

void | print_menu (void)
Print Welcome menu.
void | Buffer_Init (uint8_t type)
Initialize buffer.
int | c_entry (void)
c_entry: Main program body
int | main (void)
void | check_failed (uint8_t *file, uint32_t line)

Variables

uint8_t | menu1 []
uint8_t | Slave_Buf [BUFFER_SIZE]
uint8_t | slave_test [2]

Detailed Description

This example describes how to use I2C peripheral as a slave.

Version:
2.0
Date:
21. May. 2010
Author:
NXP MCU SW Application Team
Copyright(C) 2010, NXP Semiconductor All rights reserved.

Software that is described herein is for illustrative purposes only which provides customers with programming information regarding the products. This software is supplied "AS IS" without any warranties. NXP Semiconductors assumes no responsibility or liability for the use of the software, conveys no license or title under any patent, copyright, or mask work right to the product. NXP Semiconductors reserves the right to make changes in the software without notification. NXP Semiconductors also make no representation or warranty that such application will be suitable for the specified use without further testing or modification.

Definition in file slave.c.

Generated on Tue Jun 7 14:59:16 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/I2S/I2S_DMA/i2s_dma_test.c File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/I2S/I2S_DMA/i2s_dma_test.c File Reference

This example describes how to use DMA mode to test the I2S driver. More...

#include "lpc17xx_i2s.h"
#include "lpc17xx_libcfg.h"
#include "lpc17xx_gpdma.h"
#include "debug_frmwrk.h"
#include "lpc17xx_pinsel.h"

Go to the source code of this file.

Defines

#define | BUFFER_SIZE 0x0A
#define | DMA_SIZE 0x100UL
#define | DMA_SRC LPC_AHBRAM1_BASE
#define | DMA_DST (DMA_SRC+DMA_SIZE)

Functions

void | DMA_IRQHandler (void)
GPDMA interrupt handler sub-routine.
void | Buffer_Init (void)
Initialize buffer.
Bool | Buffer_Verify (void)
Verify buffer.
void | print_menu (void)
Print menu screen.
int | c_entry (void)
c_entry: Main program body
int | main (void)
void | check_failed (uint8_t *file, uint32_t line)

Variables

uint8_t | menu []
__IO uint32_t | Channel0_TC
__IO uint32_t | Channel0_Err
__IO uint32_t | Channel1_TC
__IO uint32_t | Channel1_Err
volatile uint32_t * | I2STXBuffer = (uint32_t*)(DMA_SRC)
volatile uint32_t * | I2SRXBuffer = (uint32_t*)(DMA_DST)

Detailed Description

This example describes how to use DMA mode to test the I2S driver.

Version:
2.0
Date:
21. May. 2010
Author:
NXP MCU SW Application Team
Copyright(C) 2010, NXP Semiconductor All rights reserved.

Software that is described herein is for illustrative purposes only which provides customers with programming information regarding the products. This software is supplied "AS IS" without any warranties. NXP Semiconductors assumes no responsibility or liability for the use of the software, conveys no license or title under any patent, copyright, or mask work right to the product. NXP Semiconductors reserves the right to make changes in the software without notification. NXP Semiconductors also make no representation or warranty that such application will be suitable for the specified use without further testing or modification.

Definition in file i2s_dma_test.c.

Generated on Tue Jun 7 14:59:16 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/I2S/I2S_DMA/lpc17xx_libcfg.h File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/I2S/I2S_DMA/lpc17xx_libcfg.h File Reference

#include "lpc_types.h"

Go to the source code of this file.

Defines

#define | DEBUG
#define | _DBGFWK
#define | _UART
#define | _UART0
#define | _GPDMA
#define | _I2S
#define | CHECK_PARAM(expr) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))

Functions

void | check_failed (uint8_t *file, uint32_t line)

Define Documentation

#define _DBGFWK

Definition at line 44 of file lpc17xx_libcfg.h.

#define _GPDMA

Definition at line 84 of file lpc17xx_libcfg.h.

#define _I2S

Definition at line 102 of file lpc17xx_libcfg.h.

#define _UART

Definition at line 53 of file lpc17xx_libcfg.h.

#define _UART0

Definition at line 54 of file lpc17xx_libcfg.h.

#define CHECK_PARAM ( expr ) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))

Definition at line 136 of file lpc17xx_libcfg.h.

#define DEBUG

Definition at line 36 of file lpc17xx_libcfg.h.

Generated on Tue Jun 7 14:59:10 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/I2S/I2S_IRQ/i2s_irq_test.c File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/I2S/I2S_IRQ/i2s_irq_test.c File Reference

This example describes how to use I2S transfer in interrupt mode. More...

#include "lpc17xx_i2s.h"
#include "lpc17xx_libcfg.h"
#include "lpc17xx_pinsel.h"
#include "debug_frmwrk.h"

Go to the source code of this file.

Defines

#define | BUFFER_SIZE 0x400
#define | I2S_BUFFER_SRC LPC_AHBRAM1_BASE
#define | I2S_BUFFER_DST (I2S_BUFFER_SRC+0x1000UL)
#define | RXFIFO_EMPTY 0
#define | TXFIFO_FULL 8

Functions

void | I2S_IRQHandler ()
I2S IRQ Handler.
void | Buffer_Init (void)
Initialize buffer.
Bool | Buffer_Verify (void)
Verify buffer.
void | print_menu (void)
print menu
int | c_entry (void)
c_entry: Main program body
int | main (void)
void | check_failed (uint8_t *file, uint32_t line)

Variables

uint8_t | menu []
volatile uint8_t | I2STXDone = 0
volatile uint8_t | I2SRXDone = 0
volatile uint32_t * | I2STXBuffer = (uint32_t*)(I2S_BUFFER_SRC)
volatile uint32_t * | I2SRXBuffer = (uint32_t *)(I2S_BUFFER_DST)
volatile uint32_t | I2SReadLength = 0
volatile uint32_t | I2SWriteLength = 0
uint8_t | tx_depth_irq = 0
uint8_t | rx_depth_irq = 0
uint8_t | dummy = 0

Detailed Description

This example describes how to use I2S transfer in interrupt mode.

Version:
2.0
Date:
21. May. 2010
Author:
NXP MCU SW Application Team
Copyright(C) 2010, NXP Semiconductor All rights reserved.

Software that is described herein is for illustrative purposes only which provides customers with programming information regarding the products. This software is supplied "AS IS" without any warranties. NXP Semiconductors assumes no responsibility or liability for the use of the software, conveys no license or title under any patent, copyright, or mask work right to the product. NXP Semiconductors reserves the right to make changes in the software without notification. NXP Semiconductors also make no representation or warranty that such application will be suitable for the specified use without further testing or modification.

Definition in file i2s_irq_test.c.

Generated on Tue Jun 7 14:59:16 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/I2S/I2S_IRQ/lpc17xx_libcfg.h File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/I2S/I2S_IRQ/lpc17xx_libcfg.h File Reference

#include "lpc_types.h"

Go to the source code of this file.

Defines

#define | DEBUG
#define | _DBGFWK
#define | _UART
#define | _UART0
#define | _I2S
#define | CHECK_PARAM(expr) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))

Functions

void | check_failed (uint8_t *file, uint32_t line)

Define Documentation

#define _DBGFWK

Definition at line 44 of file lpc17xx_libcfg.h.

#define _I2S

Definition at line 102 of file lpc17xx_libcfg.h.

#define _UART

Definition at line 53 of file lpc17xx_libcfg.h.

#define _UART0

Definition at line 54 of file lpc17xx_libcfg.h.

#define CHECK_PARAM ( expr ) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))

Definition at line 135 of file lpc17xx_libcfg.h.

#define DEBUG

Definition at line 36 of file lpc17xx_libcfg.h.

Generated on Tue Jun 7 14:59:10 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/I2S/I2S_MCLK/i2s_mclk.c File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/I2S/I2S_MCLK/i2s_mclk.c File Reference

This example describes how to test I2S master clock. More...

#include "lpc17xx_i2s.h"
#include "lpc17xx_libcfg.h"
#include "lpc17xx_pinsel.h"
#include "debug_frmwrk.h"

Go to the source code of this file.

Defines

#define | BUFFER_SIZE 0x400
#define | I2S_BUFFER_SRC LPC_AHBRAM1_BASE
#define | I2S_BUFFER_DST (I2S_BUFFER_SRC+0x1000UL)
#define | RXFIFO_EMPTY 0
#define | TXFIFO_FULL 8

Functions

void | I2S_IRQHandler ()
I2S IRQ Handler.
void | Buffer_Init (void)
Initialize buffer.
Bool | Buffer_Verify (void)
Verify buffer.
void | print_menu (void)
print menu
int | c_entry (void)
c_entry: Main program body
int | main (void)
void | check_failed (uint8_t *file, uint32_t line)

Variables

uint8_t | menu []
volatile uint8_t | I2STXDone = 0
volatile uint8_t | I2SRXDone = 0
volatile uint32_t * | I2STXBuffer = (uint32_t*)(I2S_BUFFER_SRC)
volatile uint32_t * | I2SRXBuffer = (uint32_t *)(I2S_BUFFER_DST)
volatile uint32_t | I2SReadLength = 0
volatile uint32_t | I2SWriteLength = 0
uint8_t | tx_depth_irq = 0
uint8_t | rx_depth_irq = 0
uint8_t | dummy = 0

Detailed Description

This example describes how to test I2S master clock.

Version:
1.0
Date:
18. June. 2010
Author:
NXP MCU SW Application Team
Copyright(C) 2010, NXP Semiconductor All rights reserved.

Software that is described herein is for illustrative purposes only which provides customers with programming information regarding the products. This software is supplied "AS IS" without any warranties. NXP Semiconductors assumes no responsibility or liability for the use of the software, conveys no license or title under any patent, copyright, or mask work right to the product. NXP Semiconductors reserves the right to make changes in the software without notification. NXP Semiconductors also make no representation or warranty that such application will be suitable for the specified use without further testing or modification.

Definition in file i2s_mclk.c.

Generated on Tue Jun 7 14:59:17 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/I2S/I2S_MCLK/lpc17xx_libcfg.h File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/I2S/I2S_MCLK/lpc17xx_libcfg.h File Reference

#include "lpc_types.h"

Go to the source code of this file.

Defines

#define | DEBUG
#define | _DBGFWK
#define | _UART
#define | _UART0
#define | _I2S
#define | CHECK_PARAM(expr) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))

Functions

void | check_failed (uint8_t *file, uint32_t line)

Define Documentation

#define _DBGFWK

Definition at line 44 of file lpc17xx_libcfg.h.

#define _I2S

Definition at line 102 of file lpc17xx_libcfg.h.

#define _UART

Definition at line 53 of file lpc17xx_libcfg.h.

#define _UART0

Definition at line 54 of file lpc17xx_libcfg.h.

#define CHECK_PARAM ( expr ) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))

Definition at line 135 of file lpc17xx_libcfg.h.

#define DEBUG

Definition at line 36 of file lpc17xx_libcfg.h.

Generated on Tue Jun 7 14:59:10 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/I2S/I2S_test_4_wire/i2s_test_4_wire.c File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/I2S/I2S_test_4_wire/i2s_test_4_wire.c File Reference

This example describes how to use I2S 4-wire mode. More...

#include "lpc17xx_i2s.h"
#include "lpc17xx_libcfg.h"
#include "lpc17xx_pinsel.h"
#include "debug_frmwrk.h"

Go to the source code of this file.

Defines

#define | BUFFER_SIZE 0x400
************************** PRIVATE DEFINITIONS *************************/
#define | I2S_BUFFER_SRC LPC_AHBRAM1_BASE
#define | I2S_BUFFER_DST (I2S_BUFFER_SRC+0x1000UL)

Functions

void | Buffer_Init (void)
Initialize buffer.
Bool | Buffer_Verify (void)
Verify buffer.
void | print_menu (void)
Print menu.
int | c_entry (void)
c_entry: Main I2S program body
int | main (void)
void | check_failed (uint8_t *file, uint32_t line)

Variables

uint8_t | menu []
volatile uint8_t | I2STXDone = 0
volatile uint8_t | I2SRXDone = 0
volatile uint32_t * | I2STXBuffer = (uint32_t*)(I2S_BUFFER_SRC)
volatile uint32_t * | I2SRXBuffer = (uint32_t *)(I2S_BUFFER_DST)
volatile uint32_t | I2SReadLength = 0
volatile uint32_t | I2SWriteLength = 0

Detailed Description

This example describes how to use I2S 4-wire mode.

Version:
2.0
Date:
21. May. 2010
Author:
NXP MCU SW Application Team
Copyright(C) 2010, NXP Semiconductor All rights reserved.

Software that is described herein is for illustrative purposes only which provides customers with programming information regarding the products. This software is supplied "AS IS" without any warranties. NXP Semiconductors assumes no responsibility or liability for the use of the software, conveys no license or title under any patent, copyright, or mask work right to the product. NXP Semiconductors reserves the right to make changes in the software without notification. NXP Semiconductors also make no representation or warranty that such application will be suitable for the specified use without further testing or modification.

Definition in file i2s_test_4_wire.c.

Generated on Tue Jun 7 14:59:17 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/I2S/I2S_test_4_wire/lpc17xx_libcfg.h File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/I2S/I2S_test_4_wire/lpc17xx_libcfg.h File Reference

#include "lpc_types.h"

Go to the source code of this file.

Defines

#define | DEBUG
#define | _DBGFWK
#define | _UART
#define | _UART0
#define | _I2S
#define | CHECK_PARAM(expr) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))

Functions

void | check_failed (uint8_t *file, uint32_t line)

Define Documentation

#define _DBGFWK

Definition at line 44 of file lpc17xx_libcfg.h.

#define _I2S

Definition at line 102 of file lpc17xx_libcfg.h.

#define _UART

Definition at line 53 of file lpc17xx_libcfg.h.

#define _UART0

Definition at line 54 of file lpc17xx_libcfg.h.

#define CHECK_PARAM ( expr ) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))

Definition at line 136 of file lpc17xx_libcfg.h.

#define DEBUG

Definition at line 36 of file lpc17xx_libcfg.h.

Generated on Tue Jun 7 14:59:10 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/I2S/I2S_two_kit/i2s_two_kit.c File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/I2S/I2S_two_kit/i2s_two_kit.c File Reference

This example describes how to use I2S transfer data between two board. More...

#include "lpc17xx_i2s.h"
#include "lpc17xx_libcfg.h"
#include "lpc17xx_pinsel.h"
#include "debug_frmwrk.h"

Go to the source code of this file.

Defines

#define | I2S_TRANSMIT 0
#define | I2S_RECEIVE !I2S_TRANSMIT

Functions

void | I2S_IRQHandler ()
I2S IRQ Handler.
void | print_menu ()
print_menu
int | c_entry (void)
c_entry: Main I2S program body
int | main (void)
void | check_failed (uint8_t *file, uint32_t line)

Variables

uint8_t | menu []
uint8_t | tx_depth_irq = 0
uint8_t | rx_depth_irq = 0
uint32_t | data

Detailed Description

This example describes how to use I2S transfer data between two board.

Version:
2.0
Date:
21. May. 2010
Author:
NXP MCU SW Application Team
Copyright(C) 2010, NXP Semiconductor All rights reserved.

Software that is described herein is for illustrative purposes only which provides customers with programming information regarding the products. This software is supplied "AS IS" without any warranties. NXP Semiconductors assumes no responsibility or liability for the use of the software, conveys no license or title under any patent, copyright, or mask work right to the product. NXP Semiconductors reserves the right to make changes in the software without notification. NXP Semiconductors also make no representation or warranty that such application will be suitable for the specified use without further testing or modification.

Definition in file i2s_two_kit.c.

Generated on Tue Jun 7 14:59:17 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/I2S/I2S_two_kit/lpc17xx_libcfg.h File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/I2S/I2S_two_kit/lpc17xx_libcfg.h File Reference

#include "lpc_types.h"

Go to the source code of this file.

Defines

#define | DEBUG
#define | _DBGFWK
#define | _UART
#define | _UART0
#define | _I2S
#define | CHECK_PARAM(expr) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))

Functions

void | check_failed (uint8_t *file, uint32_t line)

Define Documentation

#define _DBGFWK

Definition at line 44 of file lpc17xx_libcfg.h.

#define _I2S

Definition at line 102 of file lpc17xx_libcfg.h.

#define _UART

Definition at line 53 of file lpc17xx_libcfg.h.

#define _UART0

Definition at line 54 of file lpc17xx_libcfg.h.

#define CHECK_PARAM ( expr ) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))

Definition at line 135 of file lpc17xx_libcfg.h.

#define DEBUG

Definition at line 36 of file lpc17xx_libcfg.h.

Generated on Tue Jun 7 14:59:10 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/I2S/Polling/i2s_polling.c File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/I2S/Polling/i2s_polling.c File Reference

This example describes how to use I2S transfer in polling mode. More...

#include "lpc17xx_i2s.h"
#include "lpc17xx_libcfg.h"
#include "lpc17xx_pinsel.h"
#include "debug_frmwrk.h"

Go to the source code of this file.

Defines

#define | BUFFER_SIZE 0x400
#define | I2S_BUFFER_SRC LPC_AHBRAM1_BASE
#define | I2S_BUFFER_DST (I2S_BUFFER_SRC+0x1000UL)

Functions

void | Buffer_Init (void)
Initialize buffer.
Bool | Buffer_Verify (void)
Verify buffer.
void | print_menu (void)
Print menu.
int | c_entry (void)
c_entry: Main I2S program body
int | main (void)
void | check_failed (uint8_t *file, uint32_t line)

Variables

uint8_t | menu []
volatile uint8_t | I2STXDone = 0
volatile uint8_t | I2SRXDone = 0
volatile uint32_t * | I2STXBuffer = (uint32_t*)(I2S_BUFFER_SRC)
volatile uint32_t * | I2SRXBuffer = (uint32_t *)(I2S_BUFFER_DST)
volatile uint32_t | I2SReadLength = 0
volatile uint32_t | I2SWriteLength = 0

Detailed Description

This example describes how to use I2S transfer in polling mode.

Version:
2.0
Date:
21. May. 2010
Author:
NXP MCU SW Application Team
Copyright(C) 2010, NXP Semiconductor All rights reserved.

Software that is described herein is for illustrative purposes only which provides customers with programming information regarding the products. This software is supplied "AS IS" without any warranties. NXP Semiconductors assumes no responsibility or liability for the use of the software, conveys no license or title under any patent, copyright, or mask work right to the product. NXP Semiconductors reserves the right to make changes in the software without notification. NXP Semiconductors also make no representation or warranty that such application will be suitable for the specified use without further testing or modification.

Definition in file i2s_polling.c.

Generated on Tue Jun 7 14:59:17 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/I2S/Polling/lpc17xx_libcfg.h File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/I2S/Polling/lpc17xx_libcfg.h File Reference

#include "lpc_types.h"

Go to the source code of this file.

Defines

#define | DEBUG
#define | _DBGFWK
#define | _UART
#define | _UART0
#define | _I2S
#define | CHECK_PARAM(expr) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))

Functions

void | check_failed (uint8_t *file, uint32_t line)

Define Documentation

#define _DBGFWK

Definition at line 44 of file lpc17xx_libcfg.h.

#define _I2S

Definition at line 102 of file lpc17xx_libcfg.h.

#define _UART

Definition at line 53 of file lpc17xx_libcfg.h.

#define _UART0

Definition at line 54 of file lpc17xx_libcfg.h.

#define CHECK_PARAM ( expr ) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))

Definition at line 136 of file lpc17xx_libcfg.h.

#define DEBUG

Definition at line 36 of file lpc17xx_libcfg.h.

Generated on Tue Jun 7 14:59:10 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/LCD/NOKIA6610_LCD/drv_glcd.c File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/LCD/NOKIA6610_LCD/drv_glcd.c File Reference

#include "drv_glcd.h"
#include "lpc_types.h"
#include "stdarg.h"
#include <assert.h>
#include "glcd_ll.h"

Go to the source code of this file.

Defines

#define | GLCD_DLY_10US 80
#define | GLCD_RESET_DLY 50
#define | GLCD_BOOSTER_ON_DLY 1200

Functions

GLCD_Status_t | GLCD_SendCmd (GLCD_Cmd_t Cmd, unsigned char *pData, uint32_t Size)
GLCD_Status_t | GLCD_PowerUpInit (unsigned char *pInitData)
void | GLCD_SetFont (pFontType_t pFont, LdcPixel_t Color, LdcPixel_t BackgndColor)
void | GLCD_SetWindow (uint32_t X_Left, uint32_t Y_Up, uint32_t X_Right, uint32_t Y_Down)
void | GLCD_TextSetPos (uint32_t X, uint32_t Y)
void | GLCD_TextSetTabSize (uint32_t Size)
int | GLCD_putchar (int c)
void | GLCD_print (const char *fmt)

Define Documentation

#define GLCD_BOOSTER_ON_DLY 1200

Definition at line 25 of file drv_glcd.c.

#define GLCD_DLY_10US 80

Definition at line 23 of file drv_glcd.c.

#define GLCD_RESET_DLY 50

Definition at line 24 of file drv_glcd.c.

Function Documentation

GLCD_Status_t GLCD_PowerUpInit ( unsigned char * pInitData )

Definition at line 527 of file drv_glcd.c.

void GLCD_print ( const char * fmt )

Definition at line 919 of file drv_glcd.c.

int GLCD_putchar ( int c )

Definition at line 777 of file drv_glcd.c.

GLCD_Status_t GLCD_SendCmd | ( | GLCD_Cmd_t | Cmd,
 |  | unsigned char * | pData,
 |  | uint32_t | Size
 | ) |  |

Definition at line 347 of file drv_glcd.c.

void GLCD_SetFont | ( | pFontType_t | pFont,
 |  | LdcPixel_t | Color,
 |  | LdcPixel_t | BackgndColor
 | ) |  |

Definition at line 661 of file drv_glcd.c.

void GLCD_SetWindow | ( | uint32_t | X_Left,
 |  | uint32_t | Y_Up,
 |  | uint32_t | X_Right,
 |  | uint32_t | Y_Down
 | ) |  |

Definition at line 678 of file drv_glcd.c.

void GLCD_TextSetPos | ( | uint32_t | X,
 |  | uint32_t | Y
 | ) |  |

Definition at line 701 of file drv_glcd.c.

void GLCD_TextSetTabSize ( uint32_t Size )

Definition at line 716 of file drv_glcd.c.

Generated on Tue Jun 7 14:59:17 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/LCD/NOKIA6610_LCD/drv_glcd.h File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/LCD/NOKIA6610_LCD/drv_glcd.h File Reference

#include "drv_glcd_cnfg.h"
#include "lpc_types.h"

Go to the source code of this file.

Data Structures

struct | _GLCD_CmdCtrl_t
struct | _ASCSET_Data_t
struct | _DATCTR_Data_t
struct | _MADCTR_Data_t
struct | _COLMOD_Data_t
struct | _FontType_t
struct | _Bmp_t

Defines

#define | DEF_X_LEFT 0
#define | DEF_Y_UP 0
#define | DEF_X_RIGHT GLCD_HORIZONTAL_SIZE
#define | DEF_Y_DOWN GLCD_VERTICAL_SIZE
#define | DEF_FONT_COLOUR 0x000000
#define | DEF_BACKGND_COLOUR 0x00FF0
#define | TEXT_DEF_TAB_SIZE 4
#define | MAX_GLCD_STR_SIZE 256
#define | TEXT_BEL1_FUNC()
#define | LCD_SET_WINDOW(xl, xr, yu, yd)
#define | LCD_WRITE_PIXEL(c) GLCD_SendCmd(RAMWR,(unsigned char*)&c,2)
#define | LCD_FLUSH_PIXELS() GLCD_SendCmd(NOP,NULL,0)
#define | GLCD_MANF_ID 0x45
#define | GLCD_MOD_ID 0x03
#define | WAITED_PIXEL 0x80000000
#define | PIXEL_CONV(Pixel, Order) (!Order)?(((Pixel >> 4) & 0xFF) | ((Pixel << 12) & 0xF000)):(((Pixel << 16) & 0xFF0000) | ((Pixel) & 0xF00))
#define | PCF8833_ST_BOOSTER_ON (1UL << 7)
#define | PCF8833_ST_Y_ADDR_ODR (1UL << 6)
#define | PCF8833_ST_X_ADDR_ODR (1UL << 5)
#define | PCF8833_ST_ADDR_MODE (1UL << 4)
#define | PCF8833_ST_LINE_ADDR_ORD (1UL << 3)
#define | PCF8833_ST_RGB_ORD (1UL << 2)
#define | PCF8833_ST_PIXEL_FORM (7UL << 12)
#define | PCF8833_ST_IDLE_MODE (1UL << 11)
#define | PCF8833_ST_PARTIAL_MODE (1UL << 10)
#define | PCF8833_ST_SLEEP_MODE (1UL << 9)
#define | PCF8833_ST_NORM_MODE (1UL << 8)
#define | PCF8833_ST_V_SCROLL_MODE (1UL << 23)
#define | PCF8833_ST_INV_MODE (1UL << 21)
#define | PCF8833_ST_ALL_PIXELS_ON (1UL << 20)
#define | PCF8833_ST_ALL_PIXELS_OFF (1UL << 19)
#define | PCF8833_ST_DISPLAY_MODE (1UL << 18)
#define | PCF8833_ST_TEARING_MODE (1UL << 17)
#define | GLCD_DATA 0x100
#define | GLCD_INV_CMD ((uint32_t)(-1))
#define | GLCD_MAX_COTRAST 63
#define | GLCD_MIN_COTRAST -64

Typedefs

typedef enum _GLCD_ISS_t | GLCD_ISS_t
typedef enum _GLCD_Status_t | GLCD_Status_t
typedef enum _GLCD_Cmd_t | GLCD_Cmd_t
typedef enum _GLCD_CmdDir_t | GLCD_CmdDir_t
typedef struct _GLCD_CmdCtrl_t | GLCD_CmdCtrl_t
typedef struct _GLCD_CmdCtrl_t * | pGLCD_CmdCtrl_t
typedef struct _ASCSET_Data_t | ASCSET_Data_t
typedef struct _ASCSET_Data_t * | pASCSET_Data_t
typedef struct _DATCTR_Data_t | DATCTR_Data_t
typedef struct _DATCTR_Data_t * | pDATCTR_Data_t
typedef struct _MADCTR_Data_t | MADCTR_Data_t
typedef struct _MADCTR_Data_t * | pMADCTR_Data_t
typedef struct _COLMOD_Data_t | COLMOD_Data_t
typedef struct _COLMOD_Data_t * | pCOLMOD_Data_t
typedef uint32_t | LdcPixel_t
typedef uint32_t * | pLdcPixel_t
typedef struct _FontType_t | FontType_t
typedef struct _FontType_t * | pFontType_t
typedef struct _Bmp_t | Bmp_t
typedef struct _Bmp_t * | pBmp_t

Enumerations

enum | _GLCD_ISS_t { GLCD_ISS_0 = 0, GLCD_ISS_1 }
enum | _GLCD_Status_t { GLCD_OK = 0, GLCD_ID_ERROR, GLCD_UNSUPPORTED, GLCD_ERROR }
enum _GLCD_Cmd_t {
NOP, SLPIN, SLPOUT, PTLOUT,
INVOFF, INVON, DISPOFF, DISPON,
CASET, RASET, RAMWR, RGBSET,
VSCSAD, IDMOFF, IDMON, RDID1,
RDID2, RDID3, FRMSEL, FRM8SEL,
TMPRNG, TMPHIS, TMPREAD, EPWRIN,
EPWROUT, RDEV, RDRR, PTIN,
SCRLAR, DATCTR, SETCON, OSCON,
OSCOFF, RMWIN, RMWOUT, VOLUP,
VOLDOWN, ASCSET, DISCTR, PWRCTR,
VOLCTR, CLKINT, CLKEXT, RDDST,
SWRESET, RDDID, PTLAR, PTLON,
MADCTR, COLMOD, APOFF, APON,
BSTROFF, BSTRON, GLCD_CMD_NUMB
}
enum | _GLCD_CmdDir_t { GLCD_WRITE = 0, GLCD_READ }

Functions

void | Dly100us (void *arg)
Delay 100us.
GLCD_Status_t | GLCD_SendCmd (GLCD_Cmd_t Cmd, unsigned char *pData, uint32_t Size)
GLCD_Status_t | GLCD_PowerUpInit (unsigned char *pInitData)
void | GLCD_SetFont (pFontType_t pFont, LdcPixel_t Color, LdcPixel_t BackgndColor)
void | GLCD_SetWindow (uint32_t X_Left, uint32_t Y_Up, uint32_t X_Right, uint32_t Y_Down)
void | GLCD_TextSetPos (uint32_t X, uint32_t Y)
void | GLCD_TextSetTabSize (uint32_t Size)
int | GLCD_putchar (int c)
void | GLCD_print (const char *fmt)

Define Documentation

#define DEF_BACKGND_COLOUR 0x00FF0

Definition at line 27 of file drv_glcd.h.

#define DEF_FONT_COLOUR 0x000000

Definition at line 26 of file drv_glcd.h.

#define DEF_X_LEFT 0

Definition at line 22 of file drv_glcd.h.

#define DEF_X_RIGHT GLCD_HORIZONTAL_SIZE

Definition at line 24 of file drv_glcd.h.

#define DEF_Y_DOWN GLCD_VERTICAL_SIZE

Definition at line 25 of file drv_glcd.h.

#define DEF_Y_UP 0

Definition at line 23 of file drv_glcd.h.

#define GLCD_DATA 0x100

Definition at line 112 of file drv_glcd.h.

#define GLCD_INV_CMD ((uint32_t)(-1))

Definition at line 116 of file drv_glcd.h.

#define GLCD_MANF_ID 0x45

Definition at line 50 of file drv_glcd.h.

#define GLCD_MAX_COTRAST 63

Definition at line 118 of file drv_glcd.h.

#define GLCD_MIN_COTRAST -64

Definition at line 119 of file drv_glcd.h.

#define GLCD_MOD_ID 0x03

Definition at line 51 of file drv_glcd.h.

#define LCD_FLUSH_PIXELS ( ) GLCD_SendCmd(NOP,NULL,0)

Definition at line 48 of file drv_glcd.h.

#define LCD_SET_WINDOW | ( | xl,
 |  | xr,
 |  | yu,
 |  | yd | )

Value:

{\
uint32_t Temp;\
  Temp = xl | (xr<<8);\
  GLCD_SendCmd(CASET,(unsigned char*)&Temp,0);\
  Temp = (yu+2) | ((yd+2)<<8);\
  GLCD_SendCmd(RASET,(unsigned char*)&Temp,0);\
}

Definition at line 35 of file drv_glcd.h.

#define LCD_WRITE_PIXEL ( c ) GLCD_SendCmd(RAMWR,(unsigned char*)&c,2)

Definition at line 45 of file drv_glcd.h.

#define MAX_GLCD_STR_SIZE 256

Definition at line 30 of file drv_glcd.h.

#define PCF8833_ST_ADDR_MODE (1UL << 4)

Definition at line 60 of file drv_glcd.h.

#define PCF8833_ST_ALL_PIXELS_OFF (1UL << 19)

Definition at line 71 of file drv_glcd.h.

#define PCF8833_ST_ALL_PIXELS_ON (1UL << 20)

Definition at line 70 of file drv_glcd.h.

#define PCF8833_ST_BOOSTER_ON (1UL << 7)

Definition at line 57 of file drv_glcd.h.

#define PCF8833_ST_DISPLAY_MODE (1UL << 18)

Definition at line 72 of file drv_glcd.h.

#define PCF8833_ST_IDLE_MODE (1UL << 11)

Definition at line 64 of file drv_glcd.h.

#define PCF8833_ST_INV_MODE (1UL << 21)

Definition at line 69 of file drv_glcd.h.

#define PCF8833_ST_LINE_ADDR_ORD (1UL << 3)

Definition at line 61 of file drv_glcd.h.

#define PCF8833_ST_NORM_MODE (1UL << 8)

Definition at line 67 of file drv_glcd.h.

#define PCF8833_ST_PARTIAL_MODE (1UL << 10)

Definition at line 65 of file drv_glcd.h.

#define PCF8833_ST_PIXEL_FORM (7UL << 12)

Definition at line 63 of file drv_glcd.h.

#define PCF8833_ST_RGB_ORD (1UL << 2)

Definition at line 62 of file drv_glcd.h.

#define PCF8833_ST_SLEEP_MODE (1UL << 9)

Definition at line 66 of file drv_glcd.h.

#define PCF8833_ST_TEARING_MODE (1UL << 17)

Definition at line 73 of file drv_glcd.h.

#define PCF8833_ST_V_SCROLL_MODE (1UL << 23)

Definition at line 68 of file drv_glcd.h.

#define PCF8833_ST_X_ADDR_ODR (1UL << 5)

Definition at line 59 of file drv_glcd.h.

#define PCF8833_ST_Y_ADDR_ODR (1UL << 6)

Definition at line 58 of file drv_glcd.h.

#define PIXEL_CONV | ( | Pixel,
 |  | Order | ) | (!Order)?(((Pixel >> 4) & 0xFF) | ((Pixel << 12) & 0xF000)):(((Pixel << 16) & 0xFF0000) | ((Pixel) & 0xF00))

Definition at line 55 of file drv_glcd.h.

#define TEXT_BEL1_FUNC ( )

Definition at line 32 of file drv_glcd.h.

#define TEXT_DEF_TAB_SIZE 4

Definition at line 28 of file drv_glcd.h.

#define WAITED_PIXEL 0x80000000

Definition at line 53 of file drv_glcd.h.

Typedef Documentation

typedef struct _ASCSET_Data_t ASCSET_Data_t

typedef struct _Bmp_t Bmp_t

typedef struct _COLMOD_Data_t COLMOD_Data_t

typedef struct _DATCTR_Data_t DATCTR_Data_t

typedef struct _FontType_t FontType_t

typedef enum _GLCD_Cmd_t GLCD_Cmd_t

typedef struct _GLCD_CmdCtrl_t GLCD_CmdCtrl_t

typedef enum _GLCD_CmdDir_t GLCD_CmdDir_t

typedef enum _GLCD_ISS_t GLCD_ISS_t

typedef enum _GLCD_Status_t GLCD_Status_t

typedef uint32_t LdcPixel_t

Definition at line 203 of file drv_glcd.h.

typedef struct _MADCTR_Data_t MADCTR_Data_t

typedef struct _ASCSET_Data_t * pASCSET_Data_t

typedef struct _Bmp_t * pBmp_t

typedef struct _COLMOD_Data_t * pCOLMOD_Data_t

typedef struct _DATCTR_Data_t * pDATCTR_Data_t

typedef struct _FontType_t * pFontType_t

typedef struct _GLCD_CmdCtrl_t * pGLCD_CmdCtrl_t

typedef uint32_t * pLdcPixel_t

Definition at line 203 of file drv_glcd.h.

typedef struct _MADCTR_Data_t * pMADCTR_Data_t

Enumeration Type Documentation

enum _GLCD_Cmd_t

Enumerator:
NOP
SLPIN
SLPOUT
PTLOUT
INVOFF
INVON
DISPOFF
DISPON
CASET
RASET
RAMWR
RGBSET
VSCSAD
IDMOFF
IDMON
RDID1
RDID2
RDID3
FRMSEL
FRM8SEL
TMPRNG
TMPHIS
TMPREAD
EPWRIN
EPWROUT
RDEV
RDRR
PTIN
SCRLAR
DATCTR
SETCON
OSCON
OSCOFF
RMWIN
RMWOUT
VOLUP
VOLDOWN
ASCSET
DISCTR
PWRCTR
VOLCTR
CLKINT
CLKEXT
RDDST
SWRESET
RDDID
PTLAR
PTLON
MADCTR
COLMOD
APOFF
APON
BSTROFF
BSTRON
GLCD_CMD_NUMB

Definition at line 86 of file drv_glcd.h.

enum _GLCD_CmdDir_t

Enumerator:
GLCD_WRITE
GLCD_READ

Definition at line 107 of file drv_glcd.h.

enum _GLCD_ISS_t

Enumerator:
GLCD_ISS_0
GLCD_ISS_1

Definition at line 76 of file drv_glcd.h.

enum _GLCD_Status_t

Enumerator:
GLCD_OK
GLCD_ID_ERROR
GLCD_UNSUPPORTED
GLCD_ERROR

Definition at line 81 of file drv_glcd.h.

Function Documentation

void Dly100us ( void * arg )

Delay 100us.

Parameters:
[in] void *arg
Returns:
None

Definition at line 92 of file lcdtest.c.

GLCD_Status_t GLCD_PowerUpInit ( unsigned char * pInitData )

Definition at line 527 of file drv_glcd.c.

void GLCD_print ( const char * fmt )

Definition at line 919 of file drv_glcd.c.

int GLCD_putchar ( int c )

Definition at line 777 of file drv_glcd.c.

GLCD_Status_t GLCD_SendCmd | ( | GLCD_Cmd_t | Cmd,
 |  | unsigned char * | pData,
 |  | uint32_t | Size
 | ) |  |

Definition at line 347 of file drv_glcd.c.

void GLCD_SetFont | ( | pFontType_t | pFont,
 |  | LdcPixel_t | Color,
 |  | LdcPixel_t | BackgndColor
 | ) |  |

Definition at line 661 of file drv_glcd.c.

void GLCD_SetWindow | ( | uint32_t | X_Left,
 |  | uint32_t | Y_Up,
 |  | uint32_t | X_Right,
 |  | uint32_t | Y_Down
 | ) |  |

Definition at line 678 of file drv_glcd.c.

void GLCD_TextSetPos | ( | uint32_t | X,
 |  | uint32_t | Y
 | ) |  |

Definition at line 701 of file drv_glcd.c.

void GLCD_TextSetTabSize ( uint32_t Size )

Definition at line 716 of file drv_glcd.c.

Generated on Tue Jun 7 14:59:17 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/LCD/NOKIA6610_LCD/drv_glcd_cnfg.h File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/LCD/NOKIA6610_LCD/drv_glcd_cnfg.h File Reference

Go to the source code of this file.

Defines

#define | GLCD_DEF_CLOCK (1000000UL)
#define | GLCD_DEF_WIDTH 9
#define | GLCD_HORIZONTAL_SIZE 132
#define | GLCD_VERTICAL_SIZE 132
#define | GLCD_DISPLAY_STATE 1
#define | GLCD_DEF_DPL_INV 1
#define | GLCD_DEF_DPL_8_COLOR 0
#define | GLCD_DEF_DPL_PARTIAL_MODE 0
#define | GLCD_DEF_DPL_MY 0
#define | GLCD_DEF_DPL_MX 1
#define | GLCD_DEF_DPL_V 0
#define | GLCD_DEF_DPL_ML 0
#define | GLCD_DEF_DPL_RGB_ORD 0

Define Documentation

#define GLCD_DEF_CLOCK (1000000UL)

Definition at line 22 of file drv_glcd_cnfg.h.

#define GLCD_DEF_DPL_8_COLOR 0

Definition at line 34 of file drv_glcd_cnfg.h.

#define GLCD_DEF_DPL_INV 1

Definition at line 32 of file drv_glcd_cnfg.h.

#define GLCD_DEF_DPL_ML 0

Definition at line 44 of file drv_glcd_cnfg.h.

#define GLCD_DEF_DPL_MX 1

Definition at line 40 of file drv_glcd_cnfg.h.

#define GLCD_DEF_DPL_MY 0

Definition at line 38 of file drv_glcd_cnfg.h.

#define GLCD_DEF_DPL_PARTIAL_MODE 0

Definition at line 36 of file drv_glcd_cnfg.h.

#define GLCD_DEF_DPL_RGB_ORD 0

Definition at line 46 of file drv_glcd_cnfg.h.

#define GLCD_DEF_DPL_V 0

Definition at line 42 of file drv_glcd_cnfg.h.

#define GLCD_DEF_WIDTH 9

Definition at line 24 of file drv_glcd_cnfg.h.

#define GLCD_DISPLAY_STATE 1

Definition at line 30 of file drv_glcd_cnfg.h.

#define GLCD_HORIZONTAL_SIZE 132

Definition at line 26 of file drv_glcd_cnfg.h.

#define GLCD_VERTICAL_SIZE 132

Definition at line 28 of file drv_glcd_cnfg.h.

Generated on Tue Jun 7 14:59:17 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/LCD/NOKIA6610_LCD/glcd_ll.c File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/LCD/NOKIA6610_LCD/glcd_ll.c File Reference

#include "glcd_ll.h"
#include "lpc_types.h"
#include "LPC17xx.h"
#include "lpc17xx_clkpwr.h"

Go to the source code of this file.

Functions

void | GLCD_SetReset (Bool State)
void | GLCD_Backlight (uint8_t Light)
void | GLCD_LLInit (void)
void | GLCD_SPI_ChipSelect (Bool Select)
Bool | GLCD_SPI_SetWordWidth (uint32_t Width)
uint32_t | GLCD_SPI_SetClockFreq (uint32_t Frequency)
void | GLCD_SPI_Init (uint32_t Clk, uint32_t Width)
uint32_t | GLCD_SPI_TranserByte (uint32_t Data)
void | GLCD_SPI_SendBlock (unsigned char *pData, uint32_t Size)
void | GLCD_SPI_ReceiveBlock (unsigned char *pData, uint32_t Size)

Function Documentation

void GLCD_Backlight ( uint8_t Light )

Definition at line 49 of file glcd_ll.c.

void GLCD_LLInit ( void )

Definition at line 63 of file glcd_ll.c.

void GLCD_SetReset ( Bool State )

Definition at line 29 of file glcd_ll.c.

void GLCD_SPI_ChipSelect ( Bool Select )

Definition at line 102 of file glcd_ll.c.

void GLCD_SPI_Init | ( | uint32_t | Clk,
 |  | uint32_t | Width
 | ) |  |

Definition at line 165 of file glcd_ll.c.

void GLCD_SPI_ReceiveBlock | ( | unsigned char * | pData,
 |  | uint32_t | Size
 | ) |  |

Definition at line 254 of file glcd_ll.c.

void GLCD_SPI_SendBlock | ( | unsigned char * | pData,
 |  | uint32_t | Size
 | ) |  |

Definition at line 225 of file glcd_ll.c.

uint32_t GLCD_SPI_SetClockFreq ( uint32_t Frequency )

Definition at line 142 of file glcd_ll.c.

Bool GLCD_SPI_SetWordWidth ( uint32_t Width )

Definition at line 122 of file glcd_ll.c.

uint32_t GLCD_SPI_TranserByte ( uint32_t Data )

Definition at line 208 of file glcd_ll.c.

Generated on Tue Jun 7 14:59:17 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/LCD/NOKIA6610_LCD/glcd_ll.h File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/LCD/NOKIA6610_LCD/glcd_ll.h File Reference

#include "lpc_types.h"

Go to the source code of this file.

Defines

#define | BACKLIGHT_OFF 0x40
#define | BACKLIGHT_ON 0x20
#define | SSP_FIFO_SIZE 8

Functions

void | GLCD_SetReset (Bool State)
void | GLCD_Backlight (uint8_t Light)
void | GLCD_LLInit (void)
void | GLCD_SPI_ChipSelect (Bool Select)
Bool | GLCD_SPI_SetWordWidth (uint32_t Width)
uint32_t | GLCD_SPI_SetClockFreq (uint32_t Frequency)
void | GLCD_SPI_Init (uint32_t Clk, uint32_t Width)
uint32_t | GLCD_SPI_TranserByte (uint32_t Data)
void | GLCD_SPI_SendBlock (unsigned char *pData, uint32_t Size)
void | GLCD_SPI_ReceiveBlock (unsigned char *pData, uint32_t Size)

Define Documentation

#define BACKLIGHT_OFF 0x40

Definition at line 22 of file glcd_ll.h.

#define BACKLIGHT_ON 0x20

Definition at line 23 of file glcd_ll.h.

#define SSP_FIFO_SIZE 8

Definition at line 24 of file glcd_ll.h.

Function Documentation

void GLCD_Backlight ( uint8_t Light )

Definition at line 49 of file glcd_ll.c.

void GLCD_LLInit ( void )

Definition at line 63 of file glcd_ll.c.

void GLCD_SetReset ( Bool State )

Definition at line 29 of file glcd_ll.c.

void GLCD_SPI_ChipSelect ( Bool Select )

Definition at line 102 of file glcd_ll.c.

void GLCD_SPI_Init | ( | uint32_t | Clk,
 |  | uint32_t | Width
 | ) |  |

Definition at line 165 of file glcd_ll.c.

void GLCD_SPI_ReceiveBlock | ( | unsigned char * | pData,
 |  | uint32_t | Size
 | ) |  |

Definition at line 254 of file glcd_ll.c.

void GLCD_SPI_SendBlock | ( | unsigned char * | pData,
 |  | uint32_t | Size
 | ) |  |

Definition at line 225 of file glcd_ll.c.

uint32_t GLCD_SPI_SetClockFreq ( uint32_t Frequency )

Definition at line 142 of file glcd_ll.c.

Bool GLCD_SPI_SetWordWidth ( uint32_t Width )

Definition at line 122 of file glcd_ll.c.

uint32_t GLCD_SPI_TranserByte ( uint32_t Data )

Definition at line 208 of file glcd_ll.c.

Generated on Tue Jun 7 14:59:17 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/LCD/NOKIA6610_LCD/lcdtest.c File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/LCD/NOKIA6610_LCD/lcdtest.c File Reference

#include "drv_glcd.h"
#include "glcd_ll.h"
#include "lpc17xx_nvic.h"
#include "core_cm3.h"
#include "lpc17xx_clkpwr.h"
#include "lpc17xx_libcfg.h"
#include "NXP_logo.h"
#include "lpc17xx_timer.h"
#include "lpc17xx_adc.h"
#include "lpc17xx_pinsel.h"
#include "lpc17xx_gpio.h"

Go to the source code of this file.

Defines

#define | TIMER0_TICK_PER_SEC 20

Functions

void | TIMER0_IRQHandler (void)
TIMER0 IRQ Handler.
void | Dly100us (void *arg)
Delay 100us.
int | c_entry (void)
c_entry: Main LCD program body
int | main (void)
void | check_failed (uint8_t *file, uint32_t line)

Variables

FontType_t Terminal_6_8_6
FontType_t Terminal_9_12_6
FontType_t Terminal_18_24_12
volatile Bool | CntrSel = FALSE
uint32_t | CriticalSecCntr

Generated on Tue Jun 7 14:59:17 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/LCD/NOKIA6610_LCD/lpc17xx_libcfg.h File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/LCD/NOKIA6610_LCD/lpc17xx_libcfg.h File Reference

#include "lpc_types.h"

Go to the source code of this file.

Defines

#define | DEBUG
#define | _GPIO
#define | _TIM
#define | _ADC
#define | CHECK_PARAM(expr) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))

Functions

void | check_failed (uint8_t *file, uint32_t line)

Define Documentation

#define _ADC

Definition at line 86 of file lpc17xx_libcfg.h.

#define _GPIO

Definition at line 42 of file lpc17xx_libcfg.h.

#define _TIM

Definition at line 72 of file lpc17xx_libcfg.h.

#define CHECK_PARAM ( expr ) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))

Definition at line 134 of file lpc17xx_libcfg.h.

#define DEBUG

Definition at line 35 of file lpc17xx_libcfg.h.

Generated on Tue Jun 7 14:59:10 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/LCD/NOKIA6610_LCD/NXP_logo.c File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/LCD/NOKIA6610_LCD/NXP_logo.c File Reference

#include "NXP_logo.h"

Go to the source code of this file.

Variables

const unsigned char NXP_LogoStream []
Bmp_t NXP_Logo

Variable Documentation

Bmp_t NXP_Logo

Initial value:

{
  132,
  132,
  12,
  2,
  NULL,
  (unsigned int *)&NXP_LogoStream
}

Definition at line 2189 of file NXP_logo.c.

const unsigned char NXP_LogoStream[]

Definition at line 7 of file NXP_logo.c.

Generated on Tue Jun 7 14:59:17 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/LCD/NOKIA6610_LCD/NXP_logo.h File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/LCD/NOKIA6610_LCD/NXP_logo.h File Reference

#include "drv_glcd.h"

Go to the source code of this file.

Variables

Bmp_t NXP_Logo

Variable Documentation

Bmp_t NXP_Logo

Definition at line 2189 of file NXP_logo.c.

Generated on Tue Jun 7 14:59:17 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/LCD/NOKIA6610_LCD/Terminal_9_12x6.c File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/LCD/NOKIA6610_LCD/Terminal_9_12x6.c File Reference

#include "drv_glcd.h"

Go to the source code of this file.

Variables

FontType_t Terminal_9_12_6

Generated on Tue Jun 7 14:59:17 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/LCD/QVGA_TFT_LCD/Font_24x16.h File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/LCD/QVGA_TFT_LCD/Font_24x16.h File Reference

Go to the source code of this file.

Defines

#define | CHAR_H 24
#define | CHAR_W 16

Variables

const uint16_t | Font_24x16 []

Define Documentation

#define CHAR_H 24

Definition at line 18 of file Font_24x16.h.

#define CHAR_W 16

Definition at line 19 of file Font_24x16.h.

Variable Documentation

const uint16_t Font_24x16[]

Definition at line 21 of file Font_24x16.h.

Generated on Tue Jun 7 14:59:17 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/LCD/QVGA_TFT_LCD/GLCD.h File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/LCD/QVGA_TFT_LCD/GLCD.h File Reference

Go to the source code of this file.

Defines

#define | Black 0x0000
#define | Navy 0x000F
#define | DarkGreen 0x03E0
#define | DarkCyan 0x03EF
#define | Maroon 0x7800
#define | Purple 0x780F
#define | Olive 0x7BE0
#define | LightGrey 0xC618
#define | DarkGrey 0x7BEF
#define | Blue 0x001F
#define | Green 0x07E0
#define | Cyan 0x07FF
#define | Red 0xF800
#define | Magenta 0xF81F
#define | Yellow 0xFFE0
#define | White 0xFFFF

Functions

void | GLCD_Init (void)
void | GLCD_WindowMax (void)
void | GLCD_PutPixel (unsigned int x, unsigned int y)
void | GLCD_SetTextColor (unsigned short color)
void | GLCD_SetBackColor (unsigned short color)
void | GLCD_Clear (unsigned short color)
void | GLCD_DrawChar (unsigned int x, unsigned int y, unsigned short *c)
void | GLCD_DisplayChar (unsigned int ln, unsigned int col, unsigned char c)
void | GLCD_DisplayString (unsigned int ln, unsigned int col, unsigned char *s)
void | GLCD_ClearLn (unsigned int ln)
void | GLCD_Bargraph (unsigned int x, unsigned int y, unsigned int w, unsigned int h, unsigned int val)
void | GLCD_Bitmap (unsigned int x, unsigned int y, unsigned int w, unsigned int h, unsigned char *bitmap)
void | GLCD_Bmp (unsigned int x, unsigned int y, unsigned int w, unsigned int h, unsigned char *bmp)

Define Documentation

#define Black 0x0000

Definition at line 25 of file GLCD.h.

#define Blue 0x001F

Definition at line 34 of file GLCD.h.

#define Cyan 0x07FF

Definition at line 36 of file GLCD.h.

#define DarkCyan 0x03EF

Definition at line 28 of file GLCD.h.

#define DarkGreen 0x03E0

Definition at line 27 of file GLCD.h.

#define DarkGrey 0x7BEF

Definition at line 33 of file GLCD.h.

#define Green 0x07E0

Definition at line 35 of file GLCD.h.

#define LightGrey 0xC618

Definition at line 32 of file GLCD.h.

#define Magenta 0xF81F

Definition at line 38 of file GLCD.h.

#define Maroon 0x7800

Definition at line 29 of file GLCD.h.

#define Navy 0x000F

Definition at line 26 of file GLCD.h.

#define Olive 0x7BE0

Definition at line 31 of file GLCD.h.

#define Purple 0x780F

Definition at line 30 of file GLCD.h.

#define Red 0xF800

Definition at line 37 of file GLCD.h.

#define White 0xFFFF

Definition at line 40 of file GLCD.h.

#define Yellow 0xFFE0

Definition at line 39 of file GLCD.h.

Function Documentation

void GLCD_Bargraph | ( | unsigned int | x,
 |  | unsigned int | y,
 |  | unsigned int | w,
 |  | unsigned int | h,
 |  | unsigned int | val
 | ) |  |

Definition at line 508 of file GLCD_SPI_LPC1700.c.

void GLCD_Bitmap | ( | unsigned int | x,
 |  | unsigned int | y,
 |  | unsigned int | w,
 |  | unsigned int | h,
 |  | unsigned char * | bitmap
 | ) |  |

Definition at line 547 of file GLCD_SPI_LPC1700.c.

void GLCD_Bmp | ( | unsigned int | x,
 |  | unsigned int | y,
 |  | unsigned int | w,
 |  | unsigned int | h,
 |  | unsigned char * | bmp
 | ) |  |

Definition at line 584 of file GLCD_SPI_LPC1700.c.

void GLCD_Clear ( unsigned short color )

Definition at line 405 of file GLCD_SPI_LPC1700.c.

void GLCD_ClearLn ( unsigned int ln )

Definition at line 493 of file GLCD_SPI_LPC1700.c.

void GLCD_DisplayChar | ( | unsigned int | ln,
 |  | unsigned int | col,
 |  | unsigned char | c
 | ) |  |

Definition at line 463 of file GLCD_SPI_LPC1700.c.

void GLCD_DisplayString | ( | unsigned int | ln,
 |  | unsigned int | col,
 |  | unsigned char * | s
 | ) |  |

Definition at line 478 of file GLCD_SPI_LPC1700.c.

void GLCD_DrawChar | ( | unsigned int | x,
 |  | unsigned int | y,
 |  | unsigned short * | c
 | ) |  |

Definition at line 428 of file GLCD_SPI_LPC1700.c.

void GLCD_Init ( void )

Definition at line 218 of file GLCD_SPI_LPC1700.c.

void GLCD_PutPixel | ( | unsigned int | x,
 |  | unsigned int | y
 | ) |  |

Definition at line 366 of file GLCD_SPI_LPC1700.c.

void GLCD_SetBackColor ( unsigned short color )

Definition at line 393 of file GLCD_SPI_LPC1700.c.

void GLCD_SetTextColor ( unsigned short color )

Definition at line 381 of file GLCD_SPI_LPC1700.c.

void GLCD_WindowMax ( void )

Definition at line 350 of file GLCD_SPI_LPC1700.c.

Generated on Tue Jun 7 14:59:17 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/LCD/QVGA_TFT_LCD/GLCD_SPI_LPC1700.c File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/LCD/QVGA_TFT_LCD/GLCD_SPI_LPC1700.c File Reference

#include <lpc17xx.h>
#include "GLCD.h"
#include "Font_24x16.h"

Go to the source code of this file.

Defines

#define | PIN_CS (1 << 6)
#define | TFE 0x01
#define | RNE 0x04
#define | BSY 0x10
#define | DELAY_2N 18
#define | WIDTH 320
#define | HEIGHT 240
#define | BPP 16
#define | BYPP ((BPP+7)/8)
#define | LCD_CS(x) ((x) ? (LPC_GPIO0->FIOSET = PIN_CS) : (LPC_GPIO0->FIOCLR = PIN_CS));
#define | SPI_START (0x70)
#define | SPI_RD (0x01)
#define | SPI_WR (0x00)
#define | SPI_DATA (0x02)
#define | SPI_INDEX (0x00)

Functions

void | GLCD_Init (void)
void | GLCD_WindowMax (void)
void | GLCD_PutPixel (unsigned int x, unsigned int y)
void | GLCD_SetTextColor (unsigned short color)
void | GLCD_SetBackColor (unsigned short color)
void | GLCD_Clear (unsigned short color)
void | GLCD_DrawChar (unsigned int x, unsigned int y, unsigned short *c)
void | GLCD_DisplayChar (unsigned int ln, unsigned int col, unsigned char c)
void | GLCD_DisplayString (unsigned int ln, unsigned int col, unsigned char *s)
void | GLCD_ClearLn (unsigned int ln)
void | GLCD_Bargraph (unsigned int x, unsigned int y, unsigned int w, unsigned int h, unsigned int val)
void | GLCD_Bitmap (unsigned int x, unsigned int y, unsigned int w, unsigned int h, unsigned char *bitmap)
void | GLCD_Bmp (unsigned int x, unsigned int y, unsigned int w, unsigned int h, unsigned char *bmp)

Define Documentation

#define BPP 16

Definition at line 46 of file GLCD_SPI_LPC1700.c.

#define BSY 0x10

Definition at line 34 of file GLCD_SPI_LPC1700.c.

#define BYPP ((BPP+7)/8)

Definition at line 47 of file GLCD_SPI_LPC1700.c.

#define DELAY_2N 18

Definition at line 40 of file GLCD_SPI_LPC1700.c.

#define HEIGHT 240

Definition at line 45 of file GLCD_SPI_LPC1700.c.

#define LCD_CS ( x ) ((x) ? (LPC_GPIO0->FIOSET = PIN_CS) : (LPC_GPIO0->FIOCLR = PIN_CS));

Definition at line 52 of file GLCD_SPI_LPC1700.c.

#define PIN_CS (1 << 6)

Definition at line 29 of file GLCD_SPI_LPC1700.c.

#define RNE 0x04

Definition at line 33 of file GLCD_SPI_LPC1700.c.

#define SPI_DATA (0x02)

Definition at line 57 of file GLCD_SPI_LPC1700.c.

#define SPI_INDEX (0x00)

Definition at line 58 of file GLCD_SPI_LPC1700.c.

#define SPI_RD (0x01)

Definition at line 55 of file GLCD_SPI_LPC1700.c.

#define SPI_START (0x70)

Definition at line 54 of file GLCD_SPI_LPC1700.c.

#define SPI_WR (0x00)

Definition at line 56 of file GLCD_SPI_LPC1700.c.

#define TFE 0x01

Definition at line 32 of file GLCD_SPI_LPC1700.c.

#define WIDTH 320

Definition at line 44 of file GLCD_SPI_LPC1700.c.

Function Documentation

void GLCD_Bargraph | ( | unsigned int | x,
 |  | unsigned int | y,
 |  | unsigned int | w,
 |  | unsigned int | h,
 |  | unsigned int | val
 | ) |  |

Definition at line 508 of file GLCD_SPI_LPC1700.c.

void GLCD_Bitmap | ( | unsigned int | x,
 |  | unsigned int | y,
 |  | unsigned int | w,
 |  | unsigned int | h,
 |  | unsigned char * | bitmap
 | ) |  |

Definition at line 547 of file GLCD_SPI_LPC1700.c.

void GLCD_Bmp | ( | unsigned int | x,
 |  | unsigned int | y,
 |  | unsigned int | w,
 |  | unsigned int | h,
 |  | unsigned char * | bmp
 | ) |  |

Definition at line 584 of file GLCD_SPI_LPC1700.c.

void GLCD_Clear ( unsigned short color )

Definition at line 405 of file GLCD_SPI_LPC1700.c.

void GLCD_ClearLn ( unsigned int ln )

Definition at line 493 of file GLCD_SPI_LPC1700.c.

void GLCD_DisplayChar | ( | unsigned int | ln,
 |  | unsigned int | col,
 |  | unsigned char | c
 | ) |  |

Definition at line 463 of file GLCD_SPI_LPC1700.c.

void GLCD_DisplayString | ( | unsigned int | ln,
 |  | unsigned int | col,
 |  | unsigned char * | s
 | ) |  |

Definition at line 478 of file GLCD_SPI_LPC1700.c.

void GLCD_DrawChar | ( | unsigned int | x,
 |  | unsigned int | y,
 |  | unsigned short * | c
 | ) |  |

Definition at line 428 of file GLCD_SPI_LPC1700.c.

void GLCD_Init ( void )

Definition at line 218 of file GLCD_SPI_LPC1700.c.

void GLCD_PutPixel | ( | unsigned int | x,
 |  | unsigned int | y
 | ) |  |

Definition at line 366 of file GLCD_SPI_LPC1700.c.

void GLCD_SetBackColor ( unsigned short color )

Definition at line 393 of file GLCD_SPI_LPC1700.c.

void GLCD_SetTextColor ( unsigned short color )

Definition at line 381 of file GLCD_SPI_LPC1700.c.

void GLCD_WindowMax ( void )

Definition at line 350 of file GLCD_SPI_LPC1700.c.

Generated on Tue Jun 7 14:59:17 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/LCD/QVGA_TFT_LCD/lcdtest.c File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/LCD/QVGA_TFT_LCD/lcdtest.c File Reference

#include "lpc17xx_gpio.h"
#include "lpc17xx_libcfg.h"
#include "lpc17xx_pinsel.h"
#include "GLCD.h"

Go to the source code of this file.

Defines

#define | TIME_OUT 10000

Functions

void | print_menu (void)
print menu
int | c_entry (void)
Print Welcome menu.
int | main (void)
void | check_failed (uint8_t *file, uint32_t line)

Variables

uint8_t | lcd_text [2][16+1]

Generated on Tue Jun 7 14:59:17 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/LCD/QVGA_TFT_LCD/lpc17xx_libcfg.h File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/LCD/QVGA_TFT_LCD/lpc17xx_libcfg.h File Reference

#include "lpc_types.h"

Go to the source code of this file.

Defines

#define | DEBUG
#define | _GPIO
#define | CHECK_PARAM(expr) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))

Functions

void | check_failed (uint8_t *file, uint32_t line)

Define Documentation

#define _GPIO

Definition at line 47 of file lpc17xx_libcfg.h.

#define CHECK_PARAM ( expr ) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))

Definition at line 134 of file lpc17xx_libcfg.h.

#define DEBUG

Definition at line 36 of file lpc17xx_libcfg.h.

Generated on Tue Jun 7 14:59:10 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/MCPWM/MCPWMSimple/lpc17xx_libcfg.h File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/MCPWM/MCPWMSimple/lpc17xx_libcfg.h File Reference

#include "lpc_types.h"

Go to the source code of this file.

Defines

#define | DEBUG
#define | _DBGFWK
#define | _UART
#define | _UART0
#define | _MCPWM
#define | _UART
#define | _UART0
#define | _TIM
#define | _QEI
#define | _MCPWM
#define | CHECK_PARAM(expr) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))

Functions

void | check_failed (uint8_t *file, uint32_t line)

Define Documentation

#define _DBGFWK

Definition at line 45 of file lpc17xx_libcfg.h.

#define _MCPWM

Definition at line 183 of file lpc17xx_libcfg.h.

#define _MCPWM

Definition at line 183 of file lpc17xx_libcfg.h.

#define _QEI

Definition at line 180 of file lpc17xx_libcfg.h.

#define _TIM

Definition at line 148 of file lpc17xx_libcfg.h.

#define _UART

Definition at line 129 of file lpc17xx_libcfg.h.

#define _UART

Definition at line 129 of file lpc17xx_libcfg.h.

#define _UART0

Definition at line 130 of file lpc17xx_libcfg.h.

#define _UART0

Definition at line 130 of file lpc17xx_libcfg.h.

#define CHECK_PARAM ( expr ) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))

Definition at line 198 of file lpc17xx_libcfg.h.

#define DEBUG

Definition at line 37 of file lpc17xx_libcfg.h.

Generated on Tue Jun 7 14:59:10 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/MCPWM/MCPWMSimple/mcpwm_simple.c File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/MCPWM/MCPWMSimple/mcpwm_simple.c File Reference

This example used to test MCPWM driver. More...

#include "lpc17xx_mcpwm.h"
#include "lpc17xx_pinsel.h"
#include "lpc17xx_libcfg.h"
#include "lpc17xx_clkpwr.h"
#include "debug_frmwrk.h"

Go to the source code of this file.

Defines

#define | DC_MODE_TEST 1
#define | AC_MODE_TEST 0
#define | CAPTURE_MODE_TEST 0

Functions

void | MCPWM_IRQHandler (void)
MCPWM interrupt handler sub-routine.
int | c_entry (void)
c_entry: Main MCPWM program body
int | main (void)
void | check_failed (uint8_t *file, uint32_t line)

Detailed Description

This example used to test MCPWM driver.

Version:
2.0
Date:
21. May. 2010
Author:
NXP MCU SW Application Team
Copyright(C) 2010, NXP Semiconductor All rights reserved.

Software that is described herein is for illustrative purposes only which provides customers with programming information regarding the products. This software is supplied "AS IS" without any warranties. NXP Semiconductors assumes no responsibility or liability for the use of the software, conveys no license or title under any patent, copyright, or mask work right to the product. NXP Semiconductors reserves the right to make changes in the software without notification. NXP Semiconductors also make no representation or warranty that such application will be suitable for the specified use without further testing or modification.

Definition in file mcpwm_simple.c.

Generated on Tue Jun 7 14:59:17 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/NVIC/Priority/lpc17xx_libcfg.h File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/NVIC/Priority/lpc17xx_libcfg.h File Reference

#include "lpc_types.h"

Go to the source code of this file.

Defines

#define | DEBUG
#define | _GPIO
#define | _EXTI
#define | CHECK_PARAM(expr) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))

Functions

void | check_failed (uint8_t *file, uint32_t line)

Define Documentation

#define _EXTI

Definition at line 50 of file lpc17xx_libcfg.h.

#define _GPIO

Definition at line 47 of file lpc17xx_libcfg.h.

#define CHECK_PARAM ( expr ) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))

Definition at line 135 of file lpc17xx_libcfg.h.

#define DEBUG

Definition at line 36 of file lpc17xx_libcfg.h.

Generated on Tue Jun 7 14:59:10 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/NVIC/Priority/nvic_priority.c File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/NVIC/Priority/nvic_priority.c File Reference

This example used to test NVIC Grouping Priority function. More...

#include "lpc17xx_libcfg.h"
#include "lpc17xx_gpio.h"
#include "lpc17xx_nvic.h"
#include "lpc17xx_systick.h"
#include "lpc17xx_exti.h"
#include "lpc17xx_pinsel.h"

Go to the source code of this file.

Defines

#define | INT_MODE 1

Functions

void | EINT0_IRQHandler (void)
External interrupt 0 handler This interrupt occurs when pressing button INT0.
void | EINT3_IRQHandler (void)
External interrupt 3 handler This interrupt occurs when turn ADC potentiometer.
void | print_menu (void)
print menu
void | delay (void)
delay function
int | c_entry (void)
c_entry: Main program body
int | main (void)
void | check_failed (uint8_t *file, uint32_t line)

Detailed Description

This example used to test NVIC Grouping Priority function.

Version:
1.0
Date:
18. June. 2010
Author:
NXP MCU SW Application Team
Copyright(C) 2010, NXP Semiconductor All rights reserved.

Software that is described herein is for illustrative purposes only which provides customers with programming information regarding the products. This software is supplied "AS IS" without any warranties. NXP Semiconductors assumes no responsibility or liability for the use of the software, conveys no license or title under any patent, copyright, or mask work right to the product. NXP Semiconductors reserves the right to make changes in the software without notification. NXP Semiconductors also make no representation or warranty that such application will be suitable for the specified use without further testing or modification.

Definition in file nvic_priority.c.

Generated on Tue Jun 7 14:59:17 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/NVIC/VecTable_Relocation/lpc17xx_libcfg.h File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/NVIC/VecTable_Relocation/lpc17xx_libcfg.h File Reference

#include "lpc_types.h"

Go to the source code of this file.

Defines

#define | DEBUG
#define | _DBGFWK
#define | _GPIO
#define | _UART
#define | _UART0
#define | _SYSTICK
#define | CHECK_PARAM(expr) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))

Functions

void | check_failed (uint8_t *file, uint32_t line)

Define Documentation

#define _DBGFWK

Definition at line 43 of file lpc17xx_libcfg.h.

#define _GPIO

Definition at line 46 of file lpc17xx_libcfg.h.

#define _SYSTICK

Definition at line 67 of file lpc17xx_libcfg.h.

#define _UART

Definition at line 52 of file lpc17xx_libcfg.h.

#define _UART0

Definition at line 53 of file lpc17xx_libcfg.h.

#define CHECK_PARAM ( expr ) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))

Definition at line 134 of file lpc17xx_libcfg.h.

#define DEBUG

Definition at line 35 of file lpc17xx_libcfg.h.

Generated on Tue Jun 7 14:59:10 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/NVIC/VecTable_Relocation/vt_relocation.c File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/NVIC/VecTable_Relocation/vt_relocation.c File Reference

This example used to test NVIC Vector Table relocation function. More...

#include <stdio.h>
#include "lpc17xx_libcfg.h"
#include "debug_frmwrk.h"
#include "lpc17xx_gpio.h"
#include "lpc17xx_nvic.h"
#include "lpc17xx_systick.h"

Go to the source code of this file.

Defines

#define | VTOR_OFFSET 0x20080000

Functions

void | SysTick_Handler (void)
SysTick interrupt handler.
void | print_menu (void)
Print Welcome menu.
int | c_entry (void)
c_entry: Main program body
int | main (void)
void | check_failed (uint8_t *file, uint32_t line)

Variables

uint8_t | menu []
FunctionalState | Cur_State = DISABLE

Detailed Description

This example used to test NVIC Vector Table relocation function.

Version:
1.0
Date:
18. June. 2010
Author:
NXP MCU SW Application Team
Copyright(C) 2010, NXP Semiconductor All rights reserved.

Software that is described herein is for illustrative purposes only which provides customers with programming information regarding the products. This software is supplied "AS IS" without any warranties. NXP Semiconductors assumes no responsibility or liability for the use of the software, conveys no license or title under any patent, copyright, or mask work right to the product. NXP Semiconductors reserves the right to make changes in the software without notification. NXP Semiconductors also make no representation or warranty that such application will be suitable for the specified use without further testing or modification.

Definition in file vt_relocation.c.

Generated on Tue Jun 7 14:59:17 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/Project_Template/Eclipse_GNU/lpc17xx_libcfg.h File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/Project_Template/Eclipse_GNU/lpc17xx_libcfg.h File Reference

#include "lpc_types.h"

Go to the source code of this file.

Defines

#define | DEBUG
#define | _DBGFWK
#define | _UART
#define | _UART0
#define | CHECK_PARAM(expr) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))

Functions

void | check_failed (uint8_t *file, uint32_t line)

Define Documentation

#define _DBGFWK

Definition at line 43 of file lpc17xx_libcfg.h.

#define _UART

Definition at line 52 of file lpc17xx_libcfg.h.

#define _UART0

Definition at line 53 of file lpc17xx_libcfg.h.

#define CHECK_PARAM ( expr ) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))

Definition at line 135 of file lpc17xx_libcfg.h.

#define DEBUG

Definition at line 36 of file lpc17xx_libcfg.h.

Generated on Tue Jun 7 14:59:10 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/Project_Template/Eclipse_GNU/template.c File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/Project_Template/Eclipse_GNU/template.c File Reference

A simple template for GNU example. More...

#include "lpc17xx_libcfg.h"

Go to the source code of this file.

Functions

int | c_entry (void)
Main program body.
int | main (void)
void | check_failed (uint8_t *file, uint32_t line)

Detailed Description

A simple template for GNU example.

Version:
x.x
Date:
dd. mm. yy
Author:
xxxx
Copyright(C) 2010, NXP Semiconductor All rights reserved.

Software that is described herein is for illustrative purposes only which provides customers with programming information regarding the products. This software is supplied "AS IS" without any warranties. NXP Semiconductors assumes no responsibility or liability for the use of the software, conveys no license or title under any patent, copyright, or mask work right to the product. NXP Semiconductors reserves the right to make changes in the software without notification. NXP Semiconductors also make no representation or warranty that such application will be suitable for the specified use without further testing or modification.

Definition in file template.c.

Function Documentation

int c_entry ( void )

Main program body.

Definition at line 41 of file template.c.

int main ( void )

Definition at line 49 of file template.c.

Generated on Tue Jun 7 14:59:17 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/PWM/Dual_Edge/lpc17xx_libcfg.h File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/PWM/Dual_Edge/lpc17xx_libcfg.h File Reference

#include "lpc_types.h"

Go to the source code of this file.

Defines

#define | DEBUG
#define | _PWM
#define | _PWM1
#define | CHECK_PARAM(expr) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))

Functions

void | check_failed (uint8_t *file, uint32_t line)

Define Documentation

#define _PWM

Definition at line 95 of file lpc17xx_libcfg.h.

#define _PWM1

Definition at line 96 of file lpc17xx_libcfg.h.

#define CHECK_PARAM ( expr ) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))

Definition at line 136 of file lpc17xx_libcfg.h.

#define DEBUG

Definition at line 36 of file lpc17xx_libcfg.h.

Generated on Tue Jun 7 14:59:10 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/PWM/Dual_Edge/pwm_dual_edge.c File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/PWM/Dual_Edge/pwm_dual_edge.c File Reference

This program illustrates the PWM signal on 3 Channels in both edge mode and single mode. More...

#include "lpc17xx_pwm.h"
#include "lpc17xx_libcfg.h"
#include "lpc17xx_pinsel.h"

Go to the source code of this file.

Functions

int | c_entry (void)
c_entry: Main PWM program body
int | main (void)
void | check_failed (uint8_t *file, uint32_t line)

Detailed Description

This program illustrates the PWM signal on 3 Channels in both edge mode and single mode.

Version:
2.0
Date:
21. May. 2010
Author:
NXP MCU SW Application Team
Copyright(C) 2010, NXP Semiconductor All rights reserved.

Software that is described herein is for illustrative purposes only which provides customers with programming information regarding the products. This software is supplied "AS IS" without any warranties. NXP Semiconductors assumes no responsibility or liability for the use of the software, conveys no license or title under any patent, copyright, or mask work right to the product. NXP Semiconductors reserves the right to make changes in the software without notification. NXP Semiconductors also make no representation or warranty that such application will be suitable for the specified use without further testing or modification.

Definition in file pwm_dual_edge.c.

Generated on Tue Jun 7 14:59:17 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/PWM/Match_Interrupt/lpc17xx_libcfg.h File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/PWM/Match_Interrupt/lpc17xx_libcfg.h File Reference

#include "lpc_types.h"

Go to the source code of this file.

Defines

#define | DEBUG
#define | _PWM
#define | _PWM1
#define | CHECK_PARAM(expr) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))

Functions

void | check_failed (uint8_t *file, uint32_t line)

Define Documentation

#define _PWM

Definition at line 95 of file lpc17xx_libcfg.h.

#define _PWM1

Definition at line 96 of file lpc17xx_libcfg.h.

#define CHECK_PARAM ( expr ) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))

Definition at line 136 of file lpc17xx_libcfg.h.

#define DEBUG

Definition at line 36 of file lpc17xx_libcfg.h.

Generated on Tue Jun 7 14:59:10 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/PWM/Match_Interrupt/pwm_match_int.c File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/PWM/Match_Interrupt/pwm_match_int.c File Reference

PWM match interrupt example. More...

#include "lpc17xx_pwm.h"
#include "lpc17xx_libcfg.h"
#include "lpc17xx_pinsel.h"

Go to the source code of this file.

Defines

#define | TIME_OUT 10000

Functions

void | PWM1_IRQHandler (void)
GPDMA interrupt handler sub-routine.
int | c_entry (void)
c_entry: Main PWM program body
int | main (void)
void | check_failed (uint8_t *file, uint32_t line)

Variables

__IO uint32_t | match_cnt = 0
__IO uint32_t | long_duty = 0

Detailed Description

PWM match interrupt example.

Version:
2.0
Date:
21. May. 2010
Author:
NXP MCU SW Application Team
Copyright(C) 2010, NXP Semiconductor All rights reserved.

Software that is described herein is for illustrative purposes only which provides customers with programming information regarding the products. This software is supplied "AS IS" without any warranties. NXP Semiconductors assumes no responsibility or liability for the use of the software, conveys no license or title under any patent, copyright, or mask work right to the product. NXP Semiconductors reserves the right to make changes in the software without notification. NXP Semiconductors also make no representation or warranty that such application will be suitable for the specified use without further testing or modification.

Definition in file pwm_match_int.c.

Generated on Tue Jun 7 14:59:17 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/PWM/Single_Edge/lpc17xx_libcfg.h File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/PWM/Single_Edge/lpc17xx_libcfg.h File Reference

#include "lpc_types.h"

Go to the source code of this file.

Defines

#define | DEBUG
#define | _PWM
#define | _PWM1
#define | CHECK_PARAM(expr) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))

Functions

void | check_failed (uint8_t *file, uint32_t line)

Define Documentation

#define _PWM

Definition at line 94 of file lpc17xx_libcfg.h.

#define _PWM1

Definition at line 95 of file lpc17xx_libcfg.h.

#define CHECK_PARAM ( expr ) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))

Definition at line 135 of file lpc17xx_libcfg.h.

#define DEBUG

Definition at line 36 of file lpc17xx_libcfg.h.

Generated on Tue Jun 7 14:59:10 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/PWM/Single_Edge/pwm_single_edge.c File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/PWM/Single_Edge/pwm_single_edge.c File Reference

This program illustrates the PWM signal on 6 Channels in single edge mode. More...

#include "lpc17xx_pwm.h"
#include "lpc17xx_libcfg.h"
#include "lpc17xx_pinsel.h"

Go to the source code of this file.

Functions

int | c_entry (void)
c_entry: Main PWM program body
int | main (void)
void | check_failed (uint8_t *file, uint32_t line)

Detailed Description

This program illustrates the PWM signal on 6 Channels in single edge mode.

Version:
2.0
Date:
21. May. 2010
Author:
NXP MCU SW Application Team
Copyright(C) 2010, NXP Semiconductor All rights reserved.

Software that is described herein is for illustrative purposes only which provides customers with programming information regarding the products. This software is supplied "AS IS" without any warranties. NXP Semiconductors assumes no responsibility or liability for the use of the software, conveys no license or title under any patent, copyright, or mask work right to the product. NXP Semiconductors reserves the right to make changes in the software without notification. NXP Semiconductors also make no representation or warranty that such application will be suitable for the specified use without further testing or modification.

Definition in file pwm_single_edge.c.

Generated on Tue Jun 7 14:59:17 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/PWR/EXTINT_Sleep/extint_sleep.c File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/PWR/EXTINT_Sleep/extint_sleep.c File Reference

This example describes how to enter the system in sleep mode and wake-up by using external interrupt. More...

#include "LPC17xx.h"
#include "lpc17xx_gpio.h"
#include "lpc17xx_exti.h"
#include "lpc17xx_pinsel.h"
#include "lpc17xx_clkpwr.h"
#include "lpc17xx_libcfg.h"
#include "debug_frmwrk.h"

Go to the source code of this file.

Defines

#define | IAR_LPC_1768
#define | _EXT_IRQ EINT2_IRQn
#define | _EXTINT EXTI_EINT2

Functions

void | EINT2_IRQHandler (void)
External interrupt 3 handler sub-routine.
void | print_menu (void)
Print Welcome menu.
void | delay (void)
Delay function.
void | InitLED (void)
Initialize LEDs.
int | c_entry (void)
c_entry: Main program body
int | main (void)
void | check_failed (uint8_t *file, uint32_t line)

Variables

uint8_t | menu []

Detailed Description

This example describes how to enter the system in sleep mode and wake-up by using external interrupt.

Version:
2.0
Date:
21. May. 2010
Author:
NXP MCU SW Application Team
Copyright(C) 2010, NXP Semiconductor All rights reserved.

Software that is described herein is for illustrative purposes only which provides customers with programming information regarding the products. This software is supplied "AS IS" without any warranties. NXP Semiconductors assumes no responsibility or liability for the use of the software, conveys no license or title under any patent, copyright, or mask work right to the product. NXP Semiconductors reserves the right to make changes in the software without notification. NXP Semiconductors also make no representation or warranty that such application will be suitable for the specified use without further testing or modification.

Definition in file extint_sleep.c.

Generated on Tue Jun 7 14:59:17 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/PWR/EXTINT_Sleep/lpc17xx_libcfg.h File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/PWR/EXTINT_Sleep/lpc17xx_libcfg.h File Reference

#include "lpc_types.h"

Go to the source code of this file.

Defines

#define | DEBUG
#define | _DBGFWK
#define | _GPIO
#define | _EXTI
#define | _UART
#define | _UART0
#define | CHECK_PARAM(expr) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))

Functions

void | check_failed (uint8_t *file, uint32_t line)

Define Documentation

#define _DBGFWK

Definition at line 43 of file lpc17xx_libcfg.h.

#define _EXTI

Definition at line 50 of file lpc17xx_libcfg.h.

#define _GPIO

Definition at line 47 of file lpc17xx_libcfg.h.

#define _UART

Definition at line 53 of file lpc17xx_libcfg.h.

#define _UART0

Definition at line 54 of file lpc17xx_libcfg.h.

#define CHECK_PARAM ( expr ) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))

Definition at line 135 of file lpc17xx_libcfg.h.

#define DEBUG

Definition at line 35 of file lpc17xx_libcfg.h.

Generated on Tue Jun 7 14:59:10 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/PWR/NMI_PowerDown/lpc17xx_libcfg.h File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/PWR/NMI_PowerDown/lpc17xx_libcfg.h File Reference

#include "lpc_types.h"

Go to the source code of this file.

Defines

#define | DEBUG
#define | _DBGFWK
#define | _GPIO
#define | _UART
#define | _UART0
#define | CHECK_PARAM(expr) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))

Functions

void | check_failed (uint8_t *file, uint32_t line)

Define Documentation

#define _DBGFWK

Definition at line 44 of file lpc17xx_libcfg.h.

#define _GPIO

Definition at line 48 of file lpc17xx_libcfg.h.

#define _UART

Definition at line 54 of file lpc17xx_libcfg.h.

#define _UART0

Definition at line 55 of file lpc17xx_libcfg.h.

#define CHECK_PARAM ( expr ) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))

Definition at line 136 of file lpc17xx_libcfg.h.

#define DEBUG

Definition at line 36 of file lpc17xx_libcfg.h.

Generated on Tue Jun 7 14:59:10 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/PWR/NMI_PowerDown/nmi_powerdown.c File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/PWR/NMI_PowerDown/nmi_powerdown.c File Reference

This example describes how to enter the system in Power Down mode and wake-up by using NMI (Non-maskable Interrupt). More...

#include "LPC17xx.h"
#include "lpc17xx_clkpwr.h"
#include "lpc17xx_libcfg.h"
#include "debug_frmwrk.h"
#include "lpc17xx_gpio.h"
#include "lpc17xx_pinsel.h"

Go to the source code of this file.

Functions

void | print_menu (void)
Print Welcome menu.
void | NMI_Handler (void)
Non-Maskable interrupt handler.
int | c_entry (void)
c_entry: Main program body
int | main (void)
void | check_failed (uint8_t *file, uint32_t line)

Variables

uint8_t | menu []

Detailed Description

This example describes how to enter the system in Power Down mode and wake-up by using NMI (Non-maskable Interrupt).

Version:
1.0
Date:
18. June. 2010
Author:
NXP MCU SW Application Team
Copyright(C) 2010, NXP Semiconductor All rights reserved.

Software that is described herein is for illustrative purposes only which provides customers with programming information regarding the products. This software is supplied "AS IS" without any warranties. NXP Semiconductors assumes no responsibility or liability for the use of the software, conveys no license or title under any patent, copyright, or mask work right to the product. NXP Semiconductors reserves the right to make changes in the software without notification. NXP Semiconductors also make no representation or warranty that such application will be suitable for the specified use without further testing or modification.

Definition in file nmi_powerdown.c.

Generated on Tue Jun 7 14:59:18 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/PWR/RTC_DeepPWD/lpc17xx_libcfg.h File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/PWR/RTC_DeepPWD/lpc17xx_libcfg.h File Reference

#include "lpc_types.h"

Go to the source code of this file.

Defines

#define | DEBUG
#define | _DBGFWK
#define | _GPIO
#define | _UART
#define | _UART0
#define | _RTC
#define | CHECK_PARAM(expr) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))

Functions

void | check_failed (uint8_t *file, uint32_t line)

Define Documentation

#define _DBGFWK

Definition at line 44 of file lpc17xx_libcfg.h.

#define _GPIO

Definition at line 48 of file lpc17xx_libcfg.h.

#define _RTC

Definition at line 100 of file lpc17xx_libcfg.h.

#define _UART

Definition at line 54 of file lpc17xx_libcfg.h.

#define _UART0

Definition at line 55 of file lpc17xx_libcfg.h.

#define CHECK_PARAM ( expr ) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))

Definition at line 136 of file lpc17xx_libcfg.h.

#define DEBUG

Definition at line 36 of file lpc17xx_libcfg.h.

Generated on Tue Jun 7 14:59:10 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/PWR/RTC_DeepPWD/rtc_deeppwd.c File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/PWR/RTC_DeepPWD/rtc_deeppwd.c File Reference

This example describes how to enter the system in Deep PowerDown and wake-up by using RTC Interrupt. More...

#include "LPC17xx.h"
#include "lpc17xx_clkpwr.h"
#include "lpc17xx_libcfg.h"
#include "debug_frmwrk.h"
#include "lpc17xx_gpio.h"
#include "lpc17xx_rtc.h"

Go to the source code of this file.

Functions

void | print_menu (void)
Print Welcome menu.
void | RTC_IRQHandler (void)
RTC(Real-time clock) interrupt handler.
int | c_entry (void)
c_entry: Main program body
int | main (void)
void | check_failed (uint8_t *file, uint32_t line)

Variables

uint8_t | menu []

Detailed Description

This example describes how to enter the system in Deep PowerDown and wake-up by using RTC Interrupt.

Version:
1.0
Date:
18. June. 2010
Author:
NXP MCU SW Application Team
Copyright(C) 2010, NXP Semiconductor All rights reserved.

Software that is described herein is for illustrative purposes only which provides customers with programming information regarding the products. This software is supplied "AS IS" without any warranties. NXP Semiconductors assumes no responsibility or liability for the use of the software, conveys no license or title under any patent, copyright, or mask work right to the product. NXP Semiconductors reserves the right to make changes in the software without notification. NXP Semiconductors also make no representation or warranty that such application will be suitable for the specified use without further testing or modification.

Definition in file rtc_deeppwd.c.

Generated on Tue Jun 7 14:59:18 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/PWR/WDT_DeepSleep/lpc17xx_libcfg.h File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/PWR/WDT_DeepSleep/lpc17xx_libcfg.h File Reference

#include "lpc_types.h"

Go to the source code of this file.

Defines

#define | DEBUG
#define | _DBGFWK
#define | _UART
#define | _UART0
#define | _WDT
#define | CHECK_PARAM(expr) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))

Functions

void | check_failed (uint8_t *file, uint32_t line)

Define Documentation

#define _DBGFWK

Definition at line 43 of file lpc17xx_libcfg.h.

#define _UART

Definition at line 52 of file lpc17xx_libcfg.h.

#define _UART0

Definition at line 53 of file lpc17xx_libcfg.h.

#define _WDT

Definition at line 79 of file lpc17xx_libcfg.h.

#define CHECK_PARAM ( expr ) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))

Definition at line 134 of file lpc17xx_libcfg.h.

#define DEBUG

Definition at line 35 of file lpc17xx_libcfg.h.

Generated on Tue Jun 7 14:59:10 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/PWR/WDT_DeepSleep/wdt_deepsleep.c File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/PWR/WDT_DeepSleep/wdt_deepsleep.c File Reference

#include "LPC17xx.h"
#include "lpc17xx_clkpwr.h"
#include "lpc17xx_libcfg.h"
#include "debug_frmwrk.h"
#include "lpc17xx_wdt.h"

Go to the source code of this file.

Defines

#define | WDT_TIMEOUT 2000000

Functions

void | print_menu (void)
Print Welcome menu.
void | WDT_IRQHandler (void)
WDT interrupt handler sub-routine.
int | c_entry (void)
c_entry: Main program body
int | main (void)
void | check_failed (uint8_t *file, uint32_t line)

Variables

uint8_t | menu []

Generated on Tue Jun 7 14:59:18 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/QEI/QEI_Velo/lpc17xx_libcfg.h File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/QEI/QEI_Velo/lpc17xx_libcfg.h File Reference

#include "lpc_types.h"

Go to the source code of this file.

Defines

#define | DEBUG
#define | _DBGFWK
#define | _GPIO
#define | _UART
#define | _UART0
#define | _TIM
#define | _QEI
#define | CHECK_PARAM(expr) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))

Functions

void | check_failed (uint8_t *file, uint32_t line)

Define Documentation

#define _DBGFWK

Definition at line 46 of file lpc17xx_libcfg.h.

#define _GPIO

Definition at line 50 of file lpc17xx_libcfg.h.

#define _QEI

Definition at line 112 of file lpc17xx_libcfg.h.

#define _TIM

Definition at line 80 of file lpc17xx_libcfg.h.

#define _UART

Definition at line 56 of file lpc17xx_libcfg.h.

#define _UART0

Definition at line 57 of file lpc17xx_libcfg.h.

#define CHECK_PARAM ( expr ) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))

Definition at line 138 of file lpc17xx_libcfg.h.

#define DEBUG

Definition at line 38 of file lpc17xx_libcfg.h.

Generated on Tue Jun 7 14:59:10 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/QEI/QEI_Velo/qei_test_velo.c File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/QEI/QEI_Velo/qei_test_velo.c File Reference

#include "lpc17xx_qei.h"
#include "lpc17xx_libcfg.h"
#include "lpc17xx_timer.h"
#include "lpc17xx_clkpwr.h"
#include "debug_frmwrk.h"
#include "lpc17xx_pinsel.h"
#include "lpc17xx_gpio.h"

Go to the source code of this file.

Defines

#define | VIRTUAL_QEI_SIGNAL 1
#define | SIGNAL_MODE 0
#define | CAP_MODE 1
#define | CAP_PERIOD 250000UL
#define | DISP_TIME 3000000UL
#define | MAX_CAP_TIMES (DISP_TIME/CAP_PERIOD)
#define | ENC_RES 2048UL
#define | MAX_VEL 600UL
#define | COUNT_MODE 4
#define | PHASE_A_PIN (1<<19)
#define | PHASE_B_PIN (1<<21)

Functions

void | VirtualQEISignal_Init (void)
Initializes signal supplying for QEI peripheral by using timer match interrupt output, that will generate two virtual signal on Phase-A and Phase-B. These two clock are 90 degrees out of phase. In this case, a 'virtual encoder' that has these following parameter:
  • Encoder type : Quadrature encoder
  • Max velocity : MAX_VEL (Round Per Minute)
  • Encoder Resolution : ENC_RES (Pulse Per Round) The calculated frequency is: Freq = (MAX_VEL * ENC_RES * COUNT_MODE) / 60 (Hz) The timer therefore should be set to tick every cycle T = 1/Freq (second) Figure: |-----| |-----| Phase A --| |-----| |----- |-----| |-----| Phase B -----| |-----| |--.

void | TIMER0_IRQHandler (void)
Timer 0 interrupt handler. This sub-routine will set/clear two Phase A-B output pin to their phase state.
void | QEI_IRQHandler (void)
QEI interrupt handler. This sub-routine will update current value of captured velocity in to velocity accumulate.
int | c_entry (void)
c_entry: Main QEI program body
int | main (void)
void | check_failed (uint8_t *file, uint32_t line)

Variables

__IO uint8_t | PhaseCnt
__IO uint64_t | VeloAcc
__IO uint32_t | VeloCapCnt
__IO FlagStatus | VeloAccFlag
const PINSEL_CFG_Type | qei_phaA_pin [1] = {{1, 20, 1, 0, 0}}
const PINSEL_CFG_Type | qei_phaB_pin [1] = {{1, 23, 1, 0, 0}}
const PINSEL_CFG_Type | qei_idx_pin [1] = {{1, 24, 1, 0, 0}}

Generated on Tue Jun 7 14:59:18 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/RIT/Interrupt/lpc17xx_libcfg.h File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/RIT/Interrupt/lpc17xx_libcfg.h File Reference

#include "lpc_types.h"

Go to the source code of this file.

Defines

#define | DEBUG
#define | _DBGFWK
#define | _GPIO
#define | _UART
#define | _UART0
#define | _RIT
#define | CHECK_PARAM(expr) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))

Functions

void | check_failed (uint8_t *file, uint32_t line)

Define Documentation

#define _DBGFWK

Definition at line 44 of file lpc17xx_libcfg.h.

#define _GPIO

Definition at line 47 of file lpc17xx_libcfg.h.

#define _RIT

Definition at line 118 of file lpc17xx_libcfg.h.

#define _UART

Definition at line 53 of file lpc17xx_libcfg.h.

#define _UART0

Definition at line 54 of file lpc17xx_libcfg.h.

#define CHECK_PARAM ( expr ) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))

Definition at line 135 of file lpc17xx_libcfg.h.

#define DEBUG

Definition at line 36 of file lpc17xx_libcfg.h.

Generated on Tue Jun 7 14:59:10 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/RIT/Interrupt/rit_interrupt.c File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/RIT/Interrupt/rit_interrupt.c File Reference

This example used RIT to generate interrupt each 1s. More...

#include "lpc17xx_rit.h"
#include "lpc17xx_libcfg.h"
#include "debug_frmwrk.h"
#include "lpc17xx_gpio.h"

Go to the source code of this file.

Defines

#define | MCB_LPC_1768
#define | TIME_INTERVAL 1000

Functions

void | RIT_IRQHandler (void)
RIT interrupt handler sub-routine.
int | c_entry (void)
c_entry: Main RIT program body
int | main (void)
void | check_failed (uint8_t *file, uint32_t line)

Variables

uint8_t | menu []
FunctionalState | LEDStatus = ENABLE

Detailed Description

This example used RIT to generate interrupt each 1s.

Version:
2.0
Date:
21. May. 2010
Author:
NXP MCU SW Application Team
Copyright(C) 2010, NXP Semiconductor All rights reserved.

Software that is described herein is for illustrative purposes only which provides customers with programming information regarding the products. This software is supplied "AS IS" without any warranties. NXP Semiconductors assumes no responsibility or liability for the use of the software, conveys no license or title under any patent, copyright, or mask work right to the product. NXP Semiconductors reserves the right to make changes in the software without notification. NXP Semiconductors also make no representation or warranty that such application will be suitable for the specified use without further testing or modification.

Definition in file rit_interrupt.c.

Generated on Tue Jun 7 14:59:18 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/RTC/AlarmCntIncrInterrupt/lpc17xx_libcfg.h File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/RTC/AlarmCntIncrInterrupt/lpc17xx_libcfg.h File Reference

#include "lpc_types.h"

Go to the source code of this file.

Defines

#define | DEBUG
#define | _DBGFWK
#define | _UART
#define | _UART0
#define | _RTC
#define | CHECK_PARAM(expr) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))

Functions

void | check_failed (uint8_t *file, uint32_t line)

Define Documentation

#define _DBGFWK

Definition at line 44 of file lpc17xx_libcfg.h.

#define _RTC

Definition at line 99 of file lpc17xx_libcfg.h.

#define _UART

Definition at line 53 of file lpc17xx_libcfg.h.

#define _UART0

Definition at line 54 of file lpc17xx_libcfg.h.

#define CHECK_PARAM ( expr ) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))

Definition at line 135 of file lpc17xx_libcfg.h.

#define DEBUG

Definition at line 36 of file lpc17xx_libcfg.h.

Generated on Tue Jun 7 14:59:10 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/RTC/AlarmCntIncrInterrupt/rtc_alarm_cntincr_int.c File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/RTC/AlarmCntIncrInterrupt/rtc_alarm_cntincr_int.c File Reference

This example describes how to use RTC to generate interrupt in Second Counter Increment Interrupt (1s) and generate alarm interrupt at 10s. More...

#include "lpc17xx_rtc.h"
#include "lpc17xx_libcfg.h"
#include "debug_frmwrk.h"

Go to the source code of this file.

Functions

void | RTC_IRQHandler (void)
RTC interrupt handler sub-routine.
void | print_menu (void)
Print menu.
int | c_entry (void)
c_entry: Main RTC program body
int | main (void)
void | check_failed (uint8_t *file, uint32_t line)

Variables

uint8_t | menu1 []

Detailed Description

This example describes how to use RTC to generate interrupt in Second Counter Increment Interrupt (1s) and generate alarm interrupt at 10s.

Version:
2.0
Date:
21. May. 2010
Author:
NXP MCU SW Application Team
Copyright(C) 2010, NXP Semiconductor All rights reserved.

Software that is described herein is for illustrative purposes only which provides customers with programming information regarding the products. This software is supplied "AS IS" without any warranties. NXP Semiconductors assumes no responsibility or liability for the use of the software, conveys no license or title under any patent, copyright, or mask work right to the product. NXP Semiconductors reserves the right to make changes in the software without notification. NXP Semiconductors also make no representation or warranty that such application will be suitable for the specified use without further testing or modification.

Definition in file rtc_alarm_cntincr_int.c.

Generated on Tue Jun 7 14:59:18 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/RTC/Calibration/lpc17xx_libcfg.h File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/RTC/Calibration/lpc17xx_libcfg.h File Reference

#include "lpc_types.h"

Go to the source code of this file.

Defines

#define | DEBUG
#define | _DBGFWK
#define | _UART
#define | _UART0
#define | _RTC
#define | CHECK_PARAM(expr) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))

Functions

void | check_failed (uint8_t *file, uint32_t line)

Define Documentation

#define _DBGFWK

Definition at line 44 of file lpc17xx_libcfg.h.

#define _RTC

Definition at line 99 of file lpc17xx_libcfg.h.

#define _UART

Definition at line 53 of file lpc17xx_libcfg.h.

#define _UART0

Definition at line 54 of file lpc17xx_libcfg.h.

#define CHECK_PARAM ( expr ) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))

Definition at line 135 of file lpc17xx_libcfg.h.

#define DEBUG

Definition at line 36 of file lpc17xx_libcfg.h.

Generated on Tue Jun 7 14:59:10 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/RTC/Calibration/rtc_calib.c File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/RTC/Calibration/rtc_calib.c File Reference

This example describes how to calibrate real time clock. More...

#include "LPC17xx.h"
#include "lpc17xx_clkpwr.h"
#include "lpc17xx_libcfg.h"
#include "debug_frmwrk.h"
#include "lpc17xx_rtc.h"

Go to the source code of this file.

Functions

void | print_menu (void)
Print Welcome menu.
void | RTC_IRQHandle (void)
void | RTC_IRQHandler (void)
RTC interrupt handler sub-routine.
int | c_entry (void)
c_entry: Main program body
int | main (void)
void | check_failed (uint8_t *file, uint32_t line)

Variables

uint8_t | menu []

Detailed Description

This example describes how to calibrate real time clock.

Version:
2.0
Date:
18. June. 2010
Author:
NXP MCU SW Application Team
Copyright(C) 2010, NXP Semiconductor All rights reserved.

Software that is described herein is for illustrative purposes only which provides customers with programming information regarding the products. This software is supplied "AS IS" without any warranties. NXP Semiconductors assumes no responsibility or liability for the use of the software, conveys no license or title under any patent, copyright, or mask work right to the product. NXP Semiconductors reserves the right to make changes in the software without notification. NXP Semiconductors also make no representation or warranty that such application will be suitable for the specified use without further testing or modification.

Definition in file rtc_calib.c.

Generated on Tue Jun 7 14:59:18 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/SPI/LoopBack/lpc17xx_libcfg.h File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/SPI/LoopBack/lpc17xx_libcfg.h File Reference

#include "lpc_types.h"

Go to the source code of this file.

Defines

#define | DEBUG
#define | _DBGFWK
#define | _GPIO
#define | _UART
#define | _UART0
#define | _SPI
#define | CHECK_PARAM(expr) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))

Functions

void | check_failed (uint8_t *file, uint32_t line)

Define Documentation

#define _DBGFWK

Definition at line 44 of file lpc17xx_libcfg.h.

#define _GPIO

Definition at line 47 of file lpc17xx_libcfg.h.

#define _SPI

Definition at line 60 of file lpc17xx_libcfg.h.

#define _UART

Definition at line 53 of file lpc17xx_libcfg.h.

#define _UART0

Definition at line 54 of file lpc17xx_libcfg.h.

#define CHECK_PARAM ( expr ) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))

Definition at line 135 of file lpc17xx_libcfg.h.

#define DEBUG

Definition at line 36 of file lpc17xx_libcfg.h.

Generated on Tue Jun 7 14:59:10 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/SPI/LoopBack/spi_loopback_test.c File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/SPI/LoopBack/spi_loopback_test.c File Reference

An example of SPI using polling mode with loop-back (MISO <-> MOSI)connection to test SPI driver. More...

#include "lpc17xx_spi.h"
#include "lpc17xx_libcfg.h"
#include "lpc17xx_pinsel.h"
#include "debug_frmwrk.h"
#include "lpc17xx_gpio.h"

Go to the source code of this file.

Defines

#define | CS_PORT_NUM 0
#define | CS_PIN_NUM 16
#define | SPI_DATABIT_SIZE 10
#define | BUFFER_SIZE 0x40

Functions

void | print_menu (void)
Print Welcome menu.
void | Buffer_Init (void)
Initialize buffer.
void | Error_Loop (void)
Error Loop (called by Buffer_Verify() if any error).
void | Buffer_Verify (void)
Verify buffer.
int | c_entry (void)
c_entry: Main SPI program body
int | main (void)
void | check_failed (uint8_t *file, uint32_t line)

Variables

uint8_t | menu1 []
uint8_t | menu2 [] = "Demo terminated! \n\r"
SPI_CFG_Type SPI_ConfigStruct
uint16_t | Tx_Buf [BUFFER_SIZE]
uint16_t | Rx_Buf [BUFFER_SIZE]

Detailed Description

An example of SPI using polling mode with loop-back (MISO <-> MOSI)connection to test SPI driver.

Version:
2.0
Date:
21. May. 2010
Author:
NXP MCU SW Application Team
Copyright(C) 2010, NXP Semiconductor All rights reserved.

Software that is described herein is for illustrative purposes only which provides customers with programming information regarding the products. This software is supplied "AS IS" without any warranties. NXP Semiconductors assumes no responsibility or liability for the use of the software, conveys no license or title under any patent, copyright, or mask work right to the product. NXP Semiconductors reserves the right to make changes in the software without notification. NXP Semiconductors also make no representation or warranty that such application will be suitable for the specified use without further testing or modification.

Definition in file spi_loopback_test.c.

Generated on Tue Jun 7 14:59:18 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/SPI/Master/lpc17xx_libcfg.h File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/SPI/Master/lpc17xx_libcfg.h File Reference

#include "lpc_types.h"

Go to the source code of this file.

Defines

#define | DEBUG
#define | _DBGFWK
#define | _GPIO
#define | _UART
#define | _UART0
#define | _SPI
#define | CHECK_PARAM(expr) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))

Functions

void | check_failed (uint8_t *file, uint32_t line)

Define Documentation

#define _DBGFWK

Definition at line 44 of file lpc17xx_libcfg.h.

#define _GPIO

Definition at line 47 of file lpc17xx_libcfg.h.

#define _SPI

Definition at line 60 of file lpc17xx_libcfg.h.

#define _UART

Definition at line 53 of file lpc17xx_libcfg.h.

#define _UART0

Definition at line 54 of file lpc17xx_libcfg.h.

#define CHECK_PARAM ( expr ) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))

Definition at line 136 of file lpc17xx_libcfg.h.

#define DEBUG

Definition at line 36 of file lpc17xx_libcfg.h.

Generated on Tue Jun 7 14:59:10 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/SPI/Master/spi_master.c File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/SPI/Master/spi_master.c File Reference

This example describes how to use SPI in master mode. More...

#include "lpc17xx_spi.h"
#include "lpc17xx_libcfg.h"
#include "lpc17xx_pinsel.h"
#include "debug_frmwrk.h"
#include "lpc17xx_gpio.h"

Go to the source code of this file.

Defines

#define | CS_PORT_NUM 0
#define | CS_PIN_NUM 16
#define | SPI_DATABIT_SIZE 10
#define | BUFFER_SIZE 0x40

Functions

void | CS_Init (void)
Initialize CS pin as GPIO function to drive /CS pin due to definition of CS_PORT_NUM and CS_PORT_NUM.
void | CS_Force (int32_t state)
Drive CS output pin to low/high level to select slave device via /CS pin state.
void | print_menu (void)
Print Welcome menu.
void | Buffer_Init (void)
Initialize buffer.
void | Error_Loop (void)
Error Loop (called by Buffer_Verify() if any error).
void | Buffer_Verify (void)
Verify buffer.
int | c_entry (void)
c_entry: Main SPI program body
int | main (void)
void | check_failed (uint8_t *file, uint32_t line)

Variables

uint8_t | menu1 []
uint8_t | menu2 [] = "Demo terminated! \n\r"
SPI_CFG_Type SPI_ConfigStruct
uint16_t | Tx_Buf [BUFFER_SIZE]
uint16_t | Rx_Buf [BUFFER_SIZE]

Detailed Description

This example describes how to use SPI in master mode.

Version:
2.0
Date:
21. May. 2010
Author:
NXP MCU SW Application Team
Copyright(C) 2010, NXP Semiconductor All rights reserved.

Software that is described herein is for illustrative purposes only which provides customers with programming information regarding the products. This software is supplied "AS IS" without any warranties. NXP Semiconductors assumes no responsibility or liability for the use of the software, conveys no license or title under any patent, copyright, or mask work right to the product. NXP Semiconductors reserves the right to make changes in the software without notification. NXP Semiconductors also make no representation or warranty that such application will be suitable for the specified use without further testing or modification.

Definition in file spi_master.c.

Generated on Tue Jun 7 14:59:18 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/SPI/sc16is750_int/lpc17xx_libcfg.h File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/SPI/sc16is750_int/lpc17xx_libcfg.h File Reference

#include "lpc_types.h"

Go to the source code of this file.

Defines

#define | DEBUG
#define | _DBGFWK
#define | _GPIO
#define | _UART
#define | _UART0
#define | _SPI
#define | CHECK_PARAM(expr) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))

Functions

void | check_failed (uint8_t *file, uint32_t line)

Define Documentation

#define _DBGFWK

Definition at line 44 of file lpc17xx_libcfg.h.

#define _GPIO

Definition at line 47 of file lpc17xx_libcfg.h.

#define _SPI

Definition at line 60 of file lpc17xx_libcfg.h.

#define _UART

Definition at line 53 of file lpc17xx_libcfg.h.

#define _UART0

Definition at line 54 of file lpc17xx_libcfg.h.

#define CHECK_PARAM ( expr ) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))

Definition at line 136 of file lpc17xx_libcfg.h.

#define DEBUG

Definition at line 36 of file lpc17xx_libcfg.h.

Generated on Tue Jun 7 14:59:10 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/SPI/sc16is750_int/spi_interrupt_test.c File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/SPI/sc16is750_int/spi_interrupt_test.c File Reference

This example describes how to use SPI at mode SPI master/8bit on LPC1768 to communicate with SC16IS750/760 Demo board in interrupt mode. More...

#include "lpc17xx_spi.h"
#include "lpc17xx_libcfg.h"
#include "lpc17xx_pinsel.h"
#include "debug_frmwrk.h"
#include "lpc17xx_gpio.h"

Go to the source code of this file.

Defines

#define | CS_PORT_NUM 0
#define | CS_PIN_NUM 16
#define | IDLE_CHAR 0xFF
#define | SC16IS740_WR_CMD(x) ((uint8_t) (x << 3))
#define | SC16IS740_RD_CMD(x) ((uint8_t) ((x << 3) | 0x80))
#define | SC16IS740_IODIR_REG 0x0A
#define | SC16IS740_IOSTATE_REG 0x0B
#define | SC16IS740_IOCON_REG 0x0E

Functions

void | SPI_IRQHandler (void)
SPI Interrupt used for reading and writing handler.
void | CS_Init (void)
Initialize CS pin as GPIO function to drive /CS pin due to definition of CS_PORT_NUM and CS_PORT_NUM.
void | CS_Force (int32_t state)
Drive CS output pin to low/high level to select slave device via /CS pin state.
void | print_menu (void)
Print Welcome menu.
int | c_entry (void)
c_entry: Main SPI program body
int | main (void)
void | check_failed (uint8_t *file, uint32_t line)

Variables

uint8_t | menu1 []
uint8_t | menu2 [] = "Demo terminated! \n\r"
uint8_t | iocon_cfg [2] = {SC16IS740_WR_CMD(SC16IS740_IOCON_REG), 0x00}
uint8_t | iodir_cfg [2] = {SC16IS740_WR_CMD(SC16IS740_IODIR_REG), 0xFF}
uint8_t | iostate_on [2] = {SC16IS740_WR_CMD(SC16IS740_IOSTATE_REG), 0x00}
uint8_t | iostate_off [2] = {SC16IS740_WR_CMD(SC16IS740_IOSTATE_REG), 0xFF}
uint8_t | spireadbuf [2]
__IO FlagStatus | complete
SPI_CFG_Type SPI_ConfigStruct
SPI_DATA_SETUP_Type xferConfig

Detailed Description

This example describes how to use SPI at mode SPI master/8bit on LPC1768 to communicate with SC16IS750/760 Demo board in interrupt mode.

Version:
2.0
Date:
21. May. 2010
Author:
NXP MCU SW Application Team
Copyright(C) 2010, NXP Semiconductor All rights reserved.

Software that is described herein is for illustrative purposes only which provides customers with programming information regarding the products. This software is supplied "AS IS" without any warranties. NXP Semiconductors assumes no responsibility or liability for the use of the software, conveys no license or title under any patent, copyright, or mask work right to the product. NXP Semiconductors reserves the right to make changes in the software without notification. NXP Semiconductors also make no representation or warranty that such application will be suitable for the specified use without further testing or modification.

Definition in file spi_interrupt_test.c.

Generated on Tue Jun 7 14:59:18 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/SPI/sc16is750_polling/lpc17xx_libcfg.h File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/SPI/sc16is750_polling/lpc17xx_libcfg.h File Reference

#include "lpc_types.h"

Go to the source code of this file.

Defines

#define | DEBUG
#define | _DBGFWK
#define | _GPIO
#define | _UART
#define | _UART0
#define | _SPI
#define | CHECK_PARAM(expr) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))

Functions

void | check_failed (uint8_t *file, uint32_t line)

Define Documentation

#define _DBGFWK

Definition at line 43 of file lpc17xx_libcfg.h.

#define _GPIO

Definition at line 46 of file lpc17xx_libcfg.h.

#define _SPI

Definition at line 59 of file lpc17xx_libcfg.h.

#define _UART

Definition at line 52 of file lpc17xx_libcfg.h.

#define _UART0

Definition at line 53 of file lpc17xx_libcfg.h.

#define CHECK_PARAM ( expr ) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))

Definition at line 135 of file lpc17xx_libcfg.h.

#define DEBUG

Definition at line 35 of file lpc17xx_libcfg.h.

Generated on Tue Jun 7 14:59:10 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/SPI/sc16is750_polling/spi_polling_test.c File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/SPI/sc16is750_polling/spi_polling_test.c File Reference

This example describes how to use SPI at mode SPI master/8bit on LPC1768 to communicate with SC16IS750/760 Demo board in polling mode. More...

#include "lpc17xx_spi.h"
#include "lpc17xx_libcfg.h"
#include "lpc17xx_pinsel.h"
#include "debug_frmwrk.h"
#include "lpc17xx_gpio.h"

Go to the source code of this file.

Defines

#define | CS_PORT_NUM 0
#define | CS_PIN_NUM 16
#define | SC16IS740_WR_CMD(x) ((uint8_t) (x << 3))
#define | SC16IS740_RD_CMD(x) ((uint8_t) ((x << 3) | 0x80))
#define | SC16IS740_IODIR_REG 0x0A
#define | SC16IS740_IOSTATE_REG 0x0B
#define | SC16IS740_IOCON_REG 0x0E

Functions

void | CS_Init (void)
Initialize CS pin as GPIO function to drive /CS pin due to definition of CS_PORT_NUM and CS_PORT_NUM.
void | CS_Force (int32_t state)
Drive CS output pin to low/high level to select slave device via /CS pin state.
void | print_menu (void)
Print Welcome menu.
int | c_entry (void)
c_entry: Main SPI program body
int | main (void)
void | check_failed (uint8_t *file, uint32_t line)

Variables

uint8_t | menu1 []
uint8_t | menu2 [] = "Demo terminated! \n\r"
SPI_CFG_Type SPI_ConfigStruct
uint8_t | iocon_cfg [2] = {SC16IS740_WR_CMD(SC16IS740_IOCON_REG), 0x00}
uint8_t | iodir_cfg [2] = {SC16IS740_WR_CMD(SC16IS740_IODIR_REG), 0xFF}
uint8_t | iostate_on [2] = {SC16IS740_WR_CMD(SC16IS740_IOSTATE_REG), 0x00}
uint8_t | iostate_off [2] = {SC16IS740_WR_CMD(SC16IS740_IOSTATE_REG), 0xFF}
uint8_t | spireadbuf [2]

Detailed Description

This example describes how to use SPI at mode SPI master/8bit on LPC1768 to communicate with SC16IS750/760 Demo board in polling mode.

Version:
2.0
Date:
21. May. 2010
Author:
NXP MCU SW Application Team
Copyright(C) 2010, NXP Semiconductor All rights reserved.

Software that is described herein is for illustrative purposes only which provides customers with programming information regarding the products. This software is supplied "AS IS" without any warranties. NXP Semiconductors assumes no responsibility or liability for the use of the software, conveys no license or title under any patent, copyright, or mask work right to the product. NXP Semiconductors reserves the right to make changes in the software without notification. NXP Semiconductors also make no representation or warranty that such application will be suitable for the specified use without further testing or modification.

Definition in file spi_polling_test.c.

Generated on Tue Jun 7 14:59:18 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/SPI/SDCard/lpc17xx_libcfg.h File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/SPI/SDCard/lpc17xx_libcfg.h File Reference

#include "lpc_types.h"

Go to the source code of this file.

Defines

#define | DEBUG
#define | _DBGFWK
#define | _GPIO
#define | _UART
#define | _UART0
#define | _SPI
#define | CHECK_PARAM(expr) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))

Functions

void | check_failed (uint8_t *file, uint32_t line)

Define Documentation

#define _DBGFWK

Definition at line 44 of file lpc17xx_libcfg.h.

#define _GPIO

Definition at line 47 of file lpc17xx_libcfg.h.

#define _SPI

Definition at line 60 of file lpc17xx_libcfg.h.

#define _UART

Definition at line 53 of file lpc17xx_libcfg.h.

#define _UART0

Definition at line 54 of file lpc17xx_libcfg.h.

#define CHECK_PARAM ( expr ) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))

Definition at line 136 of file lpc17xx_libcfg.h.

#define DEBUG

Definition at line 36 of file lpc17xx_libcfg.h.

Generated on Tue Jun 7 14:59:10 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/SPI/SDCard/spi_sdcard.c File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/SPI/SDCard/spi_sdcard.c File Reference

This example describes how to use SPI to read SD card's CID register. More...

#include "lpc17xx_spi.h"
#include "lpc17xx_libcfg.h"
#include "lpc17xx_pinsel.h"
#include "debug_frmwrk.h"
#include "lpc17xx_gpio.h"

Go to the source code of this file.

Defines

#define | CS_PORT_NUM 0
#define | CS_PIN_NUM 16
#define | SD_DETECT_PORTNUM 4
#define | SD_DETECT_PINNUM 29
#define | CMD0_GO_IDLE_STATE 0x00
#define | CMD1_SEND_OPCOND 0x01
#define | CMD9_SEND_CSD 0x09
#define | CMD10_SEND_CID 0x0a
#define | CMD12_STOP_TRANSMISSION 0x0b
#define | CMD13_SEND_STATUS 0x0c
#define | CMD16_SET_BLOCKLEN 0x10
#define | CMD17_READ_SINGLE_BLOCK 0x11
#define | CMD18_READ_MULTIPLE_BLOCK 0x12
#define | CMD24_WRITE_BLOCK 0x18
#define | CMD25_WRITE_MULTIPLE_BLOCK 0x19
#define | CMD27_PROGRAM_CSD 0x1b
#define | CMD28_SET_WRITE_PROT 0x1c
#define | CMD29_CLR_WRITE_PROT 0x1d
#define | CMD30_SEND_WRITE_PROT 0x1e
#define | CMD32_ERASE_WR_BLK_START_ADDR 0x20
#define | CMD33_ERASE_WR_BLK_END_ADDR 0x21
#define | CMD38_ERASE 0x26
#define | CMD55_APP_CMD 0x37
#define | CMD56_GEN_CMD 0x38
#define | CMD58_READ_OCR 0x3a
#define | CMD59_CRC_ON_OFF 0x3b
#define | ACMD13_SD_STATUS 0x0d
#define | ACMD22_SEND_NUM_WR_BLOCKS 0x16
#define | ACMD23_SET_WR_BLK_ERASE_COUNT 0x17
#define | ACMD41_SEND_OP_COND 0x29
#define | ACMD42_SET_CLR_CARD_DETECT 0x2a
#define | ACMD51_SEND_SCR 0x33
#define | R1_NOERROR 0x00
#define | R1_IDLE 0x01
#define | R1_ERASE 0x02
#define | R1_ILLEGAL 0x04
#define | R1_CRC_ERR 0x08
#define | R1_ERASE_SEQ 0x10
#define | R1_ADDR_ERR 0x20
#define | R1_PARAM_ERR 0x40
#define | R2_LOCKED 0x01
#define | R2_WP_FAILED 0x02
#define | R2_ERROR 0x04
#define | R2_CTRL_ERR 0x08
#define | R2_ECC_FAIL 0x10
#define | R2_WP_VIOL 0x20
#define | R2_ERASE_PARAM 0x40
#define | R2_RANGE_ERR 0x80
#define | GETBIT(in, bit) ((in & (1<<bit)) >> bit)
#define | SD_CMD_BLOCK_LENGTH 6
#define | SD_DATA_BLOCK_LENGTH 515
#define | SD_WAIT_R1_TIMEOUT 100000

Typedefs

typedef enum _sd_connect_status | sd_connect_status
typedef enum _sd_error | sd_error

Enumerations

enum | _sd_connect_status { SD_CONNECTED, SD_DISCONNECTED }
enum _sd_error {
SD_OK, SD_NG, SD_CMD_BAD_PARAMETER, SD_ERROR_TOKEN,
SD_ERROR_TIMEOUT, SD_ERROR_BUS_NOT_IDLE, SD_ERROR_CMD0, SD_ERROR_CMD55,
SD_ERROR_ACMD41, SD_ERROR_CMD59
}

Functions

void | CS_Init (void)
Initialize CS pin as GPIO function to drive /CS pin due to definition of CS_PORT_NUM and CS_PORT_NUM.
void | CS_Force (int32_t state)
Drive CS output pin to low/high level to select slave device via /CS pin state.
void | print_menu (void)
Print Welcome menu.
sd_connect_status | SD_GetCardConnectStatus (void)
check if SD card is inserted or not
uint8_t | crc_7 (uint8_t old_crc, uint8_t data)
Calculate CRC-7 as required by SD specification.
uint8_t | crc_7final (uint8_t old_crc)
Provides the zero-padding final step to CRC-7.
uint32_t | SD_SendReceiveData_Polling (void *tx_buf, void *rx_buf, uint32_t length)
Send/receive data over SPI bus.
void | SD_SendCommand (uint8_t cmd, uint8_t *arg)
Send command to SD card.
sd_error | SD_WaitR1 (uint8_t *buffer, uint32_t length, uint32_t timeout)
Wait for SD card R1 response.
sd_error | SD_WaitDeviceIdle (uint32_t num_char)
Wait for SD card idle.
sd_error | SD_Init (uint8_t retries)
Initialize SD card in SPI mode.
sd_error | SD_GetCID (void)
Get SD card's CID register.
int | c_entry (void)
c_entry: Main SPI program body
int | main (void)
void | check_failed (uint8_t *file, uint32_t line)

Variables

uint8_t | menu1 []
SPI_CFG_Type SPI_ConfigStruct
SPI_DATA_SETUP_Type xferConfig
uint8_t | sd_cmd_buf [SD_CMD_BLOCK_LENGTH]
uint8_t | sd_data_buf [SD_DATA_BLOCK_LENGTH]

Detailed Description

This example describes how to use SPI to read SD card's CID register.

Version:
1.0
Date:
16. July. 2010
Author:
NXP MCU SW Application Team
Copyright(C) 2010, NXP Semiconductor All rights reserved.

Software that is described herein is for illustrative purposes only which provides customers with programming information regarding the products. This software is supplied "AS IS" without any warranties. NXP Semiconductors assumes no responsibility or liability for the use of the software, conveys no license or title under any patent, copyright, or mask work right to the product. NXP Semiconductors reserves the right to make changes in the software without notification. NXP Semiconductors also make no representation or warranty that such application will be suitable for the specified use without further testing or modification.

Definition in file spi_sdcard.c.

Generated on Tue Jun 7 14:59:18 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/SPI/Slave/lpc17xx_libcfg.h File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/SPI/Slave/lpc17xx_libcfg.h File Reference

#include "lpc_types.h"

Go to the source code of this file.

Defines

#define | DEBUG
#define | _DBGFWK
#define | _GPIO
#define | _UART
#define | _UART0
#define | _SPI
#define | CHECK_PARAM(expr) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))

Functions

void | check_failed (uint8_t *file, uint32_t line)

Define Documentation

#define _DBGFWK

Definition at line 44 of file lpc17xx_libcfg.h.

#define _GPIO

Definition at line 47 of file lpc17xx_libcfg.h.

#define _SPI

Definition at line 60 of file lpc17xx_libcfg.h.

#define _UART

Definition at line 53 of file lpc17xx_libcfg.h.

#define _UART0

Definition at line 54 of file lpc17xx_libcfg.h.

#define CHECK_PARAM ( expr ) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))

Definition at line 135 of file lpc17xx_libcfg.h.

#define DEBUG

Definition at line 36 of file lpc17xx_libcfg.h.

Generated on Tue Jun 7 14:59:10 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/SPI/Slave/spi_slave.c File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/SPI/Slave/spi_slave.c File Reference

This example describes how to use SPI in slave mode. More...

#include "lpc17xx_spi.h"
#include "lpc17xx_libcfg.h"
#include "lpc17xx_pinsel.h"
#include "debug_frmwrk.h"
#include "lpc17xx_gpio.h"

Go to the source code of this file.

Defines

#define | BUFFER_SIZE 0x40
#define | SPI_DATABIT_SIZE 10

Functions

void | print_menu (void)
Print Welcome menu.
void | Buffer_Init (void)
Initialize buffer.
void | Error_Loop (void)
Error Loop (called by Buffer_Verify() if any error).
void | Buffer_Verify (void)
Verify buffer.
int | c_entry (void)
c_entry: Main SPI program body
int | main (void)
void | check_failed (uint8_t *file, uint32_t line)

Variables

uint8_t | menu1 []
uint8_t | menu2 [] = "Demo terminated! \n\r"
SPI_CFG_Type SPI_ConfigStruct
uint16_t | Tx_Buf [BUFFER_SIZE]
uint16_t | Rx_Buf [BUFFER_SIZE]

Detailed Description

This example describes how to use SPI in slave mode.

Version:
2.0
Date:
21. May. 2010
Author:
NXP MCU SW Application Team
Copyright(C) 2010, NXP Semiconductor All rights reserved.

Software that is described herein is for illustrative purposes only which provides customers with programming information regarding the products. This software is supplied "AS IS" without any warranties. NXP Semiconductors assumes no responsibility or liability for the use of the software, conveys no license or title under any patent, copyright, or mask work right to the product. NXP Semiconductors reserves the right to make changes in the software without notification. NXP Semiconductors also make no representation or warranty that such application will be suitable for the specified use without further testing or modification.

Definition in file spi_slave.c.

Generated on Tue Jun 7 14:59:18 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/SSP/dma/lpc17xx_libcfg.h File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/SSP/dma/lpc17xx_libcfg.h File Reference

#include "lpc_types.h"

Go to the source code of this file.

Defines

#define | DEBUG
#define | _DBGFWK
#define | _UART
#define | _UART0
#define | _SSP
#define | _SSP0
#define | _SSP1
#define | _GPDMA
#define | CHECK_PARAM(expr) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))

Functions

void | check_failed (uint8_t *file, uint32_t line)

Define Documentation

#define _DBGFWK

Definition at line 44 of file lpc17xx_libcfg.h.

#define _GPDMA

Definition at line 84 of file lpc17xx_libcfg.h.

#define _SSP

Definition at line 63 of file lpc17xx_libcfg.h.

#define _SSP0

Definition at line 64 of file lpc17xx_libcfg.h.

#define _SSP1

Definition at line 65 of file lpc17xx_libcfg.h.

#define _UART

Definition at line 53 of file lpc17xx_libcfg.h.

#define _UART0

Definition at line 54 of file lpc17xx_libcfg.h.

#define CHECK_PARAM ( expr ) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))

Definition at line 136 of file lpc17xx_libcfg.h.

#define DEBUG

Definition at line 36 of file lpc17xx_libcfg.h.

Generated on Tue Jun 7 14:59:10 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/SSP/dma/ssp_dma.c File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/SSP/dma/ssp_dma.c File Reference

This example describes how to use SPP in Master mode with loop-back mode (MOSI <-> MISO), using DMA for both Tx and Rx channel. More...

#include "lpc17xx_ssp.h"
#include "lpc17xx_libcfg.h"
#include "lpc17xx_pinsel.h"
#include "lpc17xx_gpdma.h"
#include "debug_frmwrk.h"

Go to the source code of this file.

Defines

#define | DMA_DATA_SIZE 65

Functions

void | DMA_IRQHandler (void)
GPDMA interrupt handler sub-routine.
void | print_menu (void)
Print Welcome menu.
void | Buffer_Init (void)
Initialize buffer.
void | Buffer_Verify (void)
Verify buffer.
void | Error_Loop (void)
Error Loop (called by Buffer_Verify() if any error).
int | c_entry (void)
c_entry: Main SSP program body
int | main (void)
void | check_failed (uint8_t *file, uint32_t line)

Variables

uint8_t | menu1 []
uint8_t | menu2 [] = "Demo terminated! \n\r"
SSP_CFG_Type SSP_ConfigStruct
__IO uint32_t | Channel0_TC
__IO uint32_t | Channel0_Err
__IO uint32_t | Channel1_TC
__IO uint32_t | Channel1_Err
uint8_t | dma_src [DMA_DATA_SIZE]
uint8_t | dma_dst [DMA_DATA_SIZE]

Detailed Description

This example describes how to use SPP in Master mode with loop-back mode (MOSI <-> MISO), using DMA for both Tx and Rx channel.

Version:
2.0
Date:
21. May. 2010
Author:
NXP MCU SW Application Team
Copyright(C) 2010, NXP Semiconductor All rights reserved.

Software that is described herein is for illustrative purposes only which provides customers with programming information regarding the products. This software is supplied "AS IS" without any warranties. NXP Semiconductors assumes no responsibility or liability for the use of the software, conveys no license or title under any patent, copyright, or mask work right to the product. NXP Semiconductors reserves the right to make changes in the software without notification. NXP Semiconductors also make no representation or warranty that such application will be suitable for the specified use without further testing or modification.

Definition in file ssp_dma.c.

Generated on Tue Jun 7 14:59:18 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/SSP/Master/lpc17xx_libcfg.h File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/SSP/Master/lpc17xx_libcfg.h File Reference

#include "lpc_types.h"

Go to the source code of this file.

Defines

#define | DEBUG
#define | _DBGFWK
#define | _GPIO
#define | _UART
#define | _UART0
#define | _SSP
#define | _SSP0
#define | _SSP1
#define | CHECK_PARAM(expr) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))

Functions

void | check_failed (uint8_t *file, uint32_t line)

Define Documentation

#define _DBGFWK

Definition at line 44 of file lpc17xx_libcfg.h.

#define _GPIO

Definition at line 47 of file lpc17xx_libcfg.h.

#define _SSP

Definition at line 63 of file lpc17xx_libcfg.h.

#define _SSP0

Definition at line 64 of file lpc17xx_libcfg.h.

#define _SSP1

Definition at line 65 of file lpc17xx_libcfg.h.

#define _UART

Definition at line 53 of file lpc17xx_libcfg.h.

#define _UART0

Definition at line 54 of file lpc17xx_libcfg.h.

#define CHECK_PARAM ( expr ) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))

Definition at line 135 of file lpc17xx_libcfg.h.

#define DEBUG

Definition at line 36 of file lpc17xx_libcfg.h.

Generated on Tue Jun 7 14:59:10 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/SSP/Master/ssp_master.c File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/SSP/Master/ssp_master.c File Reference

This example describes how to use SPP in master mode. More...

#include "lpc17xx_ssp.h"
#include "lpc17xx_libcfg.h"
#include "lpc17xx_pinsel.h"
#include "debug_frmwrk.h"
#include "lpc17xx_gpio.h"

Go to the source code of this file.

Defines

#define | BUFFER_SIZE 0x40

Functions

void | print_menu (void)
Print Welcome menu.
void | Buffer_Init (void)
Initialize buffer.
void | Error_Loop (void)
Error Loop (called by Buffer_Verify() if any error).
void | Buffer_Verify (void)
Verify buffer.
int | c_entry (void)
c_entry: Main SSP program body
int | main (void)
void | check_failed (uint8_t *file, uint32_t line)

Variables

uint8_t | menu1 []
uint8_t | menu2 [] = "Demo terminated! \n\r"
SSP_CFG_Type SSP_ConfigStruct
uint8_t | Tx_Buf [BUFFER_SIZE]
uint8_t | Rx_Buf [BUFFER_SIZE]

Detailed Description

This example describes how to use SPP in master mode.

Version:
2.0
Date:
21. May. 2010
Author:
NXP MCU SW Application Team
Copyright(C) 2010, NXP Semiconductor All rights reserved.

Software that is described herein is for illustrative purposes only which provides customers with programming information regarding the products. This software is supplied "AS IS" without any warranties. NXP Semiconductors assumes no responsibility or liability for the use of the software, conveys no license or title under any patent, copyright, or mask work right to the product. NXP Semiconductors reserves the right to make changes in the software without notification. NXP Semiconductors also make no representation or warranty that such application will be suitable for the specified use without further testing or modification.

Definition in file ssp_master.c.

Generated on Tue Jun 7 14:59:18 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/SSP/MicroWire/lpc17xx_libcfg.h File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/SSP/MicroWire/lpc17xx_libcfg.h File Reference

#include "lpc_types.h"

Go to the source code of this file.

Defines

#define | DEBUG
#define | _DBGFWK
#define | _UART
#define | _UART0
#define | _SSP
#define | _SSP0
#define | _SSP1
#define | CHECK_PARAM(expr) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))

Functions

void | check_failed (uint8_t *file, uint32_t line)

Define Documentation

#define _DBGFWK

Definition at line 44 of file lpc17xx_libcfg.h.

#define _SSP

Definition at line 63 of file lpc17xx_libcfg.h.

#define _SSP0

Definition at line 64 of file lpc17xx_libcfg.h.

#define _SSP1

Definition at line 65 of file lpc17xx_libcfg.h.

#define _UART

Definition at line 53 of file lpc17xx_libcfg.h.

#define _UART0

Definition at line 54 of file lpc17xx_libcfg.h.

#define CHECK_PARAM ( expr ) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))

Definition at line 136 of file lpc17xx_libcfg.h.

#define DEBUG

Definition at line 36 of file lpc17xx_libcfg.h.

Generated on Tue Jun 7 14:59:11 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/SSP/MicroWire/microwire_test.c File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/SSP/MicroWire/microwire_test.c File Reference

This example describes how to use SPP peripheral in MicroWire frame format. More...

#include "lpc17xx_ssp.h"
#include "lpc17xx_libcfg.h"
#include "lpc17xx_pinsel.h"
#include "debug_frmwrk.h"

Go to the source code of this file.

Defines

#define | IDLE_CHAR 0xFF
#define | USEDSSPDEV_M 0
#define | USEDSSPDEV_S 1
#define | BUFFER_SIZE 0x40
#define | MicroWire_WR_CMD ((uint8_t)(0x00))
#define | MicroWire_RD_CMD ((uint8_t)(0x01))
#define | SSPDEV_M LPC_SSP0
#define | SSPDEV_S LPC_SSP1

Functions

void | ssp_MW_SendCMD (LPC_SSP_TypeDef *SSPx, uint8_t cmd)
Send command to slave in master mode.
uint16_t | ssp_MW_GetRSP (LPC_SSP_TypeDef *SSPx)
Get respond from slave after sending a command in master mode.
uint8_t | ssp_MW_GetCMD (LPC_SSP_TypeDef *SSPx)
Get command from master in slave mode.
void | ssp_MW_SendRSP (LPC_SSP_TypeDef *SSPx, uint16_t Rsp)
Send respond to master in slave mode.
void | print_menu (void)
Print Welcome menu.
void | Buffer_Init (void)
Initialize buffer.
void | Buffer_Verify (void)
Verify buffer.
void | Error_Loop (void)
Error Loop (called by Buffer_Verify() if any error).
int | c_entry (void)
c_entry: Main MICROWIRE program body
int | main (void)
void | check_failed (uint8_t *file, uint32_t line)

Variables

uint8_t * | pRdBuf_M
uint32_t | RdIdx_M
uint32_t | DatLen_M
uint8_t | Master_Rx_Buf [BUFFER_SIZE]
uint8_t * | pWrBuf_S
uint32_t | WrIdx_S
uint32_t | DatLen_S
uint8_t | Slave_Tx_Buf [BUFFER_SIZE]
uint8_t | Last_cmd
uint8_t | menu1 []
SSP_CFG_Type SSP_ConfigStruct

Detailed Description

This example describes how to use SPP peripheral in MicroWire frame format.

Version:
2.0
Date:
21. May. 2010
Author:
NXP MCU SW Application Team
Copyright(C) 2010, NXP Semiconductor All rights reserved.

Software that is described herein is for illustrative purposes only which provides customers with programming information regarding the products. This software is supplied "AS IS" without any warranties. NXP Semiconductors assumes no responsibility or liability for the use of the software, conveys no license or title under any patent, copyright, or mask work right to the product. NXP Semiconductors reserves the right to make changes in the software without notification. NXP Semiconductors also make no representation or warranty that such application will be suitable for the specified use without further testing or modification.

Definition in file microwire_test.c.

Generated on Tue Jun 7 14:59:18 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/SSP/sc16is750_int/lpc17xx_libcfg.h File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/SSP/sc16is750_int/lpc17xx_libcfg.h File Reference

#include "lpc_types.h"

Go to the source code of this file.

Defines

#define | DEBUG
#define | _DBGFWK
#define | _GPIO
#define | _UART
#define | _UART0
#define | _SSP
#define | CHECK_PARAM(expr) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))

Functions

void | check_failed (uint8_t *file, uint32_t line)

Define Documentation

#define _DBGFWK

Definition at line 44 of file lpc17xx_libcfg.h.

#define _GPIO

Definition at line 47 of file lpc17xx_libcfg.h.

#define _SSP

Definition at line 63 of file lpc17xx_libcfg.h.

#define _UART

Definition at line 53 of file lpc17xx_libcfg.h.

#define _UART0

Definition at line 54 of file lpc17xx_libcfg.h.

#define CHECK_PARAM ( expr ) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))

Definition at line 136 of file lpc17xx_libcfg.h.

#define DEBUG

Definition at line 36 of file lpc17xx_libcfg.h.

Generated on Tue Jun 7 14:59:11 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/SSP/sc16is750_int/sc16is750_int.c File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/SSP/sc16is750_int/sc16is750_int.c File Reference

This example describes how to use SPP using interrupt mode, SSP frame format to communicate with SC16IS750/760 Demo board. More...

#include "lpc17xx_ssp.h"
#include "lpc17xx_libcfg.h"
#include "lpc17xx_pinsel.h"
#include "debug_frmwrk.h"
#include "lpc17xx_gpio.h"

Go to the source code of this file.

Defines

#define | CS_PORT_NUM 0
#define | CS_PIN_NUM 16
#define | IDLE_CHAR 0xFF
#define | SC16IS740_WR_CMD(x) ((uint8_t) (x << 3))
#define | SC16IS740_RD_CMD(x) ((uint8_t) ((x << 3) | 0x80))
#define | SC16IS740_IODIR_REG 0x0A
#define | SC16IS740_IOSTATE_REG 0x0B
#define | SC16IS740_IOCON_REG 0x0E

Functions

void | SSP0_IRQHandler (void)
SSP0 Interrupt used for reading and writing handler.
void | CS_Init (void)
Initialize CS pin as GPIO function to drive /CS pin due to definition of CS_PORT_NUM and CS_PORT_NUM.
void | CS_Force (int32_t state)
Drive CS output pin to low/high level to select slave device via /CS pin state.
void | print_menu (void)
Print Welcome menu.
int | c_entry (void)
c_entry: Main SSP program body
int | main (void)
void | check_failed (uint8_t *file, uint32_t line)

Variables

uint8_t | menu1 []
uint8_t | menu2 [] = "Demo terminated! \n\r"
uint8_t | iocon_cfg [2] = {SC16IS740_WR_CMD(SC16IS740_IOCON_REG), 0x00}
uint8_t | iodir_cfg [2] = {SC16IS740_WR_CMD(SC16IS740_IODIR_REG), 0xFF}
uint8_t | iostate_on [2] = {SC16IS740_WR_CMD(SC16IS740_IOSTATE_REG), 0x00}
uint8_t | iostate_off [2] = {SC16IS740_WR_CMD(SC16IS740_IOSTATE_REG), 0xFF}
uint8_t | sspreadbuf [2]
__IO FlagStatus | complete
SSP_CFG_Type SSP_ConfigStruct
SSP_DATA_SETUP_Type xferConfig

Detailed Description

This example describes how to use SPP using interrupt mode, SSP frame format to communicate with SC16IS750/760 Demo board.

Version:
2.0
Date:
21. May. 2010
Author:
NXP MCU SW Application Team
Copyright(C) 2010, NXP Semiconductor All rights reserved.

Software that is described herein is for illustrative purposes only which provides customers with programming information regarding the products. This software is supplied "AS IS" without any warranties. NXP Semiconductors assumes no responsibility or liability for the use of the software, conveys no license or title under any patent, copyright, or mask work right to the product. NXP Semiconductors reserves the right to make changes in the software without notification. NXP Semiconductors also make no representation or warranty that such application will be suitable for the specified use without further testing or modification.

Definition in file sc16is750_int.c.

Generated on Tue Jun 7 14:59:18 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/SSP/sc16is750_polling/lpc17xx_libcfg.h File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/SSP/sc16is750_polling/lpc17xx_libcfg.h File Reference

#include "lpc_types.h"

Go to the source code of this file.

Defines

#define | DEBUG
#define | _DBGFWK
#define | _GPIO
#define | _UART
#define | _UART0
#define | _SSP
#define | CHECK_PARAM(expr) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))

Functions

void | check_failed (uint8_t *file, uint32_t line)

Define Documentation

#define _DBGFWK

Definition at line 43 of file lpc17xx_libcfg.h.

#define _GPIO

Definition at line 46 of file lpc17xx_libcfg.h.

#define _SSP

Definition at line 62 of file lpc17xx_libcfg.h.

#define _UART

Definition at line 52 of file lpc17xx_libcfg.h.

#define _UART0

Definition at line 53 of file lpc17xx_libcfg.h.

#define CHECK_PARAM ( expr ) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))

Definition at line 134 of file lpc17xx_libcfg.h.

#define DEBUG

Definition at line 35 of file lpc17xx_libcfg.h.

Generated on Tue Jun 7 14:59:11 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/SSP/sc16is750_polling/sc16is750_polling.c File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/SSP/sc16is750_polling/sc16is750_polling.c File Reference

This example describes how to use SPP using polling mode, SSP frame format to communicate with SC16IS750/760 Demo board. More...

#include "lpc17xx_ssp.h"
#include "lpc17xx_libcfg.h"
#include "lpc17xx_pinsel.h"
#include "debug_frmwrk.h"
#include "lpc17xx_gpio.h"

Go to the source code of this file.

Defines

#define | CS_PORT_NUM 0
#define | CS_PIN_NUM 16
#define | SC16IS740_WR_CMD(x) ((uint8_t) (x << 3))
#define | SC16IS740_RD_CMD(x) ((uint8_t) ((x << 3) | 0x80))
#define | SC16IS740_IODIR_REG 0x0A
#define | SC16IS740_IOSTATE_REG 0x0B
#define | SC16IS740_IOCON_REG 0x0E

Functions

void | CS_Init (void)
Initialize CS pin as GPIO function to drive /CS pin due to definition of CS_PORT_NUM and CS_PORT_NUM.
void | CS_Force (int32_t state)
Drive CS output pin to low/high level to select slave device via /CS pin state.
void | print_menu (void)
Print Welcome menu.
int | c_entry (void)
c_entry: Main SSP program body
int | main (void)
void | check_failed (uint8_t *file, uint32_t line)

Variables

uint8_t | menu1 []
uint8_t | menu2 [] = "Demo terminated! \n\r"
SSP_CFG_Type SSP_ConfigStruct
uint8_t | iocon_cfg [2] = {SC16IS740_WR_CMD(SC16IS740_IOCON_REG), 0x00}
uint8_t | iodir_cfg [2] = {SC16IS740_WR_CMD(SC16IS740_IODIR_REG), 0xFF}
uint8_t | iostate_on [2] = {SC16IS740_WR_CMD(SC16IS740_IOSTATE_REG), 0x00}
uint8_t | iostate_off [2] = {SC16IS740_WR_CMD(SC16IS740_IOSTATE_REG), 0xFF}
uint8_t | sspreadbuf [2]

Detailed Description

This example describes how to use SPP using polling mode, SSP frame format to communicate with SC16IS750/760 Demo board.

Version:
2.0
Date:
21. May. 2010
Author:
NXP MCU SW Application Team
Copyright(C) 2010, NXP Semiconductor All rights reserved.

Software that is described herein is for illustrative purposes only which provides customers with programming information regarding the products. This software is supplied "AS IS" without any warranties. NXP Semiconductors assumes no responsibility or liability for the use of the software, conveys no license or title under any patent, copyright, or mask work right to the product. NXP Semiconductors reserves the right to make changes in the software without notification. NXP Semiconductors also make no representation or warranty that such application will be suitable for the specified use without further testing or modification.

Definition in file sc16is750_polling.c.

Generated on Tue Jun 7 14:59:19 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/SSP/Slave/lpc17xx_libcfg.h File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/SSP/Slave/lpc17xx_libcfg.h File Reference

#include "lpc_types.h"

Go to the source code of this file.

Defines

#define | DEBUG
#define | _DBGFWK
#define | _GPIO
#define | _UART
#define | _UART0
#define | _SSP
#define | CHECK_PARAM(expr) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))

Functions

void | check_failed (uint8_t *file, uint32_t line)

Define Documentation

#define _DBGFWK

Definition at line 44 of file lpc17xx_libcfg.h.

#define _GPIO

Definition at line 47 of file lpc17xx_libcfg.h.

#define _SSP

Definition at line 63 of file lpc17xx_libcfg.h.

#define _UART

Definition at line 53 of file lpc17xx_libcfg.h.

#define _UART0

Definition at line 54 of file lpc17xx_libcfg.h.

#define CHECK_PARAM ( expr ) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))

Definition at line 135 of file lpc17xx_libcfg.h.

#define DEBUG

Definition at line 36 of file lpc17xx_libcfg.h.

Generated on Tue Jun 7 14:59:11 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/SSP/Slave/ssp_slave.c File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/SSP/Slave/ssp_slave.c File Reference

This example describes how to use SPP in slave mode. More...

#include "lpc17xx_ssp.h"
#include "lpc17xx_libcfg.h"
#include "lpc17xx_pinsel.h"
#include "debug_frmwrk.h"
#include "lpc17xx_gpio.h"

Go to the source code of this file.

Defines

#define | BUFFER_SIZE 0x40

Functions

void | SSP0_IRQHandler (void)
SSP0 Interrupt used for reading and writing handler.
void | print_menu (void)
Print Welcome menu.
void | Buffer_Init (void)
Initialize buffer.
void | Error_Loop (void)
Error Loop (called by Buffer_Verify() if any error).
void | Buffer_Verify (void)
Verify buffer.
int | c_entry (void)
c_entry: Main SSP program body
int | main (void)
void | check_failed (uint8_t *file, uint32_t line)

Variables

uint8_t | menu1 []
uint8_t | menu2 [] = "Demo terminated! \n\r"
SSP_CFG_Type SSP_ConfigStruct
SSP_DATA_SETUP_Type xferConfig
uint8_t | Tx_Buf [BUFFER_SIZE]
uint8_t | Rx_Buf [BUFFER_SIZE]
__IO FlagStatus | complete

Detailed Description

This example describes how to use SPP in slave mode.

Version:
2.0
Date:
21. May. 2010
Author:
NXP MCU SW Application Team
Copyright(C) 2010, NXP Semiconductor All rights reserved.

Software that is described herein is for illustrative purposes only which provides customers with programming information regarding the products. This software is supplied "AS IS" without any warranties. NXP Semiconductors assumes no responsibility or liability for the use of the software, conveys no license or title under any patent, copyright, or mask work right to the product. NXP Semiconductors reserves the right to make changes in the software without notification. NXP Semiconductors also make no representation or warranty that such application will be suitable for the specified use without further testing or modification.

Definition in file ssp_slave.c.

Generated on Tue Jun 7 14:59:19 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/SSP/TI/lpc17xx_libcfg.h File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/SSP/TI/lpc17xx_libcfg.h File Reference

#include "lpc_types.h"

Go to the source code of this file.

Defines

#define | DEBUG
#define | _DBGFWK
#define | _UART
#define | _UART0
#define | _SSP
#define | _SSP0
#define | _SSP1
#define | CHECK_PARAM(expr) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))

Functions

void | check_failed (uint8_t *file, uint32_t line)

Define Documentation

#define _DBGFWK

Definition at line 44 of file lpc17xx_libcfg.h.

#define _SSP

Definition at line 63 of file lpc17xx_libcfg.h.

#define _SSP0

Definition at line 64 of file lpc17xx_libcfg.h.

#define _SSP1

Definition at line 65 of file lpc17xx_libcfg.h.

#define _UART

Definition at line 53 of file lpc17xx_libcfg.h.

#define _UART0

Definition at line 54 of file lpc17xx_libcfg.h.

#define CHECK_PARAM ( expr ) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))

Definition at line 136 of file lpc17xx_libcfg.h.

#define DEBUG

Definition at line 36 of file lpc17xx_libcfg.h.

Generated on Tue Jun 7 14:59:11 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/SSP/TI/ti_test.c File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/SSP/TI/ti_test.c File Reference

This example describes how to use SPP using TI frame format (interrupt mode). More...

#include "lpc17xx_ssp.h"
#include "lpc17xx_libcfg.h"
#include "lpc17xx_pinsel.h"
#include "debug_frmwrk.h"

Go to the source code of this file.

Defines

#define | IDLE_CHAR 0xFF
#define | USEDSSPDEV_M 0
#define | USEDSSPDEV_S 1
#define | BUFFER_SIZE 0x40
#define | SSPDEV_M LPC_SSP0
#define | SSPDEV_S LPC_SSP1

Functions

void | SSP0_IRQHandler (void)
SSP0 Interrupt used for reading and writing handler.
void | SSP1_IRQHandler (void)
SSP1 Interrupt used for reading and writing handler.
void | ssp_Master_IntHandler (void)
SSP Master Interrupt sub-routine used for reading and writing handler.
void | ssp_Slave_IntHandler (void)
SSP Slave Interrupt sub-routine used for reading and writing handler.
int32_t | ssp_MasterReadWrite (LPC_SSP_TypeDef *SSPx, void *rbuffer, void *wbuffer, uint32_t length)
SSP Read write in polling mode function (Master mode).
int32_t | ssp_SlaveReadWrite (LPC_SSP_TypeDef *SSPx, void *rbuffer, void *wbuffer, uint32_t length)
SSP Read write in polling mode function (Slave mode).
void | print_menu (void)
Print Welcome menu.
void | Buffer_Init (void)
Initialize buffer.
void | Buffer_Verify (void)
Verify buffer.
void | Error_Loop (void)
Error Loop (called by Buffer_Verify() if any error).
int | c_entry (void)
c_entry: Main TI program body
int | main (void)
void | check_failed (uint8_t *file, uint32_t line)

Variables

uint8_t | menu1 []
uint8_t | menu2 [] = "Demo terminated! \n\r"
SSP_CFG_Type SSP_ConfigStruct
uint8_t * | pRdBuf_M
uint8_t * | pWrBuf_M
uint32_t | RdIdx_M
uint32_t | WrIdx_M
uint32_t | DatLen_M
__IO Bool | complete_M
uint8_t | Master_Tx_Buf [BUFFER_SIZE]
uint8_t | Master_Rx_Buf [BUFFER_SIZE]
uint8_t * | pRdBuf_S
uint8_t * | pWrBuf_S
uint32_t | RdIdx_S
uint32_t | WrIdx_S
uint32_t | DatLen_S
__IO Bool | complete_S
uint8_t | Slave_Tx_Buf [BUFFER_SIZE]
uint8_t | Slave_Rx_Buf [BUFFER_SIZE]

Detailed Description

This example describes how to use SPP using TI frame format (interrupt mode).

Version:
2.0
Date:
21. May. 2010
Author:
NXP MCU SW Application Team
Copyright(C) 2010, NXP Semiconductor All rights reserved.

Software that is described herein is for illustrative purposes only which provides customers with programming information regarding the products. This software is supplied "AS IS" without any warranties. NXP Semiconductors assumes no responsibility or liability for the use of the software, conveys no license or title under any patent, copyright, or mask work right to the product. NXP Semiconductors reserves the right to make changes in the software without notification. NXP Semiconductors also make no representation or warranty that such application will be suitable for the specified use without further testing or modification.

Definition in file ti_test.c.

Generated on Tue Jun 7 14:59:19 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/SysTick/10ms_base/10ms_base.c File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/SysTick/10ms_base/10ms_base.c File Reference

This example describes how to configure System Tick to generate interrupt each 10ms. More...

#include "lpc17xx_libcfg.h"
#include "lpc17xx_gpio.h"
#include "lpc17xx_systick.h"

Go to the source code of this file.

Functions

void | SysTick_Handler (void)
SysTick interrupt handler.
int | c_entry (void)
c_entry: Main program body
int | main (void)
void | check_failed (uint8_t *file, uint32_t line)

Variables

FunctionalState | Cur_State = ENABLE

Detailed Description

This example describes how to configure System Tick to generate interrupt each 10ms.

Version:
2.0
Date:
21. May. 2010
Author:
NXP MCU SW Application Team
Copyright(C) 2010, NXP Semiconductor All rights reserved.

Software that is described herein is for illustrative purposes only which provides customers with programming information regarding the products. This software is supplied "AS IS" without any warranties. NXP Semiconductors assumes no responsibility or liability for the use of the software, conveys no license or title under any patent, copyright, or mask work right to the product. NXP Semiconductors reserves the right to make changes in the software without notification. NXP Semiconductors also make no representation or warranty that such application will be suitable for the specified use without further testing or modification.

Definition in file 10ms_base.c.

Generated on Tue Jun 7 14:59:19 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/SysTick/10ms_base/lpc17xx_libcfg.h File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/SysTick/10ms_base/lpc17xx_libcfg.h File Reference

#include "lpc_types.h"

Go to the source code of this file.

Defines

#define | DEBUG
#define | _GPIO
#define | _SYSTICK
#define | CHECK_PARAM(expr) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))

Functions

void | check_failed (uint8_t *file, uint32_t line)

Define Documentation

#define _GPIO

Definition at line 46 of file lpc17xx_libcfg.h.

#define _SYSTICK

Definition at line 67 of file lpc17xx_libcfg.h.

#define CHECK_PARAM ( expr ) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))

Definition at line 134 of file lpc17xx_libcfg.h.

#define DEBUG

Definition at line 35 of file lpc17xx_libcfg.h.

Generated on Tue Jun 7 14:59:11 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/SysTick/STCLK/lpc17xx_libcfg.h File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/SysTick/STCLK/lpc17xx_libcfg.h File Reference

#include "lpc_types.h"

Go to the source code of this file.

Defines

#define | DEBUG
#define | _GPIO
#define | _SYSTICK
#define | _TIM
#define | _RIT
#define | CHECK_PARAM(expr) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))

Functions

void | check_failed (uint8_t *file, uint32_t line)

Define Documentation

#define _GPIO

Definition at line 46 of file lpc17xx_libcfg.h.

#define _RIT

Definition at line 117 of file lpc17xx_libcfg.h.

#define _SYSTICK

Definition at line 67 of file lpc17xx_libcfg.h.

#define _TIM

Definition at line 76 of file lpc17xx_libcfg.h.

#define CHECK_PARAM ( expr ) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))

Definition at line 134 of file lpc17xx_libcfg.h.

#define DEBUG

Definition at line 35 of file lpc17xx_libcfg.h.

Generated on Tue Jun 7 14:59:11 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/SysTick/STCLK/systick_stclk.c File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/SysTick/STCLK/systick_stclk.c File Reference

This example describes how to configure System Tick to use with external clock source STCLK. More...

#include "lpc17xx_libcfg.h"
#include "lpc17xx_gpio.h"
#include "lpc17xx_systick.h"
#include "lpc17xx_pinsel.h"
#include "lpc17xx_timer.h"

Go to the source code of this file.

Functions

void | SysTick_Handler (void)
SysTick interrupt handler.
int | c_entry (void)
c_entry: Main program body
int | main (void)
void | check_failed (uint8_t *file, uint32_t line)

Variables

FunctionalState | Cur_State = ENABLE
Bool | IO_State = FALSE

Detailed Description

This example describes how to configure System Tick to use with external clock source STCLK.

Version:
2.0
Date:
21. May. 2010
Author:
NXP MCU SW Application Team
Copyright(C) 2010, NXP Semiconductor All rights reserved.

Software that is described herein is for illustrative purposes only which provides customers with programming information regarding the products. This software is supplied "AS IS" without any warranties. NXP Semiconductors assumes no responsibility or liability for the use of the software, conveys no license or title under any patent, copyright, or mask work right to the product. NXP Semiconductors reserves the right to make changes in the software without notification. NXP Semiconductors also make no representation or warranty that such application will be suitable for the specified use without further testing or modification.

Definition in file systick_stclk.c.

Generated on Tue Jun 7 14:59:19 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/TIMER/Capture/lpc17xx_libcfg.h File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/TIMER/Capture/lpc17xx_libcfg.h File Reference

#include "lpc_types.h"

Go to the source code of this file.

Defines

#define | DEBUG
#define | _DBGFWK
#define | _UART
#define | _UART0
#define | _TIM
#define | CHECK_PARAM(expr) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))

Functions

void | check_failed (uint8_t *file, uint32_t line)

Define Documentation

#define _DBGFWK

Definition at line 44 of file lpc17xx_libcfg.h.

#define _TIM

Definition at line 77 of file lpc17xx_libcfg.h.

#define _UART

Definition at line 53 of file lpc17xx_libcfg.h.

#define _UART0

Definition at line 54 of file lpc17xx_libcfg.h.

#define CHECK_PARAM ( expr ) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))

Definition at line 135 of file lpc17xx_libcfg.h.

#define DEBUG

Definition at line 36 of file lpc17xx_libcfg.h.

Generated on Tue Jun 7 14:59:11 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/TIMER/Capture/timer_capture.c File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/TIMER/Capture/timer_capture.c File Reference

This example describes how to use TIMER capture function. More...

#include "lpc17xx_timer.h"
#include "lpc17xx_libcfg.h"
#include "lpc17xx_pinsel.h"
#include "debug_frmwrk.h"
#include "lpc17xx_gpio.h"

Go to the source code of this file.

Functions

void | TIMER0_IRQHandler (void)
TIMER0 interrupt handler sub-routine.
void | TIMER1_IRQHandler (void)
TIMER1 interrupt handler sub-routine.
void | print_menu (void)
Print menu.
int | c_entry (void)
c_entry: Main TIMER program body
int | main (void)
void | check_failed (uint8_t *file, uint32_t line)

Variables

uint8_t | menu1 []
UART_CFG_Type UARTConfigStruct
uint32_t | MatchCount
TIM_TIMERCFG_Type TIM_ConfigStruct
TIM_MATCHCFG_Type TIM_MatchConfigStruct
TIM_CAPTURECFG_Type TIM_CaptureConfigStruct
uint8_t volatile | timer0_flag = FALSE
uint8_t volatile | timer1_flag = FALSE

Detailed Description

This example describes how to use TIMER capture function.

Version:
2.0
Date:
21. May. 2010
Author:
NXP MCU SW Application Team
Copyright(C) 2010, NXP Semiconductor All rights reserved.

Software that is described herein is for illustrative purposes only which provides customers with programming information regarding the products. This software is supplied "AS IS" without any warranties. NXP Semiconductors assumes no responsibility or liability for the use of the software, conveys no license or title under any patent, copyright, or mask work right to the product. NXP Semiconductors reserves the right to make changes in the software without notification. NXP Semiconductors also make no representation or warranty that such application will be suitable for the specified use without further testing or modification.

Definition in file timer_capture.c.

Generated on Tue Jun 7 14:59:19 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/TIMER/FreqMeasure/freqmeasure.c File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/TIMER/FreqMeasure/freqmeasure.c File Reference

This example describes how to use Timer to measure a signal's frequency. More...

#include "lpc17xx_timer.h"
#include "lpc17xx_libcfg.h"
#include "lpc17xx_pinsel.h"
#include "debug_frmwrk.h"

Go to the source code of this file.

Functions

void | TIMER0_IRQHandler (void)
TIMER0 interrupt handler sub-routine.
void | print_menu (void)
Print menu.
int | c_entry (void)
c_entry: Main TIMER program body
int | main (void)
void | check_failed (uint8_t *file, uint32_t line)

Variables

uint8_t | menu1 []
TIM_TIMERCFG_Type TIM_ConfigStruct
TIM_CAPTURECFG_Type TIM_CaptureConfigStruct
BOOL_8 first_capture
BOOL_8 done
uint32_t | capture
uint8_t | count = 0

Detailed Description

This example describes how to use Timer to measure a signal's frequency.

Version:
1.0
Date:
16. July. 2010
Author:
NXP MCU SW Application Team
Copyright(C) 2010, NXP Semiconductor All rights reserved.

Software that is described herein is for illustrative purposes only which provides customers with programming information regarding the products. This software is supplied "AS IS" without any warranties. NXP Semiconductors assumes no responsibility or liability for the use of the software, conveys no license or title under any patent, copyright, or mask work right to the product. NXP Semiconductors reserves the right to make changes in the software without notification. NXP Semiconductors also make no representation or warranty that such application will be suitable for the specified use without further testing or modification.

Definition in file freqmeasure.c.

Generated on Tue Jun 7 14:59:19 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/TIMER/FreqMeasure/lpc17xx_libcfg.h File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/TIMER/FreqMeasure/lpc17xx_libcfg.h File Reference

#include "lpc_types.h"

Go to the source code of this file.

Defines

#define | DEBUG
#define | _DBGFWK
#define | _UART
#define | _UART0
#define | _TIM
#define | CHECK_PARAM(expr) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))

Functions

void | check_failed (uint8_t *file, uint32_t line)

Define Documentation

#define _DBGFWK

Definition at line 44 of file lpc17xx_libcfg.h.

#define _TIM

Definition at line 77 of file lpc17xx_libcfg.h.

#define _UART

Definition at line 53 of file lpc17xx_libcfg.h.

#define _UART0

Definition at line 54 of file lpc17xx_libcfg.h.

#define CHECK_PARAM ( expr ) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))

Definition at line 135 of file lpc17xx_libcfg.h.

#define DEBUG

Definition at line 36 of file lpc17xx_libcfg.h.

Generated on Tue Jun 7 14:59:11 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/TIMER/Gen_Diff_Delay/gen_diff_delay.c File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/TIMER/Gen_Diff_Delay/gen_diff_delay.c File Reference

This example describes how to use TIMER0 and TIMER2 to generate 2 different delay signals. More...

#include "lpc17xx_timer.h"
#include "lpc17xx_libcfg.h"
#include "lpc17xx_pinsel.h"
#include "debug_frmwrk.h"

Go to the source code of this file.

Functions

void | print_menu (void)
Print menu.
void | TIMER0_IRQHandler (void)
TIMER0 IRQ Handler.
int | c_entry (void)
c_entry: Main TIMER program body
int | main (void)
void | check_failed (uint8_t *file, uint32_t line)

Variables

uint8_t | menu1 []
BOOL_8 | toggle = TRUE
uint32_t | T1
uint32_t | T2

Detailed Description

This example describes how to use TIMER0 and TIMER2 to generate 2 different delay signals.

Version:
1.0
Date:
16. July. 2010
Author:
NXP MCU SW Application Team
Copyright(C) 2010, NXP Semiconductor All rights reserved.

Software that is described herein is for illustrative purposes only which provides customers with programming information regarding the products. This software is supplied "AS IS" without any warranties. NXP Semiconductors assumes no responsibility or liability for the use of the software, conveys no license or title under any patent, copyright, or mask work right to the product. NXP Semiconductors reserves the right to make changes in the software without notification. NXP Semiconductors also make no representation or warranty that such application will be suitable for the specified use without further testing or modification.

Definition in file gen_diff_delay.c.

Generated on Tue Jun 7 14:59:19 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/TIMER/Gen_Diff_Delay/lpc17xx_libcfg.h File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/TIMER/Gen_Diff_Delay/lpc17xx_libcfg.h File Reference

#include "lpc_types.h"

Go to the source code of this file.

Defines

#define | DEBUG
#define | _DBGFWK
#define | _UART
#define | _UART0
#define | _TIM
#define | CHECK_PARAM(expr) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))

Functions

void | check_failed (uint8_t *file, uint32_t line)

Define Documentation

#define _DBGFWK

Definition at line 43 of file lpc17xx_libcfg.h.

#define _TIM

Definition at line 76 of file lpc17xx_libcfg.h.

#define _UART

Definition at line 52 of file lpc17xx_libcfg.h.

#define _UART0

Definition at line 53 of file lpc17xx_libcfg.h.

#define CHECK_PARAM ( expr ) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))

Definition at line 134 of file lpc17xx_libcfg.h.

#define DEBUG

Definition at line 35 of file lpc17xx_libcfg.h.

Generated on Tue Jun 7 14:59:11 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/TIMER/Gen_Diff_Freqs/gen_diff_freqs.c File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/TIMER/Gen_Diff_Freqs/gen_diff_freqs.c File Reference

This example describes how to use TIMER0 and TIMER2 to generate 2 different frequency signals. More...

#include "lpc17xx_timer.h"
#include "lpc17xx_libcfg.h"
#include "lpc17xx_pinsel.h"
#include "debug_frmwrk.h"

Go to the source code of this file.

Functions

void | print_menu (void)
Print menu.
int | c_entry (void)
c_entry: Main TIMER program body
int | main (void)
void | check_failed (uint8_t *file, uint32_t line)

Variables

uint8_t | menu1 []

Detailed Description

This example describes how to use TIMER0 and TIMER2 to generate 2 different frequency signals.

Version:
2.0
Date:
16. July. 2010
Author:
NXP MCU SW Application Team
Copyright(C) 2010, NXP Semiconductor All rights reserved.

Software that is described herein is for illustrative purposes only which provides customers with programming information regarding the products. This software is supplied "AS IS" without any warranties. NXP Semiconductors assumes no responsibility or liability for the use of the software, conveys no license or title under any patent, copyright, or mask work right to the product. NXP Semiconductors reserves the right to make changes in the software without notification. NXP Semiconductors also make no representation or warranty that such application will be suitable for the specified use without further testing or modification.

Definition in file gen_diff_freqs.c.

Generated on Tue Jun 7 14:59:19 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/TIMER/Gen_Diff_Freqs/lpc17xx_libcfg.h File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/TIMER/Gen_Diff_Freqs/lpc17xx_libcfg.h File Reference

#include "lpc_types.h"

Go to the source code of this file.

Defines

#define | DEBUG
#define | _DBGFWK
#define | _UART
#define | _UART0
#define | _TIM
#define | CHECK_PARAM(expr) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))

Functions

void | check_failed (uint8_t *file, uint32_t line)

Define Documentation

#define _DBGFWK

Definition at line 44 of file lpc17xx_libcfg.h.

#define _TIM

Definition at line 77 of file lpc17xx_libcfg.h.

#define _UART

Definition at line 53 of file lpc17xx_libcfg.h.

#define _UART0

Definition at line 54 of file lpc17xx_libcfg.h.

#define CHECK_PARAM ( expr ) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))

Definition at line 135 of file lpc17xx_libcfg.h.

#define DEBUG

Definition at line 36 of file lpc17xx_libcfg.h.

Generated on Tue Jun 7 14:59:11 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/TIMER/Interrupt_Match/lpc17xx_libcfg.h File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/TIMER/Interrupt_Match/lpc17xx_libcfg.h File Reference

#include "lpc_types.h"

Go to the source code of this file.

Defines

#define | DEBUG
#define | _DBGFWK
#define | _GPIO
#define | _UART
#define | _UART0
#define | _TIM
#define | CHECK_PARAM(expr) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))

Functions

void | check_failed (uint8_t *file, uint32_t line)

Define Documentation

#define _DBGFWK

Definition at line 43 of file lpc17xx_libcfg.h.

#define _GPIO

Definition at line 46 of file lpc17xx_libcfg.h.

#define _TIM

Definition at line 76 of file lpc17xx_libcfg.h.

#define _UART

Definition at line 52 of file lpc17xx_libcfg.h.

#define _UART0

Definition at line 53 of file lpc17xx_libcfg.h.

#define CHECK_PARAM ( expr ) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))

Definition at line 134 of file lpc17xx_libcfg.h.

#define DEBUG

Definition at line 36 of file lpc17xx_libcfg.h.

Generated on Tue Jun 7 14:59:11 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/TIMER/Interrupt_Match/timer_int_match.c File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/TIMER/Interrupt_Match/timer_int_match.c File Reference

#include "lpc17xx_timer.h"
#include "lpc17xx_libcfg.h"
#include "lpc17xx_pinsel.h"
#include "lpc17xx_gpio.h"
#include "debug_frmwrk.h"

Go to the source code of this file.

Functions

void | TIMER0_IRQHandler (void)
TIMER0 interrupt handler sub-routine.
void | print_menu (void)
Print menu.
int | c_entry (void)
c_entry: Main TIMER program body
int | main (void)
void | check_failed (uint8_t *file, uint32_t line)

Variables

uint8_t | menu1 []
TIM_TIMERCFG_Type TIM_ConfigStruct
TIM_MATCHCFG_Type TIM_MatchConfigStruct
uint8_t volatile | timer0_flag = FALSE
uint8_t volatile | timer1_flag = FALSE
FunctionalState | LEDStatus = ENABLE

Generated on Tue Jun 7 14:59:19 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/TIMER/Polling_Match/lpc17xx_libcfg.h File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/TIMER/Polling_Match/lpc17xx_libcfg.h File Reference

#include "lpc_types.h"

Go to the source code of this file.

Defines

#define | DEBUG
#define | _DBGFWK
#define | _UART
#define | _UART0
#define | _TIM
#define | CHECK_PARAM(expr) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))

Functions

void | check_failed (uint8_t *file, uint32_t line)

Define Documentation

#define _DBGFWK

Definition at line 44 of file lpc17xx_libcfg.h.

#define _TIM

Definition at line 77 of file lpc17xx_libcfg.h.

#define _UART

Definition at line 53 of file lpc17xx_libcfg.h.

#define _UART0

Definition at line 54 of file lpc17xx_libcfg.h.

#define CHECK_PARAM ( expr ) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))

Definition at line 135 of file lpc17xx_libcfg.h.

#define DEBUG

Definition at line 36 of file lpc17xx_libcfg.h.

Generated on Tue Jun 7 14:59:11 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/TIMER/Polling_Match/timer_poll_match.c File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/TIMER/Polling_Match/timer_poll_match.c File Reference

#include "lpc17xx_timer.h"
#include "lpc17xx_libcfg.h"
#include "lpc17xx_pinsel.h"
#include "debug_frmwrk.h"

Go to the source code of this file.

Functions

void | print_menu (void)
Print menu.
int | c_entry (void)
c_entry: Main TIMER program body
int | main (void)
void | check_failed (uint8_t *file, uint32_t line)

Variables

uint8_t | menu1 []
TIM_TIMERCFG_Type TIM_ConfigStruct
TIM_MATCHCFG_Type TIM_MatchConfigStruct

Generated on Tue Jun 7 14:59:19 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/TIMER/PWMSignal/lpc17xx_libcfg.h File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/TIMER/PWMSignal/lpc17xx_libcfg.h File Reference

#include "lpc_types.h"

Go to the source code of this file.

Defines

#define | DEBUG
#define | _DBGFWK
#define | _GPIO
#define | _UART
#define | _UART0
#define | _TIM
#define | CHECK_PARAM(expr) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))

Functions

void | check_failed (uint8_t *file, uint32_t line)

Define Documentation

#define _DBGFWK

Definition at line 44 of file lpc17xx_libcfg.h.

#define _GPIO

Definition at line 47 of file lpc17xx_libcfg.h.

#define _TIM

Definition at line 77 of file lpc17xx_libcfg.h.

#define _UART

Definition at line 53 of file lpc17xx_libcfg.h.

#define _UART0

Definition at line 54 of file lpc17xx_libcfg.h.

#define CHECK_PARAM ( expr ) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))

Definition at line 135 of file lpc17xx_libcfg.h.

#define DEBUG

Definition at line 36 of file lpc17xx_libcfg.h.

Generated on Tue Jun 7 14:59:11 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/TIMER/PWMSignal/pwm_signal.c File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/TIMER/PWMSignal/pwm_signal.c File Reference

This example use TIMERs to generate 4 PWM signals with different duty cycle. More...

#include "lpc17xx_libcfg.h"
#include "debug_frmwrk.h"
#include "lpc17xx_gpio.h"
#include "lpc17xx_pinsel.h"
#include "lpc17xx_timer.h"

Go to the source code of this file.

Functions

void | TIMER0_IRQHandler (void)
TIMER0 interrupt handler.
void | TIMER1_IRQHandler (void)
TIMER1 interrupt handler.
void | TIMER2_IRQHandler (void)
TIMER2 interrupt handler.
void | TIMER3_IRQHandler (void)
TIMER3 interrupt handler.
void | print_menu (void)
Print Welcome menu.
int | c_entry (void)
c_entry: Main TIMER program body
int | main (void)
void | check_failed (uint8_t *file, uint32_t line)

Variables

uint8_t | menu []
FunctionalState | PWM0_State = ENABLE
FunctionalState | PWM1_State = ENABLE
FunctionalState | PWM2_State = ENABLE
FunctionalState | PWM3_State = ENABLE
TIM_TIMERCFG_Type TIM_ConfigStruct
TIM_MATCHCFG_Type TIM_MatchConfigStruct

Detailed Description

This example use TIMERs to generate 4 PWM signals with different duty cycle.

Version:
2.0
Date:
21. May. 2010
Author:
NXP MCU SW Application Team
Copyright(C) 2010, NXP Semiconductor All rights reserved.

Software that is described herein is for illustrative purposes only which provides customers with programming information regarding the products. This software is supplied "AS IS" without any warranties. NXP Semiconductors assumes no responsibility or liability for the use of the software, conveys no license or title under any patent, copyright, or mask work right to the product. NXP Semiconductors reserves the right to make changes in the software without notification. NXP Semiconductors also make no representation or warranty that such application will be suitable for the specified use without further testing or modification.

Definition in file pwm_signal.c.

Generated on Tue Jun 7 14:59:19 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/UART/AutoBaud/lpc17xx_libcfg.h File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/UART/AutoBaud/lpc17xx_libcfg.h File Reference

#include "lpc_types.h"

Go to the source code of this file.

Defines

#define | DEBUG
#define | _UART
#define | _UART0
#define | CHECK_PARAM(expr) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))

Functions

void | check_failed (uint8_t *file, uint32_t line)

Define Documentation

#define _UART

Definition at line 53 of file lpc17xx_libcfg.h.

#define _UART0

Definition at line 54 of file lpc17xx_libcfg.h.

#define CHECK_PARAM ( expr ) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))

Definition at line 136 of file lpc17xx_libcfg.h.

#define DEBUG

Definition at line 36 of file lpc17xx_libcfg.h.

Generated on Tue Jun 7 14:59:11 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/UART/AutoBaud/uart_autobaud_test.c File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/UART/AutoBaud/uart_autobaud_test.c File Reference

This example describes how to configure UART using auto-baud rate in interrupt mode. More...

#include "lpc17xx_uart.h"
#include "lpc17xx_libcfg.h"
#include "lpc17xx_pinsel.h"

Go to the source code of this file.

Functions

void | UART0_IRQHandler (void)
UART0 interrupt handler sub-routine.
void | print_menu (void)
Print menu.
int | c_entry (void)
c_entry: Main UART program body
int | main (void)
void | check_failed (uint8_t *file, uint32_t line)

Variables

uint8_t | syncmenu [] = "AutoBaudrate Status: Synchronous! \n\r"
uint8_t | menu1 [] = "Hello NXP Semiconductors \n\r"
uint8_t | menu2 []
uint8_t | menu3 [] = "UART demo terminated!\n"
__IO FlagStatus | Synchronous

Detailed Description

This example describes how to configure UART using auto-baud rate in interrupt mode.

Version:
2.0
Date:
21. May. 2010
Author:
NXP MCU SW Application Team
Copyright(C) 2010, NXP Semiconductor All rights reserved.

Software that is described herein is for illustrative purposes only which provides customers with programming information regarding the products. This software is supplied "AS IS" without any warranties. NXP Semiconductors assumes no responsibility or liability for the use of the software, conveys no license or title under any patent, copyright, or mask work right to the product. NXP Semiconductors reserves the right to make changes in the software without notification. NXP Semiconductors also make no representation or warranty that such application will be suitable for the specified use without further testing or modification.

Definition in file uart_autobaud_test.c.

Generated on Tue Jun 7 14:59:19 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/UART/DMA/lpc17xx_libcfg.h File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/UART/DMA/lpc17xx_libcfg.h File Reference

#include "lpc_types.h"

Go to the source code of this file.

Defines

#define | DEBUG
#define | _DBGFWK
#define | _UART
#define | _UART0
#define | _GPDMA
#define | CHECK_PARAM(expr) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))

Functions

void | check_failed (uint8_t *file, uint32_t line)

Define Documentation

#define _DBGFWK

Definition at line 44 of file lpc17xx_libcfg.h.

#define _GPDMA

Definition at line 125 of file lpc17xx_libcfg.h.

#define _UART

Definition at line 53 of file lpc17xx_libcfg.h.

#define _UART0

Definition at line 54 of file lpc17xx_libcfg.h.

#define CHECK_PARAM ( expr ) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))

Definition at line 140 of file lpc17xx_libcfg.h.

#define DEBUG

Definition at line 36 of file lpc17xx_libcfg.h.

Generated on Tue Jun 7 14:59:11 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/UART/DMA/uart_dma_test.c File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/UART/DMA/uart_dma_test.c File Reference

This example describes how to using UART in DMA mode. More...

#include "lpc17xx_uart.h"
#include "lpc17xx_libcfg.h"
#include "lpc17xx_gpdma.h"
#include "lpc17xx_pinsel.h"

Go to the source code of this file.

Defines

#define | RX_BUF_SIZE 0x10

Functions

void | DMA_IRQHandler (void)
GPDMA interrupt handler sub-routine.
void | print_menu (void)
print menu
int | c_entry (void)
c_entry: Main UART program body
int | main (void)
void | check_failed (uint8_t *file, uint32_t line)

Variables

uint8_t | menu1 []
uint8_t | menu3 [] = "UART demo terminated!\n"
__IO uint8_t | rx_buf [RX_BUF_SIZE]
__IO uint32_t | Channel0_TC
__IO uint32_t | Channel0_Err
__IO uint32_t | Channel1_TC
__IO uint32_t | Channel1_Err

Detailed Description

This example describes how to using UART in DMA mode.

Version:
2.0
Date:
21. May. 2010
Author:
NXP MCU SW Application Team
Copyright(C) 2010, NXP Semiconductor All rights reserved.

Software that is described herein is for illustrative purposes only which provides customers with programming information regarding the products. This software is supplied "AS IS" without any warranties. NXP Semiconductors assumes no responsibility or liability for the use of the software, conveys no license or title under any patent, copyright, or mask work right to the product. NXP Semiconductors reserves the right to make changes in the software without notification. NXP Semiconductors also make no representation or warranty that such application will be suitable for the specified use without further testing or modification.

Definition in file uart_dma_test.c.

Generated on Tue Jun 7 14:59:19 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/UART/HWFlowControl/lpc17xx_libcfg.h File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/UART/HWFlowControl/lpc17xx_libcfg.h File Reference

#include "lpc_types.h"

Go to the source code of this file.

Defines

#define | DEBUG
#define | _UART
#define | _UART0
#define | _UART1
#define | _UART2
#define | _UART3
#define | CHECK_PARAM(expr) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))

Functions

void | check_failed (uint8_t *file, uint32_t line)

Define Documentation

#define _UART

Definition at line 48 of file lpc17xx_libcfg.h.

#define _UART0

Definition at line 49 of file lpc17xx_libcfg.h.

#define _UART1

Definition at line 50 of file lpc17xx_libcfg.h.

#define _UART2

Definition at line 51 of file lpc17xx_libcfg.h.

#define _UART3

Definition at line 52 of file lpc17xx_libcfg.h.

#define CHECK_PARAM ( expr ) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))

Definition at line 132 of file lpc17xx_libcfg.h.

#define DEBUG

Definition at line 35 of file lpc17xx_libcfg.h.

Generated on Tue Jun 7 14:59:11 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/UART/HWFlowControl/uart_hw_flow_control.c File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/UART/HWFlowControl/uart_hw_flow_control.c File Reference

This example describes how to using UART Hardware flow control mode. More...

#include "lpc17xx_uart.h"
#include "lpc17xx_libcfg.h"
#include "lpc17xx_pinsel.h"

Go to the source code of this file.

Defines

#define | TEST_UART (LPC_UART_TypeDef *)LPC_UART1

Functions

void | print_menu (void)
Print Welcome menu.
int | c_entry (void)
c_entry: Main UART program body
int | main (void)
void | check_failed (uint8_t *file, uint32_t line)

Variables

uint8_t | menu1 [] = "Hello NXP Semiconductors \n\r"
uint8_t | menu2 [] = "UART hardware flow control mode demo \n\r\t MCU LPC17xx - ARM Cortex-M3 \n\r\t UART1 - 9600bps \n\r"
uint8_t | menu3 [] = "UART demo terminated!"

Detailed Description

This example describes how to using UART Hardware flow control mode.

Version:
2.0
Date:
10. June. 2010
Author:
NXP MCU SW Application Team
Copyright(C) 2010, NXP Semiconductor All rights reserved.

Software that is described herein is for illustrative purposes only which provides customers with programming information regarding the products. This software is supplied "AS IS" without any warranties. NXP Semiconductors assumes no responsibility or liability for the use of the software, conveys no license or title under any patent, copyright, or mask work right to the product. NXP Semiconductors reserves the right to make changes in the software without notification. NXP Semiconductors also make no representation or warranty that such application will be suitable for the specified use without further testing or modification.

Definition in file uart_hw_flow_control.c.

Generated on Tue Jun 7 14:59:19 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/UART/Interrupt/lpc17xx_libcfg.h File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/UART/Interrupt/lpc17xx_libcfg.h File Reference

#include "lpc_types.h"

Go to the source code of this file.

Defines

#define | DEBUG
#define | _UART
#define | _UART0
#define | CHECK_PARAM(expr) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))

Functions

void | check_failed (uint8_t *file, uint32_t line)

Define Documentation

#define _UART

Definition at line 53 of file lpc17xx_libcfg.h.

#define _UART0

Definition at line 54 of file lpc17xx_libcfg.h.

#define CHECK_PARAM ( expr ) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))

Definition at line 136 of file lpc17xx_libcfg.h.

#define DEBUG

Definition at line 36 of file lpc17xx_libcfg.h.

Generated on Tue Jun 7 14:59:11 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/UART/Interrupt/uart_interrupt_test.c File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/UART/Interrupt/uart_interrupt_test.c File Reference

This example describes how to using UART in interrupt mode. More...

#include "lpc17xx_uart.h"
#include "lpc17xx_libcfg.h"
#include "lpc17xx_pinsel.h"

Go to the source code of this file.

Data Structures

struct | UART_RING_BUFFER_T
UART Ring buffer structure. More...

Defines

#define | UART_RING_BUFSIZE 256
#define | __BUF_MASK (UART_RING_BUFSIZE-1)
#define | __BUF_IS_FULL(head, tail) ((tail&__BUF_MASK)==((head+1)&__BUF_MASK))
#define | __BUF_WILL_FULL(head, tail) ((tail&__BUF_MASK)==((head+2)&__BUF_MASK))
#define | __BUF_IS_EMPTY(head, tail) ((head&__BUF_MASK)==(tail&__BUF_MASK))
#define | __BUF_RESET(bufidx) (bufidx=0)
#define | __BUF_INCR(bufidx) (bufidx=(bufidx+1)&__BUF_MASK)

Functions

void | UART0_IRQHandler (void)
UART0 interrupt handler sub-routine.
void | UART_IntErr (uint8_t bLSErrType)
UART Line Status Error.
void | UART_IntTransmit (void)
UART transmit function (ring buffer used).
void | UART_IntReceive (void)
UART receive function (ring buffer used).
uint32_t | UARTReceive (LPC_UART_TypeDef *UARTPort, uint8_t *rxbuf, uint8_t buflen)
UART read function for interrupt mode (using ring buffers).
uint32_t | UARTSend (LPC_UART_TypeDef *UARTPort, uint8_t *txbuf, uint8_t buflen)
UART transmit function for interrupt mode (using ring buffers).
void | print_menu (void)
Print Welcome Screen Menu subroutine.
int | c_entry (void)
c_entry: Main UART program body
int | main (void)
void | check_failed (uint8_t *file, uint32_t line)

Variables

uint8_t | menu1 [] = "Hello NXP Semiconductors \n\r"
uint8_t | menu2 []
uint8_t | menu3 [] = "UART demo terminated!\n"
UART_RING_BUFFER_T rb
__IO FlagStatus | TxIntStat

Detailed Description

This example describes how to using UART in interrupt mode.

Version:
2.0
Date:
21. May. 2010
Author:
NXP MCU SW Application Team
Copyright(C) 2010, NXP Semiconductor All rights reserved.

Software that is described herein is for illustrative purposes only which provides customers with programming information regarding the products. This software is supplied "AS IS" without any warranties. NXP Semiconductors assumes no responsibility or liability for the use of the software, conveys no license or title under any patent, copyright, or mask work right to the product. NXP Semiconductors reserves the right to make changes in the software without notification. NXP Semiconductors also make no representation or warranty that such application will be suitable for the specified use without further testing or modification.

Definition in file uart_interrupt_test.c.

Generated on Tue Jun 7 14:59:19 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/UART/IrDA/Receive/lpc17xx_libcfg.h File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/UART/IrDA/Receive/lpc17xx_libcfg.h File Reference

#include "lpc_types.h"

Go to the source code of this file.

Defines

#define | DEBUG
#define | _GPIO
#define | _UART
#define | _UART0
#define | _UART1
#define | _UART2
#define | _UART3
#define | CHECK_PARAM(expr) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))

Functions

void | check_failed (uint8_t *file, uint32_t line)

Define Documentation

#define _GPIO

Definition at line 42 of file lpc17xx_libcfg.h.

#define _UART

Definition at line 48 of file lpc17xx_libcfg.h.

#define _UART0

Definition at line 49 of file lpc17xx_libcfg.h.

#define _UART1

Definition at line 50 of file lpc17xx_libcfg.h.

#define _UART2

Definition at line 51 of file lpc17xx_libcfg.h.

#define _UART3

Definition at line 52 of file lpc17xx_libcfg.h.

#define CHECK_PARAM ( expr ) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))

Definition at line 132 of file lpc17xx_libcfg.h.

#define DEBUG

Definition at line 35 of file lpc17xx_libcfg.h.

Generated on Tue Jun 7 14:59:11 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/UART/IrDA/Receive/uart_irda_receive.c File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/UART/IrDA/Receive/uart_irda_receive.c File Reference

This example describes how to using UART in irDA mode. More...

#include "lpc17xx_uart.h"
#include "lpc17xx_libcfg.h"
#include "lpc17xx_pinsel.h"
#include "lpc17xx_gpio.h"

Go to the source code of this file.

Defines

#define | UART_PORT 0
#define | TEST_UART LPC_UART0
#define | TEST_IRDA LPC_UART3

Functions

void | print_menu (void)
Print Welcome menu.
int | c_entry (void)
c_entry: Main UART program body
int | main (void)
void | check_failed (uint8_t *file, uint32_t line)

Variables

uint8_t | menu1 [] = "Hello NXP Semiconductors \n\r"
uint8_t | menu2 [] = "UART IrDA mode demo \n\r\t MCU LPC17xx - ARM Cortex-M3 \n\r\t UART0 - 9600bps communicates with PC \n\r\t UART3 - 9600bps receives infrared signal\n\r"
uint8_t | menu3 [] = "\t The demo keep reading input infrared signal and display through 8 led bank \n\r"

Detailed Description

This example describes how to using UART in irDA mode.

Version:
2.0
Date:
07. June. 2010
Author:
NXP MCU SW Application Team
Copyright(C) 2010, NXP Semiconductor All rights reserved.

Software that is described herein is for illustrative purposes only which provides customers with programming information regarding the products. This software is supplied "AS IS" without any warranties. NXP Semiconductors assumes no responsibility or liability for the use of the software, conveys no license or title under any patent, copyright, or mask work right to the product. NXP Semiconductors reserves the right to make changes in the software without notification. NXP Semiconductors also make no representation or warranty that such application will be suitable for the specified use without further testing or modification.

Definition in file uart_irda_receive.c.

Generated on Tue Jun 7 14:59:20 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/UART/IrDA/Transmit/lpc17xx_libcfg.h File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/UART/IrDA/Transmit/lpc17xx_libcfg.h File Reference

#include "lpc_types.h"

Go to the source code of this file.

Defines

#define | DEBUG
#define | _UART
#define | _UART0
#define | _UART1
#define | _UART2
#define | _UART3
#define | CHECK_PARAM(expr) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))

Functions

void | check_failed (uint8_t *file, uint32_t line)

Define Documentation

#define _UART

Definition at line 48 of file lpc17xx_libcfg.h.

#define _UART0

Definition at line 49 of file lpc17xx_libcfg.h.

#define _UART1

Definition at line 50 of file lpc17xx_libcfg.h.

#define _UART2

Definition at line 51 of file lpc17xx_libcfg.h.

#define _UART3

Definition at line 52 of file lpc17xx_libcfg.h.

#define CHECK_PARAM ( expr ) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))

Definition at line 132 of file lpc17xx_libcfg.h.

#define DEBUG

Definition at line 35 of file lpc17xx_libcfg.h.

Generated on Tue Jun 7 14:59:11 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/UART/IrDA/Transmit/uart_irda_transmit.c File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/UART/IrDA/Transmit/uart_irda_transmit.c File Reference

This example describes how to using UART in irDA mode. More...

#include "lpc17xx_uart.h"
#include "lpc17xx_libcfg.h"
#include "lpc17xx_pinsel.h"

Go to the source code of this file.

Defines

#define | UART_PORT 0
#define | TEST_UART LPC_UART0
#define | TEST_IRDA LPC_UART3

Functions

void | print_menu (void)
Print Welcome menu.
int | c_entry (void)
c_entry: Main UART program body
int | main (void)
void | check_failed (uint8_t *file, uint32_t line)

Variables

uint8_t | menu1 [] = "Hello NXP Semiconductors \n\r"
uint8_t | menu2 [] = "UART IrDA mode demo \n\r\t MCU LPC17xx - ARM Cortex-M3 \n\r\t UART0 - 9600bps communicates with PC \n\r\t UART3 - 9600bps transmits infrared signals\n\r"
uint8_t | menu3 [] = "\t\t- Press Esc to terminate this demo \n\r\t\t- Press 'r' to re-print this menu \n\r"
uint8_t | menu4 [] = "\n\rUART demo terminated!"
uint8_t | menu5 [] = "\n\rEnter a hex byte value to transmit: 0x"

Detailed Description

This example describes how to using UART in irDA mode.

Version:
2.0
Date:
07. June. 2010
Author:
NXP MCU SW Application Team
Copyright(C) 2010, NXP Semiconductor All rights reserved.

Software that is described herein is for illustrative purposes only which provides customers with programming information regarding the products. This software is supplied "AS IS" without any warranties. NXP Semiconductors assumes no responsibility or liability for the use of the software, conveys no license or title under any patent, copyright, or mask work right to the product. NXP Semiconductors reserves the right to make changes in the software without notification. NXP Semiconductors also make no representation or warranty that such application will be suitable for the specified use without further testing or modification.

Definition in file uart_irda_transmit.c.

Generated on Tue Jun 7 14:59:20 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/UART/Polling/lpc17xx_libcfg.h File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/UART/Polling/lpc17xx_libcfg.h File Reference

#include "lpc_types.h"

Go to the source code of this file.

Defines

#define | DEBUG
#define | _UART
#define | _UART0
#define | _UART1
#define | _UART2
#define | _UART3
#define | CHECK_PARAM(expr) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))

Functions

void | check_failed (uint8_t *file, uint32_t line)

Define Documentation

#define _UART

Definition at line 51 of file lpc17xx_libcfg.h.

#define _UART0

Definition at line 52 of file lpc17xx_libcfg.h.

#define _UART1

Definition at line 53 of file lpc17xx_libcfg.h.

#define _UART2

Definition at line 54 of file lpc17xx_libcfg.h.

#define _UART3

Definition at line 55 of file lpc17xx_libcfg.h.

#define CHECK_PARAM ( expr ) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))

Definition at line 135 of file lpc17xx_libcfg.h.

#define DEBUG

Definition at line 35 of file lpc17xx_libcfg.h.

Generated on Tue Jun 7 14:59:11 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/UART/Polling/uart_polling_test.c File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/UART/Polling/uart_polling_test.c File Reference

This example describes how to using UART in polling mode. More...

#include "lpc17xx_uart.h"
#include "lpc17xx_libcfg.h"
#include "lpc17xx_pinsel.h"

Go to the source code of this file.

Defines

#define | UART_PORT 0
#define | TEST_UART LPC_UART0

Functions

void | print_menu (void)
Print Welcome menu.
int | c_entry (void)
c_entry: Main UART program body
int | main (void)
void | check_failed (uint8_t *file, uint32_t line)

Variables

uint8_t | menu1 [] = "Hello NXP Semiconductors \n\r"
uint8_t | menu2 [] = "UART polling mode demo \n\r\t MCU LPC17xx - ARM Cortex-M3 \n\r\t UART0 - 9600bps \n\r"
uint8_t | menu3 [] = "UART demo terminated!"

Detailed Description

This example describes how to using UART in polling mode.

Version:
2.0
Date:
21. May. 2010
Author:
NXP MCU SW Application Team
Copyright(C) 2010, NXP Semiconductor All rights reserved.

Software that is described herein is for illustrative purposes only which provides customers with programming information regarding the products. This software is supplied "AS IS" without any warranties. NXP Semiconductors assumes no responsibility or liability for the use of the software, conveys no license or title under any patent, copyright, or mask work right to the product. NXP Semiconductors reserves the right to make changes in the software without notification. NXP Semiconductors also make no representation or warranty that such application will be suitable for the specified use without further testing or modification.

Definition in file uart_polling_test.c.

Generated on Tue Jun 7 14:59:20 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/UART/RS485_Master/lpc17xx_libcfg.h File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/UART/RS485_Master/lpc17xx_libcfg.h File Reference

#include "lpc_types.h"

Go to the source code of this file.

Defines

#define | DEBUG
#define | _UART
#define | _UART0
#define | _UART1
#define | _UART2
#define | _UART3
#define | CHECK_PARAM(expr) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))

Functions

void | check_failed (uint8_t *file, uint32_t line)

Define Documentation

#define _UART

Definition at line 52 of file lpc17xx_libcfg.h.

#define _UART0

Definition at line 53 of file lpc17xx_libcfg.h.

#define _UART1

Definition at line 54 of file lpc17xx_libcfg.h.

#define _UART2

Definition at line 55 of file lpc17xx_libcfg.h.

#define _UART3

Definition at line 56 of file lpc17xx_libcfg.h.

#define CHECK_PARAM ( expr ) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))

Definition at line 137 of file lpc17xx_libcfg.h.

#define DEBUG

Definition at line 35 of file lpc17xx_libcfg.h.

Generated on Tue Jun 7 14:59:11 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/UART/RS485_Master/rs485_master.c File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/UART/RS485_Master/rs485_master.c File Reference

This example used to test RS485 functionality on UART1 of LPC1768.In this case, RS485 function on UART1 acts as Master on RS485 bus. More...

#include "lpc17xx_uart.h"
#include "lpc17xx_libcfg.h"
#include "lpc17xx_pinsel.h"

Go to the source code of this file.

Data Structures

struct | UART_RING_BUFFER_T
UART Ring buffer structure. More...

Defines

#define | SLAVE_ADDR_A 'A'
#define | SLAVE_ADDR_B 'B'
#define | UART_RING_BUFSIZE 256
#define | __BUF_MASK (UART_RING_BUFSIZE-1)
#define | __BUF_IS_FULL(head, tail) ((tail&__BUF_MASK)==((head+1)&__BUF_MASK))
#define | __BUF_WILL_FULL(head, tail) ((tail&__BUF_MASK)==((head+2)&__BUF_MASK))
#define | __BUF_IS_EMPTY(head, tail) ((head&__BUF_MASK)==(tail&__BUF_MASK))
#define | __BUF_RESET(bufidx) (bufidx=0)
#define | __BUF_INCR(bufidx) (bufidx=(bufidx+1)&__BUF_MASK)

Functions

void | UART1_IRQHandler (void)
UART1 interrupt handler sub-routine.
void | UART_IntReceive (void)
UART receive function (ring buffer used).
void | UART_IntErr (uint8_t bLSErrType)
UART Line Status Error.
uint32_t | UARTReceive (LPC_UART_TypeDef *UARTPort, uint8_t *rxbuf, uint8_t buflen)
UART read function for interrupt mode (using ring buffers).
void | print_menu (void)
Print Welcome menu.
int | c_entry (void)
c_entry: Main UART-RS485 program body
int | main (void)
void | check_failed (uint8_t *file, uint32_t line)

Variables

uint8_t | menu1 [] = "Hello NXP Semiconductors \n\r"
uint8_t | menu2 [] = "RS485 demo in Master mode \n\r"
uint8_t | send_menu [] = "Sending... \n\r"
uint8_t | recv_menu [] = "Receive: "
uint8_t | p_err_menu [] = "Parity error \n\r"
uint8_t | f_err_menu [] = "Frame error \n\r"
uint8_t | nextline [] = "\n\r"
uint8_t | slaveA_msg [] = "Msg A: Hello NXP"
uint8_t | slaveB_msg [] = "Msg B: Hello NXP"
uint8_t | terminator = 13
UART_RING_BUFFER_T rb

Detailed Description

This example used to test RS485 functionality on UART1 of LPC1768.In this case, RS485 function on UART1 acts as Master on RS485 bus.

Version:
2.0
Date:
21. May. 2010
Author:
NXP MCU SW Application Team
Copyright(C) 2010, NXP Semiconductor All rights reserved.

Software that is described herein is for illustrative purposes only which provides customers with programming information regarding the products. This software is supplied "AS IS" without any warranties. NXP Semiconductors assumes no responsibility or liability for the use of the software, conveys no license or title under any patent, copyright, or mask work right to the product. NXP Semiconductors reserves the right to make changes in the software without notification. NXP Semiconductors also make no representation or warranty that such application will be suitable for the specified use without further testing or modification.

Definition in file rs485_master.c.

Generated on Tue Jun 7 14:59:20 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/UART/RS485_Slave/lpc17xx_libcfg.h File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/UART/RS485_Slave/lpc17xx_libcfg.h File Reference

#include "lpc_types.h"

Go to the source code of this file.

Defines

#define | DEBUG
#define | _UART
#define | _UART0
#define | _UART1
#define | _UART2
#define | _UART3
#define | CHECK_PARAM(expr) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))

Functions

void | check_failed (uint8_t *file, uint32_t line)

Define Documentation

#define _UART

Definition at line 53 of file lpc17xx_libcfg.h.

#define _UART0

Definition at line 54 of file lpc17xx_libcfg.h.

#define _UART1

Definition at line 55 of file lpc17xx_libcfg.h.

#define _UART2

Definition at line 56 of file lpc17xx_libcfg.h.

#define _UART3

Definition at line 57 of file lpc17xx_libcfg.h.

#define CHECK_PARAM ( expr ) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))

Definition at line 137 of file lpc17xx_libcfg.h.

#define DEBUG

Definition at line 36 of file lpc17xx_libcfg.h.

Generated on Tue Jun 7 14:59:11 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/UART/RS485_Slave/rs485_slave.c File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/UART/RS485_Slave/rs485_slave.c File Reference

This example used to test RS485 functionality on UART1 of LPC1768.In this case, RS485 function on UART1 acts as SLave on RS485 bus. More...

#include "lpc17xx_uart.h"
#include "lpc17xx_libcfg.h"
#include "lpc17xx_pinsel.h"

Go to the source code of this file.

Data Structures

struct | UART_RING_BUFFER_T
UART Ring buffer structure. More...

Defines

#define | RECEIVER_ALWAYS_EN 0
#define | AUTO_SLVADDR_DETECT 1
#define | SLAVE_ADDR 'A'
#define | UART_RING_BUFSIZE 256
#define | __BUF_MASK (UART_RING_BUFSIZE-1)
#define | __BUF_IS_FULL(head, tail) ((tail&__BUF_MASK)==((head+1)&__BUF_MASK))
#define | __BUF_WILL_FULL(head, tail) ((tail&__BUF_MASK)==((head+2)&__BUF_MASK))
#define | __BUF_IS_EMPTY(head, tail) ((head&__BUF_MASK)==(tail&__BUF_MASK))
#define | __BUF_RESET(bufidx) (bufidx=0)
#define | __BUF_INCR(bufidx) (bufidx=(bufidx+1)&__BUF_MASK)

Functions

void | UART1_IRQHandler (void)
UART1 interrupt handler sub-routine.
void | UART_IntReceive (void)
UART receive function (ring buffer used).
void | UART_IntErr (uint8_t bLSErrType)
UART Line Status Error.
uint32_t | UARTReceive (LPC_UART_TypeDef *UARTPort, uint8_t *rxbuf, uint8_t buflen)
UART read function for interrupt mode (using ring buffers).
void | print_menu (void)
Print Welcome menu.
int | c_entry (void)
c_entry: Main UART-RS485 program body
int | main (void)
void | check_failed (uint8_t *file, uint32_t line)

Variables

uint8_t | menu1 []
uint8_t | send_msg [] = "Sending... \n\r"
uint8_t | recv_msg [] = "Receive: "
uint8_t | p_err_menu [] = "Parity error"
uint8_t | addr_menu [] = " - Slv Addr Frm received\n\r"
uint8_t | addr_acc [] = " - Slave Addr accepted\n\r"
uint8_t | addr_una [] = " - Slave Addr unaccepted\n\r"
uint8_t | addr_auto [] = "Slave Addr detected!\n\r"
uint8_t | f_err_menu [] = "Frame error \n\r"
uint8_t | nextline [] = "\n\r"
uint8_t | ack_msg [] = "ACK"
uint8_t | terminator = 13
UART_RING_BUFFER_T rb

Detailed Description

This example used to test RS485 functionality on UART1 of LPC1768.In this case, RS485 function on UART1 acts as SLave on RS485 bus.

Version:
2.0
Date:
21. May. 2010
Author:
NXP MCU SW Application Team
Copyright(C) 2010, NXP Semiconductor All rights reserved.

Software that is described herein is for illustrative purposes only which provides customers with programming information regarding the products. This software is supplied "AS IS" without any warranties. NXP Semiconductors assumes no responsibility or liability for the use of the software, conveys no license or title under any patent, copyright, or mask work right to the product. NXP Semiconductors reserves the right to make changes in the software without notification. NXP Semiconductors also make no representation or warranty that such application will be suitable for the specified use without further testing or modification.

Definition in file rs485_slave.c.

Generated on Tue Jun 7 14:59:20 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/UART/UART1_FullModem/lpc17xx_libcfg.h File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/UART/UART1_FullModem/lpc17xx_libcfg.h File Reference

#include "lpc_types.h"

Go to the source code of this file.

Defines

#define | DEBUG
#define | _UART
#define | _UART0
#define | _UART1
#define | _UART2
#define | _UART3
#define | CHECK_PARAM(expr) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))

Functions

void | check_failed (uint8_t *file, uint32_t line)

Define Documentation

#define _UART

Definition at line 53 of file lpc17xx_libcfg.h.

#define _UART0

Definition at line 54 of file lpc17xx_libcfg.h.

#define _UART1

Definition at line 55 of file lpc17xx_libcfg.h.

#define _UART2

Definition at line 56 of file lpc17xx_libcfg.h.

#define _UART3

Definition at line 57 of file lpc17xx_libcfg.h.

#define CHECK_PARAM ( expr ) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))

Definition at line 136 of file lpc17xx_libcfg.h.

#define DEBUG

Definition at line 36 of file lpc17xx_libcfg.h.

Generated on Tue Jun 7 14:59:11 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/UART/UART1_FullModem/uart_fullmodem_test.c File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/UART/UART1_FullModem/uart_fullmodem_test.c File Reference

This example describes how to use UART1 full-modem function. More...

#include "lpc17xx_uart.h"
#include "lpc17xx_libcfg.h"
#include "lpc17xx_pinsel.h"

Go to the source code of this file.

Data Structures

struct | UART_RING_BUFFER_T
UART Ring buffer structure. More...

Defines

#define | MCB_LPC_1768
#define | UART_RING_BUFSIZE 256
#define | AUTO_RTS_CTS_USE 0
#define | __BUF_MASK (UART_RING_BUFSIZE-1)
#define | __BUF_IS_FULL(head, tail) ((tail&__BUF_MASK)==((head+1)&__BUF_MASK))
#define | __BUF_WILL_FULL(head, tail) ((tail&__BUF_MASK)==((head+2)&__BUF_MASK))
#define | __BUF_IS_EMPTY(head, tail) ((head&__BUF_MASK)==(tail&__BUF_MASK))
#define | __BUF_RESET(bufidx) (bufidx=0)
#define | __BUF_INCR(bufidx) (bufidx=(bufidx+1)&__BUF_MASK)

Functions

void | UART1_IRQHandler (void)
UART1 interrupt handler sub-routine.
void | UART1_IntTransmit (void)
UART1 transmit function (ring buffer used).
void | UART1_IntReceive (void)
UART1 receive function (ring buffer used).
void | UART1_IntErr (uint8_t bLSErrType)
UART Line Status Error.
uint32_t | UARTReceive (LPC_UART_TypeDef *UARTPort, uint8_t *rxbuf, uint8_t buflen)
UART read function for interrupt mode (using ring buffers).
uint32_t | UARTSend (LPC_UART_TypeDef *UARTPort, uint8_t *txbuf, uint8_t buflen)
UART transmit function for interrupt mode (using ring buffers).
void | print_menu (void)
Print Welcome Screen Menu subroutine.
int | c_entry (void)
c_entry: Main UART-FULLMODEM program body
int | main (void)
void | check_failed (uint8_t *file, uint32_t line)

Variables

uint8_t | menu1 [] = "Hello NXP Semiconductors \n\r"
uint8_t | menu2 []
uint8_t | menu3 [] = "UART demo terminated!\n"
UART_RING_BUFFER_T rb
__IO int32_t | RTS_State
__IO FlagStatus | TxIntStat

Detailed Description

This example describes how to use UART1 full-modem function.

Version:
2.0
Date:
21. May. 2010
Author:
NXP MCU SW Application Team
Copyright(C) 2010, NXP Semiconductor All rights reserved.

Software that is described herein is for illustrative purposes only which provides customers with programming information regarding the products. This software is supplied "AS IS" without any warranties. NXP Semiconductors assumes no responsibility or liability for the use of the software, conveys no license or title under any patent, copyright, or mask work right to the product. NXP Semiconductors reserves the right to make changes in the software without notification. NXP Semiconductors also make no representation or warranty that such application will be suitable for the specified use without further testing or modification.

Definition in file uart_fullmodem_test.c.

Generated on Tue Jun 7 14:59:20 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBAudio/adcuser.c File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBAudio/adcuser.c File Reference

#include "lpc_types.h"
#include "usb.h"
#include "audio.h"
#include "usbcfg.h"
#include "usbcore.h"
#include "adcuser.h"
#include "usbaudio.h"

Go to the source code of this file.

Functions

uint32_t | ADC_IF_GetRequest (void)
uint32_t | ADC_IF_SetRequest (void)
uint32_t | ADC_EP_GetRequest (void)
uint32_t | ADC_EP_SetRequest (void)

Variables

uint16_t | VolCur = 0x0100
const uint16_t | VolMin = 0x0000
const uint16_t | VolMax = 0x0100
const uint16_t | VolRes = 0x0004

Function Documentation

uint32_t ADC_EP_GetRequest ( void )

Definition at line 136 of file adcuser.c.

uint32_t ADC_EP_SetRequest ( void )

Definition at line 155 of file adcuser.c.

uint32_t ADC_IF_GetRequest ( void )

Definition at line 41 of file adcuser.c.

uint32_t ADC_IF_SetRequest ( void )

Definition at line 93 of file adcuser.c.

Variable Documentation

uint16_t VolCur = 0x0100

Definition at line 29 of file adcuser.c.

const uint16_t VolMax = 0x0100

Definition at line 31 of file adcuser.c.

const uint16_t VolMin = 0x0000

Definition at line 30 of file adcuser.c.

const uint16_t VolRes = 0x0004

Definition at line 32 of file adcuser.c.

Generated on Tue Jun 7 14:59:20 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBAudio/adcuser.h File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBAudio/adcuser.h File Reference

Go to the source code of this file.

Functions

uint32_t | ADC_IF_GetRequest (void)
uint32_t | ADC_IF_SetRequest (void)
uint32_t | ADC_EP_GetRequest (void)
uint32_t | ADC_EP_SetRequest (void)

Function Documentation

uint32_t ADC_EP_GetRequest ( void )

Definition at line 136 of file adcuser.c.

uint32_t ADC_EP_SetRequest ( void )

Definition at line 155 of file adcuser.c.

uint32_t ADC_IF_GetRequest ( void )

Definition at line 41 of file adcuser.c.

uint32_t ADC_IF_SetRequest ( void )

Definition at line 93 of file adcuser.c.

Generated on Tue Jun 7 14:59:20 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBAudio/audio.h File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBAudio/audio.h File Reference

Go to the source code of this file.

Defines

#define | AUDIO_SUBCLASS_UNDEFINED 0x00
#define | AUDIO_SUBCLASS_AUDIOCONTROL 0x01
#define | AUDIO_SUBCLASS_AUDIOSTREAMING 0x02
#define | AUDIO_SUBCLASS_MIDISTREAMING 0x03
#define | AUDIO_PROTOCOL_UNDEFINED 0x00
#define | AUDIO_UNDEFINED_DESCRIPTOR_TYPE 0x20
#define | AUDIO_DEVICE_DESCRIPTOR_TYPE 0x21
#define | AUDIO_CONFIGURATION_DESCRIPTOR_TYPE 0x22
#define | AUDIO_STRING_DESCRIPTOR_TYPE 0x23
#define | AUDIO_INTERFACE_DESCRIPTOR_TYPE 0x24
#define | AUDIO_ENDPOINT_DESCRIPTOR_TYPE 0x25
#define | AUDIO_CONTROL_UNDEFINED 0x00
#define | AUDIO_CONTROL_HEADER 0x01
#define | AUDIO_CONTROL_INPUT_TERMINAL 0x02
#define | AUDIO_CONTROL_OUTPUT_TERMINAL 0x03
#define | AUDIO_CONTROL_MIXER_UNIT 0x04
#define | AUDIO_CONTROL_SELECTOR_UNIT 0x05
#define | AUDIO_CONTROL_FEATURE_UNIT 0x06
#define | AUDIO_CONTROL_PROCESSING_UNIT 0x07
#define | AUDIO_CONTROL_EXTENSION_UNIT 0x08
#define | AUDIO_STREAMING_UNDEFINED 0x00
#define | AUDIO_STREAMING_GENERAL 0x01
#define | AUDIO_STREAMING_FORMAT_TYPE 0x02
#define | AUDIO_STREAMING_FORMAT_SPECIFIC 0x03
#define | AUDIO_ENDPOINT_UNDEFINED 0x00
#define | AUDIO_ENDPOINT_GENERAL 0x01
#define | AUDIO_CONTROL_INTERFACE_DESC_SZ(n) 0x08+n
#define | AUDIO_STREAMING_INTERFACE_DESC_SIZE 0x07
#define | AUDIO_INPUT_TERMINAL_DESC_SIZE 0x0C
#define | AUDIO_OUTPUT_TERMINAL_DESC_SIZE 0x09
#define | AUDIO_MIXER_UNIT_DESC_SZ(p, n) 0x0A+p+n
#define | AUDIO_SELECTOR_UNIT_DESC_SZ(p) 0x06+p
#define | AUDIO_FEATURE_UNIT_DESC_SZ(ch, n) 0x07+(ch+1)*n
#define | AUDIO_PROCESSING_UNIT_DESC_SZ(p, n, x) 0x0D+p+n+x
#define | AUDIO_EXTENSION_UNIT_DESC_SZ(p, n) 0x0D+p+n
#define | AUDIO_STANDARD_ENDPOINT_DESC_SIZE 0x09
#define | AUDIO_STREAMING_ENDPOINT_DESC_SIZE 0x07
#define | AUDIO_UNDEFINED_PROCESS 0x00
#define | AUDIO_UP_DOWN_MIX_PROCESS 0x01
#define | AUDIO_DOLBY_PROLOGIC_PROCESS 0x02
#define | AUDIO_3D_STEREO_PROCESS 0x03
#define | AUDIO_REVERBERATION_PROCESS 0x04
#define | AUDIO_CHORUS_PROCESS 0x05
#define | AUDIO_DYN_RANGE_COMP_PROCESS 0x06
#define | AUDIO_REQUEST_UNDEFINED 0x00
#define | AUDIO_REQUEST_SET_CUR 0x01
#define | AUDIO_REQUEST_GET_CUR 0x81
#define | AUDIO_REQUEST_SET_MIN 0x02
#define | AUDIO_REQUEST_GET_MIN 0x82
#define | AUDIO_REQUEST_SET_MAX 0x03
#define | AUDIO_REQUEST_GET_MAX 0x83
#define | AUDIO_REQUEST_SET_RES 0x04
#define | AUDIO_REQUEST_GET_RES 0x84
#define | AUDIO_REQUEST_SET_MEM 0x05
#define | AUDIO_REQUEST_GET_MEM 0x85
#define | AUDIO_REQUEST_GET_STAT 0xFF
#define | AUDIO_CONTROL_UNDEFINED 0x00
#define | AUDIO_COPY_PROTECT_CONTROL 0x01
#define | AUDIO_MUTE_CONTROL 0x01
#define | AUDIO_VOLUME_CONTROL 0x02
#define | AUDIO_BASS_CONTROL 0x03
#define | AUDIO_MID_CONTROL 0x04
#define | AUDIO_TREBLE_CONTROL 0x05
#define | AUDIO_GRAPHIC_EQUALIZER_CONTROL 0x06
#define | AUDIO_AUTOMATIC_GAIN_CONTROL 0x07
#define | AUDIO_DELAY_CONTROL 0x08
#define | AUDIO_BASS_BOOST_CONTROL 0x09
#define | AUDIO_LOUDNESS_CONTROL 0x0A
#define | AUDIO_ENABLE_CONTROL 0x01
#define | AUDIO_MODE_SELECT_CONTROL 0x02
#define | AUDIO_SPACIOUSNESS_CONTROL 0x02
#define | AUDIO_REVERB_LEVEL_CONTROL 0x02
#define | AUDIO_REVERB_TIME_CONTROL 0x03
#define | AUDIO_REVERB_FEEDBACK_CONTROL 0x04
#define | AUDIO_CHORUS_LEVEL_CONTROL 0x02
#define | AUDIO_SHORUS_RATE_CONTROL 0x03
#define | AUDIO_CHORUS_DEPTH_CONTROL 0x04
#define | AUDIO_COMPRESSION_RATE_CONTROL 0x02
#define | AUDIO_MAX_AMPL_CONTROL 0x03
#define | AUDIO_THRESHOLD_CONTROL 0x04
#define | AUDIO_ATTACK_TIME_CONTROL 0x05
#define | AUDIO_RELEASE_TIME_CONTROL 0x06
#define | AUDIO_SAMPLING_FREQ_CONTROL 0x01
#define | AUDIO_PITCH_CONTROL 0x02
#define | AUDIO_MPEG_CONTROL_UNDEFINED 0x00
#define | AUDIO_MPEG_DUAL_CHANNEL_CONTROL 0x01
#define | AUDIO_MPEG_SECOND_STEREO_CONTROL 0x02
#define | AUDIO_MPEG_MULTILINGUAL_CONTROL 0x03
#define | AUDIO_MPEG_DYN_RANGE_CONTROL 0x04
#define | AUDIO_MPEG_SCALING_CONTROL 0x05
#define | AUDIO_MPEG_HILO_SCALING_CONTROL 0x06
#define | AUDIO_AC3_CONTROL_UNDEFINED 0x00
#define | AUDIO_AC3_MODE_CONTROL 0x01
#define | AUDIO_AC3_DYN_RANGE_CONTROL 0x02
#define | AUDIO_AC3_SCALING_CONTROL 0x03
#define | AUDIO_AC3_HILO_SCALING_CONTROL 0x04
#define | AUDIO_FORMAT_TYPE_UNDEFINED 0x00
#define | AUDIO_FORMAT_TYPE_I 0x01
#define | AUDIO_FORMAT_TYPE_II 0x02
#define | AUDIO_FORMAT_TYPE_III 0x03
#define | AUDIO_FORMAT_TYPE_I_DESC_SZ(n) 0x08+(n*3)
#define | AUDIO_FORMAT_TYPE_II_DESC_SZ(n) 0x09+(n*3)
#define | AUDIO_FORMAT_TYPE_III_DESC_SZ(n) 0x08+(n*3)
#define | AUDIO_FORMAT_MPEG_DESC_SIZE 0x09
#define | AUDIO_FORMAT_AC3_DESC_SIZE 0x0A
#define | AUDIO_FORMAT_TYPE_I_UNDEFINED 0x0000
#define | AUDIO_FORMAT_PCM 0x0001
#define | AUDIO_FORMAT_PCM8 0x0002
#define | AUDIO_FORMAT_IEEE_FLOAT 0x0003
#define | AUDIO_FORMAT_ALAW 0x0004
#define | AUDIO_FORMAT_MULAW 0x0005
#define | AUDIO_FORMAT_TYPE_II_UNDEFINED 0x1000
#define | AUDIO_FORMAT_MPEG 0x1001
#define | AUDIO_FORMAT_AC3 0x1002
#define | AUDIO_FORMAT_TYPE_III_UNDEFINED 0x2000
#define | AUDIO_FORMAT_IEC1937_AC3 0x2001
#define | AUDIO_FORMAT_IEC1937_MPEG1_L1 0x2002
#define | AUDIO_FORMAT_IEC1937_MPEG1_L2_3 0x2003
#define | AUDIO_FORMAT_IEC1937_MPEG2_NOEXT 0x2003
#define | AUDIO_FORMAT_IEC1937_MPEG2_EXT 0x2004
#define | AUDIO_FORMAT_IEC1937_MPEG2_L1_LS 0x2005
#define | AUDIO_FORMAT_IEC1937_MPEG2_L2_3 0x2006
#define | AUDIO_CHANNEL_M 0x0000
#define | AUDIO_CHANNEL_L 0x0001
#define | AUDIO_CHANNEL_R 0x0002
#define | AUDIO_CHANNEL_C 0x0004
#define | AUDIO_CHANNEL_LFE 0x0008
#define | AUDIO_CHANNEL_LS 0x0010
#define | AUDIO_CHANNEL_RS 0x0020
#define | AUDIO_CHANNEL_LC 0x0040
#define | AUDIO_CHANNEL_RC 0x0080
#define | AUDIO_CHANNEL_S 0x0100
#define | AUDIO_CHANNEL_SL 0x0200
#define | AUDIO_CHANNEL_SR 0x0400
#define | AUDIO_CHANNEL_T 0x0800
#define | AUDIO_CONTROL_MUTE 0x0001
#define | AUDIO_CONTROL_VOLUME 0x0002
#define | AUDIO_CONTROL_BASS 0x0004
#define | AUDIO_CONTROL_MID 0x0008
#define | AUDIO_CONTROL_TREBLE 0x0010
#define | AUDIO_CONTROL_GRAPHIC_EQUALIZER 0x0020
#define | AUDIO_CONTROL_AUTOMATIC_GAIN 0x0040
#define | AUDIO_CONTROL_DEALY 0x0080
#define | AUDIO_CONTROL_BASS_BOOST 0x0100
#define | AUDIO_CONTROL_LOUDNESS 0x0200
#define | AUDIO_CONTROL_ENABLE 0x0001
#define | AUDIO_CONTROL_MODE_SELECT 0x0002
#define | AUDIO_CONTROL_SPACIOUSNESS 0x0002
#define | AUDIO_CONTROL_REVERB_TYPE 0x0002
#define | AUDIO_CONTROL_REVERB_LEVEL 0x0004
#define | AUDIO_CONTROL_REVERB_TIME 0x0008
#define | AUDIO_CONTROL_REVERB_FEEDBACK 0x0010
#define | AUDIO_CONTROL_CHORUS_LEVEL 0x0002
#define | AUDIO_CONTROL_SHORUS_RATE 0x0004
#define | AUDIO_CONTROL_CHORUS_DEPTH 0x0008
#define | AUDIO_CONTROL_COMPRESSION_RATE 0x0002
#define | AUDIO_CONTROL_MAX_AMPL 0x0004
#define | AUDIO_CONTROL_THRESHOLD 0x0008
#define | AUDIO_CONTROL_ATTACK_TIME 0x0010
#define | AUDIO_CONTROL_RELEASE_TIME 0x0020
#define | AUDIO_CONTROL_SAMPLING_FREQ 0x01
#define | AUDIO_CONTROL_PITCH 0x02
#define | AUDIO_MAX_PACKETS_ONLY 0x80
#define | AUDIO_TERMINAL_USB_UNDEFINED 0x0100
#define | AUDIO_TERMINAL_USB_STREAMING 0x0101
#define | AUDIO_TERMINAL_USB_VENDOR_SPECIFIC 0x01FF
#define | AUDIO_TERMINAL_INPUT_UNDEFINED 0x0200
#define | AUDIO_TERMINAL_MICROPHONE 0x0201
#define | AUDIO_TERMINAL_DESKTOP_MICROPHONE 0x0202
#define | AUDIO_TERMINAL_PERSONAL_MICROPHONE 0x0203
#define | AUDIO_TERMINAL_OMNI_DIR_MICROPHONE 0x0204
#define | AUDIO_TERMINAL_MICROPHONE_ARRAY 0x0205
#define | AUDIO_TERMINAL_PROCESSING_MIC_ARRAY 0x0206
#define | AUDIO_TERMINAL_OUTPUT_UNDEFINED 0x0300
#define | AUDIO_TERMINAL_SPEAKER 0x0301
#define | AUDIO_TERMINAL_HEADPHONES 0x0302
#define | AUDIO_TERMINAL_HEAD_MOUNTED_AUDIO 0x0303
#define | AUDIO_TERMINAL_DESKTOP_SPEAKER 0x0304
#define | AUDIO_TERMINAL_ROOM_SPEAKER 0x0305
#define | AUDIO_TERMINAL_COMMUNICATION_SPEAKER 0x0306
#define | AUDIO_TERMINAL_LOW_FREQ_SPEAKER 0x0307
#define | AUDIO_TERMINAL_BIDIRECTIONAL_UNDEFINED 0x0400
#define | AUDIO_TERMINAL_HANDSET 0x0401
#define | AUDIO_TERMINAL_HEAD_MOUNTED_HANDSET 0x0402
#define | AUDIO_TERMINAL_SPEAKERPHONE 0x0403
#define | AUDIO_TERMINAL_SPEAKERPHONE_ECHOSUPRESS 0x0404
#define | AUDIO_TERMINAL_SPEAKERPHONE_ECHOCANCEL 0x0405
#define | AUDIO_TERMINAL_TELEPHONY_UNDEFINED 0x0500
#define | AUDIO_TERMINAL_PHONE_LINE 0x0501
#define | AUDIO_TERMINAL_TELEPHONE 0x0502
#define | AUDIO_TERMINAL_DOWN_LINE_PHONE 0x0503
#define | AUDIO_TERMINAL_EXTERNAL_UNDEFINED 0x0600
#define | AUDIO_TERMINAL_ANALOG_CONNECTOR 0x0601
#define | AUDIO_TERMINAL_DIGITAL_AUDIO_INTERFACE 0x0602
#define | AUDIO_TERMINAL_LINE_CONNECTOR 0x0603
#define | AUDIO_TERMINAL_LEGACY_AUDIO_CONNECTOR 0x0604
#define | AUDIO_TERMINAL_SPDIF_INTERFACE 0x0605
#define | AUDIO_TERMINAL_1394_DA_STREAM 0x0606
#define | AUDIO_TERMINAL_1394_DA_STREAM_TRACK 0x0607
#define | AUDIO_TERMINAL_EMBEDDED_UNDEFINED 0x0700
#define | AUDIO_TERMINAL_CALIBRATION_NOISE 0x0701
#define | AUDIO_TERMINAL_EQUALIZATION_NOISE 0x0702
#define | AUDIO_TERMINAL_CD_PLAYER 0x0703
#define | AUDIO_TERMINAL_DAT 0x0704
#define | AUDIO_TERMINAL_DCC 0x0705
#define | AUDIO_TERMINAL_MINI_DISK 0x0706
#define | AUDIO_TERMINAL_ANALOG_TAPE 0x0707
#define | AUDIO_TERMINAL_PHONOGRAPH 0x0708
#define | AUDIO_TERMINAL_VCR_AUDIO 0x0709
#define | AUDIO_TERMINAL_VIDEO_DISC_AUDIO 0x070A
#define | AUDIO_TERMINAL_DVD_AUDIO 0x070B
#define | AUDIO_TERMINAL_TV_TUNER_AUDIO 0x070C
#define | AUDIO_TERMINAL_SATELLITE_RECEIVER_AUDIO 0x070D
#define | AUDIO_TERMINAL_CABLE_TUNER_AUDIO 0x070E
#define | AUDIO_TERMINAL_DSS_AUDIO 0x070F
#define | AUDIO_TERMINAL_RADIO_RECEIVER 0x0710
#define | AUDIO_TERMINAL_RADIO_TRANSMITTER 0x0711
#define | AUDIO_TERMINAL_MULTI_TRACK_RECORDER 0x0712
#define | AUDIO_TERMINAL_SYNTHESIZER 0x0713

Define Documentation

#define AUDIO_3D_STEREO_PROCESS 0x03

Definition at line 82 of file audio.h.

#define AUDIO_AC3_CONTROL_UNDEFINED 0x00

Definition at line 177 of file audio.h.

#define AUDIO_AC3_DYN_RANGE_CONTROL 0x02

Definition at line 179 of file audio.h.

#define AUDIO_AC3_HILO_SCALING_CONTROL 0x04

Definition at line 181 of file audio.h.

#define AUDIO_AC3_MODE_CONTROL 0x01

Definition at line 178 of file audio.h.

#define AUDIO_AC3_SCALING_CONTROL 0x03

Definition at line 180 of file audio.h.

#define AUDIO_ATTACK_TIME_CONTROL 0x05

Definition at line 154 of file audio.h.

#define AUDIO_AUTOMATIC_GAIN_CONTROL 0x07

Definition at line 116 of file audio.h.

#define AUDIO_BASS_BOOST_CONTROL 0x09

Definition at line 118 of file audio.h.

#define AUDIO_BASS_CONTROL 0x03

Definition at line 112 of file audio.h.

#define AUDIO_CHANNEL_C 0x0004

Definition at line 229 of file audio.h.

#define AUDIO_CHANNEL_L 0x0001

Definition at line 227 of file audio.h.

#define AUDIO_CHANNEL_LC 0x0040

Definition at line 233 of file audio.h.

#define AUDIO_CHANNEL_LFE 0x0008

Definition at line 230 of file audio.h.

#define AUDIO_CHANNEL_LS 0x0010

Definition at line 231 of file audio.h.

#define AUDIO_CHANNEL_M 0x0000

Definition at line 226 of file audio.h.

#define AUDIO_CHANNEL_R 0x0002

Definition at line 228 of file audio.h.

#define AUDIO_CHANNEL_RC 0x0080

Definition at line 234 of file audio.h.

#define AUDIO_CHANNEL_RS 0x0020

Definition at line 232 of file audio.h.

#define AUDIO_CHANNEL_S 0x0100

Definition at line 235 of file audio.h.

#define AUDIO_CHANNEL_SL 0x0200

Definition at line 236 of file audio.h.

#define AUDIO_CHANNEL_SR 0x0400

Definition at line 237 of file audio.h.

#define AUDIO_CHANNEL_T 0x0800

Definition at line 238 of file audio.h.

#define AUDIO_CHORUS_DEPTH_CONTROL 0x04

Definition at line 147 of file audio.h.

#define AUDIO_CHORUS_LEVEL_CONTROL 0x02

Definition at line 145 of file audio.h.

#define AUDIO_CHORUS_PROCESS 0x05

Definition at line 84 of file audio.h.

#define AUDIO_COMPRESSION_RATE_CONTROL 0x02

Definition at line 151 of file audio.h.

#define AUDIO_CONFIGURATION_DESCRIPTOR_TYPE 0x22

Definition at line 36 of file audio.h.

#define AUDIO_CONTROL_ATTACK_TIME 0x0010

Definition at line 287 of file audio.h.

#define AUDIO_CONTROL_AUTOMATIC_GAIN 0x0040

Definition at line 248 of file audio.h.

#define AUDIO_CONTROL_BASS 0x0004

Definition at line 244 of file audio.h.

#define AUDIO_CONTROL_BASS_BOOST 0x0100

Definition at line 250 of file audio.h.

#define AUDIO_CONTROL_CHORUS_DEPTH 0x0008

Definition at line 280 of file audio.h.

#define AUDIO_CONTROL_CHORUS_LEVEL 0x0002

Definition at line 278 of file audio.h.

#define AUDIO_CONTROL_COMPRESSION_RATE 0x0002

Definition at line 284 of file audio.h.

#define AUDIO_CONTROL_DEALY 0x0080

Definition at line 249 of file audio.h.

#define AUDIO_CONTROL_ENABLE 0x0001

Definition at line 254 of file audio.h.

#define AUDIO_CONTROL_EXTENSION_UNIT 0x08

Definition at line 51 of file audio.h.

#define AUDIO_CONTROL_FEATURE_UNIT 0x06

Definition at line 49 of file audio.h.

#define AUDIO_CONTROL_GRAPHIC_EQUALIZER 0x0020

Definition at line 247 of file audio.h.

#define AUDIO_CONTROL_HEADER 0x01

Definition at line 44 of file audio.h.

#define AUDIO_CONTROL_INPUT_TERMINAL 0x02

Definition at line 45 of file audio.h.

#define AUDIO_CONTROL_INTERFACE_DESC_SZ ( n ) 0x08+n

Definition at line 65 of file audio.h.

#define AUDIO_CONTROL_LOUDNESS 0x0200

Definition at line 251 of file audio.h.

#define AUDIO_CONTROL_MAX_AMPL 0x0004

Definition at line 285 of file audio.h.

#define AUDIO_CONTROL_MID 0x0008

Definition at line 245 of file audio.h.

#define AUDIO_CONTROL_MIXER_UNIT 0x04

Definition at line 47 of file audio.h.

#define AUDIO_CONTROL_MODE_SELECT 0x0002

Definition at line 255 of file audio.h.

#define AUDIO_CONTROL_MUTE 0x0001

Definition at line 242 of file audio.h.

#define AUDIO_CONTROL_OUTPUT_TERMINAL 0x03

Definition at line 46 of file audio.h.

#define AUDIO_CONTROL_PITCH 0x02

Definition at line 295 of file audio.h.

#define AUDIO_CONTROL_PROCESSING_UNIT 0x07

Definition at line 50 of file audio.h.

#define AUDIO_CONTROL_RELEASE_TIME 0x0020

Definition at line 288 of file audio.h.

#define AUDIO_CONTROL_REVERB_FEEDBACK 0x0010

Definition at line 274 of file audio.h.

#define AUDIO_CONTROL_REVERB_LEVEL 0x0004

Definition at line 272 of file audio.h.

#define AUDIO_CONTROL_REVERB_TIME 0x0008

Definition at line 273 of file audio.h.

#define AUDIO_CONTROL_REVERB_TYPE 0x0002

Definition at line 271 of file audio.h.

#define AUDIO_CONTROL_SAMPLING_FREQ 0x01

Definition at line 294 of file audio.h.

#define AUDIO_CONTROL_SELECTOR_UNIT 0x05

Definition at line 48 of file audio.h.

#define AUDIO_CONTROL_SHORUS_RATE 0x0004

Definition at line 279 of file audio.h.

#define AUDIO_CONTROL_SPACIOUSNESS 0x0002

Definition at line 267 of file audio.h.

#define AUDIO_CONTROL_THRESHOLD 0x0008

Definition at line 286 of file audio.h.

#define AUDIO_CONTROL_TREBLE 0x0010

Definition at line 246 of file audio.h.

#define AUDIO_CONTROL_UNDEFINED 0x00

Definition at line 104 of file audio.h.

#define AUDIO_CONTROL_UNDEFINED 0x00

Definition at line 104 of file audio.h.

#define AUDIO_CONTROL_VOLUME 0x0002

Definition at line 243 of file audio.h.

#define AUDIO_COPY_PROTECT_CONTROL 0x01

Definition at line 107 of file audio.h.

#define AUDIO_DELAY_CONTROL 0x08

Definition at line 117 of file audio.h.

#define AUDIO_DEVICE_DESCRIPTOR_TYPE 0x21

Definition at line 35 of file audio.h.

#define AUDIO_DOLBY_PROLOGIC_PROCESS 0x02

Definition at line 81 of file audio.h.

#define AUDIO_DYN_RANGE_COMP_PROCESS 0x06

Definition at line 85 of file audio.h.

#define AUDIO_ENABLE_CONTROL 0x01

Definition at line 122 of file audio.h.

#define AUDIO_ENDPOINT_DESCRIPTOR_TYPE 0x25

Definition at line 39 of file audio.h.

#define AUDIO_ENDPOINT_GENERAL 0x01

Definition at line 61 of file audio.h.

#define AUDIO_ENDPOINT_UNDEFINED 0x00

Definition at line 60 of file audio.h.

#define AUDIO_EXTENSION_UNIT_DESC_SZ | ( | p,
 |  | n | ) | 0x0D+p+n

Definition at line 73 of file audio.h.

#define AUDIO_FEATURE_UNIT_DESC_SZ | ( | ch,
 |  | n | ) | 0x07+(ch+1)*n

Definition at line 71 of file audio.h.

#define AUDIO_FORMAT_AC3 0x1002

Definition at line 212 of file audio.h.

#define AUDIO_FORMAT_AC3_DESC_SIZE 0x0A

Definition at line 196 of file audio.h.

#define AUDIO_FORMAT_ALAW 0x0004

Definition at line 206 of file audio.h.

#define AUDIO_FORMAT_IEC1937_AC3 0x2001

Definition at line 216 of file audio.h.

#define AUDIO_FORMAT_IEC1937_MPEG1_L1 0x2002

Definition at line 217 of file audio.h.

#define AUDIO_FORMAT_IEC1937_MPEG1_L2_3 0x2003

Definition at line 218 of file audio.h.

#define AUDIO_FORMAT_IEC1937_MPEG2_EXT 0x2004

Definition at line 220 of file audio.h.

#define AUDIO_FORMAT_IEC1937_MPEG2_L1_LS 0x2005

Definition at line 221 of file audio.h.

#define AUDIO_FORMAT_IEC1937_MPEG2_L2_3 0x2006

Definition at line 222 of file audio.h.

#define AUDIO_FORMAT_IEC1937_MPEG2_NOEXT 0x2003

Definition at line 219 of file audio.h.

#define AUDIO_FORMAT_IEEE_FLOAT 0x0003

Definition at line 205 of file audio.h.

#define AUDIO_FORMAT_MPEG 0x1001

Definition at line 211 of file audio.h.

#define AUDIO_FORMAT_MPEG_DESC_SIZE 0x09

Definition at line 195 of file audio.h.

#define AUDIO_FORMAT_MULAW 0x0005

Definition at line 207 of file audio.h.

#define AUDIO_FORMAT_PCM 0x0001

Definition at line 203 of file audio.h.

#define AUDIO_FORMAT_PCM8 0x0002

Definition at line 204 of file audio.h.

#define AUDIO_FORMAT_TYPE_I 0x01

Definition at line 186 of file audio.h.

#define AUDIO_FORMAT_TYPE_I_DESC_SZ ( n ) 0x08+(n*3)

Definition at line 192 of file audio.h.

#define AUDIO_FORMAT_TYPE_I_UNDEFINED 0x0000

Definition at line 202 of file audio.h.

#define AUDIO_FORMAT_TYPE_II 0x02

Definition at line 187 of file audio.h.

#define AUDIO_FORMAT_TYPE_II_DESC_SZ ( n ) 0x09+(n*3)

Definition at line 193 of file audio.h.

#define AUDIO_FORMAT_TYPE_II_UNDEFINED 0x1000

Definition at line 210 of file audio.h.

#define AUDIO_FORMAT_TYPE_III 0x03

Definition at line 188 of file audio.h.

#define AUDIO_FORMAT_TYPE_III_DESC_SZ ( n ) 0x08+(n*3)

Definition at line 194 of file audio.h.

#define AUDIO_FORMAT_TYPE_III_UNDEFINED 0x2000

Definition at line 215 of file audio.h.

#define AUDIO_FORMAT_TYPE_UNDEFINED 0x00

Definition at line 185 of file audio.h.

#define AUDIO_GRAPHIC_EQUALIZER_CONTROL 0x06

Definition at line 115 of file audio.h.

#define AUDIO_INPUT_TERMINAL_DESC_SIZE 0x0C

Definition at line 67 of file audio.h.

#define AUDIO_INTERFACE_DESCRIPTOR_TYPE 0x24

Definition at line 38 of file audio.h.

#define AUDIO_LOUDNESS_CONTROL 0x0A

Definition at line 119 of file audio.h.

#define AUDIO_MAX_AMPL_CONTROL 0x03

Definition at line 152 of file audio.h.

#define AUDIO_MAX_PACKETS_ONLY 0x80

Definition at line 296 of file audio.h.

#define AUDIO_MID_CONTROL 0x04

Definition at line 113 of file audio.h.

#define AUDIO_MIXER_UNIT_DESC_SZ | ( | p,
 |  | n | ) | 0x0A+p+n

Definition at line 69 of file audio.h.

#define AUDIO_MODE_SELECT_CONTROL 0x02

Definition at line 123 of file audio.h.

#define AUDIO_MPEG_CONTROL_UNDEFINED 0x00

Definition at line 168 of file audio.h.

#define AUDIO_MPEG_DUAL_CHANNEL_CONTROL 0x01

Definition at line 169 of file audio.h.

#define AUDIO_MPEG_DYN_RANGE_CONTROL 0x04

Definition at line 172 of file audio.h.

#define AUDIO_MPEG_HILO_SCALING_CONTROL 0x06

Definition at line 174 of file audio.h.

#define AUDIO_MPEG_MULTILINGUAL_CONTROL 0x03

Definition at line 171 of file audio.h.

#define AUDIO_MPEG_SCALING_CONTROL 0x05

Definition at line 173 of file audio.h.

#define AUDIO_MPEG_SECOND_STEREO_CONTROL 0x02

Definition at line 170 of file audio.h.

#define AUDIO_MUTE_CONTROL 0x01

Definition at line 110 of file audio.h.

#define AUDIO_OUTPUT_TERMINAL_DESC_SIZE 0x09

Definition at line 68 of file audio.h.

#define AUDIO_PITCH_CONTROL 0x02

Definition at line 162 of file audio.h.

#define AUDIO_PROCESSING_UNIT_DESC_SZ | ( | p,
 |  | n,
 |  | x | ) | 0x0D+p+n+x

Definition at line 72 of file audio.h.

#define AUDIO_PROTOCOL_UNDEFINED 0x00

Definition at line 30 of file audio.h.

#define AUDIO_RELEASE_TIME_CONTROL 0x06

Definition at line 155 of file audio.h.

#define AUDIO_REQUEST_GET_CUR 0x81

Definition at line 91 of file audio.h.

#define AUDIO_REQUEST_GET_MAX 0x83

Definition at line 95 of file audio.h.

#define AUDIO_REQUEST_GET_MEM 0x85

Definition at line 99 of file audio.h.

#define AUDIO_REQUEST_GET_MIN 0x82

Definition at line 93 of file audio.h.

#define AUDIO_REQUEST_GET_RES 0x84

Definition at line 97 of file audio.h.

#define AUDIO_REQUEST_GET_STAT 0xFF

Definition at line 100 of file audio.h.

#define AUDIO_REQUEST_SET_CUR 0x01

Definition at line 90 of file audio.h.

#define AUDIO_REQUEST_SET_MAX 0x03

Definition at line 94 of file audio.h.

#define AUDIO_REQUEST_SET_MEM 0x05

Definition at line 98 of file audio.h.

#define AUDIO_REQUEST_SET_MIN 0x02

Definition at line 92 of file audio.h.

#define AUDIO_REQUEST_SET_RES 0x04

Definition at line 96 of file audio.h.

#define AUDIO_REQUEST_UNDEFINED 0x00

Definition at line 89 of file audio.h.

#define AUDIO_REVERB_FEEDBACK_CONTROL 0x04

Definition at line 141 of file audio.h.

#define AUDIO_REVERB_LEVEL_CONTROL 0x02

Definition at line 139 of file audio.h.

#define AUDIO_REVERB_TIME_CONTROL 0x03

Definition at line 140 of file audio.h.

#define AUDIO_REVERBERATION_PROCESS 0x04

Definition at line 83 of file audio.h.

#define AUDIO_SAMPLING_FREQ_CONTROL 0x01

Definition at line 161 of file audio.h.

#define AUDIO_SELECTOR_UNIT_DESC_SZ ( p ) 0x06+p

Definition at line 70 of file audio.h.

#define AUDIO_SHORUS_RATE_CONTROL 0x03

Definition at line 146 of file audio.h.

#define AUDIO_SPACIOUSNESS_CONTROL 0x02

Definition at line 135 of file audio.h.

#define AUDIO_STANDARD_ENDPOINT_DESC_SIZE 0x09

Definition at line 74 of file audio.h.

#define AUDIO_STREAMING_ENDPOINT_DESC_SIZE 0x07

Definition at line 75 of file audio.h.

#define AUDIO_STREAMING_FORMAT_SPECIFIC 0x03

Definition at line 57 of file audio.h.

#define AUDIO_STREAMING_FORMAT_TYPE 0x02

Definition at line 56 of file audio.h.

#define AUDIO_STREAMING_GENERAL 0x01

Definition at line 55 of file audio.h.

#define AUDIO_STREAMING_INTERFACE_DESC_SIZE 0x07

Definition at line 66 of file audio.h.

#define AUDIO_STREAMING_UNDEFINED 0x00

Definition at line 54 of file audio.h.

#define AUDIO_STRING_DESCRIPTOR_TYPE 0x23

Definition at line 37 of file audio.h.

#define AUDIO_SUBCLASS_AUDIOCONTROL 0x01

Definition at line 25 of file audio.h.

#define AUDIO_SUBCLASS_AUDIOSTREAMING 0x02

Definition at line 26 of file audio.h.

#define AUDIO_SUBCLASS_MIDISTREAMING 0x03

Definition at line 27 of file audio.h.

#define AUDIO_SUBCLASS_UNDEFINED 0x00

Definition at line 24 of file audio.h.

#define AUDIO_TERMINAL_1394_DA_STREAM 0x0606

Definition at line 346 of file audio.h.

#define AUDIO_TERMINAL_1394_DA_STREAM_TRACK 0x0607

Definition at line 347 of file audio.h.

#define AUDIO_TERMINAL_ANALOG_CONNECTOR 0x0601

Definition at line 341 of file audio.h.

#define AUDIO_TERMINAL_ANALOG_TAPE 0x0707

Definition at line 357 of file audio.h.

#define AUDIO_TERMINAL_BIDIRECTIONAL_UNDEFINED 0x0400

Definition at line 326 of file audio.h.

#define AUDIO_TERMINAL_CABLE_TUNER_AUDIO 0x070E

Definition at line 364 of file audio.h.

#define AUDIO_TERMINAL_CALIBRATION_NOISE 0x0701

Definition at line 351 of file audio.h.

#define AUDIO_TERMINAL_CD_PLAYER 0x0703

Definition at line 353 of file audio.h.

#define AUDIO_TERMINAL_COMMUNICATION_SPEAKER 0x0306

Definition at line 322 of file audio.h.

#define AUDIO_TERMINAL_DAT 0x0704

Definition at line 354 of file audio.h.

#define AUDIO_TERMINAL_DCC 0x0705

Definition at line 355 of file audio.h.

#define AUDIO_TERMINAL_DESKTOP_MICROPHONE 0x0202

Definition at line 309 of file audio.h.

#define AUDIO_TERMINAL_DESKTOP_SPEAKER 0x0304

Definition at line 320 of file audio.h.

#define AUDIO_TERMINAL_DIGITAL_AUDIO_INTERFACE 0x0602

Definition at line 342 of file audio.h.

#define AUDIO_TERMINAL_DOWN_LINE_PHONE 0x0503

Definition at line 337 of file audio.h.

#define AUDIO_TERMINAL_DSS_AUDIO 0x070F

Definition at line 365 of file audio.h.

#define AUDIO_TERMINAL_DVD_AUDIO 0x070B

Definition at line 361 of file audio.h.

#define AUDIO_TERMINAL_EMBEDDED_UNDEFINED 0x0700

Definition at line 350 of file audio.h.

#define AUDIO_TERMINAL_EQUALIZATION_NOISE 0x0702

Definition at line 352 of file audio.h.

#define AUDIO_TERMINAL_EXTERNAL_UNDEFINED 0x0600

Definition at line 340 of file audio.h.

#define AUDIO_TERMINAL_HANDSET 0x0401

Definition at line 327 of file audio.h.

#define AUDIO_TERMINAL_HEAD_MOUNTED_AUDIO 0x0303

Definition at line 319 of file audio.h.

#define AUDIO_TERMINAL_HEAD_MOUNTED_HANDSET 0x0402

Definition at line 328 of file audio.h.

#define AUDIO_TERMINAL_HEADPHONES 0x0302

Definition at line 318 of file audio.h.

#define AUDIO_TERMINAL_INPUT_UNDEFINED 0x0200

Definition at line 307 of file audio.h.

#define AUDIO_TERMINAL_LEGACY_AUDIO_CONNECTOR 0x0604

Definition at line 344 of file audio.h.

#define AUDIO_TERMINAL_LINE_CONNECTOR 0x0603

Definition at line 343 of file audio.h.

#define AUDIO_TERMINAL_LOW_FREQ_SPEAKER 0x0307

Definition at line 323 of file audio.h.

#define AUDIO_TERMINAL_MICROPHONE 0x0201

Definition at line 308 of file audio.h.

#define AUDIO_TERMINAL_MICROPHONE_ARRAY 0x0205

Definition at line 312 of file audio.h.

#define AUDIO_TERMINAL_MINI_DISK 0x0706

Definition at line 356 of file audio.h.

#define AUDIO_TERMINAL_MULTI_TRACK_RECORDER 0x0712

Definition at line 368 of file audio.h.

#define AUDIO_TERMINAL_OMNI_DIR_MICROPHONE 0x0204

Definition at line 311 of file audio.h.

#define AUDIO_TERMINAL_OUTPUT_UNDEFINED 0x0300

Definition at line 316 of file audio.h.

#define AUDIO_TERMINAL_PERSONAL_MICROPHONE 0x0203

Definition at line 310 of file audio.h.

#define AUDIO_TERMINAL_PHONE_LINE 0x0501

Definition at line 335 of file audio.h.

#define AUDIO_TERMINAL_PHONOGRAPH 0x0708

Definition at line 358 of file audio.h.

#define AUDIO_TERMINAL_PROCESSING_MIC_ARRAY 0x0206

Definition at line 313 of file audio.h.

#define AUDIO_TERMINAL_RADIO_RECEIVER 0x0710

Definition at line 366 of file audio.h.

#define AUDIO_TERMINAL_RADIO_TRANSMITTER 0x0711

Definition at line 367 of file audio.h.

#define AUDIO_TERMINAL_ROOM_SPEAKER 0x0305

Definition at line 321 of file audio.h.

#define AUDIO_TERMINAL_SATELLITE_RECEIVER_AUDIO 0x070D

Definition at line 363 of file audio.h.

#define AUDIO_TERMINAL_SPDIF_INTERFACE 0x0605

Definition at line 345 of file audio.h.

#define AUDIO_TERMINAL_SPEAKER 0x0301

Definition at line 317 of file audio.h.

#define AUDIO_TERMINAL_SPEAKERPHONE 0x0403

Definition at line 329 of file audio.h.

#define AUDIO_TERMINAL_SPEAKERPHONE_ECHOCANCEL 0x0405

Definition at line 331 of file audio.h.

#define AUDIO_TERMINAL_SPEAKERPHONE_ECHOSUPRESS 0x0404

Definition at line 330 of file audio.h.

#define AUDIO_TERMINAL_SYNTHESIZER 0x0713

Definition at line 369 of file audio.h.

#define AUDIO_TERMINAL_TELEPHONE 0x0502

Definition at line 336 of file audio.h.

#define AUDIO_TERMINAL_TELEPHONY_UNDEFINED 0x0500

Definition at line 334 of file audio.h.

#define AUDIO_TERMINAL_TV_TUNER_AUDIO 0x070C

Definition at line 362 of file audio.h.

#define AUDIO_TERMINAL_USB_STREAMING 0x0101

Definition at line 303 of file audio.h.

#define AUDIO_TERMINAL_USB_UNDEFINED 0x0100

Definition at line 302 of file audio.h.

#define AUDIO_TERMINAL_USB_VENDOR_SPECIFIC 0x01FF

Definition at line 304 of file audio.h.

#define AUDIO_TERMINAL_VCR_AUDIO 0x0709

Definition at line 359 of file audio.h.

#define AUDIO_TERMINAL_VIDEO_DISC_AUDIO 0x070A

Definition at line 360 of file audio.h.

#define AUDIO_THRESHOLD_CONTROL 0x04

Definition at line 153 of file audio.h.

#define AUDIO_TREBLE_CONTROL 0x05

Definition at line 114 of file audio.h.

#define AUDIO_UNDEFINED_DESCRIPTOR_TYPE 0x20

Definition at line 34 of file audio.h.

#define AUDIO_UNDEFINED_PROCESS 0x00

Definition at line 79 of file audio.h.

#define AUDIO_UP_DOWN_MIX_PROCESS 0x01

Definition at line 80 of file audio.h.

#define AUDIO_VOLUME_CONTROL 0x02

Definition at line 111 of file audio.h.

Generated on Tue Jun 7 14:59:20 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBAudio/lpc17xx_libcfg.h File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBAudio/lpc17xx_libcfg.h File Reference

#include "lpc_types.h"

Go to the source code of this file.

Defines

#define | DEBUG
#define | CHECK_PARAM(expr) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))
define _DBGFWK

Functions

void | check_failed (uint8_t *file, uint32_t line)

Define Documentation

#define CHECK_PARAM ( expr ) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))

define _DBGFWK

Definition at line 136 of file lpc17xx_libcfg.h.

#define DEBUG

Definition at line 36 of file lpc17xx_libcfg.h.

Generated on Tue Jun 7 14:59:11 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBAudio/usb.h File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBAudio/usb.h File Reference

#include "lpc_types.h"

Go to the source code of this file.

Defines

#define | REQUEST_HOST_TO_DEVICE 0
#define | REQUEST_DEVICE_TO_HOST 1
#define | REQUEST_STANDARD 0
#define | REQUEST_CLASS 1
#define | REQUEST_VENDOR 2
#define | REQUEST_RESERVED 3
#define | REQUEST_TO_DEVICE 0
#define | REQUEST_TO_INTERFACE 1
#define | REQUEST_TO_ENDPOINT 2
#define | REQUEST_TO_OTHER 3
#define | USB_REQUEST_GET_STATUS 0
#define | USB_REQUEST_CLEAR_FEATURE 1
#define | USB_REQUEST_SET_FEATURE 3
#define | USB_REQUEST_SET_ADDRESS 5
#define | USB_REQUEST_GET_DESCRIPTOR 6
#define | USB_REQUEST_SET_DESCRIPTOR 7
#define | USB_REQUEST_GET_CONFIGURATION 8
#define | USB_REQUEST_SET_CONFIGURATION 9
#define | USB_REQUEST_GET_INTERFACE 10
#define | USB_REQUEST_SET_INTERFACE 11
#define | USB_REQUEST_SYNC_FRAME 12
#define | USB_GETSTATUS_SELF_POWERED 0x01
#define | USB_GETSTATUS_REMOTE_WAKEUP 0x02
#define | USB_GETSTATUS_ENDPOINT_STALL 0x01
#define | USB_FEATURE_ENDPOINT_STALL 0
#define | USB_FEATURE_REMOTE_WAKEUP 1
#define | USB_DEVICE_DESCRIPTOR_TYPE 1
#define | USB_CONFIGURATION_DESCRIPTOR_TYPE 2
#define | USB_STRING_DESCRIPTOR_TYPE 3
#define | USB_INTERFACE_DESCRIPTOR_TYPE 4
#define | USB_ENDPOINT_DESCRIPTOR_TYPE 5
#define | USB_DEVICE_QUALIFIER_DESCRIPTOR_TYPE 6
#define | USB_OTHER_SPEED_CONFIG_DESCRIPTOR_TYPE 7
#define | USB_INTERFACE_POWER_DESCRIPTOR_TYPE 8
#define | USB_OTG_DESCRIPTOR_TYPE 9
#define | USB_DEBUG_DESCRIPTOR_TYPE 10
#define | USB_INTERFACE_ASSOCIATION_DESCRIPTOR_TYPE 11
#define | USB_DEVICE_CLASS_RESERVED 0x00
#define | USB_DEVICE_CLASS_AUDIO 0x01
#define | USB_DEVICE_CLASS_COMMUNICATIONS 0x02
#define | USB_DEVICE_CLASS_HUMAN_INTERFACE 0x03
#define | USB_DEVICE_CLASS_MONITOR 0x04
#define | USB_DEVICE_CLASS_PHYSICAL_INTERFACE 0x05
#define | USB_DEVICE_CLASS_POWER 0x06
#define | USB_DEVICE_CLASS_PRINTER 0x07
#define | USB_DEVICE_CLASS_STORAGE 0x08
#define | USB_DEVICE_CLASS_HUB 0x09
#define | USB_DEVICE_CLASS_MISCELLANEOUS 0xEF
#define | USB_DEVICE_CLASS_VENDOR_SPECIFIC 0xFF
#define | USB_CONFIG_POWERED_MASK 0x40
#define | USB_CONFIG_BUS_POWERED 0x80
#define | USB_CONFIG_SELF_POWERED 0xC0
#define | USB_CONFIG_REMOTE_WAKEUP 0x20
#define | USB_CONFIG_POWER_MA(mA) ((mA)/2)
#define | USB_ENDPOINT_DIRECTION_MASK 0x80
#define | USB_ENDPOINT_OUT(addr) ((addr) | 0x00)
#define | USB_ENDPOINT_IN(addr) ((addr) | 0x80)
#define | USB_ENDPOINT_TYPE_MASK 0x03
#define | USB_ENDPOINT_TYPE_CONTROL 0x00
#define | USB_ENDPOINT_TYPE_ISOCHRONOUS 0x01
#define | USB_ENDPOINT_TYPE_BULK 0x02
#define | USB_ENDPOINT_TYPE_INTERRUPT 0x03
#define | USB_ENDPOINT_SYNC_MASK 0x0C
#define | USB_ENDPOINT_SYNC_NO_SYNCHRONIZATION 0x00
#define | USB_ENDPOINT_SYNC_ASYNCHRONOUS 0x04
#define | USB_ENDPOINT_SYNC_ADAPTIVE 0x08
#define | USB_ENDPOINT_SYNC_SYNCHRONOUS 0x0C
#define | USB_ENDPOINT_USAGE_MASK 0x30
#define | USB_ENDPOINT_USAGE_DATA 0x00
#define | USB_ENDPOINT_USAGE_FEEDBACK 0x10
#define | USB_ENDPOINT_USAGE_IMPLICIT_FEEDBACK 0x20
#define | USB_ENDPOINT_USAGE_RESERVED 0x30

Variables

uint16_t | W
uint8_t | L
uint8_t | H
WB
WORD_BYTE
uint8_t | Recipient
uint8_t | Type
uint8_t | Dir
BM
uint8_t | B
REQUEST_TYPE
REQUEST_TYPE bmRequestType
uint8_t | bRequest
WORD_BYTE wValue
WORD_BYTE wIndex
uint16_t | wLength
USB_SETUP_PACKET
uint8_t | bLength
uint8_t | bDescriptorType
uint16_t | bcdUSB
uint8_t | bDeviceClass
uint8_t | bDeviceSubClass
uint8_t | bDeviceProtocol
uint8_t | bMaxPacketSize0
uint16_t | idVendor
uint16_t | idProduct
uint16_t | bcdDevice
uint8_t | iManufacturer
uint8_t | iProduct
uint8_t | iSerialNumber
uint8_t | bNumConfigurations
USB_DEVICE_DESCRIPTOR
uint8_t | bReserved
USB_DEVICE_QUALIFIER_DESCRIPTOR
uint16_t | wTotalLength
uint8_t | bNumInterfaces
uint8_t | bConfigurationValue
uint8_t | iConfiguration
uint8_t | bmAttributes
uint8_t | bMaxPower
USB_CONFIGURATION_DESCRIPTOR
uint8_t | bInterfaceNumber
uint8_t | bAlternateSetting
uint8_t | bNumEndpoints
uint8_t | bInterfaceClass
uint8_t | bInterfaceSubClass
uint8_t | bInterfaceProtocol
uint8_t | iInterface
USB_INTERFACE_DESCRIPTOR
uint8_t | bEndpointAddress
uint16_t | wMaxPacketSize
uint8_t | bInterval
USB_ENDPOINT_DESCRIPTOR
uint16_t | bString
USB_STRING_DESCRIPTOR
USB_COMMON_DESCRIPTOR

Define Documentation

#define REQUEST_CLASS 1

Definition at line 61 of file usb.h.

#define REQUEST_DEVICE_TO_HOST 1

Definition at line 57 of file usb.h.

#define REQUEST_HOST_TO_DEVICE 0

Definition at line 56 of file usb.h.

#define REQUEST_RESERVED 3

Definition at line 63 of file usb.h.

#define REQUEST_STANDARD 0

Definition at line 60 of file usb.h.

#define REQUEST_TO_DEVICE 0

Definition at line 66 of file usb.h.

#define REQUEST_TO_ENDPOINT 2

Definition at line 68 of file usb.h.

#define REQUEST_TO_INTERFACE 1

Definition at line 67 of file usb.h.

#define REQUEST_TO_OTHER 3

Definition at line 69 of file usb.h.

#define REQUEST_VENDOR 2

Definition at line 62 of file usb.h.

#define USB_CONFIG_BUS_POWERED 0x80

Definition at line 172 of file usb.h.

#define USB_CONFIG_POWER_MA ( mA ) ((mA)/2)

Definition at line 177 of file usb.h.

#define USB_CONFIG_POWERED_MASK 0x40

Definition at line 171 of file usb.h.

#define USB_CONFIG_REMOTE_WAKEUP 0x20

Definition at line 174 of file usb.h.

#define USB_CONFIG_SELF_POWERED 0xC0

Definition at line 173 of file usb.h.

#define USB_CONFIGURATION_DESCRIPTOR_TYPE 2

Definition at line 145 of file usb.h.

#define USB_DEBUG_DESCRIPTOR_TYPE 10

Definition at line 153 of file usb.h.

#define USB_DEVICE_CLASS_AUDIO 0x01

Definition at line 158 of file usb.h.

#define USB_DEVICE_CLASS_COMMUNICATIONS 0x02

Definition at line 159 of file usb.h.

#define USB_DEVICE_CLASS_HUB 0x09

Definition at line 166 of file usb.h.

#define USB_DEVICE_CLASS_HUMAN_INTERFACE 0x03

Definition at line 160 of file usb.h.

#define USB_DEVICE_CLASS_MISCELLANEOUS 0xEF

Definition at line 167 of file usb.h.

#define USB_DEVICE_CLASS_MONITOR 0x04

Definition at line 161 of file usb.h.

#define USB_DEVICE_CLASS_PHYSICAL_INTERFACE 0x05

Definition at line 162 of file usb.h.

#define USB_DEVICE_CLASS_POWER 0x06

Definition at line 163 of file usb.h.

#define USB_DEVICE_CLASS_PRINTER 0x07

Definition at line 164 of file usb.h.

#define USB_DEVICE_CLASS_RESERVED 0x00

Definition at line 157 of file usb.h.

#define USB_DEVICE_CLASS_STORAGE 0x08

Definition at line 165 of file usb.h.

#define USB_DEVICE_CLASS_VENDOR_SPECIFIC 0xFF

Definition at line 168 of file usb.h.

#define USB_DEVICE_DESCRIPTOR_TYPE 1

Definition at line 144 of file usb.h.

#define USB_DEVICE_QUALIFIER_DESCRIPTOR_TYPE 6

Definition at line 149 of file usb.h.

#define USB_ENDPOINT_DESCRIPTOR_TYPE 5

Definition at line 148 of file usb.h.

#define USB_ENDPOINT_DIRECTION_MASK 0x80

Definition at line 180 of file usb.h.

#define USB_ENDPOINT_IN ( addr ) ((addr) | 0x80)

Definition at line 182 of file usb.h.

#define USB_ENDPOINT_OUT ( addr ) ((addr) | 0x00)

Definition at line 181 of file usb.h.

#define USB_ENDPOINT_SYNC_ADAPTIVE 0x08

Definition at line 193 of file usb.h.

#define USB_ENDPOINT_SYNC_ASYNCHRONOUS 0x04

Definition at line 192 of file usb.h.

#define USB_ENDPOINT_SYNC_MASK 0x0C

Definition at line 190 of file usb.h.

#define USB_ENDPOINT_SYNC_NO_SYNCHRONIZATION 0x00

Definition at line 191 of file usb.h.

#define USB_ENDPOINT_SYNC_SYNCHRONOUS 0x0C

Definition at line 194 of file usb.h.

#define USB_ENDPOINT_TYPE_BULK 0x02

Definition at line 188 of file usb.h.

#define USB_ENDPOINT_TYPE_CONTROL 0x00

Definition at line 186 of file usb.h.

#define USB_ENDPOINT_TYPE_INTERRUPT 0x03

Definition at line 189 of file usb.h.

#define USB_ENDPOINT_TYPE_ISOCHRONOUS 0x01

Definition at line 187 of file usb.h.

#define USB_ENDPOINT_TYPE_MASK 0x03

Definition at line 185 of file usb.h.

#define USB_ENDPOINT_USAGE_DATA 0x00

Definition at line 196 of file usb.h.

#define USB_ENDPOINT_USAGE_FEEDBACK 0x10

Definition at line 197 of file usb.h.

#define USB_ENDPOINT_USAGE_IMPLICIT_FEEDBACK 0x20

Definition at line 198 of file usb.h.

#define USB_ENDPOINT_USAGE_MASK 0x30

Definition at line 195 of file usb.h.

#define USB_ENDPOINT_USAGE_RESERVED 0x30

Definition at line 199 of file usb.h.

#define USB_FEATURE_ENDPOINT_STALL 0

Definition at line 120 of file usb.h.

#define USB_FEATURE_REMOTE_WAKEUP 1

Definition at line 121 of file usb.h.

#define USB_GETSTATUS_ENDPOINT_STALL 0x01

Definition at line 117 of file usb.h.

#define USB_GETSTATUS_REMOTE_WAKEUP 0x02

Definition at line 116 of file usb.h.

#define USB_GETSTATUS_SELF_POWERED 0x01

Definition at line 115 of file usb.h.

#define USB_INTERFACE_ASSOCIATION_DESCRIPTOR_TYPE 11

Definition at line 154 of file usb.h.

#define USB_INTERFACE_DESCRIPTOR_TYPE 4

Definition at line 147 of file usb.h.

#define USB_INTERFACE_POWER_DESCRIPTOR_TYPE 8

Definition at line 151 of file usb.h.

#define USB_OTG_DESCRIPTOR_TYPE 9

Definition at line 152 of file usb.h.

#define USB_OTHER_SPEED_CONFIG_DESCRIPTOR_TYPE 7

Definition at line 150 of file usb.h.

#define USB_REQUEST_CLEAR_FEATURE 1

Definition at line 103 of file usb.h.

#define USB_REQUEST_GET_CONFIGURATION 8

Definition at line 108 of file usb.h.

#define USB_REQUEST_GET_DESCRIPTOR 6

Definition at line 106 of file usb.h.

#define USB_REQUEST_GET_INTERFACE 10

Definition at line 110 of file usb.h.

#define USB_REQUEST_GET_STATUS 0

Definition at line 102 of file usb.h.

#define USB_REQUEST_SET_ADDRESS 5

Definition at line 105 of file usb.h.

#define USB_REQUEST_SET_CONFIGURATION 9

Definition at line 109 of file usb.h.

#define USB_REQUEST_SET_DESCRIPTOR 7

Definition at line 107 of file usb.h.

#define USB_REQUEST_SET_FEATURE 3

Definition at line 104 of file usb.h.

#define USB_REQUEST_SET_INTERFACE 11

Definition at line 111 of file usb.h.

#define USB_REQUEST_SYNC_FRAME 12

Definition at line 112 of file usb.h.

#define USB_STRING_DESCRIPTOR_TYPE 3

Definition at line 146 of file usb.h.

Variable Documentation

uint8_t B

Definition at line 95 of file usb.h.

uint8_t bAlternateSetting

Definition at line 286 of file usb.h.

uint16_t bcdDevice

Definition at line 219 of file usb.h.

uint16_t bcdUSB

Definition at line 212 of file usb.h.

uint8_t bConfigurationValue

Definition at line 265 of file usb.h.

uint8_t bDescriptorType

Definition at line 211 of file usb.h.

uint8_t bDeviceClass

Definition at line 213 of file usb.h.

uint8_t bDeviceProtocol

Definition at line 215 of file usb.h.

uint8_t bDeviceSubClass

Definition at line 214 of file usb.h.

uint8_t bEndpointAddress

Definition at line 308 of file usb.h.

uint8_t bInterfaceClass

Definition at line 288 of file usb.h.

uint8_t bInterfaceNumber

Definition at line 285 of file usb.h.

uint8_t bInterfaceProtocol

Definition at line 290 of file usb.h.

uint8_t bInterfaceSubClass

Definition at line 289 of file usb.h.

uint8_t bInterval

Definition at line 311 of file usb.h.

uint8_t bLength

Definition at line 210 of file usb.h.

BM

Definition at line 91 of file usb.h.

uint8_t bmAttributes

Definition at line 267 of file usb.h.

uint8_t bMaxPacketSize0

Definition at line 216 of file usb.h.

uint8_t bMaxPower

Definition at line 268 of file usb.h.

REQUEST_TYPE bmRequestType

Definition at line 132 of file usb.h.

uint8_t bNumConfigurations

Definition at line 223 of file usb.h.

uint8_t bNumEndpoints

Definition at line 287 of file usb.h.

uint8_t bNumInterfaces

Definition at line 264 of file usb.h.

uint8_t bRequest

Definition at line 133 of file usb.h.

uint8_t bReserved

Definition at line 246 of file usb.h.

uint16_t bString

Definition at line 328 of file usb.h.

uint8_t Dir

Definition at line 90 of file usb.h.

uint8_t H

Definition at line 44 of file usb.h.

uint8_t iConfiguration

Definition at line 266 of file usb.h.

uint16_t idProduct

Definition at line 218 of file usb.h.

uint16_t idVendor

Definition at line 217 of file usb.h.

uint8_t iInterface

Definition at line 291 of file usb.h.

uint8_t iManufacturer

Definition at line 220 of file usb.h.

uint8_t iProduct

Definition at line 221 of file usb.h.

uint8_t iSerialNumber

Definition at line 222 of file usb.h.

uint8_t L

Definition at line 43 of file usb.h.

uint8_t Recipient

Definition at line 88 of file usb.h.

REQUEST_TYPE

Definition at line 96 of file usb.h.

uint8_t Type

Definition at line 89 of file usb.h.

USB_COMMON_DESCRIPTOR

Definition at line 345 of file usb.h.

USB_CONFIGURATION_DESCRIPTOR

Definition at line 269 of file usb.h.

USB_DEVICE_DESCRIPTOR

Definition at line 224 of file usb.h.

USB_DEVICE_QUALIFIER_DESCRIPTOR

Definition at line 247 of file usb.h.

USB_ENDPOINT_DESCRIPTOR

Definition at line 312 of file usb.h.

USB_INTERFACE_DESCRIPTOR

Definition at line 292 of file usb.h.

USB_SETUP_PACKET

Definition at line 137 of file usb.h.

USB_STRING_DESCRIPTOR

Definition at line 329 of file usb.h.

uint16_t W

Definition at line 34 of file usb.h.

WB

Definition at line 45 of file usb.h.

WORD_BYTE wIndex

Definition at line 135 of file usb.h.

uint16_t wLength

Definition at line 136 of file usb.h.

uint16_t wMaxPacketSize

Definition at line 310 of file usb.h.

WORD_BYTE

Definition at line 49 of file usb.h.

uint16_t wTotalLength

Definition at line 263 of file usb.h.

WORD_BYTE wValue

Definition at line 134 of file usb.h.

Generated on Tue Jun 7 14:59:21 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBAudio/usbaudio.h File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBAudio/usbaudio.h File Reference

Go to the source code of this file.

Defines

#define | DATA_FREQ 32000
#define | P_S 32
#define | P_C 1
#define | B_S (8*P_C*P_S)
#define | LEDMSK 0x000000FF

Variables

uint8_t | Mute
uint32_t | Volume
uint16_t | VolCur
uint32_t | InfoBuf [P_C]
short | DataBuf [B_S]
uint16_t | DataOut
uint16_t | DataIn
uint8_t | DataRun

Define Documentation

#define B_S (8*P_C*P_S)

Definition at line 25 of file usbaudio.h.

#define DATA_FREQ 32000

Definition at line 18 of file usbaudio.h.

#define LEDMSK 0x000000FF

Definition at line 31 of file usbaudio.h.

#define P_C 1

Definition at line 23 of file usbaudio.h.

#define P_S 32

Definition at line 19 of file usbaudio.h.

Variable Documentation

uint16_t VolCur

Definition at line 29 of file adcuser.c.

Generated on Tue Jun 7 14:59:22 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBAudio/usbcfg.h File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBAudio/usbcfg.h File Reference

Go to the source code of this file.

Defines

#define | USB_POWER 0
#define | USB_IF_NUM 4
#define | USB_EP_NUM 32
#define | USB_MAX_PACKET0 64
#define | USB_DMA 0
#define | USB_DMA_EP 0x00000040
#define | USB_POWER_EVENT 0
#define | USB_RESET_EVENT 1
#define | USB_SUSPEND_EVENT 0
#define | USB_RESUME_EVENT 0
#define | USB_WAKEUP_EVENT 0
#define | USB_SOF_EVENT 1
#define | USB_ERROR_EVENT 0
#define | USB_EP_EVENT 0x0009
#define | USB_CONFIGURE_EVENT 0
#define | USB_INTERFACE_EVENT 0
#define | USB_FEATURE_EVENT 0
#define | USB_CLASS 1
#define | USB_HID 0
#define | USB_HID_IF_NUM 0
#define | USB_MSC 0
#define | USB_MSC_IF_NUM 0
#define | USB_AUDIO 1
#define | USB_ADC_CIF_NUM 0
#define | USB_ADC_SIF1_NUM 1
#define | USB_ADC_SIF2_NUM 2
#define | USB_CDC 0
#define | USB_CDC_CIF_NUM 0
#define | USB_CDC_DIF_NUM 1
#define | USB_CDC_BUFSIZE 64
#define | USB_VENDOR 0

Define Documentation

#define USB_ADC_CIF_NUM 0

Definition at line 165 of file usbcfg.h.

#define USB_ADC_SIF1_NUM 1

Definition at line 166 of file usbcfg.h.

#define USB_ADC_SIF2_NUM 2

Definition at line 167 of file usbcfg.h.

#define USB_AUDIO 1

Definition at line 164 of file usbcfg.h.

#define USB_CDC 0

Definition at line 168 of file usbcfg.h.

#define USB_CDC_BUFSIZE 64

Definition at line 171 of file usbcfg.h.

#define USB_CDC_CIF_NUM 0

Definition at line 169 of file usbcfg.h.

#define USB_CDC_DIF_NUM 1

Definition at line 170 of file usbcfg.h.

#define USB_CLASS 1

Definition at line 159 of file usbcfg.h.

#define USB_CONFIGURE_EVENT 0

Definition at line 131 of file usbcfg.h.

#define USB_DMA 0

Definition at line 82 of file usbcfg.h.

#define USB_DMA_EP 0x00000040

Definition at line 83 of file usbcfg.h.

#define USB_EP_EVENT 0x0009

Definition at line 130 of file usbcfg.h.

#define USB_EP_NUM 32

Definition at line 80 of file usbcfg.h.

#define USB_ERROR_EVENT 0

Definition at line 129 of file usbcfg.h.

#define USB_FEATURE_EVENT 0

Definition at line 133 of file usbcfg.h.

#define USB_HID 0

Definition at line 160 of file usbcfg.h.

#define USB_HID_IF_NUM 0

Definition at line 161 of file usbcfg.h.

#define USB_IF_NUM 4

Definition at line 79 of file usbcfg.h.

#define USB_INTERFACE_EVENT 0

Definition at line 132 of file usbcfg.h.

#define USB_MAX_PACKET0 64

Definition at line 81 of file usbcfg.h.

#define USB_MSC 0

Definition at line 162 of file usbcfg.h.

#define USB_MSC_IF_NUM 0

Definition at line 163 of file usbcfg.h.

#define USB_POWER 0

Definition at line 78 of file usbcfg.h.

#define USB_POWER_EVENT 0

Definition at line 123 of file usbcfg.h.

#define USB_RESET_EVENT 1

Definition at line 124 of file usbcfg.h.

#define USB_RESUME_EVENT 0

Definition at line 126 of file usbcfg.h.

#define USB_SOF_EVENT 1

Definition at line 128 of file usbcfg.h.

#define USB_SUSPEND_EVENT 0

Definition at line 125 of file usbcfg.h.

#define USB_VENDOR 0

Definition at line 178 of file usbcfg.h.

#define USB_WAKEUP_EVENT 0

Definition at line 127 of file usbcfg.h.

Generated on Tue Jun 7 14:59:23 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBAudio/usbcore.c File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBAudio/usbcore.c File Reference

#include "lpc_types.h"
#include "usb.h"
#include "usbcfg.h"
#include "usbhw.h"
#include "usbcore.h"
#include "usbdesc.h"
#include "usbuser.h"
#include "audio.h"
#include "adcuser.h"

Go to the source code of this file.

Functions

void | USB_ResetCore (void)
void | USB_SetupStage (void)
void | USB_DataInStage (void)
void | USB_DataOutStage (void)
void | USB_StatusInStage (void)
void | USB_StatusOutStage (void)
__inline uint32_t | USB_ReqGetStatus (void)
__inline uint32_t | USB_ReqSetClrFeature (uint32_t sc)
__inline uint32_t | USB_ReqSetAddress (void)
__inline uint32_t | USB_ReqGetDescriptor (void)
__inline uint32_t | USB_ReqGetConfiguration (void)
__inline uint32_t | USB_ReqSetConfiguration (void)
__inline uint32_t | USB_ReqGetInterface (void)
__inline uint32_t | USB_ReqSetInterface (void)
void | USB_EndPoint0 (uint32_t event)

Variables

uint16_t | USB_DeviceStatus
uint8_t | USB_DeviceAddress
uint8_t | USB_Configuration
uint32_t | USB_EndPointMask
uint32_t | USB_EndPointHalt
uint32_t | USB_EndPointStall
uint8_t | USB_NumInterfaces
uint8_t | USB_AltSetting [USB_IF_NUM]
uint8_t | EP0Buf [USB_MAX_PACKET0]
USB_EP_DATA EP0Data
USB_SETUP_PACKET SetupPacket

Function Documentation

void USB_DataInStage ( void )

Definition at line 127 of file usbcore.c.

void USB_DataOutStage ( void )

Definition at line 147 of file usbcore.c.

void USB_EndPoint0 ( uint32_t event )

Definition at line 600 of file usbcore.c.

__inline uint32_t USB_ReqGetConfiguration ( void )

Definition at line 387 of file usbcore.c.

__inline uint32_t USB_ReqGetDescriptor ( void )

Definition at line 304 of file usbcore.c.

__inline uint32_t USB_ReqGetInterface ( void )

Definition at line 504 of file usbcore.c.

__inline uint32_t USB_ReqGetStatus ( void )

Definition at line 184 of file usbcore.c.

__inline uint32_t USB_ReqSetAddress ( void )

Definition at line 285 of file usbcore.c.

__inline uint32_t USB_ReqSetClrFeature ( uint32_t sc )

Definition at line 223 of file usbcore.c.

__inline uint32_t USB_ReqSetConfiguration ( void )

Definition at line 406 of file usbcore.c.

__inline uint32_t USB_ReqSetInterface ( void )

Definition at line 527 of file usbcore.c.

void USB_ResetCore ( void )

Definition at line 99 of file usbcore.c.

void USB_SetupStage ( void )

Definition at line 116 of file usbcore.c.

void USB_StatusInStage ( void )

Definition at line 162 of file usbcore.c.

void USB_StatusOutStage ( void )

Definition at line 173 of file usbcore.c.

Variable Documentation

uint8_t EP0Buf[USB_MAX_PACKET0]

Definition at line 85 of file usbcore.c.

USB_EP_DATA EP0Data

Definition at line 88 of file usbcore.c.

USB_SETUP_PACKET SetupPacket

Definition at line 90 of file usbcore.c.

uint8_t USB_AltSetting[USB_IF_NUM]

Definition at line 83 of file usbcore.c.

uint8_t USB_Configuration

Definition at line 78 of file usbcore.c.

uint8_t USB_DeviceAddress

Definition at line 77 of file usbcore.c.

uint16_t USB_DeviceStatus

Definition at line 76 of file usbcore.c.

uint32_t USB_EndPointHalt

Definition at line 80 of file usbcore.c.

uint32_t USB_EndPointMask

Definition at line 79 of file usbcore.c.

uint32_t USB_EndPointStall

Definition at line 81 of file usbcore.c.

uint8_t USB_NumInterfaces

Definition at line 82 of file usbcore.c.

Generated on Tue Jun 7 14:59:23 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBAudio/usbcore.h File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBAudio/usbcore.h File Reference

Go to the source code of this file.

Data Structures

struct | _USB_EP_DATA

Typedefs

typedef struct _USB_EP_DATA | USB_EP_DATA

Functions

void | USB_ResetCore (void)

Variables

uint16_t | USB_DeviceStatus
uint8_t | USB_DeviceAddress
uint8_t | USB_Configuration
uint32_t | USB_EndPointMask
uint32_t | USB_EndPointHalt
uint32_t | USB_EndPointStall
uint8_t | USB_AltSetting [USB_IF_NUM]
uint8_t | EP0Buf [USB_MAX_PACKET0]
USB_EP_DATA EP0Data
USB_SETUP_PACKET SetupPacket

Typedef Documentation

typedef struct _USB_EP_DATA USB_EP_DATA

Function Documentation

void USB_ResetCore ( void )

Definition at line 99 of file usbcore.c.

Variable Documentation

uint8_t EP0Buf[USB_MAX_PACKET0]

Definition at line 85 of file usbcore.c.

USB_EP_DATA EP0Data

Definition at line 88 of file usbcore.c.

USB_SETUP_PACKET SetupPacket

Definition at line 90 of file usbcore.c.

uint8_t USB_AltSetting[USB_IF_NUM]

Definition at line 83 of file usbcore.c.

uint8_t USB_Configuration

Definition at line 78 of file usbcore.c.

uint8_t USB_DeviceAddress

Definition at line 77 of file usbcore.c.

uint16_t USB_DeviceStatus

Definition at line 76 of file usbcore.c.

uint32_t USB_EndPointHalt

Definition at line 80 of file usbcore.c.

uint32_t USB_EndPointMask

Definition at line 79 of file usbcore.c.

uint32_t USB_EndPointStall

Definition at line 81 of file usbcore.c.

Generated on Tue Jun 7 14:59:24 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBAudio/usbdesc.c File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBAudio/usbdesc.c File Reference

#include "lpc_types.h"
#include "usb.h"
#include "audio.h"
#include "usbcfg.h"
#include "usbdesc.h"

Go to the source code of this file.

Variables

const uint8_t | USB_DeviceDescriptor []
const uint8_t | USB_ConfigDescriptor []
const uint8_t | USB_StringDescriptor []

Variable Documentation

const uint8_t USB_ConfigDescriptor[]

Definition at line 50 of file usbdesc.c.

const uint8_t USB_DeviceDescriptor[]

Initial value:

 {
  USB_DEVICE_DESC_SIZE,
  USB_DEVICE_DESCRIPTOR_TYPE,
  WBVAL(0x0200),
  0x00,
  0x00,
  0x00,
  USB_MAX_PACKET0,
  WBVAL(0x1FC9),
  WBVAL(0x4002),
  WBVAL(0x0100),
  0x01,
  0x02,
  0x03,
  0x01
}

Definition at line 31 of file usbdesc.c.

const uint8_t USB_StringDescriptor[]

Definition at line 185 of file usbdesc.c.

Generated on Tue Jun 7 14:59:24 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBAudio/usbdesc.h File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBAudio/usbdesc.h File Reference

Go to the source code of this file.

Defines

#define | WBVAL(x) (x & 0xFF),((x >> 8) & 0xFF)
#define | B3VAL(x) (x & 0xFF),((x >> 8) & 0xFF),((x >> 16) & 0xFF)
#define | USB_DEVICE_DESC_SIZE (sizeof(USB_DEVICE_DESCRIPTOR))
#define | USB_CONFIGUARTION_DESC_SIZE (sizeof(USB_CONFIGURATION_DESCRIPTOR))
#define | USB_INTERFACE_DESC_SIZE (sizeof(USB_INTERFACE_DESCRIPTOR))
#define | USB_ENDPOINT_DESC_SIZE (sizeof(USB_ENDPOINT_DESCRIPTOR))

Variables

const uint8_t | USB_DeviceDescriptor []
const uint8_t | USB_ConfigDescriptor []
const uint8_t | USB_StringDescriptor []

Define Documentation

#define B3VAL ( x ) (x & 0xFF),((x >> 8) & 0xFF),((x >> 16) & 0xFF)

Definition at line 24 of file usbdesc.h.

#define USB_CONFIGUARTION_DESC_SIZE (sizeof(USB_CONFIGURATION_DESCRIPTOR))

Definition at line 27 of file usbdesc.h.

#define USB_DEVICE_DESC_SIZE (sizeof(USB_DEVICE_DESCRIPTOR))

Definition at line 26 of file usbdesc.h.

#define USB_ENDPOINT_DESC_SIZE (sizeof(USB_ENDPOINT_DESCRIPTOR))

Definition at line 29 of file usbdesc.h.

#define USB_INTERFACE_DESC_SIZE (sizeof(USB_INTERFACE_DESCRIPTOR))

Definition at line 28 of file usbdesc.h.

#define WBVAL ( x ) (x & 0xFF),((x >> 8) & 0xFF)

Definition at line 23 of file usbdesc.h.

Variable Documentation

const uint8_t USB_ConfigDescriptor[]

Definition at line 50 of file usbdesc.c.

const uint8_t USB_DeviceDescriptor[]

Definition at line 31 of file usbdesc.c.

const uint8_t USB_StringDescriptor[]

Definition at line 185 of file usbdesc.c.

Generated on Tue Jun 7 14:59:24 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBAudio/usbdmain.c File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBAudio/usbdmain.c File Reference

#include "LPC17xx.h"
#include "lpc_types.h"
#include "usb.h"
#include "usbcfg.h"
#include "usbhw.h"
#include "usbcore.h"
#include "usbaudio.h"

Go to the source code of this file.

Functions

void | get_potval (void)
void | TIMER0_IRQHandler (void)
TIMER0 IRQ Handler.
int | main (void)

Variables

uint8_t | Mute
uint32_t | Volume
uint32_t | InfoBuf [P_C]
short | DataBuf [B_S]
uint16_t | DataOut
uint16_t | DataIn
uint8_t | DataRun
uint16_t | PotVal
uint32_t | VUM
uint32_t | Tick

Generated on Tue Jun 7 14:59:25 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBAudio/usbhw.c File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBAudio/usbhw.c File Reference

#include "LPC17xx.h"
#include "lpc_types.h"
#include "usb.h"
#include "usbcfg.h"
#include "usbreg.h"
#include "usbhw.h"
#include "usbcore.h"
#include "usbuser.h"

Go to the source code of this file.

Defines

#define | EP_MSK_CTRL 0x0001
#define | EP_MSK_BULK 0xC924
#define | EP_MSK_INT 0x4492
#define | EP_MSK_ISO 0x1248

Functions

uint32_t | EPAdr (uint32_t EPNum)
void | WrCmd (uint32_t cmd)
void | WrCmdDat (uint32_t cmd, uint32_t val)
void | WrCmdEP (uint32_t EPNum, uint32_t cmd)
uint32_t | RdCmdDat (uint32_t cmd)
void | USB_Init (void)
void | USB_Connect (uint32_t con)
void | USB_Reset (void)
void | USB_Suspend (void)
void | USB_Resume (void)
void | USB_WakeUp (void)
void | USB_WakeUpCfg (uint32_t cfg)
void | USB_SetAddress (uint32_t adr)
void | USB_Configure (uint32_t cfg)
void | USB_ConfigEP (USB_ENDPOINT_DESCRIPTOR *pEPD)
void | USB_DirCtrlEP (uint32_t dir)
void | USB_EnableEP (uint32_t EPNum)
void | USB_DisableEP (uint32_t EPNum)
void | USB_ResetEP (uint32_t EPNum)
void | USB_SetStallEP (uint32_t EPNum)
void | USB_ClrStallEP (uint32_t EPNum)
void | USB_ClearEPBuf (uint32_t EPNum)
uint32_t | USB_ReadEP (uint32_t EPNum, uint8_t *pData)
uint32_t | USB_WriteEP (uint32_t EPNum, uint8_t *pData, uint32_t cnt)
uint32_t | USB_GetFrame (void)
void | USB_IRQHandler (void)

Define Documentation

#define EP_MSK_BULK 0xC924

Definition at line 38 of file usbhw.c.

#define EP_MSK_CTRL 0x0001

Definition at line 37 of file usbhw.c.

#define EP_MSK_INT 0x4492

Definition at line 39 of file usbhw.c.

#define EP_MSK_ISO 0x1248

Definition at line 40 of file usbhw.c.

Function Documentation

uint32_t EPAdr ( uint32_t EPNum )

Definition at line 66 of file usbhw.c.

uint32_t RdCmdDat ( uint32_t cmd )

Definition at line 133 of file usbhw.c.

void USB_ClearEPBuf ( uint32_t EPNum )

Definition at line 403 of file usbhw.c.

void USB_ClrStallEP ( uint32_t EPNum )

Definition at line 390 of file usbhw.c.

void USB_ConfigEP ( USB_ENDPOINT_DESCRIPTOR * pEPD )

Definition at line 307 of file usbhw.c.

void USB_Configure ( uint32_t cfg )

Definition at line 291 of file usbhw.c.

void USB_Connect ( uint32_t con )

Definition at line 178 of file usbhw.c.

void USB_DirCtrlEP ( uint32_t dir )

Definition at line 325 of file usbhw.c.

void USB_DisableEP ( uint32_t EPNum )

Definition at line 351 of file usbhw.c.

void USB_EnableEP ( uint32_t EPNum )

Definition at line 338 of file usbhw.c.

uint32_t USB_GetFrame ( void )

Definition at line 647 of file usbhw.c.

void USB_Init ( void )

Definition at line 148 of file usbhw.c.

void USB_IRQHandler ( void )

Definition at line 662 of file usbhw.c.

uint32_t USB_ReadEP | ( | uint32_t | EPNum,
 |  | uint8_t * | pData
 | ) |  |

Definition at line 417 of file usbhw.c.

void USB_Reset ( void )

Definition at line 189 of file usbhw.c.

void USB_ResetEP ( uint32_t EPNum )

Definition at line 364 of file usbhw.c.

void USB_Resume ( void )

Definition at line 243 of file usbhw.c.

void USB_SetAddress ( uint32_t adr )

Definition at line 279 of file usbhw.c.

void USB_SetStallEP ( uint32_t EPNum )

Definition at line 377 of file usbhw.c.

void USB_Suspend ( void )

Definition at line 232 of file usbhw.c.

void USB_WakeUp ( void )

Definition at line 254 of file usbhw.c.

void USB_WakeUpCfg ( uint32_t cfg )

Definition at line 268 of file usbhw.c.

uint32_t USB_WriteEP | ( | uint32_t | EPNum,
 |  | uint8_t * | pData,
 |  | uint32_t | cnt
 | ) |  |

Definition at line 450 of file usbhw.c.

void WrCmd ( uint32_t cmd )

Definition at line 83 of file usbhw.c.

void WrCmdDat | ( | uint32_t | cmd,
 |  | uint32_t | val
 | ) |  |

Definition at line 98 of file usbhw.c.

void WrCmdEP | ( | uint32_t | EPNum,
 |  | uint32_t | cmd
 | ) |  |

Definition at line 116 of file usbhw.c.

Generated on Tue Jun 7 14:59:25 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBAudio/usbhw.h File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBAudio/usbhw.h File Reference

Go to the source code of this file.

Data Structures

struct | _USB_DMA_DESCRIPTOR

Defines

#define | USB_RAM_ADR 0x20080000
#define | USB_RAM_SZ 0x00004000
#define | DD_NISO_CNT 16
#define | DD_ISO_CNT 8
#define | DD_NISO_SZ (DD_NISO_CNT * 16)
#define | DD_ISO_SZ (DD_ISO_CNT * 20)
#define | DD_NISO_ADR (USB_RAM_ADR + 128)
#define | DD_ISO_ADR (DD_NISO_ADR + DD_NISO_SZ)
#define | DD_SZ (128 + DD_NISO_SZ + DD_ISO_SZ)
#define | DMA_BUF_ADR (USB_RAM_ADR + DD_SZ)
#define | DMA_BUF_SZ (USB_RAM_SZ - DD_SZ)
#define | USB_ERR_PID 0x0001
#define | USB_ERR_UEPKT 0x0002
#define | USB_ERR_DCRC 0x0004
#define | USB_ERR_TIMOUT 0x0008
#define | USB_ERR_EOP 0x0010
#define | USB_ERR_B_OVRN 0x0020
#define | USB_ERR_BTSTF 0x0040
#define | USB_ERR_TGL 0x0080
#define | USB_DMA_INVALID 0x0000
#define | USB_DMA_IDLE 0x0001
#define | USB_DMA_BUSY 0x0002
#define | USB_DMA_DONE 0x0003
#define | USB_DMA_OVER_RUN 0x0004
#define | USB_DMA_UNDER_RUN 0x0005
#define | USB_DMA_ERROR 0x0006
#define | USB_DMA_UNKNOWN 0xFFFF

Typedefs

typedef struct _USB_DMA_DESCRIPTOR | USB_DMA_DESCRIPTOR

Functions

void | USB_Init (void)
void | USB_Connect (uint32_t con)
void | USB_Reset (void)
void | USB_Suspend (void)
void | USB_Resume (void)
void | USB_WakeUp (void)
void | USB_WakeUpCfg (uint32_t cfg)
void | USB_SetAddress (uint32_t adr)
void | USB_Configure (uint32_t cfg)
void | USB_ConfigEP (USB_ENDPOINT_DESCRIPTOR *pEPD)
void | USB_DirCtrlEP (uint32_t dir)
void | USB_EnableEP (uint32_t EPNum)
void | USB_DisableEP (uint32_t EPNum)
void | USB_ResetEP (uint32_t EPNum)
void | USB_SetStallEP (uint32_t EPNum)
void | USB_ClrStallEP (uint32_t EPNum)
void | USB_ClearEPBuf (uint32_t EPNum)
uint32_t | USB_ReadEP (uint32_t EPNum, uint8_t *pData)
uint32_t | USB_WriteEP (uint32_t EPNum, uint8_t *pData, uint32_t cnt)
uint32_t | USB_DMA_Setup (uint32_t EPNum, USB_DMA_DESCRIPTOR *pDD)
void | USB_DMA_Enable (uint32_t EPNum)
void | USB_DMA_Disable (uint32_t EPNum)
uint32_t | USB_DMA_Status (uint32_t EPNum)
uint32_t | USB_DMA_BufAdr (uint32_t EPNum)
uint32_t | USB_DMA_BufCnt (uint32_t EPNum)
uint32_t | USB_GetFrame (void)
void | USB_IRQHandler (void)

Define Documentation

#define DD_ISO_ADR (DD_NISO_ADR + DD_NISO_SZ)

Definition at line 37 of file usbhw.h.

#define DD_ISO_CNT 8

Definition at line 33 of file usbhw.h.

#define DD_ISO_SZ (DD_ISO_CNT * 20)

Definition at line 35 of file usbhw.h.

#define DD_NISO_ADR (USB_RAM_ADR + 128)

Definition at line 36 of file usbhw.h.

#define DD_NISO_CNT 16

Definition at line 32 of file usbhw.h.

#define DD_NISO_SZ (DD_NISO_CNT * 16)

Definition at line 34 of file usbhw.h.

#define DD_SZ (128 + DD_NISO_SZ + DD_ISO_SZ)

Definition at line 38 of file usbhw.h.

#define DMA_BUF_ADR (USB_RAM_ADR + DD_SZ)

Definition at line 41 of file usbhw.h.

#define DMA_BUF_SZ (USB_RAM_SZ - DD_SZ)

Definition at line 42 of file usbhw.h.

#define USB_DMA_BUSY 0x0002

Definition at line 57 of file usbhw.h.

#define USB_DMA_DONE 0x0003

Definition at line 58 of file usbhw.h.

#define USB_DMA_ERROR 0x0006

Definition at line 61 of file usbhw.h.

#define USB_DMA_IDLE 0x0001

Definition at line 56 of file usbhw.h.

#define USB_DMA_INVALID 0x0000

Definition at line 55 of file usbhw.h.

#define USB_DMA_OVER_RUN 0x0004

Definition at line 59 of file usbhw.h.

#define USB_DMA_UNDER_RUN 0x0005

Definition at line 60 of file usbhw.h.

#define USB_DMA_UNKNOWN 0xFFFF

Definition at line 62 of file usbhw.h.

#define USB_ERR_B_OVRN 0x0020

Definition at line 50 of file usbhw.h.

#define USB_ERR_BTSTF 0x0040

Definition at line 51 of file usbhw.h.

#define USB_ERR_DCRC 0x0004

Definition at line 47 of file usbhw.h.

#define USB_ERR_EOP 0x0010

Definition at line 49 of file usbhw.h.

#define USB_ERR_PID 0x0001

Definition at line 45 of file usbhw.h.

#define USB_ERR_TGL 0x0080

Definition at line 52 of file usbhw.h.

#define USB_ERR_TIMOUT 0x0008

Definition at line 48 of file usbhw.h.

#define USB_ERR_UEPKT 0x0002

Definition at line 46 of file usbhw.h.

#define USB_RAM_ADR 0x20080000

Definition at line 28 of file usbhw.h.

#define USB_RAM_SZ 0x00004000

Definition at line 29 of file usbhw.h.

Typedef Documentation

typedef struct _USB_DMA_DESCRIPTOR USB_DMA_DESCRIPTOR

Function Documentation

void USB_ClearEPBuf ( uint32_t EPNum )

Definition at line 403 of file usbhw.c.

void USB_ClrStallEP ( uint32_t EPNum )

Definition at line 390 of file usbhw.c.

void USB_ConfigEP ( USB_ENDPOINT_DESCRIPTOR * pEPD )

Definition at line 307 of file usbhw.c.

void USB_Configure ( uint32_t cfg )

Definition at line 291 of file usbhw.c.

void USB_Connect ( uint32_t con )

Definition at line 178 of file usbhw.c.

void USB_DirCtrlEP ( uint32_t dir )

Definition at line 325 of file usbhw.c.

void USB_DisableEP ( uint32_t EPNum )

Definition at line 351 of file usbhw.c.

uint32_t USB_DMA_BufAdr ( uint32_t EPNum )

Definition at line 599 of file usbhw.c.

uint32_t USB_DMA_BufCnt ( uint32_t EPNum )

Definition at line 622 of file usbhw.c.

void USB_DMA_Disable ( uint32_t EPNum )

Definition at line 553 of file usbhw.c.

void USB_DMA_Enable ( uint32_t EPNum )

Definition at line 540 of file usbhw.c.

uint32_t USB_DMA_Setup | ( | uint32_t | EPNum,
 |  | USB_DMA_DESCRIPTOR * | pDD
 | ) |  |

Definition at line 471 of file usbhw.c.

uint32_t USB_DMA_Status ( uint32_t EPNum )

Definition at line 566 of file usbhw.c.

void USB_EnableEP ( uint32_t EPNum )

Definition at line 338 of file usbhw.c.

uint32_t USB_GetFrame ( void )

Definition at line 647 of file usbhw.c.

void USB_Init ( void )

Definition at line 148 of file usbhw.c.

void USB_IRQHandler ( void )

Definition at line 662 of file usbhw.c.

uint32_t USB_ReadEP | ( | uint32_t | EPNum,
 |  | uint8_t * | pData
 | ) |  |

Definition at line 417 of file usbhw.c.

void USB_Reset ( void )

Definition at line 189 of file usbhw.c.

void USB_ResetEP ( uint32_t EPNum )

Definition at line 364 of file usbhw.c.

void USB_Resume ( void )

Definition at line 243 of file usbhw.c.

void USB_SetAddress ( uint32_t adr )

Definition at line 279 of file usbhw.c.

void USB_SetStallEP ( uint32_t EPNum )

Definition at line 377 of file usbhw.c.

void USB_Suspend ( void )

Definition at line 232 of file usbhw.c.

void USB_WakeUp ( void )

Definition at line 254 of file usbhw.c.

void USB_WakeUpCfg ( uint32_t cfg )

Definition at line 268 of file usbhw.c.

uint32_t USB_WriteEP | ( | uint32_t | EPNum,
 |  | uint8_t * | pData,
 |  | uint32_t | cnt
 | ) |  |

Definition at line 450 of file usbhw.c.

Generated on Tue Jun 7 14:59:26 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBAudio/usbreg.h File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBAudio/usbreg.h File Reference

Go to the source code of this file.

Defines

#define | FRAME_INT 0x00000001
#define | EP_FAST_INT 0x00000002
#define | EP_SLOW_INT 0x00000004
#define | DEV_STAT_INT 0x00000008
#define | CCEMTY_INT 0x00000010
#define | CDFULL_INT 0x00000020
#define | RxENDPKT_INT 0x00000040
#define | TxENDPKT_INT 0x00000080
#define | EP_RLZED_INT 0x00000100
#define | ERR_INT 0x00000200
#define | PKT_LNGTH_MASK 0x000003FF
#define | PKT_DV 0x00000400
#define | PKT_RDY 0x00000800
#define | CTRL_RD_EN 0x00000001
#define | CTRL_WR_EN 0x00000002
#define | CMD_SET_ADDR 0x00D00500
#define | CMD_CFG_DEV 0x00D80500
#define | CMD_SET_MODE 0x00F30500
#define | CMD_RD_FRAME 0x00F50500
#define | DAT_RD_FRAME 0x00F50200
#define | CMD_RD_TEST 0x00FD0500
#define | DAT_RD_TEST 0x00FD0200
#define | CMD_SET_DEV_STAT 0x00FE0500
#define | CMD_GET_DEV_STAT 0x00FE0500
#define | DAT_GET_DEV_STAT 0x00FE0200
#define | CMD_GET_ERR_CODE 0x00FF0500
#define | DAT_GET_ERR_CODE 0x00FF0200
#define | CMD_RD_ERR_STAT 0x00FB0500
#define | DAT_RD_ERR_STAT 0x00FB0200
#define | DAT_WR_BYTE(x) (0x00000100 | ((x) << 16))
#define | CMD_SEL_EP(x) (0x00000500 | ((x) << 16))
#define | DAT_SEL_EP(x) (0x00000200 | ((x) << 16))
#define | CMD_SEL_EP_CLRI(x) (0x00400500 | ((x) << 16))
#define | DAT_SEL_EP_CLRI(x) (0x00400200 | ((x) << 16))
#define | CMD_SET_EP_STAT(x) (0x00400500 | ((x) << 16))
#define | CMD_CLR_BUF 0x00F20500
#define | DAT_CLR_BUF 0x00F20200
#define | CMD_VALID_BUF 0x00FA0500
#define | DEV_ADDR_MASK 0x7F
#define | DEV_EN 0x80
#define | CONF_DVICE 0x01
#define | AP_CLK 0x01
#define | INAK_CI 0x02
#define | INAK_CO 0x04
#define | INAK_II 0x08
#define | INAK_IO 0x10
#define | INAK_BI 0x20
#define | INAK_BO 0x40
#define | DEV_CON 0x01
#define | DEV_CON_CH 0x02
#define | DEV_SUS 0x04
#define | DEV_SUS_CH 0x08
#define | DEV_RST 0x10
#define | ERR_EC_MASK 0x0F
#define | ERR_EA 0x10
#define | ERR_PID 0x01
#define | ERR_UEPKT 0x02
#define | ERR_DCRC 0x04
#define | ERR_TIMOUT 0x08
#define | ERR_EOP 0x10
#define | ERR_B_OVRN 0x20
#define | ERR_BTSTF 0x40
#define | ERR_TGL 0x80
#define | EP_SEL_F 0x01
#define | EP_SEL_ST 0x02
#define | EP_SEL_STP 0x04
#define | EP_SEL_PO 0x08
#define | EP_SEL_EPN 0x10
#define | EP_SEL_B_1_FULL 0x20
#define | EP_SEL_B_2_FULL 0x40
#define | EP_STAT_ST 0x01
#define | EP_STAT_DA 0x20
#define | EP_STAT_RF_MO 0x40
#define | EP_STAT_CND_ST 0x80
#define | CLR_BUF_PO 0x01
#define | EOT_INT 0x01
#define | NDD_REQ_INT 0x02
#define | SYS_ERR_INT 0x04

Define Documentation

#define AP_CLK 0x01

Definition at line 76 of file usbreg.h.

#define CCEMTY_INT 0x00000010

Definition at line 27 of file usbreg.h.

#define CDFULL_INT 0x00000020

Definition at line 28 of file usbreg.h.

#define CLR_BUF_PO 0x01

Definition at line 121 of file usbreg.h.

#define CMD_CFG_DEV 0x00D80500

Definition at line 45 of file usbreg.h.

#define CMD_CLR_BUF 0x00F20500

Definition at line 64 of file usbreg.h.

#define CMD_GET_DEV_STAT 0x00FE0500

Definition at line 52 of file usbreg.h.

#define CMD_GET_ERR_CODE 0x00FF0500

Definition at line 54 of file usbreg.h.

#define CMD_RD_ERR_STAT 0x00FB0500

Definition at line 56 of file usbreg.h.

#define CMD_RD_FRAME 0x00F50500

Definition at line 47 of file usbreg.h.

#define CMD_RD_TEST 0x00FD0500

Definition at line 49 of file usbreg.h.

#define CMD_SEL_EP ( x ) (0x00000500 | ((x) << 16))

Definition at line 59 of file usbreg.h.

#define CMD_SEL_EP_CLRI ( x ) (0x00400500 | ((x) << 16))

Definition at line 61 of file usbreg.h.

#define CMD_SET_ADDR 0x00D00500

Definition at line 44 of file usbreg.h.

#define CMD_SET_DEV_STAT 0x00FE0500

Definition at line 51 of file usbreg.h.

#define CMD_SET_EP_STAT ( x ) (0x00400500 | ((x) << 16))

Definition at line 63 of file usbreg.h.

#define CMD_SET_MODE 0x00F30500

Definition at line 46 of file usbreg.h.

#define CMD_VALID_BUF 0x00FA0500

Definition at line 66 of file usbreg.h.

#define CONF_DVICE 0x01

Definition at line 73 of file usbreg.h.

#define CTRL_RD_EN 0x00000001

Definition at line 40 of file usbreg.h.

#define CTRL_WR_EN 0x00000002

Definition at line 41 of file usbreg.h.

#define DAT_CLR_BUF 0x00F20200

Definition at line 65 of file usbreg.h.

#define DAT_GET_DEV_STAT 0x00FE0200

Definition at line 53 of file usbreg.h.

#define DAT_GET_ERR_CODE 0x00FF0200

Definition at line 55 of file usbreg.h.

#define DAT_RD_ERR_STAT 0x00FB0200

Definition at line 57 of file usbreg.h.

#define DAT_RD_FRAME 0x00F50200

Definition at line 48 of file usbreg.h.

#define DAT_RD_TEST 0x00FD0200

Definition at line 50 of file usbreg.h.

#define DAT_SEL_EP ( x ) (0x00000200 | ((x) << 16))

Definition at line 60 of file usbreg.h.

#define DAT_SEL_EP_CLRI ( x ) (0x00400200 | ((x) << 16))

Definition at line 62 of file usbreg.h.

#define DAT_WR_BYTE ( x ) (0x00000100 | ((x) << 16))

Definition at line 58 of file usbreg.h.

#define DEV_ADDR_MASK 0x7F

Definition at line 69 of file usbreg.h.

#define DEV_CON 0x01

Definition at line 85 of file usbreg.h.

#define DEV_CON_CH 0x02

Definition at line 86 of file usbreg.h.

#define DEV_EN 0x80

Definition at line 70 of file usbreg.h.

#define DEV_RST 0x10

Definition at line 89 of file usbreg.h.

#define DEV_STAT_INT 0x00000008

Definition at line 26 of file usbreg.h.

#define DEV_SUS 0x04

Definition at line 87 of file usbreg.h.

#define DEV_SUS_CH 0x08

Definition at line 88 of file usbreg.h.

#define EOT_INT 0x01

Definition at line 125 of file usbreg.h.

#define EP_FAST_INT 0x00000002

Definition at line 24 of file usbreg.h.

#define EP_RLZED_INT 0x00000100

Definition at line 31 of file usbreg.h.

#define EP_SEL_B_1_FULL 0x20

Definition at line 111 of file usbreg.h.

#define EP_SEL_B_2_FULL 0x40

Definition at line 112 of file usbreg.h.

#define EP_SEL_EPN 0x10

Definition at line 110 of file usbreg.h.

#define EP_SEL_F 0x01

Definition at line 106 of file usbreg.h.

#define EP_SEL_PO 0x08

Definition at line 109 of file usbreg.h.

#define EP_SEL_ST 0x02

Definition at line 107 of file usbreg.h.

#define EP_SEL_STP 0x04

Definition at line 108 of file usbreg.h.

#define EP_SLOW_INT 0x00000004

Definition at line 25 of file usbreg.h.

#define EP_STAT_CND_ST 0x80

Definition at line 118 of file usbreg.h.

#define EP_STAT_DA 0x20

Definition at line 116 of file usbreg.h.

#define EP_STAT_RF_MO 0x40

Definition at line 117 of file usbreg.h.

#define EP_STAT_ST 0x01

Definition at line 115 of file usbreg.h.

#define ERR_B_OVRN 0x20

Definition at line 101 of file usbreg.h.

#define ERR_BTSTF 0x40

Definition at line 102 of file usbreg.h.

#define ERR_DCRC 0x04

Definition at line 98 of file usbreg.h.

#define ERR_EA 0x10

Definition at line 93 of file usbreg.h.

#define ERR_EC_MASK 0x0F

Definition at line 92 of file usbreg.h.

#define ERR_EOP 0x10

Definition at line 100 of file usbreg.h.

#define ERR_INT 0x00000200

Definition at line 32 of file usbreg.h.

#define ERR_PID 0x01

Definition at line 96 of file usbreg.h.

#define ERR_TGL 0x80

Definition at line 103 of file usbreg.h.

#define ERR_TIMOUT 0x08

Definition at line 99 of file usbreg.h.

#define ERR_UEPKT 0x02

Definition at line 97 of file usbreg.h.

#define FRAME_INT 0x00000001

Definition at line 23 of file usbreg.h.

#define INAK_BI 0x20

Definition at line 81 of file usbreg.h.

#define INAK_BO 0x40

Definition at line 82 of file usbreg.h.

#define INAK_CI 0x02

Definition at line 77 of file usbreg.h.

#define INAK_CO 0x04

Definition at line 78 of file usbreg.h.

#define INAK_II 0x08

Definition at line 79 of file usbreg.h.

#define INAK_IO 0x10

Definition at line 80 of file usbreg.h.

#define NDD_REQ_INT 0x02

Definition at line 126 of file usbreg.h.

#define PKT_DV 0x00000400

Definition at line 36 of file usbreg.h.

#define PKT_LNGTH_MASK 0x000003FF

Definition at line 35 of file usbreg.h.

#define PKT_RDY 0x00000800

Definition at line 37 of file usbreg.h.

#define RxENDPKT_INT 0x00000040

Definition at line 29 of file usbreg.h.

#define SYS_ERR_INT 0x04

Definition at line 127 of file usbreg.h.

#define TxENDPKT_INT 0x00000080

Definition at line 30 of file usbreg.h.

Generated on Tue Jun 7 14:59:27 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBAudio/usbuser.c File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBAudio/usbuser.c File Reference

#include "lpc_types.h"
#include "usb.h"
#include "usbcfg.h"
#include "usbhw.h"
#include "usbcore.h"
#include "usbuser.h"
#include "usbaudio.h"

Go to the source code of this file.

Defines

#define | P_EP(n) ((USB_EP_EVENT & (1 << (n))) ? USB_EndPoint##n : NULL)

Functions

void | USB_Reset_Event (void)
void | USB_SOF_Event (void)
void | USB_EndPoint1 (uint32_t event)
void | USB_EndPoint2 (uint32_t event)
void | USB_EndPoint3 (uint32_t event)
void | USB_EndPoint4 (uint32_t event)
void | USB_EndPoint5 (uint32_t event)
void | USB_EndPoint6 (uint32_t event)
void | USB_EndPoint7 (uint32_t event)
void | USB_EndPoint8 (uint32_t event)
void | USB_EndPoint9 (uint32_t event)
void | USB_EndPoint10 (uint32_t event)
void | USB_EndPoint11 (uint32_t event)
void | USB_EndPoint12 (uint32_t event)
void | USB_EndPoint13 (uint32_t event)
void | USB_EndPoint14 (uint32_t event)
void | USB_EndPoint15 (uint32_t event)

Variables

void(*const | USB_P_EP [16])(uint32_t event)

Define Documentation

#define P_EP ( n ) ((USB_EP_EVENT & (1 << (n))) ? USB_EndPoint##n : NULL)

Definition at line 161 of file usbuser.c.

Function Documentation

void USB_EndPoint1 ( uint32_t event )

Definition at line 190 of file usbuser.c.

void USB_EndPoint10 ( uint32_t event )

Definition at line 311 of file usbuser.c.

void USB_EndPoint11 ( uint32_t event )

Definition at line 321 of file usbuser.c.

void USB_EndPoint12 ( uint32_t event )

Definition at line 331 of file usbuser.c.

void USB_EndPoint13 ( uint32_t event )

Definition at line 341 of file usbuser.c.

void USB_EndPoint14 ( uint32_t event )

Definition at line 351 of file usbuser.c.

void USB_EndPoint15 ( uint32_t event )

Definition at line 361 of file usbuser.c.

void USB_EndPoint2 ( uint32_t event )

Definition at line 200 of file usbuser.c.

void USB_EndPoint3 ( uint32_t event )

Definition at line 209 of file usbuser.c.

void USB_EndPoint4 ( uint32_t event )

Definition at line 251 of file usbuser.c.

void USB_EndPoint5 ( uint32_t event )

Definition at line 261 of file usbuser.c.

void USB_EndPoint6 ( uint32_t event )

Definition at line 271 of file usbuser.c.

void USB_EndPoint7 ( uint32_t event )

Definition at line 281 of file usbuser.c.

void USB_EndPoint8 ( uint32_t event )

Definition at line 291 of file usbuser.c.

void USB_EndPoint9 ( uint32_t event )

Definition at line 301 of file usbuser.c.

void USB_Reset_Event ( void )

Definition at line 48 of file usbuser.c.

void USB_SOF_Event ( void )

Definition at line 93 of file usbuser.c.

Variable Documentation

void(* const USB_P_EP[16])(uint32_t event)

Initial value:

 {
  P_EP(0),
  P_EP(1),
  P_EP(2),
  P_EP(3),
  P_EP(4),
  P_EP(5),
  P_EP(6),
  P_EP(7),
  P_EP(8),
  P_EP(9),
  P_EP(10),
  P_EP(11),
  P_EP(12),
  P_EP(13),
  P_EP(14),
  P_EP(15),
}

Generated on Tue Jun 7 14:59:28 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBAudio/usbuser.h File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBAudio/usbuser.h File Reference

Go to the source code of this file.

Defines

#define | USB_EVT_SETUP 1
#define | USB_EVT_OUT 2
#define | USB_EVT_IN 3
#define | USB_EVT_OUT_NAK 4
#define | USB_EVT_IN_NAK 5
#define | USB_EVT_OUT_STALL 6
#define | USB_EVT_IN_STALL 7
#define | USB_EVT_OUT_DMA_EOT 8
#define | USB_EVT_IN_DMA_EOT 9
#define | USB_EVT_OUT_DMA_NDR 10
#define | USB_EVT_IN_DMA_NDR 11
#define | USB_EVT_OUT_DMA_ERR 12
#define | USB_EVT_IN_DMA_ERR 13

Functions

void | USB_Power_Event (uint32_t power)
void | USB_Reset_Event (void)
void | USB_Suspend_Event (void)
void | USB_Resume_Event (void)
void | USB_WakeUp_Event (void)
void | USB_SOF_Event (void)
void | USB_Error_Event (uint32_t error)
void | USB_EndPoint0 (uint32_t event)
void | USB_EndPoint1 (uint32_t event)
void | USB_EndPoint2 (uint32_t event)
void | USB_EndPoint3 (uint32_t event)
void | USB_EndPoint4 (uint32_t event)
void | USB_EndPoint5 (uint32_t event)
void | USB_EndPoint6 (uint32_t event)
void | USB_EndPoint7 (uint32_t event)
void | USB_EndPoint8 (uint32_t event)
void | USB_EndPoint9 (uint32_t event)
void | USB_EndPoint10 (uint32_t event)
void | USB_EndPoint11 (uint32_t event)
void | USB_EndPoint12 (uint32_t event)
void | USB_EndPoint13 (uint32_t event)
void | USB_EndPoint14 (uint32_t event)
void | USB_EndPoint15 (uint32_t event)
void | USB_Configure_Event (void)
void | USB_Interface_Event (void)
void | USB_Feature_Event (void)

Variables

void(*const | USB_P_EP [16])(uint32_t event)

Define Documentation

#define USB_EVT_IN 3

Definition at line 35 of file usbuser.h.

#define USB_EVT_IN_DMA_EOT 9

Definition at line 41 of file usbuser.h.

#define USB_EVT_IN_DMA_ERR 13

Definition at line 45 of file usbuser.h.

#define USB_EVT_IN_DMA_NDR 11

Definition at line 43 of file usbuser.h.

#define USB_EVT_IN_NAK 5

Definition at line 37 of file usbuser.h.

#define USB_EVT_IN_STALL 7

Definition at line 39 of file usbuser.h.

#define USB_EVT_OUT 2

Definition at line 34 of file usbuser.h.

#define USB_EVT_OUT_DMA_EOT 8

Definition at line 40 of file usbuser.h.

#define USB_EVT_OUT_DMA_ERR 12

Definition at line 44 of file usbuser.h.

#define USB_EVT_OUT_DMA_NDR 10

Definition at line 42 of file usbuser.h.

#define USB_EVT_OUT_NAK 4

Definition at line 36 of file usbuser.h.

#define USB_EVT_OUT_STALL 6

Definition at line 38 of file usbuser.h.

#define USB_EVT_SETUP 1

Definition at line 33 of file usbuser.h.

Function Documentation

void USB_Configure_Event ( void )

Definition at line 114 of file usbuser.c.

void USB_EndPoint0 ( uint32_t event )

Definition at line 600 of file usbcore.c.

void USB_EndPoint1 ( uint32_t event )

Definition at line 190 of file usbuser.c.

void USB_EndPoint10 ( uint32_t event )

Definition at line 311 of file usbuser.c.

void USB_EndPoint11 ( uint32_t event )

Definition at line 321 of file usbuser.c.

void USB_EndPoint12 ( uint32_t event )

Definition at line 331 of file usbuser.c.

void USB_EndPoint13 ( uint32_t event )

Definition at line 341 of file usbuser.c.

void USB_EndPoint14 ( uint32_t event )

Definition at line 351 of file usbuser.c.

void USB_EndPoint15 ( uint32_t event )

Definition at line 361 of file usbuser.c.

void USB_EndPoint2 ( uint32_t event )

Definition at line 200 of file usbuser.c.

void USB_EndPoint3 ( uint32_t event )

Definition at line 209 of file usbuser.c.

void USB_EndPoint4 ( uint32_t event )

Definition at line 251 of file usbuser.c.

void USB_EndPoint5 ( uint32_t event )

Definition at line 261 of file usbuser.c.

void USB_EndPoint6 ( uint32_t event )

Definition at line 271 of file usbuser.c.

void USB_EndPoint7 ( uint32_t event )

Definition at line 281 of file usbuser.c.

void USB_EndPoint8 ( uint32_t event )

Definition at line 291 of file usbuser.c.

void USB_EndPoint9 ( uint32_t event )

Definition at line 301 of file usbuser.c.

void USB_Error_Event ( uint32_t error )

void USB_Feature_Event ( void )

void USB_Interface_Event ( void )

void USB_Power_Event ( uint32_t power )

void USB_Reset_Event ( void )

Definition at line 48 of file usbuser.c.

void USB_Resume_Event ( void )

void USB_SOF_Event ( void )

Definition at line 93 of file usbuser.c.

void USB_Suspend_Event ( void )

void USB_WakeUp_Event ( void )

Variable Documentation

void(* const USB_P_EP[16])(uint32_t event)

Generated on Tue Jun 7 14:59:29 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBCDC/cdc.h File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBCDC/cdc.h File Reference

#include "lpc_types.h"

Go to the source code of this file.

Defines

#define | CDC_V1_10 0x0110
#define | CDC_COMMUNICATION_INTERFACE_CLASS 0x02
#define | CDC_DIRECT_LINE_CONTROL_MODEL 0x01
#define | CDC_ABSTRACT_CONTROL_MODEL 0x02
#define | CDC_TELEPHONE_CONTROL_MODEL 0x03
#define | CDC_MULTI_CHANNEL_CONTROL_MODEL 0x04
#define | CDC_CAPI_CONTROL_MODEL 0x05
#define | CDC_ETHERNET_NETWORKING_CONTROL_MODEL 0x06
#define | CDC_ATM_NETWORKING_CONTROL_MODEL 0x07
#define | CDC_PROTOCOL_COMMON_AT_COMMANDS 0x01
#define | CDC_DATA_INTERFACE_CLASS 0x0A
#define | CDC_PROTOCOL_ISDN_BRI 0x30
#define | CDC_PROTOCOL_HDLC 0x31
#define | CDC_PROTOCOL_TRANSPARENT 0x32
#define | CDC_PROTOCOL_Q921_MANAGEMENT 0x50
#define | CDC_PROTOCOL_Q921_DATA_LINK 0x51
#define | CDC_PROTOCOL_Q921_MULTIPLEXOR 0x52
#define | CDC_PROTOCOL_V42 0x90
#define | CDC_PROTOCOL_EURO_ISDN 0x91
#define | CDC_PROTOCOL_V24_RATE_ADAPTATION 0x92
#define | CDC_PROTOCOL_CAPI 0x93
#define | CDC_PROTOCOL_HOST_BASED_DRIVER 0xFD
#define | CDC_PROTOCOL_DESCRIBED_IN_PUFD 0xFE
#define | CDC_CS_INTERFACE 0x24
#define | CDC_CS_ENDPOINT 0x25
#define | CDC_HEADER 0x00
#define | CDC_CALL_MANAGEMENT 0x01
#define | CDC_ABSTRACT_CONTROL_MANAGEMENT 0x02
#define | CDC_DIRECT_LINE_MANAGEMENT 0x03
#define | CDC_TELEPHONE_RINGER 0x04
#define | CDC_REPORTING_CAPABILITIES 0x05
#define | CDC_UNION 0x06
#define | CDC_COUNTRY_SELECTION 0x07
#define | CDC_TELEPHONE_OPERATIONAL_MODES 0x08
#define | CDC_USB_TERMINAL 0x09
#define | CDC_NETWORK_CHANNEL 0x0A
#define | CDC_PROTOCOL_UNIT 0x0B
#define | CDC_EXTENSION_UNIT 0x0C
#define | CDC_MULTI_CHANNEL_MANAGEMENT 0x0D
#define | CDC_CAPI_CONTROL_MANAGEMENT 0x0E
#define | CDC_ETHERNET_NETWORKING 0x0F
#define | CDC_ATM_NETWORKING 0x10
#define | CDC_SEND_ENCAPSULATED_COMMAND 0x00
#define | CDC_GET_ENCAPSULATED_RESPONSE 0x01
#define | CDC_SET_COMM_FEATURE 0x02
#define | CDC_GET_COMM_FEATURE 0x03
#define | CDC_CLEAR_COMM_FEATURE 0x04
#define | CDC_SET_AUX_LINE_STATE 0x10
#define | CDC_SET_HOOK_STATE 0x11
#define | CDC_PULSE_SETUP 0x12
#define | CDC_SEND_PULSE 0x13
#define | CDC_SET_PULSE_TIME 0x14
#define | CDC_RING_AUX_JACK 0x15
#define | CDC_SET_LINE_CODING 0x20
#define | CDC_GET_LINE_CODING 0x21
#define | CDC_SET_CONTROL_LINE_STATE 0x22
#define | CDC_SEND_BREAK 0x23
#define | CDC_SET_RINGER_PARMS 0x30
#define | CDC_GET_RINGER_PARMS 0x31
#define | CDC_SET_OPERATION_PARMS 0x32
#define | CDC_GET_OPERATION_PARMS 0x33
#define | CDC_SET_LINE_PARMS 0x34
#define | CDC_GET_LINE_PARMS 0x35
#define | CDC_DIAL_DIGITS 0x36
#define | CDC_SET_UNIT_PARAMETER 0x37
#define | CDC_GET_UNIT_PARAMETER 0x38
#define | CDC_CLEAR_UNIT_PARAMETER 0x39
#define | CDC_GET_PROFILE 0x3A
#define | CDC_SET_ETHERNET_MULTICAST_FILTERS 0x40
#define | CDC_SET_ETHERNET_PMP_FILTER 0x41
#define | CDC_GET_ETHERNET_PMP_FILTER 0x42
#define | CDC_SET_ETHERNET_PACKET_FILTER 0x43
#define | CDC_GET_ETHERNET_STATISTIC 0x44
#define | CDC_SET_ATM_DATA_FORMAT 0x50
#define | CDC_GET_ATM_DEVICE_STATISTICS 0x51
#define | CDC_SET_ATM_DEFAULT_VC 0x52
#define | CDC_GET_ATM_VC_STATISTICS 0x53
#define | CDC_ABSTRACT_STATE 0x01
#define | CDC_COUNTRY_SETTING 0x02
#define | CDC_IDLE_SETTING (1 << 0)
#define | CDC_DATA_MULTPLEXED_STATE (1 << 1)
#define | CDC_DTE_PRESENT (1 << 0)
#define | CDC_ACTIVATE_CARRIER (1 << 1)
#define | CDC_NOTIFICATION_NETWORK_CONNECTION 0x00
#define | CDC_RESPONSE_AVAILABLE 0x01
#define | CDC_AUX_JACK_HOOK_STATE 0x08
#define | CDC_RING_DETECT 0x09
#define | CDC_NOTIFICATION_SERIAL_STATE 0x20
#define | CDC_CALL_STATE_CHANGE 0x28
#define | CDC_LINE_STATE_CHANGE 0x29
#define | CDC_CONNECTION_SPEED_CHANGE 0x2A
#define | CDC_SERIAL_STATE_OVERRUN (1 << 6)
#define | CDC_SERIAL_STATE_PARITY (1 << 5)
#define | CDC_SERIAL_STATE_FRAMING (1 << 4)
#define | CDC_SERIAL_STATE_RING (1 << 3)
#define | CDC_SERIAL_STATE_BREAK (1 << 2)
#define | CDC_SERIAL_STATE_TX_CARRIER (1 << 1)
#define | CDC_SERIAL_STATE_RX_CARRIER (1 << 0)

Typedefs

typedef USB_SETUP_PACKET | CDC_NOTIFICATION_HEADER

Variables

uint8_t | bFunctionLength
uint8_t | bDescriptorType
uint8_t | bDescriptorSubtype
uint16_t | bcdCDC
CDC_HEADER_DESCRIPTOR
uint8_t | bmCapabilities
uint8_t | bDataInterface
CDC_CALL_MANAGEMENT_DESCRIPTOR
CDC_ABSTRACT_CONTROL_MANAGEMENT_DESCRIPTOR
uint8_t | bMasterInterface
CDC_UNION_DESCRIPTOR
CDC_UNION_DESCRIPTOR sUnion
uint8_t | bSlaveInterfaces [1]
CDC_UNION_1SLAVE_DESCRIPTOR
uint32_t | dwDTERate
uint8_t | bCharFormat
uint8_t | bParityType
uint8_t | bDataBits
CDC_LINE_CODING

Define Documentation

#define CDC_ABSTRACT_CONTROL_MANAGEMENT 0x02

Definition at line 78 of file cdc.h.

#define CDC_ABSTRACT_CONTROL_MODEL 0x02

Definition at line 39 of file cdc.h.

#define CDC_ABSTRACT_STATE 0x01

Definition at line 135 of file cdc.h.

#define CDC_ACTIVATE_CARRIER (1 << 1)

Definition at line 147 of file cdc.h.

#define CDC_ATM_NETWORKING 0x10

Definition at line 92 of file cdc.h.

#define CDC_ATM_NETWORKING_CONTROL_MODEL 0x07

Definition at line 44 of file cdc.h.

#define CDC_AUX_JACK_HOOK_STATE 0x08

Definition at line 154 of file cdc.h.

#define CDC_CALL_MANAGEMENT 0x01

Definition at line 77 of file cdc.h.

#define CDC_CALL_STATE_CHANGE 0x28

Definition at line 157 of file cdc.h.

#define CDC_CAPI_CONTROL_MANAGEMENT 0x0E

Definition at line 90 of file cdc.h.

#define CDC_CAPI_CONTROL_MODEL 0x05

Definition at line 42 of file cdc.h.

#define CDC_CLEAR_COMM_FEATURE 0x04

Definition at line 101 of file cdc.h.

#define CDC_CLEAR_UNIT_PARAMETER 0x39

Definition at line 121 of file cdc.h.

#define CDC_COMMUNICATION_INTERFACE_CLASS 0x02

Definition at line 34 of file cdc.h.

#define CDC_CONNECTION_SPEED_CHANGE 0x2A

Definition at line 159 of file cdc.h.

#define CDC_COUNTRY_SELECTION 0x07

Definition at line 83 of file cdc.h.

#define CDC_COUNTRY_SETTING 0x02

Definition at line 136 of file cdc.h.

#define CDC_CS_ENDPOINT 0x25

Definition at line 72 of file cdc.h.

#define CDC_CS_INTERFACE 0x24

Definition at line 71 of file cdc.h.

#define CDC_DATA_INTERFACE_CLASS 0x0A

Definition at line 52 of file cdc.h.

#define CDC_DATA_MULTPLEXED_STATE (1 << 1)

Definition at line 141 of file cdc.h.

#define CDC_DIAL_DIGITS 0x36

Definition at line 118 of file cdc.h.

#define CDC_DIRECT_LINE_CONTROL_MODEL 0x01

Definition at line 38 of file cdc.h.

#define CDC_DIRECT_LINE_MANAGEMENT 0x03

Definition at line 79 of file cdc.h.

#define CDC_DTE_PRESENT (1 << 0)

Definition at line 146 of file cdc.h.

#define CDC_ETHERNET_NETWORKING 0x0F

Definition at line 91 of file cdc.h.

#define CDC_ETHERNET_NETWORKING_CONTROL_MODEL 0x06

Definition at line 43 of file cdc.h.

#define CDC_EXTENSION_UNIT 0x0C

Definition at line 88 of file cdc.h.

#define CDC_GET_ATM_DEVICE_STATISTICS 0x51

Definition at line 129 of file cdc.h.

#define CDC_GET_ATM_VC_STATISTICS 0x53

Definition at line 131 of file cdc.h.

#define CDC_GET_COMM_FEATURE 0x03

Definition at line 100 of file cdc.h.

#define CDC_GET_ENCAPSULATED_RESPONSE 0x01

Definition at line 98 of file cdc.h.

#define CDC_GET_ETHERNET_PMP_FILTER 0x42

Definition at line 125 of file cdc.h.

#define CDC_GET_ETHERNET_STATISTIC 0x44

Definition at line 127 of file cdc.h.

#define CDC_GET_LINE_CODING 0x21

Definition at line 109 of file cdc.h.

#define CDC_GET_LINE_PARMS 0x35

Definition at line 117 of file cdc.h.

#define CDC_GET_OPERATION_PARMS 0x33

Definition at line 115 of file cdc.h.

#define CDC_GET_PROFILE 0x3A

Definition at line 122 of file cdc.h.

#define CDC_GET_RINGER_PARMS 0x31

Definition at line 113 of file cdc.h.

#define CDC_GET_UNIT_PARAMETER 0x38

Definition at line 120 of file cdc.h.

#define CDC_HEADER 0x00

Definition at line 76 of file cdc.h.

#define CDC_IDLE_SETTING (1 << 0)

Definition at line 140 of file cdc.h.

#define CDC_LINE_STATE_CHANGE 0x29

Definition at line 158 of file cdc.h.

#define CDC_MULTI_CHANNEL_CONTROL_MODEL 0x04

Definition at line 41 of file cdc.h.

#define CDC_MULTI_CHANNEL_MANAGEMENT 0x0D

Definition at line 89 of file cdc.h.

#define CDC_NETWORK_CHANNEL 0x0A

Definition at line 86 of file cdc.h.

#define CDC_NOTIFICATION_NETWORK_CONNECTION 0x00

Definition at line 152 of file cdc.h.

#define CDC_NOTIFICATION_SERIAL_STATE 0x20

Definition at line 156 of file cdc.h.

#define CDC_PROTOCOL_CAPI 0x93

Definition at line 65 of file cdc.h.

#define CDC_PROTOCOL_COMMON_AT_COMMANDS 0x01

Definition at line 48 of file cdc.h.

#define CDC_PROTOCOL_DESCRIBED_IN_PUFD 0xFE

Definition at line 67 of file cdc.h.

#define CDC_PROTOCOL_EURO_ISDN 0x91

Definition at line 63 of file cdc.h.

#define CDC_PROTOCOL_HDLC 0x31

Definition at line 57 of file cdc.h.

#define CDC_PROTOCOL_HOST_BASED_DRIVER 0xFD

Definition at line 66 of file cdc.h.

#define CDC_PROTOCOL_ISDN_BRI 0x30

Definition at line 56 of file cdc.h.

#define CDC_PROTOCOL_Q921_DATA_LINK 0x51

Definition at line 60 of file cdc.h.

#define CDC_PROTOCOL_Q921_MANAGEMENT 0x50

Definition at line 59 of file cdc.h.

#define CDC_PROTOCOL_Q921_MULTIPLEXOR 0x52

Definition at line 61 of file cdc.h.

#define CDC_PROTOCOL_TRANSPARENT 0x32

Definition at line 58 of file cdc.h.

#define CDC_PROTOCOL_UNIT 0x0B

Definition at line 87 of file cdc.h.

#define CDC_PROTOCOL_V24_RATE_ADAPTATION 0x92

Definition at line 64 of file cdc.h.

#define CDC_PROTOCOL_V42 0x90

Definition at line 62 of file cdc.h.

#define CDC_PULSE_SETUP 0x12

Definition at line 104 of file cdc.h.

#define CDC_REPORTING_CAPABILITIES 0x05

Definition at line 81 of file cdc.h.

#define CDC_RESPONSE_AVAILABLE 0x01

Definition at line 153 of file cdc.h.

#define CDC_RING_AUX_JACK 0x15

Definition at line 107 of file cdc.h.

#define CDC_RING_DETECT 0x09

Definition at line 155 of file cdc.h.

#define CDC_SEND_BREAK 0x23

Definition at line 111 of file cdc.h.

#define CDC_SEND_ENCAPSULATED_COMMAND 0x00

Definition at line 97 of file cdc.h.

#define CDC_SEND_PULSE 0x13

Definition at line 105 of file cdc.h.

#define CDC_SERIAL_STATE_BREAK (1 << 2)

Definition at line 167 of file cdc.h.

#define CDC_SERIAL_STATE_FRAMING (1 << 4)

Definition at line 165 of file cdc.h.

#define CDC_SERIAL_STATE_OVERRUN (1 << 6)

Definition at line 163 of file cdc.h.

#define CDC_SERIAL_STATE_PARITY (1 << 5)

Definition at line 164 of file cdc.h.

#define CDC_SERIAL_STATE_RING (1 << 3)

Definition at line 166 of file cdc.h.

#define CDC_SERIAL_STATE_RX_CARRIER (1 << 0)

Definition at line 169 of file cdc.h.

#define CDC_SERIAL_STATE_TX_CARRIER (1 << 1)

Definition at line 168 of file cdc.h.

#define CDC_SET_ATM_DATA_FORMAT 0x50

Definition at line 128 of file cdc.h.

#define CDC_SET_ATM_DEFAULT_VC 0x52

Definition at line 130 of file cdc.h.

#define CDC_SET_AUX_LINE_STATE 0x10

Definition at line 102 of file cdc.h.

#define CDC_SET_COMM_FEATURE 0x02

Definition at line 99 of file cdc.h.

#define CDC_SET_CONTROL_LINE_STATE 0x22

Definition at line 110 of file cdc.h.

#define CDC_SET_ETHERNET_MULTICAST_FILTERS 0x40

Definition at line 123 of file cdc.h.

#define CDC_SET_ETHERNET_PACKET_FILTER 0x43

Definition at line 126 of file cdc.h.

#define CDC_SET_ETHERNET_PMP_FILTER 0x41

Definition at line 124 of file cdc.h.

#define CDC_SET_HOOK_STATE 0x11

Definition at line 103 of file cdc.h.

#define CDC_SET_LINE_CODING 0x20

Definition at line 108 of file cdc.h.

#define CDC_SET_LINE_PARMS 0x34

Definition at line 116 of file cdc.h.

#define CDC_SET_OPERATION_PARMS 0x32

Definition at line 114 of file cdc.h.

#define CDC_SET_PULSE_TIME 0x14

Definition at line 106 of file cdc.h.

#define CDC_SET_RINGER_PARMS 0x30

Definition at line 112 of file cdc.h.

#define CDC_SET_UNIT_PARAMETER 0x37

Definition at line 119 of file cdc.h.

#define CDC_TELEPHONE_CONTROL_MODEL 0x03

Definition at line 40 of file cdc.h.

#define CDC_TELEPHONE_OPERATIONAL_MODES 0x08

Definition at line 84 of file cdc.h.

#define CDC_TELEPHONE_RINGER 0x04

Definition at line 80 of file cdc.h.

#define CDC_UNION 0x06

Definition at line 82 of file cdc.h.

#define CDC_USB_TERMINAL 0x09

Definition at line 85 of file cdc.h.

#define CDC_V1_10 0x0110

Definition at line 30 of file cdc.h.

Typedef Documentation

typedef USB_SETUP_PACKET CDC_NOTIFICATION_HEADER

Definition at line 280 of file cdc.h.

Variable Documentation

uint16_t bcdCDC

Definition at line 191 of file cdc.h.

uint8_t bCharFormat

Definition at line 272 of file cdc.h.

uint8_t bDataBits

Definition at line 274 of file cdc.h.

uint8_t bDataInterface

Definition at line 209 of file cdc.h.

uint8_t bDescriptorSubtype

Definition at line 190 of file cdc.h.

uint8_t bDescriptorType

Definition at line 189 of file cdc.h.

uint8_t bFunctionLength

Definition at line 188 of file cdc.h.

uint8_t bMasterInterface

Definition at line 243 of file cdc.h.

uint8_t bmCapabilities

Definition at line 208 of file cdc.h.

uint8_t bParityType

Definition at line 273 of file cdc.h.

uint8_t bSlaveInterfaces[1]

Definition at line 257 of file cdc.h.

CDC_ABSTRACT_CONTROL_MANAGEMENT_DESCRIPTOR

Definition at line 227 of file cdc.h.

CDC_CALL_MANAGEMENT_DESCRIPTOR

Definition at line 210 of file cdc.h.

CDC_HEADER_DESCRIPTOR

Definition at line 192 of file cdc.h.

CDC_LINE_CODING

Definition at line 275 of file cdc.h.

CDC_UNION_1SLAVE_DESCRIPTOR

Definition at line 258 of file cdc.h.

CDC_UNION_DESCRIPTOR

Definition at line 244 of file cdc.h.

uint32_t dwDTERate

Definition at line 271 of file cdc.h.

CDC_UNION_DESCRIPTOR sUnion

Definition at line 256 of file cdc.h.

Generated on Tue Jun 7 14:59:30 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBCDC/cdcuser.c File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBCDC/cdcuser.c File Reference

#include "lpc_types.h"
#include "usb.h"
#include "usbhw.h"
#include "usbcfg.h"
#include "usbcore.h"
#include "cdc.h"
#include "cdcuser.h"
#include "serial.h"

Go to the source code of this file.

Data Structures

struct | __CDC_BUF_T

Defines

#define | CDC_BUF_SIZE (64)
#define | CDC_BUF_MASK (CDC_BUF_SIZE-1ul)
#define | CDC_BUF_RESET(cdcBuf) (cdcBuf.rdIdx = cdcBuf.wrIdx = 0)
#define | CDC_BUF_WR(cdcBuf, dataIn) (cdcBuf.data[CDC_BUF_MASK & cdcBuf.wrIdx++] = (dataIn))
#define | CDC_BUF_RD(cdcBuf) (cdcBuf.data[CDC_BUF_MASK & cdcBuf.rdIdx++])
#define | CDC_BUF_EMPTY(cdcBuf) (cdcBuf.rdIdx == cdcBuf.wrIdx)
#define | CDC_BUF_FULL(cdcBuf) (cdcBuf.rdIdx == cdcBuf.wrIdx+1)
#define | CDC_BUF_COUNT(cdcBuf) (CDC_BUF_MASK & (cdcBuf.wrIdx - cdcBuf.rdIdx))

Typedefs

typedef struct __CDC_BUF_T | CDC_BUF_T

Functions

int | CDC_RdOutBuf (char *buffer, const int *length)
int | CDC_WrOutBuf (const char *buffer, int *length)
int | CDC_OutBufAvailChar (int *availChar)
void | CDC_Init (char portNum)
uint32_t | CDC_SendEncapsulatedCommand (void)
uint32_t | CDC_GetEncapsulatedResponse (void)
uint32_t | CDC_SetCommFeature (unsigned short wFeatureSelector)
uint32_t | CDC_GetCommFeature (unsigned short wFeatureSelector)
uint32_t | CDC_ClearCommFeature (unsigned short wFeatureSelector)
uint32_t | CDC_SetLineCoding (void)
uint32_t | CDC_GetLineCoding (void)
uint32_t | CDC_SetControlLineState (unsigned short wControlSignalBitmap)
uint32_t | CDC_SendBreak (unsigned short wDurationOfBreak)
void | CDC_BulkIn (void)
void | CDC_BulkOut (void)
unsigned short | CDC_GetSerialState (void)
void | CDC_NotificationIn (void)

Variables

unsigned char | BulkBufIn [USB_CDC_BUFSIZE]
unsigned char | BulkBufOut [USB_CDC_BUFSIZE]
unsigned char | NotificationBuf [10]
CDC_LINE_CODING | CDC_LineCoding = {9600, 0, 0, 8}
unsigned short | CDC_SerialState = 0x0000
unsigned short | CDC_DepInEmpty = 1
CDC_BUF_T CDC_OutBuf

Define Documentation

#define CDC_BUF_COUNT ( cdcBuf ) (CDC_BUF_MASK & (cdcBuf.wrIdx - cdcBuf.rdIdx))

Definition at line 53 of file cdcuser.c.

#define CDC_BUF_EMPTY ( cdcBuf ) (cdcBuf.rdIdx == cdcBuf.wrIdx)

Definition at line 51 of file cdcuser.c.

#define CDC_BUF_FULL ( cdcBuf ) (cdcBuf.rdIdx == cdcBuf.wrIdx+1)

Definition at line 52 of file cdcuser.c.

#define CDC_BUF_MASK (CDC_BUF_SIZE-1ul)

Definition at line 45 of file cdcuser.c.

#define CDC_BUF_RD ( cdcBuf ) (cdcBuf.data[CDC_BUF_MASK & cdcBuf.rdIdx++])

Definition at line 50 of file cdcuser.c.

#define CDC_BUF_RESET ( cdcBuf ) (cdcBuf.rdIdx = cdcBuf.wrIdx = 0)

Definition at line 48 of file cdcuser.c.

#define CDC_BUF_SIZE (64)

Definition at line 43 of file cdcuser.c.

#define CDC_BUF_WR | ( | cdcBuf,
 |  | dataIn | ) | (cdcBuf.data[CDC_BUF_MASK & cdcBuf.wrIdx++] = (dataIn))

Definition at line 49 of file cdcuser.c.

Typedef Documentation

typedef struct __CDC_BUF_T CDC_BUF_T

Function Documentation

void CDC_BulkIn ( void )

Definition at line 301 of file cdcuser.c.

void CDC_BulkOut ( void )

Definition at line 325 of file cdcuser.c.

uint32_t CDC_ClearCommFeature ( unsigned short wFeatureSelector )

Definition at line 206 of file cdcuser.c.

uint32_t CDC_GetCommFeature ( unsigned short wFeatureSelector )

Definition at line 193 of file cdcuser.c.

uint32_t CDC_GetEncapsulatedResponse ( void )

Definition at line 167 of file cdcuser.c.

uint32_t CDC_GetLineCoding ( void )

Definition at line 254 of file cdcuser.c.

unsigned short CDC_GetSerialState ( void )

Definition at line 344 of file cdcuser.c.

void CDC_Init ( char portNum )

Definition at line 124 of file cdcuser.c.

void CDC_NotificationIn ( void )

Definition at line 365 of file cdcuser.c.

int CDC_OutBufAvailChar ( int * availChar )

Definition at line 109 of file cdcuser.c.

int CDC_RdOutBuf | ( | char * | buffer,
 |  | const int * | length
 | ) |  |

Definition at line 68 of file cdcuser.c.

uint32_t CDC_SendBreak ( unsigned short wDurationOfBreak )

Definition at line 289 of file cdcuser.c.

uint32_t CDC_SendEncapsulatedCommand ( void )

Definition at line 155 of file cdcuser.c.

uint32_t CDC_SetCommFeature ( unsigned short wFeatureSelector )

Definition at line 180 of file cdcuser.c.

uint32_t CDC_SetControlLineState ( unsigned short wControlSignalBitmap )

Definition at line 274 of file cdcuser.c.

uint32_t CDC_SetLineCoding ( void )

Definition at line 219 of file cdcuser.c.

int CDC_WrOutBuf | ( | const char * | buffer,
 |  | int * | length
 | ) |  |

Definition at line 88 of file cdcuser.c.

Variable Documentation

unsigned char BulkBufIn[USB_CDC_BUFSIZE]

Definition at line 30 of file cdcuser.c.

unsigned char BulkBufOut[USB_CDC_BUFSIZE]

Definition at line 31 of file cdcuser.c.

unsigned short CDC_DepInEmpty = 1

Definition at line 36 of file cdcuser.c.

CDC_LINE_CODING CDC_LineCoding = {9600, 0, 0, 8}

Definition at line 34 of file cdcuser.c.

CDC_BUF_T CDC_OutBuf

Definition at line 63 of file cdcuser.c.

unsigned short CDC_SerialState = 0x0000

Definition at line 35 of file cdcuser.c.

unsigned char NotificationBuf[10]

Definition at line 32 of file cdcuser.c.

Generated on Tue Jun 7 14:59:30 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBCDC/cdcuser.h File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBCDC/cdcuser.h File Reference

Go to the source code of this file.

Defines

#define | CDC_DEP_IN 0x82
#define | CDC_DEP_OUT 0x02
#define | CDC_CEP_IN 0x81

Functions

int | CDC_RdOutBuf (char *buffer, const int *length)
int | CDC_WrOutBuf (const char *buffer, int *length)
int | CDC_OutBufAvailChar (int *availChar)
uint32_t | CDC_SendEncapsulatedCommand (void)
uint32_t | CDC_GetEncapsulatedResponse (void)
uint32_t | CDC_SetCommFeature (unsigned short wFeatureSelector)
uint32_t | CDC_GetCommFeature (unsigned short wFeatureSelector)
uint32_t | CDC_ClearCommFeature (unsigned short wFeatureSelector)
uint32_t | CDC_GetLineCoding (void)
uint32_t | CDC_SetLineCoding (void)
uint32_t | CDC_SetControlLineState (unsigned short wControlSignalBitmap)
uint32_t | CDC_SendBreak (unsigned short wDurationOfBreak)
void | CDC_BulkIn (void)
void | CDC_BulkOut (void)
void | CDC_NotificationIn (void)
void | CDC_Init (char portNum)
unsigned short | CDC_GetSerialState (void)

Variables

unsigned short | CDC_DepInEmpty

Define Documentation

#define CDC_CEP_IN 0x81

Definition at line 33 of file cdcuser.h.

#define CDC_DEP_IN 0x82

Definition at line 29 of file cdcuser.h.

#define CDC_DEP_OUT 0x02

Definition at line 30 of file cdcuser.h.

Function Documentation

void CDC_BulkIn ( void )

Definition at line 301 of file cdcuser.c.

void CDC_BulkOut ( void )

Definition at line 325 of file cdcuser.c.

uint32_t CDC_ClearCommFeature ( unsigned short wFeatureSelector )

Definition at line 206 of file cdcuser.c.

uint32_t CDC_GetCommFeature ( unsigned short wFeatureSelector )

Definition at line 193 of file cdcuser.c.

uint32_t CDC_GetEncapsulatedResponse ( void )

Definition at line 167 of file cdcuser.c.

uint32_t CDC_GetLineCoding ( void )

Definition at line 254 of file cdcuser.c.

unsigned short CDC_GetSerialState ( void )

Definition at line 344 of file cdcuser.c.

void CDC_Init ( char portNum )

Definition at line 124 of file cdcuser.c.

void CDC_NotificationIn ( void )

Definition at line 365 of file cdcuser.c.

int CDC_OutBufAvailChar ( int * availChar )

Definition at line 109 of file cdcuser.c.

int CDC_RdOutBuf | ( | char * | buffer,
 |  | const int * | length
 | ) |  |

Definition at line 68 of file cdcuser.c.

uint32_t CDC_SendBreak ( unsigned short wDurationOfBreak )

Definition at line 289 of file cdcuser.c.

uint32_t CDC_SendEncapsulatedCommand ( void )

Definition at line 155 of file cdcuser.c.

uint32_t CDC_SetCommFeature ( unsigned short wFeatureSelector )

Definition at line 180 of file cdcuser.c.

uint32_t CDC_SetControlLineState ( unsigned short wControlSignalBitmap )

Definition at line 274 of file cdcuser.c.

uint32_t CDC_SetLineCoding ( void )

Definition at line 219 of file cdcuser.c.

int CDC_WrOutBuf | ( | const char * | buffer,
 |  | int * | length
 | ) |  |

Definition at line 88 of file cdcuser.c.

Variable Documentation

unsigned short CDC_DepInEmpty

Definition at line 36 of file cdcuser.c.

Generated on Tue Jun 7 14:59:30 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBCDC/lpc17xx_libcfg.h File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBCDC/lpc17xx_libcfg.h File Reference

#include "lpc_types.h"

Go to the source code of this file.

Defines

#define | DEBUG
#define | CHECK_PARAM(expr) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))
define _DBGFWK

Functions

void | check_failed (uint8_t *file, uint32_t line)

Define Documentation

#define CHECK_PARAM ( expr ) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))

define _DBGFWK

Definition at line 136 of file lpc17xx_libcfg.h.

#define DEBUG

Definition at line 36 of file lpc17xx_libcfg.h.

Generated on Tue Jun 7 14:59:11 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBCDC/serial.c File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBCDC/serial.c File Reference

#include "LPC17xx.h"
#include "lpc_types.h"
#include "serial.h"

Go to the source code of this file.

Data Structures

struct | __SER_BUF_T

Defines

#define | SER_BUF_SIZE (128)
#define | SER_BUF_MASK (SER_BUF_SIZE-1ul)
#define | SER_BUF_RESET(serBuf) (serBuf.rdIdx = serBuf.wrIdx = 0)
#define | SER_BUF_WR(serBuf, dataIn) (serBuf.data[SER_BUF_MASK & serBuf.wrIdx++] = (dataIn))
#define | SER_BUF_RD(serBuf) (serBuf.data[SER_BUF_MASK & serBuf.rdIdx++])
#define | SER_BUF_EMPTY(serBuf) (serBuf.rdIdx == serBuf.wrIdx)
#define | SER_BUF_FULL(serBuf) (serBuf.rdIdx == serBuf.wrIdx+1)
#define | SER_BUF_COUNT(serBuf) (SER_BUF_MASK & (serBuf.wrIdx - serBuf.rdIdx))

Typedefs

typedef struct __SER_BUF_T | SER_BUF_T

Functions

void | ser_OpenPort (char portNum)
void | ser_ClosePort (char portNum)
void | ser_InitPort0 (unsigned long baudrate, unsigned int databits, unsigned int parity, unsigned int stopbits)
void | ser_InitPort1 (unsigned long baudrate, unsigned int databits, unsigned int parity, unsigned int stopbits)
int | ser_Read (char *buffer, const int *length)
int | ser_Write (char portNum, const char *buffer, int *length)
void | ser_AvailChar (int *availChar)
void | ser_LineState (unsigned short *lineState)
void | UART0_IRQHandler (void)
UART0 interrupt handler sub-routine.
void | UART1_IRQHandler (void)
UART1 interrupt handler sub-routine.

Variables

unsigned long | ser_txRestart
unsigned short | ser_lineState
SER_BUF_T ser_out
SER_BUF_T ser_in

Define Documentation

#define SER_BUF_COUNT ( serBuf ) (SER_BUF_MASK & (serBuf.wrIdx - serBuf.rdIdx))

Definition at line 33 of file serial.c.

#define SER_BUF_EMPTY ( serBuf ) (serBuf.rdIdx == serBuf.wrIdx)

Definition at line 31 of file serial.c.

#define SER_BUF_FULL ( serBuf ) (serBuf.rdIdx == serBuf.wrIdx+1)

Definition at line 32 of file serial.c.

#define SER_BUF_MASK (SER_BUF_SIZE-1ul)

Definition at line 25 of file serial.c.

#define SER_BUF_RD ( serBuf ) (serBuf.data[SER_BUF_MASK & serBuf.rdIdx++])

Definition at line 30 of file serial.c.

#define SER_BUF_RESET ( serBuf ) (serBuf.rdIdx = serBuf.wrIdx = 0)

Definition at line 28 of file serial.c.

#define SER_BUF_SIZE (128)

Definition at line 24 of file serial.c.

#define SER_BUF_WR | ( | serBuf,
 |  | dataIn | ) | (serBuf.data[SER_BUF_MASK & serBuf.wrIdx++] = (dataIn))

Definition at line 29 of file serial.c.

Typedef Documentation

typedef struct __SER_BUF_T SER_BUF_T

Function Documentation

void ser_AvailChar ( int * availChar )

Definition at line 334 of file serial.c.

void ser_ClosePort ( char portNum )

Definition at line 72 of file serial.c.

void ser_InitPort0 | ( | unsigned long | baudrate,
 |  | unsigned int | databits,
 |  | unsigned int | parity,
 |  | unsigned int | stopbits
 | ) |  |

Definition at line 95 of file serial.c.

void ser_InitPort1 | ( | unsigned long | baudrate,
 |  | unsigned int | databits,
 |  | unsigned int | parity,
 |  | unsigned int | stopbits
 | ) |  |

Definition at line 190 of file serial.c.

void ser_LineState ( unsigned short * lineState )

Definition at line 343 of file serial.c.

void ser_OpenPort ( char portNum )

Definition at line 50 of file serial.c.

int ser_Read | ( | char * | buffer,
 |  | const int * | length
 | ) |  |

Definition at line 285 of file serial.c.

int ser_Write | ( | char | portNum,
 |  | const char * | buffer,
 |  | int * | length
 | ) |  |

Definition at line 303 of file serial.c.

Variable Documentation

SER_BUF_T ser_in

Definition at line 45 of file serial.c.

unsigned short ser_lineState

Definition at line 43 of file serial.c.

SER_BUF_T ser_out

Definition at line 44 of file serial.c.

unsigned long ser_txRestart

Definition at line 42 of file serial.c.

Generated on Tue Jun 7 14:59:14 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBCDC/serial.h File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBCDC/serial.h File Reference

Go to the source code of this file.

Defines

#define | PORT_NUM 1

Functions

void | ser_OpenPort (char portNum)
void | ser_ClosePort (char portNum)
void | ser_InitPort0 (unsigned long baudrate, unsigned int databits, unsigned int parity, unsigned int stopbits)
void | ser_InitPort1 (unsigned long baudrate, unsigned int databits, unsigned int parity, unsigned int stopbits)
void | ser_AvailChar (int *availChar)
int | ser_Write (char portNum, const char *buffer, int *length)
int | ser_Read (char *buffer, const int *length)
void | ser_LineState (unsigned short *lineState)

Define Documentation

#define PORT_NUM 1

Definition at line 17 of file serial.h.

Function Documentation

void ser_AvailChar ( int * availChar )

Definition at line 334 of file serial.c.

void ser_ClosePort ( char portNum )

Definition at line 72 of file serial.c.

void ser_InitPort0 | ( | unsigned long | baudrate,
 |  | unsigned int | databits,
 |  | unsigned int | parity,
 |  | unsigned int | stopbits
 | ) |  |

Definition at line 95 of file serial.c.

void ser_InitPort1 | ( | unsigned long | baudrate,
 |  | unsigned int | databits,
 |  | unsigned int | parity,
 |  | unsigned int | stopbits
 | ) |  |

Definition at line 190 of file serial.c.

void ser_LineState ( unsigned short * lineState )

Definition at line 343 of file serial.c.

void ser_OpenPort ( char portNum )

Definition at line 50 of file serial.c.

int ser_Read | ( | char * | buffer,
 |  | const int * | length
 | ) |  |

Definition at line 285 of file serial.c.

int ser_Write | ( | char | portNum,
 |  | const char * | buffer,
 |  | int * | length
 | ) |  |

Definition at line 303 of file serial.c.

Generated on Tue Jun 7 14:59:30 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBCDC/usb.h File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBCDC/usb.h File Reference

#include "lpc_types.h"

Go to the source code of this file.

Defines

#define | REQUEST_HOST_TO_DEVICE 0
#define | REQUEST_DEVICE_TO_HOST 1
#define | REQUEST_STANDARD 0
#define | REQUEST_CLASS 1
#define | REQUEST_VENDOR 2
#define | REQUEST_RESERVED 3
#define | REQUEST_TO_DEVICE 0
#define | REQUEST_TO_INTERFACE 1
#define | REQUEST_TO_ENDPOINT 2
#define | REQUEST_TO_OTHER 3
#define | USB_REQUEST_GET_STATUS 0
#define | USB_REQUEST_CLEAR_FEATURE 1
#define | USB_REQUEST_SET_FEATURE 3
#define | USB_REQUEST_SET_ADDRESS 5
#define | USB_REQUEST_GET_DESCRIPTOR 6
#define | USB_REQUEST_SET_DESCRIPTOR 7
#define | USB_REQUEST_GET_CONFIGURATION 8
#define | USB_REQUEST_SET_CONFIGURATION 9
#define | USB_REQUEST_GET_INTERFACE 10
#define | USB_REQUEST_SET_INTERFACE 11
#define | USB_REQUEST_SYNC_FRAME 12
#define | USB_GETSTATUS_SELF_POWERED 0x01
#define | USB_GETSTATUS_REMOTE_WAKEUP 0x02
#define | USB_GETSTATUS_ENDPOINT_STALL 0x01
#define | USB_FEATURE_ENDPOINT_STALL 0
#define | USB_FEATURE_REMOTE_WAKEUP 1
#define | USB_DEVICE_DESCRIPTOR_TYPE 1
#define | USB_CONFIGURATION_DESCRIPTOR_TYPE 2
#define | USB_STRING_DESCRIPTOR_TYPE 3
#define | USB_INTERFACE_DESCRIPTOR_TYPE 4
#define | USB_ENDPOINT_DESCRIPTOR_TYPE 5
#define | USB_DEVICE_QUALIFIER_DESCRIPTOR_TYPE 6
#define | USB_OTHER_SPEED_CONFIG_DESCRIPTOR_TYPE 7
#define | USB_INTERFACE_POWER_DESCRIPTOR_TYPE 8
#define | USB_OTG_DESCRIPTOR_TYPE 9
#define | USB_DEBUG_DESCRIPTOR_TYPE 10
#define | USB_INTERFACE_ASSOCIATION_DESCRIPTOR_TYPE 11
#define | USB_DEVICE_CLASS_RESERVED 0x00
#define | USB_DEVICE_CLASS_AUDIO 0x01
#define | USB_DEVICE_CLASS_COMMUNICATIONS 0x02
#define | USB_DEVICE_CLASS_HUMAN_INTERFACE 0x03
#define | USB_DEVICE_CLASS_MONITOR 0x04
#define | USB_DEVICE_CLASS_PHYSICAL_INTERFACE 0x05
#define | USB_DEVICE_CLASS_POWER 0x06
#define | USB_DEVICE_CLASS_PRINTER 0x07
#define | USB_DEVICE_CLASS_STORAGE 0x08
#define | USB_DEVICE_CLASS_HUB 0x09
#define | USB_DEVICE_CLASS_MISCELLANEOUS 0xEF
#define | USB_DEVICE_CLASS_VENDOR_SPECIFIC 0xFF
#define | USB_CONFIG_POWERED_MASK 0x40
#define | USB_CONFIG_BUS_POWERED 0x80
#define | USB_CONFIG_SELF_POWERED 0xC0
#define | USB_CONFIG_REMOTE_WAKEUP 0x20
#define | USB_CONFIG_POWER_MA(mA) ((mA)/2)
#define | USB_ENDPOINT_DIRECTION_MASK 0x80
#define | USB_ENDPOINT_OUT(addr) ((addr) | 0x00)
#define | USB_ENDPOINT_IN(addr) ((addr) | 0x80)
#define | USB_ENDPOINT_TYPE_MASK 0x03
#define | USB_ENDPOINT_TYPE_CONTROL 0x00
#define | USB_ENDPOINT_TYPE_ISOCHRONOUS 0x01
#define | USB_ENDPOINT_TYPE_BULK 0x02
#define | USB_ENDPOINT_TYPE_INTERRUPT 0x03
#define | USB_ENDPOINT_SYNC_MASK 0x0C
#define | USB_ENDPOINT_SYNC_NO_SYNCHRONIZATION 0x00
#define | USB_ENDPOINT_SYNC_ASYNCHRONOUS 0x04
#define | USB_ENDPOINT_SYNC_ADAPTIVE 0x08
#define | USB_ENDPOINT_SYNC_SYNCHRONOUS 0x0C
#define | USB_ENDPOINT_USAGE_MASK 0x30
#define | USB_ENDPOINT_USAGE_DATA 0x00
#define | USB_ENDPOINT_USAGE_FEEDBACK 0x10
#define | USB_ENDPOINT_USAGE_IMPLICIT_FEEDBACK 0x20
#define | USB_ENDPOINT_USAGE_RESERVED 0x30

Variables

uint16_t | W
uint8_t | L
uint8_t | H
WB
WORD_BYTE
uint8_t | Recipient
uint8_t | Type
uint8_t | Dir
BM
uint8_t | B
REQUEST_TYPE
REQUEST_TYPE bmRequestType
uint8_t | bRequest
WORD_BYTE wValue
WORD_BYTE wIndex
uint16_t | wLength
USB_SETUP_PACKET
uint8_t | bLength
uint8_t | bDescriptorType
uint16_t | bcdUSB
uint8_t | bDeviceClass
uint8_t | bDeviceSubClass
uint8_t | bDeviceProtocol
uint8_t | bMaxPacketSize0
uint16_t | idVendor
uint16_t | idProduct
uint16_t | bcdDevice
uint8_t | iManufacturer
uint8_t | iProduct
uint8_t | iSerialNumber
uint8_t | bNumConfigurations
USB_DEVICE_DESCRIPTOR
uint8_t | bReserved
USB_DEVICE_QUALIFIER_DESCRIPTOR
uint16_t | wTotalLength
uint8_t | bNumInterfaces
uint8_t | bConfigurationValue
uint8_t | iConfiguration
uint8_t | bmAttributes
uint8_t | bMaxPower
USB_CONFIGURATION_DESCRIPTOR
uint8_t | bInterfaceNumber
uint8_t | bAlternateSetting
uint8_t | bNumEndpoints
uint8_t | bInterfaceClass
uint8_t | bInterfaceSubClass
uint8_t | bInterfaceProtocol
uint8_t | iInterface
USB_INTERFACE_DESCRIPTOR
uint8_t | bEndpointAddress
uint16_t | wMaxPacketSize
uint8_t | bInterval
USB_ENDPOINT_DESCRIPTOR
uint16_t | bString
USB_STRING_DESCRIPTOR
USB_COMMON_DESCRIPTOR

Define Documentation

#define REQUEST_CLASS 1

Definition at line 62 of file usb.h.

#define REQUEST_DEVICE_TO_HOST 1

Definition at line 58 of file usb.h.

#define REQUEST_HOST_TO_DEVICE 0

Definition at line 57 of file usb.h.

#define REQUEST_RESERVED 3

Definition at line 64 of file usb.h.

#define REQUEST_STANDARD 0

Definition at line 61 of file usb.h.

#define REQUEST_TO_DEVICE 0

Definition at line 67 of file usb.h.

#define REQUEST_TO_ENDPOINT 2

Definition at line 69 of file usb.h.

#define REQUEST_TO_INTERFACE 1

Definition at line 68 of file usb.h.

#define REQUEST_TO_OTHER 3

Definition at line 70 of file usb.h.

#define REQUEST_VENDOR 2

Definition at line 63 of file usb.h.

#define USB_CONFIG_BUS_POWERED 0x80

Definition at line 173 of file usb.h.

#define USB_CONFIG_POWER_MA ( mA ) ((mA)/2)

Definition at line 178 of file usb.h.

#define USB_CONFIG_POWERED_MASK 0x40

Definition at line 172 of file usb.h.

#define USB_CONFIG_REMOTE_WAKEUP 0x20

Definition at line 175 of file usb.h.

#define USB_CONFIG_SELF_POWERED 0xC0

Definition at line 174 of file usb.h.

#define USB_CONFIGURATION_DESCRIPTOR_TYPE 2

Definition at line 146 of file usb.h.

#define USB_DEBUG_DESCRIPTOR_TYPE 10

Definition at line 154 of file usb.h.

#define USB_DEVICE_CLASS_AUDIO 0x01

Definition at line 159 of file usb.h.

#define USB_DEVICE_CLASS_COMMUNICATIONS 0x02

Definition at line 160 of file usb.h.

#define USB_DEVICE_CLASS_HUB 0x09

Definition at line 167 of file usb.h.

#define USB_DEVICE_CLASS_HUMAN_INTERFACE 0x03

Definition at line 161 of file usb.h.

#define USB_DEVICE_CLASS_MISCELLANEOUS 0xEF

Definition at line 168 of file usb.h.

#define USB_DEVICE_CLASS_MONITOR 0x04

Definition at line 162 of file usb.h.

#define USB_DEVICE_CLASS_PHYSICAL_INTERFACE 0x05

Definition at line 163 of file usb.h.

#define USB_DEVICE_CLASS_POWER 0x06

Definition at line 164 of file usb.h.

#define USB_DEVICE_CLASS_PRINTER 0x07

Definition at line 165 of file usb.h.

#define USB_DEVICE_CLASS_RESERVED 0x00

Definition at line 158 of file usb.h.

#define USB_DEVICE_CLASS_STORAGE 0x08

Definition at line 166 of file usb.h.

#define USB_DEVICE_CLASS_VENDOR_SPECIFIC 0xFF

Definition at line 169 of file usb.h.

#define USB_DEVICE_DESCRIPTOR_TYPE 1

Definition at line 145 of file usb.h.

#define USB_DEVICE_QUALIFIER_DESCRIPTOR_TYPE 6

Definition at line 150 of file usb.h.

#define USB_ENDPOINT_DESCRIPTOR_TYPE 5

Definition at line 149 of file usb.h.

#define USB_ENDPOINT_DIRECTION_MASK 0x80

Definition at line 181 of file usb.h.

#define USB_ENDPOINT_IN ( addr ) ((addr) | 0x80)

Definition at line 183 of file usb.h.

#define USB_ENDPOINT_OUT ( addr ) ((addr) | 0x00)

Definition at line 182 of file usb.h.

#define USB_ENDPOINT_SYNC_ADAPTIVE 0x08

Definition at line 194 of file usb.h.

#define USB_ENDPOINT_SYNC_ASYNCHRONOUS 0x04

Definition at line 193 of file usb.h.

#define USB_ENDPOINT_SYNC_MASK 0x0C

Definition at line 191 of file usb.h.

#define USB_ENDPOINT_SYNC_NO_SYNCHRONIZATION 0x00

Definition at line 192 of file usb.h.

#define USB_ENDPOINT_SYNC_SYNCHRONOUS 0x0C

Definition at line 195 of file usb.h.

#define USB_ENDPOINT_TYPE_BULK 0x02

Definition at line 189 of file usb.h.

#define USB_ENDPOINT_TYPE_CONTROL 0x00

Definition at line 187 of file usb.h.

#define USB_ENDPOINT_TYPE_INTERRUPT 0x03

Definition at line 190 of file usb.h.

#define USB_ENDPOINT_TYPE_ISOCHRONOUS 0x01

Definition at line 188 of file usb.h.

#define USB_ENDPOINT_TYPE_MASK 0x03

Definition at line 186 of file usb.h.

#define USB_ENDPOINT_USAGE_DATA 0x00

Definition at line 197 of file usb.h.

#define USB_ENDPOINT_USAGE_FEEDBACK 0x10

Definition at line 198 of file usb.h.

#define USB_ENDPOINT_USAGE_IMPLICIT_FEEDBACK 0x20

Definition at line 199 of file usb.h.

#define USB_ENDPOINT_USAGE_MASK 0x30

Definition at line 196 of file usb.h.

#define USB_ENDPOINT_USAGE_RESERVED 0x30

Definition at line 200 of file usb.h.

#define USB_FEATURE_ENDPOINT_STALL 0

Definition at line 121 of file usb.h.

#define USB_FEATURE_REMOTE_WAKEUP 1

Definition at line 122 of file usb.h.

#define USB_GETSTATUS_ENDPOINT_STALL 0x01

Definition at line 118 of file usb.h.

#define USB_GETSTATUS_REMOTE_WAKEUP 0x02

Definition at line 117 of file usb.h.

#define USB_GETSTATUS_SELF_POWERED 0x01

Definition at line 116 of file usb.h.

#define USB_INTERFACE_ASSOCIATION_DESCRIPTOR_TYPE 11

Definition at line 155 of file usb.h.

#define USB_INTERFACE_DESCRIPTOR_TYPE 4

Definition at line 148 of file usb.h.

#define USB_INTERFACE_POWER_DESCRIPTOR_TYPE 8

Definition at line 152 of file usb.h.

#define USB_OTG_DESCRIPTOR_TYPE 9

Definition at line 153 of file usb.h.

#define USB_OTHER_SPEED_CONFIG_DESCRIPTOR_TYPE 7

Definition at line 151 of file usb.h.

#define USB_REQUEST_CLEAR_FEATURE 1

Definition at line 104 of file usb.h.

#define USB_REQUEST_GET_CONFIGURATION 8

Definition at line 109 of file usb.h.

#define USB_REQUEST_GET_DESCRIPTOR 6

Definition at line 107 of file usb.h.

#define USB_REQUEST_GET_INTERFACE 10

Definition at line 111 of file usb.h.

#define USB_REQUEST_GET_STATUS 0

Definition at line 103 of file usb.h.

#define USB_REQUEST_SET_ADDRESS 5

Definition at line 106 of file usb.h.

#define USB_REQUEST_SET_CONFIGURATION 9

Definition at line 110 of file usb.h.

#define USB_REQUEST_SET_DESCRIPTOR 7

Definition at line 108 of file usb.h.

#define USB_REQUEST_SET_FEATURE 3

Definition at line 105 of file usb.h.

#define USB_REQUEST_SET_INTERFACE 11

Definition at line 112 of file usb.h.

#define USB_REQUEST_SYNC_FRAME 12

Definition at line 113 of file usb.h.

#define USB_STRING_DESCRIPTOR_TYPE 3

Definition at line 147 of file usb.h.

Variable Documentation

uint8_t B

Definition at line 96 of file usb.h.

uint8_t bAlternateSetting

Definition at line 286 of file usb.h.

uint16_t bcdDevice

Definition at line 220 of file usb.h.

uint16_t bcdUSB

Definition at line 213 of file usb.h.

uint8_t bConfigurationValue

Definition at line 265 of file usb.h.

uint8_t bDescriptorType

Definition at line 212 of file usb.h.

uint8_t bDeviceClass

Definition at line 214 of file usb.h.

uint8_t bDeviceProtocol

Definition at line 216 of file usb.h.

uint8_t bDeviceSubClass

Definition at line 215 of file usb.h.

uint8_t bEndpointAddress

Definition at line 308 of file usb.h.

uint8_t bInterfaceClass

Definition at line 288 of file usb.h.

uint8_t bInterfaceNumber

Definition at line 285 of file usb.h.

uint8_t bInterfaceProtocol

Definition at line 290 of file usb.h.

uint8_t bInterfaceSubClass

Definition at line 289 of file usb.h.

uint8_t bInterval

Definition at line 311 of file usb.h.

uint8_t bLength

Definition at line 211 of file usb.h.

BM

Definition at line 92 of file usb.h.

uint8_t bmAttributes

Definition at line 267 of file usb.h.

uint8_t bMaxPacketSize0

Definition at line 217 of file usb.h.

uint8_t bMaxPower

Definition at line 268 of file usb.h.

REQUEST_TYPE bmRequestType

Definition at line 133 of file usb.h.

uint8_t bNumConfigurations

Definition at line 224 of file usb.h.

uint8_t bNumEndpoints

Definition at line 287 of file usb.h.

uint8_t bNumInterfaces

Definition at line 264 of file usb.h.

uint8_t bRequest

Definition at line 134 of file usb.h.

uint8_t bReserved

Definition at line 247 of file usb.h.

uint16_t bString

Definition at line 328 of file usb.h.

uint8_t Dir

Definition at line 91 of file usb.h.

uint8_t H

Definition at line 45 of file usb.h.

uint8_t iConfiguration

Definition at line 266 of file usb.h.

uint16_t idProduct

Definition at line 219 of file usb.h.

uint16_t idVendor

Definition at line 218 of file usb.h.

uint8_t iInterface

Definition at line 291 of file usb.h.

uint8_t iManufacturer

Definition at line 221 of file usb.h.

uint8_t iProduct

Definition at line 222 of file usb.h.

uint8_t iSerialNumber

Definition at line 223 of file usb.h.

uint8_t L

Definition at line 44 of file usb.h.

uint8_t Recipient

Definition at line 89 of file usb.h.

REQUEST_TYPE

Definition at line 97 of file usb.h.

uint8_t Type

Definition at line 90 of file usb.h.

USB_COMMON_DESCRIPTOR

Definition at line 345 of file usb.h.

USB_CONFIGURATION_DESCRIPTOR

Definition at line 269 of file usb.h.

USB_DEVICE_DESCRIPTOR

Definition at line 225 of file usb.h.

USB_DEVICE_QUALIFIER_DESCRIPTOR

Definition at line 248 of file usb.h.

USB_ENDPOINT_DESCRIPTOR

Definition at line 312 of file usb.h.

USB_INTERFACE_DESCRIPTOR

Definition at line 292 of file usb.h.

USB_SETUP_PACKET

Definition at line 138 of file usb.h.

USB_STRING_DESCRIPTOR

Definition at line 329 of file usb.h.

uint16_t W

Definition at line 35 of file usb.h.

WB

Definition at line 46 of file usb.h.

WORD_BYTE wIndex

Definition at line 136 of file usb.h.

uint16_t wLength

Definition at line 137 of file usb.h.

uint16_t wMaxPacketSize

Definition at line 310 of file usb.h.

WORD_BYTE

Definition at line 50 of file usb.h.

uint16_t wTotalLength

Definition at line 263 of file usb.h.

WORD_BYTE wValue

Definition at line 135 of file usb.h.

Generated on Tue Jun 7 14:59:21 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBCDC/usbcfg.h File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBCDC/usbcfg.h File Reference

Go to the source code of this file.

Defines

#define | USB_POWER 0
#define | USB_IF_NUM 4
#define | USB_EP_NUM 32
#define | USB_MAX_PACKET0 8
#define | USB_DMA 0
#define | USB_DMA_EP 0x00000000
#define | USB_POWER_EVENT 0
#define | USB_RESET_EVENT 1
#define | USB_SUSPEND_EVENT 0
#define | USB_RESUME_EVENT 0
#define | USB_WAKEUP_EVENT 0
#define | USB_SOF_EVENT 0
#define | USB_ERROR_EVENT 0
#define | USB_EP_EVENT 0x0007
#define | USB_CONFIGURE_EVENT 1
#define | USB_INTERFACE_EVENT 0
#define | USB_FEATURE_EVENT 0
#define | USB_CLASS 1
#define | USB_HID 0
#define | USB_HID_IF_NUM 0
#define | USB_MSC 0
#define | USB_MSC_IF_NUM 0
#define | USB_AUDIO 0
#define | USB_ADC_CIF_NUM 0
#define | USB_ADC_SIF1_NUM 1
#define | USB_ADC_SIF2_NUM 2
#define | USB_CDC 1
#define | USB_CDC_CIF_NUM 0
#define | USB_CDC_DIF_NUM 1
#define | USB_CDC_BUFSIZE 64
#define | USB_VENDOR 0

Define Documentation

#define USB_ADC_CIF_NUM 0

Definition at line 165 of file usbcfg.h.

#define USB_ADC_SIF1_NUM 1

Definition at line 166 of file usbcfg.h.

#define USB_ADC_SIF2_NUM 2

Definition at line 167 of file usbcfg.h.

#define USB_AUDIO 0

Definition at line 164 of file usbcfg.h.

#define USB_CDC 1

Definition at line 168 of file usbcfg.h.

#define USB_CDC_BUFSIZE 64

Definition at line 171 of file usbcfg.h.

#define USB_CDC_CIF_NUM 0

Definition at line 169 of file usbcfg.h.

#define USB_CDC_DIF_NUM 1

Definition at line 170 of file usbcfg.h.

#define USB_CLASS 1

Definition at line 159 of file usbcfg.h.

#define USB_CONFIGURE_EVENT 1

Definition at line 131 of file usbcfg.h.

#define USB_DMA 0

Definition at line 82 of file usbcfg.h.

#define USB_DMA_EP 0x00000000

Definition at line 83 of file usbcfg.h.

#define USB_EP_EVENT 0x0007

Definition at line 130 of file usbcfg.h.

#define USB_EP_NUM 32

Definition at line 80 of file usbcfg.h.

#define USB_ERROR_EVENT 0

Definition at line 129 of file usbcfg.h.

#define USB_FEATURE_EVENT 0

Definition at line 133 of file usbcfg.h.

#define USB_HID 0

Definition at line 160 of file usbcfg.h.

#define USB_HID_IF_NUM 0

Definition at line 161 of file usbcfg.h.

#define USB_IF_NUM 4

Definition at line 79 of file usbcfg.h.

#define USB_INTERFACE_EVENT 0

Definition at line 132 of file usbcfg.h.

#define USB_MAX_PACKET0 8

Definition at line 81 of file usbcfg.h.

#define USB_MSC 0

Definition at line 162 of file usbcfg.h.

#define USB_MSC_IF_NUM 0

Definition at line 163 of file usbcfg.h.

#define USB_POWER 0

Definition at line 78 of file usbcfg.h.

#define USB_POWER_EVENT 0

Definition at line 123 of file usbcfg.h.

#define USB_RESET_EVENT 1

Definition at line 124 of file usbcfg.h.

#define USB_RESUME_EVENT 0

Definition at line 126 of file usbcfg.h.

#define USB_SOF_EVENT 0

Definition at line 128 of file usbcfg.h.

#define USB_SUSPEND_EVENT 0

Definition at line 125 of file usbcfg.h.

#define USB_VENDOR 0

Definition at line 178 of file usbcfg.h.

#define USB_WAKEUP_EVENT 0

Definition at line 127 of file usbcfg.h.

Generated on Tue Jun 7 14:59:23 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBCDC/usbcore.c File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBCDC/usbcore.c File Reference

#include "lpc_types.h"
#include "usb.h"
#include "usbcfg.h"
#include "usbhw.h"
#include "usbcore.h"
#include "usbdesc.h"
#include "usbuser.h"
#include "cdc.h"
#include "cdcuser.h"

Go to the source code of this file.

Functions

void | USB_ResetCore (void)
void | USB_SetupStage (void)
void | USB_DataInStage (void)
void | USB_DataOutStage (void)
void | USB_StatusInStage (void)
void | USB_StatusOutStage (void)
__inline uint32_t | USB_ReqGetStatus (void)
__inline uint32_t | USB_ReqSetClrFeature (uint32_t sc)
__inline uint32_t | USB_ReqSetAddress (void)
__inline uint32_t | USB_ReqGetDescriptor (void)
__inline uint32_t | USB_ReqGetConfiguration (void)
__inline uint32_t | USB_ReqSetConfiguration (void)
__inline uint32_t | USB_ReqGetInterface (void)
__inline uint32_t | USB_ReqSetInterface (void)
void | USB_EndPoint0 (uint32_t event)

Variables

uint16_t | USB_DeviceStatus
uint8_t | USB_DeviceAddress
uint8_t | USB_Configuration
uint32_t | USB_EndPointMask
uint32_t | USB_EndPointHalt
uint32_t | USB_EndPointStall
uint8_t | USB_NumInterfaces
uint8_t | USB_AltSetting [USB_IF_NUM]
uint8_t | EP0Buf [USB_MAX_PACKET0]
USB_EP_DATA EP0Data
USB_SETUP_PACKET SetupPacket

Function Documentation

void USB_DataInStage ( void )

Definition at line 121 of file usbcore.c.

void USB_DataOutStage ( void )

Definition at line 141 of file usbcore.c.

void USB_EndPoint0 ( uint32_t event )

Definition at line 625 of file usbcore.c.

__inline uint32_t USB_ReqGetConfiguration ( void )

Definition at line 401 of file usbcore.c.

__inline uint32_t USB_ReqGetDescriptor ( void )

Definition at line 314 of file usbcore.c.

__inline uint32_t USB_ReqGetInterface ( void )

Definition at line 525 of file usbcore.c.

__inline uint32_t USB_ReqGetStatus ( void )

Definition at line 181 of file usbcore.c.

__inline uint32_t USB_ReqSetAddress ( void )

Definition at line 292 of file usbcore.c.

__inline uint32_t USB_ReqSetClrFeature ( uint32_t sc )

Definition at line 226 of file usbcore.c.

__inline uint32_t USB_ReqSetConfiguration ( void )

Definition at line 423 of file usbcore.c.

__inline uint32_t USB_ReqSetInterface ( void )

Definition at line 550 of file usbcore.c.

void USB_ResetCore ( void )

Definition at line 93 of file usbcore.c.

void USB_SetupStage ( void )

Definition at line 110 of file usbcore.c.

void USB_StatusInStage ( void )

Definition at line 156 of file usbcore.c.

void USB_StatusOutStage ( void )

Definition at line 167 of file usbcore.c.

Variable Documentation

uint8_t EP0Buf[USB_MAX_PACKET0]

Definition at line 79 of file usbcore.c.

USB_EP_DATA EP0Data

Definition at line 82 of file usbcore.c.

USB_SETUP_PACKET SetupPacket

Definition at line 84 of file usbcore.c.

uint8_t USB_AltSetting[USB_IF_NUM]

Definition at line 77 of file usbcore.c.

uint8_t USB_Configuration

Definition at line 72 of file usbcore.c.

uint8_t USB_DeviceAddress

Definition at line 71 of file usbcore.c.

uint16_t USB_DeviceStatus

Definition at line 70 of file usbcore.c.

uint32_t USB_EndPointHalt

Definition at line 74 of file usbcore.c.

uint32_t USB_EndPointMask

Definition at line 73 of file usbcore.c.

uint32_t USB_EndPointStall

Definition at line 75 of file usbcore.c.

uint8_t USB_NumInterfaces

Definition at line 76 of file usbcore.c.

Generated on Tue Jun 7 14:59:23 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBCDC/usbcore.h File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBCDC/usbcore.h File Reference

Go to the source code of this file.

Data Structures

struct | _USB_EP_DATA

Typedefs

typedef struct _USB_EP_DATA | USB_EP_DATA

Functions

void | USB_ResetCore (void)

Variables

uint16_t | USB_DeviceStatus
uint8_t | USB_DeviceAddress
uint8_t | USB_Configuration
uint32_t | USB_EndPointMask
uint32_t | USB_EndPointHalt
uint32_t | USB_EndPointStall
uint8_t | USB_AltSetting [USB_IF_NUM]
uint8_t | EP0Buf [USB_MAX_PACKET0]
USB_EP_DATA EP0Data
USB_SETUP_PACKET SetupPacket

Typedef Documentation

typedef struct _USB_EP_DATA USB_EP_DATA

Function Documentation

void USB_ResetCore ( void )

Definition at line 99 of file usbcore.c.

Variable Documentation

uint8_t EP0Buf[USB_MAX_PACKET0]

Definition at line 85 of file usbcore.c.

USB_EP_DATA EP0Data

Definition at line 88 of file usbcore.c.

USB_SETUP_PACKET SetupPacket

Definition at line 90 of file usbcore.c.

uint8_t USB_AltSetting[USB_IF_NUM]

Definition at line 83 of file usbcore.c.

uint8_t USB_Configuration

Definition at line 78 of file usbcore.c.

uint8_t USB_DeviceAddress

Definition at line 77 of file usbcore.c.

uint16_t USB_DeviceStatus

Definition at line 76 of file usbcore.c.

uint32_t USB_EndPointHalt

Definition at line 80 of file usbcore.c.

uint32_t USB_EndPointMask

Definition at line 79 of file usbcore.c.

uint32_t USB_EndPointStall

Definition at line 81 of file usbcore.c.

Generated on Tue Jun 7 14:59:24 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBCDC/usbdesc.c File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBCDC/usbdesc.c File Reference

#include "lpc_types.h"
#include "usb.h"
#include "cdc.h"
#include "usbcfg.h"
#include "usbdesc.h"

Go to the source code of this file.

Variables

const uint8_t | USB_DeviceDescriptor []
const uint8_t | USB_ConfigDescriptor []
const uint8_t | USB_StringDescriptor []

Variable Documentation

const uint8_t USB_ConfigDescriptor[]

Definition at line 49 of file usbdesc.c.

const uint8_t USB_DeviceDescriptor[]

Initial value:

 {
  USB_DEVICE_DESC_SIZE,
  USB_DEVICE_DESCRIPTOR_TYPE,
  WBVAL(0x0200),
  USB_DEVICE_CLASS_COMMUNICATIONS,
  0x00,
  0x00,
  USB_MAX_PACKET0,
  WBVAL(0x1FC9),
  WBVAL(0x2002),
  WBVAL(0x0100),
  0x01,
  0x02,
  0x03,
  0x01
}

Definition at line 30 of file usbdesc.c.

const uint8_t USB_StringDescriptor[]

Definition at line 138 of file usbdesc.c.

Generated on Tue Jun 7 14:59:24 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBCDC/usbdesc.h File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBCDC/usbdesc.h File Reference

Go to the source code of this file.

Defines

#define | WBVAL(x) (x & 0xFF),((x >> 8) & 0xFF)
#define | USB_DEVICE_DESC_SIZE (sizeof(USB_DEVICE_DESCRIPTOR))
#define | USB_CONFIGUARTION_DESC_SIZE (sizeof(USB_CONFIGURATION_DESCRIPTOR))
#define | USB_INTERFACE_DESC_SIZE (sizeof(USB_INTERFACE_DESCRIPTOR))
#define | USB_ENDPOINT_DESC_SIZE (sizeof(USB_ENDPOINT_DESCRIPTOR))

Variables

const uint8_t | USB_DeviceDescriptor []
const uint8_t | USB_ConfigDescriptor []
const uint8_t | USB_StringDescriptor []

Define Documentation

#define USB_CONFIGUARTION_DESC_SIZE (sizeof(USB_CONFIGURATION_DESCRIPTOR))

Definition at line 26 of file usbdesc.h.

#define USB_DEVICE_DESC_SIZE (sizeof(USB_DEVICE_DESCRIPTOR))

Definition at line 25 of file usbdesc.h.

#define USB_ENDPOINT_DESC_SIZE (sizeof(USB_ENDPOINT_DESCRIPTOR))

Definition at line 28 of file usbdesc.h.

#define USB_INTERFACE_DESC_SIZE (sizeof(USB_INTERFACE_DESCRIPTOR))

Definition at line 27 of file usbdesc.h.

#define WBVAL ( x ) (x & 0xFF),((x >> 8) & 0xFF)

Definition at line 23 of file usbdesc.h.

Variable Documentation

const uint8_t USB_ConfigDescriptor[]

Definition at line 50 of file usbdesc.c.

const uint8_t USB_DeviceDescriptor[]

Definition at line 31 of file usbdesc.c.

const uint8_t USB_StringDescriptor[]

Definition at line 185 of file usbdesc.c.

Generated on Tue Jun 7 14:59:24 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBCDC/usbhw.c File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBCDC/usbhw.c File Reference

#include "LPC17xx.h"
#include "usb.h"
#include "usbcfg.h"
#include "usbreg.h"
#include "usbhw.h"
#include "usbcore.h"
#include "usbuser.h"

Go to the source code of this file.

Defines

#define | EP_MSK_CTRL 0x0001
#define | EP_MSK_BULK 0xC924
#define | EP_MSK_INT 0x4492
#define | EP_MSK_ISO 0x1248

Functions

uint32_t | EPAdr (uint32_t EPNum)
void | WrCmd (uint32_t cmd)
void | WrCmdDat (uint32_t cmd, uint32_t val)
void | WrCmdEP (uint32_t EPNum, uint32_t cmd)
uint32_t | RdCmdDat (uint32_t cmd)
void | USB_Init (void)
void | USB_Connect (uint32_t con)
void | USB_Reset (void)
void | USB_Suspend (void)
void | USB_Resume (void)
void | USB_WakeUp (void)
void | USB_WakeUpCfg (uint32_t cfg)
void | USB_SetAddress (uint32_t adr)
void | USB_Configure (uint32_t cfg)
void | USB_ConfigEP (USB_ENDPOINT_DESCRIPTOR *pEPD)
void | USB_DirCtrlEP (uint32_t dir)
void | USB_EnableEP (uint32_t EPNum)
void | USB_DisableEP (uint32_t EPNum)
void | USB_ResetEP (uint32_t EPNum)
void | USB_SetStallEP (uint32_t EPNum)
void | USB_ClrStallEP (uint32_t EPNum)
void | USB_ClearEPBuf (uint32_t EPNum)
uint32_t | USB_ReadEP (uint32_t EPNum, uint8_t *pData)
uint32_t | USB_WriteEP (uint32_t EPNum, uint8_t *pData, uint32_t cnt)
uint32_t | USB_GetFrame (void)
void | USB_IRQHandler (void)

Define Documentation

#define EP_MSK_BULK 0xC924

Definition at line 36 of file usbhw.c.

#define EP_MSK_CTRL 0x0001

Definition at line 35 of file usbhw.c.

#define EP_MSK_INT 0x4492

Definition at line 37 of file usbhw.c.

#define EP_MSK_ISO 0x1248

Definition at line 38 of file usbhw.c.

Function Documentation

uint32_t EPAdr ( uint32_t EPNum )

Definition at line 63 of file usbhw.c.

uint32_t RdCmdDat ( uint32_t cmd )

Definition at line 130 of file usbhw.c.

void USB_ClearEPBuf ( uint32_t EPNum )

Definition at line 400 of file usbhw.c.

void USB_ClrStallEP ( uint32_t EPNum )

Definition at line 387 of file usbhw.c.

void USB_ConfigEP ( USB_ENDPOINT_DESCRIPTOR * pEPD )

Definition at line 304 of file usbhw.c.

void USB_Configure ( uint32_t cfg )

Definition at line 288 of file usbhw.c.

void USB_Connect ( uint32_t con )

Definition at line 175 of file usbhw.c.

void USB_DirCtrlEP ( uint32_t dir )

Definition at line 322 of file usbhw.c.

void USB_DisableEP ( uint32_t EPNum )

Definition at line 348 of file usbhw.c.

void USB_EnableEP ( uint32_t EPNum )

Definition at line 335 of file usbhw.c.

uint32_t USB_GetFrame ( void )

Definition at line 643 of file usbhw.c.

void USB_Init ( void )

Definition at line 145 of file usbhw.c.

void USB_IRQHandler ( void )

Definition at line 658 of file usbhw.c.

uint32_t USB_ReadEP | ( | uint32_t | EPNum,
 |  | uint8_t * | pData
 | ) |  |

Definition at line 414 of file usbhw.c.

void USB_Reset ( void )

Definition at line 186 of file usbhw.c.

void USB_ResetEP ( uint32_t EPNum )

Definition at line 361 of file usbhw.c.

void USB_Resume ( void )

Definition at line 240 of file usbhw.c.

void USB_SetAddress ( uint32_t adr )

Definition at line 276 of file usbhw.c.

void USB_SetStallEP ( uint32_t EPNum )

Definition at line 374 of file usbhw.c.

void USB_Suspend ( void )

Definition at line 229 of file usbhw.c.

void USB_WakeUp ( void )

Definition at line 251 of file usbhw.c.

void USB_WakeUpCfg ( uint32_t cfg )

Definition at line 265 of file usbhw.c.

uint32_t USB_WriteEP | ( | uint32_t | EPNum,
 |  | uint8_t * | pData,
 |  | uint32_t | cnt
 | ) |  |

Definition at line 448 of file usbhw.c.

void WrCmd ( uint32_t cmd )

Definition at line 80 of file usbhw.c.

void WrCmdDat | ( | uint32_t | cmd,
 |  | uint32_t | val
 | ) |  |

Definition at line 95 of file usbhw.c.

void WrCmdEP | ( | uint32_t | EPNum,
 |  | uint32_t | cmd
 | ) |  |

Definition at line 113 of file usbhw.c.

Generated on Tue Jun 7 14:59:25 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBCDC/usbhw.h File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBCDC/usbhw.h File Reference

#include "lpc_types.h"

Go to the source code of this file.

Data Structures

struct | _USB_DMA_DESCRIPTOR

Defines

#define | USB_RAM_ADR 0x20080000
#define | USB_RAM_SZ 0x00004000
#define | DD_NISO_CNT 16
#define | DD_ISO_CNT 8
#define | DD_NISO_SZ (DD_NISO_CNT * 16)
#define | DD_ISO_SZ (DD_ISO_CNT * 20)
#define | DD_NISO_ADR (USB_RAM_ADR + 128)
#define | DD_ISO_ADR (DD_NISO_ADR + DD_NISO_SZ)
#define | DD_SZ (128 + DD_NISO_SZ + DD_ISO_SZ)
#define | DMA_BUF_ADR (USB_RAM_ADR + DD_SZ)
#define | DMA_BUF_SZ (USB_RAM_SZ - DD_SZ)
#define | USB_ERR_PID 0x0001
#define | USB_ERR_UEPKT 0x0002
#define | USB_ERR_DCRC 0x0004
#define | USB_ERR_TIMOUT 0x0008
#define | USB_ERR_EOP 0x0010
#define | USB_ERR_B_OVRN 0x0020
#define | USB_ERR_BTSTF 0x0040
#define | USB_ERR_TGL 0x0080
#define | USB_DMA_INVALID 0x0000
#define | USB_DMA_IDLE 0x0001
#define | USB_DMA_BUSY 0x0002
#define | USB_DMA_DONE 0x0003
#define | USB_DMA_OVER_RUN 0x0004
#define | USB_DMA_UNDER_RUN 0x0005
#define | USB_DMA_ERROR 0x0006
#define | USB_DMA_UNKNOWN 0xFFFF

Typedefs

typedef struct _USB_DMA_DESCRIPTOR | USB_DMA_DESCRIPTOR

Functions

void | USB_Init (void)
void | USB_Connect (uint32_t con)
void | USB_Reset (void)
void | USB_Suspend (void)
void | USB_Resume (void)
void | USB_WakeUp (void)
void | USB_WakeUpCfg (uint32_t cfg)
void | USB_SetAddress (uint32_t adr)
void | USB_Configure (uint32_t cfg)
void | USB_ConfigEP (USB_ENDPOINT_DESCRIPTOR *pEPD)
void | USB_DirCtrlEP (uint32_t dir)
void | USB_EnableEP (uint32_t EPNum)
void | USB_DisableEP (uint32_t EPNum)
void | USB_ResetEP (uint32_t EPNum)
void | USB_SetStallEP (uint32_t EPNum)
void | USB_ClrStallEP (uint32_t EPNum)
void | USB_ClearEPBuf (uint32_t EPNum)
uint32_t | USB_ReadEP (uint32_t EPNum, uint8_t *pData)
uint32_t | USB_WriteEP (uint32_t EPNum, uint8_t *pData, uint32_t cnt)
uint32_t | USB_DMA_Setup (uint32_t EPNum, USB_DMA_DESCRIPTOR *pDD)
void | USB_DMA_Enable (uint32_t EPNum)
void | USB_DMA_Disable (uint32_t EPNum)
uint32_t | USB_DMA_Status (uint32_t EPNum)
uint32_t | USB_DMA_BufAdr (uint32_t EPNum)
uint32_t | USB_DMA_BufCnt (uint32_t EPNum)
uint32_t | USB_GetFrame (void)
void | USB_IRQHandler (void)

Define Documentation

#define DD_ISO_ADR (DD_NISO_ADR + DD_NISO_SZ)

Definition at line 37 of file usbhw.h.

#define DD_ISO_CNT 8

Definition at line 33 of file usbhw.h.

#define DD_ISO_SZ (DD_ISO_CNT * 20)

Definition at line 35 of file usbhw.h.

#define DD_NISO_ADR (USB_RAM_ADR + 128)

Definition at line 36 of file usbhw.h.

#define DD_NISO_CNT 16

Definition at line 32 of file usbhw.h.

#define DD_NISO_SZ (DD_NISO_CNT * 16)

Definition at line 34 of file usbhw.h.

#define DD_SZ (128 + DD_NISO_SZ + DD_ISO_SZ)

Definition at line 38 of file usbhw.h.

#define DMA_BUF_ADR (USB_RAM_ADR + DD_SZ)

Definition at line 41 of file usbhw.h.

#define DMA_BUF_SZ (USB_RAM_SZ - DD_SZ)

Definition at line 42 of file usbhw.h.

#define USB_DMA_BUSY 0x0002

Definition at line 57 of file usbhw.h.

#define USB_DMA_DONE 0x0003

Definition at line 58 of file usbhw.h.

#define USB_DMA_ERROR 0x0006

Definition at line 61 of file usbhw.h.

#define USB_DMA_IDLE 0x0001

Definition at line 56 of file usbhw.h.

#define USB_DMA_INVALID 0x0000

Definition at line 55 of file usbhw.h.

#define USB_DMA_OVER_RUN 0x0004

Definition at line 59 of file usbhw.h.

#define USB_DMA_UNDER_RUN 0x0005

Definition at line 60 of file usbhw.h.

#define USB_DMA_UNKNOWN 0xFFFF

Definition at line 62 of file usbhw.h.

#define USB_ERR_B_OVRN 0x0020

Definition at line 50 of file usbhw.h.

#define USB_ERR_BTSTF 0x0040

Definition at line 51 of file usbhw.h.

#define USB_ERR_DCRC 0x0004

Definition at line 47 of file usbhw.h.

#define USB_ERR_EOP 0x0010

Definition at line 49 of file usbhw.h.

#define USB_ERR_PID 0x0001

Definition at line 45 of file usbhw.h.

#define USB_ERR_TGL 0x0080

Definition at line 52 of file usbhw.h.

#define USB_ERR_TIMOUT 0x0008

Definition at line 48 of file usbhw.h.

#define USB_ERR_UEPKT 0x0002

Definition at line 46 of file usbhw.h.

#define USB_RAM_ADR 0x20080000

Definition at line 28 of file usbhw.h.

#define USB_RAM_SZ 0x00004000

Definition at line 29 of file usbhw.h.

Typedef Documentation

typedef struct _USB_DMA_DESCRIPTOR USB_DMA_DESCRIPTOR

Function Documentation

void USB_ClearEPBuf ( uint32_t EPNum )

Definition at line 403 of file usbhw.c.

void USB_ClrStallEP ( uint32_t EPNum )

Definition at line 390 of file usbhw.c.

void USB_ConfigEP ( USB_ENDPOINT_DESCRIPTOR * pEPD )

Definition at line 307 of file usbhw.c.

void USB_Configure ( uint32_t cfg )

Definition at line 291 of file usbhw.c.

void USB_Connect ( uint32_t con )

Definition at line 178 of file usbhw.c.

void USB_DirCtrlEP ( uint32_t dir )

Definition at line 325 of file usbhw.c.

void USB_DisableEP ( uint32_t EPNum )

Definition at line 351 of file usbhw.c.

uint32_t USB_DMA_BufAdr ( uint32_t EPNum )

Definition at line 599 of file usbhw.c.

uint32_t USB_DMA_BufCnt ( uint32_t EPNum )

Definition at line 622 of file usbhw.c.

void USB_DMA_Disable ( uint32_t EPNum )

Definition at line 553 of file usbhw.c.

void USB_DMA_Enable ( uint32_t EPNum )

Definition at line 540 of file usbhw.c.

uint32_t USB_DMA_Setup | ( | uint32_t | EPNum,
 |  | USB_DMA_DESCRIPTOR * | pDD
 | ) |  |

Definition at line 471 of file usbhw.c.

uint32_t USB_DMA_Status ( uint32_t EPNum )

Definition at line 566 of file usbhw.c.

void USB_EnableEP ( uint32_t EPNum )

Definition at line 338 of file usbhw.c.

uint32_t USB_GetFrame ( void )

Definition at line 647 of file usbhw.c.

void USB_Init ( void )

Definition at line 148 of file usbhw.c.

void USB_IRQHandler ( void )

Definition at line 662 of file usbhw.c.

uint32_t USB_ReadEP | ( | uint32_t | EPNum,
 |  | uint8_t * | pData
 | ) |  |

Definition at line 417 of file usbhw.c.

void USB_Reset ( void )

Definition at line 189 of file usbhw.c.

void USB_ResetEP ( uint32_t EPNum )

Definition at line 364 of file usbhw.c.

void USB_Resume ( void )

Definition at line 243 of file usbhw.c.

void USB_SetAddress ( uint32_t adr )

Definition at line 279 of file usbhw.c.

void USB_SetStallEP ( uint32_t EPNum )

Definition at line 377 of file usbhw.c.

void USB_Suspend ( void )

Definition at line 232 of file usbhw.c.

void USB_WakeUp ( void )

Definition at line 254 of file usbhw.c.

void USB_WakeUpCfg ( uint32_t cfg )

Definition at line 268 of file usbhw.c.

uint32_t USB_WriteEP | ( | uint32_t | EPNum,
 |  | uint8_t * | pData,
 |  | uint32_t | cnt
 | ) |  |

Definition at line 450 of file usbhw.c.

Generated on Tue Jun 7 14:59:26 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBCDC/usbreg.h File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBCDC/usbreg.h File Reference

Go to the source code of this file.

Defines

#define | FRAME_INT 0x00000001
#define | EP_FAST_INT 0x00000002
#define | EP_SLOW_INT 0x00000004
#define | DEV_STAT_INT 0x00000008
#define | CCEMTY_INT 0x00000010
#define | CDFULL_INT 0x00000020
#define | RxENDPKT_INT 0x00000040
#define | TxENDPKT_INT 0x00000080
#define | EP_RLZED_INT 0x00000100
#define | ERR_INT 0x00000200
#define | PKT_LNGTH_MASK 0x000003FF
#define | PKT_DV 0x00000400
#define | PKT_RDY 0x00000800
#define | CTRL_RD_EN 0x00000001
#define | CTRL_WR_EN 0x00000002
#define | CMD_SET_ADDR 0x00D00500
#define | CMD_CFG_DEV 0x00D80500
#define | CMD_SET_MODE 0x00F30500
#define | CMD_RD_FRAME 0x00F50500
#define | DAT_RD_FRAME 0x00F50200
#define | CMD_RD_TEST 0x00FD0500
#define | DAT_RD_TEST 0x00FD0200
#define | CMD_SET_DEV_STAT 0x00FE0500
#define | CMD_GET_DEV_STAT 0x00FE0500
#define | DAT_GET_DEV_STAT 0x00FE0200
#define | CMD_GET_ERR_CODE 0x00FF0500
#define | DAT_GET_ERR_CODE 0x00FF0200
#define | CMD_RD_ERR_STAT 0x00FB0500
#define | DAT_RD_ERR_STAT 0x00FB0200
#define | DAT_WR_BYTE(x) (0x00000100 | ((x) << 16))
#define | CMD_SEL_EP(x) (0x00000500 | ((x) << 16))
#define | DAT_SEL_EP(x) (0x00000200 | ((x) << 16))
#define | CMD_SEL_EP_CLRI(x) (0x00400500 | ((x) << 16))
#define | DAT_SEL_EP_CLRI(x) (0x00400200 | ((x) << 16))
#define | CMD_SET_EP_STAT(x) (0x00400500 | ((x) << 16))
#define | CMD_CLR_BUF 0x00F20500
#define | DAT_CLR_BUF 0x00F20200
#define | CMD_VALID_BUF 0x00FA0500
#define | DEV_ADDR_MASK 0x7F
#define | DEV_EN 0x80
#define | CONF_DVICE 0x01
#define | AP_CLK 0x01
#define | INAK_CI 0x02
#define | INAK_CO 0x04
#define | INAK_II 0x08
#define | INAK_IO 0x10
#define | INAK_BI 0x20
#define | INAK_BO 0x40
#define | DEV_CON 0x01
#define | DEV_CON_CH 0x02
#define | DEV_SUS 0x04
#define | DEV_SUS_CH 0x08
#define | DEV_RST 0x10
#define | ERR_EC_MASK 0x0F
#define | ERR_EA 0x10
#define | ERR_PID 0x01
#define | ERR_UEPKT 0x02
#define | ERR_DCRC 0x04
#define | ERR_TIMOUT 0x08
#define | ERR_EOP 0x10
#define | ERR_B_OVRN 0x20
#define | ERR_BTSTF 0x40
#define | ERR_TGL 0x80
#define | EP_SEL_F 0x01
#define | EP_SEL_ST 0x02
#define | EP_SEL_STP 0x04
#define | EP_SEL_PO 0x08
#define | EP_SEL_EPN 0x10
#define | EP_SEL_B_1_FULL 0x20
#define | EP_SEL_B_2_FULL 0x40
#define | EP_STAT_ST 0x01
#define | EP_STAT_DA 0x20
#define | EP_STAT_RF_MO 0x40
#define | EP_STAT_CND_ST 0x80
#define | CLR_BUF_PO 0x01
#define | EOT_INT 0x01
#define | NDD_REQ_INT 0x02
#define | SYS_ERR_INT 0x04

Define Documentation

#define AP_CLK 0x01

Definition at line 76 of file usbreg.h.

#define CCEMTY_INT 0x00000010

Definition at line 27 of file usbreg.h.

#define CDFULL_INT 0x00000020

Definition at line 28 of file usbreg.h.

#define CLR_BUF_PO 0x01

Definition at line 121 of file usbreg.h.

#define CMD_CFG_DEV 0x00D80500

Definition at line 45 of file usbreg.h.

#define CMD_CLR_BUF 0x00F20500

Definition at line 64 of file usbreg.h.

#define CMD_GET_DEV_STAT 0x00FE0500

Definition at line 52 of file usbreg.h.

#define CMD_GET_ERR_CODE 0x00FF0500

Definition at line 54 of file usbreg.h.

#define CMD_RD_ERR_STAT 0x00FB0500

Definition at line 56 of file usbreg.h.

#define CMD_RD_FRAME 0x00F50500

Definition at line 47 of file usbreg.h.

#define CMD_RD_TEST 0x00FD0500

Definition at line 49 of file usbreg.h.

#define CMD_SEL_EP ( x ) (0x00000500 | ((x) << 16))

Definition at line 59 of file usbreg.h.

#define CMD_SEL_EP_CLRI ( x ) (0x00400500 | ((x) << 16))

Definition at line 61 of file usbreg.h.

#define CMD_SET_ADDR 0x00D00500

Definition at line 44 of file usbreg.h.

#define CMD_SET_DEV_STAT 0x00FE0500

Definition at line 51 of file usbreg.h.

#define CMD_SET_EP_STAT ( x ) (0x00400500 | ((x) << 16))

Definition at line 63 of file usbreg.h.

#define CMD_SET_MODE 0x00F30500

Definition at line 46 of file usbreg.h.

#define CMD_VALID_BUF 0x00FA0500

Definition at line 66 of file usbreg.h.

#define CONF_DVICE 0x01

Definition at line 73 of file usbreg.h.

#define CTRL_RD_EN 0x00000001

Definition at line 40 of file usbreg.h.

#define CTRL_WR_EN 0x00000002

Definition at line 41 of file usbreg.h.

#define DAT_CLR_BUF 0x00F20200

Definition at line 65 of file usbreg.h.

#define DAT_GET_DEV_STAT 0x00FE0200

Definition at line 53 of file usbreg.h.

#define DAT_GET_ERR_CODE 0x00FF0200

Definition at line 55 of file usbreg.h.

#define DAT_RD_ERR_STAT 0x00FB0200

Definition at line 57 of file usbreg.h.

#define DAT_RD_FRAME 0x00F50200

Definition at line 48 of file usbreg.h.

#define DAT_RD_TEST 0x00FD0200

Definition at line 50 of file usbreg.h.

#define DAT_SEL_EP ( x ) (0x00000200 | ((x) << 16))

Definition at line 60 of file usbreg.h.

#define DAT_SEL_EP_CLRI ( x ) (0x00400200 | ((x) << 16))

Definition at line 62 of file usbreg.h.

#define DAT_WR_BYTE ( x ) (0x00000100 | ((x) << 16))

Definition at line 58 of file usbreg.h.

#define DEV_ADDR_MASK 0x7F

Definition at line 69 of file usbreg.h.

#define DEV_CON 0x01

Definition at line 85 of file usbreg.h.

#define DEV_CON_CH 0x02

Definition at line 86 of file usbreg.h.

#define DEV_EN 0x80

Definition at line 70 of file usbreg.h.

#define DEV_RST 0x10

Definition at line 89 of file usbreg.h.

#define DEV_STAT_INT 0x00000008

Definition at line 26 of file usbreg.h.

#define DEV_SUS 0x04

Definition at line 87 of file usbreg.h.

#define DEV_SUS_CH 0x08

Definition at line 88 of file usbreg.h.

#define EOT_INT 0x01

Definition at line 125 of file usbreg.h.

#define EP_FAST_INT 0x00000002

Definition at line 24 of file usbreg.h.

#define EP_RLZED_INT 0x00000100

Definition at line 31 of file usbreg.h.

#define EP_SEL_B_1_FULL 0x20

Definition at line 111 of file usbreg.h.

#define EP_SEL_B_2_FULL 0x40

Definition at line 112 of file usbreg.h.

#define EP_SEL_EPN 0x10

Definition at line 110 of file usbreg.h.

#define EP_SEL_F 0x01

Definition at line 106 of file usbreg.h.

#define EP_SEL_PO 0x08

Definition at line 109 of file usbreg.h.

#define EP_SEL_ST 0x02

Definition at line 107 of file usbreg.h.

#define EP_SEL_STP 0x04

Definition at line 108 of file usbreg.h.

#define EP_SLOW_INT 0x00000004

Definition at line 25 of file usbreg.h.

#define EP_STAT_CND_ST 0x80

Definition at line 118 of file usbreg.h.

#define EP_STAT_DA 0x20

Definition at line 116 of file usbreg.h.

#define EP_STAT_RF_MO 0x40

Definition at line 117 of file usbreg.h.

#define EP_STAT_ST 0x01

Definition at line 115 of file usbreg.h.

#define ERR_B_OVRN 0x20

Definition at line 101 of file usbreg.h.

#define ERR_BTSTF 0x40

Definition at line 102 of file usbreg.h.

#define ERR_DCRC 0x04

Definition at line 98 of file usbreg.h.

#define ERR_EA 0x10

Definition at line 93 of file usbreg.h.

#define ERR_EC_MASK 0x0F

Definition at line 92 of file usbreg.h.

#define ERR_EOP 0x10

Definition at line 100 of file usbreg.h.

#define ERR_INT 0x00000200

Definition at line 32 of file usbreg.h.

#define ERR_PID 0x01

Definition at line 96 of file usbreg.h.

#define ERR_TGL 0x80

Definition at line 103 of file usbreg.h.

#define ERR_TIMOUT 0x08

Definition at line 99 of file usbreg.h.

#define ERR_UEPKT 0x02

Definition at line 97 of file usbreg.h.

#define FRAME_INT 0x00000001

Definition at line 23 of file usbreg.h.

#define INAK_BI 0x20

Definition at line 81 of file usbreg.h.

#define INAK_BO 0x40

Definition at line 82 of file usbreg.h.

#define INAK_CI 0x02

Definition at line 77 of file usbreg.h.

#define INAK_CO 0x04

Definition at line 78 of file usbreg.h.

#define INAK_II 0x08

Definition at line 79 of file usbreg.h.

#define INAK_IO 0x10

Definition at line 80 of file usbreg.h.

#define NDD_REQ_INT 0x02

Definition at line 126 of file usbreg.h.

#define PKT_DV 0x00000400

Definition at line 36 of file usbreg.h.

#define PKT_LNGTH_MASK 0x000003FF

Definition at line 35 of file usbreg.h.

#define PKT_RDY 0x00000800

Definition at line 37 of file usbreg.h.

#define RxENDPKT_INT 0x00000040

Definition at line 29 of file usbreg.h.

#define SYS_ERR_INT 0x04

Definition at line 127 of file usbreg.h.

#define TxENDPKT_INT 0x00000080

Definition at line 30 of file usbreg.h.

Generated on Tue Jun 7 14:59:28 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBCDC/usbuser.c File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBCDC/usbuser.c File Reference

#include "lpc_types.h"
#include "usb.h"
#include "usbcfg.h"
#include "usbhw.h"
#include "usbcore.h"
#include "usbuser.h"
#include "cdcuser.h"

Go to the source code of this file.

Defines

#define | P_EP(n) ((USB_EP_EVENT & (1 << (n))) ? USB_EndPoint##n : NULL)

Functions

void | USB_Reset_Event (void)
void | USB_Configure_Event (void)
void | USB_EndPoint1 (uint32_t event)
void | USB_EndPoint2 (uint32_t event)
void | USB_EndPoint3 (uint32_t event)
void | USB_EndPoint4 (uint32_t event)
void | USB_EndPoint5 (uint32_t event)
void | USB_EndPoint6 (uint32_t event)
void | USB_EndPoint7 (uint32_t event)
void | USB_EndPoint8 (uint32_t event)
void | USB_EndPoint9 (uint32_t event)
void | USB_EndPoint10 (uint32_t event)
void | USB_EndPoint11 (uint32_t event)
void | USB_EndPoint12 (uint32_t event)
void | USB_EndPoint13 (uint32_t event)
void | USB_EndPoint14 (uint32_t event)
void | USB_EndPoint15 (uint32_t event)

Variables

void(*const | USB_P_EP [16])(uint32_t event)

Define Documentation

#define P_EP ( n ) ((USB_EP_EVENT & (1 << (n))) ? USB_EndPoint##n : NULL)

Definition at line 145 of file usbuser.c.

Function Documentation

void USB_Configure_Event ( void )

Definition at line 114 of file usbuser.c.

void USB_EndPoint1 ( uint32_t event )

Definition at line 174 of file usbuser.c.

void USB_EndPoint10 ( uint32_t event )

Definition at line 285 of file usbuser.c.

void USB_EndPoint11 ( uint32_t event )

Definition at line 295 of file usbuser.c.

void USB_EndPoint12 ( uint32_t event )

Definition at line 305 of file usbuser.c.

void USB_EndPoint13 ( uint32_t event )

Definition at line 315 of file usbuser.c.

void USB_EndPoint14 ( uint32_t event )

Definition at line 325 of file usbuser.c.

void USB_EndPoint15 ( uint32_t event )

Definition at line 335 of file usbuser.c.

void USB_EndPoint2 ( uint32_t event )

Definition at line 196 of file usbuser.c.

void USB_EndPoint3 ( uint32_t event )

Definition at line 215 of file usbuser.c.

void USB_EndPoint4 ( uint32_t event )

Definition at line 225 of file usbuser.c.

void USB_EndPoint5 ( uint32_t event )

Definition at line 235 of file usbuser.c.

void USB_EndPoint6 ( uint32_t event )

Definition at line 245 of file usbuser.c.

void USB_EndPoint7 ( uint32_t event )

Definition at line 255 of file usbuser.c.

void USB_EndPoint8 ( uint32_t event )

Definition at line 265 of file usbuser.c.

void USB_EndPoint9 ( uint32_t event )

Definition at line 275 of file usbuser.c.

void USB_Reset_Event ( void )

Definition at line 46 of file usbuser.c.

Variable Documentation

void(* const USB_P_EP[16])(uint32_t event)

Initial value:

 {
  P_EP(0),
  P_EP(1),
  P_EP(2),
  P_EP(3),
  P_EP(4),
  P_EP(5),
  P_EP(6),
  P_EP(7),
  P_EP(8),
  P_EP(9),
  P_EP(10),
  P_EP(11),
  P_EP(12),
  P_EP(13),
  P_EP(14),
  P_EP(15),
}

Generated on Tue Jun 7 14:59:29 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBCDC/usbuser.h File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBCDC/usbuser.h File Reference

Go to the source code of this file.

Defines

#define | USB_EVT_SETUP 1
#define | USB_EVT_OUT 2
#define | USB_EVT_IN 3
#define | USB_EVT_OUT_NAK 4
#define | USB_EVT_IN_NAK 5
#define | USB_EVT_OUT_STALL 6
#define | USB_EVT_IN_STALL 7
#define | USB_EVT_OUT_DMA_EOT 8
#define | USB_EVT_IN_DMA_EOT 9
#define | USB_EVT_OUT_DMA_NDR 10
#define | USB_EVT_IN_DMA_NDR 11
#define | USB_EVT_OUT_DMA_ERR 12
#define | USB_EVT_IN_DMA_ERR 13

Functions

void | USB_Power_Event (uint32_t power)
void | USB_Reset_Event (void)
void | USB_Suspend_Event (void)
void | USB_Resume_Event (void)
void | USB_WakeUp_Event (void)
void | USB_SOF_Event (void)
void | USB_Error_Event (uint32_t error)
void | USB_EndPoint0 (uint32_t event)
void | USB_EndPoint1 (uint32_t event)
void | USB_EndPoint2 (uint32_t event)
void | USB_EndPoint3 (uint32_t event)
void | USB_EndPoint4 (uint32_t event)
void | USB_EndPoint5 (uint32_t event)
void | USB_EndPoint6 (uint32_t event)
void | USB_EndPoint7 (uint32_t event)
void | USB_EndPoint8 (uint32_t event)
void | USB_EndPoint9 (uint32_t event)
void | USB_EndPoint10 (uint32_t event)
void | USB_EndPoint11 (uint32_t event)
void | USB_EndPoint12 (uint32_t event)
void | USB_EndPoint13 (uint32_t event)
void | USB_EndPoint14 (uint32_t event)
void | USB_EndPoint15 (uint32_t event)
void | USB_Configure_Event (void)
void | USB_Interface_Event (void)
void | USB_Feature_Event (void)

Variables

void(*const | USB_P_EP [16])(uint32_t event)

Define Documentation

#define USB_EVT_IN 3

Definition at line 35 of file usbuser.h.

#define USB_EVT_IN_DMA_EOT 9

Definition at line 41 of file usbuser.h.

#define USB_EVT_IN_DMA_ERR 13

Definition at line 45 of file usbuser.h.

#define USB_EVT_IN_DMA_NDR 11

Definition at line 43 of file usbuser.h.

#define USB_EVT_IN_NAK 5

Definition at line 37 of file usbuser.h.

#define USB_EVT_IN_STALL 7

Definition at line 39 of file usbuser.h.

#define USB_EVT_OUT 2

Definition at line 34 of file usbuser.h.

#define USB_EVT_OUT_DMA_EOT 8

Definition at line 40 of file usbuser.h.

#define USB_EVT_OUT_DMA_ERR 12

Definition at line 44 of file usbuser.h.

#define USB_EVT_OUT_DMA_NDR 10

Definition at line 42 of file usbuser.h.

#define USB_EVT_OUT_NAK 4

Definition at line 36 of file usbuser.h.

#define USB_EVT_OUT_STALL 6

Definition at line 38 of file usbuser.h.

#define USB_EVT_SETUP 1

Definition at line 33 of file usbuser.h.

Function Documentation

void USB_Configure_Event ( void )

Definition at line 114 of file usbuser.c.

void USB_EndPoint0 ( uint32_t event )

Definition at line 600 of file usbcore.c.

void USB_EndPoint1 ( uint32_t event )

Definition at line 190 of file usbuser.c.

void USB_EndPoint10 ( uint32_t event )

Definition at line 311 of file usbuser.c.

void USB_EndPoint11 ( uint32_t event )

Definition at line 321 of file usbuser.c.

void USB_EndPoint12 ( uint32_t event )

Definition at line 331 of file usbuser.c.

void USB_EndPoint13 ( uint32_t event )

Definition at line 341 of file usbuser.c.

void USB_EndPoint14 ( uint32_t event )

Definition at line 351 of file usbuser.c.

void USB_EndPoint15 ( uint32_t event )

Definition at line 361 of file usbuser.c.

void USB_EndPoint2 ( uint32_t event )

Definition at line 200 of file usbuser.c.

void USB_EndPoint3 ( uint32_t event )

Definition at line 209 of file usbuser.c.

void USB_EndPoint4 ( uint32_t event )

Definition at line 251 of file usbuser.c.

void USB_EndPoint5 ( uint32_t event )

Definition at line 261 of file usbuser.c.

void USB_EndPoint6 ( uint32_t event )

Definition at line 271 of file usbuser.c.

void USB_EndPoint7 ( uint32_t event )

Definition at line 281 of file usbuser.c.

void USB_EndPoint8 ( uint32_t event )

Definition at line 291 of file usbuser.c.

void USB_EndPoint9 ( uint32_t event )

Definition at line 301 of file usbuser.c.

void USB_Error_Event ( uint32_t error )

void USB_Feature_Event ( void )

void USB_Interface_Event ( void )

void USB_Power_Event ( uint32_t power )

void USB_Reset_Event ( void )

Definition at line 48 of file usbuser.c.

void USB_Resume_Event ( void )

void USB_SOF_Event ( void )

Definition at line 93 of file usbuser.c.

void USB_Suspend_Event ( void )

void USB_WakeUp_Event ( void )

Variable Documentation

void(* const USB_P_EP[16])(uint32_t event)

Generated on Tue Jun 7 14:59:29 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBCDC/vcomdemo.c File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBCDC/vcomdemo.c File Reference

#include "LPC17xx.h"
#include "lpc_types.h"
#include "usb.h"
#include "usbcfg.h"
#include "usbhw.h"
#include "usbcore.h"
#include "cdc.h"
#include "cdcuser.h"
#include "serial.h"
#include "vcomdemo.h"

Go to the source code of this file.

Functions

void | VCOM_Init (void)
void | VCOM_Serial2Usb (void)
void | VCOM_Usb2Serial (void)
void | VCOM_CheckSerialState (void)
int | main (void)

Generated on Tue Jun 7 14:59:30 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBCDC/vcomdemo.h File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBCDC/vcomdemo.h File Reference

Go to the source code of this file.

Defines

#define | S2 0x00000400
#define | LED1 0x00000001
#define | LED2 0x00000002
#define | LED3 0x00000004
#define | LED4 0x00000008
#define | LED5 0x00000010
#define | LED6 0x00000020
#define | LED7 0x00000040
#define | LED8 0x00000080
#define | LEDMSK 0x000000FF

Define Documentation

#define LED1 0x00000001

Definition at line 21 of file vcomdemo.h.

#define LED2 0x00000002

Definition at line 22 of file vcomdemo.h.

#define LED3 0x00000004

Definition at line 23 of file vcomdemo.h.

#define LED4 0x00000008

Definition at line 24 of file vcomdemo.h.

#define LED5 0x00000010

Definition at line 25 of file vcomdemo.h.

#define LED6 0x00000020

Definition at line 26 of file vcomdemo.h.

#define LED7 0x00000040

Definition at line 27 of file vcomdemo.h.

#define LED8 0x00000080

Definition at line 28 of file vcomdemo.h.

#define LEDMSK 0x000000FF

Definition at line 30 of file vcomdemo.h.

#define S2 0x00000400

Definition at line 18 of file vcomdemo.h.

Generated on Tue Jun 7 14:59:30 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBHID/demo.c File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBHID/demo.c File Reference

#include "LPC17xx.h"
#include "lpc_types.h"
#include "usb.h"
#include "usbcfg.h"
#include "usbhw.h"
#include "demo.h"
#include "hid.h"
#include "lpc17xx_libcfg.h"
#include "lpc17xx_nvic.h"

Go to the source code of this file.

Functions

void | GetInReport (void)
void | SetOutReport (void)
int | main (void)
void | check_failed (uint8_t *file, uint32_t line)

Variables

uint8_t | InReport
uint8_t | OutReport

Generated on Tue Jun 7 14:59:30 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBHID/demo.h File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBHID/demo.h File Reference

Go to the source code of this file.

Defines

#define | PBINT 0x00000400
#define | LEDMSK 0x000000FF

Functions

void | GetInReport (void)
void | SetOutReport (void)

Variables

uint8_t | InReport
uint8_t | OutReport

Define Documentation

#define LEDMSK 0x000000FF

Definition at line 21 of file demo.h.

#define PBINT 0x00000400

Definition at line 18 of file demo.h.

Generated on Tue Jun 7 14:59:30 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBHID/hid.h File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBHID/hid.h File Reference

Go to the source code of this file.

Defines

#define | HID_SUBCLASS_NONE 0x00
#define | HID_SUBCLASS_BOOT 0x01
#define | HID_PROTOCOL_NONE 0x00
#define | HID_PROTOCOL_KEYBOARD 0x01
#define | HID_PROTOCOL_MOUSE 0x02
#define | HID_HID_DESCRIPTOR_TYPE 0x21
#define | HID_REPORT_DESCRIPTOR_TYPE 0x22
#define | HID_PHYSICAL_DESCRIPTOR_TYPE 0x23
#define | HID_REQUEST_GET_REPORT 0x01
#define | HID_REQUEST_GET_IDLE 0x02
#define | HID_REQUEST_GET_PROTOCOL 0x03
#define | HID_REQUEST_SET_REPORT 0x09
#define | HID_REQUEST_SET_IDLE 0x0A
#define | HID_REQUEST_SET_PROTOCOL 0x0B
#define | HID_REPORT_INPUT 0x01
#define | HID_REPORT_OUTPUT 0x02
#define | HID_REPORT_FEATURE 0x03
#define | HID_USAGE_PAGE_UNDEFINED 0x00
#define | HID_USAGE_PAGE_GENERIC 0x01
#define | HID_USAGE_PAGE_SIMULATION 0x02
#define | HID_USAGE_PAGE_VR 0x03
#define | HID_USAGE_PAGE_SPORT 0x04
#define | HID_USAGE_PAGE_GAME 0x05
#define | HID_USAGE_PAGE_DEV_CONTROLS 0x06
#define | HID_USAGE_PAGE_KEYBOARD 0x07
#define | HID_USAGE_PAGE_LED 0x08
#define | HID_USAGE_PAGE_BUTTON 0x09
#define | HID_USAGE_PAGE_ORDINAL 0x0A
#define | HID_USAGE_PAGE_TELEPHONY 0x0B
#define | HID_USAGE_PAGE_CONSUMER 0x0C
#define | HID_USAGE_PAGE_DIGITIZER 0x0D
#define | HID_USAGE_PAGE_UNICODE 0x10
#define | HID_USAGE_PAGE_ALPHANUMERIC 0x14
#define | HID_USAGE_GENERIC_POINTER 0x01
#define | HID_USAGE_GENERIC_MOUSE 0x02
#define | HID_USAGE_GENERIC_JOYSTICK 0x04
#define | HID_USAGE_GENERIC_GAMEPAD 0x05
#define | HID_USAGE_GENERIC_KEYBOARD 0x06
#define | HID_USAGE_GENERIC_KEYPAD 0x07
#define | HID_USAGE_GENERIC_X 0x30
#define | HID_USAGE_GENERIC_Y 0x31
#define | HID_USAGE_GENERIC_Z 0x32
#define | HID_USAGE_GENERIC_RX 0x33
#define | HID_USAGE_GENERIC_RY 0x34
#define | HID_USAGE_GENERIC_RZ 0x35
#define | HID_USAGE_GENERIC_SLIDER 0x36
#define | HID_USAGE_GENERIC_DIAL 0x37
#define | HID_USAGE_GENERIC_WHEEL 0x38
#define | HID_USAGE_GENERIC_HATSWITCH 0x39
#define | HID_USAGE_GENERIC_COUNTED_BUFFER 0x3A
#define | HID_USAGE_GENERIC_BYTE_COUNT 0x3B
#define | HID_USAGE_GENERIC_MOTION_WAKEUP 0x3C
#define | HID_USAGE_GENERIC_VX 0x40
#define | HID_USAGE_GENERIC_VY 0x41
#define | HID_USAGE_GENERIC_VZ 0x42
#define | HID_USAGE_GENERIC_VBRX 0x43
#define | HID_USAGE_GENERIC_VBRY 0x44
#define | HID_USAGE_GENERIC_VBRZ 0x45
#define | HID_USAGE_GENERIC_VNO 0x46
#define | HID_USAGE_GENERIC_SYSTEM_CTL 0x80
#define | HID_USAGE_GENERIC_SYSCTL_POWER 0x81
#define | HID_USAGE_GENERIC_SYSCTL_SLEEP 0x82
#define | HID_USAGE_GENERIC_SYSCTL_WAKE 0x83
#define | HID_USAGE_GENERIC_SYSCTL_CONTEXT_MENU 0x84
#define | HID_USAGE_GENERIC_SYSCTL_MAIN_MENU 0x85
#define | HID_USAGE_GENERIC_SYSCTL_APP_MENU 0x86
#define | HID_USAGE_GENERIC_SYSCTL_HELP_MENU 0x87
#define | HID_USAGE_GENERIC_SYSCTL_MENU_EXIT 0x88
#define | HID_USAGE_GENERIC_SYSCTL_MENU_SELECT 0x89
#define | HID_USAGE_GENERIC_SYSCTL_MENU_RIGHT 0x8A
#define | HID_USAGE_GENERIC_SYSCTL_MENU_LEFT 0x8B
#define | HID_USAGE_GENERIC_SYSCTL_MENU_UP 0x8C
#define | HID_USAGE_GENERIC_SYSCTL_MENU_DOWN 0x8D
#define | HID_USAGE_SIMULATION_RUDDER 0xBA
#define | HID_USAGE_SIMULATION_THROTTLE 0xBB
#define | HID_USAGE_KEYBOARD_NOEVENT 0x00
#define | HID_USAGE_KEYBOARD_ROLLOVER 0x01
#define | HID_USAGE_KEYBOARD_POSTFAIL 0x02
#define | HID_USAGE_KEYBOARD_UNDEFINED 0x03
#define | HID_USAGE_KEYBOARD_aA 0x04
#define | HID_USAGE_KEYBOARD_zZ 0x1D
#define | HID_USAGE_KEYBOARD_ONE 0x1E
#define | HID_USAGE_KEYBOARD_ZERO 0x27
#define | HID_USAGE_KEYBOARD_RETURN 0x28
#define | HID_USAGE_KEYBOARD_ESCAPE 0x29
#define | HID_USAGE_KEYBOARD_DELETE 0x2A
#define | HID_USAGE_KEYBOARD_F1 0x3A
#define | HID_USAGE_KEYBOARD_F12 0x45
#define | HID_USAGE_KEYBOARD_PRINT_SCREEN 0x46
#define | HID_USAGE_KEYBOARD_LCTRL 0xE0
#define | HID_USAGE_KEYBOARD_LSHFT 0xE1
#define | HID_USAGE_KEYBOARD_LALT 0xE2
#define | HID_USAGE_KEYBOARD_LGUI 0xE3
#define | HID_USAGE_KEYBOARD_RCTRL 0xE4
#define | HID_USAGE_KEYBOARD_RSHFT 0xE5
#define | HID_USAGE_KEYBOARD_RALT 0xE6
#define | HID_USAGE_KEYBOARD_RGUI 0xE7
#define | HID_USAGE_KEYBOARD_SCROLL_LOCK 0x47
#define | HID_USAGE_KEYBOARD_NUM_LOCK 0x53
#define | HID_USAGE_KEYBOARD_CAPS_LOCK 0x39
#define | HID_USAGE_LED_NUM_LOCK 0x01
#define | HID_USAGE_LED_CAPS_LOCK 0x02
#define | HID_USAGE_LED_SCROLL_LOCK 0x03
#define | HID_USAGE_LED_COMPOSE 0x04
#define | HID_USAGE_LED_KANA 0x05
#define | HID_USAGE_LED_POWER 0x06
#define | HID_USAGE_LED_SHIFT 0x07
#define | HID_USAGE_LED_DO_NOT_DISTURB 0x08
#define | HID_USAGE_LED_MUTE 0x09
#define | HID_USAGE_LED_TONE_ENABLE 0x0A
#define | HID_USAGE_LED_HIGH_CUT_FILTER 0x0B
#define | HID_USAGE_LED_LOW_CUT_FILTER 0x0C
#define | HID_USAGE_LED_EQUALIZER_ENABLE 0x0D
#define | HID_USAGE_LED_SOUND_FIELD_ON 0x0E
#define | HID_USAGE_LED_SURROUND_FIELD_ON 0x0F
#define | HID_USAGE_LED_REPEAT 0x10
#define | HID_USAGE_LED_STEREO 0x11
#define | HID_USAGE_LED_SAMPLING_RATE_DETECT 0x12
#define | HID_USAGE_LED_SPINNING 0x13
#define | HID_USAGE_LED_CAV 0x14
#define | HID_USAGE_LED_CLV 0x15
#define | HID_USAGE_LED_RECORDING_FORMAT_DET 0x16
#define | HID_USAGE_LED_OFF_HOOK 0x17
#define | HID_USAGE_LED_RING 0x18
#define | HID_USAGE_LED_MESSAGE_WAITING 0x19
#define | HID_USAGE_LED_DATA_MODE 0x1A
#define | HID_USAGE_LED_BATTERY_OPERATION 0x1B
#define | HID_USAGE_LED_BATTERY_OK 0x1C
#define | HID_USAGE_LED_BATTERY_LOW 0x1D
#define | HID_USAGE_LED_SPEAKER 0x1E
#define | HID_USAGE_LED_HEAD_SET 0x1F
#define | HID_USAGE_LED_HOLD 0x20
#define | HID_USAGE_LED_MICROPHONE 0x21
#define | HID_USAGE_LED_COVERAGE 0x22
#define | HID_USAGE_LED_NIGHT_MODE 0x23
#define | HID_USAGE_LED_SEND_CALLS 0x24
#define | HID_USAGE_LED_CALL_PICKUP 0x25
#define | HID_USAGE_LED_CONFERENCE 0x26
#define | HID_USAGE_LED_STAND_BY 0x27
#define | HID_USAGE_LED_CAMERA_ON 0x28
#define | HID_USAGE_LED_CAMERA_OFF 0x29
#define | HID_USAGE_LED_ON_LINE 0x2A
#define | HID_USAGE_LED_OFF_LINE 0x2B
#define | HID_USAGE_LED_BUSY 0x2C
#define | HID_USAGE_LED_READY 0x2D
#define | HID_USAGE_LED_PAPER_OUT 0x2E
#define | HID_USAGE_LED_PAPER_JAM 0x2F
#define | HID_USAGE_LED_REMOTE 0x30
#define | HID_USAGE_LED_FORWARD 0x31
#define | HID_USAGE_LED_REVERSE 0x32
#define | HID_USAGE_LED_STOP 0x33
#define | HID_USAGE_LED_REWIND 0x34
#define | HID_USAGE_LED_FAST_FORWARD 0x35
#define | HID_USAGE_LED_PLAY 0x36
#define | HID_USAGE_LED_PAUSE 0x37
#define | HID_USAGE_LED_RECORD 0x38
#define | HID_USAGE_LED_ERROR 0x39
#define | HID_USAGE_LED_SELECTED_INDICATOR 0x3A
#define | HID_USAGE_LED_IN_USE_INDICATOR 0x3B
#define | HID_USAGE_LED_MULTI_MODE_INDICATOR 0x3C
#define | HID_USAGE_LED_INDICATOR_ON 0x3D
#define | HID_USAGE_LED_INDICATOR_FLASH 0x3E
#define | HID_USAGE_LED_INDICATOR_SLOW_BLINK 0x3F
#define | HID_USAGE_LED_INDICATOR_FAST_BLINK 0x40
#define | HID_USAGE_LED_INDICATOR_OFF 0x41
#define | HID_USAGE_LED_FLASH_ON_TIME 0x42
#define | HID_USAGE_LED_SLOW_BLINK_ON_TIME 0x43
#define | HID_USAGE_LED_SLOW_BLINK_OFF_TIME 0x44
#define | HID_USAGE_LED_FAST_BLINK_ON_TIME 0x45
#define | HID_USAGE_LED_FAST_BLINK_OFF_TIME 0x46
#define | HID_USAGE_LED_INDICATOR_COLOR 0x47
#define | HID_USAGE_LED_RED 0x48
#define | HID_USAGE_LED_GREEN 0x49
#define | HID_USAGE_LED_AMBER 0x4A
#define | HID_USAGE_LED_GENERIC_INDICATOR 0x4B
#define | HID_USAGE_TELEPHONY_PHONE 0x01
#define | HID_USAGE_TELEPHONY_ANSWERING_MACHINE 0x02
#define | HID_USAGE_TELEPHONY_MESSAGE_CONTROLS 0x03
#define | HID_USAGE_TELEPHONY_HANDSET 0x04
#define | HID_USAGE_TELEPHONY_HEADSET 0x05
#define | HID_USAGE_TELEPHONY_KEYPAD 0x06
#define | HID_USAGE_TELEPHONY_PROGRAMMABLE_BUTTON 0x07
#define | HID_USAGE_CONSUMER_CONTROL 0x01
#define | HID_Input(x) 0x81,x
#define | HID_Output(x) 0x91,x
#define | HID_Feature(x) 0xB1,x
#define | HID_Collection(x) 0xA1,x
#define | HID_EndCollection 0xC0
#define | HID_Data 0<<0
#define | HID_Constant 1<<0
#define | HID_Array 0<<1
#define | HID_Variable 1<<1
#define | HID_Absolute 0<<2
#define | HID_Relative 1<<2
#define | HID_NoWrap 0<<3
#define | HID_Wrap 1<<3
#define | HID_Linear 0<<4
#define | HID_NonLinear 1<<4
#define | HID_PreferredState 0<<5
#define | HID_NoPreferred 1<<5
#define | HID_NoNullPosition 0<<6
#define | HID_NullState 1<<6
#define | HID_NonVolatile 0<<7
#define | HID_Volatile 1<<7
#define | HID_Physical 0x00
#define | HID_Application 0x01
#define | HID_Logical 0x02
#define | HID_Report 0x03
#define | HID_NamedArray 0x04
#define | HID_UsageSwitch 0x05
#define | HID_UsageModifier 0x06
#define | HID_UsagePage(x) 0x05,x
#define | HID_UsagePageVendor(x) 0x06,x,0xFF
#define | HID_LogicalMin(x) 0x15,x
#define | HID_LogicalMinS(x) 0x16,(x&0xFF),((x>>8)&0xFF)
#define | HID_LogicalMinL(x) 0x17,(x&0xFF),((x>>8)&0xFF),((x>>16)&0xFF),((x>>24)&0xFF)
#define | HID_LogicalMax(x) 0x25,x
#define | HID_LogicalMaxS(x) 0x26,(x&0xFF),((x>>8)&0xFF)
#define | HID_LogicalMaxL(x) 0x27,(x&0xFF),((x>>8)&0xFF),((x>>16)&0xFF),((x>>24)&0xFF)
#define | HID_PhysicalMin(x) 0x35,x
#define | HID_PhysicalMinS(x) 0x36,(x&0xFF),((x>>8)&0xFF)
#define | HID_PhysicalMinL(x) 0x37,(x&0xFF),((x>>8)&0xFF),((x>>16)&0xFF),((x>>24)&0xFF)
#define | HID_PhysicalMax(x) 0x45,x
#define | HID_PhysicalMaxS(x) 0x46,(x&0xFF),((x>>8)&0xFF)
#define | HID_PhysicalMaxL(x) 0x47,(x&0xFF),((x>>8)&0xFF),((x>>16)&0xFF),((x>>24)&0xFF)
#define | HID_UnitExponent(x) 0x55,x
#define | HID_Unit(x) 0x65,x
#define | HID_UnitS(x) 0x66,(x&0xFF),((x>>8)&0xFF)
#define | HID_UnitL(x) 0x67,(x&0xFF),((x>>8)&0xFF),((x>>16)&0xFF),((x>>24)&0xFF)
#define | HID_ReportSize(x) 0x75,x
#define | HID_ReportID(x) 0x85,x
#define | HID_ReportCount(x) 0x95,x
#define | HID_Push 0xA0
#define | HID_Pop 0xB0
#define | HID_Usage(x) 0x09,x
#define | HID_UsageMin(x) 0x19,x
#define | HID_UsageMax(x) 0x29,x

Variables

uint8_t | bLength
uint8_t | bDescriptorType
uint16_t | bcdHID
uint8_t | bCountryCode
uint8_t | bNumDescriptors
uint16_t | wDescriptorLength
DescriptorList [1]
HID_DESCRIPTOR

Define Documentation

#define HID_Absolute 0<<2

Definition at line 327 of file hid.h.

#define HID_Application 0x01

Definition at line 342 of file hid.h.

#define HID_Array 0<<1

Definition at line 325 of file hid.h.

#define HID_Collection ( x ) 0xA1,x

Definition at line 319 of file hid.h.

#define HID_Constant 1<<0

Definition at line 324 of file hid.h.

#define HID_Data 0<<0

Definition at line 323 of file hid.h.

#define HID_EndCollection 0xC0

Definition at line 320 of file hid.h.

#define HID_Feature ( x ) 0xB1,x

Definition at line 318 of file hid.h.

#define HID_HID_DESCRIPTOR_TYPE 0x21

Definition at line 38 of file hid.h.

#define HID_Input ( x ) 0x81,x

Definition at line 316 of file hid.h.

#define HID_Linear 0<<4

Definition at line 331 of file hid.h.

#define HID_Logical 0x02

Definition at line 343 of file hid.h.

#define HID_LogicalMax ( x ) 0x25,x

Definition at line 355 of file hid.h.

#define HID_LogicalMaxL ( x ) 0x27,(x&0xFF),((x>>8)&0xFF),((x>>16)&0xFF),((x>>24)&0xFF)

Definition at line 357 of file hid.h.

#define HID_LogicalMaxS ( x ) 0x26,(x&0xFF),((x>>8)&0xFF)

Definition at line 356 of file hid.h.

#define HID_LogicalMin ( x ) 0x15,x

Definition at line 352 of file hid.h.

#define HID_LogicalMinL ( x ) 0x17,(x&0xFF),((x>>8)&0xFF),((x>>16)&0xFF),((x>>24)&0xFF)

Definition at line 354 of file hid.h.

#define HID_LogicalMinS ( x ) 0x16,(x&0xFF),((x>>8)&0xFF)

Definition at line 353 of file hid.h.

#define HID_NamedArray 0x04

Definition at line 345 of file hid.h.

#define HID_NonLinear 1<<4

Definition at line 332 of file hid.h.

#define HID_NoNullPosition 0<<6

Definition at line 335 of file hid.h.

#define HID_NonVolatile 0<<7

Definition at line 337 of file hid.h.

#define HID_NoPreferred 1<<5

Definition at line 334 of file hid.h.

#define HID_NoWrap 0<<3

Definition at line 329 of file hid.h.

#define HID_NullState 1<<6

Definition at line 336 of file hid.h.

#define HID_Output ( x ) 0x91,x

Definition at line 317 of file hid.h.

#define HID_Physical 0x00

Definition at line 341 of file hid.h.

#define HID_PHYSICAL_DESCRIPTOR_TYPE 0x23

Definition at line 40 of file hid.h.

#define HID_PhysicalMax ( x ) 0x45,x

Definition at line 361 of file hid.h.

#define HID_PhysicalMaxL ( x ) 0x47,(x&0xFF),((x>>8)&0xFF),((x>>16)&0xFF),((x>>24)&0xFF)

Definition at line 363 of file hid.h.

#define HID_PhysicalMaxS ( x ) 0x46,(x&0xFF),((x>>8)&0xFF)

Definition at line 362 of file hid.h.

#define HID_PhysicalMin ( x ) 0x35,x

Definition at line 358 of file hid.h.

#define HID_PhysicalMinL ( x ) 0x37,(x&0xFF),((x>>8)&0xFF),((x>>16)&0xFF),((x>>24)&0xFF)

Definition at line 360 of file hid.h.

#define HID_PhysicalMinS ( x ) 0x36,(x&0xFF),((x>>8)&0xFF)

Definition at line 359 of file hid.h.

#define HID_Pop 0xB0

Definition at line 372 of file hid.h.

#define HID_PreferredState 0<<5

Definition at line 333 of file hid.h.

#define HID_PROTOCOL_KEYBOARD 0x01

Definition at line 33 of file hid.h.

#define HID_PROTOCOL_MOUSE 0x02

Definition at line 34 of file hid.h.

#define HID_PROTOCOL_NONE 0x00

Definition at line 32 of file hid.h.

#define HID_Push 0xA0

Definition at line 371 of file hid.h.

#define HID_Relative 1<<2

Definition at line 328 of file hid.h.

#define HID_Report 0x03

Definition at line 344 of file hid.h.

#define HID_REPORT_DESCRIPTOR_TYPE 0x22

Definition at line 39 of file hid.h.

#define HID_REPORT_FEATURE 0x03

Definition at line 88 of file hid.h.

#define HID_REPORT_INPUT 0x01

Definition at line 86 of file hid.h.

#define HID_REPORT_OUTPUT 0x02

Definition at line 87 of file hid.h.

#define HID_ReportCount ( x ) 0x95,x

Definition at line 370 of file hid.h.

#define HID_ReportID ( x ) 0x85,x

Definition at line 369 of file hid.h.

#define HID_ReportSize ( x ) 0x75,x

Definition at line 368 of file hid.h.

#define HID_REQUEST_GET_IDLE 0x02

Definition at line 79 of file hid.h.

#define HID_REQUEST_GET_PROTOCOL 0x03

Definition at line 80 of file hid.h.

#define HID_REQUEST_GET_REPORT 0x01

Definition at line 78 of file hid.h.

#define HID_REQUEST_SET_IDLE 0x0A

Definition at line 82 of file hid.h.

#define HID_REQUEST_SET_PROTOCOL 0x0B

Definition at line 83 of file hid.h.

#define HID_REQUEST_SET_REPORT 0x09

Definition at line 81 of file hid.h.

#define HID_SUBCLASS_BOOT 0x01

Definition at line 29 of file hid.h.

#define HID_SUBCLASS_NONE 0x00

Definition at line 28 of file hid.h.

#define HID_Unit ( x ) 0x65,x

Definition at line 365 of file hid.h.

#define HID_UnitExponent ( x ) 0x55,x

Definition at line 364 of file hid.h.

#define HID_UnitL ( x ) 0x67,(x&0xFF),((x>>8)&0xFF),((x>>16)&0xFF),((x>>24)&0xFF)

Definition at line 367 of file hid.h.

#define HID_UnitS ( x ) 0x66,(x&0xFF),((x>>8)&0xFF)

Definition at line 366 of file hid.h.

#define HID_Usage ( x ) 0x09,x

Definition at line 375 of file hid.h.

#define HID_USAGE_CONSUMER_CONTROL 0x01

Definition at line 307 of file hid.h.

#define HID_USAGE_GENERIC_BYTE_COUNT 0x3B

Definition at line 129 of file hid.h.

#define HID_USAGE_GENERIC_COUNTED_BUFFER 0x3A

Definition at line 128 of file hid.h.

#define HID_USAGE_GENERIC_DIAL 0x37

Definition at line 125 of file hid.h.

#define HID_USAGE_GENERIC_GAMEPAD 0x05

Definition at line 115 of file hid.h.

#define HID_USAGE_GENERIC_HATSWITCH 0x39

Definition at line 127 of file hid.h.

#define HID_USAGE_GENERIC_JOYSTICK 0x04

Definition at line 114 of file hid.h.

#define HID_USAGE_GENERIC_KEYBOARD 0x06

Definition at line 116 of file hid.h.

#define HID_USAGE_GENERIC_KEYPAD 0x07

Definition at line 117 of file hid.h.

#define HID_USAGE_GENERIC_MOTION_WAKEUP 0x3C

Definition at line 130 of file hid.h.

#define HID_USAGE_GENERIC_MOUSE 0x02

Definition at line 113 of file hid.h.

#define HID_USAGE_GENERIC_POINTER 0x01

Definition at line 112 of file hid.h.

#define HID_USAGE_GENERIC_RX 0x33

Definition at line 121 of file hid.h.

#define HID_USAGE_GENERIC_RY 0x34

Definition at line 122 of file hid.h.

#define HID_USAGE_GENERIC_RZ 0x35

Definition at line 123 of file hid.h.

#define HID_USAGE_GENERIC_SLIDER 0x36

Definition at line 124 of file hid.h.

#define HID_USAGE_GENERIC_SYSCTL_APP_MENU 0x86

Definition at line 144 of file hid.h.

#define HID_USAGE_GENERIC_SYSCTL_CONTEXT_MENU 0x84

Definition at line 142 of file hid.h.

#define HID_USAGE_GENERIC_SYSCTL_HELP_MENU 0x87

Definition at line 145 of file hid.h.

#define HID_USAGE_GENERIC_SYSCTL_MAIN_MENU 0x85

Definition at line 143 of file hid.h.

#define HID_USAGE_GENERIC_SYSCTL_MENU_DOWN 0x8D

Definition at line 151 of file hid.h.

#define HID_USAGE_GENERIC_SYSCTL_MENU_EXIT 0x88

Definition at line 146 of file hid.h.

#define HID_USAGE_GENERIC_SYSCTL_MENU_LEFT 0x8B

Definition at line 149 of file hid.h.

#define HID_USAGE_GENERIC_SYSCTL_MENU_RIGHT 0x8A

Definition at line 148 of file hid.h.

#define HID_USAGE_GENERIC_SYSCTL_MENU_SELECT 0x89

Definition at line 147 of file hid.h.

#define HID_USAGE_GENERIC_SYSCTL_MENU_UP 0x8C

Definition at line 150 of file hid.h.

#define HID_USAGE_GENERIC_SYSCTL_POWER 0x81

Definition at line 139 of file hid.h.

#define HID_USAGE_GENERIC_SYSCTL_SLEEP 0x82

Definition at line 140 of file hid.h.

#define HID_USAGE_GENERIC_SYSCTL_WAKE 0x83

Definition at line 141 of file hid.h.

#define HID_USAGE_GENERIC_SYSTEM_CTL 0x80

Definition at line 138 of file hid.h.

#define HID_USAGE_GENERIC_VBRX 0x43

Definition at line 134 of file hid.h.

#define HID_USAGE_GENERIC_VBRY 0x44

Definition at line 135 of file hid.h.

#define HID_USAGE_GENERIC_VBRZ 0x45

Definition at line 136 of file hid.h.

#define HID_USAGE_GENERIC_VNO 0x46

Definition at line 137 of file hid.h.

#define HID_USAGE_GENERIC_VX 0x40

Definition at line 131 of file hid.h.

#define HID_USAGE_GENERIC_VY 0x41

Definition at line 132 of file hid.h.

#define HID_USAGE_GENERIC_VZ 0x42

Definition at line 133 of file hid.h.

#define HID_USAGE_GENERIC_WHEEL 0x38

Definition at line 126 of file hid.h.

#define HID_USAGE_GENERIC_X 0x30

Definition at line 118 of file hid.h.

#define HID_USAGE_GENERIC_Y 0x31

Definition at line 119 of file hid.h.

#define HID_USAGE_GENERIC_Z 0x32

Definition at line 120 of file hid.h.

#define HID_USAGE_KEYBOARD_aA 0x04

Definition at line 181 of file hid.h.

#define HID_USAGE_KEYBOARD_CAPS_LOCK 0x39

Definition at line 209 of file hid.h.

#define HID_USAGE_KEYBOARD_DELETE 0x2A

Definition at line 190 of file hid.h.

#define HID_USAGE_KEYBOARD_ESCAPE 0x29

Definition at line 189 of file hid.h.

#define HID_USAGE_KEYBOARD_F1 0x3A

Definition at line 193 of file hid.h.

#define HID_USAGE_KEYBOARD_F12 0x45

Definition at line 194 of file hid.h.

#define HID_USAGE_KEYBOARD_LALT 0xE2

Definition at line 201 of file hid.h.

#define HID_USAGE_KEYBOARD_LCTRL 0xE0

Definition at line 199 of file hid.h.

#define HID_USAGE_KEYBOARD_LGUI 0xE3

Definition at line 202 of file hid.h.

#define HID_USAGE_KEYBOARD_LSHFT 0xE1

Definition at line 200 of file hid.h.

#define HID_USAGE_KEYBOARD_NOEVENT 0x00

Definition at line 175 of file hid.h.

#define HID_USAGE_KEYBOARD_NUM_LOCK 0x53

Definition at line 208 of file hid.h.

#define HID_USAGE_KEYBOARD_ONE 0x1E

Definition at line 185 of file hid.h.

#define HID_USAGE_KEYBOARD_POSTFAIL 0x02

Definition at line 177 of file hid.h.

#define HID_USAGE_KEYBOARD_PRINT_SCREEN 0x46

Definition at line 196 of file hid.h.

#define HID_USAGE_KEYBOARD_RALT 0xE6

Definition at line 205 of file hid.h.

#define HID_USAGE_KEYBOARD_RCTRL 0xE4

Definition at line 203 of file hid.h.

#define HID_USAGE_KEYBOARD_RETURN 0x28

Definition at line 188 of file hid.h.

#define HID_USAGE_KEYBOARD_RGUI 0xE7

Definition at line 206 of file hid.h.

#define HID_USAGE_KEYBOARD_ROLLOVER 0x01

Definition at line 176 of file hid.h.

#define HID_USAGE_KEYBOARD_RSHFT 0xE5

Definition at line 204 of file hid.h.

#define HID_USAGE_KEYBOARD_SCROLL_LOCK 0x47

Definition at line 207 of file hid.h.

#define HID_USAGE_KEYBOARD_UNDEFINED 0x03

Definition at line 178 of file hid.h.

#define HID_USAGE_KEYBOARD_ZERO 0x27

Definition at line 186 of file hid.h.

#define HID_USAGE_KEYBOARD_zZ 0x1D

Definition at line 182 of file hid.h.

#define HID_USAGE_LED_AMBER 0x4A

Definition at line 287 of file hid.h.

#define HID_USAGE_LED_BATTERY_LOW 0x1D

Definition at line 242 of file hid.h.

#define HID_USAGE_LED_BATTERY_OK 0x1C

Definition at line 241 of file hid.h.

#define HID_USAGE_LED_BATTERY_OPERATION 0x1B

Definition at line 240 of file hid.h.

#define HID_USAGE_LED_BUSY 0x2C

Definition at line 257 of file hid.h.

#define HID_USAGE_LED_CALL_PICKUP 0x25

Definition at line 250 of file hid.h.

#define HID_USAGE_LED_CAMERA_OFF 0x29

Definition at line 254 of file hid.h.

#define HID_USAGE_LED_CAMERA_ON 0x28

Definition at line 253 of file hid.h.

#define HID_USAGE_LED_CAPS_LOCK 0x02

Definition at line 215 of file hid.h.

#define HID_USAGE_LED_CAV 0x14

Definition at line 233 of file hid.h.

#define HID_USAGE_LED_CLV 0x15

Definition at line 234 of file hid.h.

#define HID_USAGE_LED_COMPOSE 0x04

Definition at line 217 of file hid.h.

#define HID_USAGE_LED_CONFERENCE 0x26

Definition at line 251 of file hid.h.

#define HID_USAGE_LED_COVERAGE 0x22

Definition at line 247 of file hid.h.

#define HID_USAGE_LED_DATA_MODE 0x1A

Definition at line 239 of file hid.h.

#define HID_USAGE_LED_DO_NOT_DISTURB 0x08

Definition at line 221 of file hid.h.

#define HID_USAGE_LED_EQUALIZER_ENABLE 0x0D

Definition at line 226 of file hid.h.

#define HID_USAGE_LED_ERROR 0x39

Definition at line 270 of file hid.h.

#define HID_USAGE_LED_FAST_BLINK_OFF_TIME 0x46

Definition at line 283 of file hid.h.

#define HID_USAGE_LED_FAST_BLINK_ON_TIME 0x45

Definition at line 282 of file hid.h.

#define HID_USAGE_LED_FAST_FORWARD 0x35

Definition at line 266 of file hid.h.

#define HID_USAGE_LED_FLASH_ON_TIME 0x42

Definition at line 279 of file hid.h.

#define HID_USAGE_LED_FORWARD 0x31

Definition at line 262 of file hid.h.

#define HID_USAGE_LED_GENERIC_INDICATOR 0x4B

Definition at line 288 of file hid.h.

#define HID_USAGE_LED_GREEN 0x49

Definition at line 286 of file hid.h.

#define HID_USAGE_LED_HEAD_SET 0x1F

Definition at line 244 of file hid.h.

#define HID_USAGE_LED_HIGH_CUT_FILTER 0x0B

Definition at line 224 of file hid.h.

#define HID_USAGE_LED_HOLD 0x20

Definition at line 245 of file hid.h.

#define HID_USAGE_LED_IN_USE_INDICATOR 0x3B

Definition at line 272 of file hid.h.

#define HID_USAGE_LED_INDICATOR_COLOR 0x47

Definition at line 284 of file hid.h.

#define HID_USAGE_LED_INDICATOR_FAST_BLINK 0x40

Definition at line 277 of file hid.h.

#define HID_USAGE_LED_INDICATOR_FLASH 0x3E

Definition at line 275 of file hid.h.

#define HID_USAGE_LED_INDICATOR_OFF 0x41

Definition at line 278 of file hid.h.

#define HID_USAGE_LED_INDICATOR_ON 0x3D

Definition at line 274 of file hid.h.

#define HID_USAGE_LED_INDICATOR_SLOW_BLINK 0x3F

Definition at line 276 of file hid.h.

#define HID_USAGE_LED_KANA 0x05

Definition at line 218 of file hid.h.

#define HID_USAGE_LED_LOW_CUT_FILTER 0x0C

Definition at line 225 of file hid.h.

#define HID_USAGE_LED_MESSAGE_WAITING 0x19

Definition at line 238 of file hid.h.

#define HID_USAGE_LED_MICROPHONE 0x21

Definition at line 246 of file hid.h.

#define HID_USAGE_LED_MULTI_MODE_INDICATOR 0x3C

Definition at line 273 of file hid.h.

#define HID_USAGE_LED_MUTE 0x09

Definition at line 222 of file hid.h.

#define HID_USAGE_LED_NIGHT_MODE 0x23

Definition at line 248 of file hid.h.

#define HID_USAGE_LED_NUM_LOCK 0x01

Definition at line 214 of file hid.h.

#define HID_USAGE_LED_OFF_HOOK 0x17

Definition at line 236 of file hid.h.

#define HID_USAGE_LED_OFF_LINE 0x2B

Definition at line 256 of file hid.h.

#define HID_USAGE_LED_ON_LINE 0x2A

Definition at line 255 of file hid.h.

#define HID_USAGE_LED_PAPER_JAM 0x2F

Definition at line 260 of file hid.h.

#define HID_USAGE_LED_PAPER_OUT 0x2E

Definition at line 259 of file hid.h.

#define HID_USAGE_LED_PAUSE 0x37

Definition at line 268 of file hid.h.

#define HID_USAGE_LED_PLAY 0x36

Definition at line 267 of file hid.h.

#define HID_USAGE_LED_POWER 0x06

Definition at line 219 of file hid.h.

#define HID_USAGE_LED_READY 0x2D

Definition at line 258 of file hid.h.

#define HID_USAGE_LED_RECORD 0x38

Definition at line 269 of file hid.h.

#define HID_USAGE_LED_RECORDING_FORMAT_DET 0x16

Definition at line 235 of file hid.h.

#define HID_USAGE_LED_RED 0x48

Definition at line 285 of file hid.h.

#define HID_USAGE_LED_REMOTE 0x30

Definition at line 261 of file hid.h.

#define HID_USAGE_LED_REPEAT 0x10

Definition at line 229 of file hid.h.

#define HID_USAGE_LED_REVERSE 0x32

Definition at line 263 of file hid.h.

#define HID_USAGE_LED_REWIND 0x34

Definition at line 265 of file hid.h.

#define HID_USAGE_LED_RING 0x18

Definition at line 237 of file hid.h.

#define HID_USAGE_LED_SAMPLING_RATE_DETECT 0x12

Definition at line 231 of file hid.h.

#define HID_USAGE_LED_SCROLL_LOCK 0x03

Definition at line 216 of file hid.h.

#define HID_USAGE_LED_SELECTED_INDICATOR 0x3A

Definition at line 271 of file hid.h.

#define HID_USAGE_LED_SEND_CALLS 0x24

Definition at line 249 of file hid.h.

#define HID_USAGE_LED_SHIFT 0x07

Definition at line 220 of file hid.h.

#define HID_USAGE_LED_SLOW_BLINK_OFF_TIME 0x44

Definition at line 281 of file hid.h.

#define HID_USAGE_LED_SLOW_BLINK_ON_TIME 0x43

Definition at line 280 of file hid.h.

#define HID_USAGE_LED_SOUND_FIELD_ON 0x0E

Definition at line 227 of file hid.h.

#define HID_USAGE_LED_SPEAKER 0x1E

Definition at line 243 of file hid.h.

#define HID_USAGE_LED_SPINNING 0x13

Definition at line 232 of file hid.h.

#define HID_USAGE_LED_STAND_BY 0x27

Definition at line 252 of file hid.h.

#define HID_USAGE_LED_STEREO 0x11

Definition at line 230 of file hid.h.

#define HID_USAGE_LED_STOP 0x33

Definition at line 264 of file hid.h.

#define HID_USAGE_LED_SURROUND_FIELD_ON 0x0F

Definition at line 228 of file hid.h.

#define HID_USAGE_LED_TONE_ENABLE 0x0A

Definition at line 223 of file hid.h.

#define HID_USAGE_PAGE_ALPHANUMERIC 0x14

Definition at line 107 of file hid.h.

#define HID_USAGE_PAGE_BUTTON 0x09

Definition at line 101 of file hid.h.

#define HID_USAGE_PAGE_CONSUMER 0x0C

Definition at line 104 of file hid.h.

#define HID_USAGE_PAGE_DEV_CONTROLS 0x06

Definition at line 98 of file hid.h.

#define HID_USAGE_PAGE_DIGITIZER 0x0D

Definition at line 105 of file hid.h.

#define HID_USAGE_PAGE_GAME 0x05

Definition at line 97 of file hid.h.

#define HID_USAGE_PAGE_GENERIC 0x01

Definition at line 93 of file hid.h.

#define HID_USAGE_PAGE_KEYBOARD 0x07

Definition at line 99 of file hid.h.

#define HID_USAGE_PAGE_LED 0x08

Definition at line 100 of file hid.h.

#define HID_USAGE_PAGE_ORDINAL 0x0A

Definition at line 102 of file hid.h.

#define HID_USAGE_PAGE_SIMULATION 0x02

Definition at line 94 of file hid.h.

#define HID_USAGE_PAGE_SPORT 0x04

Definition at line 96 of file hid.h.

#define HID_USAGE_PAGE_TELEPHONY 0x0B

Definition at line 103 of file hid.h.

#define HID_USAGE_PAGE_UNDEFINED 0x00

Definition at line 92 of file hid.h.

#define HID_USAGE_PAGE_UNICODE 0x10

Definition at line 106 of file hid.h.

#define HID_USAGE_PAGE_VR 0x03

Definition at line 95 of file hid.h.

#define HID_USAGE_SIMULATION_RUDDER 0xBA

Definition at line 156 of file hid.h.

#define HID_USAGE_SIMULATION_THROTTLE 0xBB

Definition at line 157 of file hid.h.

#define HID_USAGE_TELEPHONY_ANSWERING_MACHINE 0x02

Definition at line 298 of file hid.h.

#define HID_USAGE_TELEPHONY_HANDSET 0x04

Definition at line 300 of file hid.h.

#define HID_USAGE_TELEPHONY_HEADSET 0x05

Definition at line 301 of file hid.h.

#define HID_USAGE_TELEPHONY_KEYPAD 0x06

Definition at line 302 of file hid.h.

#define HID_USAGE_TELEPHONY_MESSAGE_CONTROLS 0x03

Definition at line 299 of file hid.h.

#define HID_USAGE_TELEPHONY_PHONE 0x01

Definition at line 297 of file hid.h.

#define HID_USAGE_TELEPHONY_PROGRAMMABLE_BUTTON 0x07

Definition at line 303 of file hid.h.

#define HID_UsageMax ( x ) 0x29,x

Definition at line 377 of file hid.h.

#define HID_UsageMin ( x ) 0x19,x

Definition at line 376 of file hid.h.

#define HID_UsageModifier 0x06

Definition at line 347 of file hid.h.

#define HID_UsagePage ( x ) 0x05,x

Definition at line 350 of file hid.h.

#define HID_UsagePageVendor ( x ) 0x06,x,0xFF

Definition at line 351 of file hid.h.

#define HID_UsageSwitch 0x05

Definition at line 346 of file hid.h.

#define HID_Variable 1<<1

Definition at line 326 of file hid.h.

#define HID_Volatile 1<<7

Definition at line 338 of file hid.h.

#define HID_Wrap 1<<3

Definition at line 330 of file hid.h.

Variable Documentation

uint16_t bcdHID

Definition at line 54 of file hid.h.

uint8_t bCountryCode

Definition at line 55 of file hid.h.

uint8_t bDescriptorType

Definition at line 53 of file hid.h.

uint8_t bLength

Definition at line 52 of file hid.h.

uint8_t bNumDescriptors

Definition at line 56 of file hid.h.

DescriptorList[1]

Definition at line 68 of file hid.h.

HID_DESCRIPTOR

Definition at line 72 of file hid.h.

uint16_t wDescriptorLength

Definition at line 67 of file hid.h.

Generated on Tue Jun 7 14:59:31 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBHID/hiduser.c File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBHID/hiduser.c File Reference

#include "lpc_types.h"
#include "usb.h"
#include "hid.h"
#include "usbcfg.h"
#include "usbcore.h"
#include "hiduser.h"
#include "demo.h"

Go to the source code of this file.

Functions

uint32_t | HID_GetReport (void)
uint32_t | HID_SetReport (void)
uint32_t | HID_GetIdle (void)
uint32_t | HID_SetIdle (void)
uint32_t | HID_GetProtocol (void)
uint32_t | HID_SetProtocol (void)

Variables

uint8_t | HID_Protocol
uint8_t | HID_IdleTime [HID_REPORT_NUM]

Function Documentation

uint32_t HID_GetIdle ( void )

Definition at line 92 of file hiduser.c.

uint32_t HID_GetProtocol ( void )

Definition at line 124 of file hiduser.c.

uint32_t HID_GetReport ( void )

Definition at line 42 of file hiduser.c.

uint32_t HID_SetIdle ( void )

Definition at line 106 of file hiduser.c.

uint32_t HID_SetProtocol ( void )

Definition at line 138 of file hiduser.c.

uint32_t HID_SetReport ( void )

Definition at line 68 of file hiduser.c.

Variable Documentation

uint8_t HID_IdleTime[HID_REPORT_NUM]

Definition at line 32 of file hiduser.c.

uint8_t HID_Protocol

Definition at line 31 of file hiduser.c.

Generated on Tue Jun 7 14:59:31 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBHID/hiduser.h File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBHID/hiduser.h File Reference

Go to the source code of this file.

Defines

#define | HID_REPORT_NUM 1

Functions

uint32_t | HID_GetReport (void)
uint32_t | HID_SetReport (void)
uint32_t | HID_GetIdle (void)
uint32_t | HID_SetIdle (void)
uint32_t | HID_GetProtocol (void)
uint32_t | HID_SetProtocol (void)

Variables

uint8_t | HID_Protocol
uint8_t | HID_IdleTime [HID_REPORT_NUM]

Define Documentation

#define HID_REPORT_NUM 1

Definition at line 24 of file hiduser.h.

Function Documentation

uint32_t HID_GetIdle ( void )

Definition at line 92 of file hiduser.c.

uint32_t HID_GetProtocol ( void )

Definition at line 124 of file hiduser.c.

uint32_t HID_GetReport ( void )

Definition at line 42 of file hiduser.c.

uint32_t HID_SetIdle ( void )

Definition at line 106 of file hiduser.c.

uint32_t HID_SetProtocol ( void )

Definition at line 138 of file hiduser.c.

uint32_t HID_SetReport ( void )

Definition at line 68 of file hiduser.c.

Variable Documentation

uint8_t HID_IdleTime[HID_REPORT_NUM]

Definition at line 32 of file hiduser.c.

uint8_t HID_Protocol

Definition at line 31 of file hiduser.c.

Generated on Tue Jun 7 14:59:31 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBHID/lpc17xx_libcfg.h File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBHID/lpc17xx_libcfg.h File Reference

#include "lpc_types.h"

Go to the source code of this file.

Defines

#define | DEBUG
#define | CHECK_PARAM(expr) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))

Functions

void | check_failed (uint8_t *file, uint32_t line)

Define Documentation

#define CHECK_PARAM ( expr ) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))

Definition at line 135 of file lpc17xx_libcfg.h.

#define DEBUG

Definition at line 36 of file lpc17xx_libcfg.h.

Generated on Tue Jun 7 14:59:11 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBHID/usb.h File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBHID/usb.h File Reference

Go to the source code of this file.

Defines

#define | REQUEST_HOST_TO_DEVICE 0
#define | REQUEST_DEVICE_TO_HOST 1
#define | REQUEST_STANDARD 0
#define | REQUEST_CLASS 1
#define | REQUEST_VENDOR 2
#define | REQUEST_RESERVED 3
#define | REQUEST_TO_DEVICE 0
#define | REQUEST_TO_INTERFACE 1
#define | REQUEST_TO_ENDPOINT 2
#define | REQUEST_TO_OTHER 3
#define | USB_REQUEST_GET_STATUS 0
#define | USB_REQUEST_CLEAR_FEATURE 1
#define | USB_REQUEST_SET_FEATURE 3
#define | USB_REQUEST_SET_ADDRESS 5
#define | USB_REQUEST_GET_DESCRIPTOR 6
#define | USB_REQUEST_SET_DESCRIPTOR 7
#define | USB_REQUEST_GET_CONFIGURATION 8
#define | USB_REQUEST_SET_CONFIGURATION 9
#define | USB_REQUEST_GET_INTERFACE 10
#define | USB_REQUEST_SET_INTERFACE 11
#define | USB_REQUEST_SYNC_FRAME 12
#define | USB_GETSTATUS_SELF_POWERED 0x01
#define | USB_GETSTATUS_REMOTE_WAKEUP 0x02
#define | USB_GETSTATUS_ENDPOINT_STALL 0x01
#define | USB_FEATURE_ENDPOINT_STALL 0
#define | USB_FEATURE_REMOTE_WAKEUP 1
#define | USB_DEVICE_DESCRIPTOR_TYPE 1
#define | USB_CONFIGURATION_DESCRIPTOR_TYPE 2
#define | USB_STRING_DESCRIPTOR_TYPE 3
#define | USB_INTERFACE_DESCRIPTOR_TYPE 4
#define | USB_ENDPOINT_DESCRIPTOR_TYPE 5
#define | USB_DEVICE_QUALIFIER_DESCRIPTOR_TYPE 6
#define | USB_OTHER_SPEED_CONFIG_DESCRIPTOR_TYPE 7
#define | USB_INTERFACE_POWER_DESCRIPTOR_TYPE 8
#define | USB_OTG_DESCRIPTOR_TYPE 9
#define | USB_DEBUG_DESCRIPTOR_TYPE 10
#define | USB_INTERFACE_ASSOCIATION_DESCRIPTOR_TYPE 11
#define | USB_DEVICE_CLASS_RESERVED 0x00
#define | USB_DEVICE_CLASS_AUDIO 0x01
#define | USB_DEVICE_CLASS_COMMUNICATIONS 0x02
#define | USB_DEVICE_CLASS_HUMAN_INTERFACE 0x03
#define | USB_DEVICE_CLASS_MONITOR 0x04
#define | USB_DEVICE_CLASS_PHYSICAL_INTERFACE 0x05
#define | USB_DEVICE_CLASS_POWER 0x06
#define | USB_DEVICE_CLASS_PRINTER 0x07
#define | USB_DEVICE_CLASS_STORAGE 0x08
#define | USB_DEVICE_CLASS_HUB 0x09
#define | USB_DEVICE_CLASS_MISCELLANEOUS 0xEF
#define | USB_DEVICE_CLASS_VENDOR_SPECIFIC 0xFF
#define | USB_CONFIG_POWERED_MASK 0xC0
#define | USB_CONFIG_BUS_POWERED 0x80
#define | USB_CONFIG_SELF_POWERED 0xC0
#define | USB_CONFIG_REMOTE_WAKEUP 0x20
#define | USB_CONFIG_POWER_MA(mA) ((mA)/2)
#define | USB_ENDPOINT_DIRECTION_MASK 0x80
#define | USB_ENDPOINT_OUT(addr) ((addr) | 0x00)
#define | USB_ENDPOINT_IN(addr) ((addr) | 0x80)
#define | USB_ENDPOINT_TYPE_MASK 0x03
#define | USB_ENDPOINT_TYPE_CONTROL 0x00
#define | USB_ENDPOINT_TYPE_ISOCHRONOUS 0x01
#define | USB_ENDPOINT_TYPE_BULK 0x02
#define | USB_ENDPOINT_TYPE_INTERRUPT 0x03
#define | USB_ENDPOINT_SYNC_MASK 0x0C
#define | USB_ENDPOINT_SYNC_NO_SYNCHRONIZATION 0x00
#define | USB_ENDPOINT_SYNC_ASYNCHRONOUS 0x04
#define | USB_ENDPOINT_SYNC_ADAPTIVE 0x08
#define | USB_ENDPOINT_SYNC_SYNCHRONOUS 0x0C
#define | USB_ENDPOINT_USAGE_MASK 0x30
#define | USB_ENDPOINT_USAGE_DATA 0x00
#define | USB_ENDPOINT_USAGE_FEEDBACK 0x10
#define | USB_ENDPOINT_USAGE_IMPLICIT_FEEDBACK 0x20
#define | USB_ENDPOINT_USAGE_RESERVED 0x30

Variables

uint16_t | W
uint8_t | L
uint8_t | H
WB
WORD_BYTE
uint8_t | Recipient
uint8_t | Type
uint8_t | Dir
BM
uint8_t | B
REQUEST_TYPE
REQUEST_TYPE bmRequestType
uint8_t | bRequest
WORD_BYTE wValue
WORD_BYTE wIndex
uint16_t | wLength
USB_SETUP_PACKET
uint8_t | bLength
uint8_t | bDescriptorType
uint16_t | bcdUSB
uint8_t | bDeviceClass
uint8_t | bDeviceSubClass
uint8_t | bDeviceProtocol
uint8_t | bMaxPacketSize0
uint16_t | idVendor
uint16_t | idProduct
uint16_t | bcdDevice
uint8_t | iManufacturer
uint8_t | iProduct
uint8_t | iSerialNumber
uint8_t | bNumConfigurations
USB_DEVICE_DESCRIPTOR
uint8_t | bReserved
USB_DEVICE_QUALIFIER_DESCRIPTOR
uint16_t | wTotalLength
uint8_t | bNumInterfaces
uint8_t | bConfigurationValue
uint8_t | iConfiguration
uint8_t | bmAttributes
uint8_t | bMaxPower
USB_CONFIGURATION_DESCRIPTOR
uint8_t | bInterfaceNumber
uint8_t | bAlternateSetting
uint8_t | bNumEndpoints
uint8_t | bInterfaceClass
uint8_t | bInterfaceSubClass
uint8_t | bInterfaceProtocol
uint8_t | iInterface
USB_INTERFACE_DESCRIPTOR
uint8_t | bEndpointAddress
uint16_t | wMaxPacketSize
uint8_t | bInterval
USB_ENDPOINT_DESCRIPTOR
uint16_t | bString
USB_STRING_DESCRIPTOR
USB_COMMON_DESCRIPTOR

Define Documentation

#define REQUEST_CLASS 1

Definition at line 62 of file usb.h.

#define REQUEST_DEVICE_TO_HOST 1

Definition at line 58 of file usb.h.

#define REQUEST_HOST_TO_DEVICE 0

Definition at line 57 of file usb.h.

#define REQUEST_RESERVED 3

Definition at line 64 of file usb.h.

#define REQUEST_STANDARD 0

Definition at line 61 of file usb.h.

#define REQUEST_TO_DEVICE 0

Definition at line 67 of file usb.h.

#define REQUEST_TO_ENDPOINT 2

Definition at line 69 of file usb.h.

#define REQUEST_TO_INTERFACE 1

Definition at line 68 of file usb.h.

#define REQUEST_TO_OTHER 3

Definition at line 70 of file usb.h.

#define REQUEST_VENDOR 2

Definition at line 63 of file usb.h.

#define USB_CONFIG_BUS_POWERED 0x80

Definition at line 172 of file usb.h.

#define USB_CONFIG_POWER_MA ( mA ) ((mA)/2)

Definition at line 177 of file usb.h.

#define USB_CONFIG_POWERED_MASK 0xC0

Definition at line 171 of file usb.h.

#define USB_CONFIG_REMOTE_WAKEUP 0x20

Definition at line 174 of file usb.h.

#define USB_CONFIG_SELF_POWERED 0xC0

Definition at line 173 of file usb.h.

#define USB_CONFIGURATION_DESCRIPTOR_TYPE 2

Definition at line 145 of file usb.h.

#define USB_DEBUG_DESCRIPTOR_TYPE 10

Definition at line 153 of file usb.h.

#define USB_DEVICE_CLASS_AUDIO 0x01

Definition at line 158 of file usb.h.

#define USB_DEVICE_CLASS_COMMUNICATIONS 0x02

Definition at line 159 of file usb.h.

#define USB_DEVICE_CLASS_HUB 0x09

Definition at line 166 of file usb.h.

#define USB_DEVICE_CLASS_HUMAN_INTERFACE 0x03

Definition at line 160 of file usb.h.

#define USB_DEVICE_CLASS_MISCELLANEOUS 0xEF

Definition at line 167 of file usb.h.

#define USB_DEVICE_CLASS_MONITOR 0x04

Definition at line 161 of file usb.h.

#define USB_DEVICE_CLASS_PHYSICAL_INTERFACE 0x05

Definition at line 162 of file usb.h.

#define USB_DEVICE_CLASS_POWER 0x06

Definition at line 163 of file usb.h.

#define USB_DEVICE_CLASS_PRINTER 0x07

Definition at line 164 of file usb.h.

#define USB_DEVICE_CLASS_RESERVED 0x00

Definition at line 157 of file usb.h.

#define USB_DEVICE_CLASS_STORAGE 0x08

Definition at line 165 of file usb.h.

#define USB_DEVICE_CLASS_VENDOR_SPECIFIC 0xFF

Definition at line 168 of file usb.h.

#define USB_DEVICE_DESCRIPTOR_TYPE 1

Definition at line 144 of file usb.h.

#define USB_DEVICE_QUALIFIER_DESCRIPTOR_TYPE 6

Definition at line 149 of file usb.h.

#define USB_ENDPOINT_DESCRIPTOR_TYPE 5

Definition at line 148 of file usb.h.

#define USB_ENDPOINT_DIRECTION_MASK 0x80

Definition at line 180 of file usb.h.

#define USB_ENDPOINT_IN ( addr ) ((addr) | 0x80)

Definition at line 182 of file usb.h.

#define USB_ENDPOINT_OUT ( addr ) ((addr) | 0x00)

Definition at line 181 of file usb.h.

#define USB_ENDPOINT_SYNC_ADAPTIVE 0x08

Definition at line 193 of file usb.h.

#define USB_ENDPOINT_SYNC_ASYNCHRONOUS 0x04

Definition at line 192 of file usb.h.

#define USB_ENDPOINT_SYNC_MASK 0x0C

Definition at line 190 of file usb.h.

#define USB_ENDPOINT_SYNC_NO_SYNCHRONIZATION 0x00

Definition at line 191 of file usb.h.

#define USB_ENDPOINT_SYNC_SYNCHRONOUS 0x0C

Definition at line 194 of file usb.h.

#define USB_ENDPOINT_TYPE_BULK 0x02

Definition at line 188 of file usb.h.

#define USB_ENDPOINT_TYPE_CONTROL 0x00

Definition at line 186 of file usb.h.

#define USB_ENDPOINT_TYPE_INTERRUPT 0x03

Definition at line 189 of file usb.h.

#define USB_ENDPOINT_TYPE_ISOCHRONOUS 0x01

Definition at line 187 of file usb.h.

#define USB_ENDPOINT_TYPE_MASK 0x03

Definition at line 185 of file usb.h.

#define USB_ENDPOINT_USAGE_DATA 0x00

Definition at line 196 of file usb.h.

#define USB_ENDPOINT_USAGE_FEEDBACK 0x10

Definition at line 197 of file usb.h.

#define USB_ENDPOINT_USAGE_IMPLICIT_FEEDBACK 0x20

Definition at line 198 of file usb.h.

#define USB_ENDPOINT_USAGE_MASK 0x30

Definition at line 195 of file usb.h.

#define USB_ENDPOINT_USAGE_RESERVED 0x30

Definition at line 199 of file usb.h.

#define USB_FEATURE_ENDPOINT_STALL 0

Definition at line 121 of file usb.h.

#define USB_FEATURE_REMOTE_WAKEUP 1

Definition at line 122 of file usb.h.

#define USB_GETSTATUS_ENDPOINT_STALL 0x01

Definition at line 118 of file usb.h.

#define USB_GETSTATUS_REMOTE_WAKEUP 0x02

Definition at line 117 of file usb.h.

#define USB_GETSTATUS_SELF_POWERED 0x01

Definition at line 116 of file usb.h.

#define USB_INTERFACE_ASSOCIATION_DESCRIPTOR_TYPE 11

Definition at line 154 of file usb.h.

#define USB_INTERFACE_DESCRIPTOR_TYPE 4

Definition at line 147 of file usb.h.

#define USB_INTERFACE_POWER_DESCRIPTOR_TYPE 8

Definition at line 151 of file usb.h.

#define USB_OTG_DESCRIPTOR_TYPE 9

Definition at line 152 of file usb.h.

#define USB_OTHER_SPEED_CONFIG_DESCRIPTOR_TYPE 7

Definition at line 150 of file usb.h.

#define USB_REQUEST_CLEAR_FEATURE 1

Definition at line 104 of file usb.h.

#define USB_REQUEST_GET_CONFIGURATION 8

Definition at line 109 of file usb.h.

#define USB_REQUEST_GET_DESCRIPTOR 6

Definition at line 107 of file usb.h.

#define USB_REQUEST_GET_INTERFACE 10

Definition at line 111 of file usb.h.

#define USB_REQUEST_GET_STATUS 0

Definition at line 103 of file usb.h.

#define USB_REQUEST_SET_ADDRESS 5

Definition at line 106 of file usb.h.

#define USB_REQUEST_SET_CONFIGURATION 9

Definition at line 110 of file usb.h.

#define USB_REQUEST_SET_DESCRIPTOR 7

Definition at line 108 of file usb.h.

#define USB_REQUEST_SET_FEATURE 3

Definition at line 105 of file usb.h.

#define USB_REQUEST_SET_INTERFACE 11

Definition at line 112 of file usb.h.

#define USB_REQUEST_SYNC_FRAME 12

Definition at line 113 of file usb.h.

#define USB_STRING_DESCRIPTOR_TYPE 3

Definition at line 146 of file usb.h.

Variable Documentation

uint8_t B

Definition at line 96 of file usb.h.

uint8_t bAlternateSetting

Definition at line 286 of file usb.h.

uint16_t bcdDevice

Definition at line 219 of file usb.h.

uint16_t bcdUSB

Definition at line 212 of file usb.h.

uint8_t bConfigurationValue

Definition at line 265 of file usb.h.

uint8_t bDescriptorType

Definition at line 211 of file usb.h.

uint8_t bDeviceClass

Definition at line 213 of file usb.h.

uint8_t bDeviceProtocol

Definition at line 215 of file usb.h.

uint8_t bDeviceSubClass

Definition at line 214 of file usb.h.

uint8_t bEndpointAddress

Definition at line 308 of file usb.h.

uint8_t bInterfaceClass

Definition at line 288 of file usb.h.

uint8_t bInterfaceNumber

Definition at line 285 of file usb.h.

uint8_t bInterfaceProtocol

Definition at line 290 of file usb.h.

uint8_t bInterfaceSubClass

Definition at line 289 of file usb.h.

uint8_t bInterval

Definition at line 311 of file usb.h.

uint8_t bLength

Definition at line 210 of file usb.h.

BM

Definition at line 92 of file usb.h.

uint8_t bmAttributes

Definition at line 267 of file usb.h.

uint8_t bMaxPacketSize0

Definition at line 216 of file usb.h.

uint8_t bMaxPower

Definition at line 268 of file usb.h.

REQUEST_TYPE bmRequestType

Definition at line 133 of file usb.h.

uint8_t bNumConfigurations

Definition at line 223 of file usb.h.

uint8_t bNumEndpoints

Definition at line 287 of file usb.h.

uint8_t bNumInterfaces

Definition at line 264 of file usb.h.

uint8_t bRequest

Definition at line 134 of file usb.h.

uint8_t bReserved

Definition at line 246 of file usb.h.

uint16_t bString

Definition at line 328 of file usb.h.

uint8_t Dir

Definition at line 91 of file usb.h.

uint8_t H

Definition at line 46 of file usb.h.

uint8_t iConfiguration

Definition at line 266 of file usb.h.

uint16_t idProduct

Definition at line 218 of file usb.h.

uint16_t idVendor

Definition at line 217 of file usb.h.

uint8_t iInterface

Definition at line 291 of file usb.h.

uint8_t iManufacturer

Definition at line 220 of file usb.h.

uint8_t iProduct

Definition at line 221 of file usb.h.

uint8_t iSerialNumber

Definition at line 222 of file usb.h.

uint8_t L

Definition at line 45 of file usb.h.

uint8_t Recipient

Definition at line 89 of file usb.h.

REQUEST_TYPE

Definition at line 97 of file usb.h.

uint8_t Type

Definition at line 90 of file usb.h.

USB_COMMON_DESCRIPTOR

Definition at line 345 of file usb.h.

USB_CONFIGURATION_DESCRIPTOR

Definition at line 269 of file usb.h.

USB_DEVICE_DESCRIPTOR

Definition at line 224 of file usb.h.

USB_DEVICE_QUALIFIER_DESCRIPTOR

Definition at line 247 of file usb.h.

USB_ENDPOINT_DESCRIPTOR

Definition at line 312 of file usb.h.

USB_INTERFACE_DESCRIPTOR

Definition at line 292 of file usb.h.

USB_SETUP_PACKET

Definition at line 138 of file usb.h.

USB_STRING_DESCRIPTOR

Definition at line 329 of file usb.h.

uint16_t W

Definition at line 36 of file usb.h.

WB

Definition at line 47 of file usb.h.

WORD_BYTE wIndex

Definition at line 136 of file usb.h.

uint16_t wLength

Definition at line 137 of file usb.h.

uint16_t wMaxPacketSize

Definition at line 310 of file usb.h.

WORD_BYTE

Definition at line 51 of file usb.h.

uint16_t wTotalLength

Definition at line 263 of file usb.h.

WORD_BYTE wValue

Definition at line 135 of file usb.h.

Generated on Tue Jun 7 14:59:22 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBHID/usbcfg.h File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBHID/usbcfg.h File Reference

Go to the source code of this file.

Defines

#define | USB_POWER 0
#define | USB_IF_NUM 1
#define | USB_EP_NUM 32
#define | USB_MAX_PACKET0 8
#define | USB_DMA 1
#define | USB_DMA_EP 0x00000000
#define | USB_POWER_EVENT 0
#define | USB_RESET_EVENT 1
#define | USB_SUSPEND_EVENT 0
#define | USB_RESUME_EVENT 0
#define | USB_WAKEUP_EVENT 0
#define | USB_SOF_EVENT 0
#define | USB_ERROR_EVENT 0
#define | USB_EP_EVENT 0x0007
#define | USB_CONFIGURE_EVENT 1
#define | USB_INTERFACE_EVENT 0
#define | USB_FEATURE_EVENT 0
#define | USB_CLASS 1
#define | USB_HID 1
#define | USB_HID_IF_NUM 0
#define | USB_MSC 0
#define | USB_MSC_IF_NUM 0
#define | USB_AUDIO 0
#define | USB_ADC_CIF_NUM 0
#define | USB_ADC_SIF1_NUM 1
#define | USB_ADC_SIF2_NUM 2
#define | USB_CDC 0
#define | USB_CDC_CIF_NUM 0
#define | USB_CDC_DIF_NUM 1
#define | USB_CDC_BUFSIZE 64

Define Documentation

#define USB_ADC_CIF_NUM 0

Definition at line 156 of file usbcfg.h.

#define USB_ADC_SIF1_NUM 1

Definition at line 157 of file usbcfg.h.

#define USB_ADC_SIF2_NUM 2

Definition at line 158 of file usbcfg.h.

#define USB_AUDIO 0

Definition at line 155 of file usbcfg.h.

#define USB_CDC 0

Definition at line 159 of file usbcfg.h.

#define USB_CDC_BUFSIZE 64

Definition at line 162 of file usbcfg.h.

#define USB_CDC_CIF_NUM 0

Definition at line 160 of file usbcfg.h.

#define USB_CDC_DIF_NUM 1

Definition at line 161 of file usbcfg.h.

#define USB_CLASS 1

Definition at line 150 of file usbcfg.h.

#define USB_CONFIGURE_EVENT 1

Definition at line 129 of file usbcfg.h.

#define USB_DMA 1

Definition at line 79 of file usbcfg.h.

#define USB_DMA_EP 0x00000000

Definition at line 80 of file usbcfg.h.

#define USB_EP_EVENT 0x0007

Definition at line 128 of file usbcfg.h.

#define USB_EP_NUM 32

Definition at line 76 of file usbcfg.h.

#define USB_ERROR_EVENT 0

Definition at line 126 of file usbcfg.h.

#define USB_FEATURE_EVENT 0

Definition at line 131 of file usbcfg.h.

#define USB_HID 1

Definition at line 151 of file usbcfg.h.

#define USB_HID_IF_NUM 0

Definition at line 152 of file usbcfg.h.

#define USB_IF_NUM 1

Definition at line 75 of file usbcfg.h.

#define USB_INTERFACE_EVENT 0

Definition at line 130 of file usbcfg.h.

#define USB_MAX_PACKET0 8

Definition at line 78 of file usbcfg.h.

#define USB_MSC 0

Definition at line 153 of file usbcfg.h.

#define USB_MSC_IF_NUM 0

Definition at line 154 of file usbcfg.h.

#define USB_POWER 0

Definition at line 74 of file usbcfg.h.

#define USB_POWER_EVENT 0

Definition at line 120 of file usbcfg.h.

#define USB_RESET_EVENT 1

Definition at line 121 of file usbcfg.h.

#define USB_RESUME_EVENT 0

Definition at line 123 of file usbcfg.h.

#define USB_SOF_EVENT 0

Definition at line 125 of file usbcfg.h.

#define USB_SUSPEND_EVENT 0

Definition at line 122 of file usbcfg.h.

#define USB_WAKEUP_EVENT 0

Definition at line 124 of file usbcfg.h.

Generated on Tue Jun 7 14:59:23 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBHID/usbcore.c File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBHID/usbcore.c File Reference

#include "lpc_types.h"
#include "usb.h"
#include "usbcfg.h"
#include "usbhw.h"
#include "usbcore.h"
#include "usbdesc.h"
#include "usbuser.h"
#include "hid.h"
#include "hiduser.h"

Go to the source code of this file.

Functions

void | USB_ResetCore (void)
void | USB_SetupStage (void)
void | USB_DataInStage (void)
void | USB_DataOutStage (void)
void | USB_StatusInStage (void)
void | USB_StatusOutStage (void)
__inline uint32_t | USB_GetDescriptor (void)
__inline uint32_t | USB_SetConfiguration (void)
void | USB_EndPoint0 (uint32_t event)

Variables

uint16_t | USB_DeviceStatus
uint8_t | USB_DeviceAddress
uint8_t | USB_Configuration
uint32_t | USB_EndPointMask
uint32_t | USB_EndPointHalt
uint8_t | USB_NumInterfaces
uint8_t | USB_AltSetting [USB_IF_NUM]
uint8_t | EP0Buf [USB_MAX_PACKET0]
USB_EP_DATA EP0Data
USB_SETUP_PACKET SetupPacket

Function Documentation

void USB_DataInStage ( void )

Definition at line 111 of file usbcore.c.

void USB_DataOutStage ( void )

Definition at line 131 of file usbcore.c.

void USB_EndPoint0 ( uint32_t event )

Definition at line 335 of file usbcore.c.

__inline uint32_t USB_GetDescriptor ( void )

Definition at line 171 of file usbcore.c.

void USB_ResetCore ( void )

Definition at line 84 of file usbcore.c.

__inline uint32_t USB_SetConfiguration ( void )

Definition at line 259 of file usbcore.c.

void USB_SetupStage ( void )

Definition at line 100 of file usbcore.c.

void USB_StatusInStage ( void )

Definition at line 146 of file usbcore.c.

void USB_StatusOutStage ( void )

Definition at line 157 of file usbcore.c.

Variable Documentation

uint8_t EP0Buf[USB_MAX_PACKET0]

Definition at line 70 of file usbcore.c.

USB_EP_DATA EP0Data

Definition at line 73 of file usbcore.c.

USB_SETUP_PACKET SetupPacket

Definition at line 75 of file usbcore.c.

uint8_t USB_AltSetting[USB_IF_NUM]

Definition at line 68 of file usbcore.c.

uint8_t USB_Configuration

Definition at line 64 of file usbcore.c.

uint8_t USB_DeviceAddress

Definition at line 63 of file usbcore.c.

uint16_t USB_DeviceStatus

Definition at line 62 of file usbcore.c.

uint32_t USB_EndPointHalt

Definition at line 66 of file usbcore.c.

uint32_t USB_EndPointMask

Definition at line 65 of file usbcore.c.

uint8_t USB_NumInterfaces

Definition at line 67 of file usbcore.c.

Generated on Tue Jun 7 14:59:24 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBHID/usbcore.h File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBHID/usbcore.h File Reference

Go to the source code of this file.

Data Structures

struct | _USB_EP_DATA

Typedefs

typedef struct _USB_EP_DATA | USB_EP_DATA

Functions

void | USB_ResetCore (void)

Variables

uint16_t | USB_DeviceStatus
uint8_t | USB_DeviceAddress
uint8_t | USB_Configuration
uint32_t | USB_EndPointMask
uint32_t | USB_EndPointHalt
uint8_t | USB_AltSetting [USB_IF_NUM]
uint8_t | EP0Buf [USB_MAX_PACKET0]
USB_EP_DATA EP0Data
USB_SETUP_PACKET SetupPacket

Typedef Documentation

typedef struct _USB_EP_DATA USB_EP_DATA

Function Documentation

void USB_ResetCore ( void )

Definition at line 99 of file usbcore.c.

Variable Documentation

uint8_t EP0Buf[USB_MAX_PACKET0]

Definition at line 85 of file usbcore.c.

USB_EP_DATA EP0Data

Definition at line 88 of file usbcore.c.

USB_SETUP_PACKET SetupPacket

Definition at line 90 of file usbcore.c.

uint8_t USB_AltSetting[USB_IF_NUM]

Definition at line 83 of file usbcore.c.

uint8_t USB_Configuration

Definition at line 78 of file usbcore.c.

uint8_t USB_DeviceAddress

Definition at line 77 of file usbcore.c.

uint16_t USB_DeviceStatus

Definition at line 76 of file usbcore.c.

uint32_t USB_EndPointHalt

Definition at line 80 of file usbcore.c.

uint32_t USB_EndPointMask

Definition at line 79 of file usbcore.c.

Generated on Tue Jun 7 14:59:24 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBHID/usbdesc.c File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBHID/usbdesc.c File Reference

#include "lpc_types.h"
#include "usb.h"
#include "usbcfg.h"
#include "usbdesc.h"
#include "hid.h"

Go to the source code of this file.

Variables

const uint8_t | HID_ReportDescriptor []
const uint16_t | HID_ReportDescSize = sizeof(HID_ReportDescriptor)
const uint8_t | USB_DeviceDescriptor []
const uint8_t | USB_ConfigDescriptor []
const uint8_t | USB_StringDescriptor []

Variable Documentation

const uint8_t HID_ReportDescriptor[]

Initial value:

 {
  HID_UsagePageVendor(0x00),
  HID_Usage(0x01),
  HID_Collection(HID_Application),
    HID_UsagePage(HID_USAGE_PAGE_BUTTON),
    HID_UsageMin(1),
    HID_UsageMax(3),
    HID_LogicalMin(0),
    HID_LogicalMax(1),
    HID_ReportCount(3),
    HID_ReportSize(1),
    HID_Input(HID_Data | HID_Variable | HID_Absolute),
    HID_ReportCount(1),
    HID_ReportSize(5),
    HID_Input(HID_Constant),
    HID_UsagePage(HID_USAGE_PAGE_LED),
    HID_Usage(HID_USAGE_LED_GENERIC_INDICATOR),
    HID_LogicalMin(0),
    HID_LogicalMax(1),
    HID_ReportCount(8),
    HID_ReportSize(1),
    HID_Output(HID_Data | HID_Variable | HID_Absolute),
  HID_EndCollection,
}

Definition at line 28 of file usbdesc.c.

const uint16_t HID_ReportDescSize = sizeof(HID_ReportDescriptor)

Definition at line 53 of file usbdesc.c.

const uint8_t USB_ConfigDescriptor[]

Definition at line 76 of file usbdesc.c.

const uint8_t USB_DeviceDescriptor[]

Initial value:

 {
  USB_DEVICE_DESC_SIZE,
  USB_DEVICE_DESCRIPTOR_TYPE,
  WBVAL(0x0200),
  0x00,
  0x00,
  0x00,
  USB_MAX_PACKET0,
  WBVAL(0xC251),
  WBVAL(0x2201),
  WBVAL(0x0100),
  0x04,
  0x20,
  0x42,
  0x01
}

Definition at line 57 of file usbdesc.c.

const uint8_t USB_StringDescriptor[]

Definition at line 123 of file usbdesc.c.

Generated on Tue Jun 7 14:59:24 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBHID/usbdesc.h File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBHID/usbdesc.h File Reference

Go to the source code of this file.

Defines

#define | WBVAL(x) (x & 0xFF),((x >> 8) & 0xFF)
#define | USB_DEVICE_DESC_SIZE (sizeof(USB_DEVICE_DESCRIPTOR))
#define | USB_CONFIGUARTION_DESC_SIZE (sizeof(USB_CONFIGURATION_DESCRIPTOR))
#define | USB_INTERFACE_DESC_SIZE (sizeof(USB_INTERFACE_DESCRIPTOR))
#define | USB_ENDPOINT_DESC_SIZE (sizeof(USB_ENDPOINT_DESCRIPTOR))
#define | HID_DESC_OFFSET 0x0012
#define | HID_DESC_SIZE (sizeof(HID_DESCRIPTOR))
#define | HID_REPORT_DESC_SIZE (sizeof(HID_ReportDescriptor))

Variables

const uint8_t | USB_DeviceDescriptor []
const uint8_t | USB_ConfigDescriptor []
const uint8_t | USB_StringDescriptor []
const uint8_t | HID_ReportDescriptor []
const uint16_t | HID_ReportDescSize

Define Documentation

#define HID_DESC_OFFSET 0x0012

Definition at line 28 of file usbdesc.h.

#define HID_DESC_SIZE (sizeof(HID_DESCRIPTOR))

Definition at line 29 of file usbdesc.h.

#define HID_REPORT_DESC_SIZE (sizeof(HID_ReportDescriptor))

Definition at line 30 of file usbdesc.h.

#define USB_CONFIGUARTION_DESC_SIZE (sizeof(USB_CONFIGURATION_DESCRIPTOR))

Definition at line 24 of file usbdesc.h.

#define USB_DEVICE_DESC_SIZE (sizeof(USB_DEVICE_DESCRIPTOR))

Definition at line 23 of file usbdesc.h.

#define USB_ENDPOINT_DESC_SIZE (sizeof(USB_ENDPOINT_DESCRIPTOR))

Definition at line 26 of file usbdesc.h.

#define USB_INTERFACE_DESC_SIZE (sizeof(USB_INTERFACE_DESCRIPTOR))

Definition at line 25 of file usbdesc.h.

#define WBVAL ( x ) (x & 0xFF),((x >> 8) & 0xFF)

Definition at line 21 of file usbdesc.h.

Variable Documentation

const uint8_t HID_ReportDescriptor[]

Definition at line 28 of file usbdesc.c.

const uint16_t HID_ReportDescSize

Definition at line 53 of file usbdesc.c.

const uint8_t USB_ConfigDescriptor[]

Definition at line 50 of file usbdesc.c.

const uint8_t USB_DeviceDescriptor[]

Definition at line 31 of file usbdesc.c.

const uint8_t USB_StringDescriptor[]

Definition at line 185 of file usbdesc.c.

Generated on Tue Jun 7 14:59:25 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBHID/usbhw.c File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBHID/usbhw.c File Reference

#include "LPC17xx.h"
#include "lpc_types.h"
#include "usb.h"
#include "usbcfg.h"
#include "usbreg.h"
#include "usbhw.h"
#include "usbcore.h"
#include "usbuser.h"

Go to the source code of this file.

Defines

#define | EP_MSK_CTRL 0x0001
#define | EP_MSK_BULK 0xC924
#define | EP_MSK_INT 0x4492
#define | EP_MSK_ISO 0x1248

Functions

uint32_t | EPAdr (uint32_t EPNum)
void | WrCmd (uint32_t cmd)
void | WrCmdDat (uint32_t cmd, uint32_t val)
uint32_t | RdCmdDat (uint32_t cmd)
void | USB_Init (void)
void | USB_Connect (uint32_t con)
void | USB_Reset (void)
void | USB_Suspend (void)
void | USB_Resume (void)
void | USB_WakeUp (void)
void | USB_WakeUpCfg (uint32_t cfg)
void | USB_SetAddress (uint32_t adr)
void | USB_Configure (uint32_t cfg)
void | USB_ConfigEP (USB_ENDPOINT_DESCRIPTOR *pEPD)
void | USB_DirCtrlEP (uint32_t dir)
void | USB_EnableEP (uint32_t EPNum)
void | USB_DisableEP (uint32_t EPNum)
void | USB_ResetEP (uint32_t EPNum)
void | USB_SetStallEP (uint32_t EPNum)
void | USB_ClrStallEP (uint32_t EPNum)
uint32_t | USB_ReadEP (uint32_t EPNum, uint8_t *pData)
uint32_t | USB_WriteEP (uint32_t EPNum, uint8_t *pData, uint32_t cnt)
uint32_t | USB_DMA_Setup (uint32_t EPNum, USB_DMA_DESCRIPTOR *pDD)
void | USB_DMA_Enable (uint32_t EPNum)
void | USB_DMA_Disable (uint32_t EPNum)
uint32_t | USB_DMA_Status (uint32_t EPNum)
uint32_t | USB_DMA_BufAdr (uint32_t EPNum)
uint32_t | USB_DMA_BufCnt (uint32_t EPNum)
uint32_t | USB_GetFrame (void)
void | USB_IRQHandler (void)

Variables

const uint32_t | DDAdr [2] = { DD_NISO_ADR, DD_ISO_ADR }
const uint32_t | DDSz [2] = { 16, 20 }

Define Documentation

#define EP_MSK_BULK 0xC924

Definition at line 35 of file usbhw.c.

#define EP_MSK_CTRL 0x0001

Definition at line 34 of file usbhw.c.

#define EP_MSK_INT 0x4492

Definition at line 36 of file usbhw.c.

#define EP_MSK_ISO 0x1248

Definition at line 37 of file usbhw.c.

Function Documentation

uint32_t EPAdr ( uint32_t EPNum )

Definition at line 83 of file usbhw.c.

uint32_t RdCmdDat ( uint32_t cmd )

Definition at line 132 of file usbhw.c.

void USB_ClrStallEP ( uint32_t EPNum )

Definition at line 389 of file usbhw.c.

void USB_ConfigEP ( USB_ENDPOINT_DESCRIPTOR * pEPD )

Definition at line 306 of file usbhw.c.

void USB_Configure ( uint32_t cfg )

Definition at line 290 of file usbhw.c.

void USB_Connect ( uint32_t con )

Definition at line 177 of file usbhw.c.

void USB_DirCtrlEP ( uint32_t dir )

Definition at line 324 of file usbhw.c.

void USB_DisableEP ( uint32_t EPNum )

Definition at line 350 of file usbhw.c.

uint32_t USB_DMA_BufAdr ( uint32_t EPNum )

Definition at line 599 of file usbhw.c.

uint32_t USB_DMA_BufCnt ( uint32_t EPNum )

Definition at line 622 of file usbhw.c.

void USB_DMA_Disable ( uint32_t EPNum )

Definition at line 553 of file usbhw.c.

void USB_DMA_Enable ( uint32_t EPNum )

Definition at line 540 of file usbhw.c.

uint32_t USB_DMA_Setup | ( | uint32_t | EPNum,
 |  | USB_DMA_DESCRIPTOR * | pDD
 | ) |  |

Definition at line 471 of file usbhw.c.

uint32_t USB_DMA_Status ( uint32_t EPNum )

Definition at line 566 of file usbhw.c.

void USB_EnableEP ( uint32_t EPNum )

Definition at line 337 of file usbhw.c.

uint32_t USB_GetFrame ( void )

Definition at line 644 of file usbhw.c.

void USB_Init ( void )

Definition at line 147 of file usbhw.c.

void USB_IRQHandler ( void )

Definition at line 658 of file usbhw.c.

uint32_t USB_ReadEP | ( | uint32_t | EPNum,
 |  | uint8_t * | pData
 | ) |  |

Definition at line 403 of file usbhw.c.

void USB_Reset ( void )

Definition at line 188 of file usbhw.c.

void USB_ResetEP ( uint32_t EPNum )

Definition at line 363 of file usbhw.c.

void USB_Resume ( void )

Definition at line 242 of file usbhw.c.

void USB_SetAddress ( uint32_t adr )

Definition at line 278 of file usbhw.c.

void USB_SetStallEP ( uint32_t EPNum )

Definition at line 376 of file usbhw.c.

void USB_Suspend ( void )

Definition at line 231 of file usbhw.c.

void USB_WakeUp ( void )

Definition at line 253 of file usbhw.c.

void USB_WakeUpCfg ( uint32_t cfg )

Definition at line 267 of file usbhw.c.

uint32_t USB_WriteEP | ( | uint32_t | EPNum,
 |  | uint8_t * | pData,
 |  | uint32_t | cnt
 | ) |  |

Definition at line 437 of file usbhw.c.

void WrCmd ( uint32_t cmd )

Definition at line 100 of file usbhw.c.

void WrCmdDat | ( | uint32_t | cmd,
 |  | uint32_t | val
 | ) |  |

Definition at line 115 of file usbhw.c.

Variable Documentation

const uint32_t DDAdr[2] = { DD_NISO_ADR, DD_ISO_ADR }

Definition at line 460 of file usbhw.c.

const uint32_t DDSz[2] = { 16, 20 }

Definition at line 461 of file usbhw.c.

Generated on Tue Jun 7 14:59:25 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBHID/usbhw.h File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBHID/usbhw.h File Reference

Go to the source code of this file.

Data Structures

struct | _USB_DMA_DESCRIPTOR

Defines

#define | USB_RAM_ADR 0x20080000
#define | USB_RAM_SZ 0x00004000
#define | DD_NISO_CNT 16
#define | DD_ISO_CNT 8
#define | DD_NISO_SZ (DD_NISO_CNT * 16)
#define | DD_ISO_SZ (DD_ISO_CNT * 20)
#define | DD_NISO_ADR (USB_RAM_ADR + 128)
#define | DD_ISO_ADR (DD_NISO_ADR + DD_NISO_SZ)
#define | DD_SZ (128 + DD_NISO_SZ + DD_ISO_SZ)
#define | DMA_BUF_ADR (USB_RAM_ADR + DD_SZ)
#define | DMA_BUF_SZ (USB_RAM_SZ - DD_SZ)
#define | USB_ERR_PID 0x0001
#define | USB_ERR_UEPKT 0x0002
#define | USB_ERR_DCRC 0x0004
#define | USB_ERR_TIMOUT 0x0008
#define | USB_ERR_EOP 0x0010
#define | USB_ERR_B_OVRN 0x0020
#define | USB_ERR_BTSTF 0x0040
#define | USB_ERR_TGL 0x0080
#define | USB_DMA_INVALID 0x0000
#define | USB_DMA_IDLE 0x0001
#define | USB_DMA_BUSY 0x0002
#define | USB_DMA_DONE 0x0003
#define | USB_DMA_OVER_RUN 0x0004
#define | USB_DMA_UNDER_RUN 0x0005
#define | USB_DMA_ERROR 0x0006
#define | USB_DMA_UNKNOWN 0xFFFF

Typedefs

typedef struct _USB_DMA_DESCRIPTOR | USB_DMA_DESCRIPTOR

Functions

void | USB_Init (void)
void | USB_Connect (uint32_t con)
void | USB_Reset (void)
void | USB_Suspend (void)
void | USB_Resume (void)
void | USB_WakeUp (void)
void | USB_WakeUpCfg (uint32_t cfg)
void | USB_SetAddress (uint32_t adr)
void | USB_Configure (uint32_t cfg)
void | USB_ConfigEP (USB_ENDPOINT_DESCRIPTOR *pEPD)
void | USB_DirCtrlEP (uint32_t dir)
void | USB_EnableEP (uint32_t EPNum)
void | USB_DisableEP (uint32_t EPNum)
void | USB_ResetEP (uint32_t EPNum)
void | USB_SetStallEP (uint32_t EPNum)
void | USB_ClrStallEP (uint32_t EPNum)
uint32_t | USB_ReadEP (uint32_t EPNum, uint8_t *pData)
uint32_t | USB_WriteEP (uint32_t EPNum, uint8_t *pData, uint32_t cnt)
uint32_t | USB_DMA_Setup (uint32_t EPNum, USB_DMA_DESCRIPTOR *pDD)
void | USB_DMA_Enable (uint32_t EPNum)
void | USB_DMA_Disable (uint32_t EPNum)
uint32_t | USB_DMA_Status (uint32_t EPNum)
uint32_t | USB_DMA_BufAdr (uint32_t EPNum)
uint32_t | USB_DMA_BufCnt (uint32_t EPNum)
uint32_t | USB_GetFrame (void)
void | USB_IRQHandler (void)

Define Documentation

#define DD_ISO_ADR (DD_NISO_ADR + DD_NISO_SZ)

Definition at line 33 of file usbhw.h.

#define DD_ISO_CNT 8

Definition at line 29 of file usbhw.h.

#define DD_ISO_SZ (DD_ISO_CNT * 20)

Definition at line 31 of file usbhw.h.

#define DD_NISO_ADR (USB_RAM_ADR + 128)

Definition at line 32 of file usbhw.h.

#define DD_NISO_CNT 16

Definition at line 28 of file usbhw.h.

#define DD_NISO_SZ (DD_NISO_CNT * 16)

Definition at line 30 of file usbhw.h.

#define DD_SZ (128 + DD_NISO_SZ + DD_ISO_SZ)

Definition at line 34 of file usbhw.h.

#define DMA_BUF_ADR (USB_RAM_ADR + DD_SZ)

Definition at line 37 of file usbhw.h.

#define DMA_BUF_SZ (USB_RAM_SZ - DD_SZ)

Definition at line 38 of file usbhw.h.

#define USB_DMA_BUSY 0x0002

Definition at line 53 of file usbhw.h.

#define USB_DMA_DONE 0x0003

Definition at line 54 of file usbhw.h.

#define USB_DMA_ERROR 0x0006

Definition at line 57 of file usbhw.h.

#define USB_DMA_IDLE 0x0001

Definition at line 52 of file usbhw.h.

#define USB_DMA_INVALID 0x0000

Definition at line 51 of file usbhw.h.

#define USB_DMA_OVER_RUN 0x0004

Definition at line 55 of file usbhw.h.

#define USB_DMA_UNDER_RUN 0x0005

Definition at line 56 of file usbhw.h.

#define USB_DMA_UNKNOWN 0xFFFF

Definition at line 58 of file usbhw.h.

#define USB_ERR_B_OVRN 0x0020

Definition at line 46 of file usbhw.h.

#define USB_ERR_BTSTF 0x0040

Definition at line 47 of file usbhw.h.

#define USB_ERR_DCRC 0x0004

Definition at line 43 of file usbhw.h.

#define USB_ERR_EOP 0x0010

Definition at line 45 of file usbhw.h.

#define USB_ERR_PID 0x0001

Definition at line 41 of file usbhw.h.

#define USB_ERR_TGL 0x0080

Definition at line 48 of file usbhw.h.

#define USB_ERR_TIMOUT 0x0008

Definition at line 44 of file usbhw.h.

#define USB_ERR_UEPKT 0x0002

Definition at line 42 of file usbhw.h.

#define USB_RAM_ADR 0x20080000

Definition at line 24 of file usbhw.h.

#define USB_RAM_SZ 0x00004000

Definition at line 25 of file usbhw.h.

Typedef Documentation

typedef struct _USB_DMA_DESCRIPTOR USB_DMA_DESCRIPTOR

Function Documentation

void USB_ClrStallEP ( uint32_t EPNum )

Definition at line 390 of file usbhw.c.

void USB_ConfigEP ( USB_ENDPOINT_DESCRIPTOR * pEPD )

Definition at line 307 of file usbhw.c.

void USB_Configure ( uint32_t cfg )

Definition at line 291 of file usbhw.c.

void USB_Connect ( uint32_t con )

Definition at line 178 of file usbhw.c.

void USB_DirCtrlEP ( uint32_t dir )

Definition at line 325 of file usbhw.c.

void USB_DisableEP ( uint32_t EPNum )

Definition at line 351 of file usbhw.c.

uint32_t USB_DMA_BufAdr ( uint32_t EPNum )

Definition at line 599 of file usbhw.c.

uint32_t USB_DMA_BufCnt ( uint32_t EPNum )

Definition at line 622 of file usbhw.c.

void USB_DMA_Disable ( uint32_t EPNum )

Definition at line 553 of file usbhw.c.

void USB_DMA_Enable ( uint32_t EPNum )

Definition at line 540 of file usbhw.c.

uint32_t USB_DMA_Setup | ( | uint32_t | EPNum,
 |  | USB_DMA_DESCRIPTOR * | pDD
 | ) |  |

Definition at line 471 of file usbhw.c.

uint32_t USB_DMA_Status ( uint32_t EPNum )

Definition at line 566 of file usbhw.c.

void USB_EnableEP ( uint32_t EPNum )

Definition at line 338 of file usbhw.c.

uint32_t USB_GetFrame ( void )

Definition at line 647 of file usbhw.c.

void USB_Init ( void )

Definition at line 148 of file usbhw.c.

void USB_IRQHandler ( void )

Definition at line 662 of file usbhw.c.

uint32_t USB_ReadEP | ( | uint32_t | EPNum,
 |  | uint8_t * | pData
 | ) |  |

Definition at line 417 of file usbhw.c.

void USB_Reset ( void )

Definition at line 189 of file usbhw.c.

void USB_ResetEP ( uint32_t EPNum )

Definition at line 364 of file usbhw.c.

void USB_Resume ( void )

Definition at line 243 of file usbhw.c.

void USB_SetAddress ( uint32_t adr )

Definition at line 279 of file usbhw.c.

void USB_SetStallEP ( uint32_t EPNum )

Definition at line 377 of file usbhw.c.

void USB_Suspend ( void )

Definition at line 232 of file usbhw.c.

void USB_WakeUp ( void )

Definition at line 254 of file usbhw.c.

void USB_WakeUpCfg ( uint32_t cfg )

Definition at line 268 of file usbhw.c.

uint32_t USB_WriteEP | ( | uint32_t | EPNum,
 |  | uint8_t * | pData,
 |  | uint32_t | cnt
 | ) |  |

Definition at line 450 of file usbhw.c.

Generated on Tue Jun 7 14:59:26 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBHID/usbreg.h File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBHID/usbreg.h File Reference

Go to the source code of this file.

Defines

#define | FRAME_INT 0x00000001
#define | EP_FAST_INT 0x00000002
#define | EP_SLOW_INT 0x00000004
#define | DEV_STAT_INT 0x00000008
#define | CCEMTY_INT 0x00000010
#define | CDFULL_INT 0x00000020
#define | RxENDPKT_INT 0x00000040
#define | TxENDPKT_INT 0x00000080
#define | EP_RLZED_INT 0x00000100
#define | ERR_INT 0x00000200
#define | PKT_LNGTH_MASK 0x000003FF
#define | PKT_DV 0x00000400
#define | PKT_RDY 0x00000800
#define | CTRL_RD_EN 0x00000001
#define | CTRL_WR_EN 0x00000002
#define | CMD_SET_ADDR 0x00D00500
#define | CMD_CFG_DEV 0x00D80500
#define | CMD_SET_MODE 0x00F30500
#define | CMD_RD_FRAME 0x00F50500
#define | DAT_RD_FRAME 0x00F50200
#define | CMD_RD_TEST 0x00FD0500
#define | DAT_RD_TEST 0x00FD0200
#define | CMD_SET_DEV_STAT 0x00FE0500
#define | CMD_GET_DEV_STAT 0x00FE0500
#define | DAT_GET_DEV_STAT 0x00FE0200
#define | CMD_GET_ERR_CODE 0x00FF0500
#define | DAT_GET_ERR_CODE 0x00FF0200
#define | CMD_RD_ERR_STAT 0x00FB0500
#define | DAT_RD_ERR_STAT 0x00FB0200
#define | DAT_WR_BYTE(x) (0x00000100 | ((x) << 16))
#define | CMD_SEL_EP(x) (0x00000500 | ((x) << 16))
#define | DAT_SEL_EP(x) (0x00000200 | ((x) << 16))
#define | CMD_SEL_EP_CLRI(x) (0x00400500 | ((x) << 16))
#define | DAT_SEL_EP_CLRI(x) (0x00400200 | ((x) << 16))
#define | CMD_SET_EP_STAT(x) (0x00400500 | ((x) << 16))
#define | CMD_CLR_BUF 0x00F20500
#define | DAT_CLR_BUF 0x00F20200
#define | CMD_VALID_BUF 0x00FA0500
#define | DEV_ADDR_MASK 0x7F
#define | DEV_EN 0x80
#define | CONF_DVICE 0x01
#define | AP_CLK 0x01
#define | INAK_CI 0x02
#define | INAK_CO 0x04
#define | INAK_II 0x08
#define | INAK_IO 0x10
#define | INAK_BI 0x20
#define | INAK_BO 0x40
#define | DEV_CON 0x01
#define | DEV_CON_CH 0x02
#define | DEV_SUS 0x04
#define | DEV_SUS_CH 0x08
#define | DEV_RST 0x10
#define | ERR_EC_MASK 0x0F
#define | ERR_EA 0x10
#define | ERR_PID 0x01
#define | ERR_UEPKT 0x02
#define | ERR_DCRC 0x04
#define | ERR_TIMOUT 0x08
#define | ERR_EOP 0x10
#define | ERR_B_OVRN 0x20
#define | ERR_BTSTF 0x40
#define | ERR_TGL 0x80
#define | EP_SEL_F 0x01
#define | EP_SEL_ST 0x02
#define | EP_SEL_STP 0x04
#define | EP_SEL_PO 0x08
#define | EP_SEL_EPN 0x10
#define | EP_SEL_B_1_FULL 0x20
#define | EP_SEL_B_2_FULL 0x40
#define | EP_STAT_ST 0x01
#define | EP_STAT_DA 0x20
#define | EP_STAT_RF_MO 0x40
#define | EP_STAT_CND_ST 0x80
#define | CLR_BUF_PO 0x01
#define | EOT_INT 0x01
#define | NDD_REQ_INT 0x02
#define | SYS_ERR_INT 0x04

Define Documentation

#define AP_CLK 0x01

Definition at line 77 of file usbreg.h.

#define CCEMTY_INT 0x00000010

Definition at line 28 of file usbreg.h.

#define CDFULL_INT 0x00000020

Definition at line 29 of file usbreg.h.

#define CLR_BUF_PO 0x01

Definition at line 122 of file usbreg.h.

#define CMD_CFG_DEV 0x00D80500

Definition at line 46 of file usbreg.h.

#define CMD_CLR_BUF 0x00F20500

Definition at line 65 of file usbreg.h.

#define CMD_GET_DEV_STAT 0x00FE0500

Definition at line 53 of file usbreg.h.

#define CMD_GET_ERR_CODE 0x00FF0500

Definition at line 55 of file usbreg.h.

#define CMD_RD_ERR_STAT 0x00FB0500

Definition at line 57 of file usbreg.h.

#define CMD_RD_FRAME 0x00F50500

Definition at line 48 of file usbreg.h.

#define CMD_RD_TEST 0x00FD0500

Definition at line 50 of file usbreg.h.

#define CMD_SEL_EP ( x ) (0x00000500 | ((x) << 16))

Definition at line 60 of file usbreg.h.

#define CMD_SEL_EP_CLRI ( x ) (0x00400500 | ((x) << 16))

Definition at line 62 of file usbreg.h.

#define CMD_SET_ADDR 0x00D00500

Definition at line 45 of file usbreg.h.

#define CMD_SET_DEV_STAT 0x00FE0500

Definition at line 52 of file usbreg.h.

#define CMD_SET_EP_STAT ( x ) (0x00400500 | ((x) << 16))

Definition at line 64 of file usbreg.h.

#define CMD_SET_MODE 0x00F30500

Definition at line 47 of file usbreg.h.

#define CMD_VALID_BUF 0x00FA0500

Definition at line 67 of file usbreg.h.

#define CONF_DVICE 0x01

Definition at line 74 of file usbreg.h.

#define CTRL_RD_EN 0x00000001

Definition at line 41 of file usbreg.h.

#define CTRL_WR_EN 0x00000002

Definition at line 42 of file usbreg.h.

#define DAT_CLR_BUF 0x00F20200

Definition at line 66 of file usbreg.h.

#define DAT_GET_DEV_STAT 0x00FE0200

Definition at line 54 of file usbreg.h.

#define DAT_GET_ERR_CODE 0x00FF0200

Definition at line 56 of file usbreg.h.

#define DAT_RD_ERR_STAT 0x00FB0200

Definition at line 58 of file usbreg.h.

#define DAT_RD_FRAME 0x00F50200

Definition at line 49 of file usbreg.h.

#define DAT_RD_TEST 0x00FD0200

Definition at line 51 of file usbreg.h.

#define DAT_SEL_EP ( x ) (0x00000200 | ((x) << 16))

Definition at line 61 of file usbreg.h.

#define DAT_SEL_EP_CLRI ( x ) (0x00400200 | ((x) << 16))

Definition at line 63 of file usbreg.h.

#define DAT_WR_BYTE ( x ) (0x00000100 | ((x) << 16))

Definition at line 59 of file usbreg.h.

#define DEV_ADDR_MASK 0x7F

Definition at line 70 of file usbreg.h.

#define DEV_CON 0x01

Definition at line 86 of file usbreg.h.

#define DEV_CON_CH 0x02

Definition at line 87 of file usbreg.h.

#define DEV_EN 0x80

Definition at line 71 of file usbreg.h.

#define DEV_RST 0x10

Definition at line 90 of file usbreg.h.

#define DEV_STAT_INT 0x00000008

Definition at line 27 of file usbreg.h.

#define DEV_SUS 0x04

Definition at line 88 of file usbreg.h.

#define DEV_SUS_CH 0x08

Definition at line 89 of file usbreg.h.

#define EOT_INT 0x01

Definition at line 126 of file usbreg.h.

#define EP_FAST_INT 0x00000002

Definition at line 25 of file usbreg.h.

#define EP_RLZED_INT 0x00000100

Definition at line 32 of file usbreg.h.

#define EP_SEL_B_1_FULL 0x20

Definition at line 112 of file usbreg.h.

#define EP_SEL_B_2_FULL 0x40

Definition at line 113 of file usbreg.h.

#define EP_SEL_EPN 0x10

Definition at line 111 of file usbreg.h.

#define EP_SEL_F 0x01

Definition at line 107 of file usbreg.h.

#define EP_SEL_PO 0x08

Definition at line 110 of file usbreg.h.

#define EP_SEL_ST 0x02

Definition at line 108 of file usbreg.h.

#define EP_SEL_STP 0x04

Definition at line 109 of file usbreg.h.

#define EP_SLOW_INT 0x00000004

Definition at line 26 of file usbreg.h.

#define EP_STAT_CND_ST 0x80

Definition at line 119 of file usbreg.h.

#define EP_STAT_DA 0x20

Definition at line 117 of file usbreg.h.

#define EP_STAT_RF_MO 0x40

Definition at line 118 of file usbreg.h.

#define EP_STAT_ST 0x01

Definition at line 116 of file usbreg.h.

#define ERR_B_OVRN 0x20

Definition at line 102 of file usbreg.h.

#define ERR_BTSTF 0x40

Definition at line 103 of file usbreg.h.

#define ERR_DCRC 0x04

Definition at line 99 of file usbreg.h.

#define ERR_EA 0x10

Definition at line 94 of file usbreg.h.

#define ERR_EC_MASK 0x0F

Definition at line 93 of file usbreg.h.

#define ERR_EOP 0x10

Definition at line 101 of file usbreg.h.

#define ERR_INT 0x00000200

Definition at line 33 of file usbreg.h.

#define ERR_PID 0x01

Definition at line 97 of file usbreg.h.

#define ERR_TGL 0x80

Definition at line 104 of file usbreg.h.

#define ERR_TIMOUT 0x08

Definition at line 100 of file usbreg.h.

#define ERR_UEPKT 0x02

Definition at line 98 of file usbreg.h.

#define FRAME_INT 0x00000001

Definition at line 24 of file usbreg.h.

#define INAK_BI 0x20

Definition at line 82 of file usbreg.h.

#define INAK_BO 0x40

Definition at line 83 of file usbreg.h.

#define INAK_CI 0x02

Definition at line 78 of file usbreg.h.

#define INAK_CO 0x04

Definition at line 79 of file usbreg.h.

#define INAK_II 0x08

Definition at line 80 of file usbreg.h.

#define INAK_IO 0x10

Definition at line 81 of file usbreg.h.

#define NDD_REQ_INT 0x02

Definition at line 127 of file usbreg.h.

#define PKT_DV 0x00000400

Definition at line 37 of file usbreg.h.

#define PKT_LNGTH_MASK 0x000003FF

Definition at line 36 of file usbreg.h.

#define PKT_RDY 0x00000800

Definition at line 38 of file usbreg.h.

#define RxENDPKT_INT 0x00000040

Definition at line 30 of file usbreg.h.

#define SYS_ERR_INT 0x04

Definition at line 128 of file usbreg.h.

#define TxENDPKT_INT 0x00000080

Definition at line 31 of file usbreg.h.

Generated on Tue Jun 7 14:59:28 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBHID/usbuser.c File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBHID/usbuser.c File Reference

#include "LPC17xx.h"
#include "lpc_types.h"
#include "usb.h"
#include "usbcfg.h"
#include "usbhw.h"
#include "usbcore.h"
#include "usbuser.h"
#include "demo.h"

Go to the source code of this file.

Defines

#define | P_EP(n) ((USB_EP_EVENT & (1 << (n))) ? USB_EndPoint##n : NULL)

Functions

void | USB_Reset_Event (void)
void | USB_Configure_Event (void)
void | USB_EndPoint1 (uint32_t event)
void | USB_EndPoint2 (uint32_t event)
void | USB_EndPoint3 (uint32_t event)
void | USB_EndPoint4 (uint32_t event)
void | USB_EndPoint5 (uint32_t event)
void | USB_EndPoint6 (uint32_t event)
void | USB_EndPoint7 (uint32_t event)
void | USB_EndPoint8 (uint32_t event)
void | USB_EndPoint9 (uint32_t event)
void | USB_EndPoint10 (uint32_t event)
void | USB_EndPoint11 (uint32_t event)
void | USB_EndPoint12 (uint32_t event)
void | USB_EndPoint13 (uint32_t event)
void | USB_EndPoint14 (uint32_t event)
void | USB_EndPoint15 (uint32_t event)

Variables

void(*const | USB_P_EP [16])(uint32_t event)

Define Documentation

#define P_EP ( n ) ((USB_EP_EVENT & (1 << (n))) ? USB_EndPoint##n : NULL)

Definition at line 149 of file usbuser.c.

Function Documentation

void USB_Configure_Event ( void )

Definition at line 117 of file usbuser.c.

void USB_EndPoint1 ( uint32_t event )

Definition at line 178 of file usbuser.c.

void USB_EndPoint10 ( uint32_t event )

Definition at line 287 of file usbuser.c.

void USB_EndPoint11 ( uint32_t event )

Definition at line 297 of file usbuser.c.

void USB_EndPoint12 ( uint32_t event )

Definition at line 307 of file usbuser.c.

void USB_EndPoint13 ( uint32_t event )

Definition at line 317 of file usbuser.c.

void USB_EndPoint14 ( uint32_t event )

Definition at line 327 of file usbuser.c.

void USB_EndPoint15 ( uint32_t event )

Definition at line 337 of file usbuser.c.

void USB_EndPoint2 ( uint32_t event )

Definition at line 195 of file usbuser.c.

void USB_EndPoint3 ( uint32_t event )

Definition at line 211 of file usbuser.c.

void USB_EndPoint4 ( uint32_t event )

Definition at line 227 of file usbuser.c.

void USB_EndPoint5 ( uint32_t event )

Definition at line 237 of file usbuser.c.

void USB_EndPoint6 ( uint32_t event )

Definition at line 247 of file usbuser.c.

void USB_EndPoint7 ( uint32_t event )

Definition at line 257 of file usbuser.c.

void USB_EndPoint8 ( uint32_t event )

Definition at line 267 of file usbuser.c.

void USB_EndPoint9 ( uint32_t event )

Definition at line 277 of file usbuser.c.

void USB_Reset_Event ( void )

Definition at line 49 of file usbuser.c.

Variable Documentation

void(* const USB_P_EP[16])(uint32_t event)

Initial value:

 {
  P_EP(0),
  P_EP(1),
  P_EP(2),
  P_EP(3),
  P_EP(4),
  P_EP(5),
  P_EP(6),
  P_EP(7),
  P_EP(8),
  P_EP(9),
  P_EP(10),
  P_EP(11),
  P_EP(12),
  P_EP(13),
  P_EP(14),
  P_EP(15),
}

Generated on Tue Jun 7 14:59:29 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBHID/usbuser.h File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBHID/usbuser.h File Reference

Go to the source code of this file.

Defines

#define | USB_EVT_SETUP 1
#define | USB_EVT_OUT 2
#define | USB_EVT_IN 3
#define | USB_EVT_OUT_NAK 4
#define | USB_EVT_IN_NAK 5
#define | USB_EVT_OUT_STALL 6
#define | USB_EVT_IN_STALL 7
#define | USB_EVT_OUT_DMA_EOT 8
#define | USB_EVT_IN_DMA_EOT 9
#define | USB_EVT_OUT_DMA_NDR 10
#define | USB_EVT_IN_DMA_NDR 11
#define | USB_EVT_OUT_DMA_ERR 12
#define | USB_EVT_IN_DMA_ERR 13

Functions

void | USB_Power_Event (uint32_t power)
void | USB_Reset_Event (void)
void | USB_Suspend_Event (void)
void | USB_Resume_Event (void)
void | USB_WakeUp_Event (void)
void | USB_SOF_Event (void)
void | USB_Error_Event (uint32_t error)
void | USB_EndPoint0 (uint32_t event)
void | USB_EndPoint1 (uint32_t event)
void | USB_EndPoint2 (uint32_t event)
void | USB_EndPoint3 (uint32_t event)
void | USB_EndPoint4 (uint32_t event)
void | USB_EndPoint5 (uint32_t event)
void | USB_EndPoint6 (uint32_t event)
void | USB_EndPoint7 (uint32_t event)
void | USB_EndPoint8 (uint32_t event)
void | USB_EndPoint9 (uint32_t event)
void | USB_EndPoint10 (uint32_t event)
void | USB_EndPoint11 (uint32_t event)
void | USB_EndPoint12 (uint32_t event)
void | USB_EndPoint13 (uint32_t event)
void | USB_EndPoint14 (uint32_t event)
void | USB_EndPoint15 (uint32_t event)
void | USB_Configure_Event (void)
void | USB_Interface_Event (void)
void | USB_Feature_Event (void)

Variables

void(*const | USB_P_EP [16])(uint32_t event)

Define Documentation

#define USB_EVT_IN 3

Definition at line 35 of file usbuser.h.

#define USB_EVT_IN_DMA_EOT 9

Definition at line 41 of file usbuser.h.

#define USB_EVT_IN_DMA_ERR 13

Definition at line 45 of file usbuser.h.

#define USB_EVT_IN_DMA_NDR 11

Definition at line 43 of file usbuser.h.

#define USB_EVT_IN_NAK 5

Definition at line 37 of file usbuser.h.

#define USB_EVT_IN_STALL 7

Definition at line 39 of file usbuser.h.

#define USB_EVT_OUT 2

Definition at line 34 of file usbuser.h.

#define USB_EVT_OUT_DMA_EOT 8

Definition at line 40 of file usbuser.h.

#define USB_EVT_OUT_DMA_ERR 12

Definition at line 44 of file usbuser.h.

#define USB_EVT_OUT_DMA_NDR 10

Definition at line 42 of file usbuser.h.

#define USB_EVT_OUT_NAK 4

Definition at line 36 of file usbuser.h.

#define USB_EVT_OUT_STALL 6

Definition at line 38 of file usbuser.h.

#define USB_EVT_SETUP 1

Definition at line 33 of file usbuser.h.

Function Documentation

void USB_Configure_Event ( void )

Definition at line 114 of file usbuser.c.

void USB_EndPoint0 ( uint32_t event )

Definition at line 600 of file usbcore.c.

void USB_EndPoint1 ( uint32_t event )

Definition at line 190 of file usbuser.c.

void USB_EndPoint10 ( uint32_t event )

Definition at line 311 of file usbuser.c.

void USB_EndPoint11 ( uint32_t event )

Definition at line 321 of file usbuser.c.

void USB_EndPoint12 ( uint32_t event )

Definition at line 331 of file usbuser.c.

void USB_EndPoint13 ( uint32_t event )

Definition at line 341 of file usbuser.c.

void USB_EndPoint14 ( uint32_t event )

Definition at line 351 of file usbuser.c.

void USB_EndPoint15 ( uint32_t event )

Definition at line 361 of file usbuser.c.

void USB_EndPoint2 ( uint32_t event )

Definition at line 200 of file usbuser.c.

void USB_EndPoint3 ( uint32_t event )

Definition at line 209 of file usbuser.c.

void USB_EndPoint4 ( uint32_t event )

Definition at line 251 of file usbuser.c.

void USB_EndPoint5 ( uint32_t event )

Definition at line 261 of file usbuser.c.

void USB_EndPoint6 ( uint32_t event )

Definition at line 271 of file usbuser.c.

void USB_EndPoint7 ( uint32_t event )

Definition at line 281 of file usbuser.c.

void USB_EndPoint8 ( uint32_t event )

Definition at line 291 of file usbuser.c.

void USB_EndPoint9 ( uint32_t event )

Definition at line 301 of file usbuser.c.

void USB_Error_Event ( uint32_t error )

void USB_Feature_Event ( void )

void USB_Interface_Event ( void )

void USB_Power_Event ( uint32_t power )

void USB_Reset_Event ( void )

Definition at line 48 of file usbuser.c.

void USB_Resume_Event ( void )

void USB_SOF_Event ( void )

Definition at line 93 of file usbuser.c.

void USB_Suspend_Event ( void )

void USB_WakeUp_Event ( void )

Variable Documentation

void(* const USB_P_EP[16])(uint32_t event)

Generated on Tue Jun 7 14:59:30 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBMassStorage/DiskImg.c File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBMassStorage/DiskImg.c File Reference

#include "lpc_types.h"
#include "memory.h"

Go to the source code of this file.

Variables

const unsigned char DiskImage [MSC_ImageSize]

Variable Documentation

const unsigned char DiskImage[MSC_ImageSize]

Definition at line 6 of file DiskImg.c.

Generated on Tue Jun 7 14:59:31 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBMassStorage/lpc17xx_libcfg.h File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBMassStorage/lpc17xx_libcfg.h File Reference

#include "lpc_types.h"

Go to the source code of this file.

Defines

#define | DEBUG
#define | CHECK_PARAM(expr) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))

Functions

void | check_failed (uint8_t *file, uint32_t line)

Define Documentation

#define CHECK_PARAM ( expr ) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))

Definition at line 135 of file lpc17xx_libcfg.h.

#define DEBUG

Definition at line 36 of file lpc17xx_libcfg.h.

Generated on Tue Jun 7 14:59:11 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBMassStorage/memory.c File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBMassStorage/memory.c File Reference

#include "LPC17xx.h"
#include "lpc_types.h"
#include "usb.h"
#include "usbcfg.h"
#include "usbhw.h"
#include "usbcore.h"
#include "mscuser.h"
#include "memory.h"
#include "lpc17xx_libcfg.h"
#include "lpc17xx_nvic.h"

Go to the source code of this file.

Functions

int | main (void)
void | check_failed (uint8_t *file, uint32_t line)

Variables

uint8_t | Memory [MSC_MemorySize]

Generated on Tue Jun 7 14:59:31 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBMassStorage/memory.h File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBMassStorage/memory.h File Reference

Go to the source code of this file.

Defines

#define | CCLK 60000000
#define | LED_MSK 0x00FF0000
#define | LED_RD 0x00010000
#define | LED_WR 0x00020000
#define | LED_CFG 0x00400000
#define | LED_SUSP 0x00800000
#define | MSC_ImageSize 0x00001000

Variables

const unsigned char | DiskImage [MSC_ImageSize]

Define Documentation

#define CCLK 60000000

Definition at line 14 of file memory.h.

#define LED_CFG 0x00400000

Definition at line 20 of file memory.h.

#define LED_MSK 0x00FF0000

Definition at line 17 of file memory.h.

#define LED_RD 0x00010000

Definition at line 18 of file memory.h.

#define LED_SUSP 0x00800000

Definition at line 21 of file memory.h.

#define LED_WR 0x00020000

Definition at line 19 of file memory.h.

#define MSC_ImageSize 0x00001000

Definition at line 24 of file memory.h.

Variable Documentation

const unsigned char DiskImage[MSC_ImageSize]

Definition at line 6 of file DiskImg.c.

Generated on Tue Jun 7 14:59:31 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBMassStorage/msc.h File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBMassStorage/msc.h File Reference

Go to the source code of this file.

Defines

#define | MSC_SUBCLASS_RBC 0x01
#define | MSC_SUBCLASS_SFF8020I_MMC2 0x02
#define | MSC_SUBCLASS_QIC157 0x03
#define | MSC_SUBCLASS_UFI 0x04
#define | MSC_SUBCLASS_SFF8070I 0x05
#define | MSC_SUBCLASS_SCSI 0x06
#define | MSC_PROTOCOL_CBI_INT 0x00
#define | MSC_PROTOCOL_CBI_NOINT 0x01
#define | MSC_PROTOCOL_BULK_ONLY 0x50
#define | MSC_REQUEST_RESET 0xFF
#define | MSC_REQUEST_GET_MAX_LUN 0xFE
#define | MSC_BS_CBW 0
#define | MSC_BS_DATA_OUT 1
#define | MSC_BS_DATA_IN 2
#define | MSC_BS_DATA_IN_LAST 3
#define | MSC_BS_DATA_IN_LAST_STALL 4
#define | MSC_BS_CSW 5
#define | MSC_BS_ERROR 6
#define | MSC_CBW_Signature 0x43425355
#define | MSC_CSW_Signature 0x53425355
#define | CSW_CMD_PASSED 0x00
#define | CSW_CMD_FAILED 0x01
#define | CSW_PHASE_ERROR 0x02
#define | SCSI_TEST_UNIT_READY 0x00
#define | SCSI_REQUEST_SENSE 0x03
#define | SCSI_FORMAT_UNIT 0x04
#define | SCSI_INQUIRY 0x12
#define | SCSI_MODE_SELECT6 0x15
#define | SCSI_MODE_SENSE6 0x1A
#define | SCSI_START_STOP_UNIT 0x1B
#define | SCSI_MEDIA_REMOVAL 0x1E
#define | SCSI_READ_FORMAT_CAPACITIES 0x23
#define | SCSI_READ_CAPACITY 0x25
#define | SCSI_READ10 0x28
#define | SCSI_WRITE10 0x2A
#define | SCSI_VERIFY10 0x2F
#define | SCSI_MODE_SELECT10 0x55
#define | SCSI_MODE_SENSE10 0x5A

Variables

uint32_t | dSignature
uint32_t | dTag
uint32_t | dDataLength
uint8_t | bmFlags
uint8_t | bLUN
uint8_t | bCBLength
uint8_t | CB [16]
MSC_CBW
uint32_t | dDataResidue
uint8_t | bStatus
MSC_CSW

Define Documentation

#define CSW_CMD_FAILED 0x01

Definition at line 94 of file msc.h.

#define CSW_CMD_PASSED 0x00

Definition at line 93 of file msc.h.

#define CSW_PHASE_ERROR 0x02

Definition at line 95 of file msc.h.

#define MSC_BS_CBW 0

Definition at line 48 of file msc.h.

#define MSC_BS_CSW 5

Definition at line 53 of file msc.h.

#define MSC_BS_DATA_IN 2

Definition at line 50 of file msc.h.

#define MSC_BS_DATA_IN_LAST 3

Definition at line 51 of file msc.h.

#define MSC_BS_DATA_IN_LAST_STALL 4

Definition at line 52 of file msc.h.

#define MSC_BS_DATA_OUT 1

Definition at line 49 of file msc.h.

#define MSC_BS_ERROR 6

Definition at line 54 of file msc.h.

#define MSC_CBW_Signature 0x43425355

Definition at line 88 of file msc.h.

#define MSC_CSW_Signature 0x53425355

Definition at line 89 of file msc.h.

#define MSC_PROTOCOL_BULK_ONLY 0x50

Definition at line 39 of file msc.h.

#define MSC_PROTOCOL_CBI_INT 0x00

Definition at line 37 of file msc.h.

#define MSC_PROTOCOL_CBI_NOINT 0x01

Definition at line 38 of file msc.h.

#define MSC_REQUEST_GET_MAX_LUN 0xFE

Definition at line 44 of file msc.h.

#define MSC_REQUEST_RESET 0xFF

Definition at line 43 of file msc.h.

#define MSC_SUBCLASS_QIC157 0x03

Definition at line 31 of file msc.h.

#define MSC_SUBCLASS_RBC 0x01

Definition at line 29 of file msc.h.

#define MSC_SUBCLASS_SCSI 0x06

Definition at line 34 of file msc.h.

#define MSC_SUBCLASS_SFF8020I_MMC2 0x02

Definition at line 30 of file msc.h.

#define MSC_SUBCLASS_SFF8070I 0x05

Definition at line 33 of file msc.h.

#define MSC_SUBCLASS_UFI 0x04

Definition at line 32 of file msc.h.

#define SCSI_FORMAT_UNIT 0x04

Definition at line 101 of file msc.h.

#define SCSI_INQUIRY 0x12

Definition at line 102 of file msc.h.

#define SCSI_MEDIA_REMOVAL 0x1E

Definition at line 106 of file msc.h.

#define SCSI_MODE_SELECT10 0x55

Definition at line 112 of file msc.h.

#define SCSI_MODE_SELECT6 0x15

Definition at line 103 of file msc.h.

#define SCSI_MODE_SENSE10 0x5A

Definition at line 113 of file msc.h.

#define SCSI_MODE_SENSE6 0x1A

Definition at line 104 of file msc.h.

#define SCSI_READ10 0x28

Definition at line 109 of file msc.h.

#define SCSI_READ_CAPACITY 0x25

Definition at line 108 of file msc.h.

#define SCSI_READ_FORMAT_CAPACITIES 0x23

Definition at line 107 of file msc.h.

#define SCSI_REQUEST_SENSE 0x03

Definition at line 100 of file msc.h.

#define SCSI_START_STOP_UNIT 0x1B

Definition at line 105 of file msc.h.

#define SCSI_TEST_UNIT_READY 0x00

Definition at line 99 of file msc.h.

#define SCSI_VERIFY10 0x2F

Definition at line 111 of file msc.h.

#define SCSI_WRITE10 0x2A

Definition at line 110 of file msc.h.

Variable Documentation

uint8_t bCBLength

Definition at line 70 of file msc.h.

uint8_t bLUN

Definition at line 69 of file msc.h.

uint8_t bmFlags

Definition at line 68 of file msc.h.

uint8_t bStatus

Definition at line 85 of file msc.h.

uint8_t CB[16]

Definition at line 71 of file msc.h.

uint32_t dDataLength

Definition at line 67 of file msc.h.

uint32_t dDataResidue

Definition at line 84 of file msc.h.

uint32_t dSignature

Definition at line 65 of file msc.h.

uint32_t dTag

Definition at line 66 of file msc.h.

MSC_CBW

Definition at line 72 of file msc.h.

MSC_CSW

Definition at line 86 of file msc.h.

Generated on Tue Jun 7 14:59:31 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBMassStorage/mscuser.c File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBMassStorage/mscuser.c File Reference

#include "LPC17xx.h"
#include "lpc_types.h"
#include "usb.h"
#include "msc.h"
#include "usbcfg.h"
#include "usbhw.h"
#include "usbcore.h"
#include "mscuser.h"
#include "memory.h"

Go to the source code of this file.

Functions

uint32_t | MSC_Reset (void)
uint32_t | MSC_GetMaxLUN (void)
void | MSC_MemoryRead (void)
void | MSC_MemoryWrite (void)
void | MSC_MemoryVerify (void)
uint32_t | MSC_RWSetup (void)
uint32_t | DataInFormat (void)
void | DataInTransfer (void)
void | MSC_TestUnitReady (void)
void | MSC_RequestSense (void)
void | MSC_Inquiry (void)
void | MSC_ModeSense6 (void)
void | MSC_ModeSense10 (void)
void | MSC_ReadCapacity (void)
void | MSC_ReadFormatCapacity (void)
void | MSC_GetCBW (void)
void | MSC_SetCSW (void)
void | MSC_BulkIn (void)
void | MSC_BulkOut (void)

Variables

uint8_t | Memory [MSC_MemorySize]
uint32_t | MemOK
uint32_t | Offset
uint32_t | Length
uint8_t | BulkStage
uint8_t | BulkBuf [MSC_MAX_PACKET]
uint8_t | BulkLen
MSC_CBW CBW
MSC_CSW CSW

Function Documentation

uint32_t DataInFormat ( void )

Definition at line 222 of file mscuser.c.

void DataInTransfer ( void )

Definition at line 245 of file mscuser.c.

void MSC_BulkIn ( void )

Definition at line 593 of file mscuser.c.

void MSC_BulkOut ( void )

Definition at line 623 of file mscuser.c.

void MSC_GetCBW ( void )

Definition at line 479 of file mscuser.c.

uint32_t MSC_GetMaxLUN ( void )

Definition at line 70 of file mscuser.c.

void MSC_Inquiry ( void )

Definition at line 320 of file mscuser.c.

void MSC_MemoryRead ( void )

Definition at line 84 of file mscuser.c.

void MSC_MemoryVerify ( void )

Definition at line 153 of file mscuser.c.

void MSC_MemoryWrite ( void )

Definition at line 121 of file mscuser.c.

void MSC_ModeSense10 ( void )

Definition at line 396 of file mscuser.c.

void MSC_ModeSense6 ( void )

Definition at line 376 of file mscuser.c.

void MSC_ReadCapacity ( void )

Definition at line 420 of file mscuser.c.

void MSC_ReadFormatCapacity ( void )

Definition at line 447 of file mscuser.c.

void MSC_RequestSense ( void )

Definition at line 286 of file mscuser.c.

uint32_t MSC_Reset ( void )

Definition at line 56 of file mscuser.c.

uint32_t MSC_RWSetup ( void )

Definition at line 187 of file mscuser.c.

void MSC_SetCSW ( void )

Definition at line 579 of file mscuser.c.

void MSC_TestUnitReady ( void )

Definition at line 265 of file mscuser.c.

Variable Documentation

uint8_t BulkBuf[MSC_MAX_PACKET]

Definition at line 42 of file mscuser.c.

uint8_t BulkLen

Definition at line 43 of file mscuser.c.

uint8_t BulkStage

Definition at line 40 of file mscuser.c.

MSC_CBW CBW

Definition at line 45 of file mscuser.c.

MSC_CSW CSW

Definition at line 46 of file mscuser.c.

uint32_t Length

Definition at line 38 of file mscuser.c.

uint32_t MemOK

Definition at line 35 of file mscuser.c.

uint32_t Offset

Definition at line 37 of file mscuser.c.

Generated on Tue Jun 7 14:59:31 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBMassStorage/mscuser.h File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBMassStorage/mscuser.h File Reference

Go to the source code of this file.

Defines

#define | MSC_MemorySize 8192
#define | MSC_BlockSize 512
#define | MSC_BlockCount (MSC_MemorySize / MSC_BlockSize)
#define | MSC_MAX_PACKET 64
#define | MSC_EP_IN 0x82
#define | MSC_EP_OUT 0x02

Functions

uint32_t | MSC_Reset (void)
uint32_t | MSC_GetMaxLUN (void)
void | MSC_GetCBW (void)
void | MSC_SetCSW (void)
void | MSC_BulkIn (void)
void | MSC_BulkOut (void)

Define Documentation

#define MSC_BlockCount (MSC_MemorySize / MSC_BlockSize)

Definition at line 31 of file mscuser.h.

#define MSC_BlockSize 512

Definition at line 30 of file mscuser.h.

#define MSC_EP_IN 0x82

Definition at line 38 of file mscuser.h.

#define MSC_EP_OUT 0x02

Definition at line 39 of file mscuser.h.

#define MSC_MAX_PACKET 64

Definition at line 35 of file mscuser.h.

#define MSC_MemorySize 8192

Definition at line 28 of file mscuser.h.

Function Documentation

void MSC_BulkIn ( void )

Definition at line 593 of file mscuser.c.

void MSC_BulkOut ( void )

Definition at line 623 of file mscuser.c.

void MSC_GetCBW ( void )

Definition at line 479 of file mscuser.c.

uint32_t MSC_GetMaxLUN ( void )

Definition at line 70 of file mscuser.c.

uint32_t MSC_Reset ( void )

Definition at line 56 of file mscuser.c.

void MSC_SetCSW ( void )

Definition at line 579 of file mscuser.c.

Generated on Tue Jun 7 14:59:31 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBMassStorage/usb.h File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBMassStorage/usb.h File Reference

Go to the source code of this file.

Defines

#define | REQUEST_HOST_TO_DEVICE 0
#define | REQUEST_DEVICE_TO_HOST 1
#define | REQUEST_STANDARD 0
#define | REQUEST_CLASS 1
#define | REQUEST_VENDOR 2
#define | REQUEST_RESERVED 3
#define | REQUEST_TO_DEVICE 0
#define | REQUEST_TO_INTERFACE 1
#define | REQUEST_TO_ENDPOINT 2
#define | REQUEST_TO_OTHER 3
#define | USB_REQUEST_GET_STATUS 0
#define | USB_REQUEST_CLEAR_FEATURE 1
#define | USB_REQUEST_SET_FEATURE 3
#define | USB_REQUEST_SET_ADDRESS 5
#define | USB_REQUEST_GET_DESCRIPTOR 6
#define | USB_REQUEST_SET_DESCRIPTOR 7
#define | USB_REQUEST_GET_CONFIGURATION 8
#define | USB_REQUEST_SET_CONFIGURATION 9
#define | USB_REQUEST_GET_INTERFACE 10
#define | USB_REQUEST_SET_INTERFACE 11
#define | USB_REQUEST_SYNC_FRAME 12
#define | USB_GETSTATUS_SELF_POWERED 0x01
#define | USB_GETSTATUS_REMOTE_WAKEUP 0x02
#define | USB_GETSTATUS_ENDPOINT_STALL 0x01
#define | USB_FEATURE_ENDPOINT_STALL 0
#define | USB_FEATURE_REMOTE_WAKEUP 1
#define | USB_DEVICE_DESCRIPTOR_TYPE 1
#define | USB_CONFIGURATION_DESCRIPTOR_TYPE 2
#define | USB_STRING_DESCRIPTOR_TYPE 3
#define | USB_INTERFACE_DESCRIPTOR_TYPE 4
#define | USB_ENDPOINT_DESCRIPTOR_TYPE 5
#define | USB_DEVICE_QUALIFIER_DESCRIPTOR_TYPE 6
#define | USB_OTHER_SPEED_CONFIG_DESCRIPTOR_TYPE 7
#define | USB_INTERFACE_POWER_DESCRIPTOR_TYPE 8
#define | USB_OTG_DESCRIPTOR_TYPE 9
#define | USB_DEBUG_DESCRIPTOR_TYPE 10
#define | USB_INTERFACE_ASSOCIATION_DESCRIPTOR_TYPE 11
#define | USB_DEVICE_CLASS_RESERVED 0x00
#define | USB_DEVICE_CLASS_AUDIO 0x01
#define | USB_DEVICE_CLASS_COMMUNICATIONS 0x02
#define | USB_DEVICE_CLASS_HUMAN_INTERFACE 0x03
#define | USB_DEVICE_CLASS_MONITOR 0x04
#define | USB_DEVICE_CLASS_PHYSICAL_INTERFACE 0x05
#define | USB_DEVICE_CLASS_POWER 0x06
#define | USB_DEVICE_CLASS_PRINTER 0x07
#define | USB_DEVICE_CLASS_STORAGE 0x08
#define | USB_DEVICE_CLASS_HUB 0x09
#define | USB_DEVICE_CLASS_MISCELLANEOUS 0xEF
#define | USB_DEVICE_CLASS_VENDOR_SPECIFIC 0xFF
#define | USB_CONFIG_POWERED_MASK 0xC0
#define | USB_CONFIG_BUS_POWERED 0x80
#define | USB_CONFIG_SELF_POWERED 0xC0
#define | USB_CONFIG_REMOTE_WAKEUP 0x20
#define | USB_CONFIG_POWER_MA(mA) ((mA)/2)
#define | USB_ENDPOINT_DIRECTION_MASK 0x80
#define | USB_ENDPOINT_OUT(addr) ((addr) | 0x00)
#define | USB_ENDPOINT_IN(addr) ((addr) | 0x80)
#define | USB_ENDPOINT_TYPE_MASK 0x03
#define | USB_ENDPOINT_TYPE_CONTROL 0x00
#define | USB_ENDPOINT_TYPE_ISOCHRONOUS 0x01
#define | USB_ENDPOINT_TYPE_BULK 0x02
#define | USB_ENDPOINT_TYPE_INTERRUPT 0x03
#define | USB_ENDPOINT_SYNC_MASK 0x0C
#define | USB_ENDPOINT_SYNC_NO_SYNCHRONIZATION 0x00
#define | USB_ENDPOINT_SYNC_ASYNCHRONOUS 0x04
#define | USB_ENDPOINT_SYNC_ADAPTIVE 0x08
#define | USB_ENDPOINT_SYNC_SYNCHRONOUS 0x0C
#define | USB_ENDPOINT_USAGE_MASK 0x30
#define | USB_ENDPOINT_USAGE_DATA 0x00
#define | USB_ENDPOINT_USAGE_FEEDBACK 0x10
#define | USB_ENDPOINT_USAGE_IMPLICIT_FEEDBACK 0x20
#define | USB_ENDPOINT_USAGE_RESERVED 0x30

Variables

uint16_t | W
uint8_t | L
uint8_t | H
WB
WORD_BYTE
uint8_t | Recipient
uint8_t | Type
uint8_t | Dir
BM
uint8_t | B
REQUEST_TYPE
REQUEST_TYPE bmRequestType
uint8_t | bRequest
WORD_BYTE wValue
WORD_BYTE wIndex
uint16_t | wLength
USB_SETUP_PACKET
uint8_t | bLength
uint8_t | bDescriptorType
uint16_t | bcdUSB
uint8_t | bDeviceClass
uint8_t | bDeviceSubClass
uint8_t | bDeviceProtocol
uint8_t | bMaxPacketSize0
uint16_t | idVendor
uint16_t | idProduct
uint16_t | bcdDevice
uint8_t | iManufacturer
uint8_t | iProduct
uint8_t | iSerialNumber
uint8_t | bNumConfigurations
USB_DEVICE_DESCRIPTOR
uint8_t | bReserved
USB_DEVICE_QUALIFIER_DESCRIPTOR
uint16_t | wTotalLength
uint8_t | bNumInterfaces
uint8_t | bConfigurationValue
uint8_t | iConfiguration
uint8_t | bmAttributes
uint8_t | bMaxPower
USB_CONFIGURATION_DESCRIPTOR
uint8_t | bInterfaceNumber
uint8_t | bAlternateSetting
uint8_t | bNumEndpoints
uint8_t | bInterfaceClass
uint8_t | bInterfaceSubClass
uint8_t | bInterfaceProtocol
uint8_t | iInterface
USB_INTERFACE_DESCRIPTOR
uint8_t | bEndpointAddress
uint16_t | wMaxPacketSize
uint8_t | bInterval
USB_ENDPOINT_DESCRIPTOR
uint16_t | bString
USB_STRING_DESCRIPTOR
USB_COMMON_DESCRIPTOR

Define Documentation

#define REQUEST_CLASS 1

Definition at line 55 of file usb.h.

#define REQUEST_DEVICE_TO_HOST 1

Definition at line 51 of file usb.h.

#define REQUEST_HOST_TO_DEVICE 0

Definition at line 50 of file usb.h.

#define REQUEST_RESERVED 3

Definition at line 57 of file usb.h.

#define REQUEST_STANDARD 0

Definition at line 54 of file usb.h.

#define REQUEST_TO_DEVICE 0

Definition at line 60 of file usb.h.

#define REQUEST_TO_ENDPOINT 2

Definition at line 62 of file usb.h.

#define REQUEST_TO_INTERFACE 1

Definition at line 61 of file usb.h.

#define REQUEST_TO_OTHER 3

Definition at line 63 of file usb.h.

#define REQUEST_VENDOR 2

Definition at line 56 of file usb.h.

#define USB_CONFIG_BUS_POWERED 0x80

Definition at line 154 of file usb.h.

#define USB_CONFIG_POWER_MA ( mA ) ((mA)/2)

Definition at line 159 of file usb.h.

#define USB_CONFIG_POWERED_MASK 0xC0

Definition at line 153 of file usb.h.

#define USB_CONFIG_REMOTE_WAKEUP 0x20

Definition at line 156 of file usb.h.

#define USB_CONFIG_SELF_POWERED 0xC0

Definition at line 155 of file usb.h.

#define USB_CONFIGURATION_DESCRIPTOR_TYPE 2

Definition at line 127 of file usb.h.

#define USB_DEBUG_DESCRIPTOR_TYPE 10

Definition at line 135 of file usb.h.

#define USB_DEVICE_CLASS_AUDIO 0x01

Definition at line 140 of file usb.h.

#define USB_DEVICE_CLASS_COMMUNICATIONS 0x02

Definition at line 141 of file usb.h.

#define USB_DEVICE_CLASS_HUB 0x09

Definition at line 148 of file usb.h.

#define USB_DEVICE_CLASS_HUMAN_INTERFACE 0x03

Definition at line 142 of file usb.h.

#define USB_DEVICE_CLASS_MISCELLANEOUS 0xEF

Definition at line 149 of file usb.h.

#define USB_DEVICE_CLASS_MONITOR 0x04

Definition at line 143 of file usb.h.

#define USB_DEVICE_CLASS_PHYSICAL_INTERFACE 0x05

Definition at line 144 of file usb.h.

#define USB_DEVICE_CLASS_POWER 0x06

Definition at line 145 of file usb.h.

#define USB_DEVICE_CLASS_PRINTER 0x07

Definition at line 146 of file usb.h.

#define USB_DEVICE_CLASS_RESERVED 0x00

Definition at line 139 of file usb.h.

#define USB_DEVICE_CLASS_STORAGE 0x08

Definition at line 147 of file usb.h.

#define USB_DEVICE_CLASS_VENDOR_SPECIFIC 0xFF

Definition at line 150 of file usb.h.

#define USB_DEVICE_DESCRIPTOR_TYPE 1

Definition at line 126 of file usb.h.

#define USB_DEVICE_QUALIFIER_DESCRIPTOR_TYPE 6

Definition at line 131 of file usb.h.

#define USB_ENDPOINT_DESCRIPTOR_TYPE 5

Definition at line 130 of file usb.h.

#define USB_ENDPOINT_DIRECTION_MASK 0x80

Definition at line 162 of file usb.h.

#define USB_ENDPOINT_IN ( addr ) ((addr) | 0x80)

Definition at line 164 of file usb.h.

#define USB_ENDPOINT_OUT ( addr ) ((addr) | 0x00)

Definition at line 163 of file usb.h.

#define USB_ENDPOINT_SYNC_ADAPTIVE 0x08

Definition at line 175 of file usb.h.

#define USB_ENDPOINT_SYNC_ASYNCHRONOUS 0x04

Definition at line 174 of file usb.h.

#define USB_ENDPOINT_SYNC_MASK 0x0C

Definition at line 172 of file usb.h.

#define USB_ENDPOINT_SYNC_NO_SYNCHRONIZATION 0x00

Definition at line 173 of file usb.h.

#define USB_ENDPOINT_SYNC_SYNCHRONOUS 0x0C

Definition at line 176 of file usb.h.

#define USB_ENDPOINT_TYPE_BULK 0x02

Definition at line 170 of file usb.h.

#define USB_ENDPOINT_TYPE_CONTROL 0x00

Definition at line 168 of file usb.h.

#define USB_ENDPOINT_TYPE_INTERRUPT 0x03

Definition at line 171 of file usb.h.

#define USB_ENDPOINT_TYPE_ISOCHRONOUS 0x01

Definition at line 169 of file usb.h.

#define USB_ENDPOINT_TYPE_MASK 0x03

Definition at line 167 of file usb.h.

#define USB_ENDPOINT_USAGE_DATA 0x00

Definition at line 178 of file usb.h.

#define USB_ENDPOINT_USAGE_FEEDBACK 0x10

Definition at line 179 of file usb.h.

#define USB_ENDPOINT_USAGE_IMPLICIT_FEEDBACK 0x20

Definition at line 180 of file usb.h.

#define USB_ENDPOINT_USAGE_MASK 0x30

Definition at line 177 of file usb.h.

#define USB_ENDPOINT_USAGE_RESERVED 0x30

Definition at line 181 of file usb.h.

#define USB_FEATURE_ENDPOINT_STALL 0

Definition at line 106 of file usb.h.

#define USB_FEATURE_REMOTE_WAKEUP 1

Definition at line 107 of file usb.h.

#define USB_GETSTATUS_ENDPOINT_STALL 0x01

Definition at line 103 of file usb.h.

#define USB_GETSTATUS_REMOTE_WAKEUP 0x02

Definition at line 102 of file usb.h.

#define USB_GETSTATUS_SELF_POWERED 0x01

Definition at line 101 of file usb.h.

#define USB_INTERFACE_ASSOCIATION_DESCRIPTOR_TYPE 11

Definition at line 136 of file usb.h.

#define USB_INTERFACE_DESCRIPTOR_TYPE 4

Definition at line 129 of file usb.h.

#define USB_INTERFACE_POWER_DESCRIPTOR_TYPE 8

Definition at line 133 of file usb.h.

#define USB_OTG_DESCRIPTOR_TYPE 9

Definition at line 134 of file usb.h.

#define USB_OTHER_SPEED_CONFIG_DESCRIPTOR_TYPE 7

Definition at line 132 of file usb.h.

#define USB_REQUEST_CLEAR_FEATURE 1

Definition at line 89 of file usb.h.

#define USB_REQUEST_GET_CONFIGURATION 8

Definition at line 94 of file usb.h.

#define USB_REQUEST_GET_DESCRIPTOR 6

Definition at line 92 of file usb.h.

#define USB_REQUEST_GET_INTERFACE 10

Definition at line 96 of file usb.h.

#define USB_REQUEST_GET_STATUS 0

Definition at line 88 of file usb.h.

#define USB_REQUEST_SET_ADDRESS 5

Definition at line 91 of file usb.h.

#define USB_REQUEST_SET_CONFIGURATION 9

Definition at line 95 of file usb.h.

#define USB_REQUEST_SET_DESCRIPTOR 7

Definition at line 93 of file usb.h.

#define USB_REQUEST_SET_FEATURE 3

Definition at line 90 of file usb.h.

#define USB_REQUEST_SET_INTERFACE 11

Definition at line 97 of file usb.h.

#define USB_REQUEST_SYNC_FRAME 12

Definition at line 98 of file usb.h.

#define USB_STRING_DESCRIPTOR_TYPE 3

Definition at line 128 of file usb.h.

Variable Documentation

uint8_t B

Definition at line 84 of file usb.h.

uint8_t bAlternateSetting

Definition at line 255 of file usb.h.

uint16_t bcdDevice

Definition at line 200 of file usb.h.

uint16_t bcdUSB

Definition at line 193 of file usb.h.

uint8_t bConfigurationValue

Definition at line 238 of file usb.h.

uint8_t bDescriptorType

Definition at line 192 of file usb.h.

uint8_t bDeviceClass

Definition at line 194 of file usb.h.

uint8_t bDeviceProtocol

Definition at line 196 of file usb.h.

uint8_t bDeviceSubClass

Definition at line 195 of file usb.h.

uint8_t bEndpointAddress

Definition at line 273 of file usb.h.

uint8_t bInterfaceClass

Definition at line 257 of file usb.h.

uint8_t bInterfaceNumber

Definition at line 254 of file usb.h.

uint8_t bInterfaceProtocol

Definition at line 259 of file usb.h.

uint8_t bInterfaceSubClass

Definition at line 258 of file usb.h.

uint8_t bInterval

Definition at line 276 of file usb.h.

uint8_t bLength

Definition at line 191 of file usb.h.

BM

Definition at line 83 of file usb.h.

uint8_t bmAttributes

Definition at line 240 of file usb.h.

uint8_t bMaxPacketSize0

Definition at line 197 of file usb.h.

uint8_t bMaxPower

Definition at line 241 of file usb.h.

REQUEST_TYPE bmRequestType

Definition at line 117 of file usb.h.

uint8_t bNumConfigurations

Definition at line 204 of file usb.h.

uint8_t bNumEndpoints

Definition at line 256 of file usb.h.

uint8_t bNumInterfaces

Definition at line 237 of file usb.h.

uint8_t bRequest

Definition at line 118 of file usb.h.

uint8_t bReserved

Definition at line 223 of file usb.h.

uint16_t bString

Definition at line 289 of file usb.h.

uint8_t Dir

Definition at line 82 of file usb.h.

uint8_t H

Definition at line 44 of file usb.h.

uint8_t iConfiguration

Definition at line 239 of file usb.h.

uint16_t idProduct

Definition at line 199 of file usb.h.

uint16_t idVendor

Definition at line 198 of file usb.h.

uint8_t iInterface

Definition at line 260 of file usb.h.

uint8_t iManufacturer

Definition at line 201 of file usb.h.

uint8_t iProduct

Definition at line 202 of file usb.h.

uint8_t iSerialNumber

Definition at line 203 of file usb.h.

uint8_t L

Definition at line 43 of file usb.h.

uint8_t Recipient

Definition at line 80 of file usb.h.

REQUEST_TYPE

Definition at line 85 of file usb.h.

uint8_t Type

Definition at line 81 of file usb.h.

USB_COMMON_DESCRIPTOR

Definition at line 302 of file usb.h.

USB_CONFIGURATION_DESCRIPTOR

Definition at line 242 of file usb.h.

USB_DEVICE_DESCRIPTOR

Definition at line 205 of file usb.h.

USB_DEVICE_QUALIFIER_DESCRIPTOR

Definition at line 224 of file usb.h.

USB_ENDPOINT_DESCRIPTOR

Definition at line 277 of file usb.h.

USB_INTERFACE_DESCRIPTOR

Definition at line 261 of file usb.h.

USB_SETUP_PACKET

Definition at line 122 of file usb.h.

USB_STRING_DESCRIPTOR

Definition at line 290 of file usb.h.

uint16_t W

Definition at line 35 of file usb.h.

WB

Definition at line 45 of file usb.h.

WORD_BYTE wIndex

Definition at line 120 of file usb.h.

uint16_t wLength

Definition at line 121 of file usb.h.

uint16_t wMaxPacketSize

Definition at line 275 of file usb.h.

WORD_BYTE

Definition at line 46 of file usb.h.

uint16_t wTotalLength

Definition at line 236 of file usb.h.

WORD_BYTE wValue

Definition at line 119 of file usb.h.

Generated on Tue Jun 7 14:59:22 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBMassStorage/usbcfg.h File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBMassStorage/usbcfg.h File Reference

Go to the source code of this file.

Defines

#define | USB_POWER 0
#define | USB_IF_NUM 4
#define | USB_EP_NUM 32
#define | USB_MAX_PACKET0 64
#define | USB_DMA 1
#define | USB_DMA_EP 0x00000000
#define | USB_POWER_EVENT 0
#define | USB_RESET_EVENT 1
#define | USB_SUSPEND_EVENT 0
#define | USB_RESUME_EVENT 0
#define | USB_WAKEUP_EVENT 0
#define | USB_SOF_EVENT 0
#define | USB_ERROR_EVENT 0
#define | USB_EP_EVENT 0x0005
#define | USB_CONFIGURE_EVENT 1
#define | USB_INTERFACE_EVENT 0
#define | USB_FEATURE_EVENT 0
#define | USB_CLASS 1
#define | USB_HID 0
#define | USB_HID_IF_NUM 0
#define | USB_MSC 1
#define | USB_MSC_IF_NUM 0
#define | USB_AUDIO 0
#define | USB_ADC_CIF_NUM 0
#define | USB_ADC_SIF1_NUM 1
#define | USB_ADC_SIF2_NUM 2
#define | USB_CDC 0
#define | USB_CDC_CIF_NUM 0
#define | USB_CDC_DIF_NUM 1
#define | USB_CDC_BUFSIZE 64

Define Documentation

#define USB_ADC_CIF_NUM 0

Definition at line 154 of file usbcfg.h.

#define USB_ADC_SIF1_NUM 1

Definition at line 155 of file usbcfg.h.

#define USB_ADC_SIF2_NUM 2

Definition at line 156 of file usbcfg.h.

#define USB_AUDIO 0

Definition at line 153 of file usbcfg.h.

#define USB_CDC 0

Definition at line 157 of file usbcfg.h.

#define USB_CDC_BUFSIZE 64

Definition at line 160 of file usbcfg.h.

#define USB_CDC_CIF_NUM 0

Definition at line 158 of file usbcfg.h.

#define USB_CDC_DIF_NUM 1

Definition at line 159 of file usbcfg.h.

#define USB_CLASS 1

Definition at line 148 of file usbcfg.h.

#define USB_CONFIGURE_EVENT 1

Definition at line 127 of file usbcfg.h.

#define USB_DMA 1

Definition at line 78 of file usbcfg.h.

#define USB_DMA_EP 0x00000000

Definition at line 79 of file usbcfg.h.

#define USB_EP_EVENT 0x0005

Definition at line 126 of file usbcfg.h.

#define USB_EP_NUM 32

Definition at line 76 of file usbcfg.h.

#define USB_ERROR_EVENT 0

Definition at line 125 of file usbcfg.h.

#define USB_FEATURE_EVENT 0

Definition at line 129 of file usbcfg.h.

#define USB_HID 0

Definition at line 149 of file usbcfg.h.

#define USB_HID_IF_NUM 0

Definition at line 150 of file usbcfg.h.

#define USB_IF_NUM 4

Definition at line 75 of file usbcfg.h.

#define USB_INTERFACE_EVENT 0

Definition at line 128 of file usbcfg.h.

#define USB_MAX_PACKET0 64

Definition at line 77 of file usbcfg.h.

#define USB_MSC 1

Definition at line 151 of file usbcfg.h.

#define USB_MSC_IF_NUM 0

Definition at line 152 of file usbcfg.h.

#define USB_POWER 0

Definition at line 74 of file usbcfg.h.

#define USB_POWER_EVENT 0

Definition at line 119 of file usbcfg.h.

#define USB_RESET_EVENT 1

Definition at line 120 of file usbcfg.h.

#define USB_RESUME_EVENT 0

Definition at line 122 of file usbcfg.h.

#define USB_SOF_EVENT 0

Definition at line 124 of file usbcfg.h.

#define USB_SUSPEND_EVENT 0

Definition at line 121 of file usbcfg.h.

#define USB_WAKEUP_EVENT 0

Definition at line 123 of file usbcfg.h.

Generated on Tue Jun 7 14:59:23 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBMassStorage/usbcore.c File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBMassStorage/usbcore.c File Reference

#include "lpc_types.h"
#include "usb.h"
#include "usbcfg.h"
#include "usbhw.h"
#include "usbcore.h"
#include "usbdesc.h"
#include "usbuser.h"
#include "msc.h"
#include "mscuser.h"

Go to the source code of this file.

Functions

void | USB_ResetCore (void)
void | USB_SetupStage (void)
void | USB_DataInStage (void)
void | USB_DataOutStage (void)
void | USB_StatusInStage (void)
void | USB_StatusOutStage (void)
__inline uint32_t | USB_GetStatus (void)
__inline uint32_t | USB_SetClrFeature (uint32_t sc)
__inline uint32_t | USB_GetDescriptor (void)
__inline uint32_t | USB_SetConfiguration (void)
__inline uint32_t | USB_SetInterface (void)
void | USB_EndPoint0 (uint32_t event)

Variables

MSC_CSW CSW
uint16_t | USB_DeviceStatus
uint8_t | USB_DeviceAddress
uint8_t | USB_Configuration
uint32_t | USB_EndPointMask
uint32_t | USB_EndPointHalt
uint8_t | USB_NumInterfaces
uint8_t | USB_AltSetting [USB_IF_NUM]
uint8_t | EP0Buf [USB_MAX_PACKET0]
USB_EP_DATA EP0Data
USB_SETUP_PACKET SetupPacket

Function Documentation

void USB_DataInStage ( void )

Definition at line 110 of file usbcore.c.

void USB_DataOutStage ( void )

Definition at line 130 of file usbcore.c.

void USB_EndPoint0 ( uint32_t event )

Definition at line 508 of file usbcore.c.

__inline uint32_t USB_GetDescriptor ( void )

Definition at line 271 of file usbcore.c.

__inline uint32_t USB_GetStatus ( void )

Definition at line 170 of file usbcore.c.

void USB_ResetCore ( void )

Definition at line 83 of file usbcore.c.

__inline uint32_t USB_SetClrFeature ( uint32_t sc )

Definition at line 216 of file usbcore.c.

__inline uint32_t USB_SetConfiguration ( void )

Definition at line 349 of file usbcore.c.

__inline uint32_t USB_SetInterface ( void )

Definition at line 442 of file usbcore.c.

void USB_SetupStage ( void )

Definition at line 99 of file usbcore.c.

void USB_StatusInStage ( void )

Definition at line 145 of file usbcore.c.

void USB_StatusOutStage ( void )

Definition at line 156 of file usbcore.c.

Variable Documentation

MSC_CSW CSW

Definition at line 46 of file mscuser.c.

uint8_t EP0Buf[USB_MAX_PACKET0]

Definition at line 69 of file usbcore.c.

USB_EP_DATA EP0Data

Definition at line 72 of file usbcore.c.

USB_SETUP_PACKET SetupPacket

Definition at line 74 of file usbcore.c.

uint8_t USB_AltSetting[USB_IF_NUM]

Definition at line 67 of file usbcore.c.

uint8_t USB_Configuration

Definition at line 63 of file usbcore.c.

uint8_t USB_DeviceAddress

Definition at line 62 of file usbcore.c.

uint16_t USB_DeviceStatus

Definition at line 61 of file usbcore.c.

uint32_t USB_EndPointHalt

Definition at line 65 of file usbcore.c.

uint32_t USB_EndPointMask

Definition at line 64 of file usbcore.c.

uint8_t USB_NumInterfaces

Definition at line 66 of file usbcore.c.

Generated on Tue Jun 7 14:59:24 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBMassStorage/usbcore.h File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBMassStorage/usbcore.h File Reference

Go to the source code of this file.

Data Structures

struct | _USB_EP_DATA

Typedefs

typedef struct _USB_EP_DATA | USB_EP_DATA

Functions

void | USB_ResetCore (void)

Variables

uint16_t | USB_DeviceStatus
uint8_t | USB_DeviceAddress
uint8_t | USB_Configuration
uint32_t | USB_EndPointMask
uint32_t | USB_EndPointHalt
uint8_t | USB_AltSetting [USB_IF_NUM]
uint8_t | EP0Buf [USB_MAX_PACKET0]
USB_EP_DATA EP0Data
USB_SETUP_PACKET SetupPacket

Typedef Documentation

typedef struct _USB_EP_DATA USB_EP_DATA

Function Documentation

void USB_ResetCore ( void )

Definition at line 99 of file usbcore.c.

Variable Documentation

uint8_t EP0Buf[USB_MAX_PACKET0]

Definition at line 85 of file usbcore.c.

USB_EP_DATA EP0Data

Definition at line 88 of file usbcore.c.

USB_SETUP_PACKET SetupPacket

Definition at line 90 of file usbcore.c.

uint8_t USB_AltSetting[USB_IF_NUM]

Definition at line 83 of file usbcore.c.

uint8_t USB_Configuration

Definition at line 78 of file usbcore.c.

uint8_t USB_DeviceAddress

Definition at line 77 of file usbcore.c.

uint16_t USB_DeviceStatus

Definition at line 76 of file usbcore.c.

uint32_t USB_EndPointHalt

Definition at line 80 of file usbcore.c.

uint32_t USB_EndPointMask

Definition at line 79 of file usbcore.c.

Generated on Tue Jun 7 14:59:24 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBMassStorage/usbdesc.c File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBMassStorage/usbdesc.c File Reference

#include "lpc_types.h"
#include "usb.h"
#include "msc.h"
#include "usbcfg.h"
#include "usbdesc.h"

Go to the source code of this file.

Variables

const uint8_t | USB_DeviceDescriptor []
const uint8_t | USB_ConfigDescriptor []
const uint8_t | USB_StringDescriptor []

Variable Documentation

const uint8_t USB_ConfigDescriptor[]

Definition at line 47 of file usbdesc.c.

const uint8_t USB_DeviceDescriptor[]

Initial value:

 {
  USB_DEVICE_DESC_SIZE,
  USB_DEVICE_DESCRIPTOR_TYPE,
  WBVAL(0x0200),
  0x00,
  0x00,
  0x00,
  USB_MAX_PACKET0,
  WBVAL(0xC251),
  WBVAL(0x1303),
  WBVAL(0x0100),
  0x04,
  0x20,
  0x48,
  0x01
}

Definition at line 28 of file usbdesc.c.

const uint8_t USB_StringDescriptor[]

Definition at line 91 of file usbdesc.c.

Generated on Tue Jun 7 14:59:24 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBMassStorage/usbdesc.h File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBMassStorage/usbdesc.h File Reference

Go to the source code of this file.

Defines

#define | WBVAL(x) (x & 0xFF),((x >> 8) & 0xFF)
#define | USB_DEVICE_DESC_SIZE (sizeof(USB_DEVICE_DESCRIPTOR))
#define | USB_CONFIGUARTION_DESC_SIZE (sizeof(USB_CONFIGURATION_DESCRIPTOR))
#define | USB_INTERFACE_DESC_SIZE (sizeof(USB_INTERFACE_DESCRIPTOR))
#define | USB_ENDPOINT_DESC_SIZE (sizeof(USB_ENDPOINT_DESCRIPTOR))

Variables

const uint8_t | USB_DeviceDescriptor []
const uint8_t | USB_ConfigDescriptor []
const uint8_t | USB_StringDescriptor []

Define Documentation

#define USB_CONFIGUARTION_DESC_SIZE (sizeof(USB_CONFIGURATION_DESCRIPTOR))

Definition at line 24 of file usbdesc.h.

#define USB_DEVICE_DESC_SIZE (sizeof(USB_DEVICE_DESCRIPTOR))

Definition at line 23 of file usbdesc.h.

#define USB_ENDPOINT_DESC_SIZE (sizeof(USB_ENDPOINT_DESCRIPTOR))

Definition at line 26 of file usbdesc.h.

#define USB_INTERFACE_DESC_SIZE (sizeof(USB_INTERFACE_DESCRIPTOR))

Definition at line 25 of file usbdesc.h.

#define WBVAL ( x ) (x & 0xFF),((x >> 8) & 0xFF)

Definition at line 21 of file usbdesc.h.

Variable Documentation

const uint8_t USB_ConfigDescriptor[]

Definition at line 50 of file usbdesc.c.

const uint8_t USB_DeviceDescriptor[]

Definition at line 31 of file usbdesc.c.

const uint8_t USB_StringDescriptor[]

Definition at line 185 of file usbdesc.c.

Generated on Tue Jun 7 14:59:25 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBMassStorage/usbhw.c File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBMassStorage/usbhw.c File Reference

#include <LPC17xx.h>
#include "lpc_types.h"
#include "usb.h"
#include "usbcfg.h"
#include "usbreg.h"
#include "usbhw.h"
#include "usbcore.h"
#include "usbuser.h"

Go to the source code of this file.

Defines

#define | EP_MSK_CTRL 0x0001
#define | EP_MSK_BULK 0xC924
#define | EP_MSK_INT 0x4492
#define | EP_MSK_ISO 0x1248

Functions

uint32_t | EPAdr (uint32_t EPNum)
void | WrCmd (uint32_t cmd)
void | WrCmdDat (uint32_t cmd, uint32_t val)
uint32_t | RdCmdDat (uint32_t cmd)
void | USB_Init (void)
void | USB_Connect (uint32_t con)
void | USB_Reset (void)
void | USB_Suspend (void)
void | USB_Resume (void)
void | USB_WakeUp (void)
void | USB_WakeUpCfg (uint32_t cfg)
void | USB_SetAddress (uint32_t adr)
void | USB_Configure (uint32_t cfg)
void | USB_ConfigEP (USB_ENDPOINT_DESCRIPTOR *pEPD)
void | USB_DirCtrlEP (uint32_t dir)
void | USB_EnableEP (uint32_t EPNum)
void | USB_DisableEP (uint32_t EPNum)
void | USB_ResetEP (uint32_t EPNum)
void | USB_SetStallEP (uint32_t EPNum)
void | USB_ClrStallEP (uint32_t EPNum)
uint32_t | USB_ReadEP (uint32_t EPNum, uint8_t *pData)
uint32_t | USB_WriteEP (uint32_t EPNum, uint8_t *pData, uint32_t cnt)
uint32_t | USB_DMA_Setup (uint32_t EPNum, USB_DMA_DESCRIPTOR *pDD)
void | USB_DMA_Enable (uint32_t EPNum)
void | USB_DMA_Disable (uint32_t EPNum)
uint32_t | USB_DMA_Status (uint32_t EPNum)
uint32_t | USB_DMA_BufAdr (uint32_t EPNum)
uint32_t | USB_DMA_BufCnt (uint32_t EPNum)
uint32_t | USB_GetFrame (void)
void | USB_IRQHandler (void)

Variables

const uint32_t | DDAdr [2] = { DD_NISO_ADR, DD_ISO_ADR }
const uint32_t | DDSz [2] = { 16, 20 }

Define Documentation

#define EP_MSK_BULK 0xC924

Definition at line 35 of file usbhw.c.

#define EP_MSK_CTRL 0x0001

Definition at line 34 of file usbhw.c.

#define EP_MSK_INT 0x4492

Definition at line 36 of file usbhw.c.

#define EP_MSK_ISO 0x1248

Definition at line 37 of file usbhw.c.

Function Documentation

uint32_t EPAdr ( uint32_t EPNum )

Definition at line 82 of file usbhw.c.

uint32_t RdCmdDat ( uint32_t cmd )

Definition at line 131 of file usbhw.c.

void USB_ClrStallEP ( uint32_t EPNum )

Definition at line 388 of file usbhw.c.

void USB_ConfigEP ( USB_ENDPOINT_DESCRIPTOR * pEPD )

Definition at line 305 of file usbhw.c.

void USB_Configure ( uint32_t cfg )

Definition at line 289 of file usbhw.c.

void USB_Connect ( uint32_t con )

Definition at line 176 of file usbhw.c.

void USB_DirCtrlEP ( uint32_t dir )

Definition at line 323 of file usbhw.c.

void USB_DisableEP ( uint32_t EPNum )

Definition at line 349 of file usbhw.c.

uint32_t USB_DMA_BufAdr ( uint32_t EPNum )

Definition at line 599 of file usbhw.c.

uint32_t USB_DMA_BufCnt ( uint32_t EPNum )

Definition at line 622 of file usbhw.c.

void USB_DMA_Disable ( uint32_t EPNum )

Definition at line 552 of file usbhw.c.

void USB_DMA_Enable ( uint32_t EPNum )

Definition at line 539 of file usbhw.c.

uint32_t USB_DMA_Setup | ( | uint32_t | EPNum,
 |  | USB_DMA_DESCRIPTOR * | pDD
 | ) |  |

Definition at line 470 of file usbhw.c.

uint32_t USB_DMA_Status ( uint32_t EPNum )

Definition at line 565 of file usbhw.c.

void USB_EnableEP ( uint32_t EPNum )

Definition at line 336 of file usbhw.c.

uint32_t USB_GetFrame ( void )

Definition at line 644 of file usbhw.c.

void USB_Init ( void )

Definition at line 146 of file usbhw.c.

void USB_IRQHandler ( void )

Definition at line 659 of file usbhw.c.

uint32_t USB_ReadEP | ( | uint32_t | EPNum,
 |  | uint8_t * | pData
 | ) |  |

Definition at line 402 of file usbhw.c.

void USB_Reset ( void )

Definition at line 187 of file usbhw.c.

void USB_ResetEP ( uint32_t EPNum )

Definition at line 362 of file usbhw.c.

void USB_Resume ( void )

Definition at line 241 of file usbhw.c.

void USB_SetAddress ( uint32_t adr )

Definition at line 277 of file usbhw.c.

void USB_SetStallEP ( uint32_t EPNum )

Definition at line 375 of file usbhw.c.

void USB_Suspend ( void )

Definition at line 230 of file usbhw.c.

void USB_WakeUp ( void )

Definition at line 252 of file usbhw.c.

void USB_WakeUpCfg ( uint32_t cfg )

Definition at line 266 of file usbhw.c.

uint32_t USB_WriteEP | ( | uint32_t | EPNum,
 |  | uint8_t * | pData,
 |  | uint32_t | cnt
 | ) |  |

Definition at line 436 of file usbhw.c.

void WrCmd ( uint32_t cmd )

Definition at line 99 of file usbhw.c.

void WrCmdDat | ( | uint32_t | cmd,
 |  | uint32_t | val
 | ) |  |

Definition at line 114 of file usbhw.c.

Variable Documentation

const uint32_t DDAdr[2] = { DD_NISO_ADR, DD_ISO_ADR }

Definition at line 459 of file usbhw.c.

const uint32_t DDSz[2] = { 16, 20 }

Definition at line 460 of file usbhw.c.

Generated on Tue Jun 7 14:59:25 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBMassStorage/usbhw.h File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBMassStorage/usbhw.h File Reference

Go to the source code of this file.

Data Structures

struct | _USB_DMA_DESCRIPTOR

Defines

#define | USB_RAM_ADR 0x20080000
#define | USB_RAM_SZ 0x00004000
#define | DD_NISO_CNT 16
#define | DD_ISO_CNT 8
#define | DD_NISO_SZ (DD_NISO_CNT * 16)
#define | DD_ISO_SZ (DD_ISO_CNT * 20)
#define | DD_NISO_ADR (USB_RAM_ADR + 128)
#define | DD_ISO_ADR (DD_NISO_ADR + DD_NISO_SZ)
#define | DD_SZ (128 + DD_NISO_SZ + DD_ISO_SZ)
#define | DMA_BUF_ADR (USB_RAM_ADR + DD_SZ)
#define | DMA_BUF_SZ (USB_RAM_SZ - DD_SZ)
#define | USB_ERR_PID 0x0001
#define | USB_ERR_UEPKT 0x0002
#define | USB_ERR_DCRC 0x0004
#define | USB_ERR_TIMOUT 0x0008
#define | USB_ERR_EOP 0x0010
#define | USB_ERR_B_OVRN 0x0020
#define | USB_ERR_BTSTF 0x0040
#define | USB_ERR_TGL 0x0080
#define | USB_DMA_INVALID 0x0000
#define | USB_DMA_IDLE 0x0001
#define | USB_DMA_BUSY 0x0002
#define | USB_DMA_DONE 0x0003
#define | USB_DMA_OVER_RUN 0x0004
#define | USB_DMA_UNDER_RUN 0x0005
#define | USB_DMA_ERROR 0x0006
#define | USB_DMA_UNKNOWN 0xFFFF

Typedefs

typedef struct _USB_DMA_DESCRIPTOR | USB_DMA_DESCRIPTOR

Functions

void | USB_Init (void)
void | USB_Connect (uint32_t con)
void | USB_Reset (void)
void | USB_Suspend (void)
void | USB_Resume (void)
void | USB_WakeUp (void)
void | USB_WakeUpCfg (uint32_t cfg)
void | USB_SetAddress (uint32_t adr)
void | USB_Configure (uint32_t cfg)
void | USB_ConfigEP (USB_ENDPOINT_DESCRIPTOR *pEPD)
void | USB_DirCtrlEP (uint32_t dir)
void | USB_EnableEP (uint32_t EPNum)
void | USB_DisableEP (uint32_t EPNum)
void | USB_ResetEP (uint32_t EPNum)
void | USB_SetStallEP (uint32_t EPNum)
void | USB_ClrStallEP (uint32_t EPNum)
uint32_t | USB_ReadEP (uint32_t EPNum, uint8_t *pData)
uint32_t | USB_WriteEP (uint32_t EPNum, uint8_t *pData, uint32_t cnt)
uint32_t | USB_DMA_Setup (uint32_t EPNum, USB_DMA_DESCRIPTOR *pDD)
void | USB_DMA_Enable (uint32_t EPNum)
void | USB_DMA_Disable (uint32_t EPNum)
uint32_t | USB_DMA_Status (uint32_t EPNum)
uint32_t | USB_DMA_BufAdr (uint32_t EPNum)
uint32_t | USB_DMA_BufCnt (uint32_t EPNum)
uint32_t | USB_GetFrame (void)
void | USB_IRQHandler (void)

Define Documentation

#define DD_ISO_ADR (DD_NISO_ADR + DD_NISO_SZ)

Definition at line 33 of file usbhw.h.

#define DD_ISO_CNT 8

Definition at line 29 of file usbhw.h.

#define DD_ISO_SZ (DD_ISO_CNT * 20)

Definition at line 31 of file usbhw.h.

#define DD_NISO_ADR (USB_RAM_ADR + 128)

Definition at line 32 of file usbhw.h.

#define DD_NISO_CNT 16

Definition at line 28 of file usbhw.h.

#define DD_NISO_SZ (DD_NISO_CNT * 16)

Definition at line 30 of file usbhw.h.

#define DD_SZ (128 + DD_NISO_SZ + DD_ISO_SZ)

Definition at line 34 of file usbhw.h.

#define DMA_BUF_ADR (USB_RAM_ADR + DD_SZ)

Definition at line 37 of file usbhw.h.

#define DMA_BUF_SZ (USB_RAM_SZ - DD_SZ)

Definition at line 38 of file usbhw.h.

#define USB_DMA_BUSY 0x0002

Definition at line 53 of file usbhw.h.

#define USB_DMA_DONE 0x0003

Definition at line 54 of file usbhw.h.

#define USB_DMA_ERROR 0x0006

Definition at line 57 of file usbhw.h.

#define USB_DMA_IDLE 0x0001

Definition at line 52 of file usbhw.h.

#define USB_DMA_INVALID 0x0000

Definition at line 51 of file usbhw.h.

#define USB_DMA_OVER_RUN 0x0004

Definition at line 55 of file usbhw.h.

#define USB_DMA_UNDER_RUN 0x0005

Definition at line 56 of file usbhw.h.

#define USB_DMA_UNKNOWN 0xFFFF

Definition at line 58 of file usbhw.h.

#define USB_ERR_B_OVRN 0x0020

Definition at line 46 of file usbhw.h.

#define USB_ERR_BTSTF 0x0040

Definition at line 47 of file usbhw.h.

#define USB_ERR_DCRC 0x0004

Definition at line 43 of file usbhw.h.

#define USB_ERR_EOP 0x0010

Definition at line 45 of file usbhw.h.

#define USB_ERR_PID 0x0001

Definition at line 41 of file usbhw.h.

#define USB_ERR_TGL 0x0080

Definition at line 48 of file usbhw.h.

#define USB_ERR_TIMOUT 0x0008

Definition at line 44 of file usbhw.h.

#define USB_ERR_UEPKT 0x0002

Definition at line 42 of file usbhw.h.

#define USB_RAM_ADR 0x20080000

Definition at line 24 of file usbhw.h.

#define USB_RAM_SZ 0x00004000

Definition at line 25 of file usbhw.h.

Typedef Documentation

typedef struct _USB_DMA_DESCRIPTOR USB_DMA_DESCRIPTOR

Function Documentation

void USB_ClrStallEP ( uint32_t EPNum )

Definition at line 390 of file usbhw.c.

void USB_ConfigEP ( USB_ENDPOINT_DESCRIPTOR * pEPD )

Definition at line 307 of file usbhw.c.

void USB_Configure ( uint32_t cfg )

Definition at line 291 of file usbhw.c.

void USB_Connect ( uint32_t con )

Definition at line 178 of file usbhw.c.

void USB_DirCtrlEP ( uint32_t dir )

Definition at line 325 of file usbhw.c.

void USB_DisableEP ( uint32_t EPNum )

Definition at line 351 of file usbhw.c.

uint32_t USB_DMA_BufAdr ( uint32_t EPNum )

Definition at line 599 of file usbhw.c.

uint32_t USB_DMA_BufCnt ( uint32_t EPNum )

Definition at line 622 of file usbhw.c.

void USB_DMA_Disable ( uint32_t EPNum )

Definition at line 553 of file usbhw.c.

void USB_DMA_Enable ( uint32_t EPNum )

Definition at line 540 of file usbhw.c.

uint32_t USB_DMA_Setup | ( | uint32_t | EPNum,
 |  | USB_DMA_DESCRIPTOR * | pDD
 | ) |  |

Definition at line 471 of file usbhw.c.

uint32_t USB_DMA_Status ( uint32_t EPNum )

Definition at line 566 of file usbhw.c.

void USB_EnableEP ( uint32_t EPNum )

Definition at line 338 of file usbhw.c.

uint32_t USB_GetFrame ( void )

Definition at line 647 of file usbhw.c.

void USB_Init ( void )

Definition at line 148 of file usbhw.c.

void USB_IRQHandler ( void )

Definition at line 662 of file usbhw.c.

uint32_t USB_ReadEP | ( | uint32_t | EPNum,
 |  | uint8_t * | pData
 | ) |  |

Definition at line 417 of file usbhw.c.

void USB_Reset ( void )

Definition at line 189 of file usbhw.c.

void USB_ResetEP ( uint32_t EPNum )

Definition at line 364 of file usbhw.c.

void USB_Resume ( void )

Definition at line 243 of file usbhw.c.

void USB_SetAddress ( uint32_t adr )

Definition at line 279 of file usbhw.c.

void USB_SetStallEP ( uint32_t EPNum )

Definition at line 377 of file usbhw.c.

void USB_Suspend ( void )

Definition at line 232 of file usbhw.c.

void USB_WakeUp ( void )

Definition at line 254 of file usbhw.c.

void USB_WakeUpCfg ( uint32_t cfg )

Definition at line 268 of file usbhw.c.

uint32_t USB_WriteEP | ( | uint32_t | EPNum,
 |  | uint8_t * | pData,
 |  | uint32_t | cnt
 | ) |  |

Definition at line 450 of file usbhw.c.

Generated on Tue Jun 7 14:59:27 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBMassStorage/usbreg.h File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBMassStorage/usbreg.h File Reference

Go to the source code of this file.

Defines

#define | FRAME_INT 0x00000001
#define | EP_FAST_INT 0x00000002
#define | EP_SLOW_INT 0x00000004
#define | DEV_STAT_INT 0x00000008
#define | CCEMTY_INT 0x00000010
#define | CDFULL_INT 0x00000020
#define | RxENDPKT_INT 0x00000040
#define | TxENDPKT_INT 0x00000080
#define | EP_RLZED_INT 0x00000100
#define | ERR_INT 0x00000200
#define | PKT_LNGTH_MASK 0x000003FF
#define | PKT_DV 0x00000400
#define | PKT_RDY 0x00000800
#define | CTRL_RD_EN 0x00000001
#define | CTRL_WR_EN 0x00000002
#define | CMD_SET_ADDR 0x00D00500
#define | CMD_CFG_DEV 0x00D80500
#define | CMD_SET_MODE 0x00F30500
#define | CMD_RD_FRAME 0x00F50500
#define | DAT_RD_FRAME 0x00F50200
#define | CMD_RD_TEST 0x00FD0500
#define | DAT_RD_TEST 0x00FD0200
#define | CMD_SET_DEV_STAT 0x00FE0500
#define | CMD_GET_DEV_STAT 0x00FE0500
#define | DAT_GET_DEV_STAT 0x00FE0200
#define | CMD_GET_ERR_CODE 0x00FF0500
#define | DAT_GET_ERR_CODE 0x00FF0200
#define | CMD_RD_ERR_STAT 0x00FB0500
#define | DAT_RD_ERR_STAT 0x00FB0200
#define | DAT_WR_BYTE(x) (0x00000100 | ((x) << 16))
#define | CMD_SEL_EP(x) (0x00000500 | ((x) << 16))
#define | DAT_SEL_EP(x) (0x00000200 | ((x) << 16))
#define | CMD_SEL_EP_CLRI(x) (0x00400500 | ((x) << 16))
#define | DAT_SEL_EP_CLRI(x) (0x00400200 | ((x) << 16))
#define | CMD_SET_EP_STAT(x) (0x00400500 | ((x) << 16))
#define | CMD_CLR_BUF 0x00F20500
#define | DAT_CLR_BUF 0x00F20200
#define | CMD_VALID_BUF 0x00FA0500
#define | DEV_ADDR_MASK 0x7F
#define | DEV_EN 0x80
#define | CONF_DVICE 0x01
#define | AP_CLK 0x01
#define | INAK_CI 0x02
#define | INAK_CO 0x04
#define | INAK_II 0x08
#define | INAK_IO 0x10
#define | INAK_BI 0x20
#define | INAK_BO 0x40
#define | DEV_CON 0x01
#define | DEV_CON_CH 0x02
#define | DEV_SUS 0x04
#define | DEV_SUS_CH 0x08
#define | DEV_RST 0x10
#define | ERR_EC_MASK 0x0F
#define | ERR_EA 0x10
#define | ERR_PID 0x01
#define | ERR_UEPKT 0x02
#define | ERR_DCRC 0x04
#define | ERR_TIMOUT 0x08
#define | ERR_EOP 0x10
#define | ERR_B_OVRN 0x20
#define | ERR_BTSTF 0x40
#define | ERR_TGL 0x80
#define | EP_SEL_F 0x01
#define | EP_SEL_ST 0x02
#define | EP_SEL_STP 0x04
#define | EP_SEL_PO 0x08
#define | EP_SEL_EPN 0x10
#define | EP_SEL_B_1_FULL 0x20
#define | EP_SEL_B_2_FULL 0x40
#define | EP_STAT_ST 0x01
#define | EP_STAT_DA 0x20
#define | EP_STAT_RF_MO 0x40
#define | EP_STAT_CND_ST 0x80
#define | CLR_BUF_PO 0x01
#define | EOT_INT 0x01
#define | NDD_REQ_INT 0x02
#define | SYS_ERR_INT 0x04

Define Documentation

#define AP_CLK 0x01

Definition at line 77 of file usbreg.h.

#define CCEMTY_INT 0x00000010

Definition at line 28 of file usbreg.h.

#define CDFULL_INT 0x00000020

Definition at line 29 of file usbreg.h.

#define CLR_BUF_PO 0x01

Definition at line 122 of file usbreg.h.

#define CMD_CFG_DEV 0x00D80500

Definition at line 46 of file usbreg.h.

#define CMD_CLR_BUF 0x00F20500

Definition at line 65 of file usbreg.h.

#define CMD_GET_DEV_STAT 0x00FE0500

Definition at line 53 of file usbreg.h.

#define CMD_GET_ERR_CODE 0x00FF0500

Definition at line 55 of file usbreg.h.

#define CMD_RD_ERR_STAT 0x00FB0500

Definition at line 57 of file usbreg.h.

#define CMD_RD_FRAME 0x00F50500

Definition at line 48 of file usbreg.h.

#define CMD_RD_TEST 0x00FD0500

Definition at line 50 of file usbreg.h.

#define CMD_SEL_EP ( x ) (0x00000500 | ((x) << 16))

Definition at line 60 of file usbreg.h.

#define CMD_SEL_EP_CLRI ( x ) (0x00400500 | ((x) << 16))

Definition at line 62 of file usbreg.h.

#define CMD_SET_ADDR 0x00D00500

Definition at line 45 of file usbreg.h.

#define CMD_SET_DEV_STAT 0x00FE0500

Definition at line 52 of file usbreg.h.

#define CMD_SET_EP_STAT ( x ) (0x00400500 | ((x) << 16))

Definition at line 64 of file usbreg.h.

#define CMD_SET_MODE 0x00F30500

Definition at line 47 of file usbreg.h.

#define CMD_VALID_BUF 0x00FA0500

Definition at line 67 of file usbreg.h.

#define CONF_DVICE 0x01

Definition at line 74 of file usbreg.h.

#define CTRL_RD_EN 0x00000001

Definition at line 41 of file usbreg.h.

#define CTRL_WR_EN 0x00000002

Definition at line 42 of file usbreg.h.

#define DAT_CLR_BUF 0x00F20200

Definition at line 66 of file usbreg.h.

#define DAT_GET_DEV_STAT 0x00FE0200

Definition at line 54 of file usbreg.h.

#define DAT_GET_ERR_CODE 0x00FF0200

Definition at line 56 of file usbreg.h.

#define DAT_RD_ERR_STAT 0x00FB0200

Definition at line 58 of file usbreg.h.

#define DAT_RD_FRAME 0x00F50200

Definition at line 49 of file usbreg.h.

#define DAT_RD_TEST 0x00FD0200

Definition at line 51 of file usbreg.h.

#define DAT_SEL_EP ( x ) (0x00000200 | ((x) << 16))

Definition at line 61 of file usbreg.h.

#define DAT_SEL_EP_CLRI ( x ) (0x00400200 | ((x) << 16))

Definition at line 63 of file usbreg.h.

#define DAT_WR_BYTE ( x ) (0x00000100 | ((x) << 16))

Definition at line 59 of file usbreg.h.

#define DEV_ADDR_MASK 0x7F

Definition at line 70 of file usbreg.h.

#define DEV_CON 0x01

Definition at line 86 of file usbreg.h.

#define DEV_CON_CH 0x02

Definition at line 87 of file usbreg.h.

#define DEV_EN 0x80

Definition at line 71 of file usbreg.h.

#define DEV_RST 0x10

Definition at line 90 of file usbreg.h.

#define DEV_STAT_INT 0x00000008

Definition at line 27 of file usbreg.h.

#define DEV_SUS 0x04

Definition at line 88 of file usbreg.h.

#define DEV_SUS_CH 0x08

Definition at line 89 of file usbreg.h.

#define EOT_INT 0x01

Definition at line 126 of file usbreg.h.

#define EP_FAST_INT 0x00000002

Definition at line 25 of file usbreg.h.

#define EP_RLZED_INT 0x00000100

Definition at line 32 of file usbreg.h.

#define EP_SEL_B_1_FULL 0x20

Definition at line 112 of file usbreg.h.

#define EP_SEL_B_2_FULL 0x40

Definition at line 113 of file usbreg.h.

#define EP_SEL_EPN 0x10

Definition at line 111 of file usbreg.h.

#define EP_SEL_F 0x01

Definition at line 107 of file usbreg.h.

#define EP_SEL_PO 0x08

Definition at line 110 of file usbreg.h.

#define EP_SEL_ST 0x02

Definition at line 108 of file usbreg.h.

#define EP_SEL_STP 0x04

Definition at line 109 of file usbreg.h.

#define EP_SLOW_INT 0x00000004

Definition at line 26 of file usbreg.h.

#define EP_STAT_CND_ST 0x80

Definition at line 119 of file usbreg.h.

#define EP_STAT_DA 0x20

Definition at line 117 of file usbreg.h.

#define EP_STAT_RF_MO 0x40

Definition at line 118 of file usbreg.h.

#define EP_STAT_ST 0x01

Definition at line 116 of file usbreg.h.

#define ERR_B_OVRN 0x20

Definition at line 102 of file usbreg.h.

#define ERR_BTSTF 0x40

Definition at line 103 of file usbreg.h.

#define ERR_DCRC 0x04

Definition at line 99 of file usbreg.h.

#define ERR_EA 0x10

Definition at line 94 of file usbreg.h.

#define ERR_EC_MASK 0x0F

Definition at line 93 of file usbreg.h.

#define ERR_EOP 0x10

Definition at line 101 of file usbreg.h.

#define ERR_INT 0x00000200

Definition at line 33 of file usbreg.h.

#define ERR_PID 0x01

Definition at line 97 of file usbreg.h.

#define ERR_TGL 0x80

Definition at line 104 of file usbreg.h.

#define ERR_TIMOUT 0x08

Definition at line 100 of file usbreg.h.

#define ERR_UEPKT 0x02

Definition at line 98 of file usbreg.h.

#define FRAME_INT 0x00000001

Definition at line 24 of file usbreg.h.

#define INAK_BI 0x20

Definition at line 82 of file usbreg.h.

#define INAK_BO 0x40

Definition at line 83 of file usbreg.h.

#define INAK_CI 0x02

Definition at line 78 of file usbreg.h.

#define INAK_CO 0x04

Definition at line 79 of file usbreg.h.

#define INAK_II 0x08

Definition at line 80 of file usbreg.h.

#define INAK_IO 0x10

Definition at line 81 of file usbreg.h.

#define NDD_REQ_INT 0x02

Definition at line 127 of file usbreg.h.

#define PKT_DV 0x00000400

Definition at line 37 of file usbreg.h.

#define PKT_LNGTH_MASK 0x000003FF

Definition at line 36 of file usbreg.h.

#define PKT_RDY 0x00000800

Definition at line 38 of file usbreg.h.

#define RxENDPKT_INT 0x00000040

Definition at line 30 of file usbreg.h.

#define SYS_ERR_INT 0x04

Definition at line 128 of file usbreg.h.

#define TxENDPKT_INT 0x00000080

Definition at line 31 of file usbreg.h.

Generated on Tue Jun 7 14:59:28 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBMassStorage/usbuser.c File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBMassStorage/usbuser.c File Reference

#include "LPC17xx.h"
#include "lpc_types.h"
#include "usb.h"
#include "usbcfg.h"
#include "usbhw.h"
#include "usbcore.h"
#include "usbuser.h"
#include "mscuser.h"
#include "memory.h"

Go to the source code of this file.

Defines

#define | P_EP(n) ((USB_EP_EVENT & (1 << (n))) ? USB_EndPoint##n : NULL)

Functions

void | USB_Reset_Event (void)
void | USB_Configure_Event (void)
void | USB_EndPoint1 (uint32_t event)
void | USB_EndPoint2 (uint32_t event)
void | USB_EndPoint3 (uint32_t event)
void | USB_EndPoint4 (uint32_t event)
void | USB_EndPoint5 (uint32_t event)
void | USB_EndPoint6 (uint32_t event)
void | USB_EndPoint7 (uint32_t event)
void | USB_EndPoint8 (uint32_t event)
void | USB_EndPoint9 (uint32_t event)
void | USB_EndPoint10 (uint32_t event)
void | USB_EndPoint11 (uint32_t event)
void | USB_EndPoint12 (uint32_t event)
void | USB_EndPoint13 (uint32_t event)
void | USB_EndPoint14 (uint32_t event)
void | USB_EndPoint15 (uint32_t event)

Variables

void(*const | USB_P_EP [16])(uint32_t event)

Define Documentation

#define P_EP ( n ) ((USB_EP_EVENT & (1 << (n))) ? USB_EndPoint##n : NULL)

Definition at line 149 of file usbuser.c.

Function Documentation

void USB_Configure_Event ( void )

Definition at line 118 of file usbuser.c.

void USB_EndPoint1 ( uint32_t event )

Definition at line 178 of file usbuser.c.

void USB_EndPoint10 ( uint32_t event )

Definition at line 277 of file usbuser.c.

void USB_EndPoint11 ( uint32_t event )

Definition at line 287 of file usbuser.c.

void USB_EndPoint12 ( uint32_t event )

Definition at line 297 of file usbuser.c.

void USB_EndPoint13 ( uint32_t event )

Definition at line 307 of file usbuser.c.

void USB_EndPoint14 ( uint32_t event )

Definition at line 317 of file usbuser.c.

void USB_EndPoint15 ( uint32_t event )

Definition at line 327 of file usbuser.c.

void USB_EndPoint2 ( uint32_t event )

Definition at line 188 of file usbuser.c.

void USB_EndPoint3 ( uint32_t event )

Definition at line 207 of file usbuser.c.

void USB_EndPoint4 ( uint32_t event )

Definition at line 217 of file usbuser.c.

void USB_EndPoint5 ( uint32_t event )

Definition at line 227 of file usbuser.c.

void USB_EndPoint6 ( uint32_t event )

Definition at line 237 of file usbuser.c.

void USB_EndPoint7 ( uint32_t event )

Definition at line 247 of file usbuser.c.

void USB_EndPoint8 ( uint32_t event )

Definition at line 257 of file usbuser.c.

void USB_EndPoint9 ( uint32_t event )

Definition at line 267 of file usbuser.c.

void USB_Reset_Event ( void )

Definition at line 50 of file usbuser.c.

Variable Documentation

void(* const USB_P_EP[16])(uint32_t event)

Initial value:

 {
  P_EP(0),
  P_EP(1),
  P_EP(2),
  P_EP(3),
  P_EP(4),
  P_EP(5),
  P_EP(6),
  P_EP(7),
  P_EP(8),
  P_EP(9),
  P_EP(10),
  P_EP(11),
  P_EP(12),
  P_EP(13),
  P_EP(14),
  P_EP(15),
}

Generated on Tue Jun 7 14:59:29 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBMassStorage/usbuser.h File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBMassStorage/usbuser.h File Reference

Go to the source code of this file.

Defines

#define | USB_EVT_SETUP 1
#define | USB_EVT_OUT 2
#define | USB_EVT_IN 3
#define | USB_EVT_OUT_NAK 4
#define | USB_EVT_IN_NAK 5
#define | USB_EVT_OUT_STALL 6
#define | USB_EVT_IN_STALL 7
#define | USB_EVT_OUT_DMA_EOT 8
#define | USB_EVT_IN_DMA_EOT 9
#define | USB_EVT_OUT_DMA_NDR 10
#define | USB_EVT_IN_DMA_NDR 11
#define | USB_EVT_OUT_DMA_ERR 12
#define | USB_EVT_IN_DMA_ERR 13

Functions

void | USB_Power_Event (uint32_t power)
void | USB_Reset_Event (void)
void | USB_Suspend_Event (void)
void | USB_Resume_Event (void)
void | USB_WakeUp_Event (void)
void | USB_SOF_Event (void)
void | USB_Error_Event (uint32_t error)
void | USB_EndPoint0 (uint32_t event)
void | USB_EndPoint1 (uint32_t event)
void | USB_EndPoint2 (uint32_t event)
void | USB_EndPoint3 (uint32_t event)
void | USB_EndPoint4 (uint32_t event)
void | USB_EndPoint5 (uint32_t event)
void | USB_EndPoint6 (uint32_t event)
void | USB_EndPoint7 (uint32_t event)
void | USB_EndPoint8 (uint32_t event)
void | USB_EndPoint9 (uint32_t event)
void | USB_EndPoint10 (uint32_t event)
void | USB_EndPoint11 (uint32_t event)
void | USB_EndPoint12 (uint32_t event)
void | USB_EndPoint13 (uint32_t event)
void | USB_EndPoint14 (uint32_t event)
void | USB_EndPoint15 (uint32_t event)
void | USB_Configure_Event (void)
void | USB_Interface_Event (void)
void | USB_Feature_Event (void)

Variables

void(*const | USB_P_EP [16])(uint32_t event)

Define Documentation

#define USB_EVT_IN 3

Definition at line 35 of file usbuser.h.

#define USB_EVT_IN_DMA_EOT 9

Definition at line 41 of file usbuser.h.

#define USB_EVT_IN_DMA_ERR 13

Definition at line 45 of file usbuser.h.

#define USB_EVT_IN_DMA_NDR 11

Definition at line 43 of file usbuser.h.

#define USB_EVT_IN_NAK 5

Definition at line 37 of file usbuser.h.

#define USB_EVT_IN_STALL 7

Definition at line 39 of file usbuser.h.

#define USB_EVT_OUT 2

Definition at line 34 of file usbuser.h.

#define USB_EVT_OUT_DMA_EOT 8

Definition at line 40 of file usbuser.h.

#define USB_EVT_OUT_DMA_ERR 12

Definition at line 44 of file usbuser.h.

#define USB_EVT_OUT_DMA_NDR 10

Definition at line 42 of file usbuser.h.

#define USB_EVT_OUT_NAK 4

Definition at line 36 of file usbuser.h.

#define USB_EVT_OUT_STALL 6

Definition at line 38 of file usbuser.h.

#define USB_EVT_SETUP 1

Definition at line 33 of file usbuser.h.

Function Documentation

void USB_Configure_Event ( void )

Definition at line 114 of file usbuser.c.

void USB_EndPoint0 ( uint32_t event )

Definition at line 600 of file usbcore.c.

void USB_EndPoint1 ( uint32_t event )

Definition at line 190 of file usbuser.c.

void USB_EndPoint10 ( uint32_t event )

Definition at line 311 of file usbuser.c.

void USB_EndPoint11 ( uint32_t event )

Definition at line 321 of file usbuser.c.

void USB_EndPoint12 ( uint32_t event )

Definition at line 331 of file usbuser.c.

void USB_EndPoint13 ( uint32_t event )

Definition at line 341 of file usbuser.c.

void USB_EndPoint14 ( uint32_t event )

Definition at line 351 of file usbuser.c.

void USB_EndPoint15 ( uint32_t event )

Definition at line 361 of file usbuser.c.

void USB_EndPoint2 ( uint32_t event )

Definition at line 200 of file usbuser.c.

void USB_EndPoint3 ( uint32_t event )

Definition at line 209 of file usbuser.c.

void USB_EndPoint4 ( uint32_t event )

Definition at line 251 of file usbuser.c.

void USB_EndPoint5 ( uint32_t event )

Definition at line 261 of file usbuser.c.

void USB_EndPoint6 ( uint32_t event )

Definition at line 271 of file usbuser.c.

void USB_EndPoint7 ( uint32_t event )

Definition at line 281 of file usbuser.c.

void USB_EndPoint8 ( uint32_t event )

Definition at line 291 of file usbuser.c.

void USB_EndPoint9 ( uint32_t event )

Definition at line 301 of file usbuser.c.

void USB_Error_Event ( uint32_t error )

void USB_Feature_Event ( void )

void USB_Interface_Event ( void )

void USB_Power_Event ( uint32_t power )

void USB_Reset_Event ( void )

Definition at line 48 of file usbuser.c.

void USB_Resume_Event ( void )

void USB_SOF_Event ( void )

Definition at line 93 of file usbuser.c.

void USB_Suspend_Event ( void )

void USB_WakeUp_Event ( void )

Variable Documentation

void(* const USB_P_EP[16])(uint32_t event)

Generated on Tue Jun 7 14:59:30 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/WDT/INTERRUPT/lpc17xx_libcfg.h File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/WDT/INTERRUPT/lpc17xx_libcfg.h File Reference

#include "lpc_types.h"

Go to the source code of this file.

Defines

#define | DEBUG
#define | _DBGFWK
#define | _GPIO
#define | _UART
#define | _UART0
#define | _WDT
#define | CHECK_PARAM(expr) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))

Functions

void | check_failed (uint8_t *file, uint32_t line)

Define Documentation

#define _DBGFWK

Definition at line 44 of file lpc17xx_libcfg.h.

#define _GPIO

Definition at line 47 of file lpc17xx_libcfg.h.

#define _UART

Definition at line 53 of file lpc17xx_libcfg.h.

#define _UART0

Definition at line 54 of file lpc17xx_libcfg.h.

#define _WDT

Definition at line 80 of file lpc17xx_libcfg.h.

#define CHECK_PARAM ( expr ) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))

Definition at line 136 of file lpc17xx_libcfg.h.

#define DEBUG

Definition at line 36 of file lpc17xx_libcfg.h.

Generated on Tue Jun 7 14:59:11 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/WDT/INTERRUPT/wdt_interrupt_test.c File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/WDT/INTERRUPT/wdt_interrupt_test.c File Reference

This example describes how to use Watch-dog timer application in interrupt mode. More...

#include "lpc17xx_wdt.h"
#include "lpc17xx_libcfg.h"
#include "lpc17xx_pinsel.h"
#include "debug_frmwrk.h"
#include "lpc17xx_gpio.h"

Go to the source code of this file.

Defines

#define | MCB_LPC_1768
#define | WDT_TIMEOUT 5000000

Functions

void | WDT_IRQHandler (void)
WDT interrupt handler sub-routine.
void | print_menu (void)
Print menu.
void | LED_Init (void)
Initialize LEDs.
int | c_entry (void)
c_entry: Main WDT program body
int | main (void)
void | check_failed (uint8_t *file, uint32_t line)

Variables

uint8_t | menu1 []
uint8_t | info1 [] = "BEFORE WDT interrupt!\n\r"
uint8_t | info2 [] = "AFTER WDT interrupt\n\r"
__IO Bool | wdt_flag = FALSE
__IO Bool | LED_toggle = FALSE

Detailed Description

This example describes how to use Watch-dog timer application in interrupt mode.

Version:
2.0
Date:
21. May. 2010
Author:
NXP MCU SW Application Team
Copyright(C) 2010, NXP Semiconductor All rights reserved.

Software that is described herein is for illustrative purposes only which provides customers with programming information regarding the products. This software is supplied "AS IS" without any warranties. NXP Semiconductors assumes no responsibility or liability for the use of the software, conveys no license or title under any patent, copyright, or mask work right to the product. NXP Semiconductors reserves the right to make changes in the software without notification. NXP Semiconductors also make no representation or warranty that such application will be suitable for the specified use without further testing or modification.

Definition in file wdt_interrupt_test.c.

Generated on Tue Jun 7 14:59:31 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/WDT/RESET/lpc17xx_libcfg.h File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/WDT/RESET/lpc17xx_libcfg.h File Reference

#include "lpc_types.h"

Go to the source code of this file.

Defines

#define | DEBUG
#define | _DBGFWK
#define | _GPIO
#define | _UART
#define | _UART0
#define | _WDT
#define | CHECK_PARAM(expr) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))

Functions

void | check_failed (uint8_t *file, uint32_t line)

Define Documentation

#define _DBGFWK

Definition at line 44 of file lpc17xx_libcfg.h.

#define _GPIO

Definition at line 47 of file lpc17xx_libcfg.h.

#define _UART

Definition at line 53 of file lpc17xx_libcfg.h.

#define _UART0

Definition at line 54 of file lpc17xx_libcfg.h.

#define _WDT

Definition at line 80 of file lpc17xx_libcfg.h.

#define CHECK_PARAM ( expr ) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))

Definition at line 135 of file lpc17xx_libcfg.h.

#define DEBUG

Definition at line 36 of file lpc17xx_libcfg.h.

Generated on Tue Jun 7 14:59:11 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/WDT/RESET/wdt_reset_test.c File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/WDT/RESET/wdt_reset_test.c File Reference

This example describes how to use WDT in reset mode. More...

#include "lpc17xx_wdt.h"
#include "lpc17xx_libcfg.h"
#include "lpc17xx_pinsel.h"
#include "debug_frmwrk.h"
#include "lpc17xx_gpio.h"

Go to the source code of this file.

Defines

#define | IAR_LPC_1768
#define | WDT_TIMEOUT 5000000

Functions

int | c_entry (void)
c_entry: Main WDT program body
int | main (void)
void | check_failed (uint8_t *file, uint32_t line)

Variables

uint8_t | menu1 []
uint8_t | info1 [] = "Last MCU reset caused by WDT TimeOut!\n\r"
uint8_t | info2 [] = "Last MCU reset caused by External!\n\r"

Detailed Description

This example describes how to use WDT in reset mode.

Version:
2.0
Date:
21. May. 2010
Author:
NXP MCU SW Application Team
Copyright(C) 2010, NXP Semiconductor All rights reserved.

Software that is described herein is for illustrative purposes only which provides customers with programming information regarding the products. This software is supplied "AS IS" without any warranties. NXP Semiconductors assumes no responsibility or liability for the use of the software, conveys no license or title under any patent, copyright, or mask work right to the product. NXP Semiconductors reserves the right to make changes in the software without notification. NXP Semiconductors also make no representation or warranty that such application will be suitable for the specified use without further testing or modification.

Definition in file wdt_reset_test.c.

Generated on Tue Jun 7 14:59:31 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Data Fields

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Here is a list of all functions, variables, defines, enums, and typedefs with links to the files they belong to:

- _ -

  • __attribute__() : emactest.c , link_list.c
  • __BUF_INCR : uart_interrupt_test.c , rs485_master.c , rs485_slave.c , uart_fullmodem_test.c
  • __BUF_IS_EMPTY : uart_interrupt_test.c , rs485_master.c , rs485_slave.c , uart_fullmodem_test.c
  • __BUF_IS_FULL : uart_interrupt_test.c , rs485_master.c , rs485_slave.c , uart_fullmodem_test.c
  • __BUF_MASK : uart_interrupt_test.c , rs485_master.c , rs485_slave.c , uart_fullmodem_test.c
  • __BUF_RESET : uart_interrupt_test.c , rs485_master.c , rs485_slave.c , uart_fullmodem_test.c
  • __BUF_WILL_FULL : uart_interrupt_test.c , rs485_master.c , rs485_slave.c , uart_fullmodem_test.c
  • __CCLK_DIV : system_LPC17xx.c
  • __CM3_CMSIS_VERSION : core_cm3.h
  • __CM3_CMSIS_VERSION_MAIN : core_cm3.h
  • __CM3_CMSIS_VERSION_SUB : core_cm3.h
  • __CORE_CLK : system_LPC17xx.c
  • __CORTEX_M : core_cm3.h
  • __FCCO : system_LPC17xx.c
  • __I : core_cm3.h
  • __IO : core_cm3.h
  • __LC_SWTICH_H__ : lc-switch.h
  • __M : system_LPC17xx.c
  • __MPU_PRESENT : LPC17xx.h
  • __N : system_LPC17xx.c
  • __NVIC_PRIO_BITS : LPC17xx.h
  • __O : core_cm3.h
  • __stdin : Retarget.c
  • __stdout : Retarget.c
  • __Vendor_SysTickConfig : LPC17xx.h
  • _ADC : lpc17xx_libcfg_default.h , lpc17xx_libcfg.h
  • _ADC_CHANNEL : adc_burst_test.c , adc_dma_test.c , adc_hardware_trigger_test.c , adc_interrupt_test.c , adc_polling_test.c
  • _ADC_CHANNEL_3 : adc_burst_test.c
  • _ADC_INT : adc_burst_test.c , adc_dma_test.c , adc_hardware_trigger_test.c , adc_interrupt_test.c , adc_polling_test.c
  • _ADC_INT_3 : adc_burst_test.c
  • _BIT : lpc_types.h
  • _BITMASK : lpc_types.h
  • _CAN : lpc17xx_libcfg_default.h , lpc17xx_libcfg.h
  • _close_r() : syscalls.c
  • _DAC : lpc17xx_libcfg_default.h , lpc17xx_libcfg.h
  • _db : main.c
  • _db_char : debug_frmwrk.h , debug_frmwrk.c
  • _db_dec : debug_frmwrk.h , debug_frmwrk.c
  • _db_dec_16 : debug_frmwrk.h , debug_frmwrk.c
  • _db_dec_32 : debug_frmwrk.h , debug_frmwrk.c
  • _db_get_char : debug_frmwrk.h , debug_frmwrk.c
  • _db_hex : debug_frmwrk.h , debug_frmwrk.c
  • _db_hex_16 : debug_frmwrk.h , debug_frmwrk.c
  • _db_hex_32 : debug_frmwrk.h , debug_frmwrk.c
  • _db_msg : debug_frmwrk.h , debug_frmwrk.c
  • _db_msg_ : debug_frmwrk.h , debug_frmwrk.c
  • _DBC : debug_frmwrk.h
  • _DBD : debug_frmwrk.h
  • _DBD16 : debug_frmwrk.h
  • _DBD32 : debug_frmwrk.h
  • _DBG : debug_frmwrk.h
  • _DBG_ : debug_frmwrk.h
  • _DBGFWK : lpc17xx_libcfg.h , lpc17xx_libcfg_default.h , lpc17xx_libcfg.h
  • _DBH : debug_frmwrk.h
  • _DBH16 : debug_frmwrk.h
  • _DBH32 : debug_frmwrk.h
  • _DG : debug_frmwrk.h
  • _EMAC : lpc17xx_libcfg_default.h , lpc17xx_libcfg.h
  • _EXT_IRQ : extint_sleep.c
  • _EXTI : lpc17xx_libcfg_default.h , lpc17xx_libcfg.h
  • _EXTINT : extint_sleep.c
  • _fstat_r() : syscalls.c
  • _GLCD_Cmd_t : drv_glcd.h
  • _GLCD_CmdDir_t : drv_glcd.h
  • _GLCD_ISS_t : drv_glcd.h
  • _GLCD_Status_t : drv_glcd.h
  • _GPDMA : lpc17xx_libcfg_default.h , lpc17xx_libcfg.h
  • _GPIO : lpc17xx_libcfg_default.h , lpc17xx_libcfg.h
  • _I2C : lpc17xx_libcfg.h , lpc17xx_libcfg_default.h , lpc17xx_libcfg.h
  • _I2C0 : lpc17xx_libcfg_default.h , lpc17xx_libcfg.h
  • _I2C1 : lpc17xx_libcfg_default.h , lpc17xx_libcfg.h
  • _I2C2 : lpc17xx_libcfg.h , lpc17xx_libcfg_default.h , lpc17xx_libcfg.h
  • _I2S : lpc17xx_libcfg.h , lpc17xx_libcfg_default.h , lpc17xx_libcfg.h
  • _isatty_r() : syscalls.c
  • _lseek_r() : syscalls.c
  • _MCPWM : lpc17xx_libcfg.h , lpc17xx_libcfg_default.h , lpc17xx_libcfg.h
  • _PWM : lpc17xx_libcfg.h , lpc17xx_libcfg_default.h , lpc17xx_libcfg.h
  • _PWM1 : lpc17xx_libcfg_default.h , lpc17xx_libcfg.h
  • _QEI : lpc17xx_libcfg_default.h , lpc17xx_libcfg.h
  • _read_r() : syscalls.c
  • _RIT : lpc17xx_libcfg_default.h , lpc17xx_libcfg.h
  • _RTC : lpc17xx_libcfg.h , lpc17xx_libcfg_default.h
  • _SBF : lpc_types.h
  • _sbrk_r() : syscalls.c
  • _sd_connect_status : spi_sdcard.c
  • _sd_error : spi_sdcard.c
  • _SPI : lpc17xx_libcfg.h , lpc17xx_libcfg_default.h
  • _SSP : lpc17xx_libcfg_default.h , lpc17xx_libcfg.h
  • _SSP0 : lpc17xx_libcfg_default.h , lpc17xx_libcfg.h
  • _SSP1 : lpc17xx_libcfg_default.h , lpc17xx_libcfg.h
  • _sys_exit() : Retarget.c
  • _SYSTICK : lpc17xx_libcfg_default.h , lpc17xx_libcfg.h
  • _tickVal : tcpip.c
  • _TIM : lpc17xx_libcfg_default.h , lpc17xx_libcfg.h
  • _ttywrch() : Retarget.c
  • _UART : lpc17xx_libcfg.h , lpc17xx_libcfg_default.h , lpc17xx_libcfg.h
  • _UART0 : lpc17xx_libcfg.h , lpc17xx_libcfg_default.h , lpc17xx_libcfg.h
  • _UART1 : lpc17xx_libcfg.h , lpc17xx_libcfg_default.h , lpc17xx_libcfg.h
  • _UART2 : lpc17xx_libcfg.h , lpc17xx_libcfg_default.h
  • _UART3 : lpc17xx_libcfg_default.h , lpc17xx_libcfg.h
  • _USB_DMA : lpc17xx_libcfg_default.h
  • _USBDEV : lpc17xx_libcfg_default.h
  • _WDT : lpc17xx_libcfg.h , lpc17xx_libcfg_default.h , lpc17xx_libcfg.h
  • _write_r() : syscalls.c
Generated on Tue Jun 7 15:00:15 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/SysTick/10ms_base/10ms_base.c Source File

C:/nxpdrv/LPC1700CMSIS/Examples/SysTick/10ms_base/10ms_base.c

Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          10ms_base.c                             2010-05-21
00003 */
00026 #include "lpc17xx_libcfg.h"
00027 #include "lpc17xx_gpio.h"
00028 #include "lpc17xx_systick.h"
00029
00030 /* Example group ----------------------------------------------------------- */
00036 /************************** PRIVATE VARIABLES *************************/
00037 FunctionalState Cur_State = ENABLE;
00038
00039 /************************** PRIVATE FUNCTIONS *************************/
00040 void SysTick_Handler(void);
00041
00042 /*----------------- INTERRUPT SERVICE ROUTINES --------------------------*/
00043 /*********************************************************************/
00048 void SysTick_Handler(void)
00049 {
00050         //Clear System Tick counter flag
00051         SYSTICK_ClearCounterFlag();
00052         //toggle P0.0
00053         if (Cur_State == ENABLE)
00054         {
00055                 //pull-down pin
00056                 GPIO_ClearValue(0, (1<<0));
00057                 Cur_State = DISABLE;
00058         }
00059         else
00060         {
00061                 GPIO_SetValue(0, (1<<0));
00062                 Cur_State = ENABLE;
00063         }
00064 }
00065
00066
00067 /*-------------------------MAIN FUNCTION------------------------------*/
00068 /*********************************************************************/
00073 int c_entry (void)
00074 {
00075         //Use P0.0 to test System Tick interrupt
00076         GPIO_SetDir(0, (1<<0), 1); //Set P0.0 as output
00077
00078         //Initialize System Tick with 10ms time interval
00079         SYSTICK_InternalInit(10);
00080         //Enable System Tick interrupt
00081         SYSTICK_IntCmd(ENABLE);
00082         //Enable System Tick Counter
00083         SYSTICK_Cmd(ENABLE);
00084
00085         while(1);
00086         return 1;
00087 }
00088
00089
00090 /* With ARM and GHS toolsets, the entry point is main() - this will
00091    allow the linker to generate wrapper code to setup stacks, allocate
00092    heap area, and initialize and copy code and data segments. For GNU
00093    toolsets, the entry point is through __start() in the crt0_gnu.asm
00094    file, and that startup code will setup stacks and data */
00095 int main(void)
00096 {
00097     return c_entry();
00098 }
00099
00100 #ifdef  DEBUG
00101 /*******************************************************************************
00102 * @brief                Reports the name of the source file and the source line number
00103 *                               where the CHECK_PARAM error has occurred.
00104 * @param[in]    file Pointer to the source file name
00105 * @param[in]    line assert_param error line source number
00106 * @return               None
00107 *******************************************************************************/
00108 void check_failed(uint8_t *file, uint32_t line)
00109 {
00110         /* User can add his own implementation to report the file name and line number,
00111          ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
00112
00113         /* Infinite loop */
00114         while(1);
00115 }
00116 #endif
00117
00118 /*
00119  * @}
00120  */
Generated on Tue Jun 7 14:59:02 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/ADC/Burst/lpc17xx_libcfg.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/ADC/Burst/lpc17xx_libcfg.h

Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          lpc17xx_libcfg.h                        2010-05-21
00003 */
00026 #ifndef LPC17XX_LIBCFG_H_
00027 #define LPC17XX_LIBCFG_H_
00028
00029 #include "lpc_types.h"
00030
00031
00032 /************************** DEBUG MODE DEFINITIONS *********************************/
00033 /* Un-comment the line below to compile the library in DEBUG mode, this will expanse
00034    the "CHECK_PARAM" macro in the FW library code */
00035
00036 #define DEBUG
00037
00038
00039 /******************* PERIPHERAL FW LIBRARY CONFIGURATION DEFINITIONS ***********************/
00040
00041 /* Comment the line below to disable the specific peripheral inclusion */
00042
00043 /* DEBUG_FRAMWORK -------------------- */
00044 #define _DBGFWK
00045
00046 /* GPIO ------------------------------- */
00047 #define _GPIO
00048
00049 /* EXTI ------------------------------- */
00050 //#define _EXTI
00051
00052 /* UART ------------------------------- */
00053 #define _UART
00054 #define _UART0
00055 //#define _UART1
00056 //#define _UART2
00057 //#define _UART3
00058
00059 /* SPI ------------------------------- */
00060 //#define _SPI
00061
00062 /* SYSTICK --------------------------- */
00063 //#define _SYSTICK
00064
00065 /* SSP ------------------------------- */
00066 //#define _SSP
00067 //#define _SSP0
00068 //#define _SSP1
00069
00070
00071 /* I2C ------------------------------- */
00072 //#define _I2C
00073 //#define _I2C0
00074 //#define _I2C1
00075 //#define _I2C2
00076
00077 /* TIMER ------------------------------- */
00078 //#define _TIM
00079
00080 /* WDT ------------------------------- */
00081 //#define _WDT
00082
00083
00084 /* GPDMA ------------------------------- */
00085 //#define _GPDMA
00086
00087
00088 /* DAC ------------------------------- */
00089 //#define _DAC
00090
00091 /* DAC ------------------------------- */
00092 #define _ADC
00093
00094
00095 /* PWM ------------------------------- */
00096 //#define _PWM
00097 //#define _PWM1
00098
00099 /* RTC ------------------------------- */
00100 //#define _RTC
00101
00102 /* I2S ------------------------------- */
00103 //#define _I2S
00104
00105 /* USB device ------------------------------- */
00106 //#define _USBDEV
00107 //#define _USB_DMA
00108
00109 /* QEI ------------------------------- */
00110 //#define _QEI
00111
00112 /* MCPWM ------------------------------- */
00113 //#define _MCPWM
00114
00115 /* CAN--------------------------------*/
00116 //#define _CAN
00117
00118 /* RIT ------------------------------- */
00119 //#define _RIT
00120
00121 /* EMAC ------------------------------ */
00122 //#define _EMAC
00123
00124 /************************** GLOBAL/PUBLIC MACRO DEFINITIONS *********************************/
00125
00126 #ifdef  DEBUG
00127 /*******************************************************************************
00128 * @brief                The CHECK_PARAM macro is used for function's parameters check.
00129 *                               It is used only if the library is compiled in DEBUG mode.
00130 * @param[in]    expr - If expr is false, it calls check_failed() function
00131 *                       which reports the name of the source file and the source
00132 *                       line number of the call that failed.
00133 *                    - If expr is true, it returns no value.
00134 * @return               None
00135 *******************************************************************************/
00136 #define CHECK_PARAM(expr) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))
00137 #else
00138 #define CHECK_PARAM(expr)
00139 #endif /* DEBUG */
00140
00141
00142
00143 /************************** GLOBAL/PUBLIC FUNCTION DECLARATION *********************************/
00144
00145 #ifdef  DEBUG
00146 void check_failed(uint8_t *file, uint32_t line);
00147 #endif
00148
00149
00150 #endif /* LPC17XX_LIBCFG_H_ */
Generated on Tue Jun 7 14:58:56 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/ADC/DMA/lpc17xx_libcfg.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/ADC/DMA/lpc17xx_libcfg.h

Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          lpc17xx_libcfg.h                        2010-05-21
00003 */
00026 #ifndef LPC17XX_LIBCFG_H_
00027 #define LPC17XX_LIBCFG_H_
00028
00029 #include "lpc_types.h"
00030
00031
00032 /************************** DEBUG MODE DEFINITIONS *********************************/
00033 /* Un-comment the line below to compile the library in DEBUG mode, this will expanse
00034    the "CHECK_PARAM" macro in the FW library code */
00035
00036 #define DEBUG
00037
00038
00039 /******************* PERIPHERAL FW LIBRARY CONFIGURATION DEFINITIONS ***********************/
00040
00041 /* Comment the line below to disable the specific peripheral inclusion */
00042
00043 /* DEBUG_FRAMWORK -------------------- */
00044 #define _DBGFWK
00045
00046 /* GPIO ------------------------------- */
00047 //#define _GPIO
00048
00049 /* EXTI ------------------------------- */
00050 //#define _EXTI
00051
00052 /* UART ------------------------------- */
00053 #define _UART
00054 #define _UART0
00055 //#define _UART1
00056 //#define _UART2
00057 //#define _UART3
00058
00059 /* SPI ------------------------------- */
00060 //#define _SPI
00061
00062 /* SYSTICK --------------------------- */
00063 //#define _SYSTICK
00064
00065 /* SSP ------------------------------- */
00066 //#define _SSP
00067 //#define _SSP0
00068 //#define _SSP1
00069
00070
00071 /* I2C ------------------------------- */
00072 //#define _I2C
00073 //#define _I2C0
00074 //#define _I2C1
00075 //#define _I2C2
00076
00077 /* TIMER ------------------------------- */
00078 //#define _TIM
00079
00080 /* WDT ------------------------------- */
00081 //#define _WDT
00082
00083
00084 /* GPDMA ------------------------------- */
00085 #define _GPDMA
00086
00087
00088 /* DAC ------------------------------- */
00089 //#define _DAC
00090
00091 /* DAC ------------------------------- */
00092 #define _ADC
00093
00094
00095 /* PWM ------------------------------- */
00096 //#define _PWM
00097 //#define _PWM1
00098
00099 /* RTC ------------------------------- */
00100 //#define _RTC
00101
00102 /* I2S ------------------------------- */
00103 //#define _I2S
00104
00105 /* USB device ------------------------------- */
00106 //#define _USBDEV
00107 //#define _USB_DMA
00108
00109 /* QEI ------------------------------- */
00110 //#define _QEI
00111
00112 /* MCPWM ------------------------------- */
00113 //#define _MCPWM
00114
00115 /* CAN--------------------------------*/
00116 //#define _CAN
00117
00118 /* RIT ------------------------------- */
00119 //#define _RIT
00120
00121 /* EMAC ------------------------------ */
00122 //#define _EMAC
00123
00124 /************************** GLOBAL/PUBLIC MACRO DEFINITIONS *********************************/
00125
00126 #ifdef  DEBUG
00127 /*******************************************************************************
00128 * @brief                The CHECK_PARAM macro is used for function's parameters check.
00129 *                               It is used only if the library is compiled in DEBUG mode.
00130 * @param[in]    expr - If expr is false, it calls check_failed() function
00131 *                       which reports the name of the source file and the source
00132 *                       line number of the call that failed.
00133 *                    - If expr is true, it returns no value.
00134 * @return               None
00135 *******************************************************************************/
00136 #define CHECK_PARAM(expr) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))
00137 #else
00138 #define CHECK_PARAM(expr)
00139 #endif /* DEBUG */
00140
00141
00142
00143 /************************** GLOBAL/PUBLIC FUNCTION DECLARATION *********************************/
00144
00145 #ifdef  DEBUG
00146 void check_failed(uint8_t *file, uint32_t line);
00147 #endif
00148
00149
00150 #endif /* LPC17XX_LIBCFG_H_ */
Generated on Tue Jun 7 14:58:56 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/ADC/HardwareTrigger/lpc17xx_libcfg.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/ADC/HardwareTrigger/lpc17xx_libcfg.h

Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          lpc17xx_libcfg.h                        2010-05-21
00003 */
00026 #ifndef LPC17XX_LIBCFG_H_
00027 #define LPC17XX_LIBCFG_H_
00028
00029 #include "lpc_types.h"
00030
00031
00032 /************************** DEBUG MODE DEFINITIONS *********************************/
00033 /* Un-comment the line below to compile the library in DEBUG mode, this will expanse
00034    the "CHECK_PARAM" macro in the FW library code */
00035
00036 #define DEBUG
00037
00038
00039 /******************* PERIPHERAL FW LIBRARY CONFIGURATION DEFINITIONS ***********************/
00040
00041 /* Comment the line below to disable the specific peripheral inclusion */
00042
00043 /* DEBUG_FRAMWORK -------------------- */
00044 #define _DBGFWK
00045
00046 /* GPIO ------------------------------- */
00047 //#define _GPIO
00048
00049 /* EXTI ------------------------------- */
00050 //#define _EXTI
00051
00052 /* UART ------------------------------- */
00053 #define _UART
00054 #define _UART0
00055 //#define _UART1
00056 //#define _UART2
00057 //#define _UART3
00058
00059 /* SPI ------------------------------- */
00060 //#define _SPI
00061
00062 /* SYSTICK --------------------------- */
00063 //#define _SYSTICK
00064
00065 /* SSP ------------------------------- */
00066 //#define _SSP
00067 //#define _SSP0
00068 //#define _SSP1
00069
00070
00071 /* I2C ------------------------------- */
00072 //#define _I2C
00073 //#define _I2C0
00074 //#define _I2C1
00075 //#define _I2C2
00076
00077 /* TIMER ------------------------------- */
00078 //#define _TIM
00079
00080 /* WDT ------------------------------- */
00081 //#define _WDT
00082
00083
00084 /* GPDMA ------------------------------- */
00085 //#define _GPDMA
00086
00087
00088 /* DAC ------------------------------- */
00089 //#define _DAC
00090
00091 /* DAC ------------------------------- */
00092 #define _ADC
00093
00094
00095 /* PWM ------------------------------- */
00096 //#define _PWM
00097 //#define _PWM1
00098
00099 /* RTC ------------------------------- */
00100 //#define _RTC
00101
00102 /* I2S ------------------------------- */
00103 //#define _I2S
00104
00105 /* USB device ------------------------------- */
00106 //#define _USBDEV
00107 //#define _USB_DMA
00108
00109 /* QEI ------------------------------- */
00110 //#define _QEI
00111
00112 /* MCPWM ------------------------------- */
00113 //#define _MCPWM
00114
00115 /* CAN--------------------------------*/
00116 //#define _CAN
00117
00118 /* RIT ------------------------------- */
00119 //#define _RIT
00120
00121 /* EMAC ------------------------------ */
00122 //#define _EMAC
00123
00124 /************************** GLOBAL/PUBLIC MACRO DEFINITIONS *********************************/
00125
00126 #ifdef  DEBUG
00127 /*******************************************************************************
00128 * @brief                The CHECK_PARAM macro is used for function's parameters check.
00129 *                               It is used only if the library is compiled in DEBUG mode.
00130 * @param[in]    expr - If expr is false, it calls check_failed() function
00131 *                       which reports the name of the source file and the source
00132 *                       line number of the call that failed.
00133 *                    - If expr is true, it returns no value.
00134 * @return               None
00135 *******************************************************************************/
00136 #define CHECK_PARAM(expr) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))
00137 #else
00138 #define CHECK_PARAM(expr)
00139 #endif /* DEBUG */
00140
00141
00142
00143 /************************** GLOBAL/PUBLIC FUNCTION DECLARATION *********************************/
00144
00145 #ifdef  DEBUG
00146 void check_failed(uint8_t *file, uint32_t line);
00147 #endif
00148
00149
00150 #endif /* LPC17XX_LIBCFG_H_ */
Generated on Tue Jun 7 14:58:56 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/ADC/INTERRUPT/lpc17xx_libcfg.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/ADC/INTERRUPT/lpc17xx_libcfg.h

Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          lpc17xx_libcfg.h                        2010-05-21
00003 */
00026 #ifndef LPC17XX_LIBCFG_H_
00027 #define LPC17XX_LIBCFG_H_
00028
00029 #include "lpc_types.h"
00030
00031
00032 /************************** DEBUG MODE DEFINITIONS *********************************/
00033 /* Un-comment the line below to compile the library in DEBUG mode, this will expanse
00034    the "CHECK_PARAM" macro in the FW library code */
00035
00036 #define DEBUG
00037
00038
00039 /******************* PERIPHERAL FW LIBRARY CONFIGURATION DEFINITIONS ***********************/
00040
00041 /* Comment the line below to disable the specific peripheral inclusion */
00042
00043 /* DEBUG_FRAMWORK ------------------------------ */
00044 #define _DBGFWK
00045
00046 /* GPIO ------------------------------- */
00047 //#define _GPIO
00048
00049 /* EXTI ------------------------------- */
00050 //#define _EXTI
00051
00052 /* UART ------------------------------- */
00053 #define _UART
00054 #define _UART0
00055 //#define _UART1
00056 //#define _UART2
00057 //#define _UART3
00058
00059 /* SPI ------------------------------- */
00060 //#define _SPI
00061
00062 /* SYSTICK --------------------------- */
00063 //#define _SYSTICK
00064
00065 /* SSP ------------------------------- */
00066 //#define _SSP
00067 //#define _SSP0
00068 //#define _SSP1
00069
00070
00071 /* I2C ------------------------------- */
00072 //#define _I2C
00073 //#define _I2C0
00074 //#define _I2C1
00075 //#define _I2C2
00076
00077 /* TIMER ------------------------------- */
00078 //#define _TIM
00079
00080 /* WDT ------------------------------- */
00081 //#define _WDT
00082
00083
00084 /* GPDMA ------------------------------- */
00085 //#define _GPDMA
00086
00087
00088 /* DAC ------------------------------- */
00089 //#define _DAC
00090
00091 /* DAC ------------------------------- */
00092 #define _ADC
00093
00094
00095 /* PWM ------------------------------- */
00096 //#define _PWM
00097 //#define _PWM1
00098
00099 /* RTC ------------------------------- */
00100 //#define _RTC
00101
00102 /* I2S ------------------------------- */
00103 //#define _I2S
00104
00105 /* USB device ------------------------------- */
00106 //#define _USBDEV
00107 //#define _USB_DMA
00108
00109 /* QEI ------------------------------- */
00110 //#define _QEI
00111
00112 /* MCPWM ------------------------------- */
00113 //#define _MCPWM
00114
00115 /* CAN--------------------------------*/
00116 //#define _CAN
00117
00118 /* RIT ------------------------------- */
00119 //#define _RIT
00120
00121 /* EMAC ------------------------------ */
00122 //#define _EMAC
00123
00124 /************************** GLOBAL/PUBLIC MACRO DEFINITIONS *********************************/
00125
00126 #ifdef  DEBUG
00127 /*******************************************************************************
00128 * @brief                The CHECK_PARAM macro is used for function's parameters check.
00129 *                               It is used only if the library is compiled in DEBUG mode.
00130 * @param[in]    expr - If expr is false, it calls check_failed() function
00131 *                       which reports the name of the source file and the source
00132 *                       line number of the call that failed.
00133 *                    - If expr is true, it returns no value.
00134 * @return               None
00135 *******************************************************************************/
00136 #define CHECK_PARAM(expr) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))
00137 #else
00138 #define CHECK_PARAM(expr)
00139 #endif /* DEBUG */
00140
00141
00142
00143 /************************** GLOBAL/PUBLIC FUNCTION DECLARATION *********************************/
00144
00145 #ifdef  DEBUG
00146 void check_failed(uint8_t *file, uint32_t line);
00147 #endif
00148
00149
00150 #endif /* LPC17XX_LIBCFG_H_ */
Generated on Tue Jun 7 14:58:56 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/ADC/Polling/lpc17xx_libcfg.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/ADC/Polling/lpc17xx_libcfg.h

Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          lpc17xx_libcfg.h                        2010-05-21
00003 */
00026 #ifndef LPC17XX_LIBCFG_H_
00027 #define LPC17XX_LIBCFG_H_
00028
00029 #include "lpc_types.h"
00030
00031
00032 /************************** DEBUG MODE DEFINITIONS *********************************/
00033 /* Un-comment the line below to compile the library in DEBUG mode, this will expanse
00034    the "CHECK_PARAM" macro in the FW library code */
00035
00036 #define DEBUG
00037
00038
00039 /******************* PERIPHERAL FW LIBRARY CONFIGURATION DEFINITIONS ***********************/
00040
00041 /* Comment the line below to disable the specific peripheral inclusion */
00042
00043 /* DEBUG_FRAMWORK ------------------------------ */
00044 #define _DBGFWK
00045
00046 /* GPIO ------------------------------- */
00047 //#define _GPIO
00048
00049 /* EXTI ------------------------------- */
00050 //#define _EXTI
00051
00052 /* UART ------------------------------- */
00053 #define _UART
00054 #define _UART0
00055 //#define _UART1
00056 //#define _UART2
00057 //#define _UART3
00058
00059 /* SPI ------------------------------- */
00060 //#define _SPI
00061
00062 /* SYSTICK --------------------------- */
00063 //#define _SYSTICK
00064
00065 /* SSP ------------------------------- */
00066 //#define _SSP
00067 //#define _SSP0
00068 //#define _SSP1
00069
00070
00071 /* I2C ------------------------------- */
00072 //#define _I2C
00073 //#define _I2C0
00074 //#define _I2C1
00075 //#define _I2C2
00076
00077 /* TIMER ------------------------------- */
00078 //#define _TIM
00079
00080 /* WDT ------------------------------- */
00081 //#define _WDT
00082
00083
00084 /* GPDMA ------------------------------- */
00085 //#define _GPDMA
00086
00087
00088 /* DAC ------------------------------- */
00089 //#define _DAC
00090
00091 /* DAC ------------------------------- */
00092 #define _ADC
00093
00094
00095 /* PWM ------------------------------- */
00096 //#define _PWM
00097 //#define _PWM1
00098
00099 /* RTC ------------------------------- */
00100 //#define _RTC
00101
00102 /* I2S ------------------------------- */
00103 //#define _I2S
00104
00105 /* USB device ------------------------------- */
00106 //#define _USBDEV
00107 //#define _USB_DMA
00108
00109 /* QEI ------------------------------- */
00110 //#define _QEI
00111
00112 /* MCPWM ------------------------------- */
00113 //#define _MCPWM
00114
00115 /* CAN--------------------------------*/
00116 //#define _CAN
00117
00118 /* RIT ------------------------------- */
00119 //#define _RIT
00120
00121 /* EMAC ------------------------------ */
00122 //#define _EMAC
00123
00124 /************************** GLOBAL/PUBLIC MACRO DEFINITIONS *********************************/
00125
00126 #ifdef  DEBUG
00127 /*******************************************************************************
00128 * @brief                The CHECK_PARAM macro is used for function's parameters check.
00129 *                               It is used only if the library is compiled in DEBUG mode.
00130 * @param[in]    expr - If expr is false, it calls check_failed() function
00131 *                       which reports the name of the source file and the source
00132 *                       line number of the call that failed.
00133 *                    - If expr is true, it returns no value.
00134 * @return               None
00135 *******************************************************************************/
00136 #define CHECK_PARAM(expr) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))
00137 #else
00138 #define CHECK_PARAM(expr)
00139 #endif /* DEBUG */
00140
00141
00142
00143 /************************** GLOBAL/PUBLIC FUNCTION DECLARATION *********************************/
00144
00145 #ifdef  DEBUG
00146 void check_failed(uint8_t *file, uint32_t line);
00147 #endif
00148
00149
00150 #endif /* LPC17XX_LIBCFG_H_ */
Generated on Tue Jun 7 14:58:56 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/Easy_Web/ADC.c Source File

C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/Easy_Web/ADC.c

Go to the documentation of this file.
00001 /*----------------------------------------------------------------------------
00002  * Name:    ADC.c
00003  * Purpose: MCB1700 low level ADC functions
00004  * Version: V1.00
00005  * Note(s):
00006  *----------------------------------------------------------------------------
00007  * This file is part of the uVision/ARM development tools.
00008  * This software may only be used under the terms of a valid, current,
00009  * end user licence from KEIL for a compatible version of KEIL software
00010  * development tools. Nothing else gives you the right to use this software.
00011  *
00012  * This software is supplied "AS IS" without warranties of any kind.
00013  *
00014  * Copyright (c) 2009 Keil - An ARM Company. All rights reserved.
00015  *----------------------------------------------------------------------------
00016  * History:
00017  *          V1.00 Initial Version
00018  *----------------------------------------------------------------------------*/
00019
00020 #include "LPC17xx.h"                             /* LPC17xx definitions */
00021 #include "ADC.h"
00022
00023 /*----------------------------------------------------------------------------
00024   initialize ADC Pins
00025  *----------------------------------------------------------------------------*/
00026 void ADC_init (void) {
00027 #ifdef MCB_LPC_1768
00028         /* Using MCB1700 board :
00029          * ADC channel 2 is available
00030          */
00031   LPC_PINCON->PINSEL1 &= ~(3<<18);                   /* P0.25 is GPIO */
00032   LPC_PINCON->PINSEL1 |=  (1<<18);                   /* P0.25 is AD0.2 */
00033
00034   LPC_SC->PCONP       |=  (1<<12);                   /* Enable power to ADC block */
00035
00036   LPC_ADC->ADCR        =  (1<< 2) |                  /* select AD0.2 pin */
00037                       (1<< 8) |
00038                       (1<<21);                   /* enable ADC */
00039 #elif defined(IAR_LPC_1768)
00040   /* Using IAR LPC1768 KickStart board
00041    * ADC channel 5 is available
00042    */
00043    LPC_PINCON->PINSEL3 |=  (3<<30);                   /* P1.31 is AD0.5 */
00044
00045    LPC_SC->PCONP       |=  (1<<12);                   /* Enable power to ADC block */
00046
00047    LPC_ADC->ADCR        =  (1<<5) |               /* select AD0.5 pin */
00048                        (1<< 8) |
00049                        (1<<21);                   /* enable ADC */
00050 #endif
00051 }
00052
00053
00054 /*----------------------------------------------------------------------------
00055   start ADC Conversion
00056  *----------------------------------------------------------------------------*/
00057 void ADC_startCnv (void) {
00058         LPC_ADC->ADCR &= ~(7<<24);                         /* stop conversion  */
00059         LPC_ADC->ADCR |=  (1<<24);                         /* start conversion */
00060 }
00061
00062
00063 /*----------------------------------------------------------------------------
00064   stop ADC Conversion
00065  *----------------------------------------------------------------------------*/
00066 void ADC_stopCnv (void) {
00067         LPC_ADC->ADCR &= ~(7<<24);                         /* stop conversion */
00068 }
00069
00070
00071 /*----------------------------------------------------------------------------
00072   get converted ADC value
00073  *----------------------------------------------------------------------------*/
00074 uint32_t ADC_getCnv (void) {
00075   uint32_t adGdr;
00076
00077   while (!(LPC_ADC->ADGDR & (1UL<<31)));             /* Wait for Conversion end */
00078   adGdr = LPC_ADC->ADGDR;
00079   return((adGdr >> 4) & ADC_VALUE_MAX);          /* read converted value */
00080 }
Generated on Tue Jun 7 14:58:59 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/Easy_Web/ADC.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/Easy_Web/ADC.h

Go to the documentation of this file.
00001 /*----------------------------------------------------------------------------
00002  * Name:    ADC.h
00003  * Purpose: MCB1700 low level ADC definitions
00004  * Version: V1.00
00005  * Note(s):
00006  *----------------------------------------------------------------------------
00007  * This file is part of the uVision/ARM development tools.
00008  * This software may only be used under the terms of a valid, current,
00009  * end user licence from KEIL for a compatible version of KEIL software
00010  * development tools. Nothing else gives you the right to use this software.
00011  *
00012  * This software is supplied "AS IS" without warranties of any kind.
00013  *
00014  * Copyright (c) 2009 Keil - An ARM Company. All rights reserved.
00015  *----------------------------------------------------------------------------
00016  * History:
00017  *          V1.00 Initial Version
00018  *----------------------------------------------------------------------------*/
00019
00020 #ifndef __ADC_H
00021 #define __ADC_H
00022
00023 #include "lpc_types.h"
00024
00025 #define ADC_VALUE_MAX 0xFFF
00026
00027
00028 extern void     ADC_init    (void);
00029 extern void     ADC_startCnv(void);
00030 extern void     ADC_stopCnv (void);
00031 extern uint32_t ADC_getCnv  (void);
00032
00033 #endif
Generated on Tue Jun 7 14:58:59 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/CAN/CAN_LedControl/lpc17xx_libcfg.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/CAN/CAN_LedControl/lpc17xx_libcfg.h

Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          lpc17xx_libcfg.h                        2010-05-21
00003 */
00026 #ifndef LPC17XX_LIBCFG_H_
00027 #define LPC17XX_LIBCFG_H_
00028
00029 #include "lpc_types.h"
00030
00031
00032 /************************** DEBUG MODE DEFINITIONS *********************************/
00033 /* Un-comment the line below to compile the library in DEBUG mode, this will expanse
00034    the "CHECK_PARAM" macro in the FW library code */
00035
00036 #define DEBUG
00037
00038
00039 /******************* PERIPHERAL FW LIBRARY CONFIGURATION DEFINITIONS ***********************/
00040
00041 /* Comment the line below to disable the specific peripheral inclusion */
00042
00043 /* DEBUG_FRAMWORK ------------------------------ */
00044 #define _DBGFWK
00045
00046 /* GPIO ------------------------------- */
00047 #define _GPIO
00048
00049 /* EXTI ------------------------------- */
00050 //#define _EXTI
00051
00052 /* UART ------------------------------- */
00053 #define _UART
00054 #define _UART0
00055 //#define _UART1
00056 //#define _UART2
00057 //#define _UART3
00058
00059 /* SPI ------------------------------- */
00060 //#define _SPI
00061
00062 /* SSP ------------------------------- */
00063 //#define _SSP
00064 //#define _SSP0
00065 //#define _SSP1
00066
00067 /* SYSTICK --------------------------- */
00068 //#define _SYSTICK
00069
00070 /* I2C ------------------------------- */
00071 //#define _I2C
00072 //#define _I2C0
00073 //#define _I2C1
00074 //#define _I2C2
00075
00076 /* TIMER ------------------------------- */
00077 //#define _TIM
00078
00079 /* WDT ------------------------------- */
00080 //#define _WDT
00081
00082
00083 /* GPDMA ------------------------------- */
00084 //#define _GPDMA
00085
00086
00087 /* DAC ------------------------------- */
00088 //#define _DAC
00089
00090 /* DAC ------------------------------- */
00091 //#define _ADC
00092
00093
00094 /* PWM ------------------------------- */
00095 //#define _PWM
00096 //#define _PWM1
00097
00098 /* RTC ------------------------------- */
00099 //#define _RTC
00100
00101 /* I2S ------------------------------- */
00102 //#define _I2S
00103
00104 /* USB device ------------------------------- */
00105 //#define _USBDEV
00106 //#define _USB_DMA
00107
00108 /* QEI ------------------------------- */
00109 //#define _QEI
00110
00111 /* MCPWM ------------------------------- */
00112 //#define _MCPWM
00113
00114 /* CAN--------------------------------*/
00115 #define _CAN
00116
00117 /* RIT ------------------------------- */
00118 //#define _RIT
00119
00120 /* EMAC ------------------------------ */
00121 //#define _EMAC
00122
00123 /************************** GLOBAL/PUBLIC MACRO DEFINITIONS *********************************/
00124
00125 #ifdef  DEBUG
00126 /*******************************************************************************
00127 * @brief                The CHECK_PARAM macro is used for function's parameters check.
00128 *                               It is used only if the library is compiled in DEBUG mode.
00129 * @param[in]    expr - If expr is false, it calls check_failed() function
00130 *                       which reports the name of the source file and the source
00131 *                       line number of the call that failed.
00132 *                    - If expr is true, it returns no value.
00133 * @return               None
00134 *******************************************************************************/
00135 #define CHECK_PARAM(expr) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))
00136 #else
00137 #define CHECK_PARAM(expr)
00138 #endif /* DEBUG */
00139
00140
00141
00142 /************************** GLOBAL/PUBLIC FUNCTION DECLARATION *********************************/
00143
00144 #ifdef  DEBUG
00145 void check_failed(uint8_t *file, uint32_t line);
00146 #endif
00147
00148
00149 #endif /* LPC17XX_LIBCFG_H_ */
Generated on Tue Jun 7 14:58:56 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/CAN/CAN_self_test/lpc17xx_libcfg.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/CAN/CAN_self_test/lpc17xx_libcfg.h

Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          lpc17xx_libcfg.h                        2010-05-21
00003 */
00026 #ifndef LPC17XX_LIBCFG_H_
00027 #define LPC17XX_LIBCFG_H_
00028
00029 #include "lpc_types.h"
00030
00031
00032 /************************** DEBUG MODE DEFINITIONS *********************************/
00033 /* Un-comment the line below to compile the library in DEBUG mode, this will expanse
00034    the "CHECK_PARAM" macro in the FW library code */
00035
00036 #define DEBUG
00037
00038
00039 /******************* PERIPHERAL FW LIBRARY CONFIGURATION DEFINITIONS ***********************/
00040
00041 /* Comment the line below to disable the specific peripheral inclusion */
00042
00043 /* DEBUG_FRAMWORK ------------------------------ */
00044 #define _DBGFWK
00045
00046 /* GPIO ------------------------------- */
00047 #define _GPIO
00048
00049 /* EXTI ------------------------------- */
00050 //#define _EXTI
00051
00052 /* UART ------------------------------- */
00053 #define _UART
00054 #define _UART0
00055 //#define _UART1
00056 //#define _UART2
00057 //#define _UART3
00058
00059 /* SPI ------------------------------- */
00060 //#define _SPI
00061
00062 /* SSP ------------------------------- */
00063 //#define _SSP
00064 //#define _SSP0
00065 //#define _SSP1
00066
00067 /* SYSTICK --------------------------- */
00068 //#define _SYSTICK
00069
00070 /* I2C ------------------------------- */
00071 //#define _I2C
00072 //#define _I2C0
00073 //#define _I2C1
00074 //#define _I2C2
00075
00076 /* TIMER ------------------------------- */
00077 //#define _TIM
00078
00079 /* WDT ------------------------------- */
00080 //#define _WDT
00081
00082
00083 /* GPDMA ------------------------------- */
00084 //#define _GPDMA
00085
00086
00087 /* DAC ------------------------------- */
00088 //#define _DAC
00089
00090 /* DAC ------------------------------- */
00091 //#define _ADC
00092
00093
00094 /* PWM ------------------------------- */
00095 //#define _PWM
00096 //#define _PWM1
00097
00098 /* RTC ------------------------------- */
00099 //#define _RTC
00100
00101 /* I2S ------------------------------- */
00102 //#define _I2S
00103
00104 /* USB device ------------------------------- */
00105 //#define _USBDEV
00106 //#define _USB_DMA
00107
00108 /* QEI ------------------------------- */
00109 //#define _QEI
00110
00111 /* MCPWM ------------------------------- */
00112 //#define _MCPWM
00113
00114 /* CAN--------------------------------*/
00115 #define _CAN
00116
00117 /* RIT ------------------------------- */
00118 //#define _RIT
00119
00120 /* EMAC ------------------------------ */
00121 //#define _EMAC
00122
00123 /************************** GLOBAL/PUBLIC MACRO DEFINITIONS *********************************/
00124
00125 #ifdef  DEBUG
00126 /*******************************************************************************
00127 * @brief                The CHECK_PARAM macro is used for function's parameters check.
00128 *                               It is used only if the library is compiled in DEBUG mode.
00129 * @param[in]    expr - If expr is false, it calls check_failed() function
00130 *                       which reports the name of the source file and the source
00131 *                       line number of the call that failed.
00132 *                    - If expr is true, it returns no value.
00133 * @return               None
00134 *******************************************************************************/
00135 #define CHECK_PARAM(expr) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))
00136 #else
00137 #define CHECK_PARAM(expr)
00138 #endif /* DEBUG */
00139
00140
00141
00142 /************************** GLOBAL/PUBLIC FUNCTION DECLARATION *********************************/
00143
00144 #ifdef  DEBUG
00145 void check_failed(uint8_t *file, uint32_t line);
00146 #endif
00147
00148
00149 #endif /* LPC17XX_LIBCFG_H_ */
Generated on Tue Jun 7 14:58:56 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/CAN/CAN_test_aflut/lpc17xx_libcfg.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/CAN/CAN_test_aflut/lpc17xx_libcfg.h

Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          lpc17xx_libcfg.h                        2010-05-21
00003 */
00026 #ifndef LPC17XX_LIBCFG_H_
00027 #define LPC17XX_LIBCFG_H_
00028
00029 #include "lpc_types.h"
00030
00031
00032 /************************** DEBUG MODE DEFINITIONS *********************************/
00033 /* Un-comment the line below to compile the library in DEBUG mode, this will expanse
00034    the "CHECK_PARAM" macro in the FW library code */
00035
00036 #define DEBUG
00037
00038
00039 /******************* PERIPHERAL FW LIBRARY CONFIGURATION DEFINITIONS ***********************/
00040
00041 /* Comment the line below to disable the specific peripheral inclusion */
00042
00043 /* DEBUG_FRAMWORK ------------------------------ */
00044 #define _DBGFWK
00045
00046 /* GPIO ------------------------------- */
00047 //#define _GPIO
00048
00049 /* EXTI ------------------------------- */
00050 //#define _EXTI
00051
00052 /* UART ------------------------------- */
00053 #define _UART
00054 #define _UART0
00055 //#define _UART1
00056 //#define _UART2
00057 //#define _UART3
00058
00059 /* SPI ------------------------------- */
00060 //#define _SPI
00061
00062 /* SSP ------------------------------- */
00063 //#define _SSP
00064 //#define _SSP0
00065 //#define _SSP1
00066
00067 /* SYSTICK --------------------------- */
00068 //#define _SYSTICK
00069
00070 /* I2C ------------------------------- */
00071 //#define _I2C
00072 //#define _I2C0
00073 //#define _I2C1
00074 //#define _I2C2
00075
00076 /* TIMER ------------------------------- */
00077 //#define _TIM
00078
00079 /* WDT ------------------------------- */
00080 //#define _WDT
00081
00082
00083 /* GPDMA ------------------------------- */
00084 //#define _GPDMA
00085
00086
00087 /* DAC ------------------------------- */
00088 //#define _DAC
00089
00090 /* DAC ------------------------------- */
00091 //#define _ADC
00092
00093
00094 /* PWM ------------------------------- */
00095 //#define _PWM
00096 //#define _PWM1
00097
00098 /* RTC ------------------------------- */
00099 //#define _RTC
00100
00101 /* I2S ------------------------------- */
00102 //#define _I2S
00103
00104 /* USB device ------------------------------- */
00105 //#define _USBDEV
00106 //#define _USB_DMA
00107
00108 /* QEI ------------------------------- */
00109 //#define _QEI
00110
00111 /* MCPWM ------------------------------- */
00112 //#define _MCPWM
00113
00114 /* CAN--------------------------------*/
00115 #define _CAN
00116
00117 /* RIT ------------------------------- */
00118 //#define _RIT
00119
00120 /* EMAC ------------------------------ */
00121 //#define _EMAC
00122
00123 /************************** GLOBAL/PUBLIC MACRO DEFINITIONS *********************************/
00124
00125 #ifdef  DEBUG
00126 /*******************************************************************************
00127 * @brief                The CHECK_PARAM macro is used for function's parameters check.
00128 *                               It is used only if the library is compiled in DEBUG mode.
00129 * @param[in]    expr - If expr is false, it calls check_failed() function
00130 *                       which reports the name of the source file and the source
00131 *                       line number of the call that failed.
00132 *                    - If expr is true, it returns no value.
00133 * @return               None
00134 *******************************************************************************/
00135 #define CHECK_PARAM(expr) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))
00136 #else
00137 #define CHECK_PARAM(expr)
00138 #endif /* DEBUG */
00139
00140
00141
00142 /************************** GLOBAL/PUBLIC FUNCTION DECLARATION *********************************/
00143
00144 #ifdef  DEBUG
00145 void check_failed(uint8_t *file, uint32_t line);
00146 #endif
00147
00148
00149 #endif /* LPC17XX_LIBCFG_H_ */
Generated on Tue Jun 7 14:58:57 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/CAN/CAN_test_bypass_mode/lpc17xx_libcfg.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/CAN/CAN_test_bypass_mode/lpc17xx_libcfg.h

Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          lpc17xx_libcfg.h                        2010-05-21
00003 */
00026 #ifndef LPC17XX_LIBCFG_H_
00027 #define LPC17XX_LIBCFG_H_
00028
00029 #include "lpc_types.h"
00030
00031
00032 /************************** DEBUG MODE DEFINITIONS *********************************/
00033 /* Un-comment the line below to compile the library in DEBUG mode, this will expanse
00034    the "CHECK_PARAM" macro in the FW library code */
00035
00036 #define DEBUG
00037
00038
00039 /******************* PERIPHERAL FW LIBRARY CONFIGURATION DEFINITIONS ***********************/
00040
00041 /* Comment the line below to disable the specific peripheral inclusion */
00042
00043 /* DEBUG_FRAMWORK ------------------------------ */
00044 #define _DBGFWK
00045
00046 /* GPIO ------------------------------- */
00047 //#define _GPIO
00048
00049 /* EXTI ------------------------------- */
00050 //#define _EXTI
00051
00052 /* UART ------------------------------- */
00053 #define _UART
00054 #define _UART0
00055 //#define _UART1
00056 //#define _UART2
00057 //#define _UART3
00058
00059 /* SPI ------------------------------- */
00060 //#define _SPI
00061
00062 /* SSP ------------------------------- */
00063 //#define _SSP
00064 //#define _SSP0
00065 //#define _SSP1
00066
00067 /* SYSTICK --------------------------- */
00068 //#define _SYSTICK
00069
00070 /* I2C ------------------------------- */
00071 //#define _I2C
00072 //#define _I2C0
00073 //#define _I2C1
00074 //#define _I2C2
00075
00076 /* TIMER ------------------------------- */
00077 //#define _TIM
00078
00079 /* WDT ------------------------------- */
00080 //#define _WDT
00081
00082
00083 /* GPDMA ------------------------------- */
00084 //#define _GPDMA
00085
00086
00087 /* DAC ------------------------------- */
00088 //#define _DAC
00089
00090 /* DAC ------------------------------- */
00091 //#define _ADC
00092
00093
00094 /* PWM ------------------------------- */
00095 //#define _PWM
00096 //#define _PWM1
00097
00098 /* RTC ------------------------------- */
00099 //#define _RTC
00100
00101 /* I2S ------------------------------- */
00102 //#define _I2S
00103
00104 /* USB device ------------------------------- */
00105 //#define _USBDEV
00106 //#define _USB_DMA
00107
00108 /* QEI ------------------------------- */
00109 //#define _QEI
00110
00111 /* MCPWM ------------------------------- */
00112 //#define _MCPWM
00113
00114 /* CAN--------------------------------*/
00115 #define _CAN
00116
00117 /* RIT ------------------------------- */
00118 //#define _RIT
00119
00120 /* EMAC ------------------------------ */
00121 //#define _EMAC
00122
00123
00124 /************************** GLOBAL/PUBLIC MACRO DEFINITIONS *********************************/
00125
00126 #ifdef  DEBUG
00127 /*******************************************************************************
00128 * @brief                The CHECK_PARAM macro is used for function's parameters check.
00129 *                               It is used only if the library is compiled in DEBUG mode.
00130 * @param[in]    expr - If expr is false, it calls check_failed() function
00131 *                       which reports the name of the source file and the source
00132 *                       line number of the call that failed.
00133 *                    - If expr is true, it returns no value.
00134 * @return               None
00135 *******************************************************************************/
00136 #define CHECK_PARAM(expr) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))
00137 #else
00138 #define CHECK_PARAM(expr)
00139 #endif /* DEBUG */
00140
00141
00142
00143 /************************** GLOBAL/PUBLIC FUNCTION DECLARATION *********************************/
00144
00145 #ifdef  DEBUG
00146 void check_failed(uint8_t *file, uint32_t line);
00147 #endif
00148
00149
00150 #endif /* LPC17XX_LIBCFG_H_ */
Generated on Tue Jun 7 14:58:57 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/CAN/CAN_test_two_kit/lpc17xx_libcfg.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/CAN/CAN_test_two_kit/lpc17xx_libcfg.h

Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          lpc17xx_libcfg.h                        2010-05-21
00003 */
00026 #ifndef LPC17XX_LIBCFG_H_
00027 #define LPC17XX_LIBCFG_H_
00028
00029 #include "lpc_types.h"
00030
00031
00032 /************************** DEBUG MODE DEFINITIONS *********************************/
00033 /* Un-comment the line below to compile the library in DEBUG mode, this will expanse
00034    the "CHECK_PARAM" macro in the FW library code */
00035
00036 #define DEBUG
00037
00038
00039 /******************* PERIPHERAL FW LIBRARY CONFIGURATION DEFINITIONS ***********************/
00040
00041 /* Comment the line below to disable the specific peripheral inclusion */
00042
00043 /* DEBUG_FRAMWORK ------------------------------ */
00044 #define _DBGFWK
00045
00046 /* GPIO ------------------------------- */
00047 //#define _GPIO
00048
00049 /* EXTI ------------------------------- */
00050 //#define _EXTI
00051
00052 /* UART ------------------------------- */
00053 #define _UART
00054 #define _UART0
00055 //#define _UART1
00056 //#define _UART2
00057 //#define _UART3
00058
00059 /* SPI ------------------------------- */
00060 //#define _SPI
00061
00062 /* SSP ------------------------------- */
00063 //#define _SSP
00064 //#define _SSP0
00065 //#define _SSP1
00066
00067 /* SYSTICK --------------------------- */
00068 //#define _SYSTICK
00069
00070 /* I2C ------------------------------- */
00071 //#define _I2C
00072 //#define _I2C0
00073 //#define _I2C1
00074 //#define _I2C2
00075
00076 /* TIMER ------------------------------- */
00077 //#define _TIM
00078
00079 /* WDT ------------------------------- */
00080 //#define _WDT
00081
00082
00083 /* GPDMA ------------------------------- */
00084 //#define _GPDMA
00085
00086
00087 /* DAC ------------------------------- */
00088 //#define _DAC
00089
00090 /* DAC ------------------------------- */
00091 //#define _ADC
00092
00093
00094 /* PWM ------------------------------- */
00095 //#define _PWM
00096 //#define _PWM1
00097
00098 /* RTC ------------------------------- */
00099 //#define _RTC
00100
00101 /* I2S ------------------------------- */
00102 //#define _I2S
00103
00104 /* USB device ------------------------------- */
00105 //#define _USBDEV
00106 //#define _USB_DMA
00107
00108 /* QEI ------------------------------- */
00109 //#define _QEI
00110
00111 /* MCPWM ------------------------------- */
00112 //#define _MCPWM
00113
00114 /* CAN--------------------------------*/
00115 #define _CAN
00116
00117 /* RIT ------------------------------- */
00118 //#define _RIT
00119
00120 /* EMAC ------------------------------ */
00121 //#define _EMAC
00122
00123
00124 /************************** GLOBAL/PUBLIC MACRO DEFINITIONS *********************************/
00125
00126 #ifdef  DEBUG
00127 /*******************************************************************************
00128 * @brief                The CHECK_PARAM macro is used for function's parameters check.
00129 *                               It is used only if the library is compiled in DEBUG mode.
00130 * @param[in]    expr - If expr is false, it calls check_failed() function
00131 *                       which reports the name of the source file and the source
00132 *                       line number of the call that failed.
00133 *                    - If expr is true, it returns no value.
00134 * @return               None
00135 *******************************************************************************/
00136 #define CHECK_PARAM(expr) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))
00137 #else
00138 #define CHECK_PARAM(expr)
00139 #endif /* DEBUG */
00140
00141
00142
00143 /************************** GLOBAL/PUBLIC FUNCTION DECLARATION *********************************/
00144
00145 #ifdef  DEBUG
00146 void check_failed(uint8_t *file, uint32_t line);
00147 #endif
00148
00149
00150 #endif /* LPC17XX_LIBCFG_H_ */
Generated on Tue Jun 7 14:58:57 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/Cortex-M3/Bit-banding/lpc17xx_libcfg.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/Cortex-M3/Bit-banding/lpc17xx_libcfg.h

Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          lpc17xx_libcfg.h                        2010-05-21
00003 */
00025 #ifndef LPC17XX_LIBCFG_H_
00026 #define LPC17XX_LIBCFG_H_
00027
00028 #include "lpc_types.h"
00029
00030
00031 /************************** DEBUG MODE DEFINITIONS *********************************/
00032 /* Un-comment the line below to compile the library in DEBUG mode, this will expanse
00033    the "CHECK_PARAM" macro in the FW library code */
00034
00035 #define DEBUG
00036
00037
00038 /******************* PERIPHERAL FW LIBRARY CONFIGURATION DEFINITIONS ***********************/
00039
00040 /* Comment the line below to disable the specific peripheral inclusion */
00041
00042 /* DEBUG_FRAMWORK ------------------------------ */
00043 #define _DBGFWK
00044
00045 /* GPIO ------------------------------- */
00046 //#define _GPIO
00047
00048 /* EXTI ------------------------------- */
00049 //#define _EXTI
00050
00051 /* UART ------------------------------- */
00052 #define _UART
00053 #define _UART0
00054 //#define _UART1
00055 //#define _UART2
00056 //#define _UART3
00057
00058 /* SPI ------------------------------- */
00059 //#define _SPI
00060
00061 /* SSP ------------------------------- */
00062 //#define _SSP
00063 //#define _SSP0
00064 //#define _SSP1
00065
00066 /* SYSTICK --------------------------- */
00067 //#define _SYSTICK
00068
00069 /* I2C ------------------------------- */
00070 //#define _I2C
00071 //#define _I2C0
00072 //#define _I2C1
00073 //#define _I2C2
00074
00075 /* TIMER ------------------------------- */
00076 //#define _TIM
00077
00078 /* WDT ------------------------------- */
00079 //#define _WDT
00080
00081
00082 /* GPDMA ------------------------------- */
00083 //#define _GPDMA
00084
00085
00086 /* DAC ------------------------------- */
00087 //#define _DAC
00088
00089 /* DAC ------------------------------- */
00090 //#define _ADC
00091
00092
00093 /* PWM ------------------------------- */
00094 //#define _PWM
00095 //#define _PWM1
00096
00097 /* RTC ------------------------------- */
00098 //#define _RTC
00099
00100 /* I2S ------------------------------- */
00101 //#define _I2S
00102
00103 /* USB device ------------------------------- */
00104 //#define _USBDEV
00105 //#define _USB_DMA
00106
00107 /* QEI ------------------------------- */
00108 //#define _QEI
00109
00110 /* MCPWM ------------------------------- */
00111 //#define _MCPWM
00112
00113 /* CAN--------------------------------*/
00114 //#define _CAN
00115
00116 /* RIT ------------------------------- */
00117 //#define _RIT
00118
00119 /* EMAC ------------------------------ */
00120 //#define _EMAC
00121
00122 /************************** GLOBAL/PUBLIC MACRO DEFINITIONS *********************************/
00123
00124 #ifdef  DEBUG
00125 /*******************************************************************************
00126 * @brief                The CHECK_PARAM macro is used for function's parameters check.
00127 *                               It is used only if the library is compiled in DEBUG mode.
00128 * @param[in]    expr - If expr is false, it calls check_failed() function
00129 *                       which reports the name of the source file and the source
00130 *                       line number of the call that failed.
00131 *                    - If expr is true, it returns no value.
00132 * @return               None
00133 *******************************************************************************/
00134 #define CHECK_PARAM(expr) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))
00135 #else
00136 #define CHECK_PARAM(expr)
00137 #endif /* DEBUG */
00138
00139
00140
00141 /************************** GLOBAL/PUBLIC FUNCTION DECLARATION *********************************/
00142
00143 #ifdef  DEBUG
00144 void check_failed(uint8_t *file, uint32_t line);
00145 #endif
00146
00147
00148 #endif /* LPC17XX_LIBCFG_H_ */
Generated on Tue Jun 7 14:58:57 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/Cortex-M3/MPU/lpc17xx_libcfg.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/Cortex-M3/MPU/lpc17xx_libcfg.h

Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          lpc17xx_libcfg.h                        2010-05-21
00003 */
00026 #ifndef LPC17XX_LIBCFG_H_
00027 #define LPC17XX_LIBCFG_H_
00028
00029 #include "lpc_types.h"
00030
00031
00032 /************************** DEBUG MODE DEFINITIONS *********************************/
00033 /* Un-comment the line below to compile the library in DEBUG mode, this will expanse
00034    the "CHECK_PARAM" macro in the FW library code */
00035
00036 #define DEBUG
00037
00038
00039 /******************* PERIPHERAL FW LIBRARY CONFIGURATION DEFINITIONS ***********************/
00040
00041 /* Comment the line below to disable the specific peripheral inclusion */
00042
00043 /* DEBUG_FRAMWORK ------------------------------ */
00044 #define _DBGFWK
00045
00046 /* GPIO ------------------------------- */
00047 #define _GPIO
00048
00049 /* EXTI ------------------------------- */
00050 //#define _EXTI
00051
00052 /* UART ------------------------------- */
00053 #define _UART
00054 #define _UART0
00055 //#define _UART1
00056 //#define _UART2
00057 //#define _UART3
00058
00059 /* SPI ------------------------------- */
00060 //#define _SPI
00061
00062 /* SSP ------------------------------- */
00063 //#define _SSP
00064 //#define _SSP0
00065 //#define _SSP1
00066
00067 /* SYSTICK --------------------------- */
00068 //#define _SYSTICK
00069
00070 /* I2C ------------------------------- */
00071 //#define _I2C
00072 //#define _I2C0
00073 //#define _I2C1
00074 //#define _I2C2
00075
00076 /* TIMER ------------------------------- */
00077 //#define _TIM
00078
00079 /* WDT ------------------------------- */
00080 //#define _WDT
00081
00082
00083 /* GPDMA ------------------------------- */
00084 #define _GPDMA
00085
00086
00087 /* DAC ------------------------------- */
00088 //#define _DAC
00089
00090 /* DAC ------------------------------- */
00091 //#define _ADC
00092
00093
00094 /* PWM ------------------------------- */
00095 //#define _PWM
00096 //#define _PWM1
00097
00098 /* RTC ------------------------------- */
00099 //#define _RTC
00100
00101 /* I2S ------------------------------- */
00102 //#define _I2S
00103
00104 /* USB device ------------------------------- */
00105 //#define _USBDEV
00106 //#define _USB_DMA
00107
00108 /* QEI ------------------------------- */
00109 //#define _QEI
00110
00111 /* MCPWM ------------------------------- */
00112 //#define _MCPWM
00113
00114 /* CAN--------------------------------*/
00115 //#define _CAN
00116
00117 /* RIT ------------------------------- */
00118 //#define _RIT
00119
00120 /* EMAC ------------------------------ */
00121 //#define _EMAC
00122
00123 /************************** GLOBAL/PUBLIC MACRO DEFINITIONS *********************************/
00124
00125 #ifdef  DEBUG
00126 /*******************************************************************************
00127 * @brief                The CHECK_PARAM macro is used for function's parameters check.
00128 *                               It is used only if the library is compiled in DEBUG mode.
00129 * @param[in]    expr - If expr is false, it calls check_failed() function
00130 *                       which reports the name of the source file and the source
00131 *                       line number of the call that failed.
00132 *                    - If expr is true, it returns no value.
00133 * @return               None
00134 *******************************************************************************/
00135 #define CHECK_PARAM(expr) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))
00136 #else
00137 #define CHECK_PARAM(expr)
00138 #endif /* DEBUG */
00139
00140
00141
00142 /************************** GLOBAL/PUBLIC FUNCTION DECLARATION *********************************/
00143
00144 #ifdef  DEBUG
00145 void check_failed(uint8_t *file, uint32_t line);
00146 #endif
00147
00148
00149 #endif /* LPC17XX_LIBCFG_H_ */
Generated on Tue Jun 7 14:58:57 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/Cortex-M3/Privilege_mode/lpc17xx_libcfg.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/Cortex-M3/Privilege_mode/lpc17xx_libcfg.h

Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          lpc17xx_libcfg.h                        2010-05-21
00003 */
00026 #ifndef LPC17XX_LIBCFG_H_
00027 #define LPC17XX_LIBCFG_H_
00028
00029 #include "lpc_types.h"
00030
00031
00032 /************************** DEBUG MODE DEFINITIONS *********************************/
00033 /* Un-comment the line below to compile the library in DEBUG mode, this will expanse
00034    the "CHECK_PARAM" macro in the FW library code */
00035
00036 #define DEBUG
00037
00038
00039 /******************* PERIPHERAL FW LIBRARY CONFIGURATION DEFINITIONS ***********************/
00040
00041 /* Comment the line below to disable the specific peripheral inclusion */
00042
00043 /* DEBUG_FRAMWORK ------------------------------ */
00044 #define _DBGFWK
00045
00046 /* GPIO ------------------------------- */
00047 #define _GPIO
00048
00049 /* EXTI ------------------------------- */
00050 //#define _EXTI
00051
00052 /* UART ------------------------------- */
00053 #define _UART
00054 #define _UART0
00055 //#define _UART1
00056 //#define _UART2
00057 //#define _UART3
00058
00059 /* SPI ------------------------------- */
00060 //#define _SPI
00061
00062 /* SSP ------------------------------- */
00063 //#define _SSP
00064 //#define _SSP0
00065 //#define _SSP1
00066
00067 /* SYSTICK --------------------------- */
00068 //#define _SYSTICK
00069
00070 /* I2C ------------------------------- */
00071 //#define _I2C
00072 //#define _I2C0
00073 //#define _I2C1
00074 //#define _I2C2
00075
00076 /* TIMER ------------------------------- */
00077 //#define _TIM
00078
00079 /* WDT ------------------------------- */
00080 //#define _WDT
00081
00082
00083 /* GPDMA ------------------------------- */
00084 //#define _GPDMA
00085
00086
00087 /* DAC ------------------------------- */
00088 //#define _DAC
00089
00090 /* DAC ------------------------------- */
00091 //#define _ADC
00092
00093
00094 /* PWM ------------------------------- */
00095 //#define _PWM
00096 //#define _PWM1
00097
00098 /* RTC ------------------------------- */
00099 //#define _RTC
00100
00101 /* I2S ------------------------------- */
00102 //#define _I2S
00103
00104 /* USB device ------------------------------- */
00105 //#define _USBDEV
00106 //#define _USB_DMA
00107
00108 /* QEI ------------------------------- */
00109 //#define _QEI
00110
00111 /* MCPWM ------------------------------- */
00112 //#define _MCPWM
00113
00114 /* CAN--------------------------------*/
00115 //#define _CAN
00116
00117 /* RIT ------------------------------- */
00118 //#define _RIT
00119
00120 /* EMAC ------------------------------ */
00121 //#define _EMAC
00122
00123 /************************** GLOBAL/PUBLIC MACRO DEFINITIONS *********************************/
00124
00125 #ifdef  DEBUG
00126 /*******************************************************************************
00127 * @brief                The CHECK_PARAM macro is used for function's parameters check.
00128 *                               It is used only if the library is compiled in DEBUG mode.
00129 * @param[in]    expr - If expr is false, it calls check_failed() function
00130 *                       which reports the name of the source file and the source
00131 *                       line number of the call that failed.
00132 *                    - If expr is true, it returns no value.
00133 * @return               None
00134 *******************************************************************************/
00135 #define CHECK_PARAM(expr) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))
00136 #else
00137 #define CHECK_PARAM(expr)
00138 #endif /* DEBUG */
00139
00140
00141
00142 /************************** GLOBAL/PUBLIC FUNCTION DECLARATION *********************************/
00143
00144 #ifdef  DEBUG
00145 void check_failed(uint8_t *file, uint32_t line);
00146 #endif
00147
00148
00149 #endif /* LPC17XX_LIBCFG_H_ */
Generated on Tue Jun 7 14:58:57 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/DAC/DMA/lpc17xx_libcfg.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/DAC/DMA/lpc17xx_libcfg.h

Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          lpc17xx_libcfg.h                        2010-05-21
00003 */
00026 #ifndef LPC17XX_LIBCFG_H_
00027 #define LPC17XX_LIBCFG_H_
00028
00029 #include "lpc_types.h"
00030
00031
00032 /************************** DEBUG MODE DEFINITIONS *********************************/
00033 /* Un-comment the line below to compile the library in DEBUG mode, this will expanse
00034    the "CHECK_PARAM" macro in the FW library code */
00035
00036 #define DEBUG
00037
00038
00039 /******************* PERIPHERAL FW LIBRARY CONFIGURATION DEFINITIONS ***********************/
00040
00041 /* Comment the line below to disable the specific peripheral inclusion */
00042
00043 /* DEBUG_FRAMWORK ------------------------------ */
00044 //#define _DBGFWK
00045
00046 /* GPIO ------------------------------- */
00047 //#define _GPIO
00048
00049 /* EXTI ------------------------------- */
00050 //#define _EXTI
00051
00052 /* UART ------------------------------- */
00053 //#define _UART
00054 //#define _UART0
00055 //#define _UART1
00056 //#define _UART2
00057 //#define _UART3
00058
00059 /* SPI ------------------------------- */
00060 //#define _SPI
00061
00062 /* SSP ------------------------------- */
00063 //#define _SSP
00064 //#define _SSP0
00065 //#define _SSP1
00066
00067 /* SYSTICK --------------------------- */
00068 //#define _SYSTICK
00069
00070 /* I2C ------------------------------- */
00071 //#define _I2C
00072 //#define _I2C0
00073 //#define _I2C1
00074 //#define _I2C2
00075
00076 /* TIMER ------------------------------- */
00077 //#define _TIM
00078
00079 /* WDT ------------------------------- */
00080 //#define _WDT
00081
00082
00083 /* GPDMA ------------------------------- */
00084 #define _GPDMA
00085
00086
00087 /* DAC ------------------------------- */
00088 #define _DAC
00089
00090 /* DAC ------------------------------- */
00091 //#define _ADC
00092
00093
00094 /* PWM ------------------------------- */
00095 //#define _PWM
00096 //#define _PWM1
00097
00098 /* RTC ------------------------------- */
00099 //#define _RTC
00100
00101 /* I2S ------------------------------- */
00102 //#define _I2S
00103
00104 /* USB device ------------------------------- */
00105 //#define _USBDEV
00106 //#define _USB_DMA
00107
00108 /* QEI ------------------------------- */
00109 //#define _QEI
00110
00111 /* MCPWM ------------------------------- */
00112 //#define _MCPWM
00113
00114 /* CAN--------------------------------*/
00115 //#define _CAN
00116
00117 /* RIT ------------------------------- */
00118 //#define _RIT
00119
00120 /* EMAC ------------------------------ */
00121 //#define _EMAC
00122 /************************** GLOBAL/PUBLIC MACRO DEFINITIONS *********************************/
00123
00124 #ifdef  DEBUG
00125 /*******************************************************************************
00126 * @brief                The CHECK_PARAM macro is used for function's parameters check.
00127 *                               It is used only if the library is compiled in DEBUG mode.
00128 * @param[in]    expr - If expr is false, it calls check_failed() function
00129 *                       which reports the name of the source file and the source
00130 *                       line number of the call that failed.
00131 *                    - If expr is true, it returns no value.
00132 * @return               None
00133 *******************************************************************************/
00134 #define CHECK_PARAM(expr) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))
00135 #else
00136 #define CHECK_PARAM(expr)
00137 #endif /* DEBUG */
00138
00139
00140
00141 /************************** GLOBAL/PUBLIC FUNCTION DECLARATION *********************************/
00142
00143 #ifdef  DEBUG
00144 void check_failed(uint8_t *file, uint32_t line);
00145 #endif
00146
00147
00148 #endif /* LPC17XX_LIBCFG_H_ */
Generated on Tue Jun 7 14:58:57 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/DAC/SineWave/lpc17xx_libcfg.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/DAC/SineWave/lpc17xx_libcfg.h

Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          lpc17xx_libcfg.h                        2010-05-21
00003 */
00026 #ifndef LPC17XX_LIBCFG_H_
00027 #define LPC17XX_LIBCFG_H_
00028
00029 #include "lpc_types.h"
00030
00031
00032 /************************** DEBUG MODE DEFINITIONS *********************************/
00033 /* Un-comment the line below to compile the library in DEBUG mode, this will expanse
00034    the "CHECK_PARAM" macro in the FW library code */
00035
00036 #define DEBUG
00037
00038
00039 /******************* PERIPHERAL FW LIBRARY CONFIGURATION DEFINITIONS ***********************/
00040
00041 /* Comment the line below to disable the specific peripheral inclusion */
00042
00043 /* DEBUG_FRAMWORK -------------------- */
00044 //#define _DBGFWK
00045
00046 /* GPIO ------------------------------- */
00047 //#define _GPIO
00048
00049 /* EXTI ------------------------------- */
00050 //#define _EXTI
00051
00052 /* UART ------------------------------- */
00053 //#define _UART
00054 //#define _UART0
00055 //#define _UART1
00056 //#define _UART2
00057 //#define _UART3
00058
00059 /* SPI ------------------------------- */
00060 //#define _SPI
00061
00062 /* SSP ------------------------------- */
00063 //#define _SSP
00064 //#define _SSP0
00065 //#define _SSP1
00066
00067 /* SYSTICK --------------------------- */
00068 //#define _SYSTICK
00069
00070 /* I2C ------------------------------- */
00071 //#define _I2C
00072 //#define _I2C0
00073 //#define _I2C1
00074 //#define _I2C2
00075
00076 /* TIMER ------------------------------- */
00077 //#define _TIM
00078
00079 /* WDT ------------------------------- */
00080 //#define _WDT
00081
00082
00083 /* GPDMA ------------------------------- */
00084 #define _GPDMA
00085
00086
00087 /* DAC ------------------------------- */
00088 #define _DAC
00089
00090 /* DAC ------------------------------- */
00091 //#define _ADC
00092
00093
00094 /* PWM ------------------------------- */
00095 //#define _PWM
00096 //#define _PWM1
00097
00098 /* RTC ------------------------------- */
00099 //#define _RTC
00100
00101 /* I2S ------------------------------- */
00102 //#define _I2S
00103
00104 /* USB device ------------------------------- */
00105 //#define _USBDEV
00106 //#define _USB_DMA
00107
00108 /* QEI ------------------------------- */
00109 //#define _QEI
00110
00111 /* MCPWM ------------------------------- */
00112 //#define _MCPWM
00113
00114 /* CAN--------------------------------*/
00115 //#define _CAN
00116
00117 /* RIT ------------------------------- */
00118 //#define _RIT
00119
00120 /* EMAC ------------------------------ */
00121 //#define _EMAC
00122 /************************** GLOBAL/PUBLIC MACRO DEFINITIONS *********************************/
00123
00124 #ifdef  DEBUG
00125 /*******************************************************************************
00126 * @brief                The CHECK_PARAM macro is used for function's parameters check.
00127 *                               It is used only if the library is compiled in DEBUG mode.
00128 * @param[in]    expr - If expr is false, it calls check_failed() function
00129 *                       which reports the name of the source file and the source
00130 *                       line number of the call that failed.
00131 *                    - If expr is true, it returns no value.
00132 * @return               None
00133 *******************************************************************************/
00134 #define CHECK_PARAM(expr) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))
00135 #else
00136 #define CHECK_PARAM(expr)
00137 #endif /* DEBUG */
00138
00139
00140
00141 /************************** GLOBAL/PUBLIC FUNCTION DECLARATION *********************************/
00142
00143 #ifdef  DEBUG
00144 void check_failed(uint8_t *file, uint32_t line);
00145 #endif
00146
00147
00148 #endif /* LPC17XX_LIBCFG_H_ */
Generated on Tue Jun 7 14:58:57 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/DAC/Speaker/lpc17xx_libcfg.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/DAC/Speaker/lpc17xx_libcfg.h

Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          lpc17xx_libcfg.h                        2010-05-21
00003 */
00026 #ifndef LPC17XX_LIBCFG_H_
00027 #define LPC17XX_LIBCFG_H_
00028
00029 #include "lpc_types.h"
00030
00031
00032 /************************** DEBUG MODE DEFINITIONS *********************************/
00033 /* Un-comment the line below to compile the library in DEBUG mode, this will expanse
00034    the "CHECK_PARAM" macro in the FW library code */
00035
00036 #define DEBUG
00037
00038
00039 /******************* PERIPHERAL FW LIBRARY CONFIGURATION DEFINITIONS ***********************/
00040
00041 /* Comment the line below to disable the specific peripheral inclusion */
00042
00043 /* DEBUG_FRAMWORK ------------------------------ */
00044 //#define _DBGFWK
00045
00046 /* GPIO ------------------------------- */
00047 //#define _GPIO
00048
00049 /* EXTI ------------------------------- */
00050 //#define _EXTI
00051
00052 /* UART ------------------------------- */
00053 //#define _UART
00054 //#define _UART0
00055 //#define _UART1
00056 //#define _UART2
00057 //#define _UART3
00058
00059 /* SPI ------------------------------- */
00060 //#define _SPI
00061
00062 /* SSP ------------------------------- */
00063 //#define _SSP
00064 //#define _SSP0
00065 //#define _SSP1
00066
00067 /* SYSTICK --------------------------- */
00068 //#define _SYSTICK
00069
00070 /* I2C ------------------------------- */
00071 //#define _I2C
00072 //#define _I2C0
00073 //#define _I2C1
00074 //#define _I2C2
00075
00076 /* TIMER ------------------------------- */
00077 //#define _TIM
00078
00079 /* WDT ------------------------------- */
00080 //#define _WDT
00081
00082
00083 /* GPDMA ------------------------------- */
00084 //#define _GPDMA
00085
00086
00087 /* DAC ------------------------------- */
00088 #define _DAC
00089
00090 /* DAC ------------------------------- */
00091 //#define _ADC
00092
00093
00094 /* PWM ------------------------------- */
00095 //#define _PWM
00096 //#define _PWM1
00097
00098 /* RTC ------------------------------- */
00099 //#define _RTC
00100
00101 /* I2S ------------------------------- */
00102 //#define _I2S
00103
00104 /* USB device ------------------------------- */
00105 //#define _USBDEV
00106 //#define _USB_DMA
00107
00108 /* QEI ------------------------------- */
00109 //#define _QEI
00110
00111 /* MCPWM ------------------------------- */
00112 //#define _MCPWM
00113
00114 /* CAN--------------------------------*/
00115 //#define _CAN
00116
00117 /* RIT ------------------------------- */
00118 //#define _RIT
00119
00120 /* EMAC ------------------------------ */
00121 //#define _EMAC
00122
00123 /************************** GLOBAL/PUBLIC MACRO DEFINITIONS *********************************/
00124
00125 #ifdef  DEBUG
00126 /*******************************************************************************
00127 * @brief                The CHECK_PARAM macro is used for function's parameters check.
00128 *                               It is used only if the library is compiled in DEBUG mode.
00129 * @param[in]    expr - If expr is false, it calls check_failed() function
00130 *                       which reports the name of the source file and the source
00131 *                       line number of the call that failed.
00132 *                    - If expr is true, it returns no value.
00133 * @return               None
00134 *******************************************************************************/
00135 #define CHECK_PARAM(expr) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))
00136 #else
00137 #define CHECK_PARAM(expr)
00138 #endif /* DEBUG */
00139
00140
00141
00142 /************************** GLOBAL/PUBLIC FUNCTION DECLARATION *********************************/
00143
00144 #ifdef  DEBUG
00145 void check_failed(uint8_t *file, uint32_t line);
00146 #endif
00147
00148
00149 #endif /* LPC17XX_LIBCFG_H_ */
Generated on Tue Jun 7 14:58:57 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/DAC/WaveGenerate/lpc17xx_libcfg.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/DAC/WaveGenerate/lpc17xx_libcfg.h

Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          lpc17xx_libcfg.h                        2010-05-21
00003 */
00026 #ifndef LPC17XX_LIBCFG_H_
00027 #define LPC17XX_LIBCFG_H_
00028
00029 #include "lpc_types.h"
00030
00031
00032 /************************** DEBUG MODE DEFINITIONS *********************************/
00033 /* Un-comment the line below to compile the library in DEBUG mode, this will expanse
00034    the "CHECK_PARAM" macro in the FW library code */
00035
00036 #define DEBUG
00037
00038
00039 /******************* PERIPHERAL FW LIBRARY CONFIGURATION DEFINITIONS ***********************/
00040
00041 /* Comment the line below to disable the specific peripheral inclusion */
00042
00043 /* DEBUG_FRAMWORK ------------------------------ */
00044 #define _DBGFWK
00045
00046 /* GPIO ------------------------------- */
00047 //#define _GPIO
00048
00049 /* EXTI ------------------------------- */
00050 //#define _EXTI
00051
00052 /* UART ------------------------------- */
00053 #define _UART
00054 #define _UART0
00055 //#define _UART1
00056 //#define _UART2
00057 //#define _UART3
00058
00059 /* SPI ------------------------------- */
00060 //#define _SPI
00061
00062 /* SSP ------------------------------- */
00063 //#define _SSP
00064 //#define _SSP0
00065 //#define _SSP1
00066
00067 /* SYSTICK --------------------------- */
00068 //#define _SYSTICK
00069
00070 /* I2C ------------------------------- */
00071 //#define _I2C
00072 //#define _I2C0
00073 //#define _I2C1
00074 //#define _I2C2
00075
00076 /* TIMER ------------------------------- */
00077 //#define _TIM
00078
00079 /* WDT ------------------------------- */
00080 //#define _WDT
00081
00082
00083 /* GPDMA ------------------------------- */
00084 #define _GPDMA
00085
00086
00087 /* DAC ------------------------------- */
00088 #define _DAC
00089
00090 /* DAC ------------------------------- */
00091 //#define _ADC
00092
00093
00094 /* PWM ------------------------------- */
00095 //#define _PWM
00096 //#define _PWM1
00097
00098 /* RTC ------------------------------- */
00099 //#define _RTC
00100
00101 /* I2S ------------------------------- */
00102 //#define _I2S
00103
00104 /* USB device ------------------------------- */
00105 //#define _USBDEV
00106 //#define _USB_DMA
00107
00108 /* QEI ------------------------------- */
00109 //#define _QEI
00110
00111 /* MCPWM ------------------------------- */
00112 //#define _MCPWM
00113
00114 /* CAN--------------------------------*/
00115 //#define _CAN
00116
00117 /* RIT ------------------------------- */
00118 //#define _RIT
00119
00120 /* EMAC ------------------------------ */
00121 //#define _EMAC
00122 /************************** GLOBAL/PUBLIC MACRO DEFINITIONS *********************************/
00123
00124 #ifdef  DEBUG
00125 /*******************************************************************************
00126 * @brief                The CHECK_PARAM macro is used for function's parameters check.
00127 *                               It is used only if the library is compiled in DEBUG mode.
00128 * @param[in]    expr - If expr is false, it calls check_failed() function
00129 *                       which reports the name of the source file and the source
00130 *                       line number of the call that failed.
00131 *                    - If expr is true, it returns no value.
00132 * @return               None
00133 *******************************************************************************/
00134 #define CHECK_PARAM(expr) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))
00135 #else
00136 #define CHECK_PARAM(expr)
00137 #endif /* DEBUG */
00138
00139
00140
00141 /************************** GLOBAL/PUBLIC FUNCTION DECLARATION *********************************/
00142
00143 #ifdef  DEBUG
00144 void check_failed(uint8_t *file, uint32_t line);
00145 #endif
00146
00147
00148 #endif /* LPC17XX_LIBCFG_H_ */
Generated on Tue Jun 7 14:58:57 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBMassStorage/DiskImg.c Source File

C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBMassStorage/DiskImg.c

Go to the documentation of this file.
00001 /* Disk Image */
00002
00003 #include "lpc_types.h"
00004 #include "memory.h"
00005
00006 const unsigned char DiskImage[MSC_ImageSize] = {
00007 0xEB,0x3C,0x90,0x4D,0x53,0x44,0x4F,0x53,0x35,0x2E,0x30,0x00,0x02,0x01,0x01,0x00,
00008 0x01,0x10,0x00,0x20,0x00,0xF8,0x02,0x00,0x01,0x00,0x01,0x00,0x00,0x00,0x00,0x00,
00009 0x00,0x00,0x00,0x00,0x00,0x00,0x29,0x74,0x19,0x02,0x27,0x4C,0x50,0x43,0x31,0x37,
00010 0x78,0x78,0x20,0x55,0x53,0x42,0x46,0x41,0x54,0x31,0x32,0x20,0x20,0x20,0x33,0xC9,
00011 0x8E,0xD1,0xBC,0xF0,0x7B,0x8E,0xD9,0xB8,0x00,0x20,0x8E,0xC0,0xFC,0xBD,0x00,0x7C,
00012 0x38,0x4E,0x24,0x7D,0x24,0x8B,0xC1,0x99,0xE8,0x3C,0x01,0x72,0x1C,0x83,0xEB,0x3A,
00013 0x66,0xA1,0x1C,0x7C,0x26,0x66,0x3B,0x07,0x26,0x8A,0x57,0xFC,0x75,0x06,0x80,0xCA,
00014 0x02,0x88,0x56,0x02,0x80,0xC3,0x10,0x73,0xEB,0x33,0xC9,0x8A,0x46,0x10,0x98,0xF7,
00015 0x66,0x16,0x03,0x46,0x1C,0x13,0x56,0x1E,0x03,0x46,0x0E,0x13,0xD1,0x8B,0x76,0x11,
00016 0x60,0x89,0x46,0xFC,0x89,0x56,0xFE,0xB8,0x20,0x00,0xF7,0xE6,0x8B,0x5E,0x0B,0x03,
00017 0xC3,0x48,0xF7,0xF3,0x01,0x46,0xFC,0x11,0x4E,0xFE,0x61,0xBF,0x00,0x00,0xE8,0xE6,
00018 0x00,0x72,0x39,0x26,0x38,0x2D,0x74,0x17,0x60,0xB1,0x0B,0xBE,0xA1,0x7D,0xF3,0xA6,
00019 0x61,0x74,0x32,0x4E,0x74,0x09,0x83,0xC7,0x20,0x3B,0xFB,0x72,0xE6,0xEB,0xDC,0xA0,
00020 0xFB,0x7D,0xB4,0x7D,0x8B,0xF0,0xAC,0x98,0x40,0x74,0x0C,0x48,0x74,0x13,0xB4,0x0E,
00021 0xBB,0x07,0x00,0xCD,0x10,0xEB,0xEF,0xA0,0xFD,0x7D,0xEB,0xE6,0xA0,0xFC,0x7D,0xEB,
00022 0xE1,0xCD,0x16,0xCD,0x19,0x26,0x8B,0x55,0x1A,0x52,0xB0,0x01,0xBB,0x00,0x00,0xE8,
00023 0x3B,0x00,0x72,0xE8,0x5B,0x8A,0x56,0x24,0xBE,0x0B,0x7C,0x8B,0xFC,0xC7,0x46,0xF0,
00024 0x3D,0x7D,0xC7,0x46,0xF4,0x29,0x7D,0x8C,0xD9,0x89,0x4E,0xF2,0x89,0x4E,0xF6,0xC6,
00025 0x06,0x96,0x7D,0xCB,0xEA,0x03,0x00,0x00,0x20,0x0F,0xB6,0xC8,0x66,0x8B,0x46,0xF8,
00026 0x66,0x03,0x46,0x1C,0x66,0x8B,0xD0,0x66,0xC1,0xEA,0x10,0xEB,0x5E,0x0F,0xB6,0xC8,
00027 0x4A,0x4A,0x8A,0x46,0x0D,0x32,0xE4,0xF7,0xE2,0x03,0x46,0xFC,0x13,0x56,0xFE,0xEB,
00028 0x4A,0x52,0x50,0x06,0x53,0x6A,0x01,0x6A,0x10,0x91,0x8B,0x46,0x18,0x96,0x92,0x33,
00029 0xD2,0xF7,0xF6,0x91,0xF7,0xF6,0x42,0x87,0xCA,0xF7,0x76,0x1A,0x8A,0xF2,0x8A,0xE8,
00030 0xC0,0xCC,0x02,0x0A,0xCC,0xB8,0x01,0x02,0x80,0x7E,0x02,0x0E,0x75,0x04,0xB4,0x42,
00031 0x8B,0xF4,0x8A,0x56,0x24,0xCD,0x13,0x61,0x61,0x72,0x0B,0x40,0x75,0x01,0x42,0x03,
00032 0x5E,0x0B,0x49,0x75,0x06,0xF8,0xC3,0x41,0xBB,0x00,0x00,0x60,0x66,0x6A,0x00,0xEB,
00033 0xB0,0x4E,0x54,0x4C,0x44,0x52,0x20,0x20,0x20,0x20,0x20,0x20,0x0D,0x0A,0x52,0x65,
00034 0x6D,0x6F,0x76,0x65,0x20,0x64,0x69,0x73,0x6B,0x73,0x20,0x6F,0x72,0x20,0x6F,0x74,
00035 0x68,0x65,0x72,0x20,0x6D,0x65,0x64,0x69,0x61,0x2E,0xFF,0x0D,0x0A,0x44,0x69,0x73,
00036 0x6B,0x20,0x65,0x72,0x72,0x6F,0x72,0xFF,0x0D,0x0A,0x50,0x72,0x65,0x73,0x73,0x20,
00037 0x61,0x6E,0x79,0x20,0x6B,0x65,0x79,0x20,0x74,0x6F,0x20,0x72,0x65,0x73,0x74,0x61,
00038 0x72,0x74,0x0D,0x0A,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xAC,0xCB,0xD8,0x55,0xAA,
00039 0xF8,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0x0F,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
00040 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
00041 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
00042 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
00043 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
00044 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
00045 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
00046 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
00047 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
00048 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
00049 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
00050 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
00051 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
00052 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
00053 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
00054 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
00055 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
00056 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
00057 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
00058 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
00059 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
00060 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
00061 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
00062 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
00063 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
00064 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
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00140 0x50,0x43,0x31,0x37,0x78,0x78,0x2E,0x0D,0x0A,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
00141 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
00142 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
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00144 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
00145 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
00146 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
00147 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
00148 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
00149 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
00150 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
00151 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
00152 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
00153 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
00154 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
00155 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
00156 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
00157 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
00158 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
00159 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
00160 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
00161 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
00162 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
00163 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
00164 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
00165 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
00166 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
00167 };
Generated on Tue Jun 7 14:59:05 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/Easy_Web/lpc17xx_libcfg.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/Easy_Web/lpc17xx_libcfg.h

Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          lpc17xx_libcfg.h                        2010-05-21
00003 */
00026 #ifndef LPC17XX_LIBCFG_H_
00027 #define LPC17XX_LIBCFG_H_
00028
00029 #include "lpc_types.h"
00030
00031
00032 /************************** DEBUG MODE DEFINITIONS *********************************/
00033 /******************* PERIPHERAL FW LIBRARY CONFIGURATION DEFINITIONS ***********************/
00034
00035 /* Un-comment the line below to compile the library in DEBUG mode, this will expanse
00036    the "CHECK_PARAM" macro in the FW library code */
00037
00038 #define DEBUG
00039
00040
00041 /******************* PERIPHERAL FW LIBRARY CONFIGURATION DEFINITIONS ***********************/
00042
00043 /* Comment the line below to disable the specific peripheral inclusion */
00044
00045 /* DEBUG_FRAMWORK ------------------------------ */
00046 #define _DBGFWK
00047
00048 /* GPIO ------------------------------- */
00049 //#define _GPIO
00050
00051 /* EXTI ------------------------------- */
00052 //#define _EXTI
00053
00054 /* UART ------------------------------- */
00055 #define _UART
00056 #define _UART0
00057 //#define _UART1
00058 //#define _UART2
00059 //#define _UART3
00060
00061 /* SPI ------------------------------- */
00062 //#define _SPI
00063
00064 /* SSP ------------------------------- */
00065 //#define _SSP
00066 //#define _SSP0
00067 //#define _SSP1
00068
00069 /* SYSTICK --------------------------- */
00070 //#define _SYSTICK
00071
00072 /* I2C ------------------------------- */
00073 //#define _I2C
00074 //#define _I2C0
00075 //#define _I2C1
00076 //#define _I2C2
00077
00078 /* TIMER ------------------------------- */
00079 //#define _TIM
00080
00081 /* WDT ------------------------------- */
00082 //#define _WDT
00083
00084
00085 /* GPDMA ------------------------------- */
00086 //#define _GPDMA
00087
00088
00089 /* DAC ------------------------------- */
00090 //#define _DAC
00091
00092 /* DAC ------------------------------- */
00093 //#define _ADC
00094
00095
00096 /* PWM ------------------------------- */
00097 //#define _PWM
00098 //#define _PWM1
00099
00100 /* RTC ------------------------------- */
00101 //#define _RTC
00102
00103 /* I2S ------------------------------- */
00104 //#define _I2S
00105
00106 /* USB device ------------------------------- */
00107 //#define _USBDEV
00108 //#define _USB_DMA
00109
00110 /* QEI ------------------------------- */
00111 //#define _QEI
00112
00113 /* MCPWM ------------------------------- */
00114 //#define _MCPWM
00115
00116 /* CAN--------------------------------*/
00117 //#define _CAN
00118
00119 /* RIT ------------------------------- */
00120 //#define _RIT
00121
00122 /* EMAC ------------------------------ */
00123 #define _EMAC
00124
00125 /************************** GLOBAL/PUBLIC MACRO DEFINITIONS *********************************/
00126
00127 #ifdef  DEBUG
00128 /*******************************************************************************
00129 * @brief                The CHECK_PARAM macro is used for function's parameters check.
00130 *                               It is used only if the library is compiled in DEBUG mode.
00131 * @param[in]    expr - If expr is false, it calls check_failed() function
00132 *                       which reports the name of the source file and the source
00133 *                       line number of the call that failed.
00134 *                    - If expr is true, it returns no value.
00135 * @return               None
00136 *******************************************************************************/
00137 #define CHECK_PARAM(expr) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))
00138 #else
00139 #define CHECK_PARAM(expr)
00140 #endif /* DEBUG */
00141
00142
00143
00144 /************************** GLOBAL/PUBLIC FUNCTION DECLARATION *********************************/
00145
00146 #ifdef  DEBUG
00147 void check_failed(uint8_t *file, uint32_t line);
00148 #endif
00149
00150
00151 #endif /* LPC17XX_LIBCFG_H_ */
Generated on Tue Jun 7 14:58:57 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/EmacRaw/lpc17xx_libcfg.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/EmacRaw/lpc17xx_libcfg.h

Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          lpc17xx_libcfg.h                        2010-05-21
00003 */
00026 #ifndef LPC17XX_LIBCFG_H_
00027 #define LPC17XX_LIBCFG_H_
00028
00029 #include "lpc_types.h"
00030
00031
00032 /************************** DEBUG MODE DEFINITIONS *********************************/
00033 /* Un-comment the line below to compile the library in DEBUG mode, this will expanse
00034    the "CHECK_PARAM" macro in the FW library code */
00035
00036 #define DEBUG
00037
00038
00039 /******************* PERIPHERAL FW LIBRARY CONFIGURATION DEFINITIONS ***********************/
00040
00041 /* Comment the line below to disable the specific peripheral inclusion */
00042
00043 /* DEBUG_FRAMWORK ------------------------------ */
00044 #define _DBGFWK
00045
00046 /* GPIO ------------------------------- */
00047 #define _GPIO
00048
00049 /* EXTI ------------------------------- */
00050 //#define _EXTI
00051
00052 /* UART ------------------------------- */
00053 #define _UART
00054 #define _UART0
00055 //#define _UART1
00056 //#define _UART2
00057 //#define _UART3
00058
00059 /* SPI ------------------------------- */
00060 //#define _SPI
00061
00062 /* SSP ------------------------------- */
00063 //#define _SSP
00064 //#define _SSP0
00065 //#define _SSP1
00066
00067 /* SYSTICK --------------------------- */
00068 //#define _SYSTICK
00069
00070 /* I2C ------------------------------- */
00071 //#define _I2C
00072 //#define _I2C0
00073 //#define _I2C1
00074 //#define _I2C2
00075
00076 /* TIMER ------------------------------- */
00077 //#define _TIM
00078
00079 /* WDT ------------------------------- */
00080 //#define _WDT
00081
00082
00083 /* GPDMA ------------------------------- */
00084 //#define _GPDMA
00085
00086
00087 /* DAC ------------------------------- */
00088 //#define _DAC
00089
00090 /* DAC ------------------------------- */
00091 //#define _ADC
00092
00093
00094 /* PWM ------------------------------- */
00095 //#define _PWM
00096 //#define _PWM1
00097
00098 /* RTC ------------------------------- */
00099 //#define _RTC
00100
00101 /* I2S ------------------------------- */
00102 //#define _I2S
00103
00104 /* USB device ------------------------------- */
00105 //#define _USBDEV
00106 //#define _USB_DMA
00107
00108 /* QEI ------------------------------- */
00109 //#define _QEI
00110
00111 /* MCPWM ------------------------------- */
00112 //#define _MCPWM
00113
00114 /* CAN--------------------------------*/
00115 //#define _CAN
00116
00117 /* RIT ------------------------------- */
00118 //#define _RIT
00119
00120 /* EMAC ------------------------------ */
00121 #define _EMAC
00122
00123
00124 /************************** GLOBAL/PUBLIC MACRO DEFINITIONS *********************************/
00125
00126 #ifdef  DEBUG
00127 /*******************************************************************************
00128 * @brief                The CHECK_PARAM macro is used for function's parameters check.
00129 *                               It is used only if the library is compiled in DEBUG mode.
00130 * @param[in]    expr - If expr is false, it calls check_failed() function
00131 *                       which reports the name of the source file and the source
00132 *                       line number of the call that failed.
00133 *                    - If expr is true, it returns no value.
00134 * @return               None
00135 *******************************************************************************/
00136 #define CHECK_PARAM(expr) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))
00137 #else
00138 #define CHECK_PARAM(expr)
00139 #endif /* DEBUG */
00140
00141
00142
00143 /************************** GLOBAL/PUBLIC FUNCTION DECLARATION *********************************/
00144
00145 #ifdef  DEBUG
00146 void check_failed(uint8_t *file, uint32_t line);
00147 #endif
00148
00149
00150 #endif /* LPC17XX_LIBCFG_H_ */
Generated on Tue Jun 7 14:58:57 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/common/Serial.c Source File

C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/common/Serial.c

Go to the documentation of this file.
00001 /******************************************************************************/
00002 /* SERIAL.C: Low Level Serial Routines                                        */
00003 /******************************************************************************/
00004 /* This file is part of the uVision/ARM development tools.                    */
00005 /* Copyright (c) 2005-2007 Keil Software. All rights reserved.                */
00006 /* This software may only be used under the terms of a valid, current,        */
00007 /* end user licence from KEIL for a compatible version of KEIL software       */
00008 /* development tools. Nothing else gives you the right to use this software.  */
00009 /******************************************************************************/
00010
00011 #include "debug_frmwrk.h"
00012
00013 #define CR     0x0D
00014
00015
00016 void init_serial (void)  {               /* Initialize Serial Interface       */
00017         debug_frmwrk_init();
00018 }
00019
00020
00021 /* Implementation of putchar (also used by printf function to output data)    */
00022 int sendchar (int ch)  {                 /* Write character to Serial Port    */
00023 #if 1
00024    if (ch == '\n')  {
00025    _DBC(CR);                          /* output CR */
00026   }
00027 #endif
00028         _DBC(ch);
00029         return (ch);
00030 }
00031
00032
00033 int getkey (void)  {                     /* Read character from Serial Port   */
00034   return (_DG);
00035 }
00036
00037 unsigned char getchar(void)
00038 {
00039         return getkey();
00040 }
Generated on Tue Jun 7 14:59:00 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/lpc17xx_port/lpc17xx_libcfg.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/lpc17xx_port/lpc17xx_libcfg.h

Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          lpc17xx_libcfg.h                        2010-05-21
00003 */
00026 #ifndef LPC17XX_LIBCFG_H_
00027 #define LPC17XX_LIBCFG_H_
00028
00029 #include "lpc_types.h"
00030
00031
00032 /************************** DEBUG MODE DEFINITIONS *********************************/
00033 /******************* PERIPHERAL FW LIBRARY CONFIGURATION DEFINITIONS ***********************/
00034
00035 /* Un-comment the line below to compile the library in DEBUG mode, this will expanse
00036    the "CHECK_PARAM" macro in the FW library code */
00037
00038 #define DEBUG
00039
00040
00041 /******************* PERIPHERAL FW LIBRARY CONFIGURATION DEFINITIONS ***********************/
00042
00043 /* Comment the line below to disable the specific peripheral inclusion */
00044
00045 /* DEBUG_FRAMWORK ------------------------------ */
00046 #define _DBGFWK
00047
00048 /* GPIO ------------------------------- */
00049 #define _GPIO
00050
00051 /* EXTI ------------------------------- */
00052 //#define _EXTI
00053
00054 /* UART ------------------------------- */
00055 #define _UART
00056 #define _UART0
00057 //#define _UART1
00058 //#define _UART2
00059 //#define _UART3
00060
00061 /* SPI ------------------------------- */
00062 //#define _SPI
00063
00064 /* SSP ------------------------------- */
00065 //#define _SSP
00066 //#define _SSP0
00067 //#define _SSP1
00068
00069 /* SYSTICK --------------------------- */
00070 //#define _SYSTICK
00071
00072 /* I2C ------------------------------- */
00073 //#define _I2C
00074 //#define _I2C0
00075 //#define _I2C1
00076 //#define _I2C2
00077
00078 /* TIMER ------------------------------- */
00079 //#define _TIM
00080
00081 /* WDT ------------------------------- */
00082 //#define _WDT
00083
00084
00085 /* GPDMA ------------------------------- */
00086 //#define _GPDMA
00087
00088
00089 /* DAC ------------------------------- */
00090 //#define _DAC
00091
00092 /* DAC ------------------------------- */
00093 //#define _ADC
00094
00095
00096 /* PWM ------------------------------- */
00097 //#define _PWM
00098 //#define _PWM1
00099
00100 /* RTC ------------------------------- */
00101 //#define _RTC
00102
00103 /* I2S ------------------------------- */
00104 //#define _I2S
00105
00106 /* USB device ------------------------------- */
00107 //#define _USBDEV
00108 //#define _USB_DMA
00109
00110 /* QEI ------------------------------- */
00111 //#define _QEI
00112
00113 /* MCPWM ------------------------------- */
00114 //#define _MCPWM
00115
00116 /* CAN--------------------------------*/
00117 //#define _CAN
00118
00119 /* RIT ------------------------------- */
00120 //#define _RIT
00121
00122 /* EMAC ------------------------------ */
00123 #define _EMAC
00124
00125
00126 /************************** GLOBAL/PUBLIC MACRO DEFINITIONS *********************************/
00127
00128 #ifdef  DEBUG
00129 /*******************************************************************************
00130 * @brief                The CHECK_PARAM macro is used for function's parameters check.
00131 *                               It is used only if the library is compiled in DEBUG mode.
00132 * @param[in]    expr - If expr is false, it calls check_failed() function
00133 *                       which reports the name of the source file and the source
00134 *                       line number of the call that failed.
00135 *                    - If expr is true, it returns no value.
00136 * @return               None
00137 *******************************************************************************/
00138 #define CHECK_PARAM(expr) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))
00139 #else
00140 #define CHECK_PARAM(expr)
00141 #endif /* DEBUG */
00142
00143
00144
00145 /************************** GLOBAL/PUBLIC FUNCTION DECLARATION *********************************/
00146
00147 #ifdef  DEBUG
00148 void check_failed(uint8_t *file, uint32_t line);
00149 #endif
00150
00151
00152 #endif /* LPC17XX_LIBCFG_H_ */
Generated on Tue Jun 7 14:58:57 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/Easy_Web/EMAC.c Source File

C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/Easy_Web/EMAC.c

Go to the documentation of this file.
00001 /******************************************************************
00002  *****                                                        *****
00003  *****  Name: cs8900.c                                        *****
00004  *****  Ver.: 1.0                                             *****
00005  *****  Date: 07/05/2001                                      *****
00006  *****  Auth: Andreas Dannenberg                              *****
00007  *****        HTWK Leipzig                                    *****
00008  *****        university of applied sciences                  *****
00009  *****        Germany                                         *****
00010  *****  Func: ethernet packet-driver for use with LAN-        *****
00011  *****        controller CS8900 from Crystal/Cirrus Logic     *****
00012  *****                                                        *****
00013  *****  NXP: Module modified for use with NXP                     *****
00014  *****        LPC1768 EMAC Ethernet controller                *****
00015  *****                                                        *****
00016  ******************************************************************/
00017
00018 #include "EMAC.h"
00019 #include "tcpip.h"
00020 #include "lpc17xx_emac.h"
00021 #include "lpc17xx_pinsel.h"
00022
00023 /* For debugging... */
00024 #include "debug_frmwrk.h"
00025 #include <stdio.h>
00026 #define DB      _DBG((uint8_t *)db)
00027 char db[64];
00028
00029 static unsigned short *rptr;
00030 static unsigned short *tptr;
00031
00032 /*
00033  * NXP: Here AHBRAM1 section still not be used, so a mount of this section
00034  * will be used to store buffer data get from receive packet buffer of EMAC
00035  */
00036 static unsigned short *pgBuf = (unsigned short *)LPC_AHBRAM1_BASE;
00037
00038 // configure port-pins for use with LAN-controller,
00039 // reset it and send the configuration-sequence
00040 void Init_EMAC(void)
00041 {
00042         uint32_t delay;
00043
00044         /* EMAC configuration type */
00045         EMAC_CFG_Type Emac_Config;
00046         /* pin configuration */
00047         PINSEL_CFG_Type PinCfg;
00048
00049         /* EMAC address */
00050         uint8_t EMACAddr[] = {MYMAC_1, MYMAC_2, MYMAC_3, MYMAC_4, MYMAC_5, MYMAC_6};
00051
00052         /*
00053          * Enable P1 Ethernet Pins:
00054          * P1.0 - ENET_TXD0
00055          * P1.1 - ENET_TXD1
00056          * P1.4 - ENET_TX_EN
00057          * P1.8 - ENET_CRS
00058          * P1.9 - ENET_RXD0
00059          * P1.10 - ENET_RXD1
00060          * P1.14 - ENET_RX_ER
00061          * P1.15 - ENET_REF_CLK
00062          * P1.16 - ENET_MDC
00063          * P1.17 - ENET_MDIO
00064          */
00065         PinCfg.Funcnum = 1;
00066         PinCfg.OpenDrain = 0;
00067         PinCfg.Pinmode = 0;
00068         PinCfg.Portnum = 1;
00069
00070         PinCfg.Pinnum = 0;
00071         PINSEL_ConfigPin(&PinCfg);
00072         PinCfg.Pinnum = 1;
00073         PINSEL_ConfigPin(&PinCfg);
00074         PinCfg.Pinnum = 4;
00075         PINSEL_ConfigPin(&PinCfg);
00076         PinCfg.Pinnum = 8;
00077         PINSEL_ConfigPin(&PinCfg);
00078         PinCfg.Pinnum = 9;
00079         PINSEL_ConfigPin(&PinCfg);
00080         PinCfg.Pinnum = 10;
00081         PINSEL_ConfigPin(&PinCfg);
00082         PinCfg.Pinnum = 14;
00083         PINSEL_ConfigPin(&PinCfg);
00084         PinCfg.Pinnum = 15;
00085         PINSEL_ConfigPin(&PinCfg);
00086         PinCfg.Pinnum = 16;
00087         PINSEL_ConfigPin(&PinCfg);
00088         PinCfg.Pinnum = 17;
00089         PINSEL_ConfigPin(&PinCfg);
00090
00091         _DBG_("Init EMAC module");
00092         sprintf(db,"MAC addr: %X-%X-%X-%X-%X-%X \n\r", \
00093                          EMACAddr[0],  EMACAddr[1],  EMACAddr[2], \
00094                           EMACAddr[3],  EMACAddr[4],  EMACAddr[5]);
00095         DB;
00096
00097         Emac_Config.Mode = EMAC_MODE_AUTO;
00098         Emac_Config.pbEMAC_Addr = EMACAddr;
00099         // Initialize EMAC module with given parameter
00100         while (EMAC_Init(&Emac_Config) == ERROR){
00101                 // Delay for a while then continue initializing EMAC module
00102                 _DBG_("Error during initializing EMAC, restart after a while");
00103                 for (delay = 0x100000; delay; delay--);
00104         }
00105         _DBG_("Init EMAC complete");
00106 }
00107
00108
00109 // reads a word in little-endian byte order from RX_BUFFER
00110
00111 unsigned short ReadFrame_EMAC(void)
00112 {
00113   return (*rptr++);
00114 }
00115
00116 // reads a word in big-endian byte order from RX_FRAME_PORT
00117 // (useful to avoid permanent byte-swapping while reading
00118 // TCP/IP-data)
00119
00120 unsigned short ReadFrameBE_EMAC(void)
00121 {
00122   unsigned short ReturnValue;
00123
00124   ReturnValue = SwapBytes (*rptr++);
00125   return (ReturnValue);
00126 }
00127
00128
00129 // copies bytes from frame port to MCU-memory
00130 // NOTES: * an odd number of byte may only be transfered
00131 //          if the frame is read to the end!
00132 //        * MCU-memory MUST start at word-boundary
00133
00134 void CopyFromFrame_EMAC(void *Dest, unsigned short Size)
00135 {
00136   unsigned short * piDest;                       // Keil: Pointer added to correct expression
00137
00138   piDest = Dest;                                 // Keil: Line added
00139   while (Size > 1) {
00140     *piDest++ = ReadFrame_EMAC();
00141     Size -= 2;
00142   }
00143
00144   if (Size) {                                         // check for leftover byte...
00145     *(unsigned char *)piDest = (char)ReadFrame_EMAC();// the LAN-Controller will return 0
00146   }                                                   // for the highbyte
00147 }
00148
00149 // does a dummy read on frame-I/O-port
00150 // NOTE: only an even number of bytes is read!
00151
00152 void DummyReadFrame_EMAC(unsigned short Size)    // discards an EVEN number of bytes
00153 {                                                // from RX-fifo
00154   while (Size > 1) {
00155     ReadFrame_EMAC();
00156     Size -= 2;
00157   }
00158 }
00159
00160 // Reads the length of the received ethernet frame and checks if the
00161 // destination address is a broadcast message or not
00162 // returns the frame length
00163 unsigned short StartReadFrame(void) {
00164         unsigned short RxLen;
00165         EMAC_PACKETBUF_Type RxPack;
00166
00167         RxLen = EMAC_GetReceiveDataSize() - 3;
00168         // Copy packet to data buffer
00169         RxPack.pbDataBuf = (uint32_t *)pgBuf;
00170         RxPack.ulDataLen = RxLen;
00171         EMAC_ReadPacketBuffer(&RxPack);
00172         // Point to the data buffer
00173         rptr = (unsigned short *)pgBuf;
00174         return(RxLen);
00175 }
00176
00177 // Release the buffer after reading all the content inside
00178 void EndReadFrame(void) {
00179         // just call EMAC_UpdateConsumeIndex() in EMAC driver
00180         EMAC_UpdateRxConsumeIndex();
00181 }
00182
00183 // Check whether if there is a receive packet coming
00184 unsigned int CheckFrameReceived(void) {             // Packet received ?
00185         // Just call EMAC_CheckReceiveIndex() in EMAC driver
00186         if (EMAC_CheckReceiveIndex() == TRUE){
00187                 return (1);
00188         } else {
00189                 return (0);
00190         }
00191 }
00192
00193 // requests space in EMAC memory for storing an outgoing frame
00194 void RequestSend(unsigned short FrameSize)
00195 {
00196         // Nothing to do here, just implemented in CopyToFrame_EMAC()
00197 }
00198
00199 // check if ethernet controller is ready to accept the
00200 // frame we want to send
00201
00202 unsigned int Rdy4Tx(void)
00203 {
00204   return (1);   // the ethernet controller transmits much faster
00205 }               // than the CPU can load its buffers
00206
00207
00208 // writes a word in little-endian byte order to TX_BUFFER
00209 void WriteFrame_EMAC(unsigned short Data)
00210 {
00211   *tptr++ = Data;
00212 }
00213
00214 // copies bytes from MCU-memory to frame port
00215 // NOTES: * an odd number of byte may only be transfered
00216 //          if the frame is written to the end!
00217 //        * MCU-memory MUST start at word-boundary
00218
00219 void CopyToFrame_EMAC(void *Source, unsigned int Size)
00220 {
00221         EMAC_PACKETBUF_Type TxPack;
00222
00223         // Setup Tx Packet buffer
00224         // NXP: Added for compatibility with old style
00225         TxPack.ulDataLen = Size;
00226         TxPack.pbDataBuf = (uint32_t *)Source;
00227         EMAC_WritePacketBuffer(&TxPack);
00228         EMAC_UpdateTxProduceIndex();
00229 }
00230
Generated on Tue Jun 7 14:58:59 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/Easy_Web/EMAC.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/Easy_Web/EMAC.h

Go to the documentation of this file.
00001 /*----------------------------------------------------------------------------
00002  *      LPC1768 Ethernet Definitions
00003  *----------------------------------------------------------------------------
00004  *      Name:    EMAC.H
00005  *      Purpose: LPC1768 EMAC hardware implementation definitions
00006  *----------------------------------------------------------------------------
00007  *      Copyright (c) 2006 KEIL - An ARM Company. All rights reserved.
00008  *---------------------------------------------------------------------------*/
00009
00010 #ifndef __EMAC_H
00011 #define __EMAC_H
00012
00013 #include "lpc17xx_emac.h"
00014
00015 #ifdef MCB_LPC_1768
00016 #define MYMAC_1         0x1E            /* our ethernet (MAC) address        */
00017 #define MYMAC_2         0x30            /* (MUST be unique in LAN!)          */
00018 #define MYMAC_3         0x6c
00019 #define MYMAC_4         0xa2
00020 #define MYMAC_5         0x45
00021 #define MYMAC_6         0x5e
00022 #elif defined(IAR_LPC_1768)
00023 /* Using IAR LPC1768 KickStart board */
00024 #define MYMAC_1         0x00            /* our ethernet (MAC) address        */
00025 #define MYMAC_2         0xFF            /* (MUST be unique in LAN!)          */
00026 #define MYMAC_3         0xFF
00027 #define MYMAC_4         0xFF
00028 #define MYMAC_5         0xFF
00029 #define MYMAC_6         0xFF
00030 #endif
00031
00032 // prototypes
00033 void           Init_EMAC(void);
00034 unsigned short ReadFrameBE_EMAC(void);
00035 void           CopyToFrame_EMAC(void *Source, unsigned int Size);
00036 void           CopyFromFrame_EMAC(void *Dest, unsigned short Size);
00037 void           DummyReadFrame_EMAC(unsigned short Size);
00038 unsigned short StartReadFrame(void);
00039 void           EndReadFrame(void);
00040 unsigned int   CheckFrameReceived(void);
00041 void           RequestSend(unsigned short FrameSize);
00042 unsigned int   Rdy4Tx(void);
00043
00044 #endif
00045
00046 /*----------------------------------------------------------------------------
00047  * end of file
00048  *---------------------------------------------------------------------------*/
00049
Generated on Tue Jun 7 14:58:59 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/Easy_Web/Retarget.c Source File

C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/Easy_Web/Retarget.c

Go to the documentation of this file.
00001 /******************************************************************************/
00002 /* RETARGET.C: 'Retarget' layer for target-dependent low level functions      */
00003 /******************************************************************************/
00004 /* This file is part of the uVision/ARM development tools.                    */
00005 /* Copyright (c) 2005-2006 Keil Software. All rights reserved.                */
00006 /* This software may only be used under the terms of a valid, current,        */
00007 /* end user licence from KEIL for a compatible version of KEIL software       */
00008 /* development tools. Nothing else gives you the right to use this software.  */
00009 /******************************************************************************/
00010
00011 // This used for ARMCC compiler only
00012 #if defined ( __CC_ARM   )
00013
00014 #include <rt_misc.h>
00015
00016 #pragma import(__use_no_semihosting_swi)
00017
00018 void _ttywrch(int ch) {
00019   // Not used (No Output)
00020 }
00021
00022 void _sys_exit(int return_code) {
00023 label:  goto label;  /* endless loop */
00024 }
00025 #endif /* __CC_ARM */
Generated on Tue Jun 7 14:58:59 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/LCD/QVGA_TFT_LCD/Font_24x16.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/LCD/QVGA_TFT_LCD/Font_24x16.h

Go to the documentation of this file.
00001 /*----------------------------------------------------------------------------
00002  * Name:    Font_24x16.h
00003  * Purpose: ASCII font characters (width 24 pixels, height 16 pixels)
00004  *----------------------------------------------------------------------------
00005  * This file is part of the uVision/ARM development tools.
00006  * This software may only be used under the terms of a valid, current,
00007  * end user licence from KEIL for a compatible version of KEIL software
00008  * development tools. Nothing else gives you the right to use this software.
00009  *
00010  * This software is supplied "AS IS" without warranties of any kind.
00011  *
00012  * Copyright (c) 2009 Keil - An ARM Company. All rights reserved.
00013  *----------------------------------------------------------------------------*/
00014
00015 #ifndef __FONT_24x16_H
00016 #define __FONT_24x16_H
00017
00018 #define CHAR_H      24                  /* Character Height (in pixels)       */
00019 #define CHAR_W      16                  /* Character Width (in pixels)        */
00020
00021 const uint16_t Font_24x16[] = {
00022   /* Space ' ' */
00023   0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
00024   0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
00025   0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
00026   /* '!' */
00027   0x0000, 0x0180, 0x0180, 0x0180, 0x0180, 0x0180, 0x0180, 0x0180,
00028   0x0180, 0x0180, 0x0180, 0x0180, 0x0180, 0x0180, 0x0000, 0x0000,
00029   0x0180, 0x0180, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
00030   /* '"' */
00031   0x0000, 0x0000, 0x00CC, 0x00CC, 0x00CC, 0x00CC, 0x00CC, 0x00CC,
00032   0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
00033   0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
00034   /* '#' */
00035   0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0C60, 0x0C60,
00036   0x0C60, 0x0630, 0x0630, 0x1FFE, 0x1FFE, 0x0630, 0x0738, 0x0318,
00037   0x1FFE, 0x1FFE, 0x0318, 0x0318, 0x018C, 0x018C, 0x018C, 0x0000,
00038   /* '$' */
00039   0x0000, 0x0080, 0x03E0, 0x0FF8, 0x0E9C, 0x1C8C, 0x188C, 0x008C,
00040   0x0098, 0x01F8, 0x07E0, 0x0E80, 0x1C80, 0x188C, 0x188C, 0x189C,
00041   0x0CB8, 0x0FF0, 0x03E0, 0x0080, 0x0080, 0x0000, 0x0000, 0x0000,
00042   /* '%' */
00043   0x0000, 0x0000, 0x0000, 0x180E, 0x0C1B, 0x0C11, 0x0611, 0x0611,
00044   0x0311, 0x0311, 0x019B, 0x018E, 0x38C0, 0x6CC0, 0x4460, 0x4460,
00045   0x4430, 0x4430, 0x4418, 0x6C18, 0x380C, 0x0000, 0x0000, 0x0000,
00046   /* '&' */
00047   0x0000, 0x01E0, 0x03F0, 0x0738, 0x0618, 0x0618, 0x0330, 0x01F0,
00048   0x00F0, 0x00F8, 0x319C, 0x330E, 0x1E06, 0x1C06, 0x1C06, 0x3F06,
00049   0x73FC, 0x21F0, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
00050   /* ''' */
00051   0x0000, 0x0000, 0x000C, 0x000C, 0x000C, 0x000C, 0x000C, 0x000C,
00052   0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
00053   0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
00054   /* '(' */
00055   0x0000, 0x0200, 0x0300, 0x0180, 0x00C0, 0x00C0, 0x0060, 0x0060,
00056   0x0030, 0x0030, 0x0030, 0x0030, 0x0030, 0x0030, 0x0030, 0x0030,
00057   0x0060, 0x0060, 0x00C0, 0x00C0, 0x0180, 0x0300, 0x0200, 0x0000,
00058   /* ')' */
00059   0x0000, 0x0020, 0x0060, 0x00C0, 0x0180, 0x0180, 0x0300, 0x0300,
00060   0x0600, 0x0600, 0x0600, 0x0600, 0x0600, 0x0600, 0x0600, 0x0600,
00061   0x0300, 0x0300, 0x0180, 0x0180, 0x00C0, 0x0060, 0x0020, 0x0000,
00062   /* '*' */
00063   0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x00C0, 0x00C0,
00064   0x06D8, 0x07F8, 0x01E0, 0x0330, 0x0738, 0x0000, 0x0000, 0x0000,
00065   0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
00066   /* '+' */
00067   0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0180, 0x0180,
00068   0x0180, 0x0180, 0x0180, 0x3FFC, 0x3FFC, 0x0180, 0x0180, 0x0180,
00069   0x0180, 0x0180, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
00070   /* ',' */
00071   0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
00072   0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
00073   0x0000, 0x0180, 0x0180, 0x0100, 0x0100, 0x0080, 0x0000, 0x0000,
00074   /* '-' */
00075   0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
00076   0x0000, 0x0000, 0x0000, 0x0000, 0x07E0, 0x07E0, 0x0000, 0x0000,
00077   0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
00078   /* '.' */
00079   0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
00080   0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
00081   0x0000, 0x00C0, 0x00C0, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
00082   /* '/' */
00083   0x0000, 0x0C00, 0x0C00, 0x0600, 0x0600, 0x0600, 0x0300, 0x0300,
00084   0x0300, 0x0380, 0x0180, 0x0180, 0x0180, 0x00C0, 0x00C0, 0x00C0,
00085   0x0060, 0x0060, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
00086   /* '0' */
00087   0x0000, 0x03E0, 0x07F0, 0x0E38, 0x0C18, 0x180C, 0x180C, 0x180C,
00088   0x180C, 0x180C, 0x180C, 0x180C, 0x180C, 0x180C, 0x0C18, 0x0E38,
00089   0x07F0, 0x03E0, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
00090   /* '1' */
00091   0x0000, 0x0100, 0x0180, 0x01C0, 0x01F0, 0x0198, 0x0188, 0x0180,
00092   0x0180, 0x0180, 0x0180, 0x0180, 0x0180, 0x0180, 0x0180, 0x0180,
00093   0x0180, 0x0180, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
00094   /* '2' */
00095   0x0000, 0x03E0, 0x0FF8, 0x0C18, 0x180C, 0x180C, 0x1800, 0x1800,
00096   0x0C00, 0x0600, 0x0300, 0x0180, 0x00C0, 0x0060, 0x0030, 0x0018,
00097   0x1FFC, 0x1FFC, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
00098   /* '3' */
00099   0x0000, 0x01E0, 0x07F8, 0x0E18, 0x0C0C, 0x0C0C, 0x0C00, 0x0600,
00100   0x03C0, 0x07C0, 0x0C00, 0x1800, 0x1800, 0x180C, 0x180C, 0x0C18,
00101   0x07F8, 0x03E0, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
00102   /* '4' */
00103   0x0000, 0x0C00, 0x0E00, 0x0F00, 0x0F00, 0x0D80, 0x0CC0, 0x0C60,
00104   0x0C60, 0x0C30, 0x0C18, 0x0C0C, 0x3FFC, 0x3FFC, 0x0C00, 0x0C00,
00105   0x0C00, 0x0C00, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
00106   /* '5' */
00107   0x0000, 0x0FF8, 0x0FF8, 0x0018, 0x0018, 0x000C, 0x03EC, 0x07FC,
00108   0x0E1C, 0x1C00, 0x1800, 0x1800, 0x1800, 0x180C, 0x0C1C, 0x0E18,
00109   0x07F8, 0x03E0, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
00110   /* '6' */
00111   0x0000, 0x07C0, 0x0FF0, 0x1C38, 0x1818, 0x0018, 0x000C, 0x03CC,
00112   0x0FEC, 0x0E3C, 0x1C1C, 0x180C, 0x180C, 0x180C, 0x1C18, 0x0E38,
00113   0x07F0, 0x03E0, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
00114   /* '7' */
00115   0x0000, 0x1FFC, 0x1FFC, 0x0C00, 0x0600, 0x0600, 0x0300, 0x0380,
00116   0x0180, 0x01C0, 0x00C0, 0x00E0, 0x0060, 0x0060, 0x0070, 0x0030,
00117   0x0030, 0x0030, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
00118   /* '8' */
00119   0x0000, 0x03E0, 0x07F0, 0x0E38, 0x0C18, 0x0C18, 0x0C18, 0x0638,
00120   0x07F0, 0x07F0, 0x0C18, 0x180C, 0x180C, 0x180C, 0x180C, 0x0C38,
00121   0x0FF8, 0x03E0, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
00122   /* '9' */
00123   0x0000, 0x03E0, 0x07F0, 0x0E38, 0x0C1C, 0x180C, 0x180C, 0x180C,
00124   0x1C1C, 0x1E38, 0x1BF8, 0x19E0, 0x1800, 0x0C00, 0x0C00, 0x0E1C,
00125   0x07F8, 0x01F0, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
00126   /* ':' */
00127   0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0180, 0x0180,
00128   0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
00129   0x0180, 0x0180, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
00130   /* ';' */
00131   0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0180, 0x0180,
00132   0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
00133   0x0180, 0x0180, 0x0100, 0x0100, 0x0080, 0x0000, 0x0000, 0x0000,
00134   /* '<' */
00135   0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
00136   0x1000, 0x1C00, 0x0F80, 0x03E0, 0x00F8, 0x0018, 0x00F8, 0x03E0,
00137   0x0F80, 0x1C00, 0x1000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
00138   /* '=' */
00139   0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
00140   0x1FF8, 0x0000, 0x0000, 0x0000, 0x1FF8, 0x0000, 0x0000, 0x0000,
00141   0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
00142   /* '>' */
00143   0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
00144   0x0008, 0x0038, 0x01F0, 0x07C0, 0x1F00, 0x1800, 0x1F00, 0x07C0,
00145   0x01F0, 0x0038, 0x0008, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
00146   /* '?' */
00147   0x0000, 0x03E0, 0x0FF8, 0x0C18, 0x180C, 0x180C, 0x1800, 0x0C00,
00148   0x0600, 0x0300, 0x0180, 0x00C0, 0x00C0, 0x00C0, 0x0000, 0x0000,
00149   0x00C0, 0x00C0, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
00150   /* '@' */
00151   0x0000, 0x0000, 0x07E0, 0x1818, 0x2004, 0x29C2, 0x4A22, 0x4411,
00152   0x4409, 0x4409, 0x4409, 0x2209, 0x1311, 0x0CE2, 0x4002, 0x2004,
00153   0x1818, 0x07E0, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
00154   /* 'A' */
00155   0x0000, 0x0380, 0x0380, 0x06C0, 0x06C0, 0x06C0, 0x0C60, 0x0C60,
00156   0x1830, 0x1830, 0x1830, 0x3FF8, 0x3FF8, 0x701C, 0x600C, 0x600C,
00157   0xC006, 0xC006, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
00158   /* 'B' */
00159   0x0000, 0x03FC, 0x0FFC, 0x0C0C, 0x180C, 0x180C, 0x180C, 0x0C0C,
00160   0x07FC, 0x0FFC, 0x180C, 0x300C, 0x300C, 0x300C, 0x300C, 0x180C,
00161   0x1FFC, 0x07FC, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
00162   /* 'C' */
00163   0x0000, 0x07C0, 0x1FF0, 0x3838, 0x301C, 0x700C, 0x6006, 0x0006,
00164   0x0006, 0x0006, 0x0006, 0x0006, 0x0006, 0x6006, 0x700C, 0x301C,
00165   0x1FF0, 0x07E0, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
00166   /* 'D' */
00167   0x0000, 0x03FE, 0x0FFE, 0x0E06, 0x1806, 0x1806, 0x3006, 0x3006,
00168   0x3006, 0x3006, 0x3006, 0x3006, 0x3006, 0x1806, 0x1806, 0x0E06,
00169   0x0FFE, 0x03FE, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
00170   /* 'E' */
00171   0x0000, 0x3FFC, 0x3FFC, 0x000C, 0x000C, 0x000C, 0x000C, 0x000C,
00172   0x1FFC, 0x1FFC, 0x000C, 0x000C, 0x000C, 0x000C, 0x000C, 0x000C,
00173   0x3FFC, 0x3FFC, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
00174   /* 'F' */
00175   0x0000, 0x3FF8, 0x3FF8, 0x0018, 0x0018, 0x0018, 0x0018, 0x0018,
00176   0x1FF8, 0x1FF8, 0x0018, 0x0018, 0x0018, 0x0018, 0x0018, 0x0018,
00177   0x0018, 0x0018, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
00178   /* 'G' */
00179   0x0000, 0x0FE0, 0x3FF8, 0x783C, 0x600E, 0xE006, 0xC007, 0x0003,
00180   0x0003, 0xFE03, 0xFE03, 0xC003, 0xC007, 0xC006, 0xC00E, 0xF03C,
00181   0x3FF8, 0x0FE0, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
00182   /* 'H' */
00183   0x0000, 0x300C, 0x300C, 0x300C, 0x300C, 0x300C, 0x300C, 0x300C,
00184   0x3FFC, 0x3FFC, 0x300C, 0x300C, 0x300C, 0x300C, 0x300C, 0x300C,
00185   0x300C, 0x300C, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
00186   /* 'I' */
00187   0x0000, 0x0180, 0x0180, 0x0180, 0x0180, 0x0180, 0x0180, 0x0180,
00188   0x0180, 0x0180, 0x0180, 0x0180, 0x0180, 0x0180, 0x0180, 0x0180,
00189   0x0180, 0x0180, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
00190   /* 'J' */
00191   0x0000, 0x0600, 0x0600, 0x0600, 0x0600, 0x0600, 0x0600, 0x0600,
00192   0x0600, 0x0600, 0x0600, 0x0600, 0x0600, 0x0618, 0x0618, 0x0738,
00193   0x03F0, 0x01E0, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
00194   /* 'K' */
00195   0x0000, 0x3006, 0x1806, 0x0C06, 0x0606, 0x0306, 0x0186, 0x00C6,
00196   0x0066, 0x0076, 0x00DE, 0x018E, 0x0306, 0x0606, 0x0C06, 0x1806,
00197   0x3006, 0x6006, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
00198   /* 'L' */
00199   0x0000, 0x0018, 0x0018, 0x0018, 0x0018, 0x0018, 0x0018, 0x0018,
00200   0x0018, 0x0018, 0x0018, 0x0018, 0x0018, 0x0018, 0x0018, 0x0018,
00201   0x1FF8, 0x1FF8, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
00202   /* 'M' */
00203   0x0000, 0xE00E, 0xF01E, 0xF01E, 0xF01E, 0xD836, 0xD836, 0xD836,
00204   0xD836, 0xCC66, 0xCC66, 0xCC66, 0xC6C6, 0xC6C6, 0xC6C6, 0xC6C6,
00205   0xC386, 0xC386, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
00206   /* 'N' */
00207   0x0000, 0x300C, 0x301C, 0x303C, 0x303C, 0x306C, 0x306C, 0x30CC,
00208   0x30CC, 0x318C, 0x330C, 0x330C, 0x360C, 0x360C, 0x3C0C, 0x3C0C,
00209   0x380C, 0x300C, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
00210   /* 'O' */
00211   0x0000, 0x07E0, 0x1FF8, 0x381C, 0x700E, 0x6006, 0xC003, 0xC003,
00212   0xC003, 0xC003, 0xC003, 0xC003, 0xC003, 0x6006, 0x700E, 0x381C,
00213   0x1FF8, 0x07E0, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
00214   /* 'P' */
00215   0x0000, 0x0FFC, 0x1FFC, 0x380C, 0x300C, 0x300C, 0x300C, 0x300C,
00216   0x180C, 0x1FFC, 0x07FC, 0x000C, 0x000C, 0x000C, 0x000C, 0x000C,
00217   0x000C, 0x000C, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
00218   /* 'Q' */
00219   0x0000, 0x07E0, 0x1FF8, 0x381C, 0x700E, 0x6006, 0xE003, 0xC003,
00220   0xC003, 0xC003, 0xC003, 0xC003, 0xE007, 0x6306, 0x3F0E, 0x3C1C,
00221   0x3FF8, 0xF7E0, 0xC000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
00222   /* 'R' */
00223   0x0000, 0x0FFE, 0x1FFE, 0x3806, 0x3006, 0x3006, 0x3006, 0x3806,
00224   0x1FFE, 0x07FE, 0x0306, 0x0606, 0x0C06, 0x1806, 0x1806, 0x3006,
00225   0x3006, 0x6006, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
00226   /* 'S' */
00227   0x0000, 0x03E0, 0x0FF8, 0x0C1C, 0x180C, 0x180C, 0x000C, 0x001C,
00228   0x03F8, 0x0FE0, 0x1E00, 0x3800, 0x3006, 0x3006, 0x300E, 0x1C1C,
00229   0x0FF8, 0x07E0, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
00230   /* 'T' */
00231   0x0000, 0x7FFE, 0x7FFE, 0x0180, 0x0180, 0x0180, 0x0180, 0x0180,
00232   0x0180, 0x0180, 0x0180, 0x0180, 0x0180, 0x0180, 0x0180, 0x0180,
00233   0x0180, 0x0180, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
00234   /* 'U' */
00235   0x0000, 0x300C, 0x300C, 0x300C, 0x300C, 0x300C, 0x300C, 0x300C,
00236   0x300C, 0x300C, 0x300C, 0x300C, 0x300C, 0x300C, 0x300C, 0x1818,
00237   0x1FF8, 0x07E0, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
00238   /* 'V' */
00239   0x0000, 0x6003, 0x3006, 0x3006, 0x3006, 0x180C, 0x180C, 0x180C,
00240   0x0C18, 0x0C18, 0x0E38, 0x0630, 0x0630, 0x0770, 0x0360, 0x0360,
00241   0x01C0, 0x01C0, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
00242   /* 'W' */
00243   0x0000, 0x6003, 0x61C3, 0x61C3, 0x61C3, 0x3366, 0x3366, 0x3366,
00244   0x3366, 0x3366, 0x3366, 0x1B6C, 0x1B6C, 0x1B6C, 0x1A2C, 0x1E3C,
00245   0x0E38, 0x0E38, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
00246   /* 'X' */
00247   0x0000, 0xE00F, 0x700C, 0x3018, 0x1830, 0x0C70, 0x0E60, 0x07C0,
00248   0x0380, 0x0380, 0x03C0, 0x06E0, 0x0C70, 0x1C30, 0x1818, 0x300C,
00249   0x600E, 0xE007, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
00250   /* 'Y' */
00251   0x0000, 0xC003, 0x6006, 0x300C, 0x381C, 0x1838, 0x0C30, 0x0660,
00252   0x07E0, 0x03C0, 0x0180, 0x0180, 0x0180, 0x0180, 0x0180, 0x0180,
00253   0x0180, 0x0180, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
00254   /* 'Z' */
00255   0x0000, 0x7FFC, 0x7FFC, 0x6000, 0x3000, 0x1800, 0x0C00, 0x0600,
00256   0x0300, 0x0180, 0x00C0, 0x0060, 0x0030, 0x0018, 0x000C, 0x0006,
00257   0x7FFE, 0x7FFE, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
00258   /* '[' */
00259   0x0000, 0x03E0, 0x03E0, 0x0060, 0x0060, 0x0060, 0x0060, 0x0060,
00260   0x0060, 0x0060, 0x0060, 0x0060, 0x0060, 0x0060, 0x0060, 0x0060,
00261   0x0060, 0x0060, 0x0060, 0x0060, 0x0060, 0x03E0, 0x03E0, 0x0000,
00262   /* '\' */
00263   0x0000, 0x0030, 0x0030, 0x0060, 0x0060, 0x0060, 0x00C0, 0x00C0,
00264   0x00C0, 0x01C0, 0x0180, 0x0180, 0x0180, 0x0300, 0x0300, 0x0300,
00265   0x0600, 0x0600, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
00266   /* ']' */
00267   0x0000, 0x03E0, 0x03E0, 0x0300, 0x0300, 0x0300, 0x0300, 0x0300,
00268   0x0300, 0x0300, 0x0300, 0x0300, 0x0300, 0x0300, 0x0300, 0x0300,
00269   0x0300, 0x0300, 0x0300, 0x0300, 0x0300, 0x03E0, 0x03E0, 0x0000,
00270   /* '^' */
00271   0x0000, 0x0000, 0x01C0, 0x01C0, 0x0360, 0x0360, 0x0360, 0x0630,
00272   0x0630, 0x0C18, 0x0C18, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
00273   0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
00274   /* '_' */
00275   0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
00276   0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
00277   0x0000, 0xFFFF, 0xFFFF, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
00278   /* ''' */
00279   0x0000, 0x000C, 0x000C, 0x000C, 0x000C, 0x000C, 0x000C, 0x0000,
00280   0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
00281   0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
00282   /* 'a' */
00283   0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x03F0, 0x07F8,
00284   0x0C1C, 0x0C0C, 0x0F00, 0x0FF0, 0x0CF8, 0x0C0C, 0x0C0C, 0x0F1C,
00285   0x0FF8, 0x18F0, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
00286   /* 'b' */
00287   0x0000, 0x0018, 0x0018, 0x0018, 0x0018, 0x0018, 0x03D8, 0x0FF8,
00288   0x0C38, 0x1818, 0x1818, 0x1818, 0x1818, 0x1818, 0x1818, 0x0C38,
00289   0x0FF8, 0x03D8, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
00290   /* 'c' */
00291   0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x03C0, 0x07F0,
00292   0x0E30, 0x0C18, 0x0018, 0x0018, 0x0018, 0x0018, 0x0C18, 0x0E30,
00293   0x07F0, 0x03C0, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
00294   /* 'd' */
00295   0x0000, 0x1800, 0x1800, 0x1800, 0x1800, 0x1800, 0x1BC0, 0x1FF0,
00296   0x1C30, 0x1818, 0x1818, 0x1818, 0x1818, 0x1818, 0x1818, 0x1C30,
00297   0x1FF0, 0x1BC0, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
00298   /* 'e' */
00299   0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x03C0, 0x0FF0,
00300   0x0C30, 0x1818, 0x1FF8, 0x1FF8, 0x0018, 0x0018, 0x1838, 0x1C30,
00301   0x0FF0, 0x07C0, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
00302   /* 'f' */
00303   0x0000, 0x0F80, 0x0FC0, 0x00C0, 0x00C0, 0x00C0, 0x07F0, 0x07F0,
00304   0x00C0, 0x00C0, 0x00C0, 0x00C0, 0x00C0, 0x00C0, 0x00C0, 0x00C0,
00305   0x00C0, 0x00C0, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
00306   /* 'g' */
00307   0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0DE0, 0x0FF8,
00308   0x0E18, 0x0C0C, 0x0C0C, 0x0C0C, 0x0C0C, 0x0C0C, 0x0C0C, 0x0E18,
00309   0x0FF8, 0x0DE0, 0x0C00, 0x0C0C, 0x061C, 0x07F8, 0x01F0, 0x0000,
00310   /* 'h' */
00311   0x0000, 0x0018, 0x0018, 0x0018, 0x0018, 0x0018, 0x07D8, 0x0FF8,
00312   0x1C38, 0x1818, 0x1818, 0x1818, 0x1818, 0x1818, 0x1818, 0x1818,
00313   0x1818, 0x1818, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
00314   /* 'i' */
00315   0x0000, 0x00C0, 0x00C0, 0x0000, 0x0000, 0x0000, 0x00C0, 0x00C0,
00316   0x00C0, 0x00C0, 0x00C0, 0x00C0, 0x00C0, 0x00C0, 0x00C0, 0x00C0,
00317   0x00C0, 0x00C0, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
00318   /* 'j' */
00319   0x0000, 0x00C0, 0x00C0, 0x0000, 0x0000, 0x0000, 0x00C0, 0x00C0,
00320   0x00C0, 0x00C0, 0x00C0, 0x00C0, 0x00C0, 0x00C0, 0x00C0, 0x00C0,
00321   0x00C0, 0x00C0, 0x00C0, 0x00C0, 0x00C0, 0x00F8, 0x0078, 0x0000,
00322   /* 'k' */
00323   0x0000, 0x000C, 0x000C, 0x000C, 0x000C, 0x000C, 0x0C0C, 0x060C,
00324   0x030C, 0x018C, 0x00CC, 0x006C, 0x00FC, 0x019C, 0x038C, 0x030C,
00325   0x060C, 0x0C0C, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
00326   /* 'l' */
00327   0x0000, 0x00C0, 0x00C0, 0x00C0, 0x00C0, 0x00C0, 0x00C0, 0x00C0,
00328   0x00C0, 0x00C0, 0x00C0, 0x00C0, 0x00C0, 0x00C0, 0x00C0, 0x00C0,
00329   0x00C0, 0x00C0, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
00330   /* 'm' */
00331   0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x3C7C, 0x7EFF,
00332   0xE3C7, 0xC183, 0xC183, 0xC183, 0xC183, 0xC183, 0xC183, 0xC183,
00333   0xC183, 0xC183, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
00334   /* 'n' */
00335   0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0798, 0x0FF8,
00336   0x1C38, 0x1818, 0x1818, 0x1818, 0x1818, 0x1818, 0x1818, 0x1818,
00337   0x1818, 0x1818, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
00338   /* 'o' */
00339   0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x03C0, 0x0FF0,
00340   0x0C30, 0x1818, 0x1818, 0x1818, 0x1818, 0x1818, 0x1818, 0x0C30,
00341   0x0FF0, 0x03C0, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
00342   /* 'p' */
00343   0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x03D8, 0x0FF8,
00344   0x0C38, 0x1818, 0x1818, 0x1818, 0x1818, 0x1818, 0x1818, 0x0C38,
00345   0x0FF8, 0x03D8, 0x0018, 0x0018, 0x0018, 0x0018, 0x0018, 0x0000,
00346   /* 'q' */
00347   0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x1BC0, 0x1FF0,
00348   0x1C30, 0x1818, 0x1818, 0x1818, 0x1818, 0x1818, 0x1818, 0x1C30,
00349   0x1FF0, 0x1BC0, 0x1800, 0x1800, 0x1800, 0x1800, 0x1800, 0x0000,
00350   /* 'r' */
00351   0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x07B0, 0x03F0,
00352   0x0070, 0x0030, 0x0030, 0x0030, 0x0030, 0x0030, 0x0030, 0x0030,
00353   0x0030, 0x0030, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
00354   /* 's' */
00355   0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x03E0, 0x03F0,
00356   0x0E38, 0x0C18, 0x0038, 0x03F0, 0x07C0, 0x0C00, 0x0C18, 0x0E38,
00357   0x07F0, 0x03E0, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
00358   /* 't' */
00359   0x0000, 0x0000, 0x0080, 0x00C0, 0x00C0, 0x00C0, 0x07F0, 0x07F0,
00360   0x00C0, 0x00C0, 0x00C0, 0x00C0, 0x00C0, 0x00C0, 0x00C0, 0x00C0,
00361   0x07C0, 0x0780, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
00362   /* 'u' */
00363   0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x1818, 0x1818,
00364   0x1818, 0x1818, 0x1818, 0x1818, 0x1818, 0x1818, 0x1818, 0x1C38,
00365   0x1FF0, 0x19E0, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
00366   /* 'v' */
00367   0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x180C, 0x0C18,
00368   0x0C18, 0x0C18, 0x0630, 0x0630, 0x0630, 0x0360, 0x0360, 0x0360,
00369   0x01C0, 0x01C0, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
00370   /* 'w' */
00371   0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x41C1, 0x41C1,
00372   0x61C3, 0x6363, 0x6363, 0x6363, 0x3636, 0x3636, 0x3636, 0x1C1C,
00373   0x1C1C, 0x1C1C, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
00374   /* 'x' */
00375   0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x381C, 0x1C38,
00376   0x0C30, 0x0660, 0x03C0, 0x03C0, 0x03C0, 0x03C0, 0x0660, 0x0C30,
00377   0x1C38, 0x381C, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
00378   /* 'y' */
00379   0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x3018, 0x1830,
00380   0x1830, 0x1870, 0x0C60, 0x0C60, 0x0CE0, 0x06C0, 0x06C0, 0x0380,
00381   0x0380, 0x0380, 0x0180, 0x0180, 0x01C0, 0x00F0, 0x0070, 0x0000,
00382   /* 'z' */
00383   0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x1FFC, 0x1FFC,
00384   0x0C00, 0x0600, 0x0300, 0x0180, 0x00C0, 0x0060, 0x0030, 0x0018,
00385   0x1FFC, 0x1FFC, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
00386   /* '{' */
00387   0x0000, 0x0300, 0x0180, 0x00C0, 0x00C0, 0x00C0, 0x00C0, 0x00C0,
00388   0x00C0, 0x0060, 0x0060, 0x0030, 0x0060, 0x0040, 0x00C0, 0x00C0,
00389   0x00C0, 0x00C0, 0x00C0, 0x00C0, 0x0180, 0x0300, 0x0000, 0x0000,
00390   /* '|' */
00391   0x0000, 0x0180, 0x0180, 0x0180, 0x0180, 0x0180, 0x0180, 0x0180,
00392   0x0180, 0x0180, 0x0180, 0x0180, 0x0180, 0x0180, 0x0180, 0x0180,
00393   0x0180, 0x0180, 0x0180, 0x0180, 0x0180, 0x0180, 0x0180, 0x0000,
00394   /* '}' */
00395   0x0000, 0x0060, 0x00C0, 0x01C0, 0x0180, 0x0180, 0x0180, 0x0180,
00396   0x0180, 0x0300, 0x0300, 0x0600, 0x0300, 0x0100, 0x0180, 0x0180,
00397   0x0180, 0x0180, 0x0180, 0x0180, 0x00C0, 0x0060, 0x0000, 0x0000,
00398   /* '~' */
00399   0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
00400   0x10F0, 0x1FF8, 0x0F08, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
00401   0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
00402   /* ' ' */
00403   0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
00404   0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
00405   0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
00406
00407   /* Special Symbols  starting at character 0x80 */
00408   /* Circle - Empty */
00409   0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x03C0, 0x0C30, 0x1008,
00410   0x2004, 0x2004, 0x4002, 0x4002, 0x4002, 0x4002, 0x4002, 0x2004,
00411   0x2004, 0x1008, 0x0C30, 0x03C0, 0x0000, 0x0000, 0x0000, 0x0000,
00412   /* Circle - Full */
00413   0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x03C0, 0x0FF0, 0x1FF8,
00414   0x3FFC, 0x3FFC, 0x7FFE, 0x7FFE, 0x7FFE, 0x7FFE, 0x7FFE, 0x3FFC,
00415   0x3FFC, 0x1FF8, 0x0FF0, 0x03C0, 0x0000, 0x0000, 0x0000, 0x0000,
00416   /* Square - Empty */
00417   0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x07E0,
00418   0x0FF0, 0x1818, 0x1818, 0x1818, 0x1818, 0x1818, 0x1818, 0x0FF0,
00419   0x07E0, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
00420   /* Square - Full */
00421   0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x07E0,
00422   0x0FF0, 0x1FF8, 0x1FF8, 0x1FF8, 0x1FF8, 0x1FF8, 0x1FF8, 0x0FF0,
00423   0x07E0, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
00424   /* Up - Empty */
00425   0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
00426   0x0000, 0x0000, 0x0000, 0x0000, 0x0180, 0x03C0, 0x0660, 0x0C30,
00427   0x1818, 0x1818, 0x1FF8, 0x1FF8, 0x0000, 0x0000, 0x0000, 0x0000,
00428   /* Up - Full */
00429   0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
00430   0x0000, 0x0000, 0x0000, 0x0000, 0x0180, 0x03C0, 0x07E0, 0x0FF0,
00431   0x1FF8, 0x1FF8, 0x1FF8, 0x1FF8, 0x0000, 0x0000, 0x0000, 0x0000,
00432   /* Down - Empty */
00433   0x0000, 0x0000, 0x0000, 0x0000, 0x1FF8, 0x1FF8, 0x1818, 0x1818,
00434   0x0C30, 0x0660, 0x03C0, 0x0180, 0x0000, 0x0000, 0x0000, 0x0000,
00435   0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
00436   /* Down - Full */
00437   0x0000, 0x0000, 0x0000, 0x0000, 0x1FF8, 0x1FF8, 0x1FF8, 0x1FF8,
00438   0x0FF0, 0x07E0, 0x03C0, 0x0180, 0x0000, 0x0000, 0x0000, 0x0000,
00439   0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
00440   /* Left - Empty */
00441   0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x01E0,
00442   0x01F0, 0x0198, 0x018C, 0x0186, 0x0186, 0x018C, 0x0198, 0x01F0,
00443   0x01E0, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
00444   /* Left - Full */
00445   0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x01E0,
00446   0x01F0, 0x01F8, 0x01FC, 0x01FE, 0x01FE, 0x01FC, 0x01F8, 0x01F0,
00447   0x01E0, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
00448   /* Right - Empty */
00449   0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0780,
00450   0x0F80, 0x1980, 0x3180, 0x6180, 0x6180, 0x3180, 0x1980, 0x0F80,
00451   0x0780, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
00452   /* Right - Full */
00453   0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0780,
00454   0x0F80, 0x1F80, 0x3F80, 0x7F80, 0x7F80, 0x3F80, 0x1F80, 0x0F80,
00455   0x0780, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
00456   /* Wait - Empty */
00457   0x0000, 0x01C0, 0x0220, 0x0220, 0x0140, 0x0630, 0x0808, 0x0808,
00458   0x0808, 0x0808, 0x0808, 0x0808, 0x0808, 0x0220, 0x0220, 0x0220,
00459   0x0220, 0x0220, 0x0220, 0x0220, 0x0220, 0x0220, 0x0220, 0x0000,
00460   /* Wait - Full */
00461   0x0000, 0x01C0, 0x03E0, 0x03E0, 0x01C0, 0x07F0, 0x0DD8, 0x0DD8,
00462   0x0DD8, 0x0DD8, 0x0DD8, 0x0DD8, 0x0DD8, 0x0360, 0x0360, 0x0360,
00463   0x0360, 0x0360, 0x0360, 0x0360, 0x0360, 0x0360, 0x0360, 0x0000,
00464   /* Walk - Empty */
00465   0x0000, 0x01C0, 0x0220, 0x0220, 0x0140, 0x0630, 0x0808, 0x0808,
00466   0x0808, 0x1004, 0x2002, 0x2002, 0x0140, 0x0220, 0x0220, 0x0410,
00467   0x0808, 0x0808, 0x1004, 0x1004, 0x2004, 0x4004, 0x0000, 0x0000,
00468   /* Walk - Full */
00469   0x0000, 0x01C0, 0x03E0, 0x03E0, 0x01C0, 0x07F0, 0x0DD8, 0x0DD8,
00470   0x0DD8, 0x19CC, 0x31C6, 0x61C2, 0x01C0, 0x0360, 0x0360, 0x0670,
00471   0x0C38, 0x0C18, 0x180C, 0x180C, 0x300C, 0x600C, 0x0000, 0x0000,
00472 };
00473
00474 #endif /* __FONT_24x16_H */
Generated on Tue Jun 7 14:59:02 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/LCD/QVGA_TFT_LCD/GLCD.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/LCD/QVGA_TFT_LCD/GLCD.h

Go to the documentation of this file.
00001 /******************************************************************************/
00002 /* GLCD.h: Graphic LCD function prototypes and defines                        */
00003 /******************************************************************************/
00004 /* This file is part of the uVision/ARM development tools.                    */
00005 /* Copyright (c) 2005-2009 Keil Software. All rights reserved.                */
00006 /* This software may only be used under the terms of a valid, current,        */
00007 /* end user licence from KEIL for a compatible version of KEIL software       */
00008 /* development tools. Nothing else gives you the right to use this software.  */
00009 /******************************************************************************/
00010
00011 #ifndef _GLCD_H
00012 #define _GLCD_H
00013
00014 /*------------------------------------------------------------------------------
00015   Color coding
00016   GLCD is coded:   15..11 red, 10..5 green, 4..0 blue  (unsigned short)  GLCD_R5, GLCD_G6, GLCD_B5
00017   original coding: 17..12 red, 11..6 green, 5..0 blue                    ORG_R6,  ORG_G6,  ORG_B6
00018
00019   ORG_R1..5 = GLCD_R0..4,  ORG_R0 = GLCD_R4
00020   ORG_G0..5 = GLCD_G0..5,
00021   ORG_B1..5 = GLCD_B0..4,  ORG_B0 = GLCD_B4
00022  *----------------------------------------------------------------------------*/
00023
00024 /* GLCD RGB color definitions                                                 */
00025 #define Black           0x0000          /*   0,   0,   0 */
00026 #define Navy            0x000F      /*   0,   0, 128 */
00027 #define DarkGreen       0x03E0      /*   0, 128,   0 */
00028 #define DarkCyan        0x03EF      /*   0, 128, 128 */
00029 #define Maroon          0x7800      /* 128,   0,   0 */
00030 #define Purple          0x780F      /* 128,   0, 128 */
00031 #define Olive           0x7BE0      /* 128, 128,   0 */
00032 #define LightGrey       0xC618      /* 192, 192, 192 */
00033 #define DarkGrey        0x7BEF      /* 128, 128, 128 */
00034 #define Blue            0x001F      /*   0,   0, 255 */
00035 #define Green           0x07E0      /*   0, 255,   0 */
00036 #define Cyan            0x07FF      /*   0, 255, 255 */
00037 #define Red             0xF800      /* 255,   0,   0 */
00038 #define Magenta         0xF81F      /* 255,   0, 255 */
00039 #define Yellow          0xFFE0      /* 255, 255, 0   */
00040 #define White           0xFFFF      /* 255, 255, 255 */
00041
00042
00043 extern void GLCD_Init           (void);
00044 extern void GLCD_WindowMax      (void);
00045 extern void GLCD_PutPixel       (unsigned int x, unsigned int y);
00046 extern void GLCD_SetTextColor   (unsigned short color);
00047 extern void GLCD_SetBackColor   (unsigned short color);
00048 extern void GLCD_Clear          (unsigned short color);
00049 extern void GLCD_DrawChar       (unsigned int x, unsigned int y, unsigned short *c);
00050 extern void GLCD_DisplayChar    (unsigned int ln, unsigned int col, unsigned char  c);
00051 extern void GLCD_DisplayString  (unsigned int ln, unsigned int col, unsigned char *s);
00052 extern void GLCD_ClearLn        (unsigned int ln);
00053 extern void GLCD_Bargraph       (unsigned int x, unsigned int y, unsigned int w, unsigned int h, unsigned int val);
00054 extern void GLCD_Bitmap         (unsigned int x, unsigned int y, unsigned int w, unsigned int h, unsigned char *bitmap);
00055 extern void GLCD_Bmp            (unsigned int x, unsigned int y, unsigned int w, unsigned int h, unsigned char *bmp);
00056
00057 #endif /* _GLCD_H */
Generated on Tue Jun 7 14:59:02 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/LCD/QVGA_TFT_LCD/GLCD_SPI_LPC1700.c Source File

C:/nxpdrv/LPC1700CMSIS/Examples/LCD/QVGA_TFT_LCD/GLCD_SPI_LPC1700.c

Go to the documentation of this file.
00001 /******************************************************************************/
00002 /* GLCD_SPI_LPC1700.c: LPC1700 low level Graphic LCD (320x240 pixels) driven  */
00003 /*                     with SPI functions                                     */
00004 /******************************************************************************/
00005 /* This file is part of the uVision/ARM development tools.                    */
00006 /* Copyright (c) 2005-2009 Keil Software. All rights reserved.                */
00007 /* This software may only be used under the terms of a valid, current,        */
00008 /* end user licence from KEIL for a compatible version of KEIL software       */
00009 /* development tools. Nothing else gives you the right to use this software.  */
00010 /******************************************************************************/
00011
00012
00013 #include <lpc17xx.h>
00014 #include "GLCD.h"
00015 #include "Font_24x16.h"
00016
00017 /*********************** Hardware specific configuration **********************/
00018
00019 /* SPI Interface: SPI3
00020
00021    PINS:
00022    - CS     = P0.6 (GPIO pin)
00023    - RS     = GND
00024    - WR/SCK = P0.7 (SCK1)
00025    - RD     = GND
00026    - SDO    = P0.8 (MISO1)
00027    - SDI    = P0.9 (MOSI1)                                                    */
00028
00029 #define PIN_CS      (1 << 6)
00030
00031 /* SPI_SR - bit definitions                                                   */
00032 #define TFE         0x01
00033 #define RNE         0x04
00034 #define BSY         0x10
00035
00036 /*------------------------- Speed dependant settings -------------------------*/
00037
00038 /* If processor works on high frequency delay has to be increased, it can be
00039    increased by factor 2^N by this constant                                   */
00040 #define DELAY_2N    18
00041
00042 /*---------------------- Graphic LCD size definitions ------------------------*/
00043
00044 #define WIDTH       320                 /* Screen Width (in pixels)           */
00045 #define HEIGHT      240                 /* Screen Hight (in pixels)           */
00046 #define BPP         16                  /* Bits per pixel                     */
00047 #define BYPP        ((BPP+7)/8)         /* Bytes per pixel                    */
00048
00049 /*--------------- Graphic LCD interface hardware definitions -----------------*/
00050
00051 /* Pin CS setting to 0 or 1                                                   */
00052 #define LCD_CS(x)   ((x) ? (LPC_GPIO0->FIOSET = PIN_CS) : (LPC_GPIO0->FIOCLR = PIN_CS));
00053
00054 #define SPI_START   (0x70)              /* Start byte for SPI transfer        */
00055 #define SPI_RD      (0x01)              /* WR bit 1 within start              */
00056 #define SPI_WR      (0x00)              /* WR bit 0 within start              */
00057 #define SPI_DATA    (0x02)              /* RS bit 1 within start byte         */
00058 #define SPI_INDEX   (0x00)              /* RS bit 0 within start byte         */
00059
00060 /*---------------------------- Global variables ------------------------------*/
00061
00062 /******************************************************************************/
00063 static volatile unsigned short TextColor = Black, BackColor = White;
00064
00065
00066 /************************ Local auxiliary functions ***************************/
00067
00068 /*******************************************************************************
00069 * Delay in while loop cycles                                                   *
00070 *   Parameter:    cnt:    number of while cycles to delay                      *
00071 *   Return:                                                                    *
00072 *******************************************************************************/
00073
00074 static void delay (int cnt) {
00075
00076   cnt <<= DELAY_2N;
00077   while (cnt--);
00078 }
00079
00080
00081 /*******************************************************************************
00082 * Send 1 byte over serial communication                                        *
00083 *   Parameter:    byte:   byte to be sent                                      *
00084 *   Return:               byte read while sending                              *
00085 *******************************************************************************/
00086
00087 static __INLINE unsigned char spi_send (unsigned char byte) {
00088
00089   LPC_SSP1->DR = byte;
00090   while (!(LPC_SSP1->SR & RNE));        /* Wait for send to finish            */
00091   return (LPC_SSP1->DR);
00092 }
00093
00094
00095 /*******************************************************************************
00096 * Write command to LCD controller                                              *
00097 *   Parameter:    c:      command to be written                                *
00098 *   Return:                                                                    *
00099 *******************************************************************************/
00100
00101 static __INLINE void wr_cmd (unsigned char c) {
00102
00103   LCD_CS(0)
00104   spi_send(SPI_START | SPI_WR | SPI_INDEX);   /* Write : RS = 0, RW = 0       */
00105   spi_send(0);
00106   spi_send(c);
00107   LCD_CS(1)
00108 }
00109
00110
00111 /*******************************************************************************
00112 * Write data to LCD controller                                                 *
00113 *   Parameter:    c:      data to be written                                   *
00114 *   Return:                                                                    *
00115 *******************************************************************************/
00116
00117 static __INLINE void wr_dat (unsigned short c) {
00118
00119   LCD_CS(0)
00120   spi_send(SPI_START | SPI_WR | SPI_DATA);    /* Write : RS = 1, RW = 0       */
00121   spi_send((c >>   8));                       /* Write D8..D15                */
00122   spi_send((c & 0xFF));                       /* Write D0..D7                 */
00123   LCD_CS(1)
00124 }
00125
00126
00127 /*******************************************************************************
00128 * Start of data writing to LCD controller                                      *
00129 *   Parameter:                                                                 *
00130 *   Return:                                                                    *
00131 *******************************************************************************/
00132
00133 static __INLINE void wr_dat_start (void) {
00134
00135   LCD_CS(0)
00136   spi_send(SPI_START | SPI_WR | SPI_DATA);    /* Write : RS = 1, RW = 0       */
00137 }
00138
00139
00140 /*******************************************************************************
00141 * Stop of data writing to LCD controller                                       *
00142 *   Parameter:                                                                 *
00143 *   Return:                                                                    *
00144 *******************************************************************************/
00145
00146 static __INLINE void wr_dat_stop (void) {
00147
00148   LCD_CS(1)
00149 }
00150
00151
00152 /*******************************************************************************
00153 * Data writing to LCD controller                                               *
00154 *   Parameter:    c:      data to be written                                   *
00155 *   Return:                                                                    *
00156 *******************************************************************************/
00157
00158 static __INLINE void wr_dat_only (unsigned short c) {
00159
00160   spi_send((c >>   8));                       /* Write D8..D15                */
00161   spi_send((c & 0xFF));                       /* Write D0..D7                 */
00162 }
00163
00164
00165 /*******************************************************************************
00166 * Read data from LCD controller                                                *
00167 *   Parameter:                                                                 *
00168 *   Return:               read data                                            *
00169 *******************************************************************************/
00170
00171 static __INLINE unsigned short rd_dat (void) {
00172   unsigned short val = 0;
00173
00174   LCD_CS(0)
00175   spi_send(SPI_START | SPI_RD | SPI_DATA);    /* Read: RS = 1, RW = 1         */
00176   spi_send(0);                                /* Dummy read                   */
00177   val   = spi_send(0);                        /* Read D8..D15                 */
00178   val <<= 8;
00179   val  |= spi_send(0);                        /* Read D0..D7                  */
00180   LCD_CS(1)
00181   return (val);
00182 }
00183
00184 /*******************************************************************************
00185 * Write to LCD register                                                        *
00186 *   Parameter:    reg:    register to be read                                  *
00187 *                 val:    value to write to register                           *
00188 *******************************************************************************/
00189
00190 static __INLINE void wr_reg (unsigned char reg, unsigned short val) {
00191
00192   wr_cmd(reg);
00193   wr_dat(val);
00194 }
00195
00196
00197 /*******************************************************************************
00198 * Read from LCD register                                                       *
00199 *   Parameter:    reg:    register to be read                                  *
00200 *   Return:               value read from register                             *
00201 *******************************************************************************/
00202
00203 static unsigned short rd_reg (unsigned char reg) {
00204
00205   wr_cmd(reg);
00206   return (rd_dat());
00207 }
00208
00209
00210 /************************ Exported functions **********************************/
00211
00212 /*******************************************************************************
00213 * Initialize the Graphic LCD controller                                        *
00214 *   Parameter:                                                                 *
00215 *   Return:                                                                    *
00216 *******************************************************************************/
00217
00218 void GLCD_Init (void) {
00219   static unsigned short driverCode;
00220
00221   /* Enable clock for SSP1, clock = CCLK / 2                                  */
00222   LPC_SC->PCONP       |= 0x00000400;
00223   LPC_SC->PCLKSEL0    |= 0x00200000;
00224
00225   /* Configure the LCD Control pins                                           */
00226   LPC_PINCON->PINSEL9 &= 0xF0FFFFFF;
00227   LPC_GPIO4->FIODIR   |= 0x30000000;
00228   LPC_GPIO4->FIOSET    = 0x20000000;
00229
00230   /* SSEL1 is GPIO output set to high                                         */
00231   LPC_GPIO0->FIODIR   |= 0x00000040;
00232   LPC_GPIO0->FIOSET    = 0x00000040;
00233   LPC_PINCON->PINSEL0 &= 0xFFF03FFF;
00234   LPC_PINCON->PINSEL0 |= 0x000A8000;
00235
00236   /* Enable SPI in Master Mode, CPOL=1, CPHA=1                                */
00237   /* Max. 25 MBit used for Data Transfer @ 100MHz                              */
00238   LPC_SSP1->CR0        = 0xC7;
00239   LPC_SSP1->CPSR       = 0x02;
00240   LPC_SSP1->CR1        = 0x02;
00241
00242   delay(5);                             /* Delay 50 ms                        */
00243   driverCode = rd_reg(0x00);
00244
00245   /* Start Initial Sequence --------------------------------------------------*/
00246   wr_reg(0x01, 0x0100);                 /* Set SS bit                         */
00247   wr_reg(0x02, 0x0700);                 /* Set 1 line inversion               */
00248   wr_reg(0x04, 0x0000);                 /* Resize register                    */
00249   wr_reg(0x08, 0x0207);                 /* 2 lines front, 7 back porch        */
00250   wr_reg(0x09, 0x0000);                 /* Set non-disp area refresh cyc ISC  */
00251   wr_reg(0x0A, 0x0000);                 /* FMARK function                     */
00252   wr_reg(0x0C, 0x0000);                 /* RGB interface setting              */
00253   wr_reg(0x0D, 0x0000);                 /* Frame marker Position              */
00254   wr_reg(0x0F, 0x0000);                 /* RGB interface polarity             */
00255
00256   /* Power On sequence -------------------------------------------------------*/
00257   wr_reg(0x10, 0x0000);                 /* Reset Power Control 1              */
00258   wr_reg(0x11, 0x0000);                 /* Reset Power Control 2              */
00259   wr_reg(0x12, 0x0000);                 /* Reset Power Control 3              */
00260   wr_reg(0x13, 0x0000);                 /* Reset Power Control 4              */
00261   delay(20);                            /* Discharge cap power voltage (200ms)*/
00262   wr_reg(0x10, 0x12B0);                 /* SAP, BT[3:0], AP, DSTB, SLP, STB   */
00263   wr_reg(0x11, 0x0007);                 /* DC1[2:0], DC0[2:0], VC[2:0]        */
00264   delay(5);                             /* Delay 50 ms                        */
00265   wr_reg(0x12, 0x01BD);                 /* VREG1OUT voltage                   */
00266   delay(5);                             /* Delay 50 ms                        */
00267   wr_reg(0x13, 0x1400);                 /* VDV[4:0] for VCOM amplitude        */
00268   wr_reg(0x29, 0x000E);                 /* VCM[4:0] for VCOMH                 */
00269   delay(5);                             /* Delay 50 ms                        */
00270   wr_reg(0x20, 0x0000);                 /* GRAM horizontal Address            */
00271   wr_reg(0x21, 0x0000);                 /* GRAM Vertical Address              */
00272
00273   /* Adjust the Gamma Curve --------------------------------------------------*/
00274   if (driverCode == 0x5408) {           /* LCD with touch                     */
00275     wr_reg(0x30, 0x0B0D);
00276     wr_reg(0x31, 0x1923);
00277     wr_reg(0x32, 0x1C26);
00278     wr_reg(0x33, 0x261C);
00279     wr_reg(0x34, 0x2419);
00280     wr_reg(0x35, 0x0D0B);
00281     wr_reg(0x36, 0x1006);
00282     wr_reg(0x37, 0x0610);
00283     wr_reg(0x38, 0x0706);
00284     wr_reg(0x39, 0x0304);
00285     wr_reg(0x3A, 0x0E05);
00286     wr_reg(0x3B, 0x0E01);
00287     wr_reg(0x3C, 0x010E);
00288     wr_reg(0x3D, 0x050E);
00289     wr_reg(0x3E, 0x0403);
00290     wr_reg(0x3F, 0x0607);
00291   }
00292   if (driverCode == 0xC990) {           /* LCD without touch                  */
00293     wr_reg(0x30, 0x0006);
00294     wr_reg(0x31, 0x0101);
00295     wr_reg(0x32, 0x0003);
00296     wr_reg(0x35, 0x0106);
00297     wr_reg(0x36, 0x0B02);
00298     wr_reg(0x37, 0x0302);
00299     wr_reg(0x38, 0x0707);
00300     wr_reg(0x39, 0x0007);
00301     wr_reg(0x3C, 0x0600);
00302     wr_reg(0x3D, 0x020B);
00303   }
00304
00305  /* Set GRAM area -----------------------------------------------------------*/
00306   wr_reg(0x50, 0x0000);                 /* Horizontal GRAM Start Address      */
00307   wr_reg(0x51, (HEIGHT-1));             /* Horizontal GRAM End   Address      */
00308   wr_reg(0x52, 0x0000);                 /* Vertical   GRAM Start Address      */
00309   wr_reg(0x53, (WIDTH-1));              /* Vertical   GRAM End   Address      */
00310   wr_reg(0x60, 0xA700);                 /* Gate Scan Line                     */
00311   if (driverCode == 0x5408)             /* LCD with touch                     */
00312     wr_reg(0x60, 0xA700);               /* Gate Scan Line                     */
00313   if (driverCode == 0xC990)             /* LCD without touch                  */
00314     wr_reg(0x60, 0x2700);               /* Gate Scan Line                     */
00315   wr_reg(0x61, 0x0001);                 /* NDL,VLE, REV                       */
00316   wr_reg(0x6A, 0x0000);                 /* Set scrolling line                 */
00317
00318   /* Partial Display Control -------------------------------------------------*/
00319   wr_reg(0x80, 0x0000);
00320   wr_reg(0x81, 0x0000);
00321   wr_reg(0x82, 0x0000);
00322   wr_reg(0x83, 0x0000);
00323   wr_reg(0x84, 0x0000);
00324   wr_reg(0x85, 0x0000);
00325
00326   /* Panel Control -----------------------------------------------------------*/
00327   wr_reg(0x90, 0x0010);
00328   wr_reg(0x92, 0x0000);
00329   wr_reg(0x93, 0x0003);
00330   wr_reg(0x95, 0x0110);
00331   wr_reg(0x97, 0x0000);
00332   wr_reg(0x98, 0x0000);
00333
00334   /* Set GRAM write direction
00335      I/D=10 (Horizontal : increment, Vertical : increment)
00336      AM=1   (address is updated in vertical writing direction)                */
00337   wr_reg(0x03, 0x1038);
00338
00339   wr_reg(0x07, 0x0137);                 /* 262K color and display ON          */
00340   LPC_GPIO4->FIOSET = 0x10000000;
00341 }
00342
00343
00344 /*******************************************************************************
00345 * Set draw window region to whole screen                                       *
00346 *   Parameter:                                                                 *
00347 *   Return:                                                                    *
00348 *******************************************************************************/
00349
00350 void GLCD_WindowMax (void) {
00351
00352   wr_reg(0x50, 0);                      /* Horizontal GRAM Start Address      */
00353   wr_reg(0x51, HEIGHT-1);               /* Horizontal GRAM End   Address (-1) */
00354   wr_reg(0x52, 0);                      /* Vertical   GRAM Start Address      */
00355   wr_reg(0x53, WIDTH-1);                /* Vertical   GRAM End   Address (-1) */
00356 }
00357
00358
00359 /*******************************************************************************
00360 * Draw a pixel in foreground color                                             *
00361 *   Parameter:      x:        horizontal position                              *
00362 *                   y:        vertical position                                *
00363 *   Return:                                                                    *
00364 *******************************************************************************/
00365
00366 void GLCD_PutPixel (unsigned int x, unsigned int y) {
00367
00368   wr_reg(0x20, y);
00369   wr_reg(0x21, WIDTH-1-x);
00370   wr_cmd(0x22);
00371   wr_dat(TextColor);
00372 }
00373
00374
00375 /*******************************************************************************
00376 * Set foreground color                                                         *
00377 *   Parameter:      color:    foreground color                                 *
00378 *   Return:                                                                    *
00379 *******************************************************************************/
00380
00381 void GLCD_SetTextColor (unsigned short color) {
00382
00383   TextColor = color;
00384 }
00385
00386
00387 /*******************************************************************************
00388 * Set background color                                                         *
00389 *   Parameter:      color:    background color                                 *
00390 *   Return:                                                                    *
00391 *******************************************************************************/
00392
00393 void GLCD_SetBackColor (unsigned short color) {
00394
00395   BackColor = color;
00396 }
00397
00398
00399 /*******************************************************************************
00400 * Clear display                                                                *
00401 *   Parameter:      color:    display clearing color                           *
00402 *   Return:                                                                    *
00403 *******************************************************************************/
00404
00405 void GLCD_Clear (unsigned short color) {
00406   unsigned int   i;
00407
00408   GLCD_WindowMax();
00409
00410   wr_reg(0x20, 0);
00411   wr_reg(0x21, 0);
00412   wr_cmd(0x22);
00413   wr_dat_start();
00414   for(i = 0; i < (WIDTH*HEIGHT); i++)
00415     wr_dat_only(color);
00416   wr_dat_stop();
00417 }
00418
00419
00420 /*******************************************************************************
00421 * Draw character on given position                                             *
00422 *   Parameter:      x:        horizontal position                              *
00423 *                   y:        vertical position                                *
00424 *                   c:        pointer to character bitmap                      *
00425 *   Return:                                                                    *
00426 *******************************************************************************/
00427
00428 void GLCD_DrawChar (unsigned int x, unsigned int y, unsigned short *c) {
00429   int idx = 0, i, j;
00430
00431   x = WIDTH-x-CHAR_W;
00432   wr_reg(0x50, y);                      /* Horizontal GRAM Start Address      */
00433   wr_reg(0x51, y+CHAR_H-1);             /* Horizontal GRAM End   Address (-1) */
00434   wr_reg(0x52, x);                      /* Vertical   GRAM Start Address      */
00435   wr_reg(0x53, x+CHAR_W-1);             /* Vertical   GRAM End   Address (-1) */
00436
00437   wr_reg(0x20, y);
00438   wr_reg(0x21, x);
00439   wr_cmd(0x22);
00440   wr_dat_start();
00441   for (j = 0; j < CHAR_H; j++) {
00442     for (i = CHAR_W-1; i >= 0; i--) {
00443       if((c[idx] & (1 << i)) == 0x00) {
00444         wr_dat_only(BackColor);
00445       } else {
00446         wr_dat_only(TextColor);
00447       }
00448     }
00449     c++;
00450   }
00451   wr_dat_stop();
00452 }
00453
00454
00455 /*******************************************************************************
00456 * Disply character on given line                                               *
00457 *   Parameter:      ln:       line number                                      *
00458 *                   col:      column number                                    *
00459 *                   c:        ascii character                                  *
00460 *   Return:                                                                    *
00461 *******************************************************************************/
00462
00463 void GLCD_DisplayChar (unsigned int ln, unsigned int col, unsigned char c) {
00464
00465   c -= 32;
00466   GLCD_DrawChar(col * CHAR_W, ln * CHAR_H, (unsigned short *)&Font_24x16[c * CHAR_H]);
00467 }
00468
00469
00470 /*******************************************************************************
00471 * Disply string on given line                                                  *
00472 *   Parameter:      ln:       line number                                      *
00473 *                   col:      column number                                    *
00474 *                   s:        pointer to string                                *
00475 *   Return:                                                                    *
00476 *******************************************************************************/
00477
00478 void GLCD_DisplayString (unsigned int ln, unsigned int col, unsigned char *s) {
00479
00480   GLCD_WindowMax();
00481   while (*s) {
00482     GLCD_DisplayChar(ln, col++, *s++);
00483   }
00484 }
00485
00486
00487 /*******************************************************************************
00488 * Clear given line                                                             *
00489 *   Parameter:      ln:       line number                                      *
00490 *   Return:                                                                    *
00491 *******************************************************************************/
00492
00493 void GLCD_ClearLn (unsigned int ln) {
00494
00495   GLCD_WindowMax();
00496   GLCD_DisplayString(ln, 0, "                    ");
00497 }
00498
00499 /*******************************************************************************
00500 * Draw bargraph                                                                *
00501 *   Parameter:      x:        horizontal position                              *
00502 *                   y:        vertical position                                *
00503 *                   w:        maximum width of bargraph (in pixels)            *
00504 *                   val:      value of active bargraph (in 1/1024)             *
00505 *   Return:                                                                    *
00506 *******************************************************************************/
00507
00508 void GLCD_Bargraph (unsigned int x, unsigned int y, unsigned int w, unsigned int h, unsigned int val) {
00509   int i,j;
00510
00511   x = WIDTH-x-w;
00512   wr_reg(0x50, y);                      /* Horizontal GRAM Start Address      */
00513   wr_reg(0x51, y+CHAR_H-1);             /* Horizontal GRAM End   Address (-1) */
00514   wr_reg(0x52, x);                      /* Vertical   GRAM Start Address      */
00515   wr_reg(0x53, x+w-1);                  /* Vertical   GRAM End   Address (-1) */
00516
00517   val = (val * w) >> 10;                /* Scale value for 24x12 characters   */
00518   wr_reg(0x20, y);
00519   wr_reg(0x21, x);
00520   wr_cmd(0x22);
00521   wr_dat_start();
00522   for (i = 0; i < h; i++) {
00523     for (j = w-1; j >= 0; j--) {
00524       if(j >= val) {
00525         wr_dat_only(BackColor);
00526       } else {
00527         wr_dat_only(TextColor);
00528       }
00529     }
00530   }
00531   wr_dat_stop();
00532 }
00533
00534
00535 /*******************************************************************************
00536 * Display graphical bitmap image at position x horizontally and y vertically   *
00537 * (This function is optimized for 16 bits per pixel format, it has to be       *
00538 *  adapted for any other bits per pixel format)                                *
00539 *   Parameter:      x:        horizontal position                              *
00540 *                   y:        vertical position                                *
00541 *                   w:        width of bitmap                                  *
00542 *                   h:        height of bitmap                                 *
00543 *                   bitmap:   address at which the bitmap data resides         *
00544 *   Return:                                                                    *
00545 *******************************************************************************/
00546
00547 void GLCD_Bitmap (unsigned int x, unsigned int y, unsigned int w, unsigned int h, unsigned char *bitmap) {
00548   unsigned int    i, j;
00549   unsigned short *bitmap_ptr = (unsigned short *)bitmap;
00550
00551   x = WIDTH-x-w;
00552   wr_reg(0x50, y);                      /* Horizontal GRAM Start Address      */
00553   wr_reg(0x51, y+h-1);                  /* Horizontal GRAM End   Address (-1) */
00554   wr_reg(0x52, x);                      /* Vertical   GRAM Start Address      */
00555   wr_reg(0x53, x+w-1);                  /* Vertical   GRAM End   Address (-1) */
00556
00557   wr_reg(0x20, y);
00558   wr_reg(0x21, x);
00559   wr_cmd(0x22);
00560   wr_dat_start();
00561   for (j = 0; j < h; j++) {
00562     bitmap_ptr += w-1;
00563     for (i = 0; i < w; i++) {
00564       wr_dat_only(*bitmap_ptr--);
00565     }
00566     bitmap_ptr += w+1;
00567   }
00568   wr_dat_stop();
00569 }
00570
00571
00572 /*******************************************************************************
00573 * Display graphical bmp file image at position x horizontally and y vertically *
00574 * (This function is optimized for 16 bits per pixel format, it has to be       *
00575 *  adapted for any other bits per pixel format)                                *
00576 *   Parameter:      x:        horizontal position                              *
00577 *                   y:        vertical position                                *
00578 *                   w:        width of bitmap                                  *
00579 *                   h:        height of bitmap                                 *
00580 *                   bmp:      address at which the bmp data resides            *
00581 *   Return:                                                                    *
00582 *******************************************************************************/
00583
00584 void GLCD_Bmp (unsigned int x, unsigned int y, unsigned int w, unsigned int h, unsigned char *bmp) {
00585   unsigned int    i, j;
00586   unsigned short *bitmap_ptr = (unsigned short *)bmp;
00587
00588   x = WIDTH-x-w;
00589   wr_reg(0x50, y);                      /* Horizontal GRAM Start Address      */
00590   wr_reg(0x51, y+h-1);                  /* Horizontal GRAM End   Address (-1) */
00591   wr_reg(0x52, x);                      /* Vertical   GRAM Start Address      */
00592   wr_reg(0x53, x+w-1);                  /* Vertical   GRAM End   Address (-1) */
00593
00594   wr_reg(0x20, y);
00595   wr_reg(0x21, x);
00596   wr_cmd(0x22);
00597   wr_dat_start();
00598   bitmap_ptr += (h*w)-1;
00599   for (j = 0; j < h; j++) {
00600     for (i = 0; i < w; i++) {
00601       wr_dat_only(*bitmap_ptr--);
00602     }
00603   }
00604   wr_dat_stop();
00605 }
00606
00607 /******************************************************************************/
Generated on Tue Jun 7 14:59:02 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/GPDMA/Flash_2_Ram_Test/lpc17xx_libcfg.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/GPDMA/Flash_2_Ram_Test/lpc17xx_libcfg.h

Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          lpc17xx_libcfg.h                        2010-05-21
00003 */
00026 #ifndef LPC17XX_LIBCFG_H_
00027 #define LPC17XX_LIBCFG_H_
00028
00029 #include "lpc_types.h"
00030
00031
00032 /************************** DEBUG MODE DEFINITIONS *********************************/
00033 /* Un-comment the line below to compile the library in DEBUG mode, this will expanse
00034    the "CHECK_PARAM" macro in the FW library code */
00035
00036 #define DEBUG
00037
00038
00039 /******************* PERIPHERAL FW LIBRARY CONFIGURATION DEFINITIONS ***********************/
00040
00041 /* Comment the line below to disable the specific peripheral inclusion */
00042
00043 /* DEBUG_FRAMWORK ------------------------------ */
00044 #define _DBGFWK
00045
00046 /* GPIO ------------------------------- */
00047 //#define _GPIO
00048
00049 /* EXTI ------------------------------- */
00050 //#define _EXTI
00051
00052 /* UART ------------------------------- */
00053 #define _UART
00054 #define _UART0
00055 //#define _UART1
00056 //#define _UART2
00057 //#define _UART3
00058
00059 /* SPI ------------------------------- */
00060 //#define _SPI
00061
00062 /* SSP ------------------------------- */
00063 //#define _SSP
00064 //#define _SSP0
00065 //#define _SSP1
00066
00067 /* SYSTICK --------------------------- */
00068 //#define _SYSTICK
00069
00070 /* I2C ------------------------------- */
00071 //#define _I2C
00072 //#define _I2C0
00073 //#define _I2C1
00074 //#define _I2C2
00075
00076 /* TIMER ------------------------------- */
00077 //#define _TIM
00078
00079 /* WDT ------------------------------- */
00080 //#define _WDT
00081
00082
00083 /* GPDMA ------------------------------- */
00084 #define _GPDMA
00085
00086
00087 /* DAC ------------------------------- */
00088 //#define _DAC
00089
00090 /* DAC ------------------------------- */
00091 //#define _ADC
00092
00093
00094 /* PWM ------------------------------- */
00095 //#define _PWM
00096 //#define _PWM1
00097
00098 /* RTC ------------------------------- */
00099 //#define _RTC
00100
00101 /* I2S ------------------------------- */
00102 //#define _I2S
00103
00104 /* USB device ------------------------------- */
00105 //#define _USBDEV
00106 //#define _USB_DMA
00107
00108 /* QEI ------------------------------- */
00109 //#define _QEI
00110
00111 /* MCPWM ------------------------------- */
00112 //#define _MCPWM
00113
00114 /* CAN--------------------------------*/
00115 //#define _CAN
00116
00117 /* RIT ------------------------------- */
00118 //#define _RIT
00119
00120 /* EMAC ------------------------------ */
00121 //#define _EMAC
00122
00123 /************************** GLOBAL/PUBLIC MACRO DEFINITIONS *********************************/
00124
00125 #ifdef  DEBUG
00126 /*******************************************************************************
00127 * @brief                The CHECK_PARAM macro is used for function's parameters check.
00128 *                               It is used only if the library is compiled in DEBUG mode.
00129 * @param[in]    expr - If expr is false, it calls check_failed() function
00130 *                       which reports the name of the source file and the source
00131 *                       line number of the call that failed.
00132 *                    - If expr is true, it returns no value.
00133 * @return               None
00134 *******************************************************************************/
00135 #define CHECK_PARAM(expr) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))
00136 #else
00137 #define CHECK_PARAM(expr)
00138 #endif /* DEBUG */
00139
00140
00141
00142 /************************** GLOBAL/PUBLIC FUNCTION DECLARATION *********************************/
00143
00144 #ifdef  DEBUG
00145 void check_failed(uint8_t *file, uint32_t line);
00146 #endif
00147
00148
00149 #endif /* LPC17XX_LIBCFG_H_ */
Generated on Tue Jun 7 14:58:57 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/GPDMA/GPDMA_Sleep/lpc17xx_libcfg.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/GPDMA/GPDMA_Sleep/lpc17xx_libcfg.h

Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          lpc17xx_libcfg.h                        2010-05-21
00003 */
00026 #ifndef LPC17XX_LIBCFG_H_
00027 #define LPC17XX_LIBCFG_H_
00028
00029 #include "lpc_types.h"
00030
00031
00032 /************************** DEBUG MODE DEFINITIONS *********************************/
00033 /* Un-comment the line below to compile the library in DEBUG mode, this will expanse
00034    the "CHECK_PARAM" macro in the FW library code */
00035
00036 #define DEBUG
00037
00038
00039 /******************* PERIPHERAL FW LIBRARY CONFIGURATION DEFINITIONS ***********************/
00040
00041 /* Comment the line below to disable the specific peripheral inclusion */
00042
00043 /* DEBUG_FRAMWORK ------------------------------ */
00044 #define _DBGFWK
00045
00046 /* GPIO ------------------------------- */
00047 //#define _GPIO
00048
00049 /* EXTI ------------------------------- */
00050 //#define _EXTI
00051
00052 /* UART ------------------------------- */
00053 #define _UART
00054 #define _UART0
00055 //#define _UART1
00056 //#define _UART2
00057 //#define _UART3
00058
00059 /* SPI ------------------------------- */
00060 //#define _SPI
00061
00062 /* SSP ------------------------------- */
00063 //#define _SSP
00064 //#define _SSP0
00065 //#define _SSP1
00066
00067 /* SYSTICK --------------------------- */
00068 //#define _SYSTICK
00069
00070 /* I2C ------------------------------- */
00071 //#define _I2C
00072 //#define _I2C0
00073 //#define _I2C1
00074 //#define _I2C2
00075
00076 /* TIMER ------------------------------- */
00077 //#define _TIM
00078
00079 /* WDT ------------------------------- */
00080 //#define _WDT
00081
00082
00083 /* GPDMA ------------------------------- */
00084 #define _GPDMA
00085
00086
00087 /* DAC ------------------------------- */
00088 //#define _DAC
00089
00090 /* DAC ------------------------------- */
00091 //#define _ADC
00092
00093
00094 /* PWM ------------------------------- */
00095 //#define _PWM
00096 //#define _PWM1
00097
00098 /* RTC ------------------------------- */
00099 //#define _RTC
00100
00101 /* I2S ------------------------------- */
00102 //#define _I2S
00103
00104 /* USB device ------------------------------- */
00105 //#define _USBDEV
00106 //#define _USB_DMA
00107
00108 /* QEI ------------------------------- */
00109 //#define _QEI
00110
00111 /* MCPWM ------------------------------- */
00112 //#define _MCPWM
00113
00114 /* CAN--------------------------------*/
00115 //#define _CAN
00116
00117 /* RIT ------------------------------- */
00118 //#define _RIT
00119
00120 /* EMAC ------------------------------ */
00121 //#define _EMAC
00122
00123 /************************** GLOBAL/PUBLIC MACRO DEFINITIONS *********************************/
00124
00125 #ifdef  DEBUG
00126 /*******************************************************************************
00127 * @brief                The CHECK_PARAM macro is used for function's parameters check.
00128 *                               It is used only if the library is compiled in DEBUG mode.
00129 * @param[in]    expr - If expr is false, it calls check_failed() function
00130 *                       which reports the name of the source file and the source
00131 *                       line number of the call that failed.
00132 *                    - If expr is true, it returns no value.
00133 * @return               None
00134 *******************************************************************************/
00135 #define CHECK_PARAM(expr) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))
00136 #else
00137 #define CHECK_PARAM(expr)
00138 #endif /* DEBUG */
00139
00140
00141
00142 /************************** GLOBAL/PUBLIC FUNCTION DECLARATION *********************************/
00143
00144 #ifdef  DEBUG
00145 void check_failed(uint8_t *file, uint32_t line);
00146 #endif
00147
00148
00149 #endif /* LPC17XX_LIBCFG_H_ */
Generated on Tue Jun 7 14:58:57 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/GPDMA/Link_list/lpc17xx_libcfg.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/GPDMA/Link_list/lpc17xx_libcfg.h

Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          lpc17xx_libcfg.h                        2010-05-21
00003 */
00026 #ifndef LPC17XX_LIBCFG_H_
00027 #define LPC17XX_LIBCFG_H_
00028
00029 #include "lpc_types.h"
00030
00031
00032 /************************** DEBUG MODE DEFINITIONS *********************************/
00033 /* Un-comment the line below to compile the library in DEBUG mode, this will expanse
00034    the "CHECK_PARAM" macro in the FW library code */
00035
00036 #define DEBUG
00037
00038
00039 /******************* PERIPHERAL FW LIBRARY CONFIGURATION DEFINITIONS ***********************/
00040
00041 /* Comment the line below to disable the specific peripheral inclusion */
00042
00043 /* DEBUG_FRAMWORK ------------------------------ */
00044 #define _DBGFWK
00045
00046 /* GPIO ------------------------------- */
00047 //#define _GPIO
00048
00049 /* EXTI ------------------------------- */
00050 //#define _EXTI
00051
00052 /* UART ------------------------------- */
00053 #define _UART
00054 #define _UART0
00055 //#define _UART1
00056 //#define _UART2
00057 //#define _UART3
00058
00059 /* SPI ------------------------------- */
00060 //#define _SPI
00061
00062 /* SSP ------------------------------- */
00063 //#define _SSP
00064 //#define _SSP0
00065 //#define _SSP1
00066
00067 /* SYSTICK --------------------------- */
00068 //#define _SYSTICK
00069
00070 /* I2C ------------------------------- */
00071 //#define _I2C
00072 //#define _I2C0
00073 //#define _I2C1
00074 //#define _I2C2
00075
00076 /* TIMER ------------------------------- */
00077 //#define _TIM
00078
00079 /* WDT ------------------------------- */
00080 //#define _WDT
00081
00082
00083 /* GPDMA ------------------------------- */
00084 #define _GPDMA
00085
00086
00087 /* DAC ------------------------------- */
00088 //#define _DAC
00089
00090 /* DAC ------------------------------- */
00091 //#define _ADC
00092
00093
00094 /* PWM ------------------------------- */
00095 //#define _PWM
00096 //#define _PWM1
00097
00098 /* RTC ------------------------------- */
00099 //#define _RTC
00100
00101 /* I2S ------------------------------- */
00102 //#define _I2S
00103
00104 /* USB device ------------------------------- */
00105 //#define _USBDEV
00106 //#define _USB_DMA
00107
00108 /* QEI ------------------------------- */
00109 //#define _QEI
00110
00111 /* MCPWM ------------------------------- */
00112 //#define _MCPWM
00113
00114 /* CAN--------------------------------*/
00115 //#define _CAN
00116
00117 /* RIT ------------------------------- */
00118 //#define _RIT
00119
00120 /* EMAC ------------------------------ */
00121 //#define _EMAC
00122
00123 /************************** GLOBAL/PUBLIC MACRO DEFINITIONS *********************************/
00124
00125 #ifdef  DEBUG
00126 /*******************************************************************************
00127 * @brief                The CHECK_PARAM macro is used for function's parameters check.
00128 *                               It is used only if the library is compiled in DEBUG mode.
00129 * @param[in]    expr - If expr is false, it calls check_failed() function
00130 *                       which reports the name of the source file and the source
00131 *                       line number of the call that failed.
00132 *                    - If expr is true, it returns no value.
00133 * @return               None
00134 *******************************************************************************/
00135 #define CHECK_PARAM(expr) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))
00136 #else
00137 #define CHECK_PARAM(expr)
00138 #endif /* DEBUG */
00139
00140
00141
00142 /************************** GLOBAL/PUBLIC FUNCTION DECLARATION *********************************/
00143
00144 #ifdef  DEBUG
00145 void check_failed(uint8_t *file, uint32_t line);
00146 #endif
00147
00148
00149 #endif /* LPC17XX_LIBCFG_H_ */
Generated on Tue Jun 7 14:58:57 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/GPDMA/Ram_2_Ram_Test/lpc17xx_libcfg.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/GPDMA/Ram_2_Ram_Test/lpc17xx_libcfg.h

Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          lpc17xx_libcfg.h                        2010-05-21
00003 */
00026 #ifndef LPC17XX_LIBCFG_H_
00027 #define LPC17XX_LIBCFG_H_
00028
00029 #include "lpc_types.h"
00030
00031
00032 /************************** DEBUG MODE DEFINITIONS *********************************/
00033 /* Un-comment the line below to compile the library in DEBUG mode, this will expanse
00034    the "CHECK_PARAM" macro in the FW library code */
00035
00036 #define DEBUG
00037
00038
00039 /******************* PERIPHERAL FW LIBRARY CONFIGURATION DEFINITIONS ***********************/
00040
00041 /* Comment the line below to disable the specific peripheral inclusion */
00042
00043 /* DEBUG_FRAMWORK ------------------------------ */
00044 #define _DBGFWK
00045
00046 /* GPIO ------------------------------- */
00047 //#define _GPIO
00048
00049 /* EXTI ------------------------------- */
00050 //#define _EXTI
00051
00052 /* UART ------------------------------- */
00053 #define _UART
00054 #define _UART0
00055 //#define _UART1
00056 //#define _UART2
00057 //#define _UART3
00058
00059 /* SPI ------------------------------- */
00060 //#define _SPI
00061
00062 /* SSP ------------------------------- */
00063 //#define _SSP
00064 //#define _SSP0
00065 //#define _SSP1
00066
00067 /* SYSTICK --------------------------- */
00068 //#define _SYSTICK
00069
00070 /* I2C ------------------------------- */
00071 //#define _I2C
00072 //#define _I2C0
00073 //#define _I2C1
00074 //#define _I2C2
00075
00076 /* TIMER ------------------------------- */
00077 //#define _TIM
00078
00079 /* WDT ------------------------------- */
00080 //#define _WDT
00081
00082
00083 /* GPDMA ------------------------------- */
00084 #define _GPDMA
00085
00086
00087 /* DAC ------------------------------- */
00088 //#define _DAC
00089
00090 /* DAC ------------------------------- */
00091 //#define _ADC
00092
00093
00094 /* PWM ------------------------------- */
00095 //#define _PWM
00096 //#define _PWM1
00097
00098 /* RTC ------------------------------- */
00099 //#define _RTC
00100
00101 /* I2S ------------------------------- */
00102 //#define _I2S
00103
00104 /* USB device ------------------------------- */
00105 //#define _USBDEV
00106 //#define _USB_DMA
00107
00108 /* QEI ------------------------------- */
00109 //#define _QEI
00110
00111 /* MCPWM ------------------------------- */
00112 //#define _MCPWM
00113
00114 /* CAN--------------------------------*/
00115 //#define _CAN
00116
00117 /* RIT ------------------------------- */
00118 //#define _RIT
00119
00120 /* EMAC ------------------------------ */
00121 //#define _EMAC
00122
00123
00124 /************************** GLOBAL/PUBLIC MACRO DEFINITIONS *********************************/
00125
00126 #ifdef  DEBUG
00127 /*******************************************************************************
00128 * @brief                The CHECK_PARAM macro is used for function's parameters check.
00129 *                               It is used only if the library is compiled in DEBUG mode.
00130 * @param[in]    expr - If expr is false, it calls check_failed() function
00131 *                       which reports the name of the source file and the source
00132 *                       line number of the call that failed.
00133 *                    - If expr is true, it returns no value.
00134 * @return               None
00135 *******************************************************************************/
00136 #define CHECK_PARAM(expr) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))
00137 #else
00138 #define CHECK_PARAM(expr)
00139 #endif /* DEBUG */
00140
00141
00142
00143 /************************** GLOBAL/PUBLIC FUNCTION DECLARATION *********************************/
00144
00145 #ifdef  DEBUG
00146 void check_failed(uint8_t *file, uint32_t line);
00147 #endif
00148
00149
00150 #endif /* LPC17XX_LIBCFG_H_ */
Generated on Tue Jun 7 14:58:57 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/GPIO/GPIO_Interrupt/lpc17xx_libcfg.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/GPIO/GPIO_Interrupt/lpc17xx_libcfg.h

Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          lpc17xx_libcfg.h                        2010-05-21
00003 */
00026 #ifndef LPC17XX_LIBCFG_H_
00027 #define LPC17XX_LIBCFG_H_
00028
00029 #include "lpc_types.h"
00030
00031
00032 /************************** DEBUG MODE DEFINITIONS *********************************/
00033 /* Un-comment the line below to compile the library in DEBUG mode, this will expanse
00034    the "CHECK_PARAM" macro in the FW library code */
00035
00036 #define DEBUG
00037
00038
00039 /******************* PERIPHERAL FW LIBRARY CONFIGURATION DEFINITIONS ***********************/
00040
00041 /* Comment the line below to disable the specific peripheral inclusion */
00042
00043 /* DEBUG_FRAMWORK ------------------------------ */
00044 //#define _DBGFWK
00045
00046 /* GPIO ------------------------------- */
00047 #define _GPIO
00048
00049 /* EXTI ------------------------------- */
00050 //#define _EXTI
00051
00052 /* UART ------------------------------- */
00053 //#define _UART
00054 //#define _UART0
00055 //#define _UART1
00056 //#define _UART2
00057 //#define _UART3
00058
00059 /* SPI ------------------------------- */
00060 //#define _SPI
00061
00062 /* SSP ------------------------------- */
00063 //#define _SSP
00064 //#define _SSP0
00065 //#define _SSP1
00066
00067 /* SYSTICK --------------------------- */
00068 //#define _SYSTICK
00069
00070 /* I2C ------------------------------- */
00071 //#define _I2C
00072 //#define _I2C0
00073 //#define _I2C1
00074 //#define _I2C2
00075
00076 /* TIMER ------------------------------- */
00077 //#define _TIM
00078
00079 /* WDT ------------------------------- */
00080 //#define _WDT
00081
00082
00083 /* GPDMA ------------------------------- */
00084 //#define _GPDMA
00085
00086
00087 /* DAC ------------------------------- */
00088 //#define _DAC
00089
00090 /* DAC ------------------------------- */
00091 //#define _ADC
00092
00093
00094 /* PWM ------------------------------- */
00095 //#define _PWM
00096 //#define _PWM1
00097
00098 /* RTC ------------------------------- */
00099 //#define _RTC
00100
00101 /* I2S ------------------------------- */
00102 //#define _I2S
00103
00104 /* USB device ------------------------------- */
00105 //#define _USBDEV
00106 //#define _USB_DMA
00107
00108 /* QEI ------------------------------- */
00109 //#define _QEI
00110
00111 /* MCPWM ------------------------------- */
00112 //#define _MCPWM
00113
00114 /* CAN--------------------------------*/
00115 //#define _CAN
00116
00117 /* RIT ------------------------------- */
00118 //#define _RIT
00119
00120 /* EMAC ------------------------------ */
00121 //#define _EMAC
00122
00123
00124 /************************** GLOBAL/PUBLIC MACRO DEFINITIONS *********************************/
00125
00126 #ifdef  DEBUG
00127 /*******************************************************************************
00128 * @brief                The CHECK_PARAM macro is used for function's parameters check.
00129 *                               It is used only if the library is compiled in DEBUG mode.
00130 * @param[in]    expr - If expr is false, it calls check_failed() function
00131 *                       which reports the name of the source file and the source
00132 *                       line number of the call that failed.
00133 *                    - If expr is true, it returns no value.
00134 * @return               None
00135 *******************************************************************************/
00136 #define CHECK_PARAM(expr) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))
00137 #else
00138 #define CHECK_PARAM(expr)
00139 #endif /* DEBUG */
00140
00141
00142
00143 /************************** GLOBAL/PUBLIC FUNCTION DECLARATION *********************************/
00144
00145 #ifdef  DEBUG
00146 void check_failed(uint8_t *file, uint32_t line);
00147 #endif
00148
00149
00150 #endif /* LPC17XX_LIBCFG_H_ */
Generated on Tue Jun 7 14:58:57 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/GPIO/LedBlinky/lpc17xx_libcfg.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/GPIO/LedBlinky/lpc17xx_libcfg.h

Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          lpc17xx_libcfg.h                        2010-05-21
00003 */
00026 #ifndef LPC17XX_LIBCFG_H_
00027 #define LPC17XX_LIBCFG_H_
00028
00029 #include "lpc_types.h"
00030
00031
00032 /************************** DEBUG MODE DEFINITIONS *********************************/
00033 /* Un-comment the line below to compile the library in DEBUG mode, this will expanse
00034    the "CHECK_PARAM" macro in the FW library code */
00035
00036 #define DEBUG
00037
00038
00039 /******************* PERIPHERAL FW LIBRARY CONFIGURATION DEFINITIONS ***********************/
00040
00041 /* Comment the line below to disable the specific peripheral inclusion */
00042
00043 /* DEBUG_FRAMWORK ------------------------------ */
00044 //#define _DBGFWK
00045
00046 /* GPIO ------------------------------- */
00047 #define _GPIO
00048
00049 /* EXTI ------------------------------- */
00050 //#define _EXTI
00051
00052 /* UART ------------------------------- */
00053 //#define _UART
00054 //#define _UART0
00055 //#define _UART1
00056 //#define _UART2
00057 //#define _UART3
00058
00059 /* SPI ------------------------------- */
00060 //#define _SPI
00061
00062 /* SSP ------------------------------- */
00063 //#define _SSP
00064 //#define _SSP0
00065 //#define _SSP1
00066
00067 /* SYSTICK --------------------------- */
00068 //#define _SYSTICK
00069
00070 /* I2C ------------------------------- */
00071 //#define _I2C
00072 //#define _I2C0
00073 //#define _I2C1
00074 //#define _I2C2
00075
00076 /* TIMER ------------------------------- */
00077 //#define _TIM
00078
00079 /* WDT ------------------------------- */
00080 //#define _WDT
00081
00082
00083 /* GPDMA ------------------------------- */
00084 //#define _GPDMA
00085
00086
00087 /* DAC ------------------------------- */
00088 //#define _DAC
00089
00090 /* DAC ------------------------------- */
00091 //#define _ADC
00092
00093
00094 /* PWM ------------------------------- */
00095 //#define _PWM
00096 //#define _PWM1
00097
00098 /* RTC ------------------------------- */
00099 //#define _RTC
00100
00101 /* I2S ------------------------------- */
00102 //#define _I2S
00103
00104 /* USB device ------------------------------- */
00105 //#define _USBDEV
00106 //#define _USB_DMA
00107
00108 /* QEI ------------------------------- */
00109 //#define _QEI
00110
00111 /* MCPWM ------------------------------- */
00112 //#define _MCPWM
00113
00114 /* CAN--------------------------------*/
00115 //#define _CAN
00116
00117 /* RIT ------------------------------- */
00118 //#define _RIT
00119
00120 /* EMAC ------------------------------ */
00121 //#define _EMAC
00122
00123 /************************** GLOBAL/PUBLIC MACRO DEFINITIONS *********************************/
00124
00125 #ifdef  DEBUG
00126 /*******************************************************************************
00127 * @brief                The CHECK_PARAM macro is used for function's parameters check.
00128 *                               It is used only if the library is compiled in DEBUG mode.
00129 * @param[in]    expr - If expr is false, it calls check_failed() function
00130 *                       which reports the name of the source file and the source
00131 *                       line number of the call that failed.
00132 *                    - If expr is true, it returns no value.
00133 * @return               None
00134 *******************************************************************************/
00135 #define CHECK_PARAM(expr) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))
00136 #else
00137 #define CHECK_PARAM(expr)
00138 #endif /* DEBUG */
00139
00140
00141
00142 /************************** GLOBAL/PUBLIC FUNCTION DECLARATION *********************************/
00143
00144 #ifdef  DEBUG
00145 void check_failed(uint8_t *file, uint32_t line);
00146 #endif
00147
00148
00149 #endif /* LPC17XX_LIBCFG_H_ */
Generated on Tue Jun 7 14:58:57 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/I2C/Master_Slave_Interrupt/lpc17xx_libcfg.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/I2C/Master_Slave_Interrupt/lpc17xx_libcfg.h

Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          lpc17xx_libcfg.h                        2010-05-21
00003 */
00026 #ifndef LPC17XX_LIBCFG_H_
00027 #define LPC17XX_LIBCFG_H_
00028
00029 #include "lpc_types.h"
00030
00031
00032 /************************** DEBUG MODE DEFINITIONS *********************************/
00033 /* Un-comment the line below to compile the library in DEBUG mode, this will expanse
00034    the "CHECK_PARAM" macro in the FW library code */
00035
00036 #define DEBUG
00037
00038 /******************* PERIPHERAL FW LIBRARY CONFIGURATION DEFINITIONS ***********************/
00039
00040 /* Comment the line below to disable the specific peripheral inclusion */
00041
00042 /* DEBUG_FRAMWORK ------------------------------ */
00043 #define _DBGFWK
00044
00045 /* GPIO ------------------------------- */
00046 //#define _GPIO
00047
00048 /* EXTI ------------------------------- */
00049 //#define _EXTI
00050
00051 /* UART ------------------------------- */
00052 #define _UART
00053 #define _UART0
00054 //#define _UART1
00055 //#define _UART2
00056 //#define _UART3
00057
00058 /* SPI ------------------------------- */
00059 //#define _SPI
00060
00061 /* SSP ------------------------------- */
00062 //#define _SSP
00063 //#define _SSP0
00064 //#define _SSP1
00065
00066 /* SYSTICK --------------------------- */
00067 //#define _SYSTICK
00068
00069 /* I2C ------------------------------- */
00070 #define _I2C
00071 #define _I2C0
00072 #define _I2C1
00073 #define _I2C2
00074
00075 /* TIMER ------------------------------- */
00076 //#define _TIM
00077
00078 /* WDT ------------------------------- */
00079 //#define _WDT
00080
00081
00082 /* GPDMA ------------------------------- */
00083 #define _GPDMA
00084
00085
00086 /* DAC ------------------------------- */
00087 //#define _DAC
00088
00089 /* DAC ------------------------------- */
00090 #define _ADC
00091
00092
00093 /* PWM ------------------------------- */
00094 //#define _PWM
00095 //#define _PWM1
00096
00097 /* RTC ------------------------------- */
00098 //#define _RTC
00099
00100 /* I2S ------------------------------- */
00101 //#define _I2S
00102
00103 /* USB device ------------------------------- */
00104 //#define _USBDEV
00105 //#define _USB_DMA
00106
00107 /* QEI ------------------------------- */
00108 //#define _QEI
00109
00110 /* MCPWM ------------------------------- */
00111 //#define _MCPWM
00112
00113 /* CAN--------------------------------*/
00114 //#define _CAN
00115
00116 /* RIT ------------------------------- */
00117 //#define _RIT
00118
00119 /* EMAC ------------------------------ */
00120 //#define _EMAC
00121
00122
00123 /************************** GLOBAL/PUBLIC MACRO DEFINITIONS *********************************/
00124
00125 #ifdef  DEBUG
00126 /*******************************************************************************
00127 * @brief                The CHECK_PARAM macro is used for function's parameters check.
00128 *                               It is used only if the library is compiled in DEBUG mode.
00129 * @param[in]    expr - If expr is false, it calls check_failed() function
00130 *                       which reports the name of the source file and the source
00131 *                       line number of the call that failed.
00132 *                    - If expr is true, it returns no value.
00133 * @return               None
00134 *******************************************************************************/
00135 #define CHECK_PARAM(expr) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))
00136 #else
00137 #define CHECK_PARAM(expr)
00138 #endif /* DEBUG */
00139
00140
00141
00142 /************************** GLOBAL/PUBLIC FUNCTION DECLARATION *********************************/
00143
00144 #ifdef  DEBUG
00145 void check_failed(uint8_t *file, uint32_t line);
00146 #endif
00147
00148
00149 #endif /* LPC17XX_LIBCFG_H_ */
Generated on Tue Jun 7 14:58:57 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/I2C/Monitor/lpc17xx_libcfg.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/I2C/Monitor/lpc17xx_libcfg.h

Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          lpc17xx_libcfg.h                        2010-05-21
00003 */
00026 #ifndef LPC17XX_LIBCFG_H_
00027 #define LPC17XX_LIBCFG_H_
00028
00029 #include "lpc_types.h"
00030
00031
00032 /************************** DEBUG MODE DEFINITIONS *********************************/
00033 /* Un-comment the line below to compile the library in DEBUG mode, this will expanse
00034    the "CHECK_PARAM" macro in the FW library code */
00035
00036 #define DEBUG
00037
00038 /******************* PERIPHERAL FW LIBRARY CONFIGURATION DEFINITIONS ***********************/
00039
00040 /* Comment the line below to disable the specific peripheral inclusion */
00041
00042 /* DEBUG_FRAMWORK ------------------------------ */
00043 #define _DBGFWK
00044
00045 /* GPIO ------------------------------- */
00046 //#define _GPIO
00047
00048 /* EXTI ------------------------------- */
00049 //#define _EXTI
00050
00051 /* UART ------------------------------- */
00052 #define _UART
00053 #define _UART0
00054 //#define _UART1
00055 //#define _UART2
00056 //#define _UART3
00057
00058 /* SPI ------------------------------- */
00059 //#define _SPI
00060
00061 /* SSP ------------------------------- */
00062 //#define _SSP
00063 //#define _SSP0
00064 //#define _SSP1
00065
00066 /* SYSTICK --------------------------- */
00067 //#define _SYSTICK
00068
00069 /* I2C ------------------------------- */
00070 #define _I2C
00071 #define _I2C0
00072 //#define _I2C1
00073 //#define _I2C2
00074
00075 /* TIMER ------------------------------- */
00076 //#define _TIM
00077
00078 /* WDT ------------------------------- */
00079 //#define _WDT
00080
00081
00082 /* GPDMA ------------------------------- */
00083 //#define _GPDMA
00084
00085
00086 /* DAC ------------------------------- */
00087 //#define _DAC
00088
00089 /* DAC ------------------------------- */
00090 //#define _ADC
00091
00092
00093 /* PWM ------------------------------- */
00094 //#define _PWM
00095 //#define _PWM1
00096
00097 /* RTC ------------------------------- */
00098 //#define _RTC
00099
00100 /* I2S ------------------------------- */
00101 //#define _I2S
00102
00103 /* USB device ------------------------------- */
00104 //#define _USBDEV
00105 //#define _USB_DMA
00106
00107 /* QEI ------------------------------- */
00108 //#define _QEI
00109
00110 /* MCPWM ------------------------------- */
00111 //#define _MCPWM
00112
00113 /* CAN--------------------------------*/
00114 //#define _CAN
00115
00116 /* RIT ------------------------------- */
00117 //#define _RIT
00118
00119 /* EMAC ------------------------------ */
00120 //#define _EMAC
00121
00122
00123 /************************** GLOBAL/PUBLIC MACRO DEFINITIONS *********************************/
00124
00125 #ifdef  DEBUG
00126 /*******************************************************************************
00127 * @brief                The CHECK_PARAM macro is used for function's parameters check.
00128 *                               It is used only if the library is compiled in DEBUG mode.
00129 * @param[in]    expr - If expr is false, it calls check_failed() function
00130 *                       which reports the name of the source file and the source
00131 *                       line number of the call that failed.
00132 *                    - If expr is true, it returns no value.
00133 * @return               None
00134 *******************************************************************************/
00135 #define CHECK_PARAM(expr) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))
00136 #else
00137 #define CHECK_PARAM(expr)
00138 #endif /* DEBUG */
00139
00140
00141
00142 /************************** GLOBAL/PUBLIC FUNCTION DECLARATION *********************************/
00143
00144 #ifdef  DEBUG
00145 void check_failed(uint8_t *file, uint32_t line);
00146 #endif
00147
00148
00149 #endif /* LPC17XX_LIBCFG_H_ */
Generated on Tue Jun 7 14:58:57 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/I2C/master/lpc17xx_libcfg.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/I2C/master/lpc17xx_libcfg.h

Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          lpc17xx_libcfg.h                        2010-05-21
00003 */
00026 #ifndef LPC17XX_LIBCFG_H_
00027 #define LPC17XX_LIBCFG_H_
00028
00029 #include "lpc_types.h"
00030
00031
00032 /************************** DEBUG MODE DEFINITIONS *********************************/
00033 /* Un-comment the line below to compile the library in DEBUG mode, this will expanse
00034    the "CHECK_PARAM" macro in the FW library code */
00035
00036 #define DEBUG
00037
00038 /******************* PERIPHERAL FW LIBRARY CONFIGURATION DEFINITIONS ***********************/
00039
00040 /* Comment the line below to disable the specific peripheral inclusion */
00041
00042 /* DEBUG_FRAMWORK ------------------------------ */
00043 #define _DBGFWK
00044
00045 /* GPIO ------------------------------- */
00046 //#define _GPIO
00047
00048 /* EXTI ------------------------------- */
00049 //#define _EXTI
00050
00051 /* UART ------------------------------- */
00052 #define _UART
00053 #define _UART0
00054 //#define _UART1
00055 //#define _UART2
00056 //#define _UART3
00057
00058 /* SPI ------------------------------- */
00059 //#define _SPI
00060
00061 /* SSP ------------------------------- */
00062 //#define _SSP
00063 //#define _SSP0
00064 //#define _SSP1
00065
00066 /* SYSTICK --------------------------- */
00067 //#define _SYSTICK
00068
00069 /* I2C ------------------------------- */
00070 #define _I2C
00071 #define _I2C0
00072 #define _I2C1
00073 #define _I2C2
00074
00075 /* TIMER ------------------------------- */
00076 //#define _TIM
00077
00078 /* WDT ------------------------------- */
00079 //#define _WDT
00080
00081
00082 /* GPDMA ------------------------------- */
00083 #define _GPDMA
00084
00085
00086 /* DAC ------------------------------- */
00087 //#define _DAC
00088
00089 /* DAC ------------------------------- */
00090 #define _ADC
00091
00092
00093 /* PWM ------------------------------- */
00094 //#define _PWM
00095 //#define _PWM1
00096
00097 /* RTC ------------------------------- */
00098 //#define _RTC
00099
00100 /* I2S ------------------------------- */
00101 //#define _I2S
00102
00103 /* USB device ------------------------------- */
00104 //#define _USBDEV
00105 //#define _USB_DMA
00106
00107 /* QEI ------------------------------- */
00108 //#define _QEI
00109
00110 /* MCPWM ------------------------------- */
00111 //#define _MCPWM
00112
00113 /* CAN--------------------------------*/
00114 //#define _CAN
00115
00116 /* RIT ------------------------------- */
00117 //#define _RIT
00118
00119 /* EMAC ------------------------------ */
00120 //#define _EMAC
00121
00122 /************************** GLOBAL/PUBLIC MACRO DEFINITIONS *********************************/
00123
00124 #ifdef  DEBUG
00125 /*******************************************************************************
00126 * @brief                The CHECK_PARAM macro is used for function's parameters check.
00127 *                               It is used only if the library is compiled in DEBUG mode.
00128 * @param[in]    expr - If expr is false, it calls check_failed() function
00129 *                       which reports the name of the source file and the source
00130 *                       line number of the call that failed.
00131 *                    - If expr is true, it returns no value.
00132 * @return               None
00133 *******************************************************************************/
00134 #define CHECK_PARAM(expr) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))
00135 #else
00136 #define CHECK_PARAM(expr)
00137 #endif /* DEBUG */
00138
00139
00140
00141 /************************** GLOBAL/PUBLIC FUNCTION DECLARATION *********************************/
00142
00143 #ifdef  DEBUG
00144 void check_failed(uint8_t *file, uint32_t line);
00145 #endif
00146
00147
00148 #endif /* LPC17XX_LIBCFG_H_ */
Generated on Tue Jun 7 14:58:57 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/I2C/pca8581_polling/lpc17xx_libcfg.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/I2C/pca8581_polling/lpc17xx_libcfg.h

Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          lpc17xx_libcfg.h                        2010-05-21
00003 */
00025 #ifndef LPC17XX_LIBCFG_H_
00026 #define LPC17XX_LIBCFG_H_
00027
00028 #include "lpc_types.h"
00029
00030
00031 /************************** DEBUG MODE DEFINITIONS *********************************/
00032 /* Un-comment the line below to compile the library in DEBUG mode, this will expanse
00033    the "CHECK_PARAM" macro in the FW library code */
00034
00035 #define DEBUG
00036
00037
00038 /******************* PERIPHERAL FW LIBRARY CONFIGURATION DEFINITIONS ***********************/
00039
00040 /* Comment the line below to disable the specific peripheral inclusion */
00041
00042 /* DEBUG_FRAMWORK ------------------------------ */
00043 #define _DBGFWK
00044
00045 /* GPIO ------------------------------- */
00046 //#define _GPIO
00047
00048 /* EXTI ------------------------------- */
00049 //#define _EXTI
00050
00051 /* UART ------------------------------- */
00052 #define _UART
00053 #define _UART0
00054 //#define _UART1
00055 //#define _UART2
00056 //#define _UART3
00057
00058 /* SPI ------------------------------- */
00059 //#define _SPI
00060
00061 /* SSP ------------------------------- */
00062 //#define _SSP
00063 //#define _SSP0
00064 //#define _SSP1
00065
00066 /* SYSTICK --------------------------- */
00067 //#define _SYSTICK
00068
00069 /* I2C ------------------------------- */
00070 #define _I2C
00071 #define _I2C0
00072 #define _I2C1
00073 #define _I2C2
00074
00075 /* TIMER ------------------------------- */
00076 //#define _TIM
00077
00078 /* WDT ------------------------------- */
00079 //#define _WDT
00080
00081
00082 /* GPDMA ------------------------------- */
00083 #define _GPDMA
00084
00085
00086 /* DAC ------------------------------- */
00087 //#define _DAC
00088
00089 /* DAC ------------------------------- */
00090 #define _ADC
00091
00092
00093 /* PWM ------------------------------- */
00094 //#define _PWM
00095 //#define _PWM1
00096
00097 /* RTC ------------------------------- */
00098 //#define _RTC
00099
00100 /* I2S ------------------------------- */
00101 //#define _I2S
00102
00103 /* USB device ------------------------------- */
00104 //#define _USBDEV
00105 //#define _USB_DMA
00106
00107 /* QEI ------------------------------- */
00108 //#define _QEI
00109
00110 /* MCPWM ------------------------------- */
00111 //#define _MCPWM
00112
00113 /* CAN--------------------------------*/
00114 //#define _CAN
00115
00116 /* RIT ------------------------------- */
00117 //#define _RIT
00118
00119 /* EMAC ------------------------------ */
00120 //#define _EMAC
00121
00122
00123 /************************** GLOBAL/PUBLIC MACRO DEFINITIONS *********************************/
00124
00125 #ifdef  DEBUG
00126 /*******************************************************************************
00127 * @brief                The CHECK_PARAM macro is used for function's parameters check.
00128 *                               It is used only if the library is compiled in DEBUG mode.
00129 * @param[in]    expr - If expr is false, it calls check_failed() function
00130 *                       which reports the name of the source file and the source
00131 *                       line number of the call that failed.
00132 *                    - If expr is true, it returns no value.
00133 * @return               None
00134 *******************************************************************************/
00135 #define CHECK_PARAM(expr) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))
00136 #else
00137 #define CHECK_PARAM(expr)
00138 #endif /* DEBUG */
00139
00140
00141
00142 /************************** GLOBAL/PUBLIC FUNCTION DECLARATION *********************************/
00143
00144 #ifdef  DEBUG
00145 void check_failed(uint8_t *file, uint32_t line);
00146 #endif
00147
00148
00149 #endif /* LPC17XX_LIBCFG_H_ */
Generated on Tue Jun 7 14:58:57 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/I2C/sc16is750_int/lpc17xx_libcfg.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/I2C/sc16is750_int/lpc17xx_libcfg.h

Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          lpc17xx_libcfg.h                        2010-05-21
00003 */
00026 #ifndef LPC17XX_LIBCFG_H_
00027 #define LPC17XX_LIBCFG_H_
00028
00029 #include "lpc_types.h"
00030
00031
00032 /************************** DEBUG MODE DEFINITIONS *********************************/
00033 /* Un-comment the line below to compile the library in DEBUG mode, this will expanse
00034    the "CHECK_PARAM" macro in the FW library code */
00035
00036 #define DEBUG
00037
00038
00039 /******************* PERIPHERAL FW LIBRARY CONFIGURATION DEFINITIONS ***********************/
00040
00041 /* Comment the line below to disable the specific peripheral inclusion */
00042
00043 /* DEBUG_FRAMWORK ------------------------------ */
00044 #define _DBGFWK
00045
00046 /* GPIO ------------------------------- */
00047 //#define _GPIO
00048
00049 /* EXTI ------------------------------- */
00050 //#define _EXTI
00051
00052 /* UART ------------------------------- */
00053 #define _UART
00054 #define _UART0
00055 //#define _UART1
00056 //#define _UART2
00057 //#define _UART3
00058
00059 /* SPI ------------------------------- */
00060 //#define _SPI
00061
00062 /* SSP ------------------------------- */
00063 //#define _SSP
00064 //#define _SSP0
00065 //#define _SSP1
00066
00067 /* SYSTICK --------------------------- */
00068 //#define _SYSTICK
00069
00070 /* I2C ------------------------------- */
00071 #define _I2C
00072 #define _I2C0
00073 #define _I2C1
00074 #define _I2C2
00075
00076 /* TIMER ------------------------------- */
00077 //#define _TIM
00078
00079 /* WDT ------------------------------- */
00080 //#define _WDT
00081
00082
00083 /* GPDMA ------------------------------- */
00084 #define _GPDMA
00085
00086
00087 /* DAC ------------------------------- */
00088 //#define _DAC
00089
00090 /* DAC ------------------------------- */
00091 #define _ADC
00092
00093
00094 /* PWM ------------------------------- */
00095 //#define _PWM
00096 //#define _PWM1
00097
00098 /* RTC ------------------------------- */
00099 //#define _RTC
00100
00101 /* I2S ------------------------------- */
00102 //#define _I2S
00103
00104 /* USB device ------------------------------- */
00105 //#define _USBDEV
00106 //#define _USB_DMA
00107
00108 /* QEI ------------------------------- */
00109 //#define _QEI
00110
00111 /* MCPWM ------------------------------- */
00112 //#define _MCPWM
00113
00114 /* CAN--------------------------------*/
00115 //#define _CAN
00116
00117 /* RIT ------------------------------- */
00118 //#define _RIT
00119
00120 /* EMAC ------------------------------ */
00121 //#define _EMAC
00122
00123
00124 /************************** GLOBAL/PUBLIC MACRO DEFINITIONS *********************************/
00125
00126 #ifdef  DEBUG
00127 /*******************************************************************************
00128 * @brief                The CHECK_PARAM macro is used for function's parameters check.
00129 *                               It is used only if the library is compiled in DEBUG mode.
00130 * @param[in]    expr - If expr is false, it calls check_failed() function
00131 *                       which reports the name of the source file and the source
00132 *                       line number of the call that failed.
00133 *                    - If expr is true, it returns no value.
00134 * @return               None
00135 *******************************************************************************/
00136 #define CHECK_PARAM(expr) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))
00137 #else
00138 #define CHECK_PARAM(expr)
00139 #endif /* DEBUG */
00140
00141
00142
00143 /************************** GLOBAL/PUBLIC FUNCTION DECLARATION *********************************/
00144
00145 #ifdef  DEBUG
00146 void check_failed(uint8_t *file, uint32_t line);
00147 #endif
00148
00149
00150 #endif /* LPC17XX_LIBCFG_H_ */
Generated on Tue Jun 7 14:58:57 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/I2C/sc16is750_polling/lpc17xx_libcfg.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/I2C/sc16is750_polling/lpc17xx_libcfg.h

Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          lpc17xx_libcfg.h                        2010-05-21
00003 */
00025 #ifndef LPC17XX_LIBCFG_H_
00026 #define LPC17XX_LIBCFG_H_
00027
00028 #include "lpc_types.h"
00029
00030
00031 /************************** DEBUG MODE DEFINITIONS *********************************/
00032 /* Un-comment the line below to compile the library in DEBUG mode, this will expanse
00033    the "CHECK_PARAM" macro in the FW library code */
00034
00035 #define DEBUG
00036
00037
00038 /******************* PERIPHERAL FW LIBRARY CONFIGURATION DEFINITIONS ***********************/
00039
00040 /* Comment the line below to disable the specific peripheral inclusion */
00041
00042 /* DEBUG_FRAMWORK ------------------------------ */
00043 #define _DBGFWK
00044
00045 /* GPIO ------------------------------- */
00046 //#define _GPIO
00047
00048 /* EXTI ------------------------------- */
00049 //#define _EXTI
00050
00051 /* UART ------------------------------- */
00052 #define _UART
00053 #define _UART0
00054 //#define _UART1
00055 //#define _UART2
00056 //#define _UART3
00057
00058 /* SPI ------------------------------- */
00059 //#define _SPI
00060
00061 /* SSP ------------------------------- */
00062 //#define _SSP
00063 //#define _SSP0
00064 //#define _SSP1
00065
00066 /* SYSTICK --------------------------- */
00067 //#define _SYSTICK
00068
00069 /* I2C ------------------------------- */
00070 #define _I2C
00071 #define _I2C0
00072 #define _I2C1
00073 #define _I2C2
00074
00075 /* TIMER ------------------------------- */
00076 //#define _TIM
00077
00078 /* WDT ------------------------------- */
00079 //#define _WDT
00080
00081
00082 /* GPDMA ------------------------------- */
00083 #define _GPDMA
00084
00085
00086 /* DAC ------------------------------- */
00087 //#define _DAC
00088
00089 /* DAC ------------------------------- */
00090 #define _ADC
00091
00092
00093 /* PWM ------------------------------- */
00094 //#define _PWM
00095 //#define _PWM1
00096
00097 /* RTC ------------------------------- */
00098 //#define _RTC
00099
00100 /* I2S ------------------------------- */
00101 //#define _I2S
00102
00103 /* USB device ------------------------------- */
00104 //#define _USBDEV
00105 //#define _USB_DMA
00106
00107 /* QEI ------------------------------- */
00108 //#define _QEI
00109
00110 /* MCPWM ------------------------------- */
00111 //#define _MCPWM
00112
00113 /* CAN--------------------------------*/
00114 //#define _CAN
00115
00116 /* RIT ------------------------------- */
00117 //#define _RIT
00118
00119 /* EMAC ------------------------------ */
00120 //#define _EMAC
00121
00122
00123 /************************** GLOBAL/PUBLIC MACRO DEFINITIONS *********************************/
00124
00125 #ifdef  DEBUG
00126 /*******************************************************************************
00127 * @brief                The CHECK_PARAM macro is used for function's parameters check.
00128 *                               It is used only if the library is compiled in DEBUG mode.
00129 * @param[in]    expr - If expr is false, it calls check_failed() function
00130 *                       which reports the name of the source file and the source
00131 *                       line number of the call that failed.
00132 *                    - If expr is true, it returns no value.
00133 * @return               None
00134 *******************************************************************************/
00135 #define CHECK_PARAM(expr) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))
00136 #else
00137 #define CHECK_PARAM(expr)
00138 #endif /* DEBUG */
00139
00140
00141
00142 /************************** GLOBAL/PUBLIC FUNCTION DECLARATION *********************************/
00143
00144 #ifdef  DEBUG
00145 void check_failed(uint8_t *file, uint32_t line);
00146 #endif
00147
00148
00149 #endif /* LPC17XX_LIBCFG_H_ */
Generated on Tue Jun 7 14:58:57 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/I2C/slave/lpc17xx_libcfg.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/I2C/slave/lpc17xx_libcfg.h

Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          lpc17xx_libcfg.h                        2010-05-21
00003 */
00025 #ifndef LPC17XX_LIBCFG_H_
00026 #define LPC17XX_LIBCFG_H_
00027
00028 #include "lpc_types.h"
00029
00030
00031 /************************** DEBUG MODE DEFINITIONS *********************************/
00032 /* Un-comment the line below to compile the library in DEBUG mode, this will expanse
00033    the "CHECK_PARAM" macro in the FW library code */
00034
00035 #define DEBUG
00036
00037 /******************* PERIPHERAL FW LIBRARY CONFIGURATION DEFINITIONS ***********************/
00038
00039 /* Comment the line below to disable the specific peripheral inclusion */
00040
00041 /* DEBUG_FRAMWORK ------------------------------ */
00042 #define _DBGFWK
00043
00044 /* GPIO ------------------------------- */
00045 //#define _GPIO
00046
00047 /* EXTI ------------------------------- */
00048 //#define _EXTI
00049
00050 /* UART ------------------------------- */
00051 #define _UART
00052 #define _UART0
00053 //#define _UART1
00054 //#define _UART2
00055 //#define _UART3
00056
00057 /* SPI ------------------------------- */
00058 //#define _SPI
00059
00060 /* SSP ------------------------------- */
00061 //#define _SSP
00062 //#define _SSP0
00063 //#define _SSP1
00064
00065 /* SYSTICK --------------------------- */
00066 //#define _SYSTICK
00067
00068 /* I2C ------------------------------- */
00069 #define _I2C
00070 #define _I2C0
00071 #define _I2C1
00072 #define _I2C2
00073
00074 /* TIMER ------------------------------- */
00075 //#define _TIM
00076
00077 /* WDT ------------------------------- */
00078 //#define _WDT
00079
00080
00081 /* GPDMA ------------------------------- */
00082 #define _GPDMA
00083
00084
00085 /* DAC ------------------------------- */
00086 //#define _DAC
00087
00088 /* DAC ------------------------------- */
00089 #define _ADC
00090
00091
00092 /* PWM ------------------------------- */
00093 //#define _PWM
00094 //#define _PWM1
00095
00096 /* RTC ------------------------------- */
00097 //#define _RTC
00098
00099 /* I2S ------------------------------- */
00100 //#define _I2S
00101
00102 /* USB device ------------------------------- */
00103 //#define _USBDEV
00104 //#define _USB_DMA
00105
00106 /* QEI ------------------------------- */
00107 //#define _QEI
00108
00109 /* MCPWM ------------------------------- */
00110 //#define _MCPWM
00111
00112 /* CAN--------------------------------*/
00113 //#define _CAN
00114
00115 /* RIT ------------------------------- */
00116 //#define _RIT
00117
00118 /* EMAC ------------------------------ */
00119 //#define _EMAC
00120
00121 /************************** GLOBAL/PUBLIC MACRO DEFINITIONS *********************************/
00122
00123 #ifdef  DEBUG
00124 /*******************************************************************************
00125 * @brief                The CHECK_PARAM macro is used for function's parameters check.
00126 *                               It is used only if the library is compiled in DEBUG mode.
00127 * @param[in]    expr - If expr is false, it calls check_failed() function
00128 *                       which reports the name of the source file and the source
00129 *                       line number of the call that failed.
00130 *                    - If expr is true, it returns no value.
00131 * @return               None
00132 *******************************************************************************/
00133 #define CHECK_PARAM(expr) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))
00134 #else
00135 #define CHECK_PARAM(expr)
00136 #endif /* DEBUG */
00137
00138
00139
00140 /************************** GLOBAL/PUBLIC FUNCTION DECLARATION *********************************/
00141
00142 #ifdef  DEBUG
00143 void check_failed(uint8_t *file, uint32_t line);
00144 #endif
00145
00146
00147 #endif /* LPC17XX_LIBCFG_H_ */
Generated on Tue Jun 7 14:58:57 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/I2S/I2S_DMA/lpc17xx_libcfg.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/I2S/I2S_DMA/lpc17xx_libcfg.h

Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          lpc17xx_libcfg.h                        2010-05-21
00003 */
00026 #ifndef LPC17XX_LIBCFG_H_
00027 #define LPC17XX_LIBCFG_H_
00028
00029 #include "lpc_types.h"
00030
00031
00032 /************************** DEBUG MODE DEFINITIONS *********************************/
00033 /* Un-comment the line below to compile the library in DEBUG mode, this will expanse
00034    the "CHECK_PARAM" macro in the FW library code */
00035
00036 #define DEBUG
00037
00038
00039 /******************* PERIPHERAL FW LIBRARY CONFIGURATION DEFINITIONS ***********************/
00040
00041 /* Comment the line below to disable the specific peripheral inclusion */
00042
00043 /* DEBUG_FRAMWORK ------------------------------ */
00044 #define _DBGFWK
00045
00046 /* GPIO ------------------------------- */
00047 //#define _GPIO
00048
00049 /* EXTI ------------------------------- */
00050 //#define _EXTI
00051
00052 /* UART ------------------------------- */
00053 #define _UART
00054 #define _UART0
00055 //#define _UART1
00056 //#define _UART2
00057 //#define _UART3
00058
00059 /* SPI ------------------------------- */
00060 //#define _SPI
00061
00062 /* SSP ------------------------------- */
00063 //#define _SSP
00064 //#define _SSP0
00065 //#define _SSP1
00066
00067 /* SYSTICK --------------------------- */
00068 //#define _SYSTICK
00069
00070 /* I2C ------------------------------- */
00071 //#define _I2C
00072 //#define _I2C0
00073 //#define _I2C1
00074 //#define _I2C2
00075
00076 /* TIMER ------------------------------- */
00077 //#define _TIM
00078
00079 /* WDT ------------------------------- */
00080 //#define _WDT
00081
00082
00083 /* GPDMA ------------------------------- */
00084 #define _GPDMA
00085
00086
00087 /* DAC ------------------------------- */
00088 //#define _DAC
00089
00090 /* DAC ------------------------------- */
00091 //#define _ADC
00092
00093
00094 /* PWM ------------------------------- */
00095 //#define _PWM
00096 //#define _PWM1
00097
00098 /* RTC ------------------------------- */
00099 //#define _RTC
00100
00101 /* I2S ------------------------------- */
00102 #define _I2S
00103
00104 /* USB device ------------------------------- */
00105 //#define _USBDEV
00106 //#define _USB_DMA
00107
00108 /* QEI ------------------------------- */
00109 //#define _QEI
00110
00111 /* MCPWM ------------------------------- */
00112 //#define _MCPWM
00113
00114 /* CAN--------------------------------*/
00115 //#define _CAN
00116
00117 /* RIT ------------------------------- */
00118 //#define _RIT
00119
00120 /* EMAC ------------------------------ */
00121 //#define _EMAC
00122
00123
00124 /************************** GLOBAL/PUBLIC MACRO DEFINITIONS *********************************/
00125
00126 #ifdef  DEBUG
00127 /*******************************************************************************
00128 * @brief                The CHECK_PARAM macro is used for function's parameters check.
00129 *                               It is used only if the library is compiled in DEBUG mode.
00130 * @param[in]    expr - If expr is false, it calls check_failed() function
00131 *                       which reports the name of the source file and the source
00132 *                       line number of the call that failed.
00133 *                    - If expr is true, it returns no value.
00134 * @return               None
00135 *******************************************************************************/
00136 #define CHECK_PARAM(expr) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))
00137 #else
00138 #define CHECK_PARAM(expr)
00139 #endif /* DEBUG */
00140
00141
00142
00143 /************************** GLOBAL/PUBLIC FUNCTION DECLARATION *********************************/
00144
00145 #ifdef  DEBUG
00146 void check_failed(uint8_t *file, uint32_t line);
00147 #endif
00148
00149
00150 #endif /* LPC17XX_LIBCFG_H_ */
Generated on Tue Jun 7 14:58:57 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/I2S/I2S_IRQ/lpc17xx_libcfg.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/I2S/I2S_IRQ/lpc17xx_libcfg.h

Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          lpc17xx_libcfg.h                        2010-05-21
00003 */
00026 #ifndef LPC17XX_LIBCFG_H_
00027 #define LPC17XX_LIBCFG_H_
00028
00029 #include "lpc_types.h"
00030
00031
00032 /************************** DEBUG MODE DEFINITIONS *********************************/
00033 /* Un-comment the line below to compile the library in DEBUG mode, this will expanse
00034    the "CHECK_PARAM" macro in the FW library code */
00035
00036 #define DEBUG
00037
00038
00039 /******************* PERIPHERAL FW LIBRARY CONFIGURATION DEFINITIONS ***********************/
00040
00041 /* Comment the line below to disable the specific peripheral inclusion */
00042
00043 /* DEBUG_FRAMWORK ------------------------------ */
00044 #define _DBGFWK
00045
00046 /* GPIO ------------------------------- */
00047 //#define _GPIO
00048
00049 /* EXTI ------------------------------- */
00050 //#define _EXTI
00051
00052 /* UART ------------------------------- */
00053 #define _UART
00054 #define _UART0
00055 //#define _UART1
00056 //#define _UART2
00057 //#define _UART3
00058
00059 /* SPI ------------------------------- */
00060 //#define _SPI
00061
00062 /* SSP ------------------------------- */
00063 //#define _SSP
00064 //#define _SSP0
00065 //#define _SSP1
00066
00067 /* SYSTICK --------------------------- */
00068 //#define _SYSTICK
00069
00070 /* I2C ------------------------------- */
00071 //#define _I2C
00072 //#define _I2C0
00073 //#define _I2C1
00074 //#define _I2C2
00075
00076 /* TIMER ------------------------------- */
00077 //#define _TIM
00078
00079 /* WDT ------------------------------- */
00080 //#define _WDT
00081
00082
00083 /* GPDMA ------------------------------- */
00084 //#define _GPDMA
00085
00086
00087 /* DAC ------------------------------- */
00088 //#define _DAC
00089
00090 /* DAC ------------------------------- */
00091 //#define _ADC
00092
00093
00094 /* PWM ------------------------------- */
00095 //#define _PWM
00096 //#define _PWM1
00097
00098 /* RTC ------------------------------- */
00099 //#define _RTC
00100
00101 /* I2S ------------------------------- */
00102 #define _I2S
00103
00104 /* USB device ------------------------------- */
00105 //#define _USBDEV
00106 //#define _USB_DMA
00107
00108 /* QEI ------------------------------- */
00109 //#define _QEI
00110
00111 /* MCPWM ------------------------------- */
00112 //#define _MCPWM
00113
00114 /* CAN--------------------------------*/
00115 //#define _CAN
00116
00117 /* RIT ------------------------------- */
00118 //#define _RIT
00119
00120 /* EMAC ------------------------------ */
00121 //#define _EMAC
00122
00123 /************************** GLOBAL/PUBLIC MACRO DEFINITIONS *********************************/
00124
00125 #ifdef  DEBUG
00126 /*******************************************************************************
00127 * @brief                The CHECK_PARAM macro is used for function's parameters check.
00128 *                               It is used only if the library is compiled in DEBUG mode.
00129 * @param[in]    expr - If expr is false, it calls check_failed() function
00130 *                       which reports the name of the source file and the source
00131 *                       line number of the call that failed.
00132 *                    - If expr is true, it returns no value.
00133 * @return               None
00134 *******************************************************************************/
00135 #define CHECK_PARAM(expr) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))
00136 #else
00137 #define CHECK_PARAM(expr)
00138 #endif /* DEBUG */
00139
00140
00141
00142 /************************** GLOBAL/PUBLIC FUNCTION DECLARATION *********************************/
00143
00144 #ifdef  DEBUG
00145 void check_failed(uint8_t *file, uint32_t line);
00146 #endif
00147
00148
00149 #endif /* LPC17XX_LIBCFG_H_ */
Generated on Tue Jun 7 14:58:57 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/I2S/I2S_MCLK/lpc17xx_libcfg.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/I2S/I2S_MCLK/lpc17xx_libcfg.h

Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          lpc17xx_libcfg.h                        2010-05-21
00003 */
00026 #ifndef LPC17XX_LIBCFG_H_
00027 #define LPC17XX_LIBCFG_H_
00028
00029 #include "lpc_types.h"
00030
00031
00032 /************************** DEBUG MODE DEFINITIONS *********************************/
00033 /* Un-comment the line below to compile the library in DEBUG mode, this will expanse
00034    the "CHECK_PARAM" macro in the FW library code */
00035
00036 #define DEBUG
00037
00038
00039 /******************* PERIPHERAL FW LIBRARY CONFIGURATION DEFINITIONS ***********************/
00040
00041 /* Comment the line below to disable the specific peripheral inclusion */
00042
00043 /* DEBUG_FRAMWORK ------------------------------ */
00044 #define _DBGFWK
00045
00046 /* GPIO ------------------------------- */
00047 //#define _GPIO
00048
00049 /* EXTI ------------------------------- */
00050 //#define _EXTI
00051
00052 /* UART ------------------------------- */
00053 #define _UART
00054 #define _UART0
00055 //#define _UART1
00056 //#define _UART2
00057 //#define _UART3
00058
00059 /* SPI ------------------------------- */
00060 //#define _SPI
00061
00062 /* SSP ------------------------------- */
00063 //#define _SSP
00064 //#define _SSP0
00065 //#define _SSP1
00066
00067 /* SYSTICK --------------------------- */
00068 //#define _SYSTICK
00069
00070 /* I2C ------------------------------- */
00071 //#define _I2C
00072 //#define _I2C0
00073 //#define _I2C1
00074 //#define _I2C2
00075
00076 /* TIMER ------------------------------- */
00077 //#define _TIM
00078
00079 /* WDT ------------------------------- */
00080 //#define _WDT
00081
00082
00083 /* GPDMA ------------------------------- */
00084 //#define _GPDMA
00085
00086
00087 /* DAC ------------------------------- */
00088 //#define _DAC
00089
00090 /* DAC ------------------------------- */
00091 //#define _ADC
00092
00093
00094 /* PWM ------------------------------- */
00095 //#define _PWM
00096 //#define _PWM1
00097
00098 /* RTC ------------------------------- */
00099 //#define _RTC
00100
00101 /* I2S ------------------------------- */
00102 #define _I2S
00103
00104 /* USB device ------------------------------- */
00105 //#define _USBDEV
00106 //#define _USB_DMA
00107
00108 /* QEI ------------------------------- */
00109 //#define _QEI
00110
00111 /* MCPWM ------------------------------- */
00112 //#define _MCPWM
00113
00114 /* CAN--------------------------------*/
00115 //#define _CAN
00116
00117 /* RIT ------------------------------- */
00118 //#define _RIT
00119
00120 /* EMAC ------------------------------ */
00121 //#define _EMAC
00122
00123 /************************** GLOBAL/PUBLIC MACRO DEFINITIONS *********************************/
00124
00125 #ifdef  DEBUG
00126 /*******************************************************************************
00127 * @brief                The CHECK_PARAM macro is used for function's parameters check.
00128 *                               It is used only if the library is compiled in DEBUG mode.
00129 * @param[in]    expr - If expr is false, it calls check_failed() function
00130 *                       which reports the name of the source file and the source
00131 *                       line number of the call that failed.
00132 *                    - If expr is true, it returns no value.
00133 * @return               None
00134 *******************************************************************************/
00135 #define CHECK_PARAM(expr) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))
00136 #else
00137 #define CHECK_PARAM(expr)
00138 #endif /* DEBUG */
00139
00140
00141
00142 /************************** GLOBAL/PUBLIC FUNCTION DECLARATION *********************************/
00143
00144 #ifdef  DEBUG
00145 void check_failed(uint8_t *file, uint32_t line);
00146 #endif
00147
00148
00149 #endif /* LPC17XX_LIBCFG_H_ */
Generated on Tue Jun 7 14:58:57 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/I2S/I2S_test_4_wire/lpc17xx_libcfg.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/I2S/I2S_test_4_wire/lpc17xx_libcfg.h

Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          lpc17xx_libcfg.h                        2010-05-21
00003 */
00026 #ifndef LPC17XX_LIBCFG_H_
00027 #define LPC17XX_LIBCFG_H_
00028
00029 #include "lpc_types.h"
00030
00031
00032 /************************** DEBUG MODE DEFINITIONS *********************************/
00033 /* Un-comment the line below to compile the library in DEBUG mode, this will expanse
00034    the "CHECK_PARAM" macro in the FW library code */
00035
00036 #define DEBUG
00037
00038
00039 /******************* PERIPHERAL FW LIBRARY CONFIGURATION DEFINITIONS ***********************/
00040
00041 /* Comment the line below to disable the specific peripheral inclusion */
00042
00043 /* DEBUG_FRAMWORK ------------------------------ */
00044 #define _DBGFWK
00045
00046 /* GPIO ------------------------------- */
00047 //#define _GPIO
00048
00049 /* EXTI ------------------------------- */
00050 //#define _EXTI
00051
00052 /* UART ------------------------------- */
00053 #define _UART
00054 #define _UART0
00055 //#define _UART1
00056 //#define _UART2
00057 //#define _UART3
00058
00059 /* SPI ------------------------------- */
00060 //#define _SPI
00061
00062 /* SSP ------------------------------- */
00063 //#define _SSP
00064 //#define _SSP0
00065 //#define _SSP1
00066
00067 /* SYSTICK --------------------------- */
00068 //#define _SYSTICK
00069
00070 /* I2C ------------------------------- */
00071 //#define _I2C
00072 //#define _I2C0
00073 //#define _I2C1
00074 //#define _I2C2
00075
00076 /* TIMER ------------------------------- */
00077 //#define _TIM
00078
00079 /* WDT ------------------------------- */
00080 //#define _WDT
00081
00082
00083 /* GPDMA ------------------------------- */
00084 //#define _GPDMA
00085
00086
00087 /* DAC ------------------------------- */
00088 //#define _DAC
00089
00090 /* DAC ------------------------------- */
00091 //#define _ADC
00092
00093
00094 /* PWM ------------------------------- */
00095 //#define _PWM
00096 //#define _PWM1
00097
00098 /* RTC ------------------------------- */
00099 //#define _RTC
00100
00101 /* I2S ------------------------------- */
00102 #define _I2S
00103
00104 /* USB device ------------------------------- */
00105 //#define _USBDEV
00106 //#define _USB_DMA
00107
00108 /* QEI ------------------------------- */
00109 //#define _QEI
00110
00111 /* MCPWM ------------------------------- */
00112 //#define _MCPWM
00113
00114 /* CAN--------------------------------*/
00115 //#define _CAN
00116
00117 /* RIT ------------------------------- */
00118 //#define _RIT
00119
00120 /* EMAC ------------------------------ */
00121 //#define _EMAC
00122
00123
00124 /************************** GLOBAL/PUBLIC MACRO DEFINITIONS *********************************/
00125
00126 #ifdef  DEBUG
00127 /*******************************************************************************
00128 * @brief                The CHECK_PARAM macro is used for function's parameters check.
00129 *                               It is used only if the library is compiled in DEBUG mode.
00130 * @param[in]    expr - If expr is false, it calls check_failed() function
00131 *                       which reports the name of the source file and the source
00132 *                       line number of the call that failed.
00133 *                    - If expr is true, it returns no value.
00134 * @return               None
00135 *******************************************************************************/
00136 #define CHECK_PARAM(expr) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))
00137 #else
00138 #define CHECK_PARAM(expr)
00139 #endif /* DEBUG */
00140
00141
00142
00143 /************************** GLOBAL/PUBLIC FUNCTION DECLARATION *********************************/
00144
00145 #ifdef  DEBUG
00146 void check_failed(uint8_t *file, uint32_t line);
00147 #endif
00148
00149
00150 #endif /* LPC17XX_LIBCFG_H_ */
Generated on Tue Jun 7 14:58:57 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/I2S/I2S_two_kit/lpc17xx_libcfg.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/I2S/I2S_two_kit/lpc17xx_libcfg.h

Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          lpc17xx_libcfg.h                        2010-05-21
00003 */
00026 #ifndef LPC17XX_LIBCFG_H_
00027 #define LPC17XX_LIBCFG_H_
00028
00029 #include "lpc_types.h"
00030
00031
00032 /************************** DEBUG MODE DEFINITIONS *********************************/
00033 /* Un-comment the line below to compile the library in DEBUG mode, this will expanse
00034    the "CHECK_PARAM" macro in the FW library code */
00035
00036 #define DEBUG
00037
00038
00039 /******************* PERIPHERAL FW LIBRARY CONFIGURATION DEFINITIONS ***********************/
00040
00041 /* Comment the line below to disable the specific peripheral inclusion */
00042
00043 /* DEBUG_FRAMWORK ------------------------------ */
00044 #define _DBGFWK
00045
00046 /* GPIO ------------------------------- */
00047 //#define _GPIO
00048
00049 /* EXTI ------------------------------- */
00050 //#define _EXTI
00051
00052 /* UART ------------------------------- */
00053 #define _UART
00054 #define _UART0
00055 //#define _UART1
00056 //#define _UART2
00057 //#define _UART3
00058
00059 /* SPI ------------------------------- */
00060 //#define _SPI
00061
00062 /* SSP ------------------------------- */
00063 //#define _SSP
00064 //#define _SSP0
00065 //#define _SSP1
00066
00067 /* SYSTICK --------------------------- */
00068 //#define _SYSTICK
00069
00070 /* I2C ------------------------------- */
00071 //#define _I2C
00072 //#define _I2C0
00073 //#define _I2C1
00074 //#define _I2C2
00075
00076 /* TIMER ------------------------------- */
00077 //#define _TIM
00078
00079 /* WDT ------------------------------- */
00080 //#define _WDT
00081
00082
00083 /* GPDMA ------------------------------- */
00084 //#define _GPDMA
00085
00086
00087 /* DAC ------------------------------- */
00088 //#define _DAC
00089
00090 /* DAC ------------------------------- */
00091 //#define _ADC
00092
00093
00094 /* PWM ------------------------------- */
00095 //#define _PWM
00096 //#define _PWM1
00097
00098 /* RTC ------------------------------- */
00099 //#define _RTC
00100
00101 /* I2S ------------------------------- */
00102 #define _I2S
00103
00104 /* USB device ------------------------------- */
00105 //#define _USBDEV
00106 //#define _USB_DMA
00107
00108 /* QEI ------------------------------- */
00109 //#define _QEI
00110
00111 /* MCPWM ------------------------------- */
00112 //#define _MCPWM
00113
00114 /* CAN--------------------------------*/
00115 //#define _CAN
00116
00117 /* RIT ------------------------------- */
00118 //#define _RIT
00119
00120 /* EMAC ------------------------------ */
00121 //#define _EMAC
00122
00123 /************************** GLOBAL/PUBLIC MACRO DEFINITIONS *********************************/
00124
00125 #ifdef  DEBUG
00126 /*******************************************************************************
00127 * @brief                The CHECK_PARAM macro is used for function's parameters check.
00128 *                               It is used only if the library is compiled in DEBUG mode.
00129 * @param[in]    expr - If expr is false, it calls check_failed() function
00130 *                       which reports the name of the source file and the source
00131 *                       line number of the call that failed.
00132 *                    - If expr is true, it returns no value.
00133 * @return               None
00134 *******************************************************************************/
00135 #define CHECK_PARAM(expr) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))
00136 #else
00137 #define CHECK_PARAM(expr)
00138 #endif /* DEBUG */
00139
00140
00141
00142 /************************** GLOBAL/PUBLIC FUNCTION DECLARATION *********************************/
00143
00144 #ifdef  DEBUG
00145 void check_failed(uint8_t *file, uint32_t line);
00146 #endif
00147
00148
00149 #endif /* LPC17XX_LIBCFG_H_ */
Generated on Tue Jun 7 14:58:57 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/I2S/Polling/lpc17xx_libcfg.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/I2S/Polling/lpc17xx_libcfg.h

Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          lpc17xx_libcfg.h                        2010-05-21
00003 */
00026 #ifndef LPC17XX_LIBCFG_H_
00027 #define LPC17XX_LIBCFG_H_
00028
00029 #include "lpc_types.h"
00030
00031
00032 /************************** DEBUG MODE DEFINITIONS *********************************/
00033 /* Un-comment the line below to compile the library in DEBUG mode, this will expanse
00034    the "CHECK_PARAM" macro in the FW library code */
00035
00036 #define DEBUG
00037
00038
00039 /******************* PERIPHERAL FW LIBRARY CONFIGURATION DEFINITIONS ***********************/
00040
00041 /* Comment the line below to disable the specific peripheral inclusion */
00042
00043 /* DEBUG_FRAMWORK ------------------------------ */
00044 #define _DBGFWK
00045
00046 /* GPIO ------------------------------- */
00047 //#define _GPIO
00048
00049 /* EXTI ------------------------------- */
00050 //#define _EXTI
00051
00052 /* UART ------------------------------- */
00053 #define _UART
00054 #define _UART0
00055 //#define _UART1
00056 //#define _UART2
00057 //#define _UART3
00058
00059 /* SPI ------------------------------- */
00060 //#define _SPI
00061
00062 /* SSP ------------------------------- */
00063 //#define _SSP
00064 //#define _SSP0
00065 //#define _SSP1
00066
00067 /* SYSTICK --------------------------- */
00068 //#define _SYSTICK
00069
00070 /* I2C ------------------------------- */
00071 //#define _I2C
00072 //#define _I2C0
00073 //#define _I2C1
00074 //#define _I2C2
00075
00076 /* TIMER ------------------------------- */
00077 //#define _TIM
00078
00079 /* WDT ------------------------------- */
00080 //#define _WDT
00081
00082
00083 /* GPDMA ------------------------------- */
00084 //#define _GPDMA
00085
00086
00087 /* DAC ------------------------------- */
00088 //#define _DAC
00089
00090 /* DAC ------------------------------- */
00091 //#define _ADC
00092
00093
00094 /* PWM ------------------------------- */
00095 //#define _PWM
00096 //#define _PWM1
00097
00098 /* RTC ------------------------------- */
00099 //#define _RTC
00100
00101 /* I2S ------------------------------- */
00102 #define _I2S
00103
00104 /* USB device ------------------------------- */
00105 //#define _USBDEV
00106 //#define _USB_DMA
00107
00108 /* QEI ------------------------------- */
00109 //#define _QEI
00110
00111 /* MCPWM ------------------------------- */
00112 //#define _MCPWM
00113
00114 /* CAN--------------------------------*/
00115 //#define _CAN
00116
00117 /* RIT ------------------------------- */
00118 //#define _RIT
00119
00120 /* EMAC ------------------------------ */
00121 //#define _EMAC
00122
00123
00124 /************************** GLOBAL/PUBLIC MACRO DEFINITIONS *********************************/
00125
00126 #ifdef  DEBUG
00127 /*******************************************************************************
00128 * @brief                The CHECK_PARAM macro is used for function's parameters check.
00129 *                               It is used only if the library is compiled in DEBUG mode.
00130 * @param[in]    expr - If expr is false, it calls check_failed() function
00131 *                       which reports the name of the source file and the source
00132 *                       line number of the call that failed.
00133 *                    - If expr is true, it returns no value.
00134 * @return               None
00135 *******************************************************************************/
00136 #define CHECK_PARAM(expr) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))
00137 #else
00138 #define CHECK_PARAM(expr)
00139 #endif /* DEBUG */
00140
00141
00142
00143 /************************** GLOBAL/PUBLIC FUNCTION DECLARATION *********************************/
00144
00145 #ifdef  DEBUG
00146 void check_failed(uint8_t *file, uint32_t line);
00147 #endif
00148
00149
00150 #endif /* LPC17XX_LIBCFG_H_ */
Generated on Tue Jun 7 14:58:57 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/LCD/NOKIA6610_LCD/lpc17xx_libcfg.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/LCD/NOKIA6610_LCD/lpc17xx_libcfg.h

Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          lpc17xx_libcfg.h                        2010-05-21
00003 */
00025 #ifndef LPC17XX_LIBCFG_H_
00026 #define LPC17XX_LIBCFG_H_
00027
00028 #include "lpc_types.h"
00029
00030
00031 /************************** DEBUG MODE DEFINITIONS *********************************/
00032 /* Un-comment the line below to compile the library in DEBUG mode, this will expanse
00033    the "CHECK_PARAM" macro in the FW library code */
00034
00035 #define DEBUG
00036 /* Comment the line below to disable the specific peripheral inclusion */
00037
00038 /* DEBUG_FRAMWORK ------------------------------ */
00039 //#define _DBGFWK
00040
00041 /* GPIO ------------------------------- */
00042 #define _GPIO
00043
00044 /* EXTI ------------------------------- */
00045 //#define _EXTI
00046
00047 /* UART ------------------------------- */
00048 //#define _UART
00049 //#define _UART0
00050 //#define _UART1
00051 //#define _UART2
00052 //#define _UART3
00053
00054 /* SPI ------------------------------- */
00055 //#define _SPI
00056
00057 /* SSP ------------------------------- */
00058 //#define _SSP
00059 //#define _SSP0
00060 //#define _SSP1
00061
00062 /* SYSTICK --------------------------- */
00063 //#define _SYSTICK
00064
00065 /* I2C ------------------------------- */
00066 //#define _I2C
00067 //#define _I2C0
00068 //#define _I2C1
00069 //#define _I2C2
00070
00071 /* TIMER ------------------------------- */
00072 #define _TIM
00073
00074 /* WDT ------------------------------- */
00075 //#define _WDT
00076
00077
00078 /* GPDMA ------------------------------- */
00079 //#define _GPDMA
00080
00081
00082 /* DAC ------------------------------- */
00083 //#define _DAC
00084
00085 /* DAC ------------------------------- */
00086 #define _ADC
00087
00088
00089 /* PWM ------------------------------- */
00090 //#define _PWM
00091 //#define _PWM1
00092
00093 /* RTC ------------------------------- */
00094 //#define _RTC
00095
00096 /* I2S ------------------------------- */
00097 //#define _I2S
00098
00099 /* USB device ------------------------------- */
00100 //#define _USBDEV
00101 //#define _USB_DMA
00102
00103 /* QEI ------------------------------- */
00104 //#define _QEI
00105
00106 /* MCPWM ------------------------------- */
00107 //#define _MCPWM
00108
00109 /* CAN--------------------------------*/
00110 //#define _CAN
00111
00112 /* RIT ------------------------------- */
00113 //#define _RIT
00114
00115 /* EMAC ------------------------------ */
00116 //#define _EMAC
00117
00118 /******************* PERIPHERAL FW LIBRARY CONFIGURATION DEFINITIONS ***********************/
00119
00120 /* Comment the line below to disable the specific peripheral inclusion */
00121
00122 /************************** GLOBAL/PUBLIC MACRO DEFINITIONS *********************************/
00123
00124 #ifdef  DEBUG
00125 /*******************************************************************************
00126 * @brief                The CHECK_PARAM macro is used for function's parameters check.
00127 *                               It is used only if the library is compiled in DEBUG mode.
00128 * @param[in]    expr - If expr is false, it calls check_failed() function
00129 *                       which reports the name of the source file and the source
00130 *                       line number of the call that failed.
00131 *                    - If expr is true, it returns no value.
00132 * @return               None
00133 *******************************************************************************/
00134 #define CHECK_PARAM(expr) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))
00135 #else
00136 #define CHECK_PARAM(expr)
00137 #endif /* DEBUG */
00138
00139
00140
00141 /************************** GLOBAL/PUBLIC FUNCTION DECLARATION *********************************/
00142
00143 #ifdef  DEBUG
00144 void check_failed(uint8_t *file, uint32_t line);
00145 #endif
00146
00147
00148 #endif /* LPC17XX_LIBCFG_H_ */
Generated on Tue Jun 7 14:58:57 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/LCD/QVGA_TFT_LCD/lpc17xx_libcfg.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/LCD/QVGA_TFT_LCD/lpc17xx_libcfg.h

Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          lpc17xx_libcfg.h                        2010-05-21
00003 */
00026 #ifndef LPC17XX_LIBCFG_H_
00027 #define LPC17XX_LIBCFG_H_
00028
00029 #include "lpc_types.h"
00030
00031
00032 /************************** DEBUG MODE DEFINITIONS *********************************/
00033 /* Un-comment the line below to compile the library in DEBUG mode, this will expanse
00034    the "CHECK_PARAM" macro in the FW library code */
00035
00036 #define DEBUG
00037
00038
00039 /******************* PERIPHERAL FW LIBRARY CONFIGURATION DEFINITIONS ***********************/
00040
00041 /* Comment the line below to disable the specific peripheral inclusion */
00042
00043 /* DEBUG_FRAMWORK ------------------------------ */
00044 //#define _DBGFWK
00045
00046 /* GPIO ------------------------------- */
00047 #define _GPIO
00048
00049 /* EXTI ------------------------------- */
00050 //#define _EXTI
00051
00052 /* UART ------------------------------- */
00053 //#define _UART
00054 //#define _UART0
00055 //#define _UART1
00056 //#define _UART2
00057 //#define _UART3
00058
00059 /* SPI ------------------------------- */
00060 //#define _SPI
00061
00062 /* SSP ------------------------------- */
00063 //#define _SSP
00064 //#define _SSP0
00065 //#define _SSP1
00066
00067 /* SYSTICK --------------------------- */
00068 //#define _SYSTICK
00069
00070 /* I2C ------------------------------- */
00071 //#define _I2C
00072 //#define _I2C0
00073 //#define _I2C1
00074 //#define _I2C2
00075
00076 /* TIMER ------------------------------- */
00077 //#define _TIM
00078
00079 /* WDT ------------------------------- */
00080 //#define _WDT
00081
00082
00083 /* GPDMA ------------------------------- */
00084 //#define _GPDMA
00085
00086
00087 /* DAC ------------------------------- */
00088 //#define _DAC
00089
00090 /* DAC ------------------------------- */
00091 //#define _ADC
00092
00093
00094 /* PWM ------------------------------- */
00095 //#define _PWM
00096 //#define _PWM1
00097
00098 /* RTC ------------------------------- */
00099 //#define _RTC
00100
00101 /* I2S ------------------------------- */
00102 //#define _I2S
00103
00104 /* USB device ------------------------------- */
00105 //#define _USBDEV
00106 //#define _USB_DMA
00107
00108 /* QEI ------------------------------- */
00109 //#define _QEI
00110
00111 /* MCPWM ------------------------------- */
00112 //#define _MCPWM
00113
00114 /* CAN--------------------------------*/
00115 //#define _CAN
00116
00117 /* RIT ------------------------------- */
00118 //#define _RIT
00119
00120 /* EMAC ------------------------------ */
00121 //#define _EMAC
00122 /************************** GLOBAL/PUBLIC MACRO DEFINITIONS *********************************/
00123
00124 #ifdef  DEBUG
00125 /*******************************************************************************
00126 * @brief                The CHECK_PARAM macro is used for function's parameters check.
00127 *                               It is used only if the library is compiled in DEBUG mode.
00128 * @param[in]    expr - If expr is false, it calls check_failed() function
00129 *                       which reports the name of the source file and the source
00130 *                       line number of the call that failed.
00131 *                    - If expr is true, it returns no value.
00132 * @return               None
00133 *******************************************************************************/
00134 #define CHECK_PARAM(expr) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))
00135 #else
00136 #define CHECK_PARAM(expr)
00137 #endif /* DEBUG */
00138
00139
00140
00141 /************************** GLOBAL/PUBLIC FUNCTION DECLARATION *********************************/
00142
00143 #ifdef  DEBUG
00144 void check_failed(uint8_t *file, uint32_t line);
00145 #endif
00146
00147
00148 #endif /* LPC17XX_LIBCFG_H_ */
Generated on Tue Jun 7 14:58:57 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CM3/DeviceSupport/NXP/LPC17xx/LPC17xx.h Source File

C:/nxpdrv/LPC1700CMSIS/Core/CM3/DeviceSupport/NXP/LPC17xx/LPC17xx.h

Go to the documentation of this file.
00001 /**************************************************************************/
00026 #ifndef __LPC17xx_H__
00027 #define __LPC17xx_H__
00028
00029 /*
00030  * ==========================================================================
00031  * ---------- Interrupt Number Definition -----------------------------------
00032  * ==========================================================================
00033  */
00034
00040 typedef enum IRQn
00041 {
00042 /******  Cortex-M3 Processor Exceptions Numbers ***************************************************/
00043   NonMaskableInt_IRQn           = -14,
00044   MemoryManagement_IRQn         = -12,
00045   BusFault_IRQn                 = -11,
00046   UsageFault_IRQn               = -10,
00047   SVCall_IRQn                   = -5,
00048   DebugMonitor_IRQn             = -4,
00049   PendSV_IRQn                   = -2,
00050   SysTick_IRQn                  = -1,
00052 /******  LPC17xx Specific Interrupt Numbers *******************************************************/
00053   WDT_IRQn                      = 0,
00054   TIMER0_IRQn                   = 1,
00055   TIMER1_IRQn                   = 2,
00056   TIMER2_IRQn                   = 3,
00057   TIMER3_IRQn                   = 4,
00058   UART0_IRQn                    = 5,
00059   UART1_IRQn                    = 6,
00060   UART2_IRQn                    = 7,
00061   UART3_IRQn                    = 8,
00062   PWM1_IRQn                     = 9,
00063   I2C0_IRQn                     = 10,
00064   I2C1_IRQn                     = 11,
00065   I2C2_IRQn                     = 12,
00066   SPI_IRQn                      = 13,
00067   SSP0_IRQn                     = 14,
00068   SSP1_IRQn                     = 15,
00069   PLL0_IRQn                     = 16,
00070   RTC_IRQn                      = 17,
00071   EINT0_IRQn                    = 18,
00072   EINT1_IRQn                    = 19,
00073   EINT2_IRQn                    = 20,
00074   EINT3_IRQn                    = 21,
00075   ADC_IRQn                      = 22,
00076   BOD_IRQn                      = 23,
00077   USB_IRQn                      = 24,
00078   CAN_IRQn                      = 25,
00079   DMA_IRQn                      = 26,
00080   I2S_IRQn                      = 27,
00081   ENET_IRQn                     = 28,
00082   RIT_IRQn                      = 29,
00083   MCPWM_IRQn                    = 30,
00084   QEI_IRQn                      = 31,
00085   PLL1_IRQn                     = 32,
00086   USBActivity_IRQn                              = 33,
00087   CANActivity_IRQn                              = 34
00088 } IRQn_Type;
00089
00090
00091 /*
00092  * ==========================================================================
00093  * ----------- Processor and Core Peripheral Section ------------------------
00094  * ==========================================================================
00095  */
00096
00097 /* Configuration of the Cortex-M3 Processor and Core Peripherals */
00098 #define __MPU_PRESENT             1
00099 #define __NVIC_PRIO_BITS          5
00100 #define __Vendor_SysTickConfig    0
00103 #include "core_cm3.h"                       /* Cortex-M3 processor and core peripherals           */
00104 #include "system_LPC17xx.h"                 /* System Header                                      */
00105
00106
00107 /******************************************************************************/
00108 /*                Device Specific Peripheral registers structures             */
00109 /******************************************************************************/
00110
00111 #if defined ( __CC_ARM   )
00112 #pragma anon_unions
00113 #endif
00114
00115 /*------------- System Control (SC) ------------------------------------------*/
00117 typedef struct
00118 {
00119   __IO uint32_t FLASHCFG;               /* Flash Accelerator Module           */
00120        uint32_t RESERVED0[31];
00121   __IO uint32_t PLL0CON;                /* Clocking and Power Control         */
00122   __IO uint32_t PLL0CFG;
00123   __I  uint32_t PLL0STAT;
00124   __O  uint32_t PLL0FEED;
00125        uint32_t RESERVED1[4];
00126   __IO uint32_t PLL1CON;
00127   __IO uint32_t PLL1CFG;
00128   __I  uint32_t PLL1STAT;
00129   __O  uint32_t PLL1FEED;
00130        uint32_t RESERVED2[4];
00131   __IO uint32_t PCON;
00132   __IO uint32_t PCONP;
00133        uint32_t RESERVED3[15];
00134   __IO uint32_t CCLKCFG;
00135   __IO uint32_t USBCLKCFG;
00136   __IO uint32_t CLKSRCSEL;
00137   __IO uint32_t CANSLEEPCLR;
00138   __IO uint32_t CANWAKEFLAGS;
00139        uint32_t RESERVED4[10];
00140   __IO uint32_t EXTINT;                 /* External Interrupts                */
00141        uint32_t RESERVED5;
00142   __IO uint32_t EXTMODE;
00143   __IO uint32_t EXTPOLAR;
00144        uint32_t RESERVED6[12];
00145   __IO uint32_t RSID;                   /* Reset                              */
00146        uint32_t RESERVED7[7];
00147   __IO uint32_t SCS;                    /* Syscon Miscellaneous Registers     */
00148   __IO uint32_t IRCTRIM;                /* Clock Dividers                     */
00149   __IO uint32_t PCLKSEL0;
00150   __IO uint32_t PCLKSEL1;
00151        uint32_t RESERVED8[4];
00152   __IO uint32_t USBIntSt;               /* USB Device/OTG Interrupt Register  */
00153   __IO uint32_t DMAREQSEL;
00154   __IO uint32_t CLKOUTCFG;              /* Clock Output Configuration         */
00155  } LPC_SC_TypeDef;
00156
00157 /*------------- Pin Connect Block (PINCON) -----------------------------------*/
00159 typedef struct
00160 {
00161   __IO uint32_t PINSEL0;
00162   __IO uint32_t PINSEL1;
00163   __IO uint32_t PINSEL2;
00164   __IO uint32_t PINSEL3;
00165   __IO uint32_t PINSEL4;
00166   __IO uint32_t PINSEL5;
00167   __IO uint32_t PINSEL6;
00168   __IO uint32_t PINSEL7;
00169   __IO uint32_t PINSEL8;
00170   __IO uint32_t PINSEL9;
00171   __IO uint32_t PINSEL10;
00172        uint32_t RESERVED0[5];
00173   __IO uint32_t PINMODE0;
00174   __IO uint32_t PINMODE1;
00175   __IO uint32_t PINMODE2;
00176   __IO uint32_t PINMODE3;
00177   __IO uint32_t PINMODE4;
00178   __IO uint32_t PINMODE5;
00179   __IO uint32_t PINMODE6;
00180   __IO uint32_t PINMODE7;
00181   __IO uint32_t PINMODE8;
00182   __IO uint32_t PINMODE9;
00183   __IO uint32_t PINMODE_OD0;
00184   __IO uint32_t PINMODE_OD1;
00185   __IO uint32_t PINMODE_OD2;
00186   __IO uint32_t PINMODE_OD3;
00187   __IO uint32_t PINMODE_OD4;
00188   __IO uint32_t I2CPADCFG;
00189 } LPC_PINCON_TypeDef;
00190
00191 /*------------- General Purpose Input/Output (GPIO) --------------------------*/
00193 typedef struct
00194 {
00195   union {
00196     __IO uint32_t FIODIR;
00197     struct {
00198       __IO uint16_t FIODIRL;
00199       __IO uint16_t FIODIRH;
00200     };
00201     struct {
00202       __IO uint8_t  FIODIR0;
00203       __IO uint8_t  FIODIR1;
00204       __IO uint8_t  FIODIR2;
00205       __IO uint8_t  FIODIR3;
00206     };
00207   };
00208   uint32_t RESERVED0[3];
00209   union {
00210     __IO uint32_t FIOMASK;
00211     struct {
00212       __IO uint16_t FIOMASKL;
00213       __IO uint16_t FIOMASKH;
00214     };
00215     struct {
00216       __IO uint8_t  FIOMASK0;
00217       __IO uint8_t  FIOMASK1;
00218       __IO uint8_t  FIOMASK2;
00219       __IO uint8_t  FIOMASK3;
00220     };
00221   };
00222   union {
00223     __IO uint32_t FIOPIN;
00224     struct {
00225       __IO uint16_t FIOPINL;
00226       __IO uint16_t FIOPINH;
00227     };
00228     struct {
00229       __IO uint8_t  FIOPIN0;
00230       __IO uint8_t  FIOPIN1;
00231       __IO uint8_t  FIOPIN2;
00232       __IO uint8_t  FIOPIN3;
00233     };
00234   };
00235   union {
00236     __IO uint32_t FIOSET;
00237     struct {
00238       __IO uint16_t FIOSETL;
00239       __IO uint16_t FIOSETH;
00240     };
00241     struct {
00242       __IO uint8_t  FIOSET0;
00243       __IO uint8_t  FIOSET1;
00244       __IO uint8_t  FIOSET2;
00245       __IO uint8_t  FIOSET3;
00246     };
00247   };
00248   union {
00249     __O  uint32_t FIOCLR;
00250     struct {
00251       __O  uint16_t FIOCLRL;
00252       __O  uint16_t FIOCLRH;
00253     };
00254     struct {
00255       __O  uint8_t  FIOCLR0;
00256       __O  uint8_t  FIOCLR1;
00257       __O  uint8_t  FIOCLR2;
00258       __O  uint8_t  FIOCLR3;
00259     };
00260   };
00261 } LPC_GPIO_TypeDef;
00262
00264 typedef struct
00265 {
00266   __I  uint32_t IntStatus;
00267   __I  uint32_t IO0IntStatR;
00268   __I  uint32_t IO0IntStatF;
00269   __O  uint32_t IO0IntClr;
00270   __IO uint32_t IO0IntEnR;
00271   __IO uint32_t IO0IntEnF;
00272        uint32_t RESERVED0[3];
00273   __I  uint32_t IO2IntStatR;
00274   __I  uint32_t IO2IntStatF;
00275   __O  uint32_t IO2IntClr;
00276   __IO uint32_t IO2IntEnR;
00277   __IO uint32_t IO2IntEnF;
00278 } LPC_GPIOINT_TypeDef;
00279
00280 /*------------- Timer (TIM) --------------------------------------------------*/
00282 typedef struct
00283 {
00284   __IO uint32_t IR;
00285   __IO uint32_t TCR;
00286   __IO uint32_t TC;
00287   __IO uint32_t PR;
00288   __IO uint32_t PC;
00289   __IO uint32_t MCR;
00290   __IO uint32_t MR0;
00291   __IO uint32_t MR1;
00292   __IO uint32_t MR2;
00293   __IO uint32_t MR3;
00294   __IO uint32_t CCR;
00295   __I  uint32_t CR0;
00296   __I  uint32_t CR1;
00297        uint32_t RESERVED0[2];
00298   __IO uint32_t EMR;
00299        uint32_t RESERVED1[12];
00300   __IO uint32_t CTCR;
00301 } LPC_TIM_TypeDef;
00302
00303 /*------------- Pulse-Width Modulation (PWM) ---------------------------------*/
00305 typedef struct
00306 {
00307   __IO uint32_t IR;
00308   __IO uint32_t TCR;
00309   __IO uint32_t TC;
00310   __IO uint32_t PR;
00311   __IO uint32_t PC;
00312   __IO uint32_t MCR;
00313   __IO uint32_t MR0;
00314   __IO uint32_t MR1;
00315   __IO uint32_t MR2;
00316   __IO uint32_t MR3;
00317   __IO uint32_t CCR;
00318   __I  uint32_t CR0;
00319   __I  uint32_t CR1;
00320   __I  uint32_t CR2;
00321   __I  uint32_t CR3;
00322        uint32_t RESERVED0;
00323   __IO uint32_t MR4;
00324   __IO uint32_t MR5;
00325   __IO uint32_t MR6;
00326   __IO uint32_t PCR;
00327   __IO uint32_t LER;
00328        uint32_t RESERVED1[7];
00329   __IO uint32_t CTCR;
00330 } LPC_PWM_TypeDef;
00331
00332 /*------------- Universal Asynchronous Receiver Transmitter (UART) -----------*/
00334 typedef struct
00335 {
00336   union {
00337   __I  uint8_t  RBR;
00338   __O  uint8_t  THR;
00339   __IO uint8_t  DLL;
00340        uint32_t RESERVED0;
00341   };
00342   union {
00343   __IO uint8_t  DLM;
00344   __IO uint32_t IER;
00345   };
00346   union {
00347   __I  uint32_t IIR;
00348   __O  uint8_t  FCR;
00349   };
00350   __IO uint8_t  LCR;
00351        uint8_t  RESERVED1[7];
00352   __I  uint8_t  LSR;
00353        uint8_t  RESERVED2[7];
00354   __IO uint8_t  SCR;
00355        uint8_t  RESERVED3[3];
00356   __IO uint32_t ACR;
00357   __IO uint8_t  ICR;
00358        uint8_t  RESERVED4[3];
00359   __IO uint8_t  FDR;
00360        uint8_t  RESERVED5[7];
00361   __IO uint8_t  TER;
00362        uint8_t  RESERVED6[39];
00363   __I  uint8_t  FIFOLVL;
00364 } LPC_UART_TypeDef;
00365
00367 typedef struct
00368 {
00369   union {
00370   __I  uint8_t  RBR;
00371   __O  uint8_t  THR;
00372   __IO uint8_t  DLL;
00373        uint32_t RESERVED0;
00374   };
00375   union {
00376   __IO uint8_t  DLM;
00377   __IO uint32_t IER;
00378   };
00379   union {
00380   __I  uint32_t IIR;
00381   __O  uint8_t  FCR;
00382   };
00383   __IO uint8_t  LCR;
00384        uint8_t  RESERVED1[7];
00385   __I  uint8_t  LSR;
00386        uint8_t  RESERVED2[7];
00387   __IO uint8_t  SCR;
00388        uint8_t  RESERVED3[3];
00389   __IO uint32_t ACR;
00390   __IO uint8_t  ICR;
00391        uint8_t  RESERVED4[3];
00392   __IO uint8_t  FDR;
00393        uint8_t  RESERVED5[7];
00394   __IO uint8_t  TER;
00395        uint8_t  RESERVED6[39];
00396   __I  uint8_t  FIFOLVL;
00397 } LPC_UART0_TypeDef;
00398
00400 typedef struct
00401 {
00402   union {
00403   __I  uint8_t  RBR;
00404   __O  uint8_t  THR;
00405   __IO uint8_t  DLL;
00406        uint32_t RESERVED0;
00407   };
00408   union {
00409   __IO uint8_t  DLM;
00410   __IO uint32_t IER;
00411   };
00412   union {
00413   __I  uint32_t IIR;
00414   __O  uint8_t  FCR;
00415   };
00416   __IO uint8_t  LCR;
00417        uint8_t  RESERVED1[3];
00418   __IO uint8_t  MCR;
00419        uint8_t  RESERVED2[3];
00420   __I  uint8_t  LSR;
00421        uint8_t  RESERVED3[3];
00422   __I  uint8_t  MSR;
00423        uint8_t  RESERVED4[3];
00424   __IO uint8_t  SCR;
00425        uint8_t  RESERVED5[3];
00426   __IO uint32_t ACR;
00427        uint32_t RESERVED6;
00428   __IO uint32_t FDR;
00429        uint32_t RESERVED7;
00430   __IO uint8_t  TER;
00431        uint8_t  RESERVED8[27];
00432   __IO uint8_t  RS485CTRL;
00433        uint8_t  RESERVED9[3];
00434   __IO uint8_t  ADRMATCH;
00435        uint8_t  RESERVED10[3];
00436   __IO uint8_t  RS485DLY;
00437        uint8_t  RESERVED11[3];
00438   __I  uint8_t  FIFOLVL;
00439 } LPC_UART1_TypeDef;
00440
00441 /*------------- Serial Peripheral Interface (SPI) ----------------------------*/
00443 typedef struct
00444 {
00445   __IO uint32_t SPCR;
00446   __I  uint32_t SPSR;
00447   __IO uint32_t SPDR;
00448   __IO uint32_t SPCCR;
00449        uint32_t RESERVED0[3];
00450   __IO uint32_t SPINT;
00451 } LPC_SPI_TypeDef;
00452
00453 /*------------- Synchronous Serial Communication (SSP) -----------------------*/
00455 typedef struct
00456 {
00457   __IO uint32_t CR0;
00458   __IO uint32_t CR1;
00459   __IO uint32_t DR;
00460   __I  uint32_t SR;
00461   __IO uint32_t CPSR;
00462   __IO uint32_t IMSC;
00463   __IO uint32_t RIS;
00464   __IO uint32_t MIS;
00465   __IO uint32_t ICR;
00466   __IO uint32_t DMACR;
00467 } LPC_SSP_TypeDef;
00468
00469 /*------------- Inter-Integrated Circuit (I2C) -------------------------------*/
00471 typedef struct
00472 {
00473   __IO uint32_t I2CONSET;
00474   __I  uint32_t I2STAT;
00475   __IO uint32_t I2DAT;
00476   __IO uint32_t I2ADR0;
00477   __IO uint32_t I2SCLH;
00478   __IO uint32_t I2SCLL;
00479   __O  uint32_t I2CONCLR;
00480   __IO uint32_t MMCTRL;
00481   __IO uint32_t I2ADR1;
00482   __IO uint32_t I2ADR2;
00483   __IO uint32_t I2ADR3;
00484   __I  uint32_t I2DATA_BUFFER;
00485   __IO uint32_t I2MASK0;
00486   __IO uint32_t I2MASK1;
00487   __IO uint32_t I2MASK2;
00488   __IO uint32_t I2MASK3;
00489 } LPC_I2C_TypeDef;
00490
00491 /*------------- Inter IC Sound (I2S) -----------------------------------------*/
00493 typedef struct
00494 {
00495   __IO uint32_t I2SDAO;
00496   __IO uint32_t I2SDAI;
00497   __O  uint32_t I2STXFIFO;
00498   __I  uint32_t I2SRXFIFO;
00499   __I  uint32_t I2SSTATE;
00500   __IO uint32_t I2SDMA1;
00501   __IO uint32_t I2SDMA2;
00502   __IO uint32_t I2SIRQ;
00503   __IO uint32_t I2STXRATE;
00504   __IO uint32_t I2SRXRATE;
00505   __IO uint32_t I2STXBITRATE;
00506   __IO uint32_t I2SRXBITRATE;
00507   __IO uint32_t I2STXMODE;
00508   __IO uint32_t I2SRXMODE;
00509 } LPC_I2S_TypeDef;
00510
00511 /*------------- Repetitive Interrupt Timer (RIT) -----------------------------*/
00513 typedef struct
00514 {
00515   __IO uint32_t RICOMPVAL;
00516   __IO uint32_t RIMASK;
00517   __IO uint8_t  RICTRL;
00518        uint8_t  RESERVED0[3];
00519   __IO uint32_t RICOUNTER;
00520 } LPC_RIT_TypeDef;
00521
00522 /*------------- Real-Time Clock (RTC) ----------------------------------------*/
00524 typedef struct
00525 {
00526   __IO uint8_t  ILR;
00527        uint8_t  RESERVED0[7];
00528   __IO uint8_t  CCR;
00529        uint8_t  RESERVED1[3];
00530   __IO uint8_t  CIIR;
00531        uint8_t  RESERVED2[3];
00532   __IO uint8_t  AMR;
00533        uint8_t  RESERVED3[3];
00534   __I  uint32_t CTIME0;
00535   __I  uint32_t CTIME1;
00536   __I  uint32_t CTIME2;
00537   __IO uint8_t  SEC;
00538        uint8_t  RESERVED4[3];
00539   __IO uint8_t  MIN;
00540        uint8_t  RESERVED5[3];
00541   __IO uint8_t  HOUR;
00542        uint8_t  RESERVED6[3];
00543   __IO uint8_t  DOM;
00544        uint8_t  RESERVED7[3];
00545   __IO uint8_t  DOW;
00546        uint8_t  RESERVED8[3];
00547   __IO uint16_t DOY;
00548        uint16_t RESERVED9;
00549   __IO uint8_t  MONTH;
00550        uint8_t  RESERVED10[3];
00551   __IO uint16_t YEAR;
00552        uint16_t RESERVED11;
00553   __IO uint32_t CALIBRATION;
00554   __IO uint32_t GPREG0;
00555   __IO uint32_t GPREG1;
00556   __IO uint32_t GPREG2;
00557   __IO uint32_t GPREG3;
00558   __IO uint32_t GPREG4;
00559   __IO uint8_t  RTC_AUXEN;
00560        uint8_t  RESERVED12[3];
00561   __IO uint8_t  RTC_AUX;
00562        uint8_t  RESERVED13[3];
00563   __IO uint8_t  ALSEC;
00564        uint8_t  RESERVED14[3];
00565   __IO uint8_t  ALMIN;
00566        uint8_t  RESERVED15[3];
00567   __IO uint8_t  ALHOUR;
00568        uint8_t  RESERVED16[3];
00569   __IO uint8_t  ALDOM;
00570        uint8_t  RESERVED17[3];
00571   __IO uint8_t  ALDOW;
00572        uint8_t  RESERVED18[3];
00573   __IO uint16_t ALDOY;
00574        uint16_t RESERVED19;
00575   __IO uint8_t  ALMON;
00576        uint8_t  RESERVED20[3];
00577   __IO uint16_t ALYEAR;
00578        uint16_t RESERVED21;
00579 } LPC_RTC_TypeDef;
00580
00581 /*------------- Watchdog Timer (WDT) -----------------------------------------*/
00583 typedef struct
00584 {
00585   __IO uint8_t  WDMOD;
00586        uint8_t  RESERVED0[3];
00587   __IO uint32_t WDTC;
00588   __O  uint8_t  WDFEED;
00589        uint8_t  RESERVED1[3];
00590   __I  uint32_t WDTV;
00591   __IO uint32_t WDCLKSEL;
00592 } LPC_WDT_TypeDef;
00593
00594 /*------------- Analog-to-Digital Converter (ADC) ----------------------------*/
00596 typedef struct
00597 {
00598   __IO uint32_t ADCR;
00599   __IO uint32_t ADGDR;
00600        uint32_t RESERVED0;
00601   __IO uint32_t ADINTEN;
00602   __I  uint32_t ADDR0;
00603   __I  uint32_t ADDR1;
00604   __I  uint32_t ADDR2;
00605   __I  uint32_t ADDR3;
00606   __I  uint32_t ADDR4;
00607   __I  uint32_t ADDR5;
00608   __I  uint32_t ADDR6;
00609   __I  uint32_t ADDR7;
00610   __I  uint32_t ADSTAT;
00611   __IO uint32_t ADTRM;
00612 } LPC_ADC_TypeDef;
00613
00614 /*------------- Digital-to-Analog Converter (DAC) ----------------------------*/
00616 typedef struct
00617 {
00618   __IO uint32_t DACR;
00619   __IO uint32_t DACCTRL;
00620   __IO uint16_t DACCNTVAL;
00621 } LPC_DAC_TypeDef;
00622
00623 /*------------- Motor Control Pulse-Width Modulation (MCPWM) -----------------*/
00625 typedef struct
00626 {
00627   __I  uint32_t MCCON;
00628   __O  uint32_t MCCON_SET;
00629   __O  uint32_t MCCON_CLR;
00630   __I  uint32_t MCCAPCON;
00631   __O  uint32_t MCCAPCON_SET;
00632   __O  uint32_t MCCAPCON_CLR;
00633   __IO uint32_t MCTIM0;
00634   __IO uint32_t MCTIM1;
00635   __IO uint32_t MCTIM2;
00636   __IO uint32_t MCPER0;
00637   __IO uint32_t MCPER1;
00638   __IO uint32_t MCPER2;
00639   __IO uint32_t MCPW0;
00640   __IO uint32_t MCPW1;
00641   __IO uint32_t MCPW2;
00642   __IO uint32_t MCDEADTIME;
00643   __IO uint32_t MCCCP;
00644   __IO uint32_t MCCR0;
00645   __IO uint32_t MCCR1;
00646   __IO uint32_t MCCR2;
00647   __I  uint32_t MCINTEN;
00648   __O  uint32_t MCINTEN_SET;
00649   __O  uint32_t MCINTEN_CLR;
00650   __I  uint32_t MCCNTCON;
00651   __O  uint32_t MCCNTCON_SET;
00652   __O  uint32_t MCCNTCON_CLR;
00653   __I  uint32_t MCINTFLAG;
00654   __O  uint32_t MCINTFLAG_SET;
00655   __O  uint32_t MCINTFLAG_CLR;
00656   __O  uint32_t MCCAP_CLR;
00657 } LPC_MCPWM_TypeDef;
00658
00659 /*------------- Quadrature Encoder Interface (QEI) ---------------------------*/
00661 typedef struct
00662 {
00663   __O  uint32_t QEICON;
00664   __I  uint32_t QEISTAT;
00665   __IO uint32_t QEICONF;
00666   __I  uint32_t QEIPOS;
00667   __IO uint32_t QEIMAXPOS;
00668   __IO uint32_t CMPOS0;
00669   __IO uint32_t CMPOS1;
00670   __IO uint32_t CMPOS2;
00671   __I  uint32_t INXCNT;
00672   __IO uint32_t INXCMP;
00673   __IO uint32_t QEILOAD;
00674   __I  uint32_t QEITIME;
00675   __I  uint32_t QEIVEL;
00676   __I  uint32_t QEICAP;
00677   __IO uint32_t VELCOMP;
00678   __IO uint32_t FILTER;
00679        uint32_t RESERVED0[998];
00680   __O  uint32_t QEIIEC;
00681   __O  uint32_t QEIIES;
00682   __I  uint32_t QEIINTSTAT;
00683   __I  uint32_t QEIIE;
00684   __O  uint32_t QEICLR;
00685   __O  uint32_t QEISET;
00686 } LPC_QEI_TypeDef;
00687
00688 /*------------- Controller Area Network (CAN) --------------------------------*/
00690 typedef struct
00691 {
00692   __IO uint32_t mask[512];              /* ID Masks                           */
00693 } LPC_CANAF_RAM_TypeDef;
00694
00696 typedef struct                          /* Acceptance Filter Registers        */
00697 {
00698   __IO uint32_t AFMR;
00699   __IO uint32_t SFF_sa;
00700   __IO uint32_t SFF_GRP_sa;
00701   __IO uint32_t EFF_sa;
00702   __IO uint32_t EFF_GRP_sa;
00703   __IO uint32_t ENDofTable;
00704   __I  uint32_t LUTerrAd;
00705   __I  uint32_t LUTerr;
00706   __IO uint32_t FCANIE;
00707   __IO uint32_t FCANIC0;
00708   __IO uint32_t FCANIC1;
00709 } LPC_CANAF_TypeDef;
00710
00712 typedef struct                          /* Central Registers                  */
00713 {
00714   __I  uint32_t CANTxSR;
00715   __I  uint32_t CANRxSR;
00716   __I  uint32_t CANMSR;
00717 } LPC_CANCR_TypeDef;
00718
00720 typedef struct                          /* Controller Registers               */
00721 {
00722   __IO uint32_t MOD;
00723   __O  uint32_t CMR;
00724   __IO uint32_t GSR;
00725   __I  uint32_t ICR;
00726   __IO uint32_t IER;
00727   __IO uint32_t BTR;
00728   __IO uint32_t EWL;
00729   __I  uint32_t SR;
00730   __IO uint32_t RFS;
00731   __IO uint32_t RID;
00732   __IO uint32_t RDA;
00733   __IO uint32_t RDB;
00734   __IO uint32_t TFI1;
00735   __IO uint32_t TID1;
00736   __IO uint32_t TDA1;
00737   __IO uint32_t TDB1;
00738   __IO uint32_t TFI2;
00739   __IO uint32_t TID2;
00740   __IO uint32_t TDA2;
00741   __IO uint32_t TDB2;
00742   __IO uint32_t TFI3;
00743   __IO uint32_t TID3;
00744   __IO uint32_t TDA3;
00745   __IO uint32_t TDB3;
00746 } LPC_CAN_TypeDef;
00747
00748 /*------------- General Purpose Direct Memory Access (GPDMA) -----------------*/
00750 typedef struct                          /* Common Registers                   */
00751 {
00752   __I  uint32_t DMACIntStat;
00753   __I  uint32_t DMACIntTCStat;
00754   __O  uint32_t DMACIntTCClear;
00755   __I  uint32_t DMACIntErrStat;
00756   __O  uint32_t DMACIntErrClr;
00757   __I  uint32_t DMACRawIntTCStat;
00758   __I  uint32_t DMACRawIntErrStat;
00759   __I  uint32_t DMACEnbldChns;
00760   __IO uint32_t DMACSoftBReq;
00761   __IO uint32_t DMACSoftSReq;
00762   __IO uint32_t DMACSoftLBReq;
00763   __IO uint32_t DMACSoftLSReq;
00764   __IO uint32_t DMACConfig;
00765   __IO uint32_t DMACSync;
00766 } LPC_GPDMA_TypeDef;
00767
00769 typedef struct                          /* Channel Registers                  */
00770 {
00771   __IO uint32_t DMACCSrcAddr;
00772   __IO uint32_t DMACCDestAddr;
00773   __IO uint32_t DMACCLLI;
00774   __IO uint32_t DMACCControl;
00775   __IO uint32_t DMACCConfig;
00776 } LPC_GPDMACH_TypeDef;
00777
00778 /*------------- Universal Serial Bus (USB) -----------------------------------*/
00780 typedef struct
00781 {
00782   __I  uint32_t HcRevision;             /* USB Host Registers                 */
00783   __IO uint32_t HcControl;
00784   __IO uint32_t HcCommandStatus;
00785   __IO uint32_t HcInterruptStatus;
00786   __IO uint32_t HcInterruptEnable;
00787   __IO uint32_t HcInterruptDisable;
00788   __IO uint32_t HcHCCA;
00789   __I  uint32_t HcPeriodCurrentED;
00790   __IO uint32_t HcControlHeadED;
00791   __IO uint32_t HcControlCurrentED;
00792   __IO uint32_t HcBulkHeadED;
00793   __IO uint32_t HcBulkCurrentED;
00794   __I  uint32_t HcDoneHead;
00795   __IO uint32_t HcFmInterval;
00796   __I  uint32_t HcFmRemaining;
00797   __I  uint32_t HcFmNumber;
00798   __IO uint32_t HcPeriodicStart;
00799   __IO uint32_t HcLSTreshold;
00800   __IO uint32_t HcRhDescriptorA;
00801   __IO uint32_t HcRhDescriptorB;
00802   __IO uint32_t HcRhStatus;
00803   __IO uint32_t HcRhPortStatus1;
00804   __IO uint32_t HcRhPortStatus2;
00805        uint32_t RESERVED0[40];
00806   __I  uint32_t Module_ID;
00807
00808   __I  uint32_t OTGIntSt;               /* USB On-The-Go Registers            */
00809   __IO uint32_t OTGIntEn;
00810   __O  uint32_t OTGIntSet;
00811   __O  uint32_t OTGIntClr;
00812   __IO uint32_t OTGStCtrl;
00813   __IO uint32_t OTGTmr;
00814        uint32_t RESERVED1[58];
00815
00816   __I  uint32_t USBDevIntSt;            /* USB Device Interrupt Registers     */
00817   __IO uint32_t USBDevIntEn;
00818   __O  uint32_t USBDevIntClr;
00819   __O  uint32_t USBDevIntSet;
00820
00821   __O  uint32_t USBCmdCode;             /* USB Device SIE Command Registers   */
00822   __I  uint32_t USBCmdData;
00823
00824   __I  uint32_t USBRxData;              /* USB Device Transfer Registers      */
00825   __O  uint32_t USBTxData;
00826   __I  uint32_t USBRxPLen;
00827   __O  uint32_t USBTxPLen;
00828   __IO uint32_t USBCtrl;
00829   __O  uint32_t USBDevIntPri;
00830
00831   __I  uint32_t USBEpIntSt;             /* USB Device Endpoint Interrupt Regs */
00832   __IO uint32_t USBEpIntEn;
00833   __O  uint32_t USBEpIntClr;
00834   __O  uint32_t USBEpIntSet;
00835   __O  uint32_t USBEpIntPri;
00836
00837   __IO uint32_t USBReEp;                /* USB Device Endpoint Realization Reg*/
00838   __O  uint32_t USBEpInd;
00839   __IO uint32_t USBMaxPSize;
00840
00841   __I  uint32_t USBDMARSt;              /* USB Device DMA Registers           */
00842   __O  uint32_t USBDMARClr;
00843   __O  uint32_t USBDMARSet;
00844        uint32_t RESERVED2[9];
00845   __IO uint32_t USBUDCAH;
00846   __I  uint32_t USBEpDMASt;
00847   __O  uint32_t USBEpDMAEn;
00848   __O  uint32_t USBEpDMADis;
00849   __I  uint32_t USBDMAIntSt;
00850   __IO uint32_t USBDMAIntEn;
00851        uint32_t RESERVED3[2];
00852   __I  uint32_t USBEoTIntSt;
00853   __O  uint32_t USBEoTIntClr;
00854   __O  uint32_t USBEoTIntSet;
00855   __I  uint32_t USBNDDRIntSt;
00856   __O  uint32_t USBNDDRIntClr;
00857   __O  uint32_t USBNDDRIntSet;
00858   __I  uint32_t USBSysErrIntSt;
00859   __O  uint32_t USBSysErrIntClr;
00860   __O  uint32_t USBSysErrIntSet;
00861        uint32_t RESERVED4[15];
00862
00863   union {
00864   __I  uint32_t I2C_RX;                 /* USB OTG I2C Registers              */
00865   __O  uint32_t I2C_TX;
00866   };
00867   __I  uint32_t I2C_STS;
00868   __IO uint32_t I2C_CTL;
00869   __IO uint32_t I2C_CLKHI;
00870   __O  uint32_t I2C_CLKLO;
00871        uint32_t RESERVED5[824];
00872
00873   union {
00874   __IO uint32_t USBClkCtrl;             /* USB Clock Control Registers        */
00875   __IO uint32_t OTGClkCtrl;
00876   };
00877   union {
00878   __I  uint32_t USBClkSt;
00879   __I  uint32_t OTGClkSt;
00880   };
00881 } LPC_USB_TypeDef;
00882
00883 /*------------- Ethernet Media Access Controller (EMAC) ----------------------*/
00885 typedef struct
00886 {
00887   __IO uint32_t MAC1;                   /* MAC Registers                      */
00888   __IO uint32_t MAC2;
00889   __IO uint32_t IPGT;
00890   __IO uint32_t IPGR;
00891   __IO uint32_t CLRT;
00892   __IO uint32_t MAXF;
00893   __IO uint32_t SUPP;
00894   __IO uint32_t TEST;
00895   __IO uint32_t MCFG;
00896   __IO uint32_t MCMD;
00897   __IO uint32_t MADR;
00898   __O  uint32_t MWTD;
00899   __I  uint32_t MRDD;
00900   __I  uint32_t MIND;
00901        uint32_t RESERVED0[2];
00902   __IO uint32_t SA0;
00903   __IO uint32_t SA1;
00904   __IO uint32_t SA2;
00905        uint32_t RESERVED1[45];
00906   __IO uint32_t Command;                /* Control Registers                  */
00907   __I  uint32_t Status;
00908   __IO uint32_t RxDescriptor;
00909   __IO uint32_t RxStatus;
00910   __IO uint32_t RxDescriptorNumber;
00911   __I  uint32_t RxProduceIndex;
00912   __IO uint32_t RxConsumeIndex;
00913   __IO uint32_t TxDescriptor;
00914   __IO uint32_t TxStatus;
00915   __IO uint32_t TxDescriptorNumber;
00916   __IO uint32_t TxProduceIndex;
00917   __I  uint32_t TxConsumeIndex;
00918        uint32_t RESERVED2[10];
00919   __I  uint32_t TSV0;
00920   __I  uint32_t TSV1;
00921   __I  uint32_t RSV;
00922        uint32_t RESERVED3[3];
00923   __IO uint32_t FlowControlCounter;
00924   __I  uint32_t FlowControlStatus;
00925        uint32_t RESERVED4[34];
00926   __IO uint32_t RxFilterCtrl;           /* Rx Filter Registers                */
00927   __IO uint32_t RxFilterWoLStatus;
00928   __IO uint32_t RxFilterWoLClear;
00929        uint32_t RESERVED5;
00930   __IO uint32_t HashFilterL;
00931   __IO uint32_t HashFilterH;
00932        uint32_t RESERVED6[882];
00933   __I  uint32_t IntStatus;              /* Module Control Registers           */
00934   __IO uint32_t IntEnable;
00935   __O  uint32_t IntClear;
00936   __O  uint32_t IntSet;
00937        uint32_t RESERVED7;
00938   __IO uint32_t PowerDown;
00939        uint32_t RESERVED8;
00940   __IO uint32_t Module_ID;
00941 } LPC_EMAC_TypeDef;
00942
00943
00944 #if defined ( __CC_ARM   )
00945 #pragma no_anon_unions
00946 #endif
00947
00948
00949 /******************************************************************************/
00950 /*                         Peripheral memory map                              */
00951 /******************************************************************************/
00952 /* Base addresses                                                             */
00953 #define LPC_FLASH_BASE        (0x00000000UL)
00954 #define LPC_RAM_BASE          (0x10000000UL)
00955 #ifdef __LPC17XX_REV00
00956 #define LPC_AHBRAM0_BASE      (0x20000000UL)
00957 #define LPC_AHBRAM1_BASE      (0x20004000UL)
00958 #else
00959 #define LPC_AHBRAM0_BASE      (0x2007C000UL)
00960 #define LPC_AHBRAM1_BASE      (0x20080000UL)
00961 #endif
00962 #define LPC_GPIO_BASE         (0x2009C000UL)
00963 #define LPC_APB0_BASE         (0x40000000UL)
00964 #define LPC_APB1_BASE         (0x40080000UL)
00965 #define LPC_AHB_BASE          (0x50000000UL)
00966 #define LPC_CM3_BASE          (0xE0000000UL)
00967
00968 /* APB0 peripherals                                                           */
00969 #define LPC_WDT_BASE          (LPC_APB0_BASE + 0x00000)
00970 #define LPC_TIM0_BASE         (LPC_APB0_BASE + 0x04000)
00971 #define LPC_TIM1_BASE         (LPC_APB0_BASE + 0x08000)
00972 #define LPC_UART0_BASE        (LPC_APB0_BASE + 0x0C000)
00973 #define LPC_UART1_BASE        (LPC_APB0_BASE + 0x10000)
00974 #define LPC_PWM1_BASE         (LPC_APB0_BASE + 0x18000)
00975 #define LPC_I2C0_BASE         (LPC_APB0_BASE + 0x1C000)
00976 #define LPC_SPI_BASE          (LPC_APB0_BASE + 0x20000)
00977 #define LPC_RTC_BASE          (LPC_APB0_BASE + 0x24000)
00978 #define LPC_GPIOINT_BASE      (LPC_APB0_BASE + 0x28080)
00979 #define LPC_PINCON_BASE       (LPC_APB0_BASE + 0x2C000)
00980 #define LPC_SSP1_BASE         (LPC_APB0_BASE + 0x30000)
00981 #define LPC_ADC_BASE          (LPC_APB0_BASE + 0x34000)
00982 #define LPC_CANAF_RAM_BASE    (LPC_APB0_BASE + 0x38000)
00983 #define LPC_CANAF_BASE        (LPC_APB0_BASE + 0x3C000)
00984 #define LPC_CANCR_BASE        (LPC_APB0_BASE + 0x40000)
00985 #define LPC_CAN1_BASE         (LPC_APB0_BASE + 0x44000)
00986 #define LPC_CAN2_BASE         (LPC_APB0_BASE + 0x48000)
00987 #define LPC_I2C1_BASE         (LPC_APB0_BASE + 0x5C000)
00988
00989 /* APB1 peripherals                                                           */
00990 #define LPC_SSP0_BASE         (LPC_APB1_BASE + 0x08000)
00991 #define LPC_DAC_BASE          (LPC_APB1_BASE + 0x0C000)
00992 #define LPC_TIM2_BASE         (LPC_APB1_BASE + 0x10000)
00993 #define LPC_TIM3_BASE         (LPC_APB1_BASE + 0x14000)
00994 #define LPC_UART2_BASE        (LPC_APB1_BASE + 0x18000)
00995 #define LPC_UART3_BASE        (LPC_APB1_BASE + 0x1C000)
00996 #define LPC_I2C2_BASE         (LPC_APB1_BASE + 0x20000)
00997 #define LPC_I2S_BASE          (LPC_APB1_BASE + 0x28000)
00998 #define LPC_RIT_BASE          (LPC_APB1_BASE + 0x30000)
00999 #define LPC_MCPWM_BASE        (LPC_APB1_BASE + 0x38000)
01000 #define LPC_QEI_BASE          (LPC_APB1_BASE + 0x3C000)
01001 #define LPC_SC_BASE           (LPC_APB1_BASE + 0x7C000)
01002
01003 /* AHB peripherals                                                            */
01004 #define LPC_EMAC_BASE         (LPC_AHB_BASE  + 0x00000)
01005 #define LPC_GPDMA_BASE        (LPC_AHB_BASE  + 0x04000)
01006 #define LPC_GPDMACH0_BASE     (LPC_AHB_BASE  + 0x04100)
01007 #define LPC_GPDMACH1_BASE     (LPC_AHB_BASE  + 0x04120)
01008 #define LPC_GPDMACH2_BASE     (LPC_AHB_BASE  + 0x04140)
01009 #define LPC_GPDMACH3_BASE     (LPC_AHB_BASE  + 0x04160)
01010 #define LPC_GPDMACH4_BASE     (LPC_AHB_BASE  + 0x04180)
01011 #define LPC_GPDMACH5_BASE     (LPC_AHB_BASE  + 0x041A0)
01012 #define LPC_GPDMACH6_BASE     (LPC_AHB_BASE  + 0x041C0)
01013 #define LPC_GPDMACH7_BASE     (LPC_AHB_BASE  + 0x041E0)
01014 #define LPC_USB_BASE          (LPC_AHB_BASE  + 0x0C000)
01015
01016 /* GPIOs                                                                      */
01017 #define LPC_GPIO0_BASE        (LPC_GPIO_BASE + 0x00000)
01018 #define LPC_GPIO1_BASE        (LPC_GPIO_BASE + 0x00020)
01019 #define LPC_GPIO2_BASE        (LPC_GPIO_BASE + 0x00040)
01020 #define LPC_GPIO3_BASE        (LPC_GPIO_BASE + 0x00060)
01021 #define LPC_GPIO4_BASE        (LPC_GPIO_BASE + 0x00080)
01022
01023 /******************************************************************************/
01024 /*                         Peripheral declaration                             */
01025 /******************************************************************************/
01026 #define LPC_SC                ((LPC_SC_TypeDef        *) LPC_SC_BASE       )
01027 #define LPC_GPIO0             ((LPC_GPIO_TypeDef      *) LPC_GPIO0_BASE    )
01028 #define LPC_GPIO1             ((LPC_GPIO_TypeDef      *) LPC_GPIO1_BASE    )
01029 #define LPC_GPIO2             ((LPC_GPIO_TypeDef      *) LPC_GPIO2_BASE    )
01030 #define LPC_GPIO3             ((LPC_GPIO_TypeDef      *) LPC_GPIO3_BASE    )
01031 #define LPC_GPIO4             ((LPC_GPIO_TypeDef      *) LPC_GPIO4_BASE    )
01032 #define LPC_WDT               ((LPC_WDT_TypeDef       *) LPC_WDT_BASE      )
01033 #define LPC_TIM0              ((LPC_TIM_TypeDef       *) LPC_TIM0_BASE     )
01034 #define LPC_TIM1              ((LPC_TIM_TypeDef       *) LPC_TIM1_BASE     )
01035 #define LPC_TIM2              ((LPC_TIM_TypeDef       *) LPC_TIM2_BASE     )
01036 #define LPC_TIM3              ((LPC_TIM_TypeDef       *) LPC_TIM3_BASE     )
01037 #define LPC_RIT               ((LPC_RIT_TypeDef       *) LPC_RIT_BASE      )
01038 #define LPC_UART0             ((LPC_UART_TypeDef      *) LPC_UART0_BASE    )
01039 #define LPC_UART1             ((LPC_UART1_TypeDef     *) LPC_UART1_BASE    )
01040 #define LPC_UART2             ((LPC_UART_TypeDef      *) LPC_UART2_BASE    )
01041 #define LPC_UART3             ((LPC_UART_TypeDef      *) LPC_UART3_BASE    )
01042 #define LPC_PWM1              ((LPC_PWM_TypeDef       *) LPC_PWM1_BASE     )
01043 #define LPC_I2C0              ((LPC_I2C_TypeDef       *) LPC_I2C0_BASE     )
01044 #define LPC_I2C1              ((LPC_I2C_TypeDef       *) LPC_I2C1_BASE     )
01045 #define LPC_I2C2              ((LPC_I2C_TypeDef       *) LPC_I2C2_BASE     )
01046 #define LPC_I2S               ((LPC_I2S_TypeDef       *) LPC_I2S_BASE      )
01047 #define LPC_SPI               ((LPC_SPI_TypeDef       *) LPC_SPI_BASE      )
01048 #define LPC_RTC               ((LPC_RTC_TypeDef       *) LPC_RTC_BASE      )
01049 #define LPC_GPIOINT           ((LPC_GPIOINT_TypeDef   *) LPC_GPIOINT_BASE  )
01050 #define LPC_PINCON            ((LPC_PINCON_TypeDef    *) LPC_PINCON_BASE   )
01051 #define LPC_SSP0              ((LPC_SSP_TypeDef       *) LPC_SSP0_BASE     )
01052 #define LPC_SSP1              ((LPC_SSP_TypeDef       *) LPC_SSP1_BASE     )
01053 #define LPC_ADC               ((LPC_ADC_TypeDef       *) LPC_ADC_BASE      )
01054 #define LPC_DAC               ((LPC_DAC_TypeDef       *) LPC_DAC_BASE      )
01055 #define LPC_CANAF_RAM         ((LPC_CANAF_RAM_TypeDef *) LPC_CANAF_RAM_BASE)
01056 #define LPC_CANAF             ((LPC_CANAF_TypeDef     *) LPC_CANAF_BASE    )
01057 #define LPC_CANCR             ((LPC_CANCR_TypeDef     *) LPC_CANCR_BASE    )
01058 #define LPC_CAN1              ((LPC_CAN_TypeDef       *) LPC_CAN1_BASE     )
01059 #define LPC_CAN2              ((LPC_CAN_TypeDef       *) LPC_CAN2_BASE     )
01060 #define LPC_MCPWM             ((LPC_MCPWM_TypeDef     *) LPC_MCPWM_BASE    )
01061 #define LPC_QEI               ((LPC_QEI_TypeDef       *) LPC_QEI_BASE      )
01062 #define LPC_EMAC              ((LPC_EMAC_TypeDef      *) LPC_EMAC_BASE     )
01063 #define LPC_GPDMA             ((LPC_GPDMA_TypeDef     *) LPC_GPDMA_BASE    )
01064 #define DMAREQSEL             (*(__IO uint32_t *)  ( 0x4000C1C4))
01065 #define LPC_GPDMACH0          ((LPC_GPDMACH_TypeDef   *) LPC_GPDMACH0_BASE )
01066 #define LPC_GPDMACH1          ((LPC_GPDMACH_TypeDef   *) LPC_GPDMACH1_BASE )
01067 #define LPC_GPDMACH2          ((LPC_GPDMACH_TypeDef   *) LPC_GPDMACH2_BASE )
01068 #define LPC_GPDMACH3          ((LPC_GPDMACH_TypeDef   *) LPC_GPDMACH3_BASE )
01069 #define LPC_GPDMACH4          ((LPC_GPDMACH_TypeDef   *) LPC_GPDMACH4_BASE )
01070 #define LPC_GPDMACH5          ((LPC_GPDMACH_TypeDef   *) LPC_GPDMACH5_BASE )
01071 #define LPC_GPDMACH6          ((LPC_GPDMACH_TypeDef   *) LPC_GPDMACH6_BASE )
01072 #define LPC_GPDMACH7          ((LPC_GPDMACH_TypeDef   *) LPC_GPDMACH7_BASE )
01073 #define LPC_USB               ((LPC_USB_TypeDef       *) LPC_USB_BASE      )
01074
01079 #endif  // __LPC17xx_H__
Generated on Tue Jun 7 14:58:55 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/GPIO/LedBlinky/LedBlinky.c Source File

C:/nxpdrv/LPC1700CMSIS/Examples/GPIO/LedBlinky/LedBlinky.c

Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          LedBlinky.c                             2010-05-21
00003 */
00025 #include "lpc17xx_gpio.h"
00026 #include "lpc17xx_libcfg.h"
00027
00028 /* Example group ----------------------------------------------------------- */
00035 /************************** PRIVATE DEFINITIONS *************************/
00036 #define MCB_LPC_1768
00037 //#define IAR_LPC_1768
00038
00039 #ifdef MCB_LPC_1768
00040  /* Number of user LEDs */
00041 #define LED_NUM     8
00042 const unsigned long led_mask[] = { 1<<28, 1<<29, 1UL<<31, 1<<2, 1<<3, 1<<4, 1<<5, 1<<6 };
00043 #endif
00044
00045 /************************** PRIVATE VARIABLES *************************/
00046 /* SysTick Counter */
00047 volatile unsigned long SysTickCnt;
00048
00049 /************************** PRIVATE FUNCTIONS *************************/
00050 void SysTick_Handler (void);
00051
00052 void Delay (unsigned long tick);
00053
00054 /*----------------- INTERRUPT SERVICE ROUTINES --------------------------*/
00055 /*********************************************************************/
00060 void SysTick_Handler (void) {
00061   SysTickCnt++;
00062 }
00063
00064 /*-------------------------PRIVATE FUNCTIONS------------------------------*/
00065 /*********************************************************************/
00070 void Delay (unsigned long tick) {
00071   unsigned long systickcnt;
00072
00073   systickcnt = SysTickCnt;
00074   while ((SysTickCnt - systickcnt) < tick);
00075 }
00076
00077 /*-------------------------MAIN FUNCTION------------------------------*/
00078 /*********************************************************************/
00083 int c_entry (void) {                       /* Main Program                       */
00084   int num = -1;
00085   int dir =  1;
00086
00087   SysTick_Config(SystemCoreClock/1000 - 1); /* Generate interrupt each 1 ms   */
00088
00089 #ifdef MCB_LPC_1768
00090   GPIO_SetDir(1, 0xB0000000, 1);           /* LEDs on PORT1 defined as Output    */
00091   GPIO_SetDir(2, 0x0000007C, 1);           /* LEDs on PORT2 defined as Output    */
00092
00093   GPIO_ClearValue(1, 0xB0000000);
00094   GPIO_ClearValue(2, 0x0000007C);
00095 #elif defined(IAR_LPC_1768)
00096   GPIO_SetDir(1, (1<<25), 1);
00097   GPIO_ClearValue(1, (1<<25));
00098 #endif
00099
00100
00101   for (;;) {                            /* Loop forever                       */
00102 #ifdef MCB_LPC_1768
00103     /* Calculate 'num': 0,1,...,LED_NUM-1,LED_NUM-1,...,1,0,0,...             */
00104     num += dir;
00105     if (num == LED_NUM) { dir = -1; num =  LED_NUM-1; }
00106     else if   (num < 0) { dir =  1; num =  0;         }
00107
00108     if (num < 3){
00109         GPIO_SetValue(1, led_mask[num]);
00110         Delay(500);                         /* Delay 500ms                        */
00111         GPIO_ClearValue(1, led_mask[num]);
00112         Delay(500);                         /* Delay 500ms                        */
00113     }
00114     else {
00115         GPIO_SetValue(2, led_mask[num]);
00116         Delay(500);                         /* Delay 500ms                        */
00117         GPIO_ClearValue(2, led_mask[num]);
00118         Delay(500);                         /* Delay 500ms                        */
00119     }
00120 #elif defined(IAR_LPC_1768)
00121   GPIO_SetValue(1,(1<<25));
00122   Delay(500);
00123   GPIO_ClearValue(1,(1<<25));
00124   Delay(500);
00125 #endif
00126   }
00127
00128 }
00129
00130
00131 /* With ARM and GHS toolsets, the entry point is main() - this will
00132    allow the linker to generate wrapper code to setup stacks, allocate
00133    heap area, and initialize and copy code and data segments. For GNU
00134    toolsets, the entry point is through __start() in the crt0_gnu.asm
00135    file, and that startup code will setup stacks and data */
00136 int main(void)
00137 {
00138     return c_entry();
00139 }
00140
00141 #ifdef  DEBUG
00142 /*******************************************************************************
00143 * @brief                Reports the name of the source file and the source line number
00144 *                               where the CHECK_PARAM error has occurred.
00145 * @param[in]    file Pointer to the source file name
00146 * @param[in]    line assert_param error line source number
00147 * @return               None
00148 *******************************************************************************/
00149 void check_failed(uint8_t *file, uint32_t line)
00150 {
00151         /* User can add his own implementation to report the file name and line number,
00152          ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
00153
00154         /* Infinite loop */
00155         while(1);
00156 }
00157 #endif
00158
00159 /*
00160  * @}
00161  */
Generated on Tue Jun 7 14:59:01 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/MCPWM/MCPWMSimple/lpc17xx_libcfg.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/MCPWM/MCPWMSimple/lpc17xx_libcfg.h

Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          lpc17xx_libcfg.h                        2010-05-21
00003 */
00026 #ifndef LPC17XX_LIBCFG_H_
00027 #define LPC17XX_LIBCFG_H_
00028
00029 #include "lpc_types.h"
00030
00031
00032 /************************** DEBUG MODE DEFINITIONS *********************************/
00033
00034 /* Un-comment the line below to compile the library in DEBUG mode, this will expanse
00035    the "CHECK_PARAM" macro in the FW library code */
00036
00037 #define DEBUG
00038
00039
00040 /******************* PERIPHERAL FW LIBRARY CONFIGURATION DEFINITIONS ***********************/
00041
00042 /* Comment the line below to disable the specific peripheral inclusion */
00043
00044 /* DEBUG_FRAMWORK ------------------------------ */
00045 #define _DBGFWK
00046
00047 /* GPIO ------------------------------- */
00048 //#define _GPIO
00049
00050 /* EXTI ------------------------------- */
00051 //#define _EXTI
00052
00053 /* UART ------------------------------- */
00054 #define _UART
00055 #define _UART0
00056 //#define _UART1
00057 //#define _UART2
00058 //#define _UART3
00059
00060 /* SPI ------------------------------- */
00061 //#define _SPI
00062
00063 /* SSP ------------------------------- */
00064 //#define _SSP
00065 //#define _SSP0
00066 //#define _SSP1
00067
00068 /* SYSTICK --------------------------- */
00069 //#define _SYSTICK
00070
00071 /* I2C ------------------------------- */
00072 //#define _I2C
00073 //#define _I2C0
00074 //#define _I2C1
00075 //#define _I2C2
00076
00077 /* TIMER ------------------------------- */
00078 //#define _TIM
00079
00080 /* WDT ------------------------------- */
00081 //#define _WDT
00082
00083
00084 /* GPDMA ------------------------------- */
00085 //#define _GPDMA
00086
00087
00088 /* DAC ------------------------------- */
00089 //#define _DAC
00090
00091 /* DAC ------------------------------- */
00092 //#define _ADC
00093
00094
00095 /* PWM ------------------------------- */
00096 //#define _PWM
00097 //#define _PWM1
00098
00099 /* RTC ------------------------------- */
00100 //#define _RTC
00101
00102 /* I2S ------------------------------- */
00103 //#define _I2S
00104
00105 /* USB device ------------------------------- */
00106 //#define _USBDEV
00107 //#define _USB_DMA
00108
00109 /* QEI ------------------------------- */
00110 //#define _QEI
00111
00112 /* MCPWM ------------------------------- */
00113 #define _MCPWM
00114
00115 /* CAN--------------------------------*/
00116 //#define _CAN
00117
00118 /* RIT ------------------------------- */
00119 //#define _RIT
00120
00121 /* EMAC ------------------------------ */
00122 //#define _EMAC
00123
00124 /******************* PERIPHERAL FW LIBRARY CONFIGURATION DEFINITIONS ***********************/
00125
00126 /* Comment the line below to disable the specific peripheral inclusion */
00127
00128 /* UART ------------------------------- */
00129 #define _UART
00130 #define _UART0
00131
00132 /* SPI ------------------------------- */
00133 //#define _SPI
00134
00135 /* SSP ------------------------------- */
00136 //#define _SSP
00137 //#define _SSP0
00138 //#define _SSP1
00139
00140
00141 /* I2C ------------------------------- */
00142 //#define _I2C
00143 //#define _I2C0
00144 //#define _I2C1
00145 //#define _I2C2
00146
00147 /* TIMER ------------------------------- */
00148 #define _TIM
00149
00150 /* WDT ------------------------------- */
00151 //#define _WDT
00152
00153
00154 /* GPDMA ------------------------------- */
00155 //#define _GPDMA
00156
00157
00158 /* DAC ------------------------------- */
00159 //#define _DAC
00160
00161 /* DAC ------------------------------- */
00162 //#define _ADC
00163
00164
00165 /* PWM ------------------------------- */
00166 //#define _PWM
00167 //#define _PWM1
00168
00169 /* RTC ------------------------------- */
00170 //#define _RTC
00171
00172 /* I2S ------------------------------- */
00173 //#define _I2S
00174
00175 /* USB device ------------------------------- */
00176 //#define _USBDEV
00177 //#define _USB_DMA
00178
00179 /* QEI ------------------------------- */
00180 #define _QEI
00181
00182 /* MCPWM ------------------------------- */
00183 #define _MCPWM
00184
00185
00186 /************************** GLOBAL/PUBLIC MACRO DEFINITIONS *********************************/
00187
00188 #ifdef  DEBUG
00189 /*******************************************************************************
00190 * @brief                The CHECK_PARAM macro is used for function's parameters check.
00191 *                               It is used only if the library is compiled in DEBUG mode.
00192 * @param[in]    expr - If expr is false, it calls check_failed() function
00193 *                       which reports the name of the source file and the source
00194 *                       line number of the call that failed.
00195 *                    - If expr is true, it returns no value.
00196 * @return               None
00197 *******************************************************************************/
00198 #define CHECK_PARAM(expr) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))
00199 #else
00200 #define CHECK_PARAM(expr)
00201 #endif /* DEBUG */
00202
00203
00204
00205 /************************** GLOBAL/PUBLIC FUNCTION DECLARATION *********************************/
00206
00207 #ifdef  DEBUG
00208 void check_failed(uint8_t *file, uint32_t line);
00209 #endif
00210
00211
00212 #endif /* LPC17XX_LIBCFG_H_ */
Generated on Tue Jun 7 14:58:57 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/LCD/NOKIA6610_LCD/lcdtest.c Source File

C:/nxpdrv/LPC1700CMSIS/Examples/LCD/NOKIA6610_LCD/lcdtest.c

Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          lcdtest.c                               2010-06-18
00003 */
00025 #include "drv_glcd.h"
00026 #include "glcd_ll.h"
00027 #include "lpc17xx_nvic.h"
00028 #include "core_cm3.h"
00029 #include "lpc17xx_clkpwr.h"
00030 #include "lpc17xx_libcfg.h"
00031 #include "NXP_logo.h"
00032 #include "lpc17xx_timer.h"
00033 #include "lpc17xx_adc.h"
00034 #include "lpc17xx_pinsel.h"
00035 #include "lpc17xx_gpio.h"
00036
00037 /* Example group ----------------------------------------------------------- */
00043 /************************** PRIVATE DEFINITIONS *************************/
00044 #define TIMER0_TICK_PER_SEC   20
00045
00046 /************************** PUBLIC DEFINITIONS *************************/
00047 extern FontType_t Terminal_6_8_6;
00048 extern FontType_t Terminal_9_12_6;
00049 extern FontType_t Terminal_18_24_12;
00050
00051 /************************** PRIVATE DEFINITIONS *************************/
00052 volatile Bool CntrSel = FALSE;
00053
00054 /*variable for clitical section entry control*/
00055 uint32_t CriticalSecCntr;
00056
00057 /************************** PRIVATE FUNCTIONS *************************/
00058 /* Interrupt service routine */
00059 void TIMER0_IRQHandler (void);
00060
00061 void Dly100us(void *arg);
00062
00063
00064 /*----------------- INTERRUPT SERVICE ROUTINES --------------------------*/
00065 /*********************************************************************/
00070 void TIMER0_IRQHandler (void)
00071 {
00072         //check BUT1
00073         if(!(GPIO_ReadValue(0)&(1<<23)))
00074         {
00075                 CntrSel = FALSE;
00076         }
00077         //Check BUT2
00078         else if (!(GPIO_ReadValue(2)&(1<<13)))
00079         {
00080                 CntrSel = TRUE;
00081         }
00082   // clear interrupt
00083         TIM_ClearIntPending(LPC_TIM0, TIM_MR0_INT);
00084         NVIC_ClearPendingIRQ(TIMER0_IRQn);
00085 }
00086 /*-------------------------PRIVATE FUNCTIONS------------------------------*/
00087 /*********************************************************************/
00092 void Dly100us(void *arg)
00093 {
00094         volatile uint32_t Dly = (uint32_t)arg, Dly100;
00095         for(;Dly;Dly--)
00096     for(Dly100 = 500; Dly100; Dly100--);
00097 }
00098
00099 /*-------------------------MAIN FUNCTION------------------------------*/
00100 /*********************************************************************/
00105 int c_entry(void)
00106 {
00107         Bool SelHold;
00108         uint32_t AdcData, timer_tick;
00109         PINSEL_CFG_Type PinCfg;
00110         TIM_TIMERCFG_Type TimerCfg;
00111         TIM_MATCHCFG_Type MatchCfg;
00112
00113         // But 0,1 init
00114         GPIO_SetDir(0, (1<<23), 0); //Setting BUT0 (P0.23) as input
00115         GPIO_SetDir(2, (1<<13), 0); //Setting BUT1 (P2.13) as input
00116
00117         /* ADC Pin select
00118          * P1.31 as AD0.5
00119          */
00120         PinCfg.Funcnum = 3;
00121         PinCfg.OpenDrain = 0;
00122         PinCfg.Pinmode = 2; //Pin has neither pull-up nor pull-down
00123         PinCfg.Pinnum = 31;
00124         PinCfg.Portnum = 1;
00125         PINSEL_ConfigPin(&PinCfg);
00126
00127         // Enable ADC clock
00128         CLKPWR_ConfigPPWR (CLKPWR_PCONP_PCAD, ENABLE);
00129
00130         /* Initialize ADC peripheral */
00131         ADC_Init(LPC_ADC, 100000);
00132
00133         /* Enable ADC channel 5 */
00134         ADC_ChannelCmd (LPC_ADC, 5, ENABLE);
00135
00136         /* Start ADC */
00137         ADC_StartCmd(LPC_ADC, ADC_START_NOW);
00138
00139         /* Initialize TIMER0
00140          * Timer channel: TIMER0
00141          * Timer mode: every rising PCLK edge
00142          * Prescale option: TICKVAL
00143          * Prescale value = 0
00144          */
00145         TimerCfg.PrescaleOption = TIM_PRESCALE_TICKVAL;
00146         TimerCfg.PrescaleValue = 0;
00147         TIM_Init(LPC_TIM0, TIM_COUNTER_RISING_MODE, &TimerCfg);
00148
00149         //disable timer counter
00150         TIM_Cmd(LPC_TIM0, DISABLE);
00151
00152         /* Initalize Match MR0
00153          * - Enable interrupt
00154          * - Enable reset
00155          * - Disable stop
00156          * - Match value = CLKPWR_GetPCLK(CLKPWR_PCLKSEL_TIMER0)/(TIMER0_TICK_PER_SEC)
00157          */
00158         timer_tick = CLKPWR_GetPCLK(CLKPWR_PCLKSEL_TIMER0)/(TIMER0_TICK_PER_SEC);
00159         MatchCfg.MatchChannel = 0;
00160         MatchCfg.IntOnMatch = ENABLE;
00161         MatchCfg.ResetOnMatch = ENABLE;
00162         MatchCfg.StopOnMatch = DISABLE;
00163         MatchCfg.ExtMatchOutputType = TIM_EXTMATCH_NOTHING;
00164         MatchCfg.MatchValue = timer_tick;
00165         TIM_ConfigMatch(LPC_TIM0,&MatchCfg);
00166
00167         // Clear MR0 interrupt pending
00168         TIM_ClearIntPending(LPC_TIM0, TIM_MR0_INT);
00169
00170         //Enable TIMER0 interrupt
00171         NVIC_EnableIRQ(TIMER0_IRQn);
00172
00173         // Enable TIMER0 counter
00174         TIM_Cmd(LPC_TIM0, ENABLE);
00175
00176         // GLCD init
00177         GLCD_PowerUpInit((unsigned char *)NXP_Logo.pPicStream);
00178         GLCD_Backlight(BACKLIGHT_ON);
00179
00180         GLCD_SetFont(&Terminal_9_12_6,0x000F00,0x00FF0);
00181         GLCD_SetWindow(10,116,131,131);
00182         GLCD_TextSetPos(0,0);
00183
00184         if(CntrSel)
00185         {
00186                 SelHold = TRUE;
00187                 GLCD_print("\fContrast adj.\r");
00188         }
00189         else
00190         {
00191                 SelHold = FALSE;
00192                 GLCD_print("\fBacklight adj.\r");
00193         }
00194
00195         while(1)
00196         {
00197                 AdcData = ADC_GlobalGetData(LPC_ADC);
00198                 if(AdcData & (1UL << 31))
00199                 {
00200                         //AD0 start conversion
00201                         ADC_StartCmd(LPC_ADC, ADC_START_NOW);
00202                         AdcData >>= 10;
00203                         AdcData  &= 0xFF;
00204                         if(SelHold)
00205                         {
00206                                 // Contract adj
00207                                 GLCD_SendCmd(SETCON,(unsigned char *)&AdcData,0);
00208                         }
00209                         else
00210                         {
00211                                 // Backlight adj
00212                                 AdcData >>= 1;
00213                                 GLCD_Backlight(AdcData);
00214                         }
00215                 }
00216                 if(SelHold != CntrSel)
00217                 {
00218                         SelHold ^= 1;
00219                         if(SelHold)
00220                         {
00221                                 GLCD_print("\fContrast adj.\r");
00222                         }
00223                         else
00224                         {
00225                                 GLCD_print("\fBacklight adj.\r");
00226                         }
00227                 }
00228         }
00229         return 1;
00230 }
00231
00232 /* With ARM and GHS toolsets, the entry point is main() - this will
00233    allow the linker to generate wrapper code to setup stacks, allocate
00234    heap area, and initialize and copy code and data segments. For GNU
00235    toolsets, the entry point is through __start() in the crt0_gnu.asm
00236    file, and that startup code will setup stacks and data */
00237 int main(void)
00238 {
00239     return c_entry();
00240 }
00241
00242 #ifdef  DEBUG
00243 /*******************************************************************************
00244 * @brief                Reports the name of the source file and the source line number
00245 *                               where the CHECK_PARAM error has occurred.
00246 * @param[in]    file Pointer to the source file name
00247 * @param[in]    line assert_param error line source number
00248 * @return               None
00249 *******************************************************************************/
00250 void check_failed(uint8_t *file, uint32_t line)
00251 {
00252         /* User can add his own implementation to report the file name and line number,
00253          ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
00254
00255         /* Infinite loop */
00256         while(1);
00257 }
00258 #endif
00259
00260 /*
00261  * @}
00262  */
Generated on Tue Jun 7 14:59:01 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/NVIC/Priority/lpc17xx_libcfg.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/NVIC/Priority/lpc17xx_libcfg.h

Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          lpc17xx_libcfg.h                        2010-05-21
00003 */
00026 #ifndef LPC17XX_LIBCFG_H_
00027 #define LPC17XX_LIBCFG_H_
00028
00029 #include "lpc_types.h"
00030
00031
00032 /************************** DEBUG MODE DEFINITIONS *********************************/
00033 /* Un-comment the line below to compile the library in DEBUG mode, this will expanse
00034    the "CHECK_PARAM" macro in the FW library code */
00035
00036 #define DEBUG
00037
00038
00039 /******************* PERIPHERAL FW LIBRARY CONFIGURATION DEFINITIONS ***********************/
00040
00041 /* Comment the line below to disable the specific peripheral inclusion */
00042
00043 /* DEBUG_FRAMWORK ------------------------------ */
00044 //#define _DBGFWK
00045
00046 /* GPIO ------------------------------- */
00047 #define _GPIO
00048
00049 /* EXTI ------------------------------- */
00050 #define _EXTI
00051
00052 /* UART ------------------------------- */
00053 //#define _UART
00054 //#define _UART0
00055 //#define _UART1
00056 //#define _UART2
00057 //#define _UART3
00058
00059 /* SPI ------------------------------- */
00060 //#define _SPI
00061
00062 /* SSP ------------------------------- */
00063 //#define _SSP
00064 //#define _SSP0
00065 //#define _SSP1
00066
00067 /* SYSTICK --------------------------- */
00068 //#define _SYSTICK
00069
00070 /* I2C ------------------------------- */
00071 //#define _I2C
00072 //#define _I2C0
00073 //#define _I2C1
00074 //#define _I2C2
00075
00076 /* TIMER ------------------------------- */
00077 //#define _TIM
00078
00079 /* WDT ------------------------------- */
00080 //#define _WDT
00081
00082
00083 /* GPDMA ------------------------------- */
00084 //#define _GPDMA
00085
00086
00087 /* DAC ------------------------------- */
00088 //#define _DAC
00089
00090 /* DAC ------------------------------- */
00091 //#define _ADC
00092
00093
00094 /* PWM ------------------------------- */
00095 //#define _PWM
00096 //#define _PWM1
00097
00098 /* RTC ------------------------------- */
00099 //#define _RTC
00100
00101 /* I2S ------------------------------- */
00102 //#define _I2S
00103
00104 /* USB device ------------------------------- */
00105 //#define _USBDEV
00106 //#define _USB_DMA
00107
00108 /* QEI ------------------------------- */
00109 //#define _QEI
00110
00111 /* MCPWM ------------------------------- */
00112 //#define _MCPWM
00113
00114 /* CAN--------------------------------*/
00115 //#define _CAN
00116
00117 /* RIT ------------------------------- */
00118 //#define _RIT
00119
00120 /* EMAC ------------------------------ */
00121 //#define _EMAC
00122
00123 /************************** GLOBAL/PUBLIC MACRO DEFINITIONS *********************************/
00124
00125 #ifdef  DEBUG
00126 /*******************************************************************************
00127 * @brief                The CHECK_PARAM macro is used for function's parameters check.
00128 *                               It is used only if the library is compiled in DEBUG mode.
00129 * @param[in]    expr - If expr is false, it calls check_failed() function
00130 *                       which reports the name of the source file and the source
00131 *                       line number of the call that failed.
00132 *                    - If expr is true, it returns no value.
00133 * @return               None
00134 *******************************************************************************/
00135 #define CHECK_PARAM(expr) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))
00136 #else
00137 #define CHECK_PARAM(expr)
00138 #endif /* DEBUG */
00139
00140
00141
00142 /************************** GLOBAL/PUBLIC FUNCTION DECLARATION *********************************/
00143
00144 #ifdef  DEBUG
00145 void check_failed(uint8_t *file, uint32_t line);
00146 #endif
00147
00148
00149 #endif /* LPC17XX_LIBCFG_H_ */
Generated on Tue Jun 7 14:58:57 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/NVIC/VecTable_Relocation/lpc17xx_libcfg.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/NVIC/VecTable_Relocation/lpc17xx_libcfg.h

Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          lpc17xx_libcfg.h                        2010-05-21
00003 */
00025 #ifndef LPC17XX_LIBCFG_H_
00026 #define LPC17XX_LIBCFG_H_
00027
00028 #include "lpc_types.h"
00029
00030
00031 /************************** DEBUG MODE DEFINITIONS *********************************/
00032 /* Un-comment the line below to compile the library in DEBUG mode, this will expanse
00033    the "CHECK_PARAM" macro in the FW library code */
00034
00035 #define DEBUG
00036
00037
00038 /******************* PERIPHERAL FW LIBRARY CONFIGURATION DEFINITIONS ***********************/
00039
00040 /* Comment the line below to disable the specific peripheral inclusion */
00041
00042 /* DEBUG_FRAMWORK ------------------------------ */
00043 #define _DBGFWK
00044
00045 /* GPIO ------------------------------- */
00046 #define _GPIO
00047
00048 /* EXTI ------------------------------- */
00049 //#define _EXTI
00050
00051 /* UART ------------------------------- */
00052 #define _UART
00053 #define _UART0
00054 //#define _UART1
00055 //#define _UART2
00056 //#define _UART3
00057
00058 /* SPI ------------------------------- */
00059 //#define _SPI
00060
00061 /* SSP ------------------------------- */
00062 //#define _SSP
00063 //#define _SSP0
00064 //#define _SSP1
00065
00066 /* SYSTICK --------------------------- */
00067 #define _SYSTICK
00068
00069 /* I2C ------------------------------- */
00070 //#define _I2C
00071 //#define _I2C0
00072 //#define _I2C1
00073 //#define _I2C2
00074
00075 /* TIMER ------------------------------- */
00076 //#define _TIM
00077
00078 /* WDT ------------------------------- */
00079 //#define _WDT
00080
00081
00082 /* GPDMA ------------------------------- */
00083 //#define _GPDMA
00084
00085
00086 /* DAC ------------------------------- */
00087 //#define _DAC
00088
00089 /* DAC ------------------------------- */
00090 //#define _ADC
00091
00092
00093 /* PWM ------------------------------- */
00094 //#define _PWM
00095 //#define _PWM1
00096
00097 /* RTC ------------------------------- */
00098 //#define _RTC
00099
00100 /* I2S ------------------------------- */
00101 //#define _I2S
00102
00103 /* USB device ------------------------------- */
00104 //#define _USBDEV
00105 //#define _USB_DMA
00106
00107 /* QEI ------------------------------- */
00108 //#define _QEI
00109
00110 /* MCPWM ------------------------------- */
00111 //#define _MCPWM
00112
00113 /* CAN--------------------------------*/
00114 //#define _CAN
00115
00116 /* RIT ------------------------------- */
00117 //#define _RIT
00118
00119 /* EMAC ------------------------------ */
00120 //#define _EMAC
00121
00122 /************************** GLOBAL/PUBLIC MACRO DEFINITIONS *********************************/
00123
00124 #ifdef  DEBUG
00125 /*******************************************************************************
00126 * @brief                The CHECK_PARAM macro is used for function's parameters check.
00127 *                               It is used only if the library is compiled in DEBUG mode.
00128 * @param[in]    expr - If expr is false, it calls check_failed() function
00129 *                       which reports the name of the source file and the source
00130 *                       line number of the call that failed.
00131 *                    - If expr is true, it returns no value.
00132 * @return               None
00133 *******************************************************************************/
00134 #define CHECK_PARAM(expr) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))
00135 #else
00136 #define CHECK_PARAM(expr)
00137 #endif /* DEBUG */
00138
00139
00140
00141 /************************** GLOBAL/PUBLIC FUNCTION DECLARATION *********************************/
00142
00143 #ifdef  DEBUG
00144 void check_failed(uint8_t *file, uint32_t line);
00145 #endif
00146
00147
00148 #endif /* LPC17XX_LIBCFG_H_ */
Generated on Tue Jun 7 14:58:57 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/LCD/NOKIA6610_LCD/NXP_logo.c Source File

C:/nxpdrv/LPC1700CMSIS/Examples/LCD/NOKIA6610_LCD/NXP_logo.c

Go to the documentation of this file.
00001 /*************************************************************************
00002  *    File name   : NXP_logo.c
00003  *    Description : NXP Logo picture
00004  **************************************************************************/
00005 #include "NXP_logo.h"
00006
00007 const unsigned char NXP_LogoStream[] = {
00008         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00009         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00010         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00011         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00012         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00013         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00014         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00015         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00016         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00017         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00018         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00019         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00020         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00021         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00022         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00023         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00024         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00025         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00026         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00027         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00028         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00029         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00030         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00031         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00032         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00033         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00034         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00035         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00036         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00037         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00038         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00039         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00040         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00041         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00042         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00043         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00044         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00045         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00046         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00047         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00048         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00049         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00050         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00051         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00052         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00053         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00054         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00055         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00056         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00057         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00058         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00059         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00060         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00061         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00062         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00063         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00064         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00065         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00066         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00067         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00068         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00069         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00070         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00071         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00072         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00073         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00074         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00075         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00076         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00077         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00078         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00079         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00080         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00081         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00082         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00083         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00084         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00085         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00086         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00087         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00088         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00089         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00090         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00091         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00092         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00093         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00094         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00095         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00096         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00097         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00098         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00099         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00100         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00101         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00102         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00103         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00104         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00105         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00106         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00107         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00108         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00109         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00110         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00111         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00112         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00113         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00114         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00115         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00116         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00117         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00118         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00119         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00120         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00121         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00122         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00123         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00124         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00125         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00126         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00127         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00128         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00129         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00130         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00131         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00132         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00133         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00134         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00135         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00136         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00137         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00138         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00139         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00140         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00141         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00142         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00143         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00144         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00145         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00146         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00147         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00148         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00149         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00150         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00151         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00152         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00153         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00154         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00155         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00156         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00157         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00158         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00159         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00160         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00161         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00162         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00163         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00164         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00165         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00166         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00167         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00168         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00169         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00170         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00171         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00172         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00173         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00174         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00175         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00176         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00177         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00178         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00179         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00180         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00181         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00182         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00183         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00184         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00185         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00186         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00187         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00188         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00189         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00190         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00191         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00192         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00193         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00194         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00195         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00196         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00197         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00198         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00199         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00200         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00201         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00202         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00203         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00204         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00205         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00206         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00207         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00208         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00209         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00210         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00211         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00212         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00213         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00214         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00215         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00216         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00217         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00218         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00219         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00220         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00221         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00222         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00223         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00224         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00225         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00226         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00227         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00228         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00229         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00230         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00231         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00232         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00233         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00234         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00235         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00236         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00237         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00238         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00239         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00240         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00241         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00242         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00243         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00244         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00245         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00246         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00247         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00248         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00249         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00250         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00251         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00252         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00253         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00254         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00255         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00256         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00257         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00258         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00259         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00260         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00261         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00262         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00263         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00264         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00265         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00266         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00267         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00268         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00269         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00270         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00271         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00272         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00273         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00274         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00275         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00276         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00277         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00278         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00279         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00280         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00281         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00282         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00283         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00284         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00285         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00286         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00287         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00288         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00289         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00290         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00291         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00292         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00293         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00294         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00295         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00296         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00297         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00298         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00299         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00300         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00301         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00302         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00303         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00304         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00305         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00306         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00307         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00308         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00309         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00310         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00311         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00312         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00313         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00314         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00315         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00316         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00317         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00318         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00319         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00320         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00321         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00322         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00323         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00324         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00325         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00326         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00327         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00328         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00329         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00330         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00331         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00332         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00333         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00334         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00335         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00336         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00337         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00338         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00339         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00340         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00341         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00342         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00343         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00344         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00345         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00346         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00347         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00348         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00349         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00350         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00351         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00352         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00353         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00354         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00355         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00356         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00357         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00358         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00359         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00360         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00361         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00362         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00363         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00364         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00365         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00366         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00367         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00368         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00369         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00370         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00371         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00372         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00373         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00374         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00375         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00376         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00377         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00378         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00379         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00380         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00381         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00382         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00383         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00384         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00385         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00386         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00387         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00388         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00389         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00390         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00391         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00392         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00393         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00394         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00395         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00396         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00397         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00398         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00399         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00400         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00401         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00402         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00403         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00404         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00405         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00406         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00407         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00408         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00409         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00410         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00411         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00412         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00413         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00414         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00415         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00416         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00417         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00418         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00419         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00420         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00421         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00422         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00423         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00424         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00425         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00426         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00427         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00428         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00429         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00430         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00431         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00432         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00433         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00434         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00435         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00436         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00437         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00438         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00439         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00440         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00441         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00442         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00443         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00444         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00445         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00446         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00447         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00448         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00449         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00450         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00451         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00452         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00453         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00454         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00455         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00456         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00457         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00458         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00459         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00460         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00461         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00462         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00463         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00464         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00465         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00466         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00467         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00468         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00469         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00470         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00471         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00472         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00473         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00474         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00475         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00476         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00477         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00478         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00479         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00480         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00481         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00482         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00483         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00484         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00485         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00486         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00487         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00488         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00489         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00490         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00491         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00492         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00493         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00494         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00495         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00496         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00497         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00498         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00499         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00500         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00501         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00502         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00503         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00504         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00505         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00506         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00507         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00508         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00509         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00510         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00511         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00512         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00513         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00514         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00515         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00516         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00517         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00518         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00519         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00520         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00521         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00522         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00523         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00524         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00525         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00526         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00527         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00528         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00529         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00530         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00531         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00532         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00533         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00534         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00535         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00536         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00537         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00538         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00539         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00540         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00541         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00542         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00543         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00544         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00545         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00546         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00547         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00548         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00549         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00550         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00551         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00552         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00553         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00554         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00555         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00556         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00557         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00558         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00559         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00560         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00561         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00562         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00563         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00564         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00565         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00566         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00567         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00568         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00569         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00570         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00571         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00572         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00573         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00574         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00575         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00576         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00577         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00578         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00579         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00580         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00581         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00582         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00583         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00584         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00585         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00586         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00587         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00588         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00589         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00590         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00591         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00592         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00593         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00594         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00595         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00596         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00597         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00598         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00599         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00600         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00601         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00602         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00603         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00604         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00605         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00606         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00607         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFF, 0x0F,
00608         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00609         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00610         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00611         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00612         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F,
00613         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F,
00614         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00615         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00616         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00617         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00618         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00619         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00620         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00621         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00622         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00623         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00624         0xFF, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00625         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00626         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00627         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00628         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00629         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00630         0xFF, 0x0F, 0xFF, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00631         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00632         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00633         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00634         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00635         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00636         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00637         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00638         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00639         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00640         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00641         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00642         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00643         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00644         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00645         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00646         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFE, 0x0F,
00647         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00648         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00649         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00650         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00651         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00652         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00653         0xFF, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00654         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00655         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00656         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00657         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00658         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00659         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00660         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00661         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00662         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00663         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00664         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00665         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00666         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00667         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00668         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00669         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F,
00670         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00671         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00672         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00673         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00674         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00675         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00676         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00677         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00678         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00679         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00680         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00681         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00682         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00683         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00684         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00685         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00686         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00687         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00688         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0E, 0xFF, 0x0F, 0xFE, 0x0F,
00689         0xFE, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00690         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00691         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00692         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00693         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00694         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00695         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00696         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00697         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00698         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00699         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00700         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00701         0xFE, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00702         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00703         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00704         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00705         0xFF, 0x0E, 0xFF, 0x0E, 0xFF, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F,
00706         0xFE, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F,
00707         0xFE, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00708         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00709         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00710         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00711         0xFF, 0x0F, 0xFF, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00712         0xFF, 0x0F, 0xFF, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00713         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00714         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00715         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00716         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00717         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFD, 0x0F, 0xFD, 0x0F, 0xFD, 0x0F, 0xFD, 0x0F,
00718         0xFD, 0x0F, 0xFD, 0x0F, 0xFD, 0x0F, 0xFD, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFF, 0x0F,
00719         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00720         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00721         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0E, 0xFF, 0x0E, 0xFE, 0x0F, 0xFE, 0x0F,
00722         0xFD, 0x0F, 0xFD, 0x0F, 0xFD, 0x0F, 0xFD, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F,
00723         0xFE, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFD, 0x0F, 0xED, 0x0F, 0xED, 0x0F, 0xEE, 0x0F, 0xFE, 0x0F,
00724         0xFE, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0E, 0xFF, 0x0E, 0xFF, 0x0E, 0xFF, 0x0F,
00725         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00726         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00727         0xFF, 0x0F, 0xFF, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFD, 0x0E,
00728         0xFD, 0x0E, 0xFD, 0x0E, 0xFE, 0x0E, 0xFE, 0x0E, 0xFE, 0x0F, 0xFE, 0x0F, 0xFD, 0x0F, 0xFD, 0x0F,
00729         0xFD, 0x0F, 0xFE, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00730         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00731         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00732         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00733         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00734         0xFA, 0x0F, 0xFA, 0x0F, 0xFA, 0x0F, 0xFB, 0x0F, 0xFB, 0x0F, 0xFB, 0x0F, 0xFB, 0x0F, 0xFC, 0x0F,
00735         0xEB, 0x0F, 0xFD, 0x0F, 0xED, 0x0F, 0xFE, 0x0F, 0xEE, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00736         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00737         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00738         0xFF, 0x0F, 0xFE, 0x0E, 0xFE, 0x0F, 0xFD, 0x0F, 0xFD, 0x0F, 0xEC, 0x0F, 0xEC, 0x0F, 0xFC, 0x0F,
00739         0xFD, 0x0F, 0xFD, 0x0F, 0xED, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFD, 0x0F, 0xFD, 0x0F, 0xFD, 0x0F,
00740         0xEC, 0x0F, 0xFD, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFF, 0x0F, 0xFF, 0x0E, 0xFF, 0x0E, 0xFF, 0x0E,
00741         0xFF, 0x0E, 0xFF, 0x0E, 0xFF, 0x0E, 0xFF, 0x0E, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00742         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00743         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0E, 0xFF, 0x0F, 0xFE, 0x0F, 0xFE, 0x0E,
00744         0xFE, 0x0E, 0xFE, 0x0E, 0xFD, 0x0E, 0xFC, 0x0E, 0xFC, 0x0E, 0xFD, 0x0F, 0xFE, 0x0F, 0xFD, 0x0E,
00745         0xFD, 0x0E, 0xFD, 0x0F, 0xFC, 0x0F, 0xFC, 0x0F, 0xFC, 0x0F, 0xFD, 0x0E, 0xFE, 0x0F, 0xEE, 0x0E,
00746         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00747         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00748         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00749         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00750         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xB5, 0x0D, 0xB5, 0x0D, 0xB5, 0x0D, 0xB5, 0x0D,
00751         0xB5, 0x0D, 0xB5, 0x0D, 0xB6, 0x0E, 0xB6, 0x0D, 0xB7, 0x0D, 0xC8, 0x0E, 0xB9, 0x0D, 0xEC, 0x0F,
00752         0xED, 0x0F, 0xFE, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00753         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00754         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFE, 0x0F, 0xFF, 0x0F, 0xFE, 0x0F, 0xFD, 0x0F, 0xFC, 0x0F,
00755         0xDA, 0x0E, 0xA7, 0x0B, 0x95, 0x0A, 0x96, 0x0A, 0x86, 0x0A, 0x86, 0x09, 0x86, 0x09, 0x86, 0x09,
00756         0x96, 0x09, 0x96, 0x09, 0x95, 0x09, 0x95, 0x09, 0x96, 0x0A, 0x96, 0x0A, 0x97, 0x09, 0x98, 0x09,
00757         0xA9, 0x0A, 0xBB, 0x0A, 0xBC, 0x0B, 0xCD, 0x0B, 0xFF, 0x0D, 0xFF, 0x0E, 0xFF, 0x0E, 0xFF, 0x0E,
00758         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00759         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0E, 0xFF, 0x0F, 0xFF, 0x0E, 0xDD, 0x0C,
00760         0xBB, 0x0A, 0xBB, 0x0A, 0xBA, 0x0A, 0xA8, 0x09, 0x97, 0x08, 0xA7, 0x08, 0xA6, 0x08, 0xA6, 0x08,
00761         0xA6, 0x08, 0xA6, 0x09, 0xA7, 0x09, 0x97, 0x09, 0xA7, 0x09, 0xA6, 0x09, 0x95, 0x09, 0x94, 0x08,
00762         0xA5, 0x09, 0xA7, 0x0A, 0xEC, 0x0D, 0xEE, 0x0E, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00763         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00764         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00765         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00766         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00767         0xB2, 0x0D, 0xB2, 0x0D, 0xB2, 0x0D, 0xB2, 0x0D, 0xB2, 0x0D, 0xB2, 0x0D, 0xB2, 0x0D, 0xB3, 0x0D,
00768         0xA3, 0x0D, 0xB5, 0x0D, 0xA6, 0x0C, 0xDA, 0x0F, 0xEC, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F,
00769         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00770         0xFE, 0x0F, 0xFE, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F,
00771         0xFD, 0x0F, 0xFD, 0x0F, 0xFC, 0x0F, 0xEA, 0x0F, 0xC8, 0x0E, 0x95, 0x0B, 0x73, 0x0A, 0x73, 0x09,
00772         0x84, 0x09, 0x84, 0x09, 0x85, 0x09, 0x85, 0x08, 0x84, 0x08, 0x84, 0x08, 0x84, 0x09, 0x84, 0x09,
00773         0x84, 0x08, 0x74, 0x08, 0x75, 0x08, 0x76, 0x08, 0x88, 0x08, 0x9A, 0x09, 0xAB, 0x09, 0xBC, 0x09,
00774         0xEE, 0x0C, 0xFF, 0x0D, 0xFF, 0x0E, 0xFF, 0x0E, 0xFF, 0x0E, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00775         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00776         0xFF, 0x0F, 0xFF, 0x0E, 0xEF, 0x0D, 0xCC, 0x0B, 0xAA, 0x08, 0xAA, 0x09, 0xA9, 0x08, 0x86, 0x07,
00777         0x86, 0x07, 0x85, 0x07, 0x94, 0x07, 0x94, 0x07, 0x94, 0x07, 0x94, 0x07, 0x85, 0x07, 0x85, 0x07,
00778         0x84, 0x07, 0x83, 0x07, 0x92, 0x08, 0x82, 0x07, 0x93, 0x08, 0xA6, 0x0A, 0xEC, 0x0E, 0xFE, 0x0F,
00779         0xFE, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00780         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00781         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00782         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00783         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xB1, 0x0E, 0xB1, 0x0E, 0xB0, 0x0E, 0xB0, 0x0E,
00784         0xB0, 0x0E, 0xB0, 0x0E, 0xB1, 0x0E, 0xB1, 0x0E, 0xB2, 0x0E, 0xB3, 0x0D, 0xB5, 0x0D, 0xE9, 0x0F,
00785         0xFC, 0x0F, 0xFD, 0x0F, 0xEE, 0x0F, 0xEE, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00786         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFE, 0x0F,
00787         0xFE, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFD, 0x0F, 0xFC, 0x0F, 0xEA, 0x0F, 0xC7, 0x0E,
00788         0xB5, 0x0D, 0xA4, 0x0D, 0x93, 0x0C, 0x72, 0x0A, 0x72, 0x09, 0x73, 0x09, 0x84, 0x09, 0x74, 0x08,
00789         0x73, 0x08, 0x83, 0x08, 0x83, 0x08, 0x72, 0x08, 0x83, 0x09, 0x84, 0x08, 0x85, 0x08, 0x87, 0x08,
00790         0x99, 0x09, 0xAB, 0x09, 0xAB, 0x09, 0xAB, 0x08, 0xCD, 0x0A, 0xEF, 0x0C, 0xFF, 0x0E, 0xFF, 0x0E,
00791         0xFF, 0x0E, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00792         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0E, 0xEF, 0x0D, 0xDE, 0x0B, 0xAC, 0x09,
00793         0xAA, 0x08, 0xAA, 0x09, 0xA9, 0x08, 0x97, 0x07, 0x85, 0x06, 0x84, 0x06, 0x93, 0x06, 0x93, 0x07,
00794         0x93, 0x07, 0x93, 0x07, 0x84, 0x07, 0x84, 0x07, 0x84, 0x07, 0x82, 0x07, 0x91, 0x08, 0x91, 0x08,
00795         0xA3, 0x09, 0xB6, 0x0A, 0xEB, 0x0E, 0xFD, 0x0F, 0xFE, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00796         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00797         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00798         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00799         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00800         0xB0, 0x0E, 0xB0, 0x0E, 0xB0, 0x0E, 0xB0, 0x0E, 0xB0, 0x0E, 0xB0, 0x0E, 0xB0, 0x0E, 0xB0, 0x0E,
00801         0xB1, 0x0E, 0xB2, 0x0D, 0xB4, 0x0D, 0xE9, 0x0F, 0xFB, 0x0F, 0xFD, 0x0F, 0xEE, 0x0F, 0xFF, 0x0F,
00802         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00803         0xFF, 0x0F, 0xFF, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F,
00804         0xFC, 0x0F, 0xEA, 0x0F, 0xC7, 0x0E, 0xA4, 0x0D, 0xA3, 0x0D, 0xB4, 0x0F, 0xA3, 0x0E, 0x81, 0x0B,
00805         0x71, 0x0A, 0x83, 0x09, 0x83, 0x09, 0x84, 0x09, 0x83, 0x09, 0x83, 0x09, 0x83, 0x09, 0x82, 0x09,
00806         0x82, 0x08, 0x73, 0x08, 0x74, 0x08, 0x86, 0x08, 0x99, 0x08, 0xAB, 0x09, 0xAC, 0x08, 0x9B, 0x08,
00807         0xAC, 0x09, 0xDE, 0x0B, 0xFF, 0x0D, 0xFF, 0x0E, 0xFF, 0x0E, 0xFF, 0x0E, 0xFF, 0x0F, 0xFF, 0x0F,
00808         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFE, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0E,
00809         0xFF, 0x0E, 0xDF, 0x0C, 0xBC, 0x09, 0xAB, 0x08, 0xAA, 0x08, 0xAA, 0x08, 0xA9, 0x08, 0x97, 0x06,
00810         0x95, 0x06, 0x94, 0x07, 0x93, 0x07, 0x93, 0x07, 0x93, 0x07, 0x93, 0x07, 0x94, 0x07, 0x94, 0x07,
00811         0x94, 0x08, 0x92, 0x07, 0x90, 0x07, 0xA1, 0x08, 0xB3, 0x0A, 0xC6, 0x0B, 0xFB, 0x0F, 0xFD, 0x0F,
00812         0xFE, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00813         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00814         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00815         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00816         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xB0, 0x0F, 0xB0, 0x0F, 0xB0, 0x0F, 0xB0, 0x0F,
00817         0xB0, 0x0F, 0xB0, 0x0F, 0xB0, 0x0F, 0xB0, 0x0E, 0xB0, 0x0E, 0xB2, 0x0D, 0xB4, 0x0D, 0xE9, 0x0F,
00818         0xEB, 0x0F, 0xED, 0x0F, 0xEE, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00819         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F,
00820         0xFE, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFD, 0x0F, 0xEA, 0x0F, 0xC6, 0x0E, 0xA3, 0x0D, 0xA2, 0x0D,
00821         0xB2, 0x0F, 0xB2, 0x0F, 0xA2, 0x0E, 0xA2, 0x0D, 0x81, 0x0A, 0x72, 0x09, 0x73, 0x09, 0x83, 0x09,
00822         0x83, 0x09, 0x83, 0x08, 0x72, 0x09, 0x82, 0x09, 0x82, 0x09, 0x82, 0x08, 0x84, 0x08, 0x86, 0x08,
00823         0x99, 0x08, 0xAB, 0x09, 0xAD, 0x09, 0xAC, 0x08, 0xAC, 0x08, 0xBD, 0x09, 0xEE, 0x0C, 0xFF, 0x0E,
00824         0xFF, 0x0E, 0xFF, 0x0E, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFE, 0x0F,
00825         0xFE, 0x0F, 0xFE, 0x0F, 0xFF, 0x0E, 0xFF, 0x0E, 0xFF, 0x0E, 0xCE, 0x0B, 0xAC, 0x09, 0xAC, 0x08,
00826         0xAB, 0x08, 0xBB, 0x08, 0xA9, 0x07, 0x97, 0x06, 0x95, 0x06, 0x93, 0x06, 0x92, 0x06, 0x92, 0x06,
00827         0x92, 0x06, 0x92, 0x06, 0x83, 0x07, 0x83, 0x07, 0x92, 0x07, 0x81, 0x07, 0x90, 0x07, 0xA1, 0x09,
00828         0xC3, 0x0B, 0xC5, 0x0B, 0xEA, 0x0E, 0xFD, 0x0F, 0xFE, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00829         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00830         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00831         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00832         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00833         0xA1, 0x0E, 0xA1, 0x0E, 0xA0, 0x0F, 0xA0, 0x0F, 0xA0, 0x0F, 0xA0, 0x0F, 0xB0, 0x0F, 0xB0, 0x0E,
00834         0xB1, 0x0E, 0xB3, 0x0E, 0xB4, 0x0D, 0xE9, 0x0F, 0xEC, 0x0F, 0xFE, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00835         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00836         0xFF, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFC, 0x0F,
00837         0xE8, 0x0F, 0xC4, 0x0D, 0xB2, 0x0D, 0xB2, 0x0F, 0xB2, 0x0F, 0xA0, 0x0F, 0xA1, 0x0E, 0xA2, 0x0E,
00838         0x92, 0x0C, 0x82, 0x0A, 0x72, 0x09, 0x83, 0x09, 0x83, 0x09, 0x83, 0x09, 0x72, 0x09, 0x82, 0x09,
00839         0x92, 0x09, 0x82, 0x09, 0x84, 0x08, 0x86, 0x08, 0x99, 0x08, 0xAB, 0x09, 0xAD, 0x09, 0xAD, 0x08,
00840         0xAC, 0x08, 0xAC, 0x08, 0xCD, 0x0A, 0xEF, 0x0D, 0xFF, 0x0E, 0xFF, 0x0E, 0xFF, 0x0F, 0xFF, 0x0F,
00841         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFE, 0x0E, 0xFF, 0x0E, 0xFF, 0x0E,
00842         0xCD, 0x0B, 0xBD, 0x09, 0xAC, 0x08, 0xAC, 0x08, 0xAB, 0x08, 0xBB, 0x08, 0xA9, 0x07, 0x86, 0x05,
00843         0x96, 0x06, 0x94, 0x06, 0x93, 0x06, 0xA2, 0x07, 0x92, 0x07, 0x92, 0x07, 0x93, 0x07, 0x94, 0x07,
00844         0x92, 0x07, 0x91, 0x07, 0xB1, 0x09, 0xC2, 0x0B, 0xD4, 0x0C, 0xC5, 0x0C, 0xEA, 0x0E, 0xFD, 0x0F,
00845         0xFE, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00846         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00847         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00848         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00849         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xA1, 0x0F, 0xA1, 0x0F, 0xA0, 0x0F, 0xA0, 0x0F,
00850         0xA0, 0x0F, 0xB0, 0x0F, 0xB0, 0x0F, 0xB0, 0x0F, 0xB0, 0x0E, 0xB2, 0x0E, 0xB4, 0x0D, 0xE9, 0x0F,
00851         0xFC, 0x0F, 0xFE, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00852         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F,
00853         0xFE, 0x0F, 0xFE, 0x0F, 0xED, 0x0F, 0xEA, 0x0F, 0xB4, 0x0D, 0xB2, 0x0D, 0xB1, 0x0D, 0xB1, 0x0E,
00854         0xB1, 0x0F, 0xA0, 0x0F, 0xB1, 0x0F, 0xB2, 0x0F, 0xA2, 0x0D, 0x81, 0x0B, 0x71, 0x09, 0x82, 0x09,
00855         0x83, 0x09, 0x83, 0x08, 0x83, 0x09, 0x83, 0x09, 0x82, 0x09, 0x82, 0x09, 0x84, 0x08, 0x86, 0x08,
00856         0x98, 0x08, 0xAB, 0x08, 0xAC, 0x08, 0xAC, 0x07, 0xAD, 0x08, 0xAC, 0x07, 0xBC, 0x09, 0xDE, 0x0C,
00857         0xFF, 0x0E, 0xFF, 0x0F, 0xFF, 0x0E, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00858         0xFE, 0x0F, 0xFF, 0x0E, 0xFF, 0x0E, 0xFF, 0x0E, 0xAB, 0x08, 0xAC, 0x08, 0xAD, 0x08, 0xAC, 0x08,
00859         0xAB, 0x07, 0xBB, 0x08, 0xA9, 0x07, 0x96, 0x06, 0x95, 0x06, 0x93, 0x06, 0x93, 0x06, 0x93, 0x06,
00860         0x92, 0x06, 0x92, 0x06, 0x93, 0x07, 0x93, 0x07, 0x92, 0x07, 0x91, 0x08, 0xB1, 0x09, 0xC1, 0x0B,
00861         0xC2, 0x0B, 0xB4, 0x0B, 0xEA, 0x0E, 0xFD, 0x0F, 0xFE, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00862         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00863         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00864         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00865         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00866         0xB0, 0x0E, 0xB0, 0x0E, 0xB0, 0x0F, 0xB0, 0x0F, 0xA0, 0x0F, 0xA0, 0x0F, 0xB0, 0x0F, 0xB0, 0x0F,
00867         0xB0, 0x0E, 0xB1, 0x0E, 0xB4, 0x0D, 0xE9, 0x0F, 0xFC, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFF, 0x0F,
00868         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFE, 0x0E, 0xFE, 0x0E, 0xFE, 0x0E, 0xFE, 0x0E,
00869         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xEE, 0x0F, 0xED, 0x0F, 0xFD, 0x0F, 0xDA, 0x0F, 0xB6, 0x0D,
00870         0xA3, 0x0D, 0xB1, 0x0E, 0xB1, 0x0E, 0xB1, 0x0E, 0xB0, 0x0E, 0xB0, 0x0E, 0xB0, 0x0E, 0xB1, 0x0E,
00871         0xB1, 0x0E, 0x91, 0x0C, 0x80, 0x0A, 0x71, 0x09, 0x82, 0x09, 0x83, 0x09, 0x83, 0x08, 0x84, 0x09,
00872         0x83, 0x09, 0x83, 0x09, 0x84, 0x08, 0x85, 0x07, 0x98, 0x08, 0xAA, 0x08, 0xBC, 0x08, 0xAC, 0x07,
00873         0xAD, 0x08, 0xAD, 0x08, 0xAC, 0x08, 0xBD, 0x09, 0xEF, 0x0D, 0xFF, 0x0E, 0xFE, 0x0E, 0xFE, 0x0E,
00874         0xFF, 0x0F, 0xEE, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0E, 0xFF, 0x0D, 0xDD, 0x0B,
00875         0xAB, 0x08, 0xBC, 0x08, 0xAC, 0x07, 0xAC, 0x08, 0xAC, 0x08, 0xAB, 0x08, 0xA9, 0x08, 0x85, 0x06,
00876         0xA4, 0x07, 0x93, 0x06, 0x94, 0x06, 0x94, 0x06, 0x93, 0x07, 0x92, 0x07, 0x92, 0x07, 0x91, 0x07,
00877         0x81, 0x07, 0xB2, 0x0A, 0xC1, 0x0A, 0xD2, 0x0C, 0xC2, 0x0B, 0xC3, 0x0B, 0xFB, 0x0F, 0xFE, 0x0F,
00878         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00879         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00880         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00881         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00882         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xB0, 0x0E, 0xB0, 0x0E, 0xB0, 0x0E, 0xB0, 0x0F,
00883         0xA0, 0x0F, 0xA0, 0x0F, 0xA0, 0x0F, 0xB0, 0x0F, 0xB0, 0x0E, 0xB1, 0x0E, 0xB3, 0x0D, 0xE9, 0x0F,
00884         0xFD, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFE, 0x0F,
00885         0xFE, 0x0E, 0xFE, 0x0E, 0xFE, 0x0E, 0xFF, 0x0E, 0xFF, 0x0E, 0xFF, 0x0F, 0xFF, 0x0F, 0xEE, 0x0F,
00886         0xEC, 0x0F, 0xDA, 0x0F, 0xC7, 0x0F, 0xA4, 0x0D, 0xB2, 0x0E, 0xB1, 0x0E, 0xB1, 0x0E, 0xB1, 0x0E,
00887         0xB0, 0x0E, 0xB0, 0x0E, 0xB0, 0x0E, 0xB0, 0x0E, 0xB1, 0x0E, 0xA1, 0x0D, 0x90, 0x0B, 0x80, 0x0A,
00888         0x71, 0x09, 0x83, 0x09, 0x84, 0x08, 0x84, 0x08, 0x83, 0x09, 0x74, 0x09, 0x84, 0x08, 0x85, 0x07,
00889         0x98, 0x08, 0xAA, 0x08, 0xBC, 0x08, 0xAC, 0x07, 0xAD, 0x07, 0xAD, 0x08, 0xAD, 0x07, 0xBD, 0x08,
00890         0xDE, 0x0B, 0xFF, 0x0D, 0xFF, 0x0E, 0xFE, 0x0E, 0xFE, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00891         0xFF, 0x0E, 0xFF, 0x0E, 0xDE, 0x0C, 0xBC, 0x09, 0xAB, 0x07, 0xBC, 0x07, 0xAC, 0x07, 0xAD, 0x07,
00892         0xAC, 0x08, 0xAB, 0x08, 0xA9, 0x08, 0x85, 0x06, 0x94, 0x07, 0x93, 0x06, 0x94, 0x06, 0x84, 0x07,
00893         0x93, 0x07, 0x92, 0x07, 0x91, 0x07, 0x90, 0x07, 0xA1, 0x08, 0xC3, 0x0A, 0xC1, 0x0B, 0xD1, 0x0C,
00894         0xC1, 0x0B, 0xC2, 0x0B, 0xEA, 0x0E, 0xFD, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F,
00895         0xFE, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F,
00896         0xFE, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xEF, 0x0F, 0xEF, 0x0F, 0xEF, 0x0F, 0xFF, 0x0F,
00897         0xFF, 0x0F, 0xFF, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xEE, 0x0F, 0xEE, 0x0F,
00898         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00899         0xB0, 0x0E, 0xB0, 0x0E, 0xB0, 0x0E, 0xB0, 0x0F, 0xA0, 0x0F, 0xA0, 0x0F, 0xA0, 0x0F, 0xB0, 0x0F,
00900         0xB0, 0x0E, 0xB1, 0x0E, 0xB3, 0x0D, 0xE9, 0x0F, 0xFD, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F,
00901         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFE, 0x0F, 0xFE, 0x0E, 0xFE, 0x0E, 0xFF, 0x0E, 0xFF, 0x0E,
00902         0xFF, 0x0E, 0xFF, 0x0F, 0xFE, 0x0F, 0xFD, 0x0F, 0xEA, 0x0F, 0xC7, 0x0E, 0xB4, 0x0D, 0xA2, 0x0D,
00903         0xB1, 0x0E, 0xB1, 0x0E, 0xB1, 0x0E, 0xB0, 0x0E, 0xB0, 0x0E, 0xB0, 0x0E, 0xB0, 0x0E, 0xB0, 0x0E,
00904         0xB1, 0x0E, 0xB1, 0x0E, 0xA1, 0x0D, 0x80, 0x0A, 0x81, 0x09, 0x82, 0x09, 0x83, 0x09, 0x83, 0x08,
00905         0x73, 0x09, 0x74, 0x09, 0x84, 0x08, 0x86, 0x08, 0x98, 0x08, 0xAA, 0x08, 0xBC, 0x08, 0xAC, 0x07,
00906         0xAD, 0x07, 0xAD, 0x07, 0xAD, 0x07, 0xAC, 0x08, 0xBC, 0x09, 0xEE, 0x0C, 0xFF, 0x0E, 0xFF, 0x0E,
00907         0xFE, 0x0F, 0xFF, 0x0F, 0xEF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0E, 0xFF, 0x0E, 0xCC, 0x0A, 0xAB, 0x07,
00908         0xAC, 0x07, 0xBD, 0x07, 0xAD, 0x07, 0xAD, 0x07, 0xAC, 0x08, 0xAB, 0x08, 0xA9, 0x08, 0x85, 0x06,
00909         0x94, 0x06, 0x93, 0x07, 0x95, 0x07, 0x85, 0x07, 0x93, 0x07, 0x92, 0x07, 0x91, 0x08, 0x90, 0x07,
00910         0xB2, 0x0A, 0xC3, 0x0B, 0xC1, 0x0B, 0xD1, 0x0B, 0xC1, 0x0B, 0xC3, 0x0B, 0xF9, 0x0F, 0xFC, 0x0F,
00911         0xFD, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F,
00912         0xFE, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFD, 0x0F, 0xFE, 0x0F, 0xFD, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F,
00913         0xFE, 0x0F, 0xFD, 0x0F, 0xFD, 0x0F, 0xFD, 0x0F, 0xFD, 0x0F, 0xFD, 0x0F, 0xFD, 0x0F, 0xFD, 0x0F,
00914         0xFD, 0x0F, 0xFD, 0x0F, 0xFD, 0x0F, 0xFD, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F,
00915         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xB0, 0x0E, 0xB0, 0x0E, 0xB0, 0x0E, 0xB0, 0x0F,
00916         0xA0, 0x0F, 0xA0, 0x0F, 0xA0, 0x0F, 0xB0, 0x0F, 0xB0, 0x0E, 0xB1, 0x0E, 0xB3, 0x0D, 0xE9, 0x0F,
00917         0xFD, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFF, 0x0F,
00918         0xFF, 0x0E, 0xFF, 0x0E, 0xFF, 0x0E, 0xFF, 0x0E, 0xFE, 0x0F, 0xFE, 0x0F, 0xFD, 0x0F, 0xEB, 0x0F,
00919         0xC7, 0x0F, 0xB5, 0x0E, 0xA3, 0x0D, 0xA1, 0x0E, 0xB1, 0x0F, 0xB0, 0x0F, 0xA0, 0x0E, 0xB0, 0x0E,
00920         0xB0, 0x0E, 0xB0, 0x0E, 0xB0, 0x0E, 0xA0, 0x0E, 0xB1, 0x0E, 0xB1, 0x0F, 0xB2, 0x0E, 0x91, 0x0C,
00921         0x81, 0x0A, 0x82, 0x09, 0x83, 0x09, 0x83, 0x09, 0x73, 0x09, 0x74, 0x09, 0x75, 0x08, 0x86, 0x08,
00922         0x98, 0x08, 0xAA, 0x08, 0xBC, 0x08, 0xAC, 0x07, 0xAD, 0x07, 0xAD, 0x07, 0xAD, 0x08, 0xAC, 0x08,
00923         0xAB, 0x08, 0xCD, 0x0A, 0xFF, 0x0D, 0xFF, 0x0E, 0xFE, 0x0E, 0xFF, 0x0F, 0xFF, 0x0E, 0xFF, 0x0F,
00924         0xFF, 0x0E, 0xDE, 0x0C, 0xAB, 0x08, 0xAB, 0x07, 0xAC, 0x07, 0xBD, 0x07, 0xAD, 0x07, 0xAD, 0x07,
00925         0xAC, 0x07, 0xAB, 0x08, 0xA9, 0x08, 0x85, 0x06, 0x94, 0x07, 0x93, 0x07, 0x85, 0x07, 0x95, 0x07,
00926         0x93, 0x07, 0x91, 0x07, 0x90, 0x08, 0xA0, 0x09, 0xC2, 0x0B, 0xC3, 0x0B, 0xC1, 0x0B, 0xD1, 0x0C,
00927         0xC1, 0x0B, 0xD3, 0x0C, 0xF8, 0x0F, 0xFA, 0x0F, 0xFB, 0x0F, 0xFB, 0x0F, 0xFB, 0x0F, 0xFC, 0x0F,
00928         0xFB, 0x0F, 0xFB, 0x0F, 0xFB, 0x0F, 0xFB, 0x0F, 0xFB, 0x0F, 0xFB, 0x0F, 0xFB, 0x0F, 0xFB, 0x0F,
00929         0xFB, 0x0F, 0xFB, 0x0F, 0xFB, 0x0F, 0xFB, 0x0F, 0xFB, 0x0F, 0xFB, 0x0F, 0xFB, 0x0F, 0xFA, 0x0F,
00930         0xFA, 0x0F, 0xFA, 0x0F, 0xFA, 0x0F, 0xFB, 0x0F, 0xFB, 0x0F, 0xFB, 0x0F, 0xFC, 0x0F, 0xFC, 0x0F,
00931         0xFC, 0x0F, 0xFD, 0x0F, 0xFD, 0x0F, 0xFD, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00932         0xB0, 0x0E, 0xB0, 0x0E, 0xB0, 0x0E, 0xB0, 0x0F, 0xA0, 0x0F, 0xA0, 0x0F, 0xA0, 0x0F, 0xB0, 0x0F,
00933         0xB0, 0x0E, 0xB1, 0x0E, 0xB4, 0x0D, 0xE9, 0x0F, 0xFD, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFE, 0x0E,
00934         0xFE, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFF, 0x0F, 0xFF, 0x0E, 0xFF, 0x0E, 0xFF, 0x0F, 0xFF, 0x0F,
00935         0xFE, 0x0F, 0xFD, 0x0F, 0xEB, 0x0F, 0xC8, 0x0E, 0xB4, 0x0D, 0xB2, 0x0D, 0xB1, 0x0E, 0xB1, 0x0E,
00936         0xB0, 0x0F, 0xA0, 0x0F, 0xA0, 0x0E, 0xA0, 0x0E, 0xB0, 0x0F, 0xB0, 0x0F, 0xB0, 0x0F, 0xB0, 0x0E,
00937         0xB0, 0x0F, 0xB1, 0x0F, 0xB2, 0x0E, 0xA2, 0x0D, 0x91, 0x0B, 0x71, 0x09, 0x72, 0x08, 0x83, 0x09,
00938         0x73, 0x09, 0x74, 0x09, 0x75, 0x08, 0x86, 0x08, 0x98, 0x08, 0xAA, 0x08, 0xBC, 0x08, 0xAC, 0x07,
00939         0xBD, 0x07, 0xAD, 0x07, 0xAD, 0x08, 0xBD, 0x08, 0xAB, 0x07, 0xAB, 0x08, 0xDE, 0x0B, 0xFF, 0x0E,
00940         0xFE, 0x0E, 0xFF, 0x0E, 0xFF, 0x0F, 0xEF, 0x0E, 0xEF, 0x0D, 0xAC, 0x09, 0xAB, 0x07, 0xBC, 0x08,
00941         0xAC, 0x07, 0xBD, 0x07, 0xAD, 0x07, 0xAD, 0x07, 0xAC, 0x07, 0xBA, 0x08, 0xA9, 0x08, 0x85, 0x06,
00942         0x94, 0x07, 0x93, 0x07, 0x85, 0x07, 0x95, 0x07, 0x93, 0x07, 0x80, 0x07, 0xA0, 0x08, 0xC1, 0x0A,
00943         0xC2, 0x0B, 0xC2, 0x0B, 0xC2, 0x0B, 0xD1, 0x0C, 0xC1, 0x0B, 0xC1, 0x0B, 0xD4, 0x0D, 0xD6, 0x0D,
00944         0xD6, 0x0C, 0xD6, 0x0C, 0xD6, 0x0D, 0xD6, 0x0D, 0xD6, 0x0D, 0xD6, 0x0D, 0xD6, 0x0C, 0xD6, 0x0C,
00945         0xD6, 0x0C, 0xD6, 0x0C, 0xD6, 0x0C, 0xD6, 0x0C, 0xD6, 0x0C, 0xD6, 0x0C, 0xD6, 0x0C, 0xD6, 0x0C,
00946         0xD6, 0x0C, 0xD5, 0x0C, 0xD5, 0x0C, 0xD5, 0x0C, 0xD5, 0x0C, 0xD6, 0x0C, 0xD6, 0x0C, 0xD6, 0x0C,
00947         0xD6, 0x0C, 0xD7, 0x0D, 0xD8, 0x0D, 0xE8, 0x0D, 0xE9, 0x0E, 0xEA, 0x0E, 0xFB, 0x0F, 0xFC, 0x0F,
00948         0xFD, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xB0, 0x0E, 0xB0, 0x0E, 0xB0, 0x0E, 0xB0, 0x0F,
00949         0xA0, 0x0F, 0xA0, 0x0F, 0xA0, 0x0F, 0xB0, 0x0F, 0xB0, 0x0E, 0xB1, 0x0E, 0xB4, 0x0D, 0xE9, 0x0F,
00950         0xFD, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFE, 0x0E, 0xFE, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFF, 0x0F,
00951         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFE, 0x0F, 0xFD, 0x0F, 0xEC, 0x0F, 0xD8, 0x0F, 0xB5, 0x0D,
00952         0xA2, 0x0D, 0xB1, 0x0E, 0xB0, 0x0E, 0xB0, 0x0F, 0xA0, 0x0F, 0xA0, 0x0F, 0xA0, 0x0F, 0xB0, 0x0F,
00953         0xB0, 0x0F, 0xB0, 0x0F, 0xB0, 0x0F, 0xB0, 0x0F, 0xB0, 0x0F, 0xA1, 0x0E, 0xB1, 0x0E, 0xB2, 0x0E,
00954         0xA2, 0x0C, 0x81, 0x0A, 0x71, 0x09, 0x83, 0x09, 0x73, 0x09, 0x74, 0x09, 0x75, 0x08, 0x86, 0x08,
00955         0x98, 0x08, 0xAA, 0x08, 0xBC, 0x08, 0xAC, 0x07, 0xBD, 0x07, 0xAD, 0x07, 0xAD, 0x08, 0xBD, 0x08,
00956         0xAC, 0x08, 0x9B, 0x07, 0xCD, 0x0A, 0xEF, 0x0D, 0xFF, 0x0E, 0xFF, 0x0E, 0xFF, 0x0E, 0xEF, 0x0D,
00957         0xDE, 0x0B, 0x9B, 0x08, 0xAC, 0x08, 0xBD, 0x08, 0xAD, 0x07, 0xBD, 0x07, 0xAD, 0x07, 0xAD, 0x07,
00958         0xAC, 0x07, 0xBA, 0x08, 0xA9, 0x08, 0x85, 0x06, 0x94, 0x07, 0x93, 0x07, 0x84, 0x07, 0x95, 0x07,
00959         0x92, 0x07, 0x90, 0x07, 0xA0, 0x09, 0xD1, 0x0B, 0xC2, 0x0B, 0xC2, 0x0B, 0xC2, 0x0C, 0xD2, 0x0C,
00960         0xC0, 0x0B, 0xC1, 0x0B, 0xC2, 0x0C, 0xC2, 0x0B, 0xC3, 0x0B, 0xC3, 0x0B, 0xC3, 0x0B, 0xC3, 0x0B,
00961         0xC3, 0x0B, 0xC3, 0x0B, 0xC3, 0x0B, 0xC3, 0x0B, 0xC3, 0x0B, 0xC2, 0x0B, 0xC2, 0x0B, 0xC2, 0x0B,
00962         0xC2, 0x0B, 0xC2, 0x0B, 0xC2, 0x0B, 0xC2, 0x0B, 0xC2, 0x0B, 0xC2, 0x0B, 0xC2, 0x0B, 0xC2, 0x0B,
00963         0xC2, 0x0B, 0xC2, 0x0B, 0xC3, 0x0B, 0xC3, 0x0B, 0xC3, 0x0B, 0xC4, 0x0B, 0xC4, 0x0B, 0xC4, 0x0B,
00964         0xC5, 0x0C, 0xD6, 0x0C, 0xE8, 0x0E, 0xFA, 0x0F, 0xFC, 0x0F, 0xFD, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F,
00965         0xB0, 0x0E, 0xB0, 0x0E, 0xB0, 0x0E, 0xB0, 0x0F, 0xA0, 0x0F, 0xA0, 0x0F, 0xA0, 0x0F, 0xB0, 0x0F,
00966         0xB0, 0x0E, 0xB1, 0x0E, 0xB4, 0x0D, 0xE9, 0x0F, 0xED, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFE, 0x0E,
00967         0xFE, 0x0F, 0xFE, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFE, 0x0F,
00968         0xEC, 0x0F, 0xD9, 0x0F, 0xB5, 0x0E, 0xA3, 0x0D, 0xA1, 0x0D, 0xB0, 0x0E, 0xB0, 0x0F, 0xB0, 0x0F,
00969         0xA0, 0x0F, 0xA0, 0x0F, 0xB0, 0x0F, 0xB0, 0x0F, 0xA0, 0x0F, 0xA0, 0x0F, 0xB0, 0x0F, 0xB0, 0x0F,
00970         0xA0, 0x0F, 0xA0, 0x0E, 0xB1, 0x0E, 0xB2, 0x0E, 0xA2, 0x0D, 0x92, 0x0B, 0x81, 0x0A, 0x82, 0x09,
00971         0x73, 0x09, 0x74, 0x09, 0x74, 0x08, 0x86, 0x08, 0x98, 0x08, 0xAA, 0x08, 0xBC, 0x08, 0xAC, 0x07,
00972         0xAD, 0x07, 0xAD, 0x07, 0xAD, 0x07, 0xAD, 0x08, 0xAD, 0x08, 0xAC, 0x08, 0xAC, 0x08, 0xCE, 0x0A,
00973         0xEE, 0x0D, 0xFF, 0x0E, 0xFF, 0x0E, 0xDF, 0x0C, 0xBD, 0x09, 0xAC, 0x08, 0xAD, 0x08, 0xBD, 0x08,
00974         0xAD, 0x07, 0xBE, 0x07, 0xAD, 0x07, 0xAD, 0x07, 0xAC, 0x07, 0xBA, 0x08, 0xA9, 0x08, 0x85, 0x06,
00975         0x94, 0x07, 0x94, 0x07, 0x84, 0x07, 0x84, 0x07, 0x92, 0x08, 0xA1, 0x08, 0xC0, 0x0A, 0xD1, 0x0B,
00976         0xC1, 0x0B, 0xC1, 0x0B, 0xC2, 0x0C, 0xD2, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC1, 0x0C, 0xC1, 0x0B,
00977         0xC1, 0x0C, 0xC1, 0x0C, 0xC1, 0x0C, 0xD1, 0x0C, 0xD1, 0x0C, 0xC1, 0x0C, 0xC1, 0x0C, 0xC1, 0x0B,
00978         0xC1, 0x0B, 0xC1, 0x0B, 0xC1, 0x0B, 0xC1, 0x0B, 0xC1, 0x0B, 0xC1, 0x0B, 0xC1, 0x0B, 0xC1, 0x0B,
00979         0xC1, 0x0B, 0xC1, 0x0B, 0xC1, 0x0B, 0xC1, 0x0B, 0xC1, 0x0B, 0xC1, 0x0B, 0xC1, 0x0B, 0xC2, 0x0B,
00980         0xC2, 0x0B, 0xC2, 0x0B, 0xC2, 0x0B, 0xC3, 0x0B, 0xC3, 0x0B, 0xC3, 0x0B, 0xC4, 0x0C, 0xD6, 0x0C,
00981         0xE9, 0x0E, 0xFB, 0x0E, 0xFC, 0x0F, 0xFD, 0x0F, 0xB0, 0x0E, 0xB0, 0x0E, 0xB0, 0x0E, 0xB0, 0x0F,
00982         0xA0, 0x0F, 0xA0, 0x0F, 0xA0, 0x0F, 0xB0, 0x0F, 0xB0, 0x0E, 0xB1, 0x0E, 0xB4, 0x0D, 0xE9, 0x0F,
00983         0xED, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFE, 0x0E, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00984         0xFF, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFC, 0x0F, 0xD9, 0x0F, 0xC6, 0x0E, 0xA2, 0x0D, 0xA1, 0x0D,
00985         0xB1, 0x0E, 0xB0, 0x0F, 0xB0, 0x0F, 0xB0, 0x0F, 0xA0, 0x0F, 0xB0, 0x0F, 0xB0, 0x0F, 0xB0, 0x0F,
00986         0xA0, 0x0F, 0xA0, 0x0E, 0xA0, 0x0F, 0xB0, 0x0F, 0xA0, 0x0F, 0xA0, 0x0F, 0xA1, 0x0E, 0xB1, 0x0E,
00987         0xB2, 0x0D, 0xA2, 0x0C, 0x91, 0x0A, 0x71, 0x09, 0x82, 0x0A, 0x73, 0x09, 0x74, 0x08, 0x86, 0x08,
00988         0x98, 0x08, 0xAA, 0x08, 0xBC, 0x08, 0xAC, 0x07, 0xAC, 0x07, 0xBD, 0x07, 0xAC, 0x07, 0xAC, 0x07,
00989         0xAD, 0x08, 0xAC, 0x08, 0xAC, 0x08, 0xBC, 0x09, 0xDD, 0x0B, 0xEF, 0x0D, 0xEF, 0x0C, 0xCE, 0x0B,
00990         0x9B, 0x07, 0xAD, 0x08, 0xBD, 0x08, 0xAC, 0x07, 0xAD, 0x07, 0xBE, 0x07, 0xAE, 0x07, 0xAD, 0x07,
00991         0xAC, 0x07, 0xBB, 0x08, 0xA9, 0x08, 0x85, 0x06, 0x83, 0x07, 0x94, 0x07, 0x94, 0x08, 0x83, 0x07,
00992         0x91, 0x08, 0xB1, 0x0A, 0xC0, 0x0B, 0xD0, 0x0B, 0xD0, 0x0B, 0xC1, 0x0B, 0xC2, 0x0C, 0xC2, 0x0C,
00993         0xC0, 0x0C, 0xD0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xD0, 0x0C,
00994         0xD0, 0x0C, 0xD0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C,
00995         0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C,
00996         0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC1, 0x0C, 0xC1, 0x0B, 0xC1, 0x0C, 0xC2, 0x0C, 0xC2, 0x0C,
00997         0xC2, 0x0C, 0xC2, 0x0B, 0xC2, 0x0B, 0xB3, 0x0B, 0xD7, 0x0C, 0xE9, 0x0D, 0xFB, 0x0E, 0xFC, 0x0F,
00998         0xB0, 0x0E, 0xB0, 0x0E, 0xB0, 0x0F, 0xB0, 0x0F, 0xA0, 0x0F, 0xA0, 0x0F, 0xA0, 0x0F, 0xB0, 0x0F,
00999         0xB0, 0x0E, 0xB2, 0x0E, 0xB4, 0x0D, 0xEA, 0x0F, 0xED, 0x0F, 0xFF, 0x0F, 0xFE, 0x0F, 0xFF, 0x0E,
01000         0xFF, 0x0F, 0xFF, 0x0F, 0xEF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xED, 0x0F, 0xEC, 0x0F, 0xEA, 0x0F,
01001         0xC6, 0x0E, 0xB3, 0x0E, 0xB2, 0x0D, 0xB1, 0x0E, 0xB1, 0x0F, 0xB0, 0x0F, 0xB0, 0x0F, 0xB0, 0x0F,
01002         0xA0, 0x0F, 0xB0, 0x0F, 0xA0, 0x0F, 0xA0, 0x0F, 0xA0, 0x0E, 0xB0, 0x0F, 0xA0, 0x0F, 0xA0, 0x0F,
01003         0xB0, 0x0F, 0xB1, 0x0F, 0xB1, 0x0F, 0xA1, 0x0E, 0xB2, 0x0E, 0xB3, 0x0E, 0xA2, 0x0C, 0x70, 0x09,
01004         0x72, 0x0A, 0x73, 0x09, 0x74, 0x09, 0x85, 0x08, 0x98, 0x08, 0xAA, 0x08, 0xBC, 0x08, 0xBC, 0x07,
01005         0xBD, 0x07, 0xBD, 0x07, 0xAD, 0x07, 0xAD, 0x07, 0xAD, 0x08, 0xAD, 0x08, 0xAD, 0x08, 0xAC, 0x08,
01006         0xBC, 0x09, 0xFF, 0x0D, 0xDE, 0x0B, 0x9B, 0x07, 0xAC, 0x08, 0xAD, 0x08, 0xAC, 0x07, 0xAD, 0x07,
01007         0xAD, 0x07, 0xBE, 0x07, 0xAE, 0x07, 0xAD, 0x07, 0xAC, 0x07, 0xBB, 0x08, 0xA9, 0x08, 0x85, 0x06,
01008         0x83, 0x07, 0x93, 0x08, 0x83, 0x07, 0x82, 0x07, 0xA2, 0x09, 0xC2, 0x0B, 0xD0, 0x0B, 0xC0, 0x0B,
01009         0xD0, 0x0C, 0xC1, 0x0C, 0xC1, 0x0C, 0xC1, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xD0, 0x0C, 0xD0, 0x0C,
01010         0xC0, 0x0C, 0xC1, 0x0C, 0xC1, 0x0C, 0xC1, 0x0C, 0xC1, 0x0C, 0xC1, 0x0C, 0xC1, 0x0C, 0xC1, 0x0C,
01011         0xC1, 0x0C, 0xC1, 0x0C, 0xC1, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C,
01012         0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C,
01013         0xC0, 0x0C, 0xC1, 0x0C, 0xC1, 0x0C, 0xC1, 0x0C, 0xC1, 0x0C, 0xC1, 0x0C, 0xC1, 0x0C, 0xC2, 0x0C,
01014         0xB4, 0x0B, 0xC6, 0x0B, 0xD8, 0x0D, 0xFA, 0x0E, 0xB0, 0x0E, 0xB0, 0x0E, 0xB0, 0x0F, 0xB0, 0x0F,
01015         0xA0, 0x0F, 0xA0, 0x0F, 0xA0, 0x0F, 0xB0, 0x0F, 0xB0, 0x0E, 0xB2, 0x0E, 0xB4, 0x0D, 0xEA, 0x0F,
01016         0xED, 0x0F, 0xFF, 0x0F, 0xFE, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xEE, 0x0F,
01017         0xFD, 0x0F, 0xFC, 0x0F, 0xEA, 0x0F, 0xC6, 0x0E, 0xB3, 0x0D, 0xB2, 0x0D, 0xB1, 0x0E, 0xB1, 0x0F,
01018         0xB1, 0x0F, 0xB0, 0x0F, 0xA0, 0x0F, 0xA0, 0x0F, 0xA0, 0x0F, 0xA0, 0x0F, 0xA0, 0x0F, 0xB1, 0x0F,
01019         0xB0, 0x0F, 0xA0, 0x0F, 0xA0, 0x0F, 0xA0, 0x0F, 0xA0, 0x0F, 0xB0, 0x0F, 0xB0, 0x0F, 0xA1, 0x0E,
01020         0xB1, 0x0E, 0xB2, 0x0E, 0xA2, 0x0D, 0x91, 0x0B, 0x71, 0x0A, 0x73, 0x0A, 0x84, 0x09, 0x85, 0x08,
01021         0x98, 0x08, 0xAA, 0x08, 0xBC, 0x08, 0xBC, 0x07, 0xBD, 0x07, 0xBD, 0x07, 0xAD, 0x07, 0xAD, 0x07,
01022         0xAD, 0x08, 0xAD, 0x08, 0xAD, 0x08, 0xAC, 0x08, 0xBC, 0x08, 0xDD, 0x0A, 0xBD, 0x09, 0x9C, 0x07,
01023         0xAD, 0x08, 0xAD, 0x08, 0xAC, 0x07, 0xAD, 0x07, 0xAD, 0x07, 0xBE, 0x07, 0xAE, 0x07, 0xAD, 0x07,
01024         0xAC, 0x08, 0xAB, 0x08, 0xA9, 0x08, 0x85, 0x06, 0x94, 0x07, 0x92, 0x07, 0x82, 0x07, 0x92, 0x08,
01025         0xB2, 0x0A, 0xC2, 0x0B, 0xC0, 0x0B, 0xC0, 0x0B, 0xD0, 0x0C, 0xD0, 0x0C, 0xC1, 0x0C, 0xC1, 0x0C,
01026         0xC0, 0x0C, 0xC0, 0x0C, 0xD0, 0x0C, 0xD0, 0x0C, 0xC0, 0x0C, 0xC1, 0x0C, 0xC1, 0x0C, 0xC1, 0x0C,
01027         0xC1, 0x0C, 0xC1, 0x0C, 0xC1, 0x0C, 0xC1, 0x0C, 0xC1, 0x0C, 0xC1, 0x0C, 0xC1, 0x0C, 0xC0, 0x0C,
01028         0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C,
01029         0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C,
01030         0xC1, 0x0C, 0xC1, 0x0C, 0xC1, 0x0C, 0xC2, 0x0C, 0xC3, 0x0B, 0xC4, 0x0B, 0xD6, 0x0C, 0xE8, 0x0D,
01031         0xB0, 0x0E, 0xB0, 0x0E, 0xB0, 0x0F, 0xB0, 0x0F, 0xA0, 0x0F, 0xA0, 0x0F, 0xA0, 0x0F, 0xB0, 0x0F,
01032         0xB0, 0x0E, 0xB2, 0x0E, 0xB4, 0x0D, 0xEA, 0x0F, 0xED, 0x0F, 0xFF, 0x0F, 0xFE, 0x0F, 0xFF, 0x0F,
01033         0xFF, 0x0F, 0xFF, 0x0F, 0xEF, 0x0F, 0xED, 0x0F, 0xFC, 0x0F, 0xEA, 0x0F, 0xC6, 0x0F, 0xB3, 0x0D,
01034         0xA2, 0x0D, 0xA1, 0x0E, 0xB0, 0x0E, 0xB0, 0x0F, 0xB0, 0x0F, 0xA0, 0x0F, 0xA0, 0x0F, 0xA1, 0x0F,
01035         0xA0, 0x0F, 0xA0, 0x0E, 0xA0, 0x0E, 0xB1, 0x0F, 0xB1, 0x0F, 0xA1, 0x0E, 0xA0, 0x0E, 0xB1, 0x0F,
01036         0xA0, 0x0F, 0xB0, 0x0F, 0xB0, 0x0F, 0xB0, 0x0E, 0xB1, 0x0E, 0xB1, 0x0E, 0xB2, 0x0D, 0xA2, 0x0D,
01037         0x70, 0x0A, 0x82, 0x0A, 0x83, 0x09, 0x85, 0x08, 0x98, 0x08, 0xBB, 0x09, 0xBC, 0x08, 0xAC, 0x07,
01038         0xAD, 0x07, 0xBD, 0x07, 0xAD, 0x07, 0xAD, 0x07, 0xAD, 0x07, 0xAD, 0x08, 0xAD, 0x08, 0xAC, 0x08,
01039         0xAC, 0x07, 0xBC, 0x08, 0xAC, 0x07, 0xAC, 0x07, 0xAD, 0x08, 0xAD, 0x08, 0xAD, 0x07, 0xBD, 0x07,
01040         0xAD, 0x07, 0xBE, 0x07, 0xAE, 0x07, 0xAD, 0x07, 0xAC, 0x08, 0xAB, 0x08, 0xA9, 0x08, 0x85, 0x06,
01041         0xA4, 0x08, 0x81, 0x07, 0x81, 0x07, 0xB3, 0x0A, 0xC3, 0x0B, 0xC1, 0x0B, 0xC0, 0x0B, 0xC0, 0x0B,
01042         0xD0, 0x0C, 0xD0, 0x0C, 0xC1, 0x0C, 0xC1, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C,
01043         0xC0, 0x0C, 0xC0, 0x0C, 0xC1, 0x0C, 0xC0, 0x0C, 0xC1, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C,
01044         0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C,
01045         0xC1, 0x0C, 0xC1, 0x0C, 0xC1, 0x0C, 0xC1, 0x0C, 0xC1, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C,
01046         0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC1, 0x0C,
01047         0xC2, 0x0B, 0xC3, 0x0B, 0xC4, 0x0B, 0xD5, 0x0C, 0xB0, 0x0E, 0xB0, 0x0E, 0xB0, 0x0F, 0xB0, 0x0F,
01048         0xA0, 0x0F, 0xA0, 0x0F, 0xA0, 0x0F, 0xB0, 0x0F, 0xB0, 0x0E, 0xB2, 0x0E, 0xB4, 0x0D, 0xEA, 0x0F,
01049         0xED, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xEF, 0x0F, 0xEE, 0x0F, 0xFD, 0x0F,
01050         0xEA, 0x0F, 0xC7, 0x0E, 0xB3, 0x0D, 0xA2, 0x0D, 0xB1, 0x0E, 0xB0, 0x0E, 0xB0, 0x0F, 0xA0, 0x0F,
01051         0xA0, 0x0F, 0xA0, 0x0F, 0xA1, 0x0F, 0xB1, 0x0F, 0xB1, 0x0F, 0xA0, 0x0E, 0xB1, 0x0E, 0xB1, 0x0E,
01052         0xB1, 0x0E, 0xA1, 0x0E, 0xA1, 0x0E, 0xB1, 0x0F, 0xB1, 0x0F, 0xB0, 0x0F, 0xB0, 0x0F, 0xB0, 0x0F,
01053         0xB1, 0x0E, 0xB1, 0x0E, 0xB1, 0x0E, 0xB2, 0x0E, 0x91, 0x0B, 0x82, 0x0A, 0x72, 0x09, 0x84, 0x08,
01054         0x98, 0x08, 0xAB, 0x09, 0xBC, 0x08, 0xAC, 0x07, 0xAD, 0x07, 0xBD, 0x07, 0xAD, 0x07, 0xBD, 0x07,
01055         0xAD, 0x07, 0xAD, 0x07, 0xAD, 0x08, 0xAC, 0x08, 0xBC, 0x08, 0xAC, 0x07, 0xAC, 0x07, 0xAD, 0x08,
01056         0xAD, 0x08, 0xAD, 0x08, 0xAD, 0x08, 0xAD, 0x07, 0xAD, 0x07, 0xBE, 0x07, 0xAD, 0x07, 0xAD, 0x07,
01057         0xAC, 0x08, 0xAB, 0x08, 0xA9, 0x08, 0x85, 0x06, 0x93, 0x08, 0x80, 0x07, 0x91, 0x08, 0xC3, 0x0B,
01058         0xD2, 0x0B, 0xC1, 0x0B, 0xC0, 0x0B, 0xC0, 0x0B, 0xD0, 0x0C, 0xD0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C,
01059         0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C,
01060         0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C,
01061         0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC1, 0x0C, 0xC1, 0x0C, 0xC1, 0x0C, 0xC1, 0x0C,
01062         0xC1, 0x0C, 0xC1, 0x0C, 0xC1, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C,
01063         0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xD1, 0x0C, 0xC2, 0x0B, 0xC2, 0x0B, 0xC3, 0x0B,
01064         0xB0, 0x0E, 0xB0, 0x0E, 0xB0, 0x0F, 0xB0, 0x0F, 0xA0, 0x0F, 0xA0, 0x0F, 0xA0, 0x0F, 0xB0, 0x0F,
01065         0xB0, 0x0E, 0xB2, 0x0E, 0xB4, 0x0D, 0xEA, 0x0F, 0xED, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01066         0xFF, 0x0F, 0xEE, 0x0F, 0xED, 0x0F, 0xEB, 0x0F, 0xD8, 0x0F, 0xB4, 0x0D, 0xA1, 0x0D, 0xB1, 0x0E,
01067         0xB1, 0x0F, 0xB0, 0x0F, 0xA0, 0x0F, 0xA0, 0x0F, 0xA0, 0x0F, 0xA0, 0x0F, 0xB0, 0x0F, 0xB1, 0x0F,
01068         0xA1, 0x0E, 0xB1, 0x0E, 0xB1, 0x0E, 0xA1, 0x0E, 0xA1, 0x0E, 0xB1, 0x0E, 0xB1, 0x0F, 0xA1, 0x0E,
01069         0xB1, 0x0F, 0xA0, 0x0F, 0xA0, 0x0F, 0xB0, 0x0F, 0xB1, 0x0F, 0xB0, 0x0E, 0xB1, 0x0E, 0xB1, 0x0E,
01070         0xA2, 0x0D, 0x81, 0x0B, 0x72, 0x09, 0x84, 0x08, 0x98, 0x09, 0xAA, 0x08, 0xAC, 0x08, 0xAC, 0x07,
01071         0xAD, 0x07, 0xAD, 0x07, 0xAD, 0x07, 0xAD, 0x07, 0xAC, 0x07, 0xAC, 0x07, 0xAD, 0x08, 0xAC, 0x07,
01072         0xBD, 0x08, 0xAC, 0x07, 0xBD, 0x08, 0xAD, 0x08, 0xAD, 0x07, 0xAD, 0x08, 0xBD, 0x08, 0xAC, 0x07,
01073         0xAD, 0x07, 0xBD, 0x07, 0xAD, 0x07, 0xAD, 0x07, 0xAC, 0x08, 0xAB, 0x08, 0xA9, 0x08, 0x85, 0x06,
01074         0x92, 0x07, 0x90, 0x07, 0xB1, 0x09, 0xD2, 0x0B, 0xC2, 0x0B, 0xC1, 0x0B, 0xD1, 0x0B, 0xC0, 0x0B,
01075         0xC0, 0x0B, 0xC0, 0x0B, 0xC0, 0x0C, 0xD0, 0x0C, 0xD0, 0x0C, 0xD1, 0x0C, 0xC1, 0x0C, 0xC1, 0x0C,
01076         0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C,
01077         0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xD0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C,
01078         0xC1, 0x0C, 0xC1, 0x0C, 0xC1, 0x0C, 0xC1, 0x0C, 0xC1, 0x0C, 0xC1, 0x0C, 0xC1, 0x0C, 0xC1, 0x0C,
01079         0xC1, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xD0, 0x0C, 0xD0, 0x0C, 0xD0, 0x0C, 0xD0, 0x0C,
01080         0xC1, 0x0B, 0xC1, 0x0B, 0xC2, 0x0B, 0xC2, 0x0B, 0xB0, 0x0E, 0xB0, 0x0E, 0xB0, 0x0F, 0xB0, 0x0F,
01081         0xA0, 0x0F, 0xA0, 0x0F, 0xA0, 0x0F, 0xB0, 0x0F, 0xB0, 0x0E, 0xB2, 0x0E, 0xB4, 0x0D, 0xEA, 0x0F,
01082         0xED, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFC, 0x0F, 0xD8, 0x0F,
01083         0xC5, 0x0E, 0xB2, 0x0D, 0xB1, 0x0E, 0xB0, 0x0E, 0xB0, 0x0F, 0xB0, 0x0F, 0xB0, 0x0F, 0xA0, 0x0F,
01084         0xB1, 0x0F, 0xB1, 0x0F, 0xA0, 0x0F, 0xA0, 0x0E, 0xB1, 0x0E, 0xB1, 0x0E, 0xB1, 0x0E, 0xB2, 0x0E,
01085         0xB2, 0x0E, 0xB2, 0x0E, 0xB2, 0x0E, 0xA1, 0x0E, 0xA1, 0x0E, 0xA0, 0x0E, 0xA0, 0x0F, 0xB0, 0x0F,
01086         0xB0, 0x0F, 0xB1, 0x0E, 0xB0, 0x0E, 0xB1, 0x0E, 0xB2, 0x0E, 0x91, 0x0C, 0x82, 0x09, 0x84, 0x08,
01087         0x97, 0x09, 0xAA, 0x08, 0xAC, 0x08, 0xAD, 0x07, 0xAD, 0x07, 0xAD, 0x07, 0xAD, 0x07, 0xAC, 0x07,
01088         0xAC, 0x07, 0xAC, 0x07, 0xAC, 0x08, 0xAC, 0x07, 0xAD, 0x07, 0xBD, 0x07, 0xBE, 0x08, 0xAD, 0x07,
01089         0xAD, 0x07, 0xAD, 0x07, 0xBD, 0x08, 0xAC, 0x07, 0xAC, 0x07, 0xBD, 0x07, 0xAD, 0x07, 0xAD, 0x07,
01090         0xAC, 0x08, 0xAB, 0x08, 0xA9, 0x08, 0x85, 0x06, 0x92, 0x07, 0xA1, 0x09, 0xC2, 0x0B, 0xD2, 0x0B,
01091         0xC1, 0x0B, 0xC1, 0x0B, 0xD1, 0x0C, 0xC1, 0x0B, 0xC0, 0x0B, 0xC0, 0x0B, 0xD0, 0x0C, 0xD0, 0x0C,
01092         0xD0, 0x0C, 0xC1, 0x0C, 0xC2, 0x0C, 0xC2, 0x0C, 0xC1, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C,
01093         0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C,
01094         0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC1, 0x0C, 0xC1, 0x0C, 0xC1, 0x0C, 0xC1, 0x0C,
01095         0xC1, 0x0C, 0xC1, 0x0C, 0xC1, 0x0C, 0xC1, 0x0C, 0xC1, 0x0C, 0xC1, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C,
01096         0xC0, 0x0C, 0xD0, 0x0C, 0xD0, 0x0C, 0xD0, 0x0C, 0xC0, 0x0B, 0xC1, 0x0B, 0xC1, 0x0C, 0xC1, 0x0B,
01097         0xB0, 0x0E, 0xB0, 0x0E, 0xB0, 0x0F, 0xB0, 0x0F, 0xA0, 0x0F, 0xA0, 0x0F, 0xA0, 0x0F, 0xB0, 0x0F,
01098         0xB0, 0x0E, 0xB2, 0x0E, 0xA4, 0x0D, 0xEA, 0x0F, 0xED, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFE, 0x0F,
01099         0xFE, 0x0F, 0xFC, 0x0F, 0xD9, 0x0F, 0xC6, 0x0D, 0xB3, 0x0D, 0xB1, 0x0E, 0xB1, 0x0E, 0xB0, 0x0F,
01100         0xA0, 0x0E, 0xB0, 0x0F, 0xB1, 0x0F, 0xA1, 0x0F, 0xA0, 0x0F, 0xB0, 0x0F, 0xB0, 0x0F, 0xA0, 0x0E,
01101         0xB1, 0x0E, 0xA1, 0x0D, 0xB2, 0x0E, 0xC3, 0x0F, 0xD4, 0x0F, 0xC3, 0x0F, 0xB1, 0x0E, 0xA1, 0x0E,
01102         0xA0, 0x0E, 0xA0, 0x0F, 0xA0, 0x0F, 0xB0, 0x0F, 0xB0, 0x0F, 0xB0, 0x0F, 0xB0, 0x0E, 0xB1, 0x0E,
01103         0xB1, 0x0E, 0xA2, 0x0D, 0x92, 0x0A, 0x84, 0x09, 0x97, 0x08, 0xAA, 0x09, 0xAC, 0x08, 0xAD, 0x07,
01104         0xAD, 0x07, 0xAD, 0x07, 0xAD, 0x07, 0xBC, 0x07, 0xAC, 0x07, 0xAC, 0x07, 0xAC, 0x08, 0xAC, 0x07,
01105         0xAC, 0x07, 0xAD, 0x07, 0xAD, 0x07, 0xAD, 0x07, 0xAD, 0x07, 0xAD, 0x07, 0xBC, 0x08, 0xBC, 0x07,
01106         0xAC, 0x07, 0xBD, 0x07, 0xAD, 0x07, 0xAD, 0x08, 0xAC, 0x08, 0xAB, 0x08, 0xAA, 0x08, 0x85, 0x06,
01107         0x92, 0x08, 0xC2, 0x0A, 0xD2, 0x0B, 0xD1, 0x0B, 0xC1, 0x0B, 0xD1, 0x0B, 0xC1, 0x0B, 0xC1, 0x0B,
01108         0xC0, 0x0C, 0xD0, 0x0C, 0xD0, 0x0C, 0xD0, 0x0C, 0xD0, 0x0C, 0xC1, 0x0C, 0xC2, 0x0C, 0xC2, 0x0C,
01109         0xC1, 0x0C, 0xC1, 0x0C, 0xC1, 0x0C, 0xC1, 0x0C, 0xC1, 0x0C, 0xC1, 0x0C, 0xC1, 0x0C, 0xC1, 0x0C,
01110         0xC1, 0x0C, 0xC1, 0x0C, 0xC1, 0x0C, 0xC1, 0x0C, 0xC1, 0x0C, 0xC1, 0x0C, 0xC1, 0x0C, 0xC1, 0x0C,
01111         0xC1, 0x0C, 0xC0, 0x0C, 0xC0, 0x0B, 0xC0, 0x0B, 0xC1, 0x0C, 0xC1, 0x0C, 0xC1, 0x0C, 0xD1, 0x0C,
01112         0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C,
01113         0xC0, 0x0C, 0xC0, 0x0C, 0xC1, 0x0C, 0xC1, 0x0B, 0xB0, 0x0E, 0xB0, 0x0E, 0xB0, 0x0F, 0xB0, 0x0F,
01114         0xA0, 0x0F, 0xA0, 0x0F, 0xB0, 0x0F, 0xB0, 0x0F, 0xB0, 0x0E, 0xB2, 0x0E, 0xA4, 0x0D, 0xEA, 0x0F,
01115         0xED, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFD, 0x0F, 0xFC, 0x0F, 0xEA, 0x0F, 0xC6, 0x0E, 0xB4, 0x0D,
01116         0xB1, 0x0D, 0xB0, 0x0E, 0xB0, 0x0E, 0xB0, 0x0F, 0xA0, 0x0F, 0xB1, 0x0F, 0xB1, 0x0F, 0xA1, 0x0F,
01117         0xA0, 0x0E, 0xA0, 0x0F, 0xB0, 0x0F, 0xB1, 0x0F, 0xB2, 0x0E, 0xA2, 0x0C, 0xB3, 0x0D, 0xE6, 0x0F,
01118         0xE7, 0x0F, 0xC4, 0x0F, 0xA1, 0x0D, 0xA1, 0x0E, 0xA0, 0x0E, 0xB0, 0x0F, 0xB0, 0x0F, 0xA0, 0x0F,
01119         0xA0, 0x0E, 0xB0, 0x0F, 0xB0, 0x0F, 0xB1, 0x0E, 0xA0, 0x0E, 0xB2, 0x0E, 0xA3, 0x0C, 0x83, 0x09,
01120         0x86, 0x08, 0xAA, 0x09, 0xBC, 0x09, 0xAD, 0x07, 0xAD, 0x07, 0xAD, 0x07, 0xAD, 0x07, 0xAD, 0x07,
01121         0xAC, 0x07, 0xAC, 0x07, 0xAC, 0x07, 0xAC, 0x07, 0xAD, 0x07, 0xAD, 0x07, 0xAD, 0x07, 0xAD, 0x07,
01122         0xBD, 0x08, 0xAD, 0x08, 0xAC, 0x07, 0xBC, 0x07, 0xAC, 0x07, 0xBC, 0x07, 0xAD, 0x07, 0xAD, 0x08,
01123         0xAC, 0x08, 0xAB, 0x08, 0xA9, 0x08, 0x85, 0x07, 0xA2, 0x09, 0xD2, 0x0B, 0xD2, 0x0B, 0xC1, 0x0B,
01124         0xD1, 0x0B, 0xD1, 0x0B, 0xC1, 0x0B, 0xC1, 0x0B, 0xD0, 0x0C, 0xD0, 0x0C, 0xD0, 0x0C, 0xD0, 0x0C,
01125         0xC1, 0x0C, 0xC2, 0x0B, 0xC3, 0x0B, 0xC3, 0x0B, 0xC3, 0x0B, 0xC2, 0x0B, 0xC2, 0x0B, 0xC2, 0x0B,
01126         0xC2, 0x0B, 0xC2, 0x0B, 0xC2, 0x0B, 0xC2, 0x0B, 0xC2, 0x0B, 0xC2, 0x0B, 0xC2, 0x0B, 0xC2, 0x0B,
01127         0xC2, 0x0B, 0xC2, 0x0B, 0xC2, 0x0B, 0xC2, 0x0B, 0xC2, 0x0B, 0xC2, 0x0B, 0xC2, 0x0B, 0xC1, 0x0B,
01128         0xC1, 0x0B, 0xC1, 0x0C, 0xC1, 0x0C, 0xD1, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C,
01129         0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0B, 0xC0, 0x0B, 0xC0, 0x0B,
01130         0xB0, 0x0E, 0xB0, 0x0E, 0xB0, 0x0F, 0xA0, 0x0F, 0xA0, 0x0F, 0xA0, 0x0F, 0xB0, 0x0F, 0xB0, 0x0F,
01131         0xB2, 0x0F, 0xA2, 0x0D, 0xA4, 0x0C, 0xEA, 0x0F, 0xFC, 0x0F, 0xED, 0x0F, 0xED, 0x0F, 0xFC, 0x0F,
01132         0xE9, 0x0F, 0xC5, 0x0E, 0xB3, 0x0D, 0xB2, 0x0E, 0xB0, 0x0E, 0xB0, 0x0E, 0xB0, 0x0F, 0xA0, 0x0F,
01133         0xB0, 0x0F, 0xA1, 0x0F, 0xA1, 0x0F, 0xB1, 0x0F, 0xB1, 0x0F, 0xB0, 0x0F, 0xB0, 0x0E, 0xB1, 0x0E,
01134         0xA3, 0x0C, 0xB6, 0x0D, 0xD8, 0x0F, 0xEA, 0x0F, 0xF9, 0x0F, 0xB3, 0x0D, 0xA1, 0x0D, 0xB1, 0x0E,
01135         0xB1, 0x0F, 0xA0, 0x0F, 0xA0, 0x0F, 0xB0, 0x0F, 0xB0, 0x0F, 0xA0, 0x0E, 0xB0, 0x0E, 0xB0, 0x0F,
01136         0xA0, 0x0E, 0xB2, 0x0F, 0xB3, 0x0D, 0x94, 0x0A, 0x96, 0x09, 0xA9, 0x09, 0xBC, 0x08, 0xAC, 0x07,
01137         0xAD, 0x07, 0xAD, 0x07, 0xAD, 0x07, 0xAD, 0x07, 0xAD, 0x07, 0xAD, 0x07, 0xAD, 0x07, 0xAD, 0x07,
01138         0xAD, 0x07, 0xAD, 0x07, 0xAD, 0x07, 0xAD, 0x07, 0xAD, 0x08, 0xAD, 0x08, 0xAD, 0x07, 0xAC, 0x07,
01139         0xBC, 0x07, 0xAC, 0x07, 0xAD, 0x07, 0xAD, 0x08, 0xAC, 0x08, 0xAB, 0x08, 0xA8, 0x08, 0xA5, 0x08,
01140         0xC2, 0x0A, 0xD1, 0x0B, 0xD1, 0x0B, 0xC1, 0x0B, 0xC1, 0x0B, 0xC1, 0x0B, 0xD0, 0x0C, 0xC0, 0x0C,
01141         0xD0, 0x0C, 0xD0, 0x0C, 0xC1, 0x0B, 0xD1, 0x0C, 0xD2, 0x0C, 0xB1, 0x0A, 0xD6, 0x0D, 0xD6, 0x0C,
01142         0xD6, 0x0C, 0xD6, 0x0C, 0xD6, 0x0C, 0xD6, 0x0C, 0xD6, 0x0C, 0xD6, 0x0C, 0xD6, 0x0C, 0xD6, 0x0C,
01143         0xD6, 0x0C, 0xD6, 0x0C, 0xD6, 0x0C, 0xD6, 0x0C, 0xD6, 0x0C, 0xD6, 0x0C, 0xD5, 0x0C, 0xD6, 0x0C,
01144         0xD6, 0x0D, 0xD6, 0x0C, 0xD5, 0x0D, 0xD5, 0x0D, 0xD4, 0x0C, 0xC2, 0x0B, 0xC1, 0x0B, 0xC1, 0x0C,
01145         0xD1, 0x0C, 0xD1, 0x0C, 0xD0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C,
01146         0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xB0, 0x0E, 0xB0, 0x0E, 0xB0, 0x0F, 0xA0, 0x0F,
01147         0xA0, 0x0F, 0xA0, 0x0F, 0xB0, 0x0F, 0xB0, 0x0F, 0xB1, 0x0E, 0xB3, 0x0D, 0xB5, 0x0D, 0xEA, 0x0F,
01148         0xEB, 0x0F, 0xEC, 0x0F, 0xFC, 0x0F, 0xEA, 0x0F, 0xD6, 0x0F, 0xB3, 0x0E, 0xA2, 0x0D, 0xB1, 0x0E,
01149         0xB0, 0x0E, 0xB0, 0x0E, 0xB0, 0x0F, 0xA0, 0x0F, 0xA0, 0x0F, 0xB1, 0x0F, 0xB1, 0x0F, 0xA1, 0x0E,
01150         0xA1, 0x0E, 0xB1, 0x0E, 0xB0, 0x0E, 0xA1, 0x0D, 0xC5, 0x0D, 0xD9, 0x0E, 0xEB, 0x0F, 0xFB, 0x0F,
01151         0xEA, 0x0F, 0xB5, 0x0D, 0xB2, 0x0D, 0xB0, 0x0E, 0xB0, 0x0E, 0xB0, 0x0F, 0xA0, 0x0F, 0xB0, 0x0F,
01152         0xB0, 0x0F, 0xA0, 0x0E, 0xB0, 0x0E, 0xB0, 0x0F, 0xA1, 0x0F, 0xB2, 0x0F, 0xB3, 0x0D, 0xA5, 0x0B,
01153         0xA7, 0x09, 0xA9, 0x08, 0xAB, 0x08, 0xAC, 0x07, 0xAD, 0x07, 0xAD, 0x07, 0xAD, 0x07, 0xAD, 0x07,
01154         0xAD, 0x07, 0xAD, 0x07, 0xAD, 0x07, 0xAD, 0x07, 0xAD, 0x07, 0xAD, 0x07, 0xAC, 0x07, 0xAC, 0x08,
01155         0xAD, 0x08, 0xAD, 0x08, 0xAD, 0x07, 0xAC, 0x07, 0xAC, 0x07, 0xBC, 0x07, 0xBD, 0x07, 0xAD, 0x08,
01156         0xAD, 0x08, 0xAB, 0x08, 0xA9, 0x08, 0xB6, 0x09, 0xC2, 0x0B, 0xC0, 0x0B, 0xC1, 0x0B, 0xC2, 0x0B,
01157         0xC2, 0x0C, 0xC1, 0x0C, 0xC0, 0x0C, 0xD0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC1, 0x0B, 0xC1, 0x0B,
01158         0xD2, 0x0C, 0xC3, 0x0B, 0xF9, 0x0F, 0xFA, 0x0F, 0xFB, 0x0F, 0xFB, 0x0F, 0xFB, 0x0F, 0xFB, 0x0F,
01159         0xFB, 0x0F, 0xFB, 0x0F, 0xFB, 0x0F, 0xFB, 0x0F, 0xFB, 0x0F, 0xFB, 0x0F, 0xFB, 0x0F, 0xFB, 0x0F,
01160         0xFB, 0x0F, 0xFB, 0x0F, 0xFB, 0x0F, 0xFB, 0x0F, 0xFB, 0x0F, 0xFB, 0x0F, 0xFA, 0x0F, 0xFA, 0x0F,
01161         0xF8, 0x0E, 0xE6, 0x0D, 0xC3, 0x0C, 0xC2, 0x0B, 0xC1, 0x0B, 0xC1, 0x0B, 0xC0, 0x0C, 0xC0, 0x0C,
01162         0xC0, 0x0C, 0xC0, 0x0C, 0xC1, 0x0C, 0xC1, 0x0C, 0xC1, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C,
01163         0xB0, 0x0E, 0xB0, 0x0E, 0xB0, 0x0F, 0xA0, 0x0F, 0xA0, 0x0F, 0xA0, 0x0F, 0xB0, 0x0F, 0xB0, 0x0F,
01164         0xA1, 0x0E, 0xB3, 0x0E, 0xB5, 0x0D, 0xE9, 0x0F, 0xEA, 0x0F, 0xFB, 0x0F, 0xEA, 0x0F, 0xD8, 0x0E,
01165         0xB4, 0x0E, 0xA1, 0x0D, 0xA1, 0x0D, 0xB1, 0x0E, 0xB1, 0x0E, 0xB0, 0x0F, 0xB0, 0x0F, 0xA0, 0x0F,
01166         0xA0, 0x0F, 0xB0, 0x0F, 0xB1, 0x0F, 0xB1, 0x0E, 0xA1, 0x0E, 0xB1, 0x0E, 0xB2, 0x0E, 0xA3, 0x0D,
01167         0xD8, 0x0E, 0xEB, 0x0F, 0xFC, 0x0F, 0xFC, 0x0F, 0xFA, 0x0F, 0xC5, 0x0E, 0xB2, 0x0D, 0xB0, 0x0D,
01168         0xB0, 0x0E, 0xB1, 0x0F, 0xB1, 0x0F, 0xA0, 0x0F, 0xA0, 0x0E, 0xB0, 0x0E, 0xB0, 0x0E, 0xB0, 0x0E,
01169         0xB1, 0x0F, 0xA2, 0x0E, 0xA3, 0x0D, 0xA5, 0x0C, 0xA7, 0x0A, 0xA9, 0x08, 0xAB, 0x08, 0xAC, 0x07,
01170         0xAD, 0x07, 0xAD, 0x07, 0xAD, 0x07, 0xAD, 0x07, 0xAD, 0x07, 0xAD, 0x07, 0xAD, 0x07, 0xAD, 0x07,
01171         0xAD, 0x07, 0xAD, 0x07, 0xAD, 0x07, 0xAD, 0x08, 0xAD, 0x08, 0xAD, 0x08, 0xAD, 0x07, 0xAD, 0x07,
01172         0xBC, 0x07, 0xBC, 0x07, 0xBD, 0x07, 0xAD, 0x08, 0xAC, 0x08, 0xAB, 0x08, 0xB9, 0x09, 0xB6, 0x09,
01173         0xD4, 0x0C, 0xC1, 0x0B, 0xC1, 0x0B, 0xC2, 0x0B, 0xD2, 0x0C, 0xC1, 0x0C, 0xC0, 0x0B, 0xD0, 0x0C,
01174         0xC0, 0x0C, 0xC0, 0x0C, 0xC1, 0x0B, 0xC1, 0x0B, 0xC1, 0x0C, 0xC3, 0x0B, 0xF9, 0x0F, 0xFC, 0x0F,
01175         0xFD, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F,
01176         0xFE, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFD, 0x0F, 0xFD, 0x0F, 0xFD, 0x0F, 0xFD, 0x0F, 0xFD, 0x0F,
01177         0xFE, 0x0F, 0xFD, 0x0F, 0xFD, 0x0F, 0xFC, 0x0F, 0xFC, 0x0F, 0xFA, 0x0F, 0xD7, 0x0D, 0xC4, 0x0C,
01178         0xC2, 0x0B, 0xC1, 0x0B, 0xC0, 0x0B, 0xC0, 0x0B, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C,
01179         0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xD0, 0x0C, 0xB0, 0x0E, 0xB0, 0x0E, 0xB0, 0x0F, 0xA0, 0x0F,
01180         0xA0, 0x0F, 0xA0, 0x0F, 0xB0, 0x0F, 0xB0, 0x0F, 0xB1, 0x0E, 0xB2, 0x0E, 0xA4, 0x0D, 0xD8, 0x0F,
01181         0xEA, 0x0F, 0xFA, 0x0F, 0xD8, 0x0F, 0xB4, 0x0C, 0xB2, 0x0E, 0xB1, 0x0E, 0xB1, 0x0E, 0xB1, 0x0E,
01182         0xB1, 0x0F, 0xA1, 0x0F, 0xA0, 0x0F, 0xA0, 0x0F, 0xB0, 0x0F, 0xA0, 0x0F, 0xB0, 0x0E, 0xB1, 0x0F,
01183         0xB2, 0x0E, 0xA2, 0x0D, 0xB4, 0x0D, 0xC7, 0x0E, 0xEA, 0x0F, 0xFC, 0x0F, 0xFD, 0x0F, 0xFD, 0x0F,
01184         0xFB, 0x0F, 0xC6, 0x0D, 0xB3, 0x0D, 0xB1, 0x0D, 0xB1, 0x0E, 0xB1, 0x0F, 0xB1, 0x0F, 0xA0, 0x0E,
01185         0xA0, 0x0E, 0xB0, 0x0F, 0xB1, 0x0E, 0xB0, 0x0E, 0xA1, 0x0F, 0xA2, 0x0E, 0xA4, 0x0D, 0xA5, 0x0B,
01186         0xA7, 0x09, 0xA9, 0x09, 0xAB, 0x08, 0xAC, 0x07, 0xAD, 0x07, 0xAD, 0x07, 0xAD, 0x07, 0xAD, 0x07,
01187         0xAD, 0x07, 0xAD, 0x07, 0xAD, 0x07, 0xAD, 0x07, 0xAD, 0x07, 0xAD, 0x07, 0xAD, 0x07, 0xAD, 0x07,
01188         0xAD, 0x07, 0xAD, 0x07, 0xAD, 0x07, 0xAD, 0x07, 0xBC, 0x07, 0xBC, 0x07, 0xAD, 0x07, 0xAD, 0x07,
01189         0xAC, 0x08, 0xAB, 0x08, 0xA8, 0x08, 0xA5, 0x08, 0xD4, 0x0B, 0xD2, 0x0B, 0xC1, 0x0B, 0xC1, 0x0B,
01190         0xC2, 0x0C, 0xC1, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xD1, 0x0C, 0xC1, 0x0C, 0xC1, 0x0C,
01191         0xC1, 0x0B, 0xC2, 0x0B, 0xF9, 0x0E, 0xFC, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xEF, 0x0F, 0xEF, 0x0F,
01192         0xEF, 0x0F, 0xEF, 0x0F, 0xEF, 0x0F, 0xEF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01193         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xEE, 0x0F, 0xEE, 0x0F,
01194         0xFD, 0x0F, 0xFC, 0x0F, 0xE9, 0x0E, 0xD6, 0x0D, 0xC3, 0x0B, 0xC1, 0x0B, 0xC0, 0x0C, 0xC0, 0x0C,
01195         0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xD0, 0x0C,
01196         0xB0, 0x0E, 0xB0, 0x0E, 0xB0, 0x0F, 0xA0, 0x0F, 0xA0, 0x0F, 0xA0, 0x0F, 0xB0, 0x0F, 0xB0, 0x0F,
01197         0xB1, 0x0E, 0xA2, 0x0E, 0xA3, 0x0D, 0xD7, 0x0F, 0xE8, 0x0F, 0xE8, 0x0F, 0xC5, 0x0E, 0xA2, 0x0C,
01198         0xB1, 0x0E, 0xB0, 0x0E, 0xB1, 0x0E, 0xB1, 0x0E, 0xA1, 0x0F, 0xA1, 0x0F, 0xA0, 0x0F, 0xA0, 0x0F,
01199         0xB0, 0x0F, 0xB0, 0x0E, 0xB0, 0x0E, 0xB1, 0x0E, 0xB2, 0x0D, 0xA4, 0x0D, 0xC7, 0x0E, 0xEB, 0x0F,
01200         0xFC, 0x0F, 0xFD, 0x0F, 0xFE, 0x0F, 0xFD, 0x0F, 0xFB, 0x0F, 0xB6, 0x0D, 0xB3, 0x0D, 0xB2, 0x0D,
01201         0xB1, 0x0E, 0xB1, 0x0E, 0xA0, 0x0E, 0xA0, 0x0E, 0xB0, 0x0E, 0xB0, 0x0F, 0xB1, 0x0E, 0xA1, 0x0E,
01202         0xA1, 0x0E, 0xA2, 0x0E, 0xA3, 0x0C, 0x94, 0x0A, 0x97, 0x09, 0xAA, 0x09, 0xBC, 0x08, 0xAC, 0x07,
01203         0xAD, 0x07, 0xAD, 0x07, 0xAD, 0x07, 0xAD, 0x07, 0xAD, 0x07, 0xAD, 0x07, 0xAD, 0x07, 0xAD, 0x07,
01204         0xAD, 0x07, 0xAD, 0x07, 0xAD, 0x07, 0xAD, 0x07, 0xAD, 0x07, 0xAD, 0x07, 0xAD, 0x07, 0xAD, 0x07,
01205         0xBC, 0x07, 0xBC, 0x07, 0xAD, 0x07, 0xAD, 0x07, 0xAC, 0x08, 0xAB, 0x08, 0xA8, 0x07, 0x94, 0x07,
01206         0xC3, 0x0A, 0xC2, 0x0B, 0xD2, 0x0C, 0xC1, 0x0B, 0xC1, 0x0B, 0xC1, 0x0C, 0xD0, 0x0C, 0xC0, 0x0C,
01207         0xC0, 0x0B, 0xC0, 0x0C, 0xC1, 0x0C, 0xD1, 0x0C, 0xD1, 0x0C, 0xC3, 0x0B, 0xFA, 0x0F, 0xFD, 0x0F,
01208         0xFE, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01209         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01210         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xEF, 0x0F, 0xEF, 0x0F, 0xFE, 0x0F, 0xEB, 0x0F, 0xD8, 0x0D,
01211         0xC4, 0x0C, 0xC2, 0x0C, 0xC0, 0x0C, 0xD0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C,
01212         0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xB0, 0x0E, 0xB0, 0x0E, 0xB0, 0x0F, 0xA0, 0x0F,
01213         0xA0, 0x0F, 0xA0, 0x0F, 0xB0, 0x0F, 0xB0, 0x0F, 0xB1, 0x0E, 0xA1, 0x0E, 0xB3, 0x0E, 0xE7, 0x0F,
01214         0xD6, 0x0F, 0xC5, 0x0E, 0xB3, 0x0D, 0xB2, 0x0D, 0xB0, 0x0E, 0xB0, 0x0E, 0xB0, 0x0E, 0xA1, 0x0E,
01215         0xA1, 0x0F, 0xA1, 0x0F, 0xA0, 0x0F, 0xB0, 0x0F, 0xA0, 0x0E, 0xB0, 0x0F, 0xB0, 0x0E, 0xB1, 0x0D,
01216         0xB3, 0x0D, 0xC7, 0x0E, 0xEA, 0x0F, 0xFD, 0x0F, 0xFD, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F,
01217         0xFC, 0x0F, 0xB6, 0x0C, 0xB3, 0x0D, 0xB2, 0x0D, 0xB1, 0x0E, 0xB1, 0x0E, 0xA0, 0x0E, 0xA0, 0x0E,
01218         0xB0, 0x0E, 0xB0, 0x0F, 0xB1, 0x0E, 0xA1, 0x0E, 0xA2, 0x0E, 0xA3, 0x0E, 0x93, 0x0C, 0x84, 0x09,
01219         0x86, 0x08, 0xAA, 0x09, 0xBC, 0x08, 0x9C, 0x06, 0xAD, 0x07, 0xAD, 0x07, 0xAD, 0x07, 0xAD, 0x07,
01220         0xAD, 0x07, 0xAD, 0x07, 0xAD, 0x07, 0xAD, 0x07, 0xAD, 0x07, 0xAD, 0x07, 0xAD, 0x07, 0xAD, 0x07,
01221         0xAD, 0x07, 0xAD, 0x07, 0xAD, 0x07, 0xBD, 0x07, 0xAC, 0x07, 0xBC, 0x07, 0xAD, 0x07, 0xAD, 0x07,
01222         0xBD, 0x08, 0xBB, 0x08, 0xA8, 0x07, 0x84, 0x06, 0xA2, 0x09, 0xC2, 0x0B, 0xD2, 0x0C, 0xC1, 0x0B,
01223         0xC1, 0x0B, 0xD1, 0x0C, 0xD0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0B, 0xC0, 0x0B,
01224         0xC1, 0x0C, 0xC3, 0x0B, 0xFB, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01225         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01226         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01227         0xFF, 0x0F, 0xFF, 0x0F, 0xFC, 0x0F, 0xE9, 0x0E, 0xC4, 0x0C, 0xC2, 0x0C, 0xC0, 0x0C, 0xD0, 0x0C,
01228         0xD0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C,
01229         0xB0, 0x0E, 0xB0, 0x0E, 0xB0, 0x0F, 0xA1, 0x0F, 0xA0, 0x0F, 0xA0, 0x0F, 0xB0, 0x0F, 0xB0, 0x0F,
01230         0xB0, 0x0E, 0xB1, 0x0E, 0xB2, 0x0E, 0xD5, 0x0F, 0xC4, 0x0E, 0xB2, 0x0D, 0xB2, 0x0D, 0xB1, 0x0E,
01231         0xB0, 0x0E, 0xB0, 0x0F, 0xA0, 0x0E, 0xA0, 0x0E, 0xA1, 0x0F, 0xA1, 0x0F, 0xA0, 0x0F, 0xB0, 0x0F,
01232         0xA0, 0x0E, 0xB0, 0x0E, 0xB1, 0x0E, 0xB2, 0x0D, 0xC5, 0x0D, 0xEA, 0x0F, 0xED, 0x0F, 0xEE, 0x0F,
01233         0xFE, 0x0F, 0xFE, 0x0F, 0xFF, 0x0F, 0xFE, 0x0F, 0xFC, 0x0F, 0xB6, 0x0D, 0xB3, 0x0D, 0xB1, 0x0D,
01234         0xB1, 0x0E, 0xA1, 0x0E, 0xA0, 0x0F, 0xB0, 0x0F, 0xB0, 0x0E, 0xB0, 0x0E, 0xB1, 0x0E, 0xB1, 0x0E,
01235         0xA2, 0x0E, 0x92, 0x0D, 0x82, 0x0A, 0x73, 0x08, 0x97, 0x08, 0xAA, 0x09, 0xBC, 0x08, 0xAC, 0x07,
01236         0xAD, 0x07, 0xAD, 0x07, 0xAD, 0x07, 0xAD, 0x07, 0xAD, 0x07, 0xAD, 0x07, 0xAD, 0x07, 0xAD, 0x07,
01237         0xAD, 0x07, 0xAD, 0x07, 0xBD, 0x07, 0xAD, 0x07, 0xAD, 0x07, 0xAD, 0x07, 0xAD, 0x07, 0xAD, 0x07,
01238         0xAC, 0x07, 0xBC, 0x07, 0xAD, 0x07, 0xAD, 0x07, 0xAC, 0x08, 0xBB, 0x08, 0xA8, 0x08, 0x94, 0x07,
01239         0x92, 0x07, 0xB2, 0x09, 0xC2, 0x0B, 0xD1, 0x0B, 0xC1, 0x0B, 0xD1, 0x0C, 0xD0, 0x0C, 0xC0, 0x0C,
01240         0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0B, 0xC0, 0x0B, 0xC1, 0x0B, 0xC3, 0x0B, 0xEB, 0x0F, 0xFE, 0x0F,
01241         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01242         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFE, 0x0F,
01243         0xFE, 0x0F, 0xFE, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFE, 0x0F, 0xFC, 0x0F, 0xFA, 0x0F,
01244         0xC4, 0x0B, 0xC2, 0x0C, 0xC0, 0x0C, 0xD0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C,
01245         0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xB0, 0x0E, 0xB0, 0x0E, 0xB0, 0x0F, 0xA1, 0x0F,
01246         0xA0, 0x0F, 0xA0, 0x0F, 0xB0, 0x0F, 0xB0, 0x0F, 0xB0, 0x0E, 0xB1, 0x0E, 0xA1, 0x0D, 0xC3, 0x0F,
01247         0xB2, 0x0E, 0xA1, 0x0E, 0xB1, 0x0E, 0xB0, 0x0E, 0xA0, 0x0E, 0xB0, 0x0F, 0xA0, 0x0E, 0xA0, 0x0E,
01248         0xB1, 0x0F, 0xB1, 0x0F, 0xA0, 0x0F, 0xB0, 0x0F, 0xB1, 0x0F, 0xB0, 0x0E, 0xA1, 0x0D, 0xB4, 0x0D,
01249         0xD8, 0x0E, 0xEC, 0x0F, 0xFE, 0x0F, 0xFF, 0x0F, 0xEE, 0x0E, 0xFF, 0x0F, 0xFF, 0x0F, 0xEE, 0x0F,
01250         0xEC, 0x0F, 0xB6, 0x0D, 0xB3, 0x0D, 0xB1, 0x0D, 0xB1, 0x0E, 0xA0, 0x0F, 0xB0, 0x0F, 0xB0, 0x0F,
01251         0xA0, 0x0E, 0xA0, 0x0E, 0xB1, 0x0E, 0xB2, 0x0E, 0xA2, 0x0E, 0x92, 0x0C, 0x72, 0x09, 0x74, 0x08,
01252         0x97, 0x08, 0xAA, 0x09, 0xBC, 0x08, 0xAD, 0x07, 0xAD, 0x07, 0xAD, 0x07, 0xAD, 0x07, 0xAD, 0x07,
01253         0xAD, 0x07, 0xAD, 0x07, 0xAD, 0x07, 0xAD, 0x07, 0xAD, 0x07, 0xAD, 0x07, 0xBD, 0x07, 0xAD, 0x07,
01254         0xAD, 0x07, 0xAD, 0x07, 0xAD, 0x07, 0xAD, 0x07, 0xBC, 0x07, 0xBC, 0x07, 0xAD, 0x07, 0xAC, 0x07,
01255         0xAC, 0x07, 0xAB, 0x08, 0xA8, 0x08, 0x95, 0x07, 0x92, 0x07, 0xA2, 0x09, 0xC2, 0x0A, 0xD2, 0x0B,
01256         0xD1, 0x0C, 0xC1, 0x0B, 0xC0, 0x0B, 0xC0, 0x0C, 0xC0, 0x0B, 0xC0, 0x0C, 0xC0, 0x0B, 0xD0, 0x0C,
01257         0xD1, 0x0C, 0xC3, 0x0C, 0xFB, 0x0F, 0xFE, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01258         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01259         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xEF, 0x0F,
01260         0xEF, 0x0F, 0xFE, 0x0F, 0xFC, 0x0F, 0xFA, 0x0F, 0xC4, 0x0B, 0xC1, 0x0B, 0xC0, 0x0B, 0xC0, 0x0C,
01261         0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC1, 0x0C, 0xC0, 0x0C, 0xD0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C,
01262         0xB0, 0x0E, 0xB0, 0x0E, 0xA0, 0x0F, 0xA1, 0x0F, 0xA0, 0x0F, 0xA0, 0x0F, 0xB0, 0x0F, 0xB0, 0x0F,
01263         0xB0, 0x0E, 0xB1, 0x0E, 0xB1, 0x0E, 0xB2, 0x0E, 0xB1, 0x0E, 0xB1, 0x0E, 0xB0, 0x0E, 0xB0, 0x0E,
01264         0xB0, 0x0F, 0xB0, 0x0F, 0xA0, 0x0E, 0xA0, 0x0E, 0xA0, 0x0F, 0xB0, 0x0F, 0xB1, 0x0F, 0xB1, 0x0E,
01265         0xB1, 0x0E, 0xA2, 0x0D, 0xB4, 0x0D, 0xD8, 0x0F, 0xFB, 0x0F, 0xFD, 0x0F, 0xFE, 0x0F, 0xFF, 0x0F,
01266         0xFE, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xEE, 0x0F, 0xEC, 0x0F, 0xB6, 0x0D, 0xB3, 0x0D, 0xB1, 0x0E,
01267         0xB1, 0x0F, 0xA0, 0x0F, 0xA0, 0x0F, 0xB0, 0x0F, 0xB0, 0x0F, 0xA0, 0x0E, 0xB1, 0x0E, 0xB3, 0x0F,
01268         0x92, 0x0D, 0x82, 0x0B, 0x72, 0x09, 0x74, 0x08, 0x97, 0x08, 0xBB, 0x09, 0xBC, 0x08, 0xAD, 0x07,
01269         0xAD, 0x07, 0xAD, 0x07, 0xAC, 0x07, 0xBE, 0x08, 0xAD, 0x08, 0xAC, 0x07, 0xBE, 0x08, 0xBD, 0x08,
01270         0xAD, 0x07, 0xAD, 0x07, 0xAC, 0x07, 0xAD, 0x07, 0xAE, 0x08, 0xBE, 0x08, 0xBE, 0x08, 0xAD, 0x07,
01271         0xAC, 0x07, 0xBC, 0x07, 0xAD, 0x07, 0xAC, 0x07, 0xAC, 0x07, 0xBB, 0x08, 0xA8, 0x08, 0x95, 0x07,
01272         0x82, 0x07, 0x91, 0x07, 0xA1, 0x09, 0xC1, 0x0A, 0xD2, 0x0B, 0xC1, 0x0B, 0xC0, 0x0B, 0xD0, 0x0C,
01273         0xC0, 0x0B, 0xC0, 0x0C, 0xC0, 0x0C, 0xD0, 0x0C, 0xC1, 0x0B, 0xC4, 0x0C, 0xEB, 0x0E, 0xFE, 0x0F,
01274         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01275         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFE, 0x0F,
01276         0xFE, 0x0F, 0xFE, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xEF, 0x0F, 0xFE, 0x0F, 0xFD, 0x0F, 0xE9, 0x0E,
01277         0xC4, 0x0B, 0xC2, 0x0C, 0xD0, 0x0C, 0xD0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC1, 0x0C,
01278         0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xB0, 0x0E, 0xB0, 0x0E, 0xA0, 0x0F, 0xA1, 0x0F,
01279         0xA0, 0x0F, 0xA0, 0x0F, 0xB0, 0x0F, 0xB0, 0x0F, 0xB0, 0x0E, 0xB0, 0x0E, 0xB1, 0x0E, 0xB1, 0x0E,
01280         0xB1, 0x0E, 0xB0, 0x0E, 0xB0, 0x0F, 0xB0, 0x0F, 0xA0, 0x0E, 0xB0, 0x0F, 0xB0, 0x0F, 0xA0, 0x0F,
01281         0xA0, 0x0E, 0xB0, 0x0F, 0xB1, 0x0F, 0xB1, 0x0E, 0xB3, 0x0D, 0xB4, 0x0D, 0xC7, 0x0E, 0xEA, 0x0F,
01282         0xFD, 0x0F, 0xFE, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFE, 0x0E, 0xFF, 0x0F, 0xFF, 0x0F, 0xEE, 0x0F,
01283         0xEB, 0x0F, 0xB6, 0x0D, 0xB2, 0x0D, 0xB0, 0x0E, 0xB0, 0x0F, 0xA0, 0x0F, 0xA0, 0x0F, 0xA0, 0x0F,
01284         0xA0, 0x0F, 0xB1, 0x0E, 0xB1, 0x0E, 0xA2, 0x0D, 0x81, 0x0C, 0x72, 0x0A, 0x73, 0x09, 0x74, 0x08,
01285         0x98, 0x08, 0xAB, 0x08, 0xAC, 0x07, 0xAD, 0x07, 0xAD, 0x07, 0xAD, 0x07, 0xAC, 0x07, 0xBD, 0x08,
01286         0xAC, 0x07, 0xAC, 0x07, 0xBD, 0x08, 0xAD, 0x07, 0xAC, 0x07, 0xAC, 0x07, 0xAC, 0x07, 0xAC, 0x08,
01287         0xAD, 0x08, 0xAD, 0x08, 0xAD, 0x07, 0xAD, 0x07, 0xAC, 0x07, 0xBD, 0x07, 0xAD, 0x07, 0xAD, 0x07,
01288         0xAC, 0x07, 0xBB, 0x08, 0xA8, 0x07, 0x95, 0x07, 0x83, 0x07, 0x92, 0x07, 0xA1, 0x08, 0xB1, 0x0A,
01289         0xC2, 0x0B, 0xD2, 0x0B, 0xD1, 0x0B, 0xC0, 0x0B, 0xD1, 0x0C, 0xD1, 0x0C, 0xC0, 0x0B, 0xC0, 0x0B,
01290         0xC0, 0x0B, 0xC3, 0x0C, 0xEB, 0x0E, 0xFE, 0x0F, 0xFE, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFE, 0x0F,
01291         0xFE, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01292         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01293         0xEF, 0x0F, 0xFE, 0x0F, 0xFD, 0x0F, 0xFA, 0x0F, 0xC4, 0x0B, 0xC2, 0x0B, 0xD0, 0x0C, 0xD0, 0x0C,
01294         0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C,
01295         0xB0, 0x0E, 0xB0, 0x0E, 0xA0, 0x0F, 0xA1, 0x0F, 0xA0, 0x0F, 0xA0, 0x0F, 0xB0, 0x0F, 0xB0, 0x0F,
01296         0xB0, 0x0E, 0xB0, 0x0E, 0xB1, 0x0E, 0xB1, 0x0E, 0xB1, 0x0E, 0xB0, 0x0F, 0xB0, 0x0F, 0xB0, 0x0F,
01297         0xA0, 0x0E, 0xB1, 0x0F, 0xB0, 0x0F, 0xB0, 0x0F, 0xB0, 0x0E, 0xB0, 0x0E, 0xB1, 0x0E, 0xB2, 0x0D,
01298         0xB4, 0x0D, 0xC7, 0x0E, 0xEA, 0x0F, 0xFC, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01299         0xFE, 0x0E, 0xFE, 0x0F, 0xFF, 0x0F, 0xEE, 0x0F, 0xEB, 0x0F, 0xB5, 0x0D, 0xB2, 0x0E, 0xB0, 0x0E,
01300         0xA0, 0x0F, 0xB0, 0x0F, 0xA0, 0x0F, 0xA0, 0x0E, 0xA0, 0x0E, 0xB1, 0x0F, 0xA2, 0x0E, 0x91, 0x0C,
01301         0x71, 0x0A, 0x72, 0x09, 0x84, 0x09, 0x85, 0x08, 0x98, 0x08, 0xAB, 0x08, 0xAC, 0x07, 0xAD, 0x07,
01302         0xAD, 0x07, 0xAD, 0x07, 0xAD, 0x07, 0xBD, 0x08, 0xAC, 0x08, 0xAC, 0x07, 0xBD, 0x08, 0xAC, 0x07,
01303         0xAC, 0x08, 0xBC, 0x08, 0xBC, 0x08, 0xAC, 0x08, 0xAD, 0x08, 0xAD, 0x08, 0xAD, 0x07, 0xAD, 0x07,
01304         0xAC, 0x07, 0xBD, 0x07, 0xAD, 0x07, 0xAD, 0x07, 0xAD, 0x08, 0xBB, 0x08, 0xA8, 0x07, 0x95, 0x06,
01305         0x94, 0x07, 0x92, 0x07, 0x91, 0x07, 0xA1, 0x08, 0xC2, 0x0A, 0xD2, 0x0B, 0xD1, 0x0C, 0xC0, 0x0B,
01306         0xD1, 0x0C, 0xD1, 0x0C, 0xC0, 0x0B, 0xC0, 0x0C, 0xC1, 0x0B, 0xD4, 0x0C, 0xEA, 0x0F, 0xFE, 0x0F,
01307         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01308         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01309         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xEF, 0x0F, 0xFE, 0x0F, 0xFC, 0x0F, 0xE9, 0x0E,
01310         0xC4, 0x0B, 0xC2, 0x0B, 0xD0, 0x0C, 0xD0, 0x0C, 0xD0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C,
01311         0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xB0, 0x0E, 0xB0, 0x0E, 0xA0, 0x0F, 0xA1, 0x0F,
01312         0xA0, 0x0F, 0xB0, 0x0F, 0xB0, 0x0F, 0xB0, 0x0F, 0xB0, 0x0E, 0xB0, 0x0E, 0xB1, 0x0E, 0xB1, 0x0E,
01313         0xB1, 0x0E, 0xB0, 0x0F, 0xB0, 0x0F, 0xB0, 0x0F, 0xB1, 0x0F, 0xA1, 0x0F, 0xA0, 0x0E, 0xB0, 0x0E,
01314         0xB0, 0x0E, 0xB1, 0x0E, 0xB2, 0x0D, 0xB3, 0x0D, 0xC7, 0x0E, 0xDA, 0x0F, 0xFD, 0x0F, 0xFE, 0x0F,
01315         0xFE, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFE, 0x0E, 0xFE, 0x0F, 0xFF, 0x0F, 0xEE, 0x0F,
01316         0xEB, 0x0F, 0xB5, 0x0D, 0xB2, 0x0E, 0xB0, 0x0E, 0xB0, 0x0F, 0xB0, 0x0F, 0xA0, 0x0F, 0xA0, 0x0E,
01317         0xA1, 0x0E, 0xB2, 0x0E, 0xA1, 0x0D, 0x81, 0x0B, 0x71, 0x0A, 0x72, 0x09, 0x84, 0x09, 0x86, 0x08,
01318         0x98, 0x08, 0xAB, 0x08, 0xAC, 0x07, 0xAD, 0x07, 0xAD, 0x07, 0xAD, 0x07, 0xAD, 0x08, 0xAD, 0x08,
01319         0xAC, 0x08, 0xAC, 0x08, 0xAD, 0x08, 0xAC, 0x07, 0xCD, 0x09, 0xCE, 0x0A, 0xCD, 0x0A, 0xAC, 0x08,
01320         0xAC, 0x07, 0xAD, 0x08, 0xAD, 0x08, 0xAD, 0x07, 0xAC, 0x07, 0xBD, 0x07, 0xAD, 0x07, 0xAD, 0x07,
01321         0xAD, 0x08, 0xBC, 0x08, 0xA8, 0x07, 0x95, 0x06, 0x94, 0x07, 0x93, 0x07, 0x92, 0x07, 0x91, 0x07,
01322         0xB2, 0x09, 0xC2, 0x0B, 0xD2, 0x0B, 0xD0, 0x0B, 0xC0, 0x0B, 0xD0, 0x0B, 0xC0, 0x0B, 0xD1, 0x0C,
01323         0xC1, 0x0B, 0xC3, 0x0C, 0xEA, 0x0E, 0xFD, 0x0F, 0xFE, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01324         0xFF, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F,
01325         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01326         0xFE, 0x0F, 0xFD, 0x0F, 0xFB, 0x0F, 0xE8, 0x0D, 0xC3, 0x0B, 0xC2, 0x0B, 0xD0, 0x0C, 0xD0, 0x0C,
01327         0xD0, 0x0C, 0xD0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C,
01328         0xB0, 0x0E, 0xB0, 0x0E, 0xA1, 0x0F, 0xA1, 0x0F, 0xA0, 0x0F, 0xB0, 0x0F, 0xB0, 0x0F, 0xB0, 0x0F,
01329         0xB0, 0x0E, 0xB0, 0x0E, 0xB1, 0x0E, 0xB1, 0x0E, 0xB1, 0x0F, 0xB1, 0x0F, 0xB0, 0x0F, 0xB0, 0x0F,
01330         0xB1, 0x0F, 0xA0, 0x0F, 0xA0, 0x0E, 0xB1, 0x0E, 0xB1, 0x0E, 0xB1, 0x0D, 0xB3, 0x0D, 0xC6, 0x0D,
01331         0xD9, 0x0E, 0xEC, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFE, 0x0E,
01332         0xFE, 0x0E, 0xFE, 0x0F, 0xFF, 0x0F, 0xFD, 0x0F, 0xEB, 0x0F, 0xB5, 0x0D, 0xB2, 0x0D, 0xB0, 0x0E,
01333         0xB0, 0x0F, 0xA0, 0x0F, 0xA0, 0x0F, 0xA1, 0x0F, 0xB2, 0x0F, 0xA2, 0x0D, 0x91, 0x0B, 0x71, 0x0A,
01334         0x82, 0x0A, 0x73, 0x09, 0x84, 0x08, 0x86, 0x07, 0x98, 0x07, 0xBB, 0x08, 0xBC, 0x07, 0xAD, 0x07,
01335         0xAD, 0x07, 0xAD, 0x07, 0xAD, 0x08, 0xAC, 0x08, 0xAD, 0x08, 0xAD, 0x08, 0xAC, 0x08, 0xAC, 0x08,
01336         0xDE, 0x0B, 0xEF, 0x0C, 0xEE, 0x0B, 0xBC, 0x09, 0x9B, 0x07, 0xAD, 0x08, 0xBD, 0x08, 0xAC, 0x07,
01337         0xAC, 0x07, 0xBD, 0x07, 0xAD, 0x07, 0xAD, 0x07, 0xAD, 0x08, 0xBC, 0x08, 0xA9, 0x07, 0x96, 0x06,
01338         0x94, 0x06, 0x93, 0x07, 0x92, 0x07, 0x92, 0x07, 0xA2, 0x08, 0xB2, 0x0A, 0xD1, 0x0B, 0xD1, 0x0B,
01339         0xC0, 0x0B, 0xD0, 0x0B, 0xD1, 0x0B, 0xD1, 0x0C, 0xC1, 0x0B, 0xC3, 0x0B, 0xE9, 0x0E, 0xFC, 0x0F,
01340         0xFE, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01341         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01342         0xFE, 0x0F, 0xED, 0x0E, 0xFD, 0x0F, 0xFE, 0x0F, 0xFD, 0x0F, 0xFC, 0x0F, 0xFA, 0x0F, 0xE6, 0x0D,
01343         0xC3, 0x0B, 0xC1, 0x0B, 0xD0, 0x0B, 0xD0, 0x0C, 0xD0, 0x0C, 0xD0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C,
01344         0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xB0, 0x0E, 0xA0, 0x0F, 0xA1, 0x0F, 0xA1, 0x0F,
01345         0xA0, 0x0F, 0xB0, 0x0F, 0xB0, 0x0F, 0xB0, 0x0E, 0xB0, 0x0E, 0xB0, 0x0E, 0xB1, 0x0E, 0xB1, 0x0E,
01346         0xA1, 0x0E, 0xA1, 0x0F, 0xA0, 0x0F, 0xA0, 0x0F, 0xA1, 0x0F, 0xA1, 0x0F, 0xB1, 0x0F, 0xB1, 0x0E,
01347         0xB1, 0x0D, 0xA2, 0x0C, 0xC5, 0x0D, 0xE9, 0x0F, 0xEB, 0x0F, 0xFD, 0x0F, 0xFE, 0x0F, 0xFF, 0x0F,
01348         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFE, 0x0E, 0xFE, 0x0E, 0xFE, 0x0F, 0xFF, 0x0F, 0xFE, 0x0F,
01349         0xFB, 0x0F, 0xB5, 0x0D, 0xB2, 0x0D, 0xB0, 0x0E, 0xB0, 0x0F, 0xA0, 0x0E, 0xA1, 0x0F, 0xB2, 0x0F,
01350         0xB2, 0x0E, 0x92, 0x0C, 0x81, 0x0A, 0x71, 0x09, 0x82, 0x0A, 0x73, 0x09, 0x84, 0x08, 0x86, 0x07,
01351         0x98, 0x07, 0xBB, 0x08, 0xBC, 0x07, 0xAC, 0x07, 0xBD, 0x07, 0xAD, 0x07, 0xAD, 0x08, 0xAC, 0x08,
01352         0xAD, 0x08, 0xAC, 0x08, 0xAC, 0x07, 0xBD, 0x09, 0xEF, 0x0C, 0xFF, 0x0D, 0xFF, 0x0D, 0xCD, 0x0A,
01353         0xAC, 0x08, 0xAC, 0x08, 0xAD, 0x08, 0xAC, 0x07, 0xAC, 0x07, 0xBD, 0x07, 0xAD, 0x07, 0xAD, 0x07,
01354         0xAD, 0x07, 0xBC, 0x08, 0xA9, 0x07, 0x96, 0x06, 0x94, 0x06, 0x93, 0x07, 0x93, 0x07, 0x92, 0x07,
01355         0x92, 0x07, 0xA2, 0x09, 0xC1, 0x0A, 0xD1, 0x0B, 0xD0, 0x0B, 0xD0, 0x0B, 0xC1, 0x0B, 0xD1, 0x0B,
01356         0xC1, 0x0B, 0xD3, 0x0C, 0xF9, 0x0F, 0xFC, 0x0F, 0xFD, 0x0F, 0xFE, 0x0F, 0xFD, 0x0F, 0xFD, 0x0F,
01357         0xFD, 0x0F, 0xFD, 0x0F, 0xFD, 0x0F, 0xFD, 0x0F, 0xFD, 0x0F, 0xFD, 0x0F, 0xFD, 0x0F, 0xFD, 0x0F,
01358         0xFE, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFD, 0x0F, 0xFC, 0x0F, 0xFC, 0x0F, 0xFC, 0x0F,
01359         0xFA, 0x0F, 0xF9, 0x0E, 0xE6, 0x0D, 0xC4, 0x0C, 0xC2, 0x0B, 0xC1, 0x0B, 0xD0, 0x0B, 0xD0, 0x0B,
01360         0xD0, 0x0B, 0xC0, 0x0B, 0xC0, 0x0B, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0B,
01361         0xA0, 0x0F, 0xA0, 0x0F, 0xA1, 0x0F, 0xA1, 0x0F, 0xA0, 0x0F, 0xB0, 0x0F, 0xB0, 0x0F, 0xB0, 0x0E,
01362         0xB0, 0x0E, 0xB0, 0x0E, 0xB1, 0x0E, 0xA1, 0x0E, 0xA1, 0x0E, 0xA1, 0x0F, 0xA0, 0x0F, 0xA0, 0x0F,
01363         0xA0, 0x0F, 0xA1, 0x0F, 0xB1, 0x0F, 0xB1, 0x0E, 0xB2, 0x0D, 0xC4, 0x0D, 0xD7, 0x0E, 0xFB, 0x0F,
01364         0xFC, 0x0F, 0xFE, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFE, 0x0F,
01365         0xFE, 0x0E, 0xFE, 0x0E, 0xFF, 0x0F, 0xFE, 0x0F, 0xFB, 0x0F, 0xC5, 0x0D, 0xB2, 0x0D, 0xB0, 0x0E,
01366         0xB0, 0x0E, 0xA0, 0x0E, 0xB1, 0x0F, 0xB2, 0x0E, 0xA2, 0x0D, 0x81, 0x0B, 0x71, 0x0A, 0x82, 0x09,
01367         0x83, 0x09, 0x83, 0x09, 0x85, 0x08, 0x86, 0x07, 0x98, 0x07, 0xBB, 0x08, 0xBC, 0x07, 0xAC, 0x07,
01368         0xBD, 0x08, 0xAD, 0x07, 0xAD, 0x08, 0xAC, 0x08, 0xAC, 0x08, 0xAC, 0x08, 0xAD, 0x08, 0xDF, 0x0B,
01369         0xFF, 0x0D, 0xFF, 0x0E, 0xFF, 0x0E, 0xEE, 0x0C, 0xBD, 0x0A, 0xAC, 0x08, 0xAC, 0x08, 0xAD, 0x08,
01370         0xAC, 0x07, 0xBD, 0x07, 0xAD, 0x07, 0xAD, 0x07, 0xAD, 0x07, 0xBC, 0x08, 0xA9, 0x07, 0x96, 0x06,
01371         0x94, 0x06, 0x94, 0x07, 0x93, 0x07, 0x93, 0x07, 0x92, 0x07, 0x91, 0x08, 0xB0, 0x09, 0xD0, 0x0B,
01372         0xD0, 0x0B, 0xD0, 0x0B, 0xC1, 0x0B, 0xD1, 0x0B, 0xC1, 0x0B, 0xD3, 0x0C, 0xE8, 0x0E, 0xFA, 0x0F,
01373         0xFB, 0x0F, 0xFB, 0x0F, 0xFB, 0x0F, 0xFB, 0x0F, 0xFB, 0x0F, 0xFA, 0x0F, 0xFA, 0x0F, 0xFA, 0x0F,
01374         0xFA, 0x0F, 0xFA, 0x0F, 0xFB, 0x0F, 0xFB, 0x0F, 0xFB, 0x0F, 0xFB, 0x0F, 0xFB, 0x0F, 0xFB, 0x0F,
01375         0xFA, 0x0F, 0xFA, 0x0E, 0xF9, 0x0E, 0xF8, 0x0E, 0xE6, 0x0D, 0xD4, 0x0C, 0xC3, 0x0B, 0xC1, 0x0B,
01376         0xC1, 0x0B, 0xD0, 0x0B, 0xD0, 0x0B, 0xD0, 0x0B, 0xC0, 0x0B, 0xC0, 0x0B, 0xC1, 0x0B, 0xC1, 0x0B,
01377         0xC1, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0B, 0xA0, 0x0F, 0xA0, 0x0F, 0xA1, 0x0F, 0xA1, 0x0F,
01378         0xA0, 0x0F, 0xB0, 0x0F, 0xB0, 0x0F, 0xB0, 0x0E, 0xB0, 0x0E, 0xB0, 0x0E, 0xB1, 0x0E, 0xA1, 0x0E,
01379         0xA1, 0x0E, 0xA1, 0x0F, 0xA0, 0x0F, 0xA0, 0x0F, 0xA0, 0x0F, 0xB1, 0x0F, 0xA1, 0x0E, 0xA2, 0x0D,
01380         0xB4, 0x0D, 0xD7, 0x0F, 0xFA, 0x0F, 0xFC, 0x0F, 0xFD, 0x0F, 0xFE, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01381         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0E, 0xFF, 0x0F, 0xFF, 0x0F, 0xFD, 0x0F,
01382         0xFB, 0x0F, 0xC5, 0x0D, 0xB2, 0x0D, 0xB0, 0x0E, 0xB0, 0x0E, 0xB1, 0x0E, 0xB2, 0x0F, 0xA2, 0x0E,
01383         0x92, 0x0C, 0x81, 0x0A, 0x82, 0x09, 0x83, 0x09, 0x83, 0x09, 0x83, 0x09, 0x85, 0x08, 0x86, 0x07,
01384         0x98, 0x07, 0xBB, 0x08, 0xAC, 0x07, 0xAC, 0x07, 0xAD, 0x07, 0xAC, 0x07, 0xAD, 0x08, 0xAC, 0x08,
01385         0xAC, 0x08, 0xAC, 0x08, 0xBD, 0x09, 0xFF, 0x0D, 0xFF, 0x0E, 0xFF, 0x0E, 0xFF, 0x0E, 0xFF, 0x0E,
01386         0xDE, 0x0B, 0xAC, 0x08, 0x9B, 0x08, 0xBD, 0x08, 0xAC, 0x07, 0xAD, 0x07, 0xAE, 0x07, 0xAD, 0x07,
01387         0xAD, 0x07, 0xBC, 0x08, 0xA9, 0x07, 0x95, 0x06, 0x94, 0x06, 0x93, 0x07, 0x94, 0x07, 0x93, 0x07,
01388         0x93, 0x07, 0x92, 0x07, 0xA1, 0x09, 0xC1, 0x0A, 0xD1, 0x0B, 0xD1, 0x0B, 0xC1, 0x0B, 0xD1, 0x0C,
01389         0xC1, 0x0B, 0xC1, 0x0B, 0xC4, 0x0C, 0xC5, 0x0C, 0xC4, 0x0B, 0xC4, 0x0B, 0xC4, 0x0B, 0xC4, 0x0B,
01390         0xC4, 0x0B, 0xC4, 0x0B, 0xC4, 0x0B, 0xC4, 0x0B, 0xC4, 0x0B, 0xC4, 0x0B, 0xC4, 0x0B, 0xC4, 0x0B,
01391         0xC4, 0x0B, 0xC4, 0x0B, 0xC4, 0x0B, 0xC4, 0x0B, 0xC4, 0x0B, 0xC4, 0x0B, 0xD4, 0x0C, 0xD4, 0x0C,
01392         0xC2, 0x0B, 0xC1, 0x0B, 0xC1, 0x0B, 0xC1, 0x0B, 0xC1, 0x0B, 0xD1, 0x0B, 0xD0, 0x0C, 0xC0, 0x0B,
01393         0xC0, 0x0B, 0xC0, 0x0B, 0xC1, 0x0B, 0xC1, 0x0C, 0xC1, 0x0C, 0xC0, 0x0C, 0xC1, 0x0C, 0xC1, 0x0C,
01394         0xB1, 0x0F, 0xB0, 0x0F, 0xB0, 0x0F, 0xB0, 0x0F, 0xB0, 0x0F, 0xB0, 0x0F, 0xB0, 0x0F, 0xB0, 0x0F,
01395         0xB1, 0x0F, 0xB1, 0x0F, 0xA1, 0x0F, 0xA1, 0x0F, 0xA1, 0x0F, 0xA0, 0x0F, 0xA0, 0x0F, 0xB0, 0x0F,
01396         0xB0, 0x0F, 0xB0, 0x0E, 0xB2, 0x0D, 0xB4, 0x0D, 0xD7, 0x0E, 0xEB, 0x0F, 0xFD, 0x0F, 0xFD, 0x0F,
01397         0xFE, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0E,
01398         0xFF, 0x0E, 0xFF, 0x0E, 0xFE, 0x0F, 0xFD, 0x0F, 0xFA, 0x0F, 0xB5, 0x0D, 0xB2, 0x0D, 0xB1, 0x0E,
01399         0xB0, 0x0E, 0xB1, 0x0E, 0xB2, 0x0E, 0x92, 0x0C, 0x81, 0x0A, 0x72, 0x09, 0x82, 0x09, 0x83, 0x09,
01400         0x83, 0x09, 0x83, 0x09, 0x84, 0x08, 0x86, 0x07, 0x98, 0x08, 0xAB, 0x08, 0xBC, 0x08, 0xAC, 0x07,
01401         0xBD, 0x08, 0x9C, 0x07, 0xBD, 0x09, 0x9B, 0x07, 0xBC, 0x09, 0xAB, 0x09, 0xFF, 0x0D, 0xFF, 0x0D,
01402         0xFF, 0x0E, 0xFF, 0x0F, 0xFF, 0x0E, 0xFF, 0x0E, 0xFF, 0x0E, 0xCD, 0x0B, 0x9A, 0x07, 0xAB, 0x08,
01403         0xBD, 0x08, 0xAD, 0x08, 0xAD, 0x07, 0xAE, 0x08, 0xBD, 0x08, 0xAB, 0x08, 0xA9, 0x08, 0x95, 0x06,
01404         0x94, 0x07, 0x93, 0x07, 0x94, 0x07, 0x83, 0x07, 0x83, 0x07, 0x93, 0x07, 0x92, 0x08, 0xA1, 0x08,
01405         0xD3, 0x0B, 0xD2, 0x0B, 0xC1, 0x0B, 0xC1, 0x0C, 0xC1, 0x0C, 0xC1, 0x0B, 0xC2, 0x0C, 0xC2, 0x0C,
01406         0xC2, 0x0B, 0xC2, 0x0B, 0xC2, 0x0B, 0xC2, 0x0C, 0xC2, 0x0C, 0xC2, 0x0C, 0xC2, 0x0C, 0xC1, 0x0B,
01407         0xC2, 0x0C, 0xC2, 0x0C, 0xC2, 0x0C, 0xC2, 0x0C, 0xC2, 0x0C, 0xC2, 0x0B, 0xC2, 0x0B, 0xC2, 0x0B,
01408         0xC1, 0x0C, 0xC1, 0x0C, 0xC1, 0x0B, 0xC1, 0x0B, 0xC1, 0x0B, 0xC1, 0x0C, 0xC1, 0x0C, 0xC1, 0x0C,
01409         0xC1, 0x0B, 0xC1, 0x0B, 0xC1, 0x0B, 0xC1, 0x0C, 0xC1, 0x0C, 0xC1, 0x0C, 0xD1, 0x0C, 0xD1, 0x0C,
01410         0xC0, 0x0C, 0xC0, 0x0C, 0xC1, 0x0C, 0xC1, 0x0C, 0xA0, 0x0E, 0xA0, 0x0E, 0xA0, 0x0E, 0xB0, 0x0E,
01411         0xB0, 0x0E, 0xB0, 0x0E, 0xB0, 0x0F, 0xB0, 0x0F, 0xA1, 0x0F, 0xA1, 0x0F, 0xA1, 0x0F, 0xA1, 0x0F,
01412         0xA0, 0x0F, 0xA0, 0x0F, 0xA0, 0x0F, 0xB0, 0x0F, 0xB0, 0x0E, 0xB1, 0x0D, 0xB3, 0x0D, 0xC6, 0x0E,
01413         0xEA, 0x0F, 0xEC, 0x0F, 0xFE, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01414         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0E, 0xFF, 0x0F, 0xFF, 0x0F, 0xFE, 0x0F, 0xFC, 0x0F,
01415         0xEA, 0x0F, 0xB4, 0x0D, 0xB2, 0x0D, 0xB1, 0x0E, 0xB1, 0x0E, 0xB1, 0x0E, 0xA2, 0x0D, 0x92, 0x0B,
01416         0x72, 0x09, 0x72, 0x09, 0x83, 0x09, 0x83, 0x09, 0x83, 0x09, 0x83, 0x09, 0x84, 0x08, 0x86, 0x08,
01417         0x98, 0x08, 0xAB, 0x09, 0xBC, 0x08, 0xAC, 0x07, 0xAC, 0x07, 0xBD, 0x08, 0xAC, 0x08, 0xAC, 0x08,
01418         0xAB, 0x08, 0xDE, 0x0B, 0xFF, 0x0D, 0xFF, 0x0E, 0xFF, 0x0E, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0E,
01419         0xFF, 0x0F, 0xDE, 0x0C, 0xAB, 0x09, 0xAB, 0x08, 0xAD, 0x08, 0xAD, 0x08, 0xAD, 0x07, 0xAE, 0x07,
01420         0xAC, 0x08, 0xAB, 0x08, 0xA8, 0x08, 0x95, 0x06, 0x94, 0x07, 0x93, 0x07, 0x93, 0x07, 0x84, 0x07,
01421         0x84, 0x07, 0x93, 0x07, 0x93, 0x07, 0x92, 0x08, 0xC3, 0x0A, 0xC2, 0x0B, 0xD1, 0x0B, 0xC1, 0x0B,
01422         0xC0, 0x0B, 0xC1, 0x0C, 0xC1, 0x0C, 0xC1, 0x0C, 0xC0, 0x0C, 0xC0, 0x0B, 0xD0, 0x0C, 0xD0, 0x0C,
01423         0xD0, 0x0C, 0xD0, 0x0C, 0xD0, 0x0C, 0xD0, 0x0C, 0xD0, 0x0C, 0xD0, 0x0C, 0xD0, 0x0C, 0xD0, 0x0C,
01424         0xD0, 0x0C, 0xD0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C,
01425         0xC0, 0x0C, 0xC0, 0x0C, 0xC1, 0x0C, 0xC1, 0x0C, 0xC1, 0x0C, 0xC1, 0x0C, 0xC1, 0x0C, 0xC1, 0x0C,
01426         0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xD0, 0x0C, 0xC0, 0x0C, 0xC1, 0x0C, 0xC1, 0x0C,
01427         0xA0, 0x0F, 0xA0, 0x0F, 0xA0, 0x0F, 0xA0, 0x0F, 0xA0, 0x0F, 0xA0, 0x0F, 0xB0, 0x0F, 0xA0, 0x0F,
01428         0xA0, 0x0F, 0xA0, 0x0F, 0xB1, 0x0F, 0xA0, 0x0F, 0xA0, 0x0E, 0xA0, 0x0F, 0xB0, 0x0F, 0xA0, 0x0E,
01429         0xA1, 0x0E, 0xB3, 0x0D, 0xC6, 0x0E, 0xE9, 0x0F, 0xFC, 0x0F, 0xFD, 0x0F, 0xEE, 0x0E, 0xFF, 0x0F,
01430         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01431         0xFF, 0x0F, 0xFF, 0x0F, 0xFE, 0x0F, 0xFC, 0x0F, 0xEA, 0x0F, 0xB5, 0x0D, 0xB2, 0x0D, 0xB1, 0x0E,
01432         0xB1, 0x0E, 0xA1, 0x0D, 0x91, 0x0C, 0x82, 0x0A, 0x72, 0x09, 0x72, 0x09, 0x83, 0x09, 0x83, 0x09,
01433         0x72, 0x09, 0x83, 0x09, 0x74, 0x08, 0x85, 0x07, 0x98, 0x08, 0xAB, 0x08, 0xAC, 0x08, 0xAC, 0x07,
01434         0xAC, 0x07, 0xBE, 0x09, 0x9B, 0x07, 0xAC, 0x08, 0xAB, 0x09, 0xFF, 0x0E, 0xFF, 0x0E, 0xFF, 0x0E,
01435         0xFF, 0x0E, 0xFF, 0x0F, 0xFF, 0x0F, 0xEF, 0x0E, 0xFF, 0x0E, 0xFF, 0x0E, 0xDD, 0x0B, 0xAB, 0x08,
01436         0xAC, 0x08, 0xAD, 0x08, 0xAD, 0x07, 0xAD, 0x07, 0xAC, 0x08, 0xAB, 0x08, 0xA9, 0x08, 0x85, 0x06,
01437         0x94, 0x07, 0x93, 0x07, 0x93, 0x07, 0x94, 0x07, 0x94, 0x07, 0x93, 0x07, 0x92, 0x07, 0x81, 0x07,
01438         0xA1, 0x09, 0xC2, 0x0A, 0xD1, 0x0B, 0xC0, 0x0B, 0xC0, 0x0B, 0xC1, 0x0C, 0xC1, 0x0C, 0xC1, 0x0C,
01439         0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xD0, 0x0C, 0xD0, 0x0C, 0xD0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C,
01440         0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C,
01441         0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C,
01442         0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xD0, 0x0C,
01443         0xC0, 0x0C, 0xC0, 0x0C, 0xC1, 0x0C, 0xC1, 0x0C, 0xB0, 0x0F, 0xB0, 0x0F, 0xB0, 0x0F, 0xB0, 0x0F,
01444         0xB0, 0x0F, 0xB0, 0x0F, 0xB0, 0x0F, 0xB0, 0x0F, 0xA0, 0x0F, 0xB0, 0x0F, 0xB0, 0x0F, 0xA0, 0x0F,
01445         0xA0, 0x0F, 0xB1, 0x0F, 0xB1, 0x0F, 0xA1, 0x0E, 0xB3, 0x0E, 0xC6, 0x0E, 0xD9, 0x0F, 0xFB, 0x0F,
01446         0xFD, 0x0F, 0xFE, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01447         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0E, 0xFF, 0x0F, 0xFE, 0x0F, 0xFD, 0x0F,
01448         0xFA, 0x0F, 0xB5, 0x0D, 0xB3, 0x0D, 0xB1, 0x0D, 0xB2, 0x0E, 0xA1, 0x0D, 0x81, 0x0B, 0x81, 0x0A,
01449         0x72, 0x09, 0x82, 0x09, 0x83, 0x09, 0x82, 0x09, 0x72, 0x09, 0x83, 0x09, 0x84, 0x08, 0x85, 0x08,
01450         0x98, 0x08, 0xAB, 0x08, 0xBC, 0x08, 0xAC, 0x07, 0xAD, 0x07, 0xBD, 0x08, 0xAC, 0x08, 0xAC, 0x09,
01451         0xDE, 0x0B, 0xFF, 0x0E, 0xFF, 0x0E, 0xFF, 0x0E, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xEF, 0x0E,
01452         0xEF, 0x0E, 0xFF, 0x0E, 0xEF, 0x0D, 0xBC, 0x0A, 0xAC, 0x08, 0xAD, 0x08, 0xAD, 0x07, 0xAD, 0x08,
01453         0xAC, 0x08, 0xBB, 0x08, 0xA9, 0x08, 0x85, 0x06, 0x94, 0x07, 0x93, 0x07, 0x93, 0x07, 0x94, 0x07,
01454         0x94, 0x07, 0x93, 0x07, 0x93, 0x07, 0x91, 0x07, 0x91, 0x08, 0xB1, 0x09, 0xC1, 0x0B, 0xD1, 0x0B,
01455         0xC0, 0x0B, 0xC0, 0x0C, 0xC1, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C,
01456         0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C,
01457         0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C,
01458         0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C,
01459         0xD0, 0x0C, 0xD0, 0x0C, 0xD0, 0x0C, 0xD0, 0x0C, 0xD1, 0x0C, 0xC1, 0x0B, 0xC1, 0x0B, 0xC2, 0x0B,
01460         0xB0, 0x0F, 0xB0, 0x0F, 0xB0, 0x0F, 0xA0, 0x0F, 0xA0, 0x0F, 0xA0, 0x0F, 0xA0, 0x0F, 0xB0, 0x0F,
01461         0xA0, 0x0F, 0xB0, 0x0F, 0xB0, 0x0F, 0xB0, 0x0E, 0xB0, 0x0E, 0xB1, 0x0E, 0xB1, 0x0E, 0xA2, 0x0D,
01462         0xC6, 0x0E, 0xD9, 0x0F, 0xEC, 0x0F, 0xFD, 0x0F, 0xFE, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01463         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01464         0xFF, 0x0E, 0xFF, 0x0F, 0xFE, 0x0F, 0xFD, 0x0F, 0xEB, 0x0F, 0xB6, 0x0D, 0xB3, 0x0D, 0xB2, 0x0E,
01465         0xB1, 0x0D, 0x90, 0x0C, 0x81, 0x0A, 0x71, 0x0A, 0x72, 0x09, 0x83, 0x09, 0x83, 0x09, 0x82, 0x08,
01466         0x82, 0x09, 0x83, 0x09, 0x84, 0x09, 0x86, 0x08, 0x98, 0x08, 0xAB, 0x09, 0xBC, 0x08, 0xAC, 0x07,
01467         0xAD, 0x07, 0xAC, 0x08, 0xAC, 0x08, 0xBD, 0x0A, 0xFF, 0x0D, 0xFF, 0x0E, 0xFF, 0x0E, 0xFE, 0x0E,
01468         0xFF, 0x0F, 0xFE, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xEF, 0x0E, 0xFF, 0x0F, 0xFF, 0x0E, 0xDE, 0x0C,
01469         0xAC, 0x08, 0xAD, 0x08, 0xAD, 0x07, 0xAD, 0x08, 0xAC, 0x08, 0xAB, 0x08, 0xA9, 0x08, 0x85, 0x06,
01470         0x93, 0x06, 0x93, 0x07, 0x93, 0x07, 0x93, 0x07, 0x94, 0x06, 0x93, 0x07, 0x93, 0x07, 0x92, 0x07,
01471         0x91, 0x07, 0xA0, 0x08, 0xB1, 0x0A, 0xD1, 0x0B, 0xD1, 0x0C, 0xC0, 0x0B, 0xC0, 0x0B, 0xC0, 0x0C,
01472         0xC1, 0x0C, 0xC1, 0x0C, 0xC1, 0x0C, 0xC1, 0x0C, 0xC1, 0x0C, 0xC1, 0x0C, 0xC1, 0x0C, 0xC1, 0x0C,
01473         0xC1, 0x0C, 0xC1, 0x0C, 0xC1, 0x0C, 0xC1, 0x0C, 0xC1, 0x0C, 0xC1, 0x0C, 0xC1, 0x0C, 0xC1, 0x0C,
01474         0xC1, 0x0C, 0xC1, 0x0C, 0xC1, 0x0C, 0xC1, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C,
01475         0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC1, 0x0C,
01476         0xD2, 0x0C, 0xC2, 0x0C, 0xC3, 0x0C, 0xD3, 0x0C, 0xB0, 0x0E, 0xB0, 0x0F, 0xA0, 0x0F, 0xA0, 0x0F,
01477         0xA0, 0x0F, 0xA0, 0x0F, 0xA0, 0x0F, 0xA0, 0x0F, 0xB0, 0x0F, 0xA0, 0x0F, 0xA0, 0x0E, 0xB0, 0x0E,
01478         0xB1, 0x0E, 0xB2, 0x0E, 0xB2, 0x0E, 0xB5, 0x0E, 0xD9, 0x0F, 0xEC, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F,
01479         0xEF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0E, 0xFF, 0x0F, 0xFF, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F,
01480         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFE, 0x0F, 0xEC, 0x0F,
01481         0xEB, 0x0F, 0xB6, 0x0D, 0xB4, 0x0D, 0xB3, 0x0D, 0xA1, 0x0C, 0x80, 0x0B, 0x71, 0x0A, 0x72, 0x0A,
01482         0x73, 0x09, 0x83, 0x09, 0x83, 0x09, 0x72, 0x08, 0x72, 0x09, 0x83, 0x09, 0x84, 0x08, 0x85, 0x08,
01483         0x98, 0x08, 0xAB, 0x08, 0xBC, 0x08, 0xAC, 0x07, 0xAC, 0x07, 0xAC, 0x08, 0xBD, 0x09, 0xEF, 0x0C,
01484         0xFF, 0x0E, 0xFF, 0x0F, 0xFE, 0x0E, 0xFF, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01485         0xEF, 0x0E, 0xFF, 0x0F, 0xFF, 0x0E, 0xFF, 0x0D, 0xBD, 0x0A, 0xBD, 0x09, 0xAD, 0x07, 0xAD, 0x08,
01486         0xAC, 0x08, 0xAB, 0x08, 0xA9, 0x08, 0x85, 0x06, 0x93, 0x06, 0x93, 0x06, 0x93, 0x06, 0x93, 0x06,
01487         0x93, 0x06, 0x93, 0x06, 0x93, 0x07, 0x93, 0x07, 0x91, 0x07, 0x90, 0x07, 0xB0, 0x09, 0xC1, 0x0B,
01488         0xD1, 0x0C, 0xC0, 0x0B, 0xC0, 0x0B, 0xC0, 0x0B, 0xC1, 0x0C, 0xC1, 0x0C, 0xC1, 0x0C, 0xC1, 0x0C,
01489         0xC1, 0x0C, 0xC1, 0x0C, 0xC1, 0x0C, 0xC1, 0x0C, 0xC1, 0x0C, 0xC1, 0x0C, 0xC1, 0x0C, 0xC1, 0x0C,
01490         0xC1, 0x0C, 0xC1, 0x0C, 0xC1, 0x0C, 0xC1, 0x0C, 0xC1, 0x0C, 0xC1, 0x0C, 0xC1, 0x0C, 0xC0, 0x0C,
01491         0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C,
01492         0xC1, 0x0C, 0xC1, 0x0C, 0xC1, 0x0C, 0xC2, 0x0C, 0xC3, 0x0B, 0xC4, 0x0B, 0xD5, 0x0C, 0xE6, 0x0D,
01493         0xB0, 0x0E, 0xB0, 0x0E, 0xA0, 0x0F, 0xA0, 0x0F, 0xA1, 0x0F, 0xA1, 0x0F, 0xA0, 0x0F, 0xA0, 0x0F,
01494         0xB0, 0x0F, 0xA0, 0x0E, 0xB0, 0x0E, 0xB1, 0x0E, 0xB1, 0x0E, 0xA2, 0x0D, 0xB4, 0x0E, 0xD8, 0x0F,
01495         0xEC, 0x0F, 0xEE, 0x0F, 0xFE, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0E, 0xFF, 0x0E, 0xFF, 0x0F,
01496         0xFF, 0x0F, 0xFF, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01497         0xFF, 0x0F, 0xFF, 0x0F, 0xEE, 0x0F, 0xED, 0x0F, 0xEB, 0x0F, 0xB7, 0x0D, 0xB4, 0x0D, 0xA3, 0x0D,
01498         0x91, 0x0B, 0x80, 0x0A, 0x71, 0x09, 0x72, 0x09, 0x73, 0x09, 0x83, 0x09, 0x83, 0x09, 0x72, 0x08,
01499         0x72, 0x09, 0x73, 0x09, 0x74, 0x08, 0x85, 0x07, 0x98, 0x08, 0xAA, 0x08, 0xAC, 0x08, 0xAC, 0x07,
01500         0xAC, 0x07, 0xBD, 0x09, 0xDE, 0x0B, 0xFF, 0x0E, 0xFF, 0x0E, 0xFF, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F,
01501         0xFE, 0x0F, 0xFE, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0E,
01502         0xEF, 0x0C, 0xCE, 0x0A, 0xAC, 0x08, 0xAD, 0x08, 0xAC, 0x08, 0xAB, 0x08, 0xA9, 0x08, 0x96, 0x06,
01503         0x93, 0x06, 0x93, 0x06, 0x93, 0x06, 0x93, 0x06, 0x94, 0x06, 0x94, 0x06, 0x93, 0x07, 0x93, 0x07,
01504         0x91, 0x07, 0x90, 0x07, 0xA0, 0x08, 0xB1, 0x0A, 0xC1, 0x0B, 0xC1, 0x0B, 0xC0, 0x0B, 0xC0, 0x0B,
01505         0xD1, 0x0C, 0xC1, 0x0C, 0xC1, 0x0C, 0xC1, 0x0C, 0xC0, 0x0C, 0xC1, 0x0C, 0xC1, 0x0C, 0xC1, 0x0C,
01506         0xC1, 0x0C, 0xC1, 0x0C, 0xC1, 0x0C, 0xC1, 0x0C, 0xC1, 0x0C, 0xC1, 0x0C, 0xC1, 0x0C, 0xC1, 0x0C,
01507         0xC1, 0x0C, 0xC1, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C,
01508         0xC0, 0x0B, 0xC0, 0x0B, 0xC0, 0x0B, 0xC0, 0x0C, 0xC1, 0x0C, 0xC1, 0x0C, 0xC1, 0x0C, 0xC3, 0x0C,
01509         0xB4, 0x0B, 0xC6, 0x0C, 0xD8, 0x0D, 0xFA, 0x0E, 0xB0, 0x0E, 0xB0, 0x0E, 0xB0, 0x0E, 0xB1, 0x0F,
01510         0xA1, 0x0F, 0xA1, 0x0F, 0xA1, 0x0F, 0xA1, 0x0F, 0xB0, 0x0F, 0xA0, 0x0E, 0xB0, 0x0E, 0xC2, 0x0E,
01511         0xB3, 0x0D, 0xA3, 0x0C, 0xC7, 0x0E, 0xEB, 0x0F, 0xFD, 0x0F, 0xEE, 0x0F, 0xEE, 0x0F, 0xFF, 0x0F,
01512         0xFF, 0x0F, 0xFF, 0x0E, 0xFF, 0x0E, 0xFF, 0x0F, 0xFF, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F,
01513         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFE, 0x0F, 0xFD, 0x0F,
01514         0xFC, 0x0F, 0xC7, 0x0D, 0xB5, 0x0C, 0x93, 0x0B, 0x81, 0x0A, 0x71, 0x09, 0x72, 0x09, 0x73, 0x09,
01515         0x73, 0x09, 0x73, 0x08, 0x83, 0x08, 0x83, 0x08, 0x83, 0x09, 0x83, 0x09, 0x84, 0x09, 0x85, 0x08,
01516         0x98, 0x08, 0xAB, 0x09, 0xBC, 0x08, 0xAC, 0x08, 0xAC, 0x08, 0xBD, 0x09, 0xFF, 0x0D, 0xFF, 0x0E,
01517         0xFF, 0x0F, 0xEE, 0x0E, 0xFF, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01518         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0E, 0xFF, 0x0E, 0xDE, 0x0B, 0xAC, 0x08, 0xAD, 0x08,
01519         0xAC, 0x08, 0xAB, 0x08, 0xAA, 0x08, 0x97, 0x07, 0x94, 0x06, 0x93, 0x06, 0x93, 0x06, 0x93, 0x06,
01520         0x94, 0x06, 0x94, 0x07, 0x94, 0x07, 0x93, 0x06, 0x92, 0x07, 0x91, 0x07, 0x91, 0x08, 0xA1, 0x09,
01521         0xC1, 0x0A, 0xD2, 0x0C, 0xD1, 0x0C, 0xC1, 0x0B, 0xD1, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C,
01522         0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C,
01523         0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xD0, 0x0C, 0xD1, 0x0C, 0xD0, 0x0C, 0xD0, 0x0C, 0xC0, 0x0C,
01524         0xC0, 0x0C, 0xD0, 0x0C, 0xD0, 0x0C, 0xD0, 0x0C, 0xD0, 0x0C, 0xD0, 0x0C, 0xC0, 0x0C, 0xC1, 0x0C,
01525         0xC1, 0x0C, 0xC1, 0x0B, 0xC2, 0x0B, 0xB3, 0x0B, 0xC6, 0x0B, 0xD9, 0x0D, 0xFB, 0x0E, 0xFC, 0x0F,
01526         0xB0, 0x0E, 0xB0, 0x0E, 0xB1, 0x0E, 0xA1, 0x0E, 0xA2, 0x0E, 0xA2, 0x0E, 0xA2, 0x0F, 0xA1, 0x0F,
01527         0xA1, 0x0E, 0xB1, 0x0E, 0xB2, 0x0E, 0xA2, 0x0D, 0xB4, 0x0D, 0xD8, 0x0F, 0xEA, 0x0F, 0xEC, 0x0F,
01528         0xFE, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0E, 0xFF, 0x0E, 0xFF, 0x0E, 0xFF, 0x0E,
01529         0xFF, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01530         0xFF, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xED, 0x0F, 0xEC, 0x0F, 0xB8, 0x0D, 0x94, 0x0B, 0x82, 0x0A,
01531         0x82, 0x09, 0x82, 0x09, 0x83, 0x09, 0x84, 0x09, 0x84, 0x09, 0x84, 0x09, 0x84, 0x08, 0x83, 0x09,
01532         0x83, 0x09, 0x84, 0x09, 0x74, 0x08, 0x85, 0x08, 0x98, 0x08, 0xAA, 0x08, 0xAB, 0x08, 0x9B, 0x07,
01533         0xBD, 0x09, 0xDF, 0x0C, 0xFF, 0x0E, 0xFF, 0x0E, 0xFF, 0x0E, 0xFF, 0x0F, 0xFE, 0x0F, 0xEE, 0x0F,
01534         0xFE, 0x0F, 0xFE, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0E,
01535         0xFF, 0x0E, 0xEF, 0x0C, 0xCE, 0x0A, 0xAC, 0x08, 0x9B, 0x08, 0xAA, 0x08, 0x99, 0x08, 0x96, 0x07,
01536         0x94, 0x06, 0x93, 0x06, 0x94, 0x06, 0x94, 0x07, 0x94, 0x07, 0x94, 0x07, 0x94, 0x07, 0x94, 0x07,
01537         0x93, 0x07, 0x92, 0x07, 0x91, 0x07, 0x90, 0x07, 0xA1, 0x09, 0xC2, 0x0B, 0xD2, 0x0C, 0xC1, 0x0B,
01538         0xC1, 0x0C, 0xD0, 0x0C, 0xC0, 0x0C, 0xD0, 0x0C, 0xC0, 0x0C, 0xD0, 0x0C, 0xC0, 0x0C, 0xD0, 0x0C,
01539         0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C,
01540         0xC0, 0x0B, 0xC0, 0x0B, 0xC0, 0x0C, 0xC0, 0x0B, 0xC0, 0x0B, 0xC0, 0x0B, 0xC0, 0x0B, 0xC0, 0x0B,
01541         0xC0, 0x0C, 0xD1, 0x0C, 0xD1, 0x0C, 0xD2, 0x0C, 0xC2, 0x0C, 0xC2, 0x0B, 0xC3, 0x0C, 0xC5, 0x0C,
01542         0xEB, 0x0E, 0xFC, 0x0E, 0xFD, 0x0F, 0xFE, 0x0F, 0xB1, 0x0D, 0xB2, 0x0D, 0xB2, 0x0D, 0xB3, 0x0E,
01543         0xA3, 0x0E, 0xA3, 0x0E, 0xA3, 0x0E, 0xB3, 0x0E, 0xA2, 0x0D, 0xA2, 0x0D, 0xA3, 0x0D, 0xB4, 0x0D,
01544         0xC7, 0x0D, 0xEA, 0x0F, 0xFC, 0x0F, 0xFD, 0x0F, 0xFE, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01545         0xFF, 0x0E, 0xFF, 0x0E, 0xFF, 0x0E, 0xFE, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFF, 0x0F,
01546         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xEE, 0x0E, 0xFE, 0x0F, 0xFE, 0x0F,
01547         0xFD, 0x0F, 0xB8, 0x0C, 0x94, 0x0A, 0x83, 0x09, 0x83, 0x09, 0x83, 0x09, 0x84, 0x09, 0x75, 0x09,
01548         0x85, 0x09, 0x85, 0x08, 0x84, 0x08, 0x84, 0x08, 0x84, 0x09, 0x84, 0x09, 0x75, 0x08, 0x86, 0x08,
01549         0x98, 0x08, 0xAA, 0x09, 0xAB, 0x09, 0xAB, 0x08, 0xDE, 0x0B, 0xEF, 0x0D, 0xFF, 0x0E, 0xFF, 0x0E,
01550         0xFF, 0x0F, 0xFF, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01551         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0E, 0xFF, 0x0E, 0xFF, 0x0E, 0xDF, 0x0C, 0xBD, 0x0A,
01552         0xAC, 0x09, 0xAB, 0x09, 0xA9, 0x08, 0x97, 0x07, 0x95, 0x07, 0x94, 0x07, 0x94, 0x07, 0x95, 0x07,
01553         0x95, 0x07, 0x85, 0x07, 0x95, 0x07, 0x94, 0x07, 0x94, 0x07, 0x94, 0x07, 0x93, 0x08, 0x92, 0x08,
01554         0xA2, 0x09, 0xC3, 0x0B, 0xD4, 0x0C, 0xD3, 0x0C, 0xC2, 0x0C, 0xC1, 0x0C, 0xC1, 0x0C, 0xC1, 0x0C,
01555         0xC1, 0x0C, 0xC1, 0x0C, 0xC1, 0x0C, 0xC1, 0x0C, 0xC1, 0x0C, 0xC1, 0x0C, 0xC1, 0x0C, 0xC1, 0x0C,
01556         0xC1, 0x0C, 0xC1, 0x0C, 0xC1, 0x0C, 0xC1, 0x0C, 0xD2, 0x0C, 0xD2, 0x0C, 0xD2, 0x0C, 0xD1, 0x0C,
01557         0xD1, 0x0C, 0xD1, 0x0C, 0xD1, 0x0C, 0xD1, 0x0C, 0xC1, 0x0B, 0xC1, 0x0B, 0xC2, 0x0B, 0xB3, 0x0B,
01558         0xC4, 0x0B, 0xD5, 0x0C, 0xE7, 0x0E, 0xF9, 0x0F, 0xFC, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F,
01559         0xB2, 0x0C, 0xB3, 0x0C, 0xA3, 0x0C, 0xA4, 0x0D, 0xA4, 0x0D, 0xA4, 0x0D, 0xA4, 0x0D, 0xA4, 0x0D,
01560         0xB4, 0x0D, 0xB4, 0x0D, 0xB5, 0x0D, 0xC7, 0x0D, 0xDA, 0x0E, 0xFC, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F,
01561         0xFE, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFE, 0x0E, 0xFE, 0x0E, 0xFE, 0x0E, 0xFE, 0x0F,
01562         0xFE, 0x0F, 0xFE, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01563         0xFF, 0x0F, 0xEE, 0x0F, 0xFF, 0x0F, 0xFE, 0x0F, 0xED, 0x0F, 0xA8, 0x0B, 0x84, 0x09, 0x73, 0x08,
01564         0x73, 0x08, 0x73, 0x08, 0x74, 0x08, 0x75, 0x08, 0x75, 0x08, 0x75, 0x08, 0x74, 0x07, 0x74, 0x08,
01565         0x74, 0x08, 0x74, 0x08, 0x74, 0x07, 0x75, 0x07, 0x88, 0x08, 0x99, 0x08, 0xAA, 0x08, 0xAB, 0x09,
01566         0xEF, 0x0D, 0xFF, 0x0E, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F,
01567         0xFE, 0x0F, 0xFE, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFE, 0x0F,
01568         0xFE, 0x0E, 0xFF, 0x0E, 0xEF, 0x0D, 0xBD, 0x0A, 0xAB, 0x09, 0xAA, 0x09, 0x99, 0x08, 0x86, 0x06,
01569         0x85, 0x06, 0x84, 0x07, 0x85, 0x07, 0x85, 0x07, 0x85, 0x06, 0x85, 0x06, 0x85, 0x06, 0x85, 0x06,
01570         0x84, 0x07, 0x84, 0x07, 0x84, 0x07, 0x83, 0x07, 0x93, 0x08, 0xA3, 0x09, 0xB4, 0x0A, 0xB4, 0x0B,
01571         0xC4, 0x0B, 0xC3, 0x0B, 0xC3, 0x0B, 0xC3, 0x0B, 0xC3, 0x0B, 0xC3, 0x0B, 0xC3, 0x0B, 0xC3, 0x0B,
01572         0xB3, 0x0B, 0xB3, 0x0B, 0xB3, 0x0B, 0xB3, 0x0B, 0xB3, 0x0B, 0xB3, 0x0B, 0xB3, 0x0B, 0xB3, 0x0B,
01573         0xB3, 0x0B, 0xB3, 0x0B, 0xB3, 0x0B, 0xB3, 0x0B, 0xB3, 0x0B, 0xB3, 0x0B, 0xC3, 0x0B, 0xB4, 0x0B,
01574         0xC5, 0x0C, 0xD6, 0x0C, 0xD6, 0x0C, 0xD7, 0x0D, 0xE8, 0x0D, 0xEA, 0x0E, 0xFB, 0x0F, 0xFC, 0x0F,
01575         0xFD, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xE8, 0x0F, 0xE8, 0x0F, 0xE8, 0x0F, 0xE8, 0x0F,
01576         0xD9, 0x0F, 0xD9, 0x0F, 0xD8, 0x0F, 0xD8, 0x0F, 0xD8, 0x0F, 0xD8, 0x0E, 0xD9, 0x0E, 0xEA, 0x0F,
01577         0xFC, 0x0F, 0xFD, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFE, 0x0F,
01578         0xFE, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01579         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFE, 0x0F, 0xFF, 0x0F, 0xFE, 0x0F,
01580         0xFE, 0x0F, 0xDB, 0x0D, 0xC9, 0x0D, 0xC9, 0x0D, 0xC9, 0x0D, 0xCA, 0x0D, 0xCA, 0x0D, 0xCB, 0x0D,
01581         0xCB, 0x0D, 0xCB, 0x0D, 0xCA, 0x0D, 0xCA, 0x0D, 0xC9, 0x0D, 0xCA, 0x0D, 0xCA, 0x0C, 0xCB, 0x0C,
01582         0xDC, 0x0C, 0xDD, 0x0C, 0xEE, 0x0D, 0xEF, 0x0D, 0xFF, 0x0E, 0xFF, 0x0E, 0xFF, 0x0F, 0xFF, 0x0F,
01583         0xFF, 0x0F, 0xFE, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFE, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01584         0xFF, 0x0F, 0xFF, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFE, 0x0E, 0xFF, 0x0E, 0xFF, 0x0E, 0xEF, 0x0D,
01585         0xDE, 0x0C, 0xEE, 0x0D, 0xDD, 0x0D, 0xDB, 0x0C, 0xCA, 0x0B, 0xDA, 0x0C, 0xDA, 0x0C, 0xDA, 0x0C,
01586         0xDA, 0x0C, 0xDA, 0x0C, 0xDB, 0x0C, 0xDB, 0x0C, 0xDA, 0x0C, 0xDA, 0x0C, 0xDA, 0x0C, 0xC9, 0x0C,
01587         0xD8, 0x0C, 0xD9, 0x0D, 0xE9, 0x0D, 0xE9, 0x0E, 0xE9, 0x0E, 0xE8, 0x0E, 0xE8, 0x0E, 0xE8, 0x0E,
01588         0xE8, 0x0E, 0xE8, 0x0E, 0xE8, 0x0E, 0xE8, 0x0E, 0xE9, 0x0E, 0xE9, 0x0E, 0xE9, 0x0E, 0xE9, 0x0E,
01589         0xE9, 0x0E, 0xE9, 0x0E, 0xE9, 0x0E, 0xE9, 0x0E, 0xE9, 0x0E, 0xE9, 0x0E, 0xE9, 0x0E, 0xE9, 0x0E,
01590         0xE9, 0x0E, 0xE9, 0x0E, 0xFA, 0x0E, 0xFA, 0x0E, 0xEA, 0x0E, 0xFB, 0x0E, 0xFB, 0x0F, 0xFC, 0x0F,
01591         0xFD, 0x0F, 0xFD, 0x0F, 0xFD, 0x0F, 0xFD, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F,
01592         0xFB, 0x0F, 0xFB, 0x0F, 0xFC, 0x0F, 0xFC, 0x0F, 0xFC, 0x0F, 0xFB, 0x0F, 0xFB, 0x0F, 0xFB, 0x0F,
01593         0xFC, 0x0F, 0xFC, 0x0F, 0xFC, 0x0F, 0xFD, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F,
01594         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F,
01595         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01596         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xEE, 0x0F, 0xFE, 0x0F, 0xFD, 0x0F, 0xFD, 0x0F, 0xFD, 0x0F,
01597         0xFC, 0x0F, 0xFD, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFD, 0x0F, 0xFD, 0x0F,
01598         0xFD, 0x0F, 0xFD, 0x0F, 0xFD, 0x0F, 0xFE, 0x0E, 0xFF, 0x0E, 0xFF, 0x0E, 0xFF, 0x0E, 0xFF, 0x0F,
01599         0xFF, 0x0F, 0xEF, 0x0F, 0xEF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFF, 0x0F,
01600         0xFE, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F,
01601         0xFE, 0x0E, 0xFE, 0x0E, 0xFF, 0x0E, 0xFF, 0x0E, 0xFF, 0x0E, 0xFF, 0x0E, 0xFF, 0x0E, 0xFE, 0x0F,
01602         0xFD, 0x0E, 0xFD, 0x0E, 0xFD, 0x0F, 0xFD, 0x0F, 0xFD, 0x0F, 0xFD, 0x0E, 0xFE, 0x0E, 0xFE, 0x0F,
01603         0xFE, 0x0E, 0xFE, 0x0F, 0xFD, 0x0F, 0xFD, 0x0E, 0xFD, 0x0F, 0xFC, 0x0F, 0xFC, 0x0F, 0xFC, 0x0F,
01604         0xFD, 0x0F, 0xFD, 0x0F, 0xFD, 0x0F, 0xFD, 0x0F, 0xFD, 0x0F, 0xFD, 0x0F, 0xFD, 0x0F, 0xFD, 0x0F,
01605         0xFD, 0x0F, 0xFD, 0x0F, 0xFD, 0x0F, 0xFD, 0x0F, 0xFD, 0x0F, 0xFD, 0x0F, 0xFD, 0x0F, 0xFD, 0x0F,
01606         0xFD, 0x0F, 0xFD, 0x0F, 0xFD, 0x0F, 0xFD, 0x0F, 0xFD, 0x0F, 0xFD, 0x0F, 0xFD, 0x0F, 0xFD, 0x0F,
01607         0xFE, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01608         0xFE, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F,
01609         0xFD, 0x0F, 0xFD, 0x0F, 0xFD, 0x0F, 0xFD, 0x0F, 0xFD, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F,
01610         0xFE, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01611         0xFF, 0x0F, 0xFE, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01612         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xEE, 0x0E,
01613         0xFF, 0x0F, 0xEE, 0x0F, 0xFD, 0x0F, 0xED, 0x0F, 0xFD, 0x0F, 0xFE, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01614         0xFF, 0x0F, 0xFF, 0x0F, 0xFE, 0x0F, 0xFD, 0x0F, 0xFD, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F,
01615         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0E, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01616         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01617         0xFF, 0x0F, 0xFF, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFF, 0x0F, 0xFF, 0x0E, 0xFF, 0x0F,
01618         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F,
01619         0xFE, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFE, 0x0F,
01620         0xFE, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F,
01621         0xFE, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F,
01622         0xFE, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01623         0xFE, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01624         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01625         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F,
01626         0xFE, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFE, 0x0F, 0xFF, 0x0F,
01627         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01628         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0E, 0xFF, 0x0F,
01629         0xFE, 0x0E, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F,
01630         0xFE, 0x0F, 0xFE, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F,
01631         0xFE, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01632         0xFF, 0x0F, 0xFF, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01633         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F,
01634         0xFE, 0x0F, 0xFE, 0x0E, 0xFF, 0x0E, 0xFF, 0x0E, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01635         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01636         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01637         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01638         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01639         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01640         0xFE, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F,
01641         0xFE, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01642         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01643         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01644         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01645         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01646         0xFF, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01647         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01648         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFE, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFE, 0x0F,
01649         0xFE, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01650         0xFF, 0x0F, 0xFF, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01651         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01652         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01653         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01654         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01655         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01656         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F,
01657         0xFE, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01658         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01659         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01660         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01661         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01662         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01663         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01664         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01665         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01666         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01667         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01668         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01669         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01670         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01671         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01672         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01673         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01674         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01675         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01676         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01677         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01678         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01679         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01680         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01681         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01682         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01683         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01684         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01685         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01686         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01687         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01688         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01689         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01690         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01691         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01692         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01693         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01694         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01695         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01696         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01697         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01698         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01699         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01700         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01701         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01702         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01703         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01704         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01705         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01706         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01707         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01708         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01709         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01710         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01711         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01712         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01713         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01714         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01715         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01716         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01717         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01718         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01719         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01720         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01721         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01722         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01723         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01724         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01725         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01726         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01727         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01728         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01729         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01730         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01731         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01732         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01733         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01734         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01735         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01736         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01737         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01738         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01739         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01740         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01741         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01742         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01743         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01744         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01745         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01746         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01747         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01748         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01749         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01750         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01751         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01752         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01753         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01754         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01755         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01756         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01757         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01758         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01759         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01760         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01761         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01762         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01763         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01764         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01765         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01766         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01767         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01768         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01769         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01770         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01771         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01772         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01773         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01774         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01775         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01776         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01777         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01778         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01779         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01780         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01781         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01782         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01783         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01784         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01785         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01786         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01787         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01788         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01789         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01790         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01791         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01792         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01793         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01794         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01795         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01796         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01797         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01798         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01799         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01800         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01801         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01802         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01803         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01804         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01805         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01806         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01807         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01808         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01809         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01810         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01811         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01812         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01813         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01814         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01815         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01816         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01817         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01818         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01819         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01820         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01821         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01822         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01823         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01824         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01825         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01826         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01827         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01828         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01829         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01830         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01831         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01832         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01833         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01834         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01835         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01836         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01837         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01838         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01839         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01840         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01841         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01842         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01843         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01844         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01845         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01846         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01847         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01848         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01849         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01850         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01851         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01852         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01853         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01854         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01855         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01856         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01857         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01858         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01859         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01860         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01861         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01862         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01863         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01864         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01865         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01866         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01867         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01868         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01869         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01870         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01871         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01872         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01873         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01874         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01875         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01876         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01877         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01878         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01879         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01880         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01881         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01882         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01883         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01884         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01885         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01886         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01887         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01888         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01889         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01890         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01891         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01892         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01893         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01894         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01895         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01896         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01897         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01898         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01899         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01900         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01901         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01902         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01903         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01904         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01905         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01906         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01907         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01908         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01909         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01910         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01911         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01912         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01913         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01914         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01915         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01916         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01917         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01918         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01919         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01920         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01921         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01922         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01923         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01924         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01925         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01926         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01927         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01928         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01929         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01930         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01931         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01932         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01933         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01934         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01935         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01936         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01937         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01938         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01939         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01940         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01941         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01942         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01943         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01944         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01945         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01946         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01947         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01948         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01949         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01950         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01951         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01952         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01953         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01954         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01955         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01956         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01957         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01958         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01959         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01960         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01961         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01962         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01963         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01964         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01965         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01966         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01967         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01968         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01969         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01970         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01971         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01972         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01973         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01974         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01975         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01976         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01977         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01978         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01979         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01980         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01981         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01982         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01983         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01984         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01985         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01986         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01987         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01988         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01989         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01990         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01991         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01992         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01993         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01994         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01995         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01996         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01997         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01998         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01999         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02000         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02001         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02002         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02003         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02004         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02005         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02006         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02007         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02008         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02009         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02010         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02011         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02012         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02013         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02014         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02015         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02016         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02017         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02018         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02019         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02020         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02021         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02022         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02023         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02024         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02025         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02026         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02027         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02028         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02029         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02030         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02031         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02032         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02033         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02034         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02035         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02036         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02037         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02038         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02039         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02040         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02041         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02042         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02043         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02044         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02045         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02046         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02047         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02048         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02049         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02050         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02051         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02052         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02053         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02054         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02055         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02056         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02057         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02058         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02059         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02060         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02061         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02062         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02063         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02064         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02065         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02066         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02067         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02068         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02069         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02070         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02071         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02072         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02073         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02074         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02075         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02076         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02077         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02078         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02079         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02080         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02081         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02082         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02083         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02084         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02085         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02086         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02087         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02088         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02089         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02090         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02091         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02092         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02093         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02094         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02095         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02096         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02097         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02098         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02099         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02100         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02101         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02102         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02103         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02104         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02105         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02106         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02107         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02108         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02109         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02110         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02111         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02112         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02113         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02114         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02115         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02116         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02117         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02118         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02119         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02120         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02121         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02122         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02123         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02124         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02125         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02126         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02127         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02128         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02129         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02130         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02131         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02132         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02133         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02134         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02135         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02136         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02137         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02138         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02139         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02140         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02141         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02142         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02143         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02144         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02145         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02146         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02147         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02148         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02149         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02150         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02151         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02152         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02153         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02154         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02155         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02156         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02157         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02158         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02159         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02160         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02161         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02162         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02163         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02164         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02165         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02166         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02167         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02168         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02169         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02170         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02171         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02172         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02173         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02174         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02175         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02176         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02177         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02178         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02179         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02180         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02181         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02182         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02183         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02184         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02185         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02186         0x00, 0x00
02187 };
02188
02189 Bmp_t NXP_Logo =
02190 {
02191   132,
02192   132,
02193   12,
02194   2,
02195   NULL,
02196   (unsigned int *)&NXP_LogoStream
02197 };
Generated on Tue Jun 7 14:59:01 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/LCD/NOKIA6610_LCD/NXP_logo.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/LCD/NOKIA6610_LCD/NXP_logo.h

Go to the documentation of this file.
00001 /*************************************************************************
00002  *    File name   : NXP_logo.h
00003  *    Description : NXP Logo include file
00004  **************************************************************************/
00005 #include "drv_glcd.h"
00006
00007
00008 #ifndef __NXP_LOGO_H
00009 #define __NXP_LOGO_H
00010
00011 extern Bmp_t NXP_Logo;
00012
00013 #endif // __NXP_LOGO_H
Generated on Tue Jun 7 14:59:01 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/PWM/Dual_Edge/lpc17xx_libcfg.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/PWM/Dual_Edge/lpc17xx_libcfg.h

Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          lpc17xx_libcfg.h                        2010-05-21
00003 */
00026 #ifndef LPC17XX_LIBCFG_H_
00027 #define LPC17XX_LIBCFG_H_
00028
00029 #include "lpc_types.h"
00030
00031
00032 /************************** DEBUG MODE DEFINITIONS *********************************/
00033 /* Un-comment the line below to compile the library in DEBUG mode, this will expanse
00034    the "CHECK_PARAM" macro in the FW library code */
00035
00036 #define DEBUG
00037
00038
00039 /******************* PERIPHERAL FW LIBRARY CONFIGURATION DEFINITIONS ***********************/
00040
00041 /* Comment the line below to disable the specific peripheral inclusion */
00042
00043 /* DEBUG_FRAMWORK ------------------------------ */
00044 //#define _DBGFWK
00045
00046 /* GPIO ------------------------------- */
00047 //#define _GPIO
00048
00049 /* EXTI ------------------------------- */
00050 //#define _EXTI
00051
00052 /* UART ------------------------------- */
00053 //#define _UART
00054 //#define _UART0
00055 //#define _UART1
00056 //#define _UART2
00057 //#define _UART3
00058
00059 /* SPI ------------------------------- */
00060 //#define _SPI
00061
00062 /* SSP ------------------------------- */
00063 //#define _SSP
00064 //#define _SSP0
00065 //#define _SSP1
00066
00067 /* SYSTICK --------------------------- */
00068 //#define _SYSTICK
00069
00070 /* I2C ------------------------------- */
00071 //#define _I2C
00072 //#define _I2C0
00073 //#define _I2C1
00074 //#define _I2C2
00075
00076 /* TIMER ------------------------------- */
00077 //#define _TIM
00078
00079 /* WDT ------------------------------- */
00080 //#define _WDT
00081
00082
00083 /* GPDMA ------------------------------- */
00084 //#define _GPDMA
00085
00086
00087 /* DAC ------------------------------- */
00088 //#define _DAC
00089
00090 /* DAC ------------------------------- */
00091 //#define _ADC
00092
00093
00094 /* PWM ------------------------------- */
00095 #define _PWM
00096 #define _PWM1
00097
00098 /* RTC ------------------------------- */
00099 //#define _RTC
00100
00101 /* I2S ------------------------------- */
00102 //#define _I2S
00103
00104 /* USB device ------------------------------- */
00105 //#define _USBDEV
00106 //#define _USB_DMA
00107
00108 /* QEI ------------------------------- */
00109 //#define _QEI
00110
00111 /* MCPWM ------------------------------- */
00112 //#define _MCPWM
00113
00114 /* CAN--------------------------------*/
00115 //#define _CAN
00116
00117 /* RIT ------------------------------- */
00118 //#define _RIT
00119
00120 /* EMAC ------------------------------ */
00121 //#define _EMAC
00122
00123
00124 /************************** GLOBAL/PUBLIC MACRO DEFINITIONS *********************************/
00125
00126 #ifdef  DEBUG
00127 /*******************************************************************************
00128 * @brief                The CHECK_PARAM macro is used for function's parameters check.
00129 *                               It is used only if the library is compiled in DEBUG mode.
00130 * @param[in]    expr - If expr is false, it calls check_failed() function
00131 *                       which reports the name of the source file and the source
00132 *                       line number of the call that failed.
00133 *                    - If expr is true, it returns no value.
00134 * @return               None
00135 *******************************************************************************/
00136 #define CHECK_PARAM(expr) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))
00137 #else
00138 #define CHECK_PARAM(expr)
00139 #endif /* DEBUG */
00140
00141
00142
00143 /************************** GLOBAL/PUBLIC FUNCTION DECLARATION *********************************/
00144
00145 #ifdef  DEBUG
00146 void check_failed(uint8_t *file, uint32_t line);
00147 #endif
00148
00149
00150 #endif /* LPC17XX_LIBCFG_H_ */
Generated on Tue Jun 7 14:58:57 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/PWM/Match_Interrupt/lpc17xx_libcfg.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/PWM/Match_Interrupt/lpc17xx_libcfg.h

Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          lpc17xx_libcfg.h                        2010-05-21
00003 */
00026 #ifndef LPC17XX_LIBCFG_H_
00027 #define LPC17XX_LIBCFG_H_
00028
00029 #include "lpc_types.h"
00030
00031
00032 /************************** DEBUG MODE DEFINITIONS *********************************/
00033 /* Un-comment the line below to compile the library in DEBUG mode, this will expanse
00034    the "CHECK_PARAM" macro in the FW library code */
00035
00036 #define DEBUG
00037
00038
00039 /******************* PERIPHERAL FW LIBRARY CONFIGURATION DEFINITIONS ***********************/
00040
00041 /* Comment the line below to disable the specific peripheral inclusion */
00042
00043 /* DEBUG_FRAMWORK ------------------------------ */
00044 //#define _DBGFWK
00045
00046 /* GPIO ------------------------------- */
00047 //#define _GPIO
00048
00049 /* EXTI ------------------------------- */
00050 //#define _EXTI
00051
00052 /* UART ------------------------------- */
00053 //#define _UART
00054 //#define _UART0
00055 //#define _UART1
00056 //#define _UART2
00057 //#define _UART3
00058
00059 /* SPI ------------------------------- */
00060 //#define _SPI
00061
00062 /* SSP ------------------------------- */
00063 //#define _SSP
00064 //#define _SSP0
00065 //#define _SSP1
00066
00067 /* SYSTICK --------------------------- */
00068 //#define _SYSTICK
00069
00070 /* I2C ------------------------------- */
00071 //#define _I2C
00072 //#define _I2C0
00073 //#define _I2C1
00074 //#define _I2C2
00075
00076 /* TIMER ------------------------------- */
00077 //#define _TIM
00078
00079 /* WDT ------------------------------- */
00080 //#define _WDT
00081
00082
00083 /* GPDMA ------------------------------- */
00084 //#define _GPDMA
00085
00086
00087 /* DAC ------------------------------- */
00088 //#define _DAC
00089
00090 /* DAC ------------------------------- */
00091 //#define _ADC
00092
00093
00094 /* PWM ------------------------------- */
00095 #define _PWM
00096 #define _PWM1
00097
00098 /* RTC ------------------------------- */
00099 //#define _RTC
00100
00101 /* I2S ------------------------------- */
00102 //#define _I2S
00103
00104 /* USB device ------------------------------- */
00105 //#define _USBDEV
00106 //#define _USB_DMA
00107
00108 /* QEI ------------------------------- */
00109 //#define _QEI
00110
00111 /* MCPWM ------------------------------- */
00112 //#define _MCPWM
00113
00114 /* CAN--------------------------------*/
00115 //#define _CAN
00116
00117 /* RIT ------------------------------- */
00118 //#define _RIT
00119
00120 /* EMAC ------------------------------ */
00121 //#define _EMAC
00122
00123
00124 /************************** GLOBAL/PUBLIC MACRO DEFINITIONS *********************************/
00125
00126 #ifdef  DEBUG
00127 /*******************************************************************************
00128 * @brief                The CHECK_PARAM macro is used for function's parameters check.
00129 *                               It is used only if the library is compiled in DEBUG mode.
00130 * @param[in]    expr - If expr is false, it calls check_failed() function
00131 *                       which reports the name of the source file and the source
00132 *                       line number of the call that failed.
00133 *                    - If expr is true, it returns no value.
00134 * @return               None
00135 *******************************************************************************/
00136 #define CHECK_PARAM(expr) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))
00137 #else
00138 #define CHECK_PARAM(expr)
00139 #endif /* DEBUG */
00140
00141
00142
00143 /************************** GLOBAL/PUBLIC FUNCTION DECLARATION *********************************/
00144
00145 #ifdef  DEBUG
00146 void check_failed(uint8_t *file, uint32_t line);
00147 #endif
00148
00149
00150 #endif /* LPC17XX_LIBCFG_H_ */
Generated on Tue Jun 7 14:58:58 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/PWM/Single_Edge/lpc17xx_libcfg.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/PWM/Single_Edge/lpc17xx_libcfg.h

Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          lpc17xx_libcfg.h                        2010-05-21
00003 */
00026 #ifndef LPC17XX_LIBCFG_H_
00027 #define LPC17XX_LIBCFG_H_
00028
00029 #include "lpc_types.h"
00030
00031
00032 /************************** DEBUG MODE DEFINITIONS *********************************/
00033 /* Un-comment the line below to compile the library in DEBUG mode, this will expanse
00034    the "CHECK_PARAM" macro in the FW library code */
00035
00036 #define DEBUG
00037
00038 /******************* PERIPHERAL FW LIBRARY CONFIGURATION DEFINITIONS ***********************/
00039
00040 /* Comment the line below to disable the specific peripheral inclusion */
00041
00042 /* DEBUG_FRAMWORK ------------------------------ */
00043 //#define _DBGFWK
00044
00045 /* GPIO ------------------------------- */
00046 //#define _GPIO
00047
00048 /* EXTI ------------------------------- */
00049 //#define _EXTI
00050
00051 /* UART ------------------------------- */
00052 //#define _UART
00053 //#define _UART0
00054 //#define _UART1
00055 //#define _UART2
00056 //#define _UART3
00057
00058 /* SPI ------------------------------- */
00059 //#define _SPI
00060
00061 /* SSP ------------------------------- */
00062 //#define _SSP
00063 //#define _SSP0
00064 //#define _SSP1
00065
00066 /* SYSTICK --------------------------- */
00067 //#define _SYSTICK
00068
00069 /* I2C ------------------------------- */
00070 //#define _I2C
00071 //#define _I2C0
00072 //#define _I2C1
00073 //#define _I2C2
00074
00075 /* TIMER ------------------------------- */
00076 //#define _TIM
00077
00078 /* WDT ------------------------------- */
00079 //#define _WDT
00080
00081
00082 /* GPDMA ------------------------------- */
00083 //#define _GPDMA
00084
00085
00086 /* DAC ------------------------------- */
00087 //#define _DAC
00088
00089 /* DAC ------------------------------- */
00090 //#define _ADC
00091
00092
00093 /* PWM ------------------------------- */
00094 #define _PWM
00095 #define _PWM1
00096
00097 /* RTC ------------------------------- */
00098 //#define _RTC
00099
00100 /* I2S ------------------------------- */
00101 //#define _I2S
00102
00103 /* USB device ------------------------------- */
00104 //#define _USBDEV
00105 //#define _USB_DMA
00106
00107 /* QEI ------------------------------- */
00108 //#define _QEI
00109
00110 /* MCPWM ------------------------------- */
00111 //#define _MCPWM
00112
00113 /* CAN--------------------------------*/
00114 //#define _CAN
00115
00116 /* RIT ------------------------------- */
00117 //#define _RIT
00118
00119 /* EMAC ------------------------------ */
00120 //#define _EMAC
00121
00122
00123 /************************** GLOBAL/PUBLIC MACRO DEFINITIONS *********************************/
00124
00125 #ifdef  DEBUG
00126 /*******************************************************************************
00127 * @brief                The CHECK_PARAM macro is used for function's parameters check.
00128 *                               It is used only if the library is compiled in DEBUG mode.
00129 * @param[in]    expr - If expr is false, it calls check_failed() function
00130 *                       which reports the name of the source file and the source
00131 *                       line number of the call that failed.
00132 *                    - If expr is true, it returns no value.
00133 * @return               None
00134 *******************************************************************************/
00135 #define CHECK_PARAM(expr) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))
00136 #else
00137 #define CHECK_PARAM(expr)
00138 #endif /* DEBUG */
00139
00140
00141
00142 /************************** GLOBAL/PUBLIC FUNCTION DECLARATION *********************************/
00143
00144 #ifdef  DEBUG
00145 void check_failed(uint8_t *file, uint32_t line);
00146 #endif
00147
00148
00149 #endif /* LPC17XX_LIBCFG_H_ */
Generated on Tue Jun 7 14:58:58 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/PWR/EXTINT_Sleep/lpc17xx_libcfg.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/PWR/EXTINT_Sleep/lpc17xx_libcfg.h

Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          lpc17xx_libcfg.h                        2010-05-21
00003 */
00025 #ifndef LPC17XX_LIBCFG_H_
00026 #define LPC17XX_LIBCFG_H_
00027
00028 #include "lpc_types.h"
00029
00030
00031 /************************** DEBUG MODE DEFINITIONS *********************************/
00032 /* Un-comment the line below to compile the library in DEBUG mode, this will expanse
00033    the "CHECK_PARAM" macro in the FW library code */
00034
00035 #define DEBUG
00036
00037
00038 /******************* PERIPHERAL FW LIBRARY CONFIGURATION DEFINITIONS ***********************/
00039
00040 /* Comment the line below to disable the specific peripheral inclusion */
00041
00042 /* DEBUG_FRAMWORK ------------------------------ */
00043 #define _DBGFWK
00044
00045
00046 /* GPIO ------------------------------- */
00047 #define _GPIO
00048
00049 /* EXTI ------------------------------- */
00050 #define _EXTI
00051
00052 /* UART ------------------------------- */
00053 #define _UART
00054 #define _UART0
00055 //#define _UART1
00056 //#define _UART2
00057 //#define _UART3
00058
00059 /* SPI ------------------------------- */
00060 //#define _SPI
00061
00062 /* SSP ------------------------------- */
00063 //#define _SSP
00064 //#define _SSP0
00065 //#define _SSP1
00066
00067 /* SYSTICK --------------------------- */
00068 //#define _SYSTICK
00069
00070 /* I2C ------------------------------- */
00071 //#define _I2C
00072 //#define _I2C0
00073 //#define _I2C1
00074 //#define _I2C2
00075
00076 /* TIMER ------------------------------- */
00077 //#define _TIM
00078
00079 /* WDT ------------------------------- */
00080 //#define _WDT
00081
00082
00083 /* GPDMA ------------------------------- */
00084 //#define _GPDMA
00085
00086
00087 /* DAC ------------------------------- */
00088 //#define _DAC
00089
00090 /* DAC ------------------------------- */
00091 //#define _ADC
00092
00093
00094 /* PWM ------------------------------- */
00095 //#define _PWM
00096 //#define _PWM1
00097
00098 /* RTC ------------------------------- */
00099 //#define _RTC
00100
00101 /* I2S ------------------------------- */
00102 //#define _I2S
00103
00104 /* USB device ------------------------------- */
00105 //#define _USBDEV
00106 //#define _USB_DMA
00107
00108 /* QEI ------------------------------- */
00109 //#define _QEI
00110
00111 /* MCPWM ------------------------------- */
00112 //#define _MCPWM
00113
00114 /* CAN--------------------------------*/
00115 //#define _CAN
00116
00117 /* RIT ------------------------------- */
00118 //#define _RIT
00119
00120 /* EMAC ------------------------------ */
00121 //#define _EMAC
00122
00123 /************************** GLOBAL/PUBLIC MACRO DEFINITIONS *********************************/
00124
00125 #ifdef  DEBUG
00126 /*******************************************************************************
00127 * @brief                The CHECK_PARAM macro is used for function's parameters check.
00128 *                               It is used only if the library is compiled in DEBUG mode.
00129 * @param[in]    expr - If expr is false, it calls check_failed() function
00130 *                       which reports the name of the source file and the source
00131 *                       line number of the call that failed.
00132 *                    - If expr is true, it returns no value.
00133 * @return               None
00134 *******************************************************************************/
00135 #define CHECK_PARAM(expr) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))
00136 #else
00137 #define CHECK_PARAM(expr)
00138 #endif /* DEBUG */
00139
00140
00141
00142 /************************** GLOBAL/PUBLIC FUNCTION DECLARATION *********************************/
00143
00144 #ifdef  DEBUG
00145 void check_failed(uint8_t *file, uint32_t line);
00146 #endif
00147
00148
00149 #endif /* LPC17XX_LIBCFG_H_ */
Generated on Tue Jun 7 14:58:58 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/PWR/NMI_PowerDown/lpc17xx_libcfg.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/PWR/NMI_PowerDown/lpc17xx_libcfg.h

Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          lpc17xx_libcfg.h                        2010-05-21
00003 */
00026 #ifndef LPC17XX_LIBCFG_H_
00027 #define LPC17XX_LIBCFG_H_
00028
00029 #include "lpc_types.h"
00030
00031
00032 /************************** DEBUG MODE DEFINITIONS *********************************/
00033 /* Un-comment the line below to compile the library in DEBUG mode, this will expanse
00034    the "CHECK_PARAM" macro in the FW library code */
00035
00036 #define DEBUG
00037
00038
00039 /******************* PERIPHERAL FW LIBRARY CONFIGURATION DEFINITIONS ***********************/
00040
00041 /* Comment the line below to disable the specific peripheral inclusion */
00042
00043 /* DEBUG_FRAMWORK ------------------------------ */
00044 #define _DBGFWK
00045
00046
00047 /* GPIO ------------------------------- */
00048 #define _GPIO
00049
00050 /* EXTI ------------------------------- */
00051 //#define _EXTI
00052
00053 /* UART ------------------------------- */
00054 #define _UART
00055 #define _UART0
00056 //#define _UART1
00057 //#define _UART2
00058 //#define _UART3
00059
00060 /* SPI ------------------------------- */
00061 //#define _SPI
00062
00063 /* SSP ------------------------------- */
00064 //#define _SSP
00065 //#define _SSP0
00066 //#define _SSP1
00067
00068 /* SYSTICK --------------------------- */
00069 //#define _SYSTICK
00070
00071 /* I2C ------------------------------- */
00072 //#define _I2C
00073 //#define _I2C0
00074 //#define _I2C1
00075 //#define _I2C2
00076
00077 /* TIMER ------------------------------- */
00078 //#define _TIM
00079
00080 /* WDT ------------------------------- */
00081 //#define _WDT
00082
00083
00084 /* GPDMA ------------------------------- */
00085 //#define _GPDMA
00086
00087
00088 /* DAC ------------------------------- */
00089 //#define _DAC
00090
00091 /* DAC ------------------------------- */
00092 //#define _ADC
00093
00094
00095 /* PWM ------------------------------- */
00096 //#define _PWM
00097 //#define _PWM1
00098
00099 /* RTC ------------------------------- */
00100 //#define _RTC
00101
00102 /* I2S ------------------------------- */
00103 //#define _I2S
00104
00105 /* USB device ------------------------------- */
00106 //#define _USBDEV
00107 //#define _USB_DMA
00108
00109 /* QEI ------------------------------- */
00110 //#define _QEI
00111
00112 /* MCPWM ------------------------------- */
00113 //#define _MCPWM
00114
00115 /* CAN--------------------------------*/
00116 //#define _CAN
00117
00118 /* RIT ------------------------------- */
00119 //#define _RIT
00120
00121 /* EMAC ------------------------------ */
00122 //#define _EMAC
00123
00124 /************************** GLOBAL/PUBLIC MACRO DEFINITIONS *********************************/
00125
00126 #ifdef  DEBUG
00127 /*******************************************************************************
00128 * @brief                The CHECK_PARAM macro is used for function's parameters check.
00129 *                               It is used only if the library is compiled in DEBUG mode.
00130 * @param[in]    expr - If expr is false, it calls check_failed() function
00131 *                       which reports the name of the source file and the source
00132 *                       line number of the call that failed.
00133 *                    - If expr is true, it returns no value.
00134 * @return               None
00135 *******************************************************************************/
00136 #define CHECK_PARAM(expr) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))
00137 #else
00138 #define CHECK_PARAM(expr)
00139 #endif /* DEBUG */
00140
00141
00142
00143 /************************** GLOBAL/PUBLIC FUNCTION DECLARATION *********************************/
00144
00145 #ifdef  DEBUG
00146 void check_failed(uint8_t *file, uint32_t line);
00147 #endif
00148
00149
00150 #endif /* LPC17XX_LIBCFG_H_ */
Generated on Tue Jun 7 14:58:58 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/PWR/RTC_DeepPWD/lpc17xx_libcfg.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/PWR/RTC_DeepPWD/lpc17xx_libcfg.h

Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          lpc17xx_libcfg.h                        2010-05-21
00003 */
00026 #ifndef LPC17XX_LIBCFG_H_
00027 #define LPC17XX_LIBCFG_H_
00028
00029 #include "lpc_types.h"
00030
00031
00032 /************************** DEBUG MODE DEFINITIONS *********************************/
00033 /* Un-comment the line below to compile the library in DEBUG mode, this will expanse
00034    the "CHECK_PARAM" macro in the FW library code */
00035
00036 #define DEBUG
00037
00038
00039 /******************* PERIPHERAL FW LIBRARY CONFIGURATION DEFINITIONS ***********************/
00040
00041 /* Comment the line below to disable the specific peripheral inclusion */
00042
00043 /* DEBUG_FRAMWORK ------------------------------ */
00044 #define _DBGFWK
00045
00046
00047 /* GPIO ------------------------------- */
00048 #define _GPIO
00049
00050 /* EXTI ------------------------------- */
00051 //#define _EXTI
00052
00053 /* UART ------------------------------- */
00054 #define _UART
00055 #define _UART0
00056 //#define _UART1
00057 //#define _UART2
00058 //#define _UART3
00059
00060 /* SPI ------------------------------- */
00061 //#define _SPI
00062
00063 /* SSP ------------------------------- */
00064 //#define _SSP
00065 //#define _SSP0
00066 //#define _SSP1
00067
00068 /* SYSTICK --------------------------- */
00069 //#define _SYSTICK
00070
00071 /* I2C ------------------------------- */
00072 //#define _I2C
00073 //#define _I2C0
00074 //#define _I2C1
00075 //#define _I2C2
00076
00077 /* TIMER ------------------------------- */
00078 //#define _TIM
00079
00080 /* WDT ------------------------------- */
00081 //#define _WDT
00082
00083
00084 /* GPDMA ------------------------------- */
00085 //#define _GPDMA
00086
00087
00088 /* DAC ------------------------------- */
00089 //#define _DAC
00090
00091 /* DAC ------------------------------- */
00092 //#define _ADC
00093
00094
00095 /* PWM ------------------------------- */
00096 //#define _PWM
00097 //#define _PWM1
00098
00099 /* RTC ------------------------------- */
00100 #define _RTC
00101
00102 /* I2S ------------------------------- */
00103 //#define _I2S
00104
00105 /* USB device ------------------------------- */
00106 //#define _USBDEV
00107 //#define _USB_DMA
00108
00109 /* QEI ------------------------------- */
00110 //#define _QEI
00111
00112 /* MCPWM ------------------------------- */
00113 //#define _MCPWM
00114
00115 /* CAN--------------------------------*/
00116 //#define _CAN
00117
00118 /* RIT ------------------------------- */
00119 //#define _RIT
00120
00121 /* EMAC ------------------------------ */
00122 //#define _EMAC
00123
00124 /************************** GLOBAL/PUBLIC MACRO DEFINITIONS *********************************/
00125
00126 #ifdef  DEBUG
00127 /*******************************************************************************
00128 * @brief                The CHECK_PARAM macro is used for function's parameters check.
00129 *                               It is used only if the library is compiled in DEBUG mode.
00130 * @param[in]    expr - If expr is false, it calls check_failed() function
00131 *                       which reports the name of the source file and the source
00132 *                       line number of the call that failed.
00133 *                    - If expr is true, it returns no value.
00134 * @return               None
00135 *******************************************************************************/
00136 #define CHECK_PARAM(expr) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))
00137 #else
00138 #define CHECK_PARAM(expr)
00139 #endif /* DEBUG */
00140
00141
00142
00143 /************************** GLOBAL/PUBLIC FUNCTION DECLARATION *********************************/
00144
00145 #ifdef  DEBUG
00146 void check_failed(uint8_t *file, uint32_t line);
00147 #endif
00148
00149
00150 #endif /* LPC17XX_LIBCFG_H_ */
Generated on Tue Jun 7 14:58:58 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/PWR/WDT_DeepSleep/lpc17xx_libcfg.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/PWR/WDT_DeepSleep/lpc17xx_libcfg.h

Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          lpc17xx_libcfg.h                        2010-05-21
00003 */
00025 #ifndef LPC17XX_LIBCFG_H_
00026 #define LPC17XX_LIBCFG_H_
00027
00028 #include "lpc_types.h"
00029
00030
00031 /************************** DEBUG MODE DEFINITIONS *********************************/
00032 /* Un-comment the line below to compile the library in DEBUG mode, this will expanse
00033    the "CHECK_PARAM" macro in the FW library code */
00034
00035 #define DEBUG
00036
00037
00038 /******************* PERIPHERAL FW LIBRARY CONFIGURATION DEFINITIONS ***********************/
00039
00040 /* Comment the line below to disable the specific peripheral inclusion */
00041
00042 /* DEBUG_FRAMWORK ------------------------------ */
00043 #define _DBGFWK
00044
00045 /* GPIO ------------------------------- */
00046 //#define _GPIO
00047
00048 /* EXTI ------------------------------- */
00049 //#define _EXTI
00050
00051 /* UART ------------------------------- */
00052 #define _UART
00053 #define _UART0
00054 //#define _UART1
00055 //#define _UART2
00056 //#define _UART3
00057
00058 /* SPI ------------------------------- */
00059 //#define _SPI
00060
00061 /* SSP ------------------------------- */
00062 //#define _SSP
00063 //#define _SSP0
00064 //#define _SSP1
00065
00066 /* SYSTICK --------------------------- */
00067 //#define _SYSTICK
00068
00069 /* I2C ------------------------------- */
00070 //#define _I2C
00071 //#define _I2C0
00072 //#define _I2C1
00073 //#define _I2C2
00074
00075 /* TIMER ------------------------------- */
00076 //#define _TIM
00077
00078 /* WDT ------------------------------- */
00079 #define _WDT
00080
00081
00082 /* GPDMA ------------------------------- */
00083 //#define _GPDMA
00084
00085
00086 /* DAC ------------------------------- */
00087 //#define _DAC
00088
00089 /* DAC ------------------------------- */
00090 //#define _ADC
00091
00092
00093 /* PWM ------------------------------- */
00094 //#define _PWM
00095 //#define _PWM1
00096
00097 /* RTC ------------------------------- */
00098 //#define _RTC
00099
00100 /* I2S ------------------------------- */
00101 //#define _I2S
00102
00103 /* USB device ------------------------------- */
00104 //#define _USBDEV
00105 //#define _USB_DMA
00106
00107 /* QEI ------------------------------- */
00108 //#define _QEI
00109
00110 /* MCPWM ------------------------------- */
00111 //#define _MCPWM
00112
00113 /* CAN--------------------------------*/
00114 //#define _CAN
00115
00116 /* RIT ------------------------------- */
00117 //#define _RIT
00118
00119 /* EMAC ------------------------------ */
00120 //#define _EMAC
00121
00122 /************************** GLOBAL/PUBLIC MACRO DEFINITIONS *********************************/
00123
00124 #ifdef  DEBUG
00125 /*******************************************************************************
00126 * @brief                The CHECK_PARAM macro is used for function's parameters check.
00127 *                               It is used only if the library is compiled in DEBUG mode.
00128 * @param[in]    expr - If expr is false, it calls check_failed() function
00129 *                       which reports the name of the source file and the source
00130 *                       line number of the call that failed.
00131 *                    - If expr is true, it returns no value.
00132 * @return               None
00133 *******************************************************************************/
00134 #define CHECK_PARAM(expr) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))
00135 #else
00136 #define CHECK_PARAM(expr)
00137 #endif /* DEBUG */
00138
00139
00140
00141 /************************** GLOBAL/PUBLIC FUNCTION DECLARATION *********************************/
00142
00143 #ifdef  DEBUG
00144 void check_failed(uint8_t *file, uint32_t line);
00145 #endif
00146
00147
00148 #endif /* LPC17XX_LIBCFG_H_ */
Generated on Tue Jun 7 14:58:58 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/Project_Template/Eclipse_GNU/lpc17xx_libcfg.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/Project_Template/Eclipse_GNU/lpc17xx_libcfg.h

Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          lpc17xx_libcfg.h                        2010-05-21
00003 */
00026 #ifndef LPC17XX_LIBCFG_H_
00027 #define LPC17XX_LIBCFG_H_
00028
00029 #include "lpc_types.h"
00030
00031
00032 /************************** DEBUG MODE DEFINITIONS *********************************/
00033 /* Un-comment the line below to compile the library in DEBUG mode, this will expanse
00034    the "CHECK_PARAM" macro in the FW library code */
00035
00036 #define DEBUG
00037
00038 /******************* PERIPHERAL FW LIBRARY CONFIGURATION DEFINITIONS ***********************/
00039
00040 /* Comment the line below to disable the specific peripheral inclusion */
00041
00042 /* DEBUG_FRAMWORK ------------------------------ */
00043 #define _DBGFWK
00044
00045 /* GPIO ------------------------------- */
00046 //#define _GPIO
00047
00048 /* EXTI ------------------------------- */
00049 //#define _EXTI
00050
00051 /* UART ------------------------------- */
00052 #define _UART
00053 #define _UART0
00054 //#define _UART1
00055 //#define _UART2
00056 //#define _UART3
00057
00058 /* SPI ------------------------------- */
00059 //#define _SPI
00060
00061 /* SSP ------------------------------- */
00062 //#define _SSP
00063 //#define _SSP0
00064 //#define _SSP1
00065
00066 /* SYSTICK --------------------------- */
00067 //#define _SYSTICK
00068
00069 /* I2C ------------------------------- */
00070 //#define _I2C
00071 //#define _I2C0
00072 //#define _I2C1
00073 //#define _I2C2
00074
00075 /* TIMER ------------------------------- */
00076 //#define _TIM
00077
00078 /* WDT ------------------------------- */
00079 //#define _WDT
00080
00081
00082 /* GPDMA ------------------------------- */
00083 //#define _GPDMA
00084
00085
00086 /* DAC ------------------------------- */
00087 //#define _DAC
00088
00089 /* DAC ------------------------------- */
00090 //#define _ADC
00091
00092
00093 /* PWM ------------------------------- */
00094 //#define _PWM
00095 //#define _PWM1
00096
00097 /* RTC ------------------------------- */
00098 //#define _RTC
00099
00100 /* I2S ------------------------------- */
00101 //#define _I2S
00102
00103 /* USB device ------------------------------- */
00104 //#define _USBDEV
00105 //#define _USB_DMA
00106
00107 /* QEI ------------------------------- */
00108 //#define _QEI
00109
00110 /* MCPWM ------------------------------- */
00111 //#define _MCPWM
00112
00113 /* CAN--------------------------------*/
00114 //#define _CAN
00115
00116 /* RIT ------------------------------- */
00117 //#define _RIT
00118
00119 /* EMAC ------------------------------ */
00120 //#define _EMAC
00121
00122
00123 /************************** GLOBAL/PUBLIC MACRO DEFINITIONS *********************************/
00124
00125 #ifdef  DEBUG
00126 /*******************************************************************************
00127 * @brief                The CHECK_PARAM macro is used for function's parameters check.
00128 *                               It is used only if the library is compiled in DEBUG mode.
00129 * @param[in]    expr - If expr is false, it calls check_failed() function
00130 *                       which reports the name of the source file and the source
00131 *                       line number of the call that failed.
00132 *                    - If expr is true, it returns no value.
00133 * @return               None
00134 *******************************************************************************/
00135 #define CHECK_PARAM(expr) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))
00136 #else
00137 #define CHECK_PARAM(expr)
00138 #endif /* DEBUG */
00139
00140
00141
00142 /************************** GLOBAL/PUBLIC FUNCTION DECLARATION *********************************/
00143
00144 #ifdef  DEBUG
00145 void check_failed(uint8_t *file, uint32_t line);
00146 #endif
00147
00148
00149 #endif /* LPC17XX_LIBCFG_H_ */
Generated on Tue Jun 7 14:58:57 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/QEI/QEI_Velo/lpc17xx_libcfg.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/QEI/QEI_Velo/lpc17xx_libcfg.h

Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          lpc17xx_libcfg.h                        2010-05-21
00003 */
00026 #ifndef LPC17XX_LIBCFG_H_
00027 #define LPC17XX_LIBCFG_H_
00028
00029 #include "lpc_types.h"
00030
00031
00032 /************************** DEBUG MODE DEFINITIONS *********************************/
00033 /******************* PERIPHERAL FW LIBRARY CONFIGURATION DEFINITIONS ***********************/
00034
00035 /* Un-comment the line below to compile the library in DEBUG mode, this will expanse
00036    the "CHECK_PARAM" macro in the FW library code */
00037
00038 #define DEBUG
00039
00040
00041 /******************* PERIPHERAL FW LIBRARY CONFIGURATION DEFINITIONS ***********************/
00042
00043 /* Comment the line below to disable the specific peripheral inclusion */
00044
00045 /* DEBUG_FRAMWORK ------------------------------ */
00046 #define _DBGFWK
00047
00048
00049 /* GPIO ------------------------------- */
00050 #define _GPIO
00051
00052 /* EXTI ------------------------------- */
00053 //#define _EXTI
00054
00055 /* UART ------------------------------- */
00056 #define _UART
00057 #define _UART0
00058 //#define _UART1
00059 //#define _UART2
00060 //#define _UART3
00061
00062 /* SPI ------------------------------- */
00063 //#define _SPI
00064
00065 /* SSP ------------------------------- */
00066 //#define _SSP
00067 //#define _SSP0
00068 //#define _SSP1
00069
00070 /* SYSTICK --------------------------- */
00071 //#define _SYSTICK
00072
00073 /* I2C ------------------------------- */
00074 //#define _I2C
00075 //#define _I2C0
00076 //#define _I2C1
00077 //#define _I2C2
00078
00079 /* TIMER ------------------------------- */
00080 #define _TIM
00081
00082 /* WDT ------------------------------- */
00083 //#define _WDT
00084
00085
00086 /* GPDMA ------------------------------- */
00087 //#define _GPDMA
00088
00089
00090 /* DAC ------------------------------- */
00091 //#define _DAC
00092
00093 /* DAC ------------------------------- */
00094 //#define _ADC
00095
00096
00097 /* PWM ------------------------------- */
00098 //#define _PWM
00099 //#define _PWM1
00100
00101 /* RTC ------------------------------- */
00102 //#define _RTC
00103
00104 /* I2S ------------------------------- */
00105 //#define _I2S
00106
00107 /* USB device ------------------------------- */
00108 //#define _USBDEV
00109 //#define _USB_DMA
00110
00111 /* QEI ------------------------------- */
00112 #define _QEI
00113
00114 /* MCPWM ------------------------------- */
00115 //#define _MCPWM
00116
00117 /* CAN--------------------------------*/
00118 //#define _CAN
00119
00120 /* RIT ------------------------------- */
00121 //#define _RIT
00122
00123 /* EMAC ------------------------------ */
00124 //#define _EMAC
00125
00126 /************************** GLOBAL/PUBLIC MACRO DEFINITIONS *********************************/
00127
00128 #ifdef  DEBUG
00129 /*******************************************************************************
00130 * @brief                The CHECK_PARAM macro is used for function's parameters check.
00131 *                               It is used only if the library is compiled in DEBUG mode.
00132 * @param[in]    expr - If expr is false, it calls check_failed() function
00133 *                       which reports the name of the source file and the source
00134 *                       line number of the call that failed.
00135 *                    - If expr is true, it returns no value.
00136 * @return               None
00137 *******************************************************************************/
00138 #define CHECK_PARAM(expr) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))
00139 #else
00140 #define CHECK_PARAM(expr)
00141 #endif /* DEBUG */
00142
00143
00144
00145 /************************** GLOBAL/PUBLIC FUNCTION DECLARATION *********************************/
00146
00147 #ifdef  DEBUG
00148 void check_failed(uint8_t *file, uint32_t line);
00149 #endif
00150
00151
00152 #endif /* LPC17XX_LIBCFG_H_ */
Generated on Tue Jun 7 14:58:58 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/LCD/QVGA_TFT_LCD/lcdtest.c Source File

C:/nxpdrv/LPC1700CMSIS/Examples/LCD/QVGA_TFT_LCD/lcdtest.c

Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          lcdtest.c                               2010-05-21
00003 */
00025 #include "lpc17xx_gpio.h"
00026 #include "lpc17xx_libcfg.h"
00027 #include "lpc17xx_pinsel.h"
00028 #include "GLCD.h"
00029
00030 /* Example group ----------------------------------------------------------- */
00036 /************************** PRIVATE DEFINITIONS ********************/
00037 // Time out definition - used in blocking mode in read/write function
00038 #define TIME_OUT        10000
00039
00040
00041 /************************** PRIVATE VARIABLES *************************/
00042 //uint8_t menu1[] =
00043 //"********************************************************************************\n\r"
00044 //"Hello NXP Semiconductors \n\r"
00045 //" 4-bit LCD demo \n\r"
00046 //"\t - MCU: LPC17xx \n\r"
00047 //"\t - Core: ARM Cortex-M3 \n\r"
00048 //"\t - Communicate via: UART0 - 115200bps \n\r"
00049 //" This example used to test LCD via GPIO peripheral on LPC1768 \n\r"
00050 //"********************************************************************************\n\r";
00051 //uint8_t menu2[] = "Demo terminated! \n\r";
00052
00053 // UART Configuration structure variable
00054 //UART_CFG_Type UARTConfigStruct;
00055
00056 uint8_t lcd_text[2][16+1] = {"   NXP SEMI.    ",      /* Buffer for LCD text      */
00057                           "  LPC1768/CM3" };
00058
00059 /************************** PRIVATE FUNCTIONS *************************/
00060 void print_menu(void);
00061
00062 /*********************************************************************/
00067 //void print_menu(void)
00068 //{
00069 //      _DBG(menu1);
00070 //}
00071
00072
00073 /*-------------------------MAIN FUNCTION------------------------------*/
00074 /*********************************************************************/
00079 int c_entry(void)
00080 {
00081 //      /* Initialize debug via UART0
00082 //       * – 115200bps
00083 //       * – 8 data bit
00084 //       * – No parity
00085 //       * – 1 stop bit
00086 //       * – No flow control
00087 //       */
00088 //      debug_frmwrk_init();
00089 //
00090 //      // print welcome screen
00091 //      print_menu();
00092
00093         /* LCD block section -------------------------------------------- */
00094         GLCD_Init();
00095         GLCD_Clear(White);
00096
00097         /* Update LCD Module display text. */
00098         GLCD_DisplayString(0,0, lcd_text[0] );
00099         GLCD_DisplayString(1,2, lcd_text[1] );
00100
00101     /* Loop forever */
00102     while(1);
00103 }
00104
00105 /* With ARM and GHS toolsets, the entry point is main() - this will
00106    allow the linker to generate wrapper code to setup stacks, allocate
00107    heap area, and initialize and copy code and data segments. For GNU
00108    toolsets, the entry point is through __start() in the crt0_gnu.asm
00109    file, and that startup code will setup stacks and data */
00110 int main(void)
00111 {
00112     return c_entry();
00113 }
00114
00115
00116 #ifdef  DEBUG
00117 /*******************************************************************************
00118 * @brief                Reports the name of the source file and the source line number
00119 *                               where the CHECK_PARAM error has occurred.
00120 * @param[in]    file Pointer to the source file name
00121 * @param[in]    line assert_param error line source number
00122 * @return               None
00123 *******************************************************************************/
00124 void check_failed(uint8_t *file, uint32_t line)
00125 {
00126         /* User can add his own implementation to report the file name and line number,
00127          ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
00128
00129         /* Infinite loop */
00130         while(1);
00131 }
00132 #endif
00133
00134 /*
00135  * @}
00136  */
Generated on Tue Jun 7 14:59:01 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/RIT/Interrupt/lpc17xx_libcfg.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/RIT/Interrupt/lpc17xx_libcfg.h

Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          lpc17xx_libcfg.h                        2010-05-21
00003 */
00026 #ifndef LPC17XX_LIBCFG_H_
00027 #define LPC17XX_LIBCFG_H_
00028
00029 #include "lpc_types.h"
00030
00031
00032 /************************** DEBUG MODE DEFINITIONS *********************************/
00033 /* Un-comment the line below to compile the library in DEBUG mode, this will expanse
00034    the "CHECK_PARAM" macro in the FW library code */
00035
00036 #define DEBUG
00037
00038
00039 /******************* PERIPHERAL FW LIBRARY CONFIGURATION DEFINITIONS ***********************/
00040
00041 /* Comment the line below to disable the specific peripheral inclusion */
00042
00043 /* DEBUG_FRAMWORK ------------------------------ */
00044 #define _DBGFWK
00045
00046 /* GPIO ------------------------------- */
00047 #define _GPIO
00048
00049 /* EXTI ------------------------------- */
00050 //#define _EXTI
00051
00052 /* UART ------------------------------- */
00053 #define _UART
00054 #define _UART0
00055 //#define _UART1
00056 //#define _UART2
00057 //#define _UART3
00058
00059 /* SPI ------------------------------- */
00060 //#define _SPI
00061
00062 /* SSP ------------------------------- */
00063 //#define _SSP
00064 //#define _SSP0
00065 //#define _SSP1
00066
00067 /* SYSTICK --------------------------- */
00068 //#define _SYSTICK
00069
00070 /* I2C ------------------------------- */
00071 //#define _I2C
00072 //#define _I2C0
00073 //#define _I2C1
00074 //#define _I2C2
00075
00076 /* TIMER ------------------------------- */
00077 //#define _TIM
00078
00079 /* WDT ------------------------------- */
00080 //#define _WDT
00081
00082
00083 /* GPDMA ------------------------------- */
00084 //#define _GPDMA
00085
00086
00087 /* DAC ------------------------------- */
00088 //#define _DAC
00089
00090 /* DAC ------------------------------- */
00091 //#define _ADC
00092
00093
00094 /* PWM ------------------------------- */
00095 //#define _PWM
00096 //#define _PWM1
00097
00098 /* RTC ------------------------------- */
00099 //#define _RTC
00100
00101 /* I2S ------------------------------- */
00102 //#define _I2S
00103
00104 /* USB device ------------------------------- */
00105 //#define _USBDEV
00106 //#define _USB_DMA
00107
00108 /* QEI ------------------------------- */
00109 //#define _QEI
00110
00111 /* MCPWM ------------------------------- */
00112 //#define _MCPWM
00113
00114 /* CAN--------------------------------*/
00115 //#define _CAN
00116
00117 /* RIT ------------------------------- */
00118 #define _RIT
00119
00120 /* EMAC ------------------------------ */
00121 //#define _EMAC
00122
00123 /************************** GLOBAL/PUBLIC MACRO DEFINITIONS *********************************/
00124
00125 #ifdef  DEBUG
00126 /*******************************************************************************
00127 * @brief                The CHECK_PARAM macro is used for function's parameters check.
00128 *                               It is used only if the library is compiled in DEBUG mode.
00129 * @param[in]    expr - If expr is false, it calls check_failed() function
00130 *                       which reports the name of the source file and the source
00131 *                       line number of the call that failed.
00132 *                    - If expr is true, it returns no value.
00133 * @return               None
00134 *******************************************************************************/
00135 #define CHECK_PARAM(expr) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))
00136 #else
00137 #define CHECK_PARAM(expr)
00138 #endif /* DEBUG */
00139
00140
00141
00142 /************************** GLOBAL/PUBLIC FUNCTION DECLARATION *********************************/
00143
00144 #ifdef  DEBUG
00145 void check_failed(uint8_t *file, uint32_t line);
00146 #endif
00147
00148
00149 #endif /* LPC17XX_LIBCFG_H_ */
Generated on Tue Jun 7 14:58:58 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/RTC/AlarmCntIncrInterrupt/lpc17xx_libcfg.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/RTC/AlarmCntIncrInterrupt/lpc17xx_libcfg.h

Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          lpc17xx_libcfg.h                        2010-05-21
00003 */
00026 #ifndef LPC17XX_LIBCFG_H_
00027 #define LPC17XX_LIBCFG_H_
00028
00029 #include "lpc_types.h"
00030
00031
00032 /************************** DEBUG MODE DEFINITIONS *********************************/
00033 /* Un-comment the line below to compile the library in DEBUG mode, this will expanse
00034    the "CHECK_PARAM" macro in the FW library code */
00035
00036 #define DEBUG
00037
00038
00039 /******************* PERIPHERAL FW LIBRARY CONFIGURATION DEFINITIONS ***********************/
00040
00041 /* Comment the line below to disable the specific peripheral inclusion */
00042
00043 /* DEBUG_FRAMWORK ------------------------------ */
00044 #define _DBGFWK
00045
00046 /* GPIO ------------------------------- */
00047 //#define _GPIO
00048
00049 /* EXTI ------------------------------- */
00050 //#define _EXTI
00051
00052 /* UART ------------------------------- */
00053 #define _UART
00054 #define _UART0
00055 //#define _UART1
00056 //#define _UART2
00057 //#define _UART3
00058
00059 /* SPI ------------------------------- */
00060 //#define _SPI
00061
00062 /* SSP ------------------------------- */
00063 //#define _SSP
00064 //#define _SSP0
00065 //#define _SSP1
00066
00067 /* SYSTICK --------------------------- */
00068 //#define _SYSTICK
00069
00070 /* I2C ------------------------------- */
00071 //#define _I2C
00072 //#define _I2C0
00073 //#define _I2C1
00074 //#define _I2C2
00075
00076 /* TIMER ------------------------------- */
00077 //#define _TIM
00078
00079 /* WDT ------------------------------- */
00080 //#define _WDT
00081
00082
00083 /* GPDMA ------------------------------- */
00084 //#define _GPDMA
00085
00086
00087 /* DAC ------------------------------- */
00088 //#define _DAC
00089
00090 /* DAC ------------------------------- */
00091 //#define _ADC
00092
00093
00094 /* PWM ------------------------------- */
00095 //#define _PWM
00096 //#define _PWM1
00097
00098 /* RTC ------------------------------- */
00099 #define _RTC
00100
00101 /* I2S ------------------------------- */
00102 //#define _I2S
00103
00104 /* USB device ------------------------------- */
00105 //#define _USBDEV
00106 //#define _USB_DMA
00107
00108 /* QEI ------------------------------- */
00109 //#define _QEI
00110
00111 /* MCPWM ------------------------------- */
00112 //#define _MCPWM
00113
00114 /* CAN--------------------------------*/
00115 //#define _CAN
00116
00117 /* RIT ------------------------------- */
00118 //#define _RIT
00119
00120 /* EMAC ------------------------------ */
00121 //#define _EMAC
00122
00123 /************************** GLOBAL/PUBLIC MACRO DEFINITIONS *********************************/
00124
00125 #ifdef  DEBUG
00126 /*******************************************************************************
00127 * @brief                The CHECK_PARAM macro is used for function's parameters check.
00128 *                               It is used only if the library is compiled in DEBUG mode.
00129 * @param[in]    expr - If expr is false, it calls check_failed() function
00130 *                       which reports the name of the source file and the source
00131 *                       line number of the call that failed.
00132 *                    - If expr is true, it returns no value.
00133 * @return               None
00134 *******************************************************************************/
00135 #define CHECK_PARAM(expr) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))
00136 #else
00137 #define CHECK_PARAM(expr)
00138 #endif /* DEBUG */
00139
00140
00141
00142 /************************** GLOBAL/PUBLIC FUNCTION DECLARATION *********************************/
00143
00144 #ifdef  DEBUG
00145 void check_failed(uint8_t *file, uint32_t line);
00146 #endif
00147
00148
00149 #endif /* LPC17XX_LIBCFG_H_ */
Generated on Tue Jun 7 14:58:58 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/RTC/Calibration/lpc17xx_libcfg.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/RTC/Calibration/lpc17xx_libcfg.h

Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          lpc17xx_libcfg.h                        2010-05-21
00003 */
00026 #ifndef LPC17XX_LIBCFG_H_
00027 #define LPC17XX_LIBCFG_H_
00028
00029 #include "lpc_types.h"
00030
00031
00032 /************************** DEBUG MODE DEFINITIONS *********************************/
00033 /* Un-comment the line below to compile the library in DEBUG mode, this will expanse
00034    the "CHECK_PARAM" macro in the FW library code */
00035
00036 #define DEBUG
00037
00038
00039 /******************* PERIPHERAL FW LIBRARY CONFIGURATION DEFINITIONS ***********************/
00040
00041 /* Comment the line below to disable the specific peripheral inclusion */
00042
00043 /* DEBUG_FRAMWORK ------------------------------ */
00044 #define _DBGFWK
00045
00046 /* GPIO ------------------------------- */
00047 //#define _GPIO
00048
00049 /* EXTI ------------------------------- */
00050 //#define _EXTI
00051
00052 /* UART ------------------------------- */
00053 #define _UART
00054 #define _UART0
00055 //#define _UART1
00056 //#define _UART2
00057 //#define _UART3
00058
00059 /* SPI ------------------------------- */
00060 //#define _SPI
00061
00062 /* SSP ------------------------------- */
00063 //#define _SSP
00064 //#define _SSP0
00065 //#define _SSP1
00066
00067 /* SYSTICK --------------------------- */
00068 //#define _SYSTICK
00069
00070 /* I2C ------------------------------- */
00071 //#define _I2C
00072 //#define _I2C0
00073 //#define _I2C1
00074 //#define _I2C2
00075
00076 /* TIMER ------------------------------- */
00077 //#define _TIM
00078
00079 /* WDT ------------------------------- */
00080 //#define _WDT
00081
00082
00083 /* GPDMA ------------------------------- */
00084 //#define _GPDMA
00085
00086
00087 /* DAC ------------------------------- */
00088 //#define _DAC
00089
00090 /* DAC ------------------------------- */
00091 //#define _ADC
00092
00093
00094 /* PWM ------------------------------- */
00095 //#define _PWM
00096 //#define _PWM1
00097
00098 /* RTC ------------------------------- */
00099 #define _RTC
00100
00101 /* I2S ------------------------------- */
00102 //#define _I2S
00103
00104 /* USB device ------------------------------- */
00105 //#define _USBDEV
00106 //#define _USB_DMA
00107
00108 /* QEI ------------------------------- */
00109 //#define _QEI
00110
00111 /* MCPWM ------------------------------- */
00112 //#define _MCPWM
00113
00114 /* CAN--------------------------------*/
00115 //#define _CAN
00116
00117 /* RIT ------------------------------- */
00118 //#define _RIT
00119
00120 /* EMAC ------------------------------ */
00121 //#define _EMAC
00122
00123 /************************** GLOBAL/PUBLIC MACRO DEFINITIONS *********************************/
00124
00125 #ifdef  DEBUG
00126 /*******************************************************************************
00127 * @brief                The CHECK_PARAM macro is used for function's parameters check.
00128 *                               It is used only if the library is compiled in DEBUG mode.
00129 * @param[in]    expr - If expr is false, it calls check_failed() function
00130 *                       which reports the name of the source file and the source
00131 *                       line number of the call that failed.
00132 *                    - If expr is true, it returns no value.
00133 * @return               None
00134 *******************************************************************************/
00135 #define CHECK_PARAM(expr) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))
00136 #else
00137 #define CHECK_PARAM(expr)
00138 #endif /* DEBUG */
00139
00140
00141
00142 /************************** GLOBAL/PUBLIC FUNCTION DECLARATION *********************************/
00143
00144 #ifdef  DEBUG
00145 void check_failed(uint8_t *file, uint32_t line);
00146 #endif
00147
00148
00149 #endif /* LPC17XX_LIBCFG_H_ */
Generated on Tue Jun 7 14:58:58 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/SPI/LoopBack/lpc17xx_libcfg.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/SPI/LoopBack/lpc17xx_libcfg.h

Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          lpc17xx_libcfg.h                        2010-05-21
00003 */
00026 #ifndef LPC17XX_LIBCFG_H_
00027 #define LPC17XX_LIBCFG_H_
00028
00029 #include "lpc_types.h"
00030
00031
00032 /************************** DEBUG MODE DEFINITIONS *********************************/
00033 /* Un-comment the line below to compile the library in DEBUG mode, this will expanse
00034    the "CHECK_PARAM" macro in the FW library code */
00035
00036 #define DEBUG
00037
00038
00039 /******************* PERIPHERAL FW LIBRARY CONFIGURATION DEFINITIONS ***********************/
00040
00041 /* Comment the line below to disable the specific peripheral inclusion */
00042
00043 /* DEBUG_FRAMWORK ------------------------------ */
00044 #define _DBGFWK
00045
00046 /* GPIO ------------------------------- */
00047 #define _GPIO
00048
00049 /* EXTI ------------------------------- */
00050 //#define _EXTI
00051
00052 /* UART ------------------------------- */
00053 #define _UART
00054 #define _UART0
00055 //#define _UART1
00056 //#define _UART2
00057 //#define _UART3
00058
00059 /* SPI ------------------------------- */
00060 #define _SPI
00061
00062 /* SSP ------------------------------- */
00063 //#define _SSP
00064 //#define _SSP0
00065 //#define _SSP1
00066
00067 /* SYSTICK --------------------------- */
00068 //#define _SYSTICK
00069
00070 /* I2C ------------------------------- */
00071 //#define _I2C
00072 //#define _I2C0
00073 //#define _I2C1
00074 //#define _I2C2
00075
00076 /* TIMER ------------------------------- */
00077 //#define _TIM
00078
00079 /* WDT ------------------------------- */
00080 //#define _WDT
00081
00082
00083 /* GPDMA ------------------------------- */
00084 //#define _GPDMA
00085
00086
00087 /* DAC ------------------------------- */
00088 //#define _DAC
00089
00090 /* DAC ------------------------------- */
00091 //#define _ADC
00092
00093
00094 /* PWM ------------------------------- */
00095 //#define _PWM
00096 //#define _PWM1
00097
00098 /* RTC ------------------------------- */
00099 //#define _RTC
00100
00101 /* I2S ------------------------------- */
00102 //#define _I2S
00103
00104 /* USB device ------------------------------- */
00105 //#define _USBDEV
00106 //#define _USB_DMA
00107
00108 /* QEI ------------------------------- */
00109 //#define _QEI
00110
00111 /* MCPWM ------------------------------- */
00112 //#define _MCPWM
00113
00114 /* CAN--------------------------------*/
00115 //#define _CAN
00116
00117 /* RIT ------------------------------- */
00118 //#define _RIT
00119
00120 /* EMAC ------------------------------ */
00121 //#define _EMAC
00122
00123 /************************** GLOBAL/PUBLIC MACRO DEFINITIONS *********************************/
00124
00125 #ifdef  DEBUG
00126 /*******************************************************************************
00127 * @brief                The CHECK_PARAM macro is used for function's parameters check.
00128 *                               It is used only if the library is compiled in DEBUG mode.
00129 * @param[in]    expr - If expr is false, it calls check_failed() function
00130 *                       which reports the name of the source file and the source
00131 *                       line number of the call that failed.
00132 *                    - If expr is true, it returns no value.
00133 * @return               None
00134 *******************************************************************************/
00135 #define CHECK_PARAM(expr) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))
00136 #else
00137 #define CHECK_PARAM(expr)
00138 #endif /* DEBUG */
00139
00140
00141
00142 /************************** GLOBAL/PUBLIC FUNCTION DECLARATION *********************************/
00143
00144 #ifdef  DEBUG
00145 void check_failed(uint8_t *file, uint32_t line);
00146 #endif
00147
00148
00149 #endif /* LPC17XX_LIBCFG_H_ */
Generated on Tue Jun 7 14:58:58 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/SPI/Master/lpc17xx_libcfg.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/SPI/Master/lpc17xx_libcfg.h

Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          lpc17xx_libcfg.h                        2010-05-21
00003 */
00026 #ifndef LPC17XX_LIBCFG_H_
00027 #define LPC17XX_LIBCFG_H_
00028
00029 #include "lpc_types.h"
00030
00031
00032 /************************** DEBUG MODE DEFINITIONS *********************************/
00033 /* Un-comment the line below to compile the library in DEBUG mode, this will expanse
00034    the "CHECK_PARAM" macro in the FW library code */
00035
00036 #define DEBUG
00037
00038
00039 /******************* PERIPHERAL FW LIBRARY CONFIGURATION DEFINITIONS ***********************/
00040
00041 /* Comment the line below to disable the specific peripheral inclusion */
00042
00043 /* DEBUG_FRAMWORK ------------------------------ */
00044 #define _DBGFWK
00045
00046 /* GPIO ------------------------------- */
00047 #define _GPIO
00048
00049 /* EXTI ------------------------------- */
00050 //#define _EXTI
00051
00052 /* UART ------------------------------- */
00053 #define _UART
00054 #define _UART0
00055 //#define _UART1
00056 //#define _UART2
00057 //#define _UART3
00058
00059 /* SPI ------------------------------- */
00060 #define _SPI
00061
00062 /* SSP ------------------------------- */
00063 //#define _SSP
00064 //#define _SSP0
00065 //#define _SSP1
00066
00067 /* SYSTICK --------------------------- */
00068 //#define _SYSTICK
00069
00070 /* I2C ------------------------------- */
00071 //#define _I2C
00072 //#define _I2C0
00073 //#define _I2C1
00074 //#define _I2C2
00075
00076 /* TIMER ------------------------------- */
00077 //#define _TIM
00078
00079 /* WDT ------------------------------- */
00080 //#define _WDT
00081
00082
00083 /* GPDMA ------------------------------- */
00084 //#define _GPDMA
00085
00086
00087 /* DAC ------------------------------- */
00088 //#define _DAC
00089
00090 /* DAC ------------------------------- */
00091 //#define _ADC
00092
00093
00094 /* PWM ------------------------------- */
00095 //#define _PWM
00096 //#define _PWM1
00097
00098 /* RTC ------------------------------- */
00099 //#define _RTC
00100
00101 /* I2S ------------------------------- */
00102 //#define _I2S
00103
00104 /* USB device ------------------------------- */
00105 //#define _USBDEV
00106 //#define _USB_DMA
00107
00108 /* QEI ------------------------------- */
00109 //#define _QEI
00110
00111 /* MCPWM ------------------------------- */
00112 //#define _MCPWM
00113
00114 /* CAN--------------------------------*/
00115 //#define _CAN
00116
00117 /* RIT ------------------------------- */
00118 //#define _RIT
00119
00120 /* EMAC ------------------------------ */
00121 //#define _EMAC
00122
00123
00124 /************************** GLOBAL/PUBLIC MACRO DEFINITIONS *********************************/
00125
00126 #ifdef  DEBUG
00127 /*******************************************************************************
00128 * @brief                The CHECK_PARAM macro is used for function's parameters check.
00129 *                               It is used only if the library is compiled in DEBUG mode.
00130 * @param[in]    expr - If expr is false, it calls check_failed() function
00131 *                       which reports the name of the source file and the source
00132 *                       line number of the call that failed.
00133 *                    - If expr is true, it returns no value.
00134 * @return               None
00135 *******************************************************************************/
00136 #define CHECK_PARAM(expr) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))
00137 #else
00138 #define CHECK_PARAM(expr)
00139 #endif /* DEBUG */
00140
00141
00142
00143 /************************** GLOBAL/PUBLIC FUNCTION DECLARATION *********************************/
00144
00145 #ifdef  DEBUG
00146 void check_failed(uint8_t *file, uint32_t line);
00147 #endif
00148
00149
00150 #endif /* LPC17XX_LIBCFG_H_ */
Generated on Tue Jun 7 14:58:58 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/SPI/SDCard/lpc17xx_libcfg.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/SPI/SDCard/lpc17xx_libcfg.h

Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          lpc17xx_libcfg.h                        2010-05-21
00003 */
00026 #ifndef LPC17XX_LIBCFG_H_
00027 #define LPC17XX_LIBCFG_H_
00028
00029 #include "lpc_types.h"
00030
00031
00032 /************************** DEBUG MODE DEFINITIONS *********************************/
00033 /* Un-comment the line below to compile the library in DEBUG mode, this will expanse
00034    the "CHECK_PARAM" macro in the FW library code */
00035
00036 #define DEBUG
00037
00038
00039 /******************* PERIPHERAL FW LIBRARY CONFIGURATION DEFINITIONS ***********************/
00040
00041 /* Comment the line below to disable the specific peripheral inclusion */
00042
00043 /* DEBUG_FRAMWORK ------------------------------ */
00044 #define _DBGFWK
00045
00046 /* GPIO ------------------------------- */
00047 #define _GPIO
00048
00049 /* EXTI ------------------------------- */
00050 //#define _EXTI
00051
00052 /* UART ------------------------------- */
00053 #define _UART
00054 #define _UART0
00055 //#define _UART1
00056 //#define _UART2
00057 //#define _UART3
00058
00059 /* SPI ------------------------------- */
00060 #define _SPI
00061
00062 /* SSP ------------------------------- */
00063 //#define _SSP
00064 //#define _SSP0
00065 //#define _SSP1
00066
00067 /* SYSTICK --------------------------- */
00068 //#define _SYSTICK
00069
00070 /* I2C ------------------------------- */
00071 //#define _I2C
00072 //#define _I2C0
00073 //#define _I2C1
00074 //#define _I2C2
00075
00076 /* TIMER ------------------------------- */
00077 //#define _TIM
00078
00079 /* WDT ------------------------------- */
00080 //#define _WDT
00081
00082
00083 /* GPDMA ------------------------------- */
00084 //#define _GPDMA
00085
00086
00087 /* DAC ------------------------------- */
00088 //#define _DAC
00089
00090 /* DAC ------------------------------- */
00091 //#define _ADC
00092
00093
00094 /* PWM ------------------------------- */
00095 //#define _PWM
00096 //#define _PWM1
00097
00098 /* RTC ------------------------------- */
00099 //#define _RTC
00100
00101 /* I2S ------------------------------- */
00102 //#define _I2S
00103
00104 /* USB device ------------------------------- */
00105 //#define _USBDEV
00106 //#define _USB_DMA
00107
00108 /* QEI ------------------------------- */
00109 //#define _QEI
00110
00111 /* MCPWM ------------------------------- */
00112 //#define _MCPWM
00113
00114 /* CAN--------------------------------*/
00115 //#define _CAN
00116
00117 /* RIT ------------------------------- */
00118 //#define _RIT
00119
00120 /* EMAC ------------------------------ */
00121 //#define _EMAC
00122
00123
00124 /************************** GLOBAL/PUBLIC MACRO DEFINITIONS *********************************/
00125
00126 #ifdef  DEBUG
00127 /*******************************************************************************
00128 * @brief                The CHECK_PARAM macro is used for function's parameters check.
00129 *                               It is used only if the library is compiled in DEBUG mode.
00130 * @param[in]    expr - If expr is false, it calls check_failed() function
00131 *                       which reports the name of the source file and the source
00132 *                       line number of the call that failed.
00133 *                    - If expr is true, it returns no value.
00134 * @return               None
00135 *******************************************************************************/
00136 #define CHECK_PARAM(expr) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))
00137 #else
00138 #define CHECK_PARAM(expr)
00139 #endif /* DEBUG */
00140
00141
00142
00143 /************************** GLOBAL/PUBLIC FUNCTION DECLARATION *********************************/
00144
00145 #ifdef  DEBUG
00146 void check_failed(uint8_t *file, uint32_t line);
00147 #endif
00148
00149
00150 #endif /* LPC17XX_LIBCFG_H_ */
Generated on Tue Jun 7 14:58:58 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/SPI/Slave/lpc17xx_libcfg.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/SPI/Slave/lpc17xx_libcfg.h

Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          lpc17xx_libcfg.h                        2010-05-21
00003 */
00026 #ifndef LPC17XX_LIBCFG_H_
00027 #define LPC17XX_LIBCFG_H_
00028
00029 #include "lpc_types.h"
00030
00031
00032 /************************** DEBUG MODE DEFINITIONS *********************************/
00033 /* Un-comment the line below to compile the library in DEBUG mode, this will expanse
00034    the "CHECK_PARAM" macro in the FW library code */
00035
00036 #define DEBUG
00037
00038
00039 /******************* PERIPHERAL FW LIBRARY CONFIGURATION DEFINITIONS ***********************/
00040
00041 /* Comment the line below to disable the specific peripheral inclusion */
00042
00043 /* DEBUG_FRAMWORK ------------------------------ */
00044 #define _DBGFWK
00045
00046 /* GPIO ------------------------------- */
00047 #define _GPIO
00048
00049 /* EXTI ------------------------------- */
00050 //#define _EXTI
00051
00052 /* UART ------------------------------- */
00053 #define _UART
00054 #define _UART0
00055 //#define _UART1
00056 //#define _UART2
00057 //#define _UART3
00058
00059 /* SPI ------------------------------- */
00060 #define _SPI
00061
00062 /* SSP ------------------------------- */
00063 //#define _SSP
00064 //#define _SSP0
00065 //#define _SSP1
00066
00067 /* SYSTICK --------------------------- */
00068 //#define _SYSTICK
00069
00070 /* I2C ------------------------------- */
00071 //#define _I2C
00072 //#define _I2C0
00073 //#define _I2C1
00074 //#define _I2C2
00075
00076 /* TIMER ------------------------------- */
00077 //#define _TIM
00078
00079 /* WDT ------------------------------- */
00080 //#define _WDT
00081
00082
00083 /* GPDMA ------------------------------- */
00084 //#define _GPDMA
00085
00086
00087 /* DAC ------------------------------- */
00088 //#define _DAC
00089
00090 /* DAC ------------------------------- */
00091 //#define _ADC
00092
00093
00094 /* PWM ------------------------------- */
00095 //#define _PWM
00096 //#define _PWM1
00097
00098 /* RTC ------------------------------- */
00099 //#define _RTC
00100
00101 /* I2S ------------------------------- */
00102 //#define _I2S
00103
00104 /* USB device ------------------------------- */
00105 //#define _USBDEV
00106 //#define _USB_DMA
00107
00108 /* QEI ------------------------------- */
00109 //#define _QEI
00110
00111 /* MCPWM ------------------------------- */
00112 //#define _MCPWM
00113
00114 /* CAN--------------------------------*/
00115 //#define _CAN
00116
00117 /* RIT ------------------------------- */
00118 //#define _RIT
00119
00120 /* EMAC ------------------------------ */
00121 //#define _EMAC
00122
00123 /************************** GLOBAL/PUBLIC MACRO DEFINITIONS *********************************/
00124
00125 #ifdef  DEBUG
00126 /*******************************************************************************
00127 * @brief                The CHECK_PARAM macro is used for function's parameters check.
00128 *                               It is used only if the library is compiled in DEBUG mode.
00129 * @param[in]    expr - If expr is false, it calls check_failed() function
00130 *                       which reports the name of the source file and the source
00131 *                       line number of the call that failed.
00132 *                    - If expr is true, it returns no value.
00133 * @return               None
00134 *******************************************************************************/
00135 #define CHECK_PARAM(expr) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))
00136 #else
00137 #define CHECK_PARAM(expr)
00138 #endif /* DEBUG */
00139
00140
00141
00142 /************************** GLOBAL/PUBLIC FUNCTION DECLARATION *********************************/
00143
00144 #ifdef  DEBUG
00145 void check_failed(uint8_t *file, uint32_t line);
00146 #endif
00147
00148
00149 #endif /* LPC17XX_LIBCFG_H_ */
Generated on Tue Jun 7 14:58:58 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/SPI/sc16is750_int/lpc17xx_libcfg.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/SPI/sc16is750_int/lpc17xx_libcfg.h

Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          lpc17xx_libcfg.h                        2010-05-21
00003 */
00026 #ifndef LPC17XX_LIBCFG_H_
00027 #define LPC17XX_LIBCFG_H_
00028
00029 #include "lpc_types.h"
00030
00031
00032 /************************** DEBUG MODE DEFINITIONS *********************************/
00033 /* Un-comment the line below to compile the library in DEBUG mode, this will expanse
00034    the "CHECK_PARAM" macro in the FW library code */
00035
00036 #define DEBUG
00037
00038
00039 /******************* PERIPHERAL FW LIBRARY CONFIGURATION DEFINITIONS ***********************/
00040
00041 /* Comment the line below to disable the specific peripheral inclusion */
00042
00043 /* DEBUG_FRAMWORK ------------------------------ */
00044 #define _DBGFWK
00045
00046 /* GPIO ------------------------------- */
00047 #define _GPIO
00048
00049 /* EXTI ------------------------------- */
00050 //#define _EXTI
00051
00052 /* UART ------------------------------- */
00053 #define _UART
00054 #define _UART0
00055 //#define _UART1
00056 //#define _UART2
00057 //#define _UART3
00058
00059 /* SPI ------------------------------- */
00060 #define _SPI
00061
00062 /* SSP ------------------------------- */
00063 //#define _SSP
00064 //#define _SSP0
00065 //#define _SSP1
00066
00067 /* SYSTICK --------------------------- */
00068 //#define _SYSTICK
00069
00070 /* I2C ------------------------------- */
00071 //#define _I2C
00072 //#define _I2C0
00073 //#define _I2C1
00074 //#define _I2C2
00075
00076 /* TIMER ------------------------------- */
00077 //#define _TIM
00078
00079 /* WDT ------------------------------- */
00080 //#define _WDT
00081
00082
00083 /* GPDMA ------------------------------- */
00084 //#define _GPDMA
00085
00086
00087 /* DAC ------------------------------- */
00088 //#define _DAC
00089
00090 /* DAC ------------------------------- */
00091 //#define _ADC
00092
00093
00094 /* PWM ------------------------------- */
00095 //#define _PWM
00096 //#define _PWM1
00097
00098 /* RTC ------------------------------- */
00099 //#define _RTC
00100
00101 /* I2S ------------------------------- */
00102 //#define _I2S
00103
00104 /* USB device ------------------------------- */
00105 //#define _USBDEV
00106 //#define _USB_DMA
00107
00108 /* QEI ------------------------------- */
00109 //#define _QEI
00110
00111 /* MCPWM ------------------------------- */
00112 //#define _MCPWM
00113
00114 /* CAN--------------------------------*/
00115 //#define _CAN
00116
00117 /* RIT ------------------------------- */
00118 //#define _RIT
00119
00120 /* EMAC ------------------------------ */
00121 //#define _EMAC
00122
00123
00124 /************************** GLOBAL/PUBLIC MACRO DEFINITIONS *********************************/
00125
00126 #ifdef  DEBUG
00127 /*******************************************************************************
00128 * @brief                The CHECK_PARAM macro is used for function's parameters check.
00129 *                               It is used only if the library is compiled in DEBUG mode.
00130 * @param[in]    expr - If expr is false, it calls check_failed() function
00131 *                       which reports the name of the source file and the source
00132 *                       line number of the call that failed.
00133 *                    - If expr is true, it returns no value.
00134 * @return               None
00135 *******************************************************************************/
00136 #define CHECK_PARAM(expr) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))
00137 #else
00138 #define CHECK_PARAM(expr)
00139 #endif /* DEBUG */
00140
00141
00142
00143 /************************** GLOBAL/PUBLIC FUNCTION DECLARATION *********************************/
00144
00145 #ifdef  DEBUG
00146 void check_failed(uint8_t *file, uint32_t line);
00147 #endif
00148
00149
00150 #endif /* LPC17XX_LIBCFG_H_ */
Generated on Tue Jun 7 14:58:58 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/SPI/sc16is750_polling/lpc17xx_libcfg.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/SPI/sc16is750_polling/lpc17xx_libcfg.h

Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          lpc17xx_libcfg.h                        2010-05-21
00003 */
00025 #ifndef LPC17XX_LIBCFG_H_
00026 #define LPC17XX_LIBCFG_H_
00027
00028 #include "lpc_types.h"
00029
00030
00031 /************************** DEBUG MODE DEFINITIONS *********************************/
00032 /* Un-comment the line below to compile the library in DEBUG mode, this will expanse
00033    the "CHECK_PARAM" macro in the FW library code */
00034
00035 #define DEBUG
00036
00037
00038 /******************* PERIPHERAL FW LIBRARY CONFIGURATION DEFINITIONS ***********************/
00039
00040 /* Comment the line below to disable the specific peripheral inclusion */
00041
00042 /* DEBUG_FRAMWORK ------------------------------ */
00043 #define _DBGFWK
00044
00045 /* GPIO ------------------------------- */
00046 #define _GPIO
00047
00048 /* EXTI ------------------------------- */
00049 //#define _EXTI
00050
00051 /* UART ------------------------------- */
00052 #define _UART
00053 #define _UART0
00054 //#define _UART1
00055 //#define _UART2
00056 //#define _UART3
00057
00058 /* SPI ------------------------------- */
00059 #define _SPI
00060
00061 /* SSP ------------------------------- */
00062 //#define _SSP
00063 //#define _SSP0
00064 //#define _SSP1
00065
00066 /* SYSTICK --------------------------- */
00067 //#define _SYSTICK
00068
00069 /* I2C ------------------------------- */
00070 //#define _I2C
00071 //#define _I2C0
00072 //#define _I2C1
00073 //#define _I2C2
00074
00075 /* TIMER ------------------------------- */
00076 //#define _TIM
00077
00078 /* WDT ------------------------------- */
00079 //#define _WDT
00080
00081
00082 /* GPDMA ------------------------------- */
00083 //#define _GPDMA
00084
00085
00086 /* DAC ------------------------------- */
00087 //#define _DAC
00088
00089 /* DAC ------------------------------- */
00090 //#define _ADC
00091
00092
00093 /* PWM ------------------------------- */
00094 //#define _PWM
00095 //#define _PWM1
00096
00097 /* RTC ------------------------------- */
00098 //#define _RTC
00099
00100 /* I2S ------------------------------- */
00101 //#define _I2S
00102
00103 /* USB device ------------------------------- */
00104 //#define _USBDEV
00105 //#define _USB_DMA
00106
00107 /* QEI ------------------------------- */
00108 //#define _QEI
00109
00110 /* MCPWM ------------------------------- */
00111 //#define _MCPWM
00112
00113 /* CAN--------------------------------*/
00114 //#define _CAN
00115
00116 /* RIT ------------------------------- */
00117 //#define _RIT
00118
00119 /* EMAC ------------------------------ */
00120 //#define _EMAC
00121
00122
00123 /************************** GLOBAL/PUBLIC MACRO DEFINITIONS *********************************/
00124
00125 #ifdef  DEBUG
00126 /*******************************************************************************
00127 * @brief                The CHECK_PARAM macro is used for function's parameters check.
00128 *                               It is used only if the library is compiled in DEBUG mode.
00129 * @param[in]    expr - If expr is false, it calls check_failed() function
00130 *                       which reports the name of the source file and the source
00131 *                       line number of the call that failed.
00132 *                    - If expr is true, it returns no value.
00133 * @return               None
00134 *******************************************************************************/
00135 #define CHECK_PARAM(expr) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))
00136 #else
00137 #define CHECK_PARAM(expr)
00138 #endif /* DEBUG */
00139
00140
00141
00142 /************************** GLOBAL/PUBLIC FUNCTION DECLARATION *********************************/
00143
00144 #ifdef  DEBUG
00145 void check_failed(uint8_t *file, uint32_t line);
00146 #endif
00147
00148
00149 #endif /* LPC17XX_LIBCFG_H_ */
Generated on Tue Jun 7 14:58:58 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/SSP/Master/lpc17xx_libcfg.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/SSP/Master/lpc17xx_libcfg.h

Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          lpc17xx_libcfg.h                        2010-05-21
00003 */
00026 #ifndef LPC17XX_LIBCFG_H_
00027 #define LPC17XX_LIBCFG_H_
00028
00029 #include "lpc_types.h"
00030
00031
00032 /************************** DEBUG MODE DEFINITIONS *********************************/
00033 /* Un-comment the line below to compile the library in DEBUG mode, this will expanse
00034    the "CHECK_PARAM" macro in the FW library code */
00035
00036 #define DEBUG
00037
00038
00039 /******************* PERIPHERAL FW LIBRARY CONFIGURATION DEFINITIONS ***********************/
00040
00041 /* Comment the line below to disable the specific peripheral inclusion */
00042
00043 /* DEBUG_FRAMWORK ------------------------------ */
00044 #define _DBGFWK
00045
00046 /* GPIO ------------------------------- */
00047 #define _GPIO
00048
00049 /* EXTI ------------------------------- */
00050 //#define _EXTI
00051
00052 /* UART ------------------------------- */
00053 #define _UART
00054 #define _UART0
00055 //#define _UART1
00056 //#define _UART2
00057 //#define _UART3
00058
00059 /* SPI ------------------------------- */
00060 //#define _SPI
00061
00062 /* SSP ------------------------------- */
00063 #define _SSP
00064 #define _SSP0
00065 #define _SSP1
00066
00067 /* SYSTICK --------------------------- */
00068 //#define _SYSTICK
00069
00070 /* I2C ------------------------------- */
00071 //#define _I2C
00072 //#define _I2C0
00073 //#define _I2C1
00074 //#define _I2C2
00075
00076 /* TIMER ------------------------------- */
00077 //#define _TIM
00078
00079 /* WDT ------------------------------- */
00080 //#define _WDT
00081
00082
00083 /* GPDMA ------------------------------- */
00084 //#define _GPDMA
00085
00086
00087 /* DAC ------------------------------- */
00088 //#define _DAC
00089
00090 /* DAC ------------------------------- */
00091 //#define _ADC
00092
00093
00094 /* PWM ------------------------------- */
00095 //#define _PWM
00096 //#define _PWM1
00097
00098 /* RTC ------------------------------- */
00099 //#define _RTC
00100
00101 /* I2S ------------------------------- */
00102 //#define _I2S
00103
00104 /* USB device ------------------------------- */
00105 //#define _USBDEV
00106 //#define _USB_DMA
00107
00108 /* QEI ------------------------------- */
00109 //#define _QEI
00110
00111 /* MCPWM ------------------------------- */
00112 //#define _MCPWM
00113
00114 /* CAN--------------------------------*/
00115 //#define _CAN
00116
00117 /* RIT ------------------------------- */
00118 //#define _RIT
00119
00120 /* EMAC ------------------------------ */
00121 //#define _EMAC
00122
00123 /************************** GLOBAL/PUBLIC MACRO DEFINITIONS *********************************/
00124
00125 #ifdef  DEBUG
00126 /*******************************************************************************
00127 * @brief                The CHECK_PARAM macro is used for function's parameters check.
00128 *                               It is used only if the library is compiled in DEBUG mode.
00129 * @param[in]    expr - If expr is false, it calls check_failed() function
00130 *                       which reports the name of the source file and the source
00131 *                       line number of the call that failed.
00132 *                    - If expr is true, it returns no value.
00133 * @return               None
00134 *******************************************************************************/
00135 #define CHECK_PARAM(expr) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))
00136 #else
00137 #define CHECK_PARAM(expr)
00138 #endif /* DEBUG */
00139
00140
00141
00142 /************************** GLOBAL/PUBLIC FUNCTION DECLARATION *********************************/
00143
00144 #ifdef  DEBUG
00145 void check_failed(uint8_t *file, uint32_t line);
00146 #endif
00147
00148
00149 #endif /* LPC17XX_LIBCFG_H_ */
Generated on Tue Jun 7 14:58:58 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/SSP/MicroWire/lpc17xx_libcfg.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/SSP/MicroWire/lpc17xx_libcfg.h

Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          lpc17xx_libcfg.h                        2010-05-21
00003 */
00026 #ifndef LPC17XX_LIBCFG_H_
00027 #define LPC17XX_LIBCFG_H_
00028
00029 #include "lpc_types.h"
00030
00031
00032 /************************** DEBUG MODE DEFINITIONS *********************************/
00033 /* Un-comment the line below to compile the library in DEBUG mode, this will expanse
00034    the "CHECK_PARAM" macro in the FW library code */
00035
00036 #define DEBUG
00037
00038
00039 /******************* PERIPHERAL FW LIBRARY CONFIGURATION DEFINITIONS ***********************/
00040
00041 /* Comment the line below to disable the specific peripheral inclusion */
00042
00043 /* DEBUG_FRAMWORK ------------------------------ */
00044 #define _DBGFWK
00045
00046 /* GPIO ------------------------------- */
00047 //#define _GPIO
00048
00049 /* EXTI ------------------------------- */
00050 //#define _EXTI
00051
00052 /* UART ------------------------------- */
00053 #define _UART
00054 #define _UART0
00055 //#define _UART1
00056 //#define _UART2
00057 //#define _UART3
00058
00059 /* SPI ------------------------------- */
00060 //#define _SPI
00061
00062 /* SSP ------------------------------- */
00063 #define _SSP
00064 #define _SSP0
00065 #define _SSP1
00066
00067 /* SYSTICK --------------------------- */
00068 //#define _SYSTICK
00069
00070 /* I2C ------------------------------- */
00071 //#define _I2C
00072 //#define _I2C0
00073 //#define _I2C1
00074 //#define _I2C2
00075
00076 /* TIMER ------------------------------- */
00077 //#define _TIM
00078
00079 /* WDT ------------------------------- */
00080 //#define _WDT
00081
00082
00083 /* GPDMA ------------------------------- */
00084 //#define _GPDMA
00085
00086
00087 /* DAC ------------------------------- */
00088 //#define _DAC
00089
00090 /* DAC ------------------------------- */
00091 //#define _ADC
00092
00093
00094 /* PWM ------------------------------- */
00095 //#define _PWM
00096 //#define _PWM1
00097
00098 /* RTC ------------------------------- */
00099 //#define _RTC
00100
00101 /* I2S ------------------------------- */
00102 //#define _I2S
00103
00104 /* USB device ------------------------------- */
00105 //#define _USBDEV
00106 //#define _USB_DMA
00107
00108 /* QEI ------------------------------- */
00109 //#define _QEI
00110
00111 /* MCPWM ------------------------------- */
00112 //#define _MCPWM
00113
00114 /* CAN--------------------------------*/
00115 //#define _CAN
00116
00117 /* RIT ------------------------------- */
00118 //#define _RIT
00119
00120 /* EMAC ------------------------------ */
00121 //#define _EMAC
00122
00123
00124 /************************** GLOBAL/PUBLIC MACRO DEFINITIONS *********************************/
00125
00126 #ifdef  DEBUG
00127 /*******************************************************************************
00128 * @brief                The CHECK_PARAM macro is used for function's parameters check.
00129 *                               It is used only if the library is compiled in DEBUG mode.
00130 * @param[in]    expr - If expr is false, it calls check_failed() function
00131 *                       which reports the name of the source file and the source
00132 *                       line number of the call that failed.
00133 *                    - If expr is true, it returns no value.
00134 * @return               None
00135 *******************************************************************************/
00136 #define CHECK_PARAM(expr) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))
00137 #else
00138 #define CHECK_PARAM(expr)
00139 #endif /* DEBUG */
00140
00141
00142
00143 /************************** GLOBAL/PUBLIC FUNCTION DECLARATION *********************************/
00144
00145 #ifdef  DEBUG
00146 void check_failed(uint8_t *file, uint32_t line);
00147 #endif
00148
00149
00150 #endif /* LPC17XX_LIBCFG_H_ */
Generated on Tue Jun 7 14:58:58 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/SSP/Slave/lpc17xx_libcfg.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/SSP/Slave/lpc17xx_libcfg.h

Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          lpc17xx_libcfg.h                        2010-05-21
00003 */
00026 #ifndef LPC17XX_LIBCFG_H_
00027 #define LPC17XX_LIBCFG_H_
00028
00029 #include "lpc_types.h"
00030
00031
00032 /************************** DEBUG MODE DEFINITIONS *********************************/
00033 /* Un-comment the line below to compile the library in DEBUG mode, this will expanse
00034    the "CHECK_PARAM" macro in the FW library code */
00035
00036 #define DEBUG
00037
00038
00039 /******************* PERIPHERAL FW LIBRARY CONFIGURATION DEFINITIONS ***********************/
00040
00041 /* Comment the line below to disable the specific peripheral inclusion */
00042
00043 /* DEBUG_FRAMWORK ------------------------------ */
00044 #define _DBGFWK
00045
00046 /* GPIO ------------------------------- */
00047 #define _GPIO
00048
00049 /* EXTI ------------------------------- */
00050 //#define _EXTI
00051
00052 /* UART ------------------------------- */
00053 #define _UART
00054 #define _UART0
00055 //#define _UART1
00056 //#define _UART2
00057 //#define _UART3
00058
00059 /* SPI ------------------------------- */
00060 //#define _SPI
00061
00062 /* SSP ------------------------------- */
00063 #define _SSP
00064 //#define _SSP0
00065 //#define _SSP1
00066
00067 /* SYSTICK --------------------------- */
00068 //#define _SYSTICK
00069
00070 /* I2C ------------------------------- */
00071 //#define _I2C
00072 //#define _I2C0
00073 //#define _I2C1
00074 //#define _I2C2
00075
00076 /* TIMER ------------------------------- */
00077 //#define _TIM
00078
00079 /* WDT ------------------------------- */
00080 //#define _WDT
00081
00082
00083 /* GPDMA ------------------------------- */
00084 //#define _GPDMA
00085
00086
00087 /* DAC ------------------------------- */
00088 //#define _DAC
00089
00090 /* DAC ------------------------------- */
00091 //#define _ADC
00092
00093
00094 /* PWM ------------------------------- */
00095 //#define _PWM
00096 //#define _PWM1
00097
00098 /* RTC ------------------------------- */
00099 //#define _RTC
00100
00101 /* I2S ------------------------------- */
00102 //#define _I2S
00103
00104 /* USB device ------------------------------- */
00105 //#define _USBDEV
00106 //#define _USB_DMA
00107
00108 /* QEI ------------------------------- */
00109 //#define _QEI
00110
00111 /* MCPWM ------------------------------- */
00112 //#define _MCPWM
00113
00114 /* CAN--------------------------------*/
00115 //#define _CAN
00116
00117 /* RIT ------------------------------- */
00118 //#define _RIT
00119
00120 /* EMAC ------------------------------ */
00121 //#define _EMAC
00122
00123 /************************** GLOBAL/PUBLIC MACRO DEFINITIONS *********************************/
00124
00125 #ifdef  DEBUG
00126 /*******************************************************************************
00127 * @brief                The CHECK_PARAM macro is used for function's parameters check.
00128 *                               It is used only if the library is compiled in DEBUG mode.
00129 * @param[in]    expr - If expr is false, it calls check_failed() function
00130 *                       which reports the name of the source file and the source
00131 *                       line number of the call that failed.
00132 *                    - If expr is true, it returns no value.
00133 * @return               None
00134 *******************************************************************************/
00135 #define CHECK_PARAM(expr) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))
00136 #else
00137 #define CHECK_PARAM(expr)
00138 #endif /* DEBUG */
00139
00140
00141
00142 /************************** GLOBAL/PUBLIC FUNCTION DECLARATION *********************************/
00143
00144 #ifdef  DEBUG
00145 void check_failed(uint8_t *file, uint32_t line);
00146 #endif
00147
00148
00149 #endif /* LPC17XX_LIBCFG_H_ */
Generated on Tue Jun 7 14:58:58 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/SSP/TI/lpc17xx_libcfg.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/SSP/TI/lpc17xx_libcfg.h

Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          lpc17xx_libcfg.h                        2010-05-21
00003 */
00026 #ifndef LPC17XX_LIBCFG_H_
00027 #define LPC17XX_LIBCFG_H_
00028
00029 #include "lpc_types.h"
00030
00031
00032 /************************** DEBUG MODE DEFINITIONS *********************************/
00033 /* Un-comment the line below to compile the library in DEBUG mode, this will expanse
00034    the "CHECK_PARAM" macro in the FW library code */
00035
00036 #define DEBUG
00037
00038
00039 /******************* PERIPHERAL FW LIBRARY CONFIGURATION DEFINITIONS ***********************/
00040
00041 /* Comment the line below to disable the specific peripheral inclusion */
00042
00043 /* DEBUG_FRAMWORK ------------------------------ */
00044 #define _DBGFWK
00045
00046 /* GPIO ------------------------------- */
00047 //#define _GPIO
00048
00049 /* EXTI ------------------------------- */
00050 //#define _EXTI
00051
00052 /* UART ------------------------------- */
00053 #define _UART
00054 #define _UART0
00055 //#define _UART1
00056 //#define _UART2
00057 //#define _UART3
00058
00059 /* SPI ------------------------------- */
00060 //#define _SPI
00061
00062 /* SSP ------------------------------- */
00063 #define _SSP
00064 #define _SSP0
00065 #define _SSP1
00066
00067 /* SYSTICK --------------------------- */
00068 //#define _SYSTICK
00069
00070 /* I2C ------------------------------- */
00071 //#define _I2C
00072 //#define _I2C0
00073 //#define _I2C1
00074 //#define _I2C2
00075
00076 /* TIMER ------------------------------- */
00077 //#define _TIM
00078
00079 /* WDT ------------------------------- */
00080 //#define _WDT
00081
00082
00083 /* GPDMA ------------------------------- */
00084 //#define _GPDMA
00085
00086
00087 /* DAC ------------------------------- */
00088 //#define _DAC
00089
00090 /* DAC ------------------------------- */
00091 //#define _ADC
00092
00093
00094 /* PWM ------------------------------- */
00095 //#define _PWM
00096 //#define _PWM1
00097
00098 /* RTC ------------------------------- */
00099 //#define _RTC
00100
00101 /* I2S ------------------------------- */
00102 //#define _I2S
00103
00104 /* USB device ------------------------------- */
00105 //#define _USBDEV
00106 //#define _USB_DMA
00107
00108 /* QEI ------------------------------- */
00109 //#define _QEI
00110
00111 /* MCPWM ------------------------------- */
00112 //#define _MCPWM
00113
00114 /* CAN--------------------------------*/
00115 //#define _CAN
00116
00117 /* RIT ------------------------------- */
00118 //#define _RIT
00119
00120 /* EMAC ------------------------------ */
00121 //#define _EMAC
00122
00123
00124 /************************** GLOBAL/PUBLIC MACRO DEFINITIONS *********************************/
00125
00126 #ifdef  DEBUG
00127 /*******************************************************************************
00128 * @brief                The CHECK_PARAM macro is used for function's parameters check.
00129 *                               It is used only if the library is compiled in DEBUG mode.
00130 * @param[in]    expr - If expr is false, it calls check_failed() function
00131 *                       which reports the name of the source file and the source
00132 *                       line number of the call that failed.
00133 *                    - If expr is true, it returns no value.
00134 * @return               None
00135 *******************************************************************************/
00136 #define CHECK_PARAM(expr) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))
00137 #else
00138 #define CHECK_PARAM(expr)
00139 #endif /* DEBUG */
00140
00141
00142
00143 /************************** GLOBAL/PUBLIC FUNCTION DECLARATION *********************************/
00144
00145 #ifdef  DEBUG
00146 void check_failed(uint8_t *file, uint32_t line);
00147 #endif
00148
00149
00150 #endif /* LPC17XX_LIBCFG_H_ */
Generated on Tue Jun 7 14:58:58 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/SSP/dma/lpc17xx_libcfg.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/SSP/dma/lpc17xx_libcfg.h

Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          lpc17xx_libcfg.h                        2010-05-21
00003 */
00026 #ifndef LPC17XX_LIBCFG_H_
00027 #define LPC17XX_LIBCFG_H_
00028
00029 #include "lpc_types.h"
00030
00031
00032 /************************** DEBUG MODE DEFINITIONS *********************************/
00033 /* Un-comment the line below to compile the library in DEBUG mode, this will expanse
00034    the "CHECK_PARAM" macro in the FW library code */
00035
00036 #define DEBUG
00037
00038
00039 /******************* PERIPHERAL FW LIBRARY CONFIGURATION DEFINITIONS ***********************/
00040
00041 /* Comment the line below to disable the specific peripheral inclusion */
00042
00043 /* DEBUG_FRAMWORK ------------------------------ */
00044 #define _DBGFWK
00045
00046 /* GPIO ------------------------------- */
00047 //#define _GPIO
00048
00049 /* EXTI ------------------------------- */
00050 //#define _EXTI
00051
00052 /* UART ------------------------------- */
00053 #define _UART
00054 #define _UART0
00055 //#define _UART1
00056 //#define _UART2
00057 //#define _UART3
00058
00059 /* SPI ------------------------------- */
00060 //#define _SPI
00061
00062 /* SSP ------------------------------- */
00063 #define _SSP
00064 #define _SSP0
00065 #define _SSP1
00066
00067 /* SYSTICK --------------------------- */
00068 //#define _SYSTICK
00069
00070 /* I2C ------------------------------- */
00071 //#define _I2C
00072 //#define _I2C0
00073 //#define _I2C1
00074 //#define _I2C2
00075
00076 /* TIMER ------------------------------- */
00077 //#define _TIM
00078
00079 /* WDT ------------------------------- */
00080 //#define _WDT
00081
00082
00083 /* GPDMA ------------------------------- */
00084 #define _GPDMA
00085
00086
00087 /* DAC ------------------------------- */
00088 //#define _DAC
00089
00090 /* DAC ------------------------------- */
00091 //#define _ADC
00092
00093
00094 /* PWM ------------------------------- */
00095 //#define _PWM
00096 //#define _PWM1
00097
00098 /* RTC ------------------------------- */
00099 //#define _RTC
00100
00101 /* I2S ------------------------------- */
00102 //#define _I2S
00103
00104 /* USB device ------------------------------- */
00105 //#define _USBDEV
00106 //#define _USB_DMA
00107
00108 /* QEI ------------------------------- */
00109 //#define _QEI
00110
00111 /* MCPWM ------------------------------- */
00112 //#define _MCPWM
00113
00114 /* CAN--------------------------------*/
00115 //#define _CAN
00116
00117 /* RIT ------------------------------- */
00118 //#define _RIT
00119
00120 /* EMAC ------------------------------ */
00121 //#define _EMAC
00122
00123
00124 /************************** GLOBAL/PUBLIC MACRO DEFINITIONS *********************************/
00125
00126 #ifdef  DEBUG
00127 /*******************************************************************************
00128 * @brief                The CHECK_PARAM macro is used for function's parameters check.
00129 *                               It is used only if the library is compiled in DEBUG mode.
00130 * @param[in]    expr - If expr is false, it calls check_failed() function
00131 *                       which reports the name of the source file and the source
00132 *                       line number of the call that failed.
00133 *                    - If expr is true, it returns no value.
00134 * @return               None
00135 *******************************************************************************/
00136 #define CHECK_PARAM(expr) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))
00137 #else
00138 #define CHECK_PARAM(expr)
00139 #endif /* DEBUG */
00140
00141
00142
00143 /************************** GLOBAL/PUBLIC FUNCTION DECLARATION *********************************/
00144
00145 #ifdef  DEBUG
00146 void check_failed(uint8_t *file, uint32_t line);
00147 #endif
00148
00149
00150 #endif /* LPC17XX_LIBCFG_H_ */
Generated on Tue Jun 7 14:58:58 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/SSP/sc16is750_int/lpc17xx_libcfg.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/SSP/sc16is750_int/lpc17xx_libcfg.h

Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          lpc17xx_libcfg.h                        2010-05-21
00003 */
00026 #ifndef LPC17XX_LIBCFG_H_
00027 #define LPC17XX_LIBCFG_H_
00028
00029 #include "lpc_types.h"
00030
00031
00032 /************************** DEBUG MODE DEFINITIONS *********************************/
00033 /* Un-comment the line below to compile the library in DEBUG mode, this will expanse
00034    the "CHECK_PARAM" macro in the FW library code */
00035
00036 #define DEBUG
00037
00038
00039 /******************* PERIPHERAL FW LIBRARY CONFIGURATION DEFINITIONS ***********************/
00040
00041 /* Comment the line below to disable the specific peripheral inclusion */
00042
00043 /* DEBUG_FRAMWORK ------------------------------ */
00044 #define _DBGFWK
00045
00046 /* GPIO ------------------------------- */
00047 #define _GPIO
00048
00049 /* EXTI ------------------------------- */
00050 //#define _EXTI
00051
00052 /* UART ------------------------------- */
00053 #define _UART
00054 #define _UART0
00055 //#define _UART1
00056 //#define _UART2
00057 //#define _UART3
00058
00059 /* SPI ------------------------------- */
00060 //#define _SPI
00061
00062 /* SSP ------------------------------- */
00063 #define _SSP
00064 //#define _SSP0
00065 //#define _SSP1
00066
00067 /* SYSTICK --------------------------- */
00068 //#define _SYSTICK
00069
00070 /* I2C ------------------------------- */
00071 //#define _I2C
00072 //#define _I2C0
00073 //#define _I2C1
00074 //#define _I2C2
00075
00076 /* TIMER ------------------------------- */
00077 //#define _TIM
00078
00079 /* WDT ------------------------------- */
00080 //#define _WDT
00081
00082
00083 /* GPDMA ------------------------------- */
00084 //#define _GPDMA
00085
00086
00087 /* DAC ------------------------------- */
00088 //#define _DAC
00089
00090 /* DAC ------------------------------- */
00091 //#define _ADC
00092
00093
00094 /* PWM ------------------------------- */
00095 //#define _PWM
00096 //#define _PWM1
00097
00098 /* RTC ------------------------------- */
00099 //#define _RTC
00100
00101 /* I2S ------------------------------- */
00102 //#define _I2S
00103
00104 /* USB device ------------------------------- */
00105 //#define _USBDEV
00106 //#define _USB_DMA
00107
00108 /* QEI ------------------------------- */
00109 //#define _QEI
00110
00111 /* MCPWM ------------------------------- */
00112 //#define _MCPWM
00113
00114 /* CAN--------------------------------*/
00115 //#define _CAN
00116
00117 /* RIT ------------------------------- */
00118 //#define _RIT
00119
00120 /* EMAC ------------------------------ */
00121 //#define _EMAC
00122
00123
00124 /************************** GLOBAL/PUBLIC MACRO DEFINITIONS *********************************/
00125
00126 #ifdef  DEBUG
00127 /*******************************************************************************
00128 * @brief                The CHECK_PARAM macro is used for function's parameters check.
00129 *                               It is used only if the library is compiled in DEBUG mode.
00130 * @param[in]    expr - If expr is false, it calls check_failed() function
00131 *                       which reports the name of the source file and the source
00132 *                       line number of the call that failed.
00133 *                    - If expr is true, it returns no value.
00134 * @return               None
00135 *******************************************************************************/
00136 #define CHECK_PARAM(expr) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))
00137 #else
00138 #define CHECK_PARAM(expr)
00139 #endif /* DEBUG */
00140
00141
00142
00143 /************************** GLOBAL/PUBLIC FUNCTION DECLARATION *********************************/
00144
00145 #ifdef  DEBUG
00146 void check_failed(uint8_t *file, uint32_t line);
00147 #endif
00148
00149
00150 #endif /* LPC17XX_LIBCFG_H_ */
Generated on Tue Jun 7 14:58:58 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/SSP/sc16is750_polling/lpc17xx_libcfg.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/SSP/sc16is750_polling/lpc17xx_libcfg.h

Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          lpc17xx_libcfg.h                        2010-05-21
00003 */
00025 #ifndef LPC17XX_LIBCFG_H_
00026 #define LPC17XX_LIBCFG_H_
00027
00028 #include "lpc_types.h"
00029
00030
00031 /************************** DEBUG MODE DEFINITIONS *********************************/
00032 /* Un-comment the line below to compile the library in DEBUG mode, this will expanse
00033    the "CHECK_PARAM" macro in the FW library code */
00034
00035 #define DEBUG
00036
00037
00038 /******************* PERIPHERAL FW LIBRARY CONFIGURATION DEFINITIONS ***********************/
00039
00040 /* Comment the line below to disable the specific peripheral inclusion */
00041
00042 /* DEBUG_FRAMWORK ------------------------------ */
00043 #define _DBGFWK
00044
00045 /* GPIO ------------------------------- */
00046 #define _GPIO
00047
00048 /* EXTI ------------------------------- */
00049 //#define _EXTI
00050
00051 /* UART ------------------------------- */
00052 #define _UART
00053 #define _UART0
00054 //#define _UART1
00055 //#define _UART2
00056 //#define _UART3
00057
00058 /* SPI ------------------------------- */
00059 //#define _SPI
00060
00061 /* SSP ------------------------------- */
00062 #define _SSP
00063 //#define _SSP0
00064 //#define _SSP1
00065
00066 /* SYSTICK --------------------------- */
00067 //#define _SYSTICK
00068
00069 /* I2C ------------------------------- */
00070 //#define _I2C
00071 //#define _I2C0
00072 //#define _I2C1
00073 //#define _I2C2
00074
00075 /* TIMER ------------------------------- */
00076 //#define _TIM
00077
00078 /* WDT ------------------------------- */
00079 //#define _WDT
00080
00081
00082 /* GPDMA ------------------------------- */
00083 //#define _GPDMA
00084
00085
00086 /* DAC ------------------------------- */
00087 //#define _DAC
00088
00089 /* DAC ------------------------------- */
00090 //#define _ADC
00091
00092
00093 /* PWM ------------------------------- */
00094 //#define _PWM
00095 //#define _PWM1
00096
00097 /* RTC ------------------------------- */
00098 //#define _RTC
00099
00100 /* I2S ------------------------------- */
00101 //#define _I2S
00102
00103 /* USB device ------------------------------- */
00104 //#define _USBDEV
00105 //#define _USB_DMA
00106
00107 /* QEI ------------------------------- */
00108 //#define _QEI
00109
00110 /* MCPWM ------------------------------- */
00111 //#define _MCPWM
00112
00113 /* CAN--------------------------------*/
00114 //#define _CAN
00115
00116 /* RIT ------------------------------- */
00117 //#define _RIT
00118
00119 /* EMAC ------------------------------ */
00120 //#define _EMAC
00121
00122 /************************** GLOBAL/PUBLIC MACRO DEFINITIONS *********************************/
00123
00124 #ifdef  DEBUG
00125 /*******************************************************************************
00126 * @brief                The CHECK_PARAM macro is used for function's parameters check.
00127 *                               It is used only if the library is compiled in DEBUG mode.
00128 * @param[in]    expr - If expr is false, it calls check_failed() function
00129 *                       which reports the name of the source file and the source
00130 *                       line number of the call that failed.
00131 *                    - If expr is true, it returns no value.
00132 * @return               None
00133 *******************************************************************************/
00134 #define CHECK_PARAM(expr) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))
00135 #else
00136 #define CHECK_PARAM(expr)
00137 #endif /* DEBUG */
00138
00139
00140
00141 /************************** GLOBAL/PUBLIC FUNCTION DECLARATION *********************************/
00142
00143 #ifdef  DEBUG
00144 void check_failed(uint8_t *file, uint32_t line);
00145 #endif
00146
00147
00148 #endif /* LPC17XX_LIBCFG_H_ */
Generated on Tue Jun 7 14:58:58 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/SysTick/STCLK/lpc17xx_libcfg.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/SysTick/STCLK/lpc17xx_libcfg.h

Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          lpc17xx_libcfg.h                        2010-05-21
00003 */
00025 #ifndef LPC17XX_LIBCFG_H_
00026 #define LPC17XX_LIBCFG_H_
00027
00028 #include "lpc_types.h"
00029
00030
00031 /************************** DEBUG MODE DEFINITIONS *********************************/
00032 /* Un-comment the line below to compile the library in DEBUG mode, this will expanse
00033    the "CHECK_PARAM" macro in the FW library code */
00034
00035 #define DEBUG
00036
00037
00038 /******************* PERIPHERAL FW LIBRARY CONFIGURATION DEFINITIONS ***********************/
00039
00040 /* Comment the line below to disable the specific peripheral inclusion */
00041
00042 /* DEBUG_FRAMWORK ------------------------------ */
00043 //#define _DBGFWK
00044
00045 /* GPIO ------------------------------- */
00046 #define _GPIO
00047
00048 /* EXTI ------------------------------- */
00049 //#define _EXTI
00050
00051 /* UART ------------------------------- */
00052 //#define _UART
00053 //#define _UART0
00054 //#define _UART1
00055 //#define _UART2
00056 //#define _UART3
00057
00058 /* SPI ------------------------------- */
00059 //#define _SPI
00060
00061 /* SSP ------------------------------- */
00062 //#define _SSP
00063 //#define _SSP0
00064 //#define _SSP1
00065
00066 /* SYSTICK ----------------------------*/
00067 #define _SYSTICK
00068
00069 /* I2C ------------------------------- */
00070 //#define _I2C
00071 //#define _I2C0
00072 //#define _I2C1
00073 //#define _I2C2
00074
00075 /* TIMER ------------------------------- */
00076 #define _TIM
00077
00078 /* WDT ------------------------------- */
00079 //#define _WDT
00080
00081
00082 /* GPDMA ------------------------------- */
00083 //#define _GPDMA
00084
00085
00086 /* DAC ------------------------------- */
00087 //#define _DAC
00088
00089 /* DAC ------------------------------- */
00090 //#define _ADC
00091
00092
00093 /* PWM ------------------------------- */
00094 //#define _PWM
00095 //#define _PWM1
00096
00097 /* RTC ------------------------------- */
00098 //#define _RTC
00099
00100 /* I2S ------------------------------- */
00101 //#define _I2S
00102
00103 /* USB device ------------------------------- */
00104 //#define _USBDEV
00105 //#define _USB_DMA
00106
00107 /* QEI ------------------------------- */
00108 //#define _QEI
00109
00110 /* MCPWM ------------------------------- */
00111 //#define _MCPWM
00112
00113 /* CAN--------------------------------*/
00114 //#define _CAN
00115
00116 /* RIT ------------------------------- */
00117 #define _RIT
00118
00119 /* EMAC ------------------------------ */
00120 //#define _EMAC
00121
00122 /************************** GLOBAL/PUBLIC MACRO DEFINITIONS *********************************/
00123
00124 #ifdef  DEBUG
00125 /*******************************************************************************
00126 * @brief                The CHECK_PARAM macro is used for function's parameters check.
00127 *                               It is used only if the library is compiled in DEBUG mode.
00128 * @param[in]    expr - If expr is false, it calls check_failed() function
00129 *                       which reports the name of the source file and the source
00130 *                       line number of the call that failed.
00131 *                    - If expr is true, it returns no value.
00132 * @return               None
00133 *******************************************************************************/
00134 #define CHECK_PARAM(expr) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))
00135 #else
00136 #define CHECK_PARAM(expr)
00137 #endif /* DEBUG */
00138
00139
00140
00141 /************************** GLOBAL/PUBLIC FUNCTION DECLARATION *********************************/
00142
00143 #ifdef  DEBUG
00144 void check_failed(uint8_t *file, uint32_t line);
00145 #endif
00146
00147
00148 #endif /* LPC17XX_LIBCFG_H_ */
Generated on Tue Jun 7 14:58:58 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/SysTick/10ms_base/lpc17xx_libcfg.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/SysTick/10ms_base/lpc17xx_libcfg.h

Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          lpc17xx_libcfg.h                        2010-05-21
00003 */
00025 #ifndef LPC17XX_LIBCFG_H_
00026 #define LPC17XX_LIBCFG_H_
00027
00028 #include "lpc_types.h"
00029
00030
00031 /************************** DEBUG MODE DEFINITIONS *********************************/
00032 /* Un-comment the line below to compile the library in DEBUG mode, this will expanse
00033    the "CHECK_PARAM" macro in the FW library code */
00034
00035 #define DEBUG
00036
00037
00038 /******************* PERIPHERAL FW LIBRARY CONFIGURATION DEFINITIONS ***********************/
00039
00040 /* Comment the line below to disable the specific peripheral inclusion */
00041
00042 /* DEBUG_FRAMWORK ------------------------------ */
00043 //#define _DBGFWK
00044
00045 /* GPIO ------------------------------- */
00046 #define _GPIO
00047
00048 /* EXTI ------------------------------- */
00049 //#define _EXTI
00050
00051 /* UART ------------------------------- */
00052 //#define _UART
00053 //#define _UART0
00054 //#define _UART1
00055 //#define _UART2
00056 //#define _UART3
00057
00058 /* SPI ------------------------------- */
00059 //#define _SPI
00060
00061 /* SSP ------------------------------- */
00062 //#define _SSP
00063 //#define _SSP0
00064 //#define _SSP1
00065
00066 /* SYSTICK ----------------------------*/
00067 #define _SYSTICK
00068
00069 /* I2C ------------------------------- */
00070 //#define _I2C
00071 //#define _I2C0
00072 //#define _I2C1
00073 //#define _I2C2
00074
00075 /* TIMER ------------------------------- */
00076 //#define _TIM
00077
00078 /* WDT ------------------------------- */
00079 //#define _WDT
00080
00081
00082 /* GPDMA ------------------------------- */
00083 //#define _GPDMA
00084
00085
00086 /* DAC ------------------------------- */
00087 //#define _DAC
00088
00089 /* DAC ------------------------------- */
00090 //#define _ADC
00091
00092
00093 /* PWM ------------------------------- */
00094 //#define _PWM
00095 //#define _PWM1
00096
00097 /* RTC ------------------------------- */
00098 //#define _RTC
00099
00100 /* I2S ------------------------------- */
00101 //#define _I2S
00102
00103 /* USB device ------------------------------- */
00104 //#define _USBDEV
00105 //#define _USB_DMA
00106
00107 /* QEI ------------------------------- */
00108 //#define _QEI
00109
00110 /* MCPWM ------------------------------- */
00111 //#define _MCPWM
00112
00113 /* CAN--------------------------------*/
00114 //#define _CAN
00115
00116 /* RIT ------------------------------- */
00117 //#define _RIT
00118
00119 /* EMAC ------------------------------ */
00120 //#define _EMAC
00121
00122 /************************** GLOBAL/PUBLIC MACRO DEFINITIONS *********************************/
00123
00124 #ifdef  DEBUG
00125 /*******************************************************************************
00126 * @brief                The CHECK_PARAM macro is used for function's parameters check.
00127 *                               It is used only if the library is compiled in DEBUG mode.
00128 * @param[in]    expr - If expr is false, it calls check_failed() function
00129 *                       which reports the name of the source file and the source
00130 *                       line number of the call that failed.
00131 *                    - If expr is true, it returns no value.
00132 * @return               None
00133 *******************************************************************************/
00134 #define CHECK_PARAM(expr) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))
00135 #else
00136 #define CHECK_PARAM(expr)
00137 #endif /* DEBUG */
00138
00139
00140
00141 /************************** GLOBAL/PUBLIC FUNCTION DECLARATION *********************************/
00142
00143 #ifdef  DEBUG
00144 void check_failed(uint8_t *file, uint32_t line);
00145 #endif
00146
00147
00148 #endif /* LPC17XX_LIBCFG_H_ */
Generated on Tue Jun 7 14:58:58 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/TIMER/Capture/lpc17xx_libcfg.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/TIMER/Capture/lpc17xx_libcfg.h

Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          lpc17xx_libcfg.h                        2010-05-21
00003 */
00026 #ifndef LPC17XX_LIBCFG_H_
00027 #define LPC17XX_LIBCFG_H_
00028
00029 #include "lpc_types.h"
00030
00031
00032 /************************** DEBUG MODE DEFINITIONS *********************************/
00033 /* Un-comment the line below to compile the library in DEBUG mode, this will expanse
00034    the "CHECK_PARAM" macro in the FW library code */
00035
00036 #define DEBUG
00037
00038
00039 /******************* PERIPHERAL FW LIBRARY CONFIGURATION DEFINITIONS ***********************/
00040
00041 /* Comment the line below to disable the specific peripheral inclusion */
00042
00043 /* DEBUG_FRAMWORK ------------------------------ */
00044 #define _DBGFWK
00045
00046 /* GPIO ------------------------------- */
00047 //#define _GPIO
00048
00049 /* EXTI ------------------------------- */
00050 //#define _EXTI
00051
00052 /* UART ------------------------------- */
00053 #define _UART
00054 #define _UART0
00055 //#define _UART1
00056 //#define _UART2
00057 //#define _UART3
00058
00059 /* SPI ------------------------------- */
00060 //#define _SPI
00061
00062 /* SSP ------------------------------- */
00063 //#define _SSP
00064 //#define _SSP0
00065 //#define _SSP1
00066
00067 /* SYSTICK --------------------------- */
00068 //#define _SYSTICK
00069
00070 /* I2C ------------------------------- */
00071 //#define _I2C
00072 //#define _I2C0
00073 //#define _I2C1
00074 //#define _I2C2
00075
00076 /* TIMER ------------------------------- */
00077 #define _TIM
00078
00079 /* WDT ------------------------------- */
00080 //#define _WDT
00081
00082
00083 /* GPDMA ------------------------------- */
00084 //#define _GPDMA
00085
00086
00087 /* DAC ------------------------------- */
00088 //#define _DAC
00089
00090 /* DAC ------------------------------- */
00091 //#define _ADC
00092
00093
00094 /* PWM ------------------------------- */
00095 //#define _PWM
00096 //#define _PWM1
00097
00098 /* RTC ------------------------------- */
00099 //#define _RTC
00100
00101 /* I2S ------------------------------- */
00102 //#define _I2S
00103
00104 /* USB device ------------------------------- */
00105 //#define _USBDEV
00106 //#define _USB_DMA
00107
00108 /* QEI ------------------------------- */
00109 //#define _QEI
00110
00111 /* MCPWM ------------------------------- */
00112 //#define _MCPWM
00113
00114 /* CAN--------------------------------*/
00115 //#define _CAN
00116
00117 /* RIT ------------------------------- */
00118 //#define _RIT
00119
00120 /* EMAC ------------------------------ */
00121 //#define _EMAC
00122
00123 /************************** GLOBAL/PUBLIC MACRO DEFINITIONS *********************************/
00124
00125 #ifdef  DEBUG
00126 /*******************************************************************************
00127 * @brief                The CHECK_PARAM macro is used for function's parameters check.
00128 *                               It is used only if the library is compiled in DEBUG mode.
00129 * @param[in]    expr - If expr is false, it calls check_failed() function
00130 *                       which reports the name of the source file and the source
00131 *                       line number of the call that failed.
00132 *                    - If expr is true, it returns no value.
00133 * @return               None
00134 *******************************************************************************/
00135 #define CHECK_PARAM(expr) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))
00136 #else
00137 #define CHECK_PARAM(expr)
00138 #endif /* DEBUG */
00139
00140
00141
00142 /************************** GLOBAL/PUBLIC FUNCTION DECLARATION *********************************/
00143
00144 #ifdef  DEBUG
00145 void check_failed(uint8_t *file, uint32_t line);
00146 #endif
00147
00148
00149 #endif /* LPC17XX_LIBCFG_H_ */
Generated on Tue Jun 7 14:58:58 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/TIMER/FreqMeasure/lpc17xx_libcfg.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/TIMER/FreqMeasure/lpc17xx_libcfg.h

Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          lpc17xx_libcfg.h                        2010-05-21
00003 */
00026 #ifndef LPC17XX_LIBCFG_H_
00027 #define LPC17XX_LIBCFG_H_
00028
00029 #include "lpc_types.h"
00030
00031
00032 /************************** DEBUG MODE DEFINITIONS *********************************/
00033 /* Un-comment the line below to compile the library in DEBUG mode, this will expanse
00034    the "CHECK_PARAM" macro in the FW library code */
00035
00036 #define DEBUG
00037
00038
00039 /******************* PERIPHERAL FW LIBRARY CONFIGURATION DEFINITIONS ***********************/
00040
00041 /* Comment the line below to disable the specific peripheral inclusion */
00042
00043 /* DEBUG_FRAMWORK ------------------------------ */
00044 #define _DBGFWK
00045
00046 /* GPIO ------------------------------- */
00047 //#define _GPIO
00048
00049 /* EXTI ------------------------------- */
00050 //#define _EXTI
00051
00052 /* UART ------------------------------- */
00053 #define _UART
00054 #define _UART0
00055 //#define _UART1
00056 //#define _UART2
00057 //#define _UART3
00058
00059 /* SPI ------------------------------- */
00060 //#define _SPI
00061
00062 /* SSP ------------------------------- */
00063 //#define _SSP
00064 //#define _SSP0
00065 //#define _SSP1
00066
00067 /* SYSTICK --------------------------- */
00068 //#define _SYSTICK
00069
00070 /* I2C ------------------------------- */
00071 //#define _I2C
00072 //#define _I2C0
00073 //#define _I2C1
00074 //#define _I2C2
00075
00076 /* TIMER ------------------------------- */
00077 #define _TIM
00078
00079 /* WDT ------------------------------- */
00080 //#define _WDT
00081
00082
00083 /* GPDMA ------------------------------- */
00084 //#define _GPDMA
00085
00086
00087 /* DAC ------------------------------- */
00088 //#define _DAC
00089
00090 /* DAC ------------------------------- */
00091 //#define _ADC
00092
00093
00094 /* PWM ------------------------------- */
00095 //#define _PWM
00096 //#define _PWM1
00097
00098 /* RTC ------------------------------- */
00099 //#define _RTC
00100
00101 /* I2S ------------------------------- */
00102 //#define _I2S
00103
00104 /* USB device ------------------------------- */
00105 //#define _USBDEV
00106 //#define _USB_DMA
00107
00108 /* QEI ------------------------------- */
00109 //#define _QEI
00110
00111 /* MCPWM ------------------------------- */
00112 //#define _MCPWM
00113
00114 /* CAN--------------------------------*/
00115 //#define _CAN
00116
00117 /* RIT ------------------------------- */
00118 //#define _RIT
00119
00120 /* EMAC ------------------------------ */
00121 //#define _EMAC
00122
00123 /************************** GLOBAL/PUBLIC MACRO DEFINITIONS *********************************/
00124
00125 #ifdef  DEBUG
00126 /*******************************************************************************
00127 * @brief                The CHECK_PARAM macro is used for function's parameters check.
00128 *                               It is used only if the library is compiled in DEBUG mode.
00129 * @param[in]    expr - If expr is false, it calls check_failed() function
00130 *                       which reports the name of the source file and the source
00131 *                       line number of the call that failed.
00132 *                    - If expr is true, it returns no value.
00133 * @return               None
00134 *******************************************************************************/
00135 #define CHECK_PARAM(expr) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))
00136 #else
00137 #define CHECK_PARAM(expr)
00138 #endif /* DEBUG */
00139
00140
00141
00142 /************************** GLOBAL/PUBLIC FUNCTION DECLARATION *********************************/
00143
00144 #ifdef  DEBUG
00145 void check_failed(uint8_t *file, uint32_t line);
00146 #endif
00147
00148
00149 #endif /* LPC17XX_LIBCFG_H_ */
Generated on Tue Jun 7 14:58:58 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/TIMER/Gen_Diff_Delay/lpc17xx_libcfg.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/TIMER/Gen_Diff_Delay/lpc17xx_libcfg.h

Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          lpc17xx_libcfg.h                        2010-05-21
00003 */
00025 #ifndef LPC17XX_LIBCFG_H_
00026 #define LPC17XX_LIBCFG_H_
00027
00028 #include "lpc_types.h"
00029
00030
00031 /************************** DEBUG MODE DEFINITIONS *********************************/
00032 /* Un-comment the line below to compile the library in DEBUG mode, this will expanse
00033    the "CHECK_PARAM" macro in the FW library code */
00034
00035 #define DEBUG
00036
00037
00038 /******************* PERIPHERAL FW LIBRARY CONFIGURATION DEFINITIONS ***********************/
00039
00040 /* Comment the line below to disable the specific peripheral inclusion */
00041
00042 /* DEBUG_FRAMWORK ------------------------------ */
00043 #define _DBGFWK
00044
00045 /* GPIO ------------------------------- */
00046 //#define _GPIO
00047
00048 /* EXTI ------------------------------- */
00049 //#define _EXTI
00050
00051 /* UART ------------------------------- */
00052 #define _UART
00053 #define _UART0
00054 //#define _UART1
00055 //#define _UART2
00056 //#define _UART3
00057
00058 /* SPI ------------------------------- */
00059 //#define _SPI
00060
00061 /* SSP ------------------------------- */
00062 //#define _SSP
00063 //#define _SSP0
00064 //#define _SSP1
00065
00066 /* SYSTICK --------------------------- */
00067 //#define _SYSTICK
00068
00069 /* I2C ------------------------------- */
00070 //#define _I2C
00071 //#define _I2C0
00072 //#define _I2C1
00073 //#define _I2C2
00074
00075 /* TIMER ------------------------------- */
00076 #define _TIM
00077
00078 /* WDT ------------------------------- */
00079 //#define _WDT
00080
00081
00082 /* GPDMA ------------------------------- */
00083 //#define _GPDMA
00084
00085
00086 /* DAC ------------------------------- */
00087 //#define _DAC
00088
00089 /* DAC ------------------------------- */
00090 //#define _ADC
00091
00092
00093 /* PWM ------------------------------- */
00094 //#define _PWM
00095 //#define _PWM1
00096
00097 /* RTC ------------------------------- */
00098 //#define _RTC
00099
00100 /* I2S ------------------------------- */
00101 //#define _I2S
00102
00103 /* USB device ------------------------------- */
00104 //#define _USBDEV
00105 //#define _USB_DMA
00106
00107 /* QEI ------------------------------- */
00108 //#define _QEI
00109
00110 /* MCPWM ------------------------------- */
00111 //#define _MCPWM
00112
00113 /* CAN--------------------------------*/
00114 //#define _CAN
00115
00116 /* RIT ------------------------------- */
00117 //#define _RIT
00118
00119 /* EMAC ------------------------------ */
00120 //#define _EMAC
00121
00122 /************************** GLOBAL/PUBLIC MACRO DEFINITIONS *********************************/
00123
00124 #ifdef  DEBUG
00125 /*******************************************************************************
00126 * @brief                The CHECK_PARAM macro is used for function's parameters check.
00127 *                               It is used only if the library is compiled in DEBUG mode.
00128 * @param[in]    expr - If expr is false, it calls check_failed() function
00129 *                       which reports the name of the source file and the source
00130 *                       line number of the call that failed.
00131 *                    - If expr is true, it returns no value.
00132 * @return               None
00133 *******************************************************************************/
00134 #define CHECK_PARAM(expr) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))
00135 #else
00136 #define CHECK_PARAM(expr)
00137 #endif /* DEBUG */
00138
00139
00140
00141 /************************** GLOBAL/PUBLIC FUNCTION DECLARATION *********************************/
00142
00143 #ifdef  DEBUG
00144 void check_failed(uint8_t *file, uint32_t line);
00145 #endif
00146
00147
00148 #endif /* LPC17XX_LIBCFG_H_ */
Generated on Tue Jun 7 14:58:58 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/TIMER/Gen_Diff_Freqs/lpc17xx_libcfg.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/TIMER/Gen_Diff_Freqs/lpc17xx_libcfg.h

Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          lpc17xx_libcfg.h                        2010-05-21
00003 */
00026 #ifndef LPC17XX_LIBCFG_H_
00027 #define LPC17XX_LIBCFG_H_
00028
00029 #include "lpc_types.h"
00030
00031
00032 /************************** DEBUG MODE DEFINITIONS *********************************/
00033 /* Un-comment the line below to compile the library in DEBUG mode, this will expanse
00034    the "CHECK_PARAM" macro in the FW library code */
00035
00036 #define DEBUG
00037
00038
00039 /******************* PERIPHERAL FW LIBRARY CONFIGURATION DEFINITIONS ***********************/
00040
00041 /* Comment the line below to disable the specific peripheral inclusion */
00042
00043 /* DEBUG_FRAMWORK ------------------------------ */
00044 #define _DBGFWK
00045
00046 /* GPIO ------------------------------- */
00047 //#define _GPIO
00048
00049 /* EXTI ------------------------------- */
00050 //#define _EXTI
00051
00052 /* UART ------------------------------- */
00053 #define _UART
00054 #define _UART0
00055 //#define _UART1
00056 //#define _UART2
00057 //#define _UART3
00058
00059 /* SPI ------------------------------- */
00060 //#define _SPI
00061
00062 /* SSP ------------------------------- */
00063 //#define _SSP
00064 //#define _SSP0
00065 //#define _SSP1
00066
00067 /* SYSTICK --------------------------- */
00068 //#define _SYSTICK
00069
00070 /* I2C ------------------------------- */
00071 //#define _I2C
00072 //#define _I2C0
00073 //#define _I2C1
00074 //#define _I2C2
00075
00076 /* TIMER ------------------------------- */
00077 #define _TIM
00078
00079 /* WDT ------------------------------- */
00080 //#define _WDT
00081
00082
00083 /* GPDMA ------------------------------- */
00084 //#define _GPDMA
00085
00086
00087 /* DAC ------------------------------- */
00088 //#define _DAC
00089
00090 /* DAC ------------------------------- */
00091 //#define _ADC
00092
00093
00094 /* PWM ------------------------------- */
00095 //#define _PWM
00096 //#define _PWM1
00097
00098 /* RTC ------------------------------- */
00099 //#define _RTC
00100
00101 /* I2S ------------------------------- */
00102 //#define _I2S
00103
00104 /* USB device ------------------------------- */
00105 //#define _USBDEV
00106 //#define _USB_DMA
00107
00108 /* QEI ------------------------------- */
00109 //#define _QEI
00110
00111 /* MCPWM ------------------------------- */
00112 //#define _MCPWM
00113
00114 /* CAN--------------------------------*/
00115 //#define _CAN
00116
00117 /* RIT ------------------------------- */
00118 //#define _RIT
00119
00120 /* EMAC ------------------------------ */
00121 //#define _EMAC
00122
00123 /************************** GLOBAL/PUBLIC MACRO DEFINITIONS *********************************/
00124
00125 #ifdef  DEBUG
00126 /*******************************************************************************
00127 * @brief                The CHECK_PARAM macro is used for function's parameters check.
00128 *                               It is used only if the library is compiled in DEBUG mode.
00129 * @param[in]    expr - If expr is false, it calls check_failed() function
00130 *                       which reports the name of the source file and the source
00131 *                       line number of the call that failed.
00132 *                    - If expr is true, it returns no value.
00133 * @return               None
00134 *******************************************************************************/
00135 #define CHECK_PARAM(expr) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))
00136 #else
00137 #define CHECK_PARAM(expr)
00138 #endif /* DEBUG */
00139
00140
00141
00142 /************************** GLOBAL/PUBLIC FUNCTION DECLARATION *********************************/
00143
00144 #ifdef  DEBUG
00145 void check_failed(uint8_t *file, uint32_t line);
00146 #endif
00147
00148
00149 #endif /* LPC17XX_LIBCFG_H_ */
Generated on Tue Jun 7 14:58:58 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/TIMER/Interrupt_Match/lpc17xx_libcfg.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/TIMER/Interrupt_Match/lpc17xx_libcfg.h

Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          lpc17xx_libcfg.h                        2010-05-21
00003 */
00026 #ifndef LPC17XX_LIBCFG_H_
00027 #define LPC17XX_LIBCFG_H_
00028
00029 #include "lpc_types.h"
00030
00031
00032 /************************** DEBUG MODE DEFINITIONS *********************************/
00033 /* Un-comment the line below to compile the library in DEBUG mode, this will expanse
00034    the "CHECK_PARAM" macro in the FW library code */
00035
00036 #define DEBUG
00037
00038 /******************* PERIPHERAL FW LIBRARY CONFIGURATION DEFINITIONS ***********************/
00039
00040 /* Comment the line below to disable the specific peripheral inclusion */
00041
00042 /* DEBUG_FRAMWORK ------------------------------ */
00043 #define _DBGFWK
00044
00045 /* GPIO ------------------------------- */
00046 #define _GPIO
00047
00048 /* EXTI ------------------------------- */
00049 //#define _EXTI
00050
00051 /* UART ------------------------------- */
00052 #define _UART
00053 #define _UART0
00054 //#define _UART1
00055 //#define _UART2
00056 //#define _UART3
00057
00058 /* SPI ------------------------------- */
00059 //#define _SPI
00060
00061 /* SSP ------------------------------- */
00062 //#define _SSP
00063 //#define _SSP0
00064 //#define _SSP1
00065
00066 /* SYSTICK --------------------------- */
00067 //#define _SYSTICK
00068
00069 /* I2C ------------------------------- */
00070 //#define _I2C
00071 //#define _I2C0
00072 //#define _I2C1
00073 //#define _I2C2
00074
00075 /* TIMER ------------------------------- */
00076 #define _TIM
00077
00078 /* WDT ------------------------------- */
00079 //#define _WDT
00080
00081
00082 /* GPDMA ------------------------------- */
00083 //#define _GPDMA
00084
00085
00086 /* DAC ------------------------------- */
00087 //#define _DAC
00088
00089 /* DAC ------------------------------- */
00090 //#define _ADC
00091
00092
00093 /* PWM ------------------------------- */
00094 //#define _PWM
00095 //#define _PWM1
00096
00097 /* RTC ------------------------------- */
00098 //#define _RTC
00099
00100 /* I2S ------------------------------- */
00101 //#define _I2S
00102
00103 /* USB device ------------------------------- */
00104 //#define _USBDEV
00105 //#define _USB_DMA
00106
00107 /* QEI ------------------------------- */
00108 //#define _QEI
00109
00110 /* MCPWM ------------------------------- */
00111 //#define _MCPWM
00112
00113 /* CAN--------------------------------*/
00114 //#define _CAN
00115
00116 /* RIT ------------------------------- */
00117 //#define _RIT
00118
00119 /* EMAC ------------------------------ */
00120 //#define _EMAC
00121
00122 /************************** GLOBAL/PUBLIC MACRO DEFINITIONS *********************************/
00123
00124 #ifdef  DEBUG
00125 /*******************************************************************************
00126 * @brief                The CHECK_PARAM macro is used for function's parameters check.
00127 *                               It is used only if the library is compiled in DEBUG mode.
00128 * @param[in]    expr - If expr is false, it calls check_failed() function
00129 *                       which reports the name of the source file and the source
00130 *                       line number of the call that failed.
00131 *                    - If expr is true, it returns no value.
00132 * @return               None
00133 *******************************************************************************/
00134 #define CHECK_PARAM(expr) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))
00135 #else
00136 #define CHECK_PARAM(expr)
00137 #endif /* DEBUG */
00138
00139
00140
00141 /************************** GLOBAL/PUBLIC FUNCTION DECLARATION *********************************/
00142
00143 #ifdef  DEBUG
00144 void check_failed(uint8_t *file, uint32_t line);
00145 #endif
00146
00147
00148 #endif /* LPC17XX_LIBCFG_H_ */
Generated on Tue Jun 7 14:58:58 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/TIMER/PWMSignal/lpc17xx_libcfg.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/TIMER/PWMSignal/lpc17xx_libcfg.h

Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          lpc17xx_libcfg.h                        2010-05-21
00003 */
00026 #ifndef LPC17XX_LIBCFG_H_
00027 #define LPC17XX_LIBCFG_H_
00028
00029 #include "lpc_types.h"
00030
00031
00032 /************************** DEBUG MODE DEFINITIONS *********************************/
00033 /* Un-comment the line below to compile the library in DEBUG mode, this will expanse
00034    the "CHECK_PARAM" macro in the FW library code */
00035
00036 #define DEBUG
00037
00038
00039 /******************* PERIPHERAL FW LIBRARY CONFIGURATION DEFINITIONS ***********************/
00040
00041 /* Comment the line below to disable the specific peripheral inclusion */
00042
00043 /* DEBUG_FRAMWORK ------------------------------ */
00044 #define _DBGFWK
00045
00046 /* GPIO ------------------------------- */
00047 #define _GPIO
00048
00049 /* EXTI ------------------------------- */
00050 //#define _EXTI
00051
00052 /* UART ------------------------------- */
00053 #define _UART
00054 #define _UART0
00055 //#define _UART1
00056 //#define _UART2
00057 //#define _UART3
00058
00059 /* SPI ------------------------------- */
00060 //#define _SPI
00061
00062 /* SSP ------------------------------- */
00063 //#define _SSP
00064 //#define _SSP0
00065 //#define _SSP1
00066
00067 /* SYSTICK ----------------------------*/
00068 //#define _SYSTICK
00069
00070 /* I2C ------------------------------- */
00071 //#define _I2C
00072 //#define _I2C0
00073 //#define _I2C1
00074 //#define _I2C2
00075
00076 /* TIMER ------------------------------- */
00077 #define _TIM
00078
00079 /* WDT ------------------------------- */
00080 //#define _WDT
00081
00082
00083 /* GPDMA ------------------------------- */
00084 //#define _GPDMA
00085
00086
00087 /* DAC ------------------------------- */
00088 //#define _DAC
00089
00090 /* DAC ------------------------------- */
00091 //#define _ADC
00092
00093
00094 /* PWM ------------------------------- */
00095 //#define _PWM
00096 //#define _PWM1
00097
00098 /* RTC ------------------------------- */
00099 //#define _RTC
00100
00101 /* I2S ------------------------------- */
00102 //#define _I2S
00103
00104 /* USB device ------------------------------- */
00105 //#define _USBDEV
00106 //#define _USB_DMA
00107
00108 /* QEI ------------------------------- */
00109 //#define _QEI
00110
00111 /* MCPWM ------------------------------- */
00112 //#define _MCPWM
00113
00114 /* CAN--------------------------------*/
00115 //#define _CAN
00116
00117 /* RIT ------------------------------- */
00118 //#define _RIT
00119
00120 /* EMAC ------------------------------ */
00121 //#define _EMAC
00122
00123 /************************** GLOBAL/PUBLIC MACRO DEFINITIONS *********************************/
00124
00125 #ifdef  DEBUG
00126 /*******************************************************************************
00127 * @brief                The CHECK_PARAM macro is used for function's parameters check.
00128 *                               It is used only if the library is compiled in DEBUG mode.
00129 * @param[in]    expr - If expr is false, it calls check_failed() function
00130 *                       which reports the name of the source file and the source
00131 *                       line number of the call that failed.
00132 *                    - If expr is true, it returns no value.
00133 * @return               None
00134 *******************************************************************************/
00135 #define CHECK_PARAM(expr) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))
00136 #else
00137 #define CHECK_PARAM(expr)
00138 #endif /* DEBUG */
00139
00140
00141
00142 /************************** GLOBAL/PUBLIC FUNCTION DECLARATION *********************************/
00143
00144 #ifdef  DEBUG
00145 void check_failed(uint8_t *file, uint32_t line);
00146 #endif
00147
00148
00149 #endif /* LPC17XX_LIBCFG_H_ */
Generated on Tue Jun 7 14:58:58 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/TIMER/Polling_Match/lpc17xx_libcfg.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/TIMER/Polling_Match/lpc17xx_libcfg.h

Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          lpc17xx_libcfg.h                        2010-05-21
00003 */
00026 #ifndef LPC17XX_LIBCFG_H_
00027 #define LPC17XX_LIBCFG_H_
00028
00029 #include "lpc_types.h"
00030
00031
00032 /************************** DEBUG MODE DEFINITIONS *********************************/
00033 /* Un-comment the line below to compile the library in DEBUG mode, this will expanse
00034    the "CHECK_PARAM" macro in the FW library code */
00035
00036 #define DEBUG
00037
00038
00039 /******************* PERIPHERAL FW LIBRARY CONFIGURATION DEFINITIONS ***********************/
00040
00041 /* Comment the line below to disable the specific peripheral inclusion */
00042
00043 /* DEBUG_FRAMWORK ------------------------------ */
00044 #define _DBGFWK
00045
00046 /* GPIO ------------------------------- */
00047 //#define _GPIO
00048
00049 /* EXTI ------------------------------- */
00050 //#define _EXTI
00051
00052 /* UART ------------------------------- */
00053 #define _UART
00054 #define _UART0
00055 //#define _UART1
00056 //#define _UART2
00057 //#define _UART3
00058
00059 /* SPI ------------------------------- */
00060 //#define _SPI
00061
00062 /* SSP ------------------------------- */
00063 //#define _SSP
00064 //#define _SSP0
00065 //#define _SSP1
00066
00067 /* SYSTICK --------------------------- */
00068 //#define _SYSTICK
00069
00070 /* I2C ------------------------------- */
00071 //#define _I2C
00072 //#define _I2C0
00073 //#define _I2C1
00074 //#define _I2C2
00075
00076 /* TIMER ------------------------------- */
00077 #define _TIM
00078
00079 /* WDT ------------------------------- */
00080 //#define _WDT
00081
00082
00083 /* GPDMA ------------------------------- */
00084 //#define _GPDMA
00085
00086
00087 /* DAC ------------------------------- */
00088 //#define _DAC
00089
00090 /* DAC ------------------------------- */
00091 //#define _ADC
00092
00093
00094 /* PWM ------------------------------- */
00095 //#define _PWM
00096 //#define _PWM1
00097
00098 /* RTC ------------------------------- */
00099 //#define _RTC
00100
00101 /* I2S ------------------------------- */
00102 //#define _I2S
00103
00104 /* USB device ------------------------------- */
00105 //#define _USBDEV
00106 //#define _USB_DMA
00107
00108 /* QEI ------------------------------- */
00109 //#define _QEI
00110
00111 /* MCPWM ------------------------------- */
00112 //#define _MCPWM
00113
00114 /* CAN--------------------------------*/
00115 //#define _CAN
00116
00117 /* RIT ------------------------------- */
00118 //#define _RIT
00119
00120 /* EMAC ------------------------------ */
00121 //#define _EMAC
00122
00123 /************************** GLOBAL/PUBLIC MACRO DEFINITIONS *********************************/
00124
00125 #ifdef  DEBUG
00126 /*******************************************************************************
00127 * @brief                The CHECK_PARAM macro is used for function's parameters check.
00128 *                               It is used only if the library is compiled in DEBUG mode.
00129 * @param[in]    expr - If expr is false, it calls check_failed() function
00130 *                       which reports the name of the source file and the source
00131 *                       line number of the call that failed.
00132 *                    - If expr is true, it returns no value.
00133 * @return               None
00134 *******************************************************************************/
00135 #define CHECK_PARAM(expr) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))
00136 #else
00137 #define CHECK_PARAM(expr)
00138 #endif /* DEBUG */
00139
00140
00141
00142 /************************** GLOBAL/PUBLIC FUNCTION DECLARATION *********************************/
00143
00144 #ifdef  DEBUG
00145 void check_failed(uint8_t *file, uint32_t line);
00146 #endif
00147
00148
00149 #endif /* LPC17XX_LIBCFG_H_ */
Generated on Tue Jun 7 14:58:58 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/LCD/NOKIA6610_LCD/Terminal_9_12x6.c Source File

C:/nxpdrv/LPC1700CMSIS/Examples/LCD/NOKIA6610_LCD/Terminal_9_12x6.c

Go to the documentation of this file.
00001 /*************************************************************************
00002  *
00003  *    Used with ICCARM and AARM.
00004  *
00005  *    (c) Copyright IAR Systems 2006
00006  *
00007  *    File name   : Terminal_9_12x6.c
00008  *    Description : Font Terminal 9 (12x6)
00009  *
00010  *    History :
00011  *    1. Date        : December 2, 2006
00012  *       Author      : Stanimir Bonev
00013  *       Description : Create
00014  *
00015  *    $Revision: 28532 $
00016  **************************************************************************/
00017 #include "drv_glcd.h"
00018
00019 static const unsigned char TextStream [] = {
00020                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
00021                 0x00, 0x00, 0x00, 0x00, 0x0e, 0x11, 0x11, 0x1b,
00022                 0x11, 0x11, 0x1b, 0x15, 0x11, 0x0e, 0x00, 0x00,
00023                 0x0e, 0x1f, 0x1f, 0x15, 0x1f, 0x1f, 0x15, 0x1b,
00024                 0x1f, 0x0e, 0x00, 0x00, 0x00, 0x0a, 0x1b, 0x1f,
00025                 0x1f, 0x1f, 0x1f, 0x0e, 0x0e, 0x04, 0x04, 0x00,
00026                 0x04, 0x04, 0x0e, 0x0e, 0x1f, 0x1f, 0x1f, 0x0e,
00027                 0x0e, 0x04, 0x04, 0x00, 0x04, 0x0e, 0x0e, 0x0e,
00028                 0x04, 0x1f, 0x1f, 0x0e, 0x04, 0x0e, 0x00, 0x00,
00029                 0x04, 0x04, 0x0e, 0x0e, 0x1f, 0x1f, 0x1f, 0x0e,
00030                 0x04, 0x0e, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
00031                 0x00, 0x06, 0x06, 0x00, 0x00, 0x00, 0x00, 0x00,
00032                 0x1f, 0x1f, 0x1f, 0x1f, 0x1f, 0x19, 0x19, 0x1f,
00033                 0x1f, 0x1f, 0x1f, 0x1f, 0x00, 0x00, 0x00, 0x00,
00034                 0x0e, 0x0a, 0x0a, 0x0e, 0x00, 0x00, 0x00, 0x00,
00035                 0x1f, 0x1f, 0x1f, 0x1f, 0x11, 0x15, 0x15, 0x11,
00036                 0x1f, 0x1f, 0x1f, 0x1f, 0x00, 0x00, 0x1c, 0x18,
00037                 0x14, 0x06, 0x09, 0x09, 0x09, 0x06, 0x00, 0x00,
00038                 0x00, 0x06, 0x09, 0x09, 0x09, 0x06, 0x02, 0x02,
00039                 0x07, 0x02, 0x00, 0x00, 0x00, 0x00, 0x04, 0x0c,
00040                 0x0c, 0x04, 0x04, 0x04, 0x07, 0x03, 0x00, 0x00,
00041                 0x0c, 0x0a, 0x0e, 0x0a, 0x0a, 0x0a, 0x0e, 0x0e,
00042                 0x03, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
00043                 0x15, 0x0e, 0x11, 0x0e, 0x15, 0x00, 0x00, 0x00,
00044                 0x00, 0x00, 0x01, 0x03, 0x07, 0x0f, 0x07, 0x03,
00045                 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x0c,
00046                 0x0e, 0x0f, 0x0e, 0x0c, 0x08, 0x00, 0x00, 0x00,
00047                 0x00, 0x04, 0x0e, 0x15, 0x04, 0x04, 0x04, 0x15,
00048                 0x0e, 0x04, 0x00, 0x00, 0x00, 0x00, 0x0a, 0x0a,
00049                 0x0a, 0x0a, 0x0a, 0x00, 0x0a, 0x0a, 0x00, 0x00,
00050                 0x00, 0x0e, 0x0b, 0x0b, 0x0b, 0x0b, 0x0a, 0x0a,
00051                 0x0a, 0x0a, 0x00, 0x00, 0x00, 0x06, 0x09, 0x01,
00052                 0x06, 0x09, 0x06, 0x08, 0x09, 0x06, 0x00, 0x00,
00053                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
00054                 0x0f, 0x0f, 0x00, 0x00, 0x00, 0x04, 0x0e, 0x15,
00055                 0x04, 0x04, 0x04, 0x15, 0x0e, 0x04, 0x1f, 0x00,
00056                 0x00, 0x04, 0x0e, 0x15, 0x04, 0x04, 0x04, 0x04,
00057                 0x04, 0x04, 0x00, 0x00, 0x00, 0x00, 0x04, 0x04,
00058                 0x04, 0x04, 0x04, 0x15, 0x0e, 0x04, 0x00, 0x00,
00059                 0x00, 0x00, 0x00, 0x02, 0x04, 0x0f, 0x04, 0x02,
00060                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04,
00061                 0x02, 0x0f, 0x02, 0x04, 0x00, 0x00, 0x00, 0x00,
00062                 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x01, 0x0f,
00063                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0a,
00064                 0x0a, 0x1f, 0x0a, 0x0a, 0x00, 0x00, 0x00, 0x00,
00065                 0x00, 0x00, 0x00, 0x04, 0x04, 0x0e, 0x0e, 0x1f,
00066                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x1f,
00067                 0x0e, 0x0e, 0x04, 0x04, 0x00, 0x00, 0x00, 0x00,
00068                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
00069                 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x04, 0x04,
00070                 0x04, 0x04, 0x04, 0x00, 0x04, 0x04, 0x00, 0x00,
00071                 0x0a, 0x0a, 0x0a, 0x0a, 0x00, 0x00, 0x00, 0x00,
00072                 0x00, 0x00, 0x00, 0x00, 0x00, 0x0a, 0x0a, 0x1f,
00073                 0x0a, 0x0a, 0x1f, 0x0a, 0x0a, 0x00, 0x00, 0x00,
00074                 0x00, 0x02, 0x06, 0x09, 0x01, 0x02, 0x04, 0x08,
00075                 0x09, 0x06, 0x04, 0x00, 0x00, 0x0b, 0x0b, 0x04,
00076                 0x04, 0x02, 0x02, 0x02, 0x0d, 0x0d, 0x00, 0x00,
00077                 0x00, 0x02, 0x05, 0x05, 0x05, 0x02, 0x15, 0x09,
00078                 0x09, 0x16, 0x00, 0x00, 0x0c, 0x0c, 0x08, 0x04,
00079                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
00080                 0x00, 0x04, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02,
00081                 0x02, 0x04, 0x00, 0x00, 0x00, 0x02, 0x04, 0x04,
00082                 0x04, 0x04, 0x04, 0x04, 0x04, 0x02, 0x00, 0x00,
00083                 0x00, 0x00, 0x04, 0x15, 0x0e, 0x0e, 0x15, 0x04,
00084                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04,
00085                 0x04, 0x1f, 0x04, 0x04, 0x00, 0x00, 0x00, 0x00,
00086                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
00087                 0x06, 0x06, 0x04, 0x02, 0x00, 0x00, 0x00, 0x00,
00088                 0x00, 0x0f, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
00089                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
00090                 0x06, 0x06, 0x00, 0x00, 0x00, 0x08, 0x08, 0x04,
00091                 0x04, 0x02, 0x02, 0x02, 0x01, 0x01, 0x00, 0x00,
00092                 0x00, 0x0e, 0x09, 0x09, 0x09, 0x09, 0x09, 0x09,
00093                 0x09, 0x07, 0x00, 0x00, 0x00, 0x04, 0x06, 0x05,
00094                 0x04, 0x04, 0x04, 0x04, 0x04, 0x0f, 0x00, 0x00,
00095                 0x00, 0x06, 0x09, 0x09, 0x08, 0x04, 0x02, 0x01,
00096                 0x01, 0x0f, 0x00, 0x00, 0x00, 0x06, 0x09, 0x08,
00097                 0x08, 0x06, 0x08, 0x08, 0x09, 0x06, 0x00, 0x00,
00098                 0x00, 0x08, 0x0c, 0x0a, 0x0a, 0x09, 0x0f, 0x08,
00099                 0x08, 0x08, 0x00, 0x00, 0x00, 0x0f, 0x01, 0x01,
00100                 0x01, 0x07, 0x08, 0x08, 0x09, 0x06, 0x00, 0x00,
00101                 0x00, 0x0c, 0x02, 0x01, 0x07, 0x09, 0x09, 0x09,
00102                 0x09, 0x06, 0x00, 0x00, 0x00, 0x0f, 0x08, 0x08,
00103                 0x08, 0x04, 0x04, 0x02, 0x02, 0x02, 0x00, 0x00,
00104                 0x00, 0x06, 0x09, 0x09, 0x09, 0x06, 0x09, 0x09,
00105                 0x09, 0x06, 0x00, 0x00, 0x00, 0x06, 0x09, 0x09,
00106                 0x09, 0x09, 0x0e, 0x08, 0x04, 0x03, 0x00, 0x00,
00107                 0x00, 0x00, 0x00, 0x00, 0x06, 0x06, 0x00, 0x00,
00108                 0x06, 0x06, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
00109                 0x06, 0x06, 0x00, 0x00, 0x06, 0x06, 0x04, 0x02,
00110                 0x00, 0x00, 0x08, 0x04, 0x02, 0x01, 0x01, 0x02,
00111                 0x04, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
00112                 0x00, 0x0f, 0x00, 0x0f, 0x00, 0x00, 0x00, 0x00,
00113                 0x00, 0x00, 0x01, 0x02, 0x04, 0x08, 0x08, 0x04,
00114                 0x02, 0x01, 0x00, 0x00, 0x00, 0x06, 0x09, 0x09,
00115                 0x08, 0x04, 0x04, 0x00, 0x04, 0x04, 0x00, 0x00,
00116                 0x00, 0x06, 0x09, 0x09, 0x09, 0x0d, 0x0d, 0x01,
00117                 0x01, 0x0e, 0x00, 0x00, 0x00, 0x06, 0x09, 0x09,
00118                 0x09, 0x0f, 0x09, 0x09, 0x09, 0x09, 0x00, 0x00,
00119                 0x00, 0x07, 0x09, 0x09, 0x09, 0x07, 0x09, 0x09,
00120                 0x09, 0x07, 0x00, 0x00, 0x00, 0x06, 0x09, 0x09,
00121                 0x01, 0x01, 0x01, 0x01, 0x09, 0x06, 0x00, 0x00,
00122                 0x00, 0x07, 0x09, 0x09, 0x09, 0x09, 0x09, 0x09,
00123                 0x09, 0x07, 0x00, 0x00, 0x00, 0x0f, 0x01, 0x01,
00124                 0x01, 0x0f, 0x01, 0x01, 0x01, 0x0f, 0x00, 0x00,
00125                 0x00, 0x0f, 0x01, 0x01, 0x01, 0x0f, 0x01, 0x01,
00126                 0x01, 0x01, 0x00, 0x00, 0x00, 0x06, 0x09, 0x09,
00127                 0x01, 0x01, 0x0d, 0x09, 0x09, 0x06, 0x00, 0x00,
00128                 0x00, 0x09, 0x09, 0x09, 0x09, 0x0f, 0x09, 0x09,
00129                 0x09, 0x09, 0x00, 0x00, 0x00, 0x0e, 0x04, 0x04,
00130                 0x04, 0x04, 0x04, 0x04, 0x04, 0x0e, 0x00, 0x00,
00131                 0x00, 0x0e, 0x04, 0x04, 0x04, 0x04, 0x04, 0x05,
00132                 0x05, 0x02, 0x00, 0x00, 0x00, 0x09, 0x09, 0x05,
00133                 0x05, 0x03, 0x05, 0x05, 0x09, 0x09, 0x00, 0x00,
00134                 0x00, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01,
00135                 0x01, 0x0f, 0x00, 0x00, 0x00, 0x09, 0x09, 0x0f,
00136                 0x0f, 0x09, 0x09, 0x09, 0x09, 0x09, 0x00, 0x00,
00137                 0x00, 0x09, 0x09, 0x0b, 0x0b, 0x0d, 0x0d, 0x09,
00138                 0x09, 0x09, 0x00, 0x00, 0x00, 0x06, 0x09, 0x09,
00139                 0x09, 0x09, 0x09, 0x09, 0x09, 0x06, 0x00, 0x00,
00140                 0x00, 0x07, 0x09, 0x09, 0x09, 0x07, 0x01, 0x01,
00141                 0x01, 0x01, 0x00, 0x00, 0x00, 0x06, 0x09, 0x09,
00142                 0x09, 0x09, 0x09, 0x09, 0x09, 0x06, 0x04, 0x08,
00143                 0x00, 0x07, 0x09, 0x09, 0x09, 0x07, 0x03, 0x05,
00144                 0x09, 0x09, 0x00, 0x00, 0x00, 0x06, 0x09, 0x09,
00145                 0x01, 0x06, 0x08, 0x09, 0x09, 0x06, 0x00, 0x00,
00146                 0x00, 0x1f, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04,
00147                 0x04, 0x04, 0x00, 0x00, 0x00, 0x09, 0x09, 0x09,
00148                 0x09, 0x09, 0x09, 0x09, 0x09, 0x06, 0x00, 0x00,
00149                 0x00, 0x09, 0x09, 0x09, 0x09, 0x09, 0x0a, 0x0a,
00150                 0x04, 0x04, 0x00, 0x00, 0x00, 0x09, 0x09, 0x09,
00151                 0x09, 0x09, 0x09, 0x0f, 0x09, 0x09, 0x00, 0x00,
00152                 0x00, 0x09, 0x09, 0x09, 0x06, 0x06, 0x06, 0x09,
00153                 0x09, 0x09, 0x00, 0x00, 0x00, 0x11, 0x11, 0x11,
00154                 0x0a, 0x0a, 0x04, 0x04, 0x04, 0x04, 0x00, 0x00,
00155                 0x00, 0x0f, 0x08, 0x04, 0x04, 0x02, 0x02, 0x01,
00156                 0x01, 0x0f, 0x00, 0x00, 0x00, 0x06, 0x02, 0x02,
00157                 0x02, 0x02, 0x02, 0x02, 0x02, 0x06, 0x00, 0x00,
00158                 0x00, 0x01, 0x01, 0x02, 0x02, 0x04, 0x04, 0x04,
00159                 0x08, 0x08, 0x00, 0x00, 0x00, 0x06, 0x04, 0x04,
00160                 0x04, 0x04, 0x04, 0x04, 0x04, 0x06, 0x00, 0x00,
00161                 0x00, 0x04, 0x0a, 0x00, 0x00, 0x00, 0x00, 0x00,
00162                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
00163                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x1f,
00164                 0x06, 0x06, 0x02, 0x04, 0x00, 0x00, 0x00, 0x00,
00165                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
00166                 0x06, 0x08, 0x0e, 0x09, 0x09, 0x0e, 0x00, 0x00,
00167                 0x00, 0x01, 0x01, 0x01, 0x07, 0x09, 0x09, 0x09,
00168                 0x09, 0x07, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
00169                 0x0e, 0x01, 0x01, 0x01, 0x01, 0x0e, 0x00, 0x00,
00170                 0x00, 0x08, 0x08, 0x08, 0x0e, 0x09, 0x09, 0x09,
00171                 0x09, 0x0e, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
00172                 0x06, 0x09, 0x09, 0x0f, 0x01, 0x0e, 0x00, 0x00,
00173                 0x00, 0x04, 0x02, 0x02, 0x07, 0x02, 0x02, 0x02,
00174                 0x02, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
00175                 0x0e, 0x09, 0x09, 0x09, 0x09, 0x0e, 0x08, 0x06,
00176                 0x00, 0x01, 0x01, 0x01, 0x07, 0x09, 0x09, 0x09,
00177                 0x09, 0x09, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00,
00178                 0x04, 0x04, 0x04, 0x04, 0x04, 0x0e, 0x00, 0x00,
00179                 0x00, 0x00, 0x04, 0x00, 0x04, 0x04, 0x04, 0x04,
00180                 0x04, 0x04, 0x05, 0x02, 0x00, 0x01, 0x01, 0x01,
00181                 0x09, 0x05, 0x03, 0x03, 0x05, 0x09, 0x00, 0x00,
00182                 0x00, 0x06, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04,
00183                 0x04, 0x0e, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
00184                 0x09, 0x0f, 0x09, 0x09, 0x09, 0x09, 0x00, 0x00,
00185                 0x00, 0x00, 0x00, 0x00, 0x05, 0x0b, 0x09, 0x09,
00186                 0x09, 0x09, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
00187                 0x06, 0x09, 0x09, 0x09, 0x09, 0x06, 0x00, 0x00,
00188                 0x00, 0x00, 0x00, 0x00, 0x07, 0x09, 0x09, 0x09,
00189                 0x09, 0x07, 0x01, 0x01, 0x00, 0x00, 0x00, 0x00,
00190                 0x0e, 0x09, 0x09, 0x09, 0x09, 0x0e, 0x08, 0x08,
00191                 0x00, 0x00, 0x00, 0x00, 0x0d, 0x0a, 0x02, 0x02,
00192                 0x02, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
00193                 0x06, 0x09, 0x02, 0x04, 0x09, 0x06, 0x00, 0x00,
00194                 0x00, 0x00, 0x02, 0x02, 0x07, 0x02, 0x02, 0x02,
00195                 0x02, 0x06, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
00196                 0x09, 0x09, 0x09, 0x09, 0x09, 0x0e, 0x00, 0x00,
00197                 0x00, 0x00, 0x00, 0x00, 0x09, 0x09, 0x0a, 0x0a,
00198                 0x04, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
00199                 0x09, 0x09, 0x09, 0x09, 0x0f, 0x09, 0x00, 0x00,
00200                 0x00, 0x00, 0x00, 0x00, 0x09, 0x09, 0x06, 0x06,
00201                 0x09, 0x09, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
00202                 0x09, 0x09, 0x09, 0x09, 0x09, 0x0e, 0x08, 0x07,
00203                 0x00, 0x00, 0x00, 0x00, 0x0f, 0x08, 0x04, 0x02,
00204                 0x01, 0x0f, 0x00, 0x00, 0x00, 0x04, 0x02, 0x02,
00205                 0x02, 0x01, 0x02, 0x02, 0x02, 0x04, 0x00, 0x00,
00206                 0x04, 0x04, 0x04, 0x04, 0x00, 0x04, 0x04, 0x04,
00207                 0x04, 0x04, 0x00, 0x00, 0x00, 0x02, 0x04, 0x04,
00208                 0x04, 0x08, 0x04, 0x04, 0x04, 0x02, 0x00, 0x00,
00209                 0x00, 0x0a, 0x05, 0x00, 0x00, 0x00, 0x00, 0x00,
00210                 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x04, 0x0a,
00211                 0x0a, 0x11, 0x11, 0x11, 0x11, 0x1f, 0x00, 0x00,
00212                 0x00, 0x0e, 0x09, 0x09, 0x09, 0x0f, 0x09, 0x09,
00213                 0x09, 0x09, 0x00, 0x00, 0x00, 0x0f, 0x01, 0x01,
00214                 0x01, 0x07, 0x09, 0x09, 0x09, 0x07, 0x00, 0x00,
00215                 0x00, 0x07, 0x09, 0x09, 0x09, 0x07, 0x09, 0x09,
00216                 0x09, 0x07, 0x00, 0x00, 0x00, 0x0f, 0x01, 0x01,
00217                 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x00, 0x00,
00218                 0x00, 0x0c, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a,
00219                 0x0a, 0x1f, 0x11, 0x00, 0x00, 0x0f, 0x01, 0x01,
00220                 0x01, 0x0f, 0x01, 0x01, 0x01, 0x0f, 0x00, 0x00,
00221                 0x00, 0x15, 0x15, 0x15, 0x15, 0x0e, 0x15, 0x15,
00222                 0x15, 0x15, 0x00, 0x00, 0x00, 0x06, 0x09, 0x08,
00223                 0x08, 0x06, 0x08, 0x08, 0x09, 0x06, 0x00, 0x00,
00224                 0x00, 0x09, 0x09, 0x09, 0x0d, 0x0d, 0x0b, 0x0b,
00225                 0x09, 0x09, 0x00, 0x00, 0x06, 0x09, 0x09, 0x09,
00226                 0x0d, 0x0d, 0x0b, 0x0b, 0x09, 0x09, 0x00, 0x00,
00227                 0x00, 0x09, 0x09, 0x05, 0x05, 0x03, 0x05, 0x05,
00228                 0x09, 0x09, 0x00, 0x00, 0x00, 0x0e, 0x09, 0x09,
00229                 0x09, 0x09, 0x09, 0x09, 0x09, 0x09, 0x00, 0x00,
00230                 0x00, 0x09, 0x09, 0x0f, 0x0f, 0x09, 0x09, 0x09,
00231                 0x09, 0x09, 0x00, 0x00, 0x00, 0x09, 0x09, 0x09,
00232                 0x09, 0x0f, 0x09, 0x09, 0x09, 0x09, 0x00, 0x00,
00233                 0x00, 0x06, 0x09, 0x09, 0x09, 0x09, 0x09, 0x09,
00234                 0x09, 0x06, 0x00, 0x00, 0x00, 0x0f, 0x09, 0x09,
00235                 0x09, 0x09, 0x09, 0x09, 0x09, 0x09, 0x00, 0x00,
00236                 0x00, 0x07, 0x09, 0x09, 0x09, 0x07, 0x01, 0x01,
00237                 0x01, 0x01, 0x00, 0x00, 0x00, 0x06, 0x09, 0x09,
00238                 0x01, 0x01, 0x01, 0x01, 0x09, 0x06, 0x00, 0x00,
00239                 0x00, 0x1f, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04,
00240                 0x04, 0x04, 0x00, 0x00, 0x00, 0x09, 0x09, 0x09,
00241                 0x09, 0x0e, 0x08, 0x08, 0x09, 0x06, 0x00, 0x00,
00242                 0x00, 0x04, 0x0e, 0x15, 0x15, 0x15, 0x15, 0x0e,
00243                 0x04, 0x04, 0x00, 0x00, 0x00, 0x09, 0x09, 0x09,
00244                 0x06, 0x06, 0x06, 0x09, 0x09, 0x09, 0x00, 0x00,
00245                 0x00, 0x09, 0x09, 0x09, 0x09, 0x09, 0x09, 0x09,
00246                 0x09, 0x1f, 0x10, 0x10, 0x00, 0x09, 0x09, 0x09,
00247                 0x09, 0x0e, 0x08, 0x08, 0x08, 0x08, 0x00, 0x00,
00248                 0x00, 0x15, 0x15, 0x15, 0x15, 0x15, 0x15, 0x15,
00249                 0x15, 0x1f, 0x00, 0x00, 0x00, 0x15, 0x15, 0x15,
00250                 0x15, 0x15, 0x15, 0x15, 0x15, 0x1f, 0x10, 0x10,
00251                 0x00, 0x03, 0x03, 0x02, 0x02, 0x0e, 0x12, 0x12,
00252                 0x12, 0x0e, 0x00, 0x00, 0x00, 0x09, 0x09, 0x09,
00253                 0x09, 0x0b, 0x0d, 0x0d, 0x0d, 0x0b, 0x00, 0x00,
00254                 0x00, 0x01, 0x01, 0x01, 0x01, 0x07, 0x09, 0x09,
00255                 0x09, 0x07, 0x00, 0x00, 0x00, 0x06, 0x09, 0x08,
00256                 0x08, 0x0e, 0x08, 0x08, 0x09, 0x06, 0x00, 0x00,
00257                 0x00, 0x09, 0x15, 0x15, 0x15, 0x17, 0x15, 0x15,
00258                 0x15, 0x09, 0x00, 0x00, 0x00, 0x0e, 0x09, 0x09,
00259                 0x09, 0x0e, 0x0c, 0x0a, 0x09, 0x09, 0x00, 0x00,
00260                 0x00, 0x00, 0x00, 0x00, 0x06, 0x08, 0x0e, 0x09,
00261                 0x09, 0x0e, 0x00, 0x00, 0x00, 0x00, 0x08, 0x06,
00262                 0x01, 0x07, 0x09, 0x09, 0x09, 0x06, 0x00, 0x00,
00263                 0x00, 0x00, 0x00, 0x00, 0x07, 0x09, 0x07, 0x09,
00264                 0x09, 0x07, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
00265                 0x0f, 0x01, 0x01, 0x01, 0x01, 0x01, 0x00, 0x00,
00266                 0x00, 0x00, 0x00, 0x00, 0x0c, 0x0a, 0x0a, 0x0a,
00267                 0x0a, 0x1f, 0x11, 0x00, 0x00, 0x00, 0x00, 0x00,
00268                 0x06, 0x09, 0x09, 0x0f, 0x01, 0x0e, 0x00, 0x00,
00269                 0x00, 0x00, 0x00, 0x00, 0x15, 0x15, 0x0e, 0x15,
00270                 0x15, 0x15, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
00271                 0x06, 0x09, 0x04, 0x08, 0x09, 0x06, 0x00, 0x00,
00272                 0x00, 0x00, 0x00, 0x00, 0x09, 0x09, 0x0d, 0x0b,
00273                 0x09, 0x09, 0x00, 0x00, 0x00, 0x00, 0x04, 0x02,
00274                 0x09, 0x09, 0x0d, 0x0b, 0x09, 0x09, 0x00, 0x00,
00275                 0x00, 0x00, 0x00, 0x00, 0x09, 0x05, 0x03, 0x03,
00276                 0x05, 0x09, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
00277                 0x0e, 0x09, 0x09, 0x09, 0x09, 0x09, 0x00, 0x00,
00278                 0x00, 0x00, 0x00, 0x00, 0x09, 0x0f, 0x09, 0x09,
00279                 0x09, 0x09, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
00280                 0x09, 0x09, 0x0f, 0x09, 0x09, 0x09, 0x00, 0x00,
00281                 0x00, 0x00, 0x00, 0x00, 0x06, 0x09, 0x09, 0x09,
00282                 0x09, 0x06, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
00283                 0x0f, 0x09, 0x09, 0x09, 0x09, 0x09, 0x00, 0x00,
00284                 0x00, 0x00, 0x15, 0x00, 0x00, 0x0a, 0x00, 0x00,
00285                 0x15, 0x00, 0x00, 0x0a, 0x00, 0x0a, 0x00, 0x15,
00286                 0x00, 0x0a, 0x00, 0x15, 0x00, 0x0a, 0x00, 0x15,
00287                 0x0a, 0x15, 0x0a, 0x15, 0x0a, 0x15, 0x0a, 0x15,
00288                 0x0a, 0x15, 0x0a, 0x15, 0x04, 0x04, 0x04, 0x04,
00289                 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04,
00290                 0x04, 0x04, 0x04, 0x04, 0x04, 0x07, 0x04, 0x04,
00291                 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04,
00292                 0x07, 0x04, 0x07, 0x04, 0x04, 0x04, 0x04, 0x04,
00293                 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0b, 0x0a, 0x0a,
00294                 0x0a, 0x0a, 0x0a, 0x0a, 0x00, 0x00, 0x00, 0x00,
00295                 0x00, 0x0f, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a,
00296                 0x00, 0x00, 0x00, 0x00, 0x07, 0x04, 0x07, 0x04,
00297                 0x04, 0x04, 0x04, 0x04, 0x0a, 0x0a, 0x0a, 0x0a,
00298                 0x0b, 0x08, 0x0b, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a,
00299                 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a,
00300                 0x0a, 0x0a, 0x0a, 0x0a, 0x00, 0x00, 0x00, 0x00,
00301                 0x0f, 0x08, 0x0b, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a,
00302                 0x0a, 0x0a, 0x0a, 0x0a, 0x0b, 0x08, 0x0f, 0x00,
00303                 0x00, 0x00, 0x00, 0x00, 0x0a, 0x0a, 0x0a, 0x0a,
00304                 0x0a, 0x0f, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
00305                 0x04, 0x04, 0x04, 0x04, 0x07, 0x04, 0x07, 0x00,
00306                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
00307                 0x00, 0x07, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04,
00308                 0x04, 0x04, 0x04, 0x04, 0x04, 0x1c, 0x00, 0x00,
00309                 0x00, 0x00, 0x00, 0x00, 0x04, 0x04, 0x04, 0x04,
00310                 0x04, 0x1f, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
00311                 0x00, 0x00, 0x00, 0x00, 0x00, 0x1f, 0x04, 0x04,
00312                 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04,
00313                 0x04, 0x1c, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04,
00314                 0x00, 0x00, 0x00, 0x00, 0x00, 0x1f, 0x00, 0x00,
00315                 0x00, 0x00, 0x00, 0x00, 0x04, 0x04, 0x04, 0x04,
00316                 0x04, 0x1f, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04,
00317                 0x04, 0x04, 0x04, 0x04, 0x1c, 0x04, 0x1c, 0x04,
00318                 0x04, 0x04, 0x04, 0x04, 0x0a, 0x0a, 0x0a, 0x0a,
00319                 0x0a, 0x1a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a,
00320                 0x0a, 0x0a, 0x0a, 0x0a, 0x1a, 0x02, 0x1e, 0x00,
00321                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
00322                 0x1e, 0x02, 0x1a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a,
00323                 0x0a, 0x0a, 0x0a, 0x0a, 0x1b, 0x00, 0x1f, 0x00,
00324                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
00325                 0x1f, 0x00, 0x1b, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a,
00326                 0x0a, 0x0a, 0x0a, 0x0a, 0x1a, 0x02, 0x1a, 0x0a,
00327                 0x0a, 0x0a, 0x0a, 0x0a, 0x00, 0x00, 0x00, 0x00,
00328                 0x1f, 0x00, 0x1f, 0x00, 0x00, 0x00, 0x00, 0x00,
00329                 0x0a, 0x0a, 0x0a, 0x0a, 0x1b, 0x00, 0x1b, 0x0a,
00330                 0x0a, 0x0a, 0x0a, 0x0a, 0x04, 0x04, 0x04, 0x04,
00331                 0x1f, 0x00, 0x1f, 0x00, 0x00, 0x00, 0x00, 0x00,
00332                 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x1f, 0x00, 0x00,
00333                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
00334                 0x1f, 0x00, 0x1f, 0x04, 0x04, 0x04, 0x04, 0x04,
00335                 0x00, 0x00, 0x00, 0x00, 0x00, 0x1f, 0x0a, 0x0a,
00336                 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a,
00337                 0x0a, 0x1e, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
00338                 0x04, 0x04, 0x04, 0x04, 0x1c, 0x04, 0x1c, 0x00,
00339                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
00340                 0x1c, 0x04, 0x1c, 0x04, 0x04, 0x04, 0x04, 0x04,
00341                 0x00, 0x00, 0x00, 0x00, 0x00, 0x1e, 0x0a, 0x0a,
00342                 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a,
00343                 0x0a, 0x1b, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a,
00344                 0x04, 0x04, 0x04, 0x04, 0x1f, 0x00, 0x1f, 0x04,
00345                 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04,
00346                 0x04, 0x07, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
00347                 0x00, 0x00, 0x00, 0x00, 0x00, 0x1c, 0x04, 0x04,
00348                 0x04, 0x04, 0x04, 0x04, 0x1f, 0x1f, 0x1f, 0x1f,
00349                 0x1f, 0x1f, 0x1f, 0x1f, 0x1f, 0x1f, 0x1f, 0x1f,
00350                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x1f, 0x1f,
00351                 0x1f, 0x1f, 0x1f, 0x1f, 0x07, 0x07, 0x07, 0x07,
00352                 0x07, 0x07, 0x07, 0x07, 0x07, 0x07, 0x07, 0x07,
00353                 0x1c, 0x1c, 0x1c, 0x1c, 0x1c, 0x1c, 0x1c, 0x1c,
00354                 0x1c, 0x1c, 0x1c, 0x1c, 0x1f, 0x1f, 0x1f, 0x1f,
00355                 0x1f, 0x1f, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
00356                 0x00, 0x00, 0x00, 0x00, 0x07, 0x09, 0x09, 0x09,
00357                 0x09, 0x07, 0x01, 0x01, 0x00, 0x00, 0x00, 0x00,
00358                 0x0e, 0x01, 0x01, 0x01, 0x01, 0x0e, 0x00, 0x00,
00359                 0x00, 0x00, 0x00, 0x00, 0x1f, 0x04, 0x04, 0x04,
00360                 0x04, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
00361                 0x09, 0x09, 0x09, 0x09, 0x09, 0x0e, 0x08, 0x07,
00362                 0x00, 0x00, 0x00, 0x00, 0x04, 0x0e, 0x15, 0x15,
00363                 0x15, 0x0e, 0x04, 0x04, 0x00, 0x00, 0x00, 0x00,
00364                 0x09, 0x09, 0x06, 0x06, 0x09, 0x09, 0x00, 0x00,
00365                 0x00, 0x00, 0x00, 0x00, 0x09, 0x09, 0x09, 0x09,
00366                 0x09, 0x1f, 0x10, 0x10, 0x00, 0x00, 0x00, 0x00,
00367                 0x09, 0x09, 0x09, 0x0e, 0x08, 0x08, 0x00, 0x00,
00368                 0x00, 0x00, 0x00, 0x00, 0x15, 0x15, 0x15, 0x15,
00369                 0x15, 0x1f, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
00370                 0x15, 0x15, 0x15, 0x15, 0x15, 0x1f, 0x10, 0x10,
00371                 0x00, 0x00, 0x00, 0x00, 0x03, 0x02, 0x06, 0x0a,
00372                 0x0a, 0x06, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
00373                 0x09, 0x09, 0x0b, 0x0d, 0x0d, 0x0b, 0x00, 0x00,
00374                 0x00, 0x00, 0x00, 0x00, 0x01, 0x01, 0x07, 0x09,
00375                 0x09, 0x07, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
00376                 0x07, 0x08, 0x0e, 0x08, 0x08, 0x07, 0x00, 0x00,
00377                 0x00, 0x00, 0x00, 0x00, 0x09, 0x15, 0x17, 0x15,
00378                 0x15, 0x09, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
00379                 0x0e, 0x09, 0x09, 0x0e, 0x09, 0x09, 0x00, 0x00,
00380                 0x09, 0x0f, 0x01, 0x01, 0x01, 0x0f, 0x01, 0x01,
00381                 0x01, 0x0f, 0x00, 0x00, 0x00, 0x0a, 0x0a, 0x00,
00382                 0x06, 0x09, 0x09, 0x0f, 0x01, 0x0e, 0x00, 0x00,
00383                 0x00, 0x06, 0x09, 0x01, 0x01, 0x07, 0x01, 0x01,
00384                 0x09, 0x06, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
00385                 0x0e, 0x01, 0x07, 0x01, 0x01, 0x0e, 0x00, 0x00,
00386                 0x11, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04,
00387                 0x04, 0x0e, 0x00, 0x00, 0x00, 0x0a, 0x0a, 0x00,
00388                 0x06, 0x04, 0x04, 0x04, 0x04, 0x0e, 0x00, 0x00,
00389                 0x06, 0x09, 0x09, 0x09, 0x09, 0x0e, 0x08, 0x08,
00390                 0x09, 0x06, 0x00, 0x00, 0x00, 0x00, 0x09, 0x06,
00391                 0x09, 0x09, 0x09, 0x09, 0x09, 0x0e, 0x08, 0x07,
00392                 0x06, 0x09, 0x09, 0x06, 0x00, 0x00, 0x00, 0x00,
00393                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
00394                 0x04, 0x0e, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00,
00395                 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x04, 0x00,
00396                 0x00, 0x00, 0x00, 0x00, 0x00, 0x1c, 0x04, 0x04,
00397                 0x04, 0x04, 0x05, 0x05, 0x06, 0x04, 0x00, 0x00,
00398                 0x00, 0x1d, 0x1d, 0x05, 0x05, 0x1f, 0x07, 0x05,
00399                 0x05, 0x05, 0x00, 0x00, 0x00, 0x09, 0x06, 0x09,
00400                 0x09, 0x09, 0x09, 0x09, 0x06, 0x09, 0x00, 0x00,
00401                 0x00, 0x00, 0x00, 0x0e, 0x0e, 0x0e, 0x0e, 0x0e,
00402                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
00403                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
00404 };
00405
00406 FontType_t Terminal_9_12_6 =
00407 {
00408   6,
00409   12,
00410   0,
00411   255,
00412   (unsigned char*)TextStream,
00413   (unsigned char*)"Terminal 9 (12x6)"
00414 };
Generated on Tue Jun 7 14:59:02 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/UART/AutoBaud/lpc17xx_libcfg.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/UART/AutoBaud/lpc17xx_libcfg.h

Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          lpc17xx_libcfg.h                        2010-05-21
00003 */
00026 #ifndef LPC17XX_LIBCFG_H_
00027 #define LPC17XX_LIBCFG_H_
00028
00029 #include "lpc_types.h"
00030
00031
00032 /************************** DEBUG MODE DEFINITIONS *********************************/
00033 /* Un-comment the line below to compile the library in DEBUG mode, this will expanse
00034    the "CHECK_PARAM" macro in the FW library code */
00035
00036 #define DEBUG
00037
00038
00039 /******************* PERIPHERAL FW LIBRARY CONFIGURATION DEFINITIONS ***********************/
00040
00041 /* Comment the line below to disable the specific peripheral inclusion */
00042
00043 /* DEBUG_FRAMWORK ------------------------------ */
00044 //#define _DBGFWK
00045
00046 /* GPIO ------------------------------- */
00047 //#define _GPIO
00048
00049 /* EXTI ------------------------------- */
00050 //#define _EXTI
00051
00052 /* UART ------------------------------- */
00053 #define _UART
00054 #define _UART0
00055 //#define _UART1
00056 //#define _UART2
00057 //#define _UART3
00058
00059 /* SPI ------------------------------- */
00060 //#define _SPI
00061
00062 /* SSP ------------------------------- */
00063 //#define _SSP
00064 //#define _SSP0
00065 //#define _SSP1
00066
00067 /* SYSTICK --------------------------- */
00068 //#define _SYSTICK
00069
00070 /* I2C ------------------------------- */
00071 //#define _I2C
00072 //#define _I2C0
00073 //#define _I2C1
00074 //#define _I2C2
00075
00076 /* TIMER ------------------------------- */
00077 //#define _TIM
00078
00079 /* WDT ------------------------------- */
00080 //#define _WDT
00081
00082
00083 /* GPDMA ------------------------------- */
00084 //#define _GPDMA
00085
00086
00087 /* DAC ------------------------------- */
00088 //#define _DAC
00089
00090 /* DAC ------------------------------- */
00091 //#define _ADC
00092
00093
00094 /* PWM ------------------------------- */
00095 //#define _PWM
00096 //#define _PWM1
00097
00098 /* RTC ------------------------------- */
00099 //#define _RTC
00100
00101 /* I2S ------------------------------- */
00102 //#define _I2S
00103
00104 /* USB device ------------------------------- */
00105 //#define _USBDEV
00106 //#define _USB_DMA
00107
00108 /* QEI ------------------------------- */
00109 //#define _QEI
00110
00111 /* MCPWM ------------------------------- */
00112 //#define _MCPWM
00113
00114 /* CAN--------------------------------*/
00115 //#define _CAN
00116
00117 /* RIT ------------------------------- */
00118 //#define _RIT
00119
00120 /* EMAC ------------------------------ */
00121 //#define _EMAC
00122
00123
00124 /************************** GLOBAL/PUBLIC MACRO DEFINITIONS *********************************/
00125
00126 #ifdef  DEBUG
00127 /*******************************************************************************
00128 * @brief                The CHECK_PARAM macro is used for function's parameters check.
00129 *                               It is used only if the library is compiled in DEBUG mode.
00130 * @param[in]    expr - If expr is false, it calls check_failed() function
00131 *                       which reports the name of the source file and the source
00132 *                       line number of the call that failed.
00133 *                    - If expr is true, it returns no value.
00134 * @return               None
00135 *******************************************************************************/
00136 #define CHECK_PARAM(expr) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))
00137 #else
00138 #define CHECK_PARAM(expr)
00139 #endif /* DEBUG */
00140
00141
00142
00143 /************************** GLOBAL/PUBLIC FUNCTION DECLARATION *********************************/
00144
00145 #ifdef  DEBUG
00146 void check_failed(uint8_t *file, uint32_t line);
00147 #endif
00148
00149
00150 #endif /* LPC17XX_LIBCFG_H_ */
Generated on Tue Jun 7 14:58:58 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/UART/DMA/lpc17xx_libcfg.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/UART/DMA/lpc17xx_libcfg.h

Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          lpc17xx_libcfg.h                        2010-05-21
00003 */
00026 #ifndef LPC17XX_LIBCFG_H_
00027 #define LPC17XX_LIBCFG_H_
00028
00029 #include "lpc_types.h"
00030
00031
00032 /************************** DEBUG MODE DEFINITIONS *********************************/
00033 /* Un-comment the line below to compile the library in DEBUG mode, this will expanse
00034    the "CHECK_PARAM" macro in the FW library code */
00035
00036 #define DEBUG
00037
00038
00039 /******************* PERIPHERAL FW LIBRARY CONFIGURATION DEFINITIONS ***********************/
00040
00041 /* Comment the line below to disable the specific peripheral inclusion */
00042
00043 /* DEBUG_FRAMWORK ------------------------------ */
00044 #define _DBGFWK
00045
00046 /* GPIO ------------------------------- */
00047 //#define _GPIO
00048
00049 /* EXTI ------------------------------- */
00050 //#define _EXTI
00051
00052 /* UART ------------------------------- */
00053 #define _UART
00054 #define _UART0
00055 //#define _UART1
00056 //#define _UART2
00057 //#define _UART3
00058
00059 /* SPI ------------------------------- */
00060 //#define _SPI
00061
00062 /* SSP ------------------------------- */
00063 //#define _SSP
00064 //#define _SSP0
00065 //#define _SSP1
00066
00067 /* SYSTICK --------------------------- */
00068 //#define _SYSTICK
00069
00070 /* I2C ------------------------------- */
00071 //#define _I2C
00072 //#define _I2C0
00073 //#define _I2C1
00074 //#define _I2C2
00075
00076 /* TIMER ------------------------------- */
00077 //#define _TIM
00078
00079 /* WDT ------------------------------- */
00080 //#define _WDT
00081
00082
00083 /* GPDMA ------------------------------- */
00084 //#define _GPDMA
00085
00086
00087 /* DAC ------------------------------- */
00088 //#define _DAC
00089
00090 /* DAC ------------------------------- */
00091 //#define _ADC
00092
00093
00094 /* PWM ------------------------------- */
00095 //#define _PWM
00096 //#define _PWM1
00097
00098 /* RTC ------------------------------- */
00099 //#define _RTC
00100
00101 /* I2S ------------------------------- */
00102 //#define _I2S
00103
00104 /* USB device ------------------------------- */
00105 //#define _USBDEV
00106 //#define _USB_DMA
00107
00108 /* QEI ------------------------------- */
00109 //#define _QEI
00110
00111 /* MCPWM ------------------------------- */
00112 //#define _MCPWM
00113
00114 /* CAN--------------------------------*/
00115 //#define _CAN
00116
00117 /* RIT ------------------------------- */
00118 //#define _RIT
00119
00120 /* EMAC ------------------------------ */
00121 //#define _EMAC
00122
00123
00124 /* GPDMA ------------------------------- */
00125 #define _GPDMA
00126
00127
00128 /************************** GLOBAL/PUBLIC MACRO DEFINITIONS *********************************/
00129
00130 #ifdef  DEBUG
00131 /*******************************************************************************
00132 * @brief                The CHECK_PARAM macro is used for function's parameters check.
00133 *                               It is used only if the library is compiled in DEBUG mode.
00134 * @param[in]    expr - If expr is false, it calls check_failed() function
00135 *                       which reports the name of the source file and the source
00136 *                       line number of the call that failed.
00137 *                    - If expr is true, it returns no value.
00138 * @return               None
00139 *******************************************************************************/
00140 #define CHECK_PARAM(expr) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))
00141 #else
00142 #define CHECK_PARAM(expr)
00143 #endif /* DEBUG */
00144
00145
00146
00147 /************************** GLOBAL/PUBLIC FUNCTION DECLARATION *********************************/
00148
00149 #ifdef  DEBUG
00150 void check_failed(uint8_t *file, uint32_t line);
00151 #endif
00152
00153
00154 #endif /* LPC17XX_LIBCFG_H_ */
Generated on Tue Jun 7 14:58:58 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/UART/HWFlowControl/lpc17xx_libcfg.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/UART/HWFlowControl/lpc17xx_libcfg.h

Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          lpc17xx_libcfg.h                        2010-05-21
00003 */
00025 #ifndef LPC17XX_LIBCFG_H_
00026 #define LPC17XX_LIBCFG_H_
00027
00028 #include "lpc_types.h"
00029
00030
00031 /************************** DEBUG MODE DEFINITIONS *********************************/
00032 /* Un-comment the line below to compile the library in DEBUG mode, this will expanse
00033    the "CHECK_PARAM" macro in the FW library code */
00034
00035 #define DEBUG
00036
00037
00038 /******************* PERIPHERAL FW LIBRARY CONFIGURATION DEFINITIONS ***********************/
00039 /* Comment the line below to disable the specific peripheral inclusion */
00040
00041 /* GPIO ------------------------------- */
00042 //#define _GPIO
00043
00044 /* EXTI ------------------------------- */
00045 //#define _EXTI
00046
00047 /* UART ------------------------------- */
00048 #define _UART
00049 #define _UART0
00050 #define _UART1
00051 #define _UART2
00052 #define _UART3
00053
00054 /* SPI ------------------------------- */
00055 //#define _SPI
00056
00057 /* SSP ------------------------------- */
00058 //#define _SSP
00059 //#define _SSP0
00060 //#define _SSP1
00061
00062 /* SYSTICK --------------------------- */
00063 //#define _SYSTICK
00064
00065 /* I2C ------------------------------- */
00066 //#define _I2C
00067 //#define _I2C0
00068 //#define _I2C1
00069 //#define _I2C2
00070
00071 /* TIMER ------------------------------- */
00072 //#define _TIM
00073
00074 /* WDT ------------------------------- */
00075 //#define _WDT
00076
00077
00078 /* GPDMA ------------------------------- */
00079 //#define _GPDMA
00080
00081
00082 /* DAC ------------------------------- */
00083 //#define _DAC
00084
00085 /* DAC ------------------------------- */
00086 //#define _ADC
00087
00088
00089 /* PWM ------------------------------- */
00090 //#define _PWM
00091 //#define _PWM1
00092
00093 /* RTC ------------------------------- */
00094 //#define _RTC
00095
00096 /* I2S ------------------------------- */
00097 //#define _I2S
00098
00099 /* USB device ------------------------------- */
00100 //#define _USBDEV
00101 //#define _USB_DMA
00102
00103 /* QEI ------------------------------- */
00104 //#define _QEI
00105
00106 /* MCPWM ------------------------------- */
00107 //#define _MCPWM
00108
00109 /* CAN--------------------------------*/
00110 //#define _CAN
00111
00112 /* RIT ------------------------------- */
00113 //#define _RIT
00114
00115 /* EMAC ------------------------------ */
00116 //#define _EMAC
00117
00118
00119
00120 /************************** GLOBAL/PUBLIC MACRO DEFINITIONS *********************************/
00121
00122 #ifdef  DEBUG
00123 /*******************************************************************************
00124 * @brief                The CHECK_PARAM macro is used for function's parameters check.
00125 *                               It is used only if the library is compiled in DEBUG mode.
00126 * @param[in]    expr - If expr is false, it calls check_failed() function
00127 *                       which reports the name of the source file and the source
00128 *                       line number of the call that failed.
00129 *                    - If expr is true, it returns no value.
00130 * @return               None
00131 *******************************************************************************/
00132 #define CHECK_PARAM(expr) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))
00133 #else
00134 #define CHECK_PARAM(expr)
00135 #endif /* DEBUG */
00136
00137
00138
00139 /************************** GLOBAL/PUBLIC FUNCTION DECLARATION *********************************/
00140
00141 #ifdef  DEBUG
00142 void check_failed(uint8_t *file, uint32_t line);
00143 #endif
00144
00145
00146 #endif /* LPC17XX_LIBCFG_H_ */
Generated on Tue Jun 7 14:58:58 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/UART/Interrupt/lpc17xx_libcfg.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/UART/Interrupt/lpc17xx_libcfg.h

Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          lpc17xx_libcfg.h                        2010-05-21
00003 */
00026 #ifndef LPC17XX_LIBCFG_H_
00027 #define LPC17XX_LIBCFG_H_
00028
00029 #include "lpc_types.h"
00030
00031
00032 /************************** DEBUG MODE DEFINITIONS *********************************/
00033 /* Un-comment the line below to compile the library in DEBUG mode, this will expanse
00034    the "CHECK_PARAM" macro in the FW library code */
00035
00036 #define DEBUG
00037
00038
00039 /******************* PERIPHERAL FW LIBRARY CONFIGURATION DEFINITIONS ***********************/
00040
00041 /* Comment the line below to disable the specific peripheral inclusion */
00042
00043 /* DEBUG_FRAMWORK ------------------------------ */
00044 //#define _DBGFWK
00045
00046 /* GPIO ------------------------------- */
00047 //#define _GPIO
00048
00049 /* EXTI ------------------------------- */
00050 //#define _EXTI
00051
00052 /* UART ------------------------------- */
00053 #define _UART
00054 #define _UART0
00055 //#define _UART1
00056 //#define _UART2
00057 //#define _UART3
00058
00059 /* SPI ------------------------------- */
00060 //#define _SPI
00061
00062 /* SSP ------------------------------- */
00063 //#define _SSP
00064 //#define _SSP0
00065 //#define _SSP1
00066
00067 /* SYSTICK --------------------------- */
00068 //#define _SYSTICK
00069
00070 /* I2C ------------------------------- */
00071 //#define _I2C
00072 //#define _I2C0
00073 //#define _I2C1
00074 //#define _I2C2
00075
00076 /* TIMER ------------------------------- */
00077 //#define _TIM
00078
00079 /* WDT ------------------------------- */
00080 //#define _WDT
00081
00082
00083 /* GPDMA ------------------------------- */
00084 //#define _GPDMA
00085
00086
00087 /* DAC ------------------------------- */
00088 //#define _DAC
00089
00090 /* DAC ------------------------------- */
00091 //#define _ADC
00092
00093
00094 /* PWM ------------------------------- */
00095 //#define _PWM
00096 //#define _PWM1
00097
00098 /* RTC ------------------------------- */
00099 //#define _RTC
00100
00101 /* I2S ------------------------------- */
00102 //#define _I2S
00103
00104 /* USB device ------------------------------- */
00105 //#define _USBDEV
00106 //#define _USB_DMA
00107
00108 /* QEI ------------------------------- */
00109 //#define _QEI
00110
00111 /* MCPWM ------------------------------- */
00112 //#define _MCPWM
00113
00114 /* CAN--------------------------------*/
00115 //#define _CAN
00116
00117 /* RIT ------------------------------- */
00118 //#define _RIT
00119
00120 /* EMAC ------------------------------ */
00121 //#define _EMAC
00122
00123
00124 /************************** GLOBAL/PUBLIC MACRO DEFINITIONS *********************************/
00125
00126 #ifdef  DEBUG
00127 /*******************************************************************************
00128 * @brief                The CHECK_PARAM macro is used for function's parameters check.
00129 *                               It is used only if the library is compiled in DEBUG mode.
00130 * @param[in]    expr - If expr is false, it calls check_failed() function
00131 *                       which reports the name of the source file and the source
00132 *                       line number of the call that failed.
00133 *                    - If expr is true, it returns no value.
00134 * @return               None
00135 *******************************************************************************/
00136 #define CHECK_PARAM(expr) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))
00137 #else
00138 #define CHECK_PARAM(expr)
00139 #endif /* DEBUG */
00140
00141
00142
00143 /************************** GLOBAL/PUBLIC FUNCTION DECLARATION *********************************/
00144
00145 #ifdef  DEBUG
00146 void check_failed(uint8_t *file, uint32_t line);
00147 #endif
00148
00149
00150 #endif /* LPC17XX_LIBCFG_H_ */
Generated on Tue Jun 7 14:58:58 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/UART/IrDA/Receive/lpc17xx_libcfg.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/UART/IrDA/Receive/lpc17xx_libcfg.h

Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          lpc17xx_libcfg.h                        2010-05-21
00003 */
00025 #ifndef LPC17XX_LIBCFG_H_
00026 #define LPC17XX_LIBCFG_H_
00027
00028 #include "lpc_types.h"
00029
00030
00031 /************************** DEBUG MODE DEFINITIONS *********************************/
00032 /* Un-comment the line below to compile the library in DEBUG mode, this will expanse
00033    the "CHECK_PARAM" macro in the FW library code */
00034
00035 #define DEBUG
00036
00037
00038 /******************* PERIPHERAL FW LIBRARY CONFIGURATION DEFINITIONS ***********************/
00039 /* Comment the line below to disable the specific peripheral inclusion */
00040
00041 /* GPIO ------------------------------- */
00042 #define _GPIO
00043
00044 /* EXTI ------------------------------- */
00045 //#define _EXTI
00046
00047 /* UART ------------------------------- */
00048 #define _UART
00049 #define _UART0
00050 #define _UART1
00051 #define _UART2
00052 #define _UART3
00053
00054 /* SPI ------------------------------- */
00055 //#define _SPI
00056
00057 /* SSP ------------------------------- */
00058 //#define _SSP
00059 //#define _SSP0
00060 //#define _SSP1
00061
00062 /* SYSTICK --------------------------- */
00063 //#define _SYSTICK
00064
00065 /* I2C ------------------------------- */
00066 //#define _I2C
00067 //#define _I2C0
00068 //#define _I2C1
00069 //#define _I2C2
00070
00071 /* TIMER ------------------------------- */
00072 //#define _TIM
00073
00074 /* WDT ------------------------------- */
00075 //#define _WDT
00076
00077
00078 /* GPDMA ------------------------------- */
00079 //#define _GPDMA
00080
00081
00082 /* DAC ------------------------------- */
00083 //#define _DAC
00084
00085 /* DAC ------------------------------- */
00086 //#define _ADC
00087
00088
00089 /* PWM ------------------------------- */
00090 //#define _PWM
00091 //#define _PWM1
00092
00093 /* RTC ------------------------------- */
00094 //#define _RTC
00095
00096 /* I2S ------------------------------- */
00097 //#define _I2S
00098
00099 /* USB device ------------------------------- */
00100 //#define _USBDEV
00101 //#define _USB_DMA
00102
00103 /* QEI ------------------------------- */
00104 //#define _QEI
00105
00106 /* MCPWM ------------------------------- */
00107 //#define _MCPWM
00108
00109 /* CAN--------------------------------*/
00110 //#define _CAN
00111
00112 /* RIT ------------------------------- */
00113 //#define _RIT
00114
00115 /* EMAC ------------------------------ */
00116 //#define _EMAC
00117
00118
00119
00120 /************************** GLOBAL/PUBLIC MACRO DEFINITIONS *********************************/
00121
00122 #ifdef  DEBUG
00123 /*******************************************************************************
00124 * @brief                The CHECK_PARAM macro is used for function's parameters check.
00125 *                               It is used only if the library is compiled in DEBUG mode.
00126 * @param[in]    expr - If expr is false, it calls check_failed() function
00127 *                       which reports the name of the source file and the source
00128 *                       line number of the call that failed.
00129 *                    - If expr is true, it returns no value.
00130 * @return               None
00131 *******************************************************************************/
00132 #define CHECK_PARAM(expr) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))
00133 #else
00134 #define CHECK_PARAM(expr)
00135 #endif /* DEBUG */
00136
00137
00138
00139 /************************** GLOBAL/PUBLIC FUNCTION DECLARATION *********************************/
00140
00141 #ifdef  DEBUG
00142 void check_failed(uint8_t *file, uint32_t line);
00143 #endif
00144
00145
00146 #endif /* LPC17XX_LIBCFG_H_ */
Generated on Tue Jun 7 14:58:58 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/UART/IrDA/Transmit/lpc17xx_libcfg.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/UART/IrDA/Transmit/lpc17xx_libcfg.h

Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          lpc17xx_libcfg.h                        2010-05-21
00003 */
00025 #ifndef LPC17XX_LIBCFG_H_
00026 #define LPC17XX_LIBCFG_H_
00027
00028 #include "lpc_types.h"
00029
00030
00031 /************************** DEBUG MODE DEFINITIONS *********************************/
00032 /* Un-comment the line below to compile the library in DEBUG mode, this will expanse
00033    the "CHECK_PARAM" macro in the FW library code */
00034
00035 #define DEBUG
00036
00037
00038 /******************* PERIPHERAL FW LIBRARY CONFIGURATION DEFINITIONS ***********************/
00039 /* Comment the line below to disable the specific peripheral inclusion */
00040
00041 /* GPIO ------------------------------- */
00042 //#define _GPIO
00043
00044 /* EXTI ------------------------------- */
00045 //#define _EXTI
00046
00047 /* UART ------------------------------- */
00048 #define _UART
00049 #define _UART0
00050 #define _UART1
00051 #define _UART2
00052 #define _UART3
00053
00054 /* SPI ------------------------------- */
00055 //#define _SPI
00056
00057 /* SSP ------------------------------- */
00058 //#define _SSP
00059 //#define _SSP0
00060 //#define _SSP1
00061
00062 /* SYSTICK --------------------------- */
00063 //#define _SYSTICK
00064
00065 /* I2C ------------------------------- */
00066 //#define _I2C
00067 //#define _I2C0
00068 //#define _I2C1
00069 //#define _I2C2
00070
00071 /* TIMER ------------------------------- */
00072 //#define _TIM
00073
00074 /* WDT ------------------------------- */
00075 //#define _WDT
00076
00077
00078 /* GPDMA ------------------------------- */
00079 //#define _GPDMA
00080
00081
00082 /* DAC ------------------------------- */
00083 //#define _DAC
00084
00085 /* DAC ------------------------------- */
00086 //#define _ADC
00087
00088
00089 /* PWM ------------------------------- */
00090 //#define _PWM
00091 //#define _PWM1
00092
00093 /* RTC ------------------------------- */
00094 //#define _RTC
00095
00096 /* I2S ------------------------------- */
00097 //#define _I2S
00098
00099 /* USB device ------------------------------- */
00100 //#define _USBDEV
00101 //#define _USB_DMA
00102
00103 /* QEI ------------------------------- */
00104 //#define _QEI
00105
00106 /* MCPWM ------------------------------- */
00107 //#define _MCPWM
00108
00109 /* CAN--------------------------------*/
00110 //#define _CAN
00111
00112 /* RIT ------------------------------- */
00113 //#define _RIT
00114
00115 /* EMAC ------------------------------ */
00116 //#define _EMAC
00117
00118
00119
00120 /************************** GLOBAL/PUBLIC MACRO DEFINITIONS *********************************/
00121
00122 #ifdef  DEBUG
00123 /*******************************************************************************
00124 * @brief                The CHECK_PARAM macro is used for function's parameters check.
00125 *                               It is used only if the library is compiled in DEBUG mode.
00126 * @param[in]    expr - If expr is false, it calls check_failed() function
00127 *                       which reports the name of the source file and the source
00128 *                       line number of the call that failed.
00129 *                    - If expr is true, it returns no value.
00130 * @return               None
00131 *******************************************************************************/
00132 #define CHECK_PARAM(expr) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))
00133 #else
00134 #define CHECK_PARAM(expr)
00135 #endif /* DEBUG */
00136
00137
00138
00139 /************************** GLOBAL/PUBLIC FUNCTION DECLARATION *********************************/
00140
00141 #ifdef  DEBUG
00142 void check_failed(uint8_t *file, uint32_t line);
00143 #endif
00144
00145
00146 #endif /* LPC17XX_LIBCFG_H_ */
Generated on Tue Jun 7 14:58:58 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/UART/Polling/lpc17xx_libcfg.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/UART/Polling/lpc17xx_libcfg.h

Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          lpc17xx_libcfg.h                        2010-05-21
00003 */
00025 #ifndef LPC17XX_LIBCFG_H_
00026 #define LPC17XX_LIBCFG_H_
00027
00028 #include "lpc_types.h"
00029
00030
00031 /************************** DEBUG MODE DEFINITIONS *********************************/
00032 /* Un-comment the line below to compile the library in DEBUG mode, this will expanse
00033    the "CHECK_PARAM" macro in the FW library code */
00034
00035 #define DEBUG
00036
00037
00038 /******************* PERIPHERAL FW LIBRARY CONFIGURATION DEFINITIONS ***********************/
00039 /* Comment the line below to disable the specific peripheral inclusion */
00040
00041 /* DEBUG_FRAMWORK ------------------------------ */
00042 //#define _DBGFWK
00043
00044 /* GPIO ------------------------------- */
00045 //#define _GPIO
00046
00047 /* EXTI ------------------------------- */
00048 //#define _EXTI
00049
00050 /* UART ------------------------------- */
00051 #define _UART
00052 #define _UART0
00053 #define _UART1
00054 #define _UART2
00055 #define _UART3
00056
00057 /* SPI ------------------------------- */
00058 //#define _SPI
00059
00060 /* SSP ------------------------------- */
00061 //#define _SSP
00062 //#define _SSP0
00063 //#define _SSP1
00064
00065 /* SYSTICK --------------------------- */
00066 //#define _SYSTICK
00067
00068 /* I2C ------------------------------- */
00069 //#define _I2C
00070 //#define _I2C0
00071 //#define _I2C1
00072 //#define _I2C2
00073
00074 /* TIMER ------------------------------- */
00075 //#define _TIM
00076
00077 /* WDT ------------------------------- */
00078 //#define _WDT
00079
00080
00081 /* GPDMA ------------------------------- */
00082 //#define _GPDMA
00083
00084
00085 /* DAC ------------------------------- */
00086 //#define _DAC
00087
00088 /* DAC ------------------------------- */
00089 //#define _ADC
00090
00091
00092 /* PWM ------------------------------- */
00093 //#define _PWM
00094 //#define _PWM1
00095
00096 /* RTC ------------------------------- */
00097 //#define _RTC
00098
00099 /* I2S ------------------------------- */
00100 //#define _I2S
00101
00102 /* USB device ------------------------------- */
00103 //#define _USBDEV
00104 //#define _USB_DMA
00105
00106 /* QEI ------------------------------- */
00107 //#define _QEI
00108
00109 /* MCPWM ------------------------------- */
00110 //#define _MCPWM
00111
00112 /* CAN--------------------------------*/
00113 //#define _CAN
00114
00115 /* RIT ------------------------------- */
00116 //#define _RIT
00117
00118 /* EMAC ------------------------------ */
00119 //#define _EMAC
00120
00121
00122
00123 /************************** GLOBAL/PUBLIC MACRO DEFINITIONS *********************************/
00124
00125 #ifdef  DEBUG
00126 /*******************************************************************************
00127 * @brief                The CHECK_PARAM macro is used for function's parameters check.
00128 *                               It is used only if the library is compiled in DEBUG mode.
00129 * @param[in]    expr - If expr is false, it calls check_failed() function
00130 *                       which reports the name of the source file and the source
00131 *                       line number of the call that failed.
00132 *                    - If expr is true, it returns no value.
00133 * @return               None
00134 *******************************************************************************/
00135 #define CHECK_PARAM(expr) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))
00136 #else
00137 #define CHECK_PARAM(expr)
00138 #endif /* DEBUG */
00139
00140
00141
00142 /************************** GLOBAL/PUBLIC FUNCTION DECLARATION *********************************/
00143
00144 #ifdef  DEBUG
00145 void check_failed(uint8_t *file, uint32_t line);
00146 #endif
00147
00148
00149 #endif /* LPC17XX_LIBCFG_H_ */
Generated on Tue Jun 7 14:58:58 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/UART/RS485_Master/lpc17xx_libcfg.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/UART/RS485_Master/lpc17xx_libcfg.h

Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          lpc17xx_libcfg.h                        2010-05-21
00003 */
00025 #ifndef LPC17XX_LIBCFG_H_
00026 #define LPC17XX_LIBCFG_H_
00027
00028 #include "lpc_types.h"
00029
00030
00031 /************************** DEBUG MODE DEFINITIONS *********************************/
00032 /* Un-comment the line below to compile the library in DEBUG mode, this will expanse
00033    the "CHECK_PARAM" macro in the FW library code */
00034
00035 #define DEBUG
00036
00037
00038 /******************* PERIPHERAL FW LIBRARY CONFIGURATION DEFINITIONS ***********************/
00039
00040 /* Comment the line below to disable the specific peripheral inclusion */
00041
00042 /* DEBUG_FRAMWORK ------------------------------ */
00043 //#define _DBGFWK
00044
00045 /* GPIO ------------------------------- */
00046 //#define _GPIO
00047
00048 /* EXTI ------------------------------- */
00049 //#define _EXTI
00050
00051 /* UART ------------------------------- */
00052 #define _UART
00053 #define _UART0
00054 #define _UART1
00055 #define _UART2
00056 #define _UART3
00057
00058 /* SPI ------------------------------- */
00059 //#define _SPI
00060
00061 /* SSP ------------------------------- */
00062 //#define _SSP
00063 //#define _SSP0
00064 //#define _SSP1
00065
00066 /* SYSTICK --------------------------- */
00067 //#define _SYSTICK
00068
00069 /* I2C ------------------------------- */
00070 //#define _I2C
00071 //#define _I2C0
00072 //#define _I2C1
00073 //#define _I2C2
00074
00075 /* TIMER ------------------------------- */
00076 //#define _TIM
00077
00078 /* WDT ------------------------------- */
00079 //#define _WDT
00080
00081
00082 /* GPDMA ------------------------------- */
00083 //#define _GPDMA
00084
00085
00086 /* DAC ------------------------------- */
00087 //#define _DAC
00088
00089 /* DAC ------------------------------- */
00090 //#define _ADC
00091
00092
00093 /* PWM ------------------------------- */
00094 //#define _PWM
00095 //#define _PWM1
00096
00097 /* RTC ------------------------------- */
00098 //#define _RTC
00099
00100 /* I2S ------------------------------- */
00101 //#define _I2S
00102
00103 /* USB device ------------------------------- */
00104 //#define _USBDEV
00105 //#define _USB_DMA
00106
00107 /* QEI ------------------------------- */
00108 //#define _QEI
00109
00110 /* MCPWM ------------------------------- */
00111 //#define _MCPWM
00112
00113 /* CAN--------------------------------*/
00114 //#define _CAN
00115
00116 /* RIT ------------------------------- */
00117 //#define _RIT
00118
00119 /* EMAC ------------------------------ */
00120 //#define _EMAC
00121
00122
00123
00124
00125 /************************** GLOBAL/PUBLIC MACRO DEFINITIONS *********************************/
00126
00127 #ifdef  DEBUG
00128 /*******************************************************************************
00129 * @brief                The CHECK_PARAM macro is used for function's parameters check.
00130 *                               It is used only if the library is compiled in DEBUG mode.
00131 * @param[in]    expr - If expr is false, it calls check_failed() function
00132 *                       which reports the name of the source file and the source
00133 *                       line number of the call that failed.
00134 *                    - If expr is true, it returns no value.
00135 * @return               None
00136 *******************************************************************************/
00137 #define CHECK_PARAM(expr) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))
00138 #else
00139 #define CHECK_PARAM(expr)
00140 #endif /* DEBUG */
00141
00142
00143
00144 /************************** GLOBAL/PUBLIC FUNCTION DECLARATION *********************************/
00145
00146 #ifdef  DEBUG
00147 void check_failed(uint8_t *file, uint32_t line);
00148 #endif
00149
00150
00151 #endif /* LPC17XX_LIBCFG_H_ */
Generated on Tue Jun 7 14:58:58 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/UART/RS485_Slave/lpc17xx_libcfg.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/UART/RS485_Slave/lpc17xx_libcfg.h

Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          lpc17xx_libcfg.h                        2010-05-21
00003 */
00026 #ifndef LPC17XX_LIBCFG_H_
00027 #define LPC17XX_LIBCFG_H_
00028
00029 #include "lpc_types.h"
00030
00031
00032 /************************** DEBUG MODE DEFINITIONS *********************************/
00033 /* Un-comment the line below to compile the library in DEBUG mode, this will expanse
00034    the "CHECK_PARAM" macro in the FW library code */
00035
00036 #define DEBUG
00037
00038
00039 /******************* PERIPHERAL FW LIBRARY CONFIGURATION DEFINITIONS ***********************/
00040
00041 /* Comment the line below to disable the specific peripheral inclusion */
00042
00043 /* DEBUG_FRAMWORK ------------------------------ */
00044 //#define _DBGFWK
00045
00046 /* GPIO ------------------------------- */
00047 //#define _GPIO
00048
00049 /* EXTI ------------------------------- */
00050 //#define _EXTI
00051
00052 /* UART ------------------------------- */
00053 #define _UART
00054 #define _UART0
00055 #define _UART1
00056 #define _UART2
00057 #define _UART3
00058
00059 /* SPI ------------------------------- */
00060 //#define _SPI
00061
00062 /* SSP ------------------------------- */
00063 //#define _SSP
00064 //#define _SSP0
00065 //#define _SSP1
00066
00067 /* SYSTICK --------------------------- */
00068 //#define _SYSTICK
00069
00070 /* I2C ------------------------------- */
00071 //#define _I2C
00072 //#define _I2C0
00073 //#define _I2C1
00074 //#define _I2C2
00075
00076 /* TIMER ------------------------------- */
00077 //#define _TIM
00078
00079 /* WDT ------------------------------- */
00080 //#define _WDT
00081
00082
00083 /* GPDMA ------------------------------- */
00084 //#define _GPDMA
00085
00086
00087 /* DAC ------------------------------- */
00088 //#define _DAC
00089
00090 /* DAC ------------------------------- */
00091 //#define _ADC
00092
00093
00094 /* PWM ------------------------------- */
00095 //#define _PWM
00096 //#define _PWM1
00097
00098 /* RTC ------------------------------- */
00099 //#define _RTC
00100
00101 /* I2S ------------------------------- */
00102 //#define _I2S
00103
00104 /* USB device ------------------------------- */
00105 //#define _USBDEV
00106 //#define _USB_DMA
00107
00108 /* QEI ------------------------------- */
00109 //#define _QEI
00110
00111 /* MCPWM ------------------------------- */
00112 //#define _MCPWM
00113
00114 /* CAN--------------------------------*/
00115 //#define _CAN
00116
00117 /* RIT ------------------------------- */
00118 //#define _RIT
00119
00120 /* EMAC ------------------------------ */
00121 //#define _EMAC
00122
00123
00124
00125 /************************** GLOBAL/PUBLIC MACRO DEFINITIONS *********************************/
00126
00127 #ifdef  DEBUG
00128 /*******************************************************************************
00129 * @brief                The CHECK_PARAM macro is used for function's parameters check.
00130 *                               It is used only if the library is compiled in DEBUG mode.
00131 * @param[in]    expr - If expr is false, it calls check_failed() function
00132 *                       which reports the name of the source file and the source
00133 *                       line number of the call that failed.
00134 *                    - If expr is true, it returns no value.
00135 * @return               None
00136 *******************************************************************************/
00137 #define CHECK_PARAM(expr) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))
00138 #else
00139 #define CHECK_PARAM(expr)
00140 #endif /* DEBUG */
00141
00142
00143
00144 /************************** GLOBAL/PUBLIC FUNCTION DECLARATION *********************************/
00145
00146 #ifdef  DEBUG
00147 void check_failed(uint8_t *file, uint32_t line);
00148 #endif
00149
00150
00151 #endif /* LPC17XX_LIBCFG_H_ */
Generated on Tue Jun 7 14:58:58 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/UART/UART1_FullModem/lpc17xx_libcfg.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/UART/UART1_FullModem/lpc17xx_libcfg.h

Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          lpc17xx_libcfg.h                        2010-05-21
00003 */
00026 #ifndef LPC17XX_LIBCFG_H_
00027 #define LPC17XX_LIBCFG_H_
00028
00029 #include "lpc_types.h"
00030
00031
00032 /************************** DEBUG MODE DEFINITIONS *********************************/
00033 /* Un-comment the line below to compile the library in DEBUG mode, this will expanse
00034    the "CHECK_PARAM" macro in the FW library code */
00035
00036 #define DEBUG
00037
00038
00039 /******************* PERIPHERAL FW LIBRARY CONFIGURATION DEFINITIONS ***********************/
00040
00041 /* Comment the line below to disable the specific peripheral inclusion */
00042
00043 /* DEBUG_FRAMWORK ------------------------------ */
00044 //#define _DBGFWK
00045
00046 /* GPIO ------------------------------- */
00047 //#define _GPIO
00048
00049 /* EXTI ------------------------------- */
00050 //#define _EXTI
00051
00052 /* UART ------------------------------- */
00053 #define _UART
00054 #define _UART0
00055 #define _UART1
00056 #define _UART2
00057 #define _UART3
00058
00059 /* SPI ------------------------------- */
00060 //#define _SPI
00061
00062 /* SSP ------------------------------- */
00063 //#define _SSP
00064 //#define _SSP0
00065 //#define _SSP1
00066
00067 /* SYSTICK --------------------------- */
00068 //#define _SYSTICK
00069
00070 /* I2C ------------------------------- */
00071 //#define _I2C
00072 //#define _I2C0
00073 //#define _I2C1
00074 //#define _I2C2
00075
00076 /* TIMER ------------------------------- */
00077 //#define _TIM
00078
00079 /* WDT ------------------------------- */
00080 //#define _WDT
00081
00082
00083 /* GPDMA ------------------------------- */
00084 //#define _GPDMA
00085
00086
00087 /* DAC ------------------------------- */
00088 //#define _DAC
00089
00090 /* DAC ------------------------------- */
00091 //#define _ADC
00092
00093
00094 /* PWM ------------------------------- */
00095 //#define _PWM
00096 //#define _PWM1
00097
00098 /* RTC ------------------------------- */
00099 //#define _RTC
00100
00101 /* I2S ------------------------------- */
00102 //#define _I2S
00103
00104 /* USB device ------------------------------- */
00105 //#define _USBDEV
00106 //#define _USB_DMA
00107
00108 /* QEI ------------------------------- */
00109 //#define _QEI
00110
00111 /* MCPWM ------------------------------- */
00112 //#define _MCPWM
00113
00114 /* CAN--------------------------------*/
00115 //#define _CAN
00116
00117 /* RIT ------------------------------- */
00118 //#define _RIT
00119
00120 /* EMAC ------------------------------ */
00121 //#define _EMAC
00122
00123
00124 /************************** GLOBAL/PUBLIC MACRO DEFINITIONS *********************************/
00125
00126 #ifdef  DEBUG
00127 /*******************************************************************************
00128 * @brief                The CHECK_PARAM macro is used for function's parameters check.
00129 *                               It is used only if the library is compiled in DEBUG mode.
00130 * @param[in]    expr - If expr is false, it calls check_failed() function
00131 *                       which reports the name of the source file and the source
00132 *                       line number of the call that failed.
00133 *                    - If expr is true, it returns no value.
00134 * @return               None
00135 *******************************************************************************/
00136 #define CHECK_PARAM(expr) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))
00137 #else
00138 #define CHECK_PARAM(expr)
00139 #endif /* DEBUG */
00140
00141
00142
00143 /************************** GLOBAL/PUBLIC FUNCTION DECLARATION *********************************/
00144
00145 #ifdef  DEBUG
00146 void check_failed(uint8_t *file, uint32_t line);
00147 #endif
00148
00149
00150 #endif /* LPC17XX_LIBCFG_H_ */
Generated on Tue Jun 7 14:58:58 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBAudio/usb.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBAudio/usb.h

Go to the documentation of this file.
00001 /*----------------------------------------------------------------------------
00002  *      U S B  -  K e r n e l
00003  *----------------------------------------------------------------------------
00004  * Name:    usb.h
00005  * Purpose: USB Definitions
00006  * Version: V1.20
00007  *----------------------------------------------------------------------------
00008  *      This software is supplied "AS IS" without any warranties, express,
00009  *      implied or statutory, including but not limited to the implied
00010  *      warranties of fitness for purpose, satisfactory quality and
00011  *      noninfringement. Keil extends you a royalty-free right to reproduce
00012  *      and distribute executable files created using this software for use
00013  *      on NXP Semiconductors LPC family microcontroller devices only. Nothing
00014  *      else gives you the right to use this software.
00015  *
00016  * Copyright (c) 2009 Keil - An ARM Company. All rights reserved.
00017  *---------------------------------------------------------------------------*/
00018
00019 #ifndef __USB_H__
00020 #define __USB_H__
00021 #include "lpc_types.h"
00022 #if defined   (  __GNUC__  )
00023 #define __packed __attribute__((__packed__))
00024 #endif
00025
00026 #if defined     (  __CC_ARM  )
00027 typedef __packed union {
00028 #elif defined   (  __GNUC__  )
00029 typedef union __packed {
00030 #elif defined   (  __IAR_SYSTEMS_ICC__  )
00031 #pragma pack(1)
00032 typedef union {
00033 #endif
00034   uint16_t W;
00035 #if defined     (  __CC_ARM  )
00036   __packed struct {
00037 #elif defined   (  __GNUC__  )
00038   struct __packed {
00039 #elif defined   (  __IAR_SYSTEMS_ICC__  )
00040 #pragma pack(1)
00041   struct {
00042 #endif
00043     uint8_t L;
00044     uint8_t H;
00045   } WB;
00046 #ifdef __IAR_SYSTEMS_ICC__
00047 #pragma pack()
00048 #endif
00049 } WORD_BYTE;
00050 #ifdef __IAR_SYSTEMS_ICC__
00051 #pragma pack()
00052 #endif
00053
00054
00055 /* bmRequestType.Dir */
00056 #define REQUEST_HOST_TO_DEVICE     0
00057 #define REQUEST_DEVICE_TO_HOST     1
00058
00059 /* bmRequestType.Type */
00060 #define REQUEST_STANDARD           0
00061 #define REQUEST_CLASS              1
00062 #define REQUEST_VENDOR             2
00063 #define REQUEST_RESERVED           3
00064
00065 /* bmRequestType.Recipient */
00066 #define REQUEST_TO_DEVICE          0
00067 #define REQUEST_TO_INTERFACE       1
00068 #define REQUEST_TO_ENDPOINT        2
00069 #define REQUEST_TO_OTHER           3
00070
00071 /* bmRequestType Definition */
00072 #if defined     (  __CC_ARM  )
00073 typedef __packed union _REQUEST_TYPE {
00074 #elif defined   (  __GNUC__  )
00075 typedef union __packed _REQUEST_TYPE {
00076 #elif defined   (  __IAR_SYSTEMS_ICC__  )
00077 #pragma pack(1)
00078 typedef union _REQUEST_TYPE {
00079 #endif
00080 #if defined     (  __CC_ARM  )
00081         __packed struct _BM {
00082 #elif defined   (  __GNUC__  )
00083         struct __packed _BM {
00084 #elif defined   (  __IAR_SYSTEMS_ICC__  )
00085 #pragma pack(1)
00086         struct _BM {
00087 #endif
00088     uint8_t Recipient : 5;
00089     uint8_t Type      : 2;
00090     uint8_t Dir       : 1;
00091   } BM;
00092 #ifdef __IAR_SYSTEMS_ICC__
00093 #pragma pack()
00094 #endif
00095   uint8_t B;
00096 } REQUEST_TYPE;
00097 #ifdef __IAR_SYSTEMS_ICC__
00098 #pragma pack()
00099 #endif
00100
00101 /* USB Standard Request Codes */
00102 #define USB_REQUEST_GET_STATUS                 0
00103 #define USB_REQUEST_CLEAR_FEATURE              1
00104 #define USB_REQUEST_SET_FEATURE                3
00105 #define USB_REQUEST_SET_ADDRESS                5
00106 #define USB_REQUEST_GET_DESCRIPTOR             6
00107 #define USB_REQUEST_SET_DESCRIPTOR             7
00108 #define USB_REQUEST_GET_CONFIGURATION          8
00109 #define USB_REQUEST_SET_CONFIGURATION          9
00110 #define USB_REQUEST_GET_INTERFACE              10
00111 #define USB_REQUEST_SET_INTERFACE              11
00112 #define USB_REQUEST_SYNC_FRAME                 12
00113
00114 /* USB GET_STATUS Bit Values */
00115 #define USB_GETSTATUS_SELF_POWERED             0x01
00116 #define USB_GETSTATUS_REMOTE_WAKEUP            0x02
00117 #define USB_GETSTATUS_ENDPOINT_STALL           0x01
00118
00119 /* USB Standard Feature selectors */
00120 #define USB_FEATURE_ENDPOINT_STALL             0
00121 #define USB_FEATURE_REMOTE_WAKEUP              1
00122
00123 /* USB Default Control Pipe Setup Packet */
00124 #if defined     (  __CC_ARM  )
00125 typedef __packed struct _USB_SETUP_PACKET {
00126 #elif defined   (  __GNUC__  )
00127 typedef struct __packed _USB_SETUP_PACKET {
00128 #elif defined   (  __IAR_SYSTEMS_ICC__  )
00129 #pragma pack(1)
00130 typedef struct _USB_SETUP_PACKET {
00131 #endif
00132   REQUEST_TYPE bmRequestType;
00133   uint8_t         bRequest;
00134   WORD_BYTE    wValue;
00135   WORD_BYTE    wIndex;
00136   uint16_t         wLength;
00137 } USB_SETUP_PACKET;
00138 #ifdef __IAR_SYSTEMS_ICC__
00139 #pragma pack()
00140 #endif
00141
00142
00143 /* USB Descriptor Types */
00144 #define USB_DEVICE_DESCRIPTOR_TYPE                  1
00145 #define USB_CONFIGURATION_DESCRIPTOR_TYPE           2
00146 #define USB_STRING_DESCRIPTOR_TYPE                  3
00147 #define USB_INTERFACE_DESCRIPTOR_TYPE               4
00148 #define USB_ENDPOINT_DESCRIPTOR_TYPE                5
00149 #define USB_DEVICE_QUALIFIER_DESCRIPTOR_TYPE        6
00150 #define USB_OTHER_SPEED_CONFIG_DESCRIPTOR_TYPE      7
00151 #define USB_INTERFACE_POWER_DESCRIPTOR_TYPE         8
00152 #define USB_OTG_DESCRIPTOR_TYPE                     9
00153 #define USB_DEBUG_DESCRIPTOR_TYPE                  10
00154 #define USB_INTERFACE_ASSOCIATION_DESCRIPTOR_TYPE  11
00155
00156 /* USB Device Classes */
00157 #define USB_DEVICE_CLASS_RESERVED              0x00
00158 #define USB_DEVICE_CLASS_AUDIO                 0x01
00159 #define USB_DEVICE_CLASS_COMMUNICATIONS        0x02
00160 #define USB_DEVICE_CLASS_HUMAN_INTERFACE       0x03
00161 #define USB_DEVICE_CLASS_MONITOR               0x04
00162 #define USB_DEVICE_CLASS_PHYSICAL_INTERFACE    0x05
00163 #define USB_DEVICE_CLASS_POWER                 0x06
00164 #define USB_DEVICE_CLASS_PRINTER               0x07
00165 #define USB_DEVICE_CLASS_STORAGE               0x08
00166 #define USB_DEVICE_CLASS_HUB                   0x09
00167 #define USB_DEVICE_CLASS_MISCELLANEOUS         0xEF
00168 #define USB_DEVICE_CLASS_VENDOR_SPECIFIC       0xFF
00169
00170 /* bmAttributes in Configuration Descriptor */
00171 #define USB_CONFIG_POWERED_MASK                0x40
00172 #define USB_CONFIG_BUS_POWERED                 0x80
00173 #define USB_CONFIG_SELF_POWERED                0xC0
00174 #define USB_CONFIG_REMOTE_WAKEUP               0x20
00175
00176 /* bMaxPower in Configuration Descriptor */
00177 #define USB_CONFIG_POWER_MA(mA)                ((mA)/2)
00178
00179 /* bEndpointAddress in Endpoint Descriptor */
00180 #define USB_ENDPOINT_DIRECTION_MASK            0x80
00181 #define USB_ENDPOINT_OUT(addr)                 ((addr) | 0x00)
00182 #define USB_ENDPOINT_IN(addr)                  ((addr) | 0x80)
00183
00184 /* bmAttributes in Endpoint Descriptor */
00185 #define USB_ENDPOINT_TYPE_MASK                 0x03
00186 #define USB_ENDPOINT_TYPE_CONTROL              0x00
00187 #define USB_ENDPOINT_TYPE_ISOCHRONOUS          0x01
00188 #define USB_ENDPOINT_TYPE_BULK                 0x02
00189 #define USB_ENDPOINT_TYPE_INTERRUPT            0x03
00190 #define USB_ENDPOINT_SYNC_MASK                 0x0C
00191 #define USB_ENDPOINT_SYNC_NO_SYNCHRONIZATION   0x00
00192 #define USB_ENDPOINT_SYNC_ASYNCHRONOUS         0x04
00193 #define USB_ENDPOINT_SYNC_ADAPTIVE             0x08
00194 #define USB_ENDPOINT_SYNC_SYNCHRONOUS          0x0C
00195 #define USB_ENDPOINT_USAGE_MASK                0x30
00196 #define USB_ENDPOINT_USAGE_DATA                0x00
00197 #define USB_ENDPOINT_USAGE_FEEDBACK            0x10
00198 #define USB_ENDPOINT_USAGE_IMPLICIT_FEEDBACK   0x20
00199 #define USB_ENDPOINT_USAGE_RESERVED            0x30
00200
00201 /* USB Standard Device Descriptor */
00202 #if defined     (  __CC_ARM  )
00203 typedef __packed struct _USB_DEVICE_DESCRIPTOR {
00204 #elif defined   (  __GNUC__  )
00205 typedef struct __packed _USB_DEVICE_DESCRIPTOR {
00206 #elif defined   (  __IAR_SYSTEMS_ICC__  )
00207 #pragma pack(1)
00208 typedef struct _USB_DEVICE_DESCRIPTOR {
00209 #endif
00210   uint8_t  bLength;
00211   uint8_t  bDescriptorType;
00212   uint16_t  bcdUSB;
00213   uint8_t  bDeviceClass;
00214   uint8_t  bDeviceSubClass;
00215   uint8_t  bDeviceProtocol;
00216   uint8_t  bMaxPacketSize0;
00217   uint16_t  idVendor;
00218   uint16_t  idProduct;
00219   uint16_t  bcdDevice;
00220   uint8_t  iManufacturer;
00221   uint8_t  iProduct;
00222   uint8_t  iSerialNumber;
00223   uint8_t  bNumConfigurations;
00224 } USB_DEVICE_DESCRIPTOR;
00225 #ifdef __IAR_SYSTEMS_ICC__
00226 #pragma pack()
00227 #endif
00228
00229 /* USB 2.0 Device Qualifier Descriptor */
00230 #if defined     (  __CC_ARM  )
00231 typedef __packed struct _USB_DEVICE_QUALIFIER_DESCRIPTOR {
00232 #elif defined   (  __GNUC__  )
00233 typedef struct __packed _USB_DEVICE_QUALIFIER_DESCRIPTOR {
00234 #elif defined   (  __IAR_SYSTEMS_ICC__  )
00235 #pragma pack(1)
00236 typedef struct _USB_DEVICE_QUALIFIER_DESCRIPTOR {
00237 #endif
00238   uint8_t  bLength;
00239   uint8_t  bDescriptorType;
00240   uint16_t  bcdUSB;
00241   uint8_t  bDeviceClass;
00242   uint8_t  bDeviceSubClass;
00243   uint8_t  bDeviceProtocol;
00244   uint8_t  bMaxPacketSize0;
00245   uint8_t  bNumConfigurations;
00246   uint8_t  bReserved;
00247 } USB_DEVICE_QUALIFIER_DESCRIPTOR;
00248 #ifdef __IAR_SYSTEMS_ICC__
00249 #pragma pack()
00250 #endif
00251
00252 /* USB Standard Configuration Descriptor */
00253 #if defined     (  __CC_ARM  )
00254 typedef __packed struct _USB_CONFIGURATION_DESCRIPTOR {
00255 #elif defined   (  __GNUC__  )
00256 typedef struct __packed _USB_CONFIGURATION_DESCRIPTOR {
00257 #elif defined   (  __IAR_SYSTEMS_ICC__  )
00258 #pragma pack(1)
00259 typedef struct _USB_CONFIGURATION_DESCRIPTOR {
00260 #endif
00261   uint8_t  bLength;
00262   uint8_t  bDescriptorType;
00263   uint16_t  wTotalLength;
00264   uint8_t  bNumInterfaces;
00265   uint8_t  bConfigurationValue;
00266   uint8_t  iConfiguration;
00267   uint8_t  bmAttributes;
00268   uint8_t  bMaxPower;
00269 } USB_CONFIGURATION_DESCRIPTOR;
00270 #ifdef __IAR_SYSTEMS_ICC__
00271 #pragma pack()
00272 #endif
00273
00274 /* USB Standard Interface Descriptor */
00275 #if defined     (  __CC_ARM  )
00276 typedef __packed struct _USB_INTERFACE_DESCRIPTOR {
00277 #elif defined   (  __GNUC__  )
00278 typedef struct __packed _USB_INTERFACE_DESCRIPTOR {
00279 #elif defined   (  __IAR_SYSTEMS_ICC__  )
00280 #pragma pack(1)
00281 typedef struct _USB_INTERFACE_DESCRIPTOR {
00282 #endif
00283   uint8_t  bLength;
00284   uint8_t  bDescriptorType;
00285   uint8_t  bInterfaceNumber;
00286   uint8_t  bAlternateSetting;
00287   uint8_t  bNumEndpoints;
00288   uint8_t  bInterfaceClass;
00289   uint8_t  bInterfaceSubClass;
00290   uint8_t  bInterfaceProtocol;
00291   uint8_t  iInterface;
00292 } USB_INTERFACE_DESCRIPTOR;
00293 #ifdef __IAR_SYSTEMS_ICC__
00294 #pragma pack()
00295 #endif
00296
00297 /* USB Standard Endpoint Descriptor */
00298 #if defined     (  __CC_ARM  )
00299 typedef __packed struct _USB_ENDPOINT_DESCRIPTOR {
00300 #elif defined   (  __GNUC__  )
00301 typedef struct __packed _USB_ENDPOINT_DESCRIPTOR {
00302 #elif defined   (  __IAR_SYSTEMS_ICC__  )
00303 #pragma pack(1)
00304 typedef struct _USB_ENDPOINT_DESCRIPTOR {
00305 #endif
00306   uint8_t  bLength;
00307   uint8_t  bDescriptorType;
00308   uint8_t  bEndpointAddress;
00309   uint8_t  bmAttributes;
00310   uint16_t  wMaxPacketSize;
00311   uint8_t  bInterval;
00312 } USB_ENDPOINT_DESCRIPTOR;
00313 #ifdef __IAR_SYSTEMS_ICC__
00314 #pragma pack()
00315 #endif
00316
00317 /* USB String Descriptor */
00318 #if defined     (  __CC_ARM  )
00319 typedef __packed struct _USB_STRING_DESCRIPTOR {
00320 #elif defined   (  __GNUC__  )
00321 typedef struct __packed _USB_STRING_DESCRIPTOR {
00322 #elif defined   (  __IAR_SYSTEMS_ICC__  )
00323 #pragma pack(1)
00324 typedef struct _USB_STRING_DESCRIPTOR {
00325 #endif
00326   uint8_t  bLength;
00327   uint8_t  bDescriptorType;
00328   uint16_t  bString/*[]*/;
00329 } USB_STRING_DESCRIPTOR;
00330 #ifdef __IAR_SYSTEMS_ICC__
00331 #pragma pack()
00332 #endif
00333
00334 /* USB Common Descriptor */
00335 #if defined     (  __CC_ARM  )
00336 typedef __packed struct _USB_COMMON_DESCRIPTOR {
00337 #elif defined   (  __GNUC__  )
00338 typedef struct __packed _USB_COMMON_DESCRIPTOR {
00339 #elif defined   (  __IAR_SYSTEMS_ICC__  )
00340 #pragma pack(1)
00341 typedef struct _USB_COMMON_DESCRIPTOR {
00342 #endif
00343   uint8_t  bLength;
00344   uint8_t  bDescriptorType;
00345 } USB_COMMON_DESCRIPTOR;
00346 #ifdef __IAR_SYSTEMS_ICC__
00347 #pragma pack()
00348 #endif
00349
00350
00351 #endif  /* __USB_H__ */
Generated on Tue Jun 7 14:59:04 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBAudio/usbcfg.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBAudio/usbcfg.h

Go to the documentation of this file.
00001 /*----------------------------------------------------------------------------
00002  *      U S B  -  K e r n e l
00003  *----------------------------------------------------------------------------
00004  * Name:    usbcfg.h
00005  * Purpose: USB Custom Configuration
00006  * Version: V1.20
00007  *----------------------------------------------------------------------------
00008  *      This software is supplied "AS IS" without any warranties, express,
00009  *      implied or statutory, including but not limited to the implied
00010  *      warranties of fitness for purpose, satisfactory quality and
00011  *      noninfringement. Keil extends you a royalty-free right to reproduce
00012  *      and distribute executable files created using this software for use
00013  *      on NXP Semiconductors LPC family microcontroller devices only. Nothing
00014  *      else gives you the right to use this software.
00015  *
00016  * Copyright (c) 2009 Keil - An ARM Company. All rights reserved.
00017  *----------------------------------------------------------------------------
00018  * History:
00019  *          V1.20 Added vendor specific support
00020  *          V1.00 Initial Version
00021  *----------------------------------------------------------------------------*/
00022
00023 #ifndef __USBCFG_H__
00024 #define __USBCFG_H__
00025
00026
00027 //*** <<< Use Configuration Wizard in Context Menu >>> ***
00028
00029
00030 /*
00031 // <h> USB Configuration
00032 //   <o0> USB Power
00033 //        <i> Default Power Setting
00034 //        <0=> Bus-powered
00035 //        <1=> Self-powered
00036 //   <o1> Max Number of Interfaces <1-256>
00037 //   <o2> Max Number of Endpoints  <1-32>
00038 //   <o3> Max Endpoint 0 Packet Size
00039 //        <8=> 8 Bytes <16=> 16 Bytes <32=> 32 Bytes <64=> 64 Bytes
00040 //   <e4> DMA Transfer
00041 //     <i> Use DMA for selected Endpoints
00042 //     <o5.0>  Endpoint 0 Out
00043 //     <o5.1>  Endpoint 0 In
00044 //     <o5.2>  Endpoint 1 Out
00045 //     <o5.3>  Endpoint 1 In
00046 //     <o5.4>  Endpoint 2 Out
00047 //     <o5.5>  Endpoint 2 In
00048 //     <o5.6>  Endpoint 3 Out
00049 //     <o5.7>  Endpoint 3 In
00050 //     <o5.8>  Endpoint 4 Out
00051 //     <o5.9>  Endpoint 4 In
00052 //     <o5.10> Endpoint 5 Out
00053 //     <o5.11> Endpoint 5 In
00054 //     <o5.12> Endpoint 6 Out
00055 //     <o5.13> Endpoint 6 In
00056 //     <o5.14> Endpoint 7 Out
00057 //     <o5.15> Endpoint 7 In
00058 //     <o5.16> Endpoint 8 Out
00059 //     <o5.17> Endpoint 8 In
00060 //     <o5.18> Endpoint 9 Out
00061 //     <o5.19> Endpoint 9 In
00062 //     <o5.20> Endpoint 10 Out
00063 //     <o5.21> Endpoint 10 In
00064 //     <o5.22> Endpoint 11 Out
00065 //     <o5.23> Endpoint 11 In
00066 //     <o5.24> Endpoint 12 Out
00067 //     <o5.25> Endpoint 12 In
00068 //     <o5.26> Endpoint 13 Out
00069 //     <o5.27> Endpoint 13 In
00070 //     <o5.28> Endpoint 14 Out
00071 //     <o5.29> Endpoint 14 In
00072 //     <o5.30> Endpoint 15 Out
00073 //     <o5.31> Endpoint 15 In
00074 //   </e>
00075 // </h>
00076 */
00077
00078 #define USB_POWER           0
00079 #define USB_IF_NUM          4
00080 #define USB_EP_NUM          32
00081 #define USB_MAX_PACKET0     64
00082 #define USB_DMA             0
00083 #define USB_DMA_EP          0x00000040
00084
00085
00086 /*
00087 // <h> USB Event Handlers
00088 //   <h> Device Events
00089 //     <o0.0> Power Event
00090 //     <o1.0> Reset Event
00091 //     <o2.0> Suspend Event
00092 //     <o3.0> Resume Event
00093 //     <o4.0> Remote Wakeup Event
00094 //     <o5.0> Start of Frame Event
00095 //     <o6.0> Error Event
00096 //   </h>
00097 //   <h> Endpoint Events
00098 //     <o7.0>  Endpoint 0 Event
00099 //     <o7.1>  Endpoint 1 Event
00100 //     <o7.2>  Endpoint 2 Event
00101 //     <o7.3>  Endpoint 3 Event
00102 //     <o7.4>  Endpoint 4 Event
00103 //     <o7.5>  Endpoint 5 Event
00104 //     <o7.6>  Endpoint 6 Event
00105 //     <o7.7>  Endpoint 7 Event
00106 //     <o7.8>  Endpoint 8 Event
00107 //     <o7.9>  Endpoint 9 Event
00108 //     <o7.10> Endpoint 10 Event
00109 //     <o7.11> Endpoint 11 Event
00110 //     <o7.12> Endpoint 12 Event
00111 //     <o7.13> Endpoint 13 Event
00112 //     <o7.14> Endpoint 14 Event
00113 //     <o7.15> Endpoint 15 Event
00114 //   </h>
00115 //   <h> USB Core Events
00116 //     <o8.0>  Set Configuration Event
00117 //     <o9.0>  Set Interface Event
00118 //     <o10.0> Set/Clear Feature Event
00119 //   </h>
00120 // </h>
00121 */
00122
00123 #define USB_POWER_EVENT     0
00124 #define USB_RESET_EVENT     1
00125 #define USB_SUSPEND_EVENT   0
00126 #define USB_RESUME_EVENT    0
00127 #define USB_WAKEUP_EVENT    0
00128 #define USB_SOF_EVENT       1
00129 #define USB_ERROR_EVENT     0
00130 #define USB_EP_EVENT        0x0009
00131 #define USB_CONFIGURE_EVENT 0
00132 #define USB_INTERFACE_EVENT 0
00133 #define USB_FEATURE_EVENT   0
00134
00135
00136 /*
00137 // <e0> USB Class Support
00138 //   <i> enables USB Class specific Requests
00139 //   <e1> Human Interface Device (HID)
00140 //     <o2> Interface Number <0-255>
00141 //   </e>
00142 //   <e3> Mass Storage
00143 //     <o4> Interface Number <0-255>
00144 //   </e>
00145 //   <e5> Audio Device
00146 //     <o6> Control Interface Number <0-255>
00147 //     <o7> Streaming Interface 1 Number <0-255>
00148 //     <o8> Streaming Interface 2 Number <0-255>
00149 //   </e>
00150 //   <e9> Communication Device
00151 //     <o10> Control Interface Number <0-255>
00152 //     <o11> Bulk Interface Number <0-255>
00153 //     <o12> Max Communication Device Buffer Size
00154 //        <8=> 8 Bytes <16=> 16 Bytes <32=> 32 Bytes <64=> 64 Bytes
00155 //   </e>
00156 // </e>
00157 */
00158
00159 #define USB_CLASS           1
00160 #define USB_HID             0
00161 #define USB_HID_IF_NUM      0
00162 #define USB_MSC             0
00163 #define USB_MSC_IF_NUM      0
00164 #define USB_AUDIO           1
00165 #define USB_ADC_CIF_NUM     0
00166 #define USB_ADC_SIF1_NUM    1
00167 #define USB_ADC_SIF2_NUM    2
00168 #define USB_CDC                         0
00169 #define USB_CDC_CIF_NUM     0
00170 #define USB_CDC_DIF_NUM     1
00171 #define USB_CDC_BUFSIZE     64
00172
00173 /*
00174 // <e0> USB Vendor Support
00175 //   <i> enables USB Vendor specific Requests
00176 // </e>
00177 */
00178 #define USB_VENDOR          0
00179
00180
00181 #endif  /* __USBCFG_H__ */
Generated on Tue Jun 7 14:59:04 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBAudio/usbcore.c Source File

C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBAudio/usbcore.c

Go to the documentation of this file.
00001 /*----------------------------------------------------------------------------
00002  *      U S B  -  K e r n e l
00003  *----------------------------------------------------------------------------
00004  * Name:    usbcore.c
00005  * Purpose: USB Core Module
00006  * Version: V1.20
00007  *----------------------------------------------------------------------------
00008  *      This software is supplied "AS IS" without any warranties, express,
00009  *      implied or statutory, including but not limited to the implied
00010  *      warranties of fitness for purpose, satisfactory quality and
00011  *      noninfringement. Keil extends you a royalty-free right to reproduce
00012  *      and distribute executable files created using this software for use
00013  *      on NXP Semiconductors LPC family microcontroller devices only. Nothing
00014  *      else gives you the right to use this software.
00015  *
00016  * Copyright (c) 2009 Keil - An ARM Company. All rights reserved.
00017  *----------------------------------------------------------------------------
00018  * History:
00019  *          V1.20 Added vendor specific requests
00020  *                Changed string descriptor handling
00021  *                Reworked Endpoint0
00022  *          V1.00 Initial Version
00023  *----------------------------------------------------------------------------*/
00024
00025 #include "lpc_types.h"
00026
00027 #include "usb.h"
00028 #include "usbcfg.h"
00029 #include "usbhw.h"
00030 #include "usbcore.h"
00031 #include "usbdesc.h"
00032 #include "usbuser.h"
00033
00034 #if (USB_CLASS)
00035
00036 #if (USB_AUDIO)
00037 #include "audio.h"
00038 #include "adcuser.h"
00039 #endif
00040
00041 #if (USB_HID)
00042 #include "hid.h"
00043 #include "hiduser.h"
00044 #endif
00045
00046 #if (USB_MSC)
00047 #include "msc.h"
00048 #include "mscuser.h"
00049 extern MSC_CSW CSW;
00050 #endif
00051
00052 #if (USB_CDC)
00053 #include "cdc.h"
00054 #include "cdcuser.h"
00055 #endif
00056
00057 #endif
00058
00059 #if (USB_VENDOR)
00060 #include "vendor.h"
00061 #endif
00062
00063 #if defined (  __CC_ARM__  )
00064 #pragma diag_suppress 111,177,1441
00065 #endif
00066
00067 #if defined   (  __GNUC__  )
00068 #define __packed __attribute__((__packed__))
00069 #endif
00070
00071 #if defined   (  __IAR_SYSTEMS_ICC__  )
00072 #define   __inline     inline
00073 #endif
00074
00075
00076 uint16_t  USB_DeviceStatus;
00077 uint8_t  USB_DeviceAddress;
00078 uint8_t  USB_Configuration;
00079 uint32_t USB_EndPointMask;
00080 uint32_t USB_EndPointHalt;
00081 uint32_t USB_EndPointStall;                         /* EP must stay stalled */
00082 uint8_t  USB_NumInterfaces;
00083 uint8_t  USB_AltSetting[USB_IF_NUM];
00084
00085 uint8_t  EP0Buf[USB_MAX_PACKET0];
00086
00087
00088 USB_EP_DATA EP0Data;
00089
00090 USB_SETUP_PACKET SetupPacket;
00091
00092
00093 /*
00094  *  Reset USB Core
00095  *    Parameters:      None
00096  *    Return Value:    None
00097  */
00098
00099 void USB_ResetCore (void) {
00100
00101   USB_DeviceStatus  = USB_POWER;
00102   USB_DeviceAddress = 0;
00103   USB_Configuration = 0;
00104   USB_EndPointMask  = 0x00010001;
00105   USB_EndPointHalt  = 0x00000000;
00106   USB_EndPointStall = 0x00000000;
00107 }
00108
00109
00110 /*
00111  *  USB Request - Setup Stage
00112  *    Parameters:      None (global SetupPacket)
00113  *    Return Value:    None
00114  */
00115
00116 void USB_SetupStage (void) {
00117   USB_ReadEP(0x00, (uint8_t *)&SetupPacket);
00118 }
00119
00120
00121 /*
00122  *  USB Request - Data In Stage
00123  *    Parameters:      None (global EP0Data)
00124  *    Return Value:    None
00125  */
00126
00127 void USB_DataInStage (void) {
00128   uint32_t cnt;
00129
00130   if (EP0Data.Count > USB_MAX_PACKET0) {
00131     cnt = USB_MAX_PACKET0;
00132   } else {
00133     cnt = EP0Data.Count;
00134   }
00135   cnt = USB_WriteEP(0x80, EP0Data.pData, cnt);
00136   EP0Data.pData += cnt;
00137   EP0Data.Count -= cnt;
00138 }
00139
00140
00141 /*
00142  *  USB Request - Data Out Stage
00143  *    Parameters:      None (global EP0Data)
00144  *    Return Value:    None
00145  */
00146
00147 void USB_DataOutStage (void) {
00148   uint32_t cnt;
00149
00150   cnt = USB_ReadEP(0x00, EP0Data.pData);
00151   EP0Data.pData += cnt;
00152   EP0Data.Count -= cnt;
00153 }
00154
00155
00156 /*
00157  *  USB Request - Status In Stage
00158  *    Parameters:      None
00159  *    Return Value:    None
00160  */
00161
00162 void USB_StatusInStage (void) {
00163   USB_WriteEP(0x80, NULL, 0);
00164 }
00165
00166
00167 /*
00168  *  USB Request - Status Out Stage
00169  *    Parameters:      None
00170  *    Return Value:    None
00171  */
00172
00173 void USB_StatusOutStage (void) {
00174   USB_ReadEP(0x00, EP0Buf);
00175 }
00176
00177
00178 /*
00179  *  Get Status USB Request
00180  *    Parameters:      None (global SetupPacket)
00181  *    Return Value:    TRUE - Success, FALSE - Error
00182  */
00183
00184 __inline uint32_t USB_ReqGetStatus (void) {
00185   uint32_t n, m;
00186
00187   switch (SetupPacket.bmRequestType.BM.Recipient) {
00188     case REQUEST_TO_DEVICE:
00189       EP0Data.pData = (uint8_t *)&USB_DeviceStatus;
00190       break;
00191     case REQUEST_TO_INTERFACE:
00192       if ((USB_Configuration != 0) && (SetupPacket.wIndex.WB.L < USB_NumInterfaces)) {
00193         *((__packed uint16_t *)EP0Buf) = 0;
00194         EP0Data.pData = EP0Buf;
00195       } else {
00196         return (FALSE);
00197       }
00198       break;
00199     case REQUEST_TO_ENDPOINT:
00200       n = SetupPacket.wIndex.WB.L & 0x8F;
00201       m = (n & 0x80) ? ((1 << 16) << (n & 0x0F)) : (1 << n);
00202       if (((USB_Configuration != 0) || ((n & 0x0F) == 0)) && (USB_EndPointMask & m)) {
00203         *((__packed uint16_t *)EP0Buf) = (USB_EndPointHalt & m) ? 1 : 0;
00204         EP0Data.pData = EP0Buf;
00205       } else {
00206         return (FALSE);
00207       }
00208       break;
00209     default:
00210       return (FALSE);
00211   }
00212   return (TRUE);
00213 }
00214
00215
00216 /*
00217  *  Set/Clear Feature USB Request
00218  *    Parameters:      sc:    0 - Clear, 1 - Set
00219  *                            (global SetupPacket)
00220  *    Return Value:    TRUE - Success, FALSE - Error
00221  */
00222
00223 __inline uint32_t USB_ReqSetClrFeature (uint32_t sc) {
00224   uint32_t n, m;
00225
00226   switch (SetupPacket.bmRequestType.BM.Recipient) {
00227     case REQUEST_TO_DEVICE:
00228       if (SetupPacket.wValue.W == USB_FEATURE_REMOTE_WAKEUP) {
00229         if (sc) {
00230           USB_WakeUpCfg(TRUE);
00231           USB_DeviceStatus |=  USB_GETSTATUS_REMOTE_WAKEUP;
00232         } else {
00233           USB_WakeUpCfg(FALSE);
00234           USB_DeviceStatus &= ~USB_GETSTATUS_REMOTE_WAKEUP;
00235         }
00236       } else {
00237         return (FALSE);
00238       }
00239       break;
00240     case REQUEST_TO_INTERFACE:
00241       return (FALSE);
00242     case REQUEST_TO_ENDPOINT:
00243       n = SetupPacket.wIndex.WB.L & 0x8F;
00244       m = (n & 0x80) ? ((1 << 16) << (n & 0x0F)) : (1 << n);
00245       if ((USB_Configuration != 0) && ((n & 0x0F) != 0) && (USB_EndPointMask & m)) {
00246         if (SetupPacket.wValue.W == USB_FEATURE_ENDPOINT_STALL) {
00247           if (sc) {
00248             USB_SetStallEP(n);
00249             USB_EndPointHalt |=  m;
00250           } else {
00251             if ((USB_EndPointStall & m) != 0) {
00252               return (TRUE);
00253             }
00254             USB_ClrStallEP(n);
00255 #if (USB_MSC)
00256             if ((n == MSC_EP_IN) && ((USB_EndPointHalt & m) != 0)) {
00257               /* Compliance Test: rewrite CSW after unstall */
00258               if (CSW.dSignature == MSC_CSW_Signature) {
00259                 USB_WriteEP(MSC_EP_IN, (uint8_t *)&CSW, sizeof(CSW));
00260               }
00261             }
00262 #endif
00263             USB_EndPointHalt &= ~m;
00264           }
00265         } else {
00266           return (FALSE);
00267         }
00268       } else {
00269         return (FALSE);
00270       }
00271       break;
00272     default:
00273       return (FALSE);
00274   }
00275   return (TRUE);
00276 }
00277
00278
00279 /*
00280  *  Set Address USB Request
00281  *    Parameters:      None (global SetupPacket)
00282  *    Return Value:    TRUE - Success, FALSE - Error
00283  */
00284
00285 __inline uint32_t USB_ReqSetAddress (void) {
00286
00287   switch (SetupPacket.bmRequestType.BM.Recipient) {
00288     case REQUEST_TO_DEVICE:
00289       USB_DeviceAddress = 0x80 | SetupPacket.wValue.WB.L;
00290       break;
00291     default:
00292       return (FALSE);
00293   }
00294   return (TRUE);
00295 }
00296
00297
00298 /*
00299  *  Get Descriptor USB Request
00300  *    Parameters:      None (global SetupPacket)
00301  *    Return Value:    TRUE - Success, FALSE - Error
00302  */
00303
00304 __inline uint32_t USB_ReqGetDescriptor (void) {
00305   uint8_t  *pD;
00306   uint32_t len, n;
00307
00308   switch (SetupPacket.bmRequestType.BM.Recipient) {
00309     case REQUEST_TO_DEVICE:
00310       switch (SetupPacket.wValue.WB.H) {
00311         case USB_DEVICE_DESCRIPTOR_TYPE:
00312           EP0Data.pData = (uint8_t *)USB_DeviceDescriptor;
00313           len = USB_DEVICE_DESC_SIZE;
00314           break;
00315         case USB_CONFIGURATION_DESCRIPTOR_TYPE:
00316           pD = (uint8_t *)USB_ConfigDescriptor;
00317           for (n = 0; n != SetupPacket.wValue.WB.L; n++) {
00318             if (((USB_CONFIGURATION_DESCRIPTOR *)pD)->bLength != 0) {
00319               pD += ((USB_CONFIGURATION_DESCRIPTOR *)pD)->wTotalLength;
00320             }
00321           }
00322           if (((USB_CONFIGURATION_DESCRIPTOR *)pD)->bLength == 0) {
00323             return (FALSE);
00324           }
00325           EP0Data.pData = pD;
00326           len = ((USB_CONFIGURATION_DESCRIPTOR *)pD)->wTotalLength;
00327           break;
00328         case USB_STRING_DESCRIPTOR_TYPE:
00329           pD = (uint8_t *)USB_StringDescriptor;
00330           for (n = 0; n != SetupPacket.wValue.WB.L; n++) {
00331             if (((USB_STRING_DESCRIPTOR *)pD)->bLength != 0) {
00332               pD += ((USB_STRING_DESCRIPTOR *)pD)->bLength;
00333             }
00334           }
00335           if (((USB_STRING_DESCRIPTOR *)pD)->bLength == 0) {
00336             return (FALSE);
00337           }
00338           EP0Data.pData = pD;
00339                   len = ((USB_STRING_DESCRIPTOR *)EP0Data.pData)->bLength;
00340           break;
00341         default:
00342           return (FALSE);
00343       }
00344       break;
00345     case REQUEST_TO_INTERFACE:
00346       switch (SetupPacket.wValue.WB.H) {
00347 #if USB_HID
00348         case HID_HID_DESCRIPTOR_TYPE:
00349           if (SetupPacket.wIndex.WB.L != USB_HID_IF_NUM) {
00350             return (FALSE);    /* Only Single HID Interface is supported */
00351           }
00352           EP0Data.pData = (uint8_t *)USB_ConfigDescriptor + HID_DESC_OFFSET;
00353           len = HID_DESC_SIZE;
00354           break;
00355         case HID_REPORT_DESCRIPTOR_TYPE:
00356           if (SetupPacket.wIndex.WB.L != USB_HID_IF_NUM) {
00357             return (FALSE);    /* Only Single HID Interface is supported */
00358           }
00359           EP0Data.pData = (uint8_t *)HID_ReportDescriptor;
00360           len = HID_ReportDescSize;
00361           break;
00362         case HID_PHYSICAL_DESCRIPTOR_TYPE:
00363           return (FALSE);      /* HID Physical Descriptor is not supported */
00364 #endif
00365         default:
00366           return (FALSE);
00367       }
00368 //      break;
00369     default:
00370       return (FALSE);
00371   }
00372
00373   if (EP0Data.Count > len) {
00374     EP0Data.Count = len;
00375   }
00376
00377   return (TRUE);
00378 }
00379
00380
00381 /*
00382  *  Get Configuration USB Request
00383  *    Parameters:      None (global SetupPacket)
00384  *    Return Value:    TRUE - Success, FALSE - Error
00385  */
00386
00387 __inline uint32_t USB_ReqGetConfiguration (void) {
00388
00389   switch (SetupPacket.bmRequestType.BM.Recipient) {
00390     case REQUEST_TO_DEVICE:
00391       EP0Data.pData = &USB_Configuration;
00392       break;
00393     default:
00394       return (FALSE);
00395   }
00396   return (TRUE);
00397 }
00398
00399
00400 /*
00401  *  Set Configuration USB Request
00402  *    Parameters:      None (global SetupPacket)
00403  *    Return Value:    TRUE - Success, FALSE - Error
00404  */
00405
00406 __inline uint32_t USB_ReqSetConfiguration (void) {
00407   USB_COMMON_DESCRIPTOR *pD;
00408   uint32_t alt = 0;
00409   uint32_t n, m;
00410   uint32_t tmp;
00411
00412   switch (SetupPacket.bmRequestType.BM.Recipient) {
00413     case REQUEST_TO_DEVICE:
00414
00415       if (SetupPacket.wValue.WB.L) {
00416         pD = (USB_COMMON_DESCRIPTOR *)USB_ConfigDescriptor;
00417         while (pD->bLength) {
00418           switch (pD->bDescriptorType) {
00419             case USB_CONFIGURATION_DESCRIPTOR_TYPE:
00420               if (((USB_CONFIGURATION_DESCRIPTOR *)pD)->bConfigurationValue == SetupPacket.wValue.WB.L) {
00421                 USB_Configuration = SetupPacket.wValue.WB.L;
00422                 USB_NumInterfaces = ((USB_CONFIGURATION_DESCRIPTOR *)pD)->bNumInterfaces;
00423                 for (n = 0; n < USB_IF_NUM; n++) {
00424                   USB_AltSetting[n] = 0;
00425                 }
00426                 for (n = 1; n < 16; n++) {
00427                   if (USB_EndPointMask & (1 << n)) {
00428                     USB_DisableEP(n);
00429                   }
00430                   if (USB_EndPointMask & ((1 << 16) << n)) {
00431                     USB_DisableEP(n | 0x80);
00432                   }
00433                 }
00434                 USB_EndPointMask = 0x00010001;
00435                 USB_EndPointHalt = 0x00000000;
00436                 USB_EndPointStall= 0x00000000;
00437                 USB_Configure(TRUE);
00438                 if (((USB_CONFIGURATION_DESCRIPTOR *)pD)->bmAttributes & USB_CONFIG_POWERED_MASK) {
00439                   USB_DeviceStatus |=  USB_GETSTATUS_SELF_POWERED;
00440                 } else {
00441                   USB_DeviceStatus &= ~USB_GETSTATUS_SELF_POWERED;
00442                 }
00443               } else {
00444 //                (uint8_t *)pD += ((USB_CONFIGURATION_DESCRIPTOR *)pD)->wTotalLength;
00445                 tmp = (uint32_t)pD;
00446                 tmp += ((USB_CONFIGURATION_DESCRIPTOR *)pD)->wTotalLength;
00447                 pD = (USB_COMMON_DESCRIPTOR *)tmp;
00448                 continue;
00449               }
00450               break;
00451             case USB_INTERFACE_DESCRIPTOR_TYPE:
00452               alt = ((USB_INTERFACE_DESCRIPTOR *)pD)->bAlternateSetting;
00453               break;
00454             case USB_ENDPOINT_DESCRIPTOR_TYPE:
00455               if (alt == 0) {
00456                 n = ((USB_ENDPOINT_DESCRIPTOR *)pD)->bEndpointAddress & 0x8F;
00457                 m = (n & 0x80) ? ((1 << 16) << (n & 0x0F)) : (1 << n);
00458                 USB_EndPointMask |= m;
00459                 USB_ConfigEP((USB_ENDPOINT_DESCRIPTOR *)pD);
00460                 USB_EnableEP(n);
00461                 USB_ResetEP(n);
00462               }
00463               break;
00464           }
00465 //          (uint8_t *)pD += pD->bLength;
00466                         tmp = (uint32_t)pD;
00467                         tmp += pD->bLength;
00468                         pD = (USB_COMMON_DESCRIPTOR *)tmp;
00469         }
00470       }
00471       else {
00472         USB_Configuration = 0;
00473         for (n = 1; n < 16; n++) {
00474           if (USB_EndPointMask & (1 << n)) {
00475             USB_DisableEP(n);
00476           }
00477           if (USB_EndPointMask & ((1 << 16) << n)) {
00478             USB_DisableEP(n | 0x80);
00479           }
00480         }
00481         USB_EndPointMask  = 0x00010001;
00482         USB_EndPointHalt  = 0x00000000;
00483         USB_EndPointStall = 0x00000000;
00484         USB_Configure(FALSE);
00485       }
00486
00487       if (USB_Configuration != SetupPacket.wValue.WB.L) {
00488         return (FALSE);
00489       }
00490       break;
00491     default:
00492       return (FALSE);
00493   }
00494   return (TRUE);
00495 }
00496
00497
00498 /*
00499  *  Get Interface USB Request
00500  *    Parameters:      None (global SetupPacket)
00501  *    Return Value:    TRUE - Success, FALSE - Error
00502  */
00503
00504 __inline uint32_t USB_ReqGetInterface (void) {
00505
00506   switch (SetupPacket.bmRequestType.BM.Recipient) {
00507     case REQUEST_TO_INTERFACE:
00508       if ((USB_Configuration != 0) && (SetupPacket.wIndex.WB.L < USB_NumInterfaces)) {
00509         EP0Data.pData = USB_AltSetting + SetupPacket.wIndex.WB.L;
00510       } else {
00511         return (FALSE);
00512       }
00513       break;
00514     default:
00515       return (FALSE);
00516   }
00517   return (TRUE);
00518 }
00519
00520
00521 /*
00522  *  Set Interface USB Request
00523  *    Parameters:      None (global SetupPacket)
00524  *    Return Value:    TRUE - Success, FALSE - Error
00525  */
00526
00527 __inline uint32_t USB_ReqSetInterface (void) {
00528   USB_COMMON_DESCRIPTOR *pD;
00529   uint32_t ifn = 0, alt = 0, old = 0, msk = 0;
00530   uint32_t n, m;
00531   uint32_t set;
00532   uint32_t tmp;
00533
00534   switch (SetupPacket.bmRequestType.BM.Recipient) {
00535     case REQUEST_TO_INTERFACE:
00536       if (USB_Configuration == 0) return (FALSE);
00537       set = FALSE;
00538       pD  = (USB_COMMON_DESCRIPTOR *)USB_ConfigDescriptor;
00539       while (pD->bLength) {
00540         switch (pD->bDescriptorType) {
00541           case USB_CONFIGURATION_DESCRIPTOR_TYPE:
00542             if (((USB_CONFIGURATION_DESCRIPTOR *)pD)->bConfigurationValue != USB_Configuration) {
00543 //              (uint8_t *)pD += ((USB_CONFIGURATION_DESCRIPTOR *)pD)->wTotalLength;
00544                 tmp = (uint32_t)pD;
00545                 tmp += ((USB_CONFIGURATION_DESCRIPTOR *)pD)->wTotalLength;
00546                 pD = (USB_COMMON_DESCRIPTOR *)tmp;
00547                 continue;
00548             }
00549             break;
00550           case USB_INTERFACE_DESCRIPTOR_TYPE:
00551             ifn = ((USB_INTERFACE_DESCRIPTOR *)pD)->bInterfaceNumber;
00552             alt = ((USB_INTERFACE_DESCRIPTOR *)pD)->bAlternateSetting;
00553             msk = 0;
00554             if ((ifn == SetupPacket.wIndex.WB.L) && (alt == SetupPacket.wValue.WB.L)) {
00555               set = TRUE;
00556               old = USB_AltSetting[ifn];
00557               USB_AltSetting[ifn] = (uint8_t)alt;
00558             }
00559             break;
00560           case USB_ENDPOINT_DESCRIPTOR_TYPE:
00561             if (ifn == SetupPacket.wIndex.WB.L) {
00562               n = ((USB_ENDPOINT_DESCRIPTOR *)pD)->bEndpointAddress & 0x8F;
00563               m = (n & 0x80) ? ((1 << 16) << (n & 0x0F)) : (1 << n);
00564               if (alt == SetupPacket.wValue.WB.L) {
00565                 USB_EndPointMask |=  m;
00566                 USB_EndPointHalt &= ~m;
00567                 USB_ConfigEP((USB_ENDPOINT_DESCRIPTOR *)pD);
00568                 USB_EnableEP(n);
00569                 USB_ResetEP(n);
00570                 msk |= m;
00571               }
00572               else if ((alt == old) && ((msk & m) == 0)) {
00573                 USB_EndPointMask &= ~m;
00574                 USB_EndPointHalt &= ~m;
00575                 USB_DisableEP(n);
00576               }
00577             }
00578            break;
00579         }
00580 //        (uint8_t *)pD += pD->bLength;
00581                         tmp = (uint32_t)pD;
00582                         tmp += pD->bLength;
00583                         pD = (USB_COMMON_DESCRIPTOR *)tmp;
00584       }
00585       break;
00586     default:
00587       return (FALSE);
00588   }
00589
00590   return (set);
00591 }
00592
00593
00594 /*
00595  *  USB Endpoint 0 Event Callback
00596  *    Parameters:      event
00597  *    Return Value:    none
00598  */
00599
00600 void USB_EndPoint0 (uint32_t event) {
00601
00602   switch (event) {
00603     case USB_EVT_SETUP:
00604       USB_SetupStage();
00605       USB_DirCtrlEP(SetupPacket.bmRequestType.BM.Dir);
00606       EP0Data.Count = SetupPacket.wLength;     /* Number of bytes to transfer */
00607       switch (SetupPacket.bmRequestType.BM.Type) {
00608
00609         case REQUEST_STANDARD:
00610           switch (SetupPacket.bRequest) {
00611             case USB_REQUEST_GET_STATUS:
00612               if (!USB_ReqGetStatus()) {
00613                 goto stall_i;
00614               }
00615               USB_DataInStage();
00616               break;
00617
00618             case USB_REQUEST_CLEAR_FEATURE:
00619               if (!USB_ReqSetClrFeature(0)) {
00620                 goto stall_i;
00621               }
00622               USB_StatusInStage();
00623 #if USB_FEATURE_EVENT
00624               USB_Feature_Event();
00625 #endif
00626               break;
00627
00628             case USB_REQUEST_SET_FEATURE:
00629               if (!USB_ReqSetClrFeature(1)) {
00630                 goto stall_i;
00631               }
00632               USB_StatusInStage();
00633 #if USB_FEATURE_EVENT
00634               USB_Feature_Event();
00635 #endif
00636               break;
00637
00638             case USB_REQUEST_SET_ADDRESS:
00639               if (!USB_ReqSetAddress()) {
00640                 goto stall_i;
00641               }
00642               USB_StatusInStage();
00643               break;
00644
00645             case USB_REQUEST_GET_DESCRIPTOR:
00646               if (!USB_ReqGetDescriptor()) {
00647                 goto stall_i;
00648               }
00649               USB_DataInStage();
00650               break;
00651
00652             case USB_REQUEST_SET_DESCRIPTOR:
00653 /*stall_o:*/  USB_SetStallEP(0x00);            /* not supported */
00654               EP0Data.Count = 0;
00655               break;
00656
00657             case USB_REQUEST_GET_CONFIGURATION:
00658               if (!USB_ReqGetConfiguration()) {
00659                 goto stall_i;
00660               }
00661               USB_DataInStage();
00662               break;
00663
00664             case USB_REQUEST_SET_CONFIGURATION:
00665               if (!USB_ReqSetConfiguration()) {
00666                 goto stall_i;
00667               }
00668               USB_StatusInStage();
00669 #if USB_CONFIGURE_EVENT
00670               USB_Configure_Event();
00671 #endif
00672               break;
00673
00674             case USB_REQUEST_GET_INTERFACE:
00675               if (!USB_ReqGetInterface()) {
00676                 goto stall_i;
00677               }
00678               USB_DataInStage();
00679               break;
00680
00681             case USB_REQUEST_SET_INTERFACE:
00682               if (!USB_ReqSetInterface()) {
00683                 goto stall_i;
00684               }
00685               USB_StatusInStage();
00686 #if USB_INTERFACE_EVENT
00687               USB_Interface_Event();
00688 #endif
00689               break;
00690
00691             default:
00692               goto stall_i;
00693           }
00694           break;  /* end case REQUEST_STANDARD */
00695
00696 #if USB_CLASS
00697         case REQUEST_CLASS:
00698           switch (SetupPacket.bmRequestType.BM.Recipient) {
00699
00700             case REQUEST_TO_DEVICE:
00701               goto stall_i;                                              /* not supported */
00702
00703             case REQUEST_TO_INTERFACE:
00704 #if USB_HID
00705               if (SetupPacket.wIndex.WB.L == USB_HID_IF_NUM) {           /* IF number correct? */
00706                 switch (SetupPacket.bRequest) {
00707                   case HID_REQUEST_GET_REPORT:
00708                     if (HID_GetReport()) {
00709                       EP0Data.pData = EP0Buf;                            /* point to data to be sent */
00710                       USB_DataInStage();                                 /* send requested data */
00711                       goto setup_class_ok;
00712                     }
00713                     break;
00714                   case HID_REQUEST_SET_REPORT:
00715                     EP0Data.pData = EP0Buf;                              /* data to be received */
00716                     goto setup_class_ok;
00717                   case HID_REQUEST_GET_IDLE:
00718                     if (HID_GetIdle()) {
00719                       EP0Data.pData = EP0Buf;                            /* point to data to be sent */
00720                       USB_DataInStage();                                 /* send requested data */
00721                       goto setup_class_ok;
00722                     }
00723                     break;
00724                   case HID_REQUEST_SET_IDLE:
00725                     if (HID_SetIdle()) {
00726                       USB_StatusInStage();                               /* send Acknowledge */
00727                       goto setup_class_ok;
00728                     }
00729                     break;
00730                   case HID_REQUEST_GET_PROTOCOL:
00731                     if (HID_GetProtocol()) {
00732                       EP0Data.pData = EP0Buf;                            /* point to data to be sent */
00733                       USB_DataInStage();                                 /* send requested data */
00734                       goto setup_class_ok;
00735                     }
00736                     break;
00737                   case HID_REQUEST_SET_PROTOCOL:
00738                     if (HID_SetProtocol()) {
00739                       USB_StatusInStage();                               /* send Acknowledge */
00740                       goto setup_class_ok;
00741                     }
00742                     break;
00743                 }
00744               }
00745 #endif  /* USB_HID */
00746 #if USB_MSC
00747               if (SetupPacket.wIndex.WB.L == USB_MSC_IF_NUM) {           /* IF number correct? */
00748                 switch (SetupPacket.bRequest) {
00749                   case MSC_REQUEST_RESET:
00750                     if ((SetupPacket.wValue.W == 0) &&                   /* RESET with invalid parameters -> STALL */
00751                         (SetupPacket.wLength  == 0)) {
00752                       if (MSC_Reset()) {
00753                         USB_StatusInStage();
00754                         goto setup_class_ok;
00755                       }
00756                     }
00757                     break;
00758                   case MSC_REQUEST_GET_MAX_LUN:
00759                     if ((SetupPacket.wValue.W == 0) &&                   /* GET_MAX_LUN with invalid parameters -> STALL */
00760                         (SetupPacket.wLength  == 1)) {
00761                       if (MSC_GetMaxLUN()) {
00762                         EP0Data.pData = EP0Buf;
00763                         USB_DataInStage();
00764                         goto setup_class_ok;
00765                       }
00766                     }
00767                     break;
00768                 }
00769               }
00770 #endif  /* USB_MSC */
00771 #if USB_AUDIO
00772               if ((SetupPacket.wIndex.WB.L == USB_ADC_CIF_NUM)  ||       /* IF number correct? */
00773                   (SetupPacket.wIndex.WB.L == USB_ADC_SIF1_NUM) ||
00774                   (SetupPacket.wIndex.WB.L == USB_ADC_SIF2_NUM)) {
00775                 switch (SetupPacket.bRequest) {
00776                   case AUDIO_REQUEST_GET_CUR:
00777                   case AUDIO_REQUEST_GET_MIN:
00778                   case AUDIO_REQUEST_GET_MAX:
00779                   case AUDIO_REQUEST_GET_RES:
00780                     if (ADC_IF_GetRequest()) {
00781                       EP0Data.pData = EP0Buf;                            /* point to data to be sent */
00782                       USB_DataInStage();                                 /* send requested data */
00783                       goto setup_class_ok;
00784                     }
00785                     break;
00786                   case AUDIO_REQUEST_SET_CUR:
00787 //                case AUDIO_REQUEST_SET_MIN:
00788 //                case AUDIO_REQUEST_SET_MAX:
00789 //                case AUDIO_REQUEST_SET_RES:
00790                     EP0Data.pData = EP0Buf;                              /* data to be received */
00791                     goto setup_class_ok;
00792                 }
00793               }
00794 #endif  /* USB_AUDIO */
00795 #if USB_CDC
00796               if ((SetupPacket.wIndex.WB.L == USB_CDC_CIF_NUM)  ||       /* IF number correct? */
00797                   (SetupPacket.wIndex.WB.L == USB_CDC_DIF_NUM)) {
00798                 switch (SetupPacket.bRequest) {
00799                   case CDC_SEND_ENCAPSULATED_COMMAND:
00800                     EP0Data.pData = EP0Buf;                              /* data to be received, see USB_EVT_OUT */
00801                     goto setup_class_ok;
00802                   case CDC_GET_ENCAPSULATED_RESPONSE:
00803                     if (CDC_GetEncapsulatedResponse()) {
00804                       EP0Data.pData = EP0Buf;                            /* point to data to be sent */
00805                       USB_DataInStage();                                 /* send requested data */
00806                       goto setup_class_ok;
00807                     }
00808                     break;
00809                   case CDC_SET_COMM_FEATURE:
00810                     EP0Data.pData = EP0Buf;                              /* data to be received, see USB_EVT_OUT */
00811                     goto setup_class_ok;
00812                   case CDC_GET_COMM_FEATURE:
00813                     if (CDC_GetCommFeature(SetupPacket.wValue.W)) {
00814                       EP0Data.pData = EP0Buf;                            /* point to data to be sent */
00815                       USB_DataInStage();                                 /* send requested data */
00816                       goto setup_class_ok;
00817                     }
00818                     break;
00819                   case CDC_CLEAR_COMM_FEATURE:
00820                     if (CDC_ClearCommFeature(SetupPacket.wValue.W)) {
00821                       USB_StatusInStage();                               /* send Acknowledge */
00822                       goto setup_class_ok;
00823                     }
00824                     break;
00825                   case CDC_SET_LINE_CODING:
00826                     EP0Data.pData = EP0Buf;                              /* data to be received, see USB_EVT_OUT */
00827                     goto setup_class_ok;
00828                   case CDC_GET_LINE_CODING:
00829                     if (CDC_GetLineCoding()) {
00830                       EP0Data.pData = EP0Buf;                            /* point to data to be sent */
00831                       USB_DataInStage();                                 /* send requested data */
00832                       goto setup_class_ok;
00833                     }
00834                     break;
00835                   case CDC_SET_CONTROL_LINE_STATE:
00836                     if (CDC_SetControlLineState(SetupPacket.wValue.W)) {
00837                       USB_StatusInStage();                               /* send Acknowledge */
00838                       goto setup_class_ok;
00839                     }
00840                     break;
00841                   case CDC_SEND_BREAK:
00842                     if (CDC_SendBreak(SetupPacket.wValue.W)) {
00843                       USB_StatusInStage();                               /* send Acknowledge */
00844                       goto setup_class_ok;
00845                     }
00846                     break;
00847                 }
00848               }
00849 #endif  /* USB_CDC */
00850               goto stall_i;                                              /* not supported */
00851               /* end case REQUEST_TO_INTERFACE */
00852
00853             case REQUEST_TO_ENDPOINT:
00854 #if USB_AUDIO
00855               switch (SetupPacket.bRequest) {
00856                 case AUDIO_REQUEST_GET_CUR:
00857                 case AUDIO_REQUEST_GET_MIN:
00858                 case AUDIO_REQUEST_GET_MAX:
00859                 case AUDIO_REQUEST_GET_RES:
00860                   if (ADC_EP_GetRequest()) {
00861                     EP0Data.pData = EP0Buf;                              /* point to data to be sent */
00862                     USB_DataInStage();                                   /* send requested data */
00863                     goto setup_class_ok;
00864                   }
00865                   break;
00866                 case AUDIO_REQUEST_SET_CUR:
00867 //              case AUDIO_REQUEST_SET_MIN:
00868 //              case AUDIO_REQUEST_SET_MAX:
00869 //              case AUDIO_REQUEST_SET_RES:
00870                   EP0Data.pData = EP0Buf;                                /* data to be received */
00871                   goto setup_class_ok;
00872               }
00873 #endif  /* USB_AUDIO */
00874               goto stall_i;
00875               /* end case REQUEST_TO_ENDPOINT */
00876
00877             default:
00878               goto stall_i;
00879           }
00880 setup_class_ok:                                                          /* request finished successfully */
00881           break;  /* end case REQUEST_CLASS */
00882 #endif  /* USB_CLASS */
00883
00884 #if USB_VENDOR
00885         case REQUEST_VENDOR:
00886           switch (SetupPacket.bmRequestType.BM.Recipient) {
00887
00888             case REQUEST_TO_DEVICE:
00889               if (!USB_ReqVendorDev(TRUE)) {
00890                 goto stall_i;                                            /* not supported */
00891               }
00892               break;
00893
00894             case REQUEST_TO_INTERFACE:
00895               if (!USB_ReqVendorIF(TRUE)) {
00896                 goto stall_i;                                            /* not supported */
00897               }
00898               break;
00899
00900             case REQUEST_TO_ENDPOINT:
00901               if (!USB_ReqVendorEP(TRUE)) {
00902                 goto stall_i;                                            /* not supported */
00903               }
00904               break;
00905
00906             default:
00907               goto stall_i;
00908           }
00909
00910           if (SetupPacket.wLength) {
00911             if (SetupPacket.bmRequestType.BM.Dir == REQUEST_DEVICE_TO_HOST) {
00912               USB_DataInStage();
00913             }
00914           } else {
00915             USB_StatusInStage();
00916           }
00917
00918           break;  /* end case REQUEST_VENDOR */
00919 #endif  /* USB_VENDOR */
00920
00921         default:
00922 stall_i:  USB_SetStallEP(0x80);
00923           EP0Data.Count = 0;
00924           break;
00925       }
00926       break;  /* end case USB_EVT_SETUP */
00927
00928     case USB_EVT_OUT:
00929       if (SetupPacket.bmRequestType.BM.Dir == REQUEST_HOST_TO_DEVICE) {
00930         if (EP0Data.Count) {                                             /* still data to receive ? */
00931           USB_DataOutStage();                                            /* receive data */
00932           if (EP0Data.Count == 0) {                                      /* data complete ? */
00933             switch (SetupPacket.bmRequestType.BM.Type) {
00934
00935               case REQUEST_STANDARD:
00936                 goto stall_i;                                            /* not supported */
00937
00938 #if (USB_CLASS)
00939               case REQUEST_CLASS:
00940                 switch (SetupPacket.bmRequestType.BM.Recipient) {
00941                   case REQUEST_TO_DEVICE:
00942                     goto stall_i;                                        /* not supported */
00943
00944                   case REQUEST_TO_INTERFACE:
00945 #if USB_HID
00946                     if (SetupPacket.wIndex.WB.L == USB_HID_IF_NUM) {     /* IF number correct? */
00947                       switch (SetupPacket.bRequest) {
00948                         case HID_REQUEST_SET_REPORT:
00949                           if (HID_SetReport()) {
00950                             USB_StatusInStage();                         /* send Acknowledge */
00951                             goto out_class_ok;
00952                           }
00953                           break;
00954                       }
00955                     }
00956 #endif  /* USB_HID */
00957 #if USB_AUDIO
00958                     if ((SetupPacket.wIndex.WB.L == USB_ADC_CIF_NUM)  || /* IF number correct? */
00959                         (SetupPacket.wIndex.WB.L == USB_ADC_SIF1_NUM) ||
00960                         (SetupPacket.wIndex.WB.L == USB_ADC_SIF2_NUM)) {
00961                       switch (SetupPacket.bRequest) {
00962                         case AUDIO_REQUEST_SET_CUR:
00963 //                      case AUDIO_REQUEST_SET_MIN:
00964 //                      case AUDIO_REQUEST_SET_MAX:
00965 //                      case AUDIO_REQUEST_SET_RES:
00966                           if (ADC_IF_SetRequest()) {
00967                             USB_StatusInStage();                         /* send Acknowledge */
00968                             goto out_class_ok;
00969                           }
00970                           break;
00971                       }
00972                     }
00973 #endif  /* USB_AUDIO */
00974 #if USB_CDC
00975                     if ((SetupPacket.wIndex.WB.L == USB_CDC_CIF_NUM)  || /* IF number correct? */
00976                         (SetupPacket.wIndex.WB.L == USB_CDC_DIF_NUM)) {
00977                       switch (SetupPacket.bRequest) {
00978                         case CDC_SEND_ENCAPSULATED_COMMAND:
00979                           if (CDC_SendEncapsulatedCommand()) {
00980                             USB_StatusInStage();                         /* send Acknowledge */
00981                             goto out_class_ok;
00982                           }
00983                           break;
00984                         case CDC_SET_COMM_FEATURE:
00985                           if (CDC_SetCommFeature(SetupPacket.wValue.W)) {
00986                             USB_StatusInStage();                         /* send Acknowledge */
00987                             goto out_class_ok;
00988                           }
00989                           break;
00990                         case CDC_SET_LINE_CODING:
00991                           if (CDC_SetLineCoding()) {
00992                             USB_StatusInStage();                         /* send Acknowledge */
00993                             goto out_class_ok;
00994                           }
00995                           break;
00996                       }
00997                     }
00998 #endif  /* USB_CDC */
00999                     goto stall_i;
01000                     /* end case REQUEST_TO_INTERFACE */
01001
01002                   case REQUEST_TO_ENDPOINT:
01003 #if USB_AUDIO
01004                     switch (SetupPacket.bRequest) {
01005                       case AUDIO_REQUEST_SET_CUR:
01006 //                    case AUDIO_REQUEST_SET_MIN:
01007 //                    case AUDIO_REQUEST_SET_MAX:
01008 //                    case AUDIO_REQUEST_SET_RES:
01009                         if (ADC_EP_SetRequest()) {
01010                           USB_StatusInStage();                           /* send Acknowledge */
01011                           goto out_class_ok;
01012                         }
01013                         break;
01014                     }
01015 #endif  /* USB_AUDIO */
01016                     goto stall_i;
01017                     /* end case REQUEST_TO_ENDPOINT */
01018
01019                   default:
01020                     goto stall_i;
01021                 }
01022 out_class_ok:                                                            /* request finished successfully */
01023                 break; /* end case REQUEST_CLASS */
01024 #endif  /* USB_CLASS */
01025
01026 #if USB_VENDOR
01027               case REQUEST_VENDOR:
01028                 switch (SetupPacket.bmRequestType.BM.Recipient) {
01029
01030                   case REQUEST_TO_DEVICE:
01031                     if (!USB_ReqVendorDev(FALSE)) {
01032                       goto stall_i;                                      /* not supported */
01033                     }
01034                     break;
01035
01036                   case REQUEST_TO_INTERFACE:
01037                     if (!USB_ReqVendorIF(FALSE)) {
01038                       goto stall_i;                                      /* not supported */
01039                     }
01040                     break;
01041
01042                   case REQUEST_TO_ENDPOINT:
01043                     if (!USB_ReqVendorEP(FALSE)) {
01044                       goto stall_i;                                      /* not supported */
01045                     }
01046                     break;
01047
01048                   default:
01049                     goto stall_i;
01050                 }
01051
01052                 USB_StatusInStage();
01053
01054                 break;  /* end case REQUEST_VENDOR */
01055 #endif  /* USB_VENDOR */
01056
01057               default:
01058                 goto stall_i;
01059             }
01060           }
01061         }
01062       } else {
01063         USB_StatusOutStage();                                            /* receive Acknowledge */
01064       }
01065       break;  /* end case USB_EVT_OUT */
01066
01067     case USB_EVT_IN :
01068       if (SetupPacket.bmRequestType.BM.Dir == REQUEST_DEVICE_TO_HOST) {
01069         USB_DataInStage();                                               /* send data */
01070       } else {
01071         if (USB_DeviceAddress & 0x80) {
01072           USB_DeviceAddress &= 0x7F;
01073           USB_SetAddress(USB_DeviceAddress);
01074         }
01075       }
01076       break;  /* end case USB_EVT_IN */
01077
01078     case USB_EVT_OUT_STALL:
01079       USB_ClrStallEP(0x00);
01080       break;
01081
01082     case USB_EVT_IN_STALL:
01083       USB_ClrStallEP(0x80);
01084       break;
01085
01086   }
01087 }
Generated on Tue Jun 7 14:59:04 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBAudio/usbcore.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBAudio/usbcore.h

Go to the documentation of this file.
00001 /*----------------------------------------------------------------------------
00002  *      U S B  -  K e r n e l
00003  *----------------------------------------------------------------------------
00004  * Name:    usbcore.h
00005  * Purpose: USB Core Definitions
00006  * Version: V1.20
00007  *----------------------------------------------------------------------------
00008  *      This software is supplied "AS IS" without any warranties, express,
00009  *      implied or statutory, including but not limited to the implied
00010  *      warranties of fitness for purpose, satisfactory quality and
00011  *      noninfringement. Keil extends you a royalty-free right to reproduce
00012  *      and distribute executable files created using this software for use
00013  *      on NXP Semiconductors LPC family microcontroller devices only. Nothing
00014  *      else gives you the right to use this software.
00015  *
00016  * Copyright (c) 2009 Keil - An ARM Company. All rights reserved.
00017  *---------------------------------------------------------------------------*/
00018
00019 #ifndef __USBCORE_H__
00020 #define __USBCORE_H__
00021
00022
00023 /* USB Endpoint Data Structure */
00024 typedef struct _USB_EP_DATA {
00025   uint8_t  *pData;
00026   uint16_t Count;
00027 } USB_EP_DATA;
00028
00029 /* USB Core Global Variables */
00030 extern uint16_t USB_DeviceStatus;
00031 extern uint8_t  USB_DeviceAddress;
00032 extern uint8_t  USB_Configuration;
00033 extern uint32_t USB_EndPointMask;
00034 extern uint32_t USB_EndPointHalt;
00035 extern uint32_t USB_EndPointStall;
00036 extern uint8_t  USB_AltSetting[USB_IF_NUM];
00037
00038 /* USB Endpoint 0 Buffer */
00039 extern uint8_t  EP0Buf[USB_MAX_PACKET0];
00040
00041 /* USB Endpoint 0 Data Info */
00042 extern USB_EP_DATA EP0Data;
00043
00044 /* USB Setup Packet */
00045 extern USB_SETUP_PACKET SetupPacket;
00046
00047 /* USB Core Functions */
00048 extern void USB_ResetCore (void);
00049
00050
00051
00052 #endif  /* __USBCORE_H__ */
Generated on Tue Jun 7 14:59:04 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBAudio/usbdesc.c Source File

C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBAudio/usbdesc.c

Go to the documentation of this file.
00001 /*----------------------------------------------------------------------------
00002  *      U S B  -  K e r n e l
00003  *----------------------------------------------------------------------------
00004  * Name:    usbdesc.c
00005  * Purpose: USB Descriptors
00006  * Version: V1.20
00007  *----------------------------------------------------------------------------
00008  *      This software is supplied "AS IS" without any warranties, express,
00009  *      implied or statutory, including but not limited to the implied
00010  *      warranties of fitness for purpose, satisfactory quality and
00011  *      noninfringement. Keil extends you a royalty-free right to reproduce
00012  *      and distribute executable files created using this software for use
00013  *      on NXP Semiconductors LPC family microcontroller devices only. Nothing
00014  *      else gives you the right to use this software.
00015  *
00016  * Copyright (c) 2009 Keil - An ARM Company. All rights reserved.
00017  *----------------------------------------------------------------------------
00018  * History:
00019  *          V1.20 Changed string descriptor handling
00020  *          V1.00 Initial Version
00021  *----------------------------------------------------------------------------*/
00022 #include "lpc_types.h"
00023
00024 #include "usb.h"
00025 #include "audio.h"
00026 #include "usbcfg.h"
00027 #include "usbdesc.h"
00028
00029
00030 /* USB Standard Device Descriptor */
00031 const uint8_t USB_DeviceDescriptor[] = {
00032   USB_DEVICE_DESC_SIZE,              /* bLength */
00033   USB_DEVICE_DESCRIPTOR_TYPE,        /* bDescriptorType */
00034   WBVAL(0x0200), /* 2.00 */          /* bcdUSB */
00035   0x00,                              /* bDeviceClass */
00036   0x00,                              /* bDeviceSubClass */
00037   0x00,                              /* bDeviceProtocol */
00038   USB_MAX_PACKET0,                   /* bMaxPacketSize0 */
00039   WBVAL(0x1FC9),                     /* idVendor */
00040   WBVAL(0x4002),                     /* idProduct */
00041   WBVAL(0x0100), /* 1.00 */          /* bcdDevice */
00042   0x01,                              /* iManufacturer */
00043   0x02,                              /* iProduct */
00044   0x03,                              /* iSerialNumber */
00045   0x01                               /* bNumConfigurations: one possible configuration*/
00046 };
00047
00048 /* USB Configuration Descriptor */
00049 /*   All Descriptors (Configuration, Interface, Endpoint, Class, Vendor */
00050 const uint8_t USB_ConfigDescriptor[] = {
00051 /* Configuration 1 */
00052   USB_CONFIGUARTION_DESC_SIZE,          /* bLength */
00053   USB_CONFIGURATION_DESCRIPTOR_TYPE,    /* bDescriptorType */
00054   WBVAL(                                /* wTotalLength */
00055     USB_CONFIGUARTION_DESC_SIZE         +
00056     USB_INTERFACE_DESC_SIZE             +
00057     AUDIO_CONTROL_INTERFACE_DESC_SZ(1)  +
00058     AUDIO_INPUT_TERMINAL_DESC_SIZE      +
00059     AUDIO_FEATURE_UNIT_DESC_SZ(1,1)     +
00060     AUDIO_OUTPUT_TERMINAL_DESC_SIZE     +
00061     USB_INTERFACE_DESC_SIZE             +
00062     USB_INTERFACE_DESC_SIZE             +
00063     AUDIO_STREAMING_INTERFACE_DESC_SIZE +
00064     AUDIO_FORMAT_TYPE_I_DESC_SZ(1)      +
00065     AUDIO_STANDARD_ENDPOINT_DESC_SIZE   +
00066     AUDIO_STREAMING_ENDPOINT_DESC_SIZE
00067   ),
00068   0x02,                                 /* bNumInterfaces */
00069   0x01,                                 /* bConfigurationValue */
00070   0x00,                                 /* iConfiguration */
00071   USB_CONFIG_BUS_POWERED,               /* bmAttributes */
00072   USB_CONFIG_POWER_MA(100),             /* bMaxPower */
00073 /* Interface 0, Alternate Setting 0, Audio Control */
00074   USB_INTERFACE_DESC_SIZE,              /* bLength */
00075   USB_INTERFACE_DESCRIPTOR_TYPE,        /* bDescriptorType */
00076   0x00,                                 /* bInterfaceNumber */
00077   0x00,                                 /* bAlternateSetting */
00078   0x00,                                 /* bNumEndpoints */
00079   USB_DEVICE_CLASS_AUDIO,               /* bInterfaceClass */
00080   AUDIO_SUBCLASS_AUDIOCONTROL,          /* bInterfaceSubClass */
00081   AUDIO_PROTOCOL_UNDEFINED,             /* bInterfaceProtocol */
00082   0x00,                                 /* iInterface */
00083 /* Audio Control Interface */
00084   AUDIO_CONTROL_INTERFACE_DESC_SZ(1),   /* bLength */
00085   AUDIO_INTERFACE_DESCRIPTOR_TYPE,      /* bDescriptorType */
00086   AUDIO_CONTROL_HEADER,                 /* bDescriptorSubtype */
00087   WBVAL(0x0100), /* 1.00 */             /* bcdADC */
00088   WBVAL(                                /* wTotalLength */
00089     AUDIO_CONTROL_INTERFACE_DESC_SZ(1) +
00090     AUDIO_INPUT_TERMINAL_DESC_SIZE     +
00091     AUDIO_FEATURE_UNIT_DESC_SZ(1,1)    +
00092     AUDIO_OUTPUT_TERMINAL_DESC_SIZE
00093   ),
00094   0x01,                                 /* bInCollection */
00095   0x01,                                 /* baInterfaceNr */
00096 /* Audio Input Terminal */
00097   AUDIO_INPUT_TERMINAL_DESC_SIZE,       /* bLength */
00098   AUDIO_INTERFACE_DESCRIPTOR_TYPE,      /* bDescriptorType */
00099   AUDIO_CONTROL_INPUT_TERMINAL,         /* bDescriptorSubtype */
00100   0x01,                                 /* bTerminalID */
00101   WBVAL(AUDIO_TERMINAL_USB_STREAMING),  /* wTerminalType */
00102   0x00,                                 /* bAssocTerminal */
00103   0x01,                                 /* bNrChannels */
00104   WBVAL(AUDIO_CHANNEL_M),               /* wChannelConfig */
00105   0x00,                                 /* iChannelNames */
00106   0x00,                                 /* iTerminal */
00107 /* Audio Feature Unit */
00108   AUDIO_FEATURE_UNIT_DESC_SZ(1,1),      /* bLength */
00109   AUDIO_INTERFACE_DESCRIPTOR_TYPE,      /* bDescriptorType */
00110   AUDIO_CONTROL_FEATURE_UNIT,           /* bDescriptorSubtype */
00111   0x02,                                 /* bUnitID */
00112   0x01,                                 /* bSourceID */
00113   0x01,                                 /* bControlSize */
00114   AUDIO_CONTROL_MUTE |
00115   AUDIO_CONTROL_VOLUME,                 /* bmaControls(0) */
00116   0x00,                                 /* bmaControls(1) */
00117   0x00,                                 /* iTerminal */
00118 /* Audio Output Terminal */
00119   AUDIO_OUTPUT_TERMINAL_DESC_SIZE,      /* bLength */
00120   AUDIO_INTERFACE_DESCRIPTOR_TYPE,      /* bDescriptorType */
00121   AUDIO_CONTROL_OUTPUT_TERMINAL,        /* bDescriptorSubtype */
00122   0x03,                                 /* bTerminalID */
00123   WBVAL(AUDIO_TERMINAL_SPEAKER),        /* wTerminalType */
00124   0x00,                                 /* bAssocTerminal */
00125   0x02,                                 /* bSourceID */
00126   0x00,                                 /* iTerminal */
00127 /* Interface 1, Alternate Setting 0, Audio Streaming - Zero Bandwith */
00128   USB_INTERFACE_DESC_SIZE,              /* bLength */
00129   USB_INTERFACE_DESCRIPTOR_TYPE,        /* bDescriptorType */
00130   0x01,                                 /* bInterfaceNumber */
00131   0x00,                                 /* bAlternateSetting */
00132   0x00,                                 /* bNumEndpoints */
00133   USB_DEVICE_CLASS_AUDIO,               /* bInterfaceClass */
00134   AUDIO_SUBCLASS_AUDIOSTREAMING,        /* bInterfaceSubClass */
00135   AUDIO_PROTOCOL_UNDEFINED,             /* bInterfaceProtocol */
00136   0x00,                                 /* iInterface */
00137 /* Interface 1, Alternate Setting 1, Audio Streaming - Operational */
00138   USB_INTERFACE_DESC_SIZE,              /* bLength */
00139   USB_INTERFACE_DESCRIPTOR_TYPE,        /* bDescriptorType */
00140   0x01,                                 /* bInterfaceNumber */
00141   0x01,                                 /* bAlternateSetting */
00142   0x01,                                 /* bNumEndpoints */
00143   USB_DEVICE_CLASS_AUDIO,               /* bInterfaceClass */
00144   AUDIO_SUBCLASS_AUDIOSTREAMING,        /* bInterfaceSubClass */
00145   AUDIO_PROTOCOL_UNDEFINED,             /* bInterfaceProtocol */
00146   0x00,                                 /* iInterface */
00147 /* Audio Streaming Interface */
00148   AUDIO_STREAMING_INTERFACE_DESC_SIZE,  /* bLength */
00149   AUDIO_INTERFACE_DESCRIPTOR_TYPE,      /* bDescriptorType */
00150   AUDIO_STREAMING_GENERAL,              /* bDescriptorSubtype */
00151   0x01,                                 /* bTerminalLink */
00152   0x01,                                 /* bDelay */
00153   WBVAL(AUDIO_FORMAT_PCM),              /* wFormatTag */
00154 /* Audio Type I Format */
00155   AUDIO_FORMAT_TYPE_I_DESC_SZ(1),       /* bLength */
00156   AUDIO_INTERFACE_DESCRIPTOR_TYPE,      /* bDescriptorType */
00157   AUDIO_STREAMING_FORMAT_TYPE,          /* bDescriptorSubtype */
00158   AUDIO_FORMAT_TYPE_I,                  /* bFormatType */
00159   0x01,                                 /* bNrChannels */
00160   0x02,                                 /* bSubFrameSize */
00161   16,                                   /* bBitResolution */
00162   0x01,                                 /* bSamFreqType */
00163   B3VAL(32000),                         /* tSamFreq */
00164 /* Endpoint - Standard Descriptor */
00165   AUDIO_STANDARD_ENDPOINT_DESC_SIZE,    /* bLength */
00166   USB_ENDPOINT_DESCRIPTOR_TYPE,         /* bDescriptorType */
00167   USB_ENDPOINT_OUT(3),                  /* bEndpointAddress */
00168   USB_ENDPOINT_TYPE_ISOCHRONOUS,        /* bmAttributes */
00169   WBVAL(64),                            /* wMaxPacketSize */
00170   0x01,                                 /* bInterval */
00171   0x00,                                 /* bRefresh */
00172   0x00,                                 /* bSynchAddress */
00173 /* Endpoint - Audio Streaming */
00174   AUDIO_STREAMING_ENDPOINT_DESC_SIZE,   /* bLength */
00175   AUDIO_ENDPOINT_DESCRIPTOR_TYPE,       /* bDescriptorType */
00176   AUDIO_ENDPOINT_GENERAL,               /* bDescriptor */
00177   0x00,                                 /* bmAttributes */
00178   0x00,                                 /* bLockDelayUnits */
00179   WBVAL(0x0000),                        /* wLockDelay */
00180 /* Terminator */
00181   0                                     /* bLength */
00182 };
00183
00184 /* USB String Descriptor (optional) */
00185 const uint8_t USB_StringDescriptor[] = {
00186 /* Index 0x00: LANGID Codes */
00187   0x04,                              /* bLength */
00188   USB_STRING_DESCRIPTOR_TYPE,        /* bDescriptorType */
00189   WBVAL(0x0409), /* US English */    /* wLANGID */
00190 /* Index 0x01: Manufacturer */
00191   (13*2 + 2),                        /* bLength (13 Char + Type + lenght) */
00192   USB_STRING_DESCRIPTOR_TYPE,        /* bDescriptorType */
00193   'N',0,
00194   'X',0,
00195   'P',0,
00196   ' ',0,
00197   'S',0,
00198   'e',0,
00199   'm',0,
00200   'i',0,
00201   'c',0,
00202   'o',0,
00203   'n',0,
00204   'd',0,
00205   ' ',0,
00206 /* Index 0x02: Product */
00207   (20*2 + 2),                        /* bLength ( 20 Char + Type + lenght) */
00208   USB_STRING_DESCRIPTOR_TYPE,        /* bDescriptorType */
00209   'N',0,
00210   'X',0,
00211   'P',0,
00212   ' ',0,
00213   'L',0,
00214   'P',0,
00215   'C',0,
00216   '1',0,
00217   '7',0,
00218   'x',0,
00219   'x',0,
00220   ' ',0,
00221   'S',0,
00222   'p',0,
00223   'e',0,
00224   'a',0,
00225   'k',0,
00226   'e',0,
00227   'r',0,
00228   ' ',0,
00229 /* Index 0x03: Serial Number */
00230   (12*2 + 2),                        /* bLength (12 Char + Type + lenght) */
00231   USB_STRING_DESCRIPTOR_TYPE,        /* bDescriptorType */
00232   'D',0,
00233   'E',0,
00234   'M',0,
00235   'O',0,
00236   '0',0,
00237   '0',0,
00238   '0',0,
00239   '0',0,
00240   '0',0,
00241   '0',0,
00242   '0',0,
00243   '0',0,
00244 };
Generated on Tue Jun 7 14:59:04 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBAudio/usbdesc.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBAudio/usbdesc.h

Go to the documentation of this file.
00001 /*----------------------------------------------------------------------------
00002  *      U S B  -  K e r n e l
00003  *----------------------------------------------------------------------------
00004  * Name:    usbdesc.h
00005  * Purpose: USB Descriptors Definitions
00006  * Version: V1.20
00007  *----------------------------------------------------------------------------
00008  *      This software is supplied "AS IS" without any warranties, express,
00009  *      implied or statutory, including but not limited to the implied
00010  *      warranties of fitness for purpose, satisfactory quality and
00011  *      noninfringement. Keil extends you a royalty-free right to reproduce
00012  *      and distribute executable files created using this software for use
00013  *      on NXP Semiconductors LPC family microcontroller devices only. Nothing
00014  *      else gives you the right to use this software.
00015  *
00016  * Copyright (c) 2009 Keil - An ARM Company. All rights reserved.
00017  *---------------------------------------------------------------------------*/
00018
00019 #ifndef __USBDESC_H__
00020 #define __USBDESC_H__
00021
00022
00023 #define WBVAL(x) (x & 0xFF),((x >> 8) & 0xFF)
00024 #define B3VAL(x) (x & 0xFF),((x >> 8) & 0xFF),((x >> 16) & 0xFF)
00025
00026 #define USB_DEVICE_DESC_SIZE        (sizeof(USB_DEVICE_DESCRIPTOR))
00027 #define USB_CONFIGUARTION_DESC_SIZE (sizeof(USB_CONFIGURATION_DESCRIPTOR))
00028 #define USB_INTERFACE_DESC_SIZE     (sizeof(USB_INTERFACE_DESCRIPTOR))
00029 #define USB_ENDPOINT_DESC_SIZE      (sizeof(USB_ENDPOINT_DESCRIPTOR))
00030
00031 extern const uint8_t USB_DeviceDescriptor[];
00032 extern const uint8_t USB_ConfigDescriptor[];
00033 extern const uint8_t USB_StringDescriptor[];
00034
00035
00036 #endif  /* __USBDESC_H__ */
Generated on Tue Jun 7 14:59:04 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBAudio/usbhw.c Source File

C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBAudio/usbhw.c

Go to the documentation of this file.
00001 /*----------------------------------------------------------------------------
00002  *      U S B  -  K e r n e l
00003  *----------------------------------------------------------------------------
00004  * Name:    usbhw.c
00005  * Purpose: USB Hardware Layer Module for NXP's LPC17xx MCU
00006  * Version: V1.20
00007  *----------------------------------------------------------------------------
00008  *      This software is supplied "AS IS" without any warranties, express,
00009  *      implied or statutory, including but not limited to the implied
00010  *      warranties of fitness for purpose, satisfactory quality and
00011  *      noninfringement. Keil extends you a royalty-free right to reproduce
00012  *      and distribute executable files created using this software for use
00013  *      on NXP Semiconductors LPC family microcontroller devices only. Nothing
00014  *      else gives you the right to use this software.
00015  *
00016  * Copyright (c) 2009 Keil - An ARM Company. All rights reserved.
00017  *----------------------------------------------------------------------------
00018  * History:
00019  *          V1.20 Added USB_ClearEPBuf
00020  *          V1.00 Initial Version
00021  *----------------------------------------------------------------------------*/
00022 #include "LPC17xx.h"                        /* LPC17xx definitions */
00023 #include "lpc_types.h"
00024
00025 #include "usb.h"
00026 #include "usbcfg.h"
00027 #include "usbreg.h"
00028 #include "usbhw.h"
00029 #include "usbcore.h"
00030 #include "usbuser.h"
00031
00032 #if defined  (  __CC_ARM__  )
00033 #pragma diag_suppress 1441
00034 #endif
00035
00036
00037 #define EP_MSK_CTRL 0x0001      /* Control Endpoint Logical Address Mask */
00038 #define EP_MSK_BULK 0xC924      /* Bulk Endpoint Logical Address Mask */
00039 #define EP_MSK_INT  0x4492      /* Interrupt Endpoint Logical Address Mask */
00040 #define EP_MSK_ISO  0x1248      /* Isochronous Endpoint Logical Address Mask */
00041
00042
00043 #if USB_DMA
00044
00045 #pragma arm section zidata = "USB_RAM"
00046 uint32_t UDCA[USB_EP_NUM];                     /* UDCA in USB RAM */
00047
00048 uint32_t DD_NISO_Mem[4*DD_NISO_CNT];           /* Non-Iso DMA Descriptor Memory */
00049 uint32_t DD_ISO_Mem [5*DD_ISO_CNT];            /* Iso DMA Descriptor Memory */
00050 #pragma arm section zidata
00051 uint32_t udca[USB_EP_NUM];                     /* UDCA saved values */
00052
00053 uint32_t DDMemMap[2];                          /* DMA Descriptor Memory Usage */
00054
00055 #endif
00056
00057
00058 /*
00059  *  Get Endpoint Physical Address
00060  *    Parameters:      EPNum: Endpoint Number
00061  *                       EPNum.0..3: Address
00062  *                       EPNum.7:    Dir
00063  *    Return Value:    Endpoint Physical Address
00064  */
00065
00066 uint32_t EPAdr (uint32_t EPNum) {
00067   uint32_t val;
00068
00069   val = (EPNum & 0x0F) << 1;
00070   if (EPNum & 0x80) {
00071     val += 1;
00072   }
00073   return (val);
00074 }
00075
00076
00077 /*
00078  *  Write Command
00079  *    Parameters:      cmd:   Command
00080  *    Return Value:    None
00081  */
00082
00083 void WrCmd (uint32_t cmd) {
00084
00085   LPC_USB->USBDevIntClr = CCEMTY_INT;
00086   LPC_USB->USBCmdCode = cmd;
00087   while ((LPC_USB->USBDevIntSt & CCEMTY_INT) == 0);
00088 }
00089
00090
00091 /*
00092  *  Write Command Data
00093  *    Parameters:      cmd:   Command
00094  *                     val:   Data
00095  *    Return Value:    None
00096  */
00097
00098 void WrCmdDat (uint32_t cmd, uint32_t val) {
00099
00100   LPC_USB->USBDevIntClr = CCEMTY_INT;
00101   LPC_USB->USBCmdCode = cmd;
00102   while ((LPC_USB->USBDevIntSt & CCEMTY_INT) == 0);
00103   LPC_USB->USBDevIntClr = CCEMTY_INT;
00104   LPC_USB->USBCmdCode = val;
00105   while ((LPC_USB->USBDevIntSt & CCEMTY_INT) == 0);
00106 }
00107
00108
00109 /*
00110  *  Write Command to Endpoint
00111  *    Parameters:      cmd:   Command
00112  *                     val:   Data
00113  *    Return Value:    None
00114  */
00115
00116 void WrCmdEP (uint32_t EPNum, uint32_t cmd){
00117
00118   LPC_USB->USBDevIntClr = CCEMTY_INT;
00119   LPC_USB->USBCmdCode = CMD_SEL_EP(EPAdr(EPNum));
00120   while ((LPC_USB->USBDevIntSt & CCEMTY_INT) == 0);
00121   LPC_USB->USBDevIntClr = CCEMTY_INT;
00122   LPC_USB->USBCmdCode = cmd;
00123   while ((LPC_USB->USBDevIntSt & CCEMTY_INT) == 0);
00124 }
00125
00126
00127 /*
00128  *  Read Command Data
00129  *    Parameters:      cmd:   Command
00130  *    Return Value:    Data Value
00131  */
00132
00133 uint32_t RdCmdDat (uint32_t cmd) {
00134
00135   LPC_USB->USBDevIntClr = CCEMTY_INT | CDFULL_INT;
00136   LPC_USB->USBCmdCode = cmd;
00137   while ((LPC_USB->USBDevIntSt & CDFULL_INT) == 0);
00138   return (LPC_USB->USBCmdData);
00139 }
00140
00141
00142 /*
00143  *  USB Initialize Function
00144  *   Called by the User to initialize USB
00145  *    Return Value:    None
00146  */
00147
00148 void USB_Init (void) {
00149
00150   LPC_PINCON->PINSEL1 &= ~((3<<26)|(3<<28));   /* P0.29 D+, P0.30 D- */
00151   LPC_PINCON->PINSEL1 |=  ((1<<26)|(1<<28));   /* PINSEL1 26.27, 28.29  = 01 */
00152
00153   LPC_PINCON->PINSEL3 &= ~((3<< 4)|(3<<28));   /* P1.18 GoodLink, P1.30 VBUS */
00154   LPC_PINCON->PINSEL3 |=  ((1<< 4)|(2<<28));   /* PINSEL3 4.5 = 01, 28.29 = 10 */
00155
00156   LPC_PINCON->PINSEL4 &= ~((3<<18)        );   /* P2.9 SoftConnect */
00157   LPC_PINCON->PINSEL4 |=  ((1<<18)        );   /* PINSEL4 18.19 = 01 */
00158
00159   LPC_SC->PCONP |= (1UL<<31);                /* USB PCLK -> enable USB Per.       */
00160
00161   LPC_USB->USBClkCtrl = 0x1A;                /* Dev, PortSel, AHB clock enable */
00162   while ((LPC_USB->USBClkSt & 0x1A) != 0x1A);
00163
00164   NVIC_EnableIRQ(USB_IRQn);               /* enable USB interrupt */
00165
00166   USB_Reset();
00167   USB_SetAddress(0);
00168 }
00169
00170
00171 /*
00172  *  USB Connect Function
00173  *   Called by the User to Connect/Disconnect USB
00174  *    Parameters:      con:   Connect/Disconnect
00175  *    Return Value:    None
00176  */
00177
00178 void USB_Connect (uint32_t con) {
00179   WrCmdDat(CMD_SET_DEV_STAT, DAT_WR_BYTE(con ? DEV_CON : 0));
00180 }
00181
00182
00183 /*
00184  *  USB Reset Function
00185  *   Called automatically on USB Reset
00186  *    Return Value:    None
00187  */
00188
00189 void USB_Reset (void) {
00190 #if USB_DMA
00191   uint32_t n;
00192 #endif
00193
00194   LPC_USB->USBEpInd = 0;
00195   LPC_USB->USBMaxPSize = USB_MAX_PACKET0;
00196   LPC_USB->USBEpInd = 1;
00197   LPC_USB->USBMaxPSize = USB_MAX_PACKET0;
00198   while ((LPC_USB->USBDevIntSt & EP_RLZED_INT) == 0);
00199
00200   LPC_USB->USBEpIntClr  = 0xFFFFFFFF;
00201   LPC_USB->USBEpIntEn   = 0xFFFFFFFF ^ USB_DMA_EP;
00202   LPC_USB->USBDevIntClr = 0xFFFFFFFF;
00203   LPC_USB->USBDevIntEn  = DEV_STAT_INT    | EP_SLOW_INT    |
00204                (USB_SOF_EVENT   ? FRAME_INT : 0) |
00205                (USB_ERROR_EVENT ? ERR_INT   : 0);
00206
00207 #if USB_DMA
00208   LPC_USB->USBUDCAH   = USB_RAM_ADR;
00209   LPC_USB->USBDMARClr = 0xFFFFFFFF;
00210   LPC_USB->USBEpDMADis  = 0xFFFFFFFF;
00211   LPC_USB->USBEpDMAEn   = USB_DMA_EP;
00212   LPC_USB->USBEoTIntClr = 0xFFFFFFFF;
00213   LPC_USB->USBNDDRIntClr = 0xFFFFFFFF;
00214   LPC_USB->USBSysErrIntClr = 0xFFFFFFFF;
00215   LPC_USB->USBDMAIntEn  = 0x00000007;
00216   DDMemMap[0] = 0x00000000;
00217   DDMemMap[1] = 0x00000000;
00218   for (n = 0; n < USB_EP_NUM; n++) {
00219     udca[n] = 0;
00220     UDCA[n] = 0;
00221   }
00222 #endif
00223 }
00224
00225
00226 /*
00227  *  USB Suspend Function
00228  *   Called automatically on USB Suspend
00229  *    Return Value:    None
00230  */
00231
00232 void USB_Suspend (void) {
00233   /* Performed by Hardware */
00234 }
00235
00236
00237 /*
00238  *  USB Resume Function
00239  *   Called automatically on USB Resume
00240  *    Return Value:    None
00241  */
00242
00243 void USB_Resume (void) {
00244   /* Performed by Hardware */
00245 }
00246
00247
00248 /*
00249  *  USB Remote Wakeup Function
00250  *   Called automatically on USB Remote Wakeup
00251  *    Return Value:    None
00252  */
00253
00254 void USB_WakeUp (void) {
00255
00256   if (USB_DeviceStatus & USB_GETSTATUS_REMOTE_WAKEUP) {
00257     WrCmdDat(CMD_SET_DEV_STAT, DAT_WR_BYTE(DEV_CON));
00258   }
00259 }
00260
00261
00262 /*
00263  *  USB Remote Wakeup Configuration Function
00264  *    Parameters:      cfg:   Enable/Disable
00265  *    Return Value:    None
00266  */
00267
00268 void USB_WakeUpCfg (uint32_t cfg) {
00269   /* Not needed */
00270 }
00271
00272
00273 /*
00274  *  USB Set Address Function
00275  *    Parameters:      adr:   USB Address
00276  *    Return Value:    None
00277  */
00278
00279 void USB_SetAddress (uint32_t adr) {
00280   WrCmdDat(CMD_SET_ADDR, DAT_WR_BYTE(DEV_EN | adr)); /* Don't wait for next */
00281   WrCmdDat(CMD_SET_ADDR, DAT_WR_BYTE(DEV_EN | adr)); /*  Setup Status Phase */
00282 }
00283
00284
00285 /*
00286  *  USB Configure Function
00287  *    Parameters:      cfg:   Configure/Deconfigure
00288  *    Return Value:    None
00289  */
00290
00291 void USB_Configure (uint32_t cfg) {
00292
00293   WrCmdDat(CMD_CFG_DEV, DAT_WR_BYTE(cfg ? CONF_DVICE : 0));
00294
00295   LPC_USB->USBReEp = 0x00000003;
00296   while ((LPC_USB->USBDevIntSt & EP_RLZED_INT) == 0);
00297   LPC_USB->USBDevIntClr = EP_RLZED_INT;
00298 }
00299
00300
00301 /*
00302  *  Configure USB Endpoint according to Descriptor
00303  *    Parameters:      pEPD:  Pointer to Endpoint Descriptor
00304  *    Return Value:    None
00305  */
00306
00307 void USB_ConfigEP (USB_ENDPOINT_DESCRIPTOR *pEPD) {
00308   uint32_t num;
00309
00310   num = EPAdr(pEPD->bEndpointAddress);
00311   LPC_USB->USBReEp |= (1 << num);
00312   LPC_USB->USBEpInd = num;
00313   LPC_USB->USBMaxPSize = pEPD->wMaxPacketSize;
00314   while ((LPC_USB->USBDevIntSt & EP_RLZED_INT) == 0);
00315   LPC_USB->USBDevIntClr = EP_RLZED_INT;
00316 }
00317
00318
00319 /*
00320  *  Set Direction for USB Control Endpoint
00321  *    Parameters:      dir:   Out (dir == 0), In (dir <> 0)
00322  *    Return Value:    None
00323  */
00324
00325 void USB_DirCtrlEP (uint32_t dir) {
00326   /* Not needed */
00327 }
00328
00329
00330 /*
00331  *  Enable USB Endpoint
00332  *    Parameters:      EPNum: Endpoint Number
00333  *                       EPNum.0..3: Address
00334  *                       EPNum.7:    Dir
00335  *    Return Value:    None
00336  */
00337
00338 void USB_EnableEP (uint32_t EPNum) {
00339   WrCmdDat(CMD_SET_EP_STAT(EPAdr(EPNum)), DAT_WR_BYTE(0));
00340 }
00341
00342
00343 /*
00344  *  Disable USB Endpoint
00345  *    Parameters:      EPNum: Endpoint Number
00346  *                       EPNum.0..3: Address
00347  *                       EPNum.7:    Dir
00348  *    Return Value:    None
00349  */
00350
00351 void USB_DisableEP (uint32_t EPNum) {
00352   WrCmdDat(CMD_SET_EP_STAT(EPAdr(EPNum)), DAT_WR_BYTE(EP_STAT_DA));
00353 }
00354
00355
00356 /*
00357  *  Reset USB Endpoint
00358  *    Parameters:      EPNum: Endpoint Number
00359  *                       EPNum.0..3: Address
00360  *                       EPNum.7:    Dir
00361  *    Return Value:    None
00362  */
00363
00364 void USB_ResetEP (uint32_t EPNum) {
00365   WrCmdDat(CMD_SET_EP_STAT(EPAdr(EPNum)), DAT_WR_BYTE(0));
00366 }
00367
00368
00369 /*
00370  *  Set Stall for USB Endpoint
00371  *    Parameters:      EPNum: Endpoint Number
00372  *                       EPNum.0..3: Address
00373  *                       EPNum.7:    Dir
00374  *    Return Value:    None
00375  */
00376
00377 void USB_SetStallEP (uint32_t EPNum) {
00378   WrCmdDat(CMD_SET_EP_STAT(EPAdr(EPNum)), DAT_WR_BYTE(EP_STAT_ST));
00379 }
00380
00381
00382 /*
00383  *  Clear Stall for USB Endpoint
00384  *    Parameters:      EPNum: Endpoint Number
00385  *                       EPNum.0..3: Address
00386  *                       EPNum.7:    Dir
00387  *    Return Value:    None
00388  */
00389
00390 void USB_ClrStallEP (uint32_t EPNum) {
00391   WrCmdDat(CMD_SET_EP_STAT(EPAdr(EPNum)), DAT_WR_BYTE(0));
00392 }
00393
00394
00395 /*
00396  *  Clear USB Endpoint Buffer
00397  *    Parameters:      EPNum: Endpoint Number
00398  *                       EPNum.0..3: Address
00399  *                       EPNum.7:    Dir
00400  *    Return Value:    None
00401  */
00402
00403 void USB_ClearEPBuf (uint32_t EPNum) {
00404   WrCmdEP(EPNum, CMD_CLR_BUF);
00405 }
00406
00407
00408 /*
00409  *  Read USB Endpoint Data
00410  *    Parameters:      EPNum: Endpoint Number
00411  *                       EPNum.0..3: Address
00412  *                       EPNum.7:    Dir
00413  *                     pData: Pointer to Data Buffer
00414  *    Return Value:    Number of bytes read
00415  */
00416
00417 uint32_t USB_ReadEP (uint32_t EPNum, uint8_t *pData) {
00418   uint32_t cnt, n;
00419
00420   LPC_USB->USBCtrl = ((EPNum & 0x0F) << 2) | CTRL_RD_EN;
00421
00422   do {
00423     cnt = LPC_USB->USBRxPLen;
00424   } while ((cnt & PKT_RDY) == 0);
00425   cnt &= PKT_LNGTH_MASK;
00426
00427   for (n = 0; n < (cnt + 3) / 4; n++) {
00428     *((__packed uint32_t *)pData) = LPC_USB->USBRxData;
00429     pData += 4;
00430   }
00431   LPC_USB->USBCtrl = 0;
00432
00433   if (((EP_MSK_ISO >> EPNum) & 1) == 0) {   /* Non-Isochronous Endpoint */
00434     WrCmdEP(EPNum, CMD_CLR_BUF);
00435   }
00436   return (cnt);
00437 }
00438
00439
00440 /*
00441  *  Write USB Endpoint Data
00442  *    Parameters:      EPNum: Endpoint Number
00443  *                       EPNum.0..3: Address
00444  *                       EPNum.7:    Dir
00445  *                     pData: Pointer to Data Buffer
00446  *                     cnt:   Number of bytes to write
00447  *    Return Value:    Number of bytes written
00448  */
00449
00450 uint32_t USB_WriteEP (uint32_t EPNum, uint8_t *pData, uint32_t cnt) {
00451   uint32_t n;
00452
00453   LPC_USB->USBCtrl = ((EPNum & 0x0F) << 2) | CTRL_WR_EN;
00454
00455   LPC_USB->USBTxPLen = cnt;
00456
00457   for (n = 0; n < (cnt + 3) / 4; n++) {
00458     LPC_USB->USBTxData = *((__packed uint32_t *)pData);
00459     pData += 4;
00460   }
00461   LPC_USB->USBCtrl = 0;
00462   WrCmdEP(EPNum, CMD_VALID_BUF);
00463   return (cnt);
00464 }
00465
00466 #if USB_DMA
00467
00468 /* DMA Descriptor Memory Layout */
00469 const uint32_t DDAdr[2] = { DD_NISO_ADR, DD_ISO_ADR };
00470 const uint32_t DDSz [2] = { 16,          20         };
00471
00472
00473 /*
00474  *  Setup USB DMA Transfer for selected Endpoint
00475  *    Parameters:      EPNum: Endpoint Number
00476  *                     pDD: Pointer to DMA Descriptor
00477  *    Return Value:    TRUE - Success, FALSE - Error
00478  */
00479
00480 uint32_t USB_DMA_Setup(uint32_t EPNum, USB_DMA_DESCRIPTOR *pDD) {
00481   uint32_t num, ptr, nxt, iso, n;
00482   uint32_t *t;
00483
00484   iso = pDD->Cfg.Type.IsoEP;                /* Iso or Non-Iso Descriptor */
00485   num = EPAdr(EPNum);                       /* Endpoint's Physical Address */
00486
00487   ptr = 0;                                  /* Current Descriptor */
00488   nxt = udca[num];                          /* Initial Descriptor */
00489   while (nxt) {                             /* Go through Descriptor List */
00490     ptr = nxt;                              /* Current Descriptor */
00491     if (!pDD->Cfg.Type.Link) {              /* Check for Linked Descriptors */
00492       n = (ptr - DDAdr[iso]) / DDSz[iso];   /* Descriptor Index */
00493       DDMemMap[iso] &= ~(1 << n);           /* Unmark Memory Usage */
00494     }
00495     nxt = *((uint32_t *)ptr);                  /* Next Descriptor */
00496   }
00497
00498   for (n = 0; n < 32; n++) {                /* Search for available Memory */
00499     if ((DDMemMap[iso] & (1 << n)) == 0) {
00500       break;                                /* Memory found */
00501     }
00502   }
00503   if (n == 32) return (FALSE);              /* Memory not available */
00504
00505   DDMemMap[iso] |= 1 << n;                  /* Mark Memory Usage */
00506   nxt = DDAdr[iso] + n * DDSz[iso];         /* Next Descriptor */
00507
00508   if (ptr && pDD->Cfg.Type.Link) {
00509     *((uint32_t *)(ptr + 0))  = nxt;           /* Link in new Descriptor */
00510     *((uint32_t *)(ptr + 4)) |= 0x00000004;    /* Next DD is Valid */
00511   } else {
00512     udca[num] = nxt;                        /* Save new Descriptor */
00513     UDCA[num] = nxt;                        /* Update UDCA in USB */
00514   }
00515
00516   /* Fill in DMA Descriptor */
00517   *(((uint32_t *)nxt)++) =  0;                 /* Next DD Pointer */
00518   *(((uint32_t *)nxt)++) =  pDD->Cfg.Type.ATLE |
00519                        (pDD->Cfg.Type.IsoEP << 4) |
00520                        (pDD->MaxSize <<  5) |
00521                        (pDD->BufLen  << 16);
00522   *(((uint32_t *)nxt)++) =  pDD->BufAdr;
00523   *(((uint32_t *)nxt)++) =  pDD->Cfg.Type.LenPos << 8;
00524
00525   if (iso) {
00526     *((uint32_t *)nxt) =  pDD->InfoAdr;
00527   }
00528
00529   return (TRUE); /* Success */
00530 }
00531
00532
00533 /*
00534  *  Enable USB DMA Endpoint
00535  *    Parameters:      EPNum: Endpoint Number
00536  *                       EPNum.0..3: Address
00537  *                       EPNum.7:    Dir
00538  *    Return Value:    None
00539  */
00540
00541 void USB_DMA_Enable (uint32_t EPNum) {
00542   LPC_USB->USBEpDMAEn = 1 << EPAdr(EPNum);
00543 }
00544
00545
00546 /*
00547  *  Disable USB DMA Endpoint
00548  *    Parameters:      EPNum: Endpoint Number
00549  *                       EPNum.0..3: Address
00550  *                       EPNum.7:    Dir
00551  *    Return Value:    None
00552  */
00553
00554 void USB_DMA_Disable (uint32_t EPNum) {
00555   LPC_USB->USBEpDMADis = 1 << EPAdr(EPNum);
00556 }
00557
00558
00559 /*
00560  *  Get USB DMA Endpoint Status
00561  *    Parameters:      EPNum: Endpoint Number
00562  *                       EPNum.0..3: Address
00563  *                       EPNum.7:    Dir
00564  *    Return Value:    DMA Status
00565  */
00566
00567 uint32_t USB_DMA_Status (uint32_t EPNum) {
00568   uint32_t ptr, val;
00569
00570   ptr = UDCA[EPAdr(EPNum)];                 /* Current Descriptor */
00571   if (ptr == 0)
00572         return (USB_DMA_INVALID);
00573
00574   val = *((uint32_t *)(ptr + 3*4));            /* Status Information */
00575   switch ((val >> 1) & 0x0F) {
00576     case 0x00:                              /* Not serviced */
00577       return (USB_DMA_IDLE);
00578     case 0x01:                              /* Being serviced */
00579       return (USB_DMA_BUSY);
00580     case 0x02:                              /* Normal Completition */
00581       return (USB_DMA_DONE);
00582     case 0x03:                              /* Data Under Run */
00583       return (USB_DMA_UNDER_RUN);
00584     case 0x08:                              /* Data Over Run */
00585       return (USB_DMA_OVER_RUN);
00586     case 0x09:                              /* System Error */
00587       return (USB_DMA_ERROR);
00588   }
00589
00590   return (USB_DMA_UNKNOWN);
00591 }
00592
00593
00594 /*
00595  *  Get USB DMA Endpoint Current Buffer Address
00596  *    Parameters:      EPNum: Endpoint Number
00597  *                       EPNum.0..3: Address
00598  *                       EPNum.7:    Dir
00599  *    Return Value:    DMA Address (or -1 when DMA is Invalid)
00600  */
00601
00602 uint32_t USB_DMA_BufAdr (uint32_t EPNum) {
00603   uint32_t ptr, val;
00604
00605   ptr = UDCA[EPAdr(EPNum)];                 /* Current Descriptor */
00606   if (ptr == 0)
00607   {
00608         return ((uint32_t)(-1));                /* DMA Invalid */
00609   }
00610
00611   val = *((uint32_t *)(ptr + 2*4));         /* Buffer Address */
00612   return (val);                             /* Current Address */
00613 }
00614
00615
00616 /*
00617  *  Get USB DMA Endpoint Current Buffer Count
00618  *   Number of transfered Bytes or Iso Packets
00619  *    Parameters:      EPNum: Endpoint Number
00620  *                       EPNum.0..3: Address
00621  *                       EPNum.7:    Dir
00622  *    Return Value:    DMA Count (or -1 when DMA is Invalid)
00623  */
00624
00625 uint32_t USB_DMA_BufCnt (uint32_t EPNum) {
00626   uint32_t ptr, val;
00627
00628   ptr = UDCA[EPAdr(EPNum)];                 /* Current Descriptor */
00629   if (ptr == 0)
00630   {
00631         return ((uint32_t)(-1));                /* DMA Invalid */
00632   }
00633   val = *((uint32_t *)(ptr + 3*4));         /* Status Information */
00634   return (val >> 16);                       /* Current Count */
00635 }
00636
00637
00638 #endif /* USB_DMA */
00639
00640
00641 /*
00642  *  Get USB Last Frame Number
00643  *    Parameters:      None
00644  *    Return Value:    Frame Number
00645  */
00646
00647 uint32_t USB_GetFrame (void) {
00648   uint32_t val;
00649
00650   WrCmd(CMD_RD_FRAME);
00651   val = RdCmdDat(DAT_RD_FRAME);
00652   val = val | (RdCmdDat(DAT_RD_FRAME) << 8);
00653
00654   return (val);
00655 }
00656
00657
00658 /*
00659  *  USB Interrupt Service Routine
00660  */
00661
00662 void USB_IRQHandler (void) {
00663   uint32_t disr, val, n, m;
00664   uint32_t episr, episrCur;
00665
00666   disr = LPC_USB->USBDevIntSt;       /* Device Interrupt Status */
00667
00668   /* Device Status Interrupt (Reset, Connect change, Suspend/Resume) */
00669   if (disr & DEV_STAT_INT) {
00670     LPC_USB->USBDevIntClr = DEV_STAT_INT;
00671     WrCmd(CMD_GET_DEV_STAT);
00672     val = RdCmdDat(DAT_GET_DEV_STAT);       /* Device Status */
00673     if (val & DEV_RST) {                    /* Reset */
00674       USB_Reset();
00675 #if   USB_RESET_EVENT
00676       USB_Reset_Event();
00677 #endif
00678     }
00679     if (val & DEV_CON_CH) {                 /* Connect change */
00680 #if   USB_POWER_EVENT
00681       USB_Power_Event(val & DEV_CON);
00682 #endif
00683     }
00684     if (val & DEV_SUS_CH) {                 /* Suspend/Resume */
00685       if (val & DEV_SUS) {                  /* Suspend */
00686         USB_Suspend();
00687 #if     USB_SUSPEND_EVENT
00688         USB_Suspend_Event();
00689 #endif
00690       } else {                              /* Resume */
00691         USB_Resume();
00692 #if     USB_RESUME_EVENT
00693         USB_Resume_Event();
00694 #endif
00695       }
00696     }
00697     goto isr_end;
00698   }
00699
00700 #if USB_SOF_EVENT
00701   /* Start of Frame Interrupt */
00702   if (disr & FRAME_INT) {
00703     USB_SOF_Event();
00704   }
00705 #endif
00706
00707 #if USB_ERROR_EVENT
00708   /* Error Interrupt */
00709   if (disr & ERR_INT) {
00710     WrCmd(CMD_RD_ERR_STAT);
00711     val = RdCmdDat(DAT_RD_ERR_STAT);
00712     USB_Error_Event(val);
00713   }
00714 #endif
00715
00716   /* Endpoint's Slow Interrupt */
00717   if (disr & EP_SLOW_INT) {
00718     episrCur = 0;
00719     episr    = LPC_USB->USBEpIntSt;
00720     for (n = 0; n < USB_EP_NUM; n++) {      /* Check All Endpoints */
00721       if (episr == episrCur) break;         /* break if all EP interrupts handled */
00722       if (episr & (1 << n)) {
00723         episrCur |= (1 << n);
00724         m = n >> 1;
00725
00726         LPC_USB->USBEpIntClr = (1 << n);
00727         while ((LPC_USB->USBDevIntSt & CDFULL_INT) == 0);
00728         val = LPC_USB->USBCmdData;
00729
00730         if ((n & 1) == 0) {                 /* OUT Endpoint */
00731           if (n == 0) {                     /* Control OUT Endpoint */
00732             if (val & EP_SEL_STP) {         /* Setup Packet */
00733               if (USB_P_EP[0]) {
00734                 USB_P_EP[0](USB_EVT_SETUP);
00735                 continue;
00736               }
00737             }
00738           }
00739           if (USB_P_EP[m]) {
00740             USB_P_EP[m](USB_EVT_OUT);
00741           }
00742         } else {                            /* IN Endpoint */
00743           if (USB_P_EP[m]) {
00744             USB_P_EP[m](USB_EVT_IN);
00745           }
00746         }
00747       }
00748     }
00749     LPC_USB->USBDevIntClr = EP_SLOW_INT;
00750   }
00751
00752 #if USB_DMA
00753
00754   if (LPC_USB->USBDMAIntSt & 0x00000001) {          /* End of Transfer Interrupt */
00755     val = LPC_USB->USBEoTIntSt;
00756     for (n = 2; n < USB_EP_NUM; n++) {      /* Check All Endpoints */
00757       if (val & (1 << n)) {
00758         m = n >> 1;
00759         if ((n & 1) == 0) {                 /* OUT Endpoint */
00760           if (USB_P_EP[m]) {
00761             USB_P_EP[m](USB_EVT_OUT_DMA_EOT);
00762           }
00763         } else {                            /* IN Endpoint */
00764           if (USB_P_EP[m]) {
00765             USB_P_EP[m](USB_EVT_IN_DMA_EOT);
00766           }
00767         }
00768       }
00769     }
00770     LPC_USB->USBEoTIntClr = val;
00771   }
00772
00773   if (LPC_USB->USBDMAIntSt & 0x00000002) {          /* New DD Request Interrupt */
00774     val = LPC_USB->USBNDDRIntSt;
00775     for (n = 2; n < USB_EP_NUM; n++) {      /* Check All Endpoints */
00776       if (val & (1 << n)) {
00777         m = n >> 1;
00778         if ((n & 1) == 0) {                 /* OUT Endpoint */
00779           if (USB_P_EP[m]) {
00780             USB_P_EP[m](USB_EVT_OUT_DMA_NDR);
00781           }
00782         } else {                            /* IN Endpoint */
00783           if (USB_P_EP[m]) {
00784             USB_P_EP[m](USB_EVT_IN_DMA_NDR);
00785           }
00786         }
00787       }
00788     }
00789     LPC_USB->USBNDDRIntClr = val;
00790   }
00791
00792   if (LPC_USB->USBDMAIntSt & 0x00000004) {          /* System Error Interrupt */
00793     val = LPC_USB->USBSysErrIntSt;
00794     for (n = 2; n < USB_EP_NUM; n++) {      /* Check All Endpoints */
00795       if (val & (1 << n)) {
00796         m = n >> 1;
00797         if ((n & 1) == 0) {                 /* OUT Endpoint */
00798           if (USB_P_EP[m]) {
00799             USB_P_EP[m](USB_EVT_OUT_DMA_ERR);
00800           }
00801         } else {                            /* IN Endpoint */
00802           if (USB_P_EP[m]) {
00803             USB_P_EP[m](USB_EVT_IN_DMA_ERR);
00804           }
00805         }
00806       }
00807     }
00808     LPC_USB->USBSysErrIntClr = val;
00809   }
00810
00811 #endif /* USB_DMA */
00812
00813 isr_end:
00814   return;
00815 }
Generated on Tue Jun 7 14:59:04 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBAudio/usbhw.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBAudio/usbhw.h

Go to the documentation of this file.
00001 /*----------------------------------------------------------------------------
00002  *      U S B  -  K e r n e l
00003  *----------------------------------------------------------------------------
00004  * Name:    usbhw.h
00005  * Purpose: USB Hardware Layer Definitions
00006  * Version: V1.20
00007  *----------------------------------------------------------------------------
00008  *      This software is supplied "AS IS" without any warranties, express,
00009  *      implied or statutory, including but not limited to the implied
00010  *      warranties of fitness for purpose, satisfactory quality and
00011  *      noninfringement. Keil extends you a royalty-free right to reproduce
00012  *      and distribute executable files created using this software for use
00013  *      on NXP Semiconductors LPC family microcontroller devices only. Nothing
00014  *      else gives you the right to use this software.
00015  *
00016  * Copyright (c) 2009 Keil - An ARM Company. All rights reserved.
00017  *----------------------------------------------------------------------------
00018  * History:
00019  *          V1.20 Added USB_ClearEPBuf
00020  *          V1.00 Initial Version
00021  *----------------------------------------------------------------------------*/
00022
00023 #ifndef __USBHW_H__
00024 #define __USBHW_H__
00025
00026
00027 /* USB RAM Definitions */
00028 #define USB_RAM_ADR     0x20080000  /* USB RAM Start Address */
00029 #define USB_RAM_SZ      0x00004000  /* USB RAM Size (4kB) */
00030
00031 /* DMA Endpoint Descriptors */
00032 #define DD_NISO_CNT             16  /* Non-Iso EP DMA Descr. Count (max. 32) */
00033 #define DD_ISO_CNT               8  /* Iso EP DMA Descriptor Count (max. 32) */
00034 #define DD_NISO_SZ    (DD_NISO_CNT * 16)    /* Non-Iso DMA Descr. Size */
00035 #define DD_ISO_SZ     (DD_ISO_CNT  * 20)    /* Iso DMA Descriptor Size */
00036 #define DD_NISO_ADR   (USB_RAM_ADR + 128)   /* Non-Iso DMA Descr. Address */
00037 #define DD_ISO_ADR    (DD_NISO_ADR + DD_NISO_SZ) /* Iso DMA Descr. Address */
00038 #define DD_SZ                 (128 + DD_NISO_SZ + DD_ISO_SZ) /* Descr. Size */
00039
00040 /* DMA Buffer Memory Definitions */
00041 #define DMA_BUF_ADR   (USB_RAM_ADR + DD_SZ) /* DMA Buffer Start Address */
00042 #define DMA_BUF_SZ    (USB_RAM_SZ  - DD_SZ) /* DMA Buffer Size */
00043
00044 /* USB Error Codes */
00045 #define USB_ERR_PID         0x0001  /* PID Error */
00046 #define USB_ERR_UEPKT       0x0002  /* Unexpected Packet */
00047 #define USB_ERR_DCRC        0x0004  /* Data CRC Error */
00048 #define USB_ERR_TIMOUT      0x0008  /* Bus Time-out Error */
00049 #define USB_ERR_EOP         0x0010  /* End of Packet Error */
00050 #define USB_ERR_B_OVRN      0x0020  /* Buffer Overrun */
00051 #define USB_ERR_BTSTF       0x0040  /* Bit Stuff Error */
00052 #define USB_ERR_TGL         0x0080  /* Toggle Bit Error */
00053
00054 /* USB DMA Status Codes */
00055 #define USB_DMA_INVALID     0x0000  /* DMA Invalid - Not Configured */
00056 #define USB_DMA_IDLE        0x0001  /* DMA Idle - Waiting for Trigger */
00057 #define USB_DMA_BUSY        0x0002  /* DMA Busy - Transfer in progress */
00058 #define USB_DMA_DONE        0x0003  /* DMA Transfer Done (no Errors)*/
00059 #define USB_DMA_OVER_RUN    0x0004  /* Data Over Run */
00060 #define USB_DMA_UNDER_RUN   0x0005  /* Data Under Run (Short Packet) */
00061 #define USB_DMA_ERROR       0x0006  /* Error */
00062 #define USB_DMA_UNKNOWN     0xFFFF  /* Unknown State */
00063
00064 /* USB DMA Descriptor */
00065 typedef struct _USB_DMA_DESCRIPTOR {
00066   uint32_t BufAdr;                     /* DMA Buffer Address */
00067   uint16_t  BufLen;                     /* DMA Buffer Length */
00068   uint16_t  MaxSize;                    /* Maximum Packet Size */
00069   uint32_t InfoAdr;                    /* Packet Info Memory Address */
00070   union {                           /* DMA Configuration */
00071     struct {
00072       uint32_t Link   : 1;             /* Link to existing Descriptors */
00073       uint32_t IsoEP  : 1;             /* Isonchronous Endpoint */
00074       uint32_t ATLE   : 1;             /* ATLE (Auto Transfer Length Extract) */
00075       uint32_t Rsrvd  : 5;             /* Reserved */
00076       uint32_t LenPos : 8;             /* Length Position (ATLE) */
00077     } Type;
00078     uint32_t Val;
00079   } Cfg;
00080 } USB_DMA_DESCRIPTOR;
00081
00082 /* USB Hardware Functions */
00083 extern void  USB_Init       (void);
00084 extern void  USB_Connect    (uint32_t  con);
00085 extern void  USB_Reset      (void);
00086 extern void  USB_Suspend    (void);
00087 extern void  USB_Resume     (void);
00088 extern void  USB_WakeUp     (void);
00089 extern void  USB_WakeUpCfg  (uint32_t  cfg);
00090 extern void  USB_SetAddress (uint32_t adr);
00091 extern void  USB_Configure  (uint32_t  cfg);
00092 extern void  USB_ConfigEP   (USB_ENDPOINT_DESCRIPTOR *pEPD);
00093 extern void  USB_DirCtrlEP  (uint32_t dir);
00094 extern void  USB_EnableEP   (uint32_t EPNum);
00095 extern void  USB_DisableEP  (uint32_t EPNum);
00096 extern void  USB_ResetEP    (uint32_t EPNum);
00097 extern void  USB_SetStallEP (uint32_t EPNum);
00098 extern void  USB_ClrStallEP (uint32_t EPNum);
00099 extern void USB_ClearEPBuf  (uint32_t  EPNum);
00100 extern uint32_t USB_ReadEP     (uint32_t EPNum, uint8_t *pData);
00101 extern uint32_t USB_WriteEP    (uint32_t EPNum, uint8_t *pData, uint32_t cnt);
00102 extern uint32_t  USB_DMA_Setup  (uint32_t EPNum, USB_DMA_DESCRIPTOR *pDD);
00103 extern void  USB_DMA_Enable (uint32_t EPNum);
00104 extern void  USB_DMA_Disable(uint32_t EPNum);
00105 extern uint32_t USB_DMA_Status (uint32_t EPNum);
00106 extern uint32_t USB_DMA_BufAdr (uint32_t EPNum);
00107 extern uint32_t USB_DMA_BufCnt (uint32_t EPNum);
00108 extern uint32_t USB_GetFrame   (void);
00109 extern void  USB_IRQHandler (void);
00110
00111
00112 #endif  /* __USBHW_H__ */
Generated on Tue Jun 7 14:59:04 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBAudio/usbreg.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBAudio/usbreg.h

Go to the documentation of this file.
00001 /*----------------------------------------------------------------------------
00002  *      U S B  -  K e r n e l
00003  *----------------------------------------------------------------------------
00004  * Name:    usbreg.h
00005  * Purpose: USB Hardware Layer Definitions for NXP LPC Family MCUs
00006  * Version: V1.20
00007  *----------------------------------------------------------------------------
00008  *      This software is supplied "AS IS" without any warranties, express,
00009  *      implied or statutory, including but not limited to the implied
00010  *      warranties of fitness for purpose, satisfactory quality and
00011  *      noninfringement. Keil extends you a royalty-free right to reproduce
00012  *      and distribute executable files created using this software for use
00013  *      on NXP Semiconductors LPC family microcontroller devices only. Nothing
00014  *      else gives you the right to use this software.
00015  *
00016  * Copyright (c) 2009 Keil - An ARM Company. All rights reserved.
00017  *---------------------------------------------------------------------------*/
00018
00019 #ifndef __USBREG_H
00020 #define __USBREG_H
00021
00022 /* Device Interrupt Bit Definitions */
00023 #define FRAME_INT           0x00000001
00024 #define EP_FAST_INT         0x00000002
00025 #define EP_SLOW_INT         0x00000004
00026 #define DEV_STAT_INT        0x00000008
00027 #define CCEMTY_INT          0x00000010
00028 #define CDFULL_INT          0x00000020
00029 #define RxENDPKT_INT        0x00000040
00030 #define TxENDPKT_INT        0x00000080
00031 #define EP_RLZED_INT        0x00000100
00032 #define ERR_INT             0x00000200
00033
00034 /* Rx & Tx Packet Length Definitions */
00035 #define PKT_LNGTH_MASK      0x000003FF
00036 #define PKT_DV              0x00000400
00037 #define PKT_RDY             0x00000800
00038
00039 /* USB Control Definitions */
00040 #define CTRL_RD_EN          0x00000001
00041 #define CTRL_WR_EN          0x00000002
00042
00043 /* Command Codes */
00044 #define CMD_SET_ADDR        0x00D00500
00045 #define CMD_CFG_DEV         0x00D80500
00046 #define CMD_SET_MODE        0x00F30500
00047 #define CMD_RD_FRAME        0x00F50500
00048 #define DAT_RD_FRAME        0x00F50200
00049 #define CMD_RD_TEST         0x00FD0500
00050 #define DAT_RD_TEST         0x00FD0200
00051 #define CMD_SET_DEV_STAT    0x00FE0500
00052 #define CMD_GET_DEV_STAT    0x00FE0500
00053 #define DAT_GET_DEV_STAT    0x00FE0200
00054 #define CMD_GET_ERR_CODE    0x00FF0500
00055 #define DAT_GET_ERR_CODE    0x00FF0200
00056 #define CMD_RD_ERR_STAT     0x00FB0500
00057 #define DAT_RD_ERR_STAT     0x00FB0200
00058 #define DAT_WR_BYTE(x)     (0x00000100 | ((x) << 16))
00059 #define CMD_SEL_EP(x)      (0x00000500 | ((x) << 16))
00060 #define DAT_SEL_EP(x)      (0x00000200 | ((x) << 16))
00061 #define CMD_SEL_EP_CLRI(x) (0x00400500 | ((x) << 16))
00062 #define DAT_SEL_EP_CLRI(x) (0x00400200 | ((x) << 16))
00063 #define CMD_SET_EP_STAT(x) (0x00400500 | ((x) << 16))
00064 #define CMD_CLR_BUF         0x00F20500
00065 #define DAT_CLR_BUF         0x00F20200
00066 #define CMD_VALID_BUF       0x00FA0500
00067
00068 /* Device Address Register Definitions */
00069 #define DEV_ADDR_MASK       0x7F
00070 #define DEV_EN              0x80
00071
00072 /* Device Configure Register Definitions */
00073 #define CONF_DVICE          0x01
00074
00075 /* Device Mode Register Definitions */
00076 #define AP_CLK              0x01
00077 #define INAK_CI             0x02
00078 #define INAK_CO             0x04
00079 #define INAK_II             0x08
00080 #define INAK_IO             0x10
00081 #define INAK_BI             0x20
00082 #define INAK_BO             0x40
00083
00084 /* Device Status Register Definitions */
00085 #define DEV_CON             0x01
00086 #define DEV_CON_CH          0x02
00087 #define DEV_SUS             0x04
00088 #define DEV_SUS_CH          0x08
00089 #define DEV_RST             0x10
00090
00091 /* Error Code Register Definitions */
00092 #define ERR_EC_MASK         0x0F
00093 #define ERR_EA              0x10
00094
00095 /* Error Status Register Definitions */
00096 #define ERR_PID             0x01
00097 #define ERR_UEPKT           0x02
00098 #define ERR_DCRC            0x04
00099 #define ERR_TIMOUT          0x08
00100 #define ERR_EOP             0x10
00101 #define ERR_B_OVRN          0x20
00102 #define ERR_BTSTF           0x40
00103 #define ERR_TGL             0x80
00104
00105 /* Endpoint Select Register Definitions */
00106 #define EP_SEL_F            0x01
00107 #define EP_SEL_ST           0x02
00108 #define EP_SEL_STP          0x04
00109 #define EP_SEL_PO           0x08
00110 #define EP_SEL_EPN          0x10
00111 #define EP_SEL_B_1_FULL     0x20
00112 #define EP_SEL_B_2_FULL     0x40
00113
00114 /* Endpoint Status Register Definitions */
00115 #define EP_STAT_ST          0x01
00116 #define EP_STAT_DA          0x20
00117 #define EP_STAT_RF_MO       0x40
00118 #define EP_STAT_CND_ST      0x80
00119
00120 /* Clear Buffer Register Definitions */
00121 #define CLR_BUF_PO          0x01
00122
00123
00124 /* DMA Interrupt Bit Definitions */
00125 #define EOT_INT             0x01
00126 #define NDD_REQ_INT         0x02
00127 #define SYS_ERR_INT         0x04
00128
00129
00130 #endif  /* __USBREG_H */
Generated on Tue Jun 7 14:59:04 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBAudio/usbuser.c Source File

C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBAudio/usbuser.c

Go to the documentation of this file.
00001 /*----------------------------------------------------------------------------
00002  *      U S B  -  K e r n e l
00003  *----------------------------------------------------------------------------
00004  * Name:    usbuser.c
00005  * Purpose: USB Custom User Module
00006  * Version: V1.20
00007  *----------------------------------------------------------------------------
00008  *      This software is supplied "AS IS" without any warranties, express,
00009  *      implied or statutory, including but not limited to the implied
00010  *      warranties of fitness for purpose, satisfactory quality and
00011  *      noninfringement. Keil extends you a royalty-free right to reproduce
00012  *      and distribute executable files created using this software for use
00013  *      on NXP Semiconductors LPC family microcontroller devices only. Nothing
00014  *      else gives you the right to use this software.
00015  *
00016  * Copyright (c) 2009 Keil - An ARM Company. All rights reserved.
00017  *---------------------------------------------------------------------------*/
00018
00019 #include "lpc_types.h"
00020
00021 #include "usb.h"
00022 #include "usbcfg.h"
00023 #include "usbhw.h"
00024 #include "usbcore.h"
00025 #include "usbuser.h"
00026
00027 #include "usbaudio.h"
00028
00029
00030 /*
00031  *  USB Power Event Callback
00032  *   Called automatically on USB Power Event
00033  *    Parameter:       power: On(TRUE)/Off(FALSE)
00034  */
00035
00036 #if USB_POWER_EVENT
00037 void USB_Power_Event (uint32_t  power) {
00038 }
00039 #endif
00040
00041
00042 /*
00043  *  USB Reset Event Callback
00044  *   Called automatically on USB Reset Event
00045  */
00046
00047 #if USB_RESET_EVENT
00048 void USB_Reset_Event (void) {
00049   USB_ResetCore();
00050 }
00051 #endif
00052
00053
00054 /*
00055  *  USB Suspend Event Callback
00056  *   Called automatically on USB Suspend Event
00057  */
00058
00059 #if USB_SUSPEND_EVENT
00060 void USB_Suspend_Event (void) {
00061 }
00062 #endif
00063
00064
00065 /*
00066  *  USB Resume Event Callback
00067  *   Called automatically on USB Resume Event
00068  */
00069
00070 #if USB_RESUME_EVENT
00071 void USB_Resume_Event (void) {
00072 }
00073 #endif
00074
00075
00076 /*
00077  *  USB Remote Wakeup Event Callback
00078  *   Called automatically on USB Remote Wakeup Event
00079  */
00080
00081 #if USB_WAKEUP_EVENT
00082 void USB_WakeUp_Event (void) {
00083 }
00084 #endif
00085
00086
00087 /*
00088  *  USB Start of Frame Event Callback
00089  *   Called automatically on USB Start of Frame Event
00090  */
00091
00092 #if USB_SOF_EVENT
00093 void USB_SOF_Event (void) {
00094 #if USB_DMA == 0
00095   if (USB_ReadEP(0x03, (uint8_t *)&DataBuf[DataIn])) {
00096     /* Data Available */
00097     DataIn += P_S;                          /* Update Data In Index */
00098     DataIn &= B_S - 1;                      /* Adjust Data In Index */
00099     if (((DataIn - DataOut) & (B_S - 1)) == (B_S/2)) {
00100       DataRun = 1;                          /* Data Stream running */
00101     }
00102   } else {
00103     /* No Data */
00104     DataRun  = 0;                           /* Data Stream not running */
00105     DataOut  = DataIn;                      /* Initialize Data Indexes */
00106   }
00107 #endif
00108 }
00109 #endif
00110
00111
00112 /*
00113  *  USB Error Event Callback
00114  *   Called automatically on USB Error Event
00115  *    Parameter:       error: Error Code
00116  */
00117
00118 #if USB_ERROR_EVENT
00119 void USB_Error_Event (uint32_t error) {
00120 }
00121 #endif
00122
00123
00124 /*
00125  *  USB Set Configuration Event Callback
00126  *   Called automatically on USB Set Configuration Request
00127  */
00128
00129 #if USB_CONFIGURE_EVENT
00130 void USB_Configure_Event (void) {
00131
00132   if (USB_Configuration) {                  /* Check if USB is configured */
00133     /* add your code here */
00134   }
00135 }
00136 #endif
00137
00138
00139 /*
00140  *  USB Set Interface Event Callback
00141  *   Called automatically on USB Set Interface Request
00142  */
00143
00144 #if USB_INTERFACE_EVENT
00145 void USB_Interface_Event (void) {
00146 }
00147 #endif
00148
00149
00150 /*
00151  *  USB Set/Clear Feature Event Callback
00152  *   Called automatically on USB Set/Clear Feature Request
00153  */
00154
00155 #if USB_FEATURE_EVENT
00156 void USB_Feature_Event (void) {
00157 }
00158 #endif
00159
00160
00161 #define P_EP(n) ((USB_EP_EVENT & (1 << (n))) ? USB_EndPoint##n : NULL)
00162
00163 /* USB Endpoint Events Callback Pointers */
00164 void (* const USB_P_EP[16]) (uint32_t event) = {
00165   P_EP(0),
00166   P_EP(1),
00167   P_EP(2),
00168   P_EP(3),
00169   P_EP(4),
00170   P_EP(5),
00171   P_EP(6),
00172   P_EP(7),
00173   P_EP(8),
00174   P_EP(9),
00175   P_EP(10),
00176   P_EP(11),
00177   P_EP(12),
00178   P_EP(13),
00179   P_EP(14),
00180   P_EP(15),
00181 };
00182
00183
00184 /*
00185  *  USB Endpoint 1 Event Callback
00186  *   Called automatically on USB Endpoint 1 Event
00187  *    Parameter:       event
00188  */
00189
00190 void USB_EndPoint1 (uint32_t event) {
00191 }
00192
00193
00194 /*
00195  *  USB Endpoint 2 Event Callback
00196  *   Called automatically on USB Endpoint 2 Event
00197  *    Parameter:       event
00198  */
00199
00200 void USB_EndPoint2 (uint32_t event) {
00201 }
00202
00203 /*
00204  *  USB Endpoint 3 Event Callback
00205  *   Called automatically on USB Endpoint 3 Event
00206  *    Parameter:       event
00207  */
00208
00209 void USB_EndPoint3 (uint32_t event) {
00210 #if USB_DMA
00211   USB_DMA_DESCRIPTOR DD;
00212
00213   if (event & USB_EVT_OUT_DMA_EOT) {
00214     /* End of Transfer */
00215     if (USB_DMA_BufAdr(0x03) != ((uint32_t)DataBuf + 2*DataIn)) {
00216       /* Data Available */
00217       DataIn += P_C*P_S;                    /* Update Data In Index */
00218       DataIn &= B_S - 1;                    /* Adjust Data In Index */
00219       if (((DataIn - DataOut) & (B_S - 1)) == (B_S/2)) {
00220         DataRun = 1;                        /* Data Stream running */
00221       }
00222     } else {
00223       /* No Data */
00224       DataRun = 0;                          /* Data Stream not running */
00225       DataOut = DataIn;                     /* Initialize Data Indexes */
00226     }
00227   }
00228   if (event & (USB_EVT_OUT_DMA_EOT) | (USB_EVT_OUT_DMA_NDR)) {
00229     /* End of Transfer or New Descriptor Request */
00230     DD.BufAdr  = (uint32_t)DataBuf + 2*DataIn; /* DMA Buffer Address */
00231     DD.BufLen  = P_C;                       /* DMA Packet Count */
00232     DD.MaxSize = 0;                         /* Must be 0 for Iso Transfer */
00233     DD.InfoAdr = (uint32_t)InfoBuf;            /* Packet Info Buffer Address */
00234     DD.Cfg.Val = 0;                         /* Initial DMA Configuration */
00235     DD.Cfg.Type.IsoEP = 1;                  /* Iso Endpoint */
00236     USB_DMA_Setup (0x03, &DD);              /* Setup DMA */
00237     USB_DMA_Enable(0x03);                   /* Enable DMA */
00238   }
00239 #else
00240   event = event;
00241 #endif
00242 }
00243
00244
00245 /*
00246  *  USB Endpoint 4 Event Callback
00247  *   Called automatically on USB Endpoint 4 Event
00248  *    Parameter:       event
00249  */
00250
00251 void USB_EndPoint4 (uint32_t event) {
00252 }
00253
00254
00255 /*
00256  *  USB Endpoint 5 Event Callback
00257  *   Called automatically on USB Endpoint 5 Event
00258  *    Parameter:       event
00259  */
00260
00261 void USB_EndPoint5 (uint32_t event) {
00262 }
00263
00264
00265 /*
00266  *  USB Endpoint 6 Event Callback
00267  *   Called automatically on USB Endpoint 6 Event
00268  *    Parameter:       event
00269  */
00270
00271 void USB_EndPoint6 (uint32_t event) {
00272 }
00273
00274
00275 /*
00276  *  USB Endpoint 7 Event Callback
00277  *   Called automatically on USB Endpoint 7 Event
00278  *    Parameter:       event
00279  */
00280
00281 void USB_EndPoint7 (uint32_t event) {
00282 }
00283
00284
00285 /*
00286  *  USB Endpoint 8 Event Callback
00287  *   Called automatically on USB Endpoint 8 Event
00288  *    Parameter:       event
00289  */
00290
00291 void USB_EndPoint8 (uint32_t event) {
00292 }
00293
00294
00295 /*
00296  *  USB Endpoint 9 Event Callback
00297  *   Called automatically on USB Endpoint 9 Event
00298  *    Parameter:       event
00299  */
00300
00301 void USB_EndPoint9 (uint32_t event) {
00302 }
00303
00304
00305 /*
00306  *  USB Endpoint 10 Event Callback
00307  *   Called automatically on USB Endpoint 10 Event
00308  *    Parameter:       event
00309  */
00310
00311 void USB_EndPoint10 (uint32_t event) {
00312 }
00313
00314
00315 /*
00316  *  USB Endpoint 11 Event Callback
00317  *   Called automatically on USB Endpoint 11 Event
00318  *    Parameter:       event
00319  */
00320
00321 void USB_EndPoint11 (uint32_t event) {
00322 }
00323
00324
00325 /*
00326  *  USB Endpoint 12 Event Callback
00327  *   Called automatically on USB Endpoint 12 Event
00328  *    Parameter:       event
00329  */
00330
00331 void USB_EndPoint12 (uint32_t event) {
00332 }
00333
00334
00335 /*
00336  *  USB Endpoint 13 Event Callback
00337  *   Called automatically on USB Endpoint 13 Event
00338  *    Parameter:       event
00339  */
00340
00341 void USB_EndPoint13 (uint32_t event) {
00342 }
00343
00344
00345 /*
00346  *  USB Endpoint 14 Event Callback
00347  *   Called automatically on USB Endpoint 14 Event
00348  *    Parameter:       event
00349  */
00350
00351 void USB_EndPoint14 (uint32_t event) {
00352 }
00353
00354
00355 /*
00356  *  USB Endpoint 15 Event Callback
00357  *   Called automatically on USB Endpoint 15 Event
00358  *    Parameter:       event
00359  */
00360
00361 void USB_EndPoint15 (uint32_t event) {
00362 }
Generated on Tue Jun 7 14:59:05 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBAudio/usbuser.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBAudio/usbuser.h

Go to the documentation of this file.
00001 /*----------------------------------------------------------------------------
00002  *      U S B  -  K e r n e l
00003  *----------------------------------------------------------------------------
00004  * Name:    usbuser.h
00005  * Purpose: USB Custom User Definitions
00006  * Version: V1.20
00007  *----------------------------------------------------------------------------
00008  *      This software is supplied "AS IS" without any warranties, express,
00009  *      implied or statutory, including but not limited to the implied
00010  *      warranties of fitness for purpose, satisfactory quality and
00011  *      noninfringement. Keil extends you a royalty-free right to reproduce
00012  *      and distribute executable files created using this software for use
00013  *      on NXP Semiconductors LPC family microcontroller devices only. Nothing
00014  *      else gives you the right to use this software.
00015  *
00016  * Copyright (c) 2009 Keil - An ARM Company. All rights reserved.
00017  *---------------------------------------------------------------------------*/
00018
00019 #ifndef __USBUSER_H__
00020 #define __USBUSER_H__
00021
00022
00023 /* USB Device Events Callback Functions */
00024 extern void USB_Power_Event     (uint32_t  power);
00025 extern void USB_Reset_Event     (void);
00026 extern void USB_Suspend_Event   (void);
00027 extern void USB_Resume_Event    (void);
00028 extern void USB_WakeUp_Event    (void);
00029 extern void USB_SOF_Event       (void);
00030 extern void USB_Error_Event     (uint32_t error);
00031
00032 /* USB Endpoint Callback Events */
00033 #define USB_EVT_SETUP       1   /* Setup Packet */
00034 #define USB_EVT_OUT         2   /* OUT Packet */
00035 #define USB_EVT_IN          3   /*  IN Packet */
00036 #define USB_EVT_OUT_NAK     4   /* OUT Packet - Not Acknowledged */
00037 #define USB_EVT_IN_NAK      5   /*  IN Packet - Not Acknowledged */
00038 #define USB_EVT_OUT_STALL   6   /* OUT Packet - Stalled */
00039 #define USB_EVT_IN_STALL    7   /*  IN Packet - Stalled */
00040 #define USB_EVT_OUT_DMA_EOT 8   /* DMA OUT EP - End of Transfer */
00041 #define USB_EVT_IN_DMA_EOT  9   /* DMA  IN EP - End of Transfer */
00042 #define USB_EVT_OUT_DMA_NDR 10  /* DMA OUT EP - New Descriptor Request */
00043 #define USB_EVT_IN_DMA_NDR  11  /* DMA  IN EP - New Descriptor Request */
00044 #define USB_EVT_OUT_DMA_ERR 12  /* DMA OUT EP - Error */
00045 #define USB_EVT_IN_DMA_ERR  13  /* DMA  IN EP - Error */
00046
00047 /* USB Endpoint Events Callback Pointers */
00048 extern void (* const USB_P_EP[16])(uint32_t event);
00049
00050 /* USB Endpoint Events Callback Functions */
00051 extern void USB_EndPoint0  (uint32_t event);
00052 extern void USB_EndPoint1  (uint32_t event);
00053 extern void USB_EndPoint2  (uint32_t event);
00054 extern void USB_EndPoint3  (uint32_t event);
00055 extern void USB_EndPoint4  (uint32_t event);
00056 extern void USB_EndPoint5  (uint32_t event);
00057 extern void USB_EndPoint6  (uint32_t event);
00058 extern void USB_EndPoint7  (uint32_t event);
00059 extern void USB_EndPoint8  (uint32_t event);
00060 extern void USB_EndPoint9  (uint32_t event);
00061 extern void USB_EndPoint10 (uint32_t event);
00062 extern void USB_EndPoint11 (uint32_t event);
00063 extern void USB_EndPoint12 (uint32_t event);
00064 extern void USB_EndPoint13 (uint32_t event);
00065 extern void USB_EndPoint14 (uint32_t event);
00066 extern void USB_EndPoint15 (uint32_t event);
00067
00068 /* USB Core Events Callback Functions */
00069 extern void USB_Configure_Event (void);
00070 extern void USB_Interface_Event (void);
00071 extern void USB_Feature_Event   (void);
00072
00073
00074 #endif  /* __USBUSER_H__ */
Generated on Tue Jun 7 14:59:05 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBCDC/usb.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBCDC/usb.h

Go to the documentation of this file.
00001 /*----------------------------------------------------------------------------
00002  *      U S B  -  K e r n e l
00003  *----------------------------------------------------------------------------
00004  * Name:    usb.h
00005  * Purpose: USB Definitions
00006  * Version: V1.20
00007  *----------------------------------------------------------------------------
00008  *      This software is supplied "AS IS" without any warranties, express,
00009  *      implied or statutory, including but not limited to the implied
00010  *      warranties of fitness for purpose, satisfactory quality and
00011  *      noninfringement. Keil extends you a royalty-free right to reproduce
00012  *      and distribute executable files created using this software for use
00013  *      on NXP Semiconductors LPC family microcontroller devices only. Nothing
00014  *      else gives you the right to use this software.
00015  *
00016  * Copyright (c) 2009 Keil - An ARM Company. All rights reserved.
00017  *---------------------------------------------------------------------------*/
00018
00019 #ifndef __USB_H__
00020 #define __USB_H__
00021 #include "lpc_types.h"
00022
00023 #if defined   (  __GNUC__  )
00024 #define __packed __attribute__((__packed__))
00025 #endif
00026
00027 #if defined     (  __CC_ARM  )
00028 typedef __packed union {
00029 #elif defined   (  __GNUC__  )
00030 typedef union __packed {
00031 #elif defined   (  __IAR_SYSTEMS_ICC__  )
00032 #pragma pack(1)
00033 typedef union {
00034 #endif
00035   uint16_t W;
00036 #if defined     (  __CC_ARM  )
00037   __packed struct {
00038 #elif defined   (  __GNUC__  )
00039   struct __packed {
00040 #elif defined   (  __IAR_SYSTEMS_ICC__  )
00041 #pragma pack(1)
00042   struct {
00043 #endif
00044     uint8_t L;
00045     uint8_t H;
00046   } WB;
00047 #ifdef __IAR_SYSTEMS_ICC__
00048 #pragma pack()
00049 #endif
00050 } WORD_BYTE;
00051 #ifdef __IAR_SYSTEMS_ICC__
00052 #pragma pack()
00053 #endif
00054
00055
00056 /* bmRequestType.Dir */
00057 #define REQUEST_HOST_TO_DEVICE     0
00058 #define REQUEST_DEVICE_TO_HOST     1
00059
00060 /* bmRequestType.Type */
00061 #define REQUEST_STANDARD           0
00062 #define REQUEST_CLASS              1
00063 #define REQUEST_VENDOR             2
00064 #define REQUEST_RESERVED           3
00065
00066 /* bmRequestType.Recipient */
00067 #define REQUEST_TO_DEVICE          0
00068 #define REQUEST_TO_INTERFACE       1
00069 #define REQUEST_TO_ENDPOINT        2
00070 #define REQUEST_TO_OTHER           3
00071
00072 /* bmRequestType Definition */
00073 #if defined     (  __CC_ARM  )
00074 typedef __packed union _REQUEST_TYPE {
00075 #elif defined   (  __GNUC__  )
00076 typedef union __packed _REQUEST_TYPE {
00077 #elif defined   (  __IAR_SYSTEMS_ICC__  )
00078 #pragma pack(1)
00079 typedef union _REQUEST_TYPE {
00080 #endif
00081 #if defined     (  __CC_ARM  )
00082         __packed struct _BM {
00083 #elif defined   (  __GNUC__  )
00084         struct __packed _BM {
00085 #elif defined   (  __IAR_SYSTEMS_ICC__  )
00086 #pragma pack(1)
00087         struct _BM {
00088 #endif
00089     uint8_t Recipient : 5;
00090     uint8_t Type      : 2;
00091     uint8_t Dir       : 1;
00092   } BM;
00093 #ifdef __IAR_SYSTEMS_ICC__
00094 #pragma pack()
00095 #endif
00096   uint8_t B;
00097 } REQUEST_TYPE;
00098 #ifdef __IAR_SYSTEMS_ICC__
00099 #pragma pack()
00100 #endif
00101
00102 /* USB Standard Request Codes */
00103 #define USB_REQUEST_GET_STATUS                 0
00104 #define USB_REQUEST_CLEAR_FEATURE              1
00105 #define USB_REQUEST_SET_FEATURE                3
00106 #define USB_REQUEST_SET_ADDRESS                5
00107 #define USB_REQUEST_GET_DESCRIPTOR             6
00108 #define USB_REQUEST_SET_DESCRIPTOR             7
00109 #define USB_REQUEST_GET_CONFIGURATION          8
00110 #define USB_REQUEST_SET_CONFIGURATION          9
00111 #define USB_REQUEST_GET_INTERFACE              10
00112 #define USB_REQUEST_SET_INTERFACE              11
00113 #define USB_REQUEST_SYNC_FRAME                 12
00114
00115 /* USB GET_STATUS Bit Values */
00116 #define USB_GETSTATUS_SELF_POWERED             0x01
00117 #define USB_GETSTATUS_REMOTE_WAKEUP            0x02
00118 #define USB_GETSTATUS_ENDPOINT_STALL           0x01
00119
00120 /* USB Standard Feature selectors */
00121 #define USB_FEATURE_ENDPOINT_STALL             0
00122 #define USB_FEATURE_REMOTE_WAKEUP              1
00123
00124 /* USB Default Control Pipe Setup Packet */
00125 #if defined     (  __CC_ARM  )
00126 typedef __packed struct _USB_SETUP_PACKET {
00127 #elif defined   (  __GNUC__  )
00128 typedef struct __packed _USB_SETUP_PACKET {
00129 #elif defined   (  __IAR_SYSTEMS_ICC__  )
00130 #pragma pack(1)
00131 typedef struct _USB_SETUP_PACKET {
00132 #endif
00133   REQUEST_TYPE bmRequestType;
00134   uint8_t         bRequest;
00135   WORD_BYTE    wValue;
00136   WORD_BYTE    wIndex;
00137   uint16_t         wLength;
00138 } USB_SETUP_PACKET;
00139 #ifdef __IAR_SYSTEMS_ICC__
00140 #pragma pack()
00141 #endif
00142
00143
00144 /* USB Descriptor Types */
00145 #define USB_DEVICE_DESCRIPTOR_TYPE             1
00146 #define USB_CONFIGURATION_DESCRIPTOR_TYPE      2
00147 #define USB_STRING_DESCRIPTOR_TYPE             3
00148 #define USB_INTERFACE_DESCRIPTOR_TYPE          4
00149 #define USB_ENDPOINT_DESCRIPTOR_TYPE           5
00150 #define USB_DEVICE_QUALIFIER_DESCRIPTOR_TYPE   6
00151 #define USB_OTHER_SPEED_CONFIG_DESCRIPTOR_TYPE 7
00152 #define USB_INTERFACE_POWER_DESCRIPTOR_TYPE    8
00153 #define USB_OTG_DESCRIPTOR_TYPE                     9
00154 #define USB_DEBUG_DESCRIPTOR_TYPE                  10
00155 #define USB_INTERFACE_ASSOCIATION_DESCRIPTOR_TYPE  11
00156
00157 /* USB Device Classes */
00158 #define USB_DEVICE_CLASS_RESERVED              0x00
00159 #define USB_DEVICE_CLASS_AUDIO                 0x01
00160 #define USB_DEVICE_CLASS_COMMUNICATIONS        0x02
00161 #define USB_DEVICE_CLASS_HUMAN_INTERFACE       0x03
00162 #define USB_DEVICE_CLASS_MONITOR               0x04
00163 #define USB_DEVICE_CLASS_PHYSICAL_INTERFACE    0x05
00164 #define USB_DEVICE_CLASS_POWER                 0x06
00165 #define USB_DEVICE_CLASS_PRINTER               0x07
00166 #define USB_DEVICE_CLASS_STORAGE               0x08
00167 #define USB_DEVICE_CLASS_HUB                   0x09
00168 #define USB_DEVICE_CLASS_MISCELLANEOUS         0xEF
00169 #define USB_DEVICE_CLASS_VENDOR_SPECIFIC       0xFF
00170
00171 /* bmAttributes in Configuration Descriptor */
00172 #define USB_CONFIG_POWERED_MASK                0x40
00173 #define USB_CONFIG_BUS_POWERED                 0x80
00174 #define USB_CONFIG_SELF_POWERED                0xC0
00175 #define USB_CONFIG_REMOTE_WAKEUP               0x20
00176
00177 /* bMaxPower in Configuration Descriptor */
00178 #define USB_CONFIG_POWER_MA(mA)                ((mA)/2)
00179
00180 /* bEndpointAddress in Endpoint Descriptor */
00181 #define USB_ENDPOINT_DIRECTION_MASK            0x80
00182 #define USB_ENDPOINT_OUT(addr)                 ((addr) | 0x00)
00183 #define USB_ENDPOINT_IN(addr)                  ((addr) | 0x80)
00184
00185 /* bmAttributes in Endpoint Descriptor */
00186 #define USB_ENDPOINT_TYPE_MASK                 0x03
00187 #define USB_ENDPOINT_TYPE_CONTROL              0x00
00188 #define USB_ENDPOINT_TYPE_ISOCHRONOUS          0x01
00189 #define USB_ENDPOINT_TYPE_BULK                 0x02
00190 #define USB_ENDPOINT_TYPE_INTERRUPT            0x03
00191 #define USB_ENDPOINT_SYNC_MASK                 0x0C
00192 #define USB_ENDPOINT_SYNC_NO_SYNCHRONIZATION   0x00
00193 #define USB_ENDPOINT_SYNC_ASYNCHRONOUS         0x04
00194 #define USB_ENDPOINT_SYNC_ADAPTIVE             0x08
00195 #define USB_ENDPOINT_SYNC_SYNCHRONOUS          0x0C
00196 #define USB_ENDPOINT_USAGE_MASK                0x30
00197 #define USB_ENDPOINT_USAGE_DATA                0x00
00198 #define USB_ENDPOINT_USAGE_FEEDBACK            0x10
00199 #define USB_ENDPOINT_USAGE_IMPLICIT_FEEDBACK   0x20
00200 #define USB_ENDPOINT_USAGE_RESERVED            0x30
00201
00202 /* USB Standard Device Descriptor */
00203 #if defined     (  __CC_ARM  )
00204 typedef __packed struct _USB_DEVICE_DESCRIPTOR {
00205 #elif defined   (  __GNUC__  )
00206 typedef struct __packed _USB_DEVICE_DESCRIPTOR {
00207 #elif defined   (  __IAR_SYSTEMS_ICC__  )
00208 #pragma pack(1)
00209 typedef struct _USB_DEVICE_DESCRIPTOR {
00210 #endif
00211   uint8_t  bLength;
00212   uint8_t  bDescriptorType;
00213   uint16_t  bcdUSB;
00214   uint8_t  bDeviceClass;
00215   uint8_t  bDeviceSubClass;
00216   uint8_t  bDeviceProtocol;
00217   uint8_t  bMaxPacketSize0;
00218   uint16_t  idVendor;
00219   uint16_t  idProduct;
00220   uint16_t  bcdDevice;
00221   uint8_t  iManufacturer;
00222   uint8_t  iProduct;
00223   uint8_t  iSerialNumber;
00224   uint8_t  bNumConfigurations;
00225 } USB_DEVICE_DESCRIPTOR;
00226 #ifdef __IAR_SYSTEMS_ICC__
00227 #pragma pack()
00228 #endif
00229
00230 /* USB 2.0 Device Qualifier Descriptor */
00231 #if defined     (  __CC_ARM  )
00232 typedef __packed struct _USB_DEVICE_QUALIFIER_DESCRIPTOR {
00233 #elif defined   (  __GNUC__  )
00234 typedef struct __packed _USB_DEVICE_QUALIFIER_DESCRIPTOR {
00235 #elif defined   (  __IAR_SYSTEMS_ICC__  )
00236 #pragma pack(1)
00237 typedef struct _USB_DEVICE_QUALIFIER_DESCRIPTOR {
00238 #endif
00239   uint8_t  bLength;
00240   uint8_t  bDescriptorType;
00241   uint16_t  bcdUSB;
00242   uint8_t  bDeviceClass;
00243   uint8_t  bDeviceSubClass;
00244   uint8_t  bDeviceProtocol;
00245   uint8_t  bMaxPacketSize0;
00246   uint8_t  bNumConfigurations;
00247   uint8_t  bReserved;
00248 } USB_DEVICE_QUALIFIER_DESCRIPTOR;
00249 #ifdef __IAR_SYSTEMS_ICC__
00250 #pragma pack()
00251 #endif
00252
00253 #if defined     (  __CC_ARM  )
00254 typedef __packed struct _USB_CONFIGURATION_DESCRIPTOR {
00255 #elif defined   (  __GNUC__  )
00256 typedef struct __packed _USB_CONFIGURATION_DESCRIPTOR {
00257 #elif defined   (  __IAR_SYSTEMS_ICC__  )
00258 #pragma pack(1)
00259 typedef struct _USB_CONFIGURATION_DESCRIPTOR {
00260 #endif
00261   uint8_t  bLength;
00262   uint8_t  bDescriptorType;
00263   uint16_t  wTotalLength;
00264   uint8_t  bNumInterfaces;
00265   uint8_t  bConfigurationValue;
00266   uint8_t  iConfiguration;
00267   uint8_t  bmAttributes;
00268   uint8_t  bMaxPower;
00269 } USB_CONFIGURATION_DESCRIPTOR;
00270 #ifdef __IAR_SYSTEMS_ICC__
00271 #pragma pack()
00272 #endif
00273
00274 /* USB Standard Interface Descriptor */
00275 #if defined     (  __CC_ARM  )
00276 typedef __packed struct _USB_INTERFACE_DESCRIPTOR {
00277 #elif defined   (  __GNUC__  )
00278 typedef struct __packed _USB_INTERFACE_DESCRIPTOR {
00279 #elif defined   (  __IAR_SYSTEMS_ICC__  )
00280 #pragma pack(1)
00281 typedef struct _USB_INTERFACE_DESCRIPTOR {
00282 #endif
00283   uint8_t  bLength;
00284   uint8_t  bDescriptorType;
00285   uint8_t  bInterfaceNumber;
00286   uint8_t  bAlternateSetting;
00287   uint8_t  bNumEndpoints;
00288   uint8_t  bInterfaceClass;
00289   uint8_t  bInterfaceSubClass;
00290   uint8_t  bInterfaceProtocol;
00291   uint8_t  iInterface;
00292 } USB_INTERFACE_DESCRIPTOR;
00293 #ifdef __IAR_SYSTEMS_ICC__
00294 #pragma pack()
00295 #endif
00296
00297 /* USB Standard Endpoint Descriptor */
00298 #if defined     (  __CC_ARM  )
00299 typedef __packed struct _USB_ENDPOINT_DESCRIPTOR {
00300 #elif defined   (  __GNUC__  )
00301 typedef struct __packed _USB_ENDPOINT_DESCRIPTOR {
00302 #elif defined   (  __IAR_SYSTEMS_ICC__  )
00303 #pragma pack(1)
00304 typedef struct _USB_ENDPOINT_DESCRIPTOR {
00305 #endif
00306   uint8_t  bLength;
00307   uint8_t  bDescriptorType;
00308   uint8_t  bEndpointAddress;
00309   uint8_t  bmAttributes;
00310   uint16_t  wMaxPacketSize;
00311   uint8_t  bInterval;
00312 } USB_ENDPOINT_DESCRIPTOR;
00313 #ifdef __IAR_SYSTEMS_ICC__
00314 #pragma pack()
00315 #endif
00316
00317 /* USB String Descriptor */
00318 #if defined     (  __CC_ARM  )
00319 typedef __packed struct _USB_STRING_DESCRIPTOR {
00320 #elif defined   (  __GNUC__  )
00321 typedef struct __packed _USB_STRING_DESCRIPTOR {
00322 #elif defined   (  __IAR_SYSTEMS_ICC__  )
00323 #pragma pack(1)
00324 typedef struct _USB_STRING_DESCRIPTOR {
00325 #endif
00326   uint8_t  bLength;
00327   uint8_t  bDescriptorType;
00328   uint16_t  bString/*[]*/;
00329 } USB_STRING_DESCRIPTOR;
00330 #ifdef __IAR_SYSTEMS_ICC__
00331 #pragma pack()
00332 #endif
00333
00334 /* USB Common Descriptor */
00335 #if defined     (  __CC_ARM  )
00336 typedef __packed struct _USB_COMMON_DESCRIPTOR {
00337 #elif defined   (  __GNUC__  )
00338 typedef struct __packed _USB_COMMON_DESCRIPTOR {
00339 #elif defined   (  __IAR_SYSTEMS_ICC__  )
00340 #pragma pack(1)
00341 typedef struct _USB_COMMON_DESCRIPTOR {
00342 #endif
00343   uint8_t  bLength;
00344   uint8_t  bDescriptorType;
00345 } USB_COMMON_DESCRIPTOR;
00346 #ifdef __IAR_SYSTEMS_ICC__
00347 #pragma pack()
00348 #endif
00349
00350
00351
00352 #endif  /* __USB_H__ */
Generated on Tue Jun 7 14:59:04 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBCDC/usbcfg.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBCDC/usbcfg.h

Go to the documentation of this file.
00001 /*----------------------------------------------------------------------------
00002  *      U S B  -  K e r n e l
00003  *----------------------------------------------------------------------------
00004  * Name:    usbcfg.h
00005  * Purpose: USB Custom Configuration
00006  * Version: V1.20
00007  *----------------------------------------------------------------------------
00008  *      This software is supplied "AS IS" without any warranties, express,
00009  *      implied or statutory, including but not limited to the implied
00010  *      warranties of fitness for purpose, satisfactory quality and
00011  *      noninfringement. Keil extends you a royalty-free right to reproduce
00012  *      and distribute executable files created using this software for use
00013  *      on NXP Semiconductors LPC family microcontroller devices only. Nothing
00014  *      else gives you the right to use this software.
00015  *
00016  * Copyright (c) 2009 Keil - An ARM Company. All rights reserved.
00017  *----------------------------------------------------------------------------
00018  * History:
00019  *          V1.20 Added vendor specific support
00020  *          V1.00 Initial Version
00021  *---------------------------------------------------------------------------*/
00022
00023 #ifndef __USBCFG_H__
00024 #define __USBCFG_H__
00025
00026
00027 //*** <<< Use Configuration Wizard in Context Menu >>> ***
00028
00029
00030 /*
00031 // <h> USB Configuration
00032 //   <o0> USB Power
00033 //        <i> Default Power Setting
00034 //        <0=> Bus-powered
00035 //        <1=> Self-powered
00036 //   <o1> Max Number of Interfaces <1-256>
00037 //   <o2> Max Number of Endpoints  <1-32>
00038 //   <o3> Max Endpoint 0 Packet Size
00039 //        <8=> 8 Bytes <16=> 16 Bytes <32=> 32 Bytes <64=> 64 Bytes
00040 //   <e4> DMA Transfer
00041 //     <i> Use DMA for selected Endpoints
00042 //     <o5.0>  Endpoint 0 Out
00043 //     <o5.1>  Endpoint 0 In
00044 //     <o5.2>  Endpoint 1 Out
00045 //     <o5.3>  Endpoint 1 In
00046 //     <o5.4>  Endpoint 2 Out
00047 //     <o5.5>  Endpoint 2 In
00048 //     <o5.6>  Endpoint 3 Out
00049 //     <o5.7>  Endpoint 3 In
00050 //     <o5.8>  Endpoint 4 Out
00051 //     <o5.9>  Endpoint 4 In
00052 //     <o5.10> Endpoint 5 Out
00053 //     <o5.11> Endpoint 5 In
00054 //     <o5.12> Endpoint 6 Out
00055 //     <o5.13> Endpoint 6 In
00056 //     <o5.14> Endpoint 7 Out
00057 //     <o5.15> Endpoint 7 In
00058 //     <o5.16> Endpoint 8 Out
00059 //     <o5.17> Endpoint 8 In
00060 //     <o5.18> Endpoint 9 Out
00061 //     <o5.19> Endpoint 9 In
00062 //     <o5.20> Endpoint 10 Out
00063 //     <o5.21> Endpoint 10 In
00064 //     <o5.22> Endpoint 11 Out
00065 //     <o5.23> Endpoint 11 In
00066 //     <o5.24> Endpoint 12 Out
00067 //     <o5.25> Endpoint 12 In
00068 //     <o5.26> Endpoint 13 Out
00069 //     <o5.27> Endpoint 13 In
00070 //     <o5.28> Endpoint 14 Out
00071 //     <o5.29> Endpoint 14 In
00072 //     <o5.30> Endpoint 15 Out
00073 //     <o5.31> Endpoint 15 In
00074 //   </e>
00075 // </h>
00076 */
00077
00078 #define USB_POWER           0
00079 #define USB_IF_NUM          4
00080 #define USB_EP_NUM          32
00081 #define USB_MAX_PACKET0     8
00082 #define USB_DMA             0
00083 #define USB_DMA_EP          0x00000000
00084
00085
00086 /*
00087 // <h> USB Event Handlers
00088 //   <h> Device Events
00089 //     <o0.0> Power Event
00090 //     <o1.0> Reset Event
00091 //     <o2.0> Suspend Event
00092 //     <o3.0> Resume Event
00093 //     <o4.0> Remote Wakeup Event
00094 //     <o5.0> Start of Frame Event
00095 //     <o6.0> Error Event
00096 //   </h>
00097 //   <h> Endpoint Events
00098 //     <o7.0>  Endpoint 0 Event
00099 //     <o7.1>  Endpoint 1 Event
00100 //     <o7.2>  Endpoint 2 Event
00101 //     <o7.3>  Endpoint 3 Event
00102 //     <o7.4>  Endpoint 4 Event
00103 //     <o7.5>  Endpoint 5 Event
00104 //     <o7.6>  Endpoint 6 Event
00105 //     <o7.7>  Endpoint 7 Event
00106 //     <o7.8>  Endpoint 8 Event
00107 //     <o7.9>  Endpoint 9 Event
00108 //     <o7.10> Endpoint 10 Event
00109 //     <o7.11> Endpoint 11 Event
00110 //     <o7.12> Endpoint 12 Event
00111 //     <o7.13> Endpoint 13 Event
00112 //     <o7.14> Endpoint 14 Event
00113 //     <o7.15> Endpoint 15 Event
00114 //   </h>
00115 //   <h> USB Core Events
00116 //     <o8.0>  Set Configuration Event
00117 //     <o9.0>  Set Interface Event
00118 //     <o10.0> Set/Clear Feature Event
00119 //   </h>
00120 // </h>
00121 */
00122
00123 #define USB_POWER_EVENT     0
00124 #define USB_RESET_EVENT     1
00125 #define USB_SUSPEND_EVENT   0
00126 #define USB_RESUME_EVENT    0
00127 #define USB_WAKEUP_EVENT    0
00128 #define USB_SOF_EVENT       0
00129 #define USB_ERROR_EVENT     0
00130 #define USB_EP_EVENT        0x0007
00131 #define USB_CONFIGURE_EVENT 1
00132 #define USB_INTERFACE_EVENT 0
00133 #define USB_FEATURE_EVENT   0
00134
00135
00136 /*
00137 // <e0> USB Class Support
00138 //   <i> enables USB Class specific Requests
00139 //   <e1> Human Interface Device (HID)
00140 //     <o2> Interface Number <0-255>
00141 //   </e>
00142 //   <e3> Mass Storage
00143 //     <o4> Interface Number <0-255>
00144 //   </e>
00145 //   <e5> Audio Device
00146 //     <o6> Control Interface Number <0-255>
00147 //     <o7> Streaming Interface 1 Number <0-255>
00148 //     <o8> Streaming Interface 2 Number <0-255>
00149 //   </e>
00150 //   <e9> Communication Device
00151 //     <o10> Control Interface Number <0-255>
00152 //     <o11> Bulk Interface Number <0-255>
00153 //     <o12> Max Communication Device Buffer Size
00154 //        <8=> 8 Bytes <16=> 16 Bytes <32=> 32 Bytes <64=> 64 Bytes
00155 //   </e>
00156 // </e>
00157 */
00158
00159 #define USB_CLASS           1
00160 #define USB_HID             0
00161 #define USB_HID_IF_NUM      0
00162 #define USB_MSC             0
00163 #define USB_MSC_IF_NUM      0
00164 #define USB_AUDIO           0
00165 #define USB_ADC_CIF_NUM     0
00166 #define USB_ADC_SIF1_NUM    1
00167 #define USB_ADC_SIF2_NUM    2
00168 #define USB_CDC                         1
00169 #define USB_CDC_CIF_NUM     0
00170 #define USB_CDC_DIF_NUM     1
00171 #define USB_CDC_BUFSIZE     64
00172
00173 /*
00174 // <e0> USB Vendor Support
00175 //   <i> enables USB Vendor specific Requests
00176 // </e>
00177 */
00178 #define USB_VENDOR          0
00179
00180
00181 #endif  /* __USBCFG_H__ */
Generated on Tue Jun 7 14:59:04 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBCDC/usbcore.c Source File

C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBCDC/usbcore.c

Go to the documentation of this file.
00001 /*----------------------------------------------------------------------------
00002  *      U S B  -  K e r n e l
00003  *----------------------------------------------------------------------------
00004  * Name:    usbcore.c
00005  * Purpose: USB Core Module
00006  * Version: V1.20
00007  *----------------------------------------------------------------------------
00008  *      This software is supplied "AS IS" without any warranties, express,
00009  *      implied or statutory, including but not limited to the implied
00010  *      warranties of fitness for purpose, satisfactory quality and
00011  *      noninfringement. Keil extends you a royalty-free right to reproduce
00012  *      and distribute executable files created using this software for use
00013  *      on NXP Semiconductors LPC family microcontroller devices only. Nothing
00014  *      else gives you the right to use this software.
00015  *
00016  * Copyright (c) 2009 Keil - An ARM Company. All rights reserved.
00017  *----------------------------------------------------------------------------
00018  * History:
00019  *          V1.20 Added vendor specific requests
00020  *                Changed string descriptor handling
00021  *                Reworked Endpoint0
00022  *          V1.00 Initial Version
00023  *----------------------------------------------------------------------------*/
00024 #include "lpc_types.h"
00025
00026 #include "usb.h"
00027 #include "usbcfg.h"
00028 #include "usbhw.h"
00029 #include "usbcore.h"
00030 #include "usbdesc.h"
00031 #include "usbuser.h"
00032
00033 #if (USB_CLASS)
00034
00035 #if (USB_AUDIO)
00036 #include "audio.h"
00037 #include "adcuser.h"
00038 #endif
00039
00040 #if (USB_HID)
00041 #include "hid.h"
00042 #include "hiduser.h"
00043 #endif
00044
00045 #if (USB_MSC)
00046 #include "msc.h"
00047 #include "mscuser.h"
00048 extern MSC_CSW CSW;
00049 #endif
00050
00051 #if (USB_CDC)
00052 #include "cdc.h"
00053 #include "cdcuser.h"
00054 #endif
00055
00056 #endif
00057
00058 #if (USB_VENDOR)
00059 #include "vendor.h"
00060 #endif
00061
00062 #if defined   (  __CC_ARM  )
00063 #pragma diag_suppress 111,1441
00064 #endif
00065
00066 #if defined   (  __GNUC__  )
00067 #define __packed __attribute__((__packed__))
00068 #endif
00069
00070 uint16_t  USB_DeviceStatus;
00071 uint8_t  USB_DeviceAddress;
00072 uint8_t  USB_Configuration;
00073 uint32_t USB_EndPointMask;
00074 uint32_t USB_EndPointHalt;
00075 uint32_t USB_EndPointStall;                         /* EP must stay stalled */
00076 uint8_t  USB_NumInterfaces;
00077 uint8_t  USB_AltSetting[USB_IF_NUM];
00078
00079 uint8_t  EP0Buf[USB_MAX_PACKET0];
00080
00081
00082 USB_EP_DATA EP0Data;
00083
00084 USB_SETUP_PACKET SetupPacket;
00085
00086
00087 /*
00088  *  Reset USB Core
00089  *    Parameters:      None
00090  *    Return Value:    None
00091  */
00092
00093 void USB_ResetCore (void) {
00094
00095   USB_DeviceStatus  = USB_POWER;
00096   USB_DeviceAddress = 0;
00097   USB_Configuration = 0;
00098   USB_EndPointMask  = 0x00010001;
00099   USB_EndPointHalt  = 0x00000000;
00100   USB_EndPointStall = 0x00000000;
00101 }
00102
00103
00104 /*
00105  *  USB Request - Setup Stage
00106  *    Parameters:      None (global SetupPacket)
00107  *    Return Value:    None
00108  */
00109
00110 void USB_SetupStage (void) {
00111   USB_ReadEP(0x00, (uint8_t *)&SetupPacket);
00112 }
00113
00114
00115 /*
00116  *  USB Request - Data In Stage
00117  *    Parameters:      None (global EP0Data)
00118  *    Return Value:    None
00119  */
00120
00121 void USB_DataInStage (void) {
00122   uint32_t cnt;
00123
00124   if (EP0Data.Count > USB_MAX_PACKET0) {
00125     cnt = USB_MAX_PACKET0;
00126   } else {
00127     cnt = EP0Data.Count;
00128   }
00129   cnt = USB_WriteEP(0x80, EP0Data.pData, cnt);
00130   EP0Data.pData += cnt;
00131   EP0Data.Count -= cnt;
00132 }
00133
00134
00135 /*
00136  *  USB Request - Data Out Stage
00137  *    Parameters:      None (global EP0Data)
00138  *    Return Value:    None
00139  */
00140
00141 void USB_DataOutStage (void) {
00142   uint32_t cnt;
00143
00144   cnt = USB_ReadEP(0x00, EP0Data.pData);
00145   EP0Data.pData += cnt;
00146   EP0Data.Count -= cnt;
00147 }
00148
00149
00150 /*
00151  *  USB Request - Status In Stage
00152  *    Parameters:      None
00153  *    Return Value:    None
00154  */
00155
00156 void USB_StatusInStage (void) {
00157   USB_WriteEP(0x80, NULL, 0);
00158 }
00159
00160
00161 /*
00162  *  USB Request - Status Out Stage
00163  *    Parameters:      None
00164  *    Return Value:    None
00165  */
00166
00167 void USB_StatusOutStage (void) {
00168   USB_ReadEP(0x00, EP0Buf);
00169 }
00170
00171
00172 /*
00173  *  Get Status USB Request
00174  *    Parameters:      None (global SetupPacket)
00175  *    Return Value:    TRUE - Success, FALSE - Error
00176  */
00177
00178 #if defined (  __IAR_SYSTEMS_ICC__  )
00179 inline uint32_t USB_ReqGetStatus (void) {
00180 #else
00181 __inline uint32_t USB_ReqGetStatus (void) {
00182 #endif
00183   uint32_t n, m;
00184
00185   switch (SetupPacket.bmRequestType.BM.Recipient) {
00186     case REQUEST_TO_DEVICE:
00187       EP0Data.pData = (uint8_t *)&USB_DeviceStatus;
00188       break;
00189     case REQUEST_TO_INTERFACE:
00190       if ((USB_Configuration != 0) && (SetupPacket.wIndex.WB.L < USB_NumInterfaces)) {
00191         *((__packed uint16_t *)EP0Buf) = 0;
00192           *((uint16_t *)EP0Buf) = 0;
00193         EP0Data.pData = EP0Buf;
00194       } else {
00195         return (FALSE);
00196       }
00197       break;
00198     case REQUEST_TO_ENDPOINT:
00199       n = SetupPacket.wIndex.WB.L & 0x8F;
00200       m = (n & 0x80) ? ((1 << 16) << (n & 0x0F)) : (1 << n);
00201       if (((USB_Configuration != 0) || ((n & 0x0F) == 0)) && (USB_EndPointMask & m)) {
00202         *((__packed uint16_t *)EP0Buf) = (USB_EndPointHalt & m) ? 1 : 0;
00203           *((uint16_t *)EP0Buf) = (USB_EndPointHalt & m) ? 1 : 0;
00204         EP0Data.pData = EP0Buf;
00205       } else {
00206         return (FALSE);
00207       }
00208       break;
00209     default:
00210       return (FALSE);
00211   }
00212   return (TRUE);
00213 }
00214
00215
00216 /*
00217  *  Set/Clear Feature USB Request
00218  *    Parameters:      sc:    0 - Clear, 1 - Set
00219  *                            (global SetupPacket)
00220  *    Return Value:    TRUE - Success, FALSE - Error
00221  */
00222
00223 #if defined (  __IAR_SYSTEMS_ICC__  )
00224 inline uint32_t USB_ReqSetClrFeature (uint32_t sc) {
00225 #else
00226 __inline uint32_t USB_ReqSetClrFeature (uint32_t sc) {
00227 #endif
00228   uint32_t n, m;
00229
00230   switch (SetupPacket.bmRequestType.BM.Recipient) {
00231     case REQUEST_TO_DEVICE:
00232       if (SetupPacket.wValue.W == USB_FEATURE_REMOTE_WAKEUP) {
00233         if (sc) {
00234           USB_WakeUpCfg(TRUE);
00235           USB_DeviceStatus |=  USB_GETSTATUS_REMOTE_WAKEUP;
00236         } else {
00237           USB_WakeUpCfg(FALSE);
00238           USB_DeviceStatus &= ~USB_GETSTATUS_REMOTE_WAKEUP;
00239         }
00240       } else {
00241         return (FALSE);
00242       }
00243       break;
00244     case REQUEST_TO_INTERFACE:
00245       return (FALSE);
00246     case REQUEST_TO_ENDPOINT:
00247       n = SetupPacket.wIndex.WB.L & 0x8F;
00248       m = (n & 0x80) ? ((1 << 16) << (n & 0x0F)) : (1 << n);
00249       if ((USB_Configuration != 0) && ((n & 0x0F) != 0) && (USB_EndPointMask & m)) {
00250         if (SetupPacket.wValue.W == USB_FEATURE_ENDPOINT_STALL) {
00251           if (sc) {
00252             USB_SetStallEP(n);
00253             USB_EndPointHalt |=  m;
00254           } else {
00255             if ((USB_EndPointStall & m) != 0) {
00256               return (TRUE);
00257             }
00258             USB_ClrStallEP(n);
00259 #if (USB_MSC)
00260             if ((n == MSC_EP_IN) && ((USB_EndPointHalt & m) != 0)) {
00261               /* Compliance Test: rewrite CSW after unstall */
00262               if (CSW.dSignature == MSC_CSW_Signature) {
00263                 USB_WriteEP(MSC_EP_IN, (uint8_t *)&CSW, sizeof(CSW));
00264               }
00265             }
00266 #endif
00267             USB_EndPointHalt &= ~m;
00268           }
00269         } else {
00270           return (FALSE);
00271         }
00272       } else {
00273         return (FALSE);
00274       }
00275       break;
00276     default:
00277       return (FALSE);
00278   }
00279   return (TRUE);
00280 }
00281
00282
00283 /*
00284  *  Set Address USB Request
00285  *    Parameters:      None (global SetupPacket)
00286  *    Return Value:    TRUE - Success, FALSE - Error
00287  */
00288
00289 #if defined (  __IAR_SYSTEMS_ICC__  )
00290 inline uint32_t USB_ReqSetAddress (void) {
00291 #else
00292 __inline uint32_t USB_ReqSetAddress (void) {
00293 #endif
00294   switch (SetupPacket.bmRequestType.BM.Recipient) {
00295     case REQUEST_TO_DEVICE:
00296       USB_DeviceAddress = 0x80 | SetupPacket.wValue.WB.L;
00297       break;
00298     default:
00299       return (FALSE);
00300   }
00301   return (TRUE);
00302 }
00303
00304
00305 /*
00306  *  Get Descriptor USB Request
00307  *    Parameters:      None (global SetupPacket)
00308  *    Return Value:    TRUE - Success, FALSE - Error
00309  */
00310
00311 #if defined (  __IAR_SYSTEMS_ICC__  )
00312 inline uint32_t USB_ReqGetDescriptor (void) {
00313 #else
00314 __inline uint32_t USB_ReqGetDescriptor (void) {
00315 #endif
00316   uint8_t  *pD;
00317   uint32_t len, n;
00318
00319   switch (SetupPacket.bmRequestType.BM.Recipient) {
00320     case REQUEST_TO_DEVICE:
00321       switch (SetupPacket.wValue.WB.H) {
00322         case USB_DEVICE_DESCRIPTOR_TYPE:
00323           EP0Data.pData = (uint8_t *)USB_DeviceDescriptor;
00324           len = USB_DEVICE_DESC_SIZE;
00325           break;
00326         case USB_CONFIGURATION_DESCRIPTOR_TYPE:
00327           pD = (uint8_t *)USB_ConfigDescriptor;
00328           for (n = 0; n != SetupPacket.wValue.WB.L; n++) {
00329             if (((USB_CONFIGURATION_DESCRIPTOR *)pD)->bLength != 0) {
00330               pD += ((USB_CONFIGURATION_DESCRIPTOR *)pD)->wTotalLength;
00331             }
00332           }
00333           if (((USB_CONFIGURATION_DESCRIPTOR *)pD)->bLength == 0) {
00334             return (FALSE);
00335           }
00336           EP0Data.pData = pD;
00337           len = ((USB_CONFIGURATION_DESCRIPTOR *)pD)->wTotalLength;
00338           break;
00339         case USB_STRING_DESCRIPTOR_TYPE:
00340           pD = (uint8_t *)USB_StringDescriptor;
00341           for (n = 0; n != SetupPacket.wValue.WB.L; n++) {
00342             if (((USB_STRING_DESCRIPTOR *)pD)->bLength != 0) {
00343               pD += ((USB_STRING_DESCRIPTOR *)pD)->bLength;
00344             }
00345           }
00346           if (((USB_STRING_DESCRIPTOR *)pD)->bLength == 0) {
00347             return (FALSE);
00348           }
00349           EP0Data.pData = pD;
00350           len = ((USB_STRING_DESCRIPTOR *)EP0Data.pData)->bLength;
00351           break;
00352         default:
00353           return (FALSE);
00354       }
00355       break;
00356     case REQUEST_TO_INTERFACE:
00357       switch (SetupPacket.wValue.WB.H) {
00358 #if USB_HID
00359         case HID_HID_DESCRIPTOR_TYPE:
00360           if (SetupPacket.wIndex.WB.L != USB_HID_IF_NUM) {
00361             return (FALSE);    /* Only Single HID Interface is supported */
00362           }
00363           EP0Data.pData = (uint8_t *)USB_ConfigDescriptor + HID_DESC_OFFSET;
00364           len = HID_DESC_SIZE;
00365           break;
00366         case HID_REPORT_DESCRIPTOR_TYPE:
00367           if (SetupPacket.wIndex.WB.L != USB_HID_IF_NUM) {
00368             return (FALSE);    /* Only Single HID Interface is supported */
00369           }
00370           EP0Data.pData = (uint8_t *)HID_ReportDescriptor;
00371           len = HID_ReportDescSize;
00372           break;
00373         case HID_PHYSICAL_DESCRIPTOR_TYPE:
00374           return (FALSE);      /* HID Physical Descriptor is not supported */
00375 #endif
00376         default:
00377           return (FALSE);
00378       }
00379 //      break;
00380     default:
00381       return (FALSE);
00382   }
00383
00384   if (EP0Data.Count > len) {
00385     EP0Data.Count = len;
00386   }
00387
00388   return (TRUE);
00389 }
00390
00391
00392 /*
00393  *  Get Configuration USB Request
00394  *    Parameters:      None (global SetupPacket)
00395  *    Return Value:    TRUE - Success, FALSE - Error
00396  */
00397
00398 #if defined (  __IAR_SYSTEMS_ICC__  )
00399 inline uint32_t USB_ReqGetConfiguration (void) {
00400 #else
00401 __inline uint32_t USB_ReqGetConfiguration (void) {
00402 #endif
00403   switch (SetupPacket.bmRequestType.BM.Recipient) {
00404     case REQUEST_TO_DEVICE:
00405       EP0Data.pData = &USB_Configuration;
00406       break;
00407     default:
00408       return (FALSE);
00409   }
00410   return (TRUE);
00411 }
00412
00413
00414 /*
00415  *  Set Configuration USB Request
00416  *    Parameters:      None (global SetupPacket)
00417  *    Return Value:    TRUE - Success, FALSE - Error
00418  */
00419
00420 #if defined (  __IAR_SYSTEMS_ICC__  )
00421 inline uint32_t USB_ReqSetConfiguration (void) {
00422 #else
00423 __inline uint32_t USB_ReqSetConfiguration (void) {
00424 #endif
00425   USB_COMMON_DESCRIPTOR *pD;
00426   uint32_t alt = 0;
00427   uint32_t n, m;
00428   uint32_t tmp;
00429
00430   switch (SetupPacket.bmRequestType.BM.Recipient) {
00431     case REQUEST_TO_DEVICE:
00432
00433       if (SetupPacket.wValue.WB.L) {
00434         pD = (USB_COMMON_DESCRIPTOR *)USB_ConfigDescriptor;
00435         while (pD->bLength) {
00436           switch (pD->bDescriptorType) {
00437             case USB_CONFIGURATION_DESCRIPTOR_TYPE:
00438               if (((USB_CONFIGURATION_DESCRIPTOR *)pD)->bConfigurationValue == SetupPacket.wValue.WB.L) {
00439                 USB_Configuration = SetupPacket.wValue.WB.L;
00440                 USB_NumInterfaces = ((USB_CONFIGURATION_DESCRIPTOR *)pD)->bNumInterfaces;
00441                 for (n = 0; n < USB_IF_NUM; n++) {
00442                   USB_AltSetting[n] = 0;
00443                 }
00444                 for (n = 1; n < 16; n++) {
00445                   if (USB_EndPointMask & (1 << n)) {
00446                     USB_DisableEP(n);
00447                   }
00448                   if (USB_EndPointMask & ((1 << 16) << n)) {
00449                     USB_DisableEP(n | 0x80);
00450                   }
00451                 }
00452                 USB_EndPointMask = 0x00010001;
00453                 USB_EndPointHalt = 0x00000000;
00454                 USB_EndPointStall= 0x00000000;
00455                 USB_Configure(TRUE);
00456                 if (((USB_CONFIGURATION_DESCRIPTOR *)pD)->bmAttributes & USB_CONFIG_POWERED_MASK) {
00457                   USB_DeviceStatus |=  USB_GETSTATUS_SELF_POWERED;
00458                 } else {
00459                   USB_DeviceStatus &= ~USB_GETSTATUS_SELF_POWERED;
00460                 }
00461               } else {
00462 //                (uint8_t *)pD += ((USB_CONFIGURATION_DESCRIPTOR *)pD)->wTotalLength;
00463                   tmp = (uint32_t)pD;
00464                   tmp += ((USB_CONFIGURATION_DESCRIPTOR *)pD)->wTotalLength;
00465                   pD = (USB_COMMON_DESCRIPTOR *)tmp;
00466                   continue;
00467               }
00468               break;
00469             case USB_INTERFACE_DESCRIPTOR_TYPE:
00470               alt = ((USB_INTERFACE_DESCRIPTOR *)pD)->bAlternateSetting;
00471               break;
00472             case USB_ENDPOINT_DESCRIPTOR_TYPE:
00473               if (alt == 0) {
00474                 n = ((USB_ENDPOINT_DESCRIPTOR *)pD)->bEndpointAddress & 0x8F;
00475                 m = (n & 0x80) ? ((1 << 16) << (n & 0x0F)) : (1 << n);
00476                 USB_EndPointMask |= m;
00477                 USB_ConfigEP((USB_ENDPOINT_DESCRIPTOR *)pD);
00478                 USB_EnableEP(n);
00479                 USB_ResetEP(n);
00480               }
00481               break;
00482           }
00483 //          (uint8_t *)pD += pD->bLength;
00484                         tmp = (uint32_t)pD;
00485                         tmp += pD->bLength;
00486                         pD = (USB_COMMON_DESCRIPTOR *)tmp;
00487         }
00488       }
00489       else {
00490         USB_Configuration = 0;
00491         for (n = 1; n < 16; n++) {
00492           if (USB_EndPointMask & (1 << n)) {
00493             USB_DisableEP(n);
00494           }
00495           if (USB_EndPointMask & ((1 << 16) << n)) {
00496             USB_DisableEP(n | 0x80);
00497           }
00498         }
00499         USB_EndPointMask  = 0x00010001;
00500         USB_EndPointHalt  = 0x00000000;
00501         USB_EndPointStall = 0x00000000;
00502         USB_Configure(FALSE);
00503       }
00504
00505       if (USB_Configuration != SetupPacket.wValue.WB.L) {
00506         return (FALSE);
00507       }
00508       break;
00509     default:
00510       return (FALSE);
00511   }
00512   return (TRUE);
00513 }
00514
00515
00516 /*
00517  *  Get Interface USB Request
00518  *    Parameters:      None (global SetupPacket)
00519  *    Return Value:    TRUE - Success, FALSE - Error
00520  */
00521
00522 #if defined (  __IAR_SYSTEMS_ICC__  )
00523 inline uint32_t USB_ReqGetInterface (void) {
00524 #else
00525 __inline uint32_t USB_ReqGetInterface (void) {
00526 #endif
00527   switch (SetupPacket.bmRequestType.BM.Recipient) {
00528     case REQUEST_TO_INTERFACE:
00529       if ((USB_Configuration != 0) && (SetupPacket.wIndex.WB.L < USB_NumInterfaces)) {
00530         EP0Data.pData = USB_AltSetting + SetupPacket.wIndex.WB.L;
00531       } else {
00532         return (FALSE);
00533       }
00534       break;
00535     default:
00536       return (FALSE);
00537   }
00538   return (TRUE);
00539 }
00540
00541
00542 /*
00543  *  Set Interface USB Request
00544  *    Parameters:      None (global SetupPacket)
00545  *    Return Value:    TRUE - Success, FALSE - Error
00546  */
00547 #if defined (  __IAR_SYSTEMS_ICC__  )
00548 inline uint32_t USB_ReqSetInterface (void) {
00549 #else
00550 __inline uint32_t USB_ReqSetInterface (void) {
00551 #endif
00552   USB_COMMON_DESCRIPTOR *pD;
00553   uint32_t ifn = 0, alt = 0, old = 0, msk = 0;
00554   uint32_t n, m;
00555   uint32_t set;
00556   uint32_t tmp;
00557
00558   switch (SetupPacket.bmRequestType.BM.Recipient) {
00559     case REQUEST_TO_INTERFACE:
00560       if (USB_Configuration == 0) return (FALSE);
00561       set = FALSE;
00562       pD  = (USB_COMMON_DESCRIPTOR *)USB_ConfigDescriptor;
00563       while (pD->bLength) {
00564         switch (pD->bDescriptorType) {
00565           case USB_CONFIGURATION_DESCRIPTOR_TYPE:
00566             if (((USB_CONFIGURATION_DESCRIPTOR *)pD)->bConfigurationValue != USB_Configuration) {
00567 //              (uint8_t *)pD += ((USB_CONFIGURATION_DESCRIPTOR *)pD)->wTotalLength;
00568                 tmp = (uint32_t)pD;
00569                 tmp += ((USB_CONFIGURATION_DESCRIPTOR *)pD)->wTotalLength;
00570                 pD = (USB_COMMON_DESCRIPTOR *)tmp;
00571
00572               continue;
00573             }
00574             break;
00575           case USB_INTERFACE_DESCRIPTOR_TYPE:
00576             ifn = ((USB_INTERFACE_DESCRIPTOR *)pD)->bInterfaceNumber;
00577             alt = ((USB_INTERFACE_DESCRIPTOR *)pD)->bAlternateSetting;
00578             msk = 0;
00579             if ((ifn == SetupPacket.wIndex.WB.L) && (alt == SetupPacket.wValue.WB.L)) {
00580               set = TRUE;
00581               old = USB_AltSetting[ifn];
00582               USB_AltSetting[ifn] = (uint8_t)alt;
00583             }
00584             break;
00585           case USB_ENDPOINT_DESCRIPTOR_TYPE:
00586             if (ifn == SetupPacket.wIndex.WB.L) {
00587               n = ((USB_ENDPOINT_DESCRIPTOR *)pD)->bEndpointAddress & 0x8F;
00588               m = (n & 0x80) ? ((1 << 16) << (n & 0x0F)) : (1 << n);
00589               if (alt == SetupPacket.wValue.WB.L) {
00590                 USB_EndPointMask |=  m;
00591                 USB_EndPointHalt &= ~m;
00592                 USB_ConfigEP((USB_ENDPOINT_DESCRIPTOR *)pD);
00593                 USB_EnableEP(n);
00594                 USB_ResetEP(n);
00595                 msk |= m;
00596               }
00597               else if ((alt == old) && ((msk & m) == 0)) {
00598                 USB_EndPointMask &= ~m;
00599                 USB_EndPointHalt &= ~m;
00600                 USB_DisableEP(n);
00601               }
00602             }
00603            break;
00604         }
00605 //        (uint8_t *)pD += pD->bLength;
00606                         tmp = (uint32_t)pD;
00607                         tmp += pD->bLength;
00608                         pD = (USB_COMMON_DESCRIPTOR *)tmp;
00609       }
00610       break;
00611     default:
00612       return (FALSE);
00613   }
00614
00615   return (set);
00616 }
00617
00618
00619 /*
00620  *  USB Endpoint 0 Event Callback
00621  *    Parameters:      event
00622  *    Return Value:    none
00623  */
00624
00625 void USB_EndPoint0 (uint32_t event) {
00626
00627   switch (event) {
00628     case USB_EVT_SETUP:
00629       USB_SetupStage();
00630       USB_DirCtrlEP(SetupPacket.bmRequestType.BM.Dir);
00631       EP0Data.Count = SetupPacket.wLength;     /* Number of bytes to transfer */
00632       switch (SetupPacket.bmRequestType.BM.Type) {
00633
00634         case REQUEST_STANDARD:
00635           switch (SetupPacket.bRequest) {
00636             case USB_REQUEST_GET_STATUS:
00637               if (!USB_ReqGetStatus()) {
00638                 goto stall_i;
00639               }
00640               USB_DataInStage();
00641               break;
00642
00643             case USB_REQUEST_CLEAR_FEATURE:
00644               if (!USB_ReqSetClrFeature(0)) {
00645                 goto stall_i;
00646               }
00647               USB_StatusInStage();
00648 #if USB_FEATURE_EVENT
00649               USB_Feature_Event();
00650 #endif
00651               break;
00652
00653             case USB_REQUEST_SET_FEATURE:
00654               if (!USB_ReqSetClrFeature(1)) {
00655                 goto stall_i;
00656               }
00657               USB_StatusInStage();
00658 #if USB_FEATURE_EVENT
00659               USB_Feature_Event();
00660 #endif
00661               break;
00662
00663             case USB_REQUEST_SET_ADDRESS:
00664               if (!USB_ReqSetAddress()) {
00665                 goto stall_i;
00666               }
00667               USB_StatusInStage();
00668               break;
00669
00670             case USB_REQUEST_GET_DESCRIPTOR:
00671               if (!USB_ReqGetDescriptor()) {
00672                 goto stall_i;
00673               }
00674               USB_DataInStage();
00675               break;
00676
00677             case USB_REQUEST_SET_DESCRIPTOR:
00678 /*stall_o:*/  USB_SetStallEP(0x00);            /* not supported */
00679               EP0Data.Count = 0;
00680               break;
00681
00682             case USB_REQUEST_GET_CONFIGURATION:
00683               if (!USB_ReqGetConfiguration()) {
00684                 goto stall_i;
00685               }
00686               USB_DataInStage();
00687               break;
00688
00689             case USB_REQUEST_SET_CONFIGURATION:
00690               if (!USB_ReqSetConfiguration()) {
00691                 goto stall_i;
00692               }
00693               USB_StatusInStage();
00694 #if USB_CONFIGURE_EVENT
00695               USB_Configure_Event();
00696 #endif
00697               break;
00698
00699             case USB_REQUEST_GET_INTERFACE:
00700               if (!USB_ReqGetInterface()) {
00701                 goto stall_i;
00702               }
00703               USB_DataInStage();
00704               break;
00705
00706             case USB_REQUEST_SET_INTERFACE:
00707               if (!USB_ReqSetInterface()) {
00708                 goto stall_i;
00709               }
00710               USB_StatusInStage();
00711 #if USB_INTERFACE_EVENT
00712               USB_Interface_Event();
00713 #endif
00714               break;
00715
00716             default:
00717               goto stall_i;
00718           }
00719           break;  /* end case REQUEST_STANDARD */
00720
00721 #if USB_CLASS
00722         case REQUEST_CLASS:
00723           switch (SetupPacket.bmRequestType.BM.Recipient) {
00724
00725             case REQUEST_TO_DEVICE:
00726               goto stall_i;                                              /* not supported */
00727
00728             case REQUEST_TO_INTERFACE:
00729 #if USB_HID
00730               if (SetupPacket.wIndex.WB.L == USB_HID_IF_NUM) {           /* IF number correct? */
00731                 switch (SetupPacket.bRequest) {
00732                   case HID_REQUEST_GET_REPORT:
00733                     if (HID_GetReport()) {
00734                       EP0Data.pData = EP0Buf;                            /* point to data to be sent */
00735                       USB_DataInStage();                                 /* send requested data */
00736                       goto setup_class_ok;
00737                     }
00738                     break;
00739                   case HID_REQUEST_SET_REPORT:
00740                     EP0Data.pData = EP0Buf;                              /* data to be received */
00741                     goto setup_class_ok;
00742                   case HID_REQUEST_GET_IDLE:
00743                     if (HID_GetIdle()) {
00744                       EP0Data.pData = EP0Buf;                            /* point to data to be sent */
00745                       USB_DataInStage();                                 /* send requested data */
00746                       goto setup_class_ok;
00747                     }
00748                     break;
00749                   case HID_REQUEST_SET_IDLE:
00750                     if (HID_SetIdle()) {
00751                       USB_StatusInStage();                               /* send Acknowledge */
00752                       goto setup_class_ok;
00753                     }
00754                     break;
00755                   case HID_REQUEST_GET_PROTOCOL:
00756                     if (HID_GetProtocol()) {
00757                       EP0Data.pData = EP0Buf;                            /* point to data to be sent */
00758                       USB_DataInStage();                                 /* send requested data */
00759                       goto setup_class_ok;
00760                     }
00761                     break;
00762                   case HID_REQUEST_SET_PROTOCOL:
00763                     if (HID_SetProtocol()) {
00764                       USB_StatusInStage();                               /* send Acknowledge */
00765                       goto setup_class_ok;
00766                     }
00767                     break;
00768                 }
00769               }
00770 #endif  /* USB_HID */
00771 #if USB_MSC
00772               if (SetupPacket.wIndex.WB.L == USB_MSC_IF_NUM) {           /* IF number correct? */
00773                 switch (SetupPacket.bRequest) {
00774                   case MSC_REQUEST_RESET:
00775                     if ((SetupPacket.wValue.W == 0) &&                   /* RESET with invalid parameters -> STALL */
00776                         (SetupPacket.wLength  == 0)) {
00777                       if (MSC_Reset()) {
00778                         USB_StatusInStage();
00779                         goto setup_class_ok;
00780                       }
00781                     }
00782                     break;
00783                   case MSC_REQUEST_GET_MAX_LUN:
00784                     if ((SetupPacket.wValue.W == 0) &&                   /* GET_MAX_LUN with invalid parameters -> STALL */
00785                         (SetupPacket.wLength  == 1)) {
00786                       if (MSC_GetMaxLUN()) {
00787                         EP0Data.pData = EP0Buf;
00788                         USB_DataInStage();
00789                         goto setup_class_ok;
00790                       }
00791                     }
00792                     break;
00793                 }
00794               }
00795 #endif  /* USB_MSC */
00796 #if USB_AUDIO
00797               if ((SetupPacket.wIndex.WB.L == USB_ADC_CIF_NUM)  ||       /* IF number correct? */
00798                   (SetupPacket.wIndex.WB.L == USB_ADC_SIF1_NUM) ||
00799                   (SetupPacket.wIndex.WB.L == USB_ADC_SIF2_NUM)) {
00800                 switch (SetupPacket.bRequest) {
00801                   case AUDIO_REQUEST_GET_CUR:
00802                   case AUDIO_REQUEST_GET_MIN:
00803                   case AUDIO_REQUEST_GET_MAX:
00804                   case AUDIO_REQUEST_GET_RES:
00805                     if (ADC_IF_GetRequest()) {
00806                       EP0Data.pData = EP0Buf;                            /* point to data to be sent */
00807                       USB_DataInStage();                                 /* send requested data */
00808                       goto setup_class_ok;
00809                     }
00810                     break;
00811                   case AUDIO_REQUEST_SET_CUR:
00812 //                case AUDIO_REQUEST_SET_MIN:
00813 //                case AUDIO_REQUEST_SET_MAX:
00814 //                case AUDIO_REQUEST_SET_RES:
00815                     EP0Data.pData = EP0Buf;                              /* data to be received */
00816                     goto setup_class_ok;
00817                 }
00818               }
00819 #endif  /* USB_AUDIO */
00820 #if USB_CDC
00821               if ((SetupPacket.wIndex.WB.L == USB_CDC_CIF_NUM)  ||       /* IF number correct? */
00822                   (SetupPacket.wIndex.WB.L == USB_CDC_DIF_NUM)) {
00823                 switch (SetupPacket.bRequest) {
00824                   case CDC_SEND_ENCAPSULATED_COMMAND:
00825                     EP0Data.pData = EP0Buf;                              /* data to be received, see USB_EVT_OUT */
00826                     goto setup_class_ok;
00827                   case CDC_GET_ENCAPSULATED_RESPONSE:
00828                     if (CDC_GetEncapsulatedResponse()) {
00829                       EP0Data.pData = EP0Buf;                            /* point to data to be sent */
00830                       USB_DataInStage();                                 /* send requested data */
00831                       goto setup_class_ok;
00832                     }
00833                     break;
00834                   case CDC_SET_COMM_FEATURE:
00835                     EP0Data.pData = EP0Buf;                              /* data to be received, see USB_EVT_OUT */
00836                     goto setup_class_ok;
00837                   case CDC_GET_COMM_FEATURE:
00838                     if (CDC_GetCommFeature(SetupPacket.wValue.W)) {
00839                       EP0Data.pData = EP0Buf;                            /* point to data to be sent */
00840                       USB_DataInStage();                                 /* send requested data */
00841                       goto setup_class_ok;
00842                     }
00843                     break;
00844                   case CDC_CLEAR_COMM_FEATURE:
00845                     if (CDC_ClearCommFeature(SetupPacket.wValue.W)) {
00846                       USB_StatusInStage();                               /* send Acknowledge */
00847                       goto setup_class_ok;
00848                     }
00849                     break;
00850                   case CDC_SET_LINE_CODING:
00851                     EP0Data.pData = EP0Buf;                              /* data to be received, see USB_EVT_OUT */
00852                     goto setup_class_ok;
00853                   case CDC_GET_LINE_CODING:
00854                     if (CDC_GetLineCoding()) {
00855                       EP0Data.pData = EP0Buf;                            /* point to data to be sent */
00856                       USB_DataInStage();                                 /* send requested data */
00857                       goto setup_class_ok;
00858                     }
00859                     break;
00860                   case CDC_SET_CONTROL_LINE_STATE:
00861                     if (CDC_SetControlLineState(SetupPacket.wValue.W)) {
00862                       USB_StatusInStage();                               /* send Acknowledge */
00863                       goto setup_class_ok;
00864                     }
00865                     break;
00866                   case CDC_SEND_BREAK:
00867                     if (CDC_SendBreak(SetupPacket.wValue.W)) {
00868                       USB_StatusInStage();                               /* send Acknowledge */
00869                       goto setup_class_ok;
00870                     }
00871                     break;
00872                 }
00873               }
00874 #endif  /* USB_CDC */
00875               goto stall_i;                                              /* not supported */
00876               /* end case REQUEST_TO_INTERFACE */
00877
00878             case REQUEST_TO_ENDPOINT:
00879 #if USB_AUDIO
00880               switch (SetupPacket.bRequest) {
00881                 case AUDIO_REQUEST_GET_CUR:
00882                 case AUDIO_REQUEST_GET_MIN:
00883                 case AUDIO_REQUEST_GET_MAX:
00884                 case AUDIO_REQUEST_GET_RES:
00885                   if (ADC_EP_GetRequest()) {
00886                     EP0Data.pData = EP0Buf;                              /* point to data to be sent */
00887                     USB_DataInStage();                                   /* send requested data */
00888                     goto setup_class_ok;
00889                   }
00890                   break;
00891                 case AUDIO_REQUEST_SET_CUR:
00892 //              case AUDIO_REQUEST_SET_MIN:
00893 //              case AUDIO_REQUEST_SET_MAX:
00894 //              case AUDIO_REQUEST_SET_RES:
00895                   EP0Data.pData = EP0Buf;                                /* data to be received */
00896                   goto setup_class_ok;
00897               }
00898 #endif  /* USB_AUDIO */
00899               goto stall_i;
00900               /* end case REQUEST_TO_ENDPOINT */
00901
00902             default:
00903               goto stall_i;
00904           }
00905 setup_class_ok:                                                          /* request finished successfully */
00906           break;  /* end case REQUEST_CLASS */
00907 #endif  /* USB_CLASS */
00908
00909 #if USB_VENDOR
00910         case REQUEST_VENDOR:
00911           switch (SetupPacket.bmRequestType.BM.Recipient) {
00912
00913             case REQUEST_TO_DEVICE:
00914               if (!USB_ReqVendorDev(TRUE)) {
00915                 goto stall_i;                                            /* not supported */
00916               }
00917               break;
00918
00919             case REQUEST_TO_INTERFACE:
00920               if (!USB_ReqVendorIF(TRUE)) {
00921                 goto stall_i;                                            /* not supported */
00922               }
00923               break;
00924
00925             case REQUEST_TO_ENDPOINT:
00926               if (!USB_ReqVendorEP(TRUE)) {
00927                 goto stall_i;                                            /* not supported */
00928               }
00929               break;
00930
00931             default:
00932               goto stall_i;
00933           }
00934
00935           if (SetupPacket.wLength) {
00936             if (SetupPacket.bmRequestType.BM.Dir == REQUEST_DEVICE_TO_HOST) {
00937               USB_DataInStage();
00938             }
00939           } else {
00940             USB_StatusInStage();
00941           }
00942
00943           break;  /* end case REQUEST_VENDOR */
00944 #endif  /* USB_VENDOR */
00945
00946         default:
00947 stall_i:  USB_SetStallEP(0x80);
00948           EP0Data.Count = 0;
00949           break;
00950       }
00951       break;  /* end case USB_EVT_SETUP */
00952
00953     case USB_EVT_OUT:
00954       if (SetupPacket.bmRequestType.BM.Dir == REQUEST_HOST_TO_DEVICE) {
00955         if (EP0Data.Count) {                                             /* still data to receive ? */
00956           USB_DataOutStage();                                            /* receive data */
00957           if (EP0Data.Count == 0) {                                      /* data complete ? */
00958             switch (SetupPacket.bmRequestType.BM.Type) {
00959
00960               case REQUEST_STANDARD:
00961                 goto stall_i;                                            /* not supported */
00962
00963 #if (USB_CLASS)
00964               case REQUEST_CLASS:
00965                 switch (SetupPacket.bmRequestType.BM.Recipient) {
00966                   case REQUEST_TO_DEVICE:
00967                     goto stall_i;                                        /* not supported */
00968
00969                   case REQUEST_TO_INTERFACE:
00970 #if USB_HID
00971                     if (SetupPacket.wIndex.WB.L == USB_HID_IF_NUM) {     /* IF number correct? */
00972                       switch (SetupPacket.bRequest) {
00973                         case HID_REQUEST_SET_REPORT:
00974                           if (HID_SetReport()) {
00975                             USB_StatusInStage();                         /* send Acknowledge */
00976                             goto out_class_ok;
00977                           }
00978                           break;
00979                       }
00980                     }
00981 #endif  /* USB_HID */
00982 #if USB_AUDIO
00983                     if ((SetupPacket.wIndex.WB.L == USB_ADC_CIF_NUM)  || /* IF number correct? */
00984                         (SetupPacket.wIndex.WB.L == USB_ADC_SIF1_NUM) ||
00985                         (SetupPacket.wIndex.WB.L == USB_ADC_SIF2_NUM)) {
00986                       switch (SetupPacket.bRequest) {
00987                         case AUDIO_REQUEST_SET_CUR:
00988 //                      case AUDIO_REQUEST_SET_MIN:
00989 //                      case AUDIO_REQUEST_SET_MAX:
00990 //                      case AUDIO_REQUEST_SET_RES:
00991                           if (ADC_IF_SetRequest()) {
00992                             USB_StatusInStage();                         /* send Acknowledge */
00993                             goto out_class_ok;
00994                           }
00995                           break;
00996                       }
00997                     }
00998 #endif  /* USB_AUDIO */
00999 #if USB_CDC
01000                     if ((SetupPacket.wIndex.WB.L == USB_CDC_CIF_NUM)  || /* IF number correct? */
01001                         (SetupPacket.wIndex.WB.L == USB_CDC_DIF_NUM)) {
01002                       switch (SetupPacket.bRequest) {
01003                         case CDC_SEND_ENCAPSULATED_COMMAND:
01004                           if (CDC_SendEncapsulatedCommand()) {
01005                             USB_StatusInStage();                         /* send Acknowledge */
01006                             goto out_class_ok;
01007                           }
01008                           break;
01009                         case CDC_SET_COMM_FEATURE:
01010                           if (CDC_SetCommFeature(SetupPacket.wValue.W)) {
01011                             USB_StatusInStage();                         /* send Acknowledge */
01012                             goto out_class_ok;
01013                           }
01014                           break;
01015                         case CDC_SET_LINE_CODING:
01016                           if (CDC_SetLineCoding()) {
01017                             USB_StatusInStage();                         /* send Acknowledge */
01018                             goto out_class_ok;
01019                           }
01020                           break;
01021                       }
01022                     }
01023 #endif  /* USB_CDC */
01024                     goto stall_i;
01025                     /* end case REQUEST_TO_INTERFACE */
01026
01027                   case REQUEST_TO_ENDPOINT:
01028 #if USB_AUDIO
01029                     switch (SetupPacket.bRequest) {
01030                       case AUDIO_REQUEST_SET_CUR:
01031 //                    case AUDIO_REQUEST_SET_MIN:
01032 //                    case AUDIO_REQUEST_SET_MAX:
01033 //                    case AUDIO_REQUEST_SET_RES:
01034                         if (ADC_EP_SetRequest()) {
01035                           USB_StatusInStage();                           /* send Acknowledge */
01036                           goto out_class_ok;
01037                         }
01038                         break;
01039                     }
01040 #endif  /* USB_AUDIO */
01041                     goto stall_i;
01042                     /* end case REQUEST_TO_ENDPOINT */
01043
01044                   default:
01045                     goto stall_i;
01046                 }
01047 out_class_ok:                                                            /* request finished successfully */
01048                 break; /* end case REQUEST_CLASS */
01049 #endif  /* USB_CLASS */
01050
01051 #if USB_VENDOR
01052               case REQUEST_VENDOR:
01053                 switch (SetupPacket.bmRequestType.BM.Recipient) {
01054
01055                   case REQUEST_TO_DEVICE:
01056                     if (!USB_ReqVendorDev(FALSE)) {
01057                       goto stall_i;                                      /* not supported */
01058                     }
01059                     break;
01060
01061                   case REQUEST_TO_INTERFACE:
01062                     if (!USB_ReqVendorIF(FALSE)) {
01063                       goto stall_i;                                      /* not supported */
01064                     }
01065                     break;
01066
01067                   case REQUEST_TO_ENDPOINT:
01068                     if (!USB_ReqVendorEP(FALSE)) {
01069                       goto stall_i;                                      /* not supported */
01070                     }
01071                     break;
01072
01073                   default:
01074                     goto stall_i;
01075                 }
01076
01077                 USB_StatusInStage();
01078
01079                 break;  /* end case REQUEST_VENDOR */
01080 #endif  /* USB_VENDOR */
01081
01082               default:
01083                 goto stall_i;
01084             }
01085           }
01086         }
01087       } else {
01088         USB_StatusOutStage();                                            /* receive Acknowledge */
01089       }
01090       break;  /* end case USB_EVT_OUT */
01091
01092     case USB_EVT_IN :
01093       if (SetupPacket.bmRequestType.BM.Dir == REQUEST_DEVICE_TO_HOST) {
01094         USB_DataInStage();                                               /* send data */
01095       } else {
01096         if (USB_DeviceAddress & 0x80) {
01097           USB_DeviceAddress &= 0x7F;
01098           USB_SetAddress(USB_DeviceAddress);
01099         }
01100       }
01101       break;  /* end case USB_EVT_IN */
01102
01103     case USB_EVT_OUT_STALL:
01104       USB_ClrStallEP(0x00);
01105       break;
01106
01107     case USB_EVT_IN_STALL:
01108       USB_ClrStallEP(0x80);
01109       break;
01110
01111   }
01112 }
Generated on Tue Jun 7 14:59:04 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBCDC/usbcore.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBCDC/usbcore.h

Go to the documentation of this file.
00001 /*----------------------------------------------------------------------------
00002  *      U S B  -  K e r n e l
00003  *----------------------------------------------------------------------------
00004  * Name:    usbcore.h
00005  * Purpose: USB Core Definitions
00006  * Version: V1.20
00007  *----------------------------------------------------------------------------
00008  *      This software is supplied "AS IS" without any warranties, express,
00009  *      implied or statutory, including but not limited to the implied
00010  *      warranties of fitness for purpose, satisfactory quality and
00011  *      noninfringement. Keil extends you a royalty-free right to reproduce
00012  *      and distribute executable files created using this software for use
00013  *      on NXP Semiconductors LPC microcontroller devices only. Nothing else
00014  *      gives you the right to use this software.
00015  *
00016  * Copyright (c) 2009 Keil - An ARM Company. All rights reserved.
00017  *---------------------------------------------------------------------------*/
00018
00019 #ifndef __USBCORE_H__
00020 #define __USBCORE_H__
00021
00022
00023 /* USB Endpoint Data Structure */
00024 typedef struct _USB_EP_DATA {
00025   uint8_t  *pData;
00026   uint16_t Count;
00027 } USB_EP_DATA;
00028
00029 /* USB Core Global Variables */
00030 extern uint16_t USB_DeviceStatus;
00031 extern uint8_t  USB_DeviceAddress;
00032 extern uint8_t  USB_Configuration;
00033 extern uint32_t USB_EndPointMask;
00034 extern uint32_t USB_EndPointHalt;
00035 extern uint32_t USB_EndPointStall;
00036 extern uint8_t  USB_AltSetting[USB_IF_NUM];
00037
00038 /* USB Endpoint 0 Buffer */
00039 extern uint8_t  EP0Buf[USB_MAX_PACKET0];
00040
00041 /* USB Endpoint 0 Data Info */
00042 extern USB_EP_DATA EP0Data;
00043
00044 /* USB Setup Packet */
00045 extern USB_SETUP_PACKET SetupPacket;
00046
00047 /* USB Core Functions */
00048 extern void USB_ResetCore (void);
00049
00050
00051
00052 #endif  /* __USBCORE_H__ */
Generated on Tue Jun 7 14:59:04 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBCDC/usbdesc.c Source File

C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBCDC/usbdesc.c

Go to the documentation of this file.
00001 /*----------------------------------------------------------------------------
00002  *      U S B  -  K e r n e l
00003  *----------------------------------------------------------------------------
00004  * Name:    usbdesc.c
00005  * Purpose: USB Descriptors
00006  * Version: V1.20
00007  *----------------------------------------------------------------------------
00008  *      This software is supplied "AS IS" without any warranties, express,
00009  *      implied or statutory, including but not limited to the implied
00010  *      warranties of fitness for purpose, satisfactory quality and
00011  *      noninfringement. Keil extends you a royalty-free right to reproduce
00012  *      and distribute executable files created using this software for use
00013  *      on NXP Semiconductors LPC microcontroller devices only. Nothing else
00014  *      gives you the right to use this software.
00015  *
00016  * Copyright (c) 2009 Keil - An ARM Company. All rights reserved.
00017  *----------------------------------------------------------------------------
00018  * History:
00019  *          V1.20 Changed string descriptor handling
00020  *          V1.00 Initial Version
00021  *---------------------------------------------------------------------------*/
00022 #include "lpc_types.h"
00023 #include "usb.h"
00024 #include "cdc.h"
00025 #include "usbcfg.h"
00026 #include "usbdesc.h"
00027
00028
00029 /* USB Standard Device Descriptor */
00030 const uint8_t USB_DeviceDescriptor[] = {
00031   USB_DEVICE_DESC_SIZE,              /* bLength */
00032   USB_DEVICE_DESCRIPTOR_TYPE,        /* bDescriptorType */
00033   WBVAL(0x0200), /* 2.0 */           /* bcdUSB */
00034   USB_DEVICE_CLASS_COMMUNICATIONS,   /* bDeviceClass CDC*/
00035   0x00,                              /* bDeviceSubClass */
00036   0x00,                              /* bDeviceProtocol */
00037   USB_MAX_PACKET0,                   /* bMaxPacketSize0 */
00038   WBVAL(0x1FC9),                     /* idVendor */
00039   WBVAL(0x2002),                     /* idProduct */
00040   WBVAL(0x0100), /* 1.00 */          /* bcdDevice */
00041   0x01,                              /* iManufacturer */
00042   0x02,                              /* iProduct */
00043   0x03,                              /* iSerialNumber */
00044   0x01                               /* bNumConfigurations: one possible configuration*/
00045 };
00046
00047 /* USB Configuration Descriptor */
00048 /*   All Descriptors (Configuration, Interface, Endpoint, Class, Vendor */
00049 const uint8_t USB_ConfigDescriptor[] = {
00050 /* Configuration 1 */
00051   USB_CONFIGUARTION_DESC_SIZE,       /* bLength */
00052   USB_CONFIGURATION_DESCRIPTOR_TYPE, /* bDescriptorType */
00053   WBVAL(                             /* wTotalLength */
00054     1*USB_CONFIGUARTION_DESC_SIZE +
00055     1*USB_INTERFACE_DESC_SIZE     +  /* communication interface */
00056     0x0013                        +  /* CDC functions */
00057     1*USB_ENDPOINT_DESC_SIZE      +  /* interrupt endpoint */
00058     1*USB_INTERFACE_DESC_SIZE     +  /* data interface */
00059     2*USB_ENDPOINT_DESC_SIZE         /* bulk endpoints */
00060       ),
00061   0x02,                              /* bNumInterfaces */
00062   0x01,                              /* bConfigurationValue: 0x01 is used to select this configuration */
00063   0x00,                              /* iConfiguration: no string to describe this configuration */
00064   USB_CONFIG_BUS_POWERED /*|*/       /* bmAttributes */
00065 /*USB_CONFIG_REMOTE_WAKEUP*/,
00066   USB_CONFIG_POWER_MA(100),          /* bMaxPower, device power consumption is 100 mA */
00067 /* Interface 0, Alternate Setting 0, Communication class interface descriptor */
00068   USB_INTERFACE_DESC_SIZE,           /* bLength */
00069   USB_INTERFACE_DESCRIPTOR_TYPE,     /* bDescriptorType */
00070   USB_CDC_CIF_NUM,                   /* bInterfaceNumber: Number of Interface */
00071   0x00,                              /* bAlternateSetting: Alternate setting */
00072   0x01,                              /* bNumEndpoints: One endpoint used */
00073   CDC_COMMUNICATION_INTERFACE_CLASS, /* bInterfaceClass: Communication Interface Class */
00074   CDC_ABSTRACT_CONTROL_MODEL,        /* bInterfaceSubClass: Abstract Control Model */
00075   0x00,                              /* bInterfaceProtocol: no protocol used */
00076   0x5E,                              /* iInterface: */
00077 /*Header Functional Descriptor*/
00078   0x05,                              /* bLength: Endpoint Descriptor size */
00079   CDC_CS_INTERFACE,                  /* bDescriptorType: CS_INTERFACE */
00080   CDC_HEADER,                        /* bDescriptorSubtype: Header Func Desc */
00081   WBVAL(CDC_V1_10), /* 1.10 */       /* bcdCDC */
00082 /*Call Management Functional Descriptor*/
00083   0x05,                              /* bFunctionLength */
00084   CDC_CS_INTERFACE,                  /* bDescriptorType: CS_INTERFACE */
00085   CDC_CALL_MANAGEMENT,               /* bDescriptorSubtype: Call Management Func Desc */
00086   0x01,                              /* bmCapabilities: device handles call management */
00087   0x01,                              /* bDataInterface: CDC data IF ID */
00088 /*Abstract Control Management Functional Descriptor*/
00089   0x04,                              /* bFunctionLength */
00090   CDC_CS_INTERFACE,                  /* bDescriptorType: CS_INTERFACE */
00091   CDC_ABSTRACT_CONTROL_MANAGEMENT,   /* bDescriptorSubtype: Abstract Control Management desc */
00092   0x02,                              /* bmCapabilities: SET_LINE_CODING, GET_LINE_CODING, SET_CONTROL_LINE_STATE supported */
00093 /*Union Functional Descriptor*/
00094   0x05,                              /* bFunctionLength */
00095   CDC_CS_INTERFACE,                  /* bDescriptorType: CS_INTERFACE */
00096   CDC_UNION,                         /* bDescriptorSubtype: Union func desc */
00097   USB_CDC_CIF_NUM,                   /* bMasterInterface: Communication class interface is master */
00098   USB_CDC_DIF_NUM,                   /* bSlaveInterface0: Data class interface is slave 0 */
00099 /*Endpoint 1 Descriptor*/            /* event notification (optional) */
00100   USB_ENDPOINT_DESC_SIZE,            /* bLength */
00101   USB_ENDPOINT_DESCRIPTOR_TYPE,      /* bDescriptorType */
00102   USB_ENDPOINT_IN(1),                /* bEndpointAddress */
00103   USB_ENDPOINT_TYPE_INTERRUPT,       /* bmAttributes */
00104   WBVAL(0x0010),                     /* wMaxPacketSize */
00105   0x02,          /* 2ms */           /* bInterval */
00106 /* Interface 1, Alternate Setting 0, Data class interface descriptor*/
00107   USB_INTERFACE_DESC_SIZE,           /* bLength */
00108   USB_INTERFACE_DESCRIPTOR_TYPE,     /* bDescriptorType */
00109   USB_CDC_DIF_NUM,                   /* bInterfaceNumber: Number of Interface */
00110   0x00,                              /* bAlternateSetting: no alternate setting */
00111   0x02,                              /* bNumEndpoints: two endpoints used */
00112   CDC_DATA_INTERFACE_CLASS,          /* bInterfaceClass: Data Interface Class */
00113   0x00,                              /* bInterfaceSubClass: no subclass available */
00114   0x00,                              /* bInterfaceProtocol: no protocol used */
00115   0x5E,                              /* iInterface: */
00116 /* Endpoint, EP2 Bulk Out */
00117   USB_ENDPOINT_DESC_SIZE,            /* bLength */
00118   USB_ENDPOINT_DESCRIPTOR_TYPE,      /* bDescriptorType */
00119   USB_ENDPOINT_OUT(2),               /* bEndpointAddress */
00120   USB_ENDPOINT_TYPE_BULK,            /* bmAttributes */
00121   WBVAL(USB_CDC_BUFSIZE),            /* wMaxPacketSize */
00122   0x00,                              /* bInterval: ignore for Bulk transfer */
00123 /* Endpoint, EP2 Bulk In */
00124   USB_ENDPOINT_DESC_SIZE,            /* bLength */
00125   USB_ENDPOINT_DESCRIPTOR_TYPE,      /* bDescriptorType */
00126   USB_ENDPOINT_IN(2),                /* bEndpointAddress */
00127   USB_ENDPOINT_TYPE_BULK,            /* bmAttributes */
00128   WBVAL(USB_CDC_BUFSIZE),            /* wMaxPacketSize */
00129   0x00,                              /* bInterval: ignore for Bulk transfer */
00130 /* Terminator */
00131   0                                  /* bLength */
00132 };
00133
00134
00135
00136
00137 /* USB String Descriptor (optional) */
00138 const uint8_t USB_StringDescriptor[] = {
00139 /* Index 0x00: LANGID Codes */
00140   0x04,                              /* bLength */
00141   USB_STRING_DESCRIPTOR_TYPE,        /* bDescriptorType */
00142   WBVAL(0x0409), /* US English */    /* wLANGID */
00143 /* Index 0x01: Manufacturer */
00144   (13*2 + 2),                        /* bLength (13 Char + Type + lenght) */
00145   USB_STRING_DESCRIPTOR_TYPE,        /* bDescriptorType */
00146   'N',0,
00147   'X',0,
00148   'P',0,
00149   ' ',0,
00150   'S',0,
00151   'E',0,
00152   'M',0,
00153   'I',0,
00154   'C',0,
00155   'O',0,
00156   'N',0,
00157   'D',0,
00158   ' ',0,
00159 /* Index 0x02: Product */
00160   (17*2 + 2),                        /* bLength ( 17 Char + Type + lenght) */
00161   USB_STRING_DESCRIPTOR_TYPE,        /* bDescriptorType */
00162   'N',0,
00163   'X',0,
00164   'P',0,
00165   ' ',0,
00166   'L',0,
00167   'P',0,
00168   'C',0,
00169   '1',0,
00170   '7',0,
00171   'x',0,
00172   'x',0,
00173   ' ',0,
00174   'V',0,
00175   'C',0,
00176   'O',0,
00177   'M',0,
00178   ' ',0,
00179 /* Index 0x03: Serial Number */
00180   (12*2 + 2),                        /* bLength (12 Char + Type + lenght) */
00181   USB_STRING_DESCRIPTOR_TYPE,        /* bDescriptorType */
00182   'D',0,
00183   'E',0,
00184   'M',0,
00185   'O',0,
00186   '0',0,
00187   '0',0,
00188   '0',0,
00189   '0',0,
00190   '0',0,
00191   '0',0,
00192   '0',0,
00193   '0',0,
00194 /* Index 0x04: Interface 0, Alternate Setting 0 */
00195   ( 4*2 + 2),                        /* bLength (4 Char + Type + lenght) */
00196   USB_STRING_DESCRIPTOR_TYPE,        /* bDescriptorType */
00197   'V',0,
00198   'C',0,
00199   'O',0,
00200   'M',0,
00201 };
Generated on Tue Jun 7 14:59:04 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBCDC/usbdesc.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBCDC/usbdesc.h

Go to the documentation of this file.
00001 /*----------------------------------------------------------------------------
00002  *      U S B  -  K e r n e l
00003  *----------------------------------------------------------------------------
00004  * Name:    usbdesc.h
00005  * Purpose: USB Descriptors Definitions
00006  * Version: V1.20
00007  *----------------------------------------------------------------------------
00008  *      This software is supplied "AS IS" without any warranties, express,
00009  *      implied or statutory, including but not limited to the implied
00010  *      warranties of fitness for purpose, satisfactory quality and
00011  *      noninfringement. Keil extends you a royalty-free right to reproduce
00012  *      and distribute executable files created using this software for use
00013  *      on NXP Semiconductors LPC microcontroller devices only. Nothing else
00014  *      gives you the right to use this software.
00015  *
00016  * Copyright (c) 2009 Keil - An ARM Company. All rights reserved.
00017  *---------------------------------------------------------------------------*/
00018
00019 #ifndef __USBDESC_H__
00020 #define __USBDESC_H__
00021
00022
00023 #define WBVAL(x) (x & 0xFF),((x >> 8) & 0xFF)
00024
00025 #define USB_DEVICE_DESC_SIZE        (sizeof(USB_DEVICE_DESCRIPTOR))
00026 #define USB_CONFIGUARTION_DESC_SIZE (sizeof(USB_CONFIGURATION_DESCRIPTOR))
00027 #define USB_INTERFACE_DESC_SIZE     (sizeof(USB_INTERFACE_DESCRIPTOR))
00028 #define USB_ENDPOINT_DESC_SIZE      (sizeof(USB_ENDPOINT_DESCRIPTOR))
00029
00030 extern const uint8_t USB_DeviceDescriptor[];
00031 extern const uint8_t USB_ConfigDescriptor[];
00032 extern const uint8_t USB_StringDescriptor[];
00033
00034
00035 #endif  /* __USBDESC_H__ */
Generated on Tue Jun 7 14:59:04 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBCDC/usbhw.c Source File

C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBCDC/usbhw.c

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00001 /*----------------------------------------------------------------------------
00002  *      U S B  -  K e r n e l
00003  *----------------------------------------------------------------------------
00004  * Name:    usbhw.c
00005  * Purpose: USB Hardware Layer Module for NXP's LPC17xx MCU
00006  * Version: V1.20
00007  *----------------------------------------------------------------------------
00008  *      This software is supplied "AS IS" without any warranties, express,
00009  *      implied or statutory, including but not limited to the implied
00010  *      warranties of fitness for purpose, satisfactory quality and
00011  *      noninfringement. Keil extends you a royalty-free right to reproduce
00012  *      and distribute executable files created using this software for use
00013  *      on NXP Semiconductors LPC family microcontroller devices only. Nothing
00014  *      else gives you the right to use this software.
00015  *
00016  * Copyright (c) 2009 Keil - An ARM Company. All rights reserved.
00017  *----------------------------------------------------------------------------
00018  * History:
00019  *          V1.20 Added USB_ClearEPBuf
00020  *          V1.00 Initial Version
00021  *----------------------------------------------------------------------------*/
00022 #include "LPC17xx.h"                        /* LPC17xx definitions */
00023 #include "usb.h"
00024 #include "usbcfg.h"
00025 #include "usbreg.h"
00026 #include "usbhw.h"
00027 #include "usbcore.h"
00028 #include "usbuser.h"
00029
00030 #if defined (  __CC_ARM__  )
00031 #pragma diag_suppress 1441
00032 #endif
00033
00034
00035 #define EP_MSK_CTRL 0x0001      /* Control Endpoint Logical Address Mask */
00036 #define EP_MSK_BULK 0xC924      /* Bulk Endpoint Logical Address Mask */
00037 #define EP_MSK_INT  0x4492      /* Interrupt Endpoint Logical Address Mask */
00038 #define EP_MSK_ISO  0x1248      /* Isochronous Endpoint Logical Address Mask */
00039
00040
00041 #if USB_DMA
00042
00043 #pragma arm section zidata = "USB_RAM"
00044 uint32_t UDCA[USB_EP_NUM];                     /* UDCA in USB RAM */
00045 uint32_t DD_NISO_Mem[4*DD_NISO_CNT];           /* Non-Iso DMA Descriptor Memory */
00046 uint32_t DD_ISO_Mem [5*DD_ISO_CNT];            /* Iso DMA Descriptor Memory */
00047 #pragma arm section zidata
00048 uint32_t udca[USB_EP_NUM];                     /* UDCA saved values */
00049
00050 uint32_t DDMemMap[2];                          /* DMA Descriptor Memory Usage */
00051
00052 #endif
00053
00054
00055 /*
00056  *  Get Endpoint Physical Address
00057  *    Parameters:      EPNum: Endpoint Number
00058  *                       EPNum.0..3: Address
00059  *                       EPNum.7:    Dir
00060  *    Return Value:    Endpoint Physical Address
00061  */
00062
00063 uint32_t EPAdr (uint32_t EPNum) {
00064   uint32_t val;
00065
00066   val = (EPNum & 0x0F) << 1;
00067   if (EPNum & 0x80) {
00068     val += 1;
00069   }
00070   return (val);
00071 }
00072
00073
00074 /*
00075  *  Write Command
00076  *    Parameters:      cmd:   Command
00077  *    Return Value:    None
00078  */
00079
00080 void WrCmd (uint32_t cmd) {
00081
00082   LPC_USB->USBDevIntClr = CCEMTY_INT;
00083   LPC_USB->USBCmdCode = cmd;
00084   while ((LPC_USB->USBDevIntSt & CCEMTY_INT) == 0);
00085 }
00086
00087
00088 /*
00089  *  Write Command Data
00090  *    Parameters:      cmd:   Command
00091  *                     val:   Data
00092  *    Return Value:    None
00093  */
00094
00095 void WrCmdDat (uint32_t cmd, uint32_t val) {
00096
00097   LPC_USB->USBDevIntClr = CCEMTY_INT;
00098   LPC_USB->USBCmdCode = cmd;
00099   while ((LPC_USB->USBDevIntSt & CCEMTY_INT) == 0);
00100   LPC_USB->USBDevIntClr = CCEMTY_INT;
00101   LPC_USB->USBCmdCode = val;
00102   while ((LPC_USB->USBDevIntSt & CCEMTY_INT) == 0);
00103 }
00104
00105
00106 /*
00107  *  Write Command to Endpoint
00108  *    Parameters:      cmd:   Command
00109  *                     val:   Data
00110  *    Return Value:    None
00111  */
00112
00113 void WrCmdEP (uint32_t EPNum, uint32_t cmd){
00114
00115   LPC_USB->USBDevIntClr = CCEMTY_INT;
00116   LPC_USB->USBCmdCode = CMD_SEL_EP(EPAdr(EPNum));
00117   while ((LPC_USB->USBDevIntSt & CCEMTY_INT) == 0);
00118   LPC_USB->USBDevIntClr = CCEMTY_INT;
00119   LPC_USB->USBCmdCode = cmd;
00120   while ((LPC_USB->USBDevIntSt & CCEMTY_INT) == 0);
00121 }
00122
00123
00124 /*
00125  *  Read Command Data
00126  *    Parameters:      cmd:   Command
00127  *    Return Value:    Data Value
00128  */
00129
00130 uint32_t RdCmdDat (uint32_t cmd) {
00131
00132   LPC_USB->USBDevIntClr = CCEMTY_INT | CDFULL_INT;
00133   LPC_USB->USBCmdCode = cmd;
00134   while ((LPC_USB->USBDevIntSt & CDFULL_INT) == 0);
00135   return (LPC_USB->USBCmdData);
00136 }
00137
00138
00139 /*
00140  *  USB Initialize Function
00141  *   Called by the User to initialize USB
00142  *    Return Value:    None
00143  */
00144
00145 void USB_Init (void) {
00146
00147   LPC_PINCON->PINSEL1 &= ~((3<<26)|(3<<28));   /* P0.29 D+, P0.30 D- */
00148   LPC_PINCON->PINSEL1 |=  ((1<<26)|(1<<28));   /* PINSEL1 26.27, 28.29  = 01 */
00149
00150   LPC_PINCON->PINSEL3 &= ~((3<< 4)|(3<<28));   /* P1.18 GoodLink, P1.30 VBUS */
00151   LPC_PINCON->PINSEL3 |=  ((1<< 4)|(2<<28));   /* PINSEL3 4.5 = 01, 28.29 = 10 */
00152
00153   LPC_PINCON->PINSEL4 &= ~((3<<18)        );   /* P2.9 SoftConnect */
00154   LPC_PINCON->PINSEL4 |=  ((1<<18)        );   /* PINSEL4 18.19 = 01 */
00155
00156   LPC_SC->PCONP |= (1UL<<31);                /* USB PCLK -> enable USB Per.       */
00157
00158   LPC_USB->USBClkCtrl = 0x1A;                /* Dev, PortSel, AHB clock enable */
00159   while ((LPC_USB->USBClkSt & 0x1A) != 0x1A);
00160
00161   NVIC_EnableIRQ(USB_IRQn);               /* enable USB interrupt */
00162
00163   USB_Reset();
00164   USB_SetAddress(0);
00165 }
00166
00167
00168 /*
00169  *  USB Connect Function
00170  *   Called by the User to Connect/Disconnect USB
00171  *    Parameters:      con:   Connect/Disconnect
00172  *    Return Value:    None
00173  */
00174
00175 void USB_Connect (uint32_t con) {
00176   WrCmdDat(CMD_SET_DEV_STAT, DAT_WR_BYTE(con ? DEV_CON : 0));
00177 }
00178
00179
00180 /*
00181  *  USB Reset Function
00182  *   Called automatically on USB Reset
00183  *    Return Value:    None
00184  */
00185
00186 void USB_Reset (void) {
00187 #if USB_DMA
00188   uint32_t n;
00189 #endif
00190
00191   LPC_USB->USBEpInd = 0;
00192   LPC_USB->USBMaxPSize = USB_MAX_PACKET0;
00193   LPC_USB->USBEpInd = 1;
00194   LPC_USB->USBMaxPSize = USB_MAX_PACKET0;
00195   while ((LPC_USB->USBDevIntSt & EP_RLZED_INT) == 0);
00196
00197   LPC_USB->USBEpIntClr  = 0xFFFFFFFF;
00198   LPC_USB->USBEpIntEn   = 0xFFFFFFFF ^ USB_DMA_EP;
00199   LPC_USB->USBDevIntClr = 0xFFFFFFFF;
00200   LPC_USB->USBDevIntEn  = DEV_STAT_INT    | EP_SLOW_INT    |
00201                (USB_SOF_EVENT   ? FRAME_INT : 0) |
00202                (USB_ERROR_EVENT ? ERR_INT   : 0);
00203
00204 #if USB_DMA
00205   LPC_USB->USBUDCAH   = USB_RAM_ADR;
00206   LPC_USB->USBDMARClr = 0xFFFFFFFF;
00207   LPC_USB->USBEpDMADis  = 0xFFFFFFFF;
00208   LPC_USB->USBEpDMAEn   = USB_DMA_EP;
00209   LPC_USB->USBEoTIntClr = 0xFFFFFFFF;
00210   LPC_USB->USBNDDRIntClr = 0xFFFFFFFF;
00211   LPC_USB->USBSysErrIntClr = 0xFFFFFFFF;
00212   LPC_USB->USBDMAIntEn  = 0x00000007;
00213   DDMemMap[0] = 0x00000000;
00214   DDMemMap[1] = 0x00000000;
00215   for (n = 0; n < USB_EP_NUM; n++) {
00216     udca[n] = 0;
00217     UDCA[n] = 0;
00218   }
00219 #endif
00220 }
00221
00222
00223 /*
00224  *  USB Suspend Function
00225  *   Called automatically on USB Suspend
00226  *    Return Value:    None
00227  */
00228
00229 void USB_Suspend (void) {
00230   /* Performed by Hardware */
00231 }
00232
00233
00234 /*
00235  *  USB Resume Function
00236  *   Called automatically on USB Resume
00237  *    Return Value:    None
00238  */
00239
00240 void USB_Resume (void) {
00241   /* Performed by Hardware */
00242 }
00243
00244
00245 /*
00246  *  USB Remote Wakeup Function
00247  *   Called automatically on USB Remote Wakeup
00248  *    Return Value:    None
00249  */
00250
00251 void USB_WakeUp (void) {
00252
00253   if (USB_DeviceStatus & USB_GETSTATUS_REMOTE_WAKEUP) {
00254     WrCmdDat(CMD_SET_DEV_STAT, DAT_WR_BYTE(DEV_CON));
00255   }
00256 }
00257
00258
00259 /*
00260  *  USB Remote Wakeup Configuration Function
00261  *    Parameters:      cfg:   Enable/Disable
00262  *    Return Value:    None
00263  */
00264
00265 void USB_WakeUpCfg (uint32_t cfg) {
00266   /* Not needed */
00267 }
00268
00269
00270 /*
00271  *  USB Set Address Function
00272  *    Parameters:      adr:   USB Address
00273  *    Return Value:    None
00274  */
00275
00276 void USB_SetAddress (uint32_t adr) {
00277   WrCmdDat(CMD_SET_ADDR, DAT_WR_BYTE(DEV_EN | adr)); /* Don't wait for next */
00278   WrCmdDat(CMD_SET_ADDR, DAT_WR_BYTE(DEV_EN | adr)); /*  Setup Status Phase */
00279 }
00280
00281
00282 /*
00283  *  USB Configure Function
00284  *    Parameters:      cfg:   Configure/Deconfigure
00285  *    Return Value:    None
00286  */
00287
00288 void USB_Configure (uint32_t cfg) {
00289
00290   WrCmdDat(CMD_CFG_DEV, DAT_WR_BYTE(cfg ? CONF_DVICE : 0));
00291
00292   LPC_USB->USBReEp = 0x00000003;
00293   while ((LPC_USB->USBDevIntSt & EP_RLZED_INT) == 0);
00294   LPC_USB->USBDevIntClr = EP_RLZED_INT;
00295 }
00296
00297
00298 /*
00299  *  Configure USB Endpoint according to Descriptor
00300  *    Parameters:      pEPD:  Pointer to Endpoint Descriptor
00301  *    Return Value:    None
00302  */
00303
00304 void USB_ConfigEP (USB_ENDPOINT_DESCRIPTOR *pEPD) {
00305   uint32_t num;
00306
00307   num = EPAdr(pEPD->bEndpointAddress);
00308   LPC_USB->USBReEp |= (1 << num);
00309   LPC_USB->USBEpInd = num;
00310   LPC_USB->USBMaxPSize = pEPD->wMaxPacketSize;
00311   while ((LPC_USB->USBDevIntSt & EP_RLZED_INT) == 0);
00312   LPC_USB->USBDevIntClr = EP_RLZED_INT;
00313 }
00314
00315
00316 /*
00317  *  Set Direction for USB Control Endpoint
00318  *    Parameters:      dir:   Out (dir == 0), In (dir <> 0)
00319  *    Return Value:    None
00320  */
00321
00322 void USB_DirCtrlEP (uint32_t dir) {
00323   /* Not needed */
00324 }
00325
00326
00327 /*
00328  *  Enable USB Endpoint
00329  *    Parameters:      EPNum: Endpoint Number
00330  *                       EPNum.0..3: Address
00331  *                       EPNum.7:    Dir
00332  *    Return Value:    None
00333  */
00334
00335 void USB_EnableEP (uint32_t EPNum) {
00336   WrCmdDat(CMD_SET_EP_STAT(EPAdr(EPNum)), DAT_WR_BYTE(0));
00337 }
00338
00339
00340 /*
00341  *  Disable USB Endpoint
00342  *    Parameters:      EPNum: Endpoint Number
00343  *                       EPNum.0..3: Address
00344  *                       EPNum.7:    Dir
00345  *    Return Value:    None
00346  */
00347
00348 void USB_DisableEP (uint32_t EPNum) {
00349   WrCmdDat(CMD_SET_EP_STAT(EPAdr(EPNum)), DAT_WR_BYTE(EP_STAT_DA));
00350 }
00351
00352
00353 /*
00354  *  Reset USB Endpoint
00355  *    Parameters:      EPNum: Endpoint Number
00356  *                       EPNum.0..3: Address
00357  *                       EPNum.7:    Dir
00358  *    Return Value:    None
00359  */
00360
00361 void USB_ResetEP (uint32_t EPNum) {
00362   WrCmdDat(CMD_SET_EP_STAT(EPAdr(EPNum)), DAT_WR_BYTE(0));
00363 }
00364
00365
00366 /*
00367  *  Set Stall for USB Endpoint
00368  *    Parameters:      EPNum: Endpoint Number
00369  *                       EPNum.0..3: Address
00370  *                       EPNum.7:    Dir
00371  *    Return Value:    None
00372  */
00373
00374 void USB_SetStallEP (uint32_t EPNum) {
00375   WrCmdDat(CMD_SET_EP_STAT(EPAdr(EPNum)), DAT_WR_BYTE(EP_STAT_ST));
00376 }
00377
00378
00379 /*
00380  *  Clear Stall for USB Endpoint
00381  *    Parameters:      EPNum: Endpoint Number
00382  *                       EPNum.0..3: Address
00383  *                       EPNum.7:    Dir
00384  *    Return Value:    None
00385  */
00386
00387 void USB_ClrStallEP (uint32_t EPNum) {
00388   WrCmdDat(CMD_SET_EP_STAT(EPAdr(EPNum)), DAT_WR_BYTE(0));
00389 }
00390
00391
00392 /*
00393  *  Clear USB Endpoint Buffer
00394  *    Parameters:      EPNum: Endpoint Number
00395  *                       EPNum.0..3: Address
00396  *                       EPNum.7:    Dir
00397  *    Return Value:    None
00398  */
00399
00400 void USB_ClearEPBuf (uint32_t EPNum) {
00401   WrCmdEP(EPNum, CMD_CLR_BUF);
00402 }
00403
00404
00405 /*
00406  *  Read USB Endpoint Data
00407  *    Parameters:      EPNum: Endpoint Number
00408  *                       EPNum.0..3: Address
00409  *                       EPNum.7:    Dir
00410  *                     pData: Pointer to Data Buffer
00411  *    Return Value:    Number of bytes read
00412  */
00413
00414 uint32_t USB_ReadEP (uint32_t EPNum, uint8_t *pData) {
00415   uint32_t cnt, n;
00416
00417   LPC_USB->USBCtrl = ((EPNum & 0x0F) << 2) | CTRL_RD_EN;
00418
00419   do {
00420     cnt = LPC_USB->USBRxPLen;
00421   } while ((cnt & PKT_RDY) == 0);
00422   cnt &= PKT_LNGTH_MASK;
00423
00424   for (n = 0; n < (cnt + 3) / 4; n++) {
00425     *((__packed uint32_t *)pData) = LPC_USB->USBRxData;
00426     pData += 4;
00427   }
00428   LPC_USB->USBCtrl = 0;
00429
00430   if (((EP_MSK_ISO >> EPNum) & 1) == 0) {   /* Non-Isochronous Endpoint */
00431     WrCmdEP(EPNum, CMD_CLR_BUF);
00432   }
00433
00434   return (cnt);
00435 }
00436
00437
00438 /*
00439  *  Write USB Endpoint Data
00440  *    Parameters:      EPNum: Endpoint Number
00441  *                       EPNum.0..3: Address
00442  *                       EPNum.7:    Dir
00443  *                     pData: Pointer to Data Buffer
00444  *                     cnt:   Number of bytes to write
00445  *    Return Value:    Number of bytes written
00446  */
00447
00448 uint32_t USB_WriteEP (uint32_t EPNum, uint8_t *pData, uint32_t cnt) {
00449   uint32_t n;
00450
00451   LPC_USB->USBCtrl = ((EPNum & 0x0F) << 2) | CTRL_WR_EN;
00452
00453   LPC_USB->USBTxPLen = cnt;
00454
00455   for (n = 0; n < (cnt + 3) / 4; n++) {
00456     LPC_USB->USBTxData = *((__packed uint32_t *)pData);
00457     pData += 4;
00458   }
00459   LPC_USB->USBCtrl = 0;
00460   WrCmdEP(EPNum, CMD_VALID_BUF);
00461   return (cnt);
00462 }
00463
00464 #if USB_DMA
00465
00466 /* DMA Descriptor Memory Layout */
00467 const uint32_t DDAdr[2] = { DD_NISO_ADR, DD_ISO_ADR };
00468 const uint32_t DDSz [2] = { 16,          20         };
00469
00470
00471 /*
00472  *  Setup USB DMA Transfer for selected Endpoint
00473  *    Parameters:      EPNum: Endpoint Number
00474  *                     pDD: Pointer to DMA Descriptor
00475  *    Return Value:    TRUE - Success, FALSE - Error
00476  */
00477
00478 uint32_t USB_DMA_Setup(uint32_t EPNum, USB_DMA_DESCRIPTOR *pDD) {
00479   uint32_t num, ptr, nxt, iso, n;
00480
00481   iso = pDD->Cfg.Type.IsoEP;                /* Iso or Non-Iso Descriptor */
00482   num = EPAdr(EPNum);                       /* Endpoint's Physical Address */
00483
00484   ptr = 0;                                  /* Current Descriptor */
00485   nxt = udca[num];                          /* Initial Descriptor */
00486   while (nxt) {                             /* Go through Descriptor List */
00487     ptr = nxt;                              /* Current Descriptor */
00488     if (!pDD->Cfg.Type.Link) {              /* Check for Linked Descriptors */
00489       n = (ptr - DDAdr[iso]) / DDSz[iso];   /* Descriptor Index */
00490       DDMemMap[iso] &= ~(1 << n);           /* Unmark Memory Usage */
00491     }
00492     nxt = *((uint32_t *)ptr);                  /* Next Descriptor */
00493   }
00494
00495   for (n = 0; n < 32; n++) {                /* Search for available Memory */
00496     if ((DDMemMap[iso] & (1 << n)) == 0) {
00497       break;                                /* Memory found */
00498     }
00499   }
00500   if (n == 32) return (FALSE);              /* Memory not available */
00501
00502   DDMemMap[iso] |= 1 << n;                  /* Mark Memory Usage */
00503   nxt = DDAdr[iso] + n * DDSz[iso];         /* Next Descriptor */
00504
00505   if (ptr && pDD->Cfg.Type.Link) {
00506     *((uint32_t *)(ptr + 0))  = nxt;           /* Link in new Descriptor */
00507     *((uint32_t *)(ptr + 4)) |= 0x00000004;    /* Next DD is Valid */
00508   } else {
00509     udca[num] = nxt;                        /* Save new Descriptor */
00510     UDCA[num] = nxt;                        /* Update UDCA in USB */
00511   }
00512
00513   /* Fill in DMA Descriptor */
00514   *(((uint32_t *)nxt)++) =  0;                 /* Next DD Pointer */
00515   *(((uint32_t *)nxt)++) =  pDD->Cfg.Type.ATLE |
00516                        (pDD->Cfg.Type.IsoEP << 4) |
00517                        (pDD->MaxSize <<  5) |
00518                        (pDD->BufLen  << 16);
00519   *(((uint32_t *)nxt)++) =  pDD->BufAdr;
00520   *(((uint32_t *)nxt)++) =  pDD->Cfg.Type.LenPos << 8;
00521   if (iso) {
00522     *((uint32_t *)nxt) =  pDD->InfoAdr;
00523   }
00524
00525   return (TRUE); /* Success */
00526 }
00527
00528
00529 /*
00530  *  Enable USB DMA Endpoint
00531  *    Parameters:      EPNum: Endpoint Number
00532  *                       EPNum.0..3: Address
00533  *                       EPNum.7:    Dir
00534  *    Return Value:    None
00535  */
00536
00537 void USB_DMA_Enable (uint32_t EPNum) {
00538   LPC_USB->USBEpDMAEn = 1 << EPAdr(EPNum);
00539 }
00540
00541
00542 /*
00543  *  Disable USB DMA Endpoint
00544  *    Parameters:      EPNum: Endpoint Number
00545  *                       EPNum.0..3: Address
00546  *                       EPNum.7:    Dir
00547  *    Return Value:    None
00548  */
00549
00550 void USB_DMA_Disable (uint32_t EPNum) {
00551   LPC_USB->USBEpDMADis = 1 << EPAdr(EPNum);
00552 }
00553
00554
00555 /*
00556  *  Get USB DMA Endpoint Status
00557  *    Parameters:      EPNum: Endpoint Number
00558  *                       EPNum.0..3: Address
00559  *                       EPNum.7:    Dir
00560  *    Return Value:    DMA Status
00561  */
00562
00563 uint32_t USB_DMA_Status (uint32_t EPNum) {
00564   uint32_t ptr, val;
00565
00566   ptr = UDCA[EPAdr(EPNum)];                 /* Current Descriptor */
00567   if (ptr == 0)
00568         return (USB_DMA_INVALID);
00569
00570   val = *((uint32_t *)(ptr + 3*4));            /* Status Information */
00571   switch ((val >> 1) & 0x0F) {
00572     case 0x00:                              /* Not serviced */
00573       return (USB_DMA_IDLE);
00574     case 0x01:                              /* Being serviced */
00575       return (USB_DMA_BUSY);
00576     case 0x02:                              /* Normal Completition */
00577       return (USB_DMA_DONE);
00578     case 0x03:                              /* Data Under Run */
00579       return (USB_DMA_UNDER_RUN);
00580     case 0x08:                              /* Data Over Run */
00581       return (USB_DMA_OVER_RUN);
00582     case 0x09:                              /* System Error */
00583       return (USB_DMA_ERROR);
00584   }
00585
00586   return (USB_DMA_UNKNOWN);
00587 }
00588
00589
00590 /*
00591  *  Get USB DMA Endpoint Current Buffer Address
00592  *    Parameters:      EPNum: Endpoint Number
00593  *                       EPNum.0..3: Address
00594  *                       EPNum.7:    Dir
00595  *    Return Value:    DMA Address (or -1 when DMA is Invalid)
00596  */
00597
00598 uint32_t USB_DMA_BufAdr (uint32_t EPNum) {
00599   uint32_t ptr, val;
00600
00601   ptr = UDCA[EPAdr(EPNum)];                 /* Current Descriptor */
00602   if (ptr == 0)
00603   {
00604         return ((uint32_t)(-1));                /* DMA Invalid */
00605   }
00606
00607   val = *((uint32_t *)(ptr + 2*4));         /* Buffer Address */
00608   return (val);                             /* Current Address */
00609 }
00610
00611
00612 /*
00613  *  Get USB DMA Endpoint Current Buffer Count
00614  *   Number of transfered Bytes or Iso Packets
00615  *    Parameters:      EPNum: Endpoint Number
00616  *                       EPNum.0..3: Address
00617  *                       EPNum.7:    Dir
00618  *    Return Value:    DMA Count (or -1 when DMA is Invalid)
00619  */
00620
00621 uint32_t USB_DMA_BufCnt (uint32_t EPNum) {
00622   uint32_t ptr, val;
00623
00624   ptr = UDCA[EPAdr(EPNum)];                 /* Current Descriptor */
00625   if (ptr == 0)
00626   {
00627         return ((uint32_t)(-1));                /* DMA Invalid */
00628   }
00629   val = *((uint32_t *)(ptr + 3*4));         /* Status Information */
00630   return (val >> 16);                       /* Current Count */
00631 }
00632
00633
00634 #endif /* USB_DMA */
00635
00636
00637 /*
00638  *  Get USB Last Frame Number
00639  *    Parameters:      None
00640  *    Return Value:    Frame Number
00641  */
00642
00643 uint32_t USB_GetFrame (void) {
00644   uint32_t val;
00645
00646   WrCmd(CMD_RD_FRAME);
00647   val = RdCmdDat(DAT_RD_FRAME);
00648   val = val | (RdCmdDat(DAT_RD_FRAME) << 8);
00649
00650   return (val);
00651 }
00652
00653
00654 /*
00655  *  USB Interrupt Service Routine
00656  */
00657
00658 void USB_IRQHandler (void) {
00659   uint32_t disr, val, n, m;
00660   uint32_t episr, episrCur;
00661
00662   disr = LPC_USB->USBDevIntSt;       /* Device Interrupt Status */
00663
00664   /* Device Status Interrupt (Reset, Connect change, Suspend/Resume) */
00665   if (disr & DEV_STAT_INT) {
00666     LPC_USB->USBDevIntClr = DEV_STAT_INT;
00667     WrCmd(CMD_GET_DEV_STAT);
00668     val = RdCmdDat(DAT_GET_DEV_STAT);       /* Device Status */
00669     if (val & DEV_RST) {                    /* Reset */
00670       USB_Reset();
00671 #if   USB_RESET_EVENT
00672       USB_Reset_Event();
00673 #endif
00674     }
00675     if (val & DEV_CON_CH) {                 /* Connect change */
00676 #if   USB_POWER_EVENT
00677       USB_Power_Event(val & DEV_CON);
00678 #endif
00679     }
00680     if (val & DEV_SUS_CH) {                 /* Suspend/Resume */
00681       if (val & DEV_SUS) {                  /* Suspend */
00682         USB_Suspend();
00683 #if     USB_SUSPEND_EVENT
00684         USB_Suspend_Event();
00685 #endif
00686       } else {                              /* Resume */
00687         USB_Resume();
00688 #if     USB_RESUME_EVENT
00689         USB_Resume_Event();
00690 #endif
00691       }
00692     }
00693     goto isr_end;
00694   }
00695
00696 #if USB_SOF_EVENT
00697   /* Start of Frame Interrupt */
00698   if (disr & FRAME_INT) {
00699     USB_SOF_Event();
00700   }
00701 #endif
00702
00703 #if USB_ERROR_EVENT
00704   /* Error Interrupt */
00705   if (disr & ERR_INT) {
00706     WrCmd(CMD_RD_ERR_STAT);
00707     val = RdCmdDat(DAT_RD_ERR_STAT);
00708     USB_Error_Event(val);
00709   }
00710 #endif
00711
00712   /* Endpoint's Slow Interrupt */
00713   if (disr & EP_SLOW_INT) {
00714     episrCur = 0;
00715     episr    = LPC_USB->USBEpIntSt;
00716     for (n = 0; n < USB_EP_NUM; n++) {      /* Check All Endpoints */
00717       if (episr == episrCur) break;         /* break if all EP interrupts handled */
00718       if (episr & (1 << n)) {
00719         episrCur |= (1 << n);
00720         m = n >> 1;
00721
00722         LPC_USB->USBEpIntClr = (1 << n);
00723         while ((LPC_USB->USBDevIntSt & CDFULL_INT) == 0);
00724         val = LPC_USB->USBCmdData;
00725
00726         if ((n & 1) == 0) {                 /* OUT Endpoint */
00727           if (n == 0) {                     /* Control OUT Endpoint */
00728             if (val & EP_SEL_STP) {         /* Setup Packet */
00729               if (USB_P_EP[0]) {
00730                 USB_P_EP[0](USB_EVT_SETUP);
00731                 continue;
00732               }
00733             }
00734           }
00735           if (USB_P_EP[m]) {
00736             USB_P_EP[m](USB_EVT_OUT);
00737           }
00738         } else {                            /* IN Endpoint */
00739           if (USB_P_EP[m]) {
00740             USB_P_EP[m](USB_EVT_IN);
00741           }
00742         }
00743       }
00744     }
00745     LPC_USB->USBDevIntClr = EP_SLOW_INT;
00746   }
00747
00748 #if USB_DMA
00749
00750   if (LPC_USB->USBDMAIntSt & 0x00000001) {          /* End of Transfer Interrupt */
00751     val = LPC_USB->USBEoTIntSt;
00752     for (n = 2; n < USB_EP_NUM; n++) {      /* Check All Endpoints */
00753       if (val & (1 << n)) {
00754         m = n >> 1;
00755         if ((n & 1) == 0) {                 /* OUT Endpoint */
00756           if (USB_P_EP[m]) {
00757             USB_P_EP[m](USB_EVT_OUT_DMA_EOT);
00758           }
00759         } else {                            /* IN Endpoint */
00760           if (USB_P_EP[m]) {
00761             USB_P_EP[m](USB_EVT_IN_DMA_EOT);
00762           }
00763         }
00764       }
00765     }
00766     LPC_USB->USBEoTIntClr = val;
00767   }
00768
00769   if (LPC_USB->USBDMAIntSt & 0x00000002) {          /* New DD Request Interrupt */
00770     val = LPC_USB->USBNDDRIntSt;
00771     for (n = 2; n < USB_EP_NUM; n++) {      /* Check All Endpoints */
00772       if (val & (1 << n)) {
00773         m = n >> 1;
00774         if ((n & 1) == 0) {                 /* OUT Endpoint */
00775           if (USB_P_EP[m]) {
00776             USB_P_EP[m](USB_EVT_OUT_DMA_NDR);
00777           }
00778         } else {                            /* IN Endpoint */
00779           if (USB_P_EP[m]) {
00780             USB_P_EP[m](USB_EVT_IN_DMA_NDR);
00781           }
00782         }
00783       }
00784     }
00785     LPC_USB->USBNDDRIntClr = val;
00786   }
00787
00788   if (LPC_USB->USBDMAIntSt & 0x00000004) {          /* System Error Interrupt */
00789     val = LPC_USB->USBSysErrIntSt;
00790     for (n = 2; n < USB_EP_NUM; n++) {      /* Check All Endpoints */
00791       if (val & (1 << n)) {
00792         m = n >> 1;
00793         if ((n & 1) == 0) {                 /* OUT Endpoint */
00794           if (USB_P_EP[m]) {
00795             USB_P_EP[m](USB_EVT_OUT_DMA_ERR);
00796           }
00797         } else {                            /* IN Endpoint */
00798           if (USB_P_EP[m]) {
00799             USB_P_EP[m](USB_EVT_IN_DMA_ERR);
00800           }
00801         }
00802       }
00803     }
00804     LPC_USB->USBSysErrIntClr = val;
00805   }
00806
00807 #endif /* USB_DMA */
00808
00809 isr_end:
00810   return;
00811 }
Generated on Tue Jun 7 14:59:04 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBCDC/usbhw.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBCDC/usbhw.h

Go to the documentation of this file.
00001 /*----------------------------------------------------------------------------
00002  *      U S B  -  K e r n e l
00003  *----------------------------------------------------------------------------
00004  * Name:    usbhw.h
00005  * Purpose: USB Hardware Layer Definitions
00006  * Version: V1.20
00007  *----------------------------------------------------------------------------
00008  *      This software is supplied "AS IS" without any warranties, express,
00009  *      implied or statutory, including but not limited to the implied
00010  *      warranties of fitness for purpose, satisfactory quality and
00011  *      noninfringement. Keil extends you a royalty-free right to reproduce
00012  *      and distribute executable files created using this software for use
00013  *      on NXP Semiconductors LPC family microcontroller devices only. Nothing
00014  *      else gives you the right to use this software.
00015  *
00016  * Copyright (c) 2009 Keil - An ARM Company. All rights reserved.
00017  *----------------------------------------------------------------------------
00018  * History:
00019  *          V1.20 Added USB_ClearEPBuf
00020  *          V1.00 Initial Version
00021  *----------------------------------------------------------------------------*/
00022
00023 #ifndef __USBHW_H__
00024 #define __USBHW_H__
00025 #include "lpc_types.h"
00026
00027 /* USB RAM Definitions */
00028 #define USB_RAM_ADR     0x20080000  /* USB RAM Start Address */
00029 #define USB_RAM_SZ      0x00004000  /* USB RAM Size (4kB) */
00030
00031 /* DMA Endpoint Descriptors */
00032 #define DD_NISO_CNT             16  /* Non-Iso EP DMA Descr. Count (max. 32) */
00033 #define DD_ISO_CNT               8  /* Iso EP DMA Descriptor Count (max. 32) */
00034 #define DD_NISO_SZ    (DD_NISO_CNT * 16)    /* Non-Iso DMA Descr. Size */
00035 #define DD_ISO_SZ     (DD_ISO_CNT  * 20)    /* Iso DMA Descriptor Size */
00036 #define DD_NISO_ADR   (USB_RAM_ADR + 128)   /* Non-Iso DMA Descr. Address */
00037 #define DD_ISO_ADR    (DD_NISO_ADR + DD_NISO_SZ) /* Iso DMA Descr. Address */
00038 #define DD_SZ                 (128 + DD_NISO_SZ + DD_ISO_SZ) /* Descr. Size */
00039
00040 /* DMA Buffer Memory Definitions */
00041 #define DMA_BUF_ADR   (USB_RAM_ADR + DD_SZ) /* DMA Buffer Start Address */
00042 #define DMA_BUF_SZ    (USB_RAM_SZ  - DD_SZ) /* DMA Buffer Size */
00043
00044 /* USB Error Codes */
00045 #define USB_ERR_PID         0x0001  /* PID Error */
00046 #define USB_ERR_UEPKT       0x0002  /* Unexpected Packet */
00047 #define USB_ERR_DCRC        0x0004  /* Data CRC Error */
00048 #define USB_ERR_TIMOUT      0x0008  /* Bus Time-out Error */
00049 #define USB_ERR_EOP         0x0010  /* End of Packet Error */
00050 #define USB_ERR_B_OVRN      0x0020  /* Buffer Overrun */
00051 #define USB_ERR_BTSTF       0x0040  /* Bit Stuff Error */
00052 #define USB_ERR_TGL         0x0080  /* Toggle Bit Error */
00053
00054 /* USB DMA Status Codes */
00055 #define USB_DMA_INVALID     0x0000  /* DMA Invalid - Not Configured */
00056 #define USB_DMA_IDLE        0x0001  /* DMA Idle - Waiting for Trigger */
00057 #define USB_DMA_BUSY        0x0002  /* DMA Busy - Transfer in progress */
00058 #define USB_DMA_DONE        0x0003  /* DMA Transfer Done (no Errors)*/
00059 #define USB_DMA_OVER_RUN    0x0004  /* Data Over Run */
00060 #define USB_DMA_UNDER_RUN   0x0005  /* Data Under Run (Short Packet) */
00061 #define USB_DMA_ERROR       0x0006  /* Error */
00062 #define USB_DMA_UNKNOWN     0xFFFF  /* Unknown State */
00063
00064 /* USB DMA Descriptor */
00065 typedef struct _USB_DMA_DESCRIPTOR {
00066   uint32_t BufAdr;                     /* DMA Buffer Address */
00067   uint16_t  BufLen;                     /* DMA Buffer Length */
00068   uint16_t  MaxSize;                    /* Maximum Packet Size */
00069   uint32_t InfoAdr;                    /* Packet Info Memory Address */
00070   union {                           /* DMA Configuration */
00071     struct {
00072       uint32_t Link   : 1;             /* Link to existing Descriptors */
00073       uint32_t IsoEP  : 1;             /* Isonchronous Endpoint */
00074       uint32_t ATLE   : 1;             /* ATLE (Auto Transfer Length Extract) */
00075       uint32_t Rsrvd  : 5;             /* Reserved */
00076       uint32_t LenPos : 8;             /* Length Position (ATLE) */
00077     } Type;
00078     uint32_t Val;
00079   } Cfg;
00080 } USB_DMA_DESCRIPTOR;
00081
00082 /* USB Hardware Functions */
00083 extern void  USB_Init       (void);
00084 extern void  USB_Connect    (uint32_t  con);
00085 extern void  USB_Reset      (void);
00086 extern void  USB_Suspend    (void);
00087 extern void  USB_Resume     (void);
00088 extern void  USB_WakeUp     (void);
00089 extern void  USB_WakeUpCfg  (uint32_t  cfg);
00090 extern void  USB_SetAddress (uint32_t adr);
00091 extern void  USB_Configure  (uint32_t  cfg);
00092 extern void  USB_ConfigEP   (USB_ENDPOINT_DESCRIPTOR *pEPD);
00093 extern void  USB_DirCtrlEP  (uint32_t dir);
00094 extern void  USB_EnableEP   (uint32_t EPNum);
00095 extern void  USB_DisableEP  (uint32_t EPNum);
00096 extern void  USB_ResetEP    (uint32_t EPNum);
00097 extern void  USB_SetStallEP (uint32_t EPNum);
00098 extern void  USB_ClrStallEP (uint32_t EPNum);
00099 extern void USB_ClearEPBuf  (uint32_t  EPNum);
00100 extern uint32_t USB_ReadEP     (uint32_t EPNum, uint8_t *pData);
00101 extern uint32_t USB_WriteEP    (uint32_t EPNum, uint8_t *pData, uint32_t cnt);
00102 extern uint32_t  USB_DMA_Setup  (uint32_t EPNum, USB_DMA_DESCRIPTOR *pDD);
00103 extern void  USB_DMA_Enable (uint32_t EPNum);
00104 extern void  USB_DMA_Disable(uint32_t EPNum);
00105 extern uint32_t USB_DMA_Status (uint32_t EPNum);
00106 extern uint32_t USB_DMA_BufAdr (uint32_t EPNum);
00107 extern uint32_t USB_DMA_BufCnt (uint32_t EPNum);
00108 extern uint32_t USB_GetFrame   (void);
00109 extern void  USB_IRQHandler (void);
00110
00111
00112 #endif  /* __USBHW_H__ */
Generated on Tue Jun 7 14:59:04 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBCDC/usbreg.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBCDC/usbreg.h

Go to the documentation of this file.
00001 /*----------------------------------------------------------------------------
00002  *      U S B  -  K e r n e l
00003  *----------------------------------------------------------------------------
00004  * Name:    usbreg.h
00005  * Purpose: USB Hardware Layer Definitions for NXP LPC Family MCUs
00006  * Version: V1.20
00007  *----------------------------------------------------------------------------
00008  *      This software is supplied "AS IS" without any warranties, express,
00009  *      implied or statutory, including but not limited to the implied
00010  *      warranties of fitness for purpose, satisfactory quality and
00011  *      noninfringement. Keil extends you a royalty-free right to reproduce
00012  *      and distribute executable files created using this software for use
00013  *      on NXP Semiconductors LPC family microcontroller devices only. Nothing
00014  *      else gives you the right to use this software.
00015  *
00016  * Copyright (c) 2009 Keil - An ARM Company. All rights reserved.
00017  *---------------------------------------------------------------------------*/
00018
00019 #ifndef __USBREG_H
00020 #define __USBREG_H
00021
00022 /* Device Interrupt Bit Definitions */
00023 #define FRAME_INT           0x00000001
00024 #define EP_FAST_INT         0x00000002
00025 #define EP_SLOW_INT         0x00000004
00026 #define DEV_STAT_INT        0x00000008
00027 #define CCEMTY_INT          0x00000010
00028 #define CDFULL_INT          0x00000020
00029 #define RxENDPKT_INT        0x00000040
00030 #define TxENDPKT_INT        0x00000080
00031 #define EP_RLZED_INT        0x00000100
00032 #define ERR_INT             0x00000200
00033
00034 /* Rx & Tx Packet Length Definitions */
00035 #define PKT_LNGTH_MASK      0x000003FF
00036 #define PKT_DV              0x00000400
00037 #define PKT_RDY             0x00000800
00038
00039 /* USB Control Definitions */
00040 #define CTRL_RD_EN          0x00000001
00041 #define CTRL_WR_EN          0x00000002
00042
00043 /* Command Codes */
00044 #define CMD_SET_ADDR        0x00D00500
00045 #define CMD_CFG_DEV         0x00D80500
00046 #define CMD_SET_MODE        0x00F30500
00047 #define CMD_RD_FRAME        0x00F50500
00048 #define DAT_RD_FRAME        0x00F50200
00049 #define CMD_RD_TEST         0x00FD0500
00050 #define DAT_RD_TEST         0x00FD0200
00051 #define CMD_SET_DEV_STAT    0x00FE0500
00052 #define CMD_GET_DEV_STAT    0x00FE0500
00053 #define DAT_GET_DEV_STAT    0x00FE0200
00054 #define CMD_GET_ERR_CODE    0x00FF0500
00055 #define DAT_GET_ERR_CODE    0x00FF0200
00056 #define CMD_RD_ERR_STAT     0x00FB0500
00057 #define DAT_RD_ERR_STAT     0x00FB0200
00058 #define DAT_WR_BYTE(x)     (0x00000100 | ((x) << 16))
00059 #define CMD_SEL_EP(x)      (0x00000500 | ((x) << 16))
00060 #define DAT_SEL_EP(x)      (0x00000200 | ((x) << 16))
00061 #define CMD_SEL_EP_CLRI(x) (0x00400500 | ((x) << 16))
00062 #define DAT_SEL_EP_CLRI(x) (0x00400200 | ((x) << 16))
00063 #define CMD_SET_EP_STAT(x) (0x00400500 | ((x) << 16))
00064 #define CMD_CLR_BUF         0x00F20500
00065 #define DAT_CLR_BUF         0x00F20200
00066 #define CMD_VALID_BUF       0x00FA0500
00067
00068 /* Device Address Register Definitions */
00069 #define DEV_ADDR_MASK       0x7F
00070 #define DEV_EN              0x80
00071
00072 /* Device Configure Register Definitions */
00073 #define CONF_DVICE          0x01
00074
00075 /* Device Mode Register Definitions */
00076 #define AP_CLK              0x01
00077 #define INAK_CI             0x02
00078 #define INAK_CO             0x04
00079 #define INAK_II             0x08
00080 #define INAK_IO             0x10
00081 #define INAK_BI             0x20
00082 #define INAK_BO             0x40
00083
00084 /* Device Status Register Definitions */
00085 #define DEV_CON             0x01
00086 #define DEV_CON_CH          0x02
00087 #define DEV_SUS             0x04
00088 #define DEV_SUS_CH          0x08
00089 #define DEV_RST             0x10
00090
00091 /* Error Code Register Definitions */
00092 #define ERR_EC_MASK         0x0F
00093 #define ERR_EA              0x10
00094
00095 /* Error Status Register Definitions */
00096 #define ERR_PID             0x01
00097 #define ERR_UEPKT           0x02
00098 #define ERR_DCRC            0x04
00099 #define ERR_TIMOUT          0x08
00100 #define ERR_EOP             0x10
00101 #define ERR_B_OVRN          0x20
00102 #define ERR_BTSTF           0x40
00103 #define ERR_TGL             0x80
00104
00105 /* Endpoint Select Register Definitions */
00106 #define EP_SEL_F            0x01
00107 #define EP_SEL_ST           0x02
00108 #define EP_SEL_STP          0x04
00109 #define EP_SEL_PO           0x08
00110 #define EP_SEL_EPN          0x10
00111 #define EP_SEL_B_1_FULL     0x20
00112 #define EP_SEL_B_2_FULL     0x40
00113
00114 /* Endpoint Status Register Definitions */
00115 #define EP_STAT_ST          0x01
00116 #define EP_STAT_DA          0x20
00117 #define EP_STAT_RF_MO       0x40
00118 #define EP_STAT_CND_ST      0x80
00119
00120 /* Clear Buffer Register Definitions */
00121 #define CLR_BUF_PO          0x01
00122
00123
00124 /* DMA Interrupt Bit Definitions */
00125 #define EOT_INT             0x01
00126 #define NDD_REQ_INT         0x02
00127 #define SYS_ERR_INT         0x04
00128
00129
00130 #endif  /* __USBREG_H */
Generated on Tue Jun 7 14:59:05 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBCDC/usbuser.c Source File

C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBCDC/usbuser.c

Go to the documentation of this file.
00001 /*----------------------------------------------------------------------------
00002  *      U S B  -  K e r n e l
00003  *----------------------------------------------------------------------------
00004  * Name:    usbuser.c
00005  * Purpose: USB Custom User Module
00006  * Version: V1.20
00007  *----------------------------------------------------------------------------
00008  *      This software is supplied "AS IS" without any warranties, express,
00009  *      implied or statutory, including but not limited to the implied
00010  *      warranties of fitness for purpose, satisfactory quality and
00011  *      noninfringement. Keil extends you a royalty-free right to reproduce
00012  *      and distribute executable files created using this software for use
00013  *      on NXP Semiconductors LPC family microcontroller devices only. Nothing
00014  *      else gives you the right to use this software.
00015  *
00016  * Copyright (c) 2009 Keil - An ARM Company. All rights reserved.
00017  *---------------------------------------------------------------------------*/
00018 #include "lpc_types.h"
00019
00020 #include "usb.h"
00021 #include "usbcfg.h"
00022 #include "usbhw.h"
00023 #include "usbcore.h"
00024 #include "usbuser.h"
00025 #include "cdcuser.h"
00026
00027
00028 /*
00029  *  USB Power Event Callback
00030  *   Called automatically on USB Power Event
00031  *    Parameter:       power: On(TRUE)/Off(FALSE)
00032  */
00033
00034 #if USB_POWER_EVENT
00035 void USB_Power_Event (uint32_t  power) {
00036 }
00037 #endif
00038
00039
00040 /*
00041  *  USB Reset Event Callback
00042  *   Called automatically on USB Reset Event
00043  */
00044
00045 #if USB_RESET_EVENT
00046 void USB_Reset_Event (void) {
00047   USB_ResetCore();
00048 }
00049 #endif
00050
00051
00052 /*
00053  *  USB Suspend Event Callback
00054  *   Called automatically on USB Suspend Event
00055  */
00056
00057 #if USB_SUSPEND_EVENT
00058 void USB_Suspend_Event (void) {
00059 }
00060 #endif
00061
00062
00063 /*
00064  *  USB Resume Event Callback
00065  *   Called automatically on USB Resume Event
00066  */
00067
00068 #if USB_RESUME_EVENT
00069 void USB_Resume_Event (void) {
00070 }
00071 #endif
00072
00073
00074 /*
00075  *  USB Remote Wakeup Event Callback
00076  *   Called automatically on USB Remote Wakeup Event
00077  */
00078
00079 #if USB_WAKEUP_EVENT
00080 void USB_WakeUp_Event (void) {
00081 }
00082 #endif
00083
00084
00085 /*
00086  *  USB Start of Frame Event Callback
00087  *   Called automatically on USB Start of Frame Event
00088  */
00089
00090 #if USB_SOF_EVENT
00091 void USB_SOF_Event (void) {
00092 }
00093 #endif
00094
00095
00096 /*
00097  *  USB Error Event Callback
00098  *   Called automatically on USB Error Event
00099  *    Parameter:       error: Error Code
00100  */
00101
00102 #if USB_ERROR_EVENT
00103 void USB_Error_Event (uint32_t error) {
00104 }
00105 #endif
00106
00107
00108 /*
00109  *  USB Set Configuration Event Callback
00110  *   Called automatically on USB Set Configuration Request
00111  */
00112
00113 #if USB_CONFIGURE_EVENT
00114 void USB_Configure_Event (void) {
00115
00116   if (USB_Configuration) {                  /* Check if USB is configured */
00117     /* add your code here */
00118   }
00119 }
00120 #endif
00121
00122
00123 /*
00124  *  USB Set Interface Event Callback
00125  *   Called automatically on USB Set Interface Request
00126  */
00127
00128 #if USB_INTERFACE_EVENT
00129 void USB_Interface_Event (void) {
00130 }
00131 #endif
00132
00133
00134 /*
00135  *  USB Set/Clear Feature Event Callback
00136  *   Called automatically on USB Set/Clear Feature Request
00137  */
00138
00139 #if USB_FEATURE_EVENT
00140 void USB_Feature_Event (void) {
00141 }
00142 #endif
00143
00144
00145 #define P_EP(n) ((USB_EP_EVENT & (1 << (n))) ? USB_EndPoint##n : NULL)
00146
00147 /* USB Endpoint Events Callback Pointers */
00148 void (* const USB_P_EP[16]) (uint32_t event) = {
00149   P_EP(0),
00150   P_EP(1),
00151   P_EP(2),
00152   P_EP(3),
00153   P_EP(4),
00154   P_EP(5),
00155   P_EP(6),
00156   P_EP(7),
00157   P_EP(8),
00158   P_EP(9),
00159   P_EP(10),
00160   P_EP(11),
00161   P_EP(12),
00162   P_EP(13),
00163   P_EP(14),
00164   P_EP(15),
00165 };
00166
00167
00168 /*
00169  *  USB Endpoint 1 Event Callback
00170  *   Called automatically on USB Endpoint 1 Event
00171  *    Parameter:       event
00172  */
00173
00174 void USB_EndPoint1 (uint32_t event) {
00175   uint16_t temp;
00176   static uint16_t serialState;
00177
00178   switch (event) {
00179     case USB_EVT_IN:
00180       temp = CDC_GetSerialState();
00181       if (serialState != temp) {
00182          serialState = temp;
00183          CDC_NotificationIn();            /* send SERIAL_STATE notification */
00184       }
00185       break;
00186   }
00187 }
00188
00189
00190 /*
00191  *  USB Endpoint 2 Event Callback
00192  *   Called automatically on USB Endpoint 2 Event
00193  *    Parameter:       event
00194  */
00195
00196 void USB_EndPoint2 (uint32_t event) {
00197
00198   switch (event) {
00199     case USB_EVT_OUT:
00200       CDC_BulkOut ();                /* data received from Host */
00201       break;
00202     case USB_EVT_IN:
00203       CDC_BulkIn ();                 /* data expected from Host */
00204       break;
00205   }
00206 }
00207
00208
00209 /*
00210  *  USB Endpoint 3 Event Callback
00211  *   Called automatically on USB Endpoint 3 Event
00212  *    Parameter:       event
00213  */
00214
00215 void USB_EndPoint3 (uint32_t event) {
00216 }
00217
00218
00219 /*
00220  *  USB Endpoint 4 Event Callback
00221  *   Called automatically on USB Endpoint 4 Event
00222  *    Parameter:       event
00223  */
00224
00225 void USB_EndPoint4 (uint32_t event) {
00226 }
00227
00228
00229 /*
00230  *  USB Endpoint 5 Event Callback
00231  *   Called automatically on USB Endpoint 5 Event
00232  *    Parameter:       event
00233  */
00234
00235 void USB_EndPoint5 (uint32_t event) {
00236 }
00237
00238
00239 /*
00240  *  USB Endpoint 6 Event Callback
00241  *   Called automatically on USB Endpoint 6 Event
00242  *    Parameter:       event
00243  */
00244
00245 void USB_EndPoint6 (uint32_t event) {
00246 }
00247
00248
00249 /*
00250  *  USB Endpoint 7 Event Callback
00251  *   Called automatically on USB Endpoint 7 Event
00252  *    Parameter:       event
00253  */
00254
00255 void USB_EndPoint7 (uint32_t event) {
00256 }
00257
00258
00259 /*
00260  *  USB Endpoint 8 Event Callback
00261  *   Called automatically on USB Endpoint 8 Event
00262  *    Parameter:       event
00263  */
00264
00265 void USB_EndPoint8 (uint32_t event) {
00266 }
00267
00268
00269 /*
00270  *  USB Endpoint 9 Event Callback
00271  *   Called automatically on USB Endpoint 9 Event
00272  *    Parameter:       event
00273  */
00274
00275 void USB_EndPoint9 (uint32_t event) {
00276 }
00277
00278
00279 /*
00280  *  USB Endpoint 10 Event Callback
00281  *   Called automatically on USB Endpoint 10 Event
00282  *    Parameter:       event
00283  */
00284
00285 void USB_EndPoint10 (uint32_t event) {
00286 }
00287
00288
00289 /*
00290  *  USB Endpoint 11 Event Callback
00291  *   Called automatically on USB Endpoint 11 Event
00292  *    Parameter:       event
00293  */
00294
00295 void USB_EndPoint11 (uint32_t event) {
00296 }
00297
00298
00299 /*
00300  *  USB Endpoint 12 Event Callback
00301  *   Called automatically on USB Endpoint 12 Event
00302  *    Parameter:       event
00303  */
00304
00305 void USB_EndPoint12 (uint32_t event) {
00306 }
00307
00308
00309 /*
00310  *  USB Endpoint 13 Event Callback
00311  *   Called automatically on USB Endpoint 13 Event
00312  *    Parameter:       event
00313  */
00314
00315 void USB_EndPoint13 (uint32_t event) {
00316 }
00317
00318
00319 /*
00320  *  USB Endpoint 14 Event Callback
00321  *   Called automatically on USB Endpoint 14 Event
00322  *    Parameter:       event
00323  */
00324
00325 void USB_EndPoint14 (uint32_t event) {
00326 }
00327
00328
00329 /*
00330  *  USB Endpoint 15 Event Callback
00331  *   Called automatically on USB Endpoint 15 Event
00332  *    Parameter:       event
00333  */
00334
00335 void USB_EndPoint15 (uint32_t event) {
00336 }
Generated on Tue Jun 7 14:59:05 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBCDC/usbuser.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBCDC/usbuser.h

Go to the documentation of this file.
00001 /*----------------------------------------------------------------------------
00002  *      U S B  -  K e r n e l
00003  *----------------------------------------------------------------------------
00004  * Name:    usbuser.h
00005  * Purpose: USB Custom User Definitions
00006  * Version: V1.20
00007  *----------------------------------------------------------------------------
00008  *      This software is supplied "AS IS" without any warranties, express,
00009  *      implied or statutory, including but not limited to the implied
00010  *      warranties of fitness for purpose, satisfactory quality and
00011  *      noninfringement. Keil extends you a royalty-free right to reproduce
00012  *      and distribute executable files created using this software for use
00013  *      on NXP Semiconductors LPC family microcontroller devices only. Nothing
00014  *      else gives you the right to use this software.
00015  *
00016  * Copyright (c) 2009 Keil - An ARM Company. All rights reserved.
00017  *---------------------------------------------------------------------------*/
00018
00019 #ifndef __USBUSER_H__
00020 #define __USBUSER_H__
00021
00022
00023 /* USB Device Events Callback Functions */
00024 extern void USB_Power_Event     (uint32_t power);
00025 extern void USB_Reset_Event     (void);
00026 extern void USB_Suspend_Event   (void);
00027 extern void USB_Resume_Event    (void);
00028 extern void USB_WakeUp_Event    (void);
00029 extern void USB_SOF_Event       (void);
00030 extern void USB_Error_Event     (uint32_t error);
00031
00032 /* USB Endpoint Callback Events */
00033 #define USB_EVT_SETUP       1   /* Setup Packet */
00034 #define USB_EVT_OUT         2   /* OUT Packet */
00035 #define USB_EVT_IN          3   /*  IN Packet */
00036 #define USB_EVT_OUT_NAK     4   /* OUT Packet - Not Acknowledged */
00037 #define USB_EVT_IN_NAK      5   /*  IN Packet - Not Acknowledged */
00038 #define USB_EVT_OUT_STALL   6   /* OUT Packet - Stalled */
00039 #define USB_EVT_IN_STALL    7   /*  IN Packet - Stalled */
00040 #define USB_EVT_OUT_DMA_EOT 8   /* DMA OUT EP - End of Transfer */
00041 #define USB_EVT_IN_DMA_EOT  9   /* DMA  IN EP - End of Transfer */
00042 #define USB_EVT_OUT_DMA_NDR 10  /* DMA OUT EP - New Descriptor Request */
00043 #define USB_EVT_IN_DMA_NDR  11  /* DMA  IN EP - New Descriptor Request */
00044 #define USB_EVT_OUT_DMA_ERR 12  /* DMA OUT EP - Error */
00045 #define USB_EVT_IN_DMA_ERR  13  /* DMA  IN EP - Error */
00046
00047 /* USB Endpoint Events Callback Pointers */
00048 extern void (* const USB_P_EP[16])(uint32_t event);
00049
00050 /* USB Endpoint Events Callback Functions */
00051 extern void USB_EndPoint0  (uint32_t event);
00052 extern void USB_EndPoint1  (uint32_t event);
00053 extern void USB_EndPoint2  (uint32_t event);
00054 extern void USB_EndPoint3  (uint32_t event);
00055 extern void USB_EndPoint4  (uint32_t event);
00056 extern void USB_EndPoint5  (uint32_t event);
00057 extern void USB_EndPoint6  (uint32_t event);
00058 extern void USB_EndPoint7  (uint32_t event);
00059 extern void USB_EndPoint8  (uint32_t event);
00060 extern void USB_EndPoint9  (uint32_t event);
00061 extern void USB_EndPoint10 (uint32_t event);
00062 extern void USB_EndPoint11 (uint32_t event);
00063 extern void USB_EndPoint12 (uint32_t event);
00064 extern void USB_EndPoint13 (uint32_t event);
00065 extern void USB_EndPoint14 (uint32_t event);
00066 extern void USB_EndPoint15 (uint32_t event);
00067
00068 /* USB Core Events Callback Functions */
00069 extern void USB_Configure_Event (void);
00070 extern void USB_Interface_Event (void);
00071 extern void USB_Feature_Event   (void);
00072
00073
00074 #endif  /* __USBUSER_H__ */
Generated on Tue Jun 7 14:59:05 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBAudio/lpc17xx_libcfg.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBAudio/lpc17xx_libcfg.h

Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          lpc17xx_libcfg.h                        2010-05-21
00003 */
00026 #ifndef LPC17XX_LIBCFG_H_
00027 #define LPC17XX_LIBCFG_H_
00028
00029 #include "lpc_types.h"
00030
00031
00032 /************************** DEBUG MODE DEFINITIONS *********************************/
00033 /* Un-comment the line below to compile the library in DEBUG mode, this will expanse
00034    the "CHECK_PARAM" macro in the FW library code */
00035
00036 #define DEBUG
00037
00038
00039 /******************* PERIPHERAL FW LIBRARY CONFIGURATION DEFINITIONS ***********************/
00040
00041 /* Comment the line below to disable the specific peripheral inclusion */
00042
00043 /* DEBUG_FRAMWORK -------------------- */
00045
00046 /* GPIO ------------------------------- */
00047 //#define _GPIO
00048
00049 /* EXTI ------------------------------- */
00050 //#define _EXTI
00051
00052 /* UART ------------------------------- */
00053 //#define _UART
00054 //#define _UART0
00055 //#define _UART1
00056 //#define _UART2
00057 //#define _UART3
00058
00059 /* SPI ------------------------------- */
00060 //#define _SPI
00061
00062 /* SYSTICK --------------------------- */
00063 //#define _SYSTICK
00064
00065 /* SSP ------------------------------- */
00066 //#define _SSP
00067 //#define _SSP0
00068 //#define _SSP1
00069
00070
00071 /* I2C ------------------------------- */
00072 //#define _I2C
00073 //#define _I2C0
00074 //#define _I2C1
00075 //#define _I2C2
00076
00077 /* TIMER ------------------------------- */
00078 //#define _TIM
00079
00080 /* WDT ------------------------------- */
00081 //#define _WDT
00082
00083
00084 /* GPDMA ------------------------------- */
00085 //#define _GPDMA
00086
00087
00088 /* DAC ------------------------------- */
00089 //#define _DAC
00090
00091 /* DAC ------------------------------- */
00092 //#define _ADC
00093
00094
00095 /* PWM ------------------------------- */
00096 //#define _PWM
00097 //#define _PWM1
00098
00099 /* RTC ------------------------------- */
00100 //#define _RTC
00101
00102 /* I2S ------------------------------- */
00103 //#define _I2S
00104
00105 /* USB device ------------------------------- */
00106 //#define _USBDEV
00107 //#define _USB_DMA
00108
00109 /* QEI ------------------------------- */
00110 //#define _QEI
00111
00112 /* MCPWM ------------------------------- */
00113 //#define _MCPWM
00114
00115 /* CAN--------------------------------*/
00116 //#define _CAN
00117
00118 /* RIT ------------------------------- */
00119 //#define _RIT
00120
00121 /* EMAC ------------------------------ */
00122 //#define _EMAC
00123
00124 /************************** GLOBAL/PUBLIC MACRO DEFINITIONS *********************************/
00125
00126 #ifdef  DEBUG
00127 /*******************************************************************************
00128 * @brief                The CHECK_PARAM macro is used for function's parameters check.
00129 *                               It is used only if the library is compiled in DEBUG mode.
00130 * @param[in]    expr - If expr is false, it calls check_failed() function
00131 *                       which reports the name of the source file and the source
00132 *                       line number of the call that failed.
00133 *                    - If expr is true, it returns no value.
00134 * @return               None
00135 *******************************************************************************/
00136 #define CHECK_PARAM(expr) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))
00137 #else
00138 #define CHECK_PARAM(expr)
00139 #endif /* DEBUG */
00140
00141
00142
00143 /************************** GLOBAL/PUBLIC FUNCTION DECLARATION *********************************/
00144
00145 #ifdef  DEBUG
00146 void check_failed(uint8_t *file, uint32_t line);
00147 #endif
00148
00149
00150 #endif /* LPC17XX_LIBCFG_H_ */
Generated on Tue Jun 7 14:58:58 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBCDC/serial.c Source File

C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBCDC/serial.c

Go to the documentation of this file.
00001 /*----------------------------------------------------------------------------
00002  *      Name:    serial.c
00003  *      Purpose: serial port handling for LPC17xx
00004  *      Version: V1.20
00005  *----------------------------------------------------------------------------
00006  *      This software is supplied "AS IS" without any warranties, express,
00007  *      implied or statutory, including but not limited to the implied
00008  *      warranties of fitness for purpose, satisfactory quality and
00009  *      noninfringement. Keil extends you a royalty-free right to reproduce
00010  *      and distribute executable files created using this software for use
00011  *      on NXP Semiconductors LPC microcontroller devices only. Nothing else
00012  *      gives you the right to use this software.
00013  *
00014  * Copyright (c) 2009 Keil - An ARM Company. All rights reserved.
00015  *---------------------------------------------------------------------------*/
00016 #include "LPC17xx.h"                                   // LPC17xx definitions
00017 #include "lpc_types.h"
00018 #include "serial.h"
00019
00020
00021 /*----------------------------------------------------------------------------
00022   Defines for ring buffers
00023  *---------------------------------------------------------------------------*/
00024 #define SER_BUF_SIZE               (128)               // serial buffer in bytes (power 2)
00025 #define SER_BUF_MASK               (SER_BUF_SIZE-1ul)  // buffer size mask
00026
00027 /* Buffer read / write macros */
00028 #define SER_BUF_RESET(serBuf)      (serBuf.rdIdx = serBuf.wrIdx = 0)
00029 #define SER_BUF_WR(serBuf, dataIn) (serBuf.data[SER_BUF_MASK & serBuf.wrIdx++] = (dataIn))
00030 #define SER_BUF_RD(serBuf)         (serBuf.data[SER_BUF_MASK & serBuf.rdIdx++])
00031 #define SER_BUF_EMPTY(serBuf)      (serBuf.rdIdx == serBuf.wrIdx)
00032 #define SER_BUF_FULL(serBuf)       (serBuf.rdIdx == serBuf.wrIdx+1)
00033 #define SER_BUF_COUNT(serBuf)      (SER_BUF_MASK & (serBuf.wrIdx - serBuf.rdIdx))
00034
00035 // buffer type
00036 typedef struct __SER_BUF_T {
00037   unsigned char data[SER_BUF_SIZE];
00038   unsigned int wrIdx;
00039   unsigned int rdIdx;
00040 } SER_BUF_T;
00041
00042 unsigned long          ser_txRestart;                  // NZ if TX restart is required
00043 unsigned short         ser_lineState;                  // ((msr << 8) | (lsr))
00044 SER_BUF_T              ser_out;                        // Serial data buffers
00045 SER_BUF_T              ser_in;
00046
00047 /*----------------------------------------------------------------------------
00048   open the serial port
00049  *---------------------------------------------------------------------------*/
00050 void ser_OpenPort (char portNum) {
00051
00052   if ( portNum == 0 )
00053   {
00054         /* Port 0 */
00055         NVIC_DisableIRQ(UART0_IRQn);
00056         LPC_PINCON->PINSEL0 &= ~0x000000F0;
00057         LPC_PINCON->PINSEL0 |= 0x00000050;     /* RxD0 is P0.3 and TxD0 is P0.2 */
00058   }
00059   else
00060   {
00061         /* Port 1 */
00062         NVIC_DisableIRQ(UART1_IRQn);
00063         LPC_PINCON->PINSEL4 &= ~0x0000000F;
00064         LPC_PINCON->PINSEL4 |= 0x0000000A;    /* Enable RxD1 P2.1, TxD1 P2.0 */
00065   }
00066   return;
00067 }
00068
00069 /*----------------------------------------------------------------------------
00070   close the serial port
00071  *---------------------------------------------------------------------------*/
00072 void ser_ClosePort (char portNum ) {
00073   if ( portNum == 0 )
00074   {
00075         /* POrt 0 */
00076         LPC_PINCON->PINSEL0 &= ~0x000000F0;
00077         /* Disable the interrupt in the VIC and UART controllers */
00078         LPC_UART0->IER = 0;
00079         NVIC_DisableIRQ(UART0_IRQn);
00080   }
00081   else
00082   {
00083         /* Port 1 */
00084         LPC_PINCON->PINSEL4 &= ~0x0000000F;
00085         /* Disable the interrupt in the VIC and UART controllers */
00086         LPC_UART1->IER = 0;
00087         NVIC_DisableIRQ(UART1_IRQn);
00088   }
00089   return;
00090 }
00091
00092 /*----------------------------------------------------------------------------
00093   initialize the serial port
00094  *---------------------------------------------------------------------------*/
00095 void ser_InitPort0 (unsigned long baudrate, unsigned int  databits,
00096                   unsigned int  parity,   unsigned int  stopbits) {
00097
00098   unsigned char lcr_p, lcr_s, lcr_d;
00099   unsigned int dll;
00100   unsigned int pclkdiv, pclk;
00101
00102   switch (databits) {
00103     case 5:                                            // 5 Data bits
00104       lcr_d = 0x00;
00105     break;
00106     case 6:                                            // 6 Data bits
00107       lcr_d = 0x01;
00108     break;
00109     case 7:                                            // 7 Data bits
00110       lcr_d = 0x02;
00111     break;
00112     case 8:                                            // 8 Data bits
00113     default:
00114       lcr_d = 0x03;
00115     break;
00116   }
00117
00118   switch (stopbits) {
00119     case 1:                                            // 1,5 Stop bits
00120     case 2:                                            // 2   Stop bits
00121       lcr_s = 0x04;
00122     break;
00123     case 0:                                            // 1   Stop bit
00124     default:
00125       lcr_s = 0x00;
00126     break;
00127   }
00128
00129   switch (parity) {
00130     case 1:                                            // Parity Odd
00131       lcr_p = 0x08;
00132     break;
00133     case 2:                                            // Parity Even
00134       lcr_p = 0x18;
00135     break;
00136     case 3:                                            // Parity Mark
00137       lcr_p = 0x28;
00138     break;
00139     case 4:                                            // Parity Space
00140       lcr_p = 0x38;
00141     break;
00142     case 0:                                            // Parity None
00143     default:
00144       lcr_p = 0x00;
00145     break;
00146   }
00147
00148   SER_BUF_RESET(ser_out);                              // reset out buffer
00149   SER_BUF_RESET(ser_in);                               // reset in buffer
00150
00151   /* Bit 6~7 is for UART0 */
00152   pclkdiv = (LPC_SC->PCLKSEL0 >> 6) & 0x03;
00153
00154   switch ( pclkdiv )
00155   {
00156         case 0x00:
00157         default:
00158           pclk = SystemCoreClock/4;
00159           break;
00160         case 0x01:
00161           pclk = SystemCoreClock;
00162           break;
00163         case 0x02:
00164           pclk = SystemCoreClock/2;
00165           break;
00166         case 0x03:
00167           pclk = SystemCoreClock/8;
00168           break;
00169   }
00170
00171   dll = (pclk/16)/baudrate ;    /*baud rate */
00172   LPC_UART0->FDR = 0;                             // Fractional divider not used
00173   LPC_UART0->LCR = 0x80 | lcr_d | lcr_p | lcr_s;  // Data bits, Parity,   Stop bit
00174   LPC_UART0->DLL = dll;                           // Baud Rate depending on PCLK
00175   LPC_UART0->DLM = (dll >> 8);                    // High divisor latch
00176   LPC_UART0->LCR = 0x00 | lcr_d | lcr_p | lcr_s;  // DLAB = 0
00177   LPC_UART0->IER = 0x03;                          // Enable TX/RX interrupts
00178
00179   LPC_UART0->FCR = 0x07;                                /* Enable and reset TX and RX FIFO. */
00180   ser_txRestart = 1;                                   // TX fifo is empty
00181
00182   /* Enable the UART Interrupt */
00183   NVIC_EnableIRQ(UART0_IRQn);
00184   return;
00185 }
00186
00187 /*----------------------------------------------------------------------------
00188   initialize the serial port
00189  *---------------------------------------------------------------------------*/
00190 void ser_InitPort1 (unsigned long baudrate, unsigned int  databits,
00191                   unsigned int  parity,   unsigned int  stopbits) {
00192
00193   unsigned char lcr_p, lcr_s, lcr_d;
00194   unsigned int dll;
00195   unsigned int pclkdiv, pclk;
00196
00197   switch (databits) {
00198     case 5:                                            // 5 Data bits
00199       lcr_d = 0x00;
00200     break;
00201     case 6:                                            // 6 Data bits
00202       lcr_d = 0x01;
00203     break;
00204     case 7:                                            // 7 Data bits
00205       lcr_d = 0x02;
00206     break;
00207     case 8:                                            // 8 Data bits
00208     default:
00209       lcr_d = 0x03;
00210     break;
00211   }
00212
00213   switch (stopbits) {
00214     case 1:                                            // 1,5 Stop bits
00215     case 2:                                            // 2   Stop bits
00216       lcr_s = 0x04;
00217     break;
00218     case 0:                                            // 1   Stop bit
00219     default:
00220       lcr_s = 0x00;
00221     break;
00222   }
00223
00224   switch (parity) {
00225     case 1:                                            // Parity Odd
00226       lcr_p = 0x08;
00227     break;
00228     case 2:                                            // Parity Even
00229       lcr_p = 0x18;
00230     break;
00231     case 3:                                            // Parity Mark
00232       lcr_p = 0x28;
00233     break;
00234     case 4:                                            // Parity Space
00235       lcr_p = 0x38;
00236     break;
00237     case 0:                                            // Parity None
00238     default:
00239       lcr_p = 0x00;
00240     break;
00241   }
00242
00243   SER_BUF_RESET(ser_out);                              // reset out buffer
00244   SER_BUF_RESET(ser_in);                               // reset in buffer
00245
00246   /* Bit 8,9 are for UART1 */
00247   pclkdiv = (LPC_SC->PCLKSEL0 >> 8) & 0x03;
00248
00249   switch ( pclkdiv )
00250   {
00251         case 0x00:
00252         default:
00253           pclk = SystemCoreClock/4;
00254           break;
00255         case 0x01:
00256           pclk = SystemCoreClock;
00257           break;
00258         case 0x02:
00259           pclk = SystemCoreClock/2;
00260           break;
00261         case 0x03:
00262           pclk = SystemCoreClock/8;
00263           break;
00264   }
00265
00266   dll = (pclk/16)/baudrate ;    /*baud rate */
00267   LPC_UART1->FDR = 0;                             // Fractional divider not used
00268   LPC_UART1->LCR = 0x80 | lcr_d | lcr_p | lcr_s;  // Data bits, Parity,   Stop bit
00269   LPC_UART1->DLL = dll;                           // Baud Rate depending on PCLK
00270   LPC_UART1->DLM = (dll >> 8);                    // High divisor latch
00271   LPC_UART1->LCR = 0x00 | lcr_d | lcr_p | lcr_s;  // DLAB = 0
00272   LPC_UART1->IER = 0x03;                          // Enable TX/RX interrupts
00273
00274   LPC_UART1->FCR = 0x07;                                /* Enable and reset TX and RX FIFO. */
00275   ser_txRestart = 1;                                   // TX fifo is empty
00276
00277   /* Enable the UART Interrupt */
00278   NVIC_EnableIRQ(UART1_IRQn);
00279   return;
00280 }
00281
00282 /*----------------------------------------------------------------------------
00283   read data from serial port
00284  *---------------------------------------------------------------------------*/
00285 int ser_Read (char *buffer, const int *length) {
00286   int bytesToRead, bytesRead;
00287
00288   /* Read *length bytes, block if *bytes are not avaialable     */
00289   bytesToRead = *length;
00290   bytesToRead = (bytesToRead < (*length)) ? bytesToRead : (*length);
00291   bytesRead = bytesToRead;
00292
00293   while (bytesToRead--) {
00294     while (SER_BUF_EMPTY(ser_in));                     // Block until data is available if none
00295     *buffer++ = SER_BUF_RD(ser_in);
00296   }
00297   return (bytesRead);
00298 }
00299
00300 /*----------------------------------------------------------------------------
00301   write data to the serial port
00302  *---------------------------------------------------------------------------*/
00303 int ser_Write (char portNum, const char *buffer, int *length) {
00304   int  bytesToWrite, bytesWritten;
00305
00306   // Write *length bytes
00307   bytesToWrite = *length;
00308   bytesWritten = bytesToWrite;
00309
00310   while (!SER_BUF_EMPTY(ser_out));               // Block until space is available if none
00311   while (bytesToWrite) {
00312       SER_BUF_WR(ser_out, *buffer++);            // Read Rx FIFO to buffer
00313       bytesToWrite--;
00314   }
00315
00316   if (ser_txRestart) {
00317     ser_txRestart = 0;
00318         if ( portNum == 0 )
00319         {
00320           LPC_UART0->THR = SER_BUF_RD(ser_out);             // Write to the Tx Register
00321     }
00322         else
00323         {
00324       LPC_UART1->THR = SER_BUF_RD(ser_out);             // Write to the Tx Register
00325         }
00326   }
00327
00328   return (bytesWritten);
00329 }
00330
00331 /*----------------------------------------------------------------------------
00332   check if character(s) are available at the serial interface
00333  *---------------------------------------------------------------------------*/
00334 void ser_AvailChar (int *availChar) {
00335
00336   *availChar = SER_BUF_COUNT(ser_in);
00337
00338 }
00339
00340 /*----------------------------------------------------------------------------
00341   read the line state of the serial port
00342  *---------------------------------------------------------------------------*/
00343 void ser_LineState (unsigned short *lineState) {
00344
00345   *lineState = ser_lineState;
00346   ser_lineState = 0;
00347
00348 }
00349
00350 /*----------------------------------------------------------------------------
00351   serial port 0 interrupt
00352  *---------------------------------------------------------------------------*/
00353 void UART0_IRQHandler(void)
00354 {
00355   volatile unsigned long iir;
00356
00357   iir = LPC_UART0->IIR;
00358
00359   if ((iir & 0x4) || (iir & 0xC)) {            // RDA or CTI pending
00360     while (LPC_UART0->LSR & 0x01) {                 // Rx FIFO is not empty
00361       SER_BUF_WR(ser_in, LPC_UART0->RBR);           // Read Rx FIFO to buffer
00362     }
00363   }
00364   if ((iir & 0x2)) {                           // TXMIS pending
00365         if (SER_BUF_COUNT(ser_out) != 0) {
00366       LPC_UART0->THR = SER_BUF_RD(ser_out);         // Write to the Tx FIFO
00367       ser_txRestart = 0;
00368     }
00369         else {
00370       ser_txRestart = 1;
00371         }
00372   }
00373   ser_lineState = LPC_UART0->LSR & 0x1E;            // update linestate
00374   return;
00375 }
00376
00377 /*----------------------------------------------------------------------------
00378   serial port 1 interrupt
00379  *---------------------------------------------------------------------------*/
00380 void UART1_IRQHandler(void)
00381 {
00382   volatile unsigned long iir;
00383
00384   iir = LPC_UART1->IIR;
00385
00386   if ((iir & 0x4) || (iir & 0xC)) {            // RDA or CTI pending
00387     while (LPC_UART1->LSR & 0x01) {                 // Rx FIFO is not empty
00388       SER_BUF_WR(ser_in, LPC_UART1->RBR);           // Read Rx FIFO to buffer
00389     }
00390   }
00391   if ((iir & 0x2)) {                           // TXMIS pending
00392         if (SER_BUF_COUNT(ser_out) != 0) {
00393       LPC_UART1->THR = SER_BUF_RD(ser_out);         // Write to the Tx FIFO
00394       ser_txRestart = 0;
00395     }
00396         else {
00397       ser_txRestart = 1;
00398         }
00399   }
00400   ser_lineState = ((LPC_UART1->MSR<<8)|LPC_UART1->LSR) & 0xE01E;    // update linestate
00401   return;
00402 }
00403
00404
Generated on Tue Jun 7 14:59:00 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBCDC/lpc17xx_libcfg.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBCDC/lpc17xx_libcfg.h

Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          lpc17xx_libcfg.h                        2010-05-21
00003 */
00026 #ifndef LPC17XX_LIBCFG_H_
00027 #define LPC17XX_LIBCFG_H_
00028
00029 #include "lpc_types.h"
00030
00031
00032 /************************** DEBUG MODE DEFINITIONS *********************************/
00033 /* Un-comment the line below to compile the library in DEBUG mode, this will expanse
00034    the "CHECK_PARAM" macro in the FW library code */
00035
00036 #define DEBUG
00037
00038
00039 /******************* PERIPHERAL FW LIBRARY CONFIGURATION DEFINITIONS ***********************/
00040
00041 /* Comment the line below to disable the specific peripheral inclusion */
00042
00043 /* DEBUG_FRAMWORK -------------------- */
00045
00046 /* GPIO ------------------------------- */
00047 //#define _GPIO
00048
00049 /* EXTI ------------------------------- */
00050 //#define _EXTI
00051
00052 /* UART ------------------------------- */
00053 //#define _UART
00054 //#define _UART0
00055 //#define _UART1
00056 //#define _UART2
00057 //#define _UART3
00058
00059 /* SPI ------------------------------- */
00060 //#define _SPI
00061
00062 /* SYSTICK --------------------------- */
00063 //#define _SYSTICK
00064
00065 /* SSP ------------------------------- */
00066 //#define _SSP
00067 //#define _SSP0
00068 //#define _SSP1
00069
00070
00071 /* I2C ------------------------------- */
00072 //#define _I2C
00073 //#define _I2C0
00074 //#define _I2C1
00075 //#define _I2C2
00076
00077 /* TIMER ------------------------------- */
00078 //#define _TIM
00079
00080 /* WDT ------------------------------- */
00081 //#define _WDT
00082
00083
00084 /* GPDMA ------------------------------- */
00085 //#define _GPDMA
00086
00087
00088 /* DAC ------------------------------- */
00089 //#define _DAC
00090
00091 /* DAC ------------------------------- */
00092 //#define _ADC
00093
00094
00095 /* PWM ------------------------------- */
00096 //#define _PWM
00097 //#define _PWM1
00098
00099 /* RTC ------------------------------- */
00100 //#define _RTC
00101
00102 /* I2S ------------------------------- */
00103 //#define _I2S
00104
00105 /* USB device ------------------------------- */
00106 //#define _USBDEV
00107 //#define _USB_DMA
00108
00109 /* QEI ------------------------------- */
00110 //#define _QEI
00111
00112 /* MCPWM ------------------------------- */
00113 //#define _MCPWM
00114
00115 /* CAN--------------------------------*/
00116 //#define _CAN
00117
00118 /* RIT ------------------------------- */
00119 //#define _RIT
00120
00121 /* EMAC ------------------------------ */
00122 //#define _EMAC
00123
00124 /************************** GLOBAL/PUBLIC MACRO DEFINITIONS *********************************/
00125
00126 #ifdef  DEBUG
00127 /*******************************************************************************
00128 * @brief                The CHECK_PARAM macro is used for function's parameters check.
00129 *                               It is used only if the library is compiled in DEBUG mode.
00130 * @param[in]    expr - If expr is false, it calls check_failed() function
00131 *                       which reports the name of the source file and the source
00132 *                       line number of the call that failed.
00133 *                    - If expr is true, it returns no value.
00134 * @return               None
00135 *******************************************************************************/
00136 #define CHECK_PARAM(expr) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))
00137 #else
00138 #define CHECK_PARAM(expr)
00139 #endif /* DEBUG */
00140
00141
00142
00143 /************************** GLOBAL/PUBLIC FUNCTION DECLARATION *********************************/
00144
00145 #ifdef  DEBUG
00146 void check_failed(uint8_t *file, uint32_t line);
00147 #endif
00148
00149
00150 #endif /* LPC17XX_LIBCFG_H_ */
Generated on Tue Jun 7 14:58:58 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBHID/lpc17xx_libcfg.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBHID/lpc17xx_libcfg.h

Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          lpc17xx_libcfg.h                        2010-05-21
00003 */
00026 #ifndef LPC17XX_LIBCFG_H_
00027 #define LPC17XX_LIBCFG_H_
00028
00029 #include "lpc_types.h"
00030
00031
00032 /************************** DEBUG MODE DEFINITIONS *********************************/
00033 /* Un-comment the line below to compile the library in DEBUG mode, this will expanse
00034    the "CHECK_PARAM" macro in the FW library code */
00035
00036 #define DEBUG
00037
00038 /******************* PERIPHERAL FW LIBRARY CONFIGURATION DEFINITIONS ***********************/
00039
00040 /* Comment the line below to disable the specific peripheral inclusion */
00041
00042 /* DEBUG_FRAMWORK ------------------------------ */
00043 //#define _DBGFWK
00044
00045 /* GPIO ------------------------------- */
00046 //#define _GPIO
00047
00048 /* EXTI ------------------------------- */
00049 //#define _EXTI
00050
00051 /* UART ------------------------------- */
00052 //#define _UART
00053 //#define _UART0
00054 //#define _UART1
00055 //#define _UART2
00056 //#define _UART3
00057
00058 /* SPI ------------------------------- */
00059 //#define _SPI
00060
00061 /* SSP ------------------------------- */
00062 //#define _SSP
00063 //#define _SSP0
00064 //#define _SSP1
00065
00066 /* SYSTICK --------------------------- */
00067 //#define _SYSTICK
00068
00069 /* I2C ------------------------------- */
00070 //#define _I2C
00071 //#define _I2C0
00072 //#define _I2C1
00073 //#define _I2C2
00074
00075 /* TIMER ------------------------------- */
00076 //#define _TIM
00077
00078 /* WDT ------------------------------- */
00079 //#define _WDT
00080
00081
00082 /* GPDMA ------------------------------- */
00083 //#define _GPDMA
00084
00085
00086 /* DAC ------------------------------- */
00087 //#define _DAC
00088
00089 /* DAC ------------------------------- */
00090 //#define _ADC
00091
00092
00093 /* PWM ------------------------------- */
00094 //#define _PWM
00095 //#define _PWM1
00096
00097 /* RTC ------------------------------- */
00098 //#define _RTC
00099
00100 /* I2S ------------------------------- */
00101 //#define _I2S
00102
00103 /* USB device ------------------------------- */
00104 //#define _USBDEV
00105 //#define _USB_DMA
00106
00107 /* QEI ------------------------------- */
00108 //#define _QEI
00109
00110 /* MCPWM ------------------------------- */
00111 //#define _MCPWM
00112
00113 /* CAN--------------------------------*/
00114 //#define _CAN
00115
00116 /* RIT ------------------------------- */
00117 //#define _RIT
00118
00119 /* EMAC ------------------------------ */
00120 //#define _EMAC
00121
00122
00123 /************************** GLOBAL/PUBLIC MACRO DEFINITIONS *********************************/
00124
00125 #ifdef  DEBUG
00126 /*******************************************************************************
00127 * @brief                The CHECK_PARAM macro is used for function's parameters check.
00128 *                               It is used only if the library is compiled in DEBUG mode.
00129 * @param[in]    expr - If expr is false, it calls check_failed() function
00130 *                       which reports the name of the source file and the source
00131 *                       line number of the call that failed.
00132 *                    - If expr is true, it returns no value.
00133 * @return               None
00134 *******************************************************************************/
00135 #define CHECK_PARAM(expr) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))
00136 #else
00137 #define CHECK_PARAM(expr)
00138 #endif /* DEBUG */
00139
00140
00141
00142 /************************** GLOBAL/PUBLIC FUNCTION DECLARATION *********************************/
00143
00144 #ifdef  DEBUG
00145 void check_failed(uint8_t *file, uint32_t line);
00146 #endif
00147
00148
00149 #endif /* LPC17XX_LIBCFG_H_ */
Generated on Tue Jun 7 14:58:58 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBMassStorage/lpc17xx_libcfg.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBMassStorage/lpc17xx_libcfg.h

Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          lpc17xx_libcfg.h                        2010-05-21
00003 */
00026 #ifndef LPC17XX_LIBCFG_H_
00027 #define LPC17XX_LIBCFG_H_
00028
00029 #include "lpc_types.h"
00030
00031
00032 /************************** DEBUG MODE DEFINITIONS *********************************/
00033 /* Un-comment the line below to compile the library in DEBUG mode, this will expanse
00034    the "CHECK_PARAM" macro in the FW library code */
00035
00036 #define DEBUG
00037
00038 /******************* PERIPHERAL FW LIBRARY CONFIGURATION DEFINITIONS ***********************/
00039
00040 /* Comment the line below to disable the specific peripheral inclusion */
00041
00042 /* DEBUG_FRAMWORK ------------------------------ */
00043 //#define _DBGFWK
00044
00045 /* GPIO ------------------------------- */
00046 //#define _GPIO
00047
00048 /* EXTI ------------------------------- */
00049 //#define _EXTI
00050
00051 /* UART ------------------------------- */
00052 //#define _UART
00053 //#define _UART0
00054 //#define _UART1
00055 //#define _UART2
00056 //#define _UART3
00057
00058 /* SPI ------------------------------- */
00059 //#define _SPI
00060
00061 /* SSP ------------------------------- */
00062 //#define _SSP
00063 //#define _SSP0
00064 //#define _SSP1
00065
00066 /* SYSTICK --------------------------- */
00067 //#define _SYSTICK
00068
00069 /* I2C ------------------------------- */
00070 //#define _I2C
00071 //#define _I2C0
00072 //#define _I2C1
00073 //#define _I2C2
00074
00075 /* TIMER ------------------------------- */
00076 //#define _TIM
00077
00078 /* WDT ------------------------------- */
00079 //#define _WDT
00080
00081
00082 /* GPDMA ------------------------------- */
00083 //#define _GPDMA
00084
00085
00086 /* DAC ------------------------------- */
00087 //#define _DAC
00088
00089 /* DAC ------------------------------- */
00090 //#define _ADC
00091
00092
00093 /* PWM ------------------------------- */
00094 //#define _PWM
00095 //#define _PWM1
00096
00097 /* RTC ------------------------------- */
00098 //#define _RTC
00099
00100 /* I2S ------------------------------- */
00101 //#define _I2S
00102
00103 /* USB device ------------------------------- */
00104 //#define _USBDEV
00105 //#define _USB_DMA
00106
00107 /* QEI ------------------------------- */
00108 //#define _QEI
00109
00110 /* MCPWM ------------------------------- */
00111 //#define _MCPWM
00112
00113 /* CAN--------------------------------*/
00114 //#define _CAN
00115
00116 /* RIT ------------------------------- */
00117 //#define _RIT
00118
00119 /* EMAC ------------------------------ */
00120 //#define _EMAC
00121
00122
00123 /************************** GLOBAL/PUBLIC MACRO DEFINITIONS *********************************/
00124
00125 #ifdef  DEBUG
00126 /*******************************************************************************
00127 * @brief                The CHECK_PARAM macro is used for function's parameters check.
00128 *                               It is used only if the library is compiled in DEBUG mode.
00129 * @param[in]    expr - If expr is false, it calls check_failed() function
00130 *                       which reports the name of the source file and the source
00131 *                       line number of the call that failed.
00132 *                    - If expr is true, it returns no value.
00133 * @return               None
00134 *******************************************************************************/
00135 #define CHECK_PARAM(expr) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))
00136 #else
00137 #define CHECK_PARAM(expr)
00138 #endif /* DEBUG */
00139
00140
00141
00142 /************************** GLOBAL/PUBLIC FUNCTION DECLARATION *********************************/
00143
00144 #ifdef  DEBUG
00145 void check_failed(uint8_t *file, uint32_t line);
00146 #endif
00147
00148
00149 #endif /* LPC17XX_LIBCFG_H_ */
Generated on Tue Jun 7 14:58:58 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBHID/usb.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBHID/usb.h

Go to the documentation of this file.
00001 /*----------------------------------------------------------------------------
00002  *      U S B  -  K e r n e l
00003  *----------------------------------------------------------------------------
00004  *      Name:    USB.H
00005  *      Purpose: USB Definitions
00006  *      Version: V1.10
00007  *----------------------------------------------------------------------------
00008  *      This software is supplied "AS IS" without any warranties, express,
00009  *      implied or statutory, including but not limited to the implied
00010  *      warranties of fitness for purpose, satisfactory quality and
00011  *      noninfringement. Keil extends you a royalty-free right to reproduce
00012  *      and distribute executable files created using this software for use
00013  *      on NXP Semiconductors LPC family microcontroller devices only. Nothing
00014  *      else gives you the right to use this software.
00015  *
00016  *      Copyright (c) 2005-2009 Keil Software.
00017  *---------------------------------------------------------------------------*/
00018
00019 #ifndef __USB_H__
00020 #define __USB_H__
00021
00022
00023 #if defined   (  __GNUC__  )
00024 #define __packed __attribute__((__packed__))
00025 #endif
00026
00027
00028 #if defined     (  __CC_ARM  )
00029 typedef __packed union {
00030 #elif defined   (  __GNUC__  )
00031 typedef union __packed {
00032 #elif defined   (  __IAR_SYSTEMS_ICC__  )
00033 #pragma pack(1)
00034 typedef union {
00035 #endif
00036   uint16_t W;
00037 #if defined     (  __CC_ARM  )
00038   __packed struct {
00039 #elif defined   (  __GNUC__  )
00040   struct __packed {
00041 #elif defined   (  __IAR_SYSTEMS_ICC__  )
00042 #pragma pack(1)
00043   struct {
00044 #endif
00045     uint8_t L;
00046     uint8_t H;
00047   } WB;
00048 #ifdef __IAR_SYSTEMS_ICC__
00049 #pragma pack()
00050 #endif
00051 } WORD_BYTE;
00052 #ifdef __IAR_SYSTEMS_ICC__
00053 #pragma pack()
00054 #endif
00055
00056 /* bmRequestType.Dir */
00057 #define REQUEST_HOST_TO_DEVICE     0
00058 #define REQUEST_DEVICE_TO_HOST     1
00059
00060 /* bmRequestType.Type */
00061 #define REQUEST_STANDARD           0
00062 #define REQUEST_CLASS              1
00063 #define REQUEST_VENDOR             2
00064 #define REQUEST_RESERVED           3
00065
00066 /* bmRequestType.Recipient */
00067 #define REQUEST_TO_DEVICE          0
00068 #define REQUEST_TO_INTERFACE       1
00069 #define REQUEST_TO_ENDPOINT        2
00070 #define REQUEST_TO_OTHER           3
00071
00072 /* bmRequestType Definition */
00073 #if defined     (  __CC_ARM  )
00074 typedef __packed union _REQUEST_TYPE {
00075 #elif defined   (  __GNUC__  )
00076 typedef union __packed _REQUEST_TYPE {
00077 #elif defined   (  __IAR_SYSTEMS_ICC__  )
00078 #pragma pack(1)
00079 typedef union _REQUEST_TYPE {
00080 #endif
00081 #if defined     (  __CC_ARM  )
00082         __packed struct _BM {
00083 #elif defined   (  __GNUC__  )
00084         struct __packed _BM {
00085 #elif defined   (  __IAR_SYSTEMS_ICC__  )
00086 #pragma pack(1)
00087         struct _BM {
00088 #endif
00089     uint8_t Recipient : 5;
00090     uint8_t Type      : 2;
00091     uint8_t Dir       : 1;
00092   } BM;
00093 #ifdef __IAR_SYSTEMS_ICC__
00094 #pragma pack()
00095 #endif
00096   uint8_t B;
00097 } REQUEST_TYPE;
00098 #ifdef __IAR_SYSTEMS_ICC__
00099 #pragma pack()
00100 #endif
00101
00102 /* USB Standard Request Codes */
00103 #define USB_REQUEST_GET_STATUS                 0
00104 #define USB_REQUEST_CLEAR_FEATURE              1
00105 #define USB_REQUEST_SET_FEATURE                3
00106 #define USB_REQUEST_SET_ADDRESS                5
00107 #define USB_REQUEST_GET_DESCRIPTOR             6
00108 #define USB_REQUEST_SET_DESCRIPTOR             7
00109 #define USB_REQUEST_GET_CONFIGURATION          8
00110 #define USB_REQUEST_SET_CONFIGURATION          9
00111 #define USB_REQUEST_GET_INTERFACE              10
00112 #define USB_REQUEST_SET_INTERFACE              11
00113 #define USB_REQUEST_SYNC_FRAME                 12
00114
00115 /* USB GET_STATUS Bit Values */
00116 #define USB_GETSTATUS_SELF_POWERED             0x01
00117 #define USB_GETSTATUS_REMOTE_WAKEUP            0x02
00118 #define USB_GETSTATUS_ENDPOINT_STALL           0x01
00119
00120 /* USB Standard Feature selectors */
00121 #define USB_FEATURE_ENDPOINT_STALL             0
00122 #define USB_FEATURE_REMOTE_WAKEUP              1
00123
00124 /* USB Default Control Pipe Setup Packet */
00125 #if defined     (  __CC_ARM  )
00126 typedef __packed struct _USB_SETUP_PACKET {
00127 #elif defined   (  __GNUC__  )
00128 typedef struct __packed _USB_SETUP_PACKET {
00129 #elif defined   (  __IAR_SYSTEMS_ICC__  )
00130 #pragma pack(1)
00131 typedef struct _USB_SETUP_PACKET {
00132 #endif
00133   REQUEST_TYPE bmRequestType;
00134   uint8_t         bRequest;
00135   WORD_BYTE    wValue;
00136   WORD_BYTE    wIndex;
00137   uint16_t         wLength;
00138 } USB_SETUP_PACKET;
00139 #ifdef __IAR_SYSTEMS_ICC__
00140 #pragma pack()
00141 #endif
00142
00143 /* USB Descriptor Types */
00144 #define USB_DEVICE_DESCRIPTOR_TYPE             1
00145 #define USB_CONFIGURATION_DESCRIPTOR_TYPE      2
00146 #define USB_STRING_DESCRIPTOR_TYPE             3
00147 #define USB_INTERFACE_DESCRIPTOR_TYPE          4
00148 #define USB_ENDPOINT_DESCRIPTOR_TYPE           5
00149 #define USB_DEVICE_QUALIFIER_DESCRIPTOR_TYPE   6
00150 #define USB_OTHER_SPEED_CONFIG_DESCRIPTOR_TYPE 7
00151 #define USB_INTERFACE_POWER_DESCRIPTOR_TYPE    8
00152 #define USB_OTG_DESCRIPTOR_TYPE                     9
00153 #define USB_DEBUG_DESCRIPTOR_TYPE                  10
00154 #define USB_INTERFACE_ASSOCIATION_DESCRIPTOR_TYPE  11
00155
00156 /* USB Device Classes */
00157 #define USB_DEVICE_CLASS_RESERVED              0x00
00158 #define USB_DEVICE_CLASS_AUDIO                 0x01
00159 #define USB_DEVICE_CLASS_COMMUNICATIONS        0x02
00160 #define USB_DEVICE_CLASS_HUMAN_INTERFACE       0x03
00161 #define USB_DEVICE_CLASS_MONITOR               0x04
00162 #define USB_DEVICE_CLASS_PHYSICAL_INTERFACE    0x05
00163 #define USB_DEVICE_CLASS_POWER                 0x06
00164 #define USB_DEVICE_CLASS_PRINTER               0x07
00165 #define USB_DEVICE_CLASS_STORAGE               0x08
00166 #define USB_DEVICE_CLASS_HUB                   0x09
00167 #define USB_DEVICE_CLASS_MISCELLANEOUS         0xEF
00168 #define USB_DEVICE_CLASS_VENDOR_SPECIFIC       0xFF
00169
00170 /* bmAttributes in Configuration Descriptor */
00171 #define USB_CONFIG_POWERED_MASK                0xC0
00172 #define USB_CONFIG_BUS_POWERED                 0x80
00173 #define USB_CONFIG_SELF_POWERED                0xC0
00174 #define USB_CONFIG_REMOTE_WAKEUP               0x20
00175
00176 /* bMaxPower in Configuration Descriptor */
00177 #define USB_CONFIG_POWER_MA(mA)                ((mA)/2)
00178
00179 /* bEndpointAddress in Endpoint Descriptor */
00180 #define USB_ENDPOINT_DIRECTION_MASK            0x80
00181 #define USB_ENDPOINT_OUT(addr)                 ((addr) | 0x00)
00182 #define USB_ENDPOINT_IN(addr)                  ((addr) | 0x80)
00183
00184 /* bmAttributes in Endpoint Descriptor */
00185 #define USB_ENDPOINT_TYPE_MASK                 0x03
00186 #define USB_ENDPOINT_TYPE_CONTROL              0x00
00187 #define USB_ENDPOINT_TYPE_ISOCHRONOUS          0x01
00188 #define USB_ENDPOINT_TYPE_BULK                 0x02
00189 #define USB_ENDPOINT_TYPE_INTERRUPT            0x03
00190 #define USB_ENDPOINT_SYNC_MASK                 0x0C
00191 #define USB_ENDPOINT_SYNC_NO_SYNCHRONIZATION   0x00
00192 #define USB_ENDPOINT_SYNC_ASYNCHRONOUS         0x04
00193 #define USB_ENDPOINT_SYNC_ADAPTIVE             0x08
00194 #define USB_ENDPOINT_SYNC_SYNCHRONOUS          0x0C
00195 #define USB_ENDPOINT_USAGE_MASK                0x30
00196 #define USB_ENDPOINT_USAGE_DATA                0x00
00197 #define USB_ENDPOINT_USAGE_FEEDBACK            0x10
00198 #define USB_ENDPOINT_USAGE_IMPLICIT_FEEDBACK   0x20
00199 #define USB_ENDPOINT_USAGE_RESERVED            0x30
00200
00201 /* USB Standard Device Descriptor */
00202 #if defined     (  __CC_ARM  )
00203 typedef __packed struct _USB_DEVICE_DESCRIPTOR {
00204 #elif defined   (  __GNUC__  )
00205 typedef struct __packed _USB_DEVICE_DESCRIPTOR {
00206 #elif defined   (  __IAR_SYSTEMS_ICC__  )
00207 #pragma pack(1)
00208 typedef struct _USB_DEVICE_DESCRIPTOR {
00209 #endif
00210   uint8_t  bLength;
00211   uint8_t  bDescriptorType;
00212   uint16_t  bcdUSB;
00213   uint8_t  bDeviceClass;
00214   uint8_t  bDeviceSubClass;
00215   uint8_t  bDeviceProtocol;
00216   uint8_t  bMaxPacketSize0;
00217   uint16_t  idVendor;
00218   uint16_t  idProduct;
00219   uint16_t  bcdDevice;
00220   uint8_t  iManufacturer;
00221   uint8_t  iProduct;
00222   uint8_t  iSerialNumber;
00223   uint8_t  bNumConfigurations;
00224 } USB_DEVICE_DESCRIPTOR;
00225 #ifdef __IAR_SYSTEMS_ICC__
00226 #pragma pack()
00227 #endif
00228
00229 /* USB 2.0 Device Qualifier Descriptor */
00230 #if defined     (  __CC_ARM  )
00231 typedef __packed struct _USB_DEVICE_QUALIFIER_DESCRIPTOR {
00232 #elif defined   (  __GNUC__  )
00233 typedef struct __packed _USB_DEVICE_QUALIFIER_DESCRIPTOR {
00234 #elif defined   (  __IAR_SYSTEMS_ICC__  )
00235 #pragma pack(1)
00236 typedef struct _USB_DEVICE_QUALIFIER_DESCRIPTOR {
00237 #endif
00238   uint8_t  bLength;
00239   uint8_t  bDescriptorType;
00240   uint16_t  bcdUSB;
00241   uint8_t  bDeviceClass;
00242   uint8_t  bDeviceSubClass;
00243   uint8_t  bDeviceProtocol;
00244   uint8_t  bMaxPacketSize0;
00245   uint8_t  bNumConfigurations;
00246   uint8_t  bReserved;
00247 } USB_DEVICE_QUALIFIER_DESCRIPTOR;
00248 #ifdef __IAR_SYSTEMS_ICC__
00249 #pragma pack()
00250 #endif
00251
00252 /* USB Standard Configuration Descriptor */
00253 #if defined     (  __CC_ARM  )
00254 typedef __packed struct _USB_CONFIGURATION_DESCRIPTOR {
00255 #elif defined   (  __GNUC__  )
00256 typedef struct __packed _USB_CONFIGURATION_DESCRIPTOR {
00257 #elif defined   (  __IAR_SYSTEMS_ICC__  )
00258 #pragma pack(1)
00259 typedef struct _USB_CONFIGURATION_DESCRIPTOR {
00260 #endif
00261   uint8_t  bLength;
00262   uint8_t  bDescriptorType;
00263   uint16_t  wTotalLength;
00264   uint8_t  bNumInterfaces;
00265   uint8_t  bConfigurationValue;
00266   uint8_t  iConfiguration;
00267   uint8_t  bmAttributes;
00268   uint8_t  bMaxPower;
00269 } USB_CONFIGURATION_DESCRIPTOR;
00270 #ifdef __IAR_SYSTEMS_ICC__
00271 #pragma pack()
00272 #endif
00273
00274 /* USB Standard Interface Descriptor */
00275 #if defined     (  __CC_ARM  )
00276 typedef __packed struct _USB_INTERFACE_DESCRIPTOR {
00277 #elif defined   (  __GNUC__  )
00278 typedef struct __packed _USB_INTERFACE_DESCRIPTOR {
00279 #elif defined   (  __IAR_SYSTEMS_ICC__  )
00280 #pragma pack(1)
00281 typedef struct _USB_INTERFACE_DESCRIPTOR {
00282 #endif
00283   uint8_t  bLength;
00284   uint8_t  bDescriptorType;
00285   uint8_t  bInterfaceNumber;
00286   uint8_t  bAlternateSetting;
00287   uint8_t  bNumEndpoints;
00288   uint8_t  bInterfaceClass;
00289   uint8_t  bInterfaceSubClass;
00290   uint8_t  bInterfaceProtocol;
00291   uint8_t  iInterface;
00292 } USB_INTERFACE_DESCRIPTOR;
00293 #ifdef __IAR_SYSTEMS_ICC__
00294 #pragma pack()
00295 #endif
00296
00297 /* USB Standard Endpoint Descriptor */
00298 #if defined     (  __CC_ARM  )
00299 typedef __packed struct _USB_ENDPOINT_DESCRIPTOR {
00300 #elif defined   (  __GNUC__  )
00301 typedef struct __packed _USB_ENDPOINT_DESCRIPTOR {
00302 #elif defined   (  __IAR_SYSTEMS_ICC__  )
00303 #pragma pack(1)
00304 typedef struct _USB_ENDPOINT_DESCRIPTOR {
00305 #endif
00306   uint8_t  bLength;
00307   uint8_t  bDescriptorType;
00308   uint8_t  bEndpointAddress;
00309   uint8_t  bmAttributes;
00310   uint16_t  wMaxPacketSize;
00311   uint8_t  bInterval;
00312 } USB_ENDPOINT_DESCRIPTOR;
00313 #ifdef __IAR_SYSTEMS_ICC__
00314 #pragma pack()
00315 #endif
00316
00317 /* USB String Descriptor */
00318 #if defined     (  __CC_ARM  )
00319 typedef __packed struct _USB_STRING_DESCRIPTOR {
00320 #elif defined   (  __GNUC__  )
00321 typedef struct __packed _USB_STRING_DESCRIPTOR {
00322 #elif defined   (  __IAR_SYSTEMS_ICC__  )
00323 #pragma pack(1)
00324 typedef struct _USB_STRING_DESCRIPTOR {
00325 #endif
00326   uint8_t  bLength;
00327   uint8_t  bDescriptorType;
00328   uint16_t  bString/*[]*/;
00329 } USB_STRING_DESCRIPTOR;
00330 #ifdef __IAR_SYSTEMS_ICC__
00331 #pragma pack()
00332 #endif
00333
00334 /* USB Common Descriptor */
00335 #if defined     (  __CC_ARM  )
00336 typedef __packed struct _USB_COMMON_DESCRIPTOR {
00337 #elif defined   (  __GNUC__  )
00338 typedef struct __packed _USB_COMMON_DESCRIPTOR {
00339 #elif defined   (  __IAR_SYSTEMS_ICC__  )
00340 #pragma pack(1)
00341 typedef struct _USB_COMMON_DESCRIPTOR {
00342 #endif
00343   uint8_t  bLength;
00344   uint8_t  bDescriptorType;
00345 } USB_COMMON_DESCRIPTOR;
00346 #ifdef __IAR_SYSTEMS_ICC__
00347 #pragma pack()
00348 #endif
00349
00350 #endif  /* __USB_H__ */
Generated on Tue Jun 7 14:59:04 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBHID/usbcfg.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBHID/usbcfg.h

Go to the documentation of this file.
00001 /*----------------------------------------------------------------------------
00002  *      U S B  -  K e r n e l
00003  *----------------------------------------------------------------------------
00004  *      Name:    USBCFG.H
00005  *      Purpose: USB Custom Configuration
00006  *      Version: V1.10
00007  *----------------------------------------------------------------------------
00008  *      This software is supplied "AS IS" without any warranties, express,
00009  *      implied or statutory, including but not limited to the implied
00010  *      warranties of fitness for purpose, satisfactory quality and
00011  *      noninfringement. Keil extends you a royalty-free right to reproduce
00012  *      and distribute executable files created using this software for use
00013  *      on NXP Semiconductors LPC family microcontroller devices only. Nothing
00014  *      else gives you the right to use this software.
00015  *
00016  *      Copyright (c) 2005-2009 Keil Software.
00017  *---------------------------------------------------------------------------*/
00018
00019 #ifndef __USBCFG_H__
00020 #define __USBCFG_H__
00021
00022
00023 //*** <<< Use Configuration Wizard in Context Menu >>> ***
00024
00025
00026 /*
00027 // <h> USB Configuration
00028 //   <o0> USB Power
00029 //        <i> Default Power Setting
00030 //        <0=> Bus-powered
00031 //        <1=> Self-powered
00032 //   <o1> Max Number of Interfaces <1-256>
00033 //   <o2> Max Number of Endpoints  <1-32>
00034 //   <o3> Max Endpoint 0 Packet Size
00035 //        <8=> 8 Bytes <16=> 16 Bytes <32=> 32 Bytes <64=> 64 Bytes
00036 //   <e4> DMA Transfer
00037 //     <i> Use DMA for selected Endpoints
00038 //     <o5.0>  Endpoint 0 Out
00039 //     <o5.1>  Endpoint 0 In
00040 //     <o5.2>  Endpoint 1 Out
00041 //     <o5.3>  Endpoint 1 In
00042 //     <o5.4>  Endpoint 2 Out
00043 //     <o5.5>  Endpoint 2 In
00044 //     <o5.6>  Endpoint 3 Out
00045 //     <o5.7>  Endpoint 3 In
00046 //     <o5.8>  Endpoint 4 Out
00047 //     <o5.9>  Endpoint 4 In
00048 //     <o5.10> Endpoint 5 Out
00049 //     <o5.11> Endpoint 5 In
00050 //     <o5.12> Endpoint 6 Out
00051 //     <o5.13> Endpoint 6 In
00052 //     <o5.14> Endpoint 7 Out
00053 //     <o5.15> Endpoint 7 In
00054 //     <o5.16> Endpoint 8 Out
00055 //     <o5.17> Endpoint 8 In
00056 //     <o5.18> Endpoint 9 Out
00057 //     <o5.19> Endpoint 9 In
00058 //     <o5.20> Endpoint 10 Out
00059 //     <o5.21> Endpoint 10 In
00060 //     <o5.22> Endpoint 11 Out
00061 //     <o5.23> Endpoint 11 In
00062 //     <o5.24> Endpoint 12 Out
00063 //     <o5.25> Endpoint 12 In
00064 //     <o5.26> Endpoint 13 Out
00065 //     <o5.27> Endpoint 13 In
00066 //     <o5.28> Endpoint 14 Out
00067 //     <o5.29> Endpoint 14 In
00068 //     <o5.30> Endpoint 15 Out
00069 //     <o5.31> Endpoint 15 In
00070 //   </e>
00071 // </h>
00072 */
00073
00074 #define USB_POWER           0
00075 #define USB_IF_NUM          1
00076 #define USB_EP_NUM          32
00077 //#define USB_MAX_PACKET0     64
00078 #define USB_MAX_PACKET0     8
00079 #define USB_DMA             1
00080 #define USB_DMA_EP          0x00000000
00081
00082
00083 /*
00084 // <h> USB Event Handlers
00085 //   <h> Device Events
00086 //     <o0.0> Power Event
00087 //     <o1.0> Reset Event
00088 //     <o2.0> Suspend Event
00089 //     <o3.0> Resume Event
00090 //     <o4.0> Remote Wakeup Event
00091 //     <o5.0> Start of Frame Event
00092 //     <o6.0> Error Event
00093 //   </h>
00094 //   <h> Endpoint Events
00095 //     <o7.0>  Endpoint 0 Event
00096 //     <o7.1>  Endpoint 1 Event
00097 //     <o7.2>  Endpoint 2 Event
00098 //     <o7.3>  Endpoint 3 Event
00099 //     <o7.4>  Endpoint 4 Event
00100 //     <o7.5>  Endpoint 5 Event
00101 //     <o7.6>  Endpoint 6 Event
00102 //     <o7.7>  Endpoint 7 Event
00103 //     <o7.8>  Endpoint 8 Event
00104 //     <o7.9>  Endpoint 9 Event
00105 //     <o7.10> Endpoint 10 Event
00106 //     <o7.11> Endpoint 11 Event
00107 //     <o7.12> Endpoint 12 Event
00108 //     <o7.13> Endpoint 13 Event
00109 //     <o7.14> Endpoint 14 Event
00110 //     <o7.15> Endpoint 15 Event
00111 //   </h>
00112 //   <h> USB Core Events
00113 //     <o8.0>  Set Configuration Event
00114 //     <o9.0>  Set Interface Event
00115 //     <o10.0> Set/Clear Feature Event
00116 //   </h>
00117 // </h>
00118 */
00119
00120 #define USB_POWER_EVENT     0
00121 #define USB_RESET_EVENT     1
00122 #define USB_SUSPEND_EVENT   0
00123 #define USB_RESUME_EVENT    0
00124 #define USB_WAKEUP_EVENT    0
00125 #define USB_SOF_EVENT       0
00126 #define USB_ERROR_EVENT     0
00127 //#define USB_EP_EVENT        0x0003
00128 #define USB_EP_EVENT        0x0007
00129 #define USB_CONFIGURE_EVENT 1
00130 #define USB_INTERFACE_EVENT 0
00131 #define USB_FEATURE_EVENT   0
00132
00133
00134 /*
00135 // <e0> USB Class Support
00136 //   <e1> Human Interface Device (HID)
00137 //     <o2> Interface Number <0-255>
00138 //   </e>
00139 //   <e3> Mass Storage
00140 //     <o4> Interface Number <0-255>
00141 //   </e>
00142 //   <e5> Audio Device
00143 //     <o6> Control Interface Number <0-255>
00144 //     <o7> Streaming Interface 1 Number <0-255>
00145 //     <o8> Streaming Interface 2 Number <0-255>
00146 //   </e>
00147 // </e>
00148 */
00149
00150 #define USB_CLASS           1
00151 #define USB_HID             1
00152 #define USB_HID_IF_NUM      0
00153 #define USB_MSC             0
00154 #define USB_MSC_IF_NUM      0
00155 #define USB_AUDIO           0
00156 #define USB_ADC_CIF_NUM     0
00157 #define USB_ADC_SIF1_NUM    1
00158 #define USB_ADC_SIF2_NUM    2
00159 #define USB_CDC                         0
00160 #define USB_CDC_CIF_NUM     0
00161 #define USB_CDC_DIF_NUM     1
00162 #define USB_CDC_BUFSIZE     64
00163
00164
00165 #endif  /* __USBCFG_H__ */
Generated on Tue Jun 7 14:59:04 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBHID/usbcore.c Source File

C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBHID/usbcore.c

Go to the documentation of this file.
00001 /*----------------------------------------------------------------------------
00002  *      U S B  -  K e r n e l
00003  *----------------------------------------------------------------------------
00004  *      Name:    USBCORE.C
00005  *      Purpose: USB Core Module
00006  *      Version: V1.10
00007  *----------------------------------------------------------------------------
00008  *      This software is supplied "AS IS" without any warranties, express,
00009  *      implied or statutory, including but not limited to the implied
00010  *      warranties of fitness for purpose, satisfactory quality and
00011  *      noninfringement. Keil extends you a royalty-free right to reproduce
00012  *      and distribute executable files created using this software for use
00013  *      on NXP Semiconductors LPC family microcontroller devices only. Nothing
00014  *      else gives you the right to use this software.
00015  *
00016  *      Copyright (c) 2005-2009 Keil Software.
00017  *---------------------------------------------------------------------------*/
00018
00019
00020 #include "lpc_types.h"
00021
00022 #include "usb.h"
00023 #include "usbcfg.h"
00024 #include "usbhw.h"
00025 #include "usbcore.h"
00026 #include "usbdesc.h"
00027 #include "usbuser.h"
00028
00029 #if (USB_CLASS)
00030
00031 #if (USB_AUDIO)
00032 #include "audio.h"
00033 #include "adcuser.h"
00034 #endif
00035
00036 #if (USB_HID)
00037 #include "hid.h"
00038 #include "hiduser.h"
00039 #endif
00040
00041 #if (USB_MSC)
00042 #include "msc.h"
00043 #include "mscuser.h"
00044 extern MSC_CSW CSW;
00045 #endif
00046
00047 #if (USB_CDC)
00048 #include "cdc.h"
00049 #include "cdcuser.h"
00050 #endif
00051
00052 #endif
00053
00054 #if (USB_VENDOR)
00055 #include "vendor.h"
00056 #endif
00057
00058 #ifndef __IAR_SYSTEMS_ICC__
00059 #pragma diag_suppress 111,1441
00060 #endif
00061
00062 uint16_t  USB_DeviceStatus;
00063 uint8_t  USB_DeviceAddress;
00064 uint8_t  USB_Configuration;
00065 uint32_t USB_EndPointMask;
00066 uint32_t USB_EndPointHalt;
00067 uint8_t  USB_NumInterfaces;
00068 uint8_t  USB_AltSetting[USB_IF_NUM];
00069
00070 uint8_t  EP0Buf[USB_MAX_PACKET0];
00071
00072
00073 USB_EP_DATA EP0Data;
00074
00075 USB_SETUP_PACKET SetupPacket;
00076
00077
00078 /*
00079  *  Reset USB Core
00080  *    Parameters:      None
00081  *    Return Value:    None
00082  */
00083
00084 void USB_ResetCore (void) {
00085
00086   USB_DeviceStatus  = USB_POWER;
00087   USB_DeviceAddress = 0;
00088   USB_Configuration = 0;
00089   USB_EndPointMask  = 0x00010001;
00090   USB_EndPointHalt  = 0x00000000;
00091 }
00092
00093
00094 /*
00095  *  USB Request - Setup Stage
00096  *    Parameters:      None (global SetupPacket)
00097  *    Return Value:    None
00098  */
00099
00100 void USB_SetupStage (void) {
00101   USB_ReadEP(0x00, (uint8_t *)&SetupPacket);
00102 }
00103
00104
00105 /*
00106  *  USB Request - Data In Stage
00107  *    Parameters:      None (global EP0Data)
00108  *    Return Value:    None
00109  */
00110
00111 void USB_DataInStage (void) {
00112   uint32_t cnt;
00113
00114   if (EP0Data.Count > USB_MAX_PACKET0) {
00115     cnt = USB_MAX_PACKET0;
00116   } else {
00117     cnt = EP0Data.Count;
00118   }
00119   cnt = USB_WriteEP(0x80, EP0Data.pData, cnt);
00120   EP0Data.pData += cnt;
00121   EP0Data.Count -= cnt;
00122 }
00123
00124
00125 /*
00126  *  USB Request - Data Out Stage
00127  *    Parameters:      None (global EP0Data)
00128  *    Return Value:    None
00129  */
00130
00131 void USB_DataOutStage (void) {
00132   uint32_t cnt;
00133
00134   cnt = USB_ReadEP(0x00, EP0Data.pData);
00135   EP0Data.pData += cnt;
00136   EP0Data.Count -= cnt;
00137 }
00138
00139
00140 /*
00141  *  USB Request - Status In Stage
00142  *    Parameters:      None
00143  *    Return Value:    None
00144  */
00145
00146 void USB_StatusInStage (void) {
00147   USB_WriteEP(0x80, NULL, 0);
00148 }
00149
00150
00151 /*
00152  *  USB Request - Status Out Stage
00153  *    Parameters:      None
00154  *    Return Value:    None
00155  */
00156
00157 void USB_StatusOutStage (void) {
00158   USB_ReadEP(0x00, EP0Buf);
00159 }
00160
00161
00162 /*
00163  *  Get Descriptor USB Request
00164  *    Parameters:      None (global SetupPacket)
00165  *    Return Value:    TRUE - Success, FALSE - Error
00166  */
00167
00168 #ifdef __IAR_SYSTEMS_ICC__
00169 inline uint32_t USB_GetDescriptor (void) {
00170 #else
00171 __inline uint32_t USB_GetDescriptor (void) {
00172 #endif
00173         uint8_t  *pD;
00174         uint32_t len, n;
00175
00176         switch (SetupPacket.bmRequestType.BM.Recipient)
00177         {
00178                 case REQUEST_TO_DEVICE:
00179                         switch (SetupPacket.wValue.WB.H)
00180                         {
00181                                 case USB_DEVICE_DESCRIPTOR_TYPE:
00182                                         EP0Data.pData = (uint8_t *)USB_DeviceDescriptor;
00183                                         len = USB_DEVICE_DESC_SIZE;
00184                                         break;
00185                                 case USB_CONFIGURATION_DESCRIPTOR_TYPE:
00186                                         pD = (uint8_t *)USB_ConfigDescriptor;
00187                                         for (n = 0; n != SetupPacket.wValue.WB.L; n++)
00188                                         {
00189                                                 if (((USB_CONFIGURATION_DESCRIPTOR *)pD)->bLength != 0)
00190                                                 {
00191                                                         pD += ((USB_CONFIGURATION_DESCRIPTOR *)pD)->wTotalLength;
00192                                                 }
00193                                         }
00194                                         if (((USB_CONFIGURATION_DESCRIPTOR *)pD)->bLength == 0)
00195                                         {
00196                                                 return (FALSE);
00197                                         }
00198                                         EP0Data.pData = pD;
00199                                         len = ((USB_CONFIGURATION_DESCRIPTOR *)pD)->wTotalLength;
00200                                         break;
00201                                 case USB_STRING_DESCRIPTOR_TYPE:
00202                                         EP0Data.pData = (uint8_t *)USB_StringDescriptor + SetupPacket.wValue.WB.L;
00203                                         len = ((USB_STRING_DESCRIPTOR *)EP0Data.pData)->bLength;
00204                                         break;
00205                                 default:
00206                                         return (FALSE);
00207                         }
00208                         break;
00209                 case REQUEST_TO_INTERFACE:
00210                         switch (SetupPacket.wValue.WB.H)
00211                         {
00212 #if USB_HID
00213                                 case HID_HID_DESCRIPTOR_TYPE:
00214                                         if (SetupPacket.wIndex.WB.L != USB_HID_IF_NUM)
00215                                         {
00216                                                 return (FALSE);    /* Only Single HID Interface is supported */
00217                                         }
00218                                         EP0Data.pData = (uint8_t *)USB_ConfigDescriptor + HID_DESC_OFFSET;
00219                                         len = HID_DESC_SIZE;
00220                                         break;
00221                                 case HID_REPORT_DESCRIPTOR_TYPE:
00222                                         if (SetupPacket.wIndex.WB.L != USB_HID_IF_NUM)
00223                                         {
00224                                                 return (FALSE);    /* Only Single HID Interface is supported */
00225                                         }
00226                                         EP0Data.pData = (uint8_t *)HID_ReportDescriptor;
00227                                         len = HID_ReportDescSize;
00228                                         break;
00229                                 case HID_PHYSICAL_DESCRIPTOR_TYPE:
00230                                         return (FALSE);      /* HID Physical Descriptor is not supported */
00231 #endif
00232                                 default:
00233                                         return (FALSE);
00234                         }
00235                         break;
00236                 default:
00237                         return (FALSE);
00238         }
00239
00240         if (EP0Data.Count > len)
00241         {
00242                 EP0Data.Count = len;
00243         }
00244         USB_DataInStage();
00245
00246         return (TRUE);
00247 }
00248
00249
00250 /*
00251  *  Set Configuration USB Request
00252  *    Parameters:      None (global SetupPacket)
00253  *    Return Value:    TRUE - Success, FALSE - Error
00254  */
00255
00256 #ifdef __IAR_SYSTEMS_ICC__
00257 inline uint32_t USB_SetConfiguration (void) {
00258 #else
00259 __inline uint32_t USB_SetConfiguration (void) {
00260 #endif
00261         USB_COMMON_DESCRIPTOR *pD;
00262         uint32_t  alt, n;
00263         uint32_t tmp;
00264
00265         if (SetupPacket.wValue.WB.L)
00266         {
00267                 pD = (USB_COMMON_DESCRIPTOR *)USB_ConfigDescriptor;
00268                 while (pD->bLength)
00269                 {
00270                         switch (pD->bDescriptorType)
00271                         {
00272                                 case USB_CONFIGURATION_DESCRIPTOR_TYPE:
00273                                         if (((USB_CONFIGURATION_DESCRIPTOR *)pD)->bConfigurationValue == SetupPacket.wValue.WB.L)
00274                                         {
00275                                                 USB_Configuration = SetupPacket.wValue.WB.L;
00276                                                 USB_Configure(TRUE);
00277                                         /*      if (((USB_CONFIGURATION_DESCRIPTOR *)pD)->bmAttributes & USB_CONFIG_SELF_POWERED)
00278                                                 {
00279                                                         USB_DeviceStatus |=  USB_GETSTATUS_SELF_POWERED;
00280                                                 }
00281                                                 else
00282                                                 {
00283                                                         USB_DeviceStatus &= ~USB_GETSTATUS_SELF_POWERED;
00284                                                 }        */
00285                                         }
00286                                         else
00287                                         {
00288 //                                              (uint8_t *)pD += ((USB_CONFIGURATION_DESCRIPTOR *)pD)->wTotalLength;
00289                                                 tmp = (uint32_t)pD;
00290                                                 tmp += ((USB_CONFIGURATION_DESCRIPTOR *)pD)->wTotalLength;
00291                                                 pD = (USB_COMMON_DESCRIPTOR *)tmp;
00292                                                 continue;
00293                                         }
00294                                         break;
00295                                 case USB_INTERFACE_DESCRIPTOR_TYPE:
00296                                         alt = ((USB_INTERFACE_DESCRIPTOR *)pD)->bAlternateSetting;
00297                                         break;
00298                                 case USB_ENDPOINT_DESCRIPTOR_TYPE:
00299                                         if (alt == 0)
00300                                         {
00301                                                 n = ((USB_ENDPOINT_DESCRIPTOR *)pD)->bEndpointAddress & 0x8F;
00302                                                 USB_ConfigEP((USB_ENDPOINT_DESCRIPTOR *)pD);
00303                                                 USB_EnableEP(n);
00304                                                 USB_ResetEP(n);
00305                                         }
00306                                         break;
00307                         }
00308 //                      (uint8_t *)pD += pD->bLength;
00309                         tmp = (uint32_t)pD;
00310                         tmp += pD->bLength;
00311                         pD = (USB_COMMON_DESCRIPTOR *)tmp;
00312                 }
00313         }
00314         else
00315         {
00316                 USB_Configuration = 0;
00317                 USB_Configure(FALSE);
00318         }
00319
00320         if (USB_Configuration == SetupPacket.wValue.WB.L)
00321         {
00322                 return (TRUE);
00323         }
00324         else
00325         {
00326                 return (FALSE);
00327         }
00328 }
00329
00330 /*
00331  *  USB Endpoint 0 Event Callback
00332  *    Parameter:       event
00333  */
00334
00335 void USB_EndPoint0 (uint32_t event)
00336 {
00337         switch (event)
00338         {
00339                 case USB_EVT_SETUP:
00340                         USB_SetupStage();
00341                         EP0Data.Count = SetupPacket.wLength;
00342                         switch (SetupPacket.bmRequestType.BM.Type)
00343                         {
00344                                 case REQUEST_STANDARD:
00345                                         switch (SetupPacket.bRequest)
00346                                         {
00347                                                 case USB_REQUEST_SET_ADDRESS:
00348                                                         switch (SetupPacket.bmRequestType.BM.Recipient)
00349                                                         {
00350                                                                 case REQUEST_TO_DEVICE:
00351                                                                         USB_DeviceAddress = SetupPacket.wValue.WB.L;//0x80 | SetupPacket.wValue.WB.L;
00352                                                                         USB_StatusInStage();
00353                                                                         USB_SetAddress(USB_DeviceAddress);
00354                                                                         break;
00355                                                                 default:
00356                                                                         break;
00357                                         }
00358                                         break;
00359
00360                                                 case USB_REQUEST_GET_DESCRIPTOR:
00361                                                         USB_GetDescriptor();
00362                                                         break;
00363
00364                                         /*      case USB_REQUEST_GET_CONFIGURATION:
00365                                                         switch (SetupPacket.bmRequestType.BM.Recipient)
00366                                                         {
00367                                                                 case REQUEST_TO_DEVICE:
00368                                                                         EP0Data.pData = &USB_Configuration;
00369                                                                         USB_DataInStage();
00370                                                                         break;
00371                                                                 default:
00372                                                                         break;
00373                                                         }
00374                                                         break;  */
00375
00376                                                 case USB_REQUEST_SET_CONFIGURATION:
00377                                                         switch (SetupPacket.bmRequestType.BM.Recipient)
00378                                                         {
00379                                                                 case REQUEST_TO_DEVICE:
00380                                                                         if (!USB_SetConfiguration())
00381                                                                         {
00382                                                                                 USB_SetStallEP(0x80);
00383                                                                                 EP0Data.Count = 0;
00384                                                                                 break;
00385                                                                         }
00386                                                                         USB_StatusInStage();
00387 #if USB_CONFIGURE_EVENT
00388                                                         USB_Configure_Event();
00389 #endif
00390                                                                         break;
00391                                                                 default:
00392                                                                         break;
00393                                                         }
00394                                                         break;
00395
00396                                         default:
00397                                                 break;
00398
00399                                         }
00400                                         break;
00401
00402                                 case REQUEST_CLASS:
00403 #if USB_CLASS
00404                                         switch (SetupPacket.bmRequestType.BM.Recipient)
00405                                         {
00406                                                 case REQUEST_TO_INTERFACE:
00407 #if USB_HID
00408                                                         if (SetupPacket.wIndex.WB.L == USB_HID_IF_NUM)
00409                                                         {
00410                                                                 switch (SetupPacket.bRequest)
00411                                                                 {
00412                                                                         case HID_REQUEST_GET_REPORT:
00413                                                                                 if (HID_GetReport())
00414                                                                                 {
00415                                                                                         EP0Data.pData = EP0Buf;
00416                                                                                         USB_DataInStage();
00417                                                                                 }
00418                                                                                 break;
00419                                                                         case HID_REQUEST_SET_REPORT:
00420                                                                                 EP0Data.pData = EP0Buf;
00421                                                                                 break;
00422                                                                         case HID_REQUEST_GET_IDLE:
00423                                                                                 if (HID_GetIdle())
00424                                                                                 {
00425                                                                                         EP0Data.pData = EP0Buf;
00426                                                                                         USB_DataInStage();
00427                                                                                 }
00428                                                                                 break;
00429                                                                         case HID_REQUEST_SET_IDLE:
00430                                                                                 if (HID_SetIdle())
00431                                                                                 {
00432                                                                                         USB_StatusInStage();
00433                                                                                 }
00434                                                                                 break;
00435                                                                         case HID_REQUEST_GET_PROTOCOL:
00436                                                                                 if (HID_GetProtocol())
00437                                                                                 {
00438                                                                                         EP0Data.pData = EP0Buf;
00439                                                                                         USB_DataInStage();
00440                                                                                 }
00441                                                                                 break;
00442                                                                         case HID_REQUEST_SET_PROTOCOL:
00443                                                                                 if (HID_SetProtocol())
00444                                                                                 {
00445                                                                                         USB_StatusInStage();
00446                                                                                 }
00447                                                                                 break;
00448                                                                         default:
00449                                                                                 break;
00450                                                                 }
00451                                                         }
00452 #endif  /* USB_HID */
00453                                                 default:
00454                                                         break;
00455                                         }
00456                                         break;
00457 #else
00458 #endif  /* USB_CLASS */
00459
00460                                 case REQUEST_VENDOR:
00461                                         break;
00462
00463                                 default:
00464                                         USB_SetStallEP(0x80);
00465                                         EP0Data.Count = 0;
00466                                         break;
00467                         }
00468                         break;
00469
00470                 case USB_EVT_OUT:
00471                         if (SetupPacket.bmRequestType.BM.Dir == 0)
00472                         {
00473                                 if (EP0Data.Count)
00474                                 {
00475                                         USB_DataOutStage();
00476                                         if (EP0Data.Count == 0)
00477                                         {
00478                                                 switch (SetupPacket.bmRequestType.BM.Type)
00479                                                 {
00480                                                         case REQUEST_STANDARD:
00481                                                                 USB_SetStallEP(0x80);
00482                                                                 //EP0Data.Count = 0;
00483                                                                 break;
00484 #if (USB_CLASS)
00485                                                         case REQUEST_CLASS:
00486                                                                 switch (SetupPacket.bmRequestType.BM.Recipient)
00487                                                                 {
00488                                                                         case REQUEST_TO_INTERFACE:
00489 #if USB_HID
00490                                                                                 if (SetupPacket.wIndex.WB.L == USB_HID_IF_NUM)
00491                                                                                 {
00492                                                                                         if (!HID_SetReport())
00493                                                                                         {
00494                                                                                                 USB_SetStallEP(0x80);
00495                                                                                                 //EP0Data.Count = 0;
00496                                                                                                 //break;
00497                                                                                         }
00498                                                                                         break;
00499                                                                                         //HID_SetReport();
00500                                                                                 }
00501 #endif
00502                                                                                 USB_SetStallEP(0x80);
00503                                                                                 //EP0Data.Count = 0;
00504                                                                                 break;
00505                                                                         case REQUEST_TO_ENDPOINT:
00506                                                                                 USB_SetStallEP(0x80);
00507                                                                                 //EP0Data.Count = 0;
00508                                                                                 break;
00509                                                                         default:
00510                                                                                 USB_SetStallEP(0x80);
00511                                                                                 //EP0Data.Count = 0;
00512                                                                                 break;
00513                                                                 }
00514                                                                 break;
00515 #endif
00516                                                         default:
00517                                                                 USB_SetStallEP(0x80);
00518                                                                 //EP0Data.Count = 0;
00519                                                                 break;
00520                                                 }
00521                                                 USB_StatusInStage();
00522                                         }
00523                                 }
00524                         }
00525                         else
00526                         {
00527                                 ;//USB_StatusOutStage();
00528                         }
00529
00530
00531                         break;
00532
00533                 case USB_EVT_IN:
00534                         if (SetupPacket.bmRequestType.BM.Dir == 1)
00535                         {
00536                                 if(EP0Data.Count > 0) // ysq add
00537                                         USB_DataInStage();
00538                         }
00539                         //else
00540                         //{
00541                         //      if (USB_DeviceAddress & 0x80)
00542                         //      {
00543                         //              USB_DeviceAddress &= 0x7F;
00544                         //              USB_SetAddress(USB_DeviceAddress);
00545                         //      }
00546                         //}
00547                         break;
00548
00549                 case USB_EVT_IN_STALL:
00550                         USB_ClrStallEP(0x80);
00551                         break;
00552
00553                 case USB_EVT_OUT_STALL:
00554                         USB_ClrStallEP(0x00);
00555                         break;
00556         }
00557 }
Generated on Tue Jun 7 14:59:04 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBHID/usbcore.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBHID/usbcore.h

Go to the documentation of this file.
00001 /*----------------------------------------------------------------------------
00002  *      U S B  -  K e r n e l
00003  *----------------------------------------------------------------------------
00004  *      Name:    USBCORE.H
00005  *      Purpose: USB Core Definitions
00006  *      Version: V1.10
00007  *----------------------------------------------------------------------------
00008  *      This software is supplied "AS IS" without any warranties, express,
00009  *      implied or statutory, including but not limited to the implied
00010  *      warranties of fitness for purpose, satisfactory quality and
00011  *      noninfringement. Keil extends you a royalty-free right to reproduce
00012  *      and distribute executable files created using this software for use
00013  *      on NXP Semiconductors LPC family microcontroller devices only. Nothing
00014  *      else gives you the right to use this software.
00015  *
00016  *      Copyright (c) 2005-2009 Keil Software.
00017  *---------------------------------------------------------------------------*/
00018
00019 #ifndef __USBCORE_H__
00020 #define __USBCORE_H__
00021
00022
00023 /* USB Endpoint Data Structure */
00024 typedef struct _USB_EP_DATA {
00025   uint8_t  *pData;
00026   uint16_t   Count;
00027 } USB_EP_DATA;
00028
00029 /* USB Core Global Variables */
00030 extern uint16_t  USB_DeviceStatus;
00031 extern uint8_t  USB_DeviceAddress;
00032 extern uint8_t  USB_Configuration;
00033 extern uint32_t USB_EndPointMask;
00034 extern uint32_t USB_EndPointHalt;
00035 extern uint8_t  USB_AltSetting[USB_IF_NUM];
00036
00037 /* USB Endpoint 0 Buffer */
00038 extern uint8_t  EP0Buf[USB_MAX_PACKET0];
00039
00040 /* USB Endpoint 0 Data Info */
00041 extern USB_EP_DATA EP0Data;
00042
00043 /* USB Setup Packet */
00044 extern USB_SETUP_PACKET SetupPacket;
00045
00046 /* USB Core Functions */
00047 extern void  USB_ResetCore (void);
00048
00049
00050 #endif  /* __USBCORE_H__ */
Generated on Tue Jun 7 14:59:04 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBHID/usbdesc.c Source File

C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBHID/usbdesc.c

Go to the documentation of this file.
00001 /*----------------------------------------------------------------------------
00002  *      U S B  -  K e r n e l
00003  *----------------------------------------------------------------------------
00004  *      Name:    USBDESC.C
00005  *      Purpose: USB Descriptors
00006  *      Version: V1.10
00007  *----------------------------------------------------------------------------
00008  *      This software is supplied "AS IS" without any warranties, express,
00009  *      implied or statutory, including but not limited to the implied
00010  *      warranties of fitness for purpose, satisfactory quality and
00011  *      noninfringement. Keil extends you a royalty-free right to reproduce
00012  *      and distribute executable files created using this software for use
00013  *      on NXP Semiconductors LPC family microcontroller devices only. Nothing
00014  *      else gives you the right to use this software.
00015  *
00016  *      Copyright (c) 2005-2009 Keil Software.
00017  *---------------------------------------------------------------------------*/
00018
00019 #include "lpc_types.h"
00020
00021 #include "usb.h"
00022 #include "usbcfg.h"
00023 #include "usbdesc.h"
00024
00025 #include "hid.h"
00026
00027 /* HID Report Descriptor */
00028 const uint8_t HID_ReportDescriptor[] = {
00029   HID_UsagePageVendor(0x00),
00030   HID_Usage(0x01),
00031   HID_Collection(HID_Application),
00032     HID_UsagePage(HID_USAGE_PAGE_BUTTON),
00033     HID_UsageMin(1),
00034     HID_UsageMax(3),
00035     HID_LogicalMin(0),
00036     HID_LogicalMax(1),
00037     HID_ReportCount(3),
00038     HID_ReportSize(1),
00039     HID_Input(HID_Data | HID_Variable | HID_Absolute),
00040     HID_ReportCount(1),
00041     HID_ReportSize(5),
00042     HID_Input(HID_Constant),
00043     HID_UsagePage(HID_USAGE_PAGE_LED),
00044     HID_Usage(HID_USAGE_LED_GENERIC_INDICATOR),
00045     HID_LogicalMin(0),
00046     HID_LogicalMax(1),
00047     HID_ReportCount(8),
00048     HID_ReportSize(1),
00049     HID_Output(HID_Data | HID_Variable | HID_Absolute),
00050   HID_EndCollection,
00051 };
00052
00053 const uint16_t HID_ReportDescSize = sizeof(HID_ReportDescriptor);
00054
00055
00056 /* USB Standard Device Descriptor */
00057 const uint8_t USB_DeviceDescriptor[] = {
00058   USB_DEVICE_DESC_SIZE,              /* bLength */
00059   USB_DEVICE_DESCRIPTOR_TYPE,        /* bDescriptorType */
00060   WBVAL(0x0200), /* 2.00 */          /* bcdUSB */
00061   0x00,                              /* bDeviceClass */
00062   0x00,                              /* bDeviceSubClass */
00063   0x00,                              /* bDeviceProtocol */
00064   USB_MAX_PACKET0,                   /* bMaxPacketSize0 */
00065   WBVAL(0xC251),                     /* idVendor */
00066   WBVAL(0x2201),                     /* idProduct */
00067   WBVAL(0x0100), /* 1.00 */          /* bcdDevice */
00068   0x04,                              /* iManufacturer */
00069   0x20,                              /* iProduct */
00070   0x42,                              /* iSerialNumber */
00071   0x01                               /* bNumConfigurations */
00072 };
00073
00074 /* USB Configuration Descriptor */
00075 /*   All Descriptors (Configuration, Interface, Endpoint, Class, Vendor */
00076 const uint8_t USB_ConfigDescriptor[] = {
00077 /* Configuration 1 */
00078   USB_CONFIGUARTION_DESC_SIZE,       /* bDescriptorType */
00079   USB_CONFIGURATION_DESCRIPTOR_TYPE, /* bDescriptorType */
00080   WBVAL(                             /* wTotalLength */
00081     USB_CONFIGUARTION_DESC_SIZE +
00082     USB_INTERFACE_DESC_SIZE     +
00083     HID_DESC_SIZE               +
00084     USB_ENDPOINT_DESC_SIZE
00085   ),
00086   0x01,                              /* bNumInterfaces */
00087   0x01,                              /* bConfigurationValue */
00088   0x00,                              /* iConfiguration */
00089   USB_CONFIG_BUS_POWERED /*|*/       /* bmAttributes */
00090 /*USB_CONFIG_REMOTE_WAKEUP*/,
00091   USB_CONFIG_POWER_MA(100),          /* bMaxPower */
00092 /* Interface 0, Alternate Setting 0, HID Class */
00093   USB_INTERFACE_DESC_SIZE,           /* bLength */
00094   USB_INTERFACE_DESCRIPTOR_TYPE,     /* bDescriptorType */
00095   0x00,                              /* bInterfaceNumber */
00096   0x00,                              /* bAlternateSetting */
00097   0x01,                              /* bNumEndpoints */
00098   USB_DEVICE_CLASS_HUMAN_INTERFACE,  /* bInterfaceClass */
00099   HID_SUBCLASS_NONE,                 /* bInterfaceSubClass */
00100   HID_PROTOCOL_NONE,                 /* bInterfaceProtocol */
00101   0x5C,                              /* iInterface */
00102 /* HID Class Descriptor */
00103 /* HID_DESC_OFFSET = 0x0012 */
00104   HID_DESC_SIZE,                     /* bLength */
00105   HID_HID_DESCRIPTOR_TYPE,           /* bDescriptorType */
00106   WBVAL(0x0100), /* 1.00 */          /* bcdHID */
00107   0x00,                              /* bCountryCode */
00108   0x01,                              /* bNumDescriptors */
00109   HID_REPORT_DESCRIPTOR_TYPE,        /* bDescriptorType */
00110   WBVAL(HID_REPORT_DESC_SIZE),       /* wDescriptorLength */
00111 /* Endpoint, HID Interrupt In */
00112   USB_ENDPOINT_DESC_SIZE,            /* bLength */
00113   USB_ENDPOINT_DESCRIPTOR_TYPE,      /* bDescriptorType */
00114   USB_ENDPOINT_IN(1),                /* bEndpointAddress */
00115   USB_ENDPOINT_TYPE_INTERRUPT,       /* bmAttributes */
00116   WBVAL(0x0004),                     /* wMaxPacketSize */
00117   0x20,          /* 32ms */          /* bInterval */
00118 /* Terminator */
00119   0                                  /* bLength */
00120 };
00121
00122 /* USB String Descriptor (optional) */
00123 const uint8_t USB_StringDescriptor[] = {
00124 /* Index 0x00: LANGID Codes */
00125   0x04,                              /* bLength */
00126   USB_STRING_DESCRIPTOR_TYPE,        /* bDescriptorType */
00127   WBVAL(0x0409), /* US English */    /* wLANGID */
00128 /* Index 0x04: Manufacturer */
00129   0x1C,                              /* bLength */
00130   USB_STRING_DESCRIPTOR_TYPE,        /* bDescriptorType */
00131   'N',0,
00132   'X',0,
00133   'P',0,
00134   ' ',0,
00135   'S',0,
00136   'E',0,
00137   'M',0,
00138   'I',0,
00139   'C',0,
00140   'O',0,
00141   'N',0,
00142   'D',0,
00143   ' ',0,
00144 /* Index 0x20: Product */
00145   0x22,                              /* bLength */
00146   USB_STRING_DESCRIPTOR_TYPE,        /* bDescriptorType */
00147   'L',0,
00148   'P',0,
00149   'C',0,
00150   '1',0,
00151   '7',0,
00152   'x',0,
00153   'x',0,
00154   ' ',0,
00155   'H',0,
00156   'I',0,
00157   'D',0,
00158   ' ',0,
00159   ' ',0,
00160   ' ',0,
00161   ' ',0,
00162   ' ',0,
00163 /* Index 0x42: Serial Number */
00164   0x1A,                              /* bLength */
00165   USB_STRING_DESCRIPTOR_TYPE,        /* bDescriptorType */
00166   'D',0,
00167   'E',0,
00168   'M',0,
00169   'O',0,
00170   '0',0,
00171   '0',0,
00172   '0',0,
00173   '0',0,
00174   '0',0,
00175   '0',0,
00176   '0',0,
00177   '0',0,
00178 /* Index 0x5C: Interface 0, Alternate Setting 0 */
00179   0x08,                              /* bLength */
00180   USB_STRING_DESCRIPTOR_TYPE,        /* bDescriptorType */
00181   'H',0,
00182   'I',0,
00183   'D',0,
00184 };
Generated on Tue Jun 7 14:59:04 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBHID/usbdesc.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBHID/usbdesc.h

Go to the documentation of this file.
00001 /*----------------------------------------------------------------------------
00002  *      U S B  -  K e r n e l
00003  *----------------------------------------------------------------------------
00004  *      Name:    USBDESC.H
00005  *      Purpose: USB Descriptors Definitions
00006  *      Version: V1.10
00007  *----------------------------------------------------------------------------
00008  *      This software is supplied "AS IS" without any warranties, express,
00009  *      implied or statutory, including but not limited to the implied
00010  *      warranties of fitness for purpose, satisfactory quality and
00011  *      noninfringement. Keil extends you a royalty-free right to reproduce
00012  *      and distribute executable files created using this software for use
00013  *      on NXP Semiconductors LPC family microcontroller devices only. Nothing
00014  *      else gives you the right to use this software.
00015  *---------------------------------------------------------------------------*/
00016
00017 #ifndef __USBDESC_H__
00018 #define __USBDESC_H__
00019
00020
00021 #define WBVAL(x) (x & 0xFF),((x >> 8) & 0xFF)
00022
00023 #define USB_DEVICE_DESC_SIZE        (sizeof(USB_DEVICE_DESCRIPTOR))
00024 #define USB_CONFIGUARTION_DESC_SIZE (sizeof(USB_CONFIGURATION_DESCRIPTOR))
00025 #define USB_INTERFACE_DESC_SIZE     (sizeof(USB_INTERFACE_DESCRIPTOR))
00026 #define USB_ENDPOINT_DESC_SIZE      (sizeof(USB_ENDPOINT_DESCRIPTOR))
00027
00028 #define HID_DESC_OFFSET              0x0012
00029 #define HID_DESC_SIZE               (sizeof(HID_DESCRIPTOR))
00030 #define HID_REPORT_DESC_SIZE        (sizeof(HID_ReportDescriptor))
00031
00032 extern const uint8_t USB_DeviceDescriptor[];
00033 extern const uint8_t USB_ConfigDescriptor[];
00034 extern const uint8_t USB_StringDescriptor[];
00035
00036 extern const uint8_t HID_ReportDescriptor[];
00037 extern const uint16_t HID_ReportDescSize;
00038
00039
00040 #endif  /* __USBDESC_H__ */
Generated on Tue Jun 7 14:59:04 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBHID/usbhw.c Source File

C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBHID/usbhw.c

Go to the documentation of this file.
00001 /*----------------------------------------------------------------------------
00002  *      U S B  -  K e r n e l
00003  *----------------------------------------------------------------------------
00004  *      Name:    USBHW.C
00005  *      Purpose: USB Hardware Layer Module for NXP Semiconductor LPC family MCUs
00006  *      Version: V1.10
00007  *----------------------------------------------------------------------------
00008  *      This software is supplied "AS IS" without any warranties, express,
00009  *      implied or statutory, including but not limited to the implied
00010  *      warranties of fitness for purpose, satisfactory quality and
00011  *      noninfringement. Keil extends you a royalty-free right to reproduce
00012  *      and distribute executable files created using this software for use
00013  *      on NXP Semiconductors LPC family microcontroller devices only. Nothing
00014  *      else gives you the right to use this software.
00015  *
00016  *      Copyright (c) 2005-2009 Keil Software.
00017  *---------------------------------------------------------------------------*/
00018
00019 #include "LPC17xx.h"                        /* LPC17xx definitions */
00020
00021 #include "lpc_types.h"
00022
00023 #include "usb.h"
00024 #include "usbcfg.h"
00025 #include "usbreg.h"
00026 #include "usbhw.h"
00027 #include "usbcore.h"
00028 #include "usbuser.h"
00029
00030 #ifndef __IAR_SYSTEMS_ICC__
00031 #pragma diag_suppress 1441
00032 #endif
00033
00034 #define EP_MSK_CTRL 0x0001      /* Control Endpoint Logical Address Mask */
00035 #define EP_MSK_BULK 0xC924      /* Bulk Endpoint Logical Address Mask */
00036 #define EP_MSK_INT  0x4492      /* Interrupt Endpoint Logical Address Mask */
00037 #define EP_MSK_ISO  0x1248      /* Isochronous Endpoint Logical Address Mask */
00038
00039
00040 #if USB_DMA
00041
00042 #if defined (  __CC_ARM  )
00043 #pragma arm section zidata = "USB_RAM"
00044 uint32_t UDCA[USB_EP_NUM];                     /* UDCA in USB RAM */
00045 uint32_t DD_NISO_Mem[4*DD_NISO_CNT];           /* Non-Iso DMA Descriptor Memory */
00046 uint32_t DD_ISO_Mem [5*DD_ISO_CNT];            /* Iso DMA Descriptor Memory */
00047 #pragma arm section zidata
00048 uint32_t udca[USB_EP_NUM];                     /* UDCA saved values */
00049 uint32_t DDMemMap[2];                          /* DMA Descriptor Memory Usage */
00050 #endif
00051
00052 #if defined (  __IAR_SYSTEMS_ICC__  )
00053 #pragma location = "USB_RAM"
00054 uint32_t UDCA[USB_EP_NUM];                     /* UDCA in USB RAM */
00055 #pragma location = "USB_RAM"
00056 uint32_t DD_NISO_Mem[4*DD_NISO_CNT];           /* Non-Iso DMA Descriptor Memory */
00057 #pragma location = "USB_RAM"
00058 uint32_t DD_ISO_Mem [5*DD_ISO_CNT];            /* Iso DMA Descriptor Memory */
00059
00060 uint32_t udca[USB_EP_NUM];                     /* UDCA saved values */
00061 uint32_t DDMemMap[2];                          /* DMA Descriptor Memory Usage */
00062 #endif
00063
00064 #if defined (  __GNUC__  )
00065 uint32_t UDCA[USB_EP_NUM] __attribute__((section("USB_RAM")));                          /* UDCA in USB RAM */
00066 uint32_t DD_NISO_Mem[4*DD_NISO_CNT] __attribute__((section("USB_RAM")));    /* Non-Iso DMA Descriptor Memory */
00067 uint32_t DD_ISO_Mem [5*DD_ISO_CNT] __attribute__((section("USB_RAM")));     /* Iso DMA Descriptor Memory */
00068 uint32_t udca[USB_EP_NUM];                                                                              /* UDCA saved values */
00069 uint32_t DDMemMap[2];                                                                                   /* DMA Descriptor Memory Usage */
00070 #endif
00071
00072 #endif
00073
00074
00075 /*
00076  *  Get Endpoint Physical Address
00077  *    Parameters:      EPNum: Endpoint Number
00078  *                       EPNum.0..3: Address
00079  *                       EPNum.7:    Dir
00080  *    Return Value:    Endpoint Physical Address
00081  */
00082
00083 uint32_t EPAdr (uint32_t EPNum) {
00084   uint32_t val;
00085
00086   val = (EPNum & 0x0F) << 1;
00087   if (EPNum & 0x80) {
00088     val += 1;
00089   }
00090   return (val);
00091 }
00092
00093
00094 /*
00095  *  Write Command
00096  *    Parameters:      cmd:   Command
00097  *    Return Value:    None
00098  */
00099
00100 void WrCmd (uint32_t cmd) {
00101
00102         LPC_USB->USBDevIntClr = CCEMTY_INT;
00103         LPC_USB->USBCmdCode = cmd;
00104         while ((LPC_USB->USBDevIntSt & CCEMTY_INT) == 0);
00105 }
00106
00107
00108 /*
00109  *  Write Command Data
00110  *    Parameters:      cmd:   Command
00111  *                     val:   Data
00112  *    Return Value:    None
00113  */
00114
00115 void WrCmdDat (uint32_t cmd, uint32_t val) {
00116
00117   LPC_USB->USBDevIntClr = CCEMTY_INT;
00118   LPC_USB->USBCmdCode = cmd;
00119   while ((LPC_USB->USBDevIntSt & CCEMTY_INT) == 0);
00120   LPC_USB->USBDevIntClr = CCEMTY_INT;
00121   LPC_USB->USBCmdCode = val;
00122   while ((LPC_USB->USBDevIntSt & CCEMTY_INT) == 0);
00123 }
00124
00125
00126 /*
00127  *  Read Command Data
00128  *    Parameters:      cmd:   Command
00129  *    Return Value:    Data Value
00130  */
00131
00132 uint32_t RdCmdDat (uint32_t cmd) {
00133
00134         LPC_USB->USBDevIntClr = CCEMTY_INT | CDFULL_INT;
00135         LPC_USB->USBCmdCode = cmd;
00136         while ((LPC_USB->USBDevIntSt & CDFULL_INT) == 0);
00137         return (LPC_USB->USBCmdData);
00138 }
00139
00140
00141 /*
00142  *  USB Initialize Function
00143  *   Called by the User to initialize USB
00144  *    Return Value:    None
00145  */
00146
00147 void USB_Init (void) {
00148
00149         LPC_PINCON->PINSEL1 &= ~((3<<26)|(3<<28));   /* P0.29 D+, P0.30 D- */
00150         LPC_PINCON->PINSEL1 |=  ((1<<26)|(1<<28));   /* PINSEL1 26.27, 28.29  = 01 */
00151
00152         LPC_PINCON->PINSEL3 &= ~((3<< 4)|(3<<28));   /* P1.18 GoodLink, P1.30 VBUS */
00153         LPC_PINCON->PINSEL3 |=  ((1<< 4)|(2<<28));   /* PINSEL3 4.5 = 01, 28.29 = 10 */
00154
00155         LPC_PINCON->PINSEL4 &= ~((3<<18)        );   /* P2.9 SoftConnect */
00156         LPC_PINCON->PINSEL4 |=  ((1<<18)        );   /* PINSEL4 18.19 = 01 */
00157
00158         LPC_SC->PCONP |= (1UL<<31);                /* USB PCLK -> enable USB Per.       */
00159
00160         LPC_USB->USBClkCtrl = 0x1A;                  /* Dev, PortSel, AHB clock enable */
00161         while ((LPC_USB->USBClkSt & 0x1A) != 0x1A);
00162
00163         NVIC_EnableIRQ(USB_IRQn);               /* enable USB interrupt */
00164
00165         USB_Reset();
00166         USB_SetAddress(0);
00167 }
00168
00169
00170 /*
00171  *  USB Connect Function
00172  *   Called by the User to Connect/Disconnect USB
00173  *    Parameters:      con:   Connect/Disconnect
00174  *    Return Value:    None
00175  */
00176
00177 void USB_Connect (uint32_t con) {
00178   WrCmdDat(CMD_SET_DEV_STAT, DAT_WR_BYTE(con ? DEV_CON : 0));
00179 }
00180
00181
00182 /*
00183  *  USB Reset Function
00184  *   Called automatically on USB Reset
00185  *    Return Value:    None
00186  */
00187
00188 void USB_Reset (void) {
00189 #if USB_DMA
00190   uint32_t n;
00191 #endif
00192
00193   LPC_USB->USBEpInd = 0;
00194   LPC_USB->USBMaxPSize = USB_MAX_PACKET0;
00195   LPC_USB->USBEpInd = 1;
00196   LPC_USB->USBMaxPSize = USB_MAX_PACKET0;
00197   while ((LPC_USB->USBDevIntSt & EP_RLZED_INT) == 0);
00198
00199   LPC_USB->USBEpIntClr  = 0xFFFFFFFF;
00200   LPC_USB->USBEpIntEn   = 0xFFFFFFFF ^ USB_DMA_EP;
00201   LPC_USB->USBDevIntClr = 0xFFFFFFFF;
00202   LPC_USB->USBDevIntEn  = DEV_STAT_INT    | EP_SLOW_INT    |
00203                (USB_SOF_EVENT   ? FRAME_INT : 0) |
00204                (USB_ERROR_EVENT ? ERR_INT   : 0);
00205
00206 #if USB_DMA
00207   LPC_USB->USBUDCAH   = USB_RAM_ADR;
00208   LPC_USB->USBDMARClr = 0xFFFFFFFF;
00209   LPC_USB->USBEpDMADis  = 0xFFFFFFFF;
00210   LPC_USB->USBEpDMAEn   = USB_DMA_EP;
00211   LPC_USB->USBEoTIntClr = 0xFFFFFFFF;
00212   LPC_USB->USBNDDRIntClr = 0xFFFFFFFF;
00213   LPC_USB->USBSysErrIntClr = 0xFFFFFFFF;
00214   LPC_USB->USBDMAIntEn  = 0x00000007;
00215   DDMemMap[0] = 0x00000000;
00216   DDMemMap[1] = 0x00000000;
00217   for (n = 0; n < USB_EP_NUM; n++) {
00218     udca[n] = 0;
00219     UDCA[n] = 0;
00220   }
00221 #endif
00222 }
00223
00224
00225 /*
00226  *  USB Suspend Function
00227  *   Called automatically on USB Suspend
00228  *    Return Value:    None
00229  */
00230
00231 void USB_Suspend (void) {
00232   /* Performed by Hardware */
00233 }
00234
00235
00236 /*
00237  *  USB Resume Function
00238  *   Called automatically on USB Resume
00239  *    Return Value:    None
00240  */
00241
00242 void USB_Resume (void) {
00243   /* Performed by Hardware */
00244 }
00245
00246
00247 /*
00248  *  USB Remote Wakeup Function
00249  *   Called automatically on USB Remote Wakeup
00250  *    Return Value:    None
00251  */
00252
00253 void USB_WakeUp (void) {
00254
00255   if (USB_DeviceStatus & USB_GETSTATUS_REMOTE_WAKEUP) {
00256     WrCmdDat(CMD_SET_DEV_STAT, DAT_WR_BYTE(DEV_CON));
00257   }
00258 }
00259
00260
00261 /*
00262  *  USB Remote Wakeup Configuration Function
00263  *    Parameters:      cfg:   Enable/Disable
00264  *    Return Value:    None
00265  */
00266
00267 void USB_WakeUpCfg (uint32_t cfg) {
00268   /* Not needed */
00269 }
00270
00271
00272 /*
00273  *  USB Set Address Function
00274  *    Parameters:      adr:   USB Address
00275  *    Return Value:    None
00276  */
00277
00278 void USB_SetAddress (uint32_t adr) {
00279   WrCmdDat(CMD_SET_ADDR, DAT_WR_BYTE(DEV_EN | adr)); /* Don't wait for next */
00280   //WrCmdDat(CMD_SET_ADDR, DAT_WR_BYTE(DEV_EN | adr)); /*  Setup Status Phase */
00281 }
00282
00283
00284 /*
00285  *  USB Configure Function
00286  *    Parameters:      cfg:   Configure/Deconfigure
00287  *    Return Value:    None
00288  */
00289
00290 void USB_Configure (uint32_t cfg) {
00291
00292   WrCmdDat(CMD_CFG_DEV, DAT_WR_BYTE(cfg ? CONF_DVICE : 0));
00293
00294   LPC_USB->USBReEp = 0x00000003;
00295   while ((LPC_USB->USBDevIntSt & EP_RLZED_INT) == 0);
00296   LPC_USB->USBDevIntClr = EP_RLZED_INT;
00297 }
00298
00299
00300 /*
00301  *  Configure USB Endpoint according to Descriptor
00302  *    Parameters:      pEPD:  Pointer to Endpoint Descriptor
00303  *    Return Value:    None
00304  */
00305
00306 void USB_ConfigEP (USB_ENDPOINT_DESCRIPTOR *pEPD) {
00307   uint32_t num;
00308
00309   num = EPAdr(pEPD->bEndpointAddress);
00310   LPC_USB->USBReEp |= (1 << num);
00311   LPC_USB->USBEpInd = num;
00312   LPC_USB->USBMaxPSize = pEPD->wMaxPacketSize;
00313   while ((LPC_USB->USBDevIntSt & EP_RLZED_INT) == 0);
00314   LPC_USB->USBDevIntClr = EP_RLZED_INT;
00315 }
00316
00317
00318 /*
00319  *  Set Direction for USB Control Endpoint
00320  *    Parameters:      dir:   Out (dir == 0), In (dir <> 0)
00321  *    Return Value:    None
00322  */
00323
00324 void USB_DirCtrlEP (uint32_t dir) {
00325   /* Not needed */
00326 }
00327
00328
00329 /*
00330  *  Enable USB Endpoint
00331  *    Parameters:      EPNum: Endpoint Number
00332  *                       EPNum.0..3: Address
00333  *                       EPNum.7:    Dir
00334  *    Return Value:    None
00335  */
00336
00337 void USB_EnableEP (uint32_t EPNum) {
00338   WrCmdDat(CMD_SET_EP_STAT(EPAdr(EPNum)), DAT_WR_BYTE(0));
00339 }
00340
00341
00342 /*
00343  *  Disable USB Endpoint
00344  *    Parameters:      EPNum: Endpoint Number
00345  *                       EPNum.0..3: Address
00346  *                       EPNum.7:    Dir
00347  *    Return Value:    None
00348  */
00349
00350 void USB_DisableEP (uint32_t EPNum) {
00351   WrCmdDat(CMD_SET_EP_STAT(EPAdr(EPNum)), DAT_WR_BYTE(EP_STAT_DA));
00352 }
00353
00354
00355 /*
00356  *  Reset USB Endpoint
00357  *    Parameters:      EPNum: Endpoint Number
00358  *                       EPNum.0..3: Address
00359  *                       EPNum.7:    Dir
00360  *    Return Value:    None
00361  */
00362
00363 void USB_ResetEP (uint32_t EPNum) {
00364   WrCmdDat(CMD_SET_EP_STAT(EPAdr(EPNum)), DAT_WR_BYTE(0));
00365 }
00366
00367
00368 /*
00369  *  Set Stall for USB Endpoint
00370  *    Parameters:      EPNum: Endpoint Number
00371  *                       EPNum.0..3: Address
00372  *                       EPNum.7:    Dir
00373  *    Return Value:    None
00374  */
00375
00376 void USB_SetStallEP (uint32_t EPNum) {
00377   WrCmdDat(CMD_SET_EP_STAT(EPAdr(EPNum)), DAT_WR_BYTE(EP_STAT_ST));
00378 }
00379
00380
00381 /*
00382  *  Clear Stall for USB Endpoint
00383  *    Parameters:      EPNum: Endpoint Number
00384  *                       EPNum.0..3: Address
00385  *                       EPNum.7:    Dir
00386  *    Return Value:    None
00387  */
00388
00389 void USB_ClrStallEP (uint32_t EPNum) {
00390   WrCmdDat(CMD_SET_EP_STAT(EPAdr(EPNum)), DAT_WR_BYTE(0));
00391 }
00392
00393
00394 /*
00395  *  Read USB Endpoint Data
00396  *    Parameters:      EPNum: Endpoint Number
00397  *                       EPNum.0..3: Address
00398  *                       EPNum.7:    Dir
00399  *                     pData: Pointer to Data Buffer
00400  *    Return Value:    Number of bytes read
00401  */
00402
00403 uint32_t USB_ReadEP (uint32_t EPNum, uint8_t *pData) {
00404   uint32_t cnt, n;
00405
00406   LPC_USB->USBCtrl = ((EPNum & 0x0F) << 2) | CTRL_RD_EN;
00407
00408   do {
00409     cnt = LPC_USB->USBRxPLen;
00410   } while ((cnt & PKT_RDY) == 0);
00411   cnt &= PKT_LNGTH_MASK;
00412
00413   for (n = 0; n < (cnt + 3) / 4; n++) {
00414     *((__packed uint32_t *)pData) = LPC_USB->USBRxData;
00415     pData += 4;
00416   }
00417   LPC_USB->USBCtrl = 0;
00418
00419   if (((EP_MSK_ISO >> EPNum) & 1) == 0) {   /* Non-Isochronous Endpoint */
00420     WrCmd(CMD_SEL_EP(EPAdr(EPNum)));
00421     WrCmd(CMD_CLR_BUF);
00422   }
00423   return (cnt);
00424 }
00425
00426
00427 /*
00428  *  Write USB Endpoint Data
00429  *    Parameters:      EPNum: Endpoint Number
00430  *                       EPNum.0..3: Address
00431  *                       EPNum.7:    Dir
00432  *                     pData: Pointer to Data Buffer
00433  *                     cnt:   Number of bytes to write
00434  *    Return Value:    Number of bytes written
00435  */
00436
00437 uint32_t USB_WriteEP (uint32_t EPNum, uint8_t *pData, uint32_t cnt) {
00438   uint32_t n;
00439
00440   LPC_USB->USBCtrl = ((EPNum & 0x0F) << 2) | CTRL_WR_EN;
00441
00442   LPC_USB->USBTxPLen = cnt;
00443
00444   for (n = 0; n < (cnt + 3) / 4; n++) {
00445           LPC_USB->USBTxData = *((__packed uint32_t *)pData);
00446     pData += 4;
00447   }
00448   LPC_USB->USBCtrl = 0;
00449
00450   WrCmd(CMD_SEL_EP(EPAdr(EPNum)));
00451   WrCmd(CMD_VALID_BUF);
00452   return (cnt);
00453 }
00454
00455
00456 #if USB_DMA
00457
00458
00459 /* DMA Descriptor Memory Layout */
00460 const uint32_t DDAdr[2] = { DD_NISO_ADR, DD_ISO_ADR };
00461 const uint32_t DDSz [2] = { 16,          20         };
00462
00463
00464 /*
00465  *  Setup USB DMA Transfer for selected Endpoint
00466  *    Parameters:      EPNum: Endpoint Number
00467  *                     pDD: Pointer to DMA Descriptor
00468  *    Return Value:    TRUE - Success, FALSE - Error
00469  */
00470
00471 uint32_t USB_DMA_Setup(uint32_t EPNum, USB_DMA_DESCRIPTOR *pDD) {
00472   uint32_t num, ptr, nxt, iso, n;
00473   uint32_t *tmp;
00474
00475   iso = pDD->Cfg.Type.IsoEP;                /* Iso or Non-Iso Descriptor */
00476   num = EPAdr(EPNum);                       /* Endpoint's Physical Address */
00477
00478   ptr = 0;                                  /* Current Descriptor */
00479   nxt = udca[num];                          /* Initial Descriptor */
00480   while (nxt) {                             /* Go through Descriptor List */
00481     ptr = nxt;                              /* Current Descriptor */
00482     if (!pDD->Cfg.Type.Link) {              /* Check for Linked Descriptors */
00483       n = (ptr - DDAdr[iso]) / DDSz[iso];   /* Descriptor Index */
00484       DDMemMap[iso] &= ~(1 << n);           /* Unmark Memory Usage */
00485     }
00486     nxt = *((uint32_t *)ptr);                  /* Next Descriptor */
00487   }
00488
00489   for (n = 0; n < 32; n++) {                /* Search for available Memory */
00490     if ((DDMemMap[iso] & (1 << n)) == 0) {
00491       break;                                /* Memory found */
00492     }
00493   }
00494   if (n == 32) return (FALSE);              /* Memory not available */
00495
00496   DDMemMap[iso] |= 1 << n;                  /* Mark Memory Usage */
00497   nxt = DDAdr[iso] + n * DDSz[iso];         /* Next Descriptor */
00498
00499   if (ptr && pDD->Cfg.Type.Link) {
00500     *((uint32_t *)(ptr + 0))  = nxt;           /* Link in new Descriptor */
00501     *((uint32_t *)(ptr + 4)) |= 0x00000004;    /* Next DD is Valid */
00502   } else {
00503     udca[num] = nxt;                        /* Save new Descriptor */
00504     UDCA[num] = nxt;                        /* Update UDCA in USB */
00505   }
00506
00507   /* Fill in DMA Descriptor */
00508   //*(((uint32_t *)nxt)++) =  0;                 /* Next DD Pointer */
00509   tmp = (uint32_t *)nxt;
00510   *tmp++ = 0;
00511 //  *(((uint32_t *)nxt)++) =  pDD->Cfg.Type.ATLE |
00512 //                       (pDD->Cfg.Type.IsoEP << 4) |
00513 //                       (pDD->MaxSize <<  5) |
00514 //                       (pDD->BufLen  << 16);
00515   *tmp++ =  pDD->Cfg.Type.ATLE |
00516                        (pDD->Cfg.Type.IsoEP << 4) |
00517                        (pDD->MaxSize <<  5) |
00518                        (pDD->BufLen  << 16);
00519 //  *(((uint32_t *)nxt)++) =  pDD->BufAdr;
00520   *tmp++ =  pDD->BufAdr;
00521 //  *(((uint32_t *)nxt)++) =  pDD->Cfg.Type.LenPos << 8;
00522   *tmp++ =  pDD->Cfg.Type.LenPos << 8;
00523   if (iso) {
00524 //    *((uint32_t *)nxt) =  pDD->InfoAdr;
00525           *tmp =  pDD->InfoAdr;
00526   }
00527
00528   return (TRUE); /* Success */
00529 }
00530
00531
00532 /*
00533  *  Enable USB DMA Endpoint
00534  *    Parameters:      EPNum: Endpoint Number
00535  *                       EPNum.0..3: Address
00536  *                       EPNum.7:    Dir
00537  *    Return Value:    None
00538  */
00539
00540 void USB_DMA_Enable (uint32_t EPNum) {
00541         LPC_USB->USBEpDMAEn = 1 << EPAdr(EPNum);
00542 }
00543
00544
00545 /*
00546  *  Disable USB DMA Endpoint
00547  *    Parameters:      EPNum: Endpoint Number
00548  *                       EPNum.0..3: Address
00549  *                       EPNum.7:    Dir
00550  *    Return Value:    None
00551  */
00552
00553 void USB_DMA_Disable (uint32_t EPNum) {
00554         LPC_USB->USBEpDMADis = 1 << EPAdr(EPNum);
00555 }
00556
00557
00558 /*
00559  *  Get USB DMA Endpoint Status
00560  *    Parameters:      EPNum: Endpoint Number
00561  *                       EPNum.0..3: Address
00562  *                       EPNum.7:    Dir
00563  *    Return Value:    DMA Status
00564  */
00565
00566 uint32_t USB_DMA_Status (uint32_t EPNum) {
00567   uint32_t ptr, val;
00568
00569   ptr = UDCA[EPAdr(EPNum)];                 /* Current Descriptor */
00570   if (ptr == 0) return (USB_DMA_INVALID);
00571
00572   val = *((uint32_t *)(ptr + 3*4));            /* Status Information */
00573   switch ((val >> 1) & 0x0F) {
00574     case 0x00:                              /* Not serviced */
00575       return (USB_DMA_IDLE);
00576     case 0x01:                              /* Being serviced */
00577       return (USB_DMA_BUSY);
00578     case 0x02:                              /* Normal Completition */
00579       return (USB_DMA_DONE);
00580     case 0x03:                              /* Data Under Run */
00581       return (USB_DMA_UNDER_RUN);
00582     case 0x08:                              /* Data Over Run */
00583       return (USB_DMA_OVER_RUN);
00584     case 0x09:                              /* System Error */
00585       return (USB_DMA_ERROR);
00586   }
00587   return (USB_DMA_UNKNOWN);
00588 }
00589
00590
00591 /*
00592  *  Get USB DMA Endpoint Current Buffer Address
00593  *    Parameters:      EPNum: Endpoint Number
00594  *                       EPNum.0..3: Address
00595  *                       EPNum.7:    Dir
00596  *    Return Value:    DMA Address (or -1 when DMA is Invalid)
00597  */
00598
00599 uint32_t USB_DMA_BufAdr (uint32_t EPNum) {
00600   uint32_t ptr, val;
00601
00602   ptr = UDCA[EPAdr(EPNum)];                 /* Current Descriptor */
00603   if (ptr == 0)
00604   {
00605         return ((uint32_t)(-1));                /* DMA Invalid */
00606   }
00607
00608   val = *((uint32_t *)(ptr + 2*4));         /* Buffer Address */
00609   return (val);                             /* Current Address */
00610 }
00611
00612
00613 /*
00614  *  Get USB DMA Endpoint Current Buffer Count
00615  *   Number of transfered Bytes or Iso Packets
00616  *    Parameters:      EPNum: Endpoint Number
00617  *                       EPNum.0..3: Address
00618  *                       EPNum.7:    Dir
00619  *    Return Value:    DMA Count (or -1 when DMA is Invalid)
00620  */
00621
00622 uint32_t USB_DMA_BufCnt (uint32_t EPNum) {
00623   uint32_t ptr, val;
00624
00625   ptr = UDCA[EPAdr(EPNum)];                 /* Current Descriptor */
00626   if (ptr == 0)
00627   {
00628         return ((uint32_t)(-1));                /* DMA Invalid */
00629   }
00630   val = *((uint32_t *)(ptr + 3*4));         /* Status Information */
00631   return (val >> 16);                       /* Current Count */
00632 }
00633
00634
00635 #endif /* USB_DMA */
00636
00637
00638 /*
00639  *  Get USB Last Frame Number
00640  *    Parameters:      None
00641  *    Return Value:    Frame Number
00642  */
00643
00644 uint32_t USB_GetFrame (void) {
00645   uint32_t val;
00646
00647   WrCmd(CMD_RD_FRAME);
00648   val = RdCmdDat(DAT_RD_FRAME);
00649   val = val | (RdCmdDat(DAT_RD_FRAME) << 8);
00650   return (val);
00651 }
00652
00653
00654 /*
00655  *  USB Interrupt Service Routine
00656  */
00657
00658 void USB_IRQHandler (void) {
00659   uint32_t disr, val, n, m;
00660
00661   disr = LPC_USB->USBDevIntSt;                      /* Device Interrupt Status */
00662   LPC_USB->USBDevIntClr = disr;
00663
00664   /* Device Status Interrupt (Reset, Connect change, Suspend/Resume) */
00665   if (disr & DEV_STAT_INT) {
00666     WrCmd(CMD_GET_DEV_STAT);
00667     val = RdCmdDat(DAT_GET_DEV_STAT);       /* Device Status */
00668     if (val & DEV_RST) {                    /* Reset */
00669       USB_Reset();
00670 #if   USB_RESET_EVENT
00671       USB_Reset_Event();
00672 #endif
00673     }
00674     if (val & DEV_CON_CH) {                 /* Connect change */
00675 #if   USB_POWER_EVENT
00676       USB_Power_Event(val & DEV_CON);
00677 #endif
00678     }
00679     if (val & DEV_SUS_CH) {                 /* Suspend/Resume */
00680       if (val & DEV_SUS) {                  /* Suspend */
00681         USB_Suspend();
00682 #if     USB_SUSPEND_EVENT
00683         USB_Suspend_Event();
00684 #endif
00685       } else {                              /* Resume */
00686         USB_Resume();
00687 #if     USB_RESUME_EVENT
00688         USB_Resume_Event();
00689 #endif
00690       }
00691     }
00692     goto isr_end;
00693   }
00694
00695 #if USB_SOF_EVENT
00696   /* Start of Frame Interrupt */
00697   if (disr & FRAME_INT) {
00698     USB_SOF_Event();
00699   }
00700 #endif
00701
00702 #if USB_ERROR_EVENT
00703   /* Error Interrupt */
00704   if (disr & ERR_INT) {
00705     WrCmd(CMD_RD_ERR_STAT);
00706     val = RdCmdDat(DAT_RD_ERR_STAT);
00707     USB_Error_Event(val);
00708   }
00709 #endif
00710
00711   /* Endpoint's Slow Interrupt */
00712   if (disr & EP_SLOW_INT) {
00713     while (LPC_USB->USBEpIntSt) {                   /* Endpoint Interrupt Status */
00714
00715       for (n = 0; n < USB_EP_NUM; n++) {    /* Check All Endpoints */
00716         if (LPC_USB->USBEpIntSt & (1 << n)) {
00717           m = n >> 1;
00718           LPC_USB->USBEpIntClr = 1 << n;
00719           while ((LPC_USB->USBDevIntSt & CDFULL_INT) == 0);
00720           val = LPC_USB->USBCmdData;
00721
00722           if ((n & 1) == 0) {               /* OUT Endpoint */
00723             if (n == 0) {                   /* Control OUT Endpoint */
00724               if (val & EP_SEL_STP) {       /* Setup Packet */
00725                 if (USB_P_EP[0]) {
00726                   USB_P_EP[0](USB_EVT_SETUP);
00727                   continue;
00728                 }
00729               }
00730             }
00731             if (USB_P_EP[m]) {
00732               USB_P_EP[m](USB_EVT_OUT);
00733             }
00734           } else {                          /* IN Endpoint */
00735                         //if (USB_P_EP[m]) {
00736               //USB_P_EP[m](USB_EVT_IN);
00737                           if(m==0)
00738                             USB_EndPoint0(USB_EVT_IN);
00739                           if(m==1)
00740                                 USB_EndPoint1(USB_EVT_IN);
00741                           if(m==2)
00742                                 USB_EndPoint2(USB_EVT_IN);
00743                           /* ............. */
00744             //}
00745           }
00746         }
00747       }
00748     }
00749   }
00750
00751 #if USB_DMA
00752   if (LPC_USB->USBDMAIntSt & 0x00000001) {          /* End of Transfer Interrupt */
00753     val = LPC_USB->USBEoTIntSt;
00754     for (n = 2; n < USB_EP_NUM; n++) {      /* Check All Endpoints */
00755       if (val & (1 << n)) {
00756         m = n >> 1;
00757         if ((n & 1) == 0) {                 /* OUT Endpoint */
00758           if (USB_P_EP[m]) {
00759             USB_P_EP[m](USB_EVT_OUT_DMA_EOT);
00760           }
00761         } else {                            /* IN Endpoint */
00762           if (USB_P_EP[m]) {
00763             USB_P_EP[m](USB_EVT_IN_DMA_EOT);
00764           }
00765         }
00766       }
00767     }
00768     LPC_USB->USBEoTIntClr = val;
00769   }
00770
00771   if (LPC_USB->USBDMAIntSt & 0x00000002) {          /* New DD Request Interrupt */
00772     val = LPC_USB->USBNDDRIntSt;
00773     for (n = 2; n < USB_EP_NUM; n++) {      /* Check All Endpoints */
00774       if (val & (1 << n)) {
00775         m = n >> 1;
00776         if ((n & 1) == 0) {                 /* OUT Endpoint */
00777           if (USB_P_EP[m]) {
00778             USB_P_EP[m](USB_EVT_OUT_DMA_NDR);
00779           }
00780         } else {                            /* IN Endpoint */
00781           if (USB_P_EP[m]) {
00782             USB_P_EP[m](USB_EVT_IN_DMA_NDR);
00783           }
00784         }
00785       }
00786     }
00787     LPC_USB->USBNDDRIntClr = val;
00788   }
00789
00790   if (LPC_USB->USBDMAIntSt & 0x00000004) {          /* System Error Interrupt */
00791     val = LPC_USB->USBSysErrIntSt;
00792     for (n = 2; n < USB_EP_NUM; n++) {      /* Check All Endpoints */
00793       if (val & (1 << n)) {
00794         m = n >> 1;
00795         if ((n & 1) == 0) {                 /* OUT Endpoint */
00796           if (USB_P_EP[m]) {
00797             USB_P_EP[m](USB_EVT_OUT_DMA_ERR);
00798           }
00799         } else {                            /* IN Endpoint */
00800           if (USB_P_EP[m]) {
00801             USB_P_EP[m](USB_EVT_IN_DMA_ERR);
00802           }
00803         }
00804       }
00805     }
00806     LPC_USB->USBSysErrIntClr = val;
00807   }
00808 #endif /* USB_DMA */
00809
00810 isr_end:
00811   return;
00812 }
Generated on Tue Jun 7 14:59:04 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBHID/usbhw.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBHID/usbhw.h

Go to the documentation of this file.
00001 /*----------------------------------------------------------------------------
00002  *      U S B  -  K e r n e l
00003  *----------------------------------------------------------------------------
00004  *      Name:    USBHW.H
00005  *      Purpose: USB Hardware Layer Definitions
00006  *      Version: V1.10
00007  *----------------------------------------------------------------------------
00008  *      This software is supplied "AS IS" without any warranties, express,
00009  *      implied or statutory, including but not limited to the implied
00010  *      warranties of fitness for purpose, satisfactory quality and
00011  *      noninfringement. Keil extends you a royalty-free right to reproduce
00012  *      and distribute executable files created using this software for use
00013  *      on NXP Semiconductors LPC family microcontroller devices only. Nothing
00014  *      else gives you the right to use this software.
00015  *
00016  *      Copyright (c) 2005-2009 Keil Software.
00017  *---------------------------------------------------------------------------*/
00018
00019 #ifndef __USBHW_H__
00020 #define __USBHW_H__
00021
00022
00023 /* USB RAM Definitions */
00024 #define USB_RAM_ADR     0x20080000  /* USB RAM Start Address */
00025 #define USB_RAM_SZ      0x00004000  /* USB RAM Size (4kB) */
00026
00027 /* DMA Endpoint Descriptors */
00028 #define DD_NISO_CNT             16  /* Non-Iso EP DMA Descr. Count (max. 32) */
00029 #define DD_ISO_CNT               8  /* Iso EP DMA Descriptor Count (max. 32) */
00030 #define DD_NISO_SZ    (DD_NISO_CNT * 16)    /* Non-Iso DMA Descr. Size */
00031 #define DD_ISO_SZ     (DD_ISO_CNT  * 20)    /* Iso DMA Descriptor Size */
00032 #define DD_NISO_ADR   (USB_RAM_ADR + 128)   /* Non-Iso DMA Descr. Address */
00033 #define DD_ISO_ADR    (DD_NISO_ADR + DD_NISO_SZ) /* Iso DMA Descr. Address */
00034 #define DD_SZ                 (128 + DD_NISO_SZ + DD_ISO_SZ) /* Descr. Size */
00035
00036 /* DMA Buffer Memory Definitions */
00037 #define DMA_BUF_ADR   (USB_RAM_ADR + DD_SZ) /* DMA Buffer Start Address */
00038 #define DMA_BUF_SZ    (USB_RAM_SZ  - DD_SZ) /* DMA Buffer Size */
00039
00040 /* USB Error Codes */
00041 #define USB_ERR_PID         0x0001  /* PID Error */
00042 #define USB_ERR_UEPKT       0x0002  /* Unexpected Packet */
00043 #define USB_ERR_DCRC        0x0004  /* Data CRC Error */
00044 #define USB_ERR_TIMOUT      0x0008  /* Bus Time-out Error */
00045 #define USB_ERR_EOP         0x0010  /* End of Packet Error */
00046 #define USB_ERR_B_OVRN      0x0020  /* Buffer Overrun */
00047 #define USB_ERR_BTSTF       0x0040  /* Bit Stuff Error */
00048 #define USB_ERR_TGL         0x0080  /* Toggle Bit Error */
00049
00050 /* USB DMA Status Codes */
00051 #define USB_DMA_INVALID     0x0000  /* DMA Invalid - Not Configured */
00052 #define USB_DMA_IDLE        0x0001  /* DMA Idle - Waiting for Trigger */
00053 #define USB_DMA_BUSY        0x0002  /* DMA Busy - Transfer in progress */
00054 #define USB_DMA_DONE        0x0003  /* DMA Transfer Done (no Errors)*/
00055 #define USB_DMA_OVER_RUN    0x0004  /* Data Over Run */
00056 #define USB_DMA_UNDER_RUN   0x0005  /* Data Under Run (Short Packet) */
00057 #define USB_DMA_ERROR       0x0006  /* Error */
00058 #define USB_DMA_UNKNOWN     0xFFFF  /* Unknown State */
00059
00060 /* USB DMA Descriptor */
00061 typedef struct _USB_DMA_DESCRIPTOR {
00062   uint32_t BufAdr;                     /* DMA Buffer Address */
00063   uint16_t  BufLen;                     /* DMA Buffer Length */
00064   uint16_t  MaxSize;                    /* Maximum Packet Size */
00065   uint32_t InfoAdr;                    /* Packet Info Memory Address */
00066   union {                           /* DMA Configuration */
00067     struct {
00068       uint32_t Link   : 1;             /* Link to existing Descriptors */
00069       uint32_t IsoEP  : 1;             /* Isonchronous Endpoint */
00070       uint32_t ATLE   : 1;             /* ATLE (Auto Transfer Length Extract) */
00071       uint32_t Rsrvd  : 5;             /* Reserved */
00072       uint32_t LenPos : 8;             /* Length Position (ATLE) */
00073     } Type;
00074     uint32_t Val;
00075   } Cfg;
00076 } USB_DMA_DESCRIPTOR;
00077
00078 /* USB Hardware Functions */
00079 extern void  USB_Init       (void);
00080 extern void  USB_Connect    (uint32_t  con);
00081 extern void  USB_Reset      (void);
00082 extern void  USB_Suspend    (void);
00083 extern void  USB_Resume     (void);
00084 extern void  USB_WakeUp     (void);
00085 extern void  USB_WakeUpCfg  (uint32_t  cfg);
00086 extern void  USB_SetAddress (uint32_t adr);
00087 extern void  USB_Configure  (uint32_t  cfg);
00088 extern void  USB_ConfigEP   (USB_ENDPOINT_DESCRIPTOR *pEPD);
00089 extern void  USB_DirCtrlEP  (uint32_t dir);
00090 extern void  USB_EnableEP   (uint32_t EPNum);
00091 extern void  USB_DisableEP  (uint32_t EPNum);
00092 extern void  USB_ResetEP    (uint32_t EPNum);
00093 extern void  USB_SetStallEP (uint32_t EPNum);
00094 extern void  USB_ClrStallEP (uint32_t EPNum);
00095 extern uint32_t USB_ReadEP     (uint32_t EPNum, uint8_t *pData);
00096 extern uint32_t USB_WriteEP    (uint32_t EPNum, uint8_t *pData, uint32_t cnt);
00097 extern uint32_t  USB_DMA_Setup  (uint32_t EPNum, USB_DMA_DESCRIPTOR *pDD);
00098 extern void  USB_DMA_Enable (uint32_t EPNum);
00099 extern void  USB_DMA_Disable(uint32_t EPNum);
00100 extern uint32_t USB_DMA_Status (uint32_t EPNum);
00101 extern uint32_t USB_DMA_BufAdr (uint32_t EPNum);
00102 extern uint32_t USB_DMA_BufCnt (uint32_t EPNum);
00103 extern uint32_t USB_GetFrame   (void);
00104 extern void  USB_IRQHandler(void);
00105
00106
00107 #endif  /* __USBHW_H__ */
Generated on Tue Jun 7 14:59:04 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBHID/usbreg.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBHID/usbreg.h

Go to the documentation of this file.
00001 /*----------------------------------------------------------------------------
00002  *      U S B  -  K e r n e l
00003  *----------------------------------------------------------------------------
00004  *      Name:    USBREG.H
00005  *      Purpose: USB Hardware Layer Definitions for NXP Semiconductors LPC
00006  *      family MCUs
00007  *      Version: V1.10
00008  *----------------------------------------------------------------------------
00009  *      This software is supplied "AS IS" without any warranties, express,
00010  *      implied or statutory, including but not limited to the implied
00011  *      warranties of fitness for purpose, satisfactory quality and
00012  *      noninfringement. Keil extends you a royalty-free right to reproduce
00013  *      and distribute executable files created using this software for use
00014  *      on NXP Semiconductors LPC family microcontroller devices only. Nothing
00015  *      else gives you the right to use this software.
00016  *
00017  *      Copyright (c) 2005-2009 Keil Software.
00018  *---------------------------------------------------------------------------*/
00019
00020 #ifndef __USBREG_H
00021 #define __USBREG_H
00022
00023 /* Device Interrupt Bit Definitions */
00024 #define FRAME_INT           0x00000001
00025 #define EP_FAST_INT         0x00000002
00026 #define EP_SLOW_INT         0x00000004
00027 #define DEV_STAT_INT        0x00000008
00028 #define CCEMTY_INT          0x00000010
00029 #define CDFULL_INT          0x00000020
00030 #define RxENDPKT_INT        0x00000040
00031 #define TxENDPKT_INT        0x00000080
00032 #define EP_RLZED_INT        0x00000100
00033 #define ERR_INT             0x00000200
00034
00035 /* Rx & Tx Packet Length Definitions */
00036 #define PKT_LNGTH_MASK      0x000003FF
00037 #define PKT_DV              0x00000400
00038 #define PKT_RDY             0x00000800
00039
00040 /* USB Control Definitions */
00041 #define CTRL_RD_EN          0x00000001
00042 #define CTRL_WR_EN          0x00000002
00043
00044 /* Command Codes */
00045 #define CMD_SET_ADDR        0x00D00500
00046 #define CMD_CFG_DEV         0x00D80500
00047 #define CMD_SET_MODE        0x00F30500
00048 #define CMD_RD_FRAME        0x00F50500
00049 #define DAT_RD_FRAME        0x00F50200
00050 #define CMD_RD_TEST         0x00FD0500
00051 #define DAT_RD_TEST         0x00FD0200
00052 #define CMD_SET_DEV_STAT    0x00FE0500
00053 #define CMD_GET_DEV_STAT    0x00FE0500
00054 #define DAT_GET_DEV_STAT    0x00FE0200
00055 #define CMD_GET_ERR_CODE    0x00FF0500
00056 #define DAT_GET_ERR_CODE    0x00FF0200
00057 #define CMD_RD_ERR_STAT     0x00FB0500
00058 #define DAT_RD_ERR_STAT     0x00FB0200
00059 #define DAT_WR_BYTE(x)     (0x00000100 | ((x) << 16))
00060 #define CMD_SEL_EP(x)      (0x00000500 | ((x) << 16))
00061 #define DAT_SEL_EP(x)      (0x00000200 | ((x) << 16))
00062 #define CMD_SEL_EP_CLRI(x) (0x00400500 | ((x) << 16))
00063 #define DAT_SEL_EP_CLRI(x) (0x00400200 | ((x) << 16))
00064 #define CMD_SET_EP_STAT(x) (0x00400500 | ((x) << 16))
00065 #define CMD_CLR_BUF         0x00F20500
00066 #define DAT_CLR_BUF         0x00F20200
00067 #define CMD_VALID_BUF       0x00FA0500
00068
00069 /* Device Address Register Definitions */
00070 #define DEV_ADDR_MASK       0x7F
00071 #define DEV_EN              0x80
00072
00073 /* Device Configure Register Definitions */
00074 #define CONF_DVICE          0x01
00075
00076 /* Device Mode Register Definitions */
00077 #define AP_CLK              0x01
00078 #define INAK_CI             0x02
00079 #define INAK_CO             0x04
00080 #define INAK_II             0x08
00081 #define INAK_IO             0x10
00082 #define INAK_BI             0x20
00083 #define INAK_BO             0x40
00084
00085 /* Device Status Register Definitions */
00086 #define DEV_CON             0x01
00087 #define DEV_CON_CH          0x02
00088 #define DEV_SUS             0x04
00089 #define DEV_SUS_CH          0x08
00090 #define DEV_RST             0x10
00091
00092 /* Error Code Register Definitions */
00093 #define ERR_EC_MASK         0x0F
00094 #define ERR_EA              0x10
00095
00096 /* Error Status Register Definitions */
00097 #define ERR_PID             0x01
00098 #define ERR_UEPKT           0x02
00099 #define ERR_DCRC            0x04
00100 #define ERR_TIMOUT          0x08
00101 #define ERR_EOP             0x10
00102 #define ERR_B_OVRN          0x20
00103 #define ERR_BTSTF           0x40
00104 #define ERR_TGL             0x80
00105
00106 /* Endpoint Select Register Definitions */
00107 #define EP_SEL_F            0x01
00108 #define EP_SEL_ST           0x02
00109 #define EP_SEL_STP          0x04
00110 #define EP_SEL_PO           0x08
00111 #define EP_SEL_EPN          0x10
00112 #define EP_SEL_B_1_FULL     0x20
00113 #define EP_SEL_B_2_FULL     0x40
00114
00115 /* Endpoint Status Register Definitions */
00116 #define EP_STAT_ST          0x01
00117 #define EP_STAT_DA          0x20
00118 #define EP_STAT_RF_MO       0x40
00119 #define EP_STAT_CND_ST      0x80
00120
00121 /* Clear Buffer Register Definitions */
00122 #define CLR_BUF_PO          0x01
00123
00124
00125 /* DMA Interrupt Bit Definitions */
00126 #define EOT_INT             0x01
00127 #define NDD_REQ_INT         0x02
00128 #define SYS_ERR_INT         0x04
00129
00130
00131 #endif  /* __USBREG_H */
Generated on Tue Jun 7 14:59:05 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBHID/usbuser.c Source File

C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBHID/usbuser.c

Go to the documentation of this file.
00001 /*----------------------------------------------------------------------------
00002  *      U S B  -  K e r n e l
00003  *----------------------------------------------------------------------------
00004  *      Name:    USBUSER.C
00005  *      Purpose: USB Custom User Module
00006  *      Version: V1.10
00007  *----------------------------------------------------------------------------
00008  *      This software is supplied "AS IS" without any warranties, express,
00009  *      implied or statutory, including but not limited to the implied
00010  *      warranties of fitness for purpose, satisfactory quality and
00011  *      noninfringement. Keil extends you a royalty-free right to reproduce
00012  *      and distribute executable files created using this software for use
00013  *      on NXP Semiconductors LPC family microcontroller devices only. Nothing
00014  *      else gives you the right to use this software.
00015  *
00016  *      Copyright (c) 2005-2009 Keil Software.
00017  *---------------------------------------------------------------------------*/
00018
00019 #include "LPC17xx.h"
00020 #include "lpc_types.h"
00021
00022 #include "usb.h"
00023 #include "usbcfg.h"
00024 #include "usbhw.h"
00025 #include "usbcore.h"
00026 #include "usbuser.h"
00027
00028 #include "demo.h"
00029
00030
00031 /*
00032  *  USB Power Event Callback
00033  *   Called automatically on USB Power Event
00034  *    Parameter:       power: On(TRUE)/Off(FALSE)
00035  */
00036
00037 #if USB_POWER_EVENT
00038 void USB_Power_Event (uint32_t  power) {
00039 }
00040 #endif
00041
00042
00043 /*
00044  *  USB Reset Event Callback
00045  *   Called automatically on USB Reset Event
00046  */
00047
00048 #if USB_RESET_EVENT
00049 void USB_Reset_Event (void) {
00050   USB_ResetCore();
00051 }
00052 #endif
00053
00054
00055 /*
00056  *  USB Suspend Event Callback
00057  *   Called automatically on USB Suspend Event
00058  */
00059
00060 #if USB_SUSPEND_EVENT
00061 void USB_Suspend_Event (void) {
00062 }
00063 #endif
00064
00065
00066 /*
00067  *  USB Resume Event Callback
00068  *   Called automatically on USB Resume Event
00069  */
00070
00071 #if USB_RESUME_EVENT
00072 void USB_Resume_Event (void) {
00073 }
00074 #endif
00075
00076
00077 /*
00078  *  USB Remote Wakeup Event Callback
00079  *   Called automatically on USB Remote Wakeup Event
00080  */
00081
00082 #if USB_WAKEUP_EVENT
00083 void USB_WakeUp_Event (void) {
00084 }
00085 #endif
00086
00087
00088 /*
00089  *  USB Start of Frame Event Callback
00090  *   Called automatically on USB Start of Frame Event
00091  */
00092
00093 #if USB_SOF_EVENT
00094 void USB_SOF_Event (void) {
00095 }
00096 #endif
00097
00098
00099 /*
00100  *  USB Error Event Callback
00101  *   Called automatically on USB Error Event
00102  *    Parameter:       error: Error Code
00103  */
00104
00105 #if USB_ERROR_EVENT
00106 void USB_Error_Event (uint32_t error) {
00107 }
00108 #endif
00109
00110
00111 /*
00112  *  USB Set Configuration Event Callback
00113  *   Called automatically on USB Set Configuration Request
00114  */
00115
00116 #if USB_CONFIGURE_EVENT
00117 void USB_Configure_Event (void) {
00118
00119   if (USB_Configuration) {                  /* Check if USB is configured */
00120     GetInReport();
00121     USB_WriteEP(0x81, &InReport, sizeof(InReport));
00122   }
00123 }
00124 #endif
00125
00126
00127 /*
00128  *  USB Set Interface Event Callback
00129  *   Called automatically on USB Set Interface Request
00130  */
00131
00132 #if USB_INTERFACE_EVENT
00133 void USB_Interface_Event (void) {
00134 }
00135 #endif
00136
00137
00138 /*
00139  *  USB Set/Clear Feature Event Callback
00140  *   Called automatically on USB Set/Clear Feature Request
00141  */
00142
00143 #if USB_FEATURE_EVENT
00144 void USB_Feature_Event (void) {
00145 }
00146 #endif
00147
00148
00149 #define P_EP(n) ((USB_EP_EVENT & (1 << (n))) ? USB_EndPoint##n : NULL)
00150
00151 /* USB Endpoint Events Callback Pointers */
00152 void (* const USB_P_EP[16]) (uint32_t event) = {
00153   P_EP(0),
00154   P_EP(1),
00155   P_EP(2),
00156   P_EP(3),
00157   P_EP(4),
00158   P_EP(5),
00159   P_EP(6),
00160   P_EP(7),
00161   P_EP(8),
00162   P_EP(9),
00163   P_EP(10),
00164   P_EP(11),
00165   P_EP(12),
00166   P_EP(13),
00167   P_EP(14),
00168   P_EP(15),
00169 };
00170
00171
00172 /*
00173  *  USB Endpoint 1 Event Callback
00174  *   Called automatically on USB Endpoint 1 Event
00175  *    Parameter:       event
00176  */
00177
00178 void USB_EndPoint1 (uint32_t event) {
00179
00180   switch (event) {
00181     case USB_EVT_IN:
00182       GetInReport();
00183       USB_WriteEP(0x81, &InReport, sizeof(InReport));
00184       break;
00185   }
00186 }
00187
00188
00189 /*
00190  *  USB Endpoint 2 Event Callback
00191  *   Called automatically on USB Endpoint 2 Event
00192  *    Parameter:       event
00193  */
00194
00195 void USB_EndPoint2 (uint32_t event) {
00196   switch (event) {
00197     case USB_EVT_IN:
00198       GetInReport();
00199       USB_WriteEP(0x82, &InReport, sizeof(InReport));
00200       break;
00201   }
00202 }
00203
00204
00205 /*
00206  *  USB Endpoint 3 Event Callback
00207  *   Called automatically on USB Endpoint 3 Event
00208  *    Parameter:       event
00209  */
00210
00211 void USB_EndPoint3 (uint32_t event) {
00212   switch (event) {
00213     case USB_EVT_IN:
00214       GetInReport();
00215       USB_WriteEP(0x83, &InReport, sizeof(InReport));
00216       break;
00217   }
00218 }
00219
00220
00221 /*
00222  *  USB Endpoint 4 Event Callback
00223  *   Called automatically on USB Endpoint 4 Event
00224  *    Parameter:       event
00225  */
00226
00227 void USB_EndPoint4 (uint32_t event) {
00228 }
00229
00230
00231 /*
00232  *  USB Endpoint 5 Event Callback
00233  *   Called automatically on USB Endpoint 5 Event
00234  *    Parameter:       event
00235  */
00236
00237 void USB_EndPoint5 (uint32_t event) {
00238 }
00239
00240
00241 /*
00242  *  USB Endpoint 6 Event Callback
00243  *   Called automatically on USB Endpoint 6 Event
00244  *    Parameter:       event
00245  */
00246
00247 void USB_EndPoint6 (uint32_t event) {
00248 }
00249
00250
00251 /*
00252  *  USB Endpoint 7 Event Callback
00253  *   Called automatically on USB Endpoint 7 Event
00254  *    Parameter:       event
00255  */
00256
00257 void USB_EndPoint7 (uint32_t event) {
00258 }
00259
00260
00261 /*
00262  *  USB Endpoint 8 Event Callback
00263  *   Called automatically on USB Endpoint 8 Event
00264  *    Parameter:       event
00265  */
00266
00267 void USB_EndPoint8 (uint32_t event) {
00268 }
00269
00270
00271 /*
00272  *  USB Endpoint 9 Event Callback
00273  *   Called automatically on USB Endpoint 9 Event
00274  *    Parameter:       event
00275  */
00276
00277 void USB_EndPoint9 (uint32_t event) {
00278 }
00279
00280
00281 /*
00282  *  USB Endpoint 10 Event Callback
00283  *   Called automatically on USB Endpoint 10 Event
00284  *    Parameter:       event
00285  */
00286
00287 void USB_EndPoint10 (uint32_t event) {
00288 }
00289
00290
00291 /*
00292  *  USB Endpoint 11 Event Callback
00293  *   Called automatically on USB Endpoint 11 Event
00294  *    Parameter:       event
00295  */
00296
00297 void USB_EndPoint11 (uint32_t event) {
00298 }
00299
00300
00301 /*
00302  *  USB Endpoint 12 Event Callback
00303  *   Called automatically on USB Endpoint 12 Event
00304  *    Parameter:       event
00305  */
00306
00307 void USB_EndPoint12 (uint32_t event) {
00308 }
00309
00310
00311 /*
00312  *  USB Endpoint 13 Event Callback
00313  *   Called automatically on USB Endpoint 13 Event
00314  *    Parameter:       event
00315  */
00316
00317 void USB_EndPoint13 (uint32_t event) {
00318 }
00319
00320
00321 /*
00322  *  USB Endpoint 14 Event Callback
00323  *   Called automatically on USB Endpoint 14 Event
00324  *    Parameter:       event
00325  */
00326
00327 void USB_EndPoint14 (uint32_t event) {
00328 }
00329
00330
00331 /*
00332  *  USB Endpoint 15 Event Callback
00333  *   Called automatically on USB Endpoint 15 Event
00334  *    Parameter:       event
00335  */
00336
00337 void USB_EndPoint15 (uint32_t event) {
00338 }
Generated on Tue Jun 7 14:59:05 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBHID/usbuser.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBHID/usbuser.h

Go to the documentation of this file.
00001 /*----------------------------------------------------------------------------
00002  *      U S B  -  K e r n e l
00003  *----------------------------------------------------------------------------
00004  *      Name:    USBUSER.H
00005  *      Purpose: USB Custom User Definitions
00006  *      Version: V1.10
00007  *----------------------------------------------------------------------------
00008  *      This software is supplied "AS IS" without any warranties, express,
00009  *      implied or statutory, including but not limited to the implied
00010  *      warranties of fitness for purpose, satisfactory quality and
00011  *      noninfringement. Keil extends you a royalty-free right to reproduce
00012  *      and distribute executable files created using this software for use
00013  *      on NXP Semiconductors LPC family microcontroller devices only. Nothing
00014  *      else gives you the right to use this software.
00015  *
00016  *      Copyright (c) 2005-2009 Keil Software.
00017  *---------------------------------------------------------------------------*/
00018
00019 #ifndef __USBUSER_H__
00020 #define __USBUSER_H__
00021
00022
00023 /* USB Device Events Callback Functions */
00024 extern void USB_Power_Event     (uint32_t  power);
00025 extern void USB_Reset_Event     (void);
00026 extern void USB_Suspend_Event   (void);
00027 extern void USB_Resume_Event    (void);
00028 extern void USB_WakeUp_Event    (void);
00029 extern void USB_SOF_Event       (void);
00030 extern void USB_Error_Event     (uint32_t error);
00031
00032 /* USB Endpoint Callback Events */
00033 #define USB_EVT_SETUP       1   /* Setup Packet */
00034 #define USB_EVT_OUT         2   /* OUT Packet */
00035 #define USB_EVT_IN          3   /*  IN Packet */
00036 #define USB_EVT_OUT_NAK     4   /* OUT Packet - Not Acknowledged */
00037 #define USB_EVT_IN_NAK      5   /*  IN Packet - Not Acknowledged */
00038 #define USB_EVT_OUT_STALL   6   /* OUT Packet - Stalled */
00039 #define USB_EVT_IN_STALL    7   /*  IN Packet - Stalled */
00040 #define USB_EVT_OUT_DMA_EOT 8   /* DMA OUT EP - End of Transfer */
00041 #define USB_EVT_IN_DMA_EOT  9   /* DMA  IN EP - End of Transfer */
00042 #define USB_EVT_OUT_DMA_NDR 10  /* DMA OUT EP - New Descriptor Request */
00043 #define USB_EVT_IN_DMA_NDR  11  /* DMA  IN EP - New Descriptor Request */
00044 #define USB_EVT_OUT_DMA_ERR 12  /* DMA OUT EP - Error */
00045 #define USB_EVT_IN_DMA_ERR  13  /* DMA  IN EP - Error */
00046
00047 /* USB Endpoint Events Callback Pointers */
00048 extern void (* const USB_P_EP[16])(uint32_t event);
00049
00050 /* USB Endpoint Events Callback Functions */
00051 extern void USB_EndPoint0  (uint32_t event);
00052 extern void USB_EndPoint1  (uint32_t event);
00053 extern void USB_EndPoint2  (uint32_t event);
00054 extern void USB_EndPoint3  (uint32_t event);
00055 extern void USB_EndPoint4  (uint32_t event);
00056 extern void USB_EndPoint5  (uint32_t event);
00057 extern void USB_EndPoint6  (uint32_t event);
00058 extern void USB_EndPoint7  (uint32_t event);
00059 extern void USB_EndPoint8  (uint32_t event);
00060 extern void USB_EndPoint9  (uint32_t event);
00061 extern void USB_EndPoint10 (uint32_t event);
00062 extern void USB_EndPoint11 (uint32_t event);
00063 extern void USB_EndPoint12 (uint32_t event);
00064 extern void USB_EndPoint13 (uint32_t event);
00065 extern void USB_EndPoint14 (uint32_t event);
00066 extern void USB_EndPoint15 (uint32_t event);
00067
00068 /* USB Core Events Callback Functions */
00069 extern void USB_Configure_Event (void);
00070 extern void USB_Interface_Event (void);
00071 extern void USB_Feature_Event   (void);
00072
00073
00074 #endif  /* __USBUSER_H__ */
Generated on Tue Jun 7 14:59:05 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBMassStorage/usb.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBMassStorage/usb.h

Go to the documentation of this file.
00001 /*----------------------------------------------------------------------------
00002  *      U S B  -  K e r n e l
00003  *----------------------------------------------------------------------------
00004  *      Name:    USB.H
00005  *      Purpose: USB Definitions
00006  *      Version: V1.10
00007  *----------------------------------------------------------------------------
00008  *      This software is supplied "AS IS" without any warranties, express,
00009  *      implied or statutory, including but not limited to the implied
00010  *      warranties of fitness for purpose, satisfactory quality and
00011  *      noninfringement. Keil extends you a royalty-free right to reproduce
00012  *      and distribute executable files created using this software for use
00013  *      on NXP Semiconductors LPC family microcontroller devices only. Nothing
00014  *      else gives you the right to use this software.
00015  *
00016  *      Copyright (c) 2005-2009 Keil Software.
00017  *---------------------------------------------------------------------------*/
00018
00019 #ifndef __USB_H__
00020 #define __USB_H__
00021
00022
00023 #if defined   (  __GNUC__  )
00024 #define __packed __attribute__((__packed__))
00025 #endif
00026
00027
00028 #if defined     (  __CC_ARM  )
00029 typedef __packed union {
00030 #elif defined   (  __GNUC__  )
00031 typedef union __packed {
00032 #elif defined   (  __IAR_SYSTEMS_ICC__  )
00033 typedef __packed union {
00034 #endif
00035   uint16_t W;
00036 #if defined     (  __CC_ARM  )
00037   __packed struct {
00038 #elif defined   (  __GNUC__  )
00039   struct __packed {
00040 #elif defined   (  __IAR_SYSTEMS_ICC__  )
00041   __packed struct {
00042 #endif
00043     uint8_t L;
00044     uint8_t H;
00045   } WB;
00046 } WORD_BYTE;
00047
00048
00049 /* bmRequestType.Dir */
00050 #define REQUEST_HOST_TO_DEVICE     0
00051 #define REQUEST_DEVICE_TO_HOST     1
00052
00053 /* bmRequestType.Type */
00054 #define REQUEST_STANDARD           0
00055 #define REQUEST_CLASS              1
00056 #define REQUEST_VENDOR             2
00057 #define REQUEST_RESERVED           3
00058
00059 /* bmRequestType.Recipient */
00060 #define REQUEST_TO_DEVICE          0
00061 #define REQUEST_TO_INTERFACE       1
00062 #define REQUEST_TO_ENDPOINT        2
00063 #define REQUEST_TO_OTHER           3
00064
00065 /* bmRequestType Definition */
00066 #if defined     (  __CC_ARM  )
00067 typedef __packed union _REQUEST_TYPE {
00068 #elif defined   (  __GNUC__  )
00069 typedef union __packed _REQUEST_TYPE {
00070 #elif defined   (  __IAR_SYSTEMS_ICC__  )
00071 typedef __packed union _REQUEST_TYPE {
00072 #endif
00073 #if defined     (  __CC_ARM  )
00074         __packed struct _BM {
00075 #elif defined   (  __GNUC__  )
00076         struct __packed _BM {
00077 #elif defined   (  __IAR_SYSTEMS_ICC__  )
00078         __packed struct _BM {
00079 #endif
00080     uint8_t Recipient : 5;
00081     uint8_t Type      : 2;
00082     uint8_t Dir       : 1;
00083   } BM;
00084   uint8_t B;
00085 } REQUEST_TYPE;
00086
00087 /* USB Standard Request Codes */
00088 #define USB_REQUEST_GET_STATUS                 0
00089 #define USB_REQUEST_CLEAR_FEATURE              1
00090 #define USB_REQUEST_SET_FEATURE                3
00091 #define USB_REQUEST_SET_ADDRESS                5
00092 #define USB_REQUEST_GET_DESCRIPTOR             6
00093 #define USB_REQUEST_SET_DESCRIPTOR             7
00094 #define USB_REQUEST_GET_CONFIGURATION          8
00095 #define USB_REQUEST_SET_CONFIGURATION          9
00096 #define USB_REQUEST_GET_INTERFACE              10
00097 #define USB_REQUEST_SET_INTERFACE              11
00098 #define USB_REQUEST_SYNC_FRAME                 12
00099
00100 /* USB GET_STATUS Bit Values */
00101 #define USB_GETSTATUS_SELF_POWERED             0x01
00102 #define USB_GETSTATUS_REMOTE_WAKEUP            0x02
00103 #define USB_GETSTATUS_ENDPOINT_STALL           0x01
00104
00105 /* USB Standard Feature selectors */
00106 #define USB_FEATURE_ENDPOINT_STALL             0
00107 #define USB_FEATURE_REMOTE_WAKEUP              1
00108
00109 /* USB Default Control Pipe Setup Packet */
00110 #if defined     (  __CC_ARM  )
00111 typedef __packed struct _USB_SETUP_PACKET {
00112 #elif defined   (  __GNUC__  )
00113 typedef struct __packed _USB_SETUP_PACKET {
00114 #elif defined   (  __IAR_SYSTEMS_ICC__  )
00115 typedef __packed struct _USB_SETUP_PACKET {
00116 #endif
00117   REQUEST_TYPE bmRequestType;
00118   uint8_t         bRequest;
00119   WORD_BYTE    wValue;
00120   WORD_BYTE    wIndex;
00121   uint16_t         wLength;
00122 } USB_SETUP_PACKET;
00123
00124
00125 /* USB Descriptor Types */
00126 #define USB_DEVICE_DESCRIPTOR_TYPE             1
00127 #define USB_CONFIGURATION_DESCRIPTOR_TYPE      2
00128 #define USB_STRING_DESCRIPTOR_TYPE             3
00129 #define USB_INTERFACE_DESCRIPTOR_TYPE          4
00130 #define USB_ENDPOINT_DESCRIPTOR_TYPE           5
00131 #define USB_DEVICE_QUALIFIER_DESCRIPTOR_TYPE   6
00132 #define USB_OTHER_SPEED_CONFIG_DESCRIPTOR_TYPE 7
00133 #define USB_INTERFACE_POWER_DESCRIPTOR_TYPE    8
00134 #define USB_OTG_DESCRIPTOR_TYPE                     9
00135 #define USB_DEBUG_DESCRIPTOR_TYPE                  10
00136 #define USB_INTERFACE_ASSOCIATION_DESCRIPTOR_TYPE  11
00137
00138 /* USB Device Classes */
00139 #define USB_DEVICE_CLASS_RESERVED              0x00
00140 #define USB_DEVICE_CLASS_AUDIO                 0x01
00141 #define USB_DEVICE_CLASS_COMMUNICATIONS        0x02
00142 #define USB_DEVICE_CLASS_HUMAN_INTERFACE       0x03
00143 #define USB_DEVICE_CLASS_MONITOR               0x04
00144 #define USB_DEVICE_CLASS_PHYSICAL_INTERFACE    0x05
00145 #define USB_DEVICE_CLASS_POWER                 0x06
00146 #define USB_DEVICE_CLASS_PRINTER               0x07
00147 #define USB_DEVICE_CLASS_STORAGE               0x08
00148 #define USB_DEVICE_CLASS_HUB                   0x09
00149 #define USB_DEVICE_CLASS_MISCELLANEOUS         0xEF
00150 #define USB_DEVICE_CLASS_VENDOR_SPECIFIC       0xFF
00151
00152 /* bmAttributes in Configuration Descriptor */
00153 #define USB_CONFIG_POWERED_MASK                0xC0
00154 #define USB_CONFIG_BUS_POWERED                 0x80
00155 #define USB_CONFIG_SELF_POWERED                0xC0
00156 #define USB_CONFIG_REMOTE_WAKEUP               0x20
00157
00158 /* bMaxPower in Configuration Descriptor */
00159 #define USB_CONFIG_POWER_MA(mA)                ((mA)/2)
00160
00161 /* bEndpointAddress in Endpoint Descriptor */
00162 #define USB_ENDPOINT_DIRECTION_MASK            0x80
00163 #define USB_ENDPOINT_OUT(addr)                 ((addr) | 0x00)
00164 #define USB_ENDPOINT_IN(addr)                  ((addr) | 0x80)
00165
00166 /* bmAttributes in Endpoint Descriptor */
00167 #define USB_ENDPOINT_TYPE_MASK                 0x03
00168 #define USB_ENDPOINT_TYPE_CONTROL              0x00
00169 #define USB_ENDPOINT_TYPE_ISOCHRONOUS          0x01
00170 #define USB_ENDPOINT_TYPE_BULK                 0x02
00171 #define USB_ENDPOINT_TYPE_INTERRUPT            0x03
00172 #define USB_ENDPOINT_SYNC_MASK                 0x0C
00173 #define USB_ENDPOINT_SYNC_NO_SYNCHRONIZATION   0x00
00174 #define USB_ENDPOINT_SYNC_ASYNCHRONOUS         0x04
00175 #define USB_ENDPOINT_SYNC_ADAPTIVE             0x08
00176 #define USB_ENDPOINT_SYNC_SYNCHRONOUS          0x0C
00177 #define USB_ENDPOINT_USAGE_MASK                0x30
00178 #define USB_ENDPOINT_USAGE_DATA                0x00
00179 #define USB_ENDPOINT_USAGE_FEEDBACK            0x10
00180 #define USB_ENDPOINT_USAGE_IMPLICIT_FEEDBACK   0x20
00181 #define USB_ENDPOINT_USAGE_RESERVED            0x30
00182
00183 /* USB Standard Device Descriptor */
00184 #if defined     (  __CC_ARM  )
00185 typedef __packed struct _USB_DEVICE_DESCRIPTOR {
00186 #elif defined   (  __GNUC__  )
00187 typedef struct __packed _USB_DEVICE_DESCRIPTOR {
00188 #elif defined   (  __IAR_SYSTEMS_ICC__  )
00189 typedef __packed struct _USB_DEVICE_DESCRIPTOR {
00190 #endif
00191   uint8_t  bLength;
00192   uint8_t  bDescriptorType;
00193   uint16_t  bcdUSB;
00194   uint8_t  bDeviceClass;
00195   uint8_t  bDeviceSubClass;
00196   uint8_t  bDeviceProtocol;
00197   uint8_t  bMaxPacketSize0;
00198   uint16_t  idVendor;
00199   uint16_t  idProduct;
00200   uint16_t  bcdDevice;
00201   uint8_t  iManufacturer;
00202   uint8_t  iProduct;
00203   uint8_t  iSerialNumber;
00204   uint8_t  bNumConfigurations;
00205 } USB_DEVICE_DESCRIPTOR;
00206
00207 /* USB 2.0 Device Qualifier Descriptor */
00208 #if defined     (  __CC_ARM  )
00209 typedef __packed struct _USB_DEVICE_QUALIFIER_DESCRIPTOR {
00210 #elif defined   (  __GNUC__  )
00211 typedef struct __packed _USB_DEVICE_QUALIFIER_DESCRIPTOR {
00212 #elif defined   (  __IAR_SYSTEMS_ICC__  )
00213 typedef __packed struct _USB_DEVICE_QUALIFIER_DESCRIPTOR {
00214 #endif
00215   uint8_t  bLength;
00216   uint8_t  bDescriptorType;
00217   uint16_t  bcdUSB;
00218   uint8_t  bDeviceClass;
00219   uint8_t  bDeviceSubClass;
00220   uint8_t  bDeviceProtocol;
00221   uint8_t  bMaxPacketSize0;
00222   uint8_t  bNumConfigurations;
00223   uint8_t  bReserved;
00224 } USB_DEVICE_QUALIFIER_DESCRIPTOR;
00225
00226 /* USB Standard Configuration Descriptor */
00227 #if defined     (  __CC_ARM  )
00228 typedef __packed struct _USB_CONFIGURATION_DESCRIPTOR {
00229 #elif defined   (  __GNUC__  )
00230 typedef struct __packed _USB_CONFIGURATION_DESCRIPTOR {
00231 #elif defined   (  __IAR_SYSTEMS_ICC__  )
00232 typedef __packed struct _USB_CONFIGURATION_DESCRIPTOR {
00233 #endif
00234   uint8_t  bLength;
00235   uint8_t  bDescriptorType;
00236   uint16_t  wTotalLength;
00237   uint8_t  bNumInterfaces;
00238   uint8_t  bConfigurationValue;
00239   uint8_t  iConfiguration;
00240   uint8_t  bmAttributes;
00241   uint8_t  bMaxPower;
00242 } USB_CONFIGURATION_DESCRIPTOR;
00243
00244 /* USB Standard Interface Descriptor */
00245 #if defined     (  __CC_ARM  )
00246 typedef __packed struct _USB_INTERFACE_DESCRIPTOR {
00247 #elif defined   (  __GNUC__  )
00248 typedef struct __packed _USB_INTERFACE_DESCRIPTOR {
00249 #elif defined   (  __IAR_SYSTEMS_ICC__  )
00250 typedef __packed struct _USB_INTERFACE_DESCRIPTOR {
00251 #endif
00252   uint8_t  bLength;
00253   uint8_t  bDescriptorType;
00254   uint8_t  bInterfaceNumber;
00255   uint8_t  bAlternateSetting;
00256   uint8_t  bNumEndpoints;
00257   uint8_t  bInterfaceClass;
00258   uint8_t  bInterfaceSubClass;
00259   uint8_t  bInterfaceProtocol;
00260   uint8_t  iInterface;
00261 } USB_INTERFACE_DESCRIPTOR;
00262
00263 /* USB Standard Endpoint Descriptor */
00264 #if defined     (  __CC_ARM  )
00265 typedef __packed struct _USB_ENDPOINT_DESCRIPTOR {
00266 #elif defined   (  __GNUC__  )
00267 typedef struct __packed _USB_ENDPOINT_DESCRIPTOR {
00268 #elif defined   (  __IAR_SYSTEMS_ICC__  )
00269 typedef __packed struct _USB_ENDPOINT_DESCRIPTOR {
00270 #endif
00271   uint8_t  bLength;
00272   uint8_t  bDescriptorType;
00273   uint8_t  bEndpointAddress;
00274   uint8_t  bmAttributes;
00275   uint16_t  wMaxPacketSize;
00276   uint8_t  bInterval;
00277 } USB_ENDPOINT_DESCRIPTOR;
00278
00279 /* USB String Descriptor */
00280 #if defined     (  __CC_ARM  )
00281 typedef __packed struct _USB_STRING_DESCRIPTOR {
00282 #elif defined   (  __GNUC__  )
00283 typedef struct __packed _USB_STRING_DESCRIPTOR {
00284 #elif defined   (  __IAR_SYSTEMS_ICC__  )
00285 typedef __packed struct _USB_STRING_DESCRIPTOR {
00286 #endif
00287   uint8_t  bLength;
00288   uint8_t  bDescriptorType;
00289   uint16_t  bString/*[]*/;
00290 } USB_STRING_DESCRIPTOR;
00291
00292 /* USB Common Descriptor */
00293 #if defined     (  __CC_ARM  )
00294 typedef __packed struct _USB_COMMON_DESCRIPTOR {
00295 #elif defined   (  __GNUC__  )
00296 typedef struct __packed _USB_COMMON_DESCRIPTOR {
00297 #elif defined   (  __IAR_SYSTEMS_ICC__  )
00298 typedef __packed struct _USB_COMMON_DESCRIPTOR {
00299 #endif
00300   uint8_t  bLength;
00301   uint8_t  bDescriptorType;
00302 } USB_COMMON_DESCRIPTOR;
00303
00304
00305 #endif  /* __USB_H__ */
Generated on Tue Jun 7 14:59:04 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBMassStorage/usbcfg.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBMassStorage/usbcfg.h

Go to the documentation of this file.
00001 /*----------------------------------------------------------------------------
00002  *      U S B  -  K e r n e l
00003  *----------------------------------------------------------------------------
00004  *      Name:    USBCFG.H
00005  *      Purpose: USB Custom Configuration
00006  *      Version: V1.10
00007  *----------------------------------------------------------------------------
00008  *      This software is supplied "AS IS" without any warranties, express,
00009  *      implied or statutory, including but not limited to the implied
00010  *      warranties of fitness for purpose, satisfactory quality and
00011  *      noninfringement. Keil extends you a royalty-free right to reproduce
00012  *      and distribute executable files created using this software for use
00013  *      on NXP Semiconductors LPC family microcontroller devices only. Nothing
00014  *      else gives you the right to use this software.
00015  *
00016  *      Copyright (c) 2005-2009 Keil Software.
00017  *---------------------------------------------------------------------------*/
00018
00019 #ifndef __USBCFG_H__
00020 #define __USBCFG_H__
00021
00022
00023 //*** <<< Use Configuration Wizard in Context Menu >>> ***
00024
00025
00026 /*
00027 // <h> USB Configuration
00028 //   <o0> USB Power
00029 //        <i> Default Power Setting
00030 //        <0=> Bus-powered
00031 //        <1=> Self-powered
00032 //   <o1> Max Number of Interfaces <1-256>
00033 //   <o2> Max Number of Endpoints  <1-32>
00034 //   <o3> Max Endpoint 0 Packet Size
00035 //        <8=> 8 Bytes <16=> 16 Bytes <32=> 32 Bytes <64=> 64 Bytes
00036 //   <e4> DMA Transfer
00037 //     <i> Use DMA for selected Endpoints
00038 //     <o5.0>  Endpoint 0 Out
00039 //     <o5.1>  Endpoint 0 In
00040 //     <o5.2>  Endpoint 1 Out
00041 //     <o5.3>  Endpoint 1 In
00042 //     <o5.4>  Endpoint 2 Out
00043 //     <o5.5>  Endpoint 2 In
00044 //     <o5.6>  Endpoint 3 Out
00045 //     <o5.7>  Endpoint 3 In
00046 //     <o5.8>  Endpoint 4 Out
00047 //     <o5.9>  Endpoint 4 In
00048 //     <o5.10> Endpoint 5 Out
00049 //     <o5.11> Endpoint 5 In
00050 //     <o5.12> Endpoint 6 Out
00051 //     <o5.13> Endpoint 6 In
00052 //     <o5.14> Endpoint 7 Out
00053 //     <o5.15> Endpoint 7 In
00054 //     <o5.16> Endpoint 8 Out
00055 //     <o5.17> Endpoint 8 In
00056 //     <o5.18> Endpoint 9 Out
00057 //     <o5.19> Endpoint 9 In
00058 //     <o5.20> Endpoint 10 Out
00059 //     <o5.21> Endpoint 10 In
00060 //     <o5.22> Endpoint 11 Out
00061 //     <o5.23> Endpoint 11 In
00062 //     <o5.24> Endpoint 12 Out
00063 //     <o5.25> Endpoint 12 In
00064 //     <o5.26> Endpoint 13 Out
00065 //     <o5.27> Endpoint 13 In
00066 //     <o5.28> Endpoint 14 Out
00067 //     <o5.29> Endpoint 14 In
00068 //     <o5.30> Endpoint 15 Out
00069 //     <o5.31> Endpoint 15 In
00070 //   </e>
00071 // </h>
00072 */
00073
00074 #define USB_POWER           0
00075 #define USB_IF_NUM          4
00076 #define USB_EP_NUM          32
00077 #define USB_MAX_PACKET0     64
00078 #define USB_DMA             1
00079 #define USB_DMA_EP          0x00000000
00080
00081
00082 /*
00083 // <h> USB Event Handlers
00084 //   <h> Device Events
00085 //     <o0.0> Power Event
00086 //     <o1.0> Reset Event
00087 //     <o2.0> Suspend Event
00088 //     <o3.0> Resume Event
00089 //     <o4.0> Remote Wakeup Event
00090 //     <o5.0> Start of Frame Event
00091 //     <o6.0> Error Event
00092 //   </h>
00093 //   <h> Endpoint Events
00094 //     <o7.0>  Endpoint 0 Event
00095 //     <o7.1>  Endpoint 1 Event
00096 //     <o7.2>  Endpoint 2 Event
00097 //     <o7.3>  Endpoint 3 Event
00098 //     <o7.4>  Endpoint 4 Event
00099 //     <o7.5>  Endpoint 5 Event
00100 //     <o7.6>  Endpoint 6 Event
00101 //     <o7.7>  Endpoint 7 Event
00102 //     <o7.8>  Endpoint 8 Event
00103 //     <o7.9>  Endpoint 9 Event
00104 //     <o7.10> Endpoint 10 Event
00105 //     <o7.11> Endpoint 11 Event
00106 //     <o7.12> Endpoint 12 Event
00107 //     <o7.13> Endpoint 13 Event
00108 //     <o7.14> Endpoint 14 Event
00109 //     <o7.15> Endpoint 15 Event
00110 //   </h>
00111 //   <h> USB Core Events
00112 //     <o8.0>  Set Configuration Event
00113 //     <o9.0>  Set Interface Event
00114 //     <o10.0> Set/Clear Feature Event
00115 //   </h>
00116 // </h>
00117 */
00118
00119 #define USB_POWER_EVENT     0
00120 #define USB_RESET_EVENT     1
00121 #define USB_SUSPEND_EVENT   0
00122 #define USB_RESUME_EVENT    0
00123 #define USB_WAKEUP_EVENT    0
00124 #define USB_SOF_EVENT       0
00125 #define USB_ERROR_EVENT     0
00126 #define USB_EP_EVENT        0x0005
00127 #define USB_CONFIGURE_EVENT 1
00128 #define USB_INTERFACE_EVENT 0
00129 #define USB_FEATURE_EVENT   0
00130
00131
00132 /*
00133 // <e0> USB Class Support
00134 //   <e1> Human Interface Device (HID)
00135 //     <o2> Interface Number <0-255>
00136 //   </e>
00137 //   <e3> Mass Storage
00138 //     <o4> Interface Number <0-255>
00139 //   </e>
00140 //   <e5> Audio Device
00141 //     <o6> Control Interface Number <0-255>
00142 //     <o7> Streaming Interface 1 Number <0-255>
00143 //     <o8> Streaming Interface 2 Number <0-255>
00144 //   </e>
00145 // </e>
00146 */
00147
00148 #define USB_CLASS           1
00149 #define USB_HID             0
00150 #define USB_HID_IF_NUM      0
00151 #define USB_MSC             1
00152 #define USB_MSC_IF_NUM      0
00153 #define USB_AUDIO           0
00154 #define USB_ADC_CIF_NUM     0
00155 #define USB_ADC_SIF1_NUM    1
00156 #define USB_ADC_SIF2_NUM    2
00157 #define USB_CDC                         0
00158 #define USB_CDC_CIF_NUM     0
00159 #define USB_CDC_DIF_NUM     1
00160 #define USB_CDC_BUFSIZE     64
00161
00162
00163 #endif  /* __USBCFG_H__ */
Generated on Tue Jun 7 14:59:04 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBMassStorage/usbcore.c Source File

C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBMassStorage/usbcore.c

Go to the documentation of this file.
00001 /*----------------------------------------------------------------------------
00002  *      U S B  -  K e r n e l
00003  *----------------------------------------------------------------------------
00004  *      Name:    USBCORE.C
00005  *      Purpose: USB Core Module
00006  *      Version: V1.10
00007  *----------------------------------------------------------------------------
00008  *      This software is supplied "AS IS" without any warranties, express,
00009  *      implied or statutory, including but not limited to the implied
00010  *      warranties of fitness for purpose, satisfactory quality and
00011  *      noninfringement. Keil extends you a royalty-free right to reproduce
00012  *      and distribute executable files created using this software for use
00013  *      on NXP Semiconductors LPC family microcontroller devices only. Nothing
00014  *      else gives you the right to use this software.
00015  *
00016  *      Copyright (c) 2005-2009 Keil Software.
00017  *---------------------------------------------------------------------------*/
00018
00019 #include "lpc_types.h"
00020
00021 #include "usb.h"
00022 #include "usbcfg.h"
00023 #include "usbhw.h"
00024 #include "usbcore.h"
00025 #include "usbdesc.h"
00026 #include "usbuser.h"
00027
00028 #if (USB_CLASS)
00029
00030 #if (USB_AUDIO)
00031 #include "audio.h"
00032 #include "adcuser.h"
00033 #endif
00034
00035 #if (USB_HID)
00036 #include "hid.h"
00037 #include "hiduser.h"
00038 #endif
00039
00040 #if (USB_MSC)
00041 #include "msc.h"
00042 #include "mscuser.h"
00043 extern MSC_CSW CSW;
00044 #endif
00045
00046 #if (USB_CDC)
00047 #include "cdc.h"
00048 #include "cdcuser.h"
00049 #endif
00050
00051 #endif
00052
00053 #if (USB_VENDOR)
00054 #include "vendor.h"
00055 #endif
00056
00057 #ifndef __IAR_SYSTEMS_ICC__
00058 #pragma diag_suppress 111,1441
00059 #endif
00060
00061 uint16_t  USB_DeviceStatus;
00062 uint8_t  USB_DeviceAddress;
00063 uint8_t  USB_Configuration;
00064 uint32_t USB_EndPointMask;
00065 uint32_t USB_EndPointHalt;
00066 uint8_t  USB_NumInterfaces;
00067 uint8_t  USB_AltSetting[USB_IF_NUM];
00068
00069 uint8_t  EP0Buf[USB_MAX_PACKET0];
00070
00071
00072 USB_EP_DATA EP0Data;
00073
00074 USB_SETUP_PACKET SetupPacket;
00075
00076
00077 /*
00078  *  Reset USB Core
00079  *    Parameters:      None
00080  *    Return Value:    None
00081  */
00082
00083 void USB_ResetCore (void) {
00084
00085   USB_DeviceStatus  = USB_POWER;
00086   USB_DeviceAddress = 0;
00087   USB_Configuration = 0;
00088   USB_EndPointMask  = 0x00010001;
00089   USB_EndPointHalt  = 0x00000000;
00090 }
00091
00092
00093 /*
00094  *  USB Request - Setup Stage
00095  *    Parameters:      None (global SetupPacket)
00096  *    Return Value:    None
00097  */
00098
00099 void USB_SetupStage (void) {
00100   USB_ReadEP(0x00, (uint8_t *)&SetupPacket);
00101 }
00102
00103
00104 /*
00105  *  USB Request - Data In Stage
00106  *    Parameters:      None (global EP0Data)
00107  *    Return Value:    None
00108  */
00109
00110 void USB_DataInStage (void) {
00111   uint32_t cnt;
00112
00113   if (EP0Data.Count > USB_MAX_PACKET0) {
00114     cnt = USB_MAX_PACKET0;
00115   } else {
00116     cnt = EP0Data.Count;
00117   }
00118   cnt = USB_WriteEP(0x80, EP0Data.pData, cnt);
00119   EP0Data.pData += cnt;
00120   EP0Data.Count -= cnt;
00121 }
00122
00123
00124 /*
00125  *  USB Request - Data Out Stage
00126  *    Parameters:      None (global EP0Data)
00127  *    Return Value:    None
00128  */
00129
00130 void USB_DataOutStage (void) {
00131   uint32_t cnt;
00132
00133   cnt = USB_ReadEP(0x00, EP0Data.pData);
00134   EP0Data.pData += cnt;
00135   EP0Data.Count -= cnt;
00136 }
00137
00138
00139 /*
00140  *  USB Request - Status In Stage
00141  *    Parameters:      None
00142  *    Return Value:    None
00143  */
00144
00145 void USB_StatusInStage (void) {
00146   USB_WriteEP(0x80, NULL, 0);
00147 }
00148
00149
00150 /*
00151  *  USB Request - Status Out Stage
00152  *    Parameters:      None
00153  *    Return Value:    None
00154  */
00155
00156 void USB_StatusOutStage (void) {
00157   USB_ReadEP(0x00, EP0Buf);
00158 }
00159
00160
00161 /*
00162  *  Get Status USB Request
00163  *    Parameters:      None (global SetupPacket)
00164  *    Return Value:    TRUE - Success, FALSE - Error
00165  */
00166
00167 #ifdef __IAR_SYSTEMS_ICC__
00168 inline uint32_t USB_GetStatus (void) {
00169 #else
00170 __inline uint32_t USB_GetStatus (void) {
00171 #endif
00172   uint32_t n, m;
00173
00174   switch (SetupPacket.bmRequestType.BM.Recipient) {
00175     case REQUEST_TO_DEVICE:
00176       EP0Data.pData = (uint8_t *)&USB_DeviceStatus;
00177       USB_DataInStage();
00178       break;
00179     case REQUEST_TO_INTERFACE:
00180       if ((USB_Configuration != 0) && (SetupPacket.wIndex.WB.L < USB_NumInterfaces)) {
00181         *((__packed uint16_t *)EP0Buf) = 0;
00182         EP0Data.pData = EP0Buf;
00183         USB_DataInStage();
00184       } else {
00185         return (FALSE);
00186       }
00187       break;
00188     case REQUEST_TO_ENDPOINT:
00189       n = SetupPacket.wIndex.WB.L & 0x8F;
00190       m = (n & 0x80) ? ((1 << 16) << (n & 0x0F)) : (1 << n);
00191       if (((USB_Configuration != 0) || ((n & 0x0F) == 0)) && (USB_EndPointMask & m)) {
00192         *((__packed uint16_t *)EP0Buf) = (USB_EndPointHalt & m) ? 1 : 0;
00193         EP0Data.pData = EP0Buf;
00194         USB_DataInStage();
00195       } else {
00196         return (FALSE);
00197       }
00198       break;
00199     default:
00200       return (FALSE);
00201   }
00202   return (TRUE);
00203 }
00204
00205
00206 /*
00207  *  Set/Clear Feature USB Request
00208  *    Parameters:      sc:    0 - Clear, 1 - Set
00209  *                            None (global SetupPacket)
00210  *    Return Value:    TRUE - Success, FALSE - Error
00211  */
00212
00213 #ifdef __IAR_SYSTEMS_ICC__
00214 inline uint32_t USB_SetClrFeature (uint32_t sc) {
00215 #else
00216 __inline uint32_t USB_SetClrFeature (uint32_t sc) {
00217 #endif
00218   uint32_t n, m;
00219
00220   switch (SetupPacket.bmRequestType.BM.Recipient) {
00221     case REQUEST_TO_DEVICE:
00222       if (SetupPacket.wValue.W == USB_FEATURE_REMOTE_WAKEUP) {
00223         if (sc) {
00224           USB_WakeUpCfg(TRUE);
00225           USB_DeviceStatus |=  USB_GETSTATUS_REMOTE_WAKEUP;
00226         } else {
00227           USB_WakeUpCfg(FALSE);
00228           USB_DeviceStatus &= ~USB_GETSTATUS_REMOTE_WAKEUP;
00229         }
00230       } else {
00231         return (FALSE);
00232       }
00233       break;
00234     case REQUEST_TO_INTERFACE:
00235       return (FALSE);
00236     case REQUEST_TO_ENDPOINT:
00237       n = SetupPacket.wIndex.WB.L & 0x8F;
00238       m = (n & 0x80) ? ((1 << 16) << (n & 0x0F)) : (1 << n);
00239       if ((USB_Configuration != 0) && ((n & 0x0F) != 0) && (USB_EndPointMask & m)) {
00240         if (SetupPacket.wValue.W == USB_FEATURE_ENDPOINT_STALL) {
00241           if (sc) {
00242             USB_SetStallEP(n);
00243             USB_EndPointHalt |=  m;
00244           } else {
00245             USB_ClrStallEP(n);
00246             USB_EndPointHalt &= ~m;
00247           }
00248         } else {
00249           return (FALSE);
00250         }
00251       } else {
00252         return (FALSE);
00253       }
00254       break;
00255     default:
00256       return (FALSE);
00257   }
00258   return (TRUE);
00259 }
00260
00261
00262 /*
00263  *  Get Descriptor USB Request
00264  *    Parameters:      None (global SetupPacket)
00265  *    Return Value:    TRUE - Success, FALSE - Error
00266  */
00267
00268 #ifdef __IAR_SYSTEMS_ICC__
00269 inline uint32_t USB_GetDescriptor (void) {
00270 #else
00271 __inline uint32_t USB_GetDescriptor (void) {
00272 #endif
00273   uint8_t  *pD;
00274   uint32_t len, n;
00275
00276   switch (SetupPacket.bmRequestType.BM.Recipient) {
00277     case REQUEST_TO_DEVICE:
00278       switch (SetupPacket.wValue.WB.H) {
00279         case USB_DEVICE_DESCRIPTOR_TYPE:
00280           EP0Data.pData = (uint8_t *)USB_DeviceDescriptor;
00281           len = USB_DEVICE_DESC_SIZE;
00282           break;
00283         case USB_CONFIGURATION_DESCRIPTOR_TYPE:
00284           pD = (uint8_t *)USB_ConfigDescriptor;
00285           for (n = 0; n != SetupPacket.wValue.WB.L; n++) {
00286             if (((USB_CONFIGURATION_DESCRIPTOR *)pD)->bLength != 0) {
00287               pD += ((USB_CONFIGURATION_DESCRIPTOR *)pD)->wTotalLength;
00288             }
00289           }
00290           if (((USB_CONFIGURATION_DESCRIPTOR *)pD)->bLength == 0) {
00291             return (FALSE);
00292           }
00293           EP0Data.pData = pD;
00294           len = ((USB_CONFIGURATION_DESCRIPTOR *)pD)->wTotalLength;
00295           break;
00296         case USB_STRING_DESCRIPTOR_TYPE:
00297           EP0Data.pData = (uint8_t *)USB_StringDescriptor + SetupPacket.wValue.WB.L;
00298           len = ((USB_STRING_DESCRIPTOR *)EP0Data.pData)->bLength;
00299           break;
00300         default:
00301           return (FALSE);
00302       }
00303       break;
00304     case REQUEST_TO_INTERFACE:
00305       switch (SetupPacket.wValue.WB.H) {
00306 #if USB_HID
00307         case HID_HID_DESCRIPTOR_TYPE:
00308           if (SetupPacket.wIndex.WB.L != USB_HID_IF_NUM) {
00309             return (FALSE);    /* Only Single HID Interface is supported */
00310           }
00311           EP0Data.pData = (uint8_t *)USB_ConfigDescriptor + HID_DESC_OFFSET;
00312           len = HID_DESC_SIZE;
00313           break;
00314         case HID_REPORT_DESCRIPTOR_TYPE:
00315           if (SetupPacket.wIndex.WB.L != USB_HID_IF_NUM) {
00316             return (FALSE);    /* Only Single HID Interface is supported */
00317           }
00318           EP0Data.pData = (uint8_t *)HID_ReportDescriptor;
00319           len = HID_ReportDescSize;
00320           break;
00321         case HID_PHYSICAL_DESCRIPTOR_TYPE:
00322           return (FALSE);      /* HID Physical Descriptor is not supported */
00323 #endif
00324         default:
00325           return (FALSE);
00326       }
00327     default:
00328       return (FALSE);
00329   }
00330
00331   if (EP0Data.Count > len) {
00332     EP0Data.Count = len;
00333   }
00334   USB_DataInStage();
00335
00336   return (TRUE);
00337 }
00338
00339
00340 /*
00341  *  Set Configuration USB Request
00342  *    Parameters:      None (global SetupPacket)
00343  *    Return Value:    TRUE - Success, FALSE - Error
00344  */
00345
00346 #ifdef __IAR_SYSTEMS_ICC__
00347 inline uint32_t USB_SetConfiguration (void) {
00348 #else
00349 __inline uint32_t USB_SetConfiguration (void) {
00350 #endif
00351   USB_COMMON_DESCRIPTOR *pD;
00352         uint32_t  alt, n, m;
00353         uint32_t tmp;
00354
00355   if (SetupPacket.wValue.WB.L) {
00356     pD = (USB_COMMON_DESCRIPTOR *)USB_ConfigDescriptor;
00357     while (pD->bLength) {
00358       switch (pD->bDescriptorType) {
00359         case USB_CONFIGURATION_DESCRIPTOR_TYPE:
00360           if (((USB_CONFIGURATION_DESCRIPTOR *)pD)->bConfigurationValue == SetupPacket.wValue.WB.L) {
00361             USB_Configuration = SetupPacket.wValue.WB.L;
00362             USB_NumInterfaces = ((USB_CONFIGURATION_DESCRIPTOR *)pD)->bNumInterfaces;
00363             for (n = 0; n < USB_IF_NUM; n++) {
00364               USB_AltSetting[n] = 0;
00365             }
00366             for (n = 1; n < 16; n++) {
00367               if (USB_EndPointMask & (1 << n)) {
00368                 USB_DisableEP(n);
00369               }
00370               if (USB_EndPointMask & ((1 << 16) << n)) {
00371                 USB_DisableEP(n | 0x80);
00372               }
00373             }
00374             USB_EndPointMask = 0x00010001;
00375             USB_EndPointHalt = 0x00000000;
00376             USB_Configure(TRUE);
00377             if (((USB_CONFIGURATION_DESCRIPTOR *)pD)->bmAttributes & USB_CONFIG_SELF_POWERED) {
00378               USB_DeviceStatus |=  USB_GETSTATUS_SELF_POWERED;
00379             } else {
00380               USB_DeviceStatus &= ~USB_GETSTATUS_SELF_POWERED;
00381             }
00382           } else {
00383             //(uint8_t *)pD += ((USB_CONFIGURATION_DESCRIPTOR *)pD)->wTotalLength;
00384             tmp = (uint32_t) pD;
00385             tmp += ((USB_CONFIGURATION_DESCRIPTOR *)pD)->wTotalLength;
00386             pD = (USB_COMMON_DESCRIPTOR *)tmp;
00387             continue;
00388           }
00389           break;
00390         case USB_INTERFACE_DESCRIPTOR_TYPE:
00391           alt = ((USB_INTERFACE_DESCRIPTOR *)pD)->bAlternateSetting;
00392           break;
00393         case USB_ENDPOINT_DESCRIPTOR_TYPE:
00394           if (alt == 0) {
00395             n = ((USB_ENDPOINT_DESCRIPTOR *)pD)->bEndpointAddress & 0x8F;
00396             m = (n & 0x80) ? ((1 << 16) << (n & 0x0F)) : (1 << n);
00397             USB_EndPointMask |= m;
00398             USB_ConfigEP((USB_ENDPOINT_DESCRIPTOR *)pD);
00399             USB_EnableEP(n);
00400             USB_ResetEP(n);
00401           }
00402           break;
00403       }
00404       //(uint8_t *)pD += pD->bLength;
00405       tmp = (uint32_t) pD;
00406       tmp += pD->bLength;
00407       pD = (USB_COMMON_DESCRIPTOR *)tmp;
00408     }
00409   }
00410   else {
00411     USB_Configuration = 0;
00412     for (n = 1; n < 16; n++) {
00413       if (USB_EndPointMask & (1 << n)) {
00414         USB_DisableEP(n);
00415       }
00416       if (USB_EndPointMask & ((1 << 16) << n)) {
00417         USB_DisableEP(n | 0x80);
00418       }
00419     }
00420     USB_EndPointMask  = 0x00010001;
00421     USB_EndPointHalt  = 0x00000000;
00422     USB_Configure(FALSE);
00423   }
00424
00425   if (USB_Configuration == SetupPacket.wValue.WB.L) {
00426     return (TRUE);
00427   } else {
00428     return (FALSE);
00429   }
00430 }
00431
00432
00433 /*
00434  *  Set Interface USB Request
00435  *    Parameters:      None (global SetupPacket)
00436  *    Return Value:    TRUE - Success, FALSE - Error
00437  */
00438
00439 #ifdef __IAR_SYSTEMS_ICC__
00440 inline uint32_t USB_SetInterface (void) {
00441 #else
00442 __inline uint32_t USB_SetInterface (void) {
00443 #endif
00444   USB_COMMON_DESCRIPTOR *pD;
00445   uint32_t                  ifn, alt, old, msk, n, m;
00446   uint32_t                   set;
00447   uint32_t tmp;
00448
00449   if (USB_Configuration == 0) return (FALSE);
00450
00451   set = FALSE;
00452   pD  = (USB_COMMON_DESCRIPTOR *)USB_ConfigDescriptor;
00453   while (pD->bLength) {
00454     switch (pD->bDescriptorType) {
00455       case USB_CONFIGURATION_DESCRIPTOR_TYPE:
00456         if (((USB_CONFIGURATION_DESCRIPTOR *)pD)->bConfigurationValue != USB_Configuration) {
00457           //(uint8_t *)pD += ((USB_CONFIGURATION_DESCRIPTOR *)pD)->wTotalLength;
00458                 tmp = (uint32_t)pD;
00459                 tmp += ((USB_CONFIGURATION_DESCRIPTOR *)pD)->wTotalLength;
00460                 pD = (USB_COMMON_DESCRIPTOR *)tmp;
00461           continue;
00462         }
00463         break;
00464       case USB_INTERFACE_DESCRIPTOR_TYPE:
00465         ifn = ((USB_INTERFACE_DESCRIPTOR *)pD)->bInterfaceNumber;
00466         alt = ((USB_INTERFACE_DESCRIPTOR *)pD)->bAlternateSetting;
00467         msk = 0;
00468         if ((ifn == SetupPacket.wIndex.WB.L) && (alt == SetupPacket.wValue.WB.L)) {
00469           set = TRUE;
00470           old = USB_AltSetting[ifn];
00471           USB_AltSetting[ifn] = (uint8_t)alt;
00472         }
00473         break;
00474       case USB_ENDPOINT_DESCRIPTOR_TYPE:
00475         if (ifn == SetupPacket.wIndex.WB.L) {
00476           n = ((USB_ENDPOINT_DESCRIPTOR *)pD)->bEndpointAddress & 0x8F;
00477           m = (n & 0x80) ? ((1 << 16) << (n & 0x0F)) : (1 << n);
00478           if (alt == SetupPacket.wValue.WB.L) {
00479             USB_EndPointMask |=  m;
00480             USB_EndPointHalt &= ~m;
00481             USB_ConfigEP((USB_ENDPOINT_DESCRIPTOR *)pD);
00482             USB_EnableEP(n);
00483             USB_ResetEP(n);
00484             msk |= m;
00485           }
00486           else if ((alt == old) && ((msk & m) == 0)) {
00487             USB_EndPointMask &= ~m;
00488             USB_EndPointHalt &= ~m;
00489             USB_DisableEP(n);
00490           }
00491         }
00492         break;
00493     }
00494     //(uint8_t *)pD += pD->bLength;
00495     tmp = (uint32_t)pD;
00496     tmp += pD->bLength;
00497     pD = (USB_COMMON_DESCRIPTOR *) tmp;
00498   }
00499   return (set);
00500 }
00501
00502
00503 /*
00504  *  USB Endpoint 0 Event Callback
00505  *    Parameter:       event
00506  */
00507
00508 void USB_EndPoint0 (uint32_t event) {
00509
00510   switch (event) {
00511
00512     case USB_EVT_SETUP:
00513       USB_SetupStage();
00514       USB_DirCtrlEP(SetupPacket.bmRequestType.BM.Dir);
00515       EP0Data.Count = SetupPacket.wLength;
00516       switch (SetupPacket.bmRequestType.BM.Type) {
00517
00518         case REQUEST_STANDARD:
00519           switch (SetupPacket.bRequest) {
00520
00521             case USB_REQUEST_GET_STATUS:
00522               if (!USB_GetStatus()) {
00523                 goto stall_i;
00524               }
00525               break;
00526
00527             case USB_REQUEST_CLEAR_FEATURE:
00528               if (!USB_SetClrFeature(0)) {
00529                 goto stall_i;
00530               }
00531               USB_StatusInStage();
00532 #if USB_FEATURE_EVENT
00533               USB_Feature_Event();
00534 #endif
00535               break;
00536
00537             case USB_REQUEST_SET_FEATURE:
00538               if (!USB_SetClrFeature(1)) {
00539                 goto stall_i;
00540               }
00541               USB_StatusInStage();
00542 #if USB_FEATURE_EVENT
00543               USB_Feature_Event();
00544 #endif
00545               break;
00546
00547             case USB_REQUEST_SET_ADDRESS:
00548               switch (SetupPacket.bmRequestType.BM.Recipient) {
00549                 case REQUEST_TO_DEVICE:
00550                   USB_DeviceAddress = 0x80 | SetupPacket.wValue.WB.L;
00551                   USB_StatusInStage();
00552                   break;
00553                 default:
00554                   goto stall_i;
00555               }
00556               break;
00557
00558             case USB_REQUEST_GET_DESCRIPTOR:
00559               if (!USB_GetDescriptor()) {
00560                 goto stall_i;
00561               }
00562               break;
00563
00564             case USB_REQUEST_SET_DESCRIPTOR:
00565 /*stall_o:*/  USB_SetStallEP(0x00);
00566               EP0Data.Count = 0;
00567               break;
00568
00569             case USB_REQUEST_GET_CONFIGURATION:
00570               switch (SetupPacket.bmRequestType.BM.Recipient) {
00571                 case REQUEST_TO_DEVICE:
00572                   EP0Data.pData = &USB_Configuration;
00573                   USB_DataInStage();
00574                   break;
00575                 default:
00576                   goto stall_i;
00577               }
00578               break;
00579
00580             case USB_REQUEST_SET_CONFIGURATION:
00581               switch (SetupPacket.bmRequestType.BM.Recipient) {
00582                 case REQUEST_TO_DEVICE:
00583                   if (!USB_SetConfiguration()) {
00584                     goto stall_i;
00585                   }
00586                   USB_StatusInStage();
00587 #if USB_CONFIGURE_EVENT
00588                   USB_Configure_Event();
00589 #endif
00590                   break;
00591                 default:
00592                   goto stall_i;
00593               }
00594               break;
00595
00596             case USB_REQUEST_GET_INTERFACE:
00597               switch (SetupPacket.bmRequestType.BM.Recipient) {
00598                 case REQUEST_TO_INTERFACE:
00599                   if ((USB_Configuration != 0) &&
00600                       (SetupPacket.wIndex.WB.L < USB_NumInterfaces)) {
00601                     EP0Data.pData = USB_AltSetting + SetupPacket.wIndex.WB.L;
00602                     USB_DataInStage();
00603                   } else {
00604                     goto stall_i;
00605                   }
00606                   break;
00607                 default:
00608                   goto stall_i;
00609               }
00610               break;
00611
00612             case USB_REQUEST_SET_INTERFACE:
00613               switch (SetupPacket.bmRequestType.BM.Recipient) {
00614                 case REQUEST_TO_INTERFACE:
00615                   if (!USB_SetInterface()) {
00616                     goto stall_i;
00617                   }
00618                   USB_StatusInStage();
00619 #if USB_INTERFACE_EVENT
00620                   USB_Interface_Event();
00621 #endif
00622                   break;
00623                 default:
00624                   goto stall_i;
00625               }
00626               break;
00627
00628             default:
00629               goto stall_i;
00630
00631           }
00632           break;
00633
00634         case REQUEST_CLASS:
00635 #if USB_CLASS
00636           switch (SetupPacket.bmRequestType.BM.Recipient) {
00637             case REQUEST_TO_INTERFACE:
00638 #if USB_HID
00639               if (SetupPacket.wIndex.WB.L == USB_HID_IF_NUM) {
00640                 switch (SetupPacket.bRequest) {
00641                   case HID_REQUEST_GET_REPORT:
00642                     if (HID_GetReport()) {
00643                       EP0Data.pData = EP0Buf;
00644                       USB_DataInStage();
00645                       goto class_ok;
00646                     }
00647                     break;
00648                   case HID_REQUEST_SET_REPORT:
00649                     EP0Data.pData = EP0Buf;
00650                     goto class_ok;
00651                   case HID_REQUEST_GET_IDLE:
00652                     if (HID_GetIdle()) {
00653                       EP0Data.pData = EP0Buf;
00654                       USB_DataInStage();
00655                       goto class_ok;
00656                     }
00657                     break;
00658                   case HID_REQUEST_SET_IDLE:
00659                     if (HID_SetIdle()) {
00660                       USB_StatusInStage();
00661                       goto class_ok;
00662                     }
00663                     break;
00664                   case HID_REQUEST_GET_PROTOCOL:
00665                     if (HID_GetProtocol()) {
00666                       EP0Data.pData = EP0Buf;
00667                       USB_DataInStage();
00668                       goto class_ok;
00669                     }
00670                     break;
00671                   case HID_REQUEST_SET_PROTOCOL:
00672                     if (HID_SetProtocol()) {
00673                       USB_StatusInStage();
00674                       goto class_ok;
00675                     }
00676                     break;
00677                 }
00678               }
00679 #endif  /* USB_HID */
00680 #if USB_MSC
00681               if (SetupPacket.wIndex.WB.L == USB_MSC_IF_NUM) {
00682                 switch (SetupPacket.bRequest) {
00683                   case MSC_REQUEST_RESET:
00684                     if (MSC_Reset()) {
00685                       USB_StatusInStage();
00686                       goto class_ok;
00687                     }
00688                     break;
00689                   case MSC_REQUEST_GET_MAX_LUN:
00690                     if (MSC_GetMaxLUN()) {
00691                       EP0Data.pData = EP0Buf;
00692                       USB_DataInStage();
00693                       goto class_ok;
00694                     }
00695                     break;
00696                 }
00697               }
00698 #endif  /* USB_MSC */
00699 #if USB_AUDIO
00700               if ((SetupPacket.wIndex.WB.L == USB_ADC_CIF_NUM)  ||
00701                   (SetupPacket.wIndex.WB.L == USB_ADC_SIF1_NUM) ||
00702                   (SetupPacket.wIndex.WB.L == USB_ADC_SIF2_NUM)) {
00703                 if (SetupPacket.bmRequestType.BM.Dir) {
00704                   if (ADC_IF_GetRequest()) {
00705                     EP0Data.pData = EP0Buf;
00706                     USB_DataInStage();
00707                     goto class_ok;
00708                   }
00709                 } else {
00710                   EP0Data.pData = EP0Buf;
00711                   goto class_ok;
00712                 }
00713               }
00714 #endif  /* USB_AUDIO */
00715               goto stall_i;
00716 #if USB_AUDIO
00717             case REQUEST_TO_ENDPOINT:
00718               if (SetupPacket.bmRequestType.BM.Dir) {
00719                 if (ADC_EP_GetRequest()) {
00720                   EP0Data.pData = EP0Buf;
00721                   USB_DataInStage();
00722                   goto class_ok;
00723                 }
00724               } else {
00725                 EP0Data.pData = EP0Buf;
00726                 goto class_ok;
00727               }
00728               goto stall_i;
00729 #endif  /* USB_AUDIO */
00730             default:
00731               goto stall_i;
00732           }
00733 class_ok: break;
00734 #else
00735           goto stall_i;
00736 #endif  /* USB_CLASS */
00737
00738         case REQUEST_VENDOR:
00739           goto stall_i;
00740
00741         default:
00742 stall_i:  USB_SetStallEP(0x80);
00743           EP0Data.Count = 0;
00744           break;
00745
00746       }
00747       break;
00748
00749     case USB_EVT_OUT:
00750       if (SetupPacket.bmRequestType.BM.Dir == 0) {
00751         if (EP0Data.Count) {
00752           USB_DataOutStage();
00753           if (EP0Data.Count == 0) {
00754             switch (SetupPacket.bmRequestType.BM.Type) {
00755               case REQUEST_STANDARD:
00756                 goto stall_i;
00757 #if (USB_CLASS)
00758               case REQUEST_CLASS:
00759                 switch (SetupPacket.bmRequestType.BM.Recipient) {
00760                   case REQUEST_TO_INTERFACE:
00761 #if USB_HID
00762                     if (SetupPacket.wIndex.WB.L == USB_HID_IF_NUM) {
00763                       if (!HID_SetReport()) {
00764                         goto stall_i;
00765                       }
00766                       break;
00767                     }
00768 #endif
00769 #if USB_AUDIO
00770                     if ((SetupPacket.wIndex.WB.L == USB_ADC_CIF_NUM)  ||
00771                         (SetupPacket.wIndex.WB.L == USB_ADC_SIF1_NUM) ||
00772                         (SetupPacket.wIndex.WB.L == USB_ADC_SIF2_NUM)) {
00773                       if (!ADC_IF_SetRequest()) {
00774                         goto stall_i;
00775                       }
00776                       break;
00777                     }
00778 #endif
00779                     goto stall_i;
00780                   case REQUEST_TO_ENDPOINT:
00781 #if USB_AUDIO
00782                     if (ADC_EP_SetRequest()) break;
00783 #endif
00784                     goto stall_i;
00785                   default:
00786                     goto stall_i;
00787                 }
00788 #endif
00789               default:
00790                 goto stall_i;
00791             }
00792 //           USB_StatusInStage();
00793           }
00794         }
00795       } else {
00796         USB_StatusOutStage();
00797       }
00798       break;
00799
00800     case USB_EVT_IN:
00801       if (SetupPacket.bmRequestType.BM.Dir == 1) {
00802         USB_DataInStage();
00803       } else {
00804         if (USB_DeviceAddress & 0x80) {
00805           USB_DeviceAddress &= 0x7F;
00806           USB_SetAddress(USB_DeviceAddress);
00807         }
00808       }
00809       break;
00810
00811     case USB_EVT_IN_STALL:
00812       USB_ClrStallEP(0x80);
00813       break;
00814
00815     case USB_EVT_OUT_STALL:
00816       USB_ClrStallEP(0x00);
00817       break;
00818
00819   }
00820 }
Generated on Tue Jun 7 14:59:04 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBMassStorage/usbcore.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBMassStorage/usbcore.h

Go to the documentation of this file.
00001 /*----------------------------------------------------------------------------
00002  *      U S B  -  K e r n e l
00003  *----------------------------------------------------------------------------
00004  *      Name:    USBCORE.H
00005  *      Purpose: USB Core Definitions
00006  *      Version: V1.10
00007  *----------------------------------------------------------------------------
00008  *      This software is supplied "AS IS" without any warranties, express,
00009  *      implied or statutory, including but not limited to the implied
00010  *      warranties of fitness for purpose, satisfactory quality and
00011  *      noninfringement. Keil extends you a royalty-free right to reproduce
00012  *      and distribute executable files created using this software for use
00013  *      on NXP Semiconductors LPC family microcontroller devices only. Nothing
00014  *      else gives you the right to use this software.
00015  *
00016  *      Copyright (c) 2005-2009 Keil Software.
00017  *---------------------------------------------------------------------------*/
00018
00019 #ifndef __USBCORE_H__
00020 #define __USBCORE_H__
00021
00022
00023 /* USB Endpoint Data Structure */
00024 typedef struct _USB_EP_DATA {
00025   uint8_t  *pData;
00026   uint16_t   Count;
00027 } USB_EP_DATA;
00028
00029 /* USB Core Global Variables */
00030 extern uint16_t  USB_DeviceStatus;
00031 extern uint8_t  USB_DeviceAddress;
00032 extern uint8_t  USB_Configuration;
00033 extern uint32_t USB_EndPointMask;
00034 extern uint32_t USB_EndPointHalt;
00035 extern uint8_t  USB_AltSetting[USB_IF_NUM];
00036
00037 /* USB Endpoint 0 Buffer */
00038 extern uint8_t  EP0Buf[USB_MAX_PACKET0];
00039
00040 /* USB Endpoint 0 Data Info */
00041 extern USB_EP_DATA EP0Data;
00042
00043 /* USB Setup Packet */
00044 extern USB_SETUP_PACKET SetupPacket;
00045
00046 /* USB Core Functions */
00047 extern void  USB_ResetCore (void);
00048
00049
00050 #endif  /* __USBCORE_H__ */
Generated on Tue Jun 7 14:59:04 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBMassStorage/usbdesc.c Source File

C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBMassStorage/usbdesc.c

Go to the documentation of this file.
00001 /*----------------------------------------------------------------------------
00002  *      U S B  -  K e r n e l
00003  *----------------------------------------------------------------------------
00004  *      Name:    USBDESC.C
00005  *      Purpose: USB Descriptors
00006  *      Version: V1.10
00007  *----------------------------------------------------------------------------
00008  *      This software is supplied "AS IS" without any warranties, express,
00009  *      implied or statutory, including but not limited to the implied
00010  *      warranties of fitness for purpose, satisfactory quality and
00011  *      noninfringement. Keil extends you a royalty-free right to reproduce
00012  *      and distribute executable files created using this software for use
00013  *      on NXP Semiconductors LPC family microcontroller devices only. Nothing
00014  *      else gives you the right to use this software.
00015  *
00016  *      Copyright (c) 2005-2009 Keil Software.
00017  *---------------------------------------------------------------------------*/
00018
00019 #include "lpc_types.h"
00020
00021 #include "usb.h"
00022 #include "msc.h"
00023 #include "usbcfg.h"
00024 #include "usbdesc.h"
00025
00026
00027 /* USB Standard Device Descriptor */
00028 const uint8_t USB_DeviceDescriptor[] = {
00029   USB_DEVICE_DESC_SIZE,              /* bLength */
00030   USB_DEVICE_DESCRIPTOR_TYPE,        /* bDescriptorType */
00031   WBVAL(0x0200), /* 2.00 */          /* bcdUSB */
00032   0x00,                              /* bDeviceClass */
00033   0x00,                              /* bDeviceSubClass */
00034   0x00,                              /* bDeviceProtocol */
00035   USB_MAX_PACKET0,                   /* bMaxPacketSize0 */
00036   WBVAL(0xC251),                     /* idVendor */
00037   WBVAL(0x1303),                     /* idProduct */
00038   WBVAL(0x0100), /* 1.00 */          /* bcdDevice */
00039   0x04,                              /* iManufacturer */
00040   0x20,                              /* iProduct */
00041   0x48,                              /* iSerialNumber */
00042   0x01                               /* bNumConfigurations */
00043 };
00044
00045 /* USB Configuration Descriptor */
00046 /*   All Descriptors (Configuration, Interface, Endpoint, Class, Vendor */
00047 const uint8_t USB_ConfigDescriptor[] = {
00048 /* Configuration 1 */
00049   USB_CONFIGUARTION_DESC_SIZE,       /* bDescriptorType */
00050   USB_CONFIGURATION_DESCRIPTOR_TYPE, /* bDescriptorType */
00051   WBVAL(                             /* wTotalLength */
00052     1*USB_CONFIGUARTION_DESC_SIZE +
00053     1*USB_INTERFACE_DESC_SIZE     +
00054     2*USB_ENDPOINT_DESC_SIZE
00055   ),
00056   0x01,                              /* bNumInterfaces */
00057   0x01,                              /* bConfigurationValue */
00058   0x00,                              /* iConfiguration */
00059   USB_CONFIG_BUS_POWERED /*|*/       /* bmAttributes */
00060 /*USB_CONFIG_REMOTE_WAKEUP*/,
00061   USB_CONFIG_POWER_MA(100),          /* bMaxPower */
00062 /* Interface 0, Alternate Setting 0, MSC Class */
00063   USB_INTERFACE_DESC_SIZE,           /* bLength */
00064   USB_INTERFACE_DESCRIPTOR_TYPE,     /* bDescriptorType */
00065   0x00,                              /* bInterfaceNumber */
00066   0x00,                              /* bAlternateSetting */
00067   0x02,                              /* bNumEndpoints */
00068   USB_DEVICE_CLASS_STORAGE,          /* bInterfaceClass */
00069   MSC_SUBCLASS_SCSI,                 /* bInterfaceSubClass */
00070   MSC_PROTOCOL_BULK_ONLY,            /* bInterfaceProtocol */
00071   0x62,                              /* iInterface */
00072 /* Bulk In Endpoint */
00073   USB_ENDPOINT_DESC_SIZE,            /* bLength */
00074   USB_ENDPOINT_DESCRIPTOR_TYPE,      /* bDescriptorType */
00075   USB_ENDPOINT_IN(2),                /* bEndpointAddress */
00076   USB_ENDPOINT_TYPE_BULK,            /* bmAttributes */
00077   WBVAL(0x0040),                     /* wMaxPacketSize */
00078   0,                                 /* bInterval */
00079 /* Bulk Out Endpoint */
00080   USB_ENDPOINT_DESC_SIZE,            /* bLength */
00081   USB_ENDPOINT_DESCRIPTOR_TYPE,      /* bDescriptorType */
00082   USB_ENDPOINT_OUT(2),               /* bEndpointAddress */
00083   USB_ENDPOINT_TYPE_BULK,            /* bmAttributes */
00084   WBVAL(0x0040),                     /* wMaxPacketSize */
00085   0,                                 /* bInterval */
00086 /* Terminator */
00087   0                                  /* bLength */
00088 };
00089
00090 /* USB String Descriptor (optional) */
00091 const uint8_t USB_StringDescriptor[] = {
00092 /* Index 0x00: LANGID Codes */
00093   0x04,                              /* bLength */
00094   USB_STRING_DESCRIPTOR_TYPE,        /* bDescriptorType */
00095   WBVAL(0x0409), /* US English */    /* wLANGID */
00096 /* Index 0x04: Manufacturer */
00097   0x1C,                              /* bLength */
00098   USB_STRING_DESCRIPTOR_TYPE,        /* bDescriptorType */
00099   'N',0,
00100   'X',0,
00101   'P',0,
00102   ' ',0,
00103   'S',0,
00104   'e',0,
00105   'm',0,
00106   'i',0,
00107   'c',0,
00108   'o',0,
00109   'n',0,
00110   'd',0,
00111   ' ',0,
00112 /* Index 0x20: Product */
00113   0x28,                              /* bLength */
00114   USB_STRING_DESCRIPTOR_TYPE,        /* bDescriptorType */
00115   'N',0,
00116   'X',0,
00117   'P',0,
00118   ' ',0,
00119   'L',0,
00120   'P',0,
00121   'C',0,
00122   '1',0,
00123   '7',0,
00124   'x',0,
00125   'x',0,
00126   ' ',0,
00127   'M',0,
00128   'e',0,
00129   'm',0,
00130   'o',0,
00131   'r',0,
00132   'y',0,
00133   ' ',0,
00134 /* Index 0x48: Serial Number */
00135   0x1A,                              /* bLength */
00136   USB_STRING_DESCRIPTOR_TYPE,        /* bDescriptorType */
00137   'D',0,
00138   'E',0,
00139   'M',0,
00140   'O',0,
00141   '0',0,
00142   '0',0,
00143   '0',0,
00144   '0',0,
00145   '0',0,
00146   '0',0,
00147   '0',0,
00148   '0',0,
00149 /* Index 0x62: Interface 0, Alternate Setting 0 */
00150   0x0E,                              /* bLength */
00151   USB_STRING_DESCRIPTOR_TYPE,        /* bDescriptorType */
00152   'M',0,
00153   'e',0,
00154   'm',0,
00155   'o',0,
00156   'r',0,
00157   'y',0,
00158 };
Generated on Tue Jun 7 14:59:04 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBMassStorage/usbdesc.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBMassStorage/usbdesc.h

Go to the documentation of this file.
00001 /*----------------------------------------------------------------------------
00002  *      U S B  -  K e r n e l
00003  *----------------------------------------------------------------------------
00004  *      Name:    USBDESC.H
00005  *      Purpose: USB Descriptors Definitions
00006  *      Version: V1.10
00007  *----------------------------------------------------------------------------
00008  *      This software is supplied "AS IS" without any warranties, express,
00009  *      implied or statutory, including but not limited to the implied
00010  *      warranties of fitness for purpose, satisfactory quality and
00011  *      noninfringement. Keil extends you a royalty-free right to reproduce
00012  *      and distribute executable files created using this software for use
00013  *      on NXP Semiconductors LPC family microcontroller devices only. Nothing
00014  *      else gives you the right to use this software.
00015  *---------------------------------------------------------------------------*/
00016
00017 #ifndef __USBDESC_H__
00018 #define __USBDESC_H__
00019
00020
00021 #define WBVAL(x) (x & 0xFF),((x >> 8) & 0xFF)
00022
00023 #define USB_DEVICE_DESC_SIZE        (sizeof(USB_DEVICE_DESCRIPTOR))
00024 #define USB_CONFIGUARTION_DESC_SIZE (sizeof(USB_CONFIGURATION_DESCRIPTOR))
00025 #define USB_INTERFACE_DESC_SIZE     (sizeof(USB_INTERFACE_DESCRIPTOR))
00026 #define USB_ENDPOINT_DESC_SIZE      (sizeof(USB_ENDPOINT_DESCRIPTOR))
00027
00028 extern const uint8_t USB_DeviceDescriptor[];
00029 extern const uint8_t USB_ConfigDescriptor[];
00030 extern const uint8_t USB_StringDescriptor[];
00031
00032
00033 #endif  /* __USBDESC_H__ */
Generated on Tue Jun 7 14:59:04 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBMassStorage/usbhw.c Source File

C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBMassStorage/usbhw.c

Go to the documentation of this file.
00001 /*----------------------------------------------------------------------------
00002  *      U S B  -  K e r n e l
00003  *----------------------------------------------------------------------------
00004  *      Name:    USBHW.C
00005  *      Purpose: USB Hardware Layer Module for NXP Semiconductor LPC family MCUs
00006  *      Version: V1.10
00007  *----------------------------------------------------------------------------
00008  *      This software is supplied "AS IS" without any warranties, express,
00009  *      implied or statutory, including but not limited to the implied
00010  *      warranties of fitness for purpose, satisfactory quality and
00011  *      noninfringement. Keil extends you a royalty-free right to reproduce
00012  *      and distribute executable files created using this software for use
00013  *      on NXP Semiconductors LPC family microcontroller devices only. Nothing
00014  *      else gives you the right to use this software.
00015  *
00016  *      Copyright (c) 2005-2009 Keil Software.
00017  *---------------------------------------------------------------------------*/
00018
00019 #include <LPC17xx.h>                        /* LPC17xx definitions */
00020
00021 #include "lpc_types.h"
00022
00023 #include "usb.h"
00024 #include "usbcfg.h"
00025 #include "usbreg.h"
00026 #include "usbhw.h"
00027 #include "usbcore.h"
00028 #include "usbuser.h"
00029
00030 #ifndef __IAR_SYSTEMS_ICC__
00031 #pragma diag_suppress 1441
00032 #endif
00033
00034 #define EP_MSK_CTRL 0x0001      /* Control Endpoint Logical Address Mask */
00035 #define EP_MSK_BULK 0xC924      /* Bulk Endpoint Logical Address Mask */
00036 #define EP_MSK_INT  0x4492      /* Interrupt Endpoint Logical Address Mask */
00037 #define EP_MSK_ISO  0x1248      /* Isochronous Endpoint Logical Address Mask */
00038
00039
00040 #if USB_DMA
00041
00042 #if defined (  __CC_ARM  )
00043 #pragma arm section zidata = "USB_RAM"
00044 uint32_t UDCA[USB_EP_NUM];                     /* UDCA in USB RAM */
00045 uint32_t DD_NISO_Mem[4*DD_NISO_CNT];           /* Non-Iso DMA Descriptor Memory */
00046 uint32_t DD_ISO_Mem [5*DD_ISO_CNT];            /* Iso DMA Descriptor Memory */
00047 #pragma arm section zidata
00048 uint32_t udca[USB_EP_NUM];                     /* UDCA saved values */
00049 uint32_t DDMemMap[2];                          /* DMA Descriptor Memory Usage */
00050 #endif
00051
00052 #if defined (  __IAR_SYSTEMS_ICC__  )
00053 #pragma location = "USB_RAM"
00054 uint32_t UDCA[USB_EP_NUM];                     /* UDCA in USB RAM */
00055 #pragma location = "USB_RAM"
00056 uint32_t DD_NISO_Mem[4*DD_NISO_CNT];           /* Non-Iso DMA Descriptor Memory */
00057 #pragma location = "USB_RAM"
00058 uint32_t DD_ISO_Mem [5*DD_ISO_CNT];            /* Iso DMA Descriptor Memory */
00059
00060 uint32_t udca[USB_EP_NUM];                     /* UDCA saved values */
00061 uint32_t DDMemMap[2];                          /* DMA Descriptor Memory Usage */
00062 #endif
00063
00064 #if defined (  __GNUC__  )
00065 uint32_t UDCA[USB_EP_NUM] __attribute__((section("USB_RAM")));                          /* UDCA in USB RAM */
00066 uint32_t DD_NISO_Mem[4*DD_NISO_CNT] __attribute__((section("USB_RAM")));    /* Non-Iso DMA Descriptor Memory */
00067 uint32_t DD_ISO_Mem [5*DD_ISO_CNT] __attribute__((section("USB_RAM")));     /* Iso DMA Descriptor Memory */
00068 uint32_t udca[USB_EP_NUM];                                                                              /* UDCA saved values */
00069 uint32_t DDMemMap[2];                                                                                   /* DMA Descriptor Memory Usage */
00070 #endif
00071 #endif
00072
00073
00074 /*
00075  *  Get Endpoint Physical Address
00076  *    Parameters:      EPNum: Endpoint Number
00077  *                       EPNum.0..3: Address
00078  *                       EPNum.7:    Dir
00079  *    Return Value:    Endpoint Physical Address
00080  */
00081
00082 uint32_t EPAdr (uint32_t EPNum) {
00083   uint32_t val;
00084
00085   val = (EPNum & 0x0F) << 1;
00086   if (EPNum & 0x80) {
00087     val += 1;
00088   }
00089   return (val);
00090 }
00091
00092
00093 /*
00094  *  Write Command
00095  *    Parameters:      cmd:   Command
00096  *    Return Value:    None
00097  */
00098
00099 void WrCmd (uint32_t cmd) {
00100
00101   LPC_USB->USBDevIntClr = CCEMTY_INT;
00102   LPC_USB->USBCmdCode = cmd;
00103   while ((LPC_USB->USBDevIntSt & CCEMTY_INT) == 0);
00104 }
00105
00106
00107 /*
00108  *  Write Command Data
00109  *    Parameters:      cmd:   Command
00110  *                     val:   Data
00111  *    Return Value:    None
00112  */
00113
00114 void WrCmdDat (uint32_t cmd, uint32_t val) {
00115
00116         LPC_USB->USBDevIntClr = CCEMTY_INT;
00117         LPC_USB->USBCmdCode = cmd;
00118         while ((LPC_USB->USBDevIntSt & CCEMTY_INT) == 0);
00119         LPC_USB->USBDevIntClr = CCEMTY_INT;
00120         LPC_USB->USBCmdCode = val;
00121         while ((LPC_USB->USBDevIntSt & CCEMTY_INT) == 0);
00122 }
00123
00124
00125 /*
00126  *  Read Command Data
00127  *    Parameters:      cmd:   Command
00128  *    Return Value:    Data Value
00129  */
00130
00131 uint32_t RdCmdDat (uint32_t cmd) {
00132
00133         LPC_USB->USBDevIntClr = CCEMTY_INT | CDFULL_INT;
00134         LPC_USB->USBCmdCode = cmd;
00135         while ((LPC_USB->USBDevIntSt & CDFULL_INT) == 0);
00136         return (LPC_USB->USBCmdData);
00137 }
00138
00139
00140 /*
00141  *  USB Initialize Function
00142  *   Called by the User to initialize USB
00143  *    Return Value:    None
00144  */
00145
00146 void USB_Init (void) {
00147
00148         LPC_PINCON->PINSEL1 &= ~((3<<26)|(3<<28));   /* P0.29 D+, P0.30 D- */
00149         LPC_PINCON->PINSEL1 |=  ((1<<26)|(1<<28));   /* PINSEL1 26.27, 28.29  = 01 */
00150
00151         LPC_PINCON->PINSEL3 &= ~((3<< 4)|(3<<28));   /* P1.18 GoodLink, P1.30 VBUS */
00152         LPC_PINCON->PINSEL3 |=  ((1<< 4)|(2<<28));   /* PINSEL3 4.5 = 01, 28.29 = 10 */
00153
00154         LPC_PINCON->PINSEL4 &= ~((3<<18)        );   /* P2.9 SoftConnect */
00155         LPC_PINCON->PINSEL4 |=  ((1<<18)        );   /* PINSEL4 18.19 = 01 */
00156
00157         LPC_SC->PCONP |= (1UL<<31);                /* USB PCLK -> enable USB Per.       */
00158
00159         LPC_USB->USBClkCtrl = 0x1A;                  /* Dev, PortSel, AHB clock enable */
00160         while ((LPC_USB->USBClkSt & 0x1A) != 0x1A);
00161
00162         NVIC_EnableIRQ(USB_IRQn);               /* enable USB interrupt */
00163
00164         USB_Reset();
00165         USB_SetAddress(0);
00166 }
00167
00168
00169 /*
00170  *  USB Connect Function
00171  *   Called by the User to Connect/Disconnect USB
00172  *    Parameters:      con:   Connect/Disconnect
00173  *    Return Value:    None
00174  */
00175
00176 void USB_Connect (uint32_t con) {
00177   WrCmdDat(CMD_SET_DEV_STAT, DAT_WR_BYTE(con ? DEV_CON : 0));
00178 }
00179
00180
00181 /*
00182  *  USB Reset Function
00183  *   Called automatically on USB Reset
00184  *    Return Value:    None
00185  */
00186
00187 void USB_Reset (void) {
00188 #if USB_DMA
00189   uint32_t n;
00190 #endif
00191
00192   LPC_USB->USBEpInd = 0;
00193   LPC_USB->USBMaxPSize = USB_MAX_PACKET0;
00194   LPC_USB->USBEpInd = 1;
00195   LPC_USB->USBMaxPSize = USB_MAX_PACKET0;
00196   while ((LPC_USB->USBDevIntSt & EP_RLZED_INT) == 0);
00197
00198   LPC_USB->USBEpIntClr  = 0xFFFFFFFF;
00199   LPC_USB->USBEpIntEn   = 0xFFFFFFFF ^ USB_DMA_EP;
00200   LPC_USB->USBDevIntClr = 0xFFFFFFFF;
00201   LPC_USB->USBDevIntEn  = DEV_STAT_INT    | EP_SLOW_INT    |
00202                (USB_SOF_EVENT   ? FRAME_INT : 0) |
00203                (USB_ERROR_EVENT ? ERR_INT   : 0);
00204
00205 #if USB_DMA
00206   LPC_USB->USBUDCAH   = USB_RAM_ADR;
00207   LPC_USB->USBDMARClr = 0xFFFFFFFF;
00208   LPC_USB->USBEpDMADis  = 0xFFFFFFFF;
00209   LPC_USB->USBEpDMAEn   = USB_DMA_EP;
00210   LPC_USB->USBEoTIntClr = 0xFFFFFFFF;
00211   LPC_USB->USBNDDRIntClr = 0xFFFFFFFF;
00212   LPC_USB->USBSysErrIntClr = 0xFFFFFFFF;
00213   LPC_USB->USBDMAIntEn  = 0x00000007;
00214   DDMemMap[0] = 0x00000000;
00215   DDMemMap[1] = 0x00000000;
00216   for (n = 0; n < USB_EP_NUM; n++) {
00217     udca[n] = 0;
00218     UDCA[n] = 0;
00219   }
00220 #endif
00221 }
00222
00223
00224 /*
00225  *  USB Suspend Function
00226  *   Called automatically on USB Suspend
00227  *    Return Value:    None
00228  */
00229
00230 void USB_Suspend (void) {
00231   /* Performed by Hardware */
00232 }
00233
00234
00235 /*
00236  *  USB Resume Function
00237  *   Called automatically on USB Resume
00238  *    Return Value:    None
00239  */
00240
00241 void USB_Resume (void) {
00242   /* Performed by Hardware */
00243 }
00244
00245
00246 /*
00247  *  USB Remote Wakeup Function
00248  *   Called automatically on USB Remote Wakeup
00249  *    Return Value:    None
00250  */
00251
00252 void USB_WakeUp (void) {
00253
00254   if (USB_DeviceStatus & USB_GETSTATUS_REMOTE_WAKEUP) {
00255     WrCmdDat(CMD_SET_DEV_STAT, DAT_WR_BYTE(DEV_CON));
00256   }
00257 }
00258
00259
00260 /*
00261  *  USB Remote Wakeup Configuration Function
00262  *    Parameters:      cfg:   Enable/Disable
00263  *    Return Value:    None
00264  */
00265
00266 void USB_WakeUpCfg (uint32_t cfg) {
00267   /* Not needed */
00268 }
00269
00270
00271 /*
00272  *  USB Set Address Function
00273  *    Parameters:      adr:   USB Address
00274  *    Return Value:    None
00275  */
00276
00277 void USB_SetAddress (uint32_t adr) {
00278   WrCmdDat(CMD_SET_ADDR, DAT_WR_BYTE(DEV_EN | adr)); /* Don't wait for next */
00279   WrCmdDat(CMD_SET_ADDR, DAT_WR_BYTE(DEV_EN | adr)); /*  Setup Status Phase */
00280 }
00281
00282
00283 /*
00284  *  USB Configure Function
00285  *    Parameters:      cfg:   Configure/Deconfigure
00286  *    Return Value:    None
00287  */
00288
00289 void USB_Configure (uint32_t cfg) {
00290
00291   WrCmdDat(CMD_CFG_DEV, DAT_WR_BYTE(cfg ? CONF_DVICE : 0));
00292
00293   LPC_USB->USBReEp = 0x00000003;
00294   while ((LPC_USB->USBDevIntSt & EP_RLZED_INT) == 0);
00295   LPC_USB->USBDevIntClr = EP_RLZED_INT;
00296 }
00297
00298
00299 /*
00300  *  Configure USB Endpoint according to Descriptor
00301  *    Parameters:      pEPD:  Pointer to Endpoint Descriptor
00302  *    Return Value:    None
00303  */
00304
00305 void USB_ConfigEP (USB_ENDPOINT_DESCRIPTOR *pEPD) {
00306   uint32_t num;
00307
00308   num = EPAdr(pEPD->bEndpointAddress);
00309   LPC_USB->USBReEp |= (1 << num);
00310   LPC_USB->USBEpInd = num;
00311   LPC_USB->USBMaxPSize = pEPD->wMaxPacketSize;
00312   while ((LPC_USB->USBDevIntSt & EP_RLZED_INT) == 0);
00313   LPC_USB->USBDevIntClr = EP_RLZED_INT;
00314 }
00315
00316
00317 /*
00318  *  Set Direction for USB Control Endpoint
00319  *    Parameters:      dir:   Out (dir == 0), In (dir <> 0)
00320  *    Return Value:    None
00321  */
00322
00323 void USB_DirCtrlEP (uint32_t dir) {
00324   /* Not needed */
00325 }
00326
00327
00328 /*
00329  *  Enable USB Endpoint
00330  *    Parameters:      EPNum: Endpoint Number
00331  *                       EPNum.0..3: Address
00332  *                       EPNum.7:    Dir
00333  *    Return Value:    None
00334  */
00335
00336 void USB_EnableEP (uint32_t EPNum) {
00337   WrCmdDat(CMD_SET_EP_STAT(EPAdr(EPNum)), DAT_WR_BYTE(0));
00338 }
00339
00340
00341 /*
00342  *  Disable USB Endpoint
00343  *    Parameters:      EPNum: Endpoint Number
00344  *                       EPNum.0..3: Address
00345  *                       EPNum.7:    Dir
00346  *    Return Value:    None
00347  */
00348
00349 void USB_DisableEP (uint32_t EPNum) {
00350   WrCmdDat(CMD_SET_EP_STAT(EPAdr(EPNum)), DAT_WR_BYTE(EP_STAT_DA));
00351 }
00352
00353
00354 /*
00355  *  Reset USB Endpoint
00356  *    Parameters:      EPNum: Endpoint Number
00357  *                       EPNum.0..3: Address
00358  *                       EPNum.7:    Dir
00359  *    Return Value:    None
00360  */
00361
00362 void USB_ResetEP (uint32_t EPNum) {
00363   WrCmdDat(CMD_SET_EP_STAT(EPAdr(EPNum)), DAT_WR_BYTE(0));
00364 }
00365
00366
00367 /*
00368  *  Set Stall for USB Endpoint
00369  *    Parameters:      EPNum: Endpoint Number
00370  *                       EPNum.0..3: Address
00371  *                       EPNum.7:    Dir
00372  *    Return Value:    None
00373  */
00374
00375 void USB_SetStallEP (uint32_t EPNum) {
00376   WrCmdDat(CMD_SET_EP_STAT(EPAdr(EPNum)), DAT_WR_BYTE(EP_STAT_ST));
00377 }
00378
00379
00380 /*
00381  *  Clear Stall for USB Endpoint
00382  *    Parameters:      EPNum: Endpoint Number
00383  *                       EPNum.0..3: Address
00384  *                       EPNum.7:    Dir
00385  *    Return Value:    None
00386  */
00387
00388 void USB_ClrStallEP (uint32_t EPNum) {
00389   WrCmdDat(CMD_SET_EP_STAT(EPAdr(EPNum)), DAT_WR_BYTE(0));
00390 }
00391
00392
00393 /*
00394  *  Read USB Endpoint Data
00395  *    Parameters:      EPNum: Endpoint Number
00396  *                       EPNum.0..3: Address
00397  *                       EPNum.7:    Dir
00398  *                     pData: Pointer to Data Buffer
00399  *    Return Value:    Number of bytes read
00400  */
00401
00402 uint32_t USB_ReadEP (uint32_t EPNum, uint8_t *pData) {
00403   uint32_t cnt, n;
00404
00405   LPC_USB->USBCtrl = ((EPNum & 0x0F) << 2) | CTRL_RD_EN;
00406
00407   do {
00408     cnt = LPC_USB->USBRxPLen;
00409   } while ((cnt & PKT_RDY) == 0);
00410   cnt &= PKT_LNGTH_MASK;
00411
00412   for (n = 0; n < (cnt + 3) / 4; n++) {
00413     *((__packed uint32_t *)pData) = LPC_USB->USBRxData;
00414     pData += 4;
00415   }
00416   LPC_USB->USBCtrl = 0;
00417
00418   if (((EP_MSK_ISO >> EPNum) & 1) == 0) {   /* Non-Isochronous Endpoint */
00419     WrCmd(CMD_SEL_EP(EPAdr(EPNum)));
00420     WrCmd(CMD_CLR_BUF);
00421   }
00422   return (cnt);
00423 }
00424
00425
00426 /*
00427  *  Write USB Endpoint Data
00428  *    Parameters:      EPNum: Endpoint Number
00429  *                       EPNum.0..3: Address
00430  *                       EPNum.7:    Dir
00431  *                     pData: Pointer to Data Buffer
00432  *                     cnt:   Number of bytes to write
00433  *    Return Value:    Number of bytes written
00434  */
00435
00436 uint32_t USB_WriteEP (uint32_t EPNum, uint8_t *pData, uint32_t cnt) {
00437   uint32_t n;
00438
00439   LPC_USB->USBCtrl = ((EPNum & 0x0F) << 2) | CTRL_WR_EN;
00440
00441   LPC_USB->USBTxPLen = cnt;
00442
00443   for (n = 0; n < (cnt + 3) / 4; n++) {
00444           LPC_USB->USBTxData = *((__packed uint32_t *)pData);
00445     pData += 4;
00446   }
00447   LPC_USB->USBCtrl = 0;
00448
00449   WrCmd(CMD_SEL_EP(EPAdr(EPNum)));
00450   WrCmd(CMD_VALID_BUF);
00451   return (cnt);
00452 }
00453
00454
00455 #if USB_DMA
00456
00457
00458 /* DMA Descriptor Memory Layout */
00459 const uint32_t DDAdr[2] = { DD_NISO_ADR, DD_ISO_ADR };
00460 const uint32_t DDSz [2] = { 16,          20         };
00461
00462
00463 /*
00464  *  Setup USB DMA Transfer for selected Endpoint
00465  *    Parameters:      EPNum: Endpoint Number
00466  *                     pDD: Pointer to DMA Descriptor
00467  *    Return Value:    TRUE - Success, FALSE - Error
00468  */
00469
00470 uint32_t USB_DMA_Setup(uint32_t EPNum, USB_DMA_DESCRIPTOR *pDD) {
00471   uint32_t num, ptr, nxt, iso, n;
00472   uint32_t *tmp;
00473
00474   iso = pDD->Cfg.Type.IsoEP;                /* Iso or Non-Iso Descriptor */
00475   num = EPAdr(EPNum);                       /* Endpoint's Physical Address */
00476
00477   ptr = 0;                                  /* Current Descriptor */
00478   nxt = udca[num];                          /* Initial Descriptor */
00479   while (nxt) {                             /* Go through Descriptor List */
00480     ptr = nxt;                              /* Current Descriptor */
00481     if (!pDD->Cfg.Type.Link) {              /* Check for Linked Descriptors */
00482       n = (ptr - DDAdr[iso]) / DDSz[iso];   /* Descriptor Index */
00483       DDMemMap[iso] &= ~(1 << n);           /* Unmark Memory Usage */
00484     }
00485     nxt = *((uint32_t *)ptr);                  /* Next Descriptor */
00486   }
00487
00488   for (n = 0; n < 32; n++) {                /* Search for available Memory */
00489     if ((DDMemMap[iso] & (1 << n)) == 0) {
00490       break;                                /* Memory found */
00491     }
00492   }
00493   if (n == 32) return (FALSE);              /* Memory not available */
00494
00495   DDMemMap[iso] |= 1 << n;                  /* Mark Memory Usage */
00496   nxt = DDAdr[iso] + n * DDSz[iso];         /* Next Descriptor */
00497
00498   if (ptr && pDD->Cfg.Type.Link) {
00499     *((uint32_t *)(ptr + 0))  = nxt;           /* Link in new Descriptor */
00500     *((uint32_t *)(ptr + 4)) |= 0x00000004;    /* Next DD is Valid */
00501   } else {
00502     udca[num] = nxt;                        /* Save new Descriptor */
00503     UDCA[num] = nxt;                        /* Update UDCA in USB */
00504   }
00505
00506   /* Fill in DMA Descriptor */
00507   //*(((uint32_t *)nxt)++) =  0;                 /* Next DD Pointer */
00508   tmp = (uint32_t *)nxt;
00509   *tmp++ = 0;
00510 //  *(((uint32_t *)nxt)++) =  pDD->Cfg.Type.ATLE |
00511 //                       (pDD->Cfg.Type.IsoEP << 4) |
00512 //                       (pDD->MaxSize <<  5) |
00513 //                       (pDD->BufLen  << 16);
00514   *tmp++ =  pDD->Cfg.Type.ATLE |
00515                        (pDD->Cfg.Type.IsoEP << 4) |
00516                        (pDD->MaxSize <<  5) |
00517                        (pDD->BufLen  << 16);
00518 //  *(((uint32_t *)nxt)++) =  pDD->BufAdr;
00519   *tmp++ =  pDD->BufAdr;
00520 //  *(((uint32_t *)nxt)++) =  pDD->Cfg.Type.LenPos << 8;
00521   *tmp++ =  pDD->Cfg.Type.LenPos << 8;
00522   if (iso) {
00523 //    *((uint32_t *)nxt) =  pDD->InfoAdr;
00524           *tmp =  pDD->InfoAdr;
00525   }
00526
00527   return (TRUE); /* Success */
00528 }
00529
00530
00531 /*
00532  *  Enable USB DMA Endpoint
00533  *    Parameters:      EPNum: Endpoint Number
00534  *                       EPNum.0..3: Address
00535  *                       EPNum.7:    Dir
00536  *    Return Value:    None
00537  */
00538
00539 void USB_DMA_Enable (uint32_t EPNum) {
00540         LPC_USB->USBEpDMAEn = 1 << EPAdr(EPNum);
00541 }
00542
00543
00544 /*
00545  *  Disable USB DMA Endpoint
00546  *    Parameters:      EPNum: Endpoint Number
00547  *                       EPNum.0..3: Address
00548  *                       EPNum.7:    Dir
00549  *    Return Value:    None
00550  */
00551
00552 void USB_DMA_Disable (uint32_t EPNum) {
00553         LPC_USB->USBEpDMADis = 1 << EPAdr(EPNum);
00554 }
00555
00556
00557 /*
00558  *  Get USB DMA Endpoint Status
00559  *    Parameters:      EPNum: Endpoint Number
00560  *                       EPNum.0..3: Address
00561  *                       EPNum.7:    Dir
00562  *    Return Value:    DMA Status
00563  */
00564
00565 uint32_t USB_DMA_Status (uint32_t EPNum) {
00566   uint32_t ptr, val;
00567
00568   ptr = UDCA[EPAdr(EPNum)];                 /* Current Descriptor */
00569   if (ptr == 0) return (USB_DMA_INVALID);
00570
00571   val = *((uint32_t *)(ptr + 3*4));            /* Status Information */
00572   switch ((val >> 1) & 0x0F) {
00573     case 0x00:                              /* Not serviced */
00574       return (USB_DMA_IDLE);
00575     case 0x01:                              /* Being serviced */
00576       return (USB_DMA_BUSY);
00577     case 0x02:                              /* Normal Completition */
00578       return (USB_DMA_DONE);
00579     case 0x03:                              /* Data Under Run */
00580       return (USB_DMA_UNDER_RUN);
00581     case 0x08:                              /* Data Over Run */
00582       return (USB_DMA_OVER_RUN);
00583     case 0x09:                              /* System Error */
00584       return (USB_DMA_ERROR);
00585   }
00586
00587   return (USB_DMA_UNKNOWN);
00588 }
00589
00590
00591 /*
00592  *  Get USB DMA Endpoint Current Buffer Address
00593  *    Parameters:      EPNum: Endpoint Number
00594  *                       EPNum.0..3: Address
00595  *                       EPNum.7:    Dir
00596  *    Return Value:    DMA Address (or -1 when DMA is Invalid)
00597  */
00598
00599 uint32_t USB_DMA_BufAdr (uint32_t EPNum) {
00600   uint32_t ptr, val;
00601
00602   ptr = UDCA[EPAdr(EPNum)];                 /* Current Descriptor */
00603   if (ptr == 0)
00604   {
00605         return ((uint32_t)(-1));                /* DMA Invalid */
00606   }
00607
00608   val = *((uint32_t *)(ptr + 2*4));         /* Buffer Address */
00609   return (val);                             /* Current Address */
00610 }
00611
00612
00613 /*
00614  *  Get USB DMA Endpoint Current Buffer Count
00615  *   Number of transfered Bytes or Iso Packets
00616  *    Parameters:      EPNum: Endpoint Number
00617  *                       EPNum.0..3: Address
00618  *                       EPNum.7:    Dir
00619  *    Return Value:    DMA Count (or -1 when DMA is Invalid)
00620  */
00621
00622 uint32_t USB_DMA_BufCnt (uint32_t EPNum) {
00623   uint32_t ptr, val;
00624
00625   ptr = UDCA[EPAdr(EPNum)];                 /* Current Descriptor */
00626   if (ptr == 0)
00627   {
00628         return ((uint32_t)(-1));                /* DMA Invalid */
00629   }
00630   val = *((uint32_t *)(ptr + 3*4));         /* Status Information */
00631   return (val >> 16);                       /* Current Count */
00632 }
00633
00634
00635 #endif /* USB_DMA */
00636
00637
00638 /*
00639  *  Get USB Last Frame Number
00640  *    Parameters:      None
00641  *    Return Value:    Frame Number
00642  */
00643
00644 uint32_t USB_GetFrame (void) {
00645   uint32_t val;
00646
00647   WrCmd(CMD_RD_FRAME);
00648   val = RdCmdDat(DAT_RD_FRAME);
00649   val = val | (RdCmdDat(DAT_RD_FRAME) << 8);
00650
00651   return (val);
00652 }
00653
00654
00655 /*
00656  *  USB Interrupt Service Routine
00657  */
00658
00659 void USB_IRQHandler (void) {
00660   uint32_t disr, val, n, m;
00661
00662   disr = LPC_USB->USBDevIntSt;                      /* Device Interrupt Status */
00663   LPC_USB->USBDevIntClr = disr;
00664
00665   /* Device Status Interrupt (Reset, Connect change, Suspend/Resume) */
00666   if (disr & DEV_STAT_INT) {
00667     WrCmd(CMD_GET_DEV_STAT);
00668     val = RdCmdDat(DAT_GET_DEV_STAT);       /* Device Status */
00669     if (val & DEV_RST) {                    /* Reset */
00670       USB_Reset();
00671 #if   USB_RESET_EVENT
00672       USB_Reset_Event();
00673 #endif
00674     }
00675     if (val & DEV_CON_CH) {                 /* Connect change */
00676 #if   USB_POWER_EVENT
00677       USB_Power_Event(val & DEV_CON);
00678 #endif
00679     }
00680     if (val & DEV_SUS_CH) {                 /* Suspend/Resume */
00681       if (val & DEV_SUS) {                  /* Suspend */
00682         USB_Suspend();
00683 #if     USB_SUSPEND_EVENT
00684         USB_Suspend_Event();
00685 #endif
00686       } else {                              /* Resume */
00687         USB_Resume();
00688 #if     USB_RESUME_EVENT
00689         USB_Resume_Event();
00690 #endif
00691       }
00692     }
00693     goto isr_end;
00694   }
00695
00696 #if USB_SOF_EVENT
00697   /* Start of Frame Interrupt */
00698   if (disr & FRAME_INT) {
00699     USB_SOF_Event();
00700   }
00701 #endif
00702
00703 #if USB_ERROR_EVENT
00704   /* Error Interrupt */
00705   if (disr & ERR_INT) {
00706     WrCmd(CMD_RD_ERR_STAT);
00707     val = RdCmdDat(DAT_RD_ERR_STAT);
00708     USB_Error_Event(val);
00709   }
00710 #endif
00711
00712   /* Endpoint's Slow Interrupt */
00713   if (disr & EP_SLOW_INT) {
00714     while (LPC_USB->USBEpIntSt) {                   /* Endpoint Interrupt Status */
00715
00716       for (n = 0; n < USB_EP_NUM; n++) {    /* Check All Endpoints */
00717         if (LPC_USB->USBEpIntSt & (1 << n)) {
00718           m = n >> 1;
00719           LPC_USB->USBEpIntClr = 1 << n;
00720           while ((LPC_USB->USBDevIntSt & CDFULL_INT) == 0);
00721           val = LPC_USB->USBCmdData;
00722
00723           if ((n & 1) == 0) {               /* OUT Endpoint */
00724             if (n == 0) {                   /* Control OUT Endpoint */
00725               if (val & EP_SEL_STP) {       /* Setup Packet */
00726                 if (USB_P_EP[0]) {
00727                   USB_P_EP[0](USB_EVT_SETUP);
00728                   continue;
00729                 }
00730               }
00731             }
00732             if (USB_P_EP[m]) {
00733               USB_P_EP[m](USB_EVT_OUT);
00734             }
00735           } else {                          /* IN Endpoint */
00736             if (USB_P_EP[m]) {
00737               USB_P_EP[m](USB_EVT_IN);
00738             }
00739           }
00740         }
00741       }
00742     }
00743   }
00744
00745 #if USB_DMA
00746
00747   if (LPC_USB->USBDMAIntSt & 0x00000001) {          /* End of Transfer Interrupt */
00748     val = LPC_USB->USBEoTIntSt;
00749     for (n = 2; n < USB_EP_NUM; n++) {      /* Check All Endpoints */
00750       if (val & (1 << n)) {
00751         m = n >> 1;
00752         if ((n & 1) == 0) {                 /* OUT Endpoint */
00753           if (USB_P_EP[m]) {
00754             USB_P_EP[m](USB_EVT_OUT_DMA_EOT);
00755           }
00756         } else {                            /* IN Endpoint */
00757           if (USB_P_EP[m]) {
00758             USB_P_EP[m](USB_EVT_IN_DMA_EOT);
00759           }
00760         }
00761       }
00762     }
00763     LPC_USB->USBEoTIntClr = val;
00764   }
00765
00766   if (LPC_USB->USBDMAIntSt & 0x00000002) {          /* New DD Request Interrupt */
00767     val = LPC_USB->USBNDDRIntSt;
00768     for (n = 2; n < USB_EP_NUM; n++) {      /* Check All Endpoints */
00769       if (val & (1 << n)) {
00770         m = n >> 1;
00771         if ((n & 1) == 0) {                 /* OUT Endpoint */
00772           if (USB_P_EP[m]) {
00773             USB_P_EP[m](USB_EVT_OUT_DMA_NDR);
00774           }
00775         } else {                            /* IN Endpoint */
00776           if (USB_P_EP[m]) {
00777             USB_P_EP[m](USB_EVT_IN_DMA_NDR);
00778           }
00779         }
00780       }
00781     }
00782     LPC_USB->USBNDDRIntClr = val;
00783   }
00784
00785   if (LPC_USB->USBDMAIntSt & 0x00000004) {          /* System Error Interrupt */
00786     val = LPC_USB->USBSysErrIntSt;
00787     for (n = 2; n < USB_EP_NUM; n++) {      /* Check All Endpoints */
00788       if (val & (1 << n)) {
00789         m = n >> 1;
00790         if ((n & 1) == 0) {                 /* OUT Endpoint */
00791           if (USB_P_EP[m]) {
00792             USB_P_EP[m](USB_EVT_OUT_DMA_ERR);
00793           }
00794         } else {                            /* IN Endpoint */
00795           if (USB_P_EP[m]) {
00796             USB_P_EP[m](USB_EVT_IN_DMA_ERR);
00797           }
00798         }
00799       }
00800     }
00801     LPC_USB->USBSysErrIntClr = val;
00802   }
00803
00804 #endif /* USB_DMA */
00805
00806 isr_end:
00807   return;
00808 }
Generated on Tue Jun 7 14:59:04 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBMassStorage/usbhw.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBMassStorage/usbhw.h

Go to the documentation of this file.
00001 /*----------------------------------------------------------------------------
00002  *      U S B  -  K e r n e l
00003  *----------------------------------------------------------------------------
00004  *      Name:    USBHW.H
00005  *      Purpose: USB Hardware Layer Definitions
00006  *      Version: V1.10
00007  *----------------------------------------------------------------------------
00008  *      This software is supplied "AS IS" without any warranties, express,
00009  *      implied or statutory, including but not limited to the implied
00010  *      warranties of fitness for purpose, satisfactory quality and
00011  *      noninfringement. Keil extends you a royalty-free right to reproduce
00012  *      and distribute executable files created using this software for use
00013  *      on NXP Semiconductors LPC family microcontroller devices only. Nothing
00014  *      else gives you the right to use this software.
00015  *
00016  *      Copyright (c) 2005-2009 Keil Software.
00017  *---------------------------------------------------------------------------*/
00018
00019 #ifndef __USBHW_H__
00020 #define __USBHW_H__
00021
00022
00023 /* USB RAM Definitions */
00024 #define USB_RAM_ADR     0x20080000  /* USB RAM Start Address */
00025 #define USB_RAM_SZ      0x00004000  /* USB RAM Size (4kB) */
00026
00027 /* DMA Endpoint Descriptors */
00028 #define DD_NISO_CNT             16  /* Non-Iso EP DMA Descr. Count (max. 32) */
00029 #define DD_ISO_CNT               8  /* Iso EP DMA Descriptor Count (max. 32) */
00030 #define DD_NISO_SZ    (DD_NISO_CNT * 16)    /* Non-Iso DMA Descr. Size */
00031 #define DD_ISO_SZ     (DD_ISO_CNT  * 20)    /* Iso DMA Descriptor Size */
00032 #define DD_NISO_ADR   (USB_RAM_ADR + 128)   /* Non-Iso DMA Descr. Address */
00033 #define DD_ISO_ADR    (DD_NISO_ADR + DD_NISO_SZ) /* Iso DMA Descr. Address */
00034 #define DD_SZ                 (128 + DD_NISO_SZ + DD_ISO_SZ) /* Descr. Size */
00035
00036 /* DMA Buffer Memory Definitions */
00037 #define DMA_BUF_ADR   (USB_RAM_ADR + DD_SZ) /* DMA Buffer Start Address */
00038 #define DMA_BUF_SZ    (USB_RAM_SZ  - DD_SZ) /* DMA Buffer Size */
00039
00040 /* USB Error Codes */
00041 #define USB_ERR_PID         0x0001  /* PID Error */
00042 #define USB_ERR_UEPKT       0x0002  /* Unexpected Packet */
00043 #define USB_ERR_DCRC        0x0004  /* Data CRC Error */
00044 #define USB_ERR_TIMOUT      0x0008  /* Bus Time-out Error */
00045 #define USB_ERR_EOP         0x0010  /* End of Packet Error */
00046 #define USB_ERR_B_OVRN      0x0020  /* Buffer Overrun */
00047 #define USB_ERR_BTSTF       0x0040  /* Bit Stuff Error */
00048 #define USB_ERR_TGL         0x0080  /* Toggle Bit Error */
00049
00050 /* USB DMA Status Codes */
00051 #define USB_DMA_INVALID     0x0000  /* DMA Invalid - Not Configured */
00052 #define USB_DMA_IDLE        0x0001  /* DMA Idle - Waiting for Trigger */
00053 #define USB_DMA_BUSY        0x0002  /* DMA Busy - Transfer in progress */
00054 #define USB_DMA_DONE        0x0003  /* DMA Transfer Done (no Errors)*/
00055 #define USB_DMA_OVER_RUN    0x0004  /* Data Over Run */
00056 #define USB_DMA_UNDER_RUN   0x0005  /* Data Under Run (Short Packet) */
00057 #define USB_DMA_ERROR       0x0006  /* Error */
00058 #define USB_DMA_UNKNOWN     0xFFFF  /* Unknown State */
00059
00060 /* USB DMA Descriptor */
00061 typedef struct _USB_DMA_DESCRIPTOR {
00062   uint32_t BufAdr;                     /* DMA Buffer Address */
00063   uint16_t  BufLen;                     /* DMA Buffer Length */
00064   uint16_t  MaxSize;                    /* Maximum Packet Size */
00065   uint32_t InfoAdr;                    /* Packet Info Memory Address */
00066   union {                           /* DMA Configuration */
00067     struct {
00068       uint32_t Link   : 1;             /* Link to existing Descriptors */
00069       uint32_t IsoEP  : 1;             /* Isonchronous Endpoint */
00070       uint32_t ATLE   : 1;             /* ATLE (Auto Transfer Length Extract) */
00071       uint32_t Rsrvd  : 5;             /* Reserved */
00072       uint32_t LenPos : 8;             /* Length Position (ATLE) */
00073     } Type;
00074     uint32_t Val;
00075   } Cfg;
00076 } USB_DMA_DESCRIPTOR;
00077
00078 /* USB Hardware Functions */
00079 extern void  USB_Init       (void);
00080 extern void  USB_Connect    (uint32_t  con);
00081 extern void  USB_Reset      (void);
00082 extern void  USB_Suspend    (void);
00083 extern void  USB_Resume     (void);
00084 extern void  USB_WakeUp     (void);
00085 extern void  USB_WakeUpCfg  (uint32_t  cfg);
00086 extern void  USB_SetAddress (uint32_t adr);
00087 extern void  USB_Configure  (uint32_t  cfg);
00088 extern void  USB_ConfigEP   (USB_ENDPOINT_DESCRIPTOR *pEPD);
00089 extern void  USB_DirCtrlEP  (uint32_t dir);
00090 extern void  USB_EnableEP   (uint32_t EPNum);
00091 extern void  USB_DisableEP  (uint32_t EPNum);
00092 extern void  USB_ResetEP    (uint32_t EPNum);
00093 extern void  USB_SetStallEP (uint32_t EPNum);
00094 extern void  USB_ClrStallEP (uint32_t EPNum);
00095 extern uint32_t USB_ReadEP     (uint32_t EPNum, uint8_t *pData);
00096 extern uint32_t USB_WriteEP    (uint32_t EPNum, uint8_t *pData, uint32_t cnt);
00097 extern uint32_t  USB_DMA_Setup  (uint32_t EPNum, USB_DMA_DESCRIPTOR *pDD);
00098 extern void  USB_DMA_Enable (uint32_t EPNum);
00099 extern void  USB_DMA_Disable(uint32_t EPNum);
00100 extern uint32_t USB_DMA_Status (uint32_t EPNum);
00101 extern uint32_t USB_DMA_BufAdr (uint32_t EPNum);
00102 extern uint32_t USB_DMA_BufCnt (uint32_t EPNum);
00103 extern uint32_t USB_GetFrame   (void);
00104 extern void  USB_IRQHandler (void);
00105
00106
00107 #endif  /* __USBHW_H__ */
Generated on Tue Jun 7 14:59:04 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBMassStorage/usbreg.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBMassStorage/usbreg.h

Go to the documentation of this file.
00001 /*----------------------------------------------------------------------------
00002  *      U S B  -  K e r n e l
00003  *----------------------------------------------------------------------------
00004  *      Name:    USBREG.H
00005  *      Purpose: USB Hardware Layer Definitions for NXP Semiconductors LPC
00006  *      family MCUs
00007  *      Version: V1.10
00008  *----------------------------------------------------------------------------
00009  *      This software is supplied "AS IS" without any warranties, express,
00010  *      implied or statutory, including but not limited to the implied
00011  *      warranties of fitness for purpose, satisfactory quality and
00012  *      noninfringement. Keil extends you a royalty-free right to reproduce
00013  *      and distribute executable files created using this software for use
00014  *      on NXP Semiconductors LPC family microcontroller devices only. Nothing
00015  *      else gives you the right to use this software.
00016  *
00017  *      Copyright (c) 2005-2009 Keil Software.
00018  *---------------------------------------------------------------------------*/
00019
00020 #ifndef __USBREG_H
00021 #define __USBREG_H
00022
00023 /* Device Interrupt Bit Definitions */
00024 #define FRAME_INT           0x00000001
00025 #define EP_FAST_INT         0x00000002
00026 #define EP_SLOW_INT         0x00000004
00027 #define DEV_STAT_INT        0x00000008
00028 #define CCEMTY_INT          0x00000010
00029 #define CDFULL_INT          0x00000020
00030 #define RxENDPKT_INT        0x00000040
00031 #define TxENDPKT_INT        0x00000080
00032 #define EP_RLZED_INT        0x00000100
00033 #define ERR_INT             0x00000200
00034
00035 /* Rx & Tx Packet Length Definitions */
00036 #define PKT_LNGTH_MASK      0x000003FF
00037 #define PKT_DV              0x00000400
00038 #define PKT_RDY             0x00000800
00039
00040 /* USB Control Definitions */
00041 #define CTRL_RD_EN          0x00000001
00042 #define CTRL_WR_EN          0x00000002
00043
00044 /* Command Codes */
00045 #define CMD_SET_ADDR        0x00D00500
00046 #define CMD_CFG_DEV         0x00D80500
00047 #define CMD_SET_MODE        0x00F30500
00048 #define CMD_RD_FRAME        0x00F50500
00049 #define DAT_RD_FRAME        0x00F50200
00050 #define CMD_RD_TEST         0x00FD0500
00051 #define DAT_RD_TEST         0x00FD0200
00052 #define CMD_SET_DEV_STAT    0x00FE0500
00053 #define CMD_GET_DEV_STAT    0x00FE0500
00054 #define DAT_GET_DEV_STAT    0x00FE0200
00055 #define CMD_GET_ERR_CODE    0x00FF0500
00056 #define DAT_GET_ERR_CODE    0x00FF0200
00057 #define CMD_RD_ERR_STAT     0x00FB0500
00058 #define DAT_RD_ERR_STAT     0x00FB0200
00059 #define DAT_WR_BYTE(x)     (0x00000100 | ((x) << 16))
00060 #define CMD_SEL_EP(x)      (0x00000500 | ((x) << 16))
00061 #define DAT_SEL_EP(x)      (0x00000200 | ((x) << 16))
00062 #define CMD_SEL_EP_CLRI(x) (0x00400500 | ((x) << 16))
00063 #define DAT_SEL_EP_CLRI(x) (0x00400200 | ((x) << 16))
00064 #define CMD_SET_EP_STAT(x) (0x00400500 | ((x) << 16))
00065 #define CMD_CLR_BUF         0x00F20500
00066 #define DAT_CLR_BUF         0x00F20200
00067 #define CMD_VALID_BUF       0x00FA0500
00068
00069 /* Device Address Register Definitions */
00070 #define DEV_ADDR_MASK       0x7F
00071 #define DEV_EN              0x80
00072
00073 /* Device Configure Register Definitions */
00074 #define CONF_DVICE          0x01
00075
00076 /* Device Mode Register Definitions */
00077 #define AP_CLK              0x01
00078 #define INAK_CI             0x02
00079 #define INAK_CO             0x04
00080 #define INAK_II             0x08
00081 #define INAK_IO             0x10
00082 #define INAK_BI             0x20
00083 #define INAK_BO             0x40
00084
00085 /* Device Status Register Definitions */
00086 #define DEV_CON             0x01
00087 #define DEV_CON_CH          0x02
00088 #define DEV_SUS             0x04
00089 #define DEV_SUS_CH          0x08
00090 #define DEV_RST             0x10
00091
00092 /* Error Code Register Definitions */
00093 #define ERR_EC_MASK         0x0F
00094 #define ERR_EA              0x10
00095
00096 /* Error Status Register Definitions */
00097 #define ERR_PID             0x01
00098 #define ERR_UEPKT           0x02
00099 #define ERR_DCRC            0x04
00100 #define ERR_TIMOUT          0x08
00101 #define ERR_EOP             0x10
00102 #define ERR_B_OVRN          0x20
00103 #define ERR_BTSTF           0x40
00104 #define ERR_TGL             0x80
00105
00106 /* Endpoint Select Register Definitions */
00107 #define EP_SEL_F            0x01
00108 #define EP_SEL_ST           0x02
00109 #define EP_SEL_STP          0x04
00110 #define EP_SEL_PO           0x08
00111 #define EP_SEL_EPN          0x10
00112 #define EP_SEL_B_1_FULL     0x20
00113 #define EP_SEL_B_2_FULL     0x40
00114
00115 /* Endpoint Status Register Definitions */
00116 #define EP_STAT_ST          0x01
00117 #define EP_STAT_DA          0x20
00118 #define EP_STAT_RF_MO       0x40
00119 #define EP_STAT_CND_ST      0x80
00120
00121 /* Clear Buffer Register Definitions */
00122 #define CLR_BUF_PO          0x01
00123
00124
00125 /* DMA Interrupt Bit Definitions */
00126 #define EOT_INT             0x01
00127 #define NDD_REQ_INT         0x02
00128 #define SYS_ERR_INT         0x04
00129
00130
00131 #endif  /* __USBREG_H */
Generated on Tue Jun 7 14:59:05 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBMassStorage/usbuser.c Source File

C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBMassStorage/usbuser.c

Go to the documentation of this file.
00001 /*----------------------------------------------------------------------------
00002  *      U S B  -  K e r n e l
00003  *----------------------------------------------------------------------------
00004  *      Name:    USBUSER.C
00005  *      Purpose: USB Custom User Module
00006  *      Version: V1.10
00007  *----------------------------------------------------------------------------
00008  *      This software is supplied "AS IS" without any warranties, express,
00009  *      implied or statutory, including but not limited to the implied
00010  *      warranties of fitness for purpose, satisfactory quality and
00011  *      noninfringement. Keil extends you a royalty-free right to reproduce
00012  *      and distribute executable files created using this software for use
00013  *      on NXP Semiconductors LPC family microcontroller devices only. Nothing
00014  *      else gives you the right to use this software.
00015  *
00016  *      Copyright (c) 2005-2009 Keil Software.
00017  *---------------------------------------------------------------------------*/
00018
00019 #include "LPC17xx.h"
00020 #include "lpc_types.h"
00021
00022 #include "usb.h"
00023 #include "usbcfg.h"
00024 #include "usbhw.h"
00025 #include "usbcore.h"
00026 #include "usbuser.h"
00027 #include "mscuser.h"
00028
00029 #include "memory.h"
00030
00031
00032 /*
00033  *  USB Power Event Callback
00034  *   Called automatically on USB Power Event
00035  *    Parameter:       power: On(TRUE)/Off(FALSE)
00036  */
00037
00038 #if USB_POWER_EVENT
00039 void USB_Power_Event (uint32_t  power) {
00040 }
00041 #endif
00042
00043
00044 /*
00045  *  USB Reset Event Callback
00046  *   Called automatically on USB Reset Event
00047  */
00048
00049 #if USB_RESET_EVENT
00050 void USB_Reset_Event (void) {
00051   USB_ResetCore();
00052 }
00053 #endif
00054
00055
00056 /*
00057  *  USB Suspend Event Callback
00058  *   Called automatically on USB Suspend Event
00059  */
00060
00061 #if USB_SUSPEND_EVENT
00062 void USB_Suspend_Event (void) {
00063 }
00064 #endif
00065
00066
00067 /*
00068  *  USB Resume Event Callback
00069  *   Called automatically on USB Resume Event
00070  */
00071
00072 #if USB_RESUME_EVENT
00073 void USB_Resume_Event (void) {
00074 }
00075 #endif
00076
00077
00078 /*
00079  *  USB Remote Wakeup Event Callback
00080  *   Called automatically on USB Remote Wakeup Event
00081  */
00082
00083 #if USB_WAKEUP_EVENT
00084 void USB_WakeUp_Event (void) {
00085 }
00086 #endif
00087
00088
00089 /*
00090  *  USB Start of Frame Event Callback
00091  *   Called automatically on USB Start of Frame Event
00092  */
00093
00094 #if USB_SOF_EVENT
00095 void USB_SOF_Event (void) {
00096 }
00097 #endif
00098
00099
00100 /*
00101  *  USB Error Event Callback
00102  *   Called automatically on USB Error Event
00103  *    Parameter:       error: Error Code
00104  */
00105
00106 #if USB_ERROR_EVENT
00107 void USB_Error_Event (uint32_t error) {
00108 }
00109 #endif
00110
00111
00112 /*
00113  *  USB Set Configuration Event Callback
00114  *   Called automatically on USB Set Configuration Request
00115  */
00116
00117 #if USB_CONFIGURE_EVENT
00118 void USB_Configure_Event (void) {
00119
00120   if (USB_Configuration) {                  /* Check if USB is configured */
00121     /* add your code here */
00122   }
00123 }
00124 #endif
00125
00126
00127 /*
00128  *  USB Set Interface Event Callback
00129  *   Called automatically on USB Set Interface Request
00130  */
00131
00132 #if USB_INTERFACE_EVENT
00133 void USB_Interface_Event (void) {
00134 }
00135 #endif
00136
00137
00138 /*
00139  *  USB Set/Clear Feature Event Callback
00140  *   Called automatically on USB Set/Clear Feature Request
00141  */
00142
00143 #if USB_FEATURE_EVENT
00144 void USB_Feature_Event (void) {
00145 }
00146 #endif
00147
00148
00149 #define P_EP(n) ((USB_EP_EVENT & (1 << (n))) ? USB_EndPoint##n : NULL)
00150
00151 /* USB Endpoint Events Callback Pointers */
00152 void (* const USB_P_EP[16]) (uint32_t event) = {
00153   P_EP(0),
00154   P_EP(1),
00155   P_EP(2),
00156   P_EP(3),
00157   P_EP(4),
00158   P_EP(5),
00159   P_EP(6),
00160   P_EP(7),
00161   P_EP(8),
00162   P_EP(9),
00163   P_EP(10),
00164   P_EP(11),
00165   P_EP(12),
00166   P_EP(13),
00167   P_EP(14),
00168   P_EP(15),
00169 };
00170
00171
00172 /*
00173  *  USB Endpoint 1 Event Callback
00174  *   Called automatically on USB Endpoint 1 Event
00175  *    Parameter:       event
00176  */
00177
00178 void USB_EndPoint1 (uint32_t event) {
00179 }
00180
00181
00182 /*
00183  *  USB Endpoint 2 Event Callback
00184  *   Called automatically on USB Endpoint 2 Event
00185  *    Parameter:       event
00186  */
00187
00188 void USB_EndPoint2 (uint32_t event) {
00189
00190   switch (event) {
00191     case USB_EVT_OUT:
00192       MSC_BulkOut();
00193       break;
00194     case USB_EVT_IN:
00195       MSC_BulkIn();
00196       break;
00197   }
00198 }
00199
00200
00201 /*
00202  *  USB Endpoint 3 Event Callback
00203  *   Called automatically on USB Endpoint 3 Event
00204  *    Parameter:       event
00205  */
00206
00207 void USB_EndPoint3 (uint32_t event) {
00208 }
00209
00210
00211 /*
00212  *  USB Endpoint 4 Event Callback
00213  *   Called automatically on USB Endpoint 4 Event
00214  *    Parameter:       event
00215  */
00216
00217 void USB_EndPoint4 (uint32_t event) {
00218 }
00219
00220
00221 /*
00222  *  USB Endpoint 5 Event Callback
00223  *   Called automatically on USB Endpoint 5 Event
00224  *    Parameter:       event
00225  */
00226
00227 void USB_EndPoint5 (uint32_t event) {
00228 }
00229
00230
00231 /*
00232  *  USB Endpoint 6 Event Callback
00233  *   Called automatically on USB Endpoint 6 Event
00234  *    Parameter:       event
00235  */
00236
00237 void USB_EndPoint6 (uint32_t event) {
00238 }
00239
00240
00241 /*
00242  *  USB Endpoint 7 Event Callback
00243  *   Called automatically on USB Endpoint 7 Event
00244  *    Parameter:       event
00245  */
00246
00247 void USB_EndPoint7 (uint32_t event) {
00248 }
00249
00250
00251 /*
00252  *  USB Endpoint 8 Event Callback
00253  *   Called automatically on USB Endpoint 8 Event
00254  *    Parameter:       event
00255  */
00256
00257 void USB_EndPoint8 (uint32_t event) {
00258 }
00259
00260
00261 /*
00262  *  USB Endpoint 9 Event Callback
00263  *   Called automatically on USB Endpoint 9 Event
00264  *    Parameter:       event
00265  */
00266
00267 void USB_EndPoint9 (uint32_t event) {
00268 }
00269
00270
00271 /*
00272  *  USB Endpoint 10 Event Callback
00273  *   Called automatically on USB Endpoint 10 Event
00274  *    Parameter:       event
00275  */
00276
00277 void USB_EndPoint10 (uint32_t event) {
00278 }
00279
00280
00281 /*
00282  *  USB Endpoint 11 Event Callback
00283  *   Called automatically on USB Endpoint 11 Event
00284  *    Parameter:       event
00285  */
00286
00287 void USB_EndPoint11 (uint32_t event) {
00288 }
00289
00290
00291 /*
00292  *  USB Endpoint 12 Event Callback
00293  *   Called automatically on USB Endpoint 12 Event
00294  *    Parameter:       event
00295  */
00296
00297 void USB_EndPoint12 (uint32_t event) {
00298 }
00299
00300
00301 /*
00302  *  USB Endpoint 13 Event Callback
00303  *   Called automatically on USB Endpoint 13 Event
00304  *    Parameter:       event
00305  */
00306
00307 void USB_EndPoint13 (uint32_t event) {
00308 }
00309
00310
00311 /*
00312  *  USB Endpoint 14 Event Callback
00313  *   Called automatically on USB Endpoint 14 Event
00314  *    Parameter:       event
00315  */
00316
00317 void USB_EndPoint14 (uint32_t event) {
00318 }
00319
00320
00321 /*
00322  *  USB Endpoint 15 Event Callback
00323  *   Called automatically on USB Endpoint 15 Event
00324  *    Parameter:       event
00325  */
00326
00327 void USB_EndPoint15 (uint32_t event) {
00328 }
Generated on Tue Jun 7 14:59:05 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBMassStorage/usbuser.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBMassStorage/usbuser.h

Go to the documentation of this file.
00001 /*----------------------------------------------------------------------------
00002  *      U S B  -  K e r n e l
00003  *----------------------------------------------------------------------------
00004  *      Name:    USBUSER.H
00005  *      Purpose: USB Custom User Definitions
00006  *      Version: V1.10
00007  *----------------------------------------------------------------------------
00008  *      This software is supplied "AS IS" without any warranties, express,
00009  *      implied or statutory, including but not limited to the implied
00010  *      warranties of fitness for purpose, satisfactory quality and
00011  *      noninfringement. Keil extends you a royalty-free right to reproduce
00012  *      and distribute executable files created using this software for use
00013  *      on NXP Semiconductors LPC family microcontroller devices only. Nothing
00014  *      else gives you the right to use this software.
00015  *
00016  *      Copyright (c) 2005-2009 Keil Software.
00017  *---------------------------------------------------------------------------*/
00018
00019 #ifndef __USBUSER_H__
00020 #define __USBUSER_H__
00021
00022
00023 /* USB Device Events Callback Functions */
00024 extern void USB_Power_Event     (uint32_t  power);
00025 extern void USB_Reset_Event     (void);
00026 extern void USB_Suspend_Event   (void);
00027 extern void USB_Resume_Event    (void);
00028 extern void USB_WakeUp_Event    (void);
00029 extern void USB_SOF_Event       (void);
00030 extern void USB_Error_Event     (uint32_t error);
00031
00032 /* USB Endpoint Callback Events */
00033 #define USB_EVT_SETUP       1   /* Setup Packet */
00034 #define USB_EVT_OUT         2   /* OUT Packet */
00035 #define USB_EVT_IN          3   /*  IN Packet */
00036 #define USB_EVT_OUT_NAK     4   /* OUT Packet - Not Acknowledged */
00037 #define USB_EVT_IN_NAK      5   /*  IN Packet - Not Acknowledged */
00038 #define USB_EVT_OUT_STALL   6   /* OUT Packet - Stalled */
00039 #define USB_EVT_IN_STALL    7   /*  IN Packet - Stalled */
00040 #define USB_EVT_OUT_DMA_EOT 8   /* DMA OUT EP - End of Transfer */
00041 #define USB_EVT_IN_DMA_EOT  9   /* DMA  IN EP - End of Transfer */
00042 #define USB_EVT_OUT_DMA_NDR 10  /* DMA OUT EP - New Descriptor Request */
00043 #define USB_EVT_IN_DMA_NDR  11  /* DMA  IN EP - New Descriptor Request */
00044 #define USB_EVT_OUT_DMA_ERR 12  /* DMA OUT EP - Error */
00045 #define USB_EVT_IN_DMA_ERR  13  /* DMA  IN EP - Error */
00046
00047 /* USB Endpoint Events Callback Pointers */
00048 extern void (* const USB_P_EP[16])(uint32_t event);
00049
00050 /* USB Endpoint Events Callback Functions */
00051 extern void USB_EndPoint0  (uint32_t event);
00052 extern void USB_EndPoint1  (uint32_t event);
00053 extern void USB_EndPoint2  (uint32_t event);
00054 extern void USB_EndPoint3  (uint32_t event);
00055 extern void USB_EndPoint4  (uint32_t event);
00056 extern void USB_EndPoint5  (uint32_t event);
00057 extern void USB_EndPoint6  (uint32_t event);
00058 extern void USB_EndPoint7  (uint32_t event);
00059 extern void USB_EndPoint8  (uint32_t event);
00060 extern void USB_EndPoint9  (uint32_t event);
00061 extern void USB_EndPoint10 (uint32_t event);
00062 extern void USB_EndPoint11 (uint32_t event);
00063 extern void USB_EndPoint12 (uint32_t event);
00064 extern void USB_EndPoint13 (uint32_t event);
00065 extern void USB_EndPoint14 (uint32_t event);
00066 extern void USB_EndPoint15 (uint32_t event);
00067
00068 /* USB Core Events Callback Functions */
00069 extern void USB_Configure_Event (void);
00070 extern void USB_Interface_Event (void);
00071 extern void USB_Feature_Event   (void);
00072
00073
00074 #endif  /* __USBUSER_H__ */
Generated on Tue Jun 7 14:59:05 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/WDT/INTERRUPT/lpc17xx_libcfg.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/WDT/INTERRUPT/lpc17xx_libcfg.h

Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          lpc17xx_libcfg.h                        2010-05-21
00003 */
00026 #ifndef LPC17XX_LIBCFG_H_
00027 #define LPC17XX_LIBCFG_H_
00028
00029 #include "lpc_types.h"
00030
00031
00032 /************************** DEBUG MODE DEFINITIONS *********************************/
00033 /* Un-comment the line below to compile the library in DEBUG mode, this will expanse
00034    the "CHECK_PARAM" macro in the FW library code */
00035
00036 #define DEBUG
00037
00038
00039 /******************* PERIPHERAL FW LIBRARY CONFIGURATION DEFINITIONS ***********************/
00040
00041 /* Comment the line below to disable the specific peripheral inclusion */
00042
00043 /* DEBUG_FRAMWORK ------------------------------ */
00044 #define _DBGFWK
00045
00046 /* GPIO ------------------------------- */
00047 #define _GPIO
00048
00049 /* EXTI ------------------------------- */
00050 //#define _EXTI
00051
00052 /* UART ------------------------------- */
00053 #define _UART
00054 #define _UART0
00055 //#define _UART1
00056 //#define _UART2
00057 //#define _UART3
00058
00059 /* SPI ------------------------------- */
00060 //#define _SPI
00061
00062 /* SSP ------------------------------- */
00063 //#define _SSP
00064 //#define _SSP0
00065 //#define _SSP1
00066
00067 /* SYSTICK --------------------------- */
00068 //#define _SYSTICK
00069
00070 /* I2C ------------------------------- */
00071 //#define _I2C
00072 //#define _I2C0
00073 //#define _I2C1
00074 //#define _I2C2
00075
00076 /* TIMER ------------------------------- */
00077 //#define _TIM
00078
00079 /* WDT ------------------------------- */
00080 #define _WDT
00081
00082
00083 /* GPDMA ------------------------------- */
00084 //#define _GPDMA
00085
00086
00087 /* DAC ------------------------------- */
00088 //#define _DAC
00089
00090 /* DAC ------------------------------- */
00091 //#define _ADC
00092
00093
00094 /* PWM ------------------------------- */
00095 //#define _PWM
00096 //#define _PWM1
00097
00098 /* RTC ------------------------------- */
00099 //#define _RTC
00100
00101 /* I2S ------------------------------- */
00102 //#define _I2S
00103
00104 /* USB device ------------------------------- */
00105 //#define _USBDEV
00106 //#define _USB_DMA
00107
00108 /* QEI ------------------------------- */
00109 //#define _QEI
00110
00111 /* MCPWM ------------------------------- */
00112 //#define _MCPWM
00113
00114 /* CAN--------------------------------*/
00115 //#define _CAN
00116
00117 /* RIT ------------------------------- */
00118 //#define _RIT
00119
00120 /* EMAC ------------------------------ */
00121 //#define _EMAC
00122
00123
00124 /************************** GLOBAL/PUBLIC MACRO DEFINITIONS *********************************/
00125
00126 #ifdef  DEBUG
00127 /*******************************************************************************
00128 * @brief                The CHECK_PARAM macro is used for function's parameters check.
00129 *                               It is used only if the library is compiled in DEBUG mode.
00130 * @param[in]    expr - If expr is false, it calls check_failed() function
00131 *                       which reports the name of the source file and the source
00132 *                       line number of the call that failed.
00133 *                    - If expr is true, it returns no value.
00134 * @return               None
00135 *******************************************************************************/
00136 #define CHECK_PARAM(expr) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))
00137 #else
00138 #define CHECK_PARAM(expr)
00139 #endif /* DEBUG */
00140
00141
00142
00143 /************************** GLOBAL/PUBLIC FUNCTION DECLARATION *********************************/
00144
00145 #ifdef  DEBUG
00146 void check_failed(uint8_t *file, uint32_t line);
00147 #endif
00148
00149
00150 #endif /* LPC17XX_LIBCFG_H_ */
Generated on Tue Jun 7 14:58:58 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/WDT/RESET/lpc17xx_libcfg.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/WDT/RESET/lpc17xx_libcfg.h

Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          lpc17xx_libcfg.h                        2010-05-21
00003 */
00026 #ifndef LPC17XX_LIBCFG_H_
00027 #define LPC17XX_LIBCFG_H_
00028
00029 #include "lpc_types.h"
00030
00031
00032 /************************** DEBUG MODE DEFINITIONS *********************************/
00033 /* Un-comment the line below to compile the library in DEBUG mode, this will expanse
00034    the "CHECK_PARAM" macro in the FW library code */
00035
00036 #define DEBUG
00037
00038
00039 /******************* PERIPHERAL FW LIBRARY CONFIGURATION DEFINITIONS ***********************/
00040
00041 /* Comment the line below to disable the specific peripheral inclusion */
00042
00043 /* DEBUG_FRAMWORK ------------------------------ */
00044 #define _DBGFWK
00045
00046 /* GPIO ------------------------------- */
00047 #define _GPIO
00048
00049 /* EXTI ------------------------------- */
00050 //#define _EXTI
00051
00052 /* UART ------------------------------- */
00053 #define _UART
00054 #define _UART0
00055 //#define _UART1
00056 //#define _UART2
00057 //#define _UART3
00058
00059 /* SPI ------------------------------- */
00060 //#define _SPI
00061
00062 /* SSP ------------------------------- */
00063 //#define _SSP
00064 //#define _SSP0
00065 //#define _SSP1
00066
00067 /* SYSTICK --------------------------- */
00068 //#define _SYSTICK
00069
00070 /* I2C ------------------------------- */
00071 //#define _I2C
00072 //#define _I2C0
00073 //#define _I2C1
00074 //#define _I2C2
00075
00076 /* TIMER ------------------------------- */
00077 //#define _TIM
00078
00079 /* WDT ------------------------------- */
00080 #define _WDT
00081
00082
00083 /* GPDMA ------------------------------- */
00084 //#define _GPDMA
00085
00086
00087 /* DAC ------------------------------- */
00088 //#define _DAC
00089
00090 /* DAC ------------------------------- */
00091 //#define _ADC
00092
00093
00094 /* PWM ------------------------------- */
00095 //#define _PWM
00096 //#define _PWM1
00097
00098 /* RTC ------------------------------- */
00099 //#define _RTC
00100
00101 /* I2S ------------------------------- */
00102 //#define _I2S
00103
00104 /* USB device ------------------------------- */
00105 //#define _USBDEV
00106 //#define _USB_DMA
00107
00108 /* QEI ------------------------------- */
00109 //#define _QEI
00110
00111 /* MCPWM ------------------------------- */
00112 //#define _MCPWM
00113
00114 /* CAN--------------------------------*/
00115 //#define _CAN
00116
00117 /* RIT ------------------------------- */
00118 //#define _RIT
00119
00120 /* EMAC ------------------------------ */
00121 //#define _EMAC
00122
00123 /************************** GLOBAL/PUBLIC MACRO DEFINITIONS *********************************/
00124
00125 #ifdef  DEBUG
00126 /*******************************************************************************
00127 * @brief                The CHECK_PARAM macro is used for function's parameters check.
00128 *                               It is used only if the library is compiled in DEBUG mode.
00129 * @param[in]    expr - If expr is false, it calls check_failed() function
00130 *                       which reports the name of the source file and the source
00131 *                       line number of the call that failed.
00132 *                    - If expr is true, it returns no value.
00133 * @return               None
00134 *******************************************************************************/
00135 #define CHECK_PARAM(expr) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))
00136 #else
00137 #define CHECK_PARAM(expr)
00138 #endif /* DEBUG */
00139
00140
00141
00142 /************************** GLOBAL/PUBLIC FUNCTION DECLARATION *********************************/
00143
00144 #ifdef  DEBUG
00145 void check_failed(uint8_t *file, uint32_t line);
00146 #endif
00147
00148
00149 #endif /* LPC17XX_LIBCFG_H_ */
Generated on Tue Jun 7 14:58:58 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/ADC/Burst/adc_burst_test.c Source File

C:/nxpdrv/LPC1700CMSIS/Examples/ADC/Burst/adc_burst_test.c

Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          adc_interrupt_test.c                    2010-07-16
00003 */
00026 #include "lpc17xx_adc.h"
00027 #include "lpc17xx_libcfg.h"
00028 #include "lpc17xx_pinsel.h"
00029 #include "debug_frmwrk.h"
00030 #include "lpc17xx_gpio.h"
00031
00032 /* Example group ----------------------------------------------------------- */
00038 /************************** PRIVATE DEFINITIONS ***********************/
00039 #define MCB_LPC_1768
00040 //#define IAR_LPC_1768
00041 #define MCB_LPC17XX_ADC_INJECT_TEST
00042
00043 #ifdef MCB_LPC_1768
00044 #define MCB_LPC_1768_ADC_BURST_MULTI
00045 #endif
00046
00047 #ifdef MCB_LPC_1768
00048 #define _ADC_INT                        ADC_ADINTEN2
00049 #define _ADC_CHANNEL            ADC_CHANNEL_2
00050
00051 #ifdef MCB_LPC_1768_ADC_BURST_MULTI
00052 #define _ADC_INT_3                      ADC_ADINTEN3
00053 #define _ADC_CHANNEL_3          ADC_CHANNEL_3
00054 #endif
00055
00056 #elif defined(IAR_LPC_1768)
00057 #define _ADC_INT                        ADC_ADINTEN5
00058 #define _ADC_CHANNEL            ADC_CHANNEL_5
00059 #endif
00060
00062 #define DMA_SIZE                8
00063
00064 #ifdef MCB_LPC17XX_ADC_INJECT_TEST
00065 #define GPIO_INT        (1<<10)
00066 #define POLL_LED        (1<<4)          // P1.28
00067 #endif
00068 /************************** PRIVATE VARIABLES *************************/
00069 uint8_t menu1[] =
00070 "********************************************************************************\n\r"
00071 "Hello NXP Semiconductors \n\r"
00072 " ADC burst demo \n\r"
00073 "\t - MCU: LPC17xx \n\r"
00074 "\t - Core: ARM CORTEX-M3 \n\r"
00075 "\t - Communicate via: UART0 - 115200 bps \n\r"
00076 " Use ADC with 12-bit resolution rate of 200KHz, running burst mode (single or multiple input)\n\r"
00077 " Display ADC value via UART0\n\r"
00078 " Turn the potentiometer to see how ADC value changes\n\r"
00079 "********************************************************************************\n\r";
00080
00081 #ifdef MCB_LPC17XX_ADC_INJECT_TEST
00082 static BOOL_8 toggle=FALSE;
00083 #endif
00084 /************************** PRIVATE FUNCTION *************************/
00085 void print_menu(void);
00086
00087 #ifdef MCB_LPC17XX_ADC_INJECT_TEST
00088 void EINT3_IRQHandler(void);
00089 #endif
00090
00091 /*----------------- INTERRUPT SERVICE ROUTINES --------------------------*/
00092 #ifdef MCB_LPC17XX_ADC_INJECT_TEST
00093 void EINT3_IRQHandler(void)
00094 {
00095           if (GPIO_GetIntStatus(1, 10, 1))
00096           {
00097                   GPIO_ClearInt(2,(1<<10));
00098                   toggle=~toggle;
00099 #ifdef MCB_LPC_1768_ADC_BURST_MULTI
00100                   if(toggle)
00101                   {
00102                           ADC_ChannelCmd(LPC_ADC,_ADC_CHANNEL_3,ENABLE);
00103                           FIO_ByteSetValue(1, 3, POLL_LED);
00104                   }
00105                   else
00106                   {
00107                           ADC_ChannelCmd(LPC_ADC,_ADC_CHANNEL_3,DISABLE);
00108                           FIO_ByteClearValue(1, 3, POLL_LED);
00109                   }
00110 #endif
00111           }
00112 }
00113 #endif
00114 /*-------------------------PRIVATE FUNCTIONS------------------------------*/
00115 /*********************************************************************/
00120 void print_menu(void)
00121 {
00122         _DBG(menu1);
00123 }
00124
00125
00126 /*-------------------------MAIN FUNCTION------------------------------*/
00127 /*********************************************************************/
00132 int c_entry(void)
00133 {
00134         PINSEL_CFG_Type PinCfg;
00135 #ifdef MCB_LPC_1768_ADC_BURST_MULTI
00136         PINSEL_CFG_Type PinCfg1;
00137 #endif
00138         uint32_t tmp;
00139         uint32_t adc_value;
00140         /* Initialize debug via UART0
00141          * – 115200bps
00142          * – 8 data bit
00143          * – No parity
00144          * – 1 stop bit
00145          * – No flow control
00146          */
00147         debug_frmwrk_init();
00148
00149         // print welcome screen
00150         print_menu();
00151
00152         /* Because the potentiometer on different boards (MCB & IAR) connect
00153          * with different ADC channel, so we have to configure correct ADC channel
00154          * on each board respectively.
00155          * If you want to check other ADC channels, you have to wire this ADC pin directly
00156          * to potentiometer pin (please see schematic doc for more reference)
00157          */
00158 #ifdef MCB_LPC_1768
00159         /*
00160          * Init ADC pin connect
00161          * AD0.2 on P0.25
00162          */
00163         PinCfg.Funcnum = 1;
00164         PinCfg.OpenDrain = 0;
00165         PinCfg.Pinmode = 0;
00166         PinCfg.Pinnum = 25;
00167         PinCfg.Portnum = 0;
00168         PINSEL_ConfigPin(&PinCfg);
00169 #ifdef MCB_LPC_1768_ADC_BURST_MULTI
00170         /*
00171          * Init ADC pin connect
00172          * AD0.3 on P0.26
00173          */
00174         PinCfg1.Funcnum = 1;
00175         PinCfg1.OpenDrain = 0;
00176         PinCfg1.Pinmode = 0;
00177         PinCfg1.Pinnum = 26;
00178         PinCfg1.Portnum = 0;
00179         PINSEL_ConfigPin(&PinCfg1);
00180 #endif
00181 #elif defined (IAR_LPC_1768)
00182         /* select P1.31 as AD0.5 */
00183         PinCfg.Funcnum = 3;
00184         PinCfg.OpenDrain = 0;
00185         PinCfg.Pinmode = 0;
00186         PinCfg.Pinnum = 31;
00187         PinCfg.Portnum = 1;
00188         PINSEL_ConfigPin(&PinCfg);
00189 #endif
00190
00191
00192         /* Configuration for ADC:
00193          *  select: ADC channel 2 (if using MCB1700 board)
00194          *              ADC channel 5 (if using IAR-LPC1768 board)
00195          *  ADC conversion rate = 200KHz
00196          */
00197         ADC_Init(LPC_ADC, 200000);
00198         ADC_ChannelCmd(LPC_ADC,_ADC_CHANNEL,ENABLE);
00199 #ifdef MCB_LPC_1768_ADC_BURST_MULTI
00200         ADC_ChannelCmd(LPC_ADC,_ADC_CHANNEL_3,ENABLE);
00201 #endif
00202
00203 #ifdef MCB_LPC17XX_ADC_INJECT_TEST
00204         FIO_ByteSetDir(1, 3, POLL_LED, 1);
00205         FIO_ByteClearValue(1, 3, POLL_LED);
00206         // Enable GPIO interrupt P2.10
00207         GPIO_IntCmd(2,(1<<10),1);
00208         NVIC_EnableIRQ(EINT3_IRQn);
00209 #endif
00210
00211         //Start burst conversion
00212         ADC_BurstCmd(LPC_ADC,ENABLE);
00213         while(1)
00214         {
00215 #ifdef MCB_LPC_1768
00216                 adc_value =  ADC_ChannelGetData(LPC_ADC,ADC_CHANNEL_2);
00217                 _DBG("ADC value on channel 2: ");
00218 #elif defined (IAR_LPC_1768)
00219                 adc_value =  ADC_ChannelGetData(LPC_ADC,ADC_CHANNEL_5);
00220                 _DBG("ADC value on channel 5: ");
00221 #endif
00222                 _DBD32(adc_value);
00223                 _DBG_("");
00224 #ifdef MCB_LPC_1768_ADC_BURST_MULTI
00225                 adc_value =  ADC_ChannelGetData(LPC_ADC,ADC_CHANNEL_3);
00226                 _DBG("ADC value on channel 3: ");
00227                 _DBD32(adc_value);
00228                 _DBG_("");
00229 #endif
00230                 // Wait for a while
00231                 for(tmp = 0; tmp < 1500000; tmp++);
00232         }
00233         ADC_DeInit(LPC_ADC);
00234         return (0);
00235 }
00236
00237 /* Support required entry point for other toolchain */
00238 int main (void)
00239 {
00240         return c_entry();
00241 }
00242 #ifdef  DEBUG
00243 /*******************************************************************************
00244 * @brief                Reports the name of the source file and the source line number
00245 *                               where the CHECK_PARAM error has occurred.
00246 * @param[in]    file Pointer to the source file name
00247 * @param[in]    line assert_param error line source number
00248 * @return               None
00249 *******************************************************************************/
00250 void check_failed(uint8_t *file, uint32_t line)
00251 {
00252         /* User can add his own implementation to report the file name and line number,
00253          ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
00254
00255         /* Infinite loop */
00256         while(1);
00257 }
00258 #endif
00259
00260 /*
00261  * @}
00262  */
Generated on Tue Jun 7 14:58:56 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/ADC/DMA/adc_dma_test.c Source File

C:/nxpdrv/LPC1700CMSIS/Examples/ADC/DMA/adc_dma_test.c

Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          adc_dma_test.c                  2010-05-21
00003 */
00026 #include "lpc17xx_adc.h"
00027 #include "lpc17xx_libcfg.h"
00028 #include "lpc17xx_pinsel.h"
00029 #include "lpc17xx_nvic.h"
00030 #include "lpc17xx_gpdma.h"
00031 #include "debug_frmwrk.h"
00032
00033 /* Example group ----------------------------------------------------------- */
00038 /************************** PRIVATE DEFINITIONS *************************/
00039 #define MCB_LPC_1768
00040 //#define IAR_LPC_1768
00041
00042 #ifdef MCB_LPC_1768
00043 #define _ADC_INT                ADC_ADINTEN2
00044 #define _ADC_CHANNEL    ADC_CHANNEL_2
00045 #elif defined(IAR_LPC_1768)
00046 #define _ADC_INT                ADC_ADINTEN5
00047 #define _ADC_CHANNEL    ADC_CHANNEL_5
00048 #endif
00049
00051 #define DMA_SIZE                1
00052
00053 /************************** PRIVATE VARIABLES *************************/
00054 uint8_t  menu1[] =
00055                 "********************************************************************************\n\r"
00056                 "Hello NXP Semiconductors \n\r"
00057                 " ADC demo \n\r"
00058                 "\t - MCU: LPC17xx \n\r"
00059                 "\t - Core: ARM CORTEX-M3 \n\r"
00060                 "\t - Communicate via: UART0 - 115200bps \n\r"
00061                 " DMA testing : ADC peripheral to memory\n\r"
00062                 " Use ADC with 12-bit resolution rate of 200KHz\n\r"
00063                 " Value ADC channel is displayed by UART, this value is taken from destination memory value of DMA function \n\r"
00064                 " Turn the potentiometer to see how ADC value changes\n\r"
00065                 "********************************************************************************\n\r";
00066 #ifdef MCB_LPC_1768
00067 uint8_t menu2[] = "ADC value on channel 2: ";
00068 #elif defined(IAR_LPC_1768)
00069 uint8_t menu2[] = "ADC value on channel 5: ";
00070 #endif
00071
00072 /* Terminal Counter flag for Channel 0 */
00073 __IO uint32_t Channel0_TC;
00074
00075 /* Error Counter flag for Channel 0 */
00076 __IO uint32_t Channel0_Err;
00077
00078 /************************** PRIVATE FUNCTION *************************/
00079 void DMA_IRQHandler (void);
00080
00081 void print_menu(void);
00082
00083 /*----------------- INTERRUPT SERVICE ROUTINES --------------------------*/
00084 /*********************************************************************/
00089 void DMA_IRQHandler (void)
00090 {
00091         // check GPDMA interrupt on channel 0
00092         if (GPDMA_IntGetStatus(GPDMA_STAT_INT, 0)){
00093                 // Check counter terminal status
00094                 if(GPDMA_IntGetStatus(GPDMA_STAT_INTTC, 0)){
00095                         // Clear terminate counter Interrupt pending
00096                         GPDMA_ClearIntPending (GPDMA_STATCLR_INTTC, 0);
00097                                 Channel0_TC++;
00098                 }
00099                 // Check error terminal status
00100                 if (GPDMA_IntGetStatus(GPDMA_STAT_INTERR, 0)){
00101                         // Clear error counter Interrupt pending
00102                         GPDMA_ClearIntPending (GPDMA_STATCLR_INTERR, 0);
00103                         Channel0_Err++;
00104                 }
00105         }
00106 }
00107
00108 /*-------------------------PRIVATE FUNCTIONS------------------------------*/
00109 /*********************************************************************/
00114 void print_menu(void)
00115 {
00116         _DBG(menu1);
00117 }
00118
00119 /*-------------------------MAIN FUNCTION------------------------------*/
00120 /*********************************************************************/
00125 int c_entry(void)
00126 {
00127         PINSEL_CFG_Type PinCfg;
00128         GPDMA_Channel_CFG_Type GPDMACfg;
00129         uint32_t adc_value, tmp;
00130
00131         /* Initialize ADC ----------------------------------------------------*/
00132
00133         /* Because the potentiometer on different boards (MCB & IAR) connect
00134          * with different ADC channel, so we have to configure correct ADC channel
00135          * on each board respectively.
00136          * If you want to check other ADC channels, you have to wire this ADC pin directly
00137          * to potentiometer pin (please see schematic doc for more reference)
00138          */
00139 #ifdef MCB_LPC_1768
00140         /* If using MCB1700 v.1 board
00141          * select P0.25 as AD0.2
00142          */
00143         PinCfg.Funcnum = 1;
00144         PinCfg.OpenDrain = 0;
00145         PinCfg.Pinmode = 0;
00146         PinCfg.Pinnum = 25;
00147         PinCfg.Portnum = 0;
00148         PINSEL_ConfigPin(&PinCfg);
00149 #elif defined(IAR_LPC_1768)
00150         /* If using IAR LPC1768 KS v.A board:
00151          * select P1.31 as AD0.5
00152          */
00153         PinCfg.Funcnum = 3;
00154         PinCfg.OpenDrain = 0;
00155         PinCfg.Pinmode = 0;
00156         PinCfg.Pinnum = 31;
00157         PinCfg.Portnum = 1;
00158         PINSEL_ConfigPin(&PinCfg);
00159 #endif
00160
00161         /* Initialize debug via UART0
00162          * – 115200bps
00163          * – 8 data bit
00164          * – No parity
00165          * – 1 stop bit
00166          * – No flow control
00167          */
00168         debug_frmwrk_init();
00169
00170         // print welcome screen
00171         print_menu();
00172
00173         /*  Configuration for ADC :
00174          *  Select: ADC channel 2 (if using MCB1700 board)
00175          *          ADC channel 5 (if using IAR-LPC1768 board)
00176          *      ADC conversion rate = 200KHz
00177          */
00178         ADC_Init(LPC_ADC, 200000);
00179         ADC_IntConfig(LPC_ADC,_ADC_INT,SET);
00180         ADC_ChannelCmd(LPC_ADC,_ADC_CHANNEL,SET);
00181
00182         /* GPDMA block section -------------------------------------------- */
00183         /* Disable GPDMA interrupt */
00184         NVIC_DisableIRQ(DMA_IRQn);
00185         /* preemption = 1, sub-priority = 1 */
00186         NVIC_SetPriority(DMA_IRQn, ((0x01<<3)|0x01));
00187
00188         /* Initialize GPDMA controller */
00189         GPDMA_Init();
00190
00191         // Setup GPDMA channel --------------------------------
00192         // channel 0
00193         GPDMACfg.ChannelNum = 0;
00194         // Source memory - unused
00195         GPDMACfg.SrcMemAddr = 0;
00196         // Destination memory
00197         GPDMACfg.DstMemAddr = (uint32_t) &adc_value;
00198         // Transfer size
00199         GPDMACfg.TransferSize = DMA_SIZE;
00200         // Transfer width - unused
00201         GPDMACfg.TransferWidth = 0;
00202         // Transfer type
00203         GPDMACfg.TransferType = GPDMA_TRANSFERTYPE_P2M;
00204         // Source connection
00205         GPDMACfg.SrcConn = GPDMA_CONN_ADC;
00206         // Destination connection - unused
00207         GPDMACfg.DstConn = 0;
00208         // Linker List Item - unused
00209         GPDMACfg.DMALLI = 0;
00210         GPDMA_Setup(&GPDMACfg);
00211
00212         /* Reset terminal counter */
00213         Channel0_TC = 0;
00214         /* Reset Error counter */
00215         Channel0_Err = 0;
00216
00217         /* Enable GPDMA interrupt */
00218         NVIC_EnableIRQ(DMA_IRQn);
00219
00220         while (1) {
00221
00222                 // Enable GPDMA channel 0
00223                 GPDMA_ChannelCmd(0, ENABLE);
00224
00225                 ADC_StartCmd(LPC_ADC,ADC_START_NOW);
00226                 /* Wait for GPDMA processing complete */;
00227                 while ((Channel0_TC == 0) );
00228
00229                 // Disable GPDMA channel 0
00230                 GPDMA_ChannelCmd(0, DISABLE);
00231
00232                 //Display the result of conversion on the UART0
00233                 _DBG(menu2);
00234                 _DBD32(ADC_DR_RESULT(adc_value));
00235                 _DBG_("");
00236
00237                 // Wait for a while
00238                 for(tmp = 0; tmp < 1000000; tmp++);
00239
00240                 /* GPDMA Re-setup */
00241                 GPDMA_Setup(&GPDMACfg);
00242
00243                 /* Reset terminal counter */
00244                 Channel0_TC = 0;
00245                 /* Reset Error counter */
00246                 Channel0_Err = 0;
00247         }
00248         ADC_DeInit(LPC_ADC);
00249         return 1;
00250 }
00251
00252 /* Support required entry point for other toolchain */
00253 int main (void)
00254 {
00255         return c_entry();
00256 }
00257
00258 #ifdef  DEBUG
00259 /*******************************************************************************
00260 * @brief                Reports the name of the source file and the source line number
00261 *                               where the CHECK_PARAM error has occurred.
00262 * @param[in]    file Pointer to the source file name
00263 * @param[in]    line assert_param error line source number
00264 * @return               None
00265 *******************************************************************************/
00266 void check_failed(uint8_t *file, uint32_t line)
00267 {
00268         /* User can add his own implementation to report the file name and line number,
00269          ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
00270
00271         /* Infinite loop */
00272         while(1);
00273 }
00274 #endif
00275
00276 /*
00277  * @}
00278  */
Generated on Tue Jun 7 14:58:58 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/ADC/HardwareTrigger/adc_hardware_trigger_test.c Source File

C:/nxpdrv/LPC1700CMSIS/Examples/ADC/HardwareTrigger/adc_hardware_trigger_test.c

Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          adc_hardware_trigger_test.c                     2010-06-18
00003 */
00026 #include "lpc17xx_adc.h"
00027 #include "lpc17xx_libcfg.h"
00028 #include "lpc17xx_pinsel.h"
00029 #include "debug_frmwrk.h"
00030
00031 /* Example group ----------------------------------------------------------- */
00037 /************************** PRIVATE DEFINITIONS ***********************/
00038 #define _ADC_INT                        ADC_ADINTEN2
00039 #define _ADC_CHANNEL            ADC_CHANNEL_2
00040
00041 /************************** PRIVATE VARIABLES *************************/
00042 uint8_t menu1[] =
00043 "********************************************************************************\n\r"
00044 "Hello NXP Semiconductors \n\r"
00045 " ADC demo \n\r"
00046 "\t - MCU: LPC17xx \n\r"
00047 "\t - Core: ARM CORTEX-M3 \n\r"
00048 "\t - Communicate via: UART0 - 115200 bps \n\r"
00049 " Use ADC with 12-bit resolution rate of 200KHz, read in hardware-triggred mode\n\r"
00050 " Press INT0 button to start ADC conversion, ADC interrupt when conversion completed\n\r"
00051 " ADC channel value is read back and displayed via UART0\n\r"
00052 " Turn the potentiometer to see how ADC value changes\n\r"
00053 "********************************************************************************\n\r";
00054
00055 uint32_t adc_value;
00056
00057 /************************** PRIVATE FUNCTION *************************/
00058 void ADC_IRQHandler(void);
00059
00060 void print_menu(void);
00061
00062 /*----------------- INTERRUPT SERVICE ROUTINES --------------------------*/
00063 /*********************************************************************/
00068 void ADC_IRQHandler(void)
00069 {
00070         adc_value = 0;
00071         if (ADC_ChannelGetStatus(LPC_ADC,ADC_CHANNEL_2,ADC_DATA_DONE))
00072         {
00073                 adc_value =  ADC_ChannelGetData(LPC_ADC,ADC_CHANNEL_2);
00074                 NVIC_DisableIRQ(ADC_IRQn);
00075         }
00076 }
00077
00078 /*-------------------------PRIVATE FUNCTIONS------------------------------*/
00079 /*********************************************************************/
00084 void print_menu(void)
00085 {
00086         _DBG(menu1);
00087 }
00088
00089
00090 /*-------------------------MAIN FUNCTION------------------------------*/
00091 /*********************************************************************/
00096 int c_entry(void)
00097 {
00098         PINSEL_CFG_Type PinCfg;
00099
00100         /* Initialize debug via UART0
00101          * – 115200bps
00102          * – 8 data bit
00103          * – No parity
00104          * – 1 stop bit
00105          * – No flow control
00106          */
00107         debug_frmwrk_init();
00108
00109         // print welcome screen
00110         print_menu();
00111
00112         /*
00113          * Init ADC pin connect
00114          * AD0.2 on P0.25
00115          */
00116         PinCfg.Funcnum = 1;
00117         PinCfg.OpenDrain = 0;
00118         PinCfg.Pinmode = 0;
00119         PinCfg.Pinnum = 25;
00120         PinCfg.Portnum = 0;
00121         PINSEL_ConfigPin(&PinCfg);
00122
00123         /*
00124          * Init P2.10
00125          *
00126          */
00127         PinCfg.Funcnum = 1; //EINT0
00128         PinCfg.OpenDrain = 0;
00129         PinCfg.Pinmode = 0;
00130         PinCfg.Pinnum = 10;
00131         PinCfg.Portnum = 2;
00132         PINSEL_ConfigPin(&PinCfg);
00133
00134         /* Configuration for ADC:
00135          *  select: ADC channel 2 (if using MCB1700 board)
00136          *              ADC channel 5 (if using IAR-LPC1768 board)
00137          *  ADC conversion rate = 200KHz
00138          */
00139         ADC_Init(LPC_ADC, 200000);
00140         ADC_IntConfig(LPC_ADC,_ADC_INT,ENABLE);
00141         ADC_ChannelCmd(LPC_ADC,_ADC_CHANNEL,ENABLE);
00142         ADC_EdgeStartConfig(LPC_ADC,ADC_START_ON_FALLING);
00143
00144         /* preemption = 1, sub-priority = 1 */
00145         NVIC_SetPriority(ADC_IRQn, ((0x01<<3)|0x01));
00146
00147         while(1)
00148         {
00149                 adc_value = 0;
00150
00151                 // Start conversion on EINT0 falling edge
00152                 ADC_StartCmd(LPC_ADC,ADC_START_ON_EINT0);
00153
00154                 /* Enable ADC in NVIC */
00155                 NVIC_EnableIRQ(ADC_IRQn);
00156
00157                 _DBG("Press INT0 button to start ADC conversion on AD0.2...");_DBG_("");
00158                 while(adc_value==0);
00159
00160                 //Display the result of conversion on the UART0
00161                 _DBG("ADC value on channel 2: ");
00162
00163                 _DBD32(adc_value);
00164                 _DBG_("");
00165         }
00166         ADC_DeInit(LPC_ADC);
00167         return (0);
00168 }
00169
00170 /* Support required entry point for other toolchain */
00171 int main (void)
00172 {
00173         return c_entry();
00174 }
00175 #ifdef  DEBUG
00176 /*******************************************************************************
00177 * @brief                Reports the name of the source file and the source line number
00178 *                               where the CHECK_PARAM error has occurred.
00179 * @param[in]    file Pointer to the source file name
00180 * @param[in]    line assert_param error line source number
00181 * @return               None
00182 *******************************************************************************/
00183 void check_failed(uint8_t *file, uint32_t line)
00184 {
00185         /* User can add his own implementation to report the file name and line number,
00186          ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
00187
00188         /* Infinite loop */
00189         while(1);
00190 }
00191 #endif
00192 /*
00193  * @}
00194  */
Generated on Tue Jun 7 14:58:58 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/ADC/INTERRUPT/adc_interrupt_test.c Source File

C:/nxpdrv/LPC1700CMSIS/Examples/ADC/INTERRUPT/adc_interrupt_test.c

Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          adc_interrupt_test.c                    2010-05-21
00003 */
00026 #include "lpc17xx_adc.h"
00027 #include "lpc17xx_libcfg.h"
00028 #include "lpc17xx_pinsel.h"
00029 #include "debug_frmwrk.h"
00030
00031 /* Example group ----------------------------------------------------------- */
00037 /************************** PRIVATE DEFINITIONS ***********************/
00038 #define MCB_LPC_1768
00039 //#define IAR_LPC_1768
00040
00041 #ifdef MCB_LPC_1768
00042 #define _ADC_INT                        ADC_ADINTEN2
00043 #define _ADC_CHANNEL            ADC_CHANNEL_2
00044 #elif defined(IAR_LPC_1768)
00045 #define _ADC_INT                        ADC_ADINTEN5
00046 #define _ADC_CHANNEL            ADC_CHANNEL_5
00047 #endif
00048
00049 /************************** PRIVATE VARIABLES *************************/
00050 uint8_t menu1[] =
00051 "********************************************************************************\n\r"
00052 "Hello NXP Semiconductors \n\r"
00053 " ADC demo \n\r"
00054 "\t - MCU: LPC17xx \n\r"
00055 "\t - Core: ARM CORTEX-M3 \n\r"
00056 "\t - Communicate via: UART0 - 115200 bps \n\r"
00057 " Use ADC with 12-bit resolution rate of 200KHz, read in interrupt mode\n\r"
00058 " To get ADC channel value and display via UART0\n\r"
00059 " Turn the potentiometer to see how ADC value changes\n\r"
00060 "********************************************************************************\n\r";
00061
00062 uint32_t adc_value;
00063
00064 /************************** PRIVATE FUNCTION *************************/
00065 void ADC_IRQHandler(void);
00066
00067 void print_menu(void);
00068
00069 /*----------------- INTERRUPT SERVICE ROUTINES --------------------------*/
00070 /*********************************************************************/
00075 void ADC_IRQHandler(void)
00076 {
00077         adc_value = 0;
00078 #ifdef MCB_LPC_1768
00079         if (ADC_ChannelGetStatus(LPC_ADC,ADC_CHANNEL_2,ADC_DATA_DONE))
00080         {
00081                 adc_value =  ADC_ChannelGetData(LPC_ADC,ADC_CHANNEL_2);
00082                 NVIC_DisableIRQ(ADC_IRQn);
00083         }
00084 #elif defined(IAR_LPC_1768)
00085         if (ADC_ChannelGetStatus(LPC_ADC,ADC_CHANNEL_5,ADC_DATA_DONE))
00086         {
00087                 adc_value =  ADC_ChannelGetData(LPC_ADC,ADC_CHANNEL_5);
00088                 NVIC_DisableIRQ(ADC_IRQn);
00089         }
00090 #endif
00091 }
00092
00093 /*-------------------------PRIVATE FUNCTIONS------------------------------*/
00094 /*********************************************************************/
00099 void print_menu(void)
00100 {
00101         _DBG(menu1);
00102 }
00103
00104
00105 /*-------------------------MAIN FUNCTION------------------------------*/
00106 /*********************************************************************/
00111 int c_entry(void)
00112 {
00113         PINSEL_CFG_Type PinCfg;
00114         uint32_t tmp;
00115
00116         /* Initialize debug via UART0
00117          * – 115200bps
00118          * – 8 data bit
00119          * – No parity
00120          * – 1 stop bit
00121          * – No flow control
00122          */
00123         debug_frmwrk_init();
00124
00125         // print welcome screen
00126         print_menu();
00127
00128         /* Because the potentiometer on different boards (MCB & IAR) connect
00129          * with different ADC channel, so we have to configure correct ADC channel
00130          * on each board respectively.
00131          * If you want to check other ADC channels, you have to wire this ADC pin directly
00132          * to potentiometer pin (please see schematic doc for more reference)
00133          */
00134 #ifdef MCB_LPC_1768
00135         /*
00136          * Init ADC pin connect
00137          * AD0.2 on P0.25
00138          */
00139         PinCfg.Funcnum = 1;
00140         PinCfg.OpenDrain = 0;
00141         PinCfg.Pinmode = 0;
00142         PinCfg.Pinnum = 25;
00143         PinCfg.Portnum = 0;
00144         PINSEL_ConfigPin(&PinCfg);
00145 #elif defined (IAR_LPC_1768)
00146         /* select P1.31 as AD0.5 */
00147         PinCfg.Funcnum = 3;
00148         PinCfg.OpenDrain = 0;
00149         PinCfg.Pinmode = 0;
00150         PinCfg.Pinnum = 31;
00151         PinCfg.Portnum = 1;
00152         PINSEL_ConfigPin(&PinCfg);
00153 #endif
00154
00155
00156         /* Configuration for ADC:
00157          *  select: ADC channel 2 (if using MCB1700 board)
00158          *              ADC channel 5 (if using IAR-LPC1768 board)
00159          *  ADC conversion rate = 200KHz
00160          */
00161         ADC_Init(LPC_ADC, 200000);
00162         ADC_IntConfig(LPC_ADC,_ADC_INT,ENABLE);
00163         ADC_ChannelCmd(LPC_ADC,_ADC_CHANNEL,ENABLE);
00164
00165         /* preemption = 1, sub-priority = 1 */
00166         NVIC_SetPriority(ADC_IRQn, ((0x01<<3)|0x01));
00167
00168         while(1)
00169         {
00170                 // Start conversion
00171                 ADC_StartCmd(LPC_ADC,ADC_START_NOW);
00172
00173                 /* Enable ADC in NVIC */
00174                 NVIC_EnableIRQ(ADC_IRQn);
00175
00176                 //Display the result of conversion on the UART0
00177 #ifdef MCB_LPC_1768
00178                 _DBG("ADC value on channel 2: ");
00179 #elif defined (IAR_LPC_1768)
00180                 _DBG("ADC value on channel 5: ");
00181 #endif
00182                 _DBD32(adc_value);
00183                 _DBG_("");
00184                 for(tmp = 0; tmp < 1000000; tmp++);
00185         }
00186         ADC_DeInit(LPC_ADC);
00187         return (0);
00188 }
00189
00190 /* Support required entry point for other toolchain */
00191 int main (void)
00192 {
00193         return c_entry();
00194 }
00195 #ifdef  DEBUG
00196 /*******************************************************************************
00197 * @brief                Reports the name of the source file and the source line number
00198 *                               where the CHECK_PARAM error has occurred.
00199 * @param[in]    file Pointer to the source file name
00200 * @param[in]    line assert_param error line source number
00201 * @return               None
00202 *******************************************************************************/
00203 void check_failed(uint8_t *file, uint32_t line)
00204 {
00205         /* User can add his own implementation to report the file name and line number,
00206          ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
00207
00208         /* Infinite loop */
00209         while(1);
00210 }
00211 #endif
00212
00213 /*
00214  * @}
00215  */
Generated on Tue Jun 7 14:58:58 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/ADC/Polling/adc_polling_test.c Source File

C:/nxpdrv/LPC1700CMSIS/Examples/ADC/Polling/adc_polling_test.c

Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          adc_polling_test.c                      2010-05-21
00003 */
00026 #include "lpc17xx_adc.h"
00027 #include "lpc17xx_libcfg.h"
00028 #include "lpc17xx_pinsel.h"
00029 #include "debug_frmwrk.h"
00030
00031 /* Example group ----------------------------------------------------------- */
00037 /************************** PRIVATE DEFINITIONS ***********************/
00038 #define MCB_LPC_1768
00039 //#define IAR_LPC_1768
00040
00041 #ifdef MCB_LPC_1768
00042 #define _ADC_INT                        ADC_ADINTEN2
00043 #define _ADC_CHANNEL            ADC_CHANNEL_2
00044 #elif defined (IAR_LPC_1768)
00045 #define _ADC_INT                        ADC_ADINTEN5
00046 #define _ADC_CHANNEL            ADC_CHANNEL_5
00047 #endif
00048
00049 /************************** PRIVATE VARIABLES *************************/
00050 uint8_t menu1[] =
00051 "********************************************************************************\n\r"
00052 "Hello NXP Semiconductors \n\r"
00053 " ADC demo \n\r"
00054 "\t - MCU: LPC1768 \n\r"
00055 "\t - Core: ARM CORTEX-M3 \n\r"
00056 "\t - Communicate via: UART0 - 115200 bps \n\r"
00057 " Use ADC with 12-bit resolution rate of 200KHz, read in polling mode\n\r"
00058 " To get ADC value and display via UART0\n\r"
00059 " Turn the potentiometer to see how ADC value changes\n\r"
00060 "********************************************************************************\n\r";
00061
00062
00063 /************************** PRIVATE FUNCTION *************************/
00064 void print_menu(void);
00065
00066 /*-------------------------PRIVATE FUNCTIONS------------------------------*/
00067 /*********************************************************************/
00072 void print_menu(void)
00073 {
00074         _DBG(menu1);
00075 }
00076
00077
00078 /*-------------------------MAIN FUNCTION------------------------------*/
00079 /*********************************************************************/
00084 int c_entry(void)
00085 {
00086         PINSEL_CFG_Type PinCfg;
00087         uint32_t adc_value, tmp;
00088
00089         /* Initialize debug via UART0
00090          * – 115200bps
00091          * – 8 data bit
00092          * – No parity
00093          * – 1 stop bit
00094          * – No flow control
00095          */
00096         debug_frmwrk_init();
00097
00098         // print welcome screen
00099         print_menu();
00100
00101         /* Initialize ADC ----------------------------------------------------*/
00102
00103         /* Because the potentiometer on different boards (MCB & IAR) connect
00104          * with different ADC channel, so we have to configure correct ADC channel
00105          * on each board respectively.
00106          * If you want to check other ADC channels, you have to wire this ADC pin directly
00107          * to potentiometer pin (please see schematic doc for more reference)
00108          */
00109 #ifdef MCB_LPC_1768
00110         /*
00111          * Init ADC pin connect
00112          * AD0.2 on P0.25
00113          */
00114         PinCfg.Funcnum = 1;
00115         PinCfg.OpenDrain = 0;
00116         PinCfg.Pinmode = 0;
00117         PinCfg.Pinnum = 25;
00118         PinCfg.Portnum = 0;
00119         PINSEL_ConfigPin(&PinCfg);
00120 #elif defined (IAR_LPC_1768)
00121         /*
00122          * Init ADC pin connect
00123          * AD0.5 on P1.31
00124          */
00125         PinCfg.Funcnum = 3;
00126         PinCfg.OpenDrain = 0;
00127         PinCfg.Pinmode = 0;
00128         PinCfg.Pinnum = 31;
00129         PinCfg.Portnum = 1;
00130         PINSEL_ConfigPin(&PinCfg);
00131 #endif
00132
00133         /* Configuration for ADC :
00134          *  Select: ADC channel 2 (if using MCB1700 board)
00135          *              ADC channel 5 (if using IAR-LPC1768 board)
00136          *  ADC conversion rate = 200Khz
00137          */
00138         ADC_Init(LPC_ADC, 200000);
00139         ADC_IntConfig(LPC_ADC,_ADC_INT,DISABLE);
00140         ADC_ChannelCmd(LPC_ADC,_ADC_CHANNEL,ENABLE);
00141
00142         while(1)
00143         {
00144                 // Start conversion
00145                 ADC_StartCmd(LPC_ADC,ADC_START_NOW);
00146                 //Wait conversion complete
00147                 while (!(ADC_ChannelGetStatus(LPC_ADC,_ADC_CHANNEL,ADC_DATA_DONE)));
00148                 adc_value = ADC_ChannelGetData(LPC_ADC,_ADC_CHANNEL);
00149                 //Display the result of conversion on the UART0
00150 #ifdef MCB_LPC_1768
00151                 _DBG("ADC value on channel 2: ");
00152 #elif defined (IAR_LPC_1768)
00153                 _DBG("ADC value on channel 5: ");
00154 #endif
00155                 _DBD32(adc_value);
00156                 _DBG_("");
00157                 //delay
00158                 for(tmp = 0; tmp < 1000000; tmp++);
00159         }
00160         ADC_DeInit(LPC_ADC);
00161         return 1;
00162 }
00163
00164 /* Support required entry point for other toolchain */
00165 int main (void)
00166 {
00167         return c_entry();
00168 }
00169 #ifdef  DEBUG
00170 /*******************************************************************************
00171 * @brief                Reports the name of the source file and the source line number
00172 *                               where the CHECK_PARAM error has occurred.
00173 * @param[in]    file Pointer to the source file name
00174 * @param[in]    line assert_param error line source number
00175 * @return               None
00176 *******************************************************************************/
00177 void check_failed(uint8_t *file, uint32_t line)
00178 {
00179         /* User can add his own implementation to report the file name and line number,
00180          ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
00181
00182         /* Infinite loop */
00183         while(1);
00184 }
00185 #endif
00186
00187 /*
00188  * @}
00189  */
Generated on Tue Jun 7 14:58:58 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBAudio/adcuser.c Source File

C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBAudio/adcuser.c

Go to the documentation of this file.
00001 /*----------------------------------------------------------------------------
00002  *      U S B  -  K e r n e l
00003  *----------------------------------------------------------------------------
00004  *      Name:    ADCUSER.C
00005  *      Purpose: Audio Device Class Custom User Module
00006  *      Version: V1.10
00007  *----------------------------------------------------------------------------
00008  *      This software is supplied "AS IS" without any warranties, express,
00009  *      implied or statutory, including but not limited to the implied
00010  *      warranties of fitness for purpose, satisfactory quality and
00011  *      noninfringement. Keil extends you a royalty-free right to reproduce
00012  *      and distribute executable files created using this software for use
00013  *      on NXP Semiconductors LPC family microcontroller devices only. Nothing
00014  *      else gives you the right to use this software.
00015  *
00016  * Copyright (c) 2009 Keil - An ARM Company. All rights reserved.
00017  *---------------------------------------------------------------------------*/
00018
00019 #include "lpc_types.h"
00020
00021 #include "usb.h"
00022 #include "audio.h"
00023 #include "usbcfg.h"
00024 #include "usbcore.h"
00025 #include "adcuser.h"
00026
00027 #include "usbaudio.h"
00028
00029       uint16_t VolCur = 0x0100;     /* Volume Current Value */
00030 const uint16_t VolMin = 0x0000;     /* Volume Minimum Value */
00031 const uint16_t VolMax = 0x0100;     /* Volume Maximum Value */
00032 const uint16_t VolRes = 0x0004;     /* Volume Resolution */
00033
00034 /*
00035  *  Audio Device Class Interface Get Request Callback
00036  *   Called automatically on ADC Interface Get Request
00037  *    Parameters:      None (global SetupPacket and EP0Buf)
00038  *    Return Value:    TRUE - Success, FALSE - Error
00039  */
00040
00041 uint32_t ADC_IF_GetRequest (void) {
00042
00043 /*
00044   Interface = SetupPacket.wIndex.WB.L;
00045   EntityID  = SetupPacket.wIndex.WB.H;
00046   Request   = SetupPacket.bRequest;
00047   Value     = SetupPacket.wValue.W;
00048   ...
00049 */
00050
00051   if (SetupPacket.wIndex.W == 0x0200) {
00052     /* Feature Unit: Interface = 0, ID = 2 */
00053     if (SetupPacket.wValue.WB.L == 0) {
00054       /* Master Channel */
00055       switch (SetupPacket.wValue.WB.H) {
00056         case AUDIO_MUTE_CONTROL:
00057           switch (SetupPacket.bRequest) {
00058             case AUDIO_REQUEST_GET_CUR:
00059               EP0Buf[0] = Mute;
00060               return (TRUE);
00061           }
00062           break;
00063         case AUDIO_VOLUME_CONTROL:
00064           switch (SetupPacket.bRequest) {
00065             case AUDIO_REQUEST_GET_CUR:
00066               *((__packed uint16_t *)EP0Buf) = VolCur;
00067               return (TRUE);
00068             case AUDIO_REQUEST_GET_MIN:
00069               *((__packed uint16_t *)EP0Buf) = VolMin;
00070               return (TRUE);
00071             case AUDIO_REQUEST_GET_MAX:
00072               *((__packed uint16_t *)EP0Buf) = VolMax;
00073               return (TRUE);
00074             case AUDIO_REQUEST_GET_RES:
00075               *((__packed uint16_t *)EP0Buf) = VolRes;
00076               return (TRUE);
00077           }
00078           break;
00079       }
00080     }
00081   }
00082   return (FALSE);  /* Not Supported */
00083 }
00084
00085
00086 /*
00087  *  Audio Device Class Interface Set Request Callback
00088  *   Called automatically on ADC Interface Set Request
00089  *    Parameters:      None (global SetupPacket and EP0Buf)
00090  *    Return Value:    TRUE - Success, FALSE - Error
00091  */
00092
00093 uint32_t ADC_IF_SetRequest (void) {
00094
00095 /*
00096   Interface = SetupPacket.wIndex.WB.L;
00097   EntityID  = SetupPacket.wIndex.WB.H;
00098   Request   = SetupPacket.bRequest;
00099   Value     = SetupPacket.wValue.W;
00100   ...
00101 */
00102
00103   if (SetupPacket.wIndex.W == 0x0200) {
00104     /* Feature Unit: Interface = 0, ID = 2 */
00105     if (SetupPacket.wValue.WB.L == 0) {
00106       /* Master Channel */
00107       switch (SetupPacket.wValue.WB.H) {
00108         case AUDIO_MUTE_CONTROL:
00109           switch (SetupPacket.bRequest) {
00110             case AUDIO_REQUEST_SET_CUR:
00111               Mute = EP0Buf[0];
00112               return (TRUE);
00113           }
00114           break;
00115         case AUDIO_VOLUME_CONTROL:
00116           switch (SetupPacket.bRequest) {
00117             case AUDIO_REQUEST_SET_CUR:
00118               VolCur = *((__packed uint16_t *)EP0Buf);
00119               return (TRUE);
00120           }
00121           break;
00122       }
00123     }
00124   }
00125   return (FALSE);  /* Not Supported */
00126 }
00127
00128
00129 /*
00130  *  Audio Device Class EndPoint Get Request Callback
00131  *   Called automatically on ADC EndPoint Get Request
00132  *    Parameters:      None (global SetupPacket and EP0Buf)
00133  *    Return Value:    TRUE - Success, FALSE - Error
00134  */
00135
00136 uint32_t ADC_EP_GetRequest (void) {
00137
00138 /*
00139   EndPoint = SetupPacket.wIndex.WB.L;
00140   Request  = SetupPacket.bRequest;
00141   Value    = SetupPacket.wValue.W;
00142   ...
00143 */
00144   return (FALSE);  /* Not Supported */
00145 }
00146
00147
00148 /*
00149  *  Audio Device Class EndPoint Set Request Callback
00150  *   Called automatically on ADC EndPoint Set Request
00151  *    Parameters:      None (global SetupPacket and EP0Buf)
00152  *    Return Value:    TRUE - Success, FALSE - Error
00153  */
00154
00155 uint32_t ADC_EP_SetRequest (void) {
00156
00157 /*
00158   EndPoint = SetupPacket.wIndex.WB.L;
00159   Request  = SetupPacket.bRequest;
00160   Value    = SetupPacket.wValue.W;
00161   ...
00162 */
00163   return (FALSE);  /* Not Supported */
00164 }
Generated on Tue Jun 7 14:59:04 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBAudio/adcuser.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBAudio/adcuser.h

Go to the documentation of this file.
00001 /*----------------------------------------------------------------------------
00002  *      U S B  -  K e r n e l
00003  *----------------------------------------------------------------------------
00004  *      Name:    ADCUSER.H
00005  *      Purpose: Audio Device Class Custom User Definitions
00006  *      Version: V1.10
00007  *----------------------------------------------------------------------------
00008  *      This software is supplied "AS IS" without any warranties, express,
00009  *      implied or statutory, including but not limited to the implied
00010  *      warranties of fitness for purpose, satisfactory quality and
00011  *      noninfringement. Keil extends you a royalty-free right to reproduce
00012  *      and distribute executable files created using this software for use
00013  *      on Philips LPC2xxx microcontroller devices only. Nothing else gives
00014  *      you the right to use this software.
00015  *
00016  *      Copyright (c) 2005-2006 Keil Software.
00017  *---------------------------------------------------------------------------*/
00018
00019 #ifndef __ADCUSER_H__
00020 #define __ADCUSER_H__
00021
00022
00023 /* Audio Device Class Requests Callback Functions */
00024 extern uint32_t ADC_IF_GetRequest (void);
00025 extern uint32_t ADC_IF_SetRequest (void);
00026 extern uint32_t ADC_EP_GetRequest (void);
00027 extern uint32_t ADC_EP_SetRequest (void);
00028
00029
00030 #endif  /* __ADCUSER_H__ */
Generated on Tue Jun 7 14:59:04 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBAudio/audio.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBAudio/audio.h

Go to the documentation of this file.
00001 /*----------------------------------------------------------------------------
00002  *      U S B  -  K e r n e l
00003  *----------------------------------------------------------------------------
00004  *      Name:    AUDIO.H
00005  *      Purpose: USB Audio Device Class Definitions
00006  *      Version: V1.10
00007  *----------------------------------------------------------------------------
00008  *      This software is supplied "AS IS" without any warranties, express,
00009  *      implied or statutory, including but not limited to the implied
00010  *      warranties of fitness for purpose, satisfactory quality and
00011  *      noninfringement. Keil extends you a royalty-free right to reproduce
00012  *      and distribute executable files created using this software for use
00013  *      on Philips LPC2xxx microcontroller devices only. Nothing else gives
00014  *      you the right to use this software.
00015  *
00016  *      Copyright (c) 2005-2006 Keil Software.
00017  *---------------------------------------------------------------------------*/
00018
00019 #ifndef __AUDIO_H__
00020 #define __AUDIO_H__
00021
00022
00023 /* Audio Interface Subclass Codes */
00024 #define AUDIO_SUBCLASS_UNDEFINED                0x00
00025 #define AUDIO_SUBCLASS_AUDIOCONTROL             0x01
00026 #define AUDIO_SUBCLASS_AUDIOSTREAMING           0x02
00027 #define AUDIO_SUBCLASS_MIDISTREAMING            0x03
00028
00029 /* Audio Interface Protocol Codes */
00030 #define AUDIO_PROTOCOL_UNDEFINED                0x00
00031
00032
00033 /* Audio Descriptor Types */
00034 #define AUDIO_UNDEFINED_DESCRIPTOR_TYPE         0x20
00035 #define AUDIO_DEVICE_DESCRIPTOR_TYPE            0x21
00036 #define AUDIO_CONFIGURATION_DESCRIPTOR_TYPE     0x22
00037 #define AUDIO_STRING_DESCRIPTOR_TYPE            0x23
00038 #define AUDIO_INTERFACE_DESCRIPTOR_TYPE         0x24
00039 #define AUDIO_ENDPOINT_DESCRIPTOR_TYPE          0x25
00040
00041
00042 /* Audio Control Interface Descriptor Subtypes */
00043 #define AUDIO_CONTROL_UNDEFINED                 0x00
00044 #define AUDIO_CONTROL_HEADER                    0x01
00045 #define AUDIO_CONTROL_INPUT_TERMINAL            0x02
00046 #define AUDIO_CONTROL_OUTPUT_TERMINAL           0x03
00047 #define AUDIO_CONTROL_MIXER_UNIT                0x04
00048 #define AUDIO_CONTROL_SELECTOR_UNIT             0x05
00049 #define AUDIO_CONTROL_FEATURE_UNIT              0x06
00050 #define AUDIO_CONTROL_PROCESSING_UNIT           0x07
00051 #define AUDIO_CONTROL_EXTENSION_UNIT            0x08
00052
00053 /* Audio Streaming Interface Descriptor Subtypes */
00054 #define AUDIO_STREAMING_UNDEFINED               0x00
00055 #define AUDIO_STREAMING_GENERAL                 0x01
00056 #define AUDIO_STREAMING_FORMAT_TYPE             0x02
00057 #define AUDIO_STREAMING_FORMAT_SPECIFIC         0x03
00058
00059 /* Audio Endpoint Descriptor Subtypes */
00060 #define AUDIO_ENDPOINT_UNDEFINED                0x00
00061 #define AUDIO_ENDPOINT_GENERAL                  0x01
00062
00063
00064 /* Audio Descriptor Sizes */
00065 #define AUDIO_CONTROL_INTERFACE_DESC_SZ(n)      0x08+n
00066 #define AUDIO_STREAMING_INTERFACE_DESC_SIZE     0x07
00067 #define AUDIO_INPUT_TERMINAL_DESC_SIZE          0x0C
00068 #define AUDIO_OUTPUT_TERMINAL_DESC_SIZE         0x09
00069 #define AUDIO_MIXER_UNIT_DESC_SZ(p,n)           0x0A+p+n
00070 #define AUDIO_SELECTOR_UNIT_DESC_SZ(p)          0x06+p
00071 #define AUDIO_FEATURE_UNIT_DESC_SZ(ch,n)        0x07+(ch+1)*n
00072 #define AUDIO_PROCESSING_UNIT_DESC_SZ(p,n,x)    0x0D+p+n+x
00073 #define AUDIO_EXTENSION_UNIT_DESC_SZ(p,n)       0x0D+p+n
00074 #define AUDIO_STANDARD_ENDPOINT_DESC_SIZE       0x09
00075 #define AUDIO_STREAMING_ENDPOINT_DESC_SIZE      0x07
00076
00077
00078 /* Audio Processing Unit Process Types */
00079 #define AUDIO_UNDEFINED_PROCESS                 0x00
00080 #define AUDIO_UP_DOWN_MIX_PROCESS               0x01
00081 #define AUDIO_DOLBY_PROLOGIC_PROCESS            0x02
00082 #define AUDIO_3D_STEREO_PROCESS                 0x03
00083 #define AUDIO_REVERBERATION_PROCESS             0x04
00084 #define AUDIO_CHORUS_PROCESS                    0x05
00085 #define AUDIO_DYN_RANGE_COMP_PROCESS            0x06
00086
00087
00088 /* Audio Request Codes */
00089 #define AUDIO_REQUEST_UNDEFINED                 0x00
00090 #define AUDIO_REQUEST_SET_CUR                   0x01
00091 #define AUDIO_REQUEST_GET_CUR                   0x81
00092 #define AUDIO_REQUEST_SET_MIN                   0x02
00093 #define AUDIO_REQUEST_GET_MIN                   0x82
00094 #define AUDIO_REQUEST_SET_MAX                   0x03
00095 #define AUDIO_REQUEST_GET_MAX                   0x83
00096 #define AUDIO_REQUEST_SET_RES                   0x04
00097 #define AUDIO_REQUEST_GET_RES                   0x84
00098 #define AUDIO_REQUEST_SET_MEM                   0x05
00099 #define AUDIO_REQUEST_GET_MEM                   0x85
00100 #define AUDIO_REQUEST_GET_STAT                  0xFF
00101
00102
00103 /* Audio Control Selector Codes */
00104 #define AUDIO_CONTROL_UNDEFINED                 0x00    /* Common Selector */
00105
00106 /*  Terminal Control Selectors */
00107 #define AUDIO_COPY_PROTECT_CONTROL              0x01
00108
00109 /*  Feature Unit Control Selectors */
00110 #define AUDIO_MUTE_CONTROL                      0x01
00111 #define AUDIO_VOLUME_CONTROL                    0x02
00112 #define AUDIO_BASS_CONTROL                      0x03
00113 #define AUDIO_MID_CONTROL                       0x04
00114 #define AUDIO_TREBLE_CONTROL                    0x05
00115 #define AUDIO_GRAPHIC_EQUALIZER_CONTROL         0x06
00116 #define AUDIO_AUTOMATIC_GAIN_CONTROL            0x07
00117 #define AUDIO_DELAY_CONTROL                     0x08
00118 #define AUDIO_BASS_BOOST_CONTROL                0x09
00119 #define AUDIO_LOUDNESS_CONTROL                  0x0A
00120
00121 /*  Processing Unit Control Selectors: */
00122 #define AUDIO_ENABLE_CONTROL                    0x01    /* Common Selector */
00123 #define AUDIO_MODE_SELECT_CONTROL               0x02    /* Common Selector */
00124
00125 /*  - Up/Down-mix Control Selectors */
00126 /*      AUDIO_ENABLE_CONTROL                    0x01       Common Selector */
00127 /*      AUDIO_MODE_SELECT_CONTROL               0x02       Common Selector */
00128
00129 /*  - Dolby Prologic Control Selectors */
00130 /*      AUDIO_ENABLE_CONTROL                    0x01       Common Selector */
00131 /*      AUDIO_MODE_SELECT_CONTROL               0x02       Common Selector */
00132
00133 /*  - 3D Stereo Extender Control Selectors */
00134 /*      AUDIO_ENABLE_CONTROL                    0x01       Common Selector */
00135 #define AUDIO_SPACIOUSNESS_CONTROL              0x02
00136
00137 /*  - Reverberation Control Selectors */
00138 /*      AUDIO_ENABLE_CONTROL                    0x01       Common Selector */
00139 #define AUDIO_REVERB_LEVEL_CONTROL              0x02
00140 #define AUDIO_REVERB_TIME_CONTROL               0x03
00141 #define AUDIO_REVERB_FEEDBACK_CONTROL           0x04
00142
00143 /*  - Chorus Control Selectors */
00144 /*      AUDIO_ENABLE_CONTROL                    0x01       Common Selector */
00145 #define AUDIO_CHORUS_LEVEL_CONTROL              0x02
00146 #define AUDIO_SHORUS_RATE_CONTROL               0x03
00147 #define AUDIO_CHORUS_DEPTH_CONTROL              0x04
00148
00149 /*  - Dynamic Range Compressor Control Selectors */
00150 /*      AUDIO_ENABLE_CONTROL                    0x01       Common Selector */
00151 #define AUDIO_COMPRESSION_RATE_CONTROL          0x02
00152 #define AUDIO_MAX_AMPL_CONTROL                  0x03
00153 #define AUDIO_THRESHOLD_CONTROL                 0x04
00154 #define AUDIO_ATTACK_TIME_CONTROL               0x05
00155 #define AUDIO_RELEASE_TIME_CONTROL              0x06
00156
00157 /*  Extension Unit Control Selectors */
00158 /*      AUDIO_ENABLE_CONTROL                    0x01       Common Selector */
00159
00160 /*  Endpoint Control Selectors */
00161 #define AUDIO_SAMPLING_FREQ_CONTROL             0x01
00162 #define AUDIO_PITCH_CONTROL                     0x02
00163
00164
00165 /* Audio Format Specific Control Selectors */
00166
00167 /*  MPEG Control Selectors */
00168 #define AUDIO_MPEG_CONTROL_UNDEFINED            0x00
00169 #define AUDIO_MPEG_DUAL_CHANNEL_CONTROL         0x01
00170 #define AUDIO_MPEG_SECOND_STEREO_CONTROL        0x02
00171 #define AUDIO_MPEG_MULTILINGUAL_CONTROL         0x03
00172 #define AUDIO_MPEG_DYN_RANGE_CONTROL            0x04
00173 #define AUDIO_MPEG_SCALING_CONTROL              0x05
00174 #define AUDIO_MPEG_HILO_SCALING_CONTROL         0x06
00175
00176 /*  AC-3 Control Selectors */
00177 #define AUDIO_AC3_CONTROL_UNDEFINED             0x00
00178 #define AUDIO_AC3_MODE_CONTROL                  0x01
00179 #define AUDIO_AC3_DYN_RANGE_CONTROL             0x02
00180 #define AUDIO_AC3_SCALING_CONTROL               0x03
00181 #define AUDIO_AC3_HILO_SCALING_CONTROL          0x04
00182
00183
00184 /* Audio Format Types */
00185 #define AUDIO_FORMAT_TYPE_UNDEFINED             0x00
00186 #define AUDIO_FORMAT_TYPE_I                     0x01
00187 #define AUDIO_FORMAT_TYPE_II                    0x02
00188 #define AUDIO_FORMAT_TYPE_III                   0x03
00189
00190
00191 /* Audio Format Type Descriptor Sizes */
00192 #define AUDIO_FORMAT_TYPE_I_DESC_SZ(n)          0x08+(n*3)
00193 #define AUDIO_FORMAT_TYPE_II_DESC_SZ(n)         0x09+(n*3)
00194 #define AUDIO_FORMAT_TYPE_III_DESC_SZ(n)        0x08+(n*3)
00195 #define AUDIO_FORMAT_MPEG_DESC_SIZE             0x09
00196 #define AUDIO_FORMAT_AC3_DESC_SIZE              0x0A
00197
00198
00199 /* Audio Data Format Codes */
00200
00201 /*  Audio Data Format Type I Codes */
00202 #define AUDIO_FORMAT_TYPE_I_UNDEFINED           0x0000
00203 #define AUDIO_FORMAT_PCM                        0x0001
00204 #define AUDIO_FORMAT_PCM8                       0x0002
00205 #define AUDIO_FORMAT_IEEE_FLOAT                 0x0003
00206 #define AUDIO_FORMAT_ALAW                       0x0004
00207 #define AUDIO_FORMAT_MULAW                      0x0005
00208
00209 /*  Audio Data Format Type II Codes */
00210 #define AUDIO_FORMAT_TYPE_II_UNDEFINED          0x1000
00211 #define AUDIO_FORMAT_MPEG                       0x1001
00212 #define AUDIO_FORMAT_AC3                        0x1002
00213
00214 /*  Audio Data Format Type III Codes */
00215 #define AUDIO_FORMAT_TYPE_III_UNDEFINED         0x2000
00216 #define AUDIO_FORMAT_IEC1937_AC3                0x2001
00217 #define AUDIO_FORMAT_IEC1937_MPEG1_L1           0x2002
00218 #define AUDIO_FORMAT_IEC1937_MPEG1_L2_3         0x2003
00219 #define AUDIO_FORMAT_IEC1937_MPEG2_NOEXT        0x2003
00220 #define AUDIO_FORMAT_IEC1937_MPEG2_EXT          0x2004
00221 #define AUDIO_FORMAT_IEC1937_MPEG2_L1_LS        0x2005
00222 #define AUDIO_FORMAT_IEC1937_MPEG2_L2_3         0x2006
00223
00224
00225 /* Predefined Audio Channel Configuration Bits */
00226 #define AUDIO_CHANNEL_M                         0x0000  /* Mono */
00227 #define AUDIO_CHANNEL_L                         0x0001  /* Left Front */
00228 #define AUDIO_CHANNEL_R                         0x0002  /* Right Front */
00229 #define AUDIO_CHANNEL_C                         0x0004  /* Center Front */
00230 #define AUDIO_CHANNEL_LFE                       0x0008  /* Low Freq. Enhance. */
00231 #define AUDIO_CHANNEL_LS                        0x0010  /* Left Surround */
00232 #define AUDIO_CHANNEL_RS                        0x0020  /* Right Surround */
00233 #define AUDIO_CHANNEL_LC                        0x0040  /* Left of Center */
00234 #define AUDIO_CHANNEL_RC                        0x0080  /* Right of Center */
00235 #define AUDIO_CHANNEL_S                         0x0100  /* Surround */
00236 #define AUDIO_CHANNEL_SL                        0x0200  /* Side Left */
00237 #define AUDIO_CHANNEL_SR                        0x0400  /* Side Right */
00238 #define AUDIO_CHANNEL_T                         0x0800  /* Top */
00239
00240
00241 /* Feature Unit Control Bits */
00242 #define AUDIO_CONTROL_MUTE                      0x0001
00243 #define AUDIO_CONTROL_VOLUME                    0x0002
00244 #define AUDIO_CONTROL_BASS                      0x0004
00245 #define AUDIO_CONTROL_MID                       0x0008
00246 #define AUDIO_CONTROL_TREBLE                    0x0010
00247 #define AUDIO_CONTROL_GRAPHIC_EQUALIZER         0x0020
00248 #define AUDIO_CONTROL_AUTOMATIC_GAIN            0x0040
00249 #define AUDIO_CONTROL_DEALY                     0x0080
00250 #define AUDIO_CONTROL_BASS_BOOST                0x0100
00251 #define AUDIO_CONTROL_LOUDNESS                  0x0200
00252
00253 /* Processing Unit Control Bits: */
00254 #define AUDIO_CONTROL_ENABLE                    0x0001  /* Common Bit */
00255 #define AUDIO_CONTROL_MODE_SELECT               0x0002  /* Common Bit */
00256
00257 /* - Up/Down-mix Control Bits */
00258 /*      AUDIO_CONTROL_ENABLE                    0x0001     Common Bit */
00259 /*      AUDIO_CONTROL_MODE_SELECT               0x0002     Common Bit */
00260
00261 /* - Dolby Prologic Control Bits */
00262 /*      AUDIO_CONTROL_ENABLE                    0x0001     Common Bit */
00263 /*      AUDIO_CONTROL_MODE_SELECT               0x0002     Common Bit */
00264
00265 /* - 3D Stereo Extender Control Bits */
00266 /*      AUDIO_CONTROL_ENABLE                    0x0001     Common Bit */
00267 #define AUDIO_CONTROL_SPACIOUSNESS              0x0002
00268
00269 /* - Reverberation Control Bits */
00270 /*      AUDIO_CONTROL_ENABLE                    0x0001     Common Bit */
00271 #define AUDIO_CONTROL_REVERB_TYPE               0x0002
00272 #define AUDIO_CONTROL_REVERB_LEVEL              0x0004
00273 #define AUDIO_CONTROL_REVERB_TIME               0x0008
00274 #define AUDIO_CONTROL_REVERB_FEEDBACK           0x0010
00275
00276 /* - Chorus Control Bits */
00277 /*      AUDIO_CONTROL_ENABLE                    0x0001     Common Bit */
00278 #define AUDIO_CONTROL_CHORUS_LEVEL              0x0002
00279 #define AUDIO_CONTROL_SHORUS_RATE               0x0004
00280 #define AUDIO_CONTROL_CHORUS_DEPTH              0x0008
00281
00282 /* - Dynamic Range Compressor Control Bits */
00283 /*      AUDIO_CONTROL_ENABLE                    0x0001     Common Bit */
00284 #define AUDIO_CONTROL_COMPRESSION_RATE          0x0002
00285 #define AUDIO_CONTROL_MAX_AMPL                  0x0004
00286 #define AUDIO_CONTROL_THRESHOLD                 0x0008
00287 #define AUDIO_CONTROL_ATTACK_TIME               0x0010
00288 #define AUDIO_CONTROL_RELEASE_TIME              0x0020
00289
00290 /* Extension Unit Control Bits */
00291 /*      AUDIO_CONTROL_ENABLE                    0x0001     Common Bit */
00292
00293 /* Endpoint Control Bits */
00294 #define AUDIO_CONTROL_SAMPLING_FREQ             0x01
00295 #define AUDIO_CONTROL_PITCH                     0x02
00296 #define AUDIO_MAX_PACKETS_ONLY                  0x80
00297
00298
00299 /* Audio Terminal Types */
00300
00301 /*  USB Terminal Types */
00302 #define AUDIO_TERMINAL_USB_UNDEFINED            0x0100
00303 #define AUDIO_TERMINAL_USB_STREAMING            0x0101
00304 #define AUDIO_TERMINAL_USB_VENDOR_SPECIFIC      0x01FF
00305
00306 /*  Input Terminal Types */
00307 #define AUDIO_TERMINAL_INPUT_UNDEFINED          0x0200
00308 #define AUDIO_TERMINAL_MICROPHONE               0x0201
00309 #define AUDIO_TERMINAL_DESKTOP_MICROPHONE       0x0202
00310 #define AUDIO_TERMINAL_PERSONAL_MICROPHONE      0x0203
00311 #define AUDIO_TERMINAL_OMNI_DIR_MICROPHONE      0x0204
00312 #define AUDIO_TERMINAL_MICROPHONE_ARRAY         0x0205
00313 #define AUDIO_TERMINAL_PROCESSING_MIC_ARRAY     0x0206
00314
00315 /*  Output Terminal Types */
00316 #define AUDIO_TERMINAL_OUTPUT_UNDEFINED         0x0300
00317 #define AUDIO_TERMINAL_SPEAKER                  0x0301
00318 #define AUDIO_TERMINAL_HEADPHONES               0x0302
00319 #define AUDIO_TERMINAL_HEAD_MOUNTED_AUDIO       0x0303
00320 #define AUDIO_TERMINAL_DESKTOP_SPEAKER          0x0304
00321 #define AUDIO_TERMINAL_ROOM_SPEAKER             0x0305
00322 #define AUDIO_TERMINAL_COMMUNICATION_SPEAKER    0x0306
00323 #define AUDIO_TERMINAL_LOW_FREQ_SPEAKER         0x0307
00324
00325 /*  Bi-directional Terminal Types */
00326 #define AUDIO_TERMINAL_BIDIRECTIONAL_UNDEFINED  0x0400
00327 #define AUDIO_TERMINAL_HANDSET                  0x0401
00328 #define AUDIO_TERMINAL_HEAD_MOUNTED_HANDSET     0x0402
00329 #define AUDIO_TERMINAL_SPEAKERPHONE             0x0403
00330 #define AUDIO_TERMINAL_SPEAKERPHONE_ECHOSUPRESS 0x0404
00331 #define AUDIO_TERMINAL_SPEAKERPHONE_ECHOCANCEL  0x0405
00332
00333 /*  Telephony Terminal Types */
00334 #define AUDIO_TERMINAL_TELEPHONY_UNDEFINED      0x0500
00335 #define AUDIO_TERMINAL_PHONE_LINE               0x0501
00336 #define AUDIO_TERMINAL_TELEPHONE                0x0502
00337 #define AUDIO_TERMINAL_DOWN_LINE_PHONE          0x0503
00338
00339 /*  External Terminal Types */
00340 #define AUDIO_TERMINAL_EXTERNAL_UNDEFINED       0x0600
00341 #define AUDIO_TERMINAL_ANALOG_CONNECTOR         0x0601
00342 #define AUDIO_TERMINAL_DIGITAL_AUDIO_INTERFACE  0x0602
00343 #define AUDIO_TERMINAL_LINE_CONNECTOR           0x0603
00344 #define AUDIO_TERMINAL_LEGACY_AUDIO_CONNECTOR   0x0604
00345 #define AUDIO_TERMINAL_SPDIF_INTERFACE          0x0605
00346 #define AUDIO_TERMINAL_1394_DA_STREAM           0x0606
00347 #define AUDIO_TERMINAL_1394_DA_STREAM_TRACK     0x0607
00348
00349 /*  Embedded Function Terminal Types */
00350 #define AUDIO_TERMINAL_EMBEDDED_UNDEFINED       0x0700
00351 #define AUDIO_TERMINAL_CALIBRATION_NOISE        0x0701
00352 #define AUDIO_TERMINAL_EQUALIZATION_NOISE       0x0702
00353 #define AUDIO_TERMINAL_CD_PLAYER                0x0703
00354 #define AUDIO_TERMINAL_DAT                      0x0704
00355 #define AUDIO_TERMINAL_DCC                      0x0705
00356 #define AUDIO_TERMINAL_MINI_DISK                0x0706
00357 #define AUDIO_TERMINAL_ANALOG_TAPE              0x0707
00358 #define AUDIO_TERMINAL_PHONOGRAPH               0x0708
00359 #define AUDIO_TERMINAL_VCR_AUDIO                0x0709
00360 #define AUDIO_TERMINAL_VIDEO_DISC_AUDIO         0x070A
00361 #define AUDIO_TERMINAL_DVD_AUDIO                0x070B
00362 #define AUDIO_TERMINAL_TV_TUNER_AUDIO           0x070C
00363 #define AUDIO_TERMINAL_SATELLITE_RECEIVER_AUDIO 0x070D
00364 #define AUDIO_TERMINAL_CABLE_TUNER_AUDIO        0x070E
00365 #define AUDIO_TERMINAL_DSS_AUDIO                0x070F
00366 #define AUDIO_TERMINAL_RADIO_RECEIVER           0x0710
00367 #define AUDIO_TERMINAL_RADIO_TRANSMITTER        0x0711
00368 #define AUDIO_TERMINAL_MULTI_TRACK_RECORDER     0x0712
00369 #define AUDIO_TERMINAL_SYNTHESIZER              0x0713
00370
00371
00372 #endif  /* __AUDIO_H__ */
Generated on Tue Jun 7 14:59:04 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/Cortex-M3/Bit-banding/bitband.c Source File

C:/nxpdrv/LPC1700CMSIS/Examples/Cortex-M3/Bit-banding/bitband.c

Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          bitband.c                               2010-05-21
00003 */
00026 #include "lpc17xx_libcfg.h"
00027 #include "debug_frmwrk.h"
00028
00029 /* Example group ----------------------------------------------------------- */
00035 /************************** PRIVATE DEFINTIONS*************************/
00036 /* The processor memory map includes two bit-band regions. These occupy the lowest
00037  * 1MB of the SRAM and peripheral memory regions respectively.
00038  * + SRAM:      Bit-band region:        0x20000000 - 0x20100000
00039  *                      Bit-band alias:         0x22000000 - 0x23FFFFFF
00040  * + PERI:      Bit-band region:        0x40000000 - 0x40100000
00041  *                      Bit-band alias:         0x42000000 - 0x43FFFFFF
00042  * The mapping formula:
00043  *              bit_word_offset = (byte_offset * 32) + (bit_number * 4)
00044  *              bit_word_address = bit_band_base + bit_word_offset
00045  * where:
00046  *      + bit_word_offset: the position of the target bit in the bit-band memory region
00047  *      + bit_word_addr: the address of the word in the alias memory region that maps to the target bit
00048  *  + bit_band_base: the starting address of the alias region
00049  *  + byte_offset: the number of byte in the bit-band region that contains the targeted bit
00050  *  + bit_number: is the bit position (0-7) of the targeted bit
00051  *
00052  * Note: The fact, the SRAM on LPC1768 just available in two ranges:
00053  *      + 0x2007C000 - 0x2007FFFF: for SRAM - bank 0
00054  *  + 0x20080000 - 0x20083FFF: for SRAM - bank 1
00055  *  (And one range for GPIO peripheral but assigned in SRAM ranges: 0x2009C000 - 0x2009FFFF)
00056  */
00057
00058 /* Bit band SRAM definitions */
00059 #define BITBAND_SRAM_REF   0x20000000
00060 #define BITBAND_SRAM_BASE  0x22000000
00061
00062 #define BITBAND_SRAM(a,b) ((BITBAND_SRAM_BASE + ((a-BITBAND_SRAM_REF)<<5) + (b<<2)))  // Convert SRAM address
00063
00064 /* Bit band PERIPHERAL definitions */
00065 #define BITBAND_PERI_REF   0x40000000
00066 #define BITBAND_PERI_BASE  0x42000000
00067
00068 #define BITBAND_PERI(a,b) ((BITBAND_PERI_BASE + ((a-BITBAND_PERI_REF)<<5) + (b<<2)))  // Convert PERI address
00069
00070 /* Basic bit band function definitions */
00071 #define BITBAND_SRAM_ClearBit(a,b)      (*(volatile uint32_t *) (BITBAND_SRAM(a,b)) = 0)
00072 #define BITBAND_SRAM_SetBit(a,b)        (*(volatile uint32_t *) (BITBAND_SRAM(a,b)) = 1)
00073 #define BITBAND_SRAM_GetBit(a,b)        (*(volatile uint32_t *) (BITBAND_SRAM(a,b)))
00074
00075 #define BITBAND_PERI_ClearBit(a,b)      (*(volatile uint32_t *) (BITBAND_PERI(a,b)) = 0)
00076 #define BITBAND_PERI_SetBit(a,b)        (*(volatile uint32_t *) (BITBAND_PERI(a,b)) = 1)
00077 #define BITBAND_PERI_GetBit(a,b)        (*(volatile uint32_t *) (BITBAND_PERI(a,b)))
00078
00079 /* Variable address in SRAM
00080  * should be in one of two range:
00081  *      + 0x2007C000 - 0x20083FFF: for SRAM
00082  *  + 0x20080000 - 0x20083FFF: for GPIO
00083  */
00084 #define VAR_ADDRESS             0x2007C000
00085 #define VAR_BIT                 3 //Bit 3
00086
00087 /* Peripheral address
00088  * should be in range: 0x40000000 - 0x40100000
00089  */
00090 #define PERI_ADDRESS    0x40020000 // SPI Control Register (S0SPCR)
00091 #define PERI_BIT                5 //bit 5 - Master mode select
00092
00093 /************************** PRIVATE VARIABLES *************************/
00094 uint8_t menu[]=
00095         "********************************************************************************\n\r"
00096         "Hello NXP Semiconductors \n\r"
00097         "Bit-banding demo \n\r"
00098         "\t - MCU: LPC17xx \n\r"
00099         "\t - Core: ARM CORTEX-M3 \n\r"
00100         "\t - Communicate via: UART0 - 115200 bps \n\r"
00101         "This example used to test Bit-banding feature of Cortex-M3 processor\n\r"
00102         "********************************************************************************\n\r";
00103
00104 /*-------------------------MAIN FUNCTION------------------------------*/
00105 /*********************************************************************/
00110 int c_entry(void) { /* Main Program */
00111
00112         uint32_t temp;
00113
00114         /* Initialize debug via UART0
00115          * – 115200bps
00116          * – 8 data bit
00117          * – No parity
00118          * – 1 stop bit
00119          * – No flow control
00120          */
00121         debug_frmwrk_init();
00122         //print menu
00123         _DBG(menu);
00124
00125         /* test Bit-banding SRAM first --------------------------------------------------------- */
00126         _DBG_("Test bit-band SRAM... ");
00127
00128         //read variable at VAR_ADDRESS
00129         temp = (*(volatile uint32_t *)(VAR_ADDRESS));
00130         //print temp value
00131         _DBG("The value at address "); _DBH32(VAR_ADDRESS); _DBG(": ");
00132         _DBH32(temp); _DBG_("");
00133
00134         /* Use bitband function to read VAR_BIT value */
00135         temp = BITBAND_SRAM_GetBit(VAR_ADDRESS,VAR_BIT);
00136         _DBG("Use bit-band function to get value at bit 3: ");_DBG_("");
00137         _DBH32(temp); _DBG_("");
00138
00139         /* clear bit */
00140         BITBAND_SRAM_ClearBit(VAR_ADDRESS,VAR_BIT);
00141         /* re-read temp value */
00142         temp = (*(volatile uint32_t *)(VAR_ADDRESS));
00143         _DBG("Value after clear bit 3 value by using bit-band function: ");_DBG_("");
00144         _DBH32(temp); _DBG_("");
00145
00146         /* Set bit */
00147         BITBAND_SRAM_SetBit(VAR_ADDRESS,VAR_BIT);
00148         /* re-read temp value */
00149         temp = (*(volatile uint32_t *)(VAR_ADDRESS));
00150         _DBG("Value after set bit 3 value by using bit-band function: ");_DBG_("");
00151         _DBH32(temp); _DBG_("");
00152         _DBG_("");
00153
00154         /* Then, test Bit-banding PERI --------------------------------------------------------- */
00155         _DBG_("Test bit-band PERIPHERAL... ");
00156
00157         LPC_SPI->SPCR =(1<<5)|(1<<3)|(10<<8);
00158
00159         /* Read the current value of peripheral register */
00160         temp = (*(volatile uint32_t *)(PERI_ADDRESS));
00161         _DBG("The value of peripheral register at "); _DBH32(PERI_ADDRESS); _DBG(": ");_DBG_("");
00162         _DBH32(temp); _DBG_("");
00163
00164         /* Use bitband function to read VAR_BIT value */
00165         temp = BITBAND_PERI_GetBit(PERI_ADDRESS,PERI_BIT);
00166         _DBG("Use bit-band function to get value at bit 5: ");_DBG_(""); _DBH32(temp); _DBG_("");
00167
00168         /* clear bit */
00169         BITBAND_PERI_ClearBit(PERI_ADDRESS,PERI_BIT);
00170         /* re-read temp value */
00171         temp = (*(volatile uint32_t *)(PERI_ADDRESS));
00172         _DBG("Peripheral register after clear bit 5 value by using bit-band function: ");_DBG_("");
00173         _DBH32(temp); _DBG_("");
00174
00175         /* Set bit */
00176         BITBAND_PERI_SetBit(PERI_ADDRESS,PERI_BIT);
00177         /* re-read temp value */
00178         temp = (*(volatile uint32_t *)(PERI_ADDRESS));
00179         _DBG("Peripheral register after set bit 5 value by using bit-band function: ");_DBG_("");
00180         _DBH32(temp); _DBG_("");
00181
00182         while (1);
00183         return 0;
00184 }
00185
00186 /* With ARM and GHS toolsets, the entry point is main() - this will
00187  allow the linker to generate wrapper code to setup stacks, allocate
00188  heap area, and initialize and copy code and data segments. For GNU
00189  toolsets, the entry point is through __start() in the crt0_gnu.asm
00190  file, and that startup code will setup stacks and data */
00191 int main(void) {
00192         return c_entry();
00193 }
00194
00195 #ifdef  DEBUG
00196 /*******************************************************************************
00197  * @brief               Reports the name of the source file and the source line number
00198  *                              where the CHECK_PARAM error has occurred.
00199  * @param[in]   file Pointer to the source file name
00200  * @param[in]    line assert_param error line source number
00201  * @return              None
00202  *******************************************************************************/
00203 void check_failed(uint8_t *file, uint32_t line) {
00204         /* User can add his own implementation to report the file name and line number,
00205          ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
00206
00207         /* Infinite loop */
00208         while (1)
00209                 ;
00210 }
00211 #endif
00212
00213 /*
00214  * @}
00215  */
Generated on Tue Jun 7 14:58:59 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/CAN/CAN_LedControl/can_ledcontrol.c Source File

C:/nxpdrv/LPC1700CMSIS/Examples/CAN/CAN_LedControl/can_ledcontrol.c

Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          can_ledcontrol.c                        2010-07-16
00003 */
00026 #include "lpc17xx_can.h"
00027 #include "lpc17xx_libcfg.h"
00028 #include "lpc17xx_pinsel.h"
00029 #include "debug_frmwrk.h"
00030 #include "lpc17xx_gpio.h"
00031
00032 /* Example group ----------------------------------------------------------- */
00038 /************************** PRIVATE VARIABLES *************************/
00039 uint8_t menu[]=
00040         "*******************************************************************************\n\r"
00041         "Hello NXP Semiconductors \n\r"
00042         "CAN demo \n\r"
00043         "\t - MCU: LPC17xx \n\r"
00044         "\t - Core: ARM CORTEX-M3 \n\r"
00045         "\t - Communicate via: UART0 - 115200 bps \n\r"
00046         "Use two CAN peripherals: CAN1 and CAN2 to communicate\n\r"
00047         "Use CAN frames to control LED display\n\r"
00048         "*******************************************************************************\n\r";
00049
00051 CAN_MSG_Type TXMsg, RXMsg; // messages for test Bypass mode
00052 uint8_t LED_Value;
00053 uint32_t LED[8] = {(1<<6),(1<<5),(1<<4),(1<<3),(1<<2),(1<<31),(1<<29),(1<<28)};
00054
00055 /************************** PRIVATE FUNCTIONS *************************/
00056 void CAN_IRQHandler(void);
00057
00058 void CAN_InitMessage(void);
00059 void print_menu();
00060
00061 /*----------------- INTERRUPT SERVICE ROUTINES --------------------------*/
00062 /*********************************************************************/
00067 void CAN_IRQHandler()
00068 {
00069         uint8_t IntStatus;
00070         uint32_t data,i;
00071         /* get interrupt status
00072          * Note that: Interrupt register CANICR will be reset after read.
00073          * So function "CAN_IntGetStatus" should be call only one time
00074          */
00075         IntStatus = CAN_IntGetStatus(LPC_CAN2);
00076         //check receive interrupt
00077         if((IntStatus>>0)&0x01)
00078         {
00079                 CAN_ReceiveMsg(LPC_CAN2,&RXMsg);
00080                 data = RXMsg.dataA[0];
00081                 for(i=0;i<8;i++)
00082                 {
00083                         if ((data >> i)&0x01)
00084                         {
00085                                 if(i<5)
00086                                         GPIO_SetValue(2,LED[i]);
00087                                 else
00088                                         GPIO_SetValue(1,LED[i]);
00089                         }
00090                         else
00091                         {
00092                                 if(i<5)
00093                                         GPIO_ClearValue(2,LED[i]);
00094                                 else
00095                                         GPIO_ClearValue(1,LED[i]);
00096                         }
00097                 }
00098
00099         }
00100 }
00101
00102 /*-------------------------PRIVATE FUNCTIONS----------------------------*/
00103 /*********************************************************************/
00108 void CAN_InitMessage(void) {
00109         TXMsg.format = EXT_ID_FORMAT;
00110         TXMsg.id = 0x00001234;
00111         TXMsg.len = 8;
00112         TXMsg.type = DATA_FRAME;
00113         TXMsg.dataA[0] = TXMsg.dataA[1] = TXMsg.dataA[2] = TXMsg.dataA[3] = 0x00000000;
00114         TXMsg.dataB[0] = TXMsg.dataB[1] = TXMsg.dataB[2] = TXMsg.dataB[3] = 0x00000000;
00115
00116         RXMsg.format = 0x00;
00117         RXMsg.id = 0x00;
00118         RXMsg.len = 0x00;
00119         RXMsg.type = 0x00;
00120         RXMsg.dataA[0] = RXMsg.dataA[1] = RXMsg.dataA[2] = RXMsg.dataA[3] = 0x00000000;
00121         RXMsg.dataB[0] = RXMsg.dataB[1] = RXMsg.dataB[2] = RXMsg.dataB[3] = 0x00000000;
00122 }
00123
00124 /*********************************************************************/
00129 void print_menu()
00130 {
00131         _DBG(menu);
00132 }
00133
00134 /*-------------------------MAIN FUNCTION------------------------------*/
00135 /*********************************************************************/
00140 int c_entry(void) { /* Main Program */
00141         PINSEL_CFG_Type PinCfg;
00142         uint32_t test;
00143
00144         /* Initialize debug via UART0
00145          * – 115200bps
00146          * – 8 data bit
00147          * – No parity
00148          * – 1 stop bit
00149          * – No flow control
00150          */
00151         debug_frmwrk_init();
00152         print_menu();
00153
00154         /* LED setting */
00155         GPIO_SetDir(1,(1<<28)|(1<<29)|(1<<31),1);
00156         GPIO_SetDir(2,(1<<2)|(1<<3)|(1<<4)|(1<<5)|(1<<6),1);
00157
00158         /* Pin configuration
00159          * CAN1: select P0.0 as RD1. P0.1 as TD1
00160          * CAN2: select P2.7 as RD2, P2.8 as RD2
00161          */
00162         PinCfg.Funcnum = 1;
00163         PinCfg.OpenDrain = 0;
00164         PinCfg.Pinmode = 0;
00165         PinCfg.Pinnum = 0;
00166         PinCfg.Portnum = 0;
00167         PINSEL_ConfigPin(&PinCfg);
00168         PinCfg.Pinnum = 1;
00169         PINSEL_ConfigPin(&PinCfg);
00170
00171         PinCfg.Pinnum = 7;
00172         PinCfg.Portnum = 2;
00173         PINSEL_ConfigPin(&PinCfg);
00174         PinCfg.Pinnum = 8;
00175         PINSEL_ConfigPin(&PinCfg);
00176
00177         //Initialize CAN1 & CAN2
00178         CAN_Init(LPC_CAN1, 125000);
00179         CAN_Init(LPC_CAN2, 125000);
00180
00181         //Enable Interrupt
00182         CAN_IRQCmd(LPC_CAN2, CANINT_RIE, ENABLE);
00183         CAN_SetAFMode(LPC_CANAF,CAN_AccBP);
00184         CAN_InitMessage();
00185
00186         //Enable CAN Interrupt
00187         NVIC_EnableIRQ(CAN_IRQn);
00188         while(1)
00189         {
00190                 _DBG("Press LED value that you want to display \n\r"
00191                           "This value should be in range from 0x00 to 0xFF: ");
00192 loop:
00193                 LED_Value = 0;
00194                 test = _DG;
00195                 switch(test)
00196                 {
00197                 case '0': LED_Value = 0; break;
00198                 case '1': LED_Value = 1; break;
00199                 case '2': LED_Value = 2; break;
00200                 case '3': LED_Value = 3; break;
00201                 case '4': LED_Value = 4; break;
00202                 case '5': LED_Value = 5; break;
00203                 case '6': LED_Value = 6; break;
00204                 case '7': LED_Value = 7; break;
00205                 case '8': LED_Value = 8; break;
00206                 case '9': LED_Value = 9; break;
00207                 case 'A': LED_Value = 0x0A; break;
00208                 case 'a': LED_Value = 0x0A; break;
00209                 case 'B': LED_Value = 0x0B; break;
00210                 case 'b': LED_Value = 0x0B; break;
00211                 case 'C': LED_Value = 0x0C; break;
00212                 case 'c': LED_Value = 0x0C; break;
00213                 case 'D': LED_Value = 0x0D; break;
00214                 case 'd': LED_Value = 0x0D; break;
00215                 case 'E': LED_Value = 0x0E; break;
00216                 case 'e': LED_Value = 0x0E; break;
00217                 case 'F': LED_Value = 0x0F; break;
00218                 case 'f': LED_Value = 0x0F; break;
00219                 default:
00220                         _DBG_("\n\rInvalid input, please type again!");
00221                         goto loop;
00222                 }
00223                 test = _DG;
00224                 switch(test)
00225                 {
00226                 case '0': LED_Value = (LED_Value<<4)|0; break;
00227                 case '1': LED_Value = (LED_Value<<4)|1; break;
00228                 case '2': LED_Value = (LED_Value<<4)|2; break;
00229                 case '3': LED_Value = (LED_Value<<4)|3; break;
00230                 case '4': LED_Value = (LED_Value<<4)|4; break;
00231                 case '5': LED_Value = (LED_Value<<4)|5; break;
00232                 case '6': LED_Value = (LED_Value<<4)|6; break;
00233                 case '7': LED_Value = (LED_Value<<4)|7; break;
00234                 case '8': LED_Value = (LED_Value<<4)|8; break;
00235                 case '9': LED_Value = (LED_Value<<4)|9; break;
00236                 case 'A': LED_Value = (LED_Value<<4)|0x0A; break;
00237                 case 'a': LED_Value = (LED_Value<<4)|0x0A; break;
00238                 case 'B': LED_Value = (LED_Value<<4)|0x0B; break;
00239                 case 'b': LED_Value = (LED_Value<<4)|0x0B; break;
00240                 case 'C': LED_Value = (LED_Value<<4)|0x0C; break;
00241                 case 'c': LED_Value = (LED_Value<<4)|0x0C; break;
00242                 case 'D': LED_Value = (LED_Value<<4)|0x0D; break;
00243                 case 'd': LED_Value = (LED_Value<<4)|0x0D; break;
00244                 case 'E': LED_Value = (LED_Value<<4)|0x0E; break;
00245                 case 'e': LED_Value = (LED_Value<<4)|0x0E; break;
00246                 case 'F': LED_Value = (LED_Value<<4)|0x0F; break;
00247                 case 'f': LED_Value = (LED_Value<<4)|0x0F; break;
00248                 default:
00249                         _DBG_("\n\rInvalid input, please type again!");
00250                         goto loop;
00251                 }
00252                 _DBH32(LED_Value);_DBG_("");
00253                 _DBG_("Display LED... ");_DBG_("");
00254                 TXMsg.dataA[0] = LED_Value;
00255                 CAN_SendMsg(LPC_CAN1, &TXMsg);
00256         }
00257         return 1;
00258 }
00259
00260 /* With ARM and GHS toolsets, the entry point is main() - this will
00261  allow the linker to generate wrapper code to setup stacks, allocate
00262  heap area, and initialize and copy code and data segments. For GNU
00263  toolsets, the entry point is through __start() in the crt0_gnu.asm
00264  file, and that startup code will setup stacks and data */
00265 int main(void) {
00266         return c_entry();
00267 }
00268
00269 #ifdef  DEBUG
00270 /*******************************************************************************
00271  * @brief               Reports the name of the source file and the source line number
00272  *                              where the CHECK_PARAM error has occurred.
00273  * @param[in]   file Pointer to the source file name
00274  * @param[in]    line assert_param error line source number
00275  * @return              None
00276  *******************************************************************************/
00277 void check_failed(uint8_t *file, uint32_t line) {
00278         /* User can add his own implementation to report the file name and line number,
00279          ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
00280
00281         /* Infinite loop */
00282         while (1)
00283                 ;
00284 }
00285 #endif
00286
00287 /*
00288  * @}
00289  */
Generated on Tue Jun 7 14:58:58 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/CAN/CAN_self_test/can_self_test.c Source File

C:/nxpdrv/LPC1700CMSIS/Examples/CAN/CAN_self_test/can_self_test.c

Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          can_self_test.c                 2010-06-18
00003 */
00025 #include "lpc17xx_can.h"
00026 #include "lpc17xx_libcfg.h"
00027 #include "debug_frmwrk.h"
00028
00029 /* Example group ----------------------------------------------------------- */
00034 /************************** PRIVATE VARIABLES *************************/
00035 uint8_t menu[]=
00036         "*******************************************************************************\n\r"
00037         "Hello NXP Semiconductors \n\r"
00038         "CAN Self-test demo \n\r"
00039         "\t - MCU: LPC17xx \n\r"
00040         "\t - Core: ARM CORTEX-M3 \n\r"
00041         "\t - Communicate via: UART0 - 115200 bps \n\r"
00042         "Use only CAN1 peripherals to test\n\r"
00043         "This example used to test Self test mode\n\r"
00044         "*******************************************************************************\n\r";
00045
00047 CAN_MSG_Type TXMsg, RXMsg; // messages for test Bypass mode
00048 uint32_t CANRxCount, CANTxCount = 0;
00049
00050 /************************** PRIVATE FUNCTIONS *************************/
00051 void CAN_IRQHandler(void);
00052
00053 void CAN_InitMessage(void);
00054 void PrintMessage(CAN_MSG_Type* msg);
00055 void print_menu();
00056 Bool Check_Message(CAN_MSG_Type* TX_Msg, CAN_MSG_Type* RX_Msg);
00057
00058
00059 /*----------------- INTERRUPT SERVICE ROUTINES --------------------------*/
00060 /*********************************************************************/
00065 void CAN_IRQHandler()
00066 {
00067         uint8_t IntStatus;
00068 //      uint32_t data1;
00069         /* Get CAN status */
00070         IntStatus = CAN_GetCTRLStatus(LPC_CAN1, CANCTRL_STS);
00071         //check receive buffer status
00072         if((IntStatus>>0)&0x01)
00073         {
00074                 CAN_ReceiveMsg(LPC_CAN1,&RXMsg);
00075                 _DBG_("Received buffer:");
00076                 PrintMessage(&RXMsg);
00077                 //Validate received and transmited message
00078                 if(Check_Message(&TXMsg, &RXMsg))
00079                         _DBG_("Self test is SUCCESSFUL!!!");
00080                 else
00081                         _DBG_("Self test is FAIL!!!");
00082         }
00083 }
00084
00085 /*-------------------------PRIVATE FUNCTIONS----------------------------*/
00086 /*********************************************************************/
00091 void PrintMessage(CAN_MSG_Type* CAN_Msg)
00092 {
00093         uint32_t data;
00094         _DBG("Message ID:     ");
00095         _DBH32(CAN_Msg->id);_DBG_("");
00096         _DBG("Message length: ");
00097         _DBH32(CAN_Msg->len);_DBG_(" BYTES");
00098         _DBG("Message type:   ");
00099         if(CAN_Msg->type==DATA_FRAME)
00100         {
00101                 _DBG_("DATA FRAME ");
00102         }
00103         else
00104                 _DBG_("REMOTE FRAME ");
00105         _DBG("Message format: ");
00106         if(CAN_Msg->format==STD_ID_FORMAT)
00107         {
00108                 _DBG_("STANDARD ID FRAME FORMAT");
00109         }
00110         else
00111                 _DBG_("EXTENDED ID FRAME FORMAT");
00112         _DBG("Message dataA:  ");
00113         data = (CAN_Msg->dataA[0])|(CAN_Msg->dataA[1]<<8)|(CAN_Msg->dataA[2]<<16)|(CAN_Msg->dataA[3]<<24);
00114         _DBH32(data);_DBG_("");
00115         data = (CAN_Msg->dataB[0])|(CAN_Msg->dataB[1]<<8)|(CAN_Msg->dataB[2]<<16)|(CAN_Msg->dataB[3]<<24);
00116         _DBG("Message dataB:  ");
00117         _DBH32(data);_DBG_("");
00118         _DBG_("");
00119 }
00120
00121 /*********************************************************************/
00126 void CAN_InitMessage(void) {
00127         TXMsg.format = EXT_ID_FORMAT;
00128         TXMsg.id = 0x00001234;
00129         TXMsg.len = 8;
00130         TXMsg.type = DATA_FRAME;
00131         TXMsg.dataA[0] = TXMsg.dataA[1] = TXMsg.dataA[2] = TXMsg.dataA[3] = 0x12;
00132         TXMsg.dataB[0] = TXMsg.dataB[1] = TXMsg.dataB[2] = TXMsg.dataB[3] = 0x34;
00133
00134         RXMsg.format = 0x00;
00135         RXMsg.id = 0x00;
00136         RXMsg.len = 0x00;
00137         RXMsg.type = 0x00;
00138         RXMsg.dataA[0] = RXMsg.dataA[1] = RXMsg.dataA[2] = RXMsg.dataA[3] = 0x00000000;
00139         RXMsg.dataB[0] = RXMsg.dataA[1] = RXMsg.dataA[2] = RXMsg.dataA[3] = 0x00000000;
00140 }
00141
00142 /*********************************************************************/
00147 void print_menu()
00148 {
00149         _DBG_(menu);
00150 }
00151
00152 /*********************************************************************/
00160 Bool Check_Message(CAN_MSG_Type* TX_Msg, CAN_MSG_Type* RX_Msg)
00161 {
00162         uint8_t i;
00163         if((TXMsg.format != RXMsg.format)|(TXMsg.id != RXMsg.id)|(TXMsg.len != RXMsg.len)\
00164                 |(TXMsg.type != RXMsg.type))
00165                 return FALSE;
00166         for(i=0;i<4;i++)
00167         {
00168                 if((TXMsg.dataA[i]!=RXMsg.dataA[i])|(TXMsg.dataB[i]!=RXMsg.dataB[i]))
00169                         return FALSE;
00170         }
00171         return TRUE;
00172 }
00173 /*-------------------------MAIN FUNCTION------------------------------*/
00174 /*********************************************************************/
00179 int c_entry(void) { /* Main Program */
00180
00181         /* Initialize debug via UART0
00182          * – 115200bps
00183          * – 8 data bit
00184          * – No parity
00185          * – 1 stop bit
00186          * – No flow control
00187          */
00188         debug_frmwrk_init();
00189         print_menu();
00190
00191         /* Initialize CAN1 peripheral
00192          * Note: Self-test mode doesn't require pin selection
00193          */
00194         CAN_Init(LPC_CAN1, 125000);
00195
00196         //Enable self-test mode
00197         CAN_ModeConfig(LPC_CAN1, CAN_SELFTEST_MODE, ENABLE);
00198
00199         //Enable Interrupt
00200         CAN_IRQCmd(LPC_CAN1, CANINT_RIE, ENABLE);
00201         CAN_IRQCmd(LPC_CAN1, CANINT_TIE1, ENABLE);
00202
00203         //Enable CAN Interrupt
00204         NVIC_EnableIRQ(CAN_IRQn);
00205         CAN_SetAFMode(LPC_CANAF,CAN_AccBP);
00206         CAN_InitMessage();
00207         _DBG_("Transmitted buffer:");
00208         PrintMessage(&TXMsg);
00209
00213         CAN_SendMsg(LPC_CAN1, &TXMsg);
00214         LPC_CAN1->CMR |=(1<<4); //Self Reception Request
00215
00216         while (1);
00217 }
00218
00219 /* With ARM and GHS toolsets, the entry point is main() - this will
00220  allow the linker to generate wrapper code to setup stacks, allocate
00221  heap area, and initialize and copy code and data segments. For GNU
00222  toolsets, the entry point is through __start() in the crt0_gnu.asm
00223  file, and that startup code will setup stacks and data */
00224 int main(void) {
00225         return c_entry();
00226 }
00227
00228 #ifdef  DEBUG
00229 /*******************************************************************************
00230  * @brief               Reports the name of the source file and the source line number
00231  *                              where the CHECK_PARAM error has occurred.
00232  * @param[in]   file Pointer to the source file name
00233  * @param[in]    line assert_param error line source number
00234  * @return              None
00235  *******************************************************************************/
00236 void check_failed(uint8_t *file, uint32_t line) {
00237         /* User can add his own implementation to report the file name and line number,
00238          ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
00239
00240         /* Infinite loop */
00241         while (1)
00242                 ;
00243 }
00244 #endif
00245
00246 /*
00247  * @}
00248  */
Generated on Tue Jun 7 14:58:58 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/CAN/CAN_test_aflut/can_test_aflut.c Source File

C:/nxpdrv/LPC1700CMSIS/Examples/CAN/CAN_test_aflut/can_test_aflut.c

Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          can_AFLUT_dynamic.c                     2010-05-21
00003 */
00026 #include "lpc17xx_can.h"
00027 #include "lpc17xx_libcfg.h"
00028 #include "lpc17xx_pinsel.h"
00029 #include "debug_frmwrk.h"
00030
00031 /* Example group ----------------------------------------------------------- */
00037 /************************** PRIVATE DEFINTIONS*************************/
00038 #define MAX_ENTRY                       512
00039 #define CAN_TX_MSG_CNT          10
00040 #define CAN_RX_MSG_CNT          5
00041
00042 /************************** PRIVATE VARIABLES *************************/
00043 uint8_t menu[]=
00044         "********************************************************************************\n\r"
00045         "Hello NXP Semiconductors \n\r"
00046         "CAN demo \n\r"
00047         "\t - MCU: LPC17xx \n\r"
00048         "\t - Core: ARM CORTEX-M3 \n\r"
00049         "\t - Communicate via: UART0 - 115200 bps \n\r"
00050         "Use 2 CAN peripherals: CAN1&CAN2 to transfer data\n\r"
00051         "This example tests full Acceptance Filter operation \n\r"
00052         "and load/remove AFLUT entry dynamically functions \n\r"
00053         "********************************************************************************\n\r";
00054
00055 //messages for test Acceptance Filter mode
00056 CAN_MSG_Type AFTxMsg[CAN_TX_MSG_CNT], AFRxMsg[CAN_RX_MSG_CNT];
00057 uint32_t CANRxCount = 0, CANTxCount = 0;
00058 uint32_t CANErrCount = 0;
00059
00060 AF_SectionDef AFTable;
00061 FullCAN_Entry FullCAN_Table[6];
00062 SFF_Entry SFF_Table[6];
00063 SFF_GPR_Entry SFF_GPR_Table[6];
00064 EFF_Entry EFF_Table[6];
00065 EFF_GPR_Entry EFF_GPR_Table[6];
00066
00067 /************************** PRIVATE FUNCTIONS *************************/
00068 /* CAN interrupt service routine */
00069 void CAN_IRQHandler(void);
00070
00071 void CAN_PinCfg(void);
00072 void CAN_InitMessage(void);
00073 void CAN_SetupAFTable(void);
00074 void CAN_InitAFMessage(void);
00075 void PrintMessage(CAN_MSG_Type* msg);
00076 void print_menu(void);
00077
00078 /*----------------- INTERRUPT SERVICE ROUTINES --------------------------*/
00079 /*********************************************************************/
00084 void CAN_IRQHandler(void)
00085 {
00086         uint8_t IntStatus;
00087         //check FullCAN interrupt enable or not
00088         if(CAN_FullCANIntGetStatus(LPC_CANAF)== SET)
00089         {       //check is FullCAN interrupt occurs or not
00090                 if ((CAN_FullCANPendGetStatus(LPC_CANAF,FULLCAN_IC0))
00091                                 ||(CAN_FullCANPendGetStatus(LPC_CANAF,FULLCAN_IC1)))
00092                 {
00093                         //read received FullCAN Object in Object Section
00094                         FCAN_ReadObj(LPC_CANAF, &AFRxMsg[CANRxCount]);
00095                         CANRxCount++;
00096                 }
00097         }
00098         /* get interrupt status
00099          * Note that: Interrupt register CANICR will be reset after read.
00100          * So function "CAN_IntGetStatus" should be call only one time
00101          */
00102         IntStatus = CAN_IntGetStatus(LPC_CAN2);
00103         //check receive interrupt
00104         if((IntStatus>>0)&0x01)
00105         {
00106                 CAN_ReceiveMsg(LPC_CAN2, &AFRxMsg[CANRxCount]);
00107                 CANRxCount++;
00108         }
00109 }
00110
00111 /*-------------------------PRIVATE FUNCTIONS----------------------------*/
00112 /*********************************************************************/
00117 void PrintMessage(CAN_MSG_Type* CAN_Msg)
00118 {
00119         uint32_t data;
00120         _DBG("Message ID:     ");
00121         _DBH32(CAN_Msg->id);_DBG_("");
00122         _DBG("Message length: ");
00123         _DBH32(CAN_Msg->len);_DBG_(" BYTES");
00124         _DBG("Message type:   ");
00125         if(CAN_Msg->type==DATA_FRAME)
00126         {
00127                 _DBG_("DATA FRAME ");
00128         }
00129         else
00130                 _DBG_("REMOTE FRAME ");
00131         _DBG("Message format: ");
00132         if(CAN_Msg->format==STD_ID_FORMAT)
00133         {
00134                 _DBG_("STANDARD ID FRAME FORMAT");
00135         }
00136         else
00137                 _DBG_("EXTENDED ID FRAME FORMAT");
00138         _DBG("Message dataA:  ");
00139         data = (CAN_Msg->dataA[0])|(CAN_Msg->dataA[1]<<8)|(CAN_Msg->dataA[2]<<16)|(CAN_Msg->dataA[3]<<24);
00140         _DBH32(data);_DBG_("");
00141         data = (CAN_Msg->dataB[0])|(CAN_Msg->dataB[1]<<8)|(CAN_Msg->dataB[2]<<16)|(CAN_Msg->dataB[3]<<24);
00142         _DBG("Message dataB:  ");
00143         _DBH32(data);_DBG_("");
00144         _DBG_("");
00145 }
00146
00147 /*********************************************************************/
00158 void CAN_SetupAFTable(void) {
00159         FullCAN_Table[0].controller = CAN2_CTRL;
00160         FullCAN_Table[0].disable = MSG_ENABLE;
00161         FullCAN_Table[0].id_11 = 0x01;
00162         FullCAN_Table[1].controller = CAN2_CTRL;
00163         FullCAN_Table[1].disable = MSG_ENABLE;
00164         FullCAN_Table[1].id_11 = 0x02;
00165         FullCAN_Table[2].controller = CAN2_CTRL;
00166         FullCAN_Table[2].disable = MSG_ENABLE;
00167         FullCAN_Table[2].id_11 = 0x03;
00168         FullCAN_Table[3].controller = CAN2_CTRL;
00169         FullCAN_Table[3].disable = MSG_ENABLE;
00170         FullCAN_Table[3].id_11 = 0x06;
00171         FullCAN_Table[4].controller = CAN2_CTRL;
00172         FullCAN_Table[4].disable = MSG_ENABLE;
00173         FullCAN_Table[4].id_11 = 0x0C;
00174         FullCAN_Table[5].controller = CAN2_CTRL;
00175         FullCAN_Table[5].disable = MSG_ENABLE;
00176         FullCAN_Table[5].id_11 = 0x0D;
00177
00178         SFF_Table[0].controller = CAN2_CTRL;
00179         SFF_Table[0].disable = MSG_ENABLE;
00180         SFF_Table[0].id_11 = 0x08;
00181         SFF_Table[1].controller = CAN2_CTRL;
00182         SFF_Table[1].disable = MSG_ENABLE;
00183         SFF_Table[1].id_11 = 0x09;
00184         SFF_Table[2].controller = CAN2_CTRL;
00185         SFF_Table[2].disable = MSG_ENABLE;
00186         SFF_Table[2].id_11 = 0x0A;
00187         SFF_Table[3].controller = CAN2_CTRL;
00188         SFF_Table[3].disable = MSG_ENABLE;
00189         SFF_Table[3].id_11 = 0x0B;
00190         SFF_Table[4].controller = CAN2_CTRL;
00191         SFF_Table[4].disable = MSG_ENABLE;
00192         SFF_Table[4].id_11 = 0x0E;
00193         SFF_Table[5].controller = CAN2_CTRL;
00194         SFF_Table[5].disable = MSG_ENABLE;
00195         SFF_Table[5].id_11 = 0x0F;
00196
00197         SFF_GPR_Table[0].controller1 = SFF_GPR_Table[0].controller2 = CAN2_CTRL;
00198         SFF_GPR_Table[0].disable1 = SFF_GPR_Table[0].disable2 = MSG_ENABLE;
00199         SFF_GPR_Table[0].lowerID = 0x10;
00200         SFF_GPR_Table[0].upperID = 0x20;
00201         SFF_GPR_Table[1].controller1 = SFF_GPR_Table[1].controller2 = CAN2_CTRL;
00202         SFF_GPR_Table[1].disable1 = SFF_GPR_Table[1].disable2 = MSG_ENABLE;
00203         SFF_GPR_Table[1].lowerID = 0x20;
00204         SFF_GPR_Table[1].upperID = 0x25;
00205         SFF_GPR_Table[2].controller1 = SFF_GPR_Table[2].controller2 = CAN2_CTRL;
00206         SFF_GPR_Table[2].disable1 = SFF_GPR_Table[2].disable2 = MSG_ENABLE;
00207         SFF_GPR_Table[2].lowerID = 0x30;
00208         SFF_GPR_Table[2].upperID = 0x40;
00209         SFF_GPR_Table[3].controller1 = SFF_GPR_Table[3].controller2 = CAN2_CTRL;
00210         SFF_GPR_Table[3].disable1 = SFF_GPR_Table[3].disable2 = MSG_ENABLE;
00211         SFF_GPR_Table[3].lowerID = 0x40;
00212         SFF_GPR_Table[3].upperID = 0x50;
00213         SFF_GPR_Table[4].controller1 = SFF_GPR_Table[4].controller2 = CAN2_CTRL;
00214         SFF_GPR_Table[4].disable1 = SFF_GPR_Table[4].disable2 = MSG_ENABLE;
00215         SFF_GPR_Table[4].lowerID = 0x50;
00216         SFF_GPR_Table[4].upperID = 0x60;
00217         SFF_GPR_Table[5].controller1 = SFF_GPR_Table[5].controller2 = CAN2_CTRL;
00218         SFF_GPR_Table[5].disable1 = SFF_GPR_Table[5].disable2 = MSG_ENABLE;
00219         SFF_GPR_Table[5].lowerID = 0x60;
00220         SFF_GPR_Table[5].upperID = 0x70;
00221
00222         EFF_Table[0].controller = CAN2_CTRL;
00223         EFF_Table[0].ID_29 = (1 << 11);
00224         EFF_Table[1].controller = CAN2_CTRL;
00225         EFF_Table[1].ID_29 = (2 << 11);
00226         EFF_Table[2].controller = CAN2_CTRL;
00227         EFF_Table[2].ID_29 = (3 << 11);
00228         EFF_Table[3].controller = CAN2_CTRL;
00229         EFF_Table[3].ID_29 = (4 << 11);
00230         EFF_Table[4].controller = CAN2_CTRL;
00231         EFF_Table[4].ID_29 = (0x0e << 11);
00232         EFF_Table[5].controller = CAN2_CTRL;
00233         EFF_Table[5].ID_29 = (0x0f << 11);
00234
00235         EFF_GPR_Table[0].controller1 = EFF_GPR_Table[0].controller2 = CAN2_CTRL;
00236         EFF_GPR_Table[0].lowerEID = (5 << 11);
00237         EFF_GPR_Table[0].upperEID = (6 << 11);
00238         EFF_GPR_Table[1].controller1 = EFF_GPR_Table[1].controller2 = CAN2_CTRL;
00239         EFF_GPR_Table[1].lowerEID = (7 << 11);
00240         EFF_GPR_Table[1].upperEID = (8 << 11);
00241         EFF_GPR_Table[2].controller1 = EFF_GPR_Table[2].controller2 = CAN2_CTRL;
00242         EFF_GPR_Table[2].lowerEID = (9 << 11);
00243         EFF_GPR_Table[2].upperEID = (0x0a << 11);
00244         EFF_GPR_Table[3].controller1 = EFF_GPR_Table[3].controller2 = CAN2_CTRL;
00245         EFF_GPR_Table[3].lowerEID = (0x0b << 11);
00246         EFF_GPR_Table[3].upperEID = (0x0c << 11);
00247         EFF_GPR_Table[4].controller1 = EFF_GPR_Table[4].controller2 = CAN2_CTRL;
00248         EFF_GPR_Table[4].lowerEID = (0x11 << 11);
00249         EFF_GPR_Table[4].upperEID = (0x12 << 11);
00250         EFF_GPR_Table[5].controller1 = EFF_GPR_Table[5].controller2 = CAN2_CTRL;
00251         EFF_GPR_Table[5].lowerEID = (0x13 << 11);
00252         EFF_GPR_Table[5].upperEID = (0x14 << 11);
00253
00254         AFTable.FullCAN_Sec = &FullCAN_Table[0];
00255         AFTable.FC_NumEntry = 6;
00256         AFTable.SFF_Sec = &SFF_Table[0];
00257         AFTable.SFF_NumEntry = 6;
00258         AFTable.SFF_GPR_Sec = &SFF_GPR_Table[0];
00259         AFTable.SFF_GPR_NumEntry = 6;
00260         AFTable.EFF_Sec = &EFF_Table[0];
00261         AFTable.EFF_NumEntry = 6;
00262         AFTable.EFF_GPR_Sec = &EFF_GPR_Table[0];
00263         AFTable.EFF_GPR_NumEntry = 6;
00264 }
00265 /*********************************************************************/
00270 void CAN_ChangeAFTable(void)
00271 {
00272         CAN_LoadFullCANEntry(LPC_CAN2, 4);
00273         CAN_LoadExplicitEntry(LPC_CAN2, 5, STD_ID_FORMAT);
00274         CAN_LoadGroupEntry(LPC_CAN2,0x25,0x30, STD_ID_FORMAT);
00275         CAN_LoadExplicitEntry(LPC_CAN2, (3<<11)+0x05, EXT_ID_FORMAT);
00276         CAN_LoadGroupEntry(LPC_CAN2,(0x0a<<11),(0x0b<<11), EXT_ID_FORMAT);
00277
00278         CAN_RemoveEntry(FULLCAN_ENTRY, 0);
00279         CAN_RemoveEntry(EXPLICIT_STANDARD_ENTRY, 0);
00280         CAN_RemoveEntry(GROUP_STANDARD_ENTRY, 0);
00281         CAN_RemoveEntry(EXPLICIT_EXTEND_ENTRY, 2);
00282         CAN_RemoveEntry(GROUP_EXTEND_ENTRY, 2);
00283
00284 }
00285 /*********************************************************************/
00293 void CAN_InitAFMessage(void) {
00294         /* 1st Message with 11-bit ID which exit in AF Look-up Table in FullCAN Section */
00295         AFTxMsg[0].id = 0x01;
00296         AFTxMsg[0].len = 0x08;
00297         AFTxMsg[0].type = DATA_FRAME;
00298         AFTxMsg[0].format = STD_ID_FORMAT;
00299         AFTxMsg[0].dataA[0] = AFTxMsg[0].dataA[1] = AFTxMsg[0].dataA[2]= AFTxMsg[0].dataA[3]= 0x78;
00300         AFTxMsg[0].dataB[0] = AFTxMsg[0].dataB[1] = AFTxMsg[0].dataB[2]= AFTxMsg[0].dataB[3]= 0x21;
00301
00302         /* 2nd Message with 11-bit ID which not exit in AF Look-up Table */
00303         AFTxMsg[1].id = 0x04;
00304         AFTxMsg[1].len = 0x08;
00305         AFTxMsg[1].type = DATA_FRAME;
00306         AFTxMsg[1].format = STD_ID_FORMAT;
00307         AFTxMsg[1].dataA[0] = AFTxMsg[1].dataA[1] = AFTxMsg[1].dataA[2]= AFTxMsg[1].dataA[3]= 0x23;
00308         AFTxMsg[1].dataB[0] = AFTxMsg[1].dataB[1] = AFTxMsg[1].dataB[2]= AFTxMsg[1].dataB[3]= 0x45;
00309
00310         /* 3th Message with 11-bit ID which exit in AF Look-up Table in SFF Section*/
00311         AFTxMsg[2].id = 0x08;
00312         AFTxMsg[2].len = 0x08;
00313         AFTxMsg[2].type = DATA_FRAME;
00314         AFTxMsg[2].format = STD_ID_FORMAT;
00315         AFTxMsg[2].dataA[0] = AFTxMsg[2].dataA[1] = AFTxMsg[2].dataA[2]= AFTxMsg[2].dataA[3]= 0x15;
00316         AFTxMsg[2].dataB[0] = AFTxMsg[2].dataB[1] = AFTxMsg[2].dataB[2]= AFTxMsg[2].dataB[3]= 0x36;
00317
00318         /* 4th Message with 11-bit ID which not exit in AF Look-up Table */
00319         AFTxMsg[3].id = 0x05;
00320         AFTxMsg[3].len = 0x08;
00321         AFTxMsg[3].type = DATA_FRAME;
00322         AFTxMsg[3].format = STD_ID_FORMAT;
00323         AFTxMsg[3].dataA[0] = AFTxMsg[3].dataA[1] = AFTxMsg[3].dataA[2]= AFTxMsg[3].dataA[3]= 0x78;
00324         AFTxMsg[3].dataB[0] = AFTxMsg[3].dataB[1] = AFTxMsg[3].dataB[2]= AFTxMsg[3].dataB[3]= 0x21;
00325
00326         /* 5th Message with 11-bit ID which exit in AF Look-up Table in Group SFF Section*/
00327         AFTxMsg[4].id = 0x15;
00328         AFTxMsg[4].len = 0x08;
00329         AFTxMsg[4].type = DATA_FRAME;
00330         AFTxMsg[4].format = STD_ID_FORMAT;
00331         AFTxMsg[4].dataA[0] = AFTxMsg[4].dataA[1] = AFTxMsg[4].dataA[2]= AFTxMsg[4].dataA[3]= 0x65;
00332         AFTxMsg[4].dataB[0] = AFTxMsg[4].dataB[1] = AFTxMsg[4].dataB[2]= AFTxMsg[4].dataB[3]= 0x37;
00333
00334         /* 6th Message with 11-bit ID which not exit in AF Look-up Table */
00335         AFTxMsg[5].id = 0x26;
00336         AFTxMsg[5].len = 0x08;
00337         AFTxMsg[5].type = DATA_FRAME;
00338         AFTxMsg[5].format = STD_ID_FORMAT;
00339         AFTxMsg[5].dataA[0] = AFTxMsg[5].dataA[1] = AFTxMsg[5].dataA[2]= AFTxMsg[5].dataA[3]= 0x76;
00340         AFTxMsg[5].dataB[0] = AFTxMsg[5].dataB[1] = AFTxMsg[5].dataB[2]= AFTxMsg[5].dataB[3]= 0x32;
00341
00342         /* 7th Message with 29-bit ID which exit in AF Look-up Table in EFF Section */
00343         AFTxMsg[6].id = (3 << 11); //0x00001800
00344         AFTxMsg[6].len = 0x08;
00345         AFTxMsg[6].type = DATA_FRAME;
00346         AFTxMsg[6].format = EXT_ID_FORMAT;
00347         AFTxMsg[6].dataA[0] = AFTxMsg[6].dataA[1] = AFTxMsg[6].dataA[2]= AFTxMsg[6].dataA[3]= 0x45;
00348         AFTxMsg[6].dataB[0] = AFTxMsg[6].dataB[1] = AFTxMsg[6].dataB[2]= AFTxMsg[6].dataB[3]= 0x87;
00349
00350         /* 8th Message with 29-bit ID which not exit in AF Look-up Table */
00351         AFTxMsg[7].id = (3 << 11) + 0x05; //0x00001801
00352         AFTxMsg[7].len = 0x08;
00353         AFTxMsg[7].type = DATA_FRAME;
00354         AFTxMsg[7].format = EXT_ID_FORMAT;
00355         AFTxMsg[7].dataA[0] = AFTxMsg[7].dataA[1] = AFTxMsg[7].dataA[2]= AFTxMsg[7].dataA[3]= 0x78;
00356         AFTxMsg[7].dataB[0] = AFTxMsg[7].dataB[1] = AFTxMsg[7].dataB[2]= AFTxMsg[7].dataB[3]= 0x21;
00357
00358         /* 9th Message with 29-bit ID which exit in AF Look-up Table in Group of EFF Section*/
00359         AFTxMsg[8].id = (9 << 11) + 0x01; //0x00004801
00360         AFTxMsg[8].len = 0x08;
00361         AFTxMsg[8].type = DATA_FRAME;
00362         AFTxMsg[8].format = EXT_ID_FORMAT;
00363         AFTxMsg[8].dataA[0] = AFTxMsg[8].dataA[1] = AFTxMsg[8].dataA[2]= AFTxMsg[8].dataA[3]= 0x52;
00364         AFTxMsg[8].dataB[0] = AFTxMsg[8].dataB[1] = AFTxMsg[8].dataB[2]= AFTxMsg[8].dataB[3]= 0x06;
00365
00366         /* 10th Message with 29-bit ID which not exit in AF Look-up Table */
00367         AFTxMsg[9].id = (0x0A << 11) + 0x01; //0x00005001
00368         AFTxMsg[9].len = 0x08;
00369         AFTxMsg[9].type = DATA_FRAME;
00370         AFTxMsg[9].format = EXT_ID_FORMAT;
00371         AFTxMsg[9].dataA[0] = AFTxMsg[9].dataA[1] = AFTxMsg[9].dataA[2]= AFTxMsg[9].dataA[3]= 0x85;
00372         AFTxMsg[9].dataB[0] = AFTxMsg[9].dataB[1] = AFTxMsg[9].dataB[2]= AFTxMsg[9].dataB[3]= 0x27;
00373
00374         AFRxMsg[0].id = AFRxMsg[1].id = AFRxMsg[2].id = AFRxMsg[3].id = AFRxMsg[4].id = 0x00;
00375         AFRxMsg[0].len = AFRxMsg[1].len = AFRxMsg[2].len = AFRxMsg[3].len = AFRxMsg[4].len = 0x00;
00376         AFRxMsg[0].type = AFRxMsg[1].type = AFRxMsg[2].type = AFRxMsg[3].type = AFRxMsg[4].type = 0x00;
00377         AFRxMsg[0].format = AFRxMsg[1].format = AFRxMsg[2].format = AFRxMsg[3].format = AFRxMsg[4].format = 0x00;
00378         AFRxMsg[0].dataA[0] = AFRxMsg[1].dataA[0] = AFRxMsg[2].dataA[0] = AFRxMsg[3].dataA[0] = AFRxMsg[4].dataA[0] = 0x00;
00379         AFRxMsg[0].dataA[1] = AFRxMsg[1].dataA[1] = AFRxMsg[2].dataA[1] = AFRxMsg[3].dataA[1] = AFRxMsg[4].dataA[1] = 0x00;
00380         AFRxMsg[0].dataA[2] = AFRxMsg[1].dataA[2] = AFRxMsg[2].dataA[2] = AFRxMsg[3].dataA[2] = AFRxMsg[4].dataA[2] = 0x00;
00381         AFRxMsg[0].dataA[3] = AFRxMsg[1].dataA[3] = AFRxMsg[2].dataA[3] = AFRxMsg[3].dataA[3] = AFRxMsg[4].dataA[3] = 0x00;
00382
00383         AFRxMsg[0].dataB[0] = AFRxMsg[1].dataB[0] = AFRxMsg[2].dataB[0] = AFRxMsg[3].dataB[0] = AFRxMsg[4].dataB[0] = 0x00;
00384         AFRxMsg[0].dataB[1] = AFRxMsg[1].dataB[1] = AFRxMsg[2].dataB[1] = AFRxMsg[3].dataB[1] = AFRxMsg[4].dataB[1] = 0x00;
00385         AFRxMsg[0].dataB[2] = AFRxMsg[1].dataB[2] = AFRxMsg[2].dataB[2] = AFRxMsg[3].dataB[2] = AFRxMsg[4].dataB[2] = 0x00;
00386         AFRxMsg[0].dataB[3] = AFRxMsg[1].dataB[3] = AFRxMsg[2].dataB[3] = AFRxMsg[3].dataB[3] = AFRxMsg[4].dataB[3] = 0x00;
00387 }
00388 /*********************************************************************/
00393 void print_menu()
00394 {
00395         _DBG_(menu);
00396 }
00397
00398 /*-------------------------MAIN FUNCTION------------------------------*/
00399 /*********************************************************************/
00404 int c_entry(void) { /* Main Program */
00405         uint32_t i;
00406         uint32_t cnt;
00407         CAN_ERROR error;
00408         PINSEL_CFG_Type PinCfg;
00409
00410         /* Initialize debug via UART0
00411          * – 115200bps
00412          * – 8 data bit
00413          * – No parity
00414          * – 1 stop bit
00415          * – No flow control
00416          */
00417         debug_frmwrk_init();
00418         print_menu();
00419
00420         /* Pin configuration
00421          * CAN1: select P0.0 as RD1. P0.1 as TD1
00422          * CAN2: select P2.7 as RD2, P2.8 as RD2
00423          */
00424         PinCfg.Funcnum = 1;
00425         PinCfg.OpenDrain = 0;
00426         PinCfg.Pinmode = 0;
00427         PinCfg.Pinnum = 0;
00428         PinCfg.Portnum = 0;
00429         PINSEL_ConfigPin(&PinCfg);
00430         PinCfg.Pinnum = 1;
00431         PINSEL_ConfigPin(&PinCfg);
00432
00433         PinCfg.Pinnum = 7;
00434         PinCfg.Portnum = 2;
00435         PINSEL_ConfigPin(&PinCfg);
00436         PinCfg.Pinnum = 8;
00437         PINSEL_ConfigPin(&PinCfg);
00438
00439         //Initialize CAN1 & CAN2
00440         CAN_Init(LPC_CAN1, 125000);
00441         CAN_Init(LPC_CAN2, 125000);
00442
00443         //Enable Receive Interrupt
00444         CAN_IRQCmd(LPC_CAN2, CANINT_FCE, ENABLE);
00445         CAN_IRQCmd(LPC_CAN2, CANINT_RIE, ENABLE);
00446
00447         //Enable CAN Interrupt
00448         NVIC_EnableIRQ(CAN_IRQn);
00449
00450         /* First, we send 10 messages:
00451          * - message 0,2,4,6,8 have id in AFLUT >>> will be received
00452          * - message 1,3,5,7,9 don't have id in AFLUT >>> will be ignored
00453          * Then, we change AFLUT by load/remove entries in AFLUT and re-send messages
00454          * - message 1,3,5,7,9 have id in AFLUT >>> will be received
00455          * - message 0,2,4,6,8 don't have id in AFLUT >>> will be ignored
00456          * Note that: FullCAN Object must be read from FullCAN Object Section next to AFLUT
00457          */
00458         /*-------------------------Init Message & AF Look-up Table------------------------*/
00459
00460         _DBG_("Test Acceptance Filter function...");
00461         _DBG_("Press '1' to initialize message and AF Loop-up Table...");_DBG_("");
00462         while(_DG !='1');
00463         CAN_InitAFMessage(); /* initialize Transmit Message */
00464         _DBG_("Init message finished!!!");
00465         CAN_SetupAFTable(); /* initialize AF Look-up Table sections*/
00466         error = CAN_SetupAFLUT(LPC_CANAF,&AFTable); /* install AF Look-up Table */
00467         if (error != CAN_OK) {
00468                 _DBG_("Setup AF: ERROR...");
00469                 while (1); // AF Table has error
00470         }
00471         else _DBG_("Setup AF: SUCCESSFUL!!!");_DBG_("");
00472
00473
00474         /*-------------------------Send messages------------------------*/
00475         _DBG_("Press '2' to start CAN transferring operation...");_DBG_("");
00476         while(_DG !='2');
00477         for (i = 0; i < CAN_TX_MSG_CNT; i++) {
00478                 CAN_SendMsg(LPC_CAN1, &AFTxMsg[i]);
00479                 PrintMessage(&AFTxMsg[i]);_DBG_("");
00480                 for(cnt=0;cnt<10000;cnt++); //transmit delay
00481                 CANTxCount++;
00482         }
00483         _DBG_("Sending finished !!!");
00484
00485         /*-------------------------Display Received messages------------------------*/
00486         _DBG_("Press '3' to display received messages...");_DBG_("");
00487         while(_DG !='3');
00488         for (i = 0; i < CAN_RX_MSG_CNT; i++) {
00489                 PrintMessage(&AFRxMsg[i]);_DBG_("");
00490         }
00491
00492         /*-------------------------Change AFLUT Table --------------------*/
00493         _DBG_("Press '4' to change AF look-up table...");_DBG_("");
00494         while(_DG !='4');
00495         CAN_ChangeAFTable();
00496         _DBG_("Change AFLUT: FINISHED!!!");
00497         CAN_SetAFMode(LPC_CANAF, CAN_eFCAN);
00498         CAN_InitAFMessage();
00499         CANRxCount = CANTxCount = 0;
00500
00501         /*-------------------------Re-Send messages------------------------*/
00502         _DBG_("Press '5' to re-send messages...");_DBG_("");
00503         while(_DG !='5');
00504         for (i = 0; i < CAN_TX_MSG_CNT; i++) {
00505                 CAN_SendMsg(LPC_CAN1, &AFTxMsg[i]);
00506                 PrintMessage(&AFTxMsg[i]);_DBG_("");
00507                 for(cnt=0;cnt<10000;cnt++); //transmit delay
00508                 CANTxCount++;
00509         }
00510
00511         /*-------------------------Display received messages------------------------*/
00512         _DBG_("Re-Sending finished !!!");
00513
00514         _DBG_("Press '6' to display received messages...");_DBG_("");
00515         while(_DG !='6');
00516         for (i = 0; i < CAN_RX_MSG_CNT; i++) {
00517                 PrintMessage(&AFRxMsg[i]);_DBG_("");
00518         }
00519         _DBG_("Demo terminal !!!");
00520
00521         CAN_DeInit(LPC_CAN1);
00522         CAN_DeInit(LPC_CAN2);
00523         while (1);
00524         return 0;
00525 }
00526
00527 /* With ARM and GHS toolsets, the entry point is main() - this will
00528  allow the linker to generate wrapper code to setup stacks, allocate
00529  heap area, and initialize and copy code and data segments. For GNU
00530  toolsets, the entry point is through __start() in the crt0_gnu.asm
00531  file, and that startup code will setup stacks and data */
00532 int main(void) {
00533         return c_entry();
00534 }
00535
00536 #ifdef  DEBUG
00537 /*******************************************************************************
00538  * @brief               Reports the name of the source file and the source line number
00539  *                              where the CHECK_PARAM error has occurred.
00540  * @param[in]   file Pointer to the source file name
00541  * @param[in]    line assert_param error line source number
00542  * @return              None
00543  *******************************************************************************/
00544 void check_failed(uint8_t *file, uint32_t line) {
00545         /* User can add his own implementation to report the file name and line number,
00546          ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
00547
00548         /* Infinite loop */
00549         while (1)
00550                 ;
00551 }
00552 #endif
00553
00554 /*
00555  * @}
00556  */
Generated on Tue Jun 7 14:58:58 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/CAN/CAN_test_bypass_mode/can_test_bypass_mode.c Source File

C:/nxpdrv/LPC1700CMSIS/Examples/CAN/CAN_test_bypass_mode/can_test_bypass_mode.c

Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          can_test_bypass_mode.c                  2010-05-21
00003 */
00025 #include "lpc17xx_can.h"
00026 #include "lpc17xx_libcfg.h"
00027 #include "lpc17xx_pinsel.h"
00028 #include "debug_frmwrk.h"
00029
00030 /* Example group ----------------------------------------------------------- */
00035 /************************** PRIVATE VARIABLES *************************/
00036 uint8_t menu[]=
00037         "*******************************************************************************\n\r"
00038         "Hello NXP Semiconductors \n\r"
00039         "CAN bypass demo \n\r"
00040         "\t - MCU: LPC17xx \n\r"
00041         "\t - Core: ARM CORTEX-M3 \n\r"
00042         "\t - Communicate via: UART0 - 115200 bps \n\r"
00043         "Use two CAN peripherals: CAN1 and CAN2 to communicate\n\r"
00044         "This example used to test Bypass mode\n\r"
00045         "*******************************************************************************\n\r";
00046
00048 CAN_MSG_Type TXMsg, RXMsg; // messages for test Bypass mode
00049 uint32_t CANRxCount, CANTxCount = 0;
00050
00051 /************************** PRIVATE FUNCTIONS *************************/
00052 void CAN_IRQHandler(void);
00053
00054 void CAN_InitMessage(void);
00055 void PrintMessage(CAN_MSG_Type* msg);
00056 void print_menu();
00057
00058
00059 /*----------------- INTERRUPT SERVICE ROUTINES --------------------------*/
00060 /*********************************************************************/
00065 void CAN_IRQHandler()
00066 {
00067         uint8_t IntStatus;
00068         uint32_t data1;
00069         /* get interrupt status
00070          * Note that: Interrupt register CANICR will be reset after read.
00071          * So function "CAN_IntGetStatus" should be call only one time
00072          */
00073         IntStatus = CAN_IntGetStatus(LPC_CAN2);
00074         //check receive interrupt
00075         if((IntStatus>>0)&0x01)
00076         {
00077                 CAN_ReceiveMsg(LPC_CAN2,&RXMsg);
00078                 PrintMessage(&RXMsg);
00079                 CANRxCount++; //count success received message
00080                 //increase data for next TX Message
00081                 TXMsg.id ++;
00082                 data1 = (TXMsg.dataA[0])|(((TXMsg.dataA[1]))<<8)|((TXMsg.dataA[2])<<16)|((TXMsg.dataA[3])<<24);
00083                 if(data1 == 0xFFFFFFFF) data1 = 0;
00084                 else data1++;
00085                 *((uint8_t *) &TXMsg.dataA[0])= *((uint8_t *) &TXMsg.dataB[0])= data1 & 0x000000FF;
00086                 *((uint8_t *) &TXMsg.dataA[1])= *((uint8_t *) &TXMsg.dataB[1])=(data1 & 0x0000FF00)>>8;;
00087                 *((uint8_t *) &TXMsg.dataA[2])= *((uint8_t *) &TXMsg.dataB[2])=(data1 & 0x00FF0000)>>16;
00088                 *((uint8_t *) &TXMsg.dataA[3])= *((uint8_t *) &TXMsg.dataB[3])=(data1 & 0xFF000000)>>24;
00089
00090                 CAN_SendMsg(LPC_CAN1, &TXMsg);
00091         }
00092 }
00093
00094 /*-------------------------PRIVATE FUNCTIONS----------------------------*/
00095 /*********************************************************************/
00100 void PrintMessage(CAN_MSG_Type* CAN_Msg)
00101 {
00102         uint32_t data;
00103         _DBG("Message ID:     ");
00104         _DBH32(CAN_Msg->id);_DBG_("");
00105         _DBG("Message length: ");
00106         _DBH32(CAN_Msg->len);_DBG_(" BYTES");
00107         _DBG("Message type:   ");
00108         if(CAN_Msg->type==DATA_FRAME)
00109         {
00110                 _DBG_("DATA FRAME ");
00111         }
00112         else
00113                 _DBG_("REMOTE FRAME ");
00114         _DBG("Message format: ");
00115         if(CAN_Msg->format==STD_ID_FORMAT)
00116         {
00117                 _DBG_("STANDARD ID FRAME FORMAT");
00118         }
00119         else
00120                 _DBG_("EXTENDED ID FRAME FORMAT");
00121         _DBG("Message dataA:  ");
00122         data = (CAN_Msg->dataA[0])|(CAN_Msg->dataA[1]<<8)|(CAN_Msg->dataA[2]<<16)|(CAN_Msg->dataA[3]<<24);
00123         _DBH32(data);_DBG_("");
00124         data = (CAN_Msg->dataB[0])|(CAN_Msg->dataB[1]<<8)|(CAN_Msg->dataB[2]<<16)|(CAN_Msg->dataB[3]<<24);
00125         _DBG("Message dataB:  ");
00126         _DBH32(data);_DBG_("");
00127         _DBG_("");
00128 }
00129
00130 /*********************************************************************/
00135 void CAN_InitMessage(void) {
00136         TXMsg.format = EXT_ID_FORMAT;
00137         TXMsg.id = 0x00001234;
00138         TXMsg.len = 8;
00139         TXMsg.type = DATA_FRAME;
00140         TXMsg.dataA[0] = TXMsg.dataA[1] = TXMsg.dataA[2] = TXMsg.dataA[3] = 0x00000000;
00141         TXMsg.dataB[0] = TXMsg.dataB[1] = TXMsg.dataB[2] = TXMsg.dataB[3] = 0x00000000;
00142
00143         RXMsg.format = 0x00;
00144         RXMsg.id = 0x00;
00145         RXMsg.len = 0x00;
00146         RXMsg.type = 0x00;
00147         RXMsg.dataA[0] = RXMsg.dataA[1] = RXMsg.dataA[2] = RXMsg.dataA[3] = 0x00000000;
00148         RXMsg.dataB[0] = RXMsg.dataB[1] = RXMsg.dataB[2] = RXMsg.dataB[3] = 0x00000000;
00149 }
00150
00151 /*********************************************************************/
00156 void print_menu()
00157 {
00158         _DBG_(menu);
00159 }
00160
00161 /*-------------------------MAIN FUNCTION------------------------------*/
00162 /*********************************************************************/
00167 int c_entry(void) { /* Main Program */
00168         PINSEL_CFG_Type PinCfg;
00169
00170         /* Initialize debug via UART0
00171          * – 115200bps
00172          * – 8 data bit
00173          * – No parity
00174          * – 1 stop bit
00175          * – No flow control
00176          */
00177         debug_frmwrk_init();
00178         print_menu();
00179
00180         /* Pin configuration
00181          * CAN1: select P0.0 as RD1. P0.1 as TD1
00182          * CAN2: select P2.7 as RD2, P2.8 as RD2
00183          */
00184         PinCfg.Funcnum = 1;
00185         PinCfg.OpenDrain = 0;
00186         PinCfg.Pinmode = 0;
00187         PinCfg.Pinnum = 0;
00188         PinCfg.Portnum = 0;
00189         PINSEL_ConfigPin(&PinCfg);
00190         PinCfg.Pinnum = 1;
00191         PINSEL_ConfigPin(&PinCfg);
00192
00193         PinCfg.Pinnum = 7;
00194         PinCfg.Portnum = 2;
00195         PINSEL_ConfigPin(&PinCfg);
00196         PinCfg.Pinnum = 8;
00197         PINSEL_ConfigPin(&PinCfg);
00198
00199         //Initialize CAN1 & CAN2
00200         CAN_Init(LPC_CAN1, 125000);
00201         CAN_Init(LPC_CAN2, 125000);
00202
00203         //Enable Interrupt
00204         CAN_IRQCmd(LPC_CAN2, CANINT_RIE, ENABLE);
00205
00206         //Enable CAN Interrupt
00207         NVIC_EnableIRQ(CAN_IRQn);
00208
00209         _DBG_("CAN test Bypass Mode function...");
00210         _DBG_("Press '1' to initialize CAN message...");_DBG_("");
00211         while(_DG !='1');
00212         CAN_SetAFMode(LPC_CANAF,CAN_AccBP);
00213         CAN_InitMessage();
00214         PrintMessage(&TXMsg);
00215         _DBG_("Message ID and data will be increased continuously...");
00216
00217         _DBG_("Press '2' to start CAN operation...");
00218         while(_DG !='2');
00219
00223         CAN_SendMsg(LPC_CAN1, &TXMsg);
00224
00225         while (1);
00226 }
00227
00228 /* With ARM and GHS toolsets, the entry point is main() - this will
00229  allow the linker to generate wrapper code to setup stacks, allocate
00230  heap area, and initialize and copy code and data segments. For GNU
00231  toolsets, the entry point is through __start() in the crt0_gnu.asm
00232  file, and that startup code will setup stacks and data */
00233 int main(void) {
00234         return c_entry();
00235 }
00236
00237 #ifdef  DEBUG
00238 /*******************************************************************************
00239  * @brief               Reports the name of the source file and the source line number
00240  *                              where the CHECK_PARAM error has occurred.
00241  * @param[in]   file Pointer to the source file name
00242  * @param[in]    line assert_param error line source number
00243  * @return              None
00244  *******************************************************************************/
00245 void check_failed(uint8_t *file, uint32_t line) {
00246         /* User can add his own implementation to report the file name and line number,
00247          ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
00248
00249         /* Infinite loop */
00250         while (1)
00251                 ;
00252 }
00253 #endif
00254
00255 /*
00256  * @}
00257  */
Generated on Tue Jun 7 14:58:58 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/CAN/CAN_test_two_kit/can_test_two_kit.c Source File

C:/nxpdrv/LPC1700CMSIS/Examples/CAN/CAN_test_two_kit/can_test_two_kit.c

Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          can_test_two_kit.c                      2010-05-21
00003 */
00025 #include "lpc17xx_can.h"
00026 #include "lpc17xx_libcfg.h"
00027 #include "lpc17xx_pinsel.h"
00028 #include "debug_frmwrk.h"
00029
00030 /* Example group ----------------------------------------------------------- */
00035 /************************** PRIVATE MACROS *************************/
00036 #define CAN_TRANSMIT                            1
00037 #define CAN_RECEIVE                                     !CAN_TRANSMIT
00038 #define TX_BUFFER_SIZE                          4
00039 #define RX_BUFFER_SIZE                          2
00040
00041 /************************** PRIVATE VARIABLES *************************/
00042 uint8_t menu[]=
00043         "********************************************************************************\n\r"
00044         "Hello NXP Semiconductors \n\r"
00045         "CAN demo \n\r"
00046         "\t - MCU: LPC17xx \n\r"
00047         "\t - Core: ARM CORTEX-M3 \n\r"
00048         "\t - Communicate via: UART0 - 115200 bps \n\r"
00049         "Use 2 CAN peripherals on 2 boards to transfer data \n\r"
00050         "********************************************************************************\n\r";
00051
00053 CAN_MSG_Type TXMsg, RXMsg; // messages for test Bypass mode
00054 CAN_MSG_Type AFTxMsg[TX_BUFFER_SIZE], AFRxMsg[RX_BUFFER_SIZE]; //messages for test Acceptance Filter mode
00055 uint32_t CANRxCount = 0, CANTxCount = 0;
00056 uint32_t CANErrCount = 0;
00057
00058 /************************** PRIVATE FUNCTIONS *************************/
00059 void CAN_IRQHandler(void);
00060
00061 void CAN_InitMessage(void);
00062 Bool CAN_VerifyMessage(CAN_MSG_Type Msg1, CAN_MSG_Type Msg2);
00063 CAN_ERROR CAN_SetupAFTable(void);
00064 void CAN_InitAFMessage(void);
00065 void PrintMessage(CAN_MSG_Type* msg);
00066
00067
00068 /*----------------- INTERRUPT SERVICE ROUTINES --------------------------*/
00069 /*********************************************************************/
00074 void CAN_IRQHandler()
00075 {
00076         uint8_t IntStatus;
00077         /* get interrupt status
00078          * Note that: Interrupt register CANICR will be reset after read.
00079          * So function "CAN_IntGetStatus" should be call only one time
00080          */
00081         IntStatus = CAN_IntGetStatus(LPC_CAN1);
00082         //check receive interrupt
00083         if((IntStatus>>0)&0x01)
00084         {
00085                 CAN_ReceiveMsg(LPC_CAN1, &AFRxMsg[CANRxCount]);
00086                 PrintMessage(&AFRxMsg[CANRxCount]);_DBG_("");
00087                 CANRxCount++;
00088         }
00089 }
00090
00091 /*-------------------------PRIVATE FUNCTIONS----------------------------*/
00092 /*********************************************************************/
00097 void PrintMessage(CAN_MSG_Type* CAN_Msg)
00098 {
00099         uint32_t data;
00100         _DBG("Message ID:     ");
00101         _DBH32(CAN_Msg->id);_DBG_("");
00102         _DBG("Message length: ");
00103         _DBH32(CAN_Msg->len);_DBG_(" BYTES");
00104         _DBG("Message type:   ");
00105         if(CAN_Msg->type==DATA_FRAME)
00106         {
00107                 _DBG_("DATA FRAME ");
00108         }
00109         else
00110                 _DBG_("REMOTE FRAME ");
00111         _DBG("Message format: ");
00112         if(CAN_Msg->format==STD_ID_FORMAT)
00113         {
00114                 _DBG_("STANDARD ID FRAME FORMAT");
00115         }
00116         else
00117                 _DBG_("EXTENDED ID FRAME FORMAT");
00118         _DBG("Message dataA:  ");
00119         data = (CAN_Msg->dataA[0])|(CAN_Msg->dataA[1]<<8)|(CAN_Msg->dataA[2]<<16)|(CAN_Msg->dataA[3]<<24);
00120         _DBH32(data);_DBG_("");
00121         data = (CAN_Msg->dataB[0])|(CAN_Msg->dataB[1]<<8)|(CAN_Msg->dataB[2]<<16)|(CAN_Msg->dataB[3]<<24);
00122         _DBG("Message dataB:  ");
00123         _DBH32(data);_DBG_("");
00124         _DBG_("");
00125 }
00126
00127 /*********************************************************************/
00134 CAN_ERROR CAN_SetupAFTable(void) {
00135         uint32_t i = 0;
00136         uint8_t result;
00137         /* Set up Explicit Standard Frame Format Identifier Section
00138          * In this simple test, it has 16 entries ID
00139          */
00140         for (i = 0; i < 16; i++) {
00141                 result = CAN_LoadExplicitEntry(LPC_CAN1, i + 1, STD_ID_FORMAT);
00142         }
00143         /* Set up Explicit Extended Frame Format Identifier Section
00144          * In this simple test, it has 16 entries ID
00145          */
00146         for (i = 0; i < 16; i++) {
00147                 result = CAN_LoadExplicitEntry(LPC_CAN1, i << 11, EXT_ID_FORMAT);
00148         }
00149         return result;
00150 }
00151
00152 /*********************************************************************/
00158 void CAN_InitAFMessage(void) {
00159         /* 1st Message with 11-bit ID which exit in AF Look-up Table */
00160         AFTxMsg[0].id = 0x08;
00161         AFTxMsg[0].len = 0x08;
00162         AFTxMsg[0].type = DATA_FRAME;
00163         AFTxMsg[0].format = STD_ID_FORMAT;
00164         AFTxMsg[0].dataA[0] = AFTxMsg[0].dataA[1] = AFTxMsg[0].dataA[2]= AFTxMsg[0].dataA[3]= 0x78;
00165         AFTxMsg[0].dataB[0] = AFTxMsg[0].dataB[1] = AFTxMsg[0].dataB[2]= AFTxMsg[0].dataB[3]= 0x21;
00166
00167         /* 2nd Message with 11-bit ID which not exit in AF Look-up Table */
00168         AFTxMsg[1].id = 0xA0;
00169         AFTxMsg[1].len = 0x08;
00170         AFTxMsg[1].type = DATA_FRAME;
00171         AFTxMsg[1].format = STD_ID_FORMAT;
00172         AFTxMsg[1].dataA[0] = AFTxMsg[1].dataA[1] = AFTxMsg[1].dataA[2]= AFTxMsg[1].dataA[3]= 0x23;
00173         AFTxMsg[1].dataB[0] = AFTxMsg[1].dataB[1] = AFTxMsg[1].dataB[2]= AFTxMsg[1].dataB[3]= 0x45;
00174
00175         /* 3th Message with 29-bit ID which exit in AF Look-up Table */
00176         AFTxMsg[2].id = (0x08 << 11);
00177         AFTxMsg[2].len = 0x08;
00178         AFTxMsg[2].type = DATA_FRAME;
00179         AFTxMsg[2].format = EXT_ID_FORMAT;
00180         AFTxMsg[2].dataA[0] = AFTxMsg[2].dataA[1] = AFTxMsg[2].dataA[2]= AFTxMsg[2].dataA[3]= 0x15;
00181         AFTxMsg[2].dataB[0] = AFTxMsg[2].dataB[1] = AFTxMsg[2].dataB[2]= AFTxMsg[2].dataB[3]= 0x36;
00182
00183         /* 4th Message with 29-bit ID which not exit in AF Look-up Table */
00184         AFTxMsg[3].id = (0xA0 << 11);
00185         AFTxMsg[3].len = 0x08;
00186         AFTxMsg[3].type = DATA_FRAME;
00187         AFTxMsg[3].format = EXT_ID_FORMAT;
00188         AFTxMsg[3].dataA[0] = AFTxMsg[3].dataA[1] = AFTxMsg[3].dataA[2]= AFTxMsg[3].dataA[3]= 0x78;
00189         AFTxMsg[3].dataB[0] = AFTxMsg[3].dataB[1] = AFTxMsg[3].dataB[2]= AFTxMsg[3].dataB[3]= 0x21;
00190
00191         AFRxMsg[0].id = AFRxMsg[1].id = 0x00;
00192         AFRxMsg[0].len = AFRxMsg[1].len = 0x00;
00193         AFRxMsg[0].type = AFRxMsg[1].type = 0x00;
00194         AFRxMsg[0].format = AFRxMsg[1].format = 0x00;
00195         AFRxMsg[0].dataA[0] = AFRxMsg[1].dataA[0] = 0x00;
00196         AFRxMsg[0].dataA[1] = AFRxMsg[1].dataA[1] = 0x00;
00197         AFRxMsg[0].dataA[2] = AFRxMsg[1].dataA[2] = 0x00;
00198         AFRxMsg[0].dataA[3] = AFRxMsg[1].dataA[3] = 0x00;
00199         AFRxMsg[0].dataB[0] = AFRxMsg[1].dataB[0] = 0x00;
00200         AFRxMsg[0].dataB[1] = AFRxMsg[1].dataB[1] = 0x00;
00201         AFRxMsg[0].dataB[2] = AFRxMsg[1].dataB[2] = 0x00;
00202         AFRxMsg[0].dataB[3] = AFRxMsg[1].dataB[3] = 0x00;
00203 }
00204 /*********************************************************************/
00209 void print_menu(void)
00210 {
00211         _DBG_(menu);
00212 }
00213
00214 /*-------------------------MAIN FUNCTION------------------------------*/
00215 /*********************************************************************/
00220 int c_entry(void) { /* Main Program */
00221         uint32_t result,i;
00222         PINSEL_CFG_Type PinCfg;
00223
00224         /* Initialize debug via UART0
00225          * – 115200bps
00226          * – 8 data bit
00227          * – No parity
00228          * – 1 stop bit
00229          * – No flow control
00230          */
00231         debug_frmwrk_init();
00232         print_menu();
00233
00234         /* Pin configuration
00235          * CAN1: select P0.0 as RD1. P0.1 as TD1
00236          */
00237         PinCfg.Funcnum = 1;
00238         PinCfg.OpenDrain = 0;
00239         PinCfg.Pinmode = 0;
00240         PinCfg.Pinnum = 0;
00241         PinCfg.Portnum = 0;
00242         PINSEL_ConfigPin(&PinCfg);
00243         PinCfg.Pinnum = 1;
00244         PINSEL_ConfigPin(&PinCfg);
00245
00246         //Initialize CAN1
00247         CAN_Init(LPC_CAN1, 125000);
00248 #if CAN_RECEIVE
00249         //Enable Interrupt
00250         CAN_IRQCmd(LPC_CAN1, CANINT_RIE, ENABLE);
00251
00252         //Enable CAN Interrupt
00253         NVIC_EnableIRQ(CAN_IRQn);
00254         CAN_SetAFMode(LPC_CANAF, CAN_Normal);
00255
00256         /* Test Acceptance Filter with a simple AF Look-up Table. It just has two sections:
00257          *              - Explicit Standard Frame Format Identifier Section
00258          *              - Explicit Extended Frame Format Identifier Section
00259          * We use 4 Message:
00260          *              - 1 Message with 11-bit ID which exit in AF Look-up Table
00261          *      - 1 Message with 11-bit ID which not exit in AF Look-up Table
00262          *      - 1 Message with 29-bit ID which exit in AF Look-up Table
00263          *      - 1 Message with 29-bit ID which not exit in AF Look-up Table
00264          *  to check Acceptance filter operation of CAN
00265          */
00266         _DBG_("Test Acceptance Filter function...");
00267         CAN_SetAFMode(LPC_CANAF, CAN_Normal);
00268         result = CAN_SetupAFTable(); /* setup AF Look-up Table */
00269         if (result != CAN_OK) {
00270                 _DBG_("Setup AF: ERROR...");
00271                 while(1);
00272         }
00273         else _DBG_("Setup AF: SUCCESSFUL...");_DBG_("");
00274         _DBG_("Recieving message...");
00275 #else
00276         CAN_InitAFMessage(); /* initialize Transmit Message */
00277         for (i = 0; i < TX_BUFFER_SIZE; i++)
00278         {
00279                 CAN_SendMsg(LPC_CAN1, &AFTxMsg[i]);
00280                 PrintMessage(&AFTxMsg[i]);_DBG_("");
00281                 for(result=0;result<10000;result++);
00282                 CANTxCount++;
00283         }
00284         _DBG_("Sending finished !!!");
00285 #endif
00286         while (1);
00287 }
00288
00289 /* With ARM and GHS toolsets, the entry point is main() - this will
00290  allow the linker to generate wrapper code to setup stacks, allocate
00291  heap area, and initialize and copy code and data segments. For GNU
00292  toolsets, the entry point is through __start() in the crt0_gnu.asm
00293  file, and that startup code will setup stacks and data */
00294 int main(void) {
00295         return c_entry();
00296 }
00297
00298 #ifdef  DEBUG
00299 /*******************************************************************************
00300  * @brief               Reports the name of the source file and the source line number
00301  *                              where the CHECK_PARAM error has occurred.
00302  * @param[in]   file Pointer to the source file name
00303  * @param[in]    line assert_param error line source number
00304  * @return              None
00305  *******************************************************************************/
00306 void check_failed(uint8_t *file, uint32_t line) {
00307         /* User can add his own implementation to report the file name and line number,
00308          ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
00309
00310         /* Infinite loop */
00311         while (1)
00312                 ;
00313 }
00314 #endif
00315
00316 /*
00317  * @}
00318  */
Generated on Tue Jun 7 14:58:58 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBCDC/cdc.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBCDC/cdc.h

Go to the documentation of this file.
00001 /*----------------------------------------------------------------------------
00002  *      U S B  -  K e r n e l
00003  *----------------------------------------------------------------------------
00004  *      Name:    CDC.h
00005  *      Purpose: USB Communication Device Class Definitions
00006  * Version: V1.20
00007  *----------------------------------------------------------------------------
00008  *      This software is supplied "AS IS" without any warranties, express,
00009  *      implied or statutory, including but not limited to the implied
00010  *      warranties of fitness for purpose, satisfactory quality and
00011  *      noninfringement. Keil extends you a royalty-free right to reproduce
00012  *      and distribute executable files created using this software for use
00013  *      on NXP Semiconductors LPC family microcontroller devices only. Nothing
00014  *      else gives you the right to use this software.
00015  *
00016  * Copyright (c) 2009 Keil - An ARM Company. All rights reserved.
00017  *---------------------------------------------------------------------------*/
00018
00019 #ifndef __CDC_H
00020 #define __CDC_H
00021 #include "lpc_types.h"
00022
00023 #if defined   (  __GNUC__  )
00024 #define __packed __attribute__((__packed__))
00025 #endif
00026 /*----------------------------------------------------------------------------
00027  *      Definitions  based on usbcdc11.pdf (www.usb.org)
00028  *---------------------------------------------------------------------------*/
00029 // Communication device class specification version 1.10
00030 #define CDC_V1_10                               0x0110
00031
00032 // Communication interface class code
00033 // (usbcdc11.pdf, 4.2, Table 15)
00034 #define CDC_COMMUNICATION_INTERFACE_CLASS       0x02
00035
00036 // Communication interface class subclass codes
00037 // (usbcdc11.pdf, 4.3, Table 16)
00038 #define CDC_DIRECT_LINE_CONTROL_MODEL           0x01
00039 #define CDC_ABSTRACT_CONTROL_MODEL              0x02
00040 #define CDC_TELEPHONE_CONTROL_MODEL             0x03
00041 #define CDC_MULTI_CHANNEL_CONTROL_MODEL         0x04
00042 #define CDC_CAPI_CONTROL_MODEL                  0x05
00043 #define CDC_ETHERNET_NETWORKING_CONTROL_MODEL   0x06
00044 #define CDC_ATM_NETWORKING_CONTROL_MODEL        0x07
00045
00046 // Communication interface class control protocol codes
00047 // (usbcdc11.pdf, 4.4, Table 17)
00048 #define CDC_PROTOCOL_COMMON_AT_COMMANDS         0x01
00049
00050 // Data interface class code
00051 // (usbcdc11.pdf, 4.5, Table 18)
00052 #define CDC_DATA_INTERFACE_CLASS                0x0A
00053
00054 // Data interface class protocol codes
00055 // (usbcdc11.pdf, 4.7, Table 19)
00056 #define CDC_PROTOCOL_ISDN_BRI                   0x30
00057 #define CDC_PROTOCOL_HDLC                       0x31
00058 #define CDC_PROTOCOL_TRANSPARENT                0x32
00059 #define CDC_PROTOCOL_Q921_MANAGEMENT            0x50
00060 #define CDC_PROTOCOL_Q921_DATA_LINK             0x51
00061 #define CDC_PROTOCOL_Q921_MULTIPLEXOR           0x52
00062 #define CDC_PROTOCOL_V42                        0x90
00063 #define CDC_PROTOCOL_EURO_ISDN                  0x91
00064 #define CDC_PROTOCOL_V24_RATE_ADAPTATION        0x92
00065 #define CDC_PROTOCOL_CAPI                       0x93
00066 #define CDC_PROTOCOL_HOST_BASED_DRIVER          0xFD
00067 #define CDC_PROTOCOL_DESCRIBED_IN_PUFD          0xFE
00068
00069 // Type values for bDescriptorType field of functional descriptors
00070 // (usbcdc11.pdf, 5.2.3, Table 24)
00071 #define CDC_CS_INTERFACE                        0x24
00072 #define CDC_CS_ENDPOINT                         0x25
00073
00074 // Type values for bDescriptorSubtype field of functional descriptors
00075 // (usbcdc11.pdf, 5.2.3, Table 25)
00076 #define CDC_HEADER                              0x00
00077 #define CDC_CALL_MANAGEMENT                     0x01
00078 #define CDC_ABSTRACT_CONTROL_MANAGEMENT         0x02
00079 #define CDC_DIRECT_LINE_MANAGEMENT              0x03
00080 #define CDC_TELEPHONE_RINGER                    0x04
00081 #define CDC_REPORTING_CAPABILITIES              0x05
00082 #define CDC_UNION                               0x06
00083 #define CDC_COUNTRY_SELECTION                   0x07
00084 #define CDC_TELEPHONE_OPERATIONAL_MODES         0x08
00085 #define CDC_USB_TERMINAL                        0x09
00086 #define CDC_NETWORK_CHANNEL                     0x0A
00087 #define CDC_PROTOCOL_UNIT                       0x0B
00088 #define CDC_EXTENSION_UNIT                      0x0C
00089 #define CDC_MULTI_CHANNEL_MANAGEMENT            0x0D
00090 #define CDC_CAPI_CONTROL_MANAGEMENT             0x0E
00091 #define CDC_ETHERNET_NETWORKING                 0x0F
00092 #define CDC_ATM_NETWORKING                      0x10
00093
00094 // CDC class-specific request codes
00095 // (usbcdc11.pdf, 6.2, Table 46)
00096 // see Table 45 for info about the specific requests.
00097 #define CDC_SEND_ENCAPSULATED_COMMAND           0x00
00098 #define CDC_GET_ENCAPSULATED_RESPONSE           0x01
00099 #define CDC_SET_COMM_FEATURE                    0x02
00100 #define CDC_GET_COMM_FEATURE                    0x03
00101 #define CDC_CLEAR_COMM_FEATURE                  0x04
00102 #define CDC_SET_AUX_LINE_STATE                  0x10
00103 #define CDC_SET_HOOK_STATE                      0x11
00104 #define CDC_PULSE_SETUP                         0x12
00105 #define CDC_SEND_PULSE                          0x13
00106 #define CDC_SET_PULSE_TIME                      0x14
00107 #define CDC_RING_AUX_JACK                       0x15
00108 #define CDC_SET_LINE_CODING                     0x20
00109 #define CDC_GET_LINE_CODING                     0x21
00110 #define CDC_SET_CONTROL_LINE_STATE              0x22
00111 #define CDC_SEND_BREAK                          0x23
00112 #define CDC_SET_RINGER_PARMS                    0x30
00113 #define CDC_GET_RINGER_PARMS                    0x31
00114 #define CDC_SET_OPERATION_PARMS                 0x32
00115 #define CDC_GET_OPERATION_PARMS                 0x33
00116 #define CDC_SET_LINE_PARMS                      0x34
00117 #define CDC_GET_LINE_PARMS                      0x35
00118 #define CDC_DIAL_DIGITS                         0x36
00119 #define CDC_SET_UNIT_PARAMETER                  0x37
00120 #define CDC_GET_UNIT_PARAMETER                  0x38
00121 #define CDC_CLEAR_UNIT_PARAMETER                0x39
00122 #define CDC_GET_PROFILE                         0x3A
00123 #define CDC_SET_ETHERNET_MULTICAST_FILTERS      0x40
00124 #define CDC_SET_ETHERNET_PMP_FILTER             0x41
00125 #define CDC_GET_ETHERNET_PMP_FILTER             0x42
00126 #define CDC_SET_ETHERNET_PACKET_FILTER          0x43
00127 #define CDC_GET_ETHERNET_STATISTIC              0x44
00128 #define CDC_SET_ATM_DATA_FORMAT                 0x50
00129 #define CDC_GET_ATM_DEVICE_STATISTICS           0x51
00130 #define CDC_SET_ATM_DEFAULT_VC                  0x52
00131 #define CDC_GET_ATM_VC_STATISTICS               0x53
00132
00133 // Communication feature selector codes
00134 // (usbcdc11.pdf, 6.2.2..6.2.4, Table 47)
00135 #define CDC_ABSTRACT_STATE                      0x01
00136 #define CDC_COUNTRY_SETTING                     0x02
00137
00138 // Feature Status returned for ABSTRACT_STATE Selector
00139 // (usbcdc11.pdf, 6.2.3, Table 48)
00140 #define CDC_IDLE_SETTING                        (1 << 0)
00141 #define CDC_DATA_MULTPLEXED_STATE               (1 << 1)
00142
00143
00144 // Control signal bitmap values for the SetControlLineState request
00145 // (usbcdc11.pdf, 6.2.14, Table 51)
00146 #define CDC_DTE_PRESENT                         (1 << 0)
00147 #define CDC_ACTIVATE_CARRIER                    (1 << 1)
00148
00149 // CDC class-specific notification codes
00150 // (usbcdc11.pdf, 6.3, Table 68)
00151 // see Table 67 for Info about class-specific notifications
00152 #define CDC_NOTIFICATION_NETWORK_CONNECTION     0x00
00153 #define CDC_RESPONSE_AVAILABLE                  0x01
00154 #define CDC_AUX_JACK_HOOK_STATE                 0x08
00155 #define CDC_RING_DETECT                         0x09
00156 #define CDC_NOTIFICATION_SERIAL_STATE           0x20
00157 #define CDC_CALL_STATE_CHANGE                   0x28
00158 #define CDC_LINE_STATE_CHANGE                   0x29
00159 #define CDC_CONNECTION_SPEED_CHANGE             0x2A
00160
00161 // UART state bitmap values (Serial state notification).
00162 // (usbcdc11.pdf, 6.3.5, Table 69)
00163 #define CDC_SERIAL_STATE_OVERRUN                (1 << 6)  // receive data overrun error has occurred
00164 #define CDC_SERIAL_STATE_PARITY                 (1 << 5)  // parity error has occurred
00165 #define CDC_SERIAL_STATE_FRAMING                (1 << 4)  // framing error has occurred
00166 #define CDC_SERIAL_STATE_RING                   (1 << 3)  // state of ring signal detection
00167 #define CDC_SERIAL_STATE_BREAK                  (1 << 2)  // state of break detection
00168 #define CDC_SERIAL_STATE_TX_CARRIER             (1 << 1)  // state of transmission carrier
00169 #define CDC_SERIAL_STATE_RX_CARRIER             (1 << 0)  // state of receiver carrier
00170
00171
00172 /*----------------------------------------------------------------------------
00173  *      Structures  based on usbcdc11.pdf (www.usb.org)
00174  *---------------------------------------------------------------------------*/
00175
00176 // Header functional descriptor
00177 // (usbcdc11.pdf, 5.2.3.1)
00178 // This header must precede any list of class-specific descriptors.
00179
00180 #if defined     (  __CC_ARM  )
00181 typedef __packed struct _CDC_HEADER_DESCRIPTOR{
00182 #elif defined (  __GNUC__  )
00183 typedef struct __packed  _CDC_HEADER_DESCRIPTOR{
00184 #elif defined   (  __IAR_SYSTEMS_ICC__  )
00185 #pragma pack(1)
00186 typedef struct _CDC_HEADER_DESCRIPTOR {
00187 #endif
00188   uint8_t bFunctionLength;                     // size of this descriptor in bytes
00189   uint8_t bDescriptorType;                     // CS_INTERFACE descriptor type
00190   uint8_t bDescriptorSubtype;                  // Header functional descriptor subtype
00191   uint16_t bcdCDC;                              // USB CDC specification release version
00192 } CDC_HEADER_DESCRIPTOR;
00193
00194 //Call management functional descriptor
00195 // (usbcdc11.pdf, 5.2.3.2)
00196 // Describes the processing of calls for the communication class interface.
00197 #if defined     (  __CC_ARM  )
00198 typedef __packed struct _CDC_CALL_MANAGEMENT_DESCRIPTOR{
00199 #elif defined (  __GNUC__  )
00200 typedef struct __packed  _CDC_CALL_MANAGEMENT_DESCRIPTOR{
00201 #elif defined   (  __IAR_SYSTEMS_ICC__  )
00202 #pragma pack(1)
00203 typedef struct _CDC_CALL_MANAGEMENT_DESCRIPTOR {
00204 #endif
00205   uint8_t bFunctionLength;                     // size of this descriptor in bytes
00206   uint8_t bDescriptorType;                     // CS_INTERFACE descriptor type
00207   uint8_t bDescriptorSubtype;                  // call management functional descriptor subtype
00208   uint8_t bmCapabilities;                      // capabilities that this configuration supports
00209   uint8_t bDataInterface;                      // interface number of the data class interface used for call management (optional)
00210 } CDC_CALL_MANAGEMENT_DESCRIPTOR;
00211
00212 // Abstract control management functional descriptor
00213 // (usbcdc11.pdf, 5.2.3.3)
00214 // Describes the command supported by the communication interface class with the Abstract Control Model subclass code.
00215 #if defined     (  __CC_ARM  )
00216 typedef __packed struct _CDC_ABSTRACT_CONTROL_MANAGEMENT_DESCRIPTOR{
00217 #elif defined (  __GNUC__  )
00218 typedef struct __packed  _CDC_ABSTRACT_CONTROL_MANAGEMENT_DESCRIPTOR{
00219 #elif defined   (  __IAR_SYSTEMS_ICC__  )
00220 #pragma pack(1)
00221 typedef struct _CDC_ABSTRACT_CONTROL_MANAGEMENT_DESCRIPTOR {
00222 #endif
00223   uint8_t bFunctionLength;                     // size of this descriptor in bytes
00224   uint8_t bDescriptorType;                     // CS_INTERFACE descriptor type
00225   uint8_t bDescriptorSubtype;                  // abstract control management functional descriptor subtype
00226   uint8_t bmCapabilities;                      // capabilities supported by this configuration
00227 } CDC_ABSTRACT_CONTROL_MANAGEMENT_DESCRIPTOR;
00228
00229 // Union functional descriptors
00230 // (usbcdc11.pdf, 5.2.3.8)
00231 // Describes the relationship between a group of interfaces that can be considered to form a functional unit.
00232 #if defined     (  __CC_ARM  )
00233 typedef __packed struct _CDC_UNION_DESCRIPTOR{
00234 #elif defined (  __GNUC__  )
00235 typedef struct __packed  _CDC_UNION_DESCRIPTOR{
00236 #elif defined   (  __IAR_SYSTEMS_ICC__  )
00237 #pragma pack(1)
00238 typedef struct _CDC_UNION_DESCRIPTOR {
00239 #endif
00240   uint8_t bFunctionLength;                     // size of this descriptor in bytes
00241   uint8_t bDescriptorType;                     // CS_INTERFACE descriptor type
00242   uint8_t bDescriptorSubtype;                  // union functional descriptor subtype
00243   uint8_t bMasterInterface;                    // interface number designated as master
00244 } CDC_UNION_DESCRIPTOR;
00245
00246 // Union functional descriptors with one slave interface
00247 // (usbcdc11.pdf, 5.2.3.8)
00248 #if defined     (  __CC_ARM  )
00249 typedef __packed struct _CDC_UNION_1SLAVE_DESCRIPTOR{
00250 #elif defined (  __GNUC__  )
00251 typedef struct __packed  _CDC_UNION_1SLAVE_DESCRIPTOR{
00252 #elif defined   (  __IAR_SYSTEMS_ICC__  )
00253 #pragma pack(1)
00254 typedef struct _CDC_UNION_1SLAVE_DESCRIPTOR {
00255 #endif
00256   CDC_UNION_DESCRIPTOR sUnion;              // Union functional descriptor
00257   uint8_t                 bSlaveInterfaces[1]; // Slave interface 0
00258 } CDC_UNION_1SLAVE_DESCRIPTOR;
00259
00260 //  Line coding structure
00261 //  Format of the data returned when a GetLineCoding request is received
00262 // (usbcdc11.pdf, 6.2.13)
00263 #if defined     (  __CC_ARM  )
00264 typedef __packed struct _CDC_LINE_CODING{
00265 #elif defined (  __GNUC__  )
00266 typedef struct __packed  _CDC_LINE_CODING{
00267 #elif defined   (  __IAR_SYSTEMS_ICC__  )
00268 #pragma pack(1)
00269 typedef struct _CDC_LINE_CODING {
00270 #endif
00271   uint32_t dwDTERate;                          // Data terminal rate in bits per second
00272   uint8_t  bCharFormat;                        // Number of stop bits
00273   uint8_t  bParityType;                        // Parity bit type
00274   uint8_t  bDataBits;                          // Number of data bits
00275 } CDC_LINE_CODING;
00276
00277 // Notification header
00278 // Data sent on the notification endpoint must follow this header.
00279 // see  USB_SETUP_PACKET in file usb.h
00280 typedef USB_SETUP_PACKET CDC_NOTIFICATION_HEADER;
00281
00282 #endif /* __CDC_H */
00283
Generated on Tue Jun 7 14:59:05 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBCDC/cdcuser.c Source File

C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBCDC/cdcuser.c

Go to the documentation of this file.
00001 /*----------------------------------------------------------------------------
00002  *      U S B  -  K e r n e l
00003  *----------------------------------------------------------------------------
00004  *      Name:    cdcuser.c
00005  *      Purpose: USB Communication Device Class User module
00006  *      Version: V1.10
00007  *----------------------------------------------------------------------------
00008 *      This software is supplied "AS IS" without any warranties, express,
00009  *      implied or statutory, including but not limited to the implied
00010  *      warranties of fitness for purpose, satisfactory quality and
00011  *      noninfringement. Keil extends you a royalty-free right to reproduce
00012  *      and distribute executable files created using this software for use
00013  *      on NXP Semiconductors LPC microcontroller devices only. Nothing else
00014  *      gives you the right to use this software.
00015  *
00016  * Copyright (c) 2009 Keil - An ARM Company. All rights reserved.
00017  *---------------------------------------------------------------------------*/
00018
00019 #include "lpc_types.h"
00020
00021 #include "usb.h"
00022 #include "usbhw.h"
00023 #include "usbcfg.h"
00024 #include "usbcore.h"
00025 #include "cdc.h"
00026 #include "cdcuser.h"
00027 #include "serial.h"
00028
00029
00030 unsigned char BulkBufIn  [USB_CDC_BUFSIZE];            // Buffer to store USB IN  packet
00031 unsigned char BulkBufOut [USB_CDC_BUFSIZE];            // Buffer to store USB OUT packet
00032 unsigned char NotificationBuf [10];
00033
00034 CDC_LINE_CODING CDC_LineCoding  = {9600, 0, 0, 8};
00035 unsigned short  CDC_SerialState = 0x0000;
00036 unsigned short  CDC_DepInEmpty  = 1;                   // Data IN EP is empty
00037
00038 /*----------------------------------------------------------------------------
00039   We need a buffer for incomming data on USB port because USB receives
00040   much faster than  UART transmits
00041  *---------------------------------------------------------------------------*/
00042 /* Buffer masks */
00043 #define CDC_BUF_SIZE               (64)               // Output buffer in bytes (power 2)
00044                                                        // large enough for file transfer
00045 #define CDC_BUF_MASK               (CDC_BUF_SIZE-1ul)
00046
00047 /* Buffer read / write macros */
00048 #define CDC_BUF_RESET(cdcBuf)      (cdcBuf.rdIdx = cdcBuf.wrIdx = 0)
00049 #define CDC_BUF_WR(cdcBuf, dataIn) (cdcBuf.data[CDC_BUF_MASK & cdcBuf.wrIdx++] = (dataIn))
00050 #define CDC_BUF_RD(cdcBuf)         (cdcBuf.data[CDC_BUF_MASK & cdcBuf.rdIdx++])
00051 #define CDC_BUF_EMPTY(cdcBuf)      (cdcBuf.rdIdx == cdcBuf.wrIdx)
00052 #define CDC_BUF_FULL(cdcBuf)       (cdcBuf.rdIdx == cdcBuf.wrIdx+1)
00053 #define CDC_BUF_COUNT(cdcBuf)      (CDC_BUF_MASK & (cdcBuf.wrIdx - cdcBuf.rdIdx))
00054
00055
00056 // CDC output buffer
00057 typedef struct __CDC_BUF_T {
00058   unsigned char data[CDC_BUF_SIZE];
00059   unsigned int wrIdx;
00060   unsigned int rdIdx;
00061 } CDC_BUF_T;
00062
00063 CDC_BUF_T  CDC_OutBuf;                                 // buffer for all CDC Out data
00064
00065 /*----------------------------------------------------------------------------
00066   read data from CDC_OutBuf
00067  *---------------------------------------------------------------------------*/
00068 int CDC_RdOutBuf (char *buffer, const int *length) {
00069   int bytesToRead, bytesRead;
00070
00071   /* Read *length bytes, block if *bytes are not avaialable     */
00072   bytesToRead = *length;
00073   bytesToRead = (bytesToRead < (*length)) ? bytesToRead : (*length);
00074   bytesRead = bytesToRead;
00075
00076
00077   // ... add code to check for underrun
00078
00079   while (bytesToRead--) {
00080     *buffer++ = CDC_BUF_RD(CDC_OutBuf);
00081   }
00082   return (bytesRead);
00083 }
00084
00085 /*----------------------------------------------------------------------------
00086   write data to CDC_OutBuf
00087  *---------------------------------------------------------------------------*/
00088 int CDC_WrOutBuf (const char *buffer, int *length) {
00089   int bytesToWrite, bytesWritten;
00090
00091   // Write *length bytes
00092   bytesToWrite = *length;
00093   bytesWritten = bytesToWrite;
00094
00095
00096   // ... add code to check for overwrite
00097
00098   while (bytesToWrite) {
00099       CDC_BUF_WR(CDC_OutBuf, *buffer++);           // Copy Data to buffer
00100       bytesToWrite--;
00101   }
00102
00103   return (bytesWritten);
00104 }
00105
00106 /*----------------------------------------------------------------------------
00107   check if character(s) are available at CDC_OutBuf
00108  *---------------------------------------------------------------------------*/
00109 int CDC_OutBufAvailChar (int *availChar) {
00110
00111   *availChar = CDC_BUF_COUNT(CDC_OutBuf);
00112
00113   return (0);
00114 }
00115 /* end Buffer handling */
00116
00117
00118 /*----------------------------------------------------------------------------
00119   CDC Initialisation
00120   Initializes the data structures and serial port
00121   Parameters:   None
00122   Return Value: None
00123  *---------------------------------------------------------------------------*/
00124 void CDC_Init (char portNum ) {
00125
00126   if ( portNum == 0 )
00127   {
00128         ser_OpenPort (0);
00129         ser_InitPort0 (CDC_LineCoding.dwDTERate,
00130                 CDC_LineCoding.bDataBits,
00131                 CDC_LineCoding.bParityType,
00132                 CDC_LineCoding.bCharFormat);
00133   }
00134   else
00135   {
00136         ser_OpenPort (1);
00137         ser_InitPort1 (CDC_LineCoding.dwDTERate,
00138                 CDC_LineCoding.bDataBits,
00139                 CDC_LineCoding.bParityType,
00140                 CDC_LineCoding.bCharFormat);
00141   }
00142   CDC_DepInEmpty  = 1;
00143   CDC_SerialState = CDC_GetSerialState();
00144
00145   CDC_BUF_RESET(CDC_OutBuf);
00146 }
00147
00148
00149 /*----------------------------------------------------------------------------
00150   CDC SendEncapsulatedCommand Request Callback
00151   Called automatically on CDC SEND_ENCAPSULATED_COMMAND Request
00152   Parameters:   None                          (global SetupPacket and EP0Buf)
00153   Return Value: TRUE - Success, FALSE - Error
00154  *---------------------------------------------------------------------------*/
00155 uint32_t CDC_SendEncapsulatedCommand (void) {
00156
00157   return (TRUE);
00158 }
00159
00160
00161 /*----------------------------------------------------------------------------
00162   CDC GetEncapsulatedResponse Request Callback
00163   Called automatically on CDC Get_ENCAPSULATED_RESPONSE Request
00164   Parameters:   None                          (global SetupPacket and EP0Buf)
00165   Return Value: TRUE - Success, FALSE - Error
00166  *---------------------------------------------------------------------------*/
00167 uint32_t CDC_GetEncapsulatedResponse (void) {
00168
00169   /* ... add code to handle request */
00170   return (TRUE);
00171 }
00172
00173
00174 /*----------------------------------------------------------------------------
00175   CDC SetCommFeature Request Callback
00176   Called automatically on CDC Set_COMM_FATURE Request
00177   Parameters:   FeatureSelector
00178   Return Value: TRUE - Success, FALSE - Error
00179  *---------------------------------------------------------------------------*/
00180 uint32_t CDC_SetCommFeature (unsigned short wFeatureSelector) {
00181
00182   /* ... add code to handle request */
00183   return (TRUE);
00184 }
00185
00186
00187 /*----------------------------------------------------------------------------
00188   CDC GetCommFeature Request Callback
00189   Called automatically on CDC Get_COMM_FATURE Request
00190   Parameters:   FeatureSelector
00191   Return Value: TRUE - Success, FALSE - Error
00192  *---------------------------------------------------------------------------*/
00193 uint32_t CDC_GetCommFeature (unsigned short wFeatureSelector) {
00194
00195   /* ... add code to handle request */
00196   return (TRUE);
00197 }
00198
00199
00200 /*----------------------------------------------------------------------------
00201   CDC ClearCommFeature Request Callback
00202   Called automatically on CDC CLEAR_COMM_FATURE Request
00203   Parameters:   FeatureSelector
00204   Return Value: TRUE - Success, FALSE - Error
00205  *---------------------------------------------------------------------------*/
00206 uint32_t CDC_ClearCommFeature (unsigned short wFeatureSelector) {
00207
00208   /* ... add code to handle request */
00209   return (TRUE);
00210 }
00211
00212
00213 /*----------------------------------------------------------------------------
00214   CDC SetLineCoding Request Callback
00215   Called automatically on CDC SET_LINE_CODING Request
00216   Parameters:   none                    (global SetupPacket and EP0Buf)
00217   Return Value: TRUE - Success, FALSE - Error
00218  *---------------------------------------------------------------------------*/
00219 uint32_t CDC_SetLineCoding (void) {
00220
00221   CDC_LineCoding.dwDTERate   =   (EP0Buf[0] <<  0)
00222                                | (EP0Buf[1] <<  8)
00223                                | (EP0Buf[2] << 16)
00224                                | (EP0Buf[3] << 24);
00225   CDC_LineCoding.bCharFormat =  EP0Buf[4];
00226   CDC_LineCoding.bParityType =  EP0Buf[5];
00227   CDC_LineCoding.bDataBits   =  EP0Buf[6];
00228
00229 #if PORT_NUM
00230   ser_ClosePort(1);
00231   ser_OpenPort (1);
00232   ser_InitPort1 (CDC_LineCoding.dwDTERate,
00233                 CDC_LineCoding.bDataBits,
00234                 CDC_LineCoding.bParityType,
00235                 CDC_LineCoding.bCharFormat);
00236 #else
00237   ser_ClosePort(0);
00238   ser_OpenPort (0);
00239   ser_InitPort0 (CDC_LineCoding.dwDTERate,
00240                 CDC_LineCoding.bDataBits,
00241                 CDC_LineCoding.bParityType,
00242                 CDC_LineCoding.bCharFormat);
00243 #endif
00244   return (TRUE);
00245 }
00246
00247
00248 /*----------------------------------------------------------------------------
00249   CDC GetLineCoding Request Callback
00250   Called automatically on CDC GET_LINE_CODING Request
00251   Parameters:   None                         (global SetupPacket and EP0Buf)
00252   Return Value: TRUE - Success, FALSE - Error
00253  *---------------------------------------------------------------------------*/
00254 uint32_t CDC_GetLineCoding (void) {
00255
00256   EP0Buf[0] = (CDC_LineCoding.dwDTERate >>  0) & 0xFF;
00257   EP0Buf[1] = (CDC_LineCoding.dwDTERate >>  8) & 0xFF;
00258   EP0Buf[2] = (CDC_LineCoding.dwDTERate >> 16) & 0xFF;
00259   EP0Buf[3] = (CDC_LineCoding.dwDTERate >> 24) & 0xFF;
00260   EP0Buf[4] =  CDC_LineCoding.bCharFormat;
00261   EP0Buf[5] =  CDC_LineCoding.bParityType;
00262   EP0Buf[6] =  CDC_LineCoding.bDataBits;
00263
00264   return (TRUE);
00265 }
00266
00267
00268 /*----------------------------------------------------------------------------
00269   CDC SetControlLineState Request Callback
00270   Called automatically on CDC SET_CONTROL_LINE_STATE Request
00271   Parameters:   ControlSignalBitmap
00272   Return Value: TRUE - Success, FALSE - Error
00273  *---------------------------------------------------------------------------*/
00274 uint32_t CDC_SetControlLineState (unsigned short wControlSignalBitmap) {
00275
00276   /* ... add code to handle request */
00277   return (TRUE);
00278 }
00279
00280
00281 /*----------------------------------------------------------------------------
00282   CDC SendBreak Request Callback
00283   Called automatically on CDC Set_COMM_FATURE Request
00284   Parameters:   0xFFFF  start of Break
00285                 0x0000  stop  of Break
00286                 0x####  Duration of Break
00287   Return Value: TRUE - Success, FALSE - Error
00288  *---------------------------------------------------------------------------*/
00289 uint32_t CDC_SendBreak (unsigned short wDurationOfBreak) {
00290
00291   /* ... add code to handle request */
00292   return (TRUE);
00293 }
00294
00295
00296 /*----------------------------------------------------------------------------
00297   CDC_BulkIn call on DataIn Request
00298   Parameters:   none
00299   Return Value: none
00300  *---------------------------------------------------------------------------*/
00301 void CDC_BulkIn(void) {
00302   int numBytesRead, numBytesAvail;
00303
00304   ser_AvailChar (&numBytesAvail);
00305
00306   // ... add code to check for overwrite
00307
00308   numBytesRead = ser_Read ((char *)&BulkBufIn[0], &numBytesAvail);
00309
00310   // send over USB
00311   if (numBytesRead > 0) {
00312         USB_WriteEP (CDC_DEP_IN, &BulkBufIn[0], numBytesRead);
00313   }
00314   else {
00315     CDC_DepInEmpty = 1;
00316   }
00317 }
00318
00319
00320 /*----------------------------------------------------------------------------
00321   CDC_BulkOut call on DataOut Request
00322   Parameters:   none
00323   Return Value: none
00324  *---------------------------------------------------------------------------*/
00325 void CDC_BulkOut(void) {
00326   int numBytesRead;
00327
00328   // get data from USB into intermediate buffer
00329   numBytesRead = USB_ReadEP(CDC_DEP_OUT, &BulkBufOut[0]);
00330
00331   // ... add code to check for overwrite
00332
00333   // store data in a buffer to transmit it over serial interface
00334   CDC_WrOutBuf ((char *)&BulkBufOut[0], &numBytesRead);
00335
00336 }
00337
00338
00339 /*----------------------------------------------------------------------------
00340   Get the SERIAL_STATE as defined in usbcdc11.pdf, 6.3.5, Table 69.
00341   Parameters:   none
00342   Return Value: SerialState as defined in usbcdc11.pdf
00343  *---------------------------------------------------------------------------*/
00344 unsigned short CDC_GetSerialState (void) {
00345   unsigned short temp;
00346
00347   CDC_SerialState = 0;
00348   ser_LineState (&temp);
00349
00350   if (temp & 0x8000)  CDC_SerialState |= CDC_SERIAL_STATE_RX_CARRIER;
00351   if (temp & 0x2000)  CDC_SerialState |= CDC_SERIAL_STATE_TX_CARRIER;
00352   if (temp & 0x0010)  CDC_SerialState |= CDC_SERIAL_STATE_BREAK;
00353   if (temp & 0x4000)  CDC_SerialState |= CDC_SERIAL_STATE_RING;
00354   if (temp & 0x0008)  CDC_SerialState |= CDC_SERIAL_STATE_FRAMING;
00355   if (temp & 0x0004)  CDC_SerialState |= CDC_SERIAL_STATE_PARITY;
00356   if (temp & 0x0002)  CDC_SerialState |= CDC_SERIAL_STATE_OVERRUN;
00357
00358   return (CDC_SerialState);
00359 }
00360
00361
00362 /*----------------------------------------------------------------------------
00363   Send the SERIAL_STATE notification as defined in usbcdc11.pdf, 6.3.5.
00364  *---------------------------------------------------------------------------*/
00365 void CDC_NotificationIn (void) {
00366
00367   NotificationBuf[0] = 0xA1;                           // bmRequestType
00368   NotificationBuf[1] = CDC_NOTIFICATION_SERIAL_STATE;  // bNotification (SERIAL_STATE)
00369   NotificationBuf[2] = 0x00;                           // wValue
00370   NotificationBuf[3] = 0x00;
00371   NotificationBuf[4] = 0x00;                           // wIndex (Interface #, LSB first)
00372   NotificationBuf[5] = 0x00;
00373   NotificationBuf[6] = 0x02;                           // wLength (Data length = 2 bytes, LSB first)
00374   NotificationBuf[7] = 0x00;
00375   NotificationBuf[8] = (CDC_SerialState >>  0) & 0xFF; // UART State Bitmap (16bits, LSB first)
00376   NotificationBuf[9] = (CDC_SerialState >>  8) & 0xFF;
00377
00378   USB_WriteEP (CDC_CEP_IN, &NotificationBuf[0], 10);   // send notification
00379 }
Generated on Tue Jun 7 14:59:05 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBCDC/cdcuser.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBCDC/cdcuser.h

Go to the documentation of this file.
00001 /*----------------------------------------------------------------------------
00002  *      U S B  -  K e r n e l
00003  *----------------------------------------------------------------------------
00004  *      Name:    cdcuser.h
00005  *      Purpose: USB Communication Device Class User module Definitions
00006  *      Version: V1.10
00007  *----------------------------------------------------------------------------
00008  *      This software is supplied "AS IS" without any warranties, express,
00009  *      implied or statutory, including but not limited to the implied
00010  *      warranties of fitness for purpose, satisfactory quality and
00011  *      noninfringement. Keil extends you a royalty-free right to reproduce
00012  *      and distribute executable files created using this software for use
00013  *      on NXP Semiconductors LPC microcontroller devices only. Nothing else
00014  *      gives you the right to use this software.
00015  *
00016  * Copyright (c) 2009 Keil - An ARM Company. All rights reserved.
00017  *---------------------------------------------------------------------------*/
00018
00019 #ifndef __CDCUSER_H__
00020 #define __CDCUSER_H__
00021
00022 /* CDC buffer handling */
00023 extern int CDC_RdOutBuf        (char *buffer, const int *length);
00024 extern int CDC_WrOutBuf        (const char *buffer, int *length);
00025 extern int CDC_OutBufAvailChar (int *availChar);
00026
00027
00028 /* CDC Data In/Out Endpoint Address */
00029 #define CDC_DEP_IN       0x82
00030 #define CDC_DEP_OUT      0x02
00031
00032 /* CDC Communication In Endpoint Address */
00033 #define CDC_CEP_IN       0x81
00034
00035 /* CDC Requests Callback Functions */
00036 extern uint32_t CDC_SendEncapsulatedCommand  (void);
00037 extern uint32_t CDC_GetEncapsulatedResponse  (void);
00038 extern uint32_t CDC_SetCommFeature           (unsigned short wFeatureSelector);
00039 extern uint32_t CDC_GetCommFeature           (unsigned short wFeatureSelector);
00040 extern uint32_t CDC_ClearCommFeature         (unsigned short wFeatureSelector);
00041 extern uint32_t CDC_GetLineCoding            (void);
00042 extern uint32_t CDC_SetLineCoding            (void);
00043 extern uint32_t CDC_SetControlLineState      (unsigned short wControlSignalBitmap);
00044 extern uint32_t CDC_SendBreak                (unsigned short wDurationOfBreak);
00045
00046 /* CDC Bulk Callback Functions */
00047 extern void CDC_BulkIn                   (void);
00048 extern void CDC_BulkOut                  (void);
00049
00050 /* CDC Notification Callback Function */
00051 extern void CDC_NotificationIn           (void);
00052
00053 /* CDC Initializtion Function */
00054 extern void CDC_Init (char portNum);
00055
00056 /* CDC prepare the SERAIAL_STATE */
00057 extern unsigned short CDC_GetSerialState (void);
00058
00059 /* flow control */
00060 extern unsigned short CDC_DepInEmpty;         // DataEndPoint IN empty
00061
00062 #endif  /* __CDCUSER_H__ */
00063
Generated on Tue Jun 7 14:59:05 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Alphabetical List

  • Data Structures
  • Data Fields

Data Structure Index

A | C | D | E | F | G | H | I | L | M | N | P | Q | R | S | T | U | W | X | _

A
hello_world_state LPC_MCPWM_TypeDef PWM_MATCHCFG_Type UART1_RS485_CTRLCFG_Type
AF_SectionDef httpd_cgi_call LPC_PINCON_TypeDef PWM_TIMERCFG_Type UART_AB_CFG_Type
APSR_Type httpd_fs_file LPC_PWM_TypeDef
Q
UART_CFG_Type
arp_entry httpd_fsdata_file LPC_QEI_TypeDef QEI_CFG_Type UART_FIFO_CFG_Type
arp_hdr httpd_fsdata_file_noconst LPC_RIT_TypeDef QEI_CFGOPT_Type UART_RING_BUFFER_T
C
httpd_state LPC_RTC_TypeDef QEI_RELOADCFG_Type uip_conn
CAN_MSG_Type
I
LPC_SC_TypeDef
R
uip_eth_addr
CAN_PinCFG_Type I2C_CFG_T LPC_SPI_TypeDef RTC_TIME_Type uip_eth_hdr
CONTROL_Type I2C_M_SETUP_Type LPC_SSP_TypeDef RX_Desc uip_fw_netif
CoreDebug_Type I2C_OWNSLAVEADDR_CFG_Type LPC_TIM_TypeDef RX_Stat uip_icmpip_hdr
D
I2C_S_SETUP_Type LPC_UART0_TypeDef
S
uip_neighbor_addr
DAC_CONVERTER_CFG_Type I2S_CFG_Type LPC_UART1_TypeDef SCB_Type uip_stats
dhcp_msg I2S_DMAConf_Type LPC_UART_TypeDef SFF_Entry uip_tcpip_hdr
dhcpc_state I2S_MODEConf_Type LPC_USB_TypeDef SFF_GPR_Entry uip_udpip_hdr
dns_answer icmpip_hdr LPC_WDT_TypeDef smtp_state
W
dns_hdr InterruptType_Type
M
SPI_CFG_Type webclient_state
E
IPSR_Type MCPWM_CAPTURE_CFG_Type SPI_DATA_SETUP_Type
X
EFF_Entry ITM_Type MCPWM_CHANNEL_CFG_Type SSP_CFG_Type xPSR_Type
EFF_GPR_Entry
L
MCPWM_COUNT_CFG_Type SSP_DATA_SETUP_Type
_
EMAC_CFG_Type LPC_ADC_TypeDef
N
SysTick_Type __CDC_BUF_T
EMAC_PACKETBUF_Type LPC_CAN_TypeDef namemap
T
__FILE
ethip_hdr LPC_CANAF_RAM_TypeDef neighbor_entry tcpip_hdr __SER_BUF_T
EXTI_InitTypeDef LPC_CANAF_TypeDef NVIC_Type telnetd_line _ASCSET_Data_t
F
LPC_CANCR_TypeDef
P
telnetd_state _Bmp_t
FullCAN_Entry LPC_DAC_TypeDef PINSEL_CFG_Type TIM_CAPTURECFG_Type _COLMOD_Data_t
fwcache_entry LPC_EMAC_TypeDef psock TIM_COUNTERCFG_Type _DATCTR_Data_t
G
LPC_GPDMA_TypeDef psock_buf TIM_MATCHCFG_Type _FontType_t
GPDMA_Channel_CFG_Type LPC_GPDMACH_TypeDef pt TIM_TIMERCFG_Type _GLCD_CmdCtrl_t
GPDMA_LLI_Type LPC_GPIO_TypeDef ptentry timer _MADCTR_Data_t
GPIO_Byte_TypeDef LPC_GPIOINT_TypeDef PWM_CAPTURECFG_Type TX_Desc _USB_DMA_DESCRIPTOR
GPIO_HalfWord_TypeDef LPC_I2C_TypeDef PWM_COUNTERCFG_Type TX_Stat _USB_EP_DATA
H
LPC_I2S_TypeDef PWM_Match_T
U

A | C | D | E | F | G | H | I | L | M | N | P | Q | R | S | T | U | W | X | _

Generated on Tue Jun 7 15:00:02 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/lpc17xx_port/clock-arch.c Source File

C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/lpc17xx_port/clock-arch.c

Go to the documentation of this file.
00001 #include "clock-arch.h"
00002 #include "LPC17xx.h"
00003
00004 __IO clock_time_t Ticks;
00005
00006 #define LED_PIN         (1<<6)
00007
00008 /* SysTick timer interrupt  handler */
00009 void SysTick_Handler (void)
00010 {
00011         ++Ticks;
00012         if (!(Ticks & 0x07)){
00013                 LPC_GPIO2->FIOPIN ^= LED_PIN;
00014         }
00015 }
00016
00017 /* Timer init */
00018 void clock_init(void)
00019 {
00020         Ticks = 0;
00021
00022         // NXP: Initialize System tick timer
00023         // Generate interrupt each SYSTICK_PERIOD microsecond
00024         if (SysTick_Config((SystemCoreClock/CLOCK_CONF_SECOND))){
00025                 // Capture error
00026                 while (1);
00027         }
00028 }
00029
00030 /* returned The current clock time, measured in system ticks */
00031 clock_time_t clock_time(void)
00032 {
00033   return(Ticks);
00034 }
Generated on Tue Jun 7 14:59:00 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/lpc17xx_port/clock-arch.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/lpc17xx_port/clock-arch.h

Go to the documentation of this file.
00001 #ifndef __CLOCK_ARCH_H__
00002 #define __CLOCK_ARCH_H__
00003
00004 #include "lpc_types.h"
00005
00006 typedef unsigned int clock_time_t;
00007
00008 #define CLOCK_CONF_SECOND 100   // tick number every second
00009
00010 #endif /* __CLOCK_ARCH_H__ */
Generated on Tue Jun 7 14:59:00 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/uip/clock.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/uip/clock.h

Go to the documentation of this file.
00001
00022 /*
00023  * Copyright (c) 2004, Swedish Institute of Computer Science.
00024  * All rights reserved.
00025  *
00026  * Redistribution and use in source and binary forms, with or without
00027  * modification, are permitted provided that the following conditions
00028  * are met:
00029  * 1. Redistributions of source code must retain the above copyright
00030  *    notice, this list of conditions and the following disclaimer.
00031  * 2. Redistributions in binary form must reproduce the above copyright
00032  *    notice, this list of conditions and the following disclaimer in the
00033  *    documentation and/or other materials provided with the distribution.
00034  * 3. Neither the name of the Institute nor the names of its contributors
00035  *    may be used to endorse or promote products derived from this software
00036  *    without specific prior written permission.
00037  *
00038  * THIS SOFTWARE IS PROVIDED BY THE INSTITUTE AND CONTRIBUTORS ``AS IS'' AND
00039  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
00040  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
00041  * ARE DISCLAIMED.  IN NO EVENT SHALL THE INSTITUTE OR CONTRIBUTORS BE LIABLE
00042  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
00043  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
00044  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
00045  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
00046  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
00047  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
00048  * SUCH DAMAGE.
00049  *
00050  * This file is part of the uIP TCP/IP stack
00051  *
00052  * Author: Adam Dunkels <adam@sics.se>
00053  *
00054  * $Id: clock.h,v 1.3 2006/06/11 21:46:39 adam Exp $
00055  */
00056 #ifndef __CLOCK_H__
00057 #define __CLOCK_H__
00058
00059 #include "clock-arch.h"
00060
00068 void clock_init(void);
00069
00077 clock_time_t clock_time(void);
00078
00084 #ifdef CLOCK_CONF_SECOND
00085 #define CLOCK_SECOND CLOCK_CONF_SECOND
00086 #else
00087 #define CLOCK_SECOND (clock_time_t)32
00088 #endif
00089
00090 #endif /* __CLOCK_H__ */
00091
Generated on Tue Jun 7 14:59:00 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CM3/CoreSupport/core_cm3.c Source File

C:/nxpdrv/LPC1700CMSIS/Core/CM3/CoreSupport/core_cm3.c

Go to the documentation of this file.
00001 /**************************************************************************/
00024 #include <stdint.h>
00025
00026 /* define compiler specific symbols */
00027 #if defined ( __CC_ARM   )
00028   #define __ASM            __asm
00029   #define __INLINE         __inline
00031 #elif defined ( __ICCARM__ )
00032   #define __ASM           __asm
00033   #define __INLINE        inline
00035 #elif defined   (  __GNUC__  )
00036   #define __ASM            __asm
00037   #define __INLINE         inline
00039 #elif defined   (  __TASKING__  )
00040   #define __ASM            __asm
00041   #define __INLINE         inline
00043 #endif
00044
00045
00046 /* ##########################  Core Instruction Access  ######################### */
00047
00048 #if defined ( __CC_ARM   ) /*------------------ RealView Compiler ----------------*/
00049
00057 #if (__ARMCC_VERSION < 400677)
00058 __ASM uint32_t __REV16(uint32_t value)
00059 {
00060   rev16 r0, r0
00061   bx lr
00062 }
00063 #endif /* __ARMCC_VERSION  */
00064
00065
00073 #if (__ARMCC_VERSION < 400677)
00074 __ASM int32_t __REVSH(int32_t value)
00075 {
00076   revsh r0, r0
00077   bx lr
00078 }
00079 #endif /* __ARMCC_VERSION  */
00080
00081
00087 #if (__ARMCC_VERSION < 400000)
00088 __ASM void __CLREX(void)
00089 {
00090   clrex
00091 }
00092 #endif /* __ARMCC_VERSION  */
00093
00094
00095 #elif (defined (__ICCARM__)) /*---------------- ICC Compiler ---------------------*/
00096 /* obsolete */
00097 #elif (defined (__GNUC__)) /*------------------ GNU Compiler ---------------------*/
00098 /* obsolete */
00099 #elif (defined (__TASKING__)) /*--------------- TASKING Compiler -----------------*/
00100 /* obsolete */
00101 #endif
00102
00103
00104 /* ###########################  Core Function Access  ########################### */
00105
00106 #if defined ( __CC_ARM   ) /*------------------ RealView Compiler ----------------*/
00107
00114 #if       (__ARMCC_VERSION <  400000)
00115 __ASM uint32_t __get_CONTROL(void)
00116 {
00117   mrs r0, control
00118   bx lr
00119 }
00120 #endif /*  __ARMCC_VERSION  */
00121
00122
00129 #if       (__ARMCC_VERSION <  400000)
00130 __ASM void __set_CONTROL(uint32_t control)
00131 {
00132   msr control, r0
00133   bx lr
00134 }
00135 #endif /*  __ARMCC_VERSION  */
00136
00137
00144 #if       (__ARMCC_VERSION <  400000)
00145 __ASM uint32_t __get_IPSR(void)
00146 {
00147   mrs r0, ipsr
00148   bx lr
00149 }
00150 #endif /*  __ARMCC_VERSION  */
00151
00152
00159 #if       (__ARMCC_VERSION <  400000)
00160 __ASM uint32_t __get_APSR(void)
00161 {
00162   mrs r0, apsr
00163   bx lr
00164 }
00165 #endif /*  __ARMCC_VERSION  */
00166
00167
00174 #if       (__ARMCC_VERSION <  400000)
00175 __ASM uint32_t __get_xPSR(void)
00176 {
00177   mrs r0, xpsr
00178   bx lr
00179 }
00180 #endif /*  __ARMCC_VERSION  */
00181
00182
00189 #if       (__ARMCC_VERSION <  400000)
00190 __ASM uint32_t __get_PSP(void)
00191 {
00192   mrs r0, psp
00193   bx lr
00194 }
00195 #endif /*  __ARMCC_VERSION  */
00196
00197
00204 #if       (__ARMCC_VERSION <  400000)
00205 __ASM void __set_PSP(uint32_t topOfProcStack)
00206 {
00207   msr psp, r0
00208   bx lr
00209 }
00210 #endif /*  __ARMCC_VERSION  */
00211
00212
00219 #if       (__ARMCC_VERSION <  400000)
00220 __ASM uint32_t __get_MSP(void)
00221 {
00222   mrs r0, msp
00223   bx lr
00224 }
00225 #endif /*  __ARMCC_VERSION  */
00226
00227
00234 #if       (__ARMCC_VERSION <  400000)
00235 __ASM void __set_MSP(uint32_t mainStackPointer)
00236 {
00237   msr msp, r0
00238   bx lr
00239 }
00240 #endif /*  __ARMCC_VERSION  */
00241
00242
00249 #if       (__ARMCC_VERSION <  400000)
00250 __ASM uint32_t  __get_BASEPRI(void)
00251 {
00252   mrs r0, basepri
00253   bx lr
00254 }
00255 #endif /*  __ARMCC_VERSION  */
00256
00257
00264 #if       (__ARMCC_VERSION <  400000)
00265 __ASM void __set_BASEPRI(uint32_t basePri)
00266 {
00267   msr basepri, r0
00268   bx lr
00269 }
00270 #endif /*  __ARMCC_VERSION  */
00271
00278 #if       (__ARMCC_VERSION <  400000)
00279 __ASM uint32_t __get_PRIMASK(void)
00280 {
00281   mrs r0, primask
00282   bx lr
00283 }
00284 #endif /*  __ARMCC_VERSION  */
00285
00286
00293 #if       (__ARMCC_VERSION <  400000)
00294 __ASM void __set_PRIMASK(uint32_t priMask)
00295 {
00296   msr primask, r0
00297   bx lr
00298 }
00299 #endif /*  __ARMCC_VERSION  */
00300
00301
00308 #if       (__ARMCC_VERSION <  400000)
00309 __ASM uint32_t  __get_FAULTMASK(void)
00310 {
00311   mrs r0, faultmask
00312   bx lr
00313 }
00314 #endif /*  __ARMCC_VERSION  */
00315
00316
00323 #if       (__ARMCC_VERSION <  400000)
00324 __ASM void __set_FAULTMASK(uint32_t faultMask)
00325 {
00326   msr faultmask, r0
00327   bx lr
00328 }
00329 #endif /*  __ARMCC_VERSION  */
00330
00331
00332
00333 #elif (defined (__ICCARM__)) /*---------------- ICC Compiler ---------------------*/
00334 /* obsolete */
00335 #elif (defined (__GNUC__)) /*------------------ GNU Compiler ---------------------*/
00336 /* obsolete */
00337 #elif (defined (__TASKING__)) /*--------------- TASKING Compiler -----------------*/
00338 /* obsolete */
00339 #endif
Generated on Tue Jun 7 14:58:54 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CM3/CoreSupport/core_cm3.h Source File

C:/nxpdrv/LPC1700CMSIS/Core/CM3/CoreSupport/core_cm3.h

Go to the documentation of this file.
00001 /**************************************************************************/
00023 #if defined ( __ICCARM__ )
00024  #pragma system_include  /* treat file as system include file for MISRA check */
00025 #endif
00026
00027 #ifdef __cplusplus
00028  extern "C" {
00029 #endif
00030
00031 #ifndef __CORE_CM3_H_GENERIC
00032 #define __CORE_CM3_H_GENERIC
00033
00044 /*******************************************************************************
00045  *                 CMSIS definitions
00046  ******************************************************************************/
00056 /*  CMSIS CM3 definitions */
00057 #define __CM3_CMSIS_VERSION_MAIN  (0x02)
00058 #define __CM3_CMSIS_VERSION_SUB   (0x00)
00059 #define __CM3_CMSIS_VERSION       ((__CM3_CMSIS_VERSION_MAIN << 16) | __CM3_CMSIS_VERSION_SUB)
00061 #define __CORTEX_M                (0x03)
00064 #if defined ( __CC_ARM   )
00065   #define __ASM            __asm
00066   #define __INLINE         __inline
00068 #elif defined ( __ICCARM__ )
00069   #define __ASM           __asm
00070   #define __INLINE        inline
00072 #elif defined   (  __GNUC__  )
00073   #define __ASM            __asm
00074   #define __INLINE         inline
00076 #elif defined   (  __TASKING__  )
00077   #define __ASM            __asm
00078   #define __INLINE         inline
00080 #endif
00081
00082 #include <stdint.h>
00083 #include "core_cmInstr.h"
00084 #include "core_cmFunc.h"
00086 #endif /* __CORE_CM3_H_GENERIC */
00087
00088
00089 #ifndef __CMSIS_GENERIC
00090
00091 #ifndef __CORE_CM3_H_DEPENDANT
00092 #define __CORE_CM3_H_DEPENDANT
00093
00094 /* IO definitions (access restrictions to peripheral registers) */
00095 #ifdef __cplusplus
00096   #define     __I     volatile
00097 #else
00098   #define     __I     volatile const
00099 #endif
00100 #define     __O     volatile
00101 #define     __IO    volatile
00103
00107 /*******************************************************************************
00108  *                 Register Abstraction
00109  ******************************************************************************/
00110
00130 typedef union
00131 {
00132   struct
00133   {
00134 #if (__CORTEX_M != 0x04)
00135     uint32_t _reserved0:27;
00136 #else
00137     uint32_t _reserved0:16;
00138     uint32_t GE:4;
00139     uint32_t _reserved1:7;
00140 #endif
00141     uint32_t Q:1;
00142     uint32_t V:1;
00143     uint32_t C:1;
00144     uint32_t Z:1;
00145     uint32_t N:1;
00146   } b;
00147   uint32_t w;
00148 } APSR_Type;
00149
00150
00153 typedef union
00154 {
00155   struct
00156   {
00157     uint32_t ISR:9;
00158     uint32_t _reserved0:23;
00159   } b;
00160   uint32_t w;
00161 } IPSR_Type;
00162
00163
00166 typedef union
00167 {
00168   struct
00169   {
00170     uint32_t ISR:9;
00171 #if (__CORTEX_M != 0x04)
00172     uint32_t _reserved0:15;
00173 #else
00174     uint32_t _reserved0:7;
00175     uint32_t GE:4;
00176     uint32_t _reserved1:4;
00177 #endif
00178     uint32_t T:1;
00179     uint32_t IT:2;
00180     uint32_t Q:1;
00181     uint32_t V:1;
00182     uint32_t C:1;
00183     uint32_t Z:1;
00184     uint32_t N:1;
00185   } b;
00186   uint32_t w;
00187 } xPSR_Type;
00188
00189
00192 typedef union
00193 {
00194   struct
00195   {
00196     uint32_t nPRIV:1;
00197     uint32_t SPSEL:1;
00198     uint32_t FPCA:1;
00199     uint32_t _reserved0:29;
00200   } b;
00201   uint32_t w;
00202 } CONTROL_Type;
00203
00215 typedef struct
00216 {
00217   __IO uint32_t ISER[8];
00218        uint32_t RESERVED0[24];
00219   __IO uint32_t ICER[8];
00220        uint32_t RSERVED1[24];
00221   __IO uint32_t ISPR[8];
00222        uint32_t RESERVED2[24];
00223   __IO uint32_t ICPR[8];
00224        uint32_t RESERVED3[24];
00225   __IO uint32_t IABR[8];
00226        uint32_t RESERVED4[56];
00227   __IO uint8_t  IP[240];
00228        uint32_t RESERVED5[644];
00229   __O  uint32_t STIR;
00230 }  NVIC_Type;
00231
00243 typedef struct
00244 {
00245   __I  uint32_t CPUID;
00246   __IO uint32_t ICSR;
00247   __IO uint32_t VTOR;
00248   __IO uint32_t AIRCR;
00249   __IO uint32_t SCR;
00250   __IO uint32_t CCR;
00251   __IO uint8_t  SHP[12];
00252   __IO uint32_t SHCSR;
00253   __IO uint32_t CFSR;
00254   __IO uint32_t HFSR;
00255   __IO uint32_t DFSR;
00256   __IO uint32_t MMFAR;
00257   __IO uint32_t BFAR;
00258   __IO uint32_t AFSR;
00259   __I  uint32_t PFR[2];
00260   __I  uint32_t DFR;
00261   __I  uint32_t ADR;
00262   __I  uint32_t MMFR[4];
00263   __I  uint32_t ISAR[5];
00264 } SCB_Type;
00265
00266 /* SCB CPUID Register Definitions */
00267 #define SCB_CPUID_IMPLEMENTER_Pos          24
00268 #define SCB_CPUID_IMPLEMENTER_Msk          (0xFFUL << SCB_CPUID_IMPLEMENTER_Pos)
00270 #define SCB_CPUID_VARIANT_Pos              20
00271 #define SCB_CPUID_VARIANT_Msk              (0xFUL << SCB_CPUID_VARIANT_Pos)
00273 #define SCB_CPUID_PARTNO_Pos                4
00274 #define SCB_CPUID_PARTNO_Msk               (0xFFFUL << SCB_CPUID_PARTNO_Pos)
00276 #define SCB_CPUID_REVISION_Pos              0
00277 #define SCB_CPUID_REVISION_Msk             (0xFUL << SCB_CPUID_REVISION_Pos)
00279 /* SCB Interrupt Control State Register Definitions */
00280 #define SCB_ICSR_NMIPENDSET_Pos            31
00281 #define SCB_ICSR_NMIPENDSET_Msk            (1UL << SCB_ICSR_NMIPENDSET_Pos)
00283 #define SCB_ICSR_PENDSVSET_Pos             28
00284 #define SCB_ICSR_PENDSVSET_Msk             (1UL << SCB_ICSR_PENDSVSET_Pos)
00286 #define SCB_ICSR_PENDSVCLR_Pos             27
00287 #define SCB_ICSR_PENDSVCLR_Msk             (1UL << SCB_ICSR_PENDSVCLR_Pos)
00289 #define SCB_ICSR_PENDSTSET_Pos             26
00290 #define SCB_ICSR_PENDSTSET_Msk             (1UL << SCB_ICSR_PENDSTSET_Pos)
00292 #define SCB_ICSR_PENDSTCLR_Pos             25
00293 #define SCB_ICSR_PENDSTCLR_Msk             (1UL << SCB_ICSR_PENDSTCLR_Pos)
00295 #define SCB_ICSR_ISRPREEMPT_Pos            23
00296 #define SCB_ICSR_ISRPREEMPT_Msk            (1UL << SCB_ICSR_ISRPREEMPT_Pos)
00298 #define SCB_ICSR_ISRPENDING_Pos            22
00299 #define SCB_ICSR_ISRPENDING_Msk            (1UL << SCB_ICSR_ISRPENDING_Pos)
00301 #define SCB_ICSR_VECTPENDING_Pos           12
00302 #define SCB_ICSR_VECTPENDING_Msk           (0x1FFUL << SCB_ICSR_VECTPENDING_Pos)
00304 #define SCB_ICSR_RETTOBASE_Pos             11
00305 #define SCB_ICSR_RETTOBASE_Msk             (1UL << SCB_ICSR_RETTOBASE_Pos)
00307 #define SCB_ICSR_VECTACTIVE_Pos             0
00308 #define SCB_ICSR_VECTACTIVE_Msk            (0x1FFUL << SCB_ICSR_VECTACTIVE_Pos)
00310 /* SCB Interrupt Control State Register Definitions */
00311 #define SCB_VTOR_TBLBASE_Pos               29
00312 #define SCB_VTOR_TBLBASE_Msk               (1UL << SCB_VTOR_TBLBASE_Pos)
00314 #define SCB_VTOR_TBLOFF_Pos                 7
00315 #define SCB_VTOR_TBLOFF_Msk                (0x3FFFFFUL << SCB_VTOR_TBLOFF_Pos)
00317 /* SCB Application Interrupt and Reset Control Register Definitions */
00318 #define SCB_AIRCR_VECTKEY_Pos              16
00319 #define SCB_AIRCR_VECTKEY_Msk              (0xFFFFUL << SCB_AIRCR_VECTKEY_Pos)
00321 #define SCB_AIRCR_VECTKEYSTAT_Pos          16
00322 #define SCB_AIRCR_VECTKEYSTAT_Msk          (0xFFFFUL << SCB_AIRCR_VECTKEYSTAT_Pos)
00324 #define SCB_AIRCR_ENDIANESS_Pos            15
00325 #define SCB_AIRCR_ENDIANESS_Msk            (1UL << SCB_AIRCR_ENDIANESS_Pos)
00327 #define SCB_AIRCR_PRIGROUP_Pos              8
00328 #define SCB_AIRCR_PRIGROUP_Msk             (7UL << SCB_AIRCR_PRIGROUP_Pos)
00330 #define SCB_AIRCR_SYSRESETREQ_Pos           2
00331 #define SCB_AIRCR_SYSRESETREQ_Msk          (1UL << SCB_AIRCR_SYSRESETREQ_Pos)
00333 #define SCB_AIRCR_VECTCLRACTIVE_Pos         1
00334 #define SCB_AIRCR_VECTCLRACTIVE_Msk        (1UL << SCB_AIRCR_VECTCLRACTIVE_Pos)
00336 #define SCB_AIRCR_VECTRESET_Pos             0
00337 #define SCB_AIRCR_VECTRESET_Msk            (1UL << SCB_AIRCR_VECTRESET_Pos)
00339 /* SCB System Control Register Definitions */
00340 #define SCB_SCR_SEVONPEND_Pos               4
00341 #define SCB_SCR_SEVONPEND_Msk              (1UL << SCB_SCR_SEVONPEND_Pos)
00343 #define SCB_SCR_SLEEPDEEP_Pos               2
00344 #define SCB_SCR_SLEEPDEEP_Msk              (1UL << SCB_SCR_SLEEPDEEP_Pos)
00346 #define SCB_SCR_SLEEPONEXIT_Pos             1
00347 #define SCB_SCR_SLEEPONEXIT_Msk            (1UL << SCB_SCR_SLEEPONEXIT_Pos)
00349 /* SCB Configuration Control Register Definitions */
00350 #define SCB_CCR_STKALIGN_Pos                9
00351 #define SCB_CCR_STKALIGN_Msk               (1UL << SCB_CCR_STKALIGN_Pos)
00353 #define SCB_CCR_BFHFNMIGN_Pos               8
00354 #define SCB_CCR_BFHFNMIGN_Msk              (1UL << SCB_CCR_BFHFNMIGN_Pos)
00356 #define SCB_CCR_DIV_0_TRP_Pos               4
00357 #define SCB_CCR_DIV_0_TRP_Msk              (1UL << SCB_CCR_DIV_0_TRP_Pos)
00359 #define SCB_CCR_UNALIGN_TRP_Pos             3
00360 #define SCB_CCR_UNALIGN_TRP_Msk            (1UL << SCB_CCR_UNALIGN_TRP_Pos)
00362 #define SCB_CCR_USERSETMPEND_Pos            1
00363 #define SCB_CCR_USERSETMPEND_Msk           (1UL << SCB_CCR_USERSETMPEND_Pos)
00365 #define SCB_CCR_NONBASETHRDENA_Pos          0
00366 #define SCB_CCR_NONBASETHRDENA_Msk         (1UL << SCB_CCR_NONBASETHRDENA_Pos)
00368 /* SCB System Handler Control and State Register Definitions */
00369 #define SCB_SHCSR_USGFAULTENA_Pos          18
00370 #define SCB_SHCSR_USGFAULTENA_Msk          (1UL << SCB_SHCSR_USGFAULTENA_Pos)
00372 #define SCB_SHCSR_BUSFAULTENA_Pos          17
00373 #define SCB_SHCSR_BUSFAULTENA_Msk          (1UL << SCB_SHCSR_BUSFAULTENA_Pos)
00375 #define SCB_SHCSR_MEMFAULTENA_Pos          16
00376 #define SCB_SHCSR_MEMFAULTENA_Msk          (1UL << SCB_SHCSR_MEMFAULTENA_Pos)
00378 #define SCB_SHCSR_SVCALLPENDED_Pos         15
00379 #define SCB_SHCSR_SVCALLPENDED_Msk         (1UL << SCB_SHCSR_SVCALLPENDED_Pos)
00381 #define SCB_SHCSR_BUSFAULTPENDED_Pos       14
00382 #define SCB_SHCSR_BUSFAULTPENDED_Msk       (1UL << SCB_SHCSR_BUSFAULTPENDED_Pos)
00384 #define SCB_SHCSR_MEMFAULTPENDED_Pos       13
00385 #define SCB_SHCSR_MEMFAULTPENDED_Msk       (1UL << SCB_SHCSR_MEMFAULTPENDED_Pos)
00387 #define SCB_SHCSR_USGFAULTPENDED_Pos       12
00388 #define SCB_SHCSR_USGFAULTPENDED_Msk       (1UL << SCB_SHCSR_USGFAULTPENDED_Pos)
00390 #define SCB_SHCSR_SYSTICKACT_Pos           11
00391 #define SCB_SHCSR_SYSTICKACT_Msk           (1UL << SCB_SHCSR_SYSTICKACT_Pos)
00393 #define SCB_SHCSR_PENDSVACT_Pos            10
00394 #define SCB_SHCSR_PENDSVACT_Msk            (1UL << SCB_SHCSR_PENDSVACT_Pos)
00396 #define SCB_SHCSR_MONITORACT_Pos            8
00397 #define SCB_SHCSR_MONITORACT_Msk           (1UL << SCB_SHCSR_MONITORACT_Pos)
00399 #define SCB_SHCSR_SVCALLACT_Pos             7
00400 #define SCB_SHCSR_SVCALLACT_Msk            (1UL << SCB_SHCSR_SVCALLACT_Pos)
00402 #define SCB_SHCSR_USGFAULTACT_Pos           3
00403 #define SCB_SHCSR_USGFAULTACT_Msk          (1UL << SCB_SHCSR_USGFAULTACT_Pos)
00405 #define SCB_SHCSR_BUSFAULTACT_Pos           1
00406 #define SCB_SHCSR_BUSFAULTACT_Msk          (1UL << SCB_SHCSR_BUSFAULTACT_Pos)
00408 #define SCB_SHCSR_MEMFAULTACT_Pos           0
00409 #define SCB_SHCSR_MEMFAULTACT_Msk          (1UL << SCB_SHCSR_MEMFAULTACT_Pos)
00411 /* SCB Configurable Fault Status Registers Definitions */
00412 #define SCB_CFSR_USGFAULTSR_Pos            16
00413 #define SCB_CFSR_USGFAULTSR_Msk            (0xFFFFUL << SCB_CFSR_USGFAULTSR_Pos)
00415 #define SCB_CFSR_BUSFAULTSR_Pos             8
00416 #define SCB_CFSR_BUSFAULTSR_Msk            (0xFFUL << SCB_CFSR_BUSFAULTSR_Pos)
00418 #define SCB_CFSR_MEMFAULTSR_Pos             0
00419 #define SCB_CFSR_MEMFAULTSR_Msk            (0xFFUL << SCB_CFSR_MEMFAULTSR_Pos)
00421 /* SCB Hard Fault Status Registers Definitions */
00422 #define SCB_HFSR_DEBUGEVT_Pos              31
00423 #define SCB_HFSR_DEBUGEVT_Msk              (1UL << SCB_HFSR_DEBUGEVT_Pos)
00425 #define SCB_HFSR_FORCED_Pos                30
00426 #define SCB_HFSR_FORCED_Msk                (1UL << SCB_HFSR_FORCED_Pos)
00428 #define SCB_HFSR_VECTTBL_Pos                1
00429 #define SCB_HFSR_VECTTBL_Msk               (1UL << SCB_HFSR_VECTTBL_Pos)
00431 /* SCB Debug Fault Status Register Definitions */
00432 #define SCB_DFSR_EXTERNAL_Pos               4
00433 #define SCB_DFSR_EXTERNAL_Msk              (1UL << SCB_DFSR_EXTERNAL_Pos)
00435 #define SCB_DFSR_VCATCH_Pos                 3
00436 #define SCB_DFSR_VCATCH_Msk                (1UL << SCB_DFSR_VCATCH_Pos)
00438 #define SCB_DFSR_DWTTRAP_Pos                2
00439 #define SCB_DFSR_DWTTRAP_Msk               (1UL << SCB_DFSR_DWTTRAP_Pos)
00441 #define SCB_DFSR_BKPT_Pos                   1
00442 #define SCB_DFSR_BKPT_Msk                  (1UL << SCB_DFSR_BKPT_Pos)
00444 #define SCB_DFSR_HALTED_Pos                 0
00445 #define SCB_DFSR_HALTED_Msk                (1UL << SCB_DFSR_HALTED_Pos)
00447
00458 typedef struct
00459 {
00460   __IO uint32_t CTRL;
00461   __IO uint32_t LOAD;
00462   __IO uint32_t VAL;
00463   __I  uint32_t CALIB;
00464 } SysTick_Type;
00465
00466 /* SysTick Control / Status Register Definitions */
00467 #define SysTick_CTRL_COUNTFLAG_Pos         16
00468 #define SysTick_CTRL_COUNTFLAG_Msk         (1UL << SysTick_CTRL_COUNTFLAG_Pos)
00470 #define SysTick_CTRL_CLKSOURCE_Pos          2
00471 #define SysTick_CTRL_CLKSOURCE_Msk         (1UL << SysTick_CTRL_CLKSOURCE_Pos)
00473 #define SysTick_CTRL_TICKINT_Pos            1
00474 #define SysTick_CTRL_TICKINT_Msk           (1UL << SysTick_CTRL_TICKINT_Pos)
00476 #define SysTick_CTRL_ENABLE_Pos             0
00477 #define SysTick_CTRL_ENABLE_Msk            (1UL << SysTick_CTRL_ENABLE_Pos)
00479 /* SysTick Reload Register Definitions */
00480 #define SysTick_LOAD_RELOAD_Pos             0
00481 #define SysTick_LOAD_RELOAD_Msk            (0xFFFFFFUL << SysTick_LOAD_RELOAD_Pos)
00483 /* SysTick Current Register Definitions */
00484 #define SysTick_VAL_CURRENT_Pos             0
00485 #define SysTick_VAL_CURRENT_Msk            (0xFFFFFFUL << SysTick_VAL_CURRENT_Pos)
00487 /* SysTick Calibration Register Definitions */
00488 #define SysTick_CALIB_NOREF_Pos            31
00489 #define SysTick_CALIB_NOREF_Msk            (1UL << SysTick_CALIB_NOREF_Pos)
00491 #define SysTick_CALIB_SKEW_Pos             30
00492 #define SysTick_CALIB_SKEW_Msk             (1UL << SysTick_CALIB_SKEW_Pos)
00494 #define SysTick_CALIB_TENMS_Pos             0
00495 #define SysTick_CALIB_TENMS_Msk            (0xFFFFFFUL << SysTick_VAL_CURRENT_Pos)
00497
00508 typedef struct
00509 {
00510   __O  union
00511   {
00512     __O  uint8_t    u8;
00513     __O  uint16_t   u16;
00514     __O  uint32_t   u32;
00515   }  PORT [32];
00516        uint32_t RESERVED0[864];
00517   __IO uint32_t TER;
00518        uint32_t RESERVED1[15];
00519   __IO uint32_t TPR;
00520        uint32_t RESERVED2[15];
00521   __IO uint32_t TCR;
00522        uint32_t RESERVED3[29];
00523   __IO uint32_t IWR;
00524   __IO uint32_t IRR;
00525   __IO uint32_t IMCR;
00526        uint32_t RESERVED4[43];
00527   __IO uint32_t LAR;
00528   __IO uint32_t LSR;
00529        uint32_t RESERVED5[6];
00530   __I  uint32_t PID4;
00531   __I  uint32_t PID5;
00532   __I  uint32_t PID6;
00533   __I  uint32_t PID7;
00534   __I  uint32_t PID0;
00535   __I  uint32_t PID1;
00536   __I  uint32_t PID2;
00537   __I  uint32_t PID3;
00538   __I  uint32_t CID0;
00539   __I  uint32_t CID1;
00540   __I  uint32_t CID2;
00541   __I  uint32_t CID3;
00542 } ITM_Type;
00543
00544 /* ITM Trace Privilege Register Definitions */
00545 #define ITM_TPR_PRIVMASK_Pos                0
00546 #define ITM_TPR_PRIVMASK_Msk               (0xFUL << ITM_TPR_PRIVMASK_Pos)
00548 /* ITM Trace Control Register Definitions */
00549 #define ITM_TCR_BUSY_Pos                   23
00550 #define ITM_TCR_BUSY_Msk                   (1UL << ITM_TCR_BUSY_Pos)
00552 #define ITM_TCR_ATBID_Pos                  16
00553 #define ITM_TCR_ATBID_Msk                  (0x7FUL << ITM_TCR_ATBID_Pos)
00555 #define ITM_TCR_TSPrescale_Pos              8
00556 #define ITM_TCR_TSPrescale_Msk             (3UL << ITM_TCR_TSPrescale_Pos)
00558 #define ITM_TCR_SWOENA_Pos                  4
00559 #define ITM_TCR_SWOENA_Msk                 (1UL << ITM_TCR_SWOENA_Pos)
00561 #define ITM_TCR_DWTENA_Pos                  3
00562 #define ITM_TCR_DWTENA_Msk                 (1UL << ITM_TCR_DWTENA_Pos)
00564 #define ITM_TCR_SYNCENA_Pos                 2
00565 #define ITM_TCR_SYNCENA_Msk                (1UL << ITM_TCR_SYNCENA_Pos)
00567 #define ITM_TCR_TSENA_Pos                   1
00568 #define ITM_TCR_TSENA_Msk                  (1UL << ITM_TCR_TSENA_Pos)
00570 #define ITM_TCR_ITMENA_Pos                  0
00571 #define ITM_TCR_ITMENA_Msk                 (1UL << ITM_TCR_ITMENA_Pos)
00573 /* ITM Integration Write Register Definitions */
00574 #define ITM_IWR_ATVALIDM_Pos                0
00575 #define ITM_IWR_ATVALIDM_Msk               (1UL << ITM_IWR_ATVALIDM_Pos)
00577 /* ITM Integration Read Register Definitions */
00578 #define ITM_IRR_ATREADYM_Pos                0
00579 #define ITM_IRR_ATREADYM_Msk               (1UL << ITM_IRR_ATREADYM_Pos)
00581 /* ITM Integration Mode Control Register Definitions */
00582 #define ITM_IMCR_INTEGRATION_Pos            0
00583 #define ITM_IMCR_INTEGRATION_Msk           (1UL << ITM_IMCR_INTEGRATION_Pos)
00585 /* ITM Lock Status Register Definitions */
00586 #define ITM_LSR_ByteAcc_Pos                 2
00587 #define ITM_LSR_ByteAcc_Msk                (1UL << ITM_LSR_ByteAcc_Pos)
00589 #define ITM_LSR_Access_Pos                  1
00590 #define ITM_LSR_Access_Msk                 (1UL << ITM_LSR_Access_Pos)
00592 #define ITM_LSR_Present_Pos                 0
00593 #define ITM_LSR_Present_Msk                (1UL << ITM_LSR_Present_Pos)
00595  /* end of group CMSIS_ITM */
00596
00597
00606 typedef struct
00607 {
00608        uint32_t RESERVED0;
00609   __I  uint32_t ICTR;
00610 #if ((defined __CM3_REV) && (__CM3_REV >= 0x200))
00611   __IO uint32_t ACTLR;
00612 #else
00613        uint32_t RESERVED1;
00614 #endif
00615 } InterruptType_Type;
00616
00617 /* Interrupt Controller Type Register Definitions */
00618 #define IntType_ICTR_INTLINESNUM_Pos  0
00619 #define IntType_ICTR_INTLINESNUM_Msk (0x1FUL << IntType_ICTR_INTLINESNUM_Pos)
00621 /* Auxiliary Control Register Definitions */
00622 #define IntType_ACTLR_DISFOLD_Pos     2
00623 #define IntType_ACTLR_DISFOLD_Msk    (1UL << IntType_ACTLR_DISFOLD_Pos)
00625 #define IntType_ACTLR_DISDEFWBUF_Pos  1
00626 #define IntType_ACTLR_DISDEFWBUF_Msk (1UL << IntType_ACTLR_DISDEFWBUF_Pos)
00628 #define IntType_ACTLR_DISMCYCINT_Pos  0
00629 #define IntType_ACTLR_DISMCYCINT_Msk (1UL << IntType_ACTLR_DISMCYCINT_Pos)
00631  /* end of group CMSIS_InterruptType */
00632
00633
00634 #if (__MPU_PRESENT == 1)
00635
00643 typedef struct
00644 {
00645   __I  uint32_t TYPE;
00646   __IO uint32_t CTRL;
00647   __IO uint32_t RNR;
00648   __IO uint32_t RBAR;
00649   __IO uint32_t RASR;
00650   __IO uint32_t RBAR_A1;
00651   __IO uint32_t RASR_A1;
00652   __IO uint32_t RBAR_A2;
00653   __IO uint32_t RASR_A2;
00654   __IO uint32_t RBAR_A3;
00655   __IO uint32_t RASR_A3;
00656 } MPU_Type;
00657
00658 /* MPU Type Register */
00659 #define MPU_TYPE_IREGION_Pos               16
00660 #define MPU_TYPE_IREGION_Msk               (0xFFUL << MPU_TYPE_IREGION_Pos)
00662 #define MPU_TYPE_DREGION_Pos                8
00663 #define MPU_TYPE_DREGION_Msk               (0xFFUL << MPU_TYPE_DREGION_Pos)
00665 #define MPU_TYPE_SEPARATE_Pos               0
00666 #define MPU_TYPE_SEPARATE_Msk              (1UL << MPU_TYPE_SEPARATE_Pos)
00668 /* MPU Control Register */
00669 #define MPU_CTRL_PRIVDEFENA_Pos             2
00670 #define MPU_CTRL_PRIVDEFENA_Msk            (1UL << MPU_CTRL_PRIVDEFENA_Pos)
00672 #define MPU_CTRL_HFNMIENA_Pos               1
00673 #define MPU_CTRL_HFNMIENA_Msk              (1UL << MPU_CTRL_HFNMIENA_Pos)
00675 #define MPU_CTRL_ENABLE_Pos                 0
00676 #define MPU_CTRL_ENABLE_Msk                (1UL << MPU_CTRL_ENABLE_Pos)
00678 /* MPU Region Number Register */
00679 #define MPU_RNR_REGION_Pos                  0
00680 #define MPU_RNR_REGION_Msk                 (0xFFUL << MPU_RNR_REGION_Pos)
00682 /* MPU Region Base Address Register */
00683 #define MPU_RBAR_ADDR_Pos                   5
00684 #define MPU_RBAR_ADDR_Msk                  (0x7FFFFFFUL << MPU_RBAR_ADDR_Pos)
00686 #define MPU_RBAR_VALID_Pos                  4
00687 #define MPU_RBAR_VALID_Msk                 (1UL << MPU_RBAR_VALID_Pos)
00689 #define MPU_RBAR_REGION_Pos                 0
00690 #define MPU_RBAR_REGION_Msk                (0xFUL << MPU_RBAR_REGION_Pos)
00692 /* MPU Region Attribute and Size Register */
00693 #define MPU_RASR_XN_Pos                    28
00694 #define MPU_RASR_XN_Msk                    (1UL << MPU_RASR_XN_Pos)
00696 #define MPU_RASR_AP_Pos                    24
00697 #define MPU_RASR_AP_Msk                    (7UL << MPU_RASR_AP_Pos)
00699 #define MPU_RASR_TEX_Pos                   19
00700 #define MPU_RASR_TEX_Msk                   (7UL << MPU_RASR_TEX_Pos)
00702 #define MPU_RASR_S_Pos                     18
00703 #define MPU_RASR_S_Msk                     (1UL << MPU_RASR_S_Pos)
00705 #define MPU_RASR_C_Pos                     17
00706 #define MPU_RASR_C_Msk                     (1UL << MPU_RASR_C_Pos)
00708 #define MPU_RASR_B_Pos                     16
00709 #define MPU_RASR_B_Msk                     (1UL << MPU_RASR_B_Pos)
00711 #define MPU_RASR_SRD_Pos                    8
00712 #define MPU_RASR_SRD_Msk                   (0xFFUL << MPU_RASR_SRD_Pos)
00714 #define MPU_RASR_SIZE_Pos                   1
00715 #define MPU_RASR_SIZE_Msk                  (0x1FUL << MPU_RASR_SIZE_Pos)
00717 #define MPU_RASR_ENA_Pos                     0
00718 #define MPU_RASR_ENA_Msk                    (0x1UL << MPU_RASR_ENA_Pos)
00720
00721 #endif
00722
00723
00732 typedef struct
00733 {
00734   __IO uint32_t DHCSR;
00735   __O  uint32_t DCRSR;
00736   __IO uint32_t DCRDR;
00737   __IO uint32_t DEMCR;
00738 } CoreDebug_Type;
00739
00740 /* Debug Halting Control and Status Register */
00741 #define CoreDebug_DHCSR_DBGKEY_Pos         16
00742 #define CoreDebug_DHCSR_DBGKEY_Msk         (0xFFFFUL << CoreDebug_DHCSR_DBGKEY_Pos)
00744 #define CoreDebug_DHCSR_S_RESET_ST_Pos     25
00745 #define CoreDebug_DHCSR_S_RESET_ST_Msk     (1UL << CoreDebug_DHCSR_S_RESET_ST_Pos)
00747 #define CoreDebug_DHCSR_S_RETIRE_ST_Pos    24
00748 #define CoreDebug_DHCSR_S_RETIRE_ST_Msk    (1UL << CoreDebug_DHCSR_S_RETIRE_ST_Pos)
00750 #define CoreDebug_DHCSR_S_LOCKUP_Pos       19
00751 #define CoreDebug_DHCSR_S_LOCKUP_Msk       (1UL << CoreDebug_DHCSR_S_LOCKUP_Pos)
00753 #define CoreDebug_DHCSR_S_SLEEP_Pos        18
00754 #define CoreDebug_DHCSR_S_SLEEP_Msk        (1UL << CoreDebug_DHCSR_S_SLEEP_Pos)
00756 #define CoreDebug_DHCSR_S_HALT_Pos         17
00757 #define CoreDebug_DHCSR_S_HALT_Msk         (1UL << CoreDebug_DHCSR_S_HALT_Pos)
00759 #define CoreDebug_DHCSR_S_REGRDY_Pos       16
00760 #define CoreDebug_DHCSR_S_REGRDY_Msk       (1UL << CoreDebug_DHCSR_S_REGRDY_Pos)
00762 #define CoreDebug_DHCSR_C_SNAPSTALL_Pos     5
00763 #define CoreDebug_DHCSR_C_SNAPSTALL_Msk    (1UL << CoreDebug_DHCSR_C_SNAPSTALL_Pos)
00765 #define CoreDebug_DHCSR_C_MASKINTS_Pos      3
00766 #define CoreDebug_DHCSR_C_MASKINTS_Msk     (1UL << CoreDebug_DHCSR_C_MASKINTS_Pos)
00768 #define CoreDebug_DHCSR_C_STEP_Pos          2
00769 #define CoreDebug_DHCSR_C_STEP_Msk         (1UL << CoreDebug_DHCSR_C_STEP_Pos)
00771 #define CoreDebug_DHCSR_C_HALT_Pos          1
00772 #define CoreDebug_DHCSR_C_HALT_Msk         (1UL << CoreDebug_DHCSR_C_HALT_Pos)
00774 #define CoreDebug_DHCSR_C_DEBUGEN_Pos       0
00775 #define CoreDebug_DHCSR_C_DEBUGEN_Msk      (1UL << CoreDebug_DHCSR_C_DEBUGEN_Pos)
00777 /* Debug Core Register Selector Register */
00778 #define CoreDebug_DCRSR_REGWnR_Pos         16
00779 #define CoreDebug_DCRSR_REGWnR_Msk         (1UL << CoreDebug_DCRSR_REGWnR_Pos)
00781 #define CoreDebug_DCRSR_REGSEL_Pos          0
00782 #define CoreDebug_DCRSR_REGSEL_Msk         (0x1FUL << CoreDebug_DCRSR_REGSEL_Pos)
00784 /* Debug Exception and Monitor Control Register */
00785 #define CoreDebug_DEMCR_TRCENA_Pos         24
00786 #define CoreDebug_DEMCR_TRCENA_Msk         (1UL << CoreDebug_DEMCR_TRCENA_Pos)
00788 #define CoreDebug_DEMCR_MON_REQ_Pos        19
00789 #define CoreDebug_DEMCR_MON_REQ_Msk        (1UL << CoreDebug_DEMCR_MON_REQ_Pos)
00791 #define CoreDebug_DEMCR_MON_STEP_Pos       18
00792 #define CoreDebug_DEMCR_MON_STEP_Msk       (1UL << CoreDebug_DEMCR_MON_STEP_Pos)
00794 #define CoreDebug_DEMCR_MON_PEND_Pos       17
00795 #define CoreDebug_DEMCR_MON_PEND_Msk       (1UL << CoreDebug_DEMCR_MON_PEND_Pos)
00797 #define CoreDebug_DEMCR_MON_EN_Pos         16
00798 #define CoreDebug_DEMCR_MON_EN_Msk         (1UL << CoreDebug_DEMCR_MON_EN_Pos)
00800 #define CoreDebug_DEMCR_VC_HARDERR_Pos     10
00801 #define CoreDebug_DEMCR_VC_HARDERR_Msk     (1UL << CoreDebug_DEMCR_VC_HARDERR_Pos)
00803 #define CoreDebug_DEMCR_VC_INTERR_Pos       9
00804 #define CoreDebug_DEMCR_VC_INTERR_Msk      (1UL << CoreDebug_DEMCR_VC_INTERR_Pos)
00806 #define CoreDebug_DEMCR_VC_BUSERR_Pos       8
00807 #define CoreDebug_DEMCR_VC_BUSERR_Msk      (1UL << CoreDebug_DEMCR_VC_BUSERR_Pos)
00809 #define CoreDebug_DEMCR_VC_STATERR_Pos      7
00810 #define CoreDebug_DEMCR_VC_STATERR_Msk     (1UL << CoreDebug_DEMCR_VC_STATERR_Pos)
00812 #define CoreDebug_DEMCR_VC_CHKERR_Pos       6
00813 #define CoreDebug_DEMCR_VC_CHKERR_Msk      (1UL << CoreDebug_DEMCR_VC_CHKERR_Pos)
00815 #define CoreDebug_DEMCR_VC_NOCPERR_Pos      5
00816 #define CoreDebug_DEMCR_VC_NOCPERR_Msk     (1UL << CoreDebug_DEMCR_VC_NOCPERR_Pos)
00818 #define CoreDebug_DEMCR_VC_MMERR_Pos        4
00819 #define CoreDebug_DEMCR_VC_MMERR_Msk       (1UL << CoreDebug_DEMCR_VC_MMERR_Pos)
00821 #define CoreDebug_DEMCR_VC_CORERESET_Pos    0
00822 #define CoreDebug_DEMCR_VC_CORERESET_Msk   (1UL << CoreDebug_DEMCR_VC_CORERESET_Pos)
00824
00831 /* Memory mapping of Cortex-M3 Hardware */
00832 #define SCS_BASE            (0xE000E000UL)
00833 #define ITM_BASE            (0xE0000000UL)
00834 #define CoreDebug_BASE      (0xE000EDF0UL)
00835 #define SysTick_BASE        (SCS_BASE +  0x0010UL)
00836 #define NVIC_BASE           (SCS_BASE +  0x0100UL)
00837 #define SCB_BASE            (SCS_BASE +  0x0D00UL)
00839 #define InterruptType       ((InterruptType_Type *) SCS_BASE)
00840 #define SCB                 ((SCB_Type *)           SCB_BASE)
00841 #define SysTick             ((SysTick_Type *)       SysTick_BASE)
00842 #define NVIC                ((NVIC_Type *)          NVIC_BASE)
00843 #define ITM                 ((ITM_Type *)           ITM_BASE)
00844 #define CoreDebug           ((CoreDebug_Type *)     CoreDebug_BASE)
00846 #if (__MPU_PRESENT == 1)
00847   #define MPU_BASE          (SCS_BASE +  0x0D90UL)
00848   #define MPU               ((MPU_Type*)            MPU_BASE)
00849 #endif
00850
00855 /*******************************************************************************
00856  *                Hardware Abstraction Layer
00857  ******************************************************************************/
00869 /* ##########################   NVIC functions  #################################### */
00887 static __INLINE void NVIC_SetPriorityGrouping(uint32_t PriorityGroup)
00888 {
00889   uint32_t reg_value;
00890   uint32_t PriorityGroupTmp = (PriorityGroup & 0x07);                         /* only values 0..7 are used          */
00891
00892   reg_value  =  SCB->AIRCR;                                                   /* read old register configuration    */
00893   reg_value &= ~(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk);             /* clear bits to change               */
00894   reg_value  =  (reg_value                       |
00895                 (0x5FA << SCB_AIRCR_VECTKEY_Pos) |
00896                 (PriorityGroupTmp << 8));                                     /* Insert write key and priorty group */
00897   SCB->AIRCR =  reg_value;
00898 }
00899
00900
00908 static __INLINE uint32_t NVIC_GetPriorityGrouping(void)
00909 {
00910   return ((SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) >> SCB_AIRCR_PRIGROUP_Pos);   /* read priority grouping field */
00911 }
00912
00913
00921 static __INLINE void NVIC_EnableIRQ(IRQn_Type IRQn)
00922 {
00923   NVIC->ISER[((uint32_t)(IRQn) >> 5)] = (1 << ((uint32_t)(IRQn) & 0x1F)); /* enable interrupt */
00924 }
00925
00926
00934 static __INLINE void NVIC_DisableIRQ(IRQn_Type IRQn)
00935 {
00936   NVIC->ICER[((uint32_t)(IRQn) >> 5)] = (1 << ((uint32_t)(IRQn) & 0x1F)); /* disable interrupt */
00937 }
00938
00939
00949 static __INLINE uint32_t NVIC_GetPendingIRQ(IRQn_Type IRQn)
00950 {
00951   return((uint32_t) ((NVIC->ISPR[(uint32_t)(IRQn) >> 5] & (1 << ((uint32_t)(IRQn) & 0x1F)))?1:0)); /* Return 1 if pending else 0 */
00952 }
00953
00954
00962 static __INLINE void NVIC_SetPendingIRQ(IRQn_Type IRQn)
00963 {
00964   NVIC->ISPR[((uint32_t)(IRQn) >> 5)] = (1 << ((uint32_t)(IRQn) & 0x1F)); /* set interrupt pending */
00965 }
00966
00967
00975 static __INLINE void NVIC_ClearPendingIRQ(IRQn_Type IRQn)
00976 {
00977   NVIC->ICPR[((uint32_t)(IRQn) >> 5)] = (1 << ((uint32_t)(IRQn) & 0x1F)); /* Clear pending interrupt */
00978 }
00979
00980
00988 static __INLINE uint32_t NVIC_GetActive(IRQn_Type IRQn)
00989 {
00990   return((uint32_t)((NVIC->IABR[(uint32_t)(IRQn) >> 5] & (1 << ((uint32_t)(IRQn) & 0x1F)))?1:0)); /* Return 1 if active else 0 */
00991 }
00992
00993
01005 static __INLINE void NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority)
01006 {
01007   if(IRQn < 0) {
01008     SCB->SHP[((uint32_t)(IRQn) & 0xF)-4] = ((priority << (8 - __NVIC_PRIO_BITS)) & 0xff); } /* set Priority for Cortex-M  System Interrupts */
01009   else {
01010     NVIC->IP[(uint32_t)(IRQn)] = ((priority << (8 - __NVIC_PRIO_BITS)) & 0xff);    }        /* set Priority for device specific Interrupts  */
01011 }
01012
01013
01026 static __INLINE uint32_t NVIC_GetPriority(IRQn_Type IRQn)
01027 {
01028
01029   if(IRQn < 0) {
01030     return((uint32_t)(SCB->SHP[((uint32_t)(IRQn) & 0xF)-4] >> (8 - __NVIC_PRIO_BITS)));  } /* get priority for Cortex-M  system interrupts */
01031   else {
01032     return((uint32_t)(NVIC->IP[(uint32_t)(IRQn)]           >> (8 - __NVIC_PRIO_BITS)));  } /* get priority for device specific interrupts  */
01033 }
01034
01035
01050 static __INLINE uint32_t NVIC_EncodePriority (uint32_t PriorityGroup, uint32_t PreemptPriority, uint32_t SubPriority)
01051 {
01052   uint32_t PriorityGroupTmp = (PriorityGroup & 0x07);          /* only values 0..7 are used          */
01053   uint32_t PreemptPriorityBits;
01054   uint32_t SubPriorityBits;
01055
01056   PreemptPriorityBits = ((7 - PriorityGroupTmp) > __NVIC_PRIO_BITS) ? __NVIC_PRIO_BITS : 7 - PriorityGroupTmp;
01057   SubPriorityBits     = ((PriorityGroupTmp + __NVIC_PRIO_BITS) < 7) ? 0 : PriorityGroupTmp - 7 + __NVIC_PRIO_BITS;
01058
01059   return (
01060            ((PreemptPriority & ((1 << (PreemptPriorityBits)) - 1)) << SubPriorityBits) |
01061            ((SubPriority     & ((1 << (SubPriorityBits    )) - 1)))
01062          );
01063 }
01064
01065
01080 static __INLINE void NVIC_DecodePriority (uint32_t Priority, uint32_t PriorityGroup, uint32_t* pPreemptPriority, uint32_t* pSubPriority)
01081 {
01082   uint32_t PriorityGroupTmp = (PriorityGroup & 0x07);          /* only values 0..7 are used          */
01083   uint32_t PreemptPriorityBits;
01084   uint32_t SubPriorityBits;
01085
01086   PreemptPriorityBits = ((7 - PriorityGroupTmp) > __NVIC_PRIO_BITS) ? __NVIC_PRIO_BITS : 7 - PriorityGroupTmp;
01087   SubPriorityBits     = ((PriorityGroupTmp + __NVIC_PRIO_BITS) < 7) ? 0 : PriorityGroupTmp - 7 + __NVIC_PRIO_BITS;
01088
01089   *pPreemptPriority = (Priority >> SubPriorityBits) & ((1 << (PreemptPriorityBits)) - 1);
01090   *pSubPriority     = (Priority                   ) & ((1 << (SubPriorityBits    )) - 1);
01091 }
01092
01093
01098 static __INLINE void NVIC_SystemReset(void)
01099 {
01100   __DSB();                                                     /* Ensure all outstanding memory accesses included
01101                                                                   buffered write are completed before reset */
01102   SCB->AIRCR  = ((0x5FA << SCB_AIRCR_VECTKEY_Pos)      |
01103                  (SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) |
01104                  SCB_AIRCR_SYSRESETREQ_Msk);                   /* Keep priority group unchanged */
01105   __DSB();                                                     /* Ensure completion of memory access */
01106   while(1);                                                    /* wait until reset */
01107 }
01108
01115 /* ##################################    SysTick function  ############################################ */
01123 #if (__Vendor_SysTickConfig == 0)
01124
01134 static __INLINE uint32_t SysTick_Config(uint32_t ticks)
01135 {
01136   if (ticks > SysTick_LOAD_RELOAD_Msk)  return (1);            /* Reload value impossible */
01137
01138   SysTick->LOAD  = (ticks & SysTick_LOAD_RELOAD_Msk) - 1;      /* set reload register */
01139   NVIC_SetPriority (SysTick_IRQn, (1<<__NVIC_PRIO_BITS) - 1);  /* set Priority for Cortex-M0 System Interrupts */
01140   SysTick->VAL   = 0;                                          /* Load the SysTick Counter Value */
01141   SysTick->CTRL  = SysTick_CTRL_CLKSOURCE_Msk |
01142                    SysTick_CTRL_TICKINT_Msk   |
01143                    SysTick_CTRL_ENABLE_Msk;                    /* Enable SysTick IRQ and SysTick Timer */
01144   return (0);                                                  /* Function successful */
01145 }
01146
01147 #endif
01148
01153 /* ##################################### Debug In/Output function ########################################### */
01159 extern volatile int32_t ITM_RxBuffer;
01160 #define                 ITM_RXBUFFER_EMPTY    0x5AA55AA5
01172 static __INLINE uint32_t ITM_SendChar (uint32_t ch)
01173 {
01174   if ((CoreDebug->DEMCR & CoreDebug_DEMCR_TRCENA_Msk)  &&      /* Trace enabled */
01175       (ITM->TCR & ITM_TCR_ITMENA_Msk)                  &&      /* ITM enabled */
01176       (ITM->TER & (1UL << 0)        )                    )     /* ITM Port #0 enabled */
01177   {
01178     while (ITM->PORT[0].u32 == 0);
01179     ITM->PORT[0].u8 = (uint8_t) ch;
01180   }
01181   return (ch);
01182 }
01183
01184
01194 static __INLINE int32_t ITM_ReceiveChar (void) {
01195   int32_t ch = -1;                           /* no character available */
01196
01197   if (ITM_RxBuffer != ITM_RXBUFFER_EMPTY) {
01198     ch = ITM_RxBuffer;
01199     ITM_RxBuffer = ITM_RXBUFFER_EMPTY;       /* ready for next character */
01200   }
01201
01202   return (ch);
01203 }
01204
01205
01214 static __INLINE int32_t ITM_CheckChar (void) {
01215
01216   if (ITM_RxBuffer == ITM_RXBUFFER_EMPTY) {
01217     return (0);                                 /* no character available */
01218   } else {
01219     return (1);                                 /*    character available */
01220   }
01221 }
01222
01228 #endif /* __CORE_CM3_H_DEPENDANT */
01229
01230 #endif /* __CMSIS_GENERIC */
01231
01232 #ifdef __cplusplus
01233 }
01234 #endif
01235
01236 /*lint -restore */
Generated on Tue Jun 7 14:58:54 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CM3/CoreSupport/core_cmFunc.h Source File

C:/nxpdrv/LPC1700CMSIS/Core/CM3/CoreSupport/core_cmFunc.h

Go to the documentation of this file.
00001 /**************************************************************************/
00024 #ifndef __CORE_CMFUNC_H__
00025 #define __CORE_CMFUNC_H__
00026
00027 /* ###########################  Core Function Access  ########################### */
00033 #if defined ( __CC_ARM   ) /*------------------ RealView Compiler ----------------*/
00034 /* ARM armcc specific functions */
00035
00036 /* intrinsic void __enable_irq();     */
00037 /* intrinsic void __disable_irq();    */
00038
00045 #if       (__ARMCC_VERSION <  400000)
00046 extern          uint32_t __get_CONTROL(void);
00047 #else  /* (__ARMCC_VERSION >= 400000) */
00048 static __INLINE uint32_t __get_CONTROL(void)
00049 {
00050   register uint32_t __regControl         __ASM("control");
00051   return(__regControl);
00052 }
00053 #endif /*  __ARMCC_VERSION  */
00054
00055
00062 #if       (__ARMCC_VERSION <  400000)
00063 extern          void __set_CONTROL(uint32_t control);
00064 #else  /* (__ARMCC_VERSION >= 400000) */
00065 static __INLINE void __set_CONTROL(uint32_t control)
00066 {
00067   register uint32_t __regControl         __ASM("control");
00068   __regControl = control;
00069 }
00070 #endif /*  __ARMCC_VERSION  */
00071
00072
00079 #if       (__ARMCC_VERSION <  400000)
00080 extern          uint32_t __get_IPSR(void);
00081 #else  /* (__ARMCC_VERSION >= 400000) */
00082 static __INLINE uint32_t __get_IPSR(void)
00083 {
00084   register uint32_t __regIPSR          __ASM("ipsr");
00085   return(__regIPSR);
00086 }
00087 #endif /*  __ARMCC_VERSION  */
00088
00089
00096 #if       (__ARMCC_VERSION <  400000)
00097 extern          uint32_t __get_APSR(void);
00098 #else  /* (__ARMCC_VERSION >= 400000) */
00099 static __INLINE uint32_t __get_APSR(void)
00100 {
00101   register uint32_t __regAPSR          __ASM("apsr");
00102   return(__regAPSR);
00103 }
00104 #endif /*  __ARMCC_VERSION  */
00105
00106
00113 #if       (__ARMCC_VERSION <  400000)
00114 extern          uint32_t __get_xPSR(void);
00115 #else  /* (__ARMCC_VERSION >= 400000) */
00116 static __INLINE uint32_t __get_xPSR(void)
00117 {
00118   register uint32_t __regXPSR          __ASM("xpsr");
00119   return(__regXPSR);
00120 }
00121 #endif /*  __ARMCC_VERSION  */
00122
00123
00130 #if       (__ARMCC_VERSION <  400000)
00131 extern          uint32_t __get_PSP(void);
00132 #else  /* (__ARMCC_VERSION >= 400000) */
00133 static __INLINE uint32_t __get_PSP(void)
00134 {
00135   register uint32_t __regProcessStackPointer  __ASM("psp");
00136   return(__regProcessStackPointer);
00137 }
00138 #endif /*  __ARMCC_VERSION  */
00139
00140
00147 #if       (__ARMCC_VERSION <  400000)
00148 extern          void __set_PSP(uint32_t topOfProcStack);
00149 #else  /* (__ARMCC_VERSION >= 400000) */
00150 static __INLINE void __set_PSP(uint32_t topOfProcStack)
00151 {
00152   register uint32_t __regProcessStackPointer  __ASM("psp");
00153   __regProcessStackPointer = topOfProcStack;
00154 }
00155 #endif /*  __ARMCC_VERSION  */
00156
00157
00164 #if       (__ARMCC_VERSION <  400000)
00165 extern          uint32_t __get_MSP(void);
00166 #else  /* (__ARMCC_VERSION >= 400000) */
00167 static __INLINE uint32_t __get_MSP(void)
00168 {
00169   register uint32_t __regMainStackPointer     __ASM("msp");
00170   return(__regMainStackPointer);
00171 }
00172 #endif /*  __ARMCC_VERSION  */
00173
00174
00181 #if       (__ARMCC_VERSION <  400000)
00182 extern          void __set_MSP(uint32_t topOfMainStack);
00183 #else  /* (__ARMCC_VERSION >= 400000) */
00184 static __INLINE void __set_MSP(uint32_t topOfMainStack)
00185 {
00186   register uint32_t __regMainStackPointer     __ASM("msp");
00187   __regMainStackPointer = topOfMainStack;
00188 }
00189 #endif /*  __ARMCC_VERSION  */
00190
00191
00198 #if       (__ARMCC_VERSION <  400000)
00199 extern          uint32_t __get_PRIMASK(void);
00200 #else  /* (__ARMCC_VERSION >= 400000) */
00201 static __INLINE uint32_t __get_PRIMASK(void)
00202 {
00203   register uint32_t __regPriMask         __ASM("primask");
00204   return(__regPriMask);
00205 }
00206 #endif /*  __ARMCC_VERSION  */
00207
00208
00215 #if       (__ARMCC_VERSION <  400000)
00216 extern          void __set_PRIMASK(uint32_t priMask);
00217 #else  /* (__ARMCC_VERSION >= 400000) */
00218 static __INLINE void __set_PRIMASK(uint32_t priMask)
00219 {
00220   register uint32_t __regPriMask         __ASM("primask");
00221   __regPriMask = (priMask);
00222 }
00223 #endif /*  __ARMCC_VERSION  */
00224
00225
00226 #if       (__CORTEX_M >= 0x03)
00227
00233 #define __enable_fault_irq                __enable_fiq
00234
00235
00241 #define __disable_fault_irq               __disable_fiq
00242
00243
00250 #if       (__ARMCC_VERSION <  400000)
00251 extern          uint32_t __get_BASEPRI(void);
00252 #else  /* (__ARMCC_VERSION >= 400000) */
00253 static __INLINE uint32_t  __get_BASEPRI(void)
00254 {
00255   register uint32_t __regBasePri         __ASM("basepri");
00256   return(__regBasePri);
00257 }
00258 #endif /*  __ARMCC_VERSION  */
00259
00260
00267 #if       (__ARMCC_VERSION <  400000)
00268 extern          void __set_BASEPRI(uint32_t basePri);
00269 #else  /* (__ARMCC_VERSION >= 400000) */
00270 static __INLINE void __set_BASEPRI(uint32_t basePri)
00271 {
00272   register uint32_t __regBasePri         __ASM("basepri");
00273   __regBasePri = (basePri & 0xff);
00274 }
00275 #endif /*  __ARMCC_VERSION  */
00276
00277
00284 #if       (__ARMCC_VERSION <  400000)
00285 extern          uint32_t __get_FAULTMASK(void);
00286 #else  /* (__ARMCC_VERSION >= 400000) */
00287 static __INLINE uint32_t __get_FAULTMASK(void)
00288 {
00289   register uint32_t __regFaultMask       __ASM("faultmask");
00290   return(__regFaultMask);
00291 }
00292 #endif /*  __ARMCC_VERSION  */
00293
00294
00301 #if       (__ARMCC_VERSION <  400000)
00302 extern          void __set_FAULTMASK(uint32_t faultMask);
00303 #else  /* (__ARMCC_VERSION >= 400000) */
00304 static __INLINE void __set_FAULTMASK(uint32_t faultMask)
00305 {
00306   register uint32_t __regFaultMask       __ASM("faultmask");
00307   __regFaultMask = (faultMask & 1);
00308 }
00309 #endif /*  __ARMCC_VERSION  */
00310
00311 #endif /* (__CORTEX_M >= 0x03) */
00312
00313
00314 #if       (__CORTEX_M == 0x04)
00315
00322 static __INLINE uint32_t __get_FPSCR(void)
00323 {
00324 #if (__FPU_PRESENT == 1)
00325   register uint32_t __regfpscr         __ASM("fpscr");
00326   return(__regfpscr);
00327 #else
00328    return(0);
00329 #endif
00330 }
00331
00332
00339 static __INLINE void __set_FPSCR(uint32_t fpscr)
00340 {
00341 #if (__FPU_PRESENT == 1)
00342   register uint32_t __regfpscr         __ASM("fpscr");
00343   __regfpscr = (fpscr);
00344 #endif
00345 }
00346
00347 #endif /* (__CORTEX_M == 0x04) */
00348
00349
00350  #elif (defined (__ICCARM__)) /*---------------- ICC Compiler ---------------------*/
00351 /* IAR iccarm specific functions */
00352
00353 #if defined (__ICCARM__)
00354   #include <intrinsics.h>                     /* IAR Intrinsics   */
00355 #endif
00356
00357 #pragma diag_suppress=Pe940
00358
00364 #define __enable_irq                              __enable_interrupt
00365
00366
00372 #define __disable_irq                             __disable_interrupt
00373
00374
00375 /* intrinsic unsigned long __get_CONTROL( void ); (see intrinsic.h) */
00376 /* intrinsic void __set_CONTROL( unsigned long ); (see intrinsic.h) */
00377
00378
00385 static uint32_t __get_IPSR(void)
00386 {
00387   __ASM("mrs r0, ipsr");
00388 }
00389
00390
00397 static uint32_t __get_APSR(void)
00398 {
00399   __ASM("mrs r0, apsr");
00400 }
00401
00402
00409 static uint32_t __get_xPSR(void)
00410 {
00411   __ASM("mrs r0, psr");           // assembler does not know "xpsr"
00412 }
00413
00414
00421 static uint32_t __get_PSP(void)
00422 {
00423   __ASM("mrs r0, psp");
00424 }
00425
00426
00433 static void __set_PSP(uint32_t topOfProcStack)
00434 {
00435   __ASM("msr psp, r0");
00436 }
00437
00438
00445 static uint32_t __get_MSP(void)
00446 {
00447   __ASM("mrs r0, msp");
00448 }
00449
00450
00457 static void __set_MSP(uint32_t topOfMainStack)
00458 {
00459   __ASM("msr msp, r0");
00460 }
00461
00462
00463 /* intrinsic unsigned long __get_PRIMASK( void ); (see intrinsic.h) */
00464 /* intrinsic void __set_PRIMASK( unsigned long ); (see intrinsic.h) */
00465
00466
00467 #if       (__CORTEX_M >= 0x03)
00468
00474 static __INLINE void __enable_fault_irq(void)
00475 {
00476   __ASM ("cpsie f");
00477 }
00478
00479
00485 static __INLINE void __disable_fault_irq(void)
00486 {
00487   __ASM ("cpsid f");
00488 }
00489
00490
00491 /* intrinsic unsigned long __get_BASEPRI( void );   (see intrinsic.h) */
00492 /* intrinsic void __set_BASEPRI( unsigned long );   (see intrinsic.h) */
00493 /* intrinsic unsigned long __get_FAULTMASK( void ); (see intrinsic.h) */
00494 /* intrinsic void __set_FAULTMASK(unsigned long);   (see intrinsic.h) */
00495
00496 #endif /* (__CORTEX_M >= 0x03) */
00497
00498
00499 #if       (__CORTEX_M == 0x04)
00500
00507 static uint32_t __get_FPSCR(void)
00508 {
00509 #if (__FPU_PRESENT == 1)
00510   __ASM("vmrs r0, fpscr");
00511 #else
00512   return(0);
00513 #endif
00514 }
00515
00516
00523 static void __set_FPSCR(uint32_t fpscr)
00524 {
00525 #if (__FPU_PRESENT == 1)
00526   __ASM("vmsr fpscr, r0");
00527 #endif
00528 }
00529
00530 #endif /* (__CORTEX_M == 0x04) */
00531
00532 #pragma diag_default=Pe940
00533
00534
00535 #elif (defined (__GNUC__)) /*------------------ GNU Compiler ---------------------*/
00536 /* GNU gcc specific functions */
00537
00543 __attribute__( ( always_inline ) ) static __INLINE void __enable_irq(void)
00544 {
00545   __ASM volatile ("cpsie i");
00546 }
00547
00548
00554 __attribute__( ( always_inline ) ) static __INLINE void __disable_irq(void)
00555 {
00556   __ASM volatile ("cpsid i");
00557 }
00558
00559
00566 __attribute__( ( always_inline ) ) static __INLINE uint32_t __get_CONTROL(void)
00567 {
00568   uint32_t result;
00569
00570   __ASM volatile ("MRS %0, control" : "=r" (result) );
00571   return(result);
00572 }
00573
00574
00581 __attribute__( ( always_inline ) ) static __INLINE void __set_CONTROL(uint32_t control)
00582 {
00583   __ASM volatile ("MSR control, %0" : : "r" (control) );
00584 }
00585
00586
00593 __attribute__( ( always_inline ) ) static __INLINE uint32_t __get_IPSR(void)
00594 {
00595   uint32_t result;
00596
00597   __ASM volatile ("MRS %0, ipsr" : "=r" (result) );
00598   return(result);
00599 }
00600
00601
00608 __attribute__( ( always_inline ) ) static __INLINE uint32_t __get_APSR(void)
00609 {
00610   uint32_t result;
00611
00612   __ASM volatile ("MRS %0, apsr" : "=r" (result) );
00613   return(result);
00614 }
00615
00616
00623 __attribute__( ( always_inline ) ) static __INLINE uint32_t __get_xPSR(void)
00624 {
00625   uint32_t result;
00626
00627   __ASM volatile ("MRS %0, xpsr" : "=r" (result) );
00628   return(result);
00629 }
00630
00631
00638 __attribute__( ( always_inline ) ) static __INLINE uint32_t __get_PSP(void)
00639 {
00640   register uint32_t result;
00641
00642   __ASM volatile ("MRS %0, psp\n"  : "=r" (result) );
00643   return(result);
00644 }
00645
00646
00653 __attribute__( ( always_inline ) ) static __INLINE void __set_PSP(uint32_t topOfProcStack)
00654 {
00655   __ASM volatile ("MSR psp, %0\n" : : "r" (topOfProcStack) );
00656 }
00657
00658
00665 __attribute__( ( always_inline ) ) static __INLINE uint32_t __get_MSP(void)
00666 {
00667   register uint32_t result;
00668
00669   __ASM volatile ("MRS %0, msp\n" : "=r" (result) );
00670   return(result);
00671 }
00672
00673
00680 __attribute__( ( always_inline ) ) static __INLINE void __set_MSP(uint32_t topOfMainStack)
00681 {
00682   __ASM volatile ("MSR msp, %0\n" : : "r" (topOfMainStack) );
00683 }
00684
00685
00692 __attribute__( ( always_inline ) ) static __INLINE uint32_t __get_PRIMASK(void)
00693 {
00694   uint32_t result;
00695
00696   __ASM volatile ("MRS %0, primask" : "=r" (result) );
00697   return(result);
00698 }
00699
00700
00707 __attribute__( ( always_inline ) ) static __INLINE void __set_PRIMASK(uint32_t priMask)
00708 {
00709   __ASM volatile ("MSR primask, %0" : : "r" (priMask) );
00710 }
00711
00712
00713 #if       (__CORTEX_M >= 0x03)
00714
00720 __attribute__( ( always_inline ) ) static __INLINE void __enable_fault_irq(void)
00721 {
00722   __ASM volatile ("cpsie f");
00723 }
00724
00725
00731 __attribute__( ( always_inline ) ) static __INLINE void __disable_fault_irq(void)
00732 {
00733   __ASM volatile ("cpsid f");
00734 }
00735
00736
00743 __attribute__( ( always_inline ) ) static __INLINE uint32_t __get_BASEPRI(void)
00744 {
00745   uint32_t result;
00746
00747   __ASM volatile ("MRS %0, basepri_max" : "=r" (result) );
00748   return(result);
00749 }
00750
00751
00758 __attribute__( ( always_inline ) ) static __INLINE void __set_BASEPRI(uint32_t value)
00759 {
00760   __ASM volatile ("MSR basepri, %0" : : "r" (value) );
00761 }
00762
00763
00770 __attribute__( ( always_inline ) ) static __INLINE uint32_t __get_FAULTMASK(void)
00771 {
00772   uint32_t result;
00773
00774   __ASM volatile ("MRS %0, faultmask" : "=r" (result) );
00775   return(result);
00776 }
00777
00778
00785 __attribute__( ( always_inline ) ) static __INLINE void __set_FAULTMASK(uint32_t faultMask)
00786 {
00787   __ASM volatile ("MSR faultmask, %0" : : "r" (faultMask) );
00788 }
00789
00790 #endif /* (__CORTEX_M >= 0x03) */
00791
00792
00793 #if       (__CORTEX_M == 0x04)
00794
00801 __attribute__( ( always_inline ) ) static __INLINE uint32_t __get_FPSCR(void)
00802 {
00803 #if (__FPU_PRESENT == 1)
00804   uint32_t result;
00805
00806   __ASM volatile ("MRS %0, fpscr" : "=r" (result) );
00807   return(result);
00808 #else
00809    return(0);
00810 #endif
00811 }
00812
00813
00820 __attribute__( ( always_inline ) ) static __INLINE void __set_FPSCR(uint32_t fpscr)
00821 {
00822 #if (__FPU_PRESENT == 1)
00823   __ASM volatile ("MSR fpscr, %0" : : "r" (fpscr) );
00824 #endif
00825 }
00826
00827 #endif /* (__CORTEX_M == 0x04) */
00828
00829
00830 #elif (defined (__TASKING__)) /*--------------- TASKING Compiler -----------------*/
00831 /* TASKING carm specific functions */
00832
00833 /*
00834  * The CMSIS functions have been implemented as intrinsics in the compiler.
00835  * Please use "carm -?i" to get an up to date list of all instrinsics,
00836  * Including the CMSIS ones.
00837  */
00838
00839 #endif
00840
00844 #endif /* __CORE_CMFUNC_H__ */
Generated on Tue Jun 7 14:58:54 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CM3/CoreSupport/core_cmInstr.h Source File

C:/nxpdrv/LPC1700CMSIS/Core/CM3/CoreSupport/core_cmInstr.h

Go to the documentation of this file.
00001 /**************************************************************************/
00024 #ifndef __CORE_CMINSTR_H__
00025 #define __CORE_CMINSTR_H__
00026
00027
00028 /* ##########################  Core Instruction Access  ######################### */
00035 #if defined ( __CC_ARM   ) /*------------------ RealView Compiler ----------------*/
00036 /* ARM armcc specific functions */
00037
00042 #define __NOP                             __nop
00043
00044
00050 #define __WFI                             __wfi
00051
00052
00058 #define __WFE                             __wfe
00059
00060
00065 #define __SEV                             __sev
00066
00067
00074 #define __ISB()                           __isb(0xF)
00075
00076
00082 #define __DSB()                           __dsb(0xF)
00083
00084
00090 #define __DMB()                           __dmb(0xF)
00091
00092
00100 #define __REV                             __rev
00101
00102
00110 #if (__ARMCC_VERSION < 400677)
00111 extern uint32_t __REV16(uint32_t value);
00112 #else  /* (__ARMCC_VERSION >= 400677)  */
00113 static __INLINE __ASM uint32_t __REV16(uint32_t value)
00114 {
00115   rev16 r0, r0
00116   bx lr
00117 }
00118 #endif /* __ARMCC_VERSION  */
00119
00120
00128 #if (__ARMCC_VERSION < 400677)
00129 extern int32_t __REVSH(int32_t value);
00130 #else  /* (__ARMCC_VERSION >= 400677)  */
00131 static __INLINE __ASM int32_t __REVSH(int32_t value)
00132 {
00133   revsh r0, r0
00134   bx lr
00135 }
00136 #endif /* __ARMCC_VERSION  */
00137
00138
00139 #if       (__CORTEX_M >= 0x03)
00140
00148 #define __RBIT                            __rbit
00149
00150
00158 #define __LDREXB(ptr)                     ((uint8_t ) __ldrex(ptr))
00159
00160
00168 #define __LDREXH(ptr)                     ((uint16_t) __ldrex(ptr))
00169
00170
00178 #define __LDREXW(ptr)                     ((uint32_t ) __ldrex(ptr))
00179
00180
00190 #define __STREXB(value, ptr)              __strex(value, ptr)
00191
00192
00202 #define __STREXH(value, ptr)              __strex(value, ptr)
00203
00204
00214 #define __STREXW(value, ptr)              __strex(value, ptr)
00215
00216
00222 #if (__ARMCC_VERSION < 400000)
00223 extern void __CLREX(void);
00224 #else  /* (__ARMCC_VERSION >= 400000)  */
00225 #define __CLREX                           __clrex
00226 #endif /* __ARMCC_VERSION  */
00227
00228
00237 #define __SSAT                            __ssat
00238
00239
00248 #define __USAT                            __usat
00249
00250
00258 #define __CLZ                             __clz
00259
00260 #endif /* (__CORTEX_M >= 0x03) */
00261
00262
00263
00264 #elif (defined (__ICCARM__)) /*---------------- ICC Compiler ---------------------*/
00265 /* IAR iccarm specific functions */
00266
00267 #include <intrinsics.h>                     /* IAR Intrinsics   */
00268
00269 #pragma diag_suppress=Pe940
00270
00275 #define __NOP                           __no_operation
00276
00277
00283 static __INLINE  void __WFI(void)
00284 {
00285   __ASM ("wfi");
00286 }
00287
00288
00294 static __INLINE  void __WFE(void)
00295 {
00296   __ASM ("wfe");
00297 }
00298
00299
00304 static __INLINE  void __SEV(void)
00305 {
00306   __ASM ("sev");
00307 }
00308
00309
00310 /* intrinsic     void __ISB(void)            (see intrinsics.h) */
00311 /* intrinsic     void __DSB(void)            (see intrinsics.h) */
00312 /* intrinsic     void __DMB(void)            (see intrinsics.h) */
00313 /* intrinsic uint32_t __REV(uint32_t value)  (see intrinsics.h) */
00314 /* intrinsic          __SSAT                 (see intrinsics.h) */
00315 /* intrinsic          __USAT                 (see intrinsics.h) */
00316
00317
00325 static uint32_t __REV16(uint32_t value)
00326 {
00327   __ASM("rev16 r0, r0");
00328 }
00329
00330
00331 /* intrinsic uint32_t __REVSH(uint32_t value)  (see intrinsics.h */
00332
00333
00334 #if       (__CORTEX_M >= 0x03)
00335
00343 static uint32_t __RBIT(uint32_t value)
00344 {
00345   __ASM("rbit r0, r0");
00346 }
00347
00348
00356 static uint8_t __LDREXB(volatile uint8_t *addr)
00357 {
00358   __ASM("ldrexb r0, [r0]");
00359 }
00360
00361
00369 static uint16_t __LDREXH(volatile uint16_t *addr)
00370 {
00371   __ASM("ldrexh r0, [r0]");
00372 }
00373
00374
00382 /* intrinsic unsigned long __LDREX(unsigned long *)  (see intrinsics.h) */
00383 static uint32_t __LDREXW(volatile uint32_t *addr)
00384 {
00385   __ASM("ldrex r0, [r0]");
00386 }
00387
00388
00398 static uint32_t __STREXB(uint8_t value, volatile uint8_t *addr)
00399 {
00400   __ASM("strexb r0, r0, [r1]");
00401 }
00402
00403
00413 static uint32_t __STREXH(uint16_t value, volatile uint16_t *addr)
00414 {
00415   __ASM("strexh r0, r0, [r1]");
00416 }
00417
00418
00428 /* intrinsic unsigned long __STREX(unsigned long, unsigned long)  (see intrinsics.h )*/
00429 static uint32_t __STREXW(uint32_t value, volatile uint32_t *addr)
00430 {
00431   __ASM("strex r0, r0, [r1]");
00432 }
00433
00434
00440 static __INLINE void __CLREX(void)
00441 {
00442   __ASM ("clrex");
00443 }
00444
00445 /* intrinsic   unsigned char __CLZ( unsigned long )      (see intrinsics.h) */
00446
00447 #endif /* (__CORTEX_M >= 0x03) */
00448
00449 #pragma diag_default=Pe940
00450
00451
00452
00453 #elif (defined (__GNUC__)) /*------------------ GNU Compiler ---------------------*/
00454 /* GNU gcc specific functions */
00455
00460 __attribute__( ( always_inline ) ) static __INLINE void __NOP(void)
00461 {
00462   __ASM volatile ("nop");
00463 }
00464
00465
00471 __attribute__( ( always_inline ) ) static __INLINE void __WFI(void)
00472 {
00473   __ASM volatile ("wfi");
00474 }
00475
00476
00482 __attribute__( ( always_inline ) ) static __INLINE void __WFE(void)
00483 {
00484   __ASM volatile ("wfe");
00485 }
00486
00487
00492 __attribute__( ( always_inline ) ) static __INLINE void __SEV(void)
00493 {
00494   __ASM volatile ("sev");
00495 }
00496
00497
00504 __attribute__( ( always_inline ) ) static __INLINE void __ISB(void)
00505 {
00506   __ASM volatile ("isb");
00507 }
00508
00509
00515 __attribute__( ( always_inline ) ) static __INLINE void __DSB(void)
00516 {
00517   __ASM volatile ("dsb");
00518 }
00519
00520
00526 __attribute__( ( always_inline ) ) static __INLINE void __DMB(void)
00527 {
00528   __ASM volatile ("dmb");
00529 }
00530
00531
00539 __attribute__( ( always_inline ) ) static __INLINE uint32_t __REV(uint32_t value)
00540 {
00541   uint32_t result;
00542
00543   __ASM volatile ("rev %0, %1" : "=r" (result) : "r" (value) );
00544   return(result);
00545 }
00546
00547
00555 __attribute__( ( always_inline ) ) static __INLINE uint32_t __REV16(uint32_t value)
00556 {
00557   uint32_t result;
00558
00559   __ASM volatile ("rev16 %0, %1" : "=r" (result) : "r" (value) );
00560   return(result);
00561 }
00562
00563
00571 __attribute__( ( always_inline ) ) static __INLINE int32_t __REVSH(int32_t value)
00572 {
00573   uint32_t result;
00574
00575   __ASM volatile ("revsh %0, %1" : "=r" (result) : "r" (value) );
00576   return(result);
00577 }
00578
00579
00580 #if       (__CORTEX_M >= 0x03)
00581
00589 __attribute__( ( always_inline ) ) static __INLINE uint32_t __RBIT(uint32_t value)
00590 {
00591   uint32_t result;
00592
00593    __ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) );
00594    return(result);
00595 }
00596
00597
00605 __attribute__( ( always_inline ) ) static __INLINE uint8_t __LDREXB(volatile uint8_t *addr)
00606 {
00607     uint8_t result;
00608
00609    __ASM volatile ("ldrexb %0, [%1]" : "=r" (result) : "r" (addr) );
00610    return(result);
00611 }
00612
00613
00621 __attribute__( ( always_inline ) ) static __INLINE uint16_t __LDREXH(volatile uint16_t *addr)
00622 {
00623     uint16_t result;
00624
00625    __ASM volatile ("ldrexh %0, [%1]" : "=r" (result) : "r" (addr) );
00626    return(result);
00627 }
00628
00629
00637 __attribute__( ( always_inline ) ) static __INLINE uint32_t __LDREXW(volatile uint32_t *addr)
00638 {
00639     uint32_t result;
00640
00641    __ASM volatile ("ldrex %0, [%1]" : "=r" (result) : "r" (addr) );
00642    return(result);
00643 }
00644
00645
00655 __attribute__( ( always_inline ) ) static __INLINE uint32_t __STREXB(uint8_t value, volatile uint8_t *addr)
00656 {
00657    uint32_t result;
00658
00659    __ASM volatile ("strexb %0, %2, [%1]" : "=r" (result) : "r" (addr), "r" (value) );
00660    return(result);
00661 }
00662
00663
00673 __attribute__( ( always_inline ) ) static __INLINE uint32_t __STREXH(uint16_t value, volatile uint16_t *addr)
00674 {
00675    uint32_t result;
00676
00677    __ASM volatile ("strexh %0, %2, [%1]" : "=r" (result) : "r" (addr), "r" (value) );
00678    return(result);
00679 }
00680
00681
00691 __attribute__( ( always_inline ) ) static __INLINE uint32_t __STREXW(uint32_t value, volatile uint32_t *addr)
00692 {
00693    uint32_t result;
00694
00695    __ASM volatile ("strex %0, %2, [%1]" : "=r" (result) : "r" (addr), "r" (value) );
00696    return(result);
00697 }
00698
00699
00705 __attribute__( ( always_inline ) ) static __INLINE void __CLREX(void)
00706 {
00707   __ASM volatile ("clrex");
00708 }
00709
00710
00719 #define __SSAT(ARG1,ARG2) \
00720 ({                          \
00721   uint32_t __RES, __ARG1 = (ARG1); \
00722   __ASM ("ssat %0, %1, %2" : "=r" (__RES) :  "I" (ARG2), "r" (__ARG1) ); \
00723   __RES; \
00724  })
00725
00726
00735 #define __USAT(ARG1,ARG2) \
00736 ({                          \
00737   uint32_t __RES, __ARG1 = (ARG1); \
00738   __ASM ("usat %0, %1, %2" : "=r" (__RES) :  "I" (ARG2), "r" (__ARG1) ); \
00739   __RES; \
00740  })
00741
00742
00750 __attribute__( ( always_inline ) ) static __INLINE uint8_t __CLZ(uint32_t value)
00751 {
00752   uint8_t result;
00753
00754   __ASM volatile ("clz %0, %1" : "=r" (result) : "r" (value) );
00755   return(result);
00756 }
00757
00758 #endif /* (__CORTEX_M >= 0x03) */
00759
00760
00761
00762
00763 #elif (defined (__TASKING__)) /*--------------- TASKING Compiler -----------------*/
00764 /* TASKING carm specific functions */
00765
00766 /*
00767  * The CMSIS functions have been implemented as intrinsics in the compiler.
00768  * Please use "carm -?i" to get an up to date list of all instrinsics,
00769  * Including the CMSIS ones.
00770  */
00771
00772 #endif
00773  /* end of group CMSIS_Core_InstructionInterface */
00775
00776 #endif /* __CORE_CMINSTR_H__ */
Generated on Tue Jun 7 14:58:54 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/EmacRaw/crc32.c Source File

C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/EmacRaw/crc32.c

Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          crc32.c                                 2006-09-01
00003 */
00025 #include "lpc17xx_emac.h"                        /* LPC23xx/24xx definitions */
00026 #include "crc32.h"
00027
00028 /******************************************************************************
00029 ** Function name:               CRC_init
00030 **
00031 ** Descriptions:                Begin CRC calculation.
00032 **
00033 ** parameters:                  pointer to the CRC area.
00034 ** Returned value:              None
00035 **
00036 ******************************************************************************/
00037 void crc32_init(uint32_t *pCRC)
00038 {
00039     *pCRC = 0xffffffff;
00040 }
00041
00042 /******************************************************************************
00043 ** Function name:               CRC32_add
00044 **
00045 ** Descriptions:                Calculate CRC value one at a time
00046 **
00047 ** parameters:                  pointer to the CRC area, and passing value to get the CRC
00048 ** Returned value:              None
00049 **
00050 ******************************************************************************/
00051 void crc32_add(uint32_t *pCRC, uint8_t val8)
00052 {
00053     uint32_t i, poly;
00054     uint32_t entry;
00055     uint32_t crc_in;
00056     uint32_t crc_out;
00057
00058     crc_in = *pCRC;
00059     poly = 0xEDB88320L;
00060     entry = (crc_in ^ ((uint32_t) val8)) & 0xFF;
00061     for (i = 0; i < 8; i++)
00062     {
00063         if (entry & 1)
00064             entry = (entry >> 1) ^ poly;
00065         else
00066             entry >>= 1;
00067     }
00068     crc_out = ((crc_in>>8) & 0x00FFFFFF) ^ entry;
00069     *pCRC = crc_out;
00070     return;
00071 }
00072
00073 /******************************************************************************
00074 ** Function name:               CRC32_end
00075 **
00076 ** Descriptions:                Finish CRC calculation
00077 **
00078 ** parameters:                  pointer to the CRC area.
00079 ** Returned value:              None
00080 **
00081 ******************************************************************************/
00082 void crc32_end(uint32_t *pCRC)
00083 {
00084     *pCRC ^= 0xffffffff;
00085 }
00086
00087 /******************************************************************************
00088 ** Function name:               CRC32_bfr
00089 **
00090 ** Descriptions:                Get the CRC value based on size of the string.
00091 **
00092 ** parameters:                  Pointer to the string, size of the string.
00093 ** Returned value:              CRC value
00094 **
00095 ******************************************************************************/
00096 uint32_t crc32_bfr(void *pBfr, uint32_t size)
00097 {
00098     uint32_t crc32;
00099     uint8_t  *pu8;
00100
00101     crc32_init(&crc32);
00102     pu8 = (uint8_t *) pBfr;
00103     while (size-- != 0)
00104     {
00105         crc32_add(&crc32, *pu8);
00106         pu8++ ;
00107     }
00108     crc32_end(&crc32);
00109     return ( crc32 );
00110 }
00111
00112 /*********************************************************************************
00113 **                            End Of File
00114 *********************************************************************************/
Generated on Tue Jun 7 14:58:59 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/EmacRaw/crc32.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/EmacRaw/crc32.h

Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          crc32.h                                 2006-09-01
00003 */
00025 #ifndef __CRC32_H
00026 #define __CRC32_H
00027
00028 #include "lpc_types.h"
00029
00030 void   crc32_init(uint32_t *pCRC);
00031 void   crc32_add(uint32_t *pCRC, uint8_t val8);
00032 void   crc32_end(uint32_t *pCRC);
00033 uint32_t  crc32_bfr(void *pBfr, uint32_t size);
00034 uint32_t do_crc_behav( long long Addr );
00035
00036 #endif
00037
00038 /*-----------------------------------------------------------*/
Generated on Tue Jun 7 14:58:59 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/DAC/DMA/dac_dma.c Source File

C:/nxpdrv/LPC1700CMSIS/Examples/DAC/DMA/dac_dma.c

Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          dac_dma.c                               2010-05-21
00003 */
00026 #include "lpc17xx_dac.h"
00027 #include "lpc17xx_libcfg.h"
00028 #include "lpc17xx_pinsel.h"
00029 #include "lpc17xx_gpdma.h"
00030
00031 /* Example group ----------------------------------------------------------- */
00037 /************************** PRIVATE MACROS *************************/
00039 #define DMA_SIZE                1
00040
00041 /************************** PRIVATE VARIABLES *************************/
00042 // Terminal Counter flag for Channel 0
00043 __IO uint32_t Channel0_TC;
00044
00045 // Error Counter flag for Channel 0
00046 __IO uint32_t Channel0_Err;
00047
00048 GPDMA_Channel_CFG_Type GPDMACfg;
00049
00050 /************************** PRIVATE FUNCTION *************************/
00051 void DMA_IRQHandler (void);
00052
00053
00054 /*----------------- INTERRUPT SERVICE ROUTINES --------------------------*/
00055 /*********************************************************************/
00060 void DMA_IRQHandler (void)
00061 {
00062         // check GPDMA interrupt on channel 0
00063         if (GPDMA_IntGetStatus(GPDMA_STAT_INT, 0)){
00064                 // Check counter terminal status
00065                 if(GPDMA_IntGetStatus(GPDMA_STAT_INTTC, 0)){
00066                         GPDMA_ClearIntPending (GPDMA_STATCLR_INTTC, 0);
00067                         Channel0_TC++;
00068                 }
00069                 // Check error terminal status
00070                 if (GPDMA_IntGetStatus(GPDMA_STAT_INTERR, 0)){
00071                         GPDMA_ClearIntPending (GPDMA_STATCLR_INTERR, 0);
00072                         Channel0_Err++;
00073                 }
00074         }
00075 }
00076
00077
00078 /*-------------------------MAIN FUNCTION------------------------------*/
00079 /*********************************************************************/
00084 int c_entry(void)
00085 {
00086         PINSEL_CFG_Type PinCfg;
00087         DAC_CONVERTER_CFG_Type DAC_ConverterConfigStruct;
00088         uint32_t dac_value =0;
00089         uint32_t i;
00090         /*
00091          * Init DAC pin connect
00092          * AOUT on P0.26
00093          */
00094         PinCfg.Funcnum = 2;
00095         PinCfg.OpenDrain = 0;
00096         PinCfg.Pinmode = 0;
00097         PinCfg.Pinnum = 26;
00098         PinCfg.Portnum = 0;
00099         PINSEL_ConfigPin(&PinCfg);
00100
00101         /* GPDMA block section -------------------------------------------- */
00102
00103         /* Disable GPDMA interrupt */
00104         NVIC_DisableIRQ(DMA_IRQn);
00105
00106         /* preemption = 1, sub-priority = 1 */
00107         NVIC_SetPriority(DMA_IRQn, ((0x01<<3)|0x01));
00108
00109         DAC_ConverterConfigStruct.CNT_ENA =SET;
00110         DAC_ConverterConfigStruct.DMA_ENA = SET;
00111         DAC_Init(LPC_DAC);
00112         /* set time out for DAC*/
00113         DAC_SetDMATimeOut(LPC_DAC,0xFFFF);
00114         DAC_ConfigDAConverterControl(LPC_DAC, &DAC_ConverterConfigStruct);
00115
00116         /* Initialize GPDMA controller */
00117         GPDMA_Init();
00118
00119         // Setup GPDMA channel --------------------------------
00120         // channel 0
00121         GPDMACfg.ChannelNum = 0;
00122         // Source memory
00123         GPDMACfg.SrcMemAddr = (uint32_t)(&dac_value);
00124         // Destination memory - unused
00125         GPDMACfg.DstMemAddr = 0;
00126         // Transfer size
00127         GPDMACfg.TransferSize = DMA_SIZE;
00128         // Transfer width - unused
00129         GPDMACfg.TransferWidth = 0;
00130         // Transfer type
00131         GPDMACfg.TransferType = GPDMA_TRANSFERTYPE_M2P;
00132         // Source connection - unused
00133         GPDMACfg.SrcConn = 0;
00134         // Destination connection
00135         GPDMACfg.DstConn = GPDMA_CONN_DAC;
00136         // Linker List Item - unused
00137         GPDMACfg.DMALLI = 0;
00138         // Setup channel with given parameter
00139         GPDMA_Setup(&GPDMACfg);
00140
00141         /* Reset terminal counter */
00142         Channel0_TC = 0;
00143         /* Reset Error counter */
00144         Channel0_Err = 0;
00145
00146         /* Enable GPDMA interrupt */
00147         NVIC_EnableIRQ(DMA_IRQn);
00148
00149         /* Wait for GPDMA processing complete */
00150         while (1) {
00151
00152                 // Enable GPDMA channel 0
00153                 GPDMA_ChannelCmd(0, ENABLE);
00154
00155                 while ((Channel0_TC == 0) );
00156
00157                 // Disable GPDMA channel 0
00158                 GPDMA_ChannelCmd(0, DISABLE);
00159
00160                 dac_value ++;
00161                 if (dac_value == 0x3FF) dac_value =0;
00162                 //delay
00163                 for(i=0;i<100000;i++);
00164
00165                 /* Reset terminal counter */
00166                 Channel0_TC = 0;
00167
00168                 // Re-setup channel
00169                 GPDMA_Setup(&GPDMACfg);
00170         }
00171
00172         return 1;
00173 }
00174 /* With ARM and GHS toolsets, the entry point is main() - this will
00175    allow the linker to generate wrapper code to setup stacks, allocate
00176    heap area, and initialize and copy code and data segments. For GNU
00177    toolsets, the entry point is through __start() in the crt0_gnu.asm
00178    file, and that startup code will setup stacks and data */
00179 int main(void)
00180 {
00181     return c_entry();
00182 }
00183
00184 #ifdef  DEBUG
00185 /*******************************************************************************
00186 * @brief                Reports the name of the source file and the source line number
00187 *                               where the CHECK_PARAM error has occurred.
00188 * @param[in]    file Pointer to the source file name
00189 * @param[in]    line assert_param error line source number
00190 * @return               None
00191 *******************************************************************************/
00192 void check_failed(uint8_t *file, uint32_t line)
00193 {
00194         /* User can add his own implementation to report the file name and line number,
00195          ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
00196
00197         /* Infinite loop */
00198         while(1);
00199 }
00200 #endif
00201
00202 /*
00203  * @}
00204  */
Generated on Tue Jun 7 14:58:59 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/DAC/SineWave/dac_sinewave_test.c Source File

C:/nxpdrv/LPC1700CMSIS/Examples/DAC/SineWave/dac_sinewave_test.c

Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          dac_sinewave_test.c                             2010-06-04
00003 */
00026 #include "lpc17xx_dac.h"
00027 #include "lpc17xx_libcfg.h"
00028 #include "lpc17xx_pinsel.h"
00029 #include "lpc17xx_gpdma.h"
00030
00031 /* Example group ----------------------------------------------------------- */
00037 /************************** PRIVATE MACROS *************************/
00039 #define DMA_SIZE                60
00040 #define NUM_SINE_SAMPLE 60
00041 #define SINE_FREQ_IN_HZ 60
00042 #define PCLK_DAC_IN_MHZ 25 //CCLK divided by 4
00043
00044 /************************** PRIVATE VARIABLES *************************/
00045 GPDMA_Channel_CFG_Type GPDMACfg;
00046
00047 /*-------------------------MAIN FUNCTION------------------------------*/
00048 /*********************************************************************/
00053 int c_entry(void)
00054 {
00055         PINSEL_CFG_Type PinCfg;
00056         DAC_CONVERTER_CFG_Type DAC_ConverterConfigStruct;
00057         GPDMA_LLI_Type DMA_LLI_Struct;
00058         uint32_t tmp;
00059         uint32_t i;
00060         uint32_t sin_0_to_90_16_samples[16]={\
00061                         0,1045,2079,3090,4067,\
00062                         5000,5877,6691,7431,8090,\
00063                         8660,9135,9510,9781,9945,10000\
00064         };
00065         uint32_t dac_sine_lut[NUM_SINE_SAMPLE];
00066         /*
00067          * Init DAC pin connect
00068          * AOUT on P0.26
00069          */
00070         PinCfg.Funcnum = 2;
00071         PinCfg.OpenDrain = 0;
00072         PinCfg.Pinmode = 0;
00073         PinCfg.Pinnum = 26;
00074         PinCfg.Portnum = 0;
00075         PINSEL_ConfigPin(&PinCfg);
00076
00077         //Prepare DAC sine look up table
00078         for(i=0;i<NUM_SINE_SAMPLE;i++)
00079         {
00080                 if(i<=15)
00081                 {
00082                         dac_sine_lut[i] = 512 + 512*sin_0_to_90_16_samples[i]/10000;
00083                         if(i==15) dac_sine_lut[i]= 1023;
00084                 }
00085                 else if(i<=30)
00086                 {
00087                         dac_sine_lut[i] = 512 + 512*sin_0_to_90_16_samples[30-i]/10000;
00088                 }
00089                 else if(i<=45)
00090                 {
00091                         dac_sine_lut[i] = 512 - 512*sin_0_to_90_16_samples[i-30]/10000;
00092                 }
00093                 else
00094                 {
00095                         dac_sine_lut[i] = 512 - 512*sin_0_to_90_16_samples[60-i]/10000;
00096                 }
00097                 dac_sine_lut[i] = (dac_sine_lut[i]<<6);
00098         }
00099         //Prepare DMA link list item structure
00100         DMA_LLI_Struct.SrcAddr= (uint32_t)dac_sine_lut;
00101         DMA_LLI_Struct.DstAddr= (uint32_t)&(LPC_DAC->DACR);
00102         DMA_LLI_Struct.NextLLI= (uint32_t)&DMA_LLI_Struct;
00103         DMA_LLI_Struct.Control= DMA_SIZE
00104                                                         | (2<<18) //source width 32 bit
00105                                                         | (2<<21) //dest. width 32 bit
00106                                                         | (1<<26) //source increment
00107                                                         ;
00108
00109         /* GPDMA block section -------------------------------------------- */
00110         /* Initialize GPDMA controller */
00111         GPDMA_Init();
00112
00113         // Setup GPDMA channel --------------------------------
00114         // channel 0
00115         GPDMACfg.ChannelNum = 0;
00116         // Source memory
00117         GPDMACfg.SrcMemAddr = (uint32_t)(dac_sine_lut);
00118         // Destination memory - unused
00119         GPDMACfg.DstMemAddr = 0;
00120         // Transfer size
00121         GPDMACfg.TransferSize = DMA_SIZE;
00122         // Transfer width - unused
00123         GPDMACfg.TransferWidth = 0;
00124         // Transfer type
00125         GPDMACfg.TransferType = GPDMA_TRANSFERTYPE_M2P;
00126         // Source connection - unused
00127         GPDMACfg.SrcConn = 0;
00128         // Destination connection
00129         GPDMACfg.DstConn = GPDMA_CONN_DAC;
00130         // Linker List Item - unused
00131         GPDMACfg.DMALLI = (uint32_t)&DMA_LLI_Struct;
00132         // Setup channel with given parameter
00133         GPDMA_Setup(&GPDMACfg);
00134
00135         DAC_ConverterConfigStruct.CNT_ENA =SET;
00136         DAC_ConverterConfigStruct.DMA_ENA = SET;
00137         DAC_Init(LPC_DAC);
00138         /* set time out for DAC*/
00139         tmp = (PCLK_DAC_IN_MHZ*1000000)/(SINE_FREQ_IN_HZ*NUM_SINE_SAMPLE);
00140         DAC_SetDMATimeOut(LPC_DAC,tmp);
00141         DAC_ConfigDAConverterControl(LPC_DAC, &DAC_ConverterConfigStruct);
00142
00143         // Enable GPDMA channel 0
00144         GPDMA_ChannelCmd(0, ENABLE);
00145
00146         while (1);
00147
00148         return 1;
00149 }
00150 /* With ARM and GHS toolsets, the entry point is main() - this will
00151    allow the linker to generate wrapper code to setup stacks, allocate
00152    heap area, and initialize and copy code and data segments. For GNU
00153    toolsets, the entry point is through __start() in the crt0_gnu.asm
00154    file, and that startup code will setup stacks and data */
00155 int main(void)
00156 {
00157     return c_entry();
00158 }
00159
00160 #ifdef  DEBUG
00161 /*******************************************************************************
00162 * @brief                Reports the name of the source file and the source line number
00163 *                               where the CHECK_PARAM error has occurred.
00164 * @param[in]    file Pointer to the source file name
00165 * @param[in]    line assert_param error line source number
00166 * @return               None
00167 *******************************************************************************/
00168 void check_failed(uint8_t *file, uint32_t line)
00169 {
00170         /* User can add his own implementation to report the file name and line number,
00171          ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
00172
00173         /* Infinite loop */
00174         while(1);
00175 }
00176 #endif
00177 /*
00178  * @}
00179  */
Generated on Tue Jun 7 14:58:59 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/DAC/Speaker/dac_speaker.c Source File

C:/nxpdrv/LPC1700CMSIS/Examples/DAC/Speaker/dac_speaker.c

Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          dac_speaker.c                           2010-05-21
00003 */
00025 #include "lpc17xx_dac.h"
00026 #include "lpc17xx_libcfg.h"
00027 #include "lpc17xx_pinsel.h"
00028 #include "debug_frmwrk.h"
00029
00030 /* Example group ----------------------------------------------------------- */
00036 /*-------------------------MAIN FUNCTION------------------------------*/
00037 /*********************************************************************/
00042 int c_entry(void)
00043 {
00044         PINSEL_CFG_Type PinCfg;
00045         uint32_t time;
00046         float rate =0;
00047
00048         /*
00049          * Init DAC pin connect
00050          * AOUT on P0.26
00051          */
00052         PinCfg.Funcnum = 2;
00053         PinCfg.OpenDrain = 0;
00054         PinCfg.Pinmode = 0;
00055         PinCfg.Pinnum = 26;
00056         PinCfg.Portnum = 0;
00057         PINSEL_ConfigPin(&PinCfg);
00058
00059         /* init DAC structure to default
00060          * Maximum      current is 700 uA
00061          * First value to AOUT is 0
00062          */
00063         DAC_Init(LPC_DAC);
00064
00065         // main loop
00066         while (1)
00067         {
00068                 for(time = 1; time < 0x3FF; time++)
00069                 {
00070                         DAC_UpdateValue ( LPC_DAC,(uint32_t)(time*rate));
00071                 }
00072
00073                 rate += 0.001;
00074
00075                 if(rate >= 1)
00076                 {
00077                         rate = 0;
00078                 }
00079         }
00080
00081         return 1;
00082 }
00083 /* With ARM and GHS toolsets, the entry point is main() - this will
00084    allow the linker to generate wrapper code to setup stacks, allocate
00085    heap area, and initialize and copy code and data segments. For GNU
00086    toolsets, the entry point is through __start() in the crt0_gnu.asm
00087    file, and that startup code will setup stacks and data */
00088 int main(void)
00089 {
00090     return c_entry();
00091 }
00092
00093 #ifdef  DEBUG
00094 /*******************************************************************************
00095 * @brief                Reports the name of the source file and the source line number
00096 *                               where the CHECK_PARAM error has occurred.
00097 * @param[in]    file Pointer to the source file name
00098 * @param[in]    line assert_param error line source number
00099 * @return               None
00100 *******************************************************************************/
00101 void check_failed(uint8_t *file, uint32_t line)
00102 {
00103         /* User can add his own implementation to report the file name and line number,
00104          ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
00105
00106         /* Infinite loop */
00107         while(1);
00108 }
00109 #endif
00110
00111 /*
00112  * @}
00113  */
Generated on Tue Jun 7 14:58:59 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/DAC/WaveGenerate/dac_wave_generate.c Source File

C:/nxpdrv/LPC1700CMSIS/Examples/DAC/WaveGenerate/dac_wave_generate.c

Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          dac_wave_generate.c                             2010-07-16
00003 */
00026 #include "lpc17xx_dac.h"
00027 #include "lpc17xx_libcfg.h"
00028 #include "lpc17xx_pinsel.h"
00029 #include "lpc17xx_gpdma.h"
00030 #include "debug_frmwrk.h"
00031
00032 /* Example group ----------------------------------------------------------- */
00038 /************************** PRIVATE MACROS *************************/
00040 #define DMA_SIZE_SINE           60
00041 #define NUM_SAMPLE_SINE         60
00042 #define DMA_SIZE                        64
00043 #define NUM_SAMPLE                      64
00044
00045 #define SIGNAL_FREQ_IN_HZ       60
00046 #define PCLK_DAC_IN_MHZ 25 //CCLK divided by 4
00047
00048 #define DAC_GENERATE_SINE               1
00049 #define DAC_GENERATE_TRIANGLE   2
00050 #define DAC_GENERATE_ESCALATOR  3
00051 #define DAC_GENERATE_NONE               0
00052
00053 /************************** PRIVATE VARIABLES *************************/
00054 uint8_t menu1[] =
00055 "********************************************************************************\n\r"
00056 "Hello NXP Semiconductors \n\r"
00057 " DAC generate signals demo \n\r"
00058 "\t - MCU: LPC17xx \n\r"
00059 "\t - Core: ARM Cortex-M3 \n\r"
00060 "\t - Communicate via: UART0 - 115200 kbps \n\r"
00061 " Use DAC to generate sine, triangle, escalator wave, frequency adjustable\n\r"
00062 " Signal samples are transmitted to DAC by DMA memory to peripheral\n\r"
00063 "********************************************************************************\n\r";
00064
00065 /************************** PRIVATE FUNCTION *************************/
00066 void print_menu(void);
00067
00068 /*-------------------------PRIVATE FUNCTIONS------------------------------*/
00069 /*********************************************************************/
00074 void print_menu(void)
00075 {
00076         _DBG(menu1);
00077 }
00078
00079 /*-------------------------MAIN FUNCTION------------------------------*/
00080 /*********************************************************************/
00085 int c_entry(void)
00086 {
00087         PINSEL_CFG_Type PinCfg;
00088         DAC_CONVERTER_CFG_Type DAC_ConverterConfigStruct;
00089         GPDMA_Channel_CFG_Type GPDMACfg;
00090         GPDMA_LLI_Type DMA_LLI_Struct;
00091         uint32_t tmp;
00092         uint8_t i,option;
00093         uint32_t sin_0_to_90_16_samples[16]={\
00094                         0,1045,2079,3090,4067,\
00095                         5000,5877,6691,7431,8090,\
00096                         8660,9135,9510,9781,9945,10000\
00097         };
00098         uint32_t dac_lut[NUM_SAMPLE];
00099
00100         /*
00101          * Init DAC pin connect
00102          * AOUT on P0.26
00103          */
00104         PinCfg.Funcnum = 2;
00105         PinCfg.OpenDrain = 0;
00106         PinCfg.Pinmode = 0;
00107         PinCfg.Pinnum = 26;
00108         PinCfg.Portnum = 0;
00109         PINSEL_ConfigPin(&PinCfg);
00110
00111         /* Initialize debug via UART0
00112          * – 115200bps
00113          * – 8 data bit
00114          * – No parity
00115          * – 1 stop bit
00116          * – No flow control
00117          */
00118         debug_frmwrk_init();
00119
00120         // print welcome screen
00121         print_menu();
00122
00123         while(1)
00124         {
00125                 //Select option
00126                 _DBG("Please choose signal type:\n\r");
00127                 _DBG("\t1) Sine wave.\n\r");
00128                 _DBG("\t2) Triangle wave.\n\r");
00129                 _DBG("\t3) Escalator wave.\n\r");
00130                 option = DAC_GENERATE_NONE;
00131                 while(option == DAC_GENERATE_NONE)
00132                 {
00133                         switch(_DG)
00134                         {
00135                         case '1': option = DAC_GENERATE_SINE; break;
00136                         case '2': option = DAC_GENERATE_TRIANGLE; break;
00137                         case '3': option = DAC_GENERATE_ESCALATOR; break;
00138                         default:
00139                                 _DBG("Wrong choice! Please select 1 or 2 or 3 only!\n\r");
00140                                 option = DAC_GENERATE_NONE;
00141                                 break;
00142                         }
00143                 }
00144
00145                 //Prepare DAC look up table
00146                 switch(option)
00147                 {
00148                 case DAC_GENERATE_SINE:
00149                         for(i=0;i<NUM_SAMPLE_SINE;i++)
00150                         {
00151                                 if(i<=15)
00152                                 {
00153                                         dac_lut[i] = 512 + 512*sin_0_to_90_16_samples[i]/10000;
00154                                         if(i==15) dac_lut[i]= 1023;
00155                                 }
00156                                 else if(i<=30)
00157                                 {
00158                                         dac_lut[i] = 512 + 512*sin_0_to_90_16_samples[30-i]/10000;
00159                                 }
00160                                 else if(i<=45)
00161                                 {
00162                                         dac_lut[i] = 512 - 512*sin_0_to_90_16_samples[i-30]/10000;
00163                                 }
00164                                 else
00165                                 {
00166                                         dac_lut[i] = 512 - 512*sin_0_to_90_16_samples[60-i]/10000;
00167                                 }
00168                                 dac_lut[i] = (dac_lut[i]<<6);
00169                         }
00170                         break;
00171                 case DAC_GENERATE_TRIANGLE:
00172                         for(i=0;i<NUM_SAMPLE;i++)
00173                         {
00174                                 if(i<32) dac_lut[i]= 32*i;
00175                                 else if (i==32) dac_lut[i]= 1023;
00176                                 else dac_lut[i] = 32*(NUM_SAMPLE-i);
00177                                 dac_lut[i] = (dac_lut[i]<<6);
00178                         }
00179                         break;
00180                 case DAC_GENERATE_ESCALATOR:
00181                         for(i=0;i<NUM_SAMPLE;i++)
00182                         {
00183                                 dac_lut[i] = (1023/3)*(i/16);
00184                                 dac_lut[i] = (dac_lut[i]<<6);
00185                         }
00186                         break;
00187                 default: break;
00188                 }
00189
00190                 //Prepare DMA link list item structure
00191                 DMA_LLI_Struct.SrcAddr= (uint32_t)dac_lut;
00192                 DMA_LLI_Struct.DstAddr= (uint32_t)&(LPC_DAC->DACR);
00193                 DMA_LLI_Struct.NextLLI= (uint32_t)&DMA_LLI_Struct;
00194                 DMA_LLI_Struct.Control= ((option==DAC_GENERATE_SINE)?DMA_SIZE_SINE:DMA_SIZE)
00195                                                                 | (2<<18) //source width 32 bit
00196                                                                 | (2<<21) //dest. width 32 bit
00197                                                                 | (1<<26) //source increment
00198                                                                 ;
00199
00200
00201                 /* GPDMA block section -------------------------------------------- */
00202                 /* Initialize GPDMA controller */
00203                 GPDMA_Init();
00204
00205                 // Setup GPDMA channel --------------------------------
00206                 // channel 0
00207                 GPDMACfg.ChannelNum = 0;
00208                 // Source memory
00209                 GPDMACfg.SrcMemAddr = (uint32_t)(dac_lut);
00210                 // Destination memory - unused
00211                 GPDMACfg.DstMemAddr = 0;
00212                 // Transfer size
00213                 GPDMACfg.TransferSize = ((option==DAC_GENERATE_SINE)?DMA_SIZE_SINE:DMA_SIZE);
00214                 // Transfer width - unused
00215                 GPDMACfg.TransferWidth = 0;
00216                 // Transfer type
00217                 GPDMACfg.TransferType = GPDMA_TRANSFERTYPE_M2P;
00218                 // Source connection - unused
00219                 GPDMACfg.SrcConn = 0;
00220                 // Destination connection
00221                 GPDMACfg.DstConn = GPDMA_CONN_DAC;
00222                 // Linker List Item - unused
00223                 GPDMACfg.DMALLI = (uint32_t)&DMA_LLI_Struct;
00224                 // Setup channel with given parameter
00225                 GPDMA_Setup(&GPDMACfg);
00226
00227                 DAC_ConverterConfigStruct.CNT_ENA =SET;
00228                 DAC_ConverterConfigStruct.DMA_ENA = SET;
00229                 DAC_Init(LPC_DAC);
00230                 /* set time out for DAC*/
00231                 tmp = (PCLK_DAC_IN_MHZ*1000000)/(SIGNAL_FREQ_IN_HZ*((option==DAC_GENERATE_SINE)?NUM_SAMPLE_SINE:NUM_SAMPLE));
00232                 DAC_SetDMATimeOut(LPC_DAC,tmp);
00233                 DAC_ConfigDAConverterControl(LPC_DAC, &DAC_ConverterConfigStruct);
00234
00235                 //Start the demo
00236                 switch(option)
00237                 {
00238                 case DAC_GENERATE_SINE:
00239                         _DBG("\n\rDAC is generating 60Hz sine wave...");
00240                         break;
00241                 case DAC_GENERATE_TRIANGLE:
00242                         _DBG("\n\rDAC is generating 60Hz triangle wave...");
00243                         break;
00244                 case DAC_GENERATE_ESCALATOR:
00245                         _DBG("\n\rDAC is generating 60Hz escalator wave...");
00246                         break;
00247                 default: break;
00248                 }
00249
00250                 // Enable GPDMA channel 0
00251                 GPDMA_ChannelCmd(0, ENABLE);
00252
00253                 _DBG_("\n\rPreass ESC if you want to terminate!");
00254                 while(_DG!=27);
00255
00256                 // Disable GPDMA channel 0
00257                 GPDMA_ChannelCmd(0, DISABLE);
00258
00259         }
00260         return 1;
00261 }
00262 /* With ARM and GHS toolsets, the entry point is main() - this will
00263    allow the linker to generate wrapper code to setup stacks, allocate
00264    heap area, and initialize and copy code and data segments. For GNU
00265    toolsets, the entry point is through __start() in the crt0_gnu.asm
00266    file, and that startup code will setup stacks and data */
00267 int main(void)
00268 {
00269     return c_entry();
00270 }
00271
00272 #ifdef  DEBUG
00273 /*******************************************************************************
00274 * @brief                Reports the name of the source file and the source line number
00275 *                               where the CHECK_PARAM error has occurred.
00276 * @param[in]    file Pointer to the source file name
00277 * @param[in]    line assert_param error line source number
00278 * @return               None
00279 *******************************************************************************/
00280 void check_failed(uint8_t *file, uint32_t line)
00281 {
00282         /* User can add his own implementation to report the file name and line number,
00283          ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
00284
00285         /* Infinite loop */
00286         while(1);
00287 }
00288 #endif
00289 /*
00290  * @}
00291  */
Generated on Tue Jun 7 14:58:59 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Drivers/source/debug_frmwrk.c Source File

C:/nxpdrv/LPC1700CMSIS/Drivers/source/debug_frmwrk.c

Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          debug_frmwrk.c                          2010-05-21
00003 */
00026 #include "debug_frmwrk.h"
00027 #include "lpc17xx_pinsel.h"
00028
00029 /* If this source file built with example, the LPC17xx FW library configuration
00030  * file in each example directory ("lpc17xx_libcfg.h") must be included,
00031  * otherwise the default FW library configuration file must be included instead
00032  */
00033 #ifdef __BUILD_WITH_EXAMPLE__
00034 #include "lpc17xx_libcfg.h"
00035 #else
00036 #include "lpc17xx_libcfg_default.h"
00037 #endif /* __BUILD_WITH_EXAMPLE__ */
00038
00039 #ifdef _DBGFWK
00040 /* Debug framework */
00041
00042 void (*_db_msg)(LPC_UART_TypeDef *UARTx, const void *s);
00043 void (*_db_msg_)(LPC_UART_TypeDef *UARTx, const void *s);
00044 void (*_db_char)(LPC_UART_TypeDef *UARTx, uint8_t ch);
00045 void (*_db_dec)(LPC_UART_TypeDef *UARTx, uint8_t decn);
00046 void (*_db_dec_16)(LPC_UART_TypeDef *UARTx, uint16_t decn);
00047 void (*_db_dec_32)(LPC_UART_TypeDef *UARTx, uint32_t decn);
00048 void (*_db_hex)(LPC_UART_TypeDef *UARTx, uint8_t hexn);
00049 void (*_db_hex_16)(LPC_UART_TypeDef *UARTx, uint16_t hexn);
00050 void (*_db_hex_32)(LPC_UART_TypeDef *UARTx, uint32_t hexn);
00051 uint8_t (*_db_get_char)(LPC_UART_TypeDef *UARTx);
00052
00053
00054 /*********************************************************************/
00060 void UARTPutChar (LPC_UART_TypeDef *UARTx, uint8_t ch)
00061 {
00062         UART_Send(UARTx, &ch, 1, BLOCKING);
00063 }
00064
00065
00066 /*********************************************************************/
00071 uint8_t UARTGetChar (LPC_UART_TypeDef *UARTx)
00072 {
00073         uint8_t tmp = 0;
00074         UART_Receive(UARTx, &tmp, 1, BLOCKING);
00075         return(tmp);
00076 }
00077
00078
00079 /*********************************************************************/
00085 void UARTPuts(LPC_UART_TypeDef *UARTx, const void *str)
00086 {
00087         uint8_t *s = (uint8_t *) str;
00088
00089         while (*s)
00090         {
00091                 UARTPutChar(UARTx, *s++);
00092         }
00093 }
00094
00095
00096 /*********************************************************************/
00102 void UARTPuts_(LPC_UART_TypeDef *UARTx, const void *str)
00103 {
00104         UARTPuts (UARTx, str);
00105         UARTPuts (UARTx, "\n\r");
00106 }
00107
00108
00109 /*********************************************************************/
00115 void UARTPutDec(LPC_UART_TypeDef *UARTx, uint8_t decnum)
00116 {
00117         uint8_t c1=decnum%10;
00118         uint8_t c2=(decnum/10)%10;
00119         uint8_t c3=(decnum/100)%10;
00120         UARTPutChar(UARTx, '0'+c3);
00121         UARTPutChar(UARTx, '0'+c2);
00122         UARTPutChar(UARTx, '0'+c1);
00123 }
00124
00125 /*********************************************************************/
00131 void UARTPutDec16(LPC_UART_TypeDef *UARTx, uint16_t decnum)
00132 {
00133         uint8_t c1=decnum%10;
00134         uint8_t c2=(decnum/10)%10;
00135         uint8_t c3=(decnum/100)%10;
00136         uint8_t c4=(decnum/1000)%10;
00137         uint8_t c5=(decnum/10000)%10;
00138         UARTPutChar(UARTx, '0'+c5);
00139         UARTPutChar(UARTx, '0'+c4);
00140         UARTPutChar(UARTx, '0'+c3);
00141         UARTPutChar(UARTx, '0'+c2);
00142         UARTPutChar(UARTx, '0'+c1);
00143 }
00144
00145 /*********************************************************************/
00151 void UARTPutDec32(LPC_UART_TypeDef *UARTx, uint32_t decnum)
00152 {
00153         uint8_t c1=decnum%10;
00154         uint8_t c2=(decnum/10)%10;
00155         uint8_t c3=(decnum/100)%10;
00156         uint8_t c4=(decnum/1000)%10;
00157         uint8_t c5=(decnum/10000)%10;
00158         uint8_t c6=(decnum/100000)%10;
00159         uint8_t c7=(decnum/1000000)%10;
00160         uint8_t c8=(decnum/10000000)%10;
00161         uint8_t c9=(decnum/100000000)%10;
00162         uint8_t c10=(decnum/1000000000)%10;
00163         UARTPutChar(UARTx, '0'+c10);
00164         UARTPutChar(UARTx, '0'+c9);
00165         UARTPutChar(UARTx, '0'+c8);
00166         UARTPutChar(UARTx, '0'+c7);
00167         UARTPutChar(UARTx, '0'+c6);
00168         UARTPutChar(UARTx, '0'+c5);
00169         UARTPutChar(UARTx, '0'+c4);
00170         UARTPutChar(UARTx, '0'+c3);
00171         UARTPutChar(UARTx, '0'+c2);
00172         UARTPutChar(UARTx, '0'+c1);
00173 }
00174
00175 /*********************************************************************/
00181 void UARTPutHex (LPC_UART_TypeDef *UARTx, uint8_t hexnum)
00182 {
00183         uint8_t nibble, i;
00184
00185         UARTPuts(UARTx, "0x");
00186         i = 1;
00187         do {
00188                 nibble = (hexnum >> (4*i)) & 0x0F;
00189                 UARTPutChar(UARTx, (nibble > 9) ? ('A' + nibble - 10) : ('0' + nibble));
00190         } while (i--);
00191 }
00192
00193
00194 /*********************************************************************/
00200 void UARTPutHex16 (LPC_UART_TypeDef *UARTx, uint16_t hexnum)
00201 {
00202         uint8_t nibble, i;
00203
00204         UARTPuts(UARTx, "0x");
00205         i = 3;
00206         do {
00207                 nibble = (hexnum >> (4*i)) & 0x0F;
00208                 UARTPutChar(UARTx, (nibble > 9) ? ('A' + nibble - 10) : ('0' + nibble));
00209         } while (i--);
00210 }
00211
00212 /*********************************************************************/
00218 void UARTPutHex32 (LPC_UART_TypeDef *UARTx, uint32_t hexnum)
00219 {
00220         uint8_t nibble, i;
00221
00222         UARTPuts(UARTx, "0x");
00223         i = 7;
00224         do {
00225                 nibble = (hexnum >> (4*i)) & 0x0F;
00226                 UARTPutChar(UARTx, (nibble > 9) ? ('A' + nibble - 10) : ('0' + nibble));
00227         } while (i--);
00228 }
00229
00231 // * @brief             print function that supports format as same as printf()
00232 // *                            function of <stdio.h> library
00233 // * @param[in] None
00234 // * @return            None
00235 // **********************************************************************/
00236 //void  _printf (const  char *format, ...)
00237 //{
00238 //    static  char  buffer[512 + 1];
00239 //            va_list     vArgs;
00240 //            char      *tmp;
00241 //    va_start(vArgs, format);
00242 //    vsprintf((char *)buffer, (char const *)format, vArgs);
00243 //    va_end(vArgs);
00244 //
00245 //    _DBG(buffer);
00246 //}
00247
00248 /*********************************************************************/
00253 void debug_frmwrk_init(void)
00254 {
00255         UART_CFG_Type UARTConfigStruct;
00256         PINSEL_CFG_Type PinCfg;
00257
00258 #if (USED_UART_DEBUG_PORT==0)
00259         /*
00260          * Initialize UART0 pin connect
00261          */
00262         PinCfg.Funcnum = 1;
00263         PinCfg.OpenDrain = 0;
00264         PinCfg.Pinmode = 0;
00265         PinCfg.Pinnum = 2;
00266         PinCfg.Portnum = 0;
00267         PINSEL_ConfigPin(&PinCfg);
00268         PinCfg.Pinnum = 3;
00269         PINSEL_ConfigPin(&PinCfg);
00270 #elif #if (USED_UART_DEBUG_PORT==1)
00271         /*
00272          * Initialize UART1 pin connect
00273          */
00274         PinCfg.Funcnum = 1;
00275         PinCfg.OpenDrain = 0;
00276         PinCfg.Pinmode = 0;
00277         PinCfg.Pinnum = 15;
00278         PinCfg.Portnum = 0;
00279         PINSEL_ConfigPin(&PinCfg);
00280         PinCfg.Pinnum = 16;
00281         PINSEL_ConfigPin(&PinCfg);
00282 #endif
00283
00284         /* Initialize UART Configuration parameter structure to default state:
00285          * Baudrate = 9600bps
00286          * 8 data bit
00287          * 1 Stop bit
00288          * None parity
00289          */
00290         UART_ConfigStructInit(&UARTConfigStruct);
00291         // Re-configure baudrate to 115200bps
00292         UARTConfigStruct.Baud_rate = 115200;
00293
00294         // Initialize DEBUG_UART_PORT peripheral with given to corresponding parameter
00295         UART_Init(DEBUG_UART_PORT, &UARTConfigStruct);
00296
00297         // Enable UART Transmit
00298         UART_TxCmd(DEBUG_UART_PORT, ENABLE);
00299
00300         _db_msg = UARTPuts;
00301         _db_msg_ = UARTPuts_;
00302         _db_char = UARTPutChar;
00303         _db_hex = UARTPutHex;
00304         _db_hex_16 = UARTPutHex16;
00305         _db_hex_32 = UARTPutHex32;
00306         _db_dec = UARTPutDec;
00307         _db_dec_16 = UARTPutDec16;
00308         _db_dec_32 = UARTPutDec32;
00309         _db_get_char = UARTGetChar;
00310 }
00311 #endif /*_DBGFWK */
00312
00313
00314 /* --------------------------------- End Of File ------------------------------ */
Generated on Tue Jun 7 14:58:55 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Drivers/include/debug_frmwrk.h Source File

C:/nxpdrv/LPC1700CMSIS/Drivers/include/debug_frmwrk.h

Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          debug_frmwrk.h          2010-05-21
00003 */
00025 #ifndef DEBUG_FRMWRK_H_
00026 #define DEBUG_FRMWRK_H_
00027
00028 //#include <stdarg.h>
00029 #include "lpc17xx_uart.h"
00030
00031 #define USED_UART_DEBUG_PORT    0
00032
00033 #if (USED_UART_DEBUG_PORT==0)
00034 #define DEBUG_UART_PORT LPC_UART0
00035 #elif (USED_UART_DEBUG_PORT==1)
00036 #define DEBUG_UART_PORT LPC_UART1
00037 #endif
00038
00039 #define _DBG(x)         _db_msg(DEBUG_UART_PORT, x)
00040 #define _DBG_(x)        _db_msg_(DEBUG_UART_PORT, x)
00041 #define _DBC(x)         _db_char(DEBUG_UART_PORT, x)
00042 #define _DBD(x)         _db_dec(DEBUG_UART_PORT, x)
00043 #define _DBD16(x)        _db_dec_16(DEBUG_UART_PORT, x)
00044 #define _DBD32(x)        _db_dec_32(DEBUG_UART_PORT, x)
00045 #define _DBH(x)         _db_hex(DEBUG_UART_PORT, x)
00046 #define _DBH16(x)        _db_hex_16(DEBUG_UART_PORT, x)
00047 #define _DBH32(x)        _db_hex_32(DEBUG_UART_PORT, x)
00048 #define _DG                     _db_get_char(DEBUG_UART_PORT)
00049 //void  _printf (const  char *format, ...);
00050
00051 extern void (*_db_msg)(LPC_UART_TypeDef *UARTx, const void *s);
00052 extern void (*_db_msg_)(LPC_UART_TypeDef *UARTx, const void *s);
00053 extern void (*_db_char)(LPC_UART_TypeDef *UARTx, uint8_t ch);
00054 extern void (*_db_dec)(LPC_UART_TypeDef *UARTx, uint8_t decn);
00055 extern void (*_db_dec_16)(LPC_UART_TypeDef *UARTx, uint16_t decn);
00056 extern void (*_db_dec_32)(LPC_UART_TypeDef *UARTx, uint32_t decn);
00057 extern void (*_db_hex)(LPC_UART_TypeDef *UARTx, uint8_t hexn);
00058 extern void (*_db_hex_16)(LPC_UART_TypeDef *UARTx, uint16_t hexn);
00059 extern void (*_db_hex_32)(LPC_UART_TypeDef *UARTx, uint32_t hexn);
00060 extern uint8_t (*_db_get_char)(LPC_UART_TypeDef *UARTx);
00061
00062 void UARTPutChar (LPC_UART_TypeDef *UARTx, uint8_t ch);
00063 void UARTPuts(LPC_UART_TypeDef *UARTx, const void *str);
00064 void UARTPuts_(LPC_UART_TypeDef *UARTx, const void *str);
00065 void UARTPutDec(LPC_UART_TypeDef *UARTx, uint8_t decnum);
00066 void UARTPutDec16(LPC_UART_TypeDef *UARTx, uint16_t decnum);
00067 void UARTPutDec32(LPC_UART_TypeDef *UARTx, uint32_t decnum);
00068 void UARTPutHex (LPC_UART_TypeDef *UARTx, uint8_t hexnum);
00069 void UARTPutHex16 (LPC_UART_TypeDef *UARTx, uint16_t hexnum);
00070 void UARTPutHex32 (LPC_UART_TypeDef *UARTx, uint32_t hexnum);
00071 uint8_t UARTGetChar (LPC_UART_TypeDef *UARTx);
00072 void debug_frmwrk_init(void);
00073
00074 #endif /* DEBUG_FRMWRK_H_ */
Generated on Tue Jun 7 14:58:55 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBHID/demo.c Source File

C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBHID/demo.c

Go to the documentation of this file.
00001 /*----------------------------------------------------------------------------
00002  *      Name:    DEMO.C
00003  *      Purpose: USB HID Demo
00004  *      Version: V1.10
00005  *----------------------------------------------------------------------------
00006  *      This software is supplied "AS IS" without any warranties, express,
00007  *      implied or statutory, including but not limited to the implied
00008  *      warranties of fitness for purpose, satisfactory quality and
00009  *      noninfringement. Keil extends you a royalty-free right to reproduce
00010  *      and distribute executable files created using this software for use
00011  *      on NXP Semiconductors LPC family microcontroller devices only. Nothing
00012  *      else gives you the right to use this software.
00013  *
00014  *      Copyright (c) 2005-2009 Keil Software.
00015  *---------------------------------------------------------------------------*/
00016
00017 #include "LPC17xx.h"                        /* LPC17xx definitions */
00018
00019 #include "lpc_types.h"
00020
00021 #include "usb.h"
00022 #include "usbcfg.h"
00023 #include "usbhw.h"
00024
00025 #include "demo.h"
00026 #include "hid.h"
00027
00028 #include "lpc17xx_libcfg.h"
00029 #include "lpc17xx_nvic.h"
00030
00031 /* Example group ----------------------------------------------------------- */
00038 uint8_t InReport;                              /* HID Input Report    */
00039                                             /*   Bit0   : Buttons  */
00040                                             /*   Bit1..7: Reserved */
00041
00042 uint8_t OutReport;                             /* HID Out Report      */
00043                                             /*   Bit0..7: LEDs     */
00044
00045
00046 /*
00047  *  Get HID Input Report -> InReport
00048  */
00049
00050 void GetInReport (void) {
00051
00052   if ((LPC_GPIO2 -> FIOPIN & PBINT) == 0) {             /* Check if PBINT is pressed */
00053     InReport = 0x01;
00054   } else {
00055     InReport = 0x00;
00056   }
00057 }
00058
00059
00060 /*
00061  *  Set HID Output Report <- OutReport
00062  */
00063
00064 void SetOutReport (void) {
00065         //Because 8 LEDs are not ordered, so we have check each bit
00066         //of OurReport to turn on/off LED correctly
00067         uint8_t led_num;
00068         LPC_GPIO2 -> FIOCLR = LEDMSK;
00069         LPC_GPIO1 -> FIOCLR = 0xF0000000;
00070         //LED0 (P2.6)
00071         led_num = OutReport & (1<<0);
00072         if(led_num == 0)
00073                 LPC_GPIO2 -> FIOCLR |= (1<<6);
00074         else
00075                 LPC_GPIO2 -> FIOSET |= (1<<6);
00076         //LED1 (P2.5)
00077         led_num = OutReport & (1<<1);
00078         if(led_num == 0)
00079                 LPC_GPIO2 -> FIOCLR |= (1<<5);
00080         else
00081                 LPC_GPIO2 -> FIOSET |= (1<<5);
00082         //LED2 (P2.4)
00083         led_num = OutReport & (1<<2);
00084         if(led_num == 0)
00085                 LPC_GPIO2 -> FIOCLR |= (1<<4);
00086         else
00087                 LPC_GPIO2 -> FIOSET |= (1<<4);
00088         //LED3 (P2.3)
00089         led_num = OutReport & (1<<3);
00090         if(led_num == 0)
00091                 LPC_GPIO2 -> FIOCLR |= (1<<3);
00092         else
00093                 LPC_GPIO2 -> FIOSET |= (1<<3);
00094         //LED4 (P2.2)
00095         led_num = OutReport & (1<<4);
00096         if(led_num == 0)
00097                 LPC_GPIO2 -> FIOCLR |= (1<<2);
00098         else
00099                 LPC_GPIO2 -> FIOSET |= (1<<2);
00100         //LED5 (P1.31)
00101         led_num = OutReport & (1<<5);
00102         if(led_num == 0)
00103                 LPC_GPIO1 -> FIOCLR |= (1<<31);
00104         else
00105                 LPC_GPIO1 -> FIOSET |= (1<<31);
00106         //LED6 (P1.29)
00107         led_num = OutReport & (1<<6);
00108         if(led_num == 0)
00109                 LPC_GPIO1 -> FIOCLR |= (1<<29);
00110         else
00111                 LPC_GPIO1 -> FIOSET |= (1<<29);
00112         //LED7 (P1.28)
00113         led_num = OutReport & (1<<7);
00114         if(led_num == 0)
00115                 LPC_GPIO1 -> FIOCLR |= (1<<28);
00116         else
00117                 LPC_GPIO1 -> FIOSET |= (1<<28);
00118 }
00119
00120
00121 /* Main Program */
00122
00123 int main (void) {
00124         LPC_GPIO2 -> FIODIR = LEDMSK;             /* LEDs, port 2, bit 0~7 output only */
00125         LPC_GPIO1 -> FIODIR = 0xF0000000;                               /* LEDs, port 1, bit 28-31 output */
00126
00127         USB_Init();                               /* USB Initialization */
00128         USB_Connect(TRUE);                        /* USB Connect */
00129
00130         while (1);                                /* Loop forever */
00131 }
00132
00133 #ifdef  DEBUG
00134 /*******************************************************************************
00135 * @brief                Reports the name of the source file and the source line number
00136 *                               where the CHECK_PARAM error has occurred.
00137 * @param[in]    file Pointer to the source file name
00138 * @param[in]    line assert_param error line source number
00139 * @return               None
00140 *******************************************************************************/
00141 void check_failed(uint8_t *file, uint32_t line)
00142 {
00143         /* User can add his own implementation to report the file name and line number,
00144          ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
00145
00146         /* Infinite loop */
00147         while(1);
00148 }
00149 #endif
00150
00151 /*
00152  * @}
00153  */
00154
Generated on Tue Jun 7 14:59:05 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBHID/demo.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBHID/demo.h

Go to the documentation of this file.
00001 /*----------------------------------------------------------------------------
00002  *      Name:    DEMO.H
00003  *      Purpose: USB HID Demo Definitions
00004  *      Version: V1.10
00005  *----------------------------------------------------------------------------
00006  *      This software is supplied "AS IS" without any warranties, express,
00007  *      implied or statutory, including but not limited to the implied
00008  *      warranties of fitness for purpose, satisfactory quality and
00009  *      noninfringement. Keil extends you a royalty-free right to reproduce
00010  *      and distribute executable files created using this software for use
00011  *      on NXP Semiconductors LPC family microcontroller devices only. Nothing
00012  *      else gives you the right to use this software.
00013  *
00014  *      Copyright (c) 2005-2009 Keil Software.
00015  *---------------------------------------------------------------------------*/
00016
00017 /* Push Button Definitions */
00018 #define PBINT  0x00000400  /* P2.10 */
00019
00020 /* LED Definitions */
00021 #define LEDMSK 0x000000FF /* P2.0..7 */
00022
00023 /* HID Demo Variables */
00024 extern uint8_t InReport;
00025 extern uint8_t OutReport;
00026
00027 /* HID Demo Functions */
00028 extern void GetInReport  (void);
00029 extern void SetOutReport (void);
Generated on Tue Jun 7 14:59:05 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/dhcpc/dhcpc.c Source File

C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/dhcpc/dhcpc.c

Go to the documentation of this file.
00001 /*
00002  * Copyright (c) 2005, Swedish Institute of Computer Science
00003  * All rights reserved.
00004  *
00005  * Redistribution and use in source and binary forms, with or without
00006  * modification, are permitted provided that the following conditions
00007  * are met:
00008  * 1. Redistributions of source code must retain the above copyright
00009  *    notice, this list of conditions and the following disclaimer.
00010  * 2. Redistributions in binary form must reproduce the above copyright
00011  *    notice, this list of conditions and the following disclaimer in the
00012  *    documentation and/or other materials provided with the distribution.
00013  * 3. Neither the name of the Institute nor the names of its contributors
00014  *    may be used to endorse or promote products derived from this software
00015  *    without specific prior written permission.
00016  *
00017  * THIS SOFTWARE IS PROVIDED BY THE INSTITUTE AND CONTRIBUTORS ``AS IS'' AND
00018  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
00019  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
00020  * ARE DISCLAIMED.  IN NO EVENT SHALL THE INSTITUTE OR CONTRIBUTORS BE LIABLE
00021  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
00022  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
00023  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
00024  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
00025  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
00026  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
00027  * SUCH DAMAGE.
00028  *
00029  * This file is part of the uIP TCP/IP stack
00030  *
00031  * @(#)$Id: dhcpc.c,v 1.2 2006/06/11 21:46:37 adam Exp $
00032  */
00033
00034 #include <stdio.h>
00035 #include <string.h>
00036
00037 #include "uip.h"
00038 #include "dhcpc.h"
00039 #include "timer.h"
00040 #include "pt.h"
00041
00042 #define STATE_INITIAL         0
00043 #define STATE_SENDING         1
00044 #define STATE_OFFER_RECEIVED  2
00045 #define STATE_CONFIG_RECEIVED 3
00046
00047 static struct dhcpc_state s;
00048
00049 struct dhcp_msg {
00050   u8_t op, htype, hlen, hops;
00051   u8_t xid[4];
00052   u16_t secs, flags;
00053   u8_t ciaddr[4];
00054   u8_t yiaddr[4];
00055   u8_t siaddr[4];
00056   u8_t giaddr[4];
00057   u8_t chaddr[16];
00058 #ifndef UIP_CONF_DHCP_LIGHT
00059   u8_t sname[64];
00060   u8_t file[128];
00061 #endif
00062   u8_t options[312];
00063 };
00064
00065 #define BOOTP_BROADCAST 0x8000
00066
00067 #define DHCP_REQUEST        1
00068 #define DHCP_REPLY          2
00069 #define DHCP_HTYPE_ETHERNET 1
00070 #define DHCP_HLEN_ETHERNET  6
00071 #define DHCP_MSG_LEN      236
00072
00073 #define DHCPC_SERVER_PORT  67
00074 #define DHCPC_CLIENT_PORT  68
00075
00076 #define DHCPDISCOVER  1
00077 #define DHCPOFFER     2
00078 #define DHCPREQUEST   3
00079 #define DHCPDECLINE   4
00080 #define DHCPACK       5
00081 #define DHCPNAK       6
00082 #define DHCPRELEASE   7
00083
00084 #define DHCP_OPTION_SUBNET_MASK   1
00085 #define DHCP_OPTION_ROUTER        3
00086 #define DHCP_OPTION_DNS_SERVER    6
00087 #define DHCP_OPTION_REQ_IPADDR   50
00088 #define DHCP_OPTION_LEASE_TIME   51
00089 #define DHCP_OPTION_MSG_TYPE     53
00090 #define DHCP_OPTION_SERVER_ID    54
00091 #define DHCP_OPTION_REQ_LIST     55
00092 #define DHCP_OPTION_END         255
00093
00094 static const u8_t xid[4] = {0xad, 0xde, 0x12, 0x23};
00095 static const u8_t magic_cookie[4] = {99, 130, 83, 99};
00096 /*---------------------------------------------------------------------------*/
00097 static u8_t *
00098 add_msg_type(u8_t *optptr, u8_t type)
00099 {
00100   *optptr++ = DHCP_OPTION_MSG_TYPE;
00101   *optptr++ = 1;
00102   *optptr++ = type;
00103   return optptr;
00104 }
00105 /*---------------------------------------------------------------------------*/
00106 static u8_t *
00107 add_server_id(u8_t *optptr)
00108 {
00109   *optptr++ = DHCP_OPTION_SERVER_ID;
00110   *optptr++ = 4;
00111   memcpy(optptr, s.serverid, 4);
00112   return optptr + 4;
00113 }
00114 /*---------------------------------------------------------------------------*/
00115 static u8_t *
00116 add_req_ipaddr(u8_t *optptr)
00117 {
00118   *optptr++ = DHCP_OPTION_REQ_IPADDR;
00119   *optptr++ = 4;
00120   memcpy(optptr, s.ipaddr, 4);
00121   return optptr + 4;
00122 }
00123 /*---------------------------------------------------------------------------*/
00124 static u8_t *
00125 add_req_options(u8_t *optptr)
00126 {
00127   *optptr++ = DHCP_OPTION_REQ_LIST;
00128   *optptr++ = 3;
00129   *optptr++ = DHCP_OPTION_SUBNET_MASK;
00130   *optptr++ = DHCP_OPTION_ROUTER;
00131   *optptr++ = DHCP_OPTION_DNS_SERVER;
00132   return optptr;
00133 }
00134 /*---------------------------------------------------------------------------*/
00135 static u8_t *
00136 add_end(u8_t *optptr)
00137 {
00138   *optptr++ = DHCP_OPTION_END;
00139   return optptr;
00140 }
00141 /*---------------------------------------------------------------------------*/
00142 static void
00143 create_msg(register struct dhcp_msg *m)
00144 {
00145   m->op = DHCP_REQUEST;
00146   m->htype = DHCP_HTYPE_ETHERNET;
00147   m->hlen = s.mac_len;
00148   m->hops = 0;
00149   memcpy(m->xid, xid, sizeof(m->xid));
00150   m->secs = 0;
00151   m->flags = HTONS(BOOTP_BROADCAST); /*  Broadcast bit. */
00152   /*  uip_ipaddr_copy(m->ciaddr, uip_hostaddr);*/
00153   memcpy(m->ciaddr, uip_hostaddr, sizeof(m->ciaddr));
00154   memset(m->yiaddr, 0, sizeof(m->yiaddr));
00155   memset(m->siaddr, 0, sizeof(m->siaddr));
00156   memset(m->giaddr, 0, sizeof(m->giaddr));
00157   memcpy(m->chaddr, s.mac_addr, s.mac_len);
00158   memset(&m->chaddr[s.mac_len], 0, sizeof(m->chaddr) - s.mac_len);
00159 #ifndef UIP_CONF_DHCP_LIGHT
00160   memset(m->sname, 0, sizeof(m->sname));
00161   memset(m->file, 0, sizeof(m->file));
00162 #endif
00163
00164   memcpy(m->options, magic_cookie, sizeof(magic_cookie));
00165 }
00166 /*---------------------------------------------------------------------------*/
00167 static void
00168 send_discover(void)
00169 {
00170   u8_t *end;
00171   struct dhcp_msg *m = (struct dhcp_msg *)uip_appdata;
00172
00173   create_msg(m);
00174
00175   end = add_msg_type(&m->options[4], DHCPDISCOVER);
00176   end = add_req_options(end);
00177   end = add_end(end);
00178
00179   uip_send(uip_appdata, end - (u8_t *)uip_appdata);
00180 }
00181 /*---------------------------------------------------------------------------*/
00182 static void
00183 send_request(void)
00184 {
00185   u8_t *end;
00186   struct dhcp_msg *m = (struct dhcp_msg *)uip_appdata;
00187
00188   create_msg(m);
00189
00190   end = add_msg_type(&m->options[4], DHCPREQUEST);
00191   end = add_server_id(end);
00192   end = add_req_ipaddr(end);
00193   end = add_end(end);
00194
00195   uip_send(uip_appdata, end - (u8_t *)uip_appdata);
00196 }
00197 /*---------------------------------------------------------------------------*/
00198 static u8_t
00199 parse_options(u8_t *optptr, int len)
00200 {
00201   u8_t *end = optptr + len;
00202   u8_t type = 0;
00203
00204   while(optptr < end) {
00205     switch(*optptr) {
00206     case DHCP_OPTION_SUBNET_MASK:
00207       memcpy(s.netmask, optptr + 2, 4);
00208       break;
00209     case DHCP_OPTION_ROUTER:
00210       memcpy(s.default_router, optptr + 2, 4);
00211       break;
00212     case DHCP_OPTION_DNS_SERVER:
00213       memcpy(s.dnsaddr, optptr + 2, 4);
00214       break;
00215     case DHCP_OPTION_MSG_TYPE:
00216       type = *(optptr + 2);
00217       break;
00218     case DHCP_OPTION_SERVER_ID:
00219       memcpy(s.serverid, optptr + 2, 4);
00220       break;
00221     case DHCP_OPTION_LEASE_TIME:
00222       memcpy(s.lease_time, optptr + 2, 4);
00223       break;
00224     case DHCP_OPTION_END:
00225       return type;
00226     }
00227
00228     optptr += optptr[1] + 2;
00229   }
00230   return type;
00231 }
00232 /*---------------------------------------------------------------------------*/
00233 static u8_t
00234 parse_msg(void)
00235 {
00236   struct dhcp_msg *m = (struct dhcp_msg *)uip_appdata;
00237
00238   if(m->op == DHCP_REPLY &&
00239      memcmp(m->xid, xid, sizeof(xid)) == 0 &&
00240      memcmp(m->chaddr, s.mac_addr, s.mac_len) == 0) {
00241     memcpy(s.ipaddr, m->yiaddr, 4);
00242     return parse_options(&m->options[4], uip_datalen());
00243   }
00244   return 0;
00245 }
00246 /*---------------------------------------------------------------------------*/
00247 static
00248 PT_THREAD(handle_dhcp(void))
00249 {
00250   PT_BEGIN(&s.pt);
00251
00252   /* try_again:*/
00253   s.state = STATE_SENDING;
00254   s.ticks = CLOCK_SECOND;
00255
00256   do {
00257     send_discover();
00258     timer_set(&s.timer, s.ticks);
00259     PT_WAIT_UNTIL(&s.pt, uip_newdata() || timer_expired(&s.timer));
00260
00261     if(uip_newdata() && parse_msg() == DHCPOFFER) {
00262       s.state = STATE_OFFER_RECEIVED;
00263       break;
00264     }
00265
00266     if(s.ticks < CLOCK_SECOND * 60) {
00267       s.ticks *= 2;
00268     }
00269   } while(s.state != STATE_OFFER_RECEIVED);
00270
00271   s.ticks = CLOCK_SECOND;
00272
00273   do {
00274     send_request();
00275     timer_set(&s.timer, s.ticks);
00276     PT_WAIT_UNTIL(&s.pt, uip_newdata() || timer_expired(&s.timer));
00277
00278     if(uip_newdata() && parse_msg() == DHCPACK) {
00279       s.state = STATE_CONFIG_RECEIVED;
00280       break;
00281     }
00282
00283     if(s.ticks <= CLOCK_SECOND * 10) {
00284       s.ticks += CLOCK_SECOND;
00285     } else {
00286       PT_RESTART(&s.pt);
00287     }
00288   } while(s.state != STATE_CONFIG_RECEIVED);
00289
00290 #if 0
00291   printf("Got IP address %d.%d.%d.%d\n",
00292          uip_ipaddr1(s.ipaddr), uip_ipaddr2(s.ipaddr),
00293          uip_ipaddr3(s.ipaddr), uip_ipaddr4(s.ipaddr));
00294   printf("Got netmask %d.%d.%d.%d\n",
00295          uip_ipaddr1(s.netmask), uip_ipaddr2(s.netmask),
00296          uip_ipaddr3(s.netmask), uip_ipaddr4(s.netmask));
00297   printf("Got DNS server %d.%d.%d.%d\n",
00298          uip_ipaddr1(s.dnsaddr), uip_ipaddr2(s.dnsaddr),
00299          uip_ipaddr3(s.dnsaddr), uip_ipaddr4(s.dnsaddr));
00300   printf("Got default router %d.%d.%d.%d\n",
00301          uip_ipaddr1(s.default_router), uip_ipaddr2(s.default_router),
00302          uip_ipaddr3(s.default_router), uip_ipaddr4(s.default_router));
00303   printf("Lease expires in %ld seconds\n",
00304          ntohs(s.lease_time[0])*65536ul + ntohs(s.lease_time[1]));
00305 #endif
00306
00307   dhcpc_configured(&s);
00308
00309   /*  timer_stop(&s.timer);*/
00310
00311   /*
00312    * PT_END restarts the thread so we do this instead. Eventually we
00313    * should reacquire expired leases here.
00314    */
00315   while(1) {
00316     PT_YIELD(&s.pt);
00317   }
00318
00319   PT_END(&s.pt);
00320 }
00321 /*---------------------------------------------------------------------------*/
00322 void
00323 dhcpc_init(const void *mac_addr, int mac_len)
00324 {
00325   uip_ipaddr_t addr;
00326
00327   s.mac_addr = mac_addr;
00328   s.mac_len  = mac_len;
00329
00330   s.state = STATE_INITIAL;
00331   uip_ipaddr(addr, 255,255,255,255);
00332   s.conn = uip_udp_new(&addr, HTONS(DHCPC_SERVER_PORT));
00333   if(s.conn != NULL) {
00334     uip_udp_bind(s.conn, HTONS(DHCPC_CLIENT_PORT));
00335   }
00336   PT_INIT(&s.pt);
00337 }
00338 /*---------------------------------------------------------------------------*/
00339 void
00340 dhcpc_appcall(void)
00341 {
00342   handle_dhcp();
00343 }
00344 /*---------------------------------------------------------------------------*/
00345 void
00346 dhcpc_request(void)
00347 {
00348   u16_t ipaddr[2];
00349
00350   if(s.state == STATE_INITIAL) {
00351     uip_ipaddr(ipaddr, 0,0,0,0);
00352     uip_sethostaddr(ipaddr);
00353     /*    handle_dhcp(PROCESS_EVENT_NONE, NULL);*/
00354   }
00355 }
00356 /*---------------------------------------------------------------------------*/
Generated on Tue Jun 7 14:58:59 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/dhcpc/dhcpc.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/dhcpc/dhcpc.h

Go to the documentation of this file.
00001 /*
00002  * Copyright (c) 2005, Swedish Institute of Computer Science
00003  * All rights reserved.
00004  *
00005  * Redistribution and use in source and binary forms, with or without
00006  * modification, are permitted provided that the following conditions
00007  * are met:
00008  * 1. Redistributions of source code must retain the above copyright
00009  *    notice, this list of conditions and the following disclaimer.
00010  * 2. Redistributions in binary form must reproduce the above copyright
00011  *    notice, this list of conditions and the following disclaimer in the
00012  *    documentation and/or other materials provided with the distribution.
00013  * 3. Neither the name of the Institute nor the names of its contributors
00014  *    may be used to endorse or promote products derived from this software
00015  *    without specific prior written permission.
00016  *
00017  * THIS SOFTWARE IS PROVIDED BY THE INSTITUTE AND CONTRIBUTORS ``AS IS'' AND
00018  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
00019  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
00020  * ARE DISCLAIMED.  IN NO EVENT SHALL THE INSTITUTE OR CONTRIBUTORS BE LIABLE
00021  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
00022  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
00023  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
00024  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
00025  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
00026  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
00027  * SUCH DAMAGE.
00028  *
00029  * This file is part of the uIP TCP/IP stack
00030  *
00031  * @(#)$Id: dhcpc.h,v 1.3 2006/06/11 21:46:37 adam Exp $
00032  */
00033 #ifndef __DHCPC_H__
00034 #define __DHCPC_H__
00035
00036 #include "timer.h"
00037 #include "pt.h"
00038
00039 struct dhcpc_state {
00040   struct pt pt;
00041   char state;
00042   struct uip_udp_conn *conn;
00043   struct timer timer;
00044   u16_t ticks;
00045   const void *mac_addr;
00046   int mac_len;
00047
00048   u8_t serverid[4];
00049
00050   u16_t lease_time[2];
00051   u16_t ipaddr[2];
00052   u16_t netmask[2];
00053   u16_t dnsaddr[2];
00054   u16_t default_router[2];
00055 };
00056
00057 void dhcpc_init(const void *mac_addr, int mac_len);
00058 void dhcpc_request(void);
00059
00060 void dhcpc_appcall(void);
00061
00062 void dhcpc_configured(const struct dhcpc_state *s);
00063
00064 typedef struct dhcpc_state uip_udp_appstate_t;
00065 #define UIP_UDP_APPCALL dhcpc_appcall
00066
00067
00068 #endif /* __DHCPC_H__ */
Generated on Tue Jun 7 14:58:59 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/LCD/NOKIA6610_LCD/drv_glcd.c Source File

C:/nxpdrv/LPC1700CMSIS/Examples/LCD/NOKIA6610_LCD/drv_glcd.c

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00001 /*************************************************************************
00002  *
00003  *
00004  *    (c) Copyright IAR Systems 2006
00005  *
00006  *    File name   : drv_glcd.c
00007  *    Description : Graphic LCD driver
00008  *
00009  *    History :
00010  *    1. Date        : December 2, 2006
00011  *       Author      : Stanimir Bonev
00012  *       Description : Create
00013  *
00014  *    $Revision: 28532 $
00015  **************************************************************************/
00016 #include "drv_glcd.h"
00017 #include "lpc_types.h"
00018 #include "stdarg.h"
00019 #include <assert.h>
00020 #include "glcd_ll.h"
00021
00022 /* delay definition */
00023 #define GLCD_DLY_10US                        80     // 10us
00024 #define GLCD_RESET_DLY                       50     // 5ms
00025 #define GLCD_BOOSTER_ON_DLY                1200     // 120 ms
00026
00027 static const GLCD_CmdCtrl_t GLCD_Cmd_Iss0[GLCD_CMD_NUMB] =
00028 {
00029 // (ISS=0)
00030 // NOP - No Operation
00031   {0x00, GLCD_WRITE, 0, 0},
00032 // SLPIN - Sleep in & booster off
00033   {0x10, GLCD_WRITE, 0, 0},
00034 // SLPOUT - Sleep out & booster on
00035   {0x11, GLCD_WRITE, 0, 0},
00036 // PTLOUT (NORON) - Partial off (Normal)
00037   {0x13, GLCD_WRITE, 0, 0},
00038 // INVOFF - Display inversion off (normal)
00039   {0x20, GLCD_WRITE, 0, 0},
00040 // INVON - Display inversion on
00041   {0x21, GLCD_WRITE, 0, 0},
00042 // DISPOFF - Display off
00043   {0x28, GLCD_WRITE, 0, 0},
00044 // DISPON - Display on
00045   {0x29, GLCD_WRITE, 0, 0},
00046 // CASET - Column address set
00047 // X_ADR start: 0h <= XS <= 83h
00048 // X_ADR end: 0h <= XS <= 83h
00049   {0x2A, GLCD_WRITE, 0, 2},
00050 // RASET - Row address set
00051 // Y_ADR start: 0h <= YS <= 83h
00052 // Y_ADR end: 0h <= YS <= 83h
00053   {0x2B, GLCD_WRITE, 0, 2},
00054 // RAMWR - Memory write
00055   {0x2C, GLCD_WRITE, 0, (uint32_t)-1},
00056 // RGBSET - Color set for 256 color display
00057   {0x2D, GLCD_WRITE, 0, 20},
00058 // VSCSAD - Scroll start address of RAM
00059 // SSA = 0, 1, 2, … , 131
00060   {0x37, GLCD_WRITE, 0, 1},
00061 // IDMOFF - Idle mode off
00062   {0x38, GLCD_WRITE, 0, 0},
00063 // IDMON - Idle mode on
00064   {0x39, GLCD_WRITE, 0, 0},
00065 // RDID1 - Interface pixel format
00066   {0xDA, GLCD_READ,  0, 1},
00067 // RDID2 - Interface pixel format
00068   {0xDB, GLCD_READ,  0, 1},
00069 // RDID3 - Interface pixel format
00070   {0xDC, GLCD_READ,  0, 1},
00071 // FRMSEL - External oscillator select
00072 // Frame frequency in Temp range A
00073 // Frame frequency in Temp range B
00074 // Frame frequency in Temp range C
00075 // Frame frequency in Temp range D
00076   {0xB4, GLCD_WRITE, 0, 4},
00077 // FRM8SEL - External oscillator select
00078 // Frame frequency in Temp range A
00079 // Frame frequency in Temp range B
00080 // Frame frequency in Temp range C
00081 // Frame frequency in Temp range D
00082   {0xB5, GLCD_WRITE, 0, 4},
00083 // TMPRNG - External oscillator select
00084 // Temp range A
00085 // Temp range B
00086 // Temp range C
00087 // Temp range D
00088   {0xB6, GLCD_WRITE, 0, 4},
00089 // TMPHIS - Temp range set
00090   {0xB8, GLCD_WRITE, 0, 1},
00091 // TMPREAD - Temperature read back
00092   {0xB7, GLCD_READ,  0, 1},
00093 // EPWRIN - EEPROM write start
00094   {0xD1, GLCD_WRITE, 0, 0},
00095 // EPWROUT - EEPROM write end
00096   {0xD0, GLCD_WRITE, 0, 0},
00097 // RDEV - Read internal contrast (EV_IN)
00098   {0xD4, GLCD_WRITE, 0, 1},
00099 // RDRR - Read internal resistor ratio (RR_IN)
00100   {0xD5, GLCD_READ,  0, 1},
00101 // Adapted commands
00102 // PTIN - adapted command (PTLAR + PTIN)
00103   {0x00, GLCD_WRITE, 0, 0},
00104 // SCRLAR - Scroll area set (2-line unit)
00105 // TFA = 0,1,2, … , 132
00106 // VSA = 0,1,2, … , 132
00107 // BFA = 0,1,2, … , 132
00108   {0x33, GLCD_WRITE, 0, 3},
00109 // DATCTR - adapted command (MADCTR + COLMOD)
00110   {0x00, GLCD_WRITE, 0, 0},
00111 // SETCON - Write contrast 0 - 127
00112   {0x25, GLCD_WRITE, 0, 1},
00113 // Commands applicable only when ISS=1
00114 // OSCON
00115   {GLCD_INV_CMD, GLCD_WRITE, 0, 0},
00116 // OSCOFF
00117   {GLCD_INV_CMD, GLCD_WRITE, 0, 0},
00118 // RMWIN
00119   {GLCD_INV_CMD, GLCD_WRITE, 0, 0},
00120 // RMWOUT
00121   {GLCD_INV_CMD, GLCD_WRITE, 0, 0},
00122 // VOLUP
00123   {GLCD_INV_CMD, GLCD_WRITE, 0, 0},
00124 // VOLDOWN
00125   {GLCD_INV_CMD, GLCD_WRITE, 0, 0},
00126 // ASCSET
00127   {GLCD_INV_CMD, GLCD_WRITE, 0, 0},
00128 // DISCTR
00129   {GLCD_INV_CMD, GLCD_WRITE, 0, 0},
00130 // PWRCTR
00131   {GLCD_INV_CMD, GLCD_WRITE, 0, 0},
00132 // VOLCTR
00133   {GLCD_INV_CMD, GLCD_WRITE, 0, 0},
00134 // Commands applicable only when ISS=0
00135 // CLKINT - Internal oscillator select
00136   {0xB0, GLCD_WRITE, 0, 0},
00137 // CLKEXT - External oscillator select
00138   {0xB1, GLCD_WRITE, 0, 0},
00139 // RDDST - Read Display Status
00140   {0x09, GLCD_READ,  1, 4},
00141 // SWRESET - Software reset
00142   {0x01, GLCD_WRITE, 0, 0},
00143 // RDDID - Read Display ID
00144   {0x04, GLCD_READ,  1, 3},
00145 // PTLAR - Partial start/end address set
00146 // Start address (0,1,2, …, 131)
00147 // End address (0,1,2, …, 131)
00148   {0x30, GLCD_WRITE, 0, 2},
00149 // PTLON - Partial mode on
00150   {0x12, GLCD_WRITE, 0, 0},
00151 // MADCTR - Tearing effect mode set & on
00152   {0x36, GLCD_WRITE, 0, 1},
00153 // COLMOD - Interface pixel format
00154 // Interface format
00155   {0x3A, GLCD_WRITE, 0, 1},
00156 // APOFF - All pixel off (only for test purpose)
00157   {0x22, GLCD_WRITE, 0, 0},
00158 // APON - All pixel on (only for test purpose)
00159   {0x23, GLCD_WRITE, 0, 0},
00160 // BSTROFF - Booster off (only for test purpose)
00161   {0x02, GLCD_WRITE, 0, 0},
00162 // BSTRON - Booster on (only for test purpose)
00163   {0x03, GLCD_WRITE, 0, 0},
00164 };
00165
00166 static const GLCD_CmdCtrl_t GLCD_Cmd_Iss1[GLCD_CMD_NUMB] =
00167 {
00168 // (ISS=1)
00169 // NOP - No Operation
00170   {0x25, GLCD_WRITE, 0, 0},
00171 // SLPIN - Sleep in & booster off
00172   {0x95, GLCD_WRITE, 0, 0},
00173 // SLPOUT - Sleep out & booster on
00174   {0x94, GLCD_WRITE, 0, 0},
00175 // PTLOUT (NORON) - Partial off (Normal)
00176   {0xA9, GLCD_WRITE, 0, 0},
00177 // INVOFF - Display inversion off (normal)
00178   {0xA6, GLCD_WRITE, 0, 0},
00179 // INVON - Display inversion on
00180   {0xA7, GLCD_WRITE, 0, 0},
00181 // DISPOFF - Display off
00182   {0xAE, GLCD_WRITE, 0, 0},
00183 // DISPON - Display on
00184   {0xAF, GLCD_WRITE, 0, 0},
00185 // CASET - Column address set
00186 // X_ADR start: 0h <= XS <= 83h
00187 // X_ADR end: 0h <= XS <= 83h
00188   {0x15, GLCD_WRITE, 0, 2},
00189 // RASET - Row address set
00190 // Y_ADR start: 0h <= YS <= 83h
00191 // Y_ADR end: 0h <= YS <= 83h
00192   {0x75, GLCD_WRITE, 0, 2},
00193 // RAMWR - Memory write
00194   {0x5C, GLCD_WRITE, 0, (uint32_t)-1},
00195 // RGBSET - Color set for 256 color display
00196   {0xCE, GLCD_WRITE, 0, 20},
00197 // VSCSAD - Scroll start address of RAM
00198 // SSA = 0, 1, 2, … , 131
00199   {0xAB, GLCD_WRITE, 0, 1},
00200 // IDMOFF - Idle mode off
00201   {0x38, GLCD_WRITE, 0, 0},
00202 // IDMON - Idle mode on
00203   {0x39, GLCD_WRITE, 0, 0},
00204 // RDID1 - Interface pixel format
00205   {0xDA, GLCD_READ,  0, 1},
00206 // RDID2 - Interface pixel format
00207   {0xDB, GLCD_READ,  0, 1},
00208 // RDID3 - Interface pixel format
00209   {0xDC, GLCD_READ,  0, 1},
00210 // FRMSEL - External oscillator select
00211 // Frame frequency in Temp range A
00212 // Frame frequency in Temp range B
00213 // Frame frequency in Temp range C
00214 // Frame frequency in Temp range D
00215   {0xB4, GLCD_WRITE, 0, 4},
00216 // FRM8SEL - External oscillator select
00217 // Frame frequency in Temp range A
00218 // Frame frequency in Temp range B
00219 // Frame frequency in Temp range C
00220 // Frame frequency in Temp range D
00221   {0xB5, GLCD_WRITE, 0, 4},
00222 // TMPRNG - External oscillator select
00223 // Temp range A
00224 // Temp range B
00225 // Temp range C
00226 // Temp range D
00227   {0xB6, GLCD_WRITE, 0, 4},
00228 // TMPHIS - Temp hysteresis range set
00229   {0xB8, GLCD_WRITE, 0, 1},
00230 // TMPREAD - Temperature read back
00231   {0xB7, GLCD_READ,  0, 1},
00232 // EPWRIN - EEPROM write start
00233   {0xCD, GLCD_WRITE, 0, 0},
00234 // EPWROUT - EEPROM write end
00235   {0xCC, GLCD_WRITE, 0, 0},
00236 // RDEV - Read internal contrast (EV_IN)
00237   {0x7C, GLCD_WRITE, 0, 1},
00238 // RDRR - Read internal resistor ratio (RR_IN)
00239   {0x7D, GLCD_READ,  0, 1},
00240 // Adapted commands
00241 // PTIN - Partial area set & on
00242 // Partial start line address
00243 // PSL7-0 Partial start line address
00244 // PEL7-0 Partial end line address
00245   {0xA8, GLCD_WRITE, 0, 2},
00246 // SCRLAR(ASCSET) - Scroll area set (2-line unit) Mode-0
00247 // SSL7-0 - Scroll start line
00248 // SEL7-0 - Scroll end line
00249 // SFL7-0 - Scroll specified line
00250 // SMD2-0 - Area scroll mode
00251   {0xAA, GLCD_WRITE, 0, 4},
00252 // DATCTR - adapted command (MADCTR + COLMOD)
00253 // MV MX MY                     - Row/column address control
00254 // MRGB                                 - RGB
00255 // GS2 GS1 GS0  - Gray-scale setup
00256   {0xBC, GLCD_WRITE, 0, 3},
00257 // SETCON - Write contrast 0 - 127
00258   {0x00, GLCD_WRITE, 0, 1},
00259 // Commands applicable only when ISS=1
00260 // OSCON - Oscillator on
00261   {0xD1, GLCD_WRITE, 0, 0},
00262 // OSCOFF - Oscillator off
00263   {0xD2, GLCD_WRITE, 0, 0},
00264 // RMWIN - Read & modify write on
00265   {0xE0, GLCD_WRITE, 0, 0},
00266 // RMWOUT - Read & modify write off
00267   {0xEE, GLCD_WRITE, 0, 0},
00268 // VOLUP - EV increment
00269   {0xD6, GLCD_WRITE, 0, 0},
00270 // VOLDOWN - EV decrement
00271   {0xD7, GLCD_WRITE, 0, 0},
00272 // ASCSET - Scroll area set
00273 // SSL7-0 - Scroll start line
00274 // SEL7-0 - Scroll end line
00275 // SFL7-0 - Scroll specified line
00276 // SMD1-0 - Area scroll mode
00277   {0xAA, GLCD_WRITE, 0, 4},
00278 // DISCTR - Display control
00279 // P1
00280 // P2
00281 // P3
00282   {0xCA, GLCD_WRITE, 0, 3},
00283 // PWRCTR - Power control set
00284 // P13-P10
00285   {0x20, GLCD_WRITE, 0, 1},
00286 // VOLCTR
00287   {0x81, GLCD_WRITE, 0, 2},
00288 // Commands applicable only when ISS=0
00289 // CLKINT - Internal oscillator select
00290   {GLCD_INV_CMD, GLCD_WRITE, 0, 0},
00291 // CLKEXT - External oscillator select
00292   {GLCD_INV_CMD, GLCD_WRITE, 0, 0},
00293 // RDDST - Read Display Status
00294   {GLCD_INV_CMD, GLCD_READ,  0, 0},
00295 // SWRESET - Software reset
00296   {GLCD_INV_CMD, GLCD_WRITE, 0, 0},
00297 // RDDID - Read Display ID
00298   {GLCD_INV_CMD, GLCD_WRITE, 0, 0},
00299 // PTLAR - Partial start/end address set
00300 // Start address (0,1,2, …, 131)
00301 // End address (0,1,2, …, 131)
00302   {GLCD_INV_CMD, GLCD_WRITE, 0, 0},
00303 // PTLON - Partial mode on
00304   {GLCD_INV_CMD, GLCD_WRITE, 0, 0},
00305 // MADCTR - Tearing effect mode set & on
00306   {GLCD_INV_CMD, GLCD_WRITE, 0, 0},
00307 // COLMOD - Interface pixel format
00308 // Interface format
00309   {GLCD_INV_CMD, GLCD_WRITE, 0, 0},
00310 // APOFF - All pixel off (only for test purpose)
00311   {GLCD_INV_CMD, GLCD_WRITE, 0, 0},
00312 // APON - All pixel on (only for test purpose)
00313   {GLCD_INV_CMD, GLCD_WRITE, 0, 0},
00314 // BSTROFF - Booster off (only for test purpose)
00315   {GLCD_INV_CMD, GLCD_WRITE, 0, 0},
00316 // BSTRON - Booster on (only for test purpose)
00317   {GLCD_INV_CMD, GLCD_WRITE, 0, 0},
00318 };
00319
00320 static GLCD_ISS_t Glcd_Iss;
00321 static Bool OddPixel = FALSE;
00322 static uint32_t PixelHold = 0;
00323
00324
00325 static pFontType_t pCurrFont = NULL;
00326 static LdcPixel_t TextColour;
00327 static LdcPixel_t TextBackgndColour;
00328
00329 static uint32_t TextX_Pos = 0;
00330 static uint32_t TextY_Pos = 0;
00331
00332 static uint32_t XL_Win = DEF_X_LEFT;
00333 static uint32_t YU_Win = DEF_Y_UP;
00334 static uint32_t XR_Win = DEF_X_RIGHT;
00335 static uint32_t YD_Win = DEF_Y_DOWN;
00336
00337 static uint32_t TabSize = TEXT_DEF_TAB_SIZE;
00338
00339 /*************************************************************************
00340  * Function Name: GLCD_SendCmd
00341  * Parameters: GLCD_SendCmd Cmd, unsigned char *pData, uint32_t Size
00342  * Return: GLCD_Status_t
00343  *
00344  * Description: Send command to the Graphic LCD
00345  *
00346  *************************************************************************/
00347 GLCD_Status_t GLCD_SendCmd (GLCD_Cmd_t Cmd, unsigned char *pData, uint32_t Size)
00348 {
00349         static Bool Write2_DRAM = FALSE; // write to DRAM mode
00350         static uint32_t ResRatio;             // Hold resistor ratio init by VOLCTR
00351                                     // and used by SETCON adapted command
00352         pDATCTR_Data_t pDATCTR_Data;
00353         uint8_t ColourSch;
00354         pASCSET_Data_t pASCSET_Data;
00355         MADCTR_Data_t DataMode = {0};
00356         // Pointer to current set of commands
00357         pGLCD_CmdCtrl_t pGLCD_CmdCtrl = (pGLCD_CmdCtrl_t)(((Glcd_Iss==GLCD_ISS_0)?
00358                                                                         GLCD_Cmd_Iss0:GLCD_Cmd_Iss1) + Cmd);
00359
00360         uint32_t Contrast;
00361
00362         if(Write2_DRAM)
00363         {
00364                 // Select LCD
00365                 GLCD_SPI_ChipSelect(1);
00366                 if(Cmd != RAMWR)
00367                 {
00368                         Write2_DRAM = FALSE;
00369                         if(PixelHold & WAITED_PIXEL)
00370                         {
00371                                 // Flush pixel
00372                                 GLCD_SPI_TranserByte(PixelHold);
00373                         }
00374                         // Release CS
00375                         GLCD_SPI_ChipSelect(0);
00376                 }
00377                 else
00378                 {
00379                         // pixels collection
00380                         uint32_t Pixel;
00381                         while(Size > 1)
00382                         {
00383                                 Pixel  =  *pData++;
00384                                 Pixel |= (*pData++)<<8;
00385                                 PixelHold |= WAITED_PIXEL;
00386                                 if(!OddPixel)
00387                                 {
00388                                         // Get even pixel
00389                                         PixelHold |= PIXEL_CONV(Pixel,0);
00390                                 }
00391                                 else
00392                                 {
00393                                         // Apply odd pixel
00394                                         PixelHold |= PIXEL_CONV(Pixel,1);
00395                                         // and send together both pixels
00396                                         GLCD_SPI_SendBlock((unsigned char *)&PixelHold,3);
00397                                         PixelHold = 0;
00398                                 }
00399                                 // update the even/odd flag
00400                                 OddPixel ^= 1;
00401                                 // update the counter of the remaining bytes
00402                                 Size -= 2;
00403                         }
00404                         // Release CS
00405                         GLCD_SPI_ChipSelect(0);
00406                         return(GLCD_OK);
00407                 }
00408         }
00409
00410         // sanitary check of command
00411         if(pGLCD_CmdCtrl->Cmd == GLCD_INV_CMD)
00412         {
00413                 return(GLCD_UNSUPPORTED);
00414         }
00415
00416         // Implement adapted commands
00417         if(Glcd_Iss==GLCD_ISS_0)
00418         {
00419                 switch(Cmd)
00420                 {
00421                 case PTIN:
00422                         // PTLAR + PTIN
00423                         GLCD_SendCmd(PTLAR,pData,0);
00424                         GLCD_SendCmd(PTLON,NULL,0);
00425                         return(GLCD_OK);
00426                 case DATCTR:
00427                         pDATCTR_Data = (pDATCTR_Data_t)pData;
00428                                 // MADCTR + COLMOD
00429                                 // Data reconstruction
00430                         DataMode.MY = pDATCTR_Data->MY;
00431                         DataMode.MX = pDATCTR_Data->MX;
00432                         DataMode.MV = pDATCTR_Data->MV;
00433                         DataMode.ML = pDATCTR_Data->ML;
00434                         DataMode.RGB = !pDATCTR_Data->RGB;
00435                         GLCD_SendCmd(MADCTR,(unsigned char*)&DataMode,0);
00436                         // 4K colors Type A
00437                         ColourSch = 3;
00438                         return(GLCD_SendCmd(COLMOD,&ColourSch,0));
00439                 }
00440         }
00441         else
00442         {
00443                 switch(Cmd)
00444                 {
00445                 case SCRLAR:
00446                         pASCSET_Data = (pASCSET_Data_t)pData;
00447                         pASCSET_Data->Smd = 0;  // Center screen scroll mode
00448                         GLCD_SendCmd(ASCSET,pData,0);
00449                         return(GLCD_OK);
00450                 case DATCTR:
00451                         pDATCTR_Data = (pDATCTR_Data_t)pData;
00452                         pDATCTR_Data->ML  = 0;
00453                         pDATCTR_Data->MX = !pDATCTR_Data->MX;
00454                         // 4K colors Type A
00455                         pDATCTR_Data->GS  = 2;
00456                         break;
00457                 case SETCON:
00458                         Contrast = *pData | (ResRatio << 8);
00459                         return(GLCD_SendCmd(VOLCTR,(unsigned char *)&Contrast,0));
00460                 case VOLCTR:
00461                         ResRatio = *(pData+1);
00462                         break;
00463                         }
00464                 }
00465
00466         if(pGLCD_CmdCtrl->Param != (uint32_t)-1)
00467         {
00468                 // Command with fixed size of parameters
00469                 Size = pGLCD_CmdCtrl->Param;
00470         }
00471
00472         // Select LCD
00473         GLCD_SPI_ChipSelect(1);
00474
00475         GLCD_SPI_TranserByte(pGLCD_CmdCtrl->Cmd);
00476         if(Cmd == RAMWR)
00477         {
00478                 // enter in write to DRAM mode
00479                 OddPixel = FALSE;
00480                 PixelHold = 0;
00481                 Write2_DRAM = TRUE;
00482                 return(GLCD_SendCmd(RAMWR,pData,Size));
00483         }
00484
00485         // Send/Receive parameters
00486         if(pGLCD_CmdCtrl->Dir == GLCD_READ)
00487         {
00488                 if(pGLCD_CmdCtrl->Pulse)
00489                 {
00490                         if(Size)
00491                         {
00492                                 *pData++ = GLCD_SPI_TranserByte(0xFFFF);
00493                                 --Size;
00494                         }
00495                 }
00496                 GLCD_SPI_SetWordWidth(8);
00497         }
00498
00499         if(pGLCD_CmdCtrl->Dir == GLCD_READ)
00500         {
00501                 GLCD_SPI_ReceiveBlock(pData,Size);
00502         }
00503         else
00504         {
00505                 GLCD_SPI_SendBlock(pData,Size);
00506         }
00507
00508         // Release CS
00509         GLCD_SPI_ChipSelect(0);
00510         if(pGLCD_CmdCtrl->Dir == GLCD_READ)
00511         {
00512                 GLCD_SPI_SetWordWidth(9);
00513         }
00514         return(GLCD_OK);
00515 }
00516
00517 /*************************************************************************
00518  * Function Name: GLCD_PowerUpInit
00519  * Parameters: unsigned char *pInitData
00520  * Return: GLCD_Status_t
00521  *         GLCD_OK - init pass
00522  *         GLCD_ID_ERROR - unsupported driver type
00523  * Description: Power-up initialization of Graphic LCD
00524  *
00525  *************************************************************************/
00526 //GLCD_Status_t GLCD_PowerUpInit (unsigned char *pInitData)
00527 GLCD_Status_t GLCD_PowerUpInit (unsigned char *pInitData)
00528 {
00529         uint32_t Data;
00530         volatile uint32_t i;
00531         pDATCTR_Data_t pDATCTR_Data;
00532         // Init SPI and IO
00533         // Init low level
00534         GLCD_SPI_Init(GLCD_DEF_CLOCK,GLCD_DEF_WIDTH);
00535         GLCD_LLInit();
00536
00537         // H/W Reset
00538         // Rest L > 10us H
00539         GLCD_SetReset(0);
00540         for(i = GLCD_DLY_10US; i ; --i);
00541         GLCD_SetReset(1);
00542
00543         // Wait 5 ms
00544         Dly100us((void *)GLCD_RESET_DLY);
00545         // Identify LCD and command interpreter
00546         Glcd_Iss = GLCD_ISS_0;
00547         GLCD_SendCmd(RDDID,(unsigned char *)&Data,0);
00548         if(((Data & 0xFF) != GLCD_MANF_ID) ||(((Data >> 16)& 0xFF) != GLCD_MOD_ID))
00549         {
00550                 // Iss = 1 don't support RDDID command
00551                 Glcd_Iss = GLCD_ISS_1;
00552         }
00553         // Power Supply Set
00554         if(Glcd_Iss == GLCD_ISS_1)
00555         {
00556                 // Support only 4K colors
00557                 assert(GLCD_DEF_DPL_ML == 0);
00558                 //  DISCTR (Display Control)
00559                 //       - F1/F2 switching period set
00560                 //       - Line inversion set
00561                 Data = 0 | (0x20UL << 8) | (0x11UL << 16);
00562                 GLCD_SendCmd(DISCTR,(unsigned char *)&Data,0);
00563                 //  OSCON (Oscillator ON)
00564                 GLCD_SendCmd(OSCON,NULL,0);
00565                 // Set contrast
00566                 Data = 0x20 | (0x0UL << 8);
00567                 GLCD_SendCmd(VOLCTR,(unsigned char *)&Data,0);
00568         }
00569         else
00570         {
00571                 // Set contrast
00572                 Data = 0x30;
00573                 GLCD_SendCmd(SETCON,(unsigned char *)&Data,0);
00574         }
00575         // SLPOUT (Sleep mode OFF & OSC/Booster On)
00576         GLCD_SendCmd(SLPOUT,NULL,0); // Sleep out
00577         if(Glcd_Iss == GLCD_ISS_0)
00578         {
00579                 GLCD_SendCmd(BSTRON,NULL,0); // Booster voltage on
00580         }
00581         // Display Environment Set
00582         // Display inversion setting
00583         GLCD_SendCmd(GLCD_DEF_DPL_INV?INVON:INVOFF,NULL,0);
00584         // Display color scheme setting
00585         GLCD_SendCmd(GLCD_DEF_DPL_8_COLOR?IDMON:IDMOFF,NULL,0);
00586         // Display partial setting
00587         if(GLCD_DEF_DPL_PARTIAL_MODE)
00588         {
00589                 GLCD_SendCmd(PTLOUT,NULL,0);
00590         }
00591         else
00592         {
00593 #if GLCD_DEF_DPL_PARTIAL_MODE > 0
00594 #error "PARTIAL_MODE not supported yet"
00595 #endif // GLCD_DEF_DPL_PARTIAL_MODE > 0
00596         }
00597         // Memory Data Access Control
00598         Data = 0;
00599         pDATCTR_Data = (pDATCTR_Data_t)&Data;
00600         pDATCTR_Data->RGB = GLCD_DEF_DPL_RGB_ORD;               // BGR / RGB order
00601         /* Because NXP_logo data was generated by reverse row direction so have to set MY = 1 */
00602         pDATCTR_Data->MY = 1;                                                   // no mirror Y
00603         pDATCTR_Data->MX = GLCD_DEF_DPL_MX;                     // no mirror X
00604         pDATCTR_Data->MV = GLCD_DEF_DPL_V;                              // vertical RAM write in Y/X direction
00605         pDATCTR_Data->ML = GLCD_DEF_DPL_ML;                     // line address order (bottom to top) / (top to bottom)
00606         // support only 4k type A colored scheme
00607         GLCD_SendCmd(DATCTR,(unsigned char *)&Data,0);
00608         // Display Data Write & Display On
00609         // COLUMN ADDRESS SET and PAGE ADDRESS SET
00610         Data = 0 | ((GLCD_HORIZONTAL_SIZE - 1)<<8);
00611         GLCD_SendCmd(RASET,(unsigned char *)&Data,0);
00612         GLCD_SendCmd(CASET,(unsigned char *)&Data,0);
00613
00614         // Init display memory
00615         if(pInitData == NULL)
00616         {
00617                 Data = DEF_BACKGND_COLOUR;
00618                 for(i = 0; i < (GLCD_HORIZONTAL_SIZE * GLCD_VERTICAL_SIZE); ++i)
00619     {
00620                         LCD_WRITE_PIXEL(Data);
00621     }
00622                 LCD_FLUSH_PIXELS();
00623         }
00624         else
00625         {
00626                 GLCD_SendCmd(RAMWR,pInitData,GLCD_HORIZONTAL_SIZE * GLCD_VERTICAL_SIZE * 2);
00627         }
00628         if(Glcd_Iss == GLCD_ISS_1)
00629         {
00630                 // PWRCTR
00631                 Data = 0x1F;
00632                 GLCD_SendCmd(PWRCTR,(unsigned char *)&Data,0);
00633         }
00634         // Memory Data Access Control
00635         /* Reset default control mode after drawing */
00636         pDATCTR_Data = (pDATCTR_Data_t)&Data;
00637         pDATCTR_Data->RGB = GLCD_DEF_DPL_RGB_ORD;               // BGR / RGB order
00638         pDATCTR_Data->MY = GLCD_DEF_DPL_MY;                     // no mirror Y
00639         pDATCTR_Data->MX = GLCD_DEF_DPL_MX;                     // no mirror X
00640         pDATCTR_Data->MV = GLCD_DEF_DPL_V;                              // vertical RAM write in Y/X direction
00641         pDATCTR_Data->ML = GLCD_DEF_DPL_ML;                     // line address order (bottom to top) / (top to bottom)
00642         // support only 4k type A colored scheme
00643         GLCD_SendCmd(DATCTR,(unsigned char *)&Data,0);
00644
00645         // Wait for more than 120ms after power control command
00646         Dly100us((void *)GLCD_BOOSTER_ON_DLY);
00647         GLCD_SendCmd(GLCD_DISPLAY_STATE?DISPON:DISPOFF,NULL,0);
00648         return(GLCD_OK);
00649 }
00650
00651 /*************************************************************************
00652  * Function Name: GLCD_SetFont
00653  * Parameters: pFontType_t pFont, LdcPixel_t Color
00654  *              LdcPixel_t BackgndColor
00655  *
00656  * Return: none
00657  *
00658  * Description: Set current font, font color and background color
00659  *
00660  *************************************************************************/
00661 void GLCD_SetFont(pFontType_t pFont, LdcPixel_t Color, LdcPixel_t BackgndColor)
00662 {
00663         pCurrFont = pFont;
00664         TextColour = Color;
00665         TextBackgndColour = BackgndColor;
00666 }
00667
00668 /*************************************************************************
00669  * Function Name: GLCD_SetWindow
00670  * Parameters: uint32_t X_Left, uint32_t Y_Up,
00671  *             uint32_t X_Right, uint32_t Y_Down
00672  *
00673  * Return: none
00674  *
00675  * Description: Set draw window XY coordinate in pixels
00676  *
00677  *************************************************************************/
00678 void GLCD_SetWindow(uint32_t X_Left, uint32_t Y_Up,
00679                     uint32_t X_Right, uint32_t Y_Down)
00680 {
00681         assert(X_Right < GLCD_HORIZONTAL_SIZE);
00682         assert(Y_Down < GLCD_VERTICAL_SIZE);
00683         assert(X_Left < X_Right);
00684         assert(Y_Up < Y_Down);
00685         XL_Win = X_Left;
00686         YU_Win = Y_Up;
00687         XR_Win = X_Right;
00688         YD_Win = Y_Down;
00689 }
00690
00691 /*************************************************************************
00692  * Function Name: GLCD_TextSetPos
00693  * Parameters: uint32_t X_UpLeft, uint32_t Y_UpLeft,
00694  *             uint32_t X_DownLeft, uint32_t Y_DownLeft
00695  *
00696  * Return: none
00697  *
00698  * Description: Set text X,Y coordinate in characters
00699  *
00700  *************************************************************************/
00701 void GLCD_TextSetPos(uint32_t X, uint32_t Y)
00702 {
00703         TextX_Pos = X;
00704         TextY_Pos = Y;
00705 }
00706
00707 /*************************************************************************
00708  * Function Name: GLCD_TextSetTabSize
00709  * Parameters: uint32_t Size
00710  *
00711  * Return: none
00712  *
00713  * Description: Set text tab size in characters
00714  *
00715  *************************************************************************/
00716 void GLCD_TextSetTabSize(uint32_t Size)
00717 {
00718         TabSize = Size;
00719 }
00720
00721 /*************************************************************************
00722  * Function Name: GLCD_TextCalcWindow
00723  * Parameters: pInt32U pXL, pInt32U pXR,
00724  *             pInt32U pYU, pInt32U pYD,
00725  *             pInt32U pH_Size, pInt32U pV_Size
00726  *
00727  * Return: Bool
00728  *          FALSE - out of window coordinate aren't valid
00729  *          TRUE  - the returned coordinate are valid
00730  *
00731  * Description: Calculate character window
00732  *
00733  *************************************************************************/
00734 static Bool GLCD_TextCalcWindow (unsigned int *pXL, unsigned int *pXR,
00735                              unsigned int *pYU, unsigned int *pYD,
00736                              unsigned int *pH_Size, unsigned int *pV_Size)
00737 {
00738         *pH_Size = pCurrFont->H_Size;
00739         *pV_Size = pCurrFont->V_Size;
00740         *pXL = XL_Win + (TextX_Pos*pCurrFont->H_Size);
00741         if(*pXL > XR_Win)
00742         {
00743                 return(FALSE);
00744         }
00745         *pYU = YU_Win + (TextY_Pos*pCurrFont->V_Size);
00746         if(*pYU > YD_Win)
00747         {
00748                 return(FALSE);
00749         }
00750
00751         *pXR   = XL_Win + ((TextX_Pos+1)*pCurrFont->H_Size) - 1;
00752         if(*pXR > XR_Win)
00753         {
00754                 *pH_Size -= *pXR - XR_Win;
00755                 *pXR = XR_Win;
00756         }
00757
00758         *pYD = YU_Win + ((TextY_Pos+1)*pCurrFont->V_Size) - 1;
00759         if(*pYD > YD_Win)
00760         {
00761                 *pV_Size -= *pYD - YD_Win;
00762                 *pYD = YD_Win;
00763         }
00764
00765         return(TRUE);
00766 }
00767
00768 /*************************************************************************
00769  * Function Name: GLCD_putchar
00770  * Parameters: int c
00771  *
00772  * Return: none
00773  *
00774  * Description: Put char function
00775  *
00776  *************************************************************************/
00777 int GLCD_putchar (int c)
00778 {
00779         unsigned char *pSrc;
00780         uint32_t H_Line, i, j, k;
00781         uint32_t xl,xr,yu,yd,Temp,V_Size, H_Size, SrcInc = 1;
00782         uint32_t WhiteSpaceNumb;
00783         if(pCurrFont == NULL)
00784         {
00785                 return(-1);
00786         }
00787         H_Line = (pCurrFont->H_Size / 8) + ((pCurrFont->H_Size % 8)?1:0);
00788         switch(c)
00789         {
00790         case '\n':  // go to start of next line (NewLine)
00791                 ++TextY_Pos;
00792                 break;
00793         case '\r':  // go to start of this line (Carriage Return)
00794                 // clear from current position to end of line
00795                 while(GLCD_TextCalcWindow(&xl,&xr,&yu,&yd,&H_Size,&V_Size))
00796                 {
00797                         LCD_SET_WINDOW(xl,xr,yu,yd);
00798                         for(i = 0; i < V_Size; ++i)
00799                         {
00800                                 for(j = 0; j < H_Size; ++j)
00801                                 {
00802                                         LCD_WRITE_PIXEL(TextBackgndColour);
00803                                 }
00804                         }
00805                         ++TextX_Pos;
00806                 }
00807                 TextX_Pos = 0;
00808                 break;
00809         case '\b': // go back one position (BackSpace)
00810                 if(TextX_Pos)
00811                 {
00812                         --TextX_Pos;
00813                         // del current position
00814                         if(GLCD_TextCalcWindow(&xl,&xr,&yu,&yd,&H_Size,&V_Size))
00815                         {
00816                                 LCD_SET_WINDOW(xl,xr,yu,yd);
00817                                 for(i = 0; i < V_Size; ++i)
00818                                 {
00819                                         for(j = 0; j < H_Size; ++j)
00820                                         {
00821                                                 LCD_WRITE_PIXEL(TextBackgndColour);
00822                                         }
00823                                 }
00824                         }
00825                 }
00826                 break;
00827         case '\t':  // go to next Horizontal Tab stop
00828                 WhiteSpaceNumb = TabSize - (TextX_Pos%TabSize);
00829                 for(k = 0; k < WhiteSpaceNumb; ++k)
00830                 {
00831                         LCD_SET_WINDOW(xl,xr,yu,yd);
00832                         if(GLCD_TextCalcWindow(&xl,&xr,&yu,&yd,&H_Size,&V_Size))
00833                         {
00834                                 for(i = 0; i < V_Size; ++i)
00835                                 {
00836                                         for(j = 0; j < H_Size; ++j)
00837                                         {
00838                                                 LCD_WRITE_PIXEL(TextBackgndColour);
00839                                         }
00840                                 }
00841                                 ++TextX_Pos;
00842                         }
00843                         else
00844                         {
00845                                 break;
00846                         }
00847                 }
00848                 break;
00849         case '\f':  // go to top of page (Form Feed)
00850                 // clear entire window
00851                 H_Size = XR_Win - XL_Win;
00852                 V_Size = YD_Win - YU_Win;
00853                 // set character window X left, Y right
00854                 LCD_SET_WINDOW(XL_Win,XR_Win,YU_Win,YD_Win);
00855                 // Fill window with background font color
00856                 for(i = 0; i <= V_Size; ++i)
00857                 {
00858                         for(j = 0; j <= H_Size; ++j)
00859                         {
00860                                 LCD_WRITE_PIXEL(TextBackgndColour);
00861                         }
00862                 }
00863
00864                 TextX_Pos = TextY_Pos = 0;
00865                 break;
00866         case '\a':  // signal an alert (BELl)
00867                 TEXT_BEL1_FUNC();
00868                 break;
00869         default:
00870                 // Calculate the current character base address from stream
00871                 // and the character position
00872                 if((c <  pCurrFont->CharacterOffset) && (c >= pCurrFont->CharactersNuber))
00873                 {
00874                         c = 0;
00875                 }
00876                 else
00877                 {
00878                         c -= pCurrFont->CharacterOffset;
00879                 }
00880                 pSrc = pCurrFont->pFontStream + (H_Line * pCurrFont->V_Size * c);
00881                 // Calculate character window and fit it in the text window
00882                 if(GLCD_TextCalcWindow(&xl,&xr,&yu,&yd,&H_Size,&V_Size))
00883                 {
00884                         // set character window X left, Y right
00885                         LCD_SET_WINDOW(xl,xr,yu,yd);
00886                         // Send char data
00887                         for(i = 0; i < V_Size; ++i)
00888                         {
00889                                 SrcInc = H_Line;
00890                                 for(j = 0; j < H_Size; ++j)
00891                                 {
00892                                         Temp = (*pSrc & (1UL << (j&0x7)))?TextColour:TextBackgndColour;
00893                                         LCD_WRITE_PIXEL(Temp);
00894                                         if((j&0x7) == 7)
00895                                         {
00896                                                 ++pSrc;
00897                                                 --SrcInc;
00898                                         }
00899                                 }
00900                                 // next line of character
00901                                 pSrc += SrcInc;
00902                         }
00903                 }
00904                 ++TextX_Pos;
00905         }
00906         LCD_FLUSH_PIXELS();
00907         return(c);
00908 }
00909
00910 /*************************************************************************
00911  * Function Name: GLCD_print
00912  * Parameters: int c
00913  *
00914  * Return: none
00915  *
00916  * Description: Put char function
00917  *
00918  *************************************************************************/
00919 void GLCD_print (const char *fmt)
00920 {
00921         while(0 != *fmt)
00922         {
00923                 if(-1 == GLCD_putchar(*fmt++))
00924                 {
00925                         break;
00926                 }
00927         }
00928 }
Generated on Tue Jun 7 14:59:01 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/LCD/NOKIA6610_LCD/drv_glcd.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/LCD/NOKIA6610_LCD/drv_glcd.h

Go to the documentation of this file.
00001 /*************************************************************************
00002  *
00003  *
00004  *    (c) Copyright IAR Systems 2006
00005  *
00006  *    File name   : drv_glcd.h
00007  *    Description : Graphic LCD driver include file
00008  *
00009  *    History :
00010  *    1. Date        : December 2, 2006
00011  *       Author      : Stanimir Bonev
00012  *       Description : Create
00013  *
00014  *    $Revision: 28532 $
00015  **************************************************************************/
00016 #include "drv_glcd_cnfg.h"
00017 #include "lpc_types.h"
00018
00019 #ifndef  __DRV_GLCD_H
00020 #define  __DRV_GLCD_H
00021
00022 #define DEF_X_LEFT              0
00023 #define DEF_Y_UP                0
00024 #define DEF_X_RIGHT             GLCD_HORIZONTAL_SIZE
00025 #define DEF_Y_DOWN              GLCD_VERTICAL_SIZE
00026 #define DEF_FONT_COLOUR         0x000000
00027 #define DEF_BACKGND_COLOUR      0x00FF0
00028 #define TEXT_DEF_TAB_SIZE       4
00029
00030 #define MAX_GLCD_STR_SIZE   256
00031 // External function
00032 #define TEXT_BEL1_FUNC()         // generate BEL signal
00033
00034 // Set window
00035 #define LCD_SET_WINDOW(xl,xr,yu,yd) \
00036 {\
00037 uint32_t Temp;\
00038   Temp = xl | (xr<<8);\
00039   GLCD_SendCmd(CASET,(unsigned char*)&Temp,0);\
00040   Temp = (yu+2) | ((yd+2)<<8);\
00041   GLCD_SendCmd(RASET,(unsigned char*)&Temp,0);\
00042 }
00043
00044 // Send pixel
00045 #define LCD_WRITE_PIXEL(c) GLCD_SendCmd(RAMWR,(unsigned char*)&c,2)
00046
00047 // Flush pixels
00048 #define LCD_FLUSH_PIXELS() GLCD_SendCmd(NOP,NULL,0)
00049
00050 #define GLCD_MANF_ID 0x45
00051 #define GLCD_MOD_ID  0x03
00052
00053 #define WAITED_PIXEL 0x80000000
00054
00055 #define PIXEL_CONV(Pixel,Order) (!Order)?(((Pixel >> 4) & 0xFF) | ((Pixel << 12) & 0xF000)):(((Pixel << 16) & 0xFF0000) | ((Pixel) & 0xF00))
00056 // PCF8833 status register
00057 #define PCF8833_ST_BOOSTER_ON     (1UL <<  7)
00058 #define PCF8833_ST_Y_ADDR_ODR     (1UL <<  6)
00059 #define PCF8833_ST_X_ADDR_ODR     (1UL <<  5)
00060 #define PCF8833_ST_ADDR_MODE      (1UL <<  4)
00061 #define PCF8833_ST_LINE_ADDR_ORD  (1UL <<  3)
00062 #define PCF8833_ST_RGB_ORD        (1UL <<  2)
00063 #define PCF8833_ST_PIXEL_FORM     (7UL << 12)
00064 #define PCF8833_ST_IDLE_MODE      (1UL << 11)
00065 #define PCF8833_ST_PARTIAL_MODE   (1UL << 10)
00066 #define PCF8833_ST_SLEEP_MODE     (1UL <<  9)
00067 #define PCF8833_ST_NORM_MODE      (1UL <<  8)
00068 #define PCF8833_ST_V_SCROLL_MODE  (1UL << 23)
00069 #define PCF8833_ST_INV_MODE       (1UL << 21)
00070 #define PCF8833_ST_ALL_PIXELS_ON  (1UL << 20)
00071 #define PCF8833_ST_ALL_PIXELS_OFF (1UL << 19)
00072 #define PCF8833_ST_DISPLAY_MODE   (1UL << 18)
00073 #define PCF8833_ST_TEARING_MODE   (1UL << 17)
00074
00075 // GLCD command interpreter type
00076 typedef enum _GLCD_ISS_t {
00077         GLCD_ISS_0 = 0, GLCD_ISS_1
00078 } GLCD_ISS_t;
00079
00080 // execution status
00081 typedef enum _GLCD_Status_t {
00082         GLCD_OK = 0, GLCD_ID_ERROR, GLCD_UNSUPPORTED, GLCD_ERROR
00083 } GLCD_Status_t;
00084
00085 // GCLD command set
00086 typedef enum _GLCD_Cmd_t {
00087         // Equal commands
00088         NOP, SLPIN, SLPOUT, PTLOUT, INVOFF, INVON,
00089         DISPOFF, DISPON, CASET, RASET, RAMWR, RGBSET, VSCSAD,
00090         IDMOFF, IDMON, RDID1, RDID2, RDID3, FRMSEL, FRM8SEL, TMPRNG,
00091         TMPHIS, TMPREAD, EPWRIN, EPWROUT, RDEV, RDRR,
00092   // Adapted commands
00093   PTIN,         // ISS=0 equal on PTLAR + PTIN
00094   SCRLAR,       // ISS=1 ASCSET mode 0
00095   DATCTR,       // ISS=0 equal on MADCTR + COLMOD
00096   SETCON, //
00097   // Commands applicable only when ISS=1
00098   OSCON, OSCOFF, RMWIN, RMWOUT, VOLUP, VOLDOWN, ASCSET, DISCTR,
00099   PWRCTR, VOLCTR,
00100   // Commands applicable only when ISS=0
00101   CLKINT, CLKEXT, RDDST, SWRESET, RDDID, PTLAR, PTLON, MADCTR,
00102   COLMOD, APOFF, APON, BSTROFF, BSTRON,
00103         GLCD_CMD_NUMB
00104 } GLCD_Cmd_t;
00105
00106 // Command direction
00107 typedef enum _GLCD_CmdDir_t {
00108         GLCD_WRITE = 0, GLCD_READ
00109 } GLCD_CmdDir_t;
00110
00111 // Data flag
00112 #define GLCD_DATA                                     0x100
00113
00114 // Invalid command (some commands don't have analog in other
00115 // command mode interpreter)
00116 #define GLCD_INV_CMD                                    ((uint32_t)(-1))
00117
00118 #define GLCD_MAX_COTRAST   63
00119 #define GLCD_MIN_COTRAST  -64
00120
00121 typedef struct _GLCD_CmdCtrl_t {
00122         uint32_t        Cmd;
00123         GLCD_CmdDir_t   Dir;
00124         Bool            Pulse;
00125         uint32_t                Param;
00126 } GLCD_CmdCtrl_t, *pGLCD_CmdCtrl_t;
00127
00128 #pragma pack(1)
00129 typedef struct _ASCSET_Data_t {
00130         uint8_t Ssl;
00131         uint8_t Sel;
00132         uint8_t Sfl;
00133         uint8_t Smd;
00134 } ASCSET_Data_t, *pASCSET_Data_t;
00135
00136 #if defined ( __CC_ARM   )
00137 #pragma anon_unions
00138 #endif
00139
00140 typedef struct _DATCTR_Data_t {
00141         union
00142         {
00143                 uint8_t RC_AddMode;
00144                 struct
00145                 {
00146                         uint8_t MY : 1;
00147                         uint8_t MX : 1;
00148                         uint8_t MV : 1;
00149                         uint8_t ML : 1;
00150                         uint8_t : 4;
00151                 };
00152         };
00153         union
00154         {
00155                 uint8_t RGB_Mode;
00156                 struct
00157                 {
00158                         uint8_t RGB : 1;
00159                         uint8_t : 7;
00160                 };
00161         };
00162         union
00163         {
00164                 uint8_t GrayScale;
00165                 struct
00166                 {
00167                         uint8_t GS  : 3;
00168                         uint8_t Reversed: 5;
00169                 };
00170         };
00171 } DATCTR_Data_t, *pDATCTR_Data_t;
00172
00173 typedef struct _MADCTR_Data_t {
00174         union
00175         {
00176                 uint8_t MemDataAccCtrl;
00177                 struct
00178                 {
00179                         uint8_t Reversed: 3;
00180                         uint8_t RGB : 1;
00181                         uint8_t ML  : 1;
00182                         uint8_t MV  : 1;
00183                         uint8_t MX  : 1;
00184                         uint8_t MY  : 1;
00185                 };
00186         };
00187 } MADCTR_Data_t, *pMADCTR_Data_t;
00188
00189
00190 typedef struct _COLMOD_Data_t {
00191         union
00192         {
00193                 uint8_t ColourMode;
00194                 struct
00195                 {
00196                         uint8_t Mode    : 3;
00197                         uint8_t Reversed : 5;
00198                 };
00199         };
00200 } COLMOD_Data_t, *pCOLMOD_Data_t;
00201 #pragma pack()
00202
00203 typedef uint32_t LdcPixel_t, *pLdcPixel_t;
00204
00205 typedef struct _FontType_t {
00206   uint32_t H_Size;
00207   uint32_t V_Size;
00208   uint32_t CharacterOffset;
00209   uint32_t CharactersNuber;
00210   unsigned char *pFontStream;
00211   unsigned char *pFontDesc;
00212 } FontType_t, *pFontType_t;
00213
00214 typedef struct _Bmp_t {
00215   uint32_t  H_Size;
00216   uint32_t  V_Size;
00217   uint32_t  BitsPP;
00218   uint32_t  BytesPP;
00219   unsigned int *pPalette;
00220   unsigned int *pPicStream;
00221   unsigned char *pPicDesc;
00222 } Bmp_t, *pBmp_t;
00223
00224 extern void Dly100us(void *arg);
00225
00226 /*************************************************************************
00227  * Function Name: GLCD_SendCmd
00228  * Parameters: GLCD_Cmd_t Cmd, unsigned char* pData, uint32_t Size
00229  * Return: GLCD_Status_t
00230  *
00231  * Description: Send command to the Graphic LCD
00232  *
00233  *************************************************************************/
00234 GLCD_Status_t GLCD_SendCmd (GLCD_Cmd_t Cmd, unsigned char *pData, uint32_t Size);
00235
00236 /*************************************************************************
00237  * Function Name: GLCD_PowerUpInit
00238  * Parameters: unsigned char* pInitData
00239  * Return: GLCD_Status_t
00240  *         GLCD_OK - init pass
00241  *                               GLCD_ID_ERROR - unsupported driver type
00242  * Description: Power-up initialization of Graphic LCD
00243  *
00244  *************************************************************************/
00245 //GLCD_Status_t GLCD_PowerUpInit (unsigned char *pInitData);
00246 GLCD_Status_t GLCD_PowerUpInit (unsigned char *pInitData);
00247
00248 /*************************************************************************
00249  * Function Name: GLCD_SetFont
00250  * Parameters: pFontType_t pFont, LdcPixel_t Color
00251  *              LdcPixel_t BackgndColor
00252  *
00253  * Return: none
00254  *
00255  * Description: Set current font, font color and background color
00256  *
00257  *************************************************************************/
00258 void GLCD_SetFont(pFontType_t pFont,
00259                   LdcPixel_t Color, LdcPixel_t BackgndColor);
00260
00261 /*************************************************************************
00262  * Function Name: GLCD_SetWindow
00263  * Parameters: uint32_t X_Left, uint32_t Y_Up,
00264  *             uint32_t X_Right, uint32_t Y_Down
00265  *
00266  * Return: none
00267  *
00268  * Description: Set draw window XY coordinate in pixels
00269  *
00270  *************************************************************************/
00271 void GLCD_SetWindow(uint32_t X_Left, uint32_t Y_Up,
00272                     uint32_t X_Right, uint32_t Y_Down);
00273
00274 /*************************************************************************
00275  * Function Name: GLCD_TextSetPos
00276  * Parameters: uint32_t X_UpLeft, uint32_t Y_UpLeft,
00277  *             uint32_t X_DownLeft, uint32_t Y_DownLeft
00278  *
00279  * Return: none
00280  *
00281  * Description: Set text X,Y coordinate in characters
00282  *
00283  *************************************************************************/
00284 void GLCD_TextSetPos(uint32_t X, uint32_t Y);
00285
00286 /*************************************************************************
00287  * Function Name: GLCD_TextSetTabSize
00288  * Parameters: uint32_t Size
00289  *
00290  * Return: none
00291  *
00292  * Description: Set text tab size in characters
00293  *
00294  *************************************************************************/
00295 void GLCD_TextSetTabSize(uint32_t Size);
00296
00297 /*************************************************************************
00298  * Function Name: GLCD_TextCalcWindow
00299  * Parameters: pInt32U pXL, pInt32U pXR,
00300  *             pInt32U pYU, pInt32U pYD,
00301  *             pInt32U pH_Size, pInt32U pV_Size
00302  *
00303  * Return: Boolean
00304  *          FALSE - out of window coordinate aren't valid
00305  *          TRUE  - the returned coordinate are valid
00306  *
00307  * Description: Calculate character window
00308  *
00309  *************************************************************************/
00310 static Bool GLCD_TextCalcWindow (unsigned int *pXL, unsigned int *pXR,
00311                 unsigned int *pYU, unsigned int *pYD,
00312                 unsigned int *pH_Size, unsigned int *pV_Size);
00313
00314 /*************************************************************************
00315  * Function Name: GLCD_putchar
00316  * Parameters: int c
00317  *
00318  * Return: none
00319  *
00320  * Description: Put char function
00321  *
00322  *************************************************************************/
00323 int GLCD_putchar (int c);
00324
00325 /*************************************************************************
00326  * Function Name: GLCD_print
00327  * Parameters: int c
00328  *
00329  * Return: none
00330  *
00331  * Description: Put char function
00332  *
00333  *************************************************************************/
00334 void GLCD_print (const char *fmt);
00335
00336 #endif  /* __DRV_GLCD_H */
Generated on Tue Jun 7 14:59:01 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/LCD/NOKIA6610_LCD/drv_glcd_cnfg.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/LCD/NOKIA6610_LCD/drv_glcd_cnfg.h

Go to the documentation of this file.
00001 /*************************************************************************
00002  *
00003  *
00004  *    (c) Copyright IAR Systems 2006
00005  *
00006  *    File name   : drv_glcd_cnfg.h
00007  *    Description : Graphic LCD config file
00008  *
00009  *    History :
00010  *    1. Date        : December 2, 2006
00011  *       Author      : Stanimir Bonev
00012  *       Description : Create
00013  *
00014  *    $Revision: 28532 $
00015  **************************************************************************/
00016
00017 #ifndef  __DRV_GLCD_CNFG_H
00018 #define  __DRV_GLCD_CNFG_H
00019
00020 // GLCD DRV Default setup data
00021 // SPI0 default clock
00022 #define GLCD_DEF_CLOCK            (1000000UL)
00023 // SPI0 default data width
00024 #define GLCD_DEF_WIDTH             9
00025 // Horizontal Size of display [Pixels]
00026 #define GLCD_HORIZONTAL_SIZE       132
00027 // Vertical Size of display [Pixels]
00028 #define GLCD_VERTICAL_SIZE           132
00029 // Display On/Off 1/0
00030 #define GLCD_DISPLAY_STATE         1
00031 // Default Display inversion setting
00032 #define GLCD_DEF_DPL_INV           1
00033 // Default Display color scheme
00034 #define GLCD_DEF_DPL_8_COLOR       0
00035 // Default Display Partial mode
00036 #define GLCD_DEF_DPL_PARTIAL_MODE  0
00037 // Default Display Row direction
00038 #define GLCD_DEF_DPL_MY            0
00039 // Default Display column direction
00040 #define GLCD_DEF_DPL_MX            1
00041 // Default Display address direction
00042 #define GLCD_DEF_DPL_V             0
00043 // Default Display scan direction
00044 #define GLCD_DEF_DPL_ML            0
00045 // Default Display RGB order
00046 #define GLCD_DEF_DPL_RGB_ORD       0
00047
00048 #endif  /* __DRV_GLCD_CNFG_H */
Generated on Tue Jun 7 14:59:01 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/Easy_Web/easyweb.c Source File

C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/Easy_Web/easyweb.c

Go to the documentation of this file.
00001 /******************************************************************
00002  *****                                                        *****
00003  *****  Name: easyweb.c                                       *****
00004  *****  Ver.: 1.0                                             *****
00005  *****  Date: 07/05/2001                                      *****
00006  *****  Auth: Andreas Dannenberg                              *****
00007  *****        HTWK Leipzig                                    *****
00008  *****        university of applied sciences                  *****
00009  *****        Germany                                         *****
00010  *****  Func: implements a dynamic HTTP-server by using       *****
00011  *****        the easyWEB-API                                 *****
00012  *****                                                        *****
00013  ******************************************************************/
00014
00015 #include <stdlib.h>
00016 #include <stdio.h>
00017 #include <string.h>
00018 #include "adc.h"
00019 #include "lpc17xx_libcfg.h"
00020 #include "EMAC.h"         // Keil: *.c -> *.h    // ethernet packet driver
00021 #define extern            // Keil: Line added for modular project management
00022
00023 #include "easyweb.h"
00024 #include "tcpip.h"        // Keil: *.c -> *.h    // easyWEB TCP/IP stack
00025 #include "webpage.h"                             // webside for our HTTP server (HTML)
00026
00027 /* Example group ----------------------------------------------------------- */
00033 // NXP: Include some header files that differs from the origin
00034 int main(void)
00035 {
00036   TCPLowLevelInit();
00037   HTTPStatus = 0;                                // clear HTTP-server's flag register
00038
00039   TCPLocalPort = TCP_PORT_HTTP;                  // set port we want to listen to
00040
00041   while (1)                                      // repeat forever
00042   {
00043     if (!(SocketStatus & SOCK_ACTIVE)) TCPPassiveOpen();   // listen for incoming TCP-connection
00044     DoNetworkStuff();                                      // handle network and easyWEB-stack
00045                                                            // events
00046     HTTPServer();
00047   }
00048 }
00049
00050 // This function implements a very simple dynamic HTTP-server.
00051 // It waits until connected, then sends a HTTP-header and the
00052 // HTML-code stored in memory. Before sending, it replaces
00053 // some special strings with dynamic values.
00054 // NOTE: For strings crossing page boundaries, replacing will
00055 // not work. In this case, simply add some extra lines
00056 // (e.g. CR and LFs) to the HTML-code.
00057
00058 void HTTPServer(void)
00059 {
00060   if (SocketStatus & SOCK_CONNECTED)             // check if somebody has connected to our TCP
00061   {
00062     if (SocketStatus & SOCK_DATA_AVAILABLE)      // check if remote TCP sent data
00063       TCPReleaseRxBuffer();                      // and throw it away
00064
00065     if (SocketStatus & SOCK_TX_BUF_RELEASED)     // check if buffer is free for TX
00066     {
00067       if (!(HTTPStatus & HTTP_SEND_PAGE))        // init byte-counter and pointer to webside
00068       {                                          // if called the 1st time
00069         HTTPBytesToSend = sizeof(WebSide) - 1;   // get HTML length, ignore trailing zero
00070         PWebSide = (unsigned char *)WebSide;     // pointer to HTML-code
00071       }
00072
00073       if (HTTPBytesToSend > MAX_TCP_TX_DATA_SIZE)     // transmit a segment of MAX_SIZE
00074       {
00075         if (!(HTTPStatus & HTTP_SEND_PAGE))           // 1st time, include HTTP-header
00076         {
00077           memcpy(TCP_TX_BUF, GetResponse, sizeof(GetResponse) - 1);
00078           memcpy(TCP_TX_BUF + sizeof(GetResponse) - 1, PWebSide, MAX_TCP_TX_DATA_SIZE - sizeof(GetResponse) + 1);
00079           HTTPBytesToSend -= MAX_TCP_TX_DATA_SIZE - sizeof(GetResponse) + 1;
00080           PWebSide += MAX_TCP_TX_DATA_SIZE - sizeof(GetResponse) + 1;
00081         }
00082         else
00083         {
00084           memcpy(TCP_TX_BUF, PWebSide, MAX_TCP_TX_DATA_SIZE);
00085           HTTPBytesToSend -= MAX_TCP_TX_DATA_SIZE;
00086           PWebSide += MAX_TCP_TX_DATA_SIZE;
00087         }
00088
00089         TCPTxDataCount = MAX_TCP_TX_DATA_SIZE;   // bytes to xfer
00090         InsertDynamicValues();                   // exchange some strings...
00091         TCPTransmitTxBuffer();                   // xfer buffer
00092       }
00093       else if (HTTPBytesToSend)                  // transmit leftover bytes
00094       {
00095         memcpy(TCP_TX_BUF, PWebSide, HTTPBytesToSend);
00096         TCPTxDataCount = HTTPBytesToSend;        // bytes to xfer
00097         InsertDynamicValues();                   // exchange some strings...
00098         TCPTransmitTxBuffer();                   // send last segment
00099         TCPClose();                              // and close connection
00100         HTTPBytesToSend = 0;                     // all data sent
00101       }
00102
00103       HTTPStatus |= HTTP_SEND_PAGE;              // ok, 1st loop executed
00104     }
00105   }
00106   else
00107     HTTPStatus &= ~HTTP_SEND_PAGE;               // reset help-flag if not connected
00108 }
00109
00110 // samples and returns the AD-converter value of channel 2 (MCB1700 board) or channel 5 (IAR board)
00111
00112 unsigned int GetAD7Val(void)
00113 {
00114         unsigned int val;
00115         ADC_startCnv();
00116         val = ADC_getCnv();
00117         ADC_stopCnv();
00118         return (val/40);
00119 }
00120
00121 // samples and returns AD-converter value of channel 1
00122
00123 unsigned int GetTempVal(void)
00124 {
00125         // Always return (0)
00126         return (0);
00127 }
00128
00129
00130 // searches the TX-buffer for special strings and replaces them
00131 // with dynamic values (AD-converter results)
00132
00133 void InsertDynamicValues(void)
00134 {
00135   unsigned char *Key;
00136            char NewKey[5];
00137   unsigned int i;
00138
00139   if (TCPTxDataCount < 4) return;                     // there can't be any special string
00140
00141   Key = TCP_TX_BUF;
00142
00143   for (i = 0; i < (TCPTxDataCount - 3); i++)
00144   {
00145     if (*Key == 'A')
00146      if (*(Key + 1) == 'D')
00147        if (*(Key + 3) == '%')
00148          switch (*(Key + 2))
00149          {
00150            case '7' :                                 // "AD7%"?
00151            {
00152              sprintf(NewKey, "%3u", GetAD7Val());     // insert AD converter value
00153              memcpy(Key, NewKey, 3);                  // channel 7 (P6.7)
00154              break;
00155            }
00156            case 'A' :                                 // "ADA%"?
00157            {
00158              sprintf(NewKey, "%3u", GetTempVal());    // insert AD converter value
00159              memcpy(Key, NewKey, 3);                  // channel 10 (temp.-diode)
00160              break;
00161            }
00162          }
00163     Key++;
00164   }
00165 }
00166
00167 #ifdef  DEBUG
00168 /*******************************************************************************
00169 * @brief                Reports the name of the source file and the source line number
00170 *                               where the CHECK_PARAM error has occurred.
00171 * @param[in]    file Pointer to the source file name
00172 * @param[in]    line assert_param error line source number
00173 * @return               None
00174 *******************************************************************************/
00175 void check_failed(uint8_t *file, uint32_t line)
00176 {
00177         /* User can add his own implementation to report the file name and line number,
00178          ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
00179
00180         /* Infinite loop */
00181         while(1);
00182 }
00183 #endif
00184
00185 /*
00186  * @}
00187  */
Generated on Tue Jun 7 14:58:59 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/Easy_Web/easyweb.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/Easy_Web/easyweb.h

Go to the documentation of this file.
00001 /******************************************************************
00002  *****                                                        *****
00003  *****  Name: easyweb.h                                       *****
00004  *****  Ver.: 1.0                                             *****
00005  *****  Date: 07/05/2001                                      *****
00006  *****  Auth: Andreas Dannenberg                              *****
00007  *****        HTWK Leipzig                                    *****
00008  *****        university of applied sciences                  *****
00009  *****        Germany                                         *****
00010  *****  Func: header-file for easyweb.c                       *****
00011  *****                                                        *****
00012  ******************************************************************/
00013
00014 #ifndef __EASYWEB_H
00015 #define __EASYWEB_H
00016
00017 const unsigned char GetResponse[] =              // 1st thing our server sends to a client
00018 {
00019   "HTTP/1.0 200 OK\r\n"                          // protocol ver 1.0, code 200, reason OK
00020   "Content-Type: text/html\r\n"                  // type of data we want to send
00021   "\r\n"                                         // indicate end of HTTP-header
00022 };
00023
00024 void InitOsc(void);                              // prototypes
00025 void InitPorts(void);
00026 void HTTPServer(void);
00027 void InsertDynamicValues(void);
00028 unsigned int GetAD7Val(void);
00029 unsigned int GetTempVal(void);
00030
00031 unsigned char *PWebSide;                         // pointer to webside
00032 unsigned int HTTPBytesToSend;                    // bytes left to send
00033
00034 unsigned char HTTPStatus;                        // status byte
00035 #define HTTP_SEND_PAGE               0x01        // help flag
00036
00037 #endif
00038
Generated on Tue Jun 7 14:58:59 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/EmacRaw/emactest.c Source File

C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/EmacRaw/emactest.c

Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          emactest.c                              2010-05-21
00003 */
00025 #include "string.h"
00026 #include "crc32.h"
00027 #include "lpc17xx_emac.h"
00028 #include "lpc17xx_gpio.h"
00029 #include "lpc17xx_pinsel.h"
00030 #include "lpc17xx_libcfg.h"
00031
00032 /* For debugging... */
00033 #include "debug_frmwrk.h"
00034 #include <stdio.h>
00035
00036 /* Example group ----------------------------------------------------------- */
00042 /* CONFIGURABLE MACROS ----------------------------------------------- */
00043 /* For the EMAC test, there are two ways to test:
00044         - TX_ONLY and BOUNCE_RX flags can be set one at a time, not both.
00045         When TX_ONLY is set to 1, it's a TX_ONLY packet from the MCB1700
00046         board to the LAN. Use the traffic analyzer such as ethereal, once
00047         the program is running, the packets can be monitored on the traffic
00048         analyzer.
00049         - When BOUNCE_RX is set to 1 (TX_ONLY needs to reset to 0), it's a
00050         test to test both TX and RX, use the traffic generator/analyzer,
00051         you can creat a packet with the destination address as that on the
00052         MCB1700 board, use the traffic generator to send packets, as long
00053         as the destination address matches, MCB1700 will reverse the source
00054         and destination address and send the packets back on the network.
00055         ENABLE_WOL flag is used to test power down and WOL functionality.
00056         BOUNCE_RX flag needs to be set to 1 when WOL is being tested.
00057 */
00058 #define TX_ONLY                         0
00059 #define BOUNCE_RX                       1
00060 #define ENABLE_WOL                      1
00061 #define ENABLE_HASH                     1
00062
00063
00064 #if TX_ONLY
00065 /* This is the MAC address of LPC1768 */
00066 #define EMAC_ADDR12             0x0000101F
00067 #define EMAC_ADDR34             0x0000E012
00068 #define EMAC_ADDR56             0x00001D0C
00069 /* A pseudo destination MAC address is defined for
00070  * both TX_ONLY and BOUNCE_RX test */
00071 #define EMAC_DST_ADDR12         0x0000E386
00072 #define EMAC_DST_ADDR34         0x00006BDA
00073 #define EMAC_DST_ADDR56         0x00005000
00074 #endif
00075
00076 #if BOUNCE_RX
00077 /* This is the MAC address of LPC1768 */
00078 #define EMAC_ADDR12             0x0000E386
00079 #define EMAC_ADDR34             0x00006BDA
00080 #define EMAC_ADDR56             0x00005000
00081 /* A pseudo destination MAC address is defined for
00082  * both TX_ONLY and BOUNCE_RX test */
00083 #define EMAC_DST_ADDR12         0x0000101F
00084 #define EMAC_DST_ADDR34         0x0000E012
00085 #define EMAC_DST_ADDR56         0x00001D0C
00086 #endif
00087
00088 /* LED definitions */
00089 #define PD_LED_PIN              (1<<6)
00090 #define TX_LED_PIN              (1<<5)
00091 #define RX_LED_PIN              (1<<4)
00092 #define KB_LED_PIN              (1<<3)
00093 #define BLINK_LED_PIN   (1<<2)
00094 #define LED2_MASK               ((1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6))
00095 #define LED1_MASK               ((1<<28) | (1<<29) | (1<<31))
00096
00097
00098 /* INTERNAL MACROS ----------------------------------------------- */
00099
00100 #define TX_PACKET_SIZE          114
00101
00102 #define MYMAC_1         ((EMAC_ADDR12 & 0xFF00) >> 8)
00103 #define MYMAC_2         ((EMAC_ADDR12 & 0xFF))
00104 #define MYMAC_3         ((EMAC_ADDR34 & 0xFF00) >> 8)
00105 #define MYMAC_4         ((EMAC_ADDR34 & 0xFF))
00106 #define MYMAC_5         ((EMAC_ADDR56 & 0xFF00) >> 8)
00107 #define MYMAC_6         ((EMAC_ADDR56 & 0xFF))
00108
00109 #define DB      _DBG((uint8_t *)db_)
00110
00111
00112 /*  PRIVATE VARIABLES ----------------------------------------------- */
00113 char db_[64];
00114
00115 #ifdef __IAR_SYSTEMS_ICC__
00116 /* Global Tx Buffer data */
00117 #pragma data_alignment=4
00118 uint8_t gTxBuf[TX_PACKET_SIZE + 0x10];
00119 /* Global Rx Buffer data */
00120 #pragma data_alignment=4
00121 uint8_t gRxBuf[TX_PACKET_SIZE + 0x10];
00122 #else
00123 /* Global Tx Buffer data */
00124 uint8_t __attribute__ ((aligned (4))) gTxBuf[TX_PACKET_SIZE + 0x10];
00125 /* Global Rx Buffer data */
00126 uint8_t __attribute__ ((aligned (4))) gRxBuf[TX_PACKET_SIZE + 0x10];
00127 #endif
00128
00129 /* EMAC address */
00130 uint8_t EMACAddr[] = {MYMAC_6, MYMAC_5, MYMAC_4, MYMAC_3, MYMAC_2, MYMAC_1};
00131
00132 /* Tx, Rx Counters */
00133 __IO uint32_t RXOverrunCount = 0;
00134 __IO uint32_t RXErrorCount = 0;
00135 __IO uint32_t TXUnderrunCount = 0;
00136 __IO uint32_t TXErrorCount = 0;
00137 __IO uint32_t RxFinishedCount = 0;
00138 __IO uint32_t TxFinishedCount = 0;
00139 __IO uint32_t TxDoneCount = 0;
00140 __IO uint32_t RxDoneCount = 0;
00141 __IO uint32_t ReceiveLength = 0;
00142 __IO Bool PacketReceived = FALSE;
00143
00144 /* Tx Only variables */
00145 #if TX_ONLY
00146 __IO FlagStatus Pressed = RESET;
00147 #endif
00148
00149 #if ENABLE_WOL
00150 __IO uint32_t WOLCount = 0;
00151 #endif
00152
00153 /************************** PRIVATE FUNCTON **********************************/
00154 /* Interrupt service routines */
00155 void ENET_IRQHandler (void);
00156 #if TX_ONLY
00157 #ifdef MCB_LPC_1768
00158 void EINT0_Init(void);
00159 void EINT0_IRQHandler(void);
00160 #elif
00161 void EINT3_Init(void);
00162 void EINT3_IRQHandler(void);
00163 #endif
00164 #endif
00165
00166 void PacketGen(uint8_t *txptr);
00167 void LED_Init (void);
00168 void LED_Blink(uint32_t pattern);
00169 void Usr_Init_Emac(void);
00170
00171 /*----------------- INTERRUPT SERVICE ROUTINES --------------------------*/
00172 /*********************************************************************/
00177 void ENET_IRQHandler (void)
00178 {
00179         EMAC_PACKETBUF_Type RxDatbuf;
00180         uint32_t RxLen;
00181
00182         /* EMAC Ethernet Controller Interrupt function. */
00183         uint32_t int_stat;
00184         // Get EMAC interrupt status
00185         while ((int_stat = (LPC_EMAC->IntStatus & LPC_EMAC->IntEnable)) != 0) {
00186                 // Clear interrupt status
00187                 LPC_EMAC->IntClear = int_stat;
00188                 /* scan interrupt status source */
00189
00190                 /* ---------- receive overrun ------------*/
00191                 if((int_stat & EMAC_INT_RX_OVERRUN))
00192                 {
00193                         RXOverrunCount++;
00194                         _DBG_("Rx overrun");
00195                 }
00196
00197                 /*-----------  receive error -------------*/
00198                 /* Note:
00199                  * The EMAC doesn't distinguish the frame type and frame length,
00200                  * so, e.g. when the IP(0x8000) or ARP(0x0806) packets are received,
00201                  * it compares the frame type with the max length and gives the
00202                  * "Range" error. In fact, this bit is not an error indication,
00203                  * but simply a statement by the chip regarding the status of
00204                  * the received frame
00205                  */
00206                 if ((int_stat & EMAC_INT_RX_ERR))
00207                 {
00208                         if (EMAC_CheckReceiveDataStatus(EMAC_RINFO_RANGE_ERR) == RESET){
00209                                 RXErrorCount++;
00210                                 _DBG_("Rx error: ");
00211                         }
00212                 }
00213
00214                 /* ---------- RX Finished Process Descriptors ----------*/
00215                 if ((int_stat & EMAC_INT_RX_FIN))
00216                 {
00217                         RxFinishedCount++;
00218                         _DBG_("Rx finish");
00219                 }
00220
00221                 /* ---------- Receive Done -----------------------------*/
00222                 /* Note: All packets are greater than (TX_PACKET_SIZE + 4)
00223                  * will be ignore!
00224                  */
00225                 if ((int_stat & EMAC_INT_RX_DONE))
00226                 {
00227                         /* Packet received, check if packet is valid. */
00228                         if (EMAC_CheckReceiveIndex()){
00229                                 if (!EMAC_CheckReceiveDataStatus(EMAC_RINFO_LAST_FLAG)){
00230                                         goto rel;
00231                                 }
00232                                 // Get data size, trip out 4-bytes CRC field, note that length in (-1) style format
00233                                 RxLen = EMAC_GetReceiveDataSize() - 3;
00234                                 // Note that packet added 4-bytes CRC created by yourself
00235                                 if ((RxLen > (TX_PACKET_SIZE + 4)) || (EMAC_CheckReceiveDataStatus(EMAC_RINFO_ERR_MASK))) {
00236                                         /* Invalid frame, ignore it and free buffer */
00237                                         goto rel;
00238                                 }
00239                                 ReceiveLength = RxLen;
00240                                 // Valid Frame, just copy it
00241                                 RxDatbuf.pbDataBuf = (uint32_t *)gRxBuf;
00242                                 RxDatbuf.ulDataLen = RxLen;
00243                                 EMAC_ReadPacketBuffer(&RxDatbuf);
00244                                 PacketReceived = TRUE;
00245
00246                 rel:
00247                                 /* Release frame from EMAC buffer */
00248                                 EMAC_UpdateRxConsumeIndex();
00249                         }
00250                         _DBG_("Rx done");
00251                         RxDoneCount++;
00252                 }
00253
00254                 /*------------------- Transmit Underrun -----------------------*/
00255                 if ((int_stat & EMAC_INT_TX_UNDERRUN))
00256                 {
00257                         TXUnderrunCount++;
00258                         _DBG_("Tx under-run");
00259                 }
00260
00261                 /*------------------- Transmit Error --------------------------*/
00262                 if ((int_stat & EMAC_INT_TX_ERR))
00263                 {
00264                         TXErrorCount++;
00265                         _DBG_("Tx error");
00266                 }
00267
00268                 /* ----------------- TX Finished Process Descriptors ----------*/
00269                 if ((int_stat & EMAC_INT_TX_FIN))
00270                 {
00271                         TxFinishedCount++;
00272                         _DBG_("Tx finish");
00273                 }
00274
00275                 /* ----------------- Transmit Done ----------------------------*/
00276                 if ((int_stat & EMAC_INT_TX_DONE))
00277                 {
00278                         TxDoneCount++;
00279                         _DBG_("Tx done");
00280                 }
00281 #if ENABLE_WOL
00282                 /* ------------------ Wakeup Event Interrupt ------------------*/
00283                 /* Never gone here since interrupt in this
00284                  * functionality has been disable, even if in wake-up mode
00285                  */
00286                 if ((int_stat & EMAC_INT_WAKEUP))
00287                 {
00288                         WOLCount++;
00289                 }
00290 #endif
00291         }
00292 }
00293
00294 #if TX_ONLY
00295 #ifdef MCB_LPC_1768
00296 /*********************************************************************/
00301 void EINT0_IRQHandler(void)
00302 {
00303         LPC_SC->EXTINT |= 0x1;  //clear the EINT0 flag
00304         LED_Blink(KB_LED_PIN);
00305         Pressed = SET;
00306 }
00307 #elif defined(IAR_LPC_1768)
00308 /*********************************************************************/
00313 void EINT3_IRQHandler(void)
00314 {
00315         LPC_SC->EXTINT |= (0x1<<3);  //clear the EINT0 flag
00316         LED_Blink(KB_LED_PIN);
00317         Pressed = SET;
00318 }
00319 #endif
00320 #endif
00321
00322 /*-------------------------PRIVATE FUNCTIONS-----------------------------------*/
00323 /*********************************************************************/
00328 void PacketGen( uint8_t *txptr )
00329 {
00330   int i;
00331   uint32_t crcValue;
00332   uint32_t BodyLength = TX_PACKET_SIZE - 14;
00333
00334   /* Dest address */
00335   *(txptr+0) = EMAC_DST_ADDR56 & 0xFF;
00336   *(txptr+1) = (EMAC_DST_ADDR56 >> 0x08) & 0xFF;
00337   *(txptr+2) = EMAC_DST_ADDR34 & 0xFF;
00338   *(txptr+3) = (EMAC_DST_ADDR34 >> 0x08) & 0xFF;
00339   *(txptr+4) = EMAC_DST_ADDR12 & 0xFF;
00340   *(txptr+5) = (EMAC_DST_ADDR12 >> 0x08) & 0xFF;
00341
00342   /* Src address */
00343   *(txptr+6) = EMAC_ADDR56 & 0xFF;
00344   *(txptr+7) = (EMAC_ADDR56 >> 0x08) & 0xFF;
00345   *(txptr+8) = EMAC_ADDR34 & 0xFF;
00346   *(txptr+9) = (EMAC_ADDR34 >> 0x08) & 0xFF;
00347   *(txptr+10) = EMAC_ADDR12 & 0xFF;
00348   *(txptr+11) = (EMAC_ADDR12 >> 0x08) & 0xFF;
00349
00350   /* Type or length, body length is TX_PACKET_SIZE - 14 bytes */
00351   *(txptr+12) = BodyLength & 0xFF;
00352   *(txptr+13) = (BodyLength >> 0x08) & 0xFF;
00353
00354   /* Skip the first 14 bytes for dst, src, and type/length */
00355   for ( i=0; i < BodyLength; i++ )
00356   {
00357         *(txptr+i+14) = 0x55;
00358   }
00359
00360   // Calculate CRC
00361   crcValue = crc32_bfr( txptr, TX_PACKET_SIZE );
00362
00363   // Add 4-byte CRC
00364   *(txptr+TX_PACKET_SIZE) = (0xff & crcValue);
00365   *(txptr+TX_PACKET_SIZE+1) = 0xff & (crcValue >> 8 );
00366   *(txptr+TX_PACKET_SIZE+2) = 0xff & (crcValue >> 16);
00367   *(txptr+TX_PACKET_SIZE+3) = 0xff & (crcValue >> 24);
00368 }
00369
00370 /*********************************************************************/
00375 void LED_Init (void)
00376 {
00377         PINSEL_CFG_Type PinCfg;
00378
00379         uint8_t temp;
00380
00381         PinCfg.Funcnum = 0;
00382         PinCfg.OpenDrain = 0;
00383         PinCfg.Pinmode = 0;
00384         PinCfg.Portnum = 2;
00385         for (temp = 2; temp <= 6; temp++){
00386                 PinCfg.Pinnum = temp;
00387                 PINSEL_ConfigPin(&PinCfg);
00388         }
00389
00390         PinCfg.Funcnum = 0;
00391         PinCfg.OpenDrain = 0;
00392         PinCfg.Pinmode = 0;
00393         PinCfg.Portnum = 1;
00394         PinCfg.Pinnum = 28;
00395         PINSEL_ConfigPin(&PinCfg);
00396         PinCfg.Pinnum = 29;
00397         PINSEL_ConfigPin(&PinCfg);
00398         PinCfg.Pinnum = 31;
00399         PINSEL_ConfigPin(&PinCfg);
00400
00401
00402         // Set direction to output
00403         LPC_GPIO2->FIODIR |= LED2_MASK;
00404         LPC_GPIO1->FIODIR |= LED1_MASK;
00405
00406         /* Turn off all LEDs */
00407         LPC_GPIO2->FIOCLR = LED2_MASK;
00408         LPC_GPIO1->FIOCLR = LED1_MASK;
00409 }
00410 /*********************************************************************/
00415 void LED_Blink( uint32_t pattern )
00416 {
00417         uint32_t j;
00418
00419         LPC_GPIO2->FIOSET = pattern;
00420         for ( j = 0; j < 0x100000; j++ );
00421         LPC_GPIO2->FIOCLR = pattern;
00422         for ( j = 0; j < 0x100000; j++ );
00423 }
00424
00425 #if TX_ONLY
00426 #ifdef MCB_LPC_1768
00427 /*********************************************************************/
00432 void EINT0_Init(void)
00433 {
00434         PINSEL_CFG_Type PinCfg;
00435
00436         /* P2.10 as /EINT0 */
00437         PinCfg.Funcnum = 1;
00438         PinCfg.OpenDrain = 0;
00439         PinCfg.Pinmode = 0;
00440         PinCfg.Pinnum = 10;
00441         PinCfg.Portnum = 2;
00442         PINSEL_ConfigPin(&PinCfg);
00443
00444         //Initialize EXT registers
00445         LPC_SC->EXTINT = 0x0;
00446         LPC_SC->EXTMODE = 0x0;
00447         LPC_SC->EXTPOLAR = 0x0;
00448
00449         /* edge sensitive */
00450         LPC_SC->EXTMODE = 0xF;
00451         /* falling-edge sensitive */
00452         LPC_SC->EXTPOLAR = 0x0;
00453         /* External Interrupt Flag cleared*/
00454         LPC_SC->EXTINT = 0xF;
00455
00456         NVIC_SetPriority(EINT0_IRQn, 4);
00457         NVIC_EnableIRQ(EINT0_IRQn);
00458 }
00459
00460 #elif defined(IAR_LPC_1768) //if using IAR board, using External Interrupt 3
00461 /*********************************************************************/
00466 void EINT3_Init(void)
00467 {
00468         PINSEL_CFG_Type PinCfg;
00469
00470         /* P2.13 as /EINT3 */
00471         PinCfg.Funcnum = 1;
00472         PinCfg.OpenDrain = 0;
00473         PinCfg.Pinmode = 0;
00474         PinCfg.Pinnum = 13;
00475         PinCfg.Portnum = 2;
00476         PINSEL_ConfigPin(&PinCfg);
00477
00478         //Initialize EXT registers
00479         LPC_SC->EXTINT = 0x0;
00480         LPC_SC->EXTMODE = 0x0;
00481         LPC_SC->EXTPOLAR = 0x0;
00482
00483         /* edge sensitive */
00484         LPC_SC->EXTMODE = 0xF;
00485         /* falling-edge sensitive */
00486         LPC_SC->EXTPOLAR = 0x0;
00487         /* External Interrupt Flag cleared*/
00488         LPC_SC->EXTINT = 0xF;
00489
00490         NVIC_SetPriority(EINT3_IRQn, 4);
00491         NVIC_EnableIRQ(EINT3_IRQn);
00492 }
00493 #endif
00494 #endif
00495
00496 /*********************************************************************/
00501 void Usr_Init_Emac(void)
00502 {
00503         /* EMAC configuration type */
00504         EMAC_CFG_Type Emac_Config;
00505         /* pin configuration */
00506         PINSEL_CFG_Type PinCfg;
00507         uint32_t i;
00508         /*
00509          * Enable P1 Ethernet Pins:
00510          * P1.0 - ENET_TXD0
00511          * P1.1 - ENET_TXD1
00512          * P1.4 - ENET_TX_EN
00513          * P1.8 - ENET_CRS
00514          * P1.9 - ENET_RXD0
00515          * P1.10 - ENET_RXD1
00516          * P1.14 - ENET_RX_ER
00517          * P1.15 - ENET_REF_CLK
00518          * P1.16 - ENET_MDC
00519          * P1.17 - ENET_MDIO
00520          */
00521         PinCfg.Funcnum = 1;
00522         PinCfg.OpenDrain = 0;
00523         PinCfg.Pinmode = 0;
00524         PinCfg.Portnum = 1;
00525
00526         PinCfg.Pinnum = 0;
00527         PINSEL_ConfigPin(&PinCfg);
00528         PinCfg.Pinnum = 1;
00529         PINSEL_ConfigPin(&PinCfg);
00530         PinCfg.Pinnum = 4;
00531         PINSEL_ConfigPin(&PinCfg);
00532         PinCfg.Pinnum = 8;
00533         PINSEL_ConfigPin(&PinCfg);
00534         PinCfg.Pinnum = 9;
00535         PINSEL_ConfigPin(&PinCfg);
00536         PinCfg.Pinnum = 10;
00537         PINSEL_ConfigPin(&PinCfg);
00538         PinCfg.Pinnum = 14;
00539         PINSEL_ConfigPin(&PinCfg);
00540         PinCfg.Pinnum = 15;
00541         PINSEL_ConfigPin(&PinCfg);
00542         PinCfg.Pinnum = 16;
00543         PINSEL_ConfigPin(&PinCfg);
00544         PinCfg.Pinnum = 17;
00545         PINSEL_ConfigPin(&PinCfg);
00546
00547         _DBG_("Init EMAC module");
00548         sprintf(db_,"MAC[1..6] addr: %X-%X-%X-%X-%X-%X \n\r", \
00549                          EMACAddr[0],  EMACAddr[1],  EMACAddr[2], \
00550                           EMACAddr[3],  EMACAddr[4],  EMACAddr[5]);
00551         DB;
00552
00553         Emac_Config.Mode = EMAC_MODE_AUTO;
00554         Emac_Config.pbEMAC_Addr = EMACAddr;
00555         // Initialize EMAC module with given parameter
00556         while (EMAC_Init(&Emac_Config) == ERROR){
00557                 // Delay for a while then continue initializing EMAC module
00558                 _DBG_("Error during initializing EMAC, restart after a while");
00559                 for (i = 0x100000; i; i--);
00560         }
00561         // Enable all interrupt
00562         EMAC_IntCmd((EMAC_INT_RX_OVERRUN | EMAC_INT_RX_ERR | EMAC_INT_RX_FIN \
00563                         | EMAC_INT_RX_DONE | EMAC_INT_TX_UNDERRUN | EMAC_INT_TX_ERR \
00564                         | EMAC_INT_TX_FIN | EMAC_INT_TX_DONE), ENABLE);
00565         NVIC_SetPriority(ENET_IRQn, 0);
00566         NVIC_EnableIRQ(ENET_IRQn);
00567         _DBG_("Initialize EMAC complete");
00568 }
00569
00570 /*-------------------------MAIN FUNCTION------------------------------*/
00571 /*********************************************************************/
00576 int c_entry (void)
00577 {
00578         /* Data Packet format */
00579         EMAC_PACKETBUF_Type DataPacket;
00580
00581         uint8_t *txptr;
00582         uint32_t i = 0;
00583
00584 #if TX_ONLY
00585         uint32_t j;
00586 #endif
00587
00588 #if BOUNCE_RX
00589         uint8_t *rxptr;
00590 #endif
00591
00592 #if ENABLE_HASH
00593         uint8_t dstAddr[] = {0x01, 0x02, 0x03, 0x04, 0x05, 0x06};
00594 #endif
00595         NVIC_SetPriorityGrouping(4);  //sets PRIGROUP to 3:2 (XXX:YY)
00596
00597         //Init LED
00598         LED_Init();
00599
00600         /* Initialize debug via UART0
00601          * – 115200bps
00602          * – 8 data bit
00603          * – No parity
00604          * – 1 stop bit
00605          * – No flow control
00606          */
00607         debug_frmwrk_init();
00608
00609         // Init EMAC
00610         Usr_Init_Emac();
00611
00612 #if TX_ONLY
00613 #ifdef MCB_LPC_1768
00614         EINT0_Init();
00615 #elif defined(IAR_LPC_1768)
00616         EINT3_Init();
00617 #endif
00618         txptr = (uint8_t *)gTxBuf;
00619         /* pre-format the transmit packets */
00620         PacketGen(txptr);
00621 #endif
00622
00623 #if ENABLE_HASH
00624   EMAC_SetHashFilter(dstAddr, ENABLE);
00625 #endif
00626
00627
00628 #if BOUNCE_RX
00629   /* copy just received data from RX buffer to TX buffer and send out */
00630   txptr = (uint8_t *)gTxBuf;
00631   rxptr = (uint8_t *)gRxBuf;
00632 #endif
00633
00634 #if ENABLE_WOL
00635
00636   _DBG_("Enter Sleep mode now...");
00637   /*
00638    * On default state, All Multicast frames, All Broadcast frames and Frame that matched
00639    * with station address (unicast) are accepted.
00640    * To make WoL is possible, enable Rx Magic Packet and RxFilter Enable WOL
00641    */
00642   EMAC_SetFilterMode((EMAC_RFC_PFILT_WOL_EN | EMAC_RFC_MAGP_WOL_EN), ENABLE);
00643
00644         for (i = 0; i < 5; i++){
00645                 LED_Blink(PD_LED_PIN);  /* Indicating system is in power down now. */
00646         }
00647
00648         // Disable irq interrupt
00649         __disable_irq();
00650
00651         /* Currently, support Sleep mode */
00652     /* enter sleep mode */
00653     LPC_SC->PCON = 0x0;
00654
00655     /* Sleep Mode*/
00656     __WFI();
00657
00658     // CPU will be suspend here...
00659
00660         /* From power down to WOL, the PLL needs to be reconfigured,
00661         otherwise, the CCLK will be generated from 4Mhz IRC instead
00662         of main OSC 12Mhz */
00663         /* Initialize system clock */
00664         SystemInit();
00665
00666         /*
00667          * Initialize debug via UART
00668          */
00669         debug_frmwrk_init();
00670         /*
00671          * Init LED
00672          */
00673         LED_Init();
00674         _DBG_("Wake up from sleep mode");
00675
00676         /* Calling EMACInit() is overkill which also initializes the PHY, the
00677         main reason to do that is to make sure the descriptors and descriptor
00678         status for both TX and RX are clean and ready to use. It won't go wrong. */
00679         Usr_Init_Emac();
00680         // Re-Enable irq interrupt
00681         __enable_irq();
00682
00683 #endif                                                                          /* endif ENABLE_WOL */
00684
00685 #if BOUNCE_RX
00686 while( 1 )
00687 {
00688         LED_Blink(BLINK_LED_PIN);
00689         if ( PacketReceived == TRUE )
00690         {
00691           PacketReceived = FALSE;
00692                 /* Reverse Source and Destination, then copy the body */
00693                 memcpy( (uint8_t *)txptr, (uint8_t *)(rxptr+6), 6);
00694                 memcpy( (uint8_t *)(txptr+6), (uint8_t *)rxptr, 6);
00695                 memcpy( (uint8_t *)(txptr+12), (uint8_t *)(rxptr+12), (ReceiveLength - 12));
00696                 _DBG_("Send packet");
00697                 DataPacket.pbDataBuf = (uint32_t *)txptr;
00698                 DataPacket.ulDataLen = ReceiveLength;
00699                 EMAC_WritePacketBuffer(&DataPacket);
00700                 EMAC_UpdateTxProduceIndex();
00701         }
00702 }
00703 #endif  /* endif BOUNCE_RX */
00704
00705 #if TX_ONLY
00706         /* Transmit packets only */
00707         while ( 1 ) {
00708                 while (Pressed == RESET){
00709                         LED_Blink(BLINK_LED_PIN);
00710                 }
00711                 Pressed = RESET;
00712                 txptr = (uint8_t *)gTxBuf;
00713                 _DBG_("Send packet");
00714                 LED_Blink(TX_LED_PIN);
00715                 DataPacket.pbDataBuf = (uint32_t *)txptr;
00716                 // Note that there're 4-byte CRC added
00717                 DataPacket.ulDataLen = TX_PACKET_SIZE + 4;
00718                 EMAC_WritePacketBuffer(&DataPacket);
00719                 EMAC_UpdateTxProduceIndex();
00720                 for ( j = 0; j < 0x200000; j++ );       /* delay */
00721         }
00722 #endif  /* endif TX_ONLY */
00723   return 0;
00724 }
00725
00726
00727
00728 /* With ARM and GHS toolsets, the entry point is main() - this will
00729    allow the linker to generate wrapper code to setup stacks, allocate
00730    heap area, and initialize and copy code and data segments. For GNU
00731    toolsets, the entry point is through __start() in the crt0_gnu.asm
00732    file, and that startup code will setup stacks and data */
00733 int main(void)
00734 {
00735     return c_entry();
00736 }
00737
00738
00739 #ifdef  DEBUG
00740 /*******************************************************************************
00741 * @brief                Reports the name of the source file and the source line number
00742 *                               where the CHECK_PARAM error has occurred.
00743 * @param[in]    file Pointer to the source file name
00744 * @param[in]    line assert_param error line source number
00745 * @return               None
00746 *******************************************************************************/
00747 void check_failed(uint8_t *file, uint32_t line)
00748 {
00749         /* User can add his own implementation to report the file name and line number,
00750          ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
00751
00752         /* Infinite loop */
00753         while(1);
00754 }
00755 #endif
00756
00757 /*****************************************************************************
00758 **                            End Of File
00759 *****************************************************************************/
00760
00761 /*
00762  * @}
00763  */
Generated on Tue Jun 7 14:58:59 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/PWR/EXTINT_Sleep/extint_sleep.c Source File

C:/nxpdrv/LPC1700CMSIS/Examples/PWR/EXTINT_Sleep/extint_sleep.c

Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          EXTINT_Sleep.c                          2010-05-21
00003 */
00026 #include "LPC17xx.h"
00027 #include "lpc17xx_gpio.h"
00028 #include "lpc17xx_exti.h"
00029 #include "lpc17xx_pinsel.h"
00030 #include "lpc17xx_clkpwr.h"
00031 #include "lpc17xx_libcfg.h"
00032 #include "debug_frmwrk.h"
00033
00034
00035 /* Example group ----------------------------------------------------------- */
00041 /************************** PRIVATE DEFINITIONS *************************/
00042 //#define MCB_LPC_1768
00043 #define IAR_LPC_1768
00044
00045 #ifdef MCB_LPC_1768
00046 /* LED pin in byte style on P1 */
00047 #define _EXT_IRQ        EINT0_IRQn
00048 #define _EXTINT         EXTI_EINT0
00049 #elif defined (IAR_LPC_1768)
00050 #define _EXT_IRQ        EINT2_IRQn
00051 #define _EXTINT         EXTI_EINT2
00052 #endif
00053
00054 /************************** PRIVATE FUNCTIONS *************************/
00055 uint8_t menu[]=
00056         "********************************************************************************\n\r"
00057         "Hello NXP Semiconductors \n\r"
00058         "Power control demo \n\r"
00059         "\t - MCU: LPC17xx \n\r"
00060         "\t - Core: ARM CORTEX-M3 \n\r"
00061         "\t - Communicate via: UART0 - 115200 bps \n\r"
00062         "This example used to enter system in sleep mode and wake up it by using external \n\r"
00063         "interrupt\n\r"
00064         "********************************************************************************\n\r";
00065
00066 /* Interrupt service routines */
00067 #ifdef MCB_LPC_1768
00068 void EINT0_IRQHandler(void);
00069 #elif defined (IAR_LPC_1768)
00070 void EINT2_IRQHandler(void);
00071 #endif
00072
00073 void print_menu(void);
00074 void delay (void);
00075 void InitLED(void);
00076
00077 /*----------------- INTERRUPT SERVICE ROUTINES --------------------------*/
00078 #ifdef MCB_LPC_1768
00079 /*********************************************************************/
00084 void EINT0_IRQHandler(void)
00085 {
00086           //clear the EINT0 flag
00087           EXTI_ClearEXTIFlag(0);
00088
00089 }
00090 #elif defined (IAR_LPC_1768)
00091 /*********************************************************************/
00096 void EINT2_IRQHandler(void)
00097 {
00098           //clear the EINT2 flag
00099           EXTI_ClearEXTIFlag(2);
00100 }
00101
00102 #endif
00103
00104 /*-------------------------PRIVATE FUNCTIONS------------------------------*/
00105 /*********************************************************************/
00110 void print_menu(void)
00111 {
00112         _DBG(menu);
00113 }
00114 /*********************************************************************/
00119 void delay (void) {
00120   unsigned int i;
00121
00122   for (i = 0; i < 0x100000; i++) {
00123   }
00124 }
00125
00126 /*********************************************************************/
00131 void InitLED(void)
00132 {
00133 #ifdef MCB_LPC_1768
00134 /* Use LEDs P1.28 and P1.29*/
00135         GPIO_SetDir(1, (1<<28)|(1<<29), 1); //set P1.28 and P1.29 is output
00136         GPIO_ClearValue(1, (1<<28)|(1<<29));//Turn off LEDs
00137 #elif defined (IAR_LPC_1768)
00138 /* Use LED1 (P1.25) and LED2 (P0.4)*/
00139         GPIO_SetDir(1, (1<<25), 1); //set P1.25 is output
00140         GPIO_SetDir(0, (1<<4), 1);  //set P0.4 is output
00141         GPIO_SetValue(1, (1<<25));  //Turn off LED1
00142         GPIO_SetValue(0, (1<<4));       //Turn off LED2
00143 #endif
00144 }
00145
00146
00147 /*-------------------------MAIN FUNCTION------------------------------*/
00148 /*********************************************************************/
00153 int c_entry (void)
00154 {
00155         PINSEL_CFG_Type PinCfg;
00156         EXTI_InitTypeDef EXTICfg;
00157
00158         /* Initialize debug via UART0
00159          * – 115200bps
00160          * – 8 data bit
00161          * – No parity
00162          * – 1 stop bit
00163          * – No flow control
00164          */
00165         debug_frmwrk_init();
00166
00167         // print welcome screen
00168         print_menu();
00169
00170         /* Initialize LEDs
00171          * - If using MCB1700 board:
00172          *              LEDs: P1.28 and P1.29 are available
00173          * - If using IAR1700 board:
00174          *              LEDs: LED1(P1.25) and LED2(P0.4) are available
00175          * Turn off LEDs after initialize
00176          */
00177         InitLED();
00178
00179         /* Initialize EXT pin and registers
00180          * - If using MCB1700 board: EXTI0 is configured
00181          * - If using IAR1700 board: EXTI2 is configured
00182          */
00183 #ifdef MCB_LPC_1768
00184         /* P2.10 as /EINT0 */
00185         PinCfg.Funcnum = 1;
00186         PinCfg.OpenDrain = 0;
00187         PinCfg.Pinmode = 0;
00188         PinCfg.Pinnum = 10;
00189         PinCfg.Portnum = 2;
00190         PINSEL_ConfigPin(&PinCfg);
00191 #elif defined (IAR_LPC_1768)
00192         /* P2.12 as /EINT2 */
00193         PinCfg.Funcnum = 1;
00194         PinCfg.OpenDrain = 0;
00195         PinCfg.Pinmode = 0;
00196         PinCfg.Pinnum = 12;
00197         PinCfg.Portnum = 2;
00198         PINSEL_ConfigPin(&PinCfg);
00199 #endif
00200
00201         EXTI_Init();
00202
00203         EXTICfg.EXTI_Line = _EXTINT;
00204         /* edge sensitive */
00205         EXTICfg.EXTI_Mode = EXTI_MODE_EDGE_SENSITIVE;
00206         EXTICfg.EXTI_polarity = EXTI_POLARITY_LOW_ACTIVE_OR_FALLING_EDGE;
00207         EXTI_ClearEXTIFlag(_EXTINT);
00208         EXTI_Config(&EXTICfg);
00209
00210         NVIC_SetPriorityGrouping(4);
00211         NVIC_SetPriority(_EXT_IRQ, 0);
00212         NVIC_EnableIRQ(_EXT_IRQ);
00213
00214         _DBG_("First LED is blinking in normal mode...\n\r"     \
00215                   "Press '1' to enter system in sleep mode.\n\r"\
00216                   "If you want to wake-up the system, press INT/WAKE-UP button.");
00217         while(_DG !='1')
00218         {
00219                 //Blink first LED
00220 #ifdef MCB_LPC_1768
00221                 //blink LED P1.28
00222                 GPIO_SetValue(1, (1<<28));
00223                 delay();
00224                 GPIO_ClearValue(1, (1<<28));
00225                 delay();
00226 #elif defined (IAR_LPC_1768)
00227                 //blink LED1 (P1.25)
00228                 GPIO_SetValue(1, (1<<25));
00229                 delay();
00230                 GPIO_ClearValue(1, (1<<25));
00231                 delay();
00232 #endif
00233         }
00234
00235         _DBG_("Sleeping...");
00236         // Enter target power down mode
00237         CLKPWR_Sleep();
00238
00239         // MCU will be here after waking up
00240         _DBG_("System wake-up! Second LED is blinking...");
00241         //turn off first LED
00242 #ifdef MCB_LPC_1768
00243         GPIO_ClearValue(1, (1<<29));
00244 #elif defined (IAR_LPC_1768)
00245         GPIO_SetValue(1, (1<<25));
00246 #endif
00247         while (1)
00248         {
00249                 //Blink second LED
00250 #ifdef MCB_LPC_1768
00251                 //blink LED P1.29
00252                 GPIO_SetValue(1, (1<<29));
00253                 delay();
00254                 GPIO_ClearValue(1, (1<<29));
00255                 delay();
00256 #elif defined (IAR_LPC_1768)
00257                 //blink LED2 (P0.4)
00258                 GPIO_SetValue(0, (1<<4));
00259                 delay();
00260                 GPIO_ClearValue(0, (1<<4));
00261                 delay();
00262 #endif
00263         }
00264 }
00265
00266
00267 /* With ARM and GHS toolsets, the entry point is main() - this will
00268    allow the linker to generate wrapper code to setup stacks, allocate
00269    heap area, and initialize and copy code and data segments. For GNU
00270    toolsets, the entry point is through __start() in the crt0_gnu.asm
00271    file, and that startup code will setup stacks and data */
00272 int main(void)
00273 {
00274     return c_entry();
00275 }
00276
00277 #ifdef  DEBUG
00278 /*******************************************************************************
00279 * @brief                Reports the name of the source file and the source line number
00280 *                               where the CHECK_PARAM error has occurred.
00281 * @param[in]    file Pointer to the source file name
00282 * @param[in]    line assert_param error line source number
00283 * @return               None
00284 *******************************************************************************/
00285 void check_failed(uint8_t *file, uint32_t line)
00286 {
00287         /* User can add his own implementation to report the file name and line number,
00288          ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
00289
00290         /* Infinite loop */
00291         while(1);
00292 }
00293 #endif
00294
00295 /*
00296  * @}
00297  */
Generated on Tue Jun 7 14:59:02 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/GPDMA/Flash_2_Ram_Test/flash_2_ram.c Source File

C:/nxpdrv/LPC1700CMSIS/Examples/GPDMA/Flash_2_Ram_Test/flash_2_ram.c

Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          flash_2_ram.c                           2010-05-21
00003 */
00026 #include "lpc17xx_gpdma.h"
00027 #include "lpc17xx_libcfg.h"
00028 #include "debug_frmwrk.h"
00029
00030 /* Example group ----------------------------------------------------------- */
00036 /************************** PRIVATE DEFINTIONS*************************/
00038 #define DMA_SIZE                16
00039
00040 /************************** PRIVATE VARIABLES *************************/
00041 uint8_t menu[]=
00042         "********************************************************************************\n\r"
00043         "Hello NXP Semiconductors \n\r"
00044         "GPDMA demo \n\r"
00045         "\t - MCU: LPC17xx \n\r"
00046         "\t - Core: ARM CORTEX-M3 \n\r"
00047         "\t - Communicate via: UART0 - 115200 bps \n\r"
00048         "This example used to test GPDMA function by transfer data from Flash \n\r"
00049         "to RAM memory\n\r"
00050         "********************************************************************************\n\r";
00051 uint8_t menu2[] = "Demo terminated! \n\r";
00052 uint8_t err_menu[] = "Buffer Check fail!";
00053 uint8_t compl_menu[] = "Buffer Check success!";
00054
00055 //DMAScr_Buffer will be burn into flash when compile
00056 const uint32_t DMASrc_Buffer[DMA_SIZE]=
00057 {
00058         0x01020304,0x05060708,0x090A0B0C,0x0D0E0F10,
00059         0x11121314,0x15161718,0x191A1B1C,0x1D1E1F20,
00060         0x21222324,0x25262728,0x292A2B2C,0x2D2E2F30,
00061         0x31323334,0x35363738,0x393A3B3C,0x3D3E3F40
00062 };
00063
00064 uint32_t DMADest_Buffer[DMA_SIZE];
00065
00066 // Terminal Counter flag for Channel 0
00067 __IO uint32_t Channel0_TC;
00068
00069 // Error Counter flag for Channel 0
00070 __IO uint32_t Channel0_Err;
00071
00072 /*-------------------------MAIN FUNCTION------------------------------*/
00073 void DMA_IRQHandler (void);
00074
00075 void print_menu(void);
00076 void Buffer_Init(void);
00077 void Error_Loop(void);
00078
00079 /*----------------- INTERRUPT SERVICE ROUTINES --------------------------*/
00080 /*********************************************************************/
00085 void DMA_IRQHandler (void)
00086 {
00087         // check GPDMA interrupt on channel 0
00088         if (GPDMA_IntGetStatus(GPDMA_STAT_INT, 0)){ //check interrupt status on channel 0
00089                 // Check counter terminal status
00090                 if(GPDMA_IntGetStatus(GPDMA_STAT_INTTC, 0)){
00091                         // Clear terminate counter Interrupt pending
00092                         GPDMA_ClearIntPending (GPDMA_STATCLR_INTTC, 0);
00093                                 Channel0_TC++;
00094                 }
00095                 if (GPDMA_IntGetStatus(GPDMA_STAT_INTERR, 0)){
00096                         // Clear error counter Interrupt pending
00097                         GPDMA_ClearIntPending (GPDMA_STATCLR_INTERR, 0);
00098                         Channel0_Err++;
00099                 }
00100         }
00101 }
00102
00103 /*-------------------------PRIVATE FUNCTIONS-----------------------------*/
00104 /*********************************************************************/
00109 void print_menu(void)
00110 {
00111         _DBG(menu);
00112 }
00113
00114
00115 /*********************************************************************/
00120 void Buffer_Verify(void)
00121 {
00122         uint8_t i;
00123         uint32_t *src_addr = (uint32_t *)DMASrc_Buffer;
00124         uint32_t *dest_addr = (uint32_t *)DMADest_Buffer;
00125
00126         for ( i = 0; i < DMA_SIZE; i++ )
00127         {
00128                 if ( *src_addr++ != *dest_addr++ )
00129                 {
00130                         /* Call Error Loop */
00131                         Error_Loop();
00132                 }
00133         }
00134 }
00135
00136
00137 /*********************************************************************/
00142 void Error_Loop(void)
00143 {
00144         _DBG(err_menu);
00145
00146         /* Loop forever */
00147         while (1);
00148 }
00149
00150
00151 /*-------------------------MAIN FUNCTION--------------------------------*/
00152 /*********************************************************************/
00157 int c_entry(void)
00158 {
00159         GPDMA_Channel_CFG_Type GPDMACfg;
00160
00161         /* Initialize debug via UART0
00162          * – 115200bps
00163          * – 8 data bit
00164          * – No parity
00165          * – 1 stop bit
00166          * – No flow control
00167          */
00168         debug_frmwrk_init();
00169
00170         // print welcome screen
00171         print_menu();
00172
00173         /* GPDMA block section -------------------------------------------- */
00174     /* Disable GPDMA interrupt */
00175     NVIC_DisableIRQ(DMA_IRQn);
00176     /* preemption = 1, sub-priority = 1 */
00177     NVIC_SetPriority(DMA_IRQn, ((0x01<<3)|0x01));
00178
00179     /* Initialize GPDMA controller */
00180         GPDMA_Init();
00181
00182         // Setup GPDMA channel --------------------------------
00183         // channel 0
00184         GPDMACfg.ChannelNum = 0;
00185         // Source memory
00186         GPDMACfg.SrcMemAddr = (uint32_t)DMASrc_Buffer;
00187         // Destination memory
00188         GPDMACfg.DstMemAddr = (uint32_t)DMADest_Buffer;
00189         // Transfer size
00190         GPDMACfg.TransferSize = DMA_SIZE;
00191         // Transfer width
00192         GPDMACfg.TransferWidth = GPDMA_WIDTH_WORD;
00193         // Transfer type
00194         GPDMACfg.TransferType = GPDMA_TRANSFERTYPE_M2M;
00195         // Source connection - unused
00196         GPDMACfg.SrcConn = 0;
00197         // Destination connection - unused
00198         GPDMACfg.DstConn = 0;
00199         // Linker List Item - unused
00200         GPDMACfg.DMALLI = 0;
00201         // Setup channel with given parameter
00202         GPDMA_Setup(&GPDMACfg);
00203
00204         /* Reset terminal counter */
00205         Channel0_TC = 0;
00206         /* Reset Error counter */
00207         Channel0_Err = 0;
00208
00209         _DBG_("Start transfer...");
00210
00211         // Enable GPDMA channel 0
00212         GPDMA_ChannelCmd(0, ENABLE);
00213
00214         /* Enable GPDMA interrupt */
00215         NVIC_EnableIRQ(DMA_IRQn);
00216
00217         /* Wait for GPDMA processing complete */
00218         while ((Channel0_TC == 0) && (Channel0_Err == 0));
00219
00220         /* Verify buffer */
00221         Buffer_Verify();
00222
00223         _DBG(compl_menu);
00224
00225     /* Loop forever */
00226     while(1);
00227     return 1;
00228 }
00229
00230 /* With ARM and GHS toolsets, the entry point is main() - this will
00231  allow the linker to generate wrapper code to setup stacks, allocate
00232  heap area, and initialize and copy code and data segments. For GNU
00233  toolsets, the entry point is through __start() in the crt0_gnu.asm
00234  file, and that startup code will setup stacks and data */
00235 int main(void) {
00236         return c_entry();
00237 }
00238
00239 #ifdef  DEBUG
00240 /*******************************************************************************
00241  * @brief               Reports the name of the source file and the source line number
00242  *                              where the CHECK_PARAM error has occurred.
00243  * @param[in]   file Pointer to the source file name
00244  * @param[in]    line assert_param error line source number
00245  * @return              None
00246  *******************************************************************************/
00247 void check_failed(uint8_t *file, uint32_t line) {
00248         /* User can add his own implementation to report the file name and line number,
00249          ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
00250
00251         /* Infinite loop */
00252         while (1)
00253                 ;
00254 }
00255 #endif
00256
00257 /*
00258  * @}
00259  */
Generated on Tue Jun 7 14:59:01 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/TIMER/FreqMeasure/freqmeasure.c Source File

C:/nxpdrv/LPC1700CMSIS/Examples/TIMER/FreqMeasure/freqmeasure.c

Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          freqmeasure.c                           2010-07-16
00003 */
00026 #include "lpc17xx_timer.h"
00027 #include "lpc17xx_libcfg.h"
00028 #include "lpc17xx_pinsel.h"
00029 #include "debug_frmwrk.h"
00030
00031
00032 /* Example group ----------------------------------------------------------- */
00038 /************************** PRIVATE VARIABLES *************************/
00039 uint8_t menu1[] =
00040 "********************************************************************************\n\r"
00041 "Hello NXP Semiconductors \n\r"
00042 "Timer measure frequency demo \n\r"
00043 "\t - MCU: LPC17xx \n\r"
00044 "\t - Core: ARM Cortex-M3 \n\r"
00045 "\t - Communicate via: UART0 -  115200 bps \n\r"
00046 " Use timer 0 to measure input signal frequency through its CAP0.0 \n\r"
00047 " Use timer 2 to generate different frequency signals \n\r"
00048 "********************************************************************************\n\r";
00049
00050 TIM_TIMERCFG_Type TIM_ConfigStruct;
00051 TIM_CAPTURECFG_Type TIM_CaptureConfigStruct;
00052
00053 BOOL_8 first_capture,done;
00054 uint32_t capture;
00055 uint8_t count=0;
00056 /************************** PRIVATE FUNCTIONS *************************/
00057 /* Interrupt service routines */
00058 void TIMER0_IRQHandler(void);
00059
00060 void print_menu(void);
00061 /*----------------- INTERRUPT SERVICE ROUTINES --------------------------*/
00062 /*********************************************************************/
00067 void TIMER0_IRQHandler(void)
00068 {
00069         if (TIM_GetIntCaptureStatus(LPC_TIM0,0))
00070         {
00071                 TIM_ClearIntCapturePending(LPC_TIM0,0);
00072                 if(first_capture==TRUE)
00073                 {
00074                         TIM_Cmd(LPC_TIM0,DISABLE);
00075                         TIM_ResetCounter(LPC_TIM0);
00076                         TIM_Cmd(LPC_TIM0,ENABLE);
00077                         count++;
00078                         if(count==5)first_capture=FALSE; //stable
00079                 }
00080                 else
00081                 {
00082                         count=0; //reset count for next use
00083                         done=TRUE;
00084                         capture = TIM_GetCaptureValue(LPC_TIM0,0);
00085                 }
00086         }
00087 }
00088
00089 /*-------------------------PRIVATE FUNCTIONS------------------------------*/
00090 /*********************************************************************/
00095 void print_menu(void)
00096 {
00097         _DBG(menu1);
00098 }
00099
00100
00101 /*-------------------------MAIN FUNCTION------------------------------*/
00102 /*********************************************************************/
00107 int c_entry(void)
00108 {
00109         PINSEL_CFG_Type PinCfg;
00110         TIM_MATCHCFG_Type TIM_MatchConfigStruct;
00111         uint8_t idx;
00112         uint16_t tem;
00113         uint32_t freq,temcap;
00114         /* Initialize debug via UART0
00115          * – 115200bps
00116          * – 8 data bit
00117          * – No parity
00118          * – 1 stop bit
00119          * – No flow control
00120          */
00121         debug_frmwrk_init();
00122
00123         // print welcome screen
00124         print_menu();
00125
00126
00127         //Config P1.26 as CAP0.0
00128         PinCfg.Funcnum = 3;
00129         PinCfg.OpenDrain = 0;
00130         PinCfg.Pinmode = 0;
00131         PinCfg.Portnum = 1;
00132         PinCfg.Pinnum = 26;
00133         PINSEL_ConfigPin(&PinCfg);
00134         // Configure P0.6 as MAT2.0
00135         PinCfg.Funcnum = 3;
00136         PinCfg.OpenDrain = 0;
00137         PinCfg.Pinmode = 0;
00138         PinCfg.Portnum = 0;
00139         PinCfg.Pinnum = 6;
00140         PINSEL_ConfigPin(&PinCfg);
00141
00142         while(1)
00143         {
00144                 // Initialize timer 0, prescale count time of 1uS
00145                 TIM_ConfigStruct.PrescaleOption = TIM_PRESCALE_USVAL;
00146                 TIM_ConfigStruct.PrescaleValue  = 1;
00147
00148                 // use channel 0, CAPn.0
00149                 TIM_CaptureConfigStruct.CaptureChannel = 0;
00150                 // Enable capture on CAPn.0 rising edge
00151                 TIM_CaptureConfigStruct.RisingEdge = ENABLE;
00152                 // Enable capture on CAPn.0 falling edge
00153                 TIM_CaptureConfigStruct.FallingEdge = DISABLE;
00154                 // Generate capture interrupt
00155                 TIM_CaptureConfigStruct.IntOnCaption = ENABLE;
00156
00157                 // Set configuration for Tim_config and Tim_MatchConfig
00158                 TIM_Init(LPC_TIM0, TIM_TIMER_MODE,&TIM_ConfigStruct);
00159                 TIM_ConfigCapture(LPC_TIM0, &TIM_CaptureConfigStruct);
00160                 TIM_ResetCounter(LPC_TIM0);
00162                 idx=0;freq=0;tem=0;
00163                 while(idx<3)
00164                 {
00165                         if(idx==0)
00166                         _DBG("\n\rPlease input frequency (from 1 to 999 hz):");
00167                         tem = _DG;
00168                         switch(tem)
00169                         {
00170                         case '0':case'1':case '2':case '3':case '4':case '5':case '6':case '7':case'8':case '9':
00171                                 tem = tem - 0x30;
00172                                 idx++;
00173                                 if(idx==1) tem = tem * 100;
00174                                 else if (idx==2) tem = tem * 10;
00175                                 freq = freq + tem;
00176                                 if(idx==3)_DBD16(freq);
00177                                 tem = 0;
00178                                 break;
00179                         default:
00180                                 _DBG("...Please input digits from 0 to 9 only!");
00181                                 idx = 0; tem = 0; freq = 0;
00182                                 break;
00183                         }
00184                 }
00185                 TIM_ConfigStruct.PrescaleOption = TIM_PRESCALE_USVAL;
00186                 TIM_ConfigStruct.PrescaleValue  = 1;//1us
00187                 TIM_Init(LPC_TIM2, TIM_TIMER_MODE,&TIM_ConfigStruct);
00188
00189                 // use channel 0, MR0
00190                 TIM_MatchConfigStruct.MatchChannel = 0;
00191                 // Disable interrupt when MR0 matches the value in TC register
00192                 TIM_MatchConfigStruct.IntOnMatch   = FALSE;
00193                 //Enable reset on MR0: TIMER will reset if MR0 matches it
00194                 TIM_MatchConfigStruct.ResetOnMatch = TRUE;
00195                 //Stop on MR0 if MR0 matches it
00196                 TIM_MatchConfigStruct.StopOnMatch  = FALSE;
00197                 //Toggle MR0.0 pin if MR0 matches it
00198                 TIM_MatchConfigStruct.ExtMatchOutputType =TIM_EXTMATCH_TOGGLE;
00199                 // Set Match value
00200                 TIM_MatchConfigStruct.MatchValue   = 500000/freq;
00201                 TIM_ConfigMatch(LPC_TIM2,&TIM_MatchConfigStruct);
00202
00203                 TIM_Cmd(LPC_TIM2,ENABLE);
00205                 /* preemption = 1, sub-priority = 1 */
00206                 NVIC_SetPriority(TIMER0_IRQn, ((0x01<<3)|0x01));
00207                 /* Enable interrupt for timer 0 */
00208                 NVIC_EnableIRQ(TIMER0_IRQn);
00209
00210                 first_capture = TRUE;done=FALSE;capture=0;
00211                 // To start timer 0
00212                 TIM_Cmd(LPC_TIM0,ENABLE);
00213
00214                 _DBG("\n\rMeasuring......");
00215                 while(done==FALSE);
00216                 temcap = 1000000 / capture;_DBD16(temcap);_DBG("hz");
00217                 NVIC_DisableIRQ(TIMER0_IRQn);
00218                 TIM_DeInit(LPC_TIM0);
00219                 TIM_DeInit(LPC_TIM2);
00220                 _DBG("\n\rPress c to continue measuring other signals...");
00221                 while(_DG != 'c');
00222         }
00223 }
00224
00225 /* Support required entry point for other toolchain */
00226 int main (void)
00227 {
00228         return c_entry();
00229 }
00230 #ifdef  DEBUG
00231 /*******************************************************************************
00232 * @brief                Reports the name of the source file and the source line number
00233 *                               where the CHECK_PARAM error has occurred.
00234 * @param[in]    file Pointer to the source file name
00235 * @param[in]    line assert_param error line source number
00236 * @return               None
00237 *******************************************************************************/
00238 void check_failed(uint8_t *file, uint32_t line)
00239 {
00240         /* User can add his own implementation to report the file name and line number,
00241          ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
00242
00243         /* Infinite loop */
00244         while(1);
00245 }
00246 #endif
00247 /*
00248  * @}
00249  */
Generated on Tue Jun 7 14:59:03 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Data Fields

  • Data Structures
  • Data Fields
  • All
  • Variables
  • _
  • a
  • b
  • c
  • d
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  • f
  • g
  • h
  • i
  • l
  • m
  • n
  • o
  • p
  • q
  • r
  • s
  • t
  • u
  • v
  • w
  • x
  • y
  • z
Here is a list of all struct and union fields with links to the structures/unions they belong to:

- l -

  • LAR : ITM_Type
  • lblenerr : uip_stats
  • lc : pt
  • LCR : LPC_UART_TypeDef , LPC_UART0_TypeDef , LPC_UART1_TypeDef
  • lease_time : dhcpc_state
  • left : psock_buf
  • len : icmpip_hdr , uip_conn , CAN_MSG_Type , uip_tcpip_hdr , uip_icmpip_hdr , dns_answer , uip_udpip_hdr , ethip_hdr , httpd_fs_file , httpd_fsdata_file , httpd_fsdata_file_noconst , httpd_state , tcpip_hdr
  • length : SPI_DATA_SETUP_Type , SSP_DATA_SETUP_Type
  • LenPos : _USB_DMA_DESCRIPTOR
  • LER : LPC_PWM_TypeDef
  • line : telnetd_line
  • lines : telnetd_state
  • Link : _USB_DMA_DESCRIPTOR
  • LOAD : SysTick_Type
  • lowerEID : EFF_GPR_Entry
  • lowerID : SFF_GPR_Entry
  • lport : uip_conn
  • LSR : LPC_UART1_TypeDef , ITM_Type , LPC_UART0_TypeDef , LPC_UART_TypeDef
  • LUTerr : LPC_CANAF_TypeDef
  • LUTerrAd : LPC_CANAF_TypeDef
Generated on Tue Jun 7 15:00:02 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Data Fields

  • Data Structures
  • Data Fields
  • All
  • Variables
  • _
  • a
  • b
  • c
  • d
  • e
  • f
  • g
  • h
  • i
  • l
  • m
  • n
  • o
  • p
  • q
  • r
  • s
  • t
  • u
  • v
  • w
  • x
  • y
  • z
Here is a list of all struct and union fields with links to the structures/unions they belong to:

- m -

  • MAC1 : LPC_EMAC_TypeDef
  • MAC2 : LPC_EMAC_TypeDef
  • mac_addr : dhcpc_state
  • mac_len : dhcpc_state
  • MADR : LPC_EMAC_TypeDef
  • mask : LPC_CANAF_RAM_TypeDef
  • MatchAddrValue : UART1_RS485_CTRLCFG_Type
  • MatchChannel : PWM_MATCHCFG_Type , TIM_MATCHCFG_Type
  • Matchvalue : PWM_Match_T
  • MatchValue : TIM_MATCHCFG_Type
  • MAXF : LPC_EMAC_TypeDef
  • MaxSize : _USB_DMA_DESCRIPTOR
  • MCCAP_CLR : LPC_MCPWM_TypeDef
  • MCCAPCON : LPC_MCPWM_TypeDef
  • MCCAPCON_CLR : LPC_MCPWM_TypeDef
  • MCCAPCON_SET : LPC_MCPWM_TypeDef
  • MCCCP : LPC_MCPWM_TypeDef
  • MCCNTCON : LPC_MCPWM_TypeDef
  • MCCNTCON_CLR : LPC_MCPWM_TypeDef
  • MCCNTCON_SET : LPC_MCPWM_TypeDef
  • MCCON : LPC_MCPWM_TypeDef
  • MCCON_CLR : LPC_MCPWM_TypeDef
  • MCCON_SET : LPC_MCPWM_TypeDef
  • MCCR0 : LPC_MCPWM_TypeDef
  • MCCR1 : LPC_MCPWM_TypeDef
  • MCCR2 : LPC_MCPWM_TypeDef
  • MCDEADTIME : LPC_MCPWM_TypeDef
  • mcena : I2S_MODEConf_Type
  • MCFG : LPC_EMAC_TypeDef
  • MCINTEN : LPC_MCPWM_TypeDef
  • MCINTEN_CLR : LPC_MCPWM_TypeDef
  • MCINTEN_SET : LPC_MCPWM_TypeDef
  • MCINTFLAG : LPC_MCPWM_TypeDef
  • MCINTFLAG_CLR : LPC_MCPWM_TypeDef
  • MCINTFLAG_SET : LPC_MCPWM_TypeDef
  • MCMD : LPC_EMAC_TypeDef
  • MCPER0 : LPC_MCPWM_TypeDef
  • MCPER1 : LPC_MCPWM_TypeDef
  • MCPER2 : LPC_MCPWM_TypeDef
  • MCPW0 : LPC_MCPWM_TypeDef
  • MCPW1 : LPC_MCPWM_TypeDef
  • MCPW2 : LPC_MCPWM_TypeDef
  • MCR : LPC_TIM_TypeDef , LPC_PWM_TypeDef , LPC_UART1_TypeDef
  • MCTIM0 : LPC_MCPWM_TypeDef
  • MCTIM1 : LPC_MCPWM_TypeDef
  • MCTIM2 : LPC_MCPWM_TypeDef
  • MemDataAccCtrl : _MADCTR_Data_t
  • mimetype : webclient_state
  • MIN : RTC_TIME_Type , LPC_RTC_TypeDef
  • MIND : LPC_EMAC_TypeDef
  • MIS : LPC_SSP_TypeDef
  • ML : _DATCTR_Data_t , _MADCTR_Data_t
  • MMCTRL : LPC_I2C_TypeDef
  • MMFAR : SCB_Type
  • MMFR : SCB_Type
  • MOD : LPC_CAN_TypeDef
  • Mode : SPI_CFG_Type , SSP_CFG_Type , _COLMOD_Data_t , EMAC_CFG_Type
  • Module_ID : LPC_USB_TypeDef , LPC_EMAC_TypeDef
  • mono : I2S_CFG_Type
  • MONTH : LPC_RTC_TypeDef , RTC_TIME_Type
  • MR0 : LPC_PWM_TypeDef , LPC_TIM_TypeDef
  • MR1 : LPC_PWM_TypeDef , LPC_TIM_TypeDef
  • MR2 : LPC_PWM_TypeDef , LPC_TIM_TypeDef
  • MR3 : LPC_TIM_TypeDef , LPC_PWM_TypeDef
  • MR4 : LPC_PWM_TypeDef
  • MR5 : LPC_PWM_TypeDef
  • MR6 : LPC_PWM_TypeDef
  • MRDD : LPC_EMAC_TypeDef
  • msg : smtp_state
  • msglen : smtp_state
  • MSR : LPC_UART1_TypeDef
  • mss : uip_conn
  • mute : I2S_CFG_Type
  • MV : _MADCTR_Data_t , _DATCTR_Data_t
  • MWTD : LPC_EMAC_TypeDef
  • MX : _DATCTR_Data_t , _MADCTR_Data_t
  • MY : _DATCTR_Data_t , _MADCTR_Data_t
Generated on Tue Jun 7 15:00:02 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Data Fields

  • Data Structures
  • Data Fields
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  • x
  • y
  • z
Here is a list of all struct and union fields with links to the structures/unions they belong to:

- n -

  • N : APSR_Type , xPSR_Type
  • name : namemap , httpd_cgi_call , hello_world_state , httpd_fsdata_file , httpd_fsdata_file_noconst
  • netmask : dhcpc_state , uip_fw_netif
  • next : httpd_fsdata_file , httpd_fsdata_file_noconst , uip_fw_netif
  • NextLLI : GPDMA_LLI_Type
  • NormalMultiDropMode_State : UART1_RS485_CTRLCFG_Type
  • nPRIV : CONTROL_Type
  • nrtx : uip_conn
  • numanswers : dns_hdr
  • numauthrr : dns_hdr
  • numextrarr : dns_hdr
  • numquestions : dns_hdr
  • numsent : telnetd_state
Generated on Tue Jun 7 15:00:02 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Data Fields

  • Data Structures
  • Data Fields
  • All
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  • s
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  • u
  • v
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  • x
  • y
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Here is a list of all struct and union fields with links to the structures/unions they belong to:

- o -

  • op : dhcp_msg
  • opcode : arp_hdr
  • OpenDrain : PINSEL_CFG_Type
  • optdata : tcpip_hdr , uip_tcpip_hdr
  • options : dhcp_msg
  • OTGClkCtrl : LPC_USB_TypeDef
  • OTGClkSt : LPC_USB_TypeDef
  • OTGIntClr : LPC_USB_TypeDef
  • OTGIntEn : LPC_USB_TypeDef
  • OTGIntSet : LPC_USB_TypeDef
  • OTGIntSt : LPC_USB_TypeDef
  • OTGStCtrl : LPC_USB_TypeDef
  • OTGTmr : LPC_USB_TypeDef
  • output : uip_fw_netif
Generated on Tue Jun 7 15:00:02 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Data Fields

  • Data Structures
  • Data Fields
  • All
  • Variables
  • _
  • a
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  • x
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  • z
Here is a list of all struct and union fields with links to the structures/unions they belong to:

- z -

  • Z : APSR_Type , xPSR_Type
Generated on Tue Jun 7 15:00:02 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Data Fields

  • Data Structures
  • Data Fields
  • All
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  • _
  • a
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  • u
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  • x
  • y
  • z
Here is a list of all struct and union fields with links to the structures/unions they belong to:

- a -

  • ABMode : UART_AB_CFG_Type
  • ackerr : uip_stats
  • ackno : uip_tcpip_hdr , tcpip_hdr
  • ACR : LPC_UART_TypeDef , LPC_UART0_TypeDef , LPC_UART1_TypeDef
  • ADCR : LPC_ADC_TypeDef
  • addr : neighbor_entry , uip_neighbor_addr , uip_eth_addr
  • ADDR0 : LPC_ADC_TypeDef
  • ADDR1 : LPC_ADC_TypeDef
  • ADDR2 : LPC_ADC_TypeDef
  • ADDR3 : LPC_ADC_TypeDef
  • ADDR4 : LPC_ADC_TypeDef
  • ADDR5 : LPC_ADC_TypeDef
  • ADDR6 : LPC_ADC_TypeDef
  • ADDR7 : LPC_ADC_TypeDef
  • ADGDR : LPC_ADC_TypeDef
  • ADINTEN : LPC_ADC_TypeDef
  • ADR : SCB_Type
  • ADRMATCH : LPC_UART1_TypeDef
  • ADSTAT : LPC_ADC_TypeDef
  • ADTRM : LPC_ADC_TypeDef
  • AFMR : LPC_CANAF_TypeDef
  • AFSR : SCB_Type
  • AIRCR : SCB_Type
  • ALDOM : LPC_RTC_TypeDef
  • ALDOW : LPC_RTC_TypeDef
  • ALDOY : LPC_RTC_TypeDef
  • ALHOUR : LPC_RTC_TypeDef
  • ALMIN : LPC_RTC_TypeDef
  • ALMON : LPC_RTC_TypeDef
  • ALSEC : LPC_RTC_TypeDef
  • ALYEAR : LPC_RTC_TypeDef
  • AMR : LPC_RTC_TypeDef
  • appstate : uip_conn
  • ATLE : _USB_DMA_DESCRIPTOR
  • AutoAddrDetect_State : UART1_RS485_CTRLCFG_Type
  • AutoDirCtrl_State : UART1_RS485_CTRLCFG_Type
  • AutoRestart : UART_AB_CFG_Type
Generated on Tue Jun 7 15:00:02 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Data Fields

  • Data Structures
  • Data Fields
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  • x
  • y
  • z
Here is a list of all struct and union fields with links to the structures/unions they belong to:

- b -

  • b : APSR_Type , IPSR_Type , CONTROL_Type , xPSR_Type
  • Baud_rate : UART_CFG_Type
  • BFAR : SCB_Type
  • BitsPP : _Bmp_t
  • bmQEIConfig : QEI_CFGOPT_Type
  • BTR : LPC_CAN_TypeDef
  • buf : psock , telnetd_state
  • BufAdr : _USB_DMA_DESCRIPTOR
  • BufLen : _USB_DMA_DESCRIPTOR
  • bufptr : telnetd_state , psock
  • bufsize : psock
  • BytesPP : _Bmp_t
Generated on Tue Jun 7 15:00:02 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Data Fields

  • Data Structures
  • Data Fields
  • All
  • Variables
  • _
  • a
  • b
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  • q
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  • t
  • u
  • v
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  • x
  • y
  • z
Here is a list of all struct and union fields with links to the structures/unions they belong to:

- c -

  • C : APSR_Type , xPSR_Type
  • CALIB : SysTick_Type
  • CALIBRATION : LPC_RTC_TypeDef
  • callback : I2C_M_SETUP_Type , I2C_S_SETUP_Type
  • CANMSR : LPC_CANCR_TypeDef
  • CANRxSR : LPC_CANCR_TypeDef
  • CANSLEEPCLR : LPC_SC_TypeDef
  • CANTxSR : LPC_CANCR_TypeDef
  • CANWAKEFLAGS : LPC_SC_TypeDef
  • CaptureChannel : PWM_CAPTURECFG_Type , TIM_CAPTURECFG_Type
  • captureChannel : MCPWM_CAPTURE_CFG_Type
  • captureFalling : MCPWM_CAPTURE_CFG_Type
  • CaptureMode : QEI_CFG_Type
  • captureRising : MCPWM_CAPTURE_CFG_Type
  • CCLKCFG : LPC_SC_TypeDef
  • CCR : SCB_Type , LPC_TIM_TypeDef , LPC_PWM_TypeDef , LPC_RTC_TypeDef
  • Cfg : _USB_DMA_DESCRIPTOR
  • CFSR : SCB_Type
  • chaddr : dhcp_msg
  • channelDeadtimeEnable : MCPWM_CHANNEL_CFG_Type
  • channelDeadtimeValue : MCPWM_CHANNEL_CFG_Type
  • ChannelNum : GPDMA_Channel_CFG_Type
  • channelPeriodValue : MCPWM_CHANNEL_CFG_Type
  • channelPolarity : MCPWM_CHANNEL_CFG_Type
  • channelPulsewidthValue : MCPWM_CHANNEL_CFG_Type
  • channelTimercounterValue : MCPWM_CHANNEL_CFG_Type
  • channelType : MCPWM_CHANNEL_CFG_Type
  • channelUpdateEnable : MCPWM_CHANNEL_CFG_Type
  • CharacterOffset : _FontType_t
  • CharactersNuber : _FontType_t
  • chkerr : uip_stats
  • ciaddr : dhcp_msg
  • CID0 : ITM_Type
  • CID1 : ITM_Type
  • CID2 : ITM_Type
  • CID3 : ITM_Type
  • CIIR : LPC_RTC_TypeDef
  • class : dns_answer
  • CLKOUTCFG : LPC_SC_TypeDef
  • clksel : I2S_MODEConf_Type
  • CLKSRCSEL : LPC_SC_TypeDef
  • ClockRate : SPI_CFG_Type , SSP_CFG_Type
  • CLRT : LPC_EMAC_TypeDef
  • Cmd : _GLCD_CmdCtrl_t
  • CMPOS0 : LPC_QEI_TypeDef
  • CMPOS1 : LPC_QEI_TypeDef
  • CMPOS2 : LPC_QEI_TypeDef
  • CMR : LPC_CAN_TypeDef
  • CNT_ENA : DAC_CONVERTER_CFG_Type
  • ColourMode : _COLMOD_Data_t
  • Command : LPC_EMAC_TypeDef
  • commandstr : ptentry
  • conn : dhcpc_state
  • Control : GPDMA_LLI_Type
  • controller : EFF_Entry , FullCAN_Entry , SFF_Entry
  • controller1 : SFF_GPR_Entry , EFF_GPR_Entry
  • controller2 : SFF_GPR_Entry , EFF_GPR_Entry
  • count : httpd_state
  • Count : _USB_EP_DATA
  • counter : SPI_DATA_SETUP_Type
  • counterChannel : MCPWM_COUNT_CFG_Type
  • CounterOption : PWM_COUNTERCFG_Type , TIM_COUNTERCFG_Type
  • countFalling : MCPWM_COUNT_CFG_Type
  • CountInputSelect : TIM_COUNTERCFG_Type , PWM_COUNTERCFG_Type
  • countRising : MCPWM_COUNT_CFG_Type
  • CPHA : SPI_CFG_Type , SSP_CFG_Type
  • CPOL : SPI_CFG_Type , SSP_CFG_Type
  • CPSR : LPC_SSP_TypeDef
  • CPUID : SCB_Type
  • CR0 : LPC_TIM_TypeDef , LPC_SSP_TypeDef , LPC_PWM_TypeDef
  • CR1 : LPC_TIM_TypeDef , LPC_SSP_TypeDef , LPC_PWM_TypeDef
  • CR2 : LPC_PWM_TypeDef
  • CR3 : LPC_PWM_TypeDef
  • CTCR : LPC_TIM_TypeDef , LPC_PWM_TypeDef
  • CTIME0 : LPC_RTC_TypeDef
  • CTIME1 : LPC_RTC_TypeDef
  • CTIME2 : LPC_RTC_TypeDef
  • Ctrl : RX_Desc , TX_Desc
  • CTRL : SysTick_Type
Generated on Tue Jun 7 15:00:02 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Data Fields

  • Data Structures
  • Data Fields
  • All
  • Variables
  • _
  • a
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  • u
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  • x
  • y
  • z
Here is a list of all struct and union fields with links to the structures/unions they belong to:

- d -

  • DACCNTVAL : LPC_DAC_TypeDef
  • DACCTRL : LPC_DAC_TypeDef
  • DACR : LPC_DAC_TypeDef
  • data : httpd_fs_file , __SER_BUF_T , httpd_fsdata_file , httpd_fsdata_file_noconst , __CDC_BUF_T
  • dataA : CAN_MSG_Type
  • dataB : CAN_MSG_Type
  • Databit : SPI_CFG_Type , SSP_CFG_Type
  • Databits : UART_CFG_Type
  • DataOrder : SPI_CFG_Type
  • DBLBUF_ENA : DAC_CONVERTER_CFG_Type
  • DCRDR : CoreDebug_Type
  • DCRSR : CoreDebug_Type
  • default_router : dhcpc_state
  • DelayValue : UART1_RS485_CTRLCFG_Type
  • DEMCR : CoreDebug_Type
  • depth : I2S_DMAConf_Type
  • dest : uip_eth_hdr
  • destipaddr : tcpip_hdr , icmpip_hdr , fwcache_entry , uip_tcpip_hdr , uip_icmpip_hdr , uip_udpip_hdr , ethip_hdr
  • destport : uip_udpip_hdr , tcpip_hdr , uip_tcpip_hdr
  • DFR : SCB_Type
  • DFSR : SCB_Type
  • DHCSR : CoreDebug_Type
  • dhwaddr : arp_hdr
  • dipaddr : arp_hdr
  • dir : I2C_CFG_T
  • Dir : _GLCD_CmdCtrl_t
  • DirCtrlPin : UART1_RS485_CTRLCFG_Type
  • DirCtrlPol_Level : UART1_RS485_CTRLCFG_Type
  • DirectionInvert : QEI_CFG_Type
  • disable : FullCAN_Entry , SFF_Entry
  • disable1 : SFF_GPR_Entry
  • disable2 : SFF_GPR_Entry
  • DLL : LPC_UART_TypeDef , LPC_UART0_TypeDef , LPC_UART1_TypeDef
  • DLM : LPC_UART_TypeDef , LPC_UART0_TypeDef , LPC_UART1_TypeDef
  • DMA_ENA : DAC_CONVERTER_CFG_Type
  • DMACCConfig : LPC_GPDMACH_TypeDef
  • DMACCControl : LPC_GPDMACH_TypeDef
  • DMACCDestAddr : LPC_GPDMACH_TypeDef
  • DMACCLLI : LPC_GPDMACH_TypeDef
  • DMACConfig : LPC_GPDMA_TypeDef
  • DMACCSrcAddr : LPC_GPDMACH_TypeDef
  • DMACEnbldChns : LPC_GPDMA_TypeDef
  • DMACIntErrClr : LPC_GPDMA_TypeDef
  • DMACIntErrStat : LPC_GPDMA_TypeDef
  • DMACIntStat : LPC_GPDMA_TypeDef
  • DMACIntTCClear : LPC_GPDMA_TypeDef
  • DMACIntTCStat : LPC_GPDMA_TypeDef
  • DMACR : LPC_SSP_TypeDef
  • DMACRawIntErrStat : LPC_GPDMA_TypeDef
  • DMACRawIntTCStat : LPC_GPDMA_TypeDef
  • DMACSoftBReq : LPC_GPDMA_TypeDef
  • DMACSoftLBReq : LPC_GPDMA_TypeDef
  • DMACSoftLSReq : LPC_GPDMA_TypeDef
  • DMACSoftSReq : LPC_GPDMA_TypeDef
  • DMACSync : LPC_GPDMA_TypeDef
  • DMAIndex : I2S_DMAConf_Type
  • DMALLI : GPDMA_Channel_CFG_Type
  • DMAREQSEL : LPC_SC_TypeDef
  • dnsaddr : dhcpc_state
  • DOM : LPC_RTC_TypeDef , RTC_TIME_Type
  • DOW : RTC_TIME_Type , LPC_RTC_TypeDef
  • DOY : LPC_RTC_TypeDef , RTC_TIME_Type
  • DR : LPC_SSP_TypeDef
  • drop : uip_stats
  • DstAddr : GPDMA_LLI_Type
  • DstConn : GPDMA_Channel_CFG_Type
  • DstMemAddr : GPDMA_Channel_CFG_Type
Generated on Tue Jun 7 15:00:02 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Data Fields

  • Data Structures
  • Data Fields
  • All
  • Variables
  • _
  • a
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  • q
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  • t
  • u
  • v
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  • x
  • y
  • z
Here is a list of all struct and union fields with links to the structures/unions they belong to:

- e -

  • EFF_GPR_NumEntry : AF_SectionDef
  • EFF_GPR_Sec : AF_SectionDef
  • EFF_GRP_sa : LPC_CANAF_TypeDef
  • EFF_NumEntry : AF_SectionDef
  • EFF_sa : LPC_CANAF_TypeDef
  • EFF_Sec : AF_SectionDef
  • EMR : LPC_TIM_TypeDef
  • ENDofTable : LPC_CANAF_TypeDef
  • err : namemap
  • ethaddr : arp_entry
  • ethhdr : arp_hdr , ethip_hdr
  • EWL : LPC_CAN_TypeDef
  • EXTI_Line : EXTI_InitTypeDef
  • EXTI_Mode : EXTI_InitTypeDef
  • EXTI_polarity : EXTI_InitTypeDef
  • EXTINT : LPC_SC_TypeDef
  • ExtMatchOutputType : TIM_MATCHCFG_Type
  • EXTMODE : LPC_SC_TypeDef
  • EXTPOLAR : LPC_SC_TypeDef
Generated on Tue Jun 7 15:00:02 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Data Fields

  • Data Structures
  • Data Fields
  • All
  • Variables
  • _
  • a
  • b
  • c
  • d
  • e
  • f
  • g
  • h
  • i
  • l
  • m
  • n
  • o
  • p
  • q
  • r
  • s
  • t
  • u
  • v
  • w
  • x
  • y
  • z
Here is a list of all struct and union fields with links to the structures/unions they belong to:

- f -

  • FallingEdge : PWM_CAPTURECFG_Type , TIM_CAPTURECFG_Type
  • FC_NumEntry : AF_SectionDef
  • FCANIC0 : LPC_CANAF_TypeDef
  • FCANIC1 : LPC_CANAF_TypeDef
  • FCANIE : LPC_CANAF_TypeDef
  • FCR : LPC_UART0_TypeDef , LPC_UART1_TypeDef , LPC_UART_TypeDef
  • FDR : LPC_UART_TypeDef , LPC_UART0_TypeDef , LPC_UART1_TypeDef
  • FIFO_DMAMode : UART_FIFO_CFG_Type
  • FIFO_Level : UART_FIFO_CFG_Type
  • FIFO_ResetRxBuf : UART_FIFO_CFG_Type
  • FIFO_ResetTxBuf : UART_FIFO_CFG_Type
  • FIFOLVL : LPC_UART_TypeDef , LPC_UART0_TypeDef , LPC_UART1_TypeDef
  • file : dhcp_msg , webclient_state , httpd_state
  • filename : httpd_state
  • FILTER : LPC_QEI_TypeDef
  • FIOCLR : GPIO_Byte_TypeDef , LPC_GPIO_TypeDef
  • FIOCLR0 : LPC_GPIO_TypeDef
  • FIOCLR1 : LPC_GPIO_TypeDef
  • FIOCLR2 : LPC_GPIO_TypeDef
  • FIOCLR3 : LPC_GPIO_TypeDef
  • FIOCLRH : LPC_GPIO_TypeDef
  • FIOCLRL : GPIO_HalfWord_TypeDef , LPC_GPIO_TypeDef
  • FIOCLRU : GPIO_HalfWord_TypeDef
  • FIODIR : GPIO_Byte_TypeDef , LPC_GPIO_TypeDef
  • FIODIR0 : LPC_GPIO_TypeDef
  • FIODIR1 : LPC_GPIO_TypeDef
  • FIODIR2 : LPC_GPIO_TypeDef
  • FIODIR3 : LPC_GPIO_TypeDef
  • FIODIRH : LPC_GPIO_TypeDef
  • FIODIRL : GPIO_HalfWord_TypeDef , LPC_GPIO_TypeDef
  • FIODIRU : GPIO_HalfWord_TypeDef
  • FIOMASK : GPIO_Byte_TypeDef , LPC_GPIO_TypeDef
  • FIOMASK0 : LPC_GPIO_TypeDef
  • FIOMASK1 : LPC_GPIO_TypeDef
  • FIOMASK2 : LPC_GPIO_TypeDef
  • FIOMASK3 : LPC_GPIO_TypeDef
  • FIOMASKH : LPC_GPIO_TypeDef
  • FIOMASKL : GPIO_HalfWord_TypeDef , LPC_GPIO_TypeDef
  • FIOMASKU : GPIO_HalfWord_TypeDef
  • FIOPIN : GPIO_Byte_TypeDef , LPC_GPIO_TypeDef
  • FIOPIN0 : LPC_GPIO_TypeDef
  • FIOPIN1 : LPC_GPIO_TypeDef
  • FIOPIN2 : LPC_GPIO_TypeDef
  • FIOPIN3 : LPC_GPIO_TypeDef
  • FIOPINH : LPC_GPIO_TypeDef
  • FIOPINL : LPC_GPIO_TypeDef , GPIO_HalfWord_TypeDef
  • FIOPINU : GPIO_HalfWord_TypeDef
  • FIOSET : GPIO_Byte_TypeDef , LPC_GPIO_TypeDef
  • FIOSET0 : LPC_GPIO_TypeDef
  • FIOSET1 : LPC_GPIO_TypeDef
  • FIOSET2 : LPC_GPIO_TypeDef
  • FIOSET3 : LPC_GPIO_TypeDef
  • FIOSETH : LPC_GPIO_TypeDef
  • FIOSETL : GPIO_HalfWord_TypeDef , LPC_GPIO_TypeDef
  • FIOSETU : GPIO_HalfWord_TypeDef
  • flags : uip_tcpip_hdr , tcpip_hdr , dhcp_msg
  • flags1 : dns_hdr
  • flags2 : dns_hdr
  • FLASHCFG : LPC_SC_TypeDef
  • FlowControlCounter : LPC_EMAC_TypeDef
  • FlowControlStatus : LPC_EMAC_TypeDef
  • format : CAN_MSG_Type
  • FPCA : CONTROL_Type
  • fpin : I2S_MODEConf_Type
  • fragerr : uip_stats
  • FrameFormat : SSP_CFG_Type
  • from : smtp_state
  • FullCAN_Sec : AF_SectionDef
  • Funcnum : PINSEL_CFG_Type
  • function : httpd_cgi_call
Generated on Tue Jun 7 15:00:02 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Data Fields

  • Data Structures
  • Data Fields
  • All
  • Variables
  • _
  • a
  • b
  • c
  • d
  • e
  • f
  • g
  • h
  • i
  • l
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  • n
  • o
  • p
  • q
  • r
  • s
  • t
  • u
  • v
  • w
  • x
  • y
  • z
Here is a list of all struct and union fields with links to the structures/unions they belong to:

- g -

  • GeneralCallState : I2C_OWNSLAVEADDR_CFG_Type
  • getrequestleft : webclient_state
  • getrequestptr : webclient_state
  • giaddr : dhcp_msg
  • GPREG0 : LPC_RTC_TypeDef
  • GPREG1 : LPC_RTC_TypeDef
  • GPREG2 : LPC_RTC_TypeDef
  • GPREG3 : LPC_RTC_TypeDef
  • GPREG4 : LPC_RTC_TypeDef
  • GrayScale : _DATCTR_Data_t
  • GS : _DATCTR_Data_t
  • GSR : LPC_CAN_TypeDef
Generated on Tue Jun 7 15:00:02 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Data Fields

  • Data Structures
  • Data Fields
  • All
  • Variables
  • _
  • a
  • b
  • c
  • d
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  • f
  • g
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  • i
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  • y
  • z
Here is a list of all struct and union fields with links to the structures/unions they belong to:

- h -

  • H_Size : _FontType_t , _Bmp_t
  • handle : __FILE
  • HashCRC : RX_Stat
  • HashFilterH : LPC_EMAC_TypeDef
  • HashFilterL : LPC_EMAC_TypeDef
  • hblenerr : uip_stats
  • HcBulkCurrentED : LPC_USB_TypeDef
  • HcBulkHeadED : LPC_USB_TypeDef
  • HcCommandStatus : LPC_USB_TypeDef
  • HcControl : LPC_USB_TypeDef
  • HcControlCurrentED : LPC_USB_TypeDef
  • HcControlHeadED : LPC_USB_TypeDef
  • HcDoneHead : LPC_USB_TypeDef
  • HcFmInterval : LPC_USB_TypeDef
  • HcFmNumber : LPC_USB_TypeDef
  • HcFmRemaining : LPC_USB_TypeDef
  • HcHCCA : LPC_USB_TypeDef
  • HcInterruptDisable : LPC_USB_TypeDef
  • HcInterruptEnable : LPC_USB_TypeDef
  • HcInterruptStatus : LPC_USB_TypeDef
  • HcLSTreshold : LPC_USB_TypeDef
  • HcPeriodCurrentED : LPC_USB_TypeDef
  • HcPeriodicStart : LPC_USB_TypeDef
  • HcRevision : LPC_USB_TypeDef
  • HcRhDescriptorA : LPC_USB_TypeDef
  • HcRhDescriptorB : LPC_USB_TypeDef
  • HcRhPortStatus1 : LPC_USB_TypeDef
  • HcRhPortStatus2 : LPC_USB_TypeDef
  • HcRhStatus : LPC_USB_TypeDef
  • HFSR : SCB_Type
  • hlen : dhcp_msg
  • hnfEnable : MCPWM_CAPTURE_CFG_Type
  • hops : dhcp_msg
  • host : webclient_state
  • HOUR : RTC_TIME_Type , LPC_RTC_TypeDef
  • httpflag : webclient_state
  • httpheaderline : webclient_state
  • httpheaderlineptr : webclient_state
  • htype : dhcp_msg
  • hwlen : arp_hdr
  • hwtype : arp_hdr
Generated on Tue Jun 7 15:00:02 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Data Fields

  • Data Structures
  • Data Fields
  • All
  • Variables
  • _
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  • s
  • t
  • u
  • v
  • w
  • x
  • y
  • z
Here is a list of all struct and union fields with links to the structures/unions they belong to:

- i -

  • I2ADR0 : LPC_I2C_TypeDef
  • I2ADR1 : LPC_I2C_TypeDef
  • I2ADR2 : LPC_I2C_TypeDef
  • I2ADR3 : LPC_I2C_TypeDef
  • I2C_CLKHI : LPC_USB_TypeDef
  • I2C_CLKLO : LPC_USB_TypeDef
  • I2C_CTL : LPC_USB_TypeDef
  • I2C_RX : LPC_USB_TypeDef
  • I2C_STS : LPC_USB_TypeDef
  • I2C_TX : LPC_USB_TypeDef
  • I2CONCLR : LPC_I2C_TypeDef
  • I2CONSET : LPC_I2C_TypeDef
  • I2CPADCFG : LPC_PINCON_TypeDef
  • I2DAT : LPC_I2C_TypeDef
  • I2DATA_BUFFER : LPC_I2C_TypeDef
  • I2MASK0 : LPC_I2C_TypeDef
  • I2MASK1 : LPC_I2C_TypeDef
  • I2MASK2 : LPC_I2C_TypeDef
  • I2MASK3 : LPC_I2C_TypeDef
  • I2SCLH : LPC_I2C_TypeDef
  • I2SCLL : LPC_I2C_TypeDef
  • I2SDAI : LPC_I2S_TypeDef
  • I2SDAO : LPC_I2S_TypeDef
  • I2SDMA1 : LPC_I2S_TypeDef
  • I2SDMA2 : LPC_I2S_TypeDef
  • I2SIRQ : LPC_I2S_TypeDef
  • I2SRXBITRATE : LPC_I2S_TypeDef
  • I2SRXFIFO : LPC_I2S_TypeDef
  • I2SRXMODE : LPC_I2S_TypeDef
  • I2SRXRATE : LPC_I2S_TypeDef
  • I2SSTATE : LPC_I2S_TypeDef
  • I2STAT : LPC_I2C_TypeDef
  • I2STXBITRATE : LPC_I2S_TypeDef
  • I2STXFIFO : LPC_I2S_TypeDef
  • I2STXMODE : LPC_I2S_TypeDef
  • I2STXRATE : LPC_I2S_TypeDef
  • IABR : NVIC_Type
  • ICER : NVIC_Type
  • icmp : uip_stats
  • icmpchksum : icmpip_hdr , uip_icmpip_hdr
  • icode : icmpip_hdr , uip_icmpip_hdr
  • ICPR : NVIC_Type
  • ICR : LPC_UART_TypeDef , LPC_UART0_TypeDef , LPC_SSP_TypeDef , LPC_CAN_TypeDef
  • ICSR : SCB_Type
  • ICTR : InterruptType_Type
  • id : CAN_MSG_Type , dns_hdr , icmpip_hdr , uip_icmpip_hdr
  • id_11 : FullCAN_Entry , SFF_Entry
  • ID_29 : EFF_Entry
  • IER : LPC_UART_TypeDef , LPC_UART0_TypeDef , LPC_UART1_TypeDef , LPC_CAN_TypeDef
  • IIR : LPC_UART1_TypeDef , LPC_UART_TypeDef , LPC_UART0_TypeDef
  • ILR : LPC_RTC_TypeDef
  • IMCR : ITM_Type
  • IMSC : LPC_SSP_TypeDef
  • Info : RX_Stat , TX_Stat
  • InfoAdr : _USB_DMA_DESCRIPTOR
  • initialmss : uip_conn
  • inputbuf : httpd_state
  • inputbuffer : hello_world_state
  • IntClear : LPC_EMAC_TypeDef
  • IntEnable : LPC_EMAC_TypeDef
  • interval : timer
  • IntOnCaption : PWM_CAPTURECFG_Type , TIM_CAPTURECFG_Type
  • IntOnMatch : TIM_MATCHCFG_Type , PWM_MATCHCFG_Type
  • IntSet : LPC_EMAC_TypeDef
  • IntStatus : LPC_GPIOINT_TypeDef , LPC_EMAC_TypeDef
  • InvertIndex : QEI_CFG_Type
  • INXCMP : LPC_QEI_TypeDef
  • INXCNT : LPC_QEI_TypeDef
  • IO0IntClr : LPC_GPIOINT_TypeDef
  • IO0IntEnF : LPC_GPIOINT_TypeDef
  • IO0IntEnR : LPC_GPIOINT_TypeDef
  • IO0IntStatF : LPC_GPIOINT_TypeDef
  • IO0IntStatR : LPC_GPIOINT_TypeDef
  • IO2IntClr : LPC_GPIOINT_TypeDef
  • IO2IntEnF : LPC_GPIOINT_TypeDef
  • IO2IntEnR : LPC_GPIOINT_TypeDef
  • IO2IntStatF : LPC_GPIOINT_TypeDef
  • IO2IntStatR : LPC_GPIOINT_TypeDef
  • IP : NVIC_Type
  • ip : uip_stats
  • ipaddr : neighbor_entry , namemap , uip_fw_netif , dns_answer , dhcpc_state , arp_entry
  • ipchksum : uip_tcpip_hdr , tcpip_hdr , icmpip_hdr , uip_icmpip_hdr , uip_udpip_hdr , ethip_hdr
  • IPGR : LPC_EMAC_TypeDef
  • IPGT : LPC_EMAC_TypeDef
  • ipid : icmpip_hdr , ethip_hdr , fwcache_entry , uip_icmpip_hdr , tcpip_hdr , uip_udpip_hdr , uip_tcpip_hdr
  • ipoffset : uip_tcpip_hdr , ethip_hdr , icmpip_hdr , tcpip_hdr , uip_udpip_hdr , uip_icmpip_hdr
  • IR : LPC_TIM_TypeDef , LPC_PWM_TypeDef
  • IRCTRIM : LPC_SC_TypeDef
  • IRR : ITM_Type
  • ISAR : SCB_Type
  • ISER : NVIC_Type
  • IsoEP : _USB_DMA_DESCRIPTOR
  • ISPR : NVIC_Type
  • ISR : IPSR_Type , xPSR_Type
  • IT : xPSR_Type
  • IWR : ITM_Type
Generated on Tue Jun 7 15:00:02 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Data Fields

  • Data Structures
  • Data Fields
  • All
  • Variables
  • _
  • a
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  • t
  • u
  • v
  • w
  • x
  • y
  • z
Here is a list of all struct and union fields with links to the structures/unions they belong to:

- p -

  • p : hello_world_state
  • Packet : RX_Desc , TX_Desc
  • Param : _GLCD_CmdCtrl_t
  • Parity : UART_CFG_Type
  • payload : icmpip_hdr
  • pbDataBuf : EMAC_PACKETBUF_Type
  • pbEMAC_Addr : EMAC_CFG_Type
  • PC : LPC_TIM_TypeDef , LPC_PWM_TypeDef
  • PCLKSEL0 : LPC_SC_TypeDef
  • PCLKSEL1 : LPC_SC_TypeDef
  • PCON : LPC_SC_TypeDef
  • PCONP : LPC_SC_TypeDef
  • PCR : LPC_PWM_TypeDef
  • pData : _USB_EP_DATA
  • pFontDesc : _FontType_t
  • pFontStream : _FontType_t
  • PFR : SCB_Type
  • pfunc : ptentry
  • PID0 : ITM_Type
  • PID1 : ITM_Type
  • PID2 : ITM_Type
  • PID3 : ITM_Type
  • PID4 : ITM_Type
  • PID5 : ITM_Type
  • PID6 : ITM_Type
  • PID7 : ITM_Type
  • Pinmode : PINSEL_CFG_Type
  • PINMODE0 : LPC_PINCON_TypeDef
  • PINMODE1 : LPC_PINCON_TypeDef
  • PINMODE2 : LPC_PINCON_TypeDef
  • PINMODE3 : LPC_PINCON_TypeDef
  • PINMODE4 : LPC_PINCON_TypeDef
  • PINMODE5 : LPC_PINCON_TypeDef
  • PINMODE6 : LPC_PINCON_TypeDef
  • PINMODE7 : LPC_PINCON_TypeDef
  • PINMODE8 : LPC_PINCON_TypeDef
  • PINMODE9 : LPC_PINCON_TypeDef
  • PINMODE_OD0 : LPC_PINCON_TypeDef
  • PINMODE_OD1 : LPC_PINCON_TypeDef
  • PINMODE_OD2 : LPC_PINCON_TypeDef
  • PINMODE_OD3 : LPC_PINCON_TypeDef
  • PINMODE_OD4 : LPC_PINCON_TypeDef
  • Pinnum : PINSEL_CFG_Type
  • PINSEL0 : LPC_PINCON_TypeDef
  • PINSEL1 : LPC_PINCON_TypeDef
  • PINSEL10 : LPC_PINCON_TypeDef
  • PINSEL2 : LPC_PINCON_TypeDef
  • PINSEL3 : LPC_PINCON_TypeDef
  • PINSEL4 : LPC_PINCON_TypeDef
  • PINSEL5 : LPC_PINCON_TypeDef
  • PINSEL6 : LPC_PINCON_TypeDef
  • PINSEL7 : LPC_PINCON_TypeDef
  • PINSEL8 : LPC_PINCON_TypeDef
  • PINSEL9 : LPC_PINCON_TypeDef
  • PLL0CFG : LPC_SC_TypeDef
  • PLL0CON : LPC_SC_TypeDef
  • PLL0FEED : LPC_SC_TypeDef
  • PLL0STAT : LPC_SC_TypeDef
  • PLL1CFG : LPC_SC_TypeDef
  • PLL1CON : LPC_SC_TypeDef
  • PLL1FEED : LPC_SC_TypeDef
  • PLL1STAT : LPC_SC_TypeDef
  • PORT : ITM_Type
  • port : webclient_state
  • Portnum : PINSEL_CFG_Type
  • PowerDown : LPC_EMAC_TypeDef
  • pPalette : _Bmp_t
  • pPicDesc : _Bmp_t
  • pPicStream : _Bmp_t
  • PR : LPC_TIM_TypeDef , LPC_PWM_TypeDef
  • PrescaleOption : PWM_TIMERCFG_Type , TIM_TIMERCFG_Type
  • PrescaleValue : TIM_TIMERCFG_Type , PWM_TIMERCFG_Type
  • proto : uip_icmpip_hdr , uip_udpip_hdr , uip_tcpip_hdr , ethip_hdr , tcpip_hdr , fwcache_entry , icmpip_hdr
  • protocol : arp_hdr
  • protoerr : uip_stats
  • protolen : arp_hdr
  • psockpt : psock
  • pt : dhcpc_state
  • ptr : psock_buf
  • Pulse : _GLCD_CmdCtrl_t
Generated on Tue Jun 7 15:00:02 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Data Fields

  • Data Structures
  • Data Fields
  • All
  • Variables
  • _
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  • p
  • q
  • r
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  • t
  • u
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  • w
  • x
  • y
  • z
Here is a list of all struct and union fields with links to the structures/unions they belong to:

- q -

  • Q : APSR_Type , xPSR_Type
  • QEICAP : LPC_QEI_TypeDef
  • QEICLR : LPC_QEI_TypeDef
  • QEICON : LPC_QEI_TypeDef
  • QEICONF : LPC_QEI_TypeDef
  • QEIIE : LPC_QEI_TypeDef
  • QEIIEC : LPC_QEI_TypeDef
  • QEIIES : LPC_QEI_TypeDef
  • QEIINTSTAT : LPC_QEI_TypeDef
  • QEILOAD : LPC_QEI_TypeDef
  • QEIMAXPOS : LPC_QEI_TypeDef
  • QEIPOS : LPC_QEI_TypeDef
  • QEISET : LPC_QEI_TypeDef
  • QEISTAT : LPC_QEI_TypeDef
  • QEITIME : LPC_QEI_TypeDef
  • QEIVEL : LPC_QEI_TypeDef
Generated on Tue Jun 7 15:00:02 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Data Fields

  • Data Structures
  • Data Fields
  • All
  • Variables
  • _
  • a
  • b
  • c
  • d
  • e
  • f
  • g
  • h
  • i
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  • n
  • o
  • p
  • q
  • r
  • s
  • t
  • u
  • v
  • w
  • x
  • y
  • z
Here is a list of all struct and union fields with links to the structures/unions they belong to:

- r -

  • RBR : LPC_UART_TypeDef , LPC_UART0_TypeDef , LPC_UART1_TypeDef
  • RC_AddMode : _DATCTR_Data_t
  • rcv_nxt : uip_conn
  • RD : CAN_PinCFG_Type
  • RDA : LPC_CAN_TypeDef
  • RDB : LPC_CAN_TypeDef
  • rdIdx : __CDC_BUF_T , __SER_BUF_T
  • readlen : psock
  • readptr : psock
  • recv : uip_stats
  • ReloadOption : QEI_RELOADCFG_Type
  • ReloadValue : QEI_RELOADCFG_Type
  • Reserved : I2S_MODEConf_Type , PWM_TIMERCFG_Type , PWM_COUNTERCFG_Type , QEI_RELOADCFG_Type , TIM_TIMERCFG_Type , TIM_COUNTERCFG_Type , TIM_MATCHCFG_Type
  • RESERVED : DAC_CONVERTER_CFG_Type
  • RESERVED0 : LPC_PINCON_TypeDef , LPC_GPIO_TypeDef , LPC_GPIOINT_TypeDef , LPC_TIM_TypeDef , LPC_PWM_TypeDef , LPC_UART_TypeDef , LPC_UART0_TypeDef , LPC_UART1_TypeDef , LPC_SPI_TypeDef , LPC_RIT_TypeDef , LPC_RTC_TypeDef , LPC_WDT_TypeDef , LPC_ADC_TypeDef , LPC_QEI_TypeDef , LPC_USB_TypeDef , LPC_EMAC_TypeDef
  • Reserved0 : I2S_CFG_Type , I2S_DMAConf_Type
  • RESERVED0 : GPIO_Byte_TypeDef , GPIO_HalfWord_TypeDef , NVIC_Type , ITM_Type , InterruptType_Type , LPC_SC_TypeDef
  • RESERVED1 : ITM_Type , InterruptType_Type , LPC_SC_TypeDef , LPC_TIM_TypeDef , LPC_PWM_TypeDef , LPC_UART_TypeDef , LPC_UART0_TypeDef , LPC_UART1_TypeDef , LPC_RTC_TypeDef , LPC_WDT_TypeDef , LPC_USB_TypeDef , LPC_EMAC_TypeDef
  • RESERVED10 : LPC_UART1_TypeDef , LPC_RTC_TypeDef
  • RESERVED11 : LPC_UART1_TypeDef , LPC_RTC_TypeDef
  • RESERVED12 : LPC_RTC_TypeDef
  • RESERVED13 : LPC_RTC_TypeDef
  • RESERVED14 : LPC_RTC_TypeDef
  • RESERVED15 : LPC_RTC_TypeDef
  • RESERVED16 : LPC_RTC_TypeDef
  • RESERVED17 : LPC_RTC_TypeDef
  • RESERVED18 : LPC_RTC_TypeDef
  • RESERVED19 : LPC_RTC_TypeDef
  • RESERVED2 : NVIC_Type , ITM_Type , LPC_SC_TypeDef , LPC_UART_TypeDef , LPC_UART0_TypeDef , LPC_UART1_TypeDef , LPC_RTC_TypeDef , LPC_USB_TypeDef , LPC_EMAC_TypeDef
  • RESERVED20 : LPC_RTC_TypeDef
  • RESERVED21 : LPC_RTC_TypeDef
  • RESERVED3 : NVIC_Type , ITM_Type , LPC_SC_TypeDef , LPC_UART_TypeDef , LPC_UART0_TypeDef , LPC_UART1_TypeDef , LPC_RTC_TypeDef , LPC_USB_TypeDef , LPC_EMAC_TypeDef
  • RESERVED4 : LPC_UART_TypeDef , NVIC_Type , ITM_Type , LPC_SC_TypeDef , LPC_UART0_TypeDef , LPC_UART1_TypeDef , LPC_RTC_TypeDef , LPC_USB_TypeDef , LPC_EMAC_TypeDef
  • RESERVED5 : LPC_RTC_TypeDef , LPC_SC_TypeDef , NVIC_Type , ITM_Type , LPC_UART_TypeDef , LPC_UART0_TypeDef , LPC_UART1_TypeDef , LPC_USB_TypeDef , LPC_EMAC_TypeDef
  • RESERVED6 : LPC_UART_TypeDef , LPC_SC_TypeDef , LPC_UART0_TypeDef , LPC_UART1_TypeDef , LPC_RTC_TypeDef , LPC_EMAC_TypeDef
  • RESERVED7 : LPC_EMAC_TypeDef , LPC_SC_TypeDef , LPC_UART1_TypeDef , LPC_RTC_TypeDef
  • RESERVED8 : LPC_SC_TypeDef , LPC_UART1_TypeDef , LPC_RTC_TypeDef , LPC_EMAC_TypeDef
  • RESERVED9 : LPC_RTC_TypeDef , LPC_UART1_TypeDef
  • reset : I2S_CFG_Type
  • ResetOnMatch : PWM_MATCHCFG_Type , TIM_MATCHCFG_Type
  • retransmissions_count : I2C_M_SETUP_Type
  • retransmissions_max : I2C_M_SETUP_Type
  • retries : namemap
  • Reversed : _DATCTR_Data_t , _COLMOD_Data_t , _MADCTR_Data_t
  • rexmit : uip_stats
  • RFS : LPC_CAN_TypeDef
  • RGB : _MADCTR_Data_t , _DATCTR_Data_t
  • RGB_Mode : _DATCTR_Data_t
  • RICOMPVAL : LPC_RIT_TypeDef
  • RICOUNTER : LPC_RIT_TypeDef
  • RICTRL : LPC_RIT_TypeDef
  • RID : LPC_CAN_TypeDef
  • RIMASK : LPC_RIT_TypeDef
  • ripaddr : uip_conn
  • RIS : LPC_SSP_TypeDef
  • RisingEdge : TIM_CAPTURECFG_Type , PWM_CAPTURECFG_Type
  • rport : uip_conn
  • RS485CTRL : LPC_UART1_TypeDef
  • RS485DLY : LPC_UART1_TypeDef
  • RSERVED1 : NVIC_Type
  • RSID : LPC_SC_TypeDef
  • Rsrvd : _USB_DMA_DESCRIPTOR
  • rst : uip_stats
  • RSV : LPC_EMAC_TypeDef
  • RTC_AUX : LPC_RTC_TypeDef
  • RTC_AUXEN : LPC_RTC_TypeDef
  • rto : uip_conn
  • rx : UART_RING_BUFFER_T
  • rx_cnt : SSP_DATA_SETUP_Type
  • rx_count : I2C_M_SETUP_Type , I2C_S_SETUP_Type
  • rx_data : SSP_DATA_SETUP_Type , SPI_DATA_SETUP_Type , I2C_M_SETUP_Type , I2C_S_SETUP_Type
  • rx_head : UART_RING_BUFFER_T
  • rx_length : I2C_M_SETUP_Type , I2C_S_SETUP_Type
  • Rx_State : UART1_RS485_CTRLCFG_Type
  • rx_tail : UART_RING_BUFFER_T
  • RxConsumeIndex : LPC_EMAC_TypeDef
  • RxDescriptor : LPC_EMAC_TypeDef
  • RxDescriptorNumber : LPC_EMAC_TypeDef
  • RxFilterCtrl : LPC_EMAC_TypeDef
  • RxFilterWoLClear : LPC_EMAC_TypeDef
  • RxFilterWoLStatus : LPC_EMAC_TypeDef
  • RxProduceIndex : LPC_EMAC_TypeDef
  • RxStatus : LPC_EMAC_TypeDef
Generated on Tue Jun 7 15:00:02 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Data Fields

  • Data Structures
  • Data Fields
  • All
  • Variables
  • _
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  • x
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Here is a list of all struct and union fields with links to the structures/unions they belong to:

- s -

  • sa : uip_conn
  • SA0 : LPC_EMAC_TypeDef
  • SA1 : LPC_EMAC_TypeDef
  • SA2 : LPC_EMAC_TypeDef
  • SCR : LPC_UART1_TypeDef , SCB_Type , LPC_UART_TypeDef , LPC_UART0_TypeDef
  • scriptlen : httpd_state
  • scriptpt : httpd_state
  • scriptptr : httpd_state
  • SCS : LPC_SC_TypeDef
  • SEC : RTC_TIME_Type , LPC_RTC_TypeDef
  • secs : dhcp_msg
  • Sel : _ASCSET_Data_t
  • sendlen : psock
  • sendptr : smtp_state , psock
  • sent : uip_stats
  • sentlen : smtp_state
  • seqno : namemap , tcpip_hdr , icmpip_hdr , uip_tcpip_hdr , uip_icmpip_hdr
  • serverid : dhcpc_state
  • SFF_GPR_NumEntry : AF_SectionDef
  • SFF_GPR_Sec : AF_SectionDef
  • SFF_GRP_sa : LPC_CANAF_TypeDef
  • SFF_NumEntry : AF_SectionDef
  • SFF_sa : LPC_CANAF_TypeDef
  • SFF_Sec : AF_SectionDef
  • Sfl : _ASCSET_Data_t
  • SHCSR : SCB_Type
  • SHP : SCB_Type
  • shwaddr : arp_hdr
  • siaddr : dhcp_msg
  • SignalMode : QEI_CFG_Type
  • sipaddr : arp_hdr
  • sl_addr7bit : I2C_M_SETUP_Type
  • SlaveAddr_7bit : I2C_OWNSLAVEADDR_CFG_Type
  • SlaveAddrChannel : I2C_OWNSLAVEADDR_CFG_Type
  • SlaveAddrMaskValue : I2C_OWNSLAVEADDR_CFG_Type
  • Smd : _ASCSET_Data_t
  • sname : dhcp_msg
  • snd_nxt : uip_conn
  • sout : httpd_state
  • SPCCR : LPC_SPI_TypeDef
  • SPCR : LPC_SPI_TypeDef
  • SPDR : LPC_SPI_TypeDef
  • SPINT : LPC_SPI_TypeDef
  • SPSEL : CONTROL_Type
  • SPSR : LPC_SPI_TypeDef
  • SR : LPC_SSP_TypeDef , LPC_CAN_TypeDef
  • src : uip_eth_hdr
  • SrcAddr : GPDMA_LLI_Type
  • SrcConn : GPDMA_Channel_CFG_Type
  • srcipaddr : uip_icmpip_hdr , uip_udpip_hdr , ethip_hdr , uip_tcpip_hdr , tcpip_hdr , icmpip_hdr , fwcache_entry
  • SrcMemAddr : GPDMA_Channel_CFG_Type
  • srcport : tcpip_hdr , uip_udpip_hdr , uip_tcpip_hdr
  • Ssl : _ASCSET_Data_t
  • start : timer
  • state : psock , dhcpc_state , telnetd_state , namemap , smtp_state , httpd_state , webclient_state
  • Status : LPC_EMAC_TypeDef
  • status : SPI_DATA_SETUP_Type
  • Status : PWM_Match_T
  • status : SSP_DATA_SETUP_Type , I2C_M_SETUP_Type , I2C_S_SETUP_Type
  • STIR : NVIC_Type
  • stop : I2S_CFG_Type
  • Stopbits : UART_CFG_Type
  • StopOnMatch : TIM_MATCHCFG_Type , PWM_MATCHCFG_Type
  • subject : smtp_state
  • SUPP : LPC_EMAC_TypeDef
  • sv : uip_conn
  • syndrop : uip_stats
  • synrst : uip_stats
Generated on Tue Jun 7 15:00:02 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Data Fields

  • Data Structures
  • Data Fields
  • All
  • Variables
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  • a
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  • y
  • z
Here is a list of all struct and union fields with links to the structures/unions they belong to:

- t -

  • T : xPSR_Type
  • TC : LPC_TIM_TypeDef , LPC_PWM_TypeDef
  • tcp : uip_stats
  • tcpchksum : tcpip_hdr , uip_tcpip_hdr
  • tcpoffset : uip_tcpip_hdr , tcpip_hdr
  • tcpstateflags : uip_conn
  • TCR : ITM_Type , LPC_TIM_TypeDef , LPC_PWM_TypeDef
  • TD : CAN_PinCFG_Type
  • TDA1 : LPC_CAN_TypeDef
  • TDA2 : LPC_CAN_TypeDef
  • TDA3 : LPC_CAN_TypeDef
  • TDB1 : LPC_CAN_TypeDef
  • TDB2 : LPC_CAN_TypeDef
  • TDB3 : LPC_CAN_TypeDef
  • TER : ITM_Type , LPC_UART_TypeDef , LPC_UART0_TypeDef , LPC_UART1_TypeDef
  • TEST : LPC_EMAC_TypeDef
  • textlen : smtp_state
  • TFI1 : LPC_CAN_TypeDef
  • TFI2 : LPC_CAN_TypeDef
  • TFI3 : LPC_CAN_TypeDef
  • THR : LPC_UART_TypeDef , LPC_UART0_TypeDef , LPC_UART1_TypeDef
  • ticks : dhcpc_state
  • TID1 : LPC_CAN_TypeDef
  • TID2 : LPC_CAN_TypeDef
  • TID3 : LPC_CAN_TypeDef
  • time : neighbor_entry , arp_entry
  • timer : dhcpc_state , webclient_state , httpd_state , fwcache_entry , uip_conn
  • timerReset : MCPWM_CAPTURE_CFG_Type
  • tmr : namemap
  • to : smtp_state
  • tos : tcpip_hdr , icmpip_hdr , uip_tcpip_hdr , uip_icmpip_hdr , uip_udpip_hdr , ethip_hdr
  • TPR : ITM_Type
  • TransferSize : GPDMA_Channel_CFG_Type
  • TransferType : GPDMA_Channel_CFG_Type
  • TransferWidth : GPDMA_Channel_CFG_Type
  • TSV0 : LPC_EMAC_TypeDef
  • TSV1 : LPC_EMAC_TypeDef
  • ttl : ethip_hdr , tcpip_hdr , uip_udpip_hdr , dns_answer , icmpip_hdr , uip_tcpip_hdr , uip_icmpip_hdr
  • tx : UART_RING_BUFFER_T
  • tx_cnt : SSP_DATA_SETUP_Type
  • tx_count : I2C_S_SETUP_Type , I2C_M_SETUP_Type
  • tx_data : SSP_DATA_SETUP_Type , SPI_DATA_SETUP_Type , I2C_M_SETUP_Type , I2C_S_SETUP_Type
  • tx_head : UART_RING_BUFFER_T
  • tx_length : I2C_M_SETUP_Type , I2C_S_SETUP_Type
  • tx_tail : UART_RING_BUFFER_T
  • TxConsumeIndex : LPC_EMAC_TypeDef
  • TxDescriptor : LPC_EMAC_TypeDef
  • TxDescriptorNumber : LPC_EMAC_TypeDef
  • TxProduceIndex : LPC_EMAC_TypeDef
  • txrx_setup : I2C_CFG_T
  • TxStatus : LPC_EMAC_TypeDef
  • Type : _USB_DMA_DESCRIPTOR
  • type : icmpip_hdr , CAN_MSG_Type
  • Type : _USB_DMA_DESCRIPTOR
  • type : uip_icmpip_hdr
  • Type : _USB_DMA_DESCRIPTOR
  • type : dns_answer , uip_eth_hdr
  • Type : _USB_DMA_DESCRIPTOR
  • typeerr : uip_stats
Generated on Tue Jun 7 15:00:02 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Data Fields

  • Data Structures
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Here is a list of all struct and union fields with links to the structures/unions they belong to:

- u -

  • u16 : ITM_Type
  • u32 : ITM_Type
  • u8 : ITM_Type
  • udpchksum : uip_udpip_hdr
  • udplen : uip_udpip_hdr
  • ulDataLen : EMAC_PACKETBUF_Type
  • ulQEIConfig : QEI_CFGOPT_Type
  • unused : fwcache_entry
  • upperEID : EFF_GPR_Entry
  • upperID : SFF_GPR_Entry
  • urgp : tcpip_hdr , uip_tcpip_hdr
  • USBCLKCFG : LPC_SC_TypeDef
  • USBClkCtrl : LPC_USB_TypeDef
  • USBClkSt : LPC_USB_TypeDef
  • USBCmdCode : LPC_USB_TypeDef
  • USBCmdData : LPC_USB_TypeDef
  • USBCtrl : LPC_USB_TypeDef
  • USBDevIntClr : LPC_USB_TypeDef
  • USBDevIntEn : LPC_USB_TypeDef
  • USBDevIntPri : LPC_USB_TypeDef
  • USBDevIntSet : LPC_USB_TypeDef
  • USBDevIntSt : LPC_USB_TypeDef
  • USBDMAIntEn : LPC_USB_TypeDef
  • USBDMAIntSt : LPC_USB_TypeDef
  • USBDMARClr : LPC_USB_TypeDef
  • USBDMARSet : LPC_USB_TypeDef
  • USBDMARSt : LPC_USB_TypeDef
  • USBEoTIntClr : LPC_USB_TypeDef
  • USBEoTIntSet : LPC_USB_TypeDef
  • USBEoTIntSt : LPC_USB_TypeDef
  • USBEpDMADis : LPC_USB_TypeDef
  • USBEpDMAEn : LPC_USB_TypeDef
  • USBEpDMASt : LPC_USB_TypeDef
  • USBEpInd : LPC_USB_TypeDef
  • USBEpIntClr : LPC_USB_TypeDef
  • USBEpIntEn : LPC_USB_TypeDef
  • USBEpIntPri : LPC_USB_TypeDef
  • USBEpIntSet : LPC_USB_TypeDef
  • USBEpIntSt : LPC_USB_TypeDef
  • USBIntSt : LPC_SC_TypeDef
  • USBMaxPSize : LPC_USB_TypeDef
  • USBNDDRIntClr : LPC_USB_TypeDef
  • USBNDDRIntSet : LPC_USB_TypeDef
  • USBNDDRIntSt : LPC_USB_TypeDef
  • USBReEp : LPC_USB_TypeDef
  • USBRxData : LPC_USB_TypeDef
  • USBRxPLen : LPC_USB_TypeDef
  • USBSysErrIntClr : LPC_USB_TypeDef
  • USBSysErrIntSet : LPC_USB_TypeDef
  • USBSysErrIntSt : LPC_USB_TypeDef
  • USBTxData : LPC_USB_TypeDef
  • USBTxPLen : LPC_USB_TypeDef
  • USBUDCAH : LPC_USB_TypeDef
Generated on Tue Jun 7 15:00:02 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Data Fields

  • Data Structures
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Here is a list of all struct and union fields with links to the structures/unions they belong to:

- v -

  • V : APSR_Type , xPSR_Type
  • V_Size : _Bmp_t , _FontType_t
  • VAL : SysTick_Type
  • Val : _USB_DMA_DESCRIPTOR
  • VELCOMP : LPC_QEI_TypeDef
  • vhl : icmpip_hdr , uip_udpip_hdr , uip_icmpip_hdr , tcpip_hdr , uip_tcpip_hdr , ethip_hdr
  • vhlerr : uip_stats
  • VTOR : SCB_Type
Generated on Tue Jun 7 15:00:02 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Data Fields

  • Data Structures
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Here is a list of all struct and union fields with links to the structures/unions they belong to:

- w -

  • w : APSR_Type , IPSR_Type , CONTROL_Type , xPSR_Type
  • WDCLKSEL : LPC_WDT_TypeDef
  • WDFEED : LPC_WDT_TypeDef
  • WDMOD : LPC_WDT_TypeDef
  • WDTC : LPC_WDT_TypeDef
  • WDTV : LPC_WDT_TypeDef
  • wnd : tcpip_hdr , uip_tcpip_hdr
  • wordwidth : I2S_CFG_Type
  • wrIdx : __CDC_BUF_T , __SER_BUF_T
  • ws_sel : I2S_CFG_Type
Generated on Tue Jun 7 15:00:02 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Data Fields

  • Data Structures
  • Data Fields
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Here is a list of all struct and union fields with links to the structures/unions they belong to:

- x -

  • xid : dhcp_msg
Generated on Tue Jun 7 15:00:02 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Data Fields

  • Data Structures
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Here is a list of all struct and union fields with links to the structures/unions they belong to:

- y -

  • YEAR : RTC_TIME_Type , LPC_RTC_TypeDef
  • yiaddr : dhcp_msg
Generated on Tue Jun 7 15:00:02 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Data Fields - Variables

  • Data Structures
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- _ -

  • __pad0__ : _DATCTR_Data_t
  • _reserved0 : CONTROL_Type , xPSR_Type , IPSR_Type , APSR_Type
Generated on Tue Jun 7 15:00:02 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Data Fields - Variables

  • Data Structures
  • Data Fields
  • All
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- l -

  • LAR : ITM_Type
  • lblenerr : uip_stats
  • lc : pt
  • LCR : LPC_UART_TypeDef , LPC_UART0_TypeDef , LPC_UART1_TypeDef
  • lease_time : dhcpc_state
  • left : psock_buf
  • len : icmpip_hdr , uip_conn , CAN_MSG_Type , uip_tcpip_hdr , uip_icmpip_hdr , dns_answer , uip_udpip_hdr , ethip_hdr , httpd_fs_file , httpd_fsdata_file , httpd_fsdata_file_noconst , httpd_state , tcpip_hdr
  • length : SPI_DATA_SETUP_Type , SSP_DATA_SETUP_Type
  • LenPos : _USB_DMA_DESCRIPTOR
  • LER : LPC_PWM_TypeDef
  • line : telnetd_line
  • lines : telnetd_state
  • Link : _USB_DMA_DESCRIPTOR
  • LOAD : SysTick_Type
  • lowerEID : EFF_GPR_Entry
  • lowerID : SFF_GPR_Entry
  • lport : uip_conn
  • LSR : LPC_UART1_TypeDef , ITM_Type , LPC_UART0_TypeDef , LPC_UART_TypeDef
  • LUTerr : LPC_CANAF_TypeDef
  • LUTerrAd : LPC_CANAF_TypeDef
Generated on Tue Jun 7 15:00:03 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Data Fields - Variables

  • Data Structures
  • Data Fields
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- m -

  • MAC1 : LPC_EMAC_TypeDef
  • MAC2 : LPC_EMAC_TypeDef
  • mac_addr : dhcpc_state
  • mac_len : dhcpc_state
  • MADR : LPC_EMAC_TypeDef
  • mask : LPC_CANAF_RAM_TypeDef
  • MatchAddrValue : UART1_RS485_CTRLCFG_Type
  • MatchChannel : PWM_MATCHCFG_Type , TIM_MATCHCFG_Type
  • Matchvalue : PWM_Match_T
  • MatchValue : TIM_MATCHCFG_Type
  • MAXF : LPC_EMAC_TypeDef
  • MaxSize : _USB_DMA_DESCRIPTOR
  • MCCAP_CLR : LPC_MCPWM_TypeDef
  • MCCAPCON : LPC_MCPWM_TypeDef
  • MCCAPCON_CLR : LPC_MCPWM_TypeDef
  • MCCAPCON_SET : LPC_MCPWM_TypeDef
  • MCCCP : LPC_MCPWM_TypeDef
  • MCCNTCON : LPC_MCPWM_TypeDef
  • MCCNTCON_CLR : LPC_MCPWM_TypeDef
  • MCCNTCON_SET : LPC_MCPWM_TypeDef
  • MCCON : LPC_MCPWM_TypeDef
  • MCCON_CLR : LPC_MCPWM_TypeDef
  • MCCON_SET : LPC_MCPWM_TypeDef
  • MCCR0 : LPC_MCPWM_TypeDef
  • MCCR1 : LPC_MCPWM_TypeDef
  • MCCR2 : LPC_MCPWM_TypeDef
  • MCDEADTIME : LPC_MCPWM_TypeDef
  • mcena : I2S_MODEConf_Type
  • MCFG : LPC_EMAC_TypeDef
  • MCINTEN : LPC_MCPWM_TypeDef
  • MCINTEN_CLR : LPC_MCPWM_TypeDef
  • MCINTEN_SET : LPC_MCPWM_TypeDef
  • MCINTFLAG : LPC_MCPWM_TypeDef
  • MCINTFLAG_CLR : LPC_MCPWM_TypeDef
  • MCINTFLAG_SET : LPC_MCPWM_TypeDef
  • MCMD : LPC_EMAC_TypeDef
  • MCPER0 : LPC_MCPWM_TypeDef
  • MCPER1 : LPC_MCPWM_TypeDef
  • MCPER2 : LPC_MCPWM_TypeDef
  • MCPW0 : LPC_MCPWM_TypeDef
  • MCPW1 : LPC_MCPWM_TypeDef
  • MCPW2 : LPC_MCPWM_TypeDef
  • MCR : LPC_TIM_TypeDef , LPC_PWM_TypeDef , LPC_UART1_TypeDef
  • MCTIM0 : LPC_MCPWM_TypeDef
  • MCTIM1 : LPC_MCPWM_TypeDef
  • MCTIM2 : LPC_MCPWM_TypeDef
  • MemDataAccCtrl : _MADCTR_Data_t
  • mimetype : webclient_state
  • MIN : RTC_TIME_Type , LPC_RTC_TypeDef
  • MIND : LPC_EMAC_TypeDef
  • MIS : LPC_SSP_TypeDef
  • ML : _DATCTR_Data_t , _MADCTR_Data_t
  • MMCTRL : LPC_I2C_TypeDef
  • MMFAR : SCB_Type
  • MMFR : SCB_Type
  • MOD : LPC_CAN_TypeDef
  • Mode : SPI_CFG_Type , SSP_CFG_Type , _COLMOD_Data_t , EMAC_CFG_Type
  • Module_ID : LPC_USB_TypeDef , LPC_EMAC_TypeDef
  • mono : I2S_CFG_Type
  • MONTH : LPC_RTC_TypeDef , RTC_TIME_Type
  • MR0 : LPC_PWM_TypeDef , LPC_TIM_TypeDef
  • MR1 : LPC_PWM_TypeDef , LPC_TIM_TypeDef
  • MR2 : LPC_PWM_TypeDef , LPC_TIM_TypeDef
  • MR3 : LPC_TIM_TypeDef , LPC_PWM_TypeDef
  • MR4 : LPC_PWM_TypeDef
  • MR5 : LPC_PWM_TypeDef
  • MR6 : LPC_PWM_TypeDef
  • MRDD : LPC_EMAC_TypeDef
  • msg : smtp_state
  • msglen : smtp_state
  • MSR : LPC_UART1_TypeDef
  • mss : uip_conn
  • mute : I2S_CFG_Type
  • MV : _MADCTR_Data_t , _DATCTR_Data_t
  • MWTD : LPC_EMAC_TypeDef
  • MX : _DATCTR_Data_t , _MADCTR_Data_t
  • MY : _DATCTR_Data_t , _MADCTR_Data_t
Generated on Tue Jun 7 15:00:03 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Data Fields - Variables

  • Data Structures
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- n -

  • N : APSR_Type , xPSR_Type
  • name : namemap , httpd_cgi_call , hello_world_state , httpd_fsdata_file , httpd_fsdata_file_noconst
  • netmask : dhcpc_state , uip_fw_netif
  • next : httpd_fsdata_file , httpd_fsdata_file_noconst , uip_fw_netif
  • NextLLI : GPDMA_LLI_Type
  • NormalMultiDropMode_State : UART1_RS485_CTRLCFG_Type
  • nPRIV : CONTROL_Type
  • nrtx : uip_conn
  • numanswers : dns_hdr
  • numauthrr : dns_hdr
  • numextrarr : dns_hdr
  • numquestions : dns_hdr
  • numsent : telnetd_state
Generated on Tue Jun 7 15:00:03 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Data Fields - Variables

  • Data Structures
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- o -

  • op : dhcp_msg
  • opcode : arp_hdr
  • OpenDrain : PINSEL_CFG_Type
  • optdata : tcpip_hdr , uip_tcpip_hdr
  • options : dhcp_msg
  • OTGClkCtrl : LPC_USB_TypeDef
  • OTGClkSt : LPC_USB_TypeDef
  • OTGIntClr : LPC_USB_TypeDef
  • OTGIntEn : LPC_USB_TypeDef
  • OTGIntSet : LPC_USB_TypeDef
  • OTGIntSt : LPC_USB_TypeDef
  • OTGStCtrl : LPC_USB_TypeDef
  • OTGTmr : LPC_USB_TypeDef
  • output : uip_fw_netif
Generated on Tue Jun 7 15:00:03 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Data Fields - Variables

  • Data Structures
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- z -

  • Z : APSR_Type , xPSR_Type
Generated on Tue Jun 7 15:00:03 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Data Fields - Variables

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- a -

  • ABMode : UART_AB_CFG_Type
  • ackerr : uip_stats
  • ackno : uip_tcpip_hdr , tcpip_hdr
  • ACR : LPC_UART_TypeDef , LPC_UART0_TypeDef , LPC_UART1_TypeDef
  • ADCR : LPC_ADC_TypeDef
  • addr : neighbor_entry , uip_neighbor_addr , uip_eth_addr
  • ADDR0 : LPC_ADC_TypeDef
  • ADDR1 : LPC_ADC_TypeDef
  • ADDR2 : LPC_ADC_TypeDef
  • ADDR3 : LPC_ADC_TypeDef
  • ADDR4 : LPC_ADC_TypeDef
  • ADDR5 : LPC_ADC_TypeDef
  • ADDR6 : LPC_ADC_TypeDef
  • ADDR7 : LPC_ADC_TypeDef
  • ADGDR : LPC_ADC_TypeDef
  • ADINTEN : LPC_ADC_TypeDef
  • ADR : SCB_Type
  • ADRMATCH : LPC_UART1_TypeDef
  • ADSTAT : LPC_ADC_TypeDef
  • ADTRM : LPC_ADC_TypeDef
  • AFMR : LPC_CANAF_TypeDef
  • AFSR : SCB_Type
  • AIRCR : SCB_Type
  • ALDOM : LPC_RTC_TypeDef
  • ALDOW : LPC_RTC_TypeDef
  • ALDOY : LPC_RTC_TypeDef
  • ALHOUR : LPC_RTC_TypeDef
  • ALMIN : LPC_RTC_TypeDef
  • ALMON : LPC_RTC_TypeDef
  • ALSEC : LPC_RTC_TypeDef
  • ALYEAR : LPC_RTC_TypeDef
  • AMR : LPC_RTC_TypeDef
  • appstate : uip_conn
  • ATLE : _USB_DMA_DESCRIPTOR
  • AutoAddrDetect_State : UART1_RS485_CTRLCFG_Type
  • AutoDirCtrl_State : UART1_RS485_CTRLCFG_Type
  • AutoRestart : UART_AB_CFG_Type
Generated on Tue Jun 7 15:00:02 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Data Fields - Variables

  • Data Structures
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- b -

  • b : APSR_Type , IPSR_Type , CONTROL_Type , xPSR_Type
  • Baud_rate : UART_CFG_Type
  • BFAR : SCB_Type
  • BitsPP : _Bmp_t
  • bmQEIConfig : QEI_CFGOPT_Type
  • BTR : LPC_CAN_TypeDef
  • buf : psock , telnetd_state
  • BufAdr : _USB_DMA_DESCRIPTOR
  • BufLen : _USB_DMA_DESCRIPTOR
  • bufptr : telnetd_state , psock
  • bufsize : psock
  • BytesPP : _Bmp_t
Generated on Tue Jun 7 15:00:02 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Data Fields - Variables

  • Data Structures
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  • C : APSR_Type , xPSR_Type
  • CALIB : SysTick_Type
  • CALIBRATION : LPC_RTC_TypeDef
  • callback : I2C_M_SETUP_Type , I2C_S_SETUP_Type
  • CANMSR : LPC_CANCR_TypeDef
  • CANRxSR : LPC_CANCR_TypeDef
  • CANSLEEPCLR : LPC_SC_TypeDef
  • CANTxSR : LPC_CANCR_TypeDef
  • CANWAKEFLAGS : LPC_SC_TypeDef
  • CaptureChannel : PWM_CAPTURECFG_Type , TIM_CAPTURECFG_Type
  • captureChannel : MCPWM_CAPTURE_CFG_Type
  • captureFalling : MCPWM_CAPTURE_CFG_Type
  • CaptureMode : QEI_CFG_Type
  • captureRising : MCPWM_CAPTURE_CFG_Type
  • CCLKCFG : LPC_SC_TypeDef
  • CCR : SCB_Type , LPC_TIM_TypeDef , LPC_PWM_TypeDef , LPC_RTC_TypeDef
  • Cfg : _USB_DMA_DESCRIPTOR
  • CFSR : SCB_Type
  • chaddr : dhcp_msg
  • channelDeadtimeEnable : MCPWM_CHANNEL_CFG_Type
  • channelDeadtimeValue : MCPWM_CHANNEL_CFG_Type
  • ChannelNum : GPDMA_Channel_CFG_Type
  • channelPeriodValue : MCPWM_CHANNEL_CFG_Type
  • channelPolarity : MCPWM_CHANNEL_CFG_Type
  • channelPulsewidthValue : MCPWM_CHANNEL_CFG_Type
  • channelTimercounterValue : MCPWM_CHANNEL_CFG_Type
  • channelType : MCPWM_CHANNEL_CFG_Type
  • channelUpdateEnable : MCPWM_CHANNEL_CFG_Type
  • CharacterOffset : _FontType_t
  • CharactersNuber : _FontType_t
  • chkerr : uip_stats
  • ciaddr : dhcp_msg
  • CID0 : ITM_Type
  • CID1 : ITM_Type
  • CID2 : ITM_Type
  • CID3 : ITM_Type
  • CIIR : LPC_RTC_TypeDef
  • class : dns_answer
  • CLKOUTCFG : LPC_SC_TypeDef
  • clksel : I2S_MODEConf_Type
  • CLKSRCSEL : LPC_SC_TypeDef
  • ClockRate : SPI_CFG_Type , SSP_CFG_Type
  • CLRT : LPC_EMAC_TypeDef
  • Cmd : _GLCD_CmdCtrl_t
  • CMPOS0 : LPC_QEI_TypeDef
  • CMPOS1 : LPC_QEI_TypeDef
  • CMPOS2 : LPC_QEI_TypeDef
  • CMR : LPC_CAN_TypeDef
  • CNT_ENA : DAC_CONVERTER_CFG_Type
  • ColourMode : _COLMOD_Data_t
  • Command : LPC_EMAC_TypeDef
  • commandstr : ptentry
  • conn : dhcpc_state
  • Control : GPDMA_LLI_Type
  • controller : EFF_Entry , FullCAN_Entry , SFF_Entry
  • controller1 : SFF_GPR_Entry , EFF_GPR_Entry
  • controller2 : SFF_GPR_Entry , EFF_GPR_Entry
  • count : httpd_state
  • Count : _USB_EP_DATA
  • counter : SPI_DATA_SETUP_Type
  • counterChannel : MCPWM_COUNT_CFG_Type
  • CounterOption : PWM_COUNTERCFG_Type , TIM_COUNTERCFG_Type
  • countFalling : MCPWM_COUNT_CFG_Type
  • CountInputSelect : TIM_COUNTERCFG_Type , PWM_COUNTERCFG_Type
  • countRising : MCPWM_COUNT_CFG_Type
  • CPHA : SPI_CFG_Type , SSP_CFG_Type
  • CPOL : SPI_CFG_Type , SSP_CFG_Type
  • CPSR : LPC_SSP_TypeDef
  • CPUID : SCB_Type
  • CR0 : LPC_TIM_TypeDef , LPC_SSP_TypeDef , LPC_PWM_TypeDef
  • CR1 : LPC_TIM_TypeDef , LPC_SSP_TypeDef , LPC_PWM_TypeDef
  • CR2 : LPC_PWM_TypeDef
  • CR3 : LPC_PWM_TypeDef
  • CTCR : LPC_TIM_TypeDef , LPC_PWM_TypeDef
  • CTIME0 : LPC_RTC_TypeDef
  • CTIME1 : LPC_RTC_TypeDef
  • CTIME2 : LPC_RTC_TypeDef
  • Ctrl : RX_Desc , TX_Desc
  • CTRL : SysTick_Type
Generated on Tue Jun 7 15:00:02 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Data Fields - Variables

  • Data Structures
  • Data Fields
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- d -

  • DACCNTVAL : LPC_DAC_TypeDef
  • DACCTRL : LPC_DAC_TypeDef
  • DACR : LPC_DAC_TypeDef
  • data : httpd_fs_file , __SER_BUF_T , httpd_fsdata_file , httpd_fsdata_file_noconst , __CDC_BUF_T
  • dataA : CAN_MSG_Type
  • dataB : CAN_MSG_Type
  • Databit : SPI_CFG_Type , SSP_CFG_Type
  • Databits : UART_CFG_Type
  • DataOrder : SPI_CFG_Type
  • DBLBUF_ENA : DAC_CONVERTER_CFG_Type
  • DCRDR : CoreDebug_Type
  • DCRSR : CoreDebug_Type
  • default_router : dhcpc_state
  • DelayValue : UART1_RS485_CTRLCFG_Type
  • DEMCR : CoreDebug_Type
  • depth : I2S_DMAConf_Type
  • dest : uip_eth_hdr
  • destipaddr : tcpip_hdr , icmpip_hdr , fwcache_entry , uip_tcpip_hdr , uip_icmpip_hdr , uip_udpip_hdr , ethip_hdr
  • destport : uip_udpip_hdr , tcpip_hdr , uip_tcpip_hdr
  • DFR : SCB_Type
  • DFSR : SCB_Type
  • DHCSR : CoreDebug_Type
  • dhwaddr : arp_hdr
  • dipaddr : arp_hdr
  • dir : I2C_CFG_T
  • Dir : _GLCD_CmdCtrl_t
  • DirCtrlPin : UART1_RS485_CTRLCFG_Type
  • DirCtrlPol_Level : UART1_RS485_CTRLCFG_Type
  • DirectionInvert : QEI_CFG_Type
  • disable : FullCAN_Entry , SFF_Entry
  • disable1 : SFF_GPR_Entry
  • disable2 : SFF_GPR_Entry
  • DLL : LPC_UART_TypeDef , LPC_UART0_TypeDef , LPC_UART1_TypeDef
  • DLM : LPC_UART_TypeDef , LPC_UART0_TypeDef , LPC_UART1_TypeDef
  • DMA_ENA : DAC_CONVERTER_CFG_Type
  • DMACCConfig : LPC_GPDMACH_TypeDef
  • DMACCControl : LPC_GPDMACH_TypeDef
  • DMACCDestAddr : LPC_GPDMACH_TypeDef
  • DMACCLLI : LPC_GPDMACH_TypeDef
  • DMACConfig : LPC_GPDMA_TypeDef
  • DMACCSrcAddr : LPC_GPDMACH_TypeDef
  • DMACEnbldChns : LPC_GPDMA_TypeDef
  • DMACIntErrClr : LPC_GPDMA_TypeDef
  • DMACIntErrStat : LPC_GPDMA_TypeDef
  • DMACIntStat : LPC_GPDMA_TypeDef
  • DMACIntTCClear : LPC_GPDMA_TypeDef
  • DMACIntTCStat : LPC_GPDMA_TypeDef
  • DMACR : LPC_SSP_TypeDef
  • DMACRawIntErrStat : LPC_GPDMA_TypeDef
  • DMACRawIntTCStat : LPC_GPDMA_TypeDef
  • DMACSoftBReq : LPC_GPDMA_TypeDef
  • DMACSoftLBReq : LPC_GPDMA_TypeDef
  • DMACSoftLSReq : LPC_GPDMA_TypeDef
  • DMACSoftSReq : LPC_GPDMA_TypeDef
  • DMACSync : LPC_GPDMA_TypeDef
  • DMAIndex : I2S_DMAConf_Type
  • DMALLI : GPDMA_Channel_CFG_Type
  • DMAREQSEL : LPC_SC_TypeDef
  • dnsaddr : dhcpc_state
  • DOM : LPC_RTC_TypeDef , RTC_TIME_Type
  • DOW : RTC_TIME_Type , LPC_RTC_TypeDef
  • DOY : LPC_RTC_TypeDef , RTC_TIME_Type
  • DR : LPC_SSP_TypeDef
  • drop : uip_stats
  • DstAddr : GPDMA_LLI_Type
  • DstConn : GPDMA_Channel_CFG_Type
  • DstMemAddr : GPDMA_Channel_CFG_Type
Generated on Tue Jun 7 15:00:02 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Data Fields - Variables

  • Data Structures
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- e -

  • EFF_GPR_NumEntry : AF_SectionDef
  • EFF_GPR_Sec : AF_SectionDef
  • EFF_GRP_sa : LPC_CANAF_TypeDef
  • EFF_NumEntry : AF_SectionDef
  • EFF_sa : LPC_CANAF_TypeDef
  • EFF_Sec : AF_SectionDef
  • EMR : LPC_TIM_TypeDef
  • ENDofTable : LPC_CANAF_TypeDef
  • err : namemap
  • ethaddr : arp_entry
  • ethhdr : arp_hdr , ethip_hdr
  • EWL : LPC_CAN_TypeDef
  • EXTI_Line : EXTI_InitTypeDef
  • EXTI_Mode : EXTI_InitTypeDef
  • EXTI_polarity : EXTI_InitTypeDef
  • EXTINT : LPC_SC_TypeDef
  • ExtMatchOutputType : TIM_MATCHCFG_Type
  • EXTMODE : LPC_SC_TypeDef
  • EXTPOLAR : LPC_SC_TypeDef
Generated on Tue Jun 7 15:00:02 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Data Fields - Variables

  • Data Structures
  • Data Fields
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- f -

  • FallingEdge : PWM_CAPTURECFG_Type , TIM_CAPTURECFG_Type
  • FC_NumEntry : AF_SectionDef
  • FCANIC0 : LPC_CANAF_TypeDef
  • FCANIC1 : LPC_CANAF_TypeDef
  • FCANIE : LPC_CANAF_TypeDef
  • FCR : LPC_UART0_TypeDef , LPC_UART1_TypeDef , LPC_UART_TypeDef
  • FDR : LPC_UART_TypeDef , LPC_UART0_TypeDef , LPC_UART1_TypeDef
  • FIFO_DMAMode : UART_FIFO_CFG_Type
  • FIFO_Level : UART_FIFO_CFG_Type
  • FIFO_ResetRxBuf : UART_FIFO_CFG_Type
  • FIFO_ResetTxBuf : UART_FIFO_CFG_Type
  • FIFOLVL : LPC_UART_TypeDef , LPC_UART0_TypeDef , LPC_UART1_TypeDef
  • file : dhcp_msg , webclient_state , httpd_state
  • filename : httpd_state
  • FILTER : LPC_QEI_TypeDef
  • FIOCLR : GPIO_Byte_TypeDef , LPC_GPIO_TypeDef
  • FIOCLR0 : LPC_GPIO_TypeDef
  • FIOCLR1 : LPC_GPIO_TypeDef
  • FIOCLR2 : LPC_GPIO_TypeDef
  • FIOCLR3 : LPC_GPIO_TypeDef
  • FIOCLRH : LPC_GPIO_TypeDef
  • FIOCLRL : GPIO_HalfWord_TypeDef , LPC_GPIO_TypeDef
  • FIOCLRU : GPIO_HalfWord_TypeDef
  • FIODIR : GPIO_Byte_TypeDef , LPC_GPIO_TypeDef
  • FIODIR0 : LPC_GPIO_TypeDef
  • FIODIR1 : LPC_GPIO_TypeDef
  • FIODIR2 : LPC_GPIO_TypeDef
  • FIODIR3 : LPC_GPIO_TypeDef
  • FIODIRH : LPC_GPIO_TypeDef
  • FIODIRL : GPIO_HalfWord_TypeDef , LPC_GPIO_TypeDef
  • FIODIRU : GPIO_HalfWord_TypeDef
  • FIOMASK : GPIO_Byte_TypeDef , LPC_GPIO_TypeDef
  • FIOMASK0 : LPC_GPIO_TypeDef
  • FIOMASK1 : LPC_GPIO_TypeDef
  • FIOMASK2 : LPC_GPIO_TypeDef
  • FIOMASK3 : LPC_GPIO_TypeDef
  • FIOMASKH : LPC_GPIO_TypeDef
  • FIOMASKL : GPIO_HalfWord_TypeDef , LPC_GPIO_TypeDef
  • FIOMASKU : GPIO_HalfWord_TypeDef
  • FIOPIN : GPIO_Byte_TypeDef , LPC_GPIO_TypeDef
  • FIOPIN0 : LPC_GPIO_TypeDef
  • FIOPIN1 : LPC_GPIO_TypeDef
  • FIOPIN2 : LPC_GPIO_TypeDef
  • FIOPIN3 : LPC_GPIO_TypeDef
  • FIOPINH : LPC_GPIO_TypeDef
  • FIOPINL : LPC_GPIO_TypeDef , GPIO_HalfWord_TypeDef
  • FIOPINU : GPIO_HalfWord_TypeDef
  • FIOSET : GPIO_Byte_TypeDef , LPC_GPIO_TypeDef
  • FIOSET0 : LPC_GPIO_TypeDef
  • FIOSET1 : LPC_GPIO_TypeDef
  • FIOSET2 : LPC_GPIO_TypeDef
  • FIOSET3 : LPC_GPIO_TypeDef
  • FIOSETH : LPC_GPIO_TypeDef
  • FIOSETL : GPIO_HalfWord_TypeDef , LPC_GPIO_TypeDef
  • FIOSETU : GPIO_HalfWord_TypeDef
  • flags : uip_tcpip_hdr , tcpip_hdr , dhcp_msg
  • flags1 : dns_hdr
  • flags2 : dns_hdr
  • FLASHCFG : LPC_SC_TypeDef
  • FlowControlCounter : LPC_EMAC_TypeDef
  • FlowControlStatus : LPC_EMAC_TypeDef
  • format : CAN_MSG_Type
  • FPCA : CONTROL_Type
  • fpin : I2S_MODEConf_Type
  • fragerr : uip_stats
  • FrameFormat : SSP_CFG_Type
  • from : smtp_state
  • FullCAN_Sec : AF_SectionDef
  • Funcnum : PINSEL_CFG_Type
  • function : httpd_cgi_call
Generated on Tue Jun 7 15:00:02 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Data Fields - Variables

  • Data Structures
  • Data Fields
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- g -

  • GeneralCallState : I2C_OWNSLAVEADDR_CFG_Type
  • getrequestleft : webclient_state
  • getrequestptr : webclient_state
  • giaddr : dhcp_msg
  • GPREG0 : LPC_RTC_TypeDef
  • GPREG1 : LPC_RTC_TypeDef
  • GPREG2 : LPC_RTC_TypeDef
  • GPREG3 : LPC_RTC_TypeDef
  • GPREG4 : LPC_RTC_TypeDef
  • GrayScale : _DATCTR_Data_t
  • GS : _DATCTR_Data_t
  • GSR : LPC_CAN_TypeDef
Generated on Tue Jun 7 15:00:02 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Data Fields - Variables

  • Data Structures
  • Data Fields
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- h -

  • H_Size : _FontType_t , _Bmp_t
  • handle : __FILE
  • HashCRC : RX_Stat
  • HashFilterH : LPC_EMAC_TypeDef
  • HashFilterL : LPC_EMAC_TypeDef
  • hblenerr : uip_stats
  • HcBulkCurrentED : LPC_USB_TypeDef
  • HcBulkHeadED : LPC_USB_TypeDef
  • HcCommandStatus : LPC_USB_TypeDef
  • HcControl : LPC_USB_TypeDef
  • HcControlCurrentED : LPC_USB_TypeDef
  • HcControlHeadED : LPC_USB_TypeDef
  • HcDoneHead : LPC_USB_TypeDef
  • HcFmInterval : LPC_USB_TypeDef
  • HcFmNumber : LPC_USB_TypeDef
  • HcFmRemaining : LPC_USB_TypeDef
  • HcHCCA : LPC_USB_TypeDef
  • HcInterruptDisable : LPC_USB_TypeDef
  • HcInterruptEnable : LPC_USB_TypeDef
  • HcInterruptStatus : LPC_USB_TypeDef
  • HcLSTreshold : LPC_USB_TypeDef
  • HcPeriodCurrentED : LPC_USB_TypeDef
  • HcPeriodicStart : LPC_USB_TypeDef
  • HcRevision : LPC_USB_TypeDef
  • HcRhDescriptorA : LPC_USB_TypeDef
  • HcRhDescriptorB : LPC_USB_TypeDef
  • HcRhPortStatus1 : LPC_USB_TypeDef
  • HcRhPortStatus2 : LPC_USB_TypeDef
  • HcRhStatus : LPC_USB_TypeDef
  • HFSR : SCB_Type
  • hlen : dhcp_msg
  • hnfEnable : MCPWM_CAPTURE_CFG_Type
  • hops : dhcp_msg
  • host : webclient_state
  • HOUR : RTC_TIME_Type , LPC_RTC_TypeDef
  • httpflag : webclient_state
  • httpheaderline : webclient_state
  • httpheaderlineptr : webclient_state
  • htype : dhcp_msg
  • hwlen : arp_hdr
  • hwtype : arp_hdr
Generated on Tue Jun 7 15:00:02 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Data Fields - Variables

  • Data Structures
  • Data Fields
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- i -

  • I2ADR0 : LPC_I2C_TypeDef
  • I2ADR1 : LPC_I2C_TypeDef
  • I2ADR2 : LPC_I2C_TypeDef
  • I2ADR3 : LPC_I2C_TypeDef
  • I2C_CLKHI : LPC_USB_TypeDef
  • I2C_CLKLO : LPC_USB_TypeDef
  • I2C_CTL : LPC_USB_TypeDef
  • I2C_RX : LPC_USB_TypeDef
  • I2C_STS : LPC_USB_TypeDef
  • I2C_TX : LPC_USB_TypeDef
  • I2CONCLR : LPC_I2C_TypeDef
  • I2CONSET : LPC_I2C_TypeDef
  • I2CPADCFG : LPC_PINCON_TypeDef
  • I2DAT : LPC_I2C_TypeDef
  • I2DATA_BUFFER : LPC_I2C_TypeDef
  • I2MASK0 : LPC_I2C_TypeDef
  • I2MASK1 : LPC_I2C_TypeDef
  • I2MASK2 : LPC_I2C_TypeDef
  • I2MASK3 : LPC_I2C_TypeDef
  • I2SCLH : LPC_I2C_TypeDef
  • I2SCLL : LPC_I2C_TypeDef
  • I2SDAI : LPC_I2S_TypeDef
  • I2SDAO : LPC_I2S_TypeDef
  • I2SDMA1 : LPC_I2S_TypeDef
  • I2SDMA2 : LPC_I2S_TypeDef
  • I2SIRQ : LPC_I2S_TypeDef
  • I2SRXBITRATE : LPC_I2S_TypeDef
  • I2SRXFIFO : LPC_I2S_TypeDef
  • I2SRXMODE : LPC_I2S_TypeDef
  • I2SRXRATE : LPC_I2S_TypeDef
  • I2SSTATE : LPC_I2S_TypeDef
  • I2STAT : LPC_I2C_TypeDef
  • I2STXBITRATE : LPC_I2S_TypeDef
  • I2STXFIFO : LPC_I2S_TypeDef
  • I2STXMODE : LPC_I2S_TypeDef
  • I2STXRATE : LPC_I2S_TypeDef
  • IABR : NVIC_Type
  • ICER : NVIC_Type
  • icmp : uip_stats
  • icmpchksum : icmpip_hdr , uip_icmpip_hdr
  • icode : icmpip_hdr , uip_icmpip_hdr
  • ICPR : NVIC_Type
  • ICR : LPC_UART_TypeDef , LPC_UART0_TypeDef , LPC_SSP_TypeDef , LPC_CAN_TypeDef
  • ICSR : SCB_Type
  • ICTR : InterruptType_Type
  • id : CAN_MSG_Type , dns_hdr , icmpip_hdr , uip_icmpip_hdr
  • id_11 : FullCAN_Entry , SFF_Entry
  • ID_29 : EFF_Entry
  • IER : LPC_UART_TypeDef , LPC_UART0_TypeDef , LPC_UART1_TypeDef , LPC_CAN_TypeDef
  • IIR : LPC_UART1_TypeDef , LPC_UART_TypeDef , LPC_UART0_TypeDef
  • ILR : LPC_RTC_TypeDef
  • IMCR : ITM_Type
  • IMSC : LPC_SSP_TypeDef
  • Info : RX_Stat , TX_Stat
  • InfoAdr : _USB_DMA_DESCRIPTOR
  • initialmss : uip_conn
  • inputbuf : httpd_state
  • inputbuffer : hello_world_state
  • IntClear : LPC_EMAC_TypeDef
  • IntEnable : LPC_EMAC_TypeDef
  • interval : timer
  • IntOnCaption : PWM_CAPTURECFG_Type , TIM_CAPTURECFG_Type
  • IntOnMatch : TIM_MATCHCFG_Type , PWM_MATCHCFG_Type
  • IntSet : LPC_EMAC_TypeDef
  • IntStatus : LPC_GPIOINT_TypeDef , LPC_EMAC_TypeDef
  • InvertIndex : QEI_CFG_Type
  • INXCMP : LPC_QEI_TypeDef
  • INXCNT : LPC_QEI_TypeDef
  • IO0IntClr : LPC_GPIOINT_TypeDef
  • IO0IntEnF : LPC_GPIOINT_TypeDef
  • IO0IntEnR : LPC_GPIOINT_TypeDef
  • IO0IntStatF : LPC_GPIOINT_TypeDef
  • IO0IntStatR : LPC_GPIOINT_TypeDef
  • IO2IntClr : LPC_GPIOINT_TypeDef
  • IO2IntEnF : LPC_GPIOINT_TypeDef
  • IO2IntEnR : LPC_GPIOINT_TypeDef
  • IO2IntStatF : LPC_GPIOINT_TypeDef
  • IO2IntStatR : LPC_GPIOINT_TypeDef
  • IP : NVIC_Type
  • ip : uip_stats
  • ipaddr : neighbor_entry , namemap , uip_fw_netif , dns_answer , dhcpc_state , arp_entry
  • ipchksum : uip_tcpip_hdr , tcpip_hdr , icmpip_hdr , uip_icmpip_hdr , uip_udpip_hdr , ethip_hdr
  • IPGR : LPC_EMAC_TypeDef
  • IPGT : LPC_EMAC_TypeDef
  • ipid : icmpip_hdr , ethip_hdr , fwcache_entry , uip_icmpip_hdr , tcpip_hdr , uip_udpip_hdr , uip_tcpip_hdr
  • ipoffset : uip_tcpip_hdr , ethip_hdr , icmpip_hdr , tcpip_hdr , uip_udpip_hdr , uip_icmpip_hdr
  • IR : LPC_TIM_TypeDef , LPC_PWM_TypeDef
  • IRCTRIM : LPC_SC_TypeDef
  • IRR : ITM_Type
  • ISAR : SCB_Type
  • ISER : NVIC_Type
  • IsoEP : _USB_DMA_DESCRIPTOR
  • ISPR : NVIC_Type
  • ISR : IPSR_Type , xPSR_Type
  • IT : xPSR_Type
  • IWR : ITM_Type
Generated on Tue Jun 7 15:00:02 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Data Fields - Variables

  • Data Structures
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- p -

  • p : hello_world_state
  • Packet : RX_Desc , TX_Desc
  • Param : _GLCD_CmdCtrl_t
  • Parity : UART_CFG_Type
  • payload : icmpip_hdr
  • pbDataBuf : EMAC_PACKETBUF_Type
  • pbEMAC_Addr : EMAC_CFG_Type
  • PC : LPC_TIM_TypeDef , LPC_PWM_TypeDef
  • PCLKSEL0 : LPC_SC_TypeDef
  • PCLKSEL1 : LPC_SC_TypeDef
  • PCON : LPC_SC_TypeDef
  • PCONP : LPC_SC_TypeDef
  • PCR : LPC_PWM_TypeDef
  • pData : _USB_EP_DATA
  • pFontDesc : _FontType_t
  • pFontStream : _FontType_t
  • PFR : SCB_Type
  • pfunc : ptentry
  • PID0 : ITM_Type
  • PID1 : ITM_Type
  • PID2 : ITM_Type
  • PID3 : ITM_Type
  • PID4 : ITM_Type
  • PID5 : ITM_Type
  • PID6 : ITM_Type
  • PID7 : ITM_Type
  • Pinmode : PINSEL_CFG_Type
  • PINMODE0 : LPC_PINCON_TypeDef
  • PINMODE1 : LPC_PINCON_TypeDef
  • PINMODE2 : LPC_PINCON_TypeDef
  • PINMODE3 : LPC_PINCON_TypeDef
  • PINMODE4 : LPC_PINCON_TypeDef
  • PINMODE5 : LPC_PINCON_TypeDef
  • PINMODE6 : LPC_PINCON_TypeDef
  • PINMODE7 : LPC_PINCON_TypeDef
  • PINMODE8 : LPC_PINCON_TypeDef
  • PINMODE9 : LPC_PINCON_TypeDef
  • PINMODE_OD0 : LPC_PINCON_TypeDef
  • PINMODE_OD1 : LPC_PINCON_TypeDef
  • PINMODE_OD2 : LPC_PINCON_TypeDef
  • PINMODE_OD3 : LPC_PINCON_TypeDef
  • PINMODE_OD4 : LPC_PINCON_TypeDef
  • Pinnum : PINSEL_CFG_Type
  • PINSEL0 : LPC_PINCON_TypeDef
  • PINSEL1 : LPC_PINCON_TypeDef
  • PINSEL10 : LPC_PINCON_TypeDef
  • PINSEL2 : LPC_PINCON_TypeDef
  • PINSEL3 : LPC_PINCON_TypeDef
  • PINSEL4 : LPC_PINCON_TypeDef
  • PINSEL5 : LPC_PINCON_TypeDef
  • PINSEL6 : LPC_PINCON_TypeDef
  • PINSEL7 : LPC_PINCON_TypeDef
  • PINSEL8 : LPC_PINCON_TypeDef
  • PINSEL9 : LPC_PINCON_TypeDef
  • PLL0CFG : LPC_SC_TypeDef
  • PLL0CON : LPC_SC_TypeDef
  • PLL0FEED : LPC_SC_TypeDef
  • PLL0STAT : LPC_SC_TypeDef
  • PLL1CFG : LPC_SC_TypeDef
  • PLL1CON : LPC_SC_TypeDef
  • PLL1FEED : LPC_SC_TypeDef
  • PLL1STAT : LPC_SC_TypeDef
  • PORT : ITM_Type
  • port : webclient_state
  • Portnum : PINSEL_CFG_Type
  • PowerDown : LPC_EMAC_TypeDef
  • pPalette : _Bmp_t
  • pPicDesc : _Bmp_t
  • pPicStream : _Bmp_t
  • PR : LPC_TIM_TypeDef , LPC_PWM_TypeDef
  • PrescaleOption : PWM_TIMERCFG_Type , TIM_TIMERCFG_Type
  • PrescaleValue : TIM_TIMERCFG_Type , PWM_TIMERCFG_Type
  • proto : uip_icmpip_hdr , uip_udpip_hdr , uip_tcpip_hdr , ethip_hdr , tcpip_hdr , fwcache_entry , icmpip_hdr
  • protocol : arp_hdr
  • protoerr : uip_stats
  • protolen : arp_hdr
  • psockpt : psock
  • pt : dhcpc_state
  • ptr : psock_buf
  • Pulse : _GLCD_CmdCtrl_t
Generated on Tue Jun 7 15:00:03 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Data Fields - Variables

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- q -

  • Q : APSR_Type , xPSR_Type
  • QEICAP : LPC_QEI_TypeDef
  • QEICLR : LPC_QEI_TypeDef
  • QEICON : LPC_QEI_TypeDef
  • QEICONF : LPC_QEI_TypeDef
  • QEIIE : LPC_QEI_TypeDef
  • QEIIEC : LPC_QEI_TypeDef
  • QEIIES : LPC_QEI_TypeDef
  • QEIINTSTAT : LPC_QEI_TypeDef
  • QEILOAD : LPC_QEI_TypeDef
  • QEIMAXPOS : LPC_QEI_TypeDef
  • QEIPOS : LPC_QEI_TypeDef
  • QEISET : LPC_QEI_TypeDef
  • QEISTAT : LPC_QEI_TypeDef
  • QEITIME : LPC_QEI_TypeDef
  • QEIVEL : LPC_QEI_TypeDef
Generated on Tue Jun 7 15:00:03 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Data Fields - Variables

  • Data Structures
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- r -

  • RBR : LPC_UART_TypeDef , LPC_UART0_TypeDef , LPC_UART1_TypeDef
  • RC_AddMode : _DATCTR_Data_t
  • rcv_nxt : uip_conn
  • RD : CAN_PinCFG_Type
  • RDA : LPC_CAN_TypeDef
  • RDB : LPC_CAN_TypeDef
  • rdIdx : __CDC_BUF_T , __SER_BUF_T
  • readlen : psock
  • readptr : psock
  • recv : uip_stats
  • ReloadOption : QEI_RELOADCFG_Type
  • ReloadValue : QEI_RELOADCFG_Type
  • Reserved : I2S_MODEConf_Type , PWM_TIMERCFG_Type , PWM_COUNTERCFG_Type , QEI_RELOADCFG_Type , TIM_TIMERCFG_Type , TIM_COUNTERCFG_Type , TIM_MATCHCFG_Type
  • RESERVED : DAC_CONVERTER_CFG_Type
  • RESERVED0 : LPC_PINCON_TypeDef , LPC_GPIO_TypeDef , LPC_GPIOINT_TypeDef , LPC_TIM_TypeDef , LPC_PWM_TypeDef , LPC_UART_TypeDef , LPC_UART0_TypeDef , LPC_UART1_TypeDef , LPC_SPI_TypeDef , LPC_RIT_TypeDef , LPC_RTC_TypeDef , LPC_WDT_TypeDef , LPC_ADC_TypeDef , LPC_QEI_TypeDef , LPC_USB_TypeDef , LPC_EMAC_TypeDef
  • Reserved0 : I2S_CFG_Type , I2S_DMAConf_Type
  • RESERVED0 : GPIO_Byte_TypeDef , GPIO_HalfWord_TypeDef , NVIC_Type , ITM_Type , InterruptType_Type , LPC_SC_TypeDef
  • RESERVED1 : ITM_Type , InterruptType_Type , LPC_SC_TypeDef , LPC_TIM_TypeDef , LPC_PWM_TypeDef , LPC_UART_TypeDef , LPC_UART0_TypeDef , LPC_UART1_TypeDef , LPC_RTC_TypeDef , LPC_WDT_TypeDef , LPC_USB_TypeDef , LPC_EMAC_TypeDef
  • RESERVED10 : LPC_UART1_TypeDef , LPC_RTC_TypeDef
  • RESERVED11 : LPC_UART1_TypeDef , LPC_RTC_TypeDef
  • RESERVED12 : LPC_RTC_TypeDef
  • RESERVED13 : LPC_RTC_TypeDef
  • RESERVED14 : LPC_RTC_TypeDef
  • RESERVED15 : LPC_RTC_TypeDef
  • RESERVED16 : LPC_RTC_TypeDef
  • RESERVED17 : LPC_RTC_TypeDef
  • RESERVED18 : LPC_RTC_TypeDef
  • RESERVED19 : LPC_RTC_TypeDef
  • RESERVED2 : NVIC_Type , ITM_Type , LPC_SC_TypeDef , LPC_UART_TypeDef , LPC_UART0_TypeDef , LPC_UART1_TypeDef , LPC_RTC_TypeDef , LPC_USB_TypeDef , LPC_EMAC_TypeDef
  • RESERVED20 : LPC_RTC_TypeDef
  • RESERVED21 : LPC_RTC_TypeDef
  • RESERVED3 : NVIC_Type , ITM_Type , LPC_SC_TypeDef , LPC_UART_TypeDef , LPC_UART0_TypeDef , LPC_UART1_TypeDef , LPC_RTC_TypeDef , LPC_USB_TypeDef , LPC_EMAC_TypeDef
  • RESERVED4 : LPC_UART_TypeDef , NVIC_Type , ITM_Type , LPC_SC_TypeDef , LPC_UART0_TypeDef , LPC_UART1_TypeDef , LPC_RTC_TypeDef , LPC_USB_TypeDef , LPC_EMAC_TypeDef
  • RESERVED5 : LPC_RTC_TypeDef , LPC_SC_TypeDef , NVIC_Type , ITM_Type , LPC_UART_TypeDef , LPC_UART0_TypeDef , LPC_UART1_TypeDef , LPC_USB_TypeDef , LPC_EMAC_TypeDef
  • RESERVED6 : LPC_UART_TypeDef , LPC_SC_TypeDef , LPC_UART0_TypeDef , LPC_UART1_TypeDef , LPC_RTC_TypeDef , LPC_EMAC_TypeDef
  • RESERVED7 : LPC_EMAC_TypeDef , LPC_SC_TypeDef , LPC_UART1_TypeDef , LPC_RTC_TypeDef
  • RESERVED8 : LPC_SC_TypeDef , LPC_UART1_TypeDef , LPC_RTC_TypeDef , LPC_EMAC_TypeDef
  • RESERVED9 : LPC_RTC_TypeDef , LPC_UART1_TypeDef
  • reset : I2S_CFG_Type
  • ResetOnMatch : PWM_MATCHCFG_Type , TIM_MATCHCFG_Type
  • retransmissions_count : I2C_M_SETUP_Type
  • retransmissions_max : I2C_M_SETUP_Type
  • retries : namemap
  • Reversed : _DATCTR_Data_t , _COLMOD_Data_t , _MADCTR_Data_t
  • rexmit : uip_stats
  • RFS : LPC_CAN_TypeDef
  • RGB : _MADCTR_Data_t , _DATCTR_Data_t
  • RGB_Mode : _DATCTR_Data_t
  • RICOMPVAL : LPC_RIT_TypeDef
  • RICOUNTER : LPC_RIT_TypeDef
  • RICTRL : LPC_RIT_TypeDef
  • RID : LPC_CAN_TypeDef
  • RIMASK : LPC_RIT_TypeDef
  • ripaddr : uip_conn
  • RIS : LPC_SSP_TypeDef
  • RisingEdge : TIM_CAPTURECFG_Type , PWM_CAPTURECFG_Type
  • rport : uip_conn
  • RS485CTRL : LPC_UART1_TypeDef
  • RS485DLY : LPC_UART1_TypeDef
  • RSERVED1 : NVIC_Type
  • RSID : LPC_SC_TypeDef
  • Rsrvd : _USB_DMA_DESCRIPTOR
  • rst : uip_stats
  • RSV : LPC_EMAC_TypeDef
  • RTC_AUX : LPC_RTC_TypeDef
  • RTC_AUXEN : LPC_RTC_TypeDef
  • rto : uip_conn
  • rx : UART_RING_BUFFER_T
  • rx_cnt : SSP_DATA_SETUP_Type
  • rx_count : I2C_M_SETUP_Type , I2C_S_SETUP_Type
  • rx_data : SSP_DATA_SETUP_Type , SPI_DATA_SETUP_Type , I2C_M_SETUP_Type , I2C_S_SETUP_Type
  • rx_head : UART_RING_BUFFER_T
  • rx_length : I2C_M_SETUP_Type , I2C_S_SETUP_Type
  • Rx_State : UART1_RS485_CTRLCFG_Type
  • rx_tail : UART_RING_BUFFER_T
  • RxConsumeIndex : LPC_EMAC_TypeDef
  • RxDescriptor : LPC_EMAC_TypeDef
  • RxDescriptorNumber : LPC_EMAC_TypeDef
  • RxFilterCtrl : LPC_EMAC_TypeDef
  • RxFilterWoLClear : LPC_EMAC_TypeDef
  • RxFilterWoLStatus : LPC_EMAC_TypeDef
  • RxProduceIndex : LPC_EMAC_TypeDef
  • RxStatus : LPC_EMAC_TypeDef
Generated on Tue Jun 7 15:00:03 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Data Fields - Variables

  • Data Structures
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- s -

  • sa : uip_conn
  • SA0 : LPC_EMAC_TypeDef
  • SA1 : LPC_EMAC_TypeDef
  • SA2 : LPC_EMAC_TypeDef
  • SCR : LPC_UART1_TypeDef , SCB_Type , LPC_UART_TypeDef , LPC_UART0_TypeDef
  • scriptlen : httpd_state
  • scriptpt : httpd_state
  • scriptptr : httpd_state
  • SCS : LPC_SC_TypeDef
  • SEC : RTC_TIME_Type , LPC_RTC_TypeDef
  • secs : dhcp_msg
  • Sel : _ASCSET_Data_t
  • sendlen : psock
  • sendptr : smtp_state , psock
  • sent : uip_stats
  • sentlen : smtp_state
  • seqno : namemap , tcpip_hdr , icmpip_hdr , uip_tcpip_hdr , uip_icmpip_hdr
  • serverid : dhcpc_state
  • SFF_GPR_NumEntry : AF_SectionDef
  • SFF_GPR_Sec : AF_SectionDef
  • SFF_GRP_sa : LPC_CANAF_TypeDef
  • SFF_NumEntry : AF_SectionDef
  • SFF_sa : LPC_CANAF_TypeDef
  • SFF_Sec : AF_SectionDef
  • Sfl : _ASCSET_Data_t
  • SHCSR : SCB_Type
  • SHP : SCB_Type
  • shwaddr : arp_hdr
  • siaddr : dhcp_msg
  • SignalMode : QEI_CFG_Type
  • sipaddr : arp_hdr
  • sl_addr7bit : I2C_M_SETUP_Type
  • SlaveAddr_7bit : I2C_OWNSLAVEADDR_CFG_Type
  • SlaveAddrChannel : I2C_OWNSLAVEADDR_CFG_Type
  • SlaveAddrMaskValue : I2C_OWNSLAVEADDR_CFG_Type
  • Smd : _ASCSET_Data_t
  • sname : dhcp_msg
  • snd_nxt : uip_conn
  • sout : httpd_state
  • SPCCR : LPC_SPI_TypeDef
  • SPCR : LPC_SPI_TypeDef
  • SPDR : LPC_SPI_TypeDef
  • SPINT : LPC_SPI_TypeDef
  • SPSEL : CONTROL_Type
  • SPSR : LPC_SPI_TypeDef
  • SR : LPC_SSP_TypeDef , LPC_CAN_TypeDef
  • src : uip_eth_hdr
  • SrcAddr : GPDMA_LLI_Type
  • SrcConn : GPDMA_Channel_CFG_Type
  • srcipaddr : uip_icmpip_hdr , uip_udpip_hdr , ethip_hdr , uip_tcpip_hdr , tcpip_hdr , icmpip_hdr , fwcache_entry
  • SrcMemAddr : GPDMA_Channel_CFG_Type
  • srcport : tcpip_hdr , uip_udpip_hdr , uip_tcpip_hdr
  • Ssl : _ASCSET_Data_t
  • start : timer
  • state : psock , dhcpc_state , telnetd_state , namemap , smtp_state , httpd_state , webclient_state
  • Status : LPC_EMAC_TypeDef
  • status : SPI_DATA_SETUP_Type
  • Status : PWM_Match_T
  • status : SSP_DATA_SETUP_Type , I2C_M_SETUP_Type , I2C_S_SETUP_Type
  • STIR : NVIC_Type
  • stop : I2S_CFG_Type
  • Stopbits : UART_CFG_Type
  • StopOnMatch : TIM_MATCHCFG_Type , PWM_MATCHCFG_Type
  • subject : smtp_state
  • SUPP : LPC_EMAC_TypeDef
  • sv : uip_conn
  • syndrop : uip_stats
  • synrst : uip_stats
Generated on Tue Jun 7 15:00:03 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Data Fields - Variables

  • Data Structures
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- t -

  • T : xPSR_Type
  • TC : LPC_TIM_TypeDef , LPC_PWM_TypeDef
  • tcp : uip_stats
  • tcpchksum : tcpip_hdr , uip_tcpip_hdr
  • tcpoffset : uip_tcpip_hdr , tcpip_hdr
  • tcpstateflags : uip_conn
  • TCR : ITM_Type , LPC_TIM_TypeDef , LPC_PWM_TypeDef
  • TD : CAN_PinCFG_Type
  • TDA1 : LPC_CAN_TypeDef
  • TDA2 : LPC_CAN_TypeDef
  • TDA3 : LPC_CAN_TypeDef
  • TDB1 : LPC_CAN_TypeDef
  • TDB2 : LPC_CAN_TypeDef
  • TDB3 : LPC_CAN_TypeDef
  • TER : ITM_Type , LPC_UART_TypeDef , LPC_UART0_TypeDef , LPC_UART1_TypeDef
  • TEST : LPC_EMAC_TypeDef
  • textlen : smtp_state
  • TFI1 : LPC_CAN_TypeDef
  • TFI2 : LPC_CAN_TypeDef
  • TFI3 : LPC_CAN_TypeDef
  • THR : LPC_UART_TypeDef , LPC_UART0_TypeDef , LPC_UART1_TypeDef
  • ticks : dhcpc_state
  • TID1 : LPC_CAN_TypeDef
  • TID2 : LPC_CAN_TypeDef
  • TID3 : LPC_CAN_TypeDef
  • time : neighbor_entry , arp_entry
  • timer : dhcpc_state , webclient_state , httpd_state , fwcache_entry , uip_conn
  • timerReset : MCPWM_CAPTURE_CFG_Type
  • tmr : namemap
  • to : smtp_state
  • tos : tcpip_hdr , icmpip_hdr , uip_tcpip_hdr , uip_icmpip_hdr , uip_udpip_hdr , ethip_hdr
  • TPR : ITM_Type
  • TransferSize : GPDMA_Channel_CFG_Type
  • TransferType : GPDMA_Channel_CFG_Type
  • TransferWidth : GPDMA_Channel_CFG_Type
  • TSV0 : LPC_EMAC_TypeDef
  • TSV1 : LPC_EMAC_TypeDef
  • ttl : ethip_hdr , tcpip_hdr , uip_udpip_hdr , dns_answer , icmpip_hdr , uip_tcpip_hdr , uip_icmpip_hdr
  • tx : UART_RING_BUFFER_T
  • tx_cnt : SSP_DATA_SETUP_Type
  • tx_count : I2C_S_SETUP_Type , I2C_M_SETUP_Type
  • tx_data : SSP_DATA_SETUP_Type , SPI_DATA_SETUP_Type , I2C_M_SETUP_Type , I2C_S_SETUP_Type
  • tx_head : UART_RING_BUFFER_T
  • tx_length : I2C_M_SETUP_Type , I2C_S_SETUP_Type
  • tx_tail : UART_RING_BUFFER_T
  • TxConsumeIndex : LPC_EMAC_TypeDef
  • TxDescriptor : LPC_EMAC_TypeDef
  • TxDescriptorNumber : LPC_EMAC_TypeDef
  • TxProduceIndex : LPC_EMAC_TypeDef
  • txrx_setup : I2C_CFG_T
  • TxStatus : LPC_EMAC_TypeDef
  • Type : _USB_DMA_DESCRIPTOR
  • type : icmpip_hdr , CAN_MSG_Type
  • Type : _USB_DMA_DESCRIPTOR
  • type : uip_icmpip_hdr
  • Type : _USB_DMA_DESCRIPTOR
  • type : dns_answer , uip_eth_hdr
  • Type : _USB_DMA_DESCRIPTOR
  • typeerr : uip_stats
Generated on Tue Jun 7 15:00:03 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Data Fields - Variables

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- u -

  • u16 : ITM_Type
  • u32 : ITM_Type
  • u8 : ITM_Type
  • udpchksum : uip_udpip_hdr
  • udplen : uip_udpip_hdr
  • ulDataLen : EMAC_PACKETBUF_Type
  • ulQEIConfig : QEI_CFGOPT_Type
  • unused : fwcache_entry
  • upperEID : EFF_GPR_Entry
  • upperID : SFF_GPR_Entry
  • urgp : tcpip_hdr , uip_tcpip_hdr
  • USBCLKCFG : LPC_SC_TypeDef
  • USBClkCtrl : LPC_USB_TypeDef
  • USBClkSt : LPC_USB_TypeDef
  • USBCmdCode : LPC_USB_TypeDef
  • USBCmdData : LPC_USB_TypeDef
  • USBCtrl : LPC_USB_TypeDef
  • USBDevIntClr : LPC_USB_TypeDef
  • USBDevIntEn : LPC_USB_TypeDef
  • USBDevIntPri : LPC_USB_TypeDef
  • USBDevIntSet : LPC_USB_TypeDef
  • USBDevIntSt : LPC_USB_TypeDef
  • USBDMAIntEn : LPC_USB_TypeDef
  • USBDMAIntSt : LPC_USB_TypeDef
  • USBDMARClr : LPC_USB_TypeDef
  • USBDMARSet : LPC_USB_TypeDef
  • USBDMARSt : LPC_USB_TypeDef
  • USBEoTIntClr : LPC_USB_TypeDef
  • USBEoTIntSet : LPC_USB_TypeDef
  • USBEoTIntSt : LPC_USB_TypeDef
  • USBEpDMADis : LPC_USB_TypeDef
  • USBEpDMAEn : LPC_USB_TypeDef
  • USBEpDMASt : LPC_USB_TypeDef
  • USBEpInd : LPC_USB_TypeDef
  • USBEpIntClr : LPC_USB_TypeDef
  • USBEpIntEn : LPC_USB_TypeDef
  • USBEpIntPri : LPC_USB_TypeDef
  • USBEpIntSet : LPC_USB_TypeDef
  • USBEpIntSt : LPC_USB_TypeDef
  • USBIntSt : LPC_SC_TypeDef
  • USBMaxPSize : LPC_USB_TypeDef
  • USBNDDRIntClr : LPC_USB_TypeDef
  • USBNDDRIntSet : LPC_USB_TypeDef
  • USBNDDRIntSt : LPC_USB_TypeDef
  • USBReEp : LPC_USB_TypeDef
  • USBRxData : LPC_USB_TypeDef
  • USBRxPLen : LPC_USB_TypeDef
  • USBSysErrIntClr : LPC_USB_TypeDef
  • USBSysErrIntSet : LPC_USB_TypeDef
  • USBSysErrIntSt : LPC_USB_TypeDef
  • USBTxData : LPC_USB_TypeDef
  • USBTxPLen : LPC_USB_TypeDef
  • USBUDCAH : LPC_USB_TypeDef
Generated on Tue Jun 7 15:00:03 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Data Fields - Variables

  • Data Structures
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- v -

  • V : APSR_Type , xPSR_Type
  • V_Size : _Bmp_t , _FontType_t
  • VAL : SysTick_Type
  • Val : _USB_DMA_DESCRIPTOR
  • VELCOMP : LPC_QEI_TypeDef
  • vhl : icmpip_hdr , uip_udpip_hdr , uip_icmpip_hdr , tcpip_hdr , uip_tcpip_hdr , ethip_hdr
  • vhlerr : uip_stats
  • VTOR : SCB_Type
Generated on Tue Jun 7 15:00:03 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Data Fields - Variables

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- w -

  • w : APSR_Type , IPSR_Type , CONTROL_Type , xPSR_Type
  • WDCLKSEL : LPC_WDT_TypeDef
  • WDFEED : LPC_WDT_TypeDef
  • WDMOD : LPC_WDT_TypeDef
  • WDTC : LPC_WDT_TypeDef
  • WDTV : LPC_WDT_TypeDef
  • wnd : tcpip_hdr , uip_tcpip_hdr
  • wordwidth : I2S_CFG_Type
  • wrIdx : __CDC_BUF_T , __SER_BUF_T
  • ws_sel : I2S_CFG_Type
Generated on Tue Jun 7 15:00:03 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Data Fields - Variables

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- x -

  • xid : dhcp_msg
Generated on Tue Jun 7 15:00:03 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Data Fields - Variables

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  • YEAR : RTC_TIME_Type , LPC_RTC_TypeDef
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Generated on Tue Jun 7 15:00:03 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/TIMER/Gen_Diff_Delay/gen_diff_delay.c Source File

C:/nxpdrv/LPC1700CMSIS/Examples/TIMER/Gen_Diff_Delay/gen_diff_delay.c

Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          gen_diff_delay.c                                2010-07-16
00003 */
00026 #include "lpc17xx_timer.h"
00027 #include "lpc17xx_libcfg.h"
00028 #include "lpc17xx_pinsel.h"
00029 #include "debug_frmwrk.h"
00030
00031 /* Example group ----------------------------------------------------------- */
00037 /************************** PRIVATE VARIABLES *************************/
00038 uint8_t menu1[] =
00039 "********************************************************************************\n\r"
00040 "Hello NXP Semiconductors \n\r"
00041 "Timer generate different delay signal demo \n\r"
00042 "\t - MCU: LPC17xx \n\r"
00043 "\t - Core: ARM Cortex-M3 \n\r"
00044 "\t - Communicate via: UART0 - 115200 bps \n\r"
00045 " Use timer 0 to generate different delay signals\n\r"
00046 " UART0 used to display and input configuration\n\r"
00047 "********************************************************************************\n\r";
00048 BOOL_8 toggle=TRUE;
00049 uint32_t T1, T2;
00050 /************************** PRIVATE FUNCTIONS *************************/
00051 void print_menu(void);
00052
00053 void TIMER0_IRQHandler(void);
00054 /*-------------------------PRIVATE FUNCTIONS------------------------------*/
00055 /*********************************************************************/
00060 void print_menu(void)
00061 {
00062         _DBG(menu1);
00063 }
00064
00065 void TIMER0_IRQHandler(void)
00066 {
00067         if (TIM_GetIntStatus(LPC_TIM0, TIM_MR0_INT)== SET)
00068         {
00069                 TIM_Cmd(LPC_TIM0,DISABLE);
00070                 TIM_ResetCounter(LPC_TIM0);
00071                 if(toggle==TRUE)
00072                 {
00073                         TIM_UpdateMatchValue(LPC_TIM0,0,T1*10);//MAT0.0
00074                         toggle=FALSE;
00075                 }
00076                 else
00077                 {
00078                         TIM_UpdateMatchValue(LPC_TIM0,0,T2*10);
00079                         toggle=TRUE;
00080                 }
00081                 TIM_Cmd(LPC_TIM0,ENABLE);
00082         }
00083         TIM_ClearIntPending(LPC_TIM0, TIM_MR0_INT);
00084 }
00085 /*-------------------------MAIN FUNCTION------------------------------*/
00086 /*********************************************************************/
00091 int c_entry(void)
00092 {
00093         PINSEL_CFG_Type PinCfg;
00094         TIM_TIMERCFG_Type TIM_ConfigStruct;
00095         TIM_MATCHCFG_Type TIM_MatchConfigStruct;
00096         uint8_t idx;
00097         uint16_t tem;
00098
00099         /* Initialize debug via UART0
00100          * – 115200bps
00101          * – 8 data bit
00102          * – No parity
00103          * – 1 stop bit
00104          * – No flow control
00105          */
00106         debug_frmwrk_init();
00107
00108         // print welcome screen
00109         print_menu();
00110         while(1)
00111         {
00112                 idx=0;T1=0;tem=0;
00113                 while(idx<3)
00114                 {
00115                         if(idx==0)
00116                         _DBG("\n\rPlease input delay time for T1 (from 1 to 999 ms):");
00117                         tem = _DG;
00118                         switch(tem)
00119                         {
00120                         case '0':case'1':case '2':case '3':case '4':case '5':case '6':case '7':case'8':case '9':
00121                                 tem = tem - 0x30;
00122                                 idx++;
00123                                 if(idx==1) tem = tem * 100;
00124                                 else if (idx==2) tem = tem * 10;
00125                                 T1 = T1 + tem;
00126                                 if(idx==3)_DBD16(T1);
00127                                 tem = 0;
00128                                 break;
00129                         default:
00130                                 _DBG("...Please input digits from 0 to 9 only!");
00131                                 idx = 0; tem = 0; T1 = 0;
00132                                 break;
00133                         }
00134                 }
00135                 idx=0;T2=0;tem=0;
00136                 while(idx<3)
00137                 {
00138                         if(idx==0)
00139                         _DBG("\n\rPlease input delay time for T2 (from 1 to 999 ms):");
00140                         tem = _DG;
00141                         switch(tem)
00142                         {
00143                         case '0':case'1':case '2':case '3':case '4':case '5':case '6':case '7':case'8':case '9':
00144                                 tem = tem - 0x30;
00145                                 idx++;
00146                                 if(idx==1) tem = tem * 100;
00147                                 else if (idx==2) tem = tem * 10;
00148                                 T2 = T2 + tem;
00149                                 if(idx==3)_DBD16(T2);
00150                                 tem = 0;
00151                                 break;
00152                         default:
00153                                 _DBG("...Please input digits from 0 to 9 only!");
00154                                 idx = 0; tem = 0; T2 = 0;
00155                                 break;
00156                         }
00157                 }
00158                 // Configure P1.28 as MAT0.0
00159                 PinCfg.Funcnum = 3;
00160                 PinCfg.OpenDrain = 0;
00161                 PinCfg.Pinmode = 0;
00162                 PinCfg.Portnum = 1;
00163                 PinCfg.Pinnum = 28;
00164                 PINSEL_ConfigPin(&PinCfg);
00165
00166                 // Initialize timer, prescale count time of 100uS
00167                 TIM_ConfigStruct.PrescaleOption = TIM_PRESCALE_USVAL;
00168                 TIM_ConfigStruct.PrescaleValue  = 100;
00169                 TIM_Init(LPC_TIM0, TIM_TIMER_MODE,&TIM_ConfigStruct);
00170
00171                 // use channel 0, MR0
00172                 TIM_MatchConfigStruct.MatchChannel = 0;
00173                 // Enable interrupt when MR0 matches the value in TC register
00174                 TIM_MatchConfigStruct.IntOnMatch   = TRUE;
00175                 //Enable reset on MR0: TIMER will reset if MR0 matches it
00176                 TIM_MatchConfigStruct.ResetOnMatch = FALSE;
00177                 //Stop on MR0 if MR0 matches it
00178                 TIM_MatchConfigStruct.StopOnMatch  = FALSE;
00179                 //Toggle MR0.0 pin if MR0 matches it
00180                 TIM_MatchConfigStruct.ExtMatchOutputType =TIM_EXTMATCH_TOGGLE;
00181                 // Set Match value
00182                 TIM_MatchConfigStruct.MatchValue   = T1*10;
00183                 TIM_ConfigMatch(LPC_TIM0,&TIM_MatchConfigStruct);
00184                 toggle=TRUE;
00185                 /* preemption = 1, sub-priority = 1 */
00186                 NVIC_SetPriority(TIMER0_IRQn, ((0x01<<3)|0x01));
00187                 /* Enable interrupt for timer 0 */
00188                 NVIC_EnableIRQ(TIMER0_IRQn);
00189
00190                 TIM_Cmd(LPC_TIM0,ENABLE);
00191                 _DBG("\n\rGenerating different delay signal..");
00192                 _DBG("\n\rPress ESC if you want to terminate and choose other configuration");
00193                 while(_DG!=27);
00194                 TIM_DeInit(LPC_TIM0);
00195                 /* Enable interrupt for timer 0 */
00196                 NVIC_DisableIRQ(TIMER0_IRQn);
00197         }
00198         return (1);
00199 }
00200
00201 /* Support required entry point for other toolchain */
00202 int main (void)
00203 {
00204         return c_entry();
00205 }
00206
00207 #ifdef  DEBUG
00208 /*******************************************************************************
00209 * @brief                Reports the name of the source file and the source line number
00210 *                               where the CHECK_PARAM error has occurred.
00211 * @param[in]    file Pointer to the source file name
00212 * @param[in]    line assert_param error line source number
00213 * @return               None
00214 *******************************************************************************/
00215 void check_failed(uint8_t *file, uint32_t line)
00216 {
00217         /* User can add his own implementation to report the file name and line number,
00218          ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
00219
00220         /* Infinite loop */
00221         while(1);
00222 }
00223 #endif
00224 /*
00225  * @}
00226  */
Generated on Tue Jun 7 14:59:03 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/TIMER/Gen_Diff_Freqs/gen_diff_freqs.c Source File

C:/nxpdrv/LPC1700CMSIS/Examples/TIMER/Gen_Diff_Freqs/gen_diff_freqs.c

Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          gen_diff_freqs.c                                2010-07-16
00003 */
00026 #include "lpc17xx_timer.h"
00027 #include "lpc17xx_libcfg.h"
00028 #include "lpc17xx_pinsel.h"
00029 #include "debug_frmwrk.h"
00030
00031 /* Example group ----------------------------------------------------------- */
00037 /************************** PRIVATE VARIABLES *************************/
00038 uint8_t menu1[] =
00039 "********************************************************************************\n\r"
00040 "Hello NXP Semiconductors \n\r"
00041 "Timer generate different frequencies demo \n\r"
00042 "\t - MCU: LPC17xx \n\r"
00043 "\t - Core: ARM Cortex-M3 \n\r"
00044 "\t - Communicate via: UART0 - 115200 bps \n\r"
00045 " Use timer 0 and timer 2 to generate 2 different frequency signals\n\r"
00046 " UART0 used to display and input frequency\n\r"
00047 "********************************************************************************\n\r";
00048
00049 /************************** PRIVATE FUNCTIONS *************************/
00050 void print_menu(void);
00051
00052
00053 /*-------------------------PRIVATE FUNCTIONS------------------------------*/
00054 /*********************************************************************/
00059 void print_menu(void)
00060 {
00061         _DBG(menu1);
00062 }
00063
00064
00065 /*-------------------------MAIN FUNCTION------------------------------*/
00066 /*********************************************************************/
00071 int c_entry(void)
00072 {
00073         PINSEL_CFG_Type PinCfg;
00074         TIM_TIMERCFG_Type TIM_ConfigStruct;
00075         TIM_MATCHCFG_Type TIM_MatchConfigStruct;
00076         uint8_t idx;
00077         uint16_t tem;
00078         uint32_t freq1, freq2;
00079
00080         /* Initialize debug via UART0
00081          * – 115200bps
00082          * – 8 data bit
00083          * – No parity
00084          * – 1 stop bit
00085          * – No flow control
00086          */
00087         debug_frmwrk_init();
00088
00089         // print welcome screen
00090         print_menu();
00091         while(1)
00092         {
00093                 // Select frequency for channel1 (MAT0.0)
00094                 idx=0;freq1=0;tem=0;
00095                 while(idx<3)
00096                 {
00097                         if(idx==0)
00098                         _DBG("\n\rPlease input frequency for channel1 (from 1 to 999 hz):");
00099                         tem = _DG;
00100                         switch(tem)
00101                         {
00102                         case '0':case'1':case '2':case '3':case '4':case '5':case '6':case '7':case'8':case '9':
00103                                 tem = tem - 0x30;
00104                                 idx++;
00105                                 if(idx==1) tem = tem * 100;
00106                                 else if (idx==2) tem = tem * 10;
00107                                 freq1 = freq1 + tem;
00108                                 if(idx==3)_DBD16(freq1);
00109                                 tem = 0;
00110                                 break;
00111                         default:
00112                                 _DBG("...Please input digits from 0 to 9 only!");
00113                                 idx = 0; tem = 0; freq1 = 0;
00114                                 break;
00115                         }
00116                 }
00117                 idx=0;freq2=0;tem=0;
00118                 while(idx<3)
00119                 {
00120                         if(idx==0)
00121                         _DBG("\n\rPlease input frequency for channel2 (from 1 to 999 hz):");
00122                         tem = _DG;
00123                         switch(tem)
00124                         {
00125                         case '0':case'1':case '2':case '3':case '4':case '5':case '6':case '7':case'8':case '9':
00126                                 tem = tem - 0x30;
00127                                 idx++;
00128                                 if(idx==1) tem = tem * 100;
00129                                 else if (idx==2) tem = tem * 10;
00130                                 freq2 = freq2 + tem;
00131                                 if(idx==3)_DBD16(freq2);
00132                                 tem = 0;
00133                                 break;
00134                         default:
00135                                 _DBG("...Please input digits from 0 to 9 only!");
00136                                 idx = 0; tem = 0; freq2 = 0;
00137                                 break;
00138                         }
00139                 }
00140                 // Configure P1.28 as MAT0.0
00141                 PinCfg.Funcnum = 3;
00142                 PinCfg.OpenDrain = 0;
00143                 PinCfg.Pinmode = 0;
00144                 PinCfg.Portnum = 1;
00145                 PinCfg.Pinnum = 28;
00146                 PINSEL_ConfigPin(&PinCfg);
00147                 // Configure P0.6 as MAT2.0
00148                 PinCfg.Funcnum = 3;
00149                 PinCfg.OpenDrain = 0;
00150                 PinCfg.Pinmode = 0;
00151                 PinCfg.Portnum = 0;
00152                 PinCfg.Pinnum = 6;
00153                 PINSEL_ConfigPin(&PinCfg);
00154
00155                 // Initialize timer, prescale count time of 1uS
00156                 TIM_ConfigStruct.PrescaleOption = TIM_PRESCALE_USVAL;
00157                 TIM_ConfigStruct.PrescaleValue  = 1;
00158                 TIM_Init(LPC_TIM0, TIM_TIMER_MODE,&TIM_ConfigStruct);
00159                 TIM_Init(LPC_TIM2, TIM_TIMER_MODE,&TIM_ConfigStruct);
00160
00161                 // use channel 0, MR0
00162                 TIM_MatchConfigStruct.MatchChannel = 0;
00163                 // Disable interrupt when MR0 matches the value in TC register
00164                 TIM_MatchConfigStruct.IntOnMatch   = FALSE;
00165                 //Enable reset on MR0: TIMER will reset if MR0 matches it
00166                 TIM_MatchConfigStruct.ResetOnMatch = TRUE;
00167                 //Stop on MR0 if MR0 matches it
00168                 TIM_MatchConfigStruct.StopOnMatch  = FALSE;
00169                 //Toggle MR0.0 pin if MR0 matches it
00170                 TIM_MatchConfigStruct.ExtMatchOutputType =TIM_EXTMATCH_TOGGLE;
00171                 // Set Match value
00172                 TIM_MatchConfigStruct.MatchValue   = 500000/freq1;
00173                 TIM_ConfigMatch(LPC_TIM0,&TIM_MatchConfigStruct);
00174
00175                 // Set Match value
00176                 TIM_MatchConfigStruct.MatchValue   = 500000/freq2;
00177                 TIM_ConfigMatch(LPC_TIM2,&TIM_MatchConfigStruct);
00178
00179                 TIM_Cmd(LPC_TIM0,ENABLE);
00180                 TIM_Cmd(LPC_TIM2,ENABLE);
00181                 _DBG("\n\rGenerating two different frequency signals..");
00182                 _DBG("\n\rPress ESC if you want to terminate and choose other frequencies");
00183                 while(_DG!=27);
00184                 TIM_DeInit(LPC_TIM0);
00185                 TIM_DeInit(LPC_TIM2);
00186         }
00187         return (1);
00188 }
00189
00190 /* Support required entry point for other toolchain */
00191 int main (void)
00192 {
00193         return c_entry();
00194 }
00195
00196 #ifdef  DEBUG
00197 /*******************************************************************************
00198 * @brief                Reports the name of the source file and the source line number
00199 *                               where the CHECK_PARAM error has occurred.
00200 * @param[in]    file Pointer to the source file name
00201 * @param[in]    line assert_param error line source number
00202 * @return               None
00203 *******************************************************************************/
00204 void check_failed(uint8_t *file, uint32_t line)
00205 {
00206         /* User can add his own implementation to report the file name and line number,
00207          ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
00208
00209         /* Infinite loop */
00210         while(1);
00211 }
00212 #endif
00213 /*
00214  * @}
00215  */
Generated on Tue Jun 7 14:59:03 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/LCD/NOKIA6610_LCD/glcd_ll.c Source File

C:/nxpdrv/LPC1700CMSIS/Examples/LCD/NOKIA6610_LCD/glcd_ll.c

Go to the documentation of this file.
00001 /*************************************************************************
00002  *
00003  *
00004  *    (c) Copyright IAR Systems 2006
00005  *
00006  *    File name   : glcd_ll.c
00007  *    Description : GLCD low level functions
00008  *
00009  *    History :
00010  *    1. Date        : December 2, 2006
00011  *       Author      : Stanimir Bonev
00012  *       Description : Create
00013  *
00014  *    $Revision: 30123 $
00015  **************************************************************************/
00016 #include "glcd_ll.h"
00017 #include "lpc_types.h"
00018 #include "LPC17xx.h"
00019 #include "lpc17xx_clkpwr.h"
00020
00021 /*************************************************************************
00022  * Function Name: GLCD_SetReset
00023  * Parameters: Boolean State
00024  * Return: none
00025  *
00026  * Description: Set reset pin state
00027  *
00028  *************************************************************************/
00029 void GLCD_SetReset (Bool State)
00030 {
00031         if(State)
00032         {
00033                 LPC_GPIO3->FIOSET |= (1UL<<25);
00034         }
00035         else
00036         {
00037                 LPC_GPIO3->FIOCLR |= (1<<25);
00038         }
00039 }
00040
00041 /*************************************************************************
00042  * Function Name: GLCD_Backlight
00043  * Parameters: Int8U Light
00044  * Return: none
00045  *
00046  * Description: Set backlight pin state
00047  *
00048  *************************************************************************/
00049 void GLCD_Backlight (uint8_t Light)
00050 {
00051         LPC_PWM1->MR3 = BACKLIGHT_OFF + Light;
00052         LPC_PWM1->LER |= (1<<3);
00053 }
00054
00055 /*************************************************************************
00056  * Function Name: GLCD_LLInit
00057  * Parameters: none
00058  * Return: none
00059  *
00060  * Description: Init Reset and Backlight control outputs
00061  *
00062  *************************************************************************/
00063 void GLCD_LLInit (void)
00064 {
00065         // LCD Reset output
00066         LPC_GPIO3->FIODIR |= (1UL<<25);
00067
00068         GLCD_SetReset(0);
00069
00070         // LCD backlight PWM 8bit init
00071         LPC_PINCON->PINSEL7 |= (3<<20) ;    // assign P3.26 to PWM1.3
00072         LPC_SC->PCONP |= (1<<6);                // enable clock of PWM1
00073         LPC_PWM1->TCR &= ~(1<<3);
00074         LPC_PWM1->TCR &= ~(1<<0);                       // disable counting
00075         LPC_PWM1->TCR |= (1<<1);                        // reset
00076         LPC_PWM1->CTCR &= ~(3<<0);                      // from prescaler
00077         LPC_PWM1->MCR = 2 ;                                     // Reset on PWMMR0
00078         LPC_PWM1->PCR &= ~(1<<3);                       // Selects single edge controlled mode for PWM3
00079         LPC_PWM1->PCR |= (1<<11);                       // The PWM3 output enabled
00080
00081         LPC_PWM1->PR = 0;
00082         LPC_PWM1->MR0 = 0xFF;                           // 8bit resolution
00083         LPC_PWM1->LER |= (1<<0);
00084         LPC_PWM1->MR3 = 0;
00085         LPC_PWM1->LER |= (1<<3);
00086         LPC_PWM1->TCR |= (1<<3);                        // enable PWM function
00087         LPC_PWM1->TCR &= ~(1<<1);                       // release reset
00088         LPC_PWM1->TCR |= (1<<0);                        // enable counting
00089         GLCD_Backlight(0);
00090 }
00091
00092 /*************************************************************************
00093  * Function Name: GLCD_SPI_ChipSelect
00094  * Parameters: Boolean Select
00095  * Return: none
00096  *
00097  * Description: SSP0 Chip select control
00098  * Select = true  - Chip is enable
00099  * Select = false - Chip is disable
00100  *
00101  *************************************************************************/
00102 void GLCD_SPI_ChipSelect (Bool Select)
00103 {
00104         if (Select)
00105         {
00106                 LPC_GPIO1->FIOCLR |= (1<<21);
00107         }
00108         else
00109         {
00110                 LPC_GPIO1->FIOSET |= (1UL<<21);
00111         }
00112 }
00113
00114 /*************************************************************************
00115  * Function Name: GLCD_SPI_SetWordWidth
00116  * Parameters: Int32U Width
00117  * Return: Boolean
00118  *
00119  * Description: Set SSP 0 word width
00120  *
00121  *************************************************************************/
00122 Bool GLCD_SPI_SetWordWidth (uint32_t Width)
00123 {
00124         if(4 > Width || Width > 16)
00125         {
00126                 return(FALSE);
00127         }
00128
00129         LPC_SSP0->CR0 &= ~(0x0F);
00130         LPC_SSP0->CR0 |= (Width - 1) & 0x0F;
00131         return(TRUE);
00132 }
00133
00134 /*************************************************************************
00135  * Function Name: GLCD_SPI_SetClockFreq
00136  * Parameters: Int32U Frequency
00137  * Return: Int32U
00138  *
00139  * Description: Set SSP 0 clock
00140  *
00141  *************************************************************************/
00142 uint32_t GLCD_SPI_SetClockFreq (uint32_t Frequency)
00143 {
00144         uint32_t Fspi = CLKPWR_GetPCLK(CLKPWR_PCLKSEL_SSP0);
00145         uint32_t Div = 2;
00146         while((Div * Frequency) < Fspi)
00147         {
00148                 if((Div += 2) == 254)
00149                 {
00150                         break;
00151                 }
00152         }
00153         LPC_SSP0->CPSR = Div;
00154         return(Fspi/Div);
00155 }
00156
00157 /*************************************************************************
00158  * Function Name: GLCD_SPI_Init
00159  * Parameters: uint32_t Clk, uint32_t Width
00160  * Return: none
00161  *
00162  * Description: Init SSP0
00163  *
00164  *************************************************************************/
00165 void GLCD_SPI_Init(uint32_t Clk, uint32_t Width)
00166 {
00167         uint32_t i;
00168         volatile uint32_t Dummy;
00169 //      Assign GPIO to SSP0 - SCK, MOSI, MISO
00170         LPC_PINCON->PINSEL3 |= (3<<8);  // SCK0 - P1.20
00171         LPC_PINCON->PINSEL3 |= (3<<14); // MISO0 - P1.23
00172         LPC_PINCON->PINSEL3 |= (3<<16); // MOSI0 - P1.24
00173
00174   // Chip select
00175         LPC_GPIO1->FIODIR |= (1UL<<21); //SSEL0 used as GPIOP1.21
00176
00177         GLCD_SPI_ChipSelect(FALSE);
00178
00179   // Spi init
00180         LPC_SC->PCONP |= (1<<21);       // SSP0 clock enable
00181     LPC_SSP0->CR1  &= ~(1<<1);  // Disable module
00182         LPC_SSP0->CR1  &= ~(1<<0);      // Disable Loop Back Mode
00183         LPC_SSP0->CR1  &= ~(1<<2);      // Master mode
00184         LPC_SSP0->CR0  &= ~(3<<4);      // SPI
00185         LPC_SSP0->CR0 &= ~(1<<6);       // CPOL = 0
00186         LPC_SSP0->CR0 &= ~(1<<7);       // CPHA = 0
00187         LPC_SSP0->IMSC = 0;                     // disable all interrupts
00188         LPC_SSP0->DMACR = 0;            // disable DMA
00189         LPC_SSP0->CR1  |= (1<<1);       // Enable module
00190         for (i = 0; i < 8; i++ )
00191         {
00192                 Dummy = LPC_SSP0->DR; // clear the RxFIFO
00193         }
00194         // Set SSP clock frequency
00195         GLCD_SPI_SetClockFreq(Clk);
00196         // Set data width
00197         GLCD_SPI_SetWordWidth(Width);
00198 }
00199
00200 /*************************************************************************
00201  * Function Name: GLCD_SPI_TranserByte
00202  * Parameters: uint32_t Data
00203  * Return: uint32_t
00204  *
00205  * Description: Transfer byte from SSP0
00206  *
00207  *************************************************************************/
00208 uint32_t GLCD_SPI_TranserByte (uint32_t Data)
00209 {
00210         while(!(LPC_SSP0->SR & (1<<1))); //check bit TNF
00211         LPC_SSP0->DR = Data;
00212         while((LPC_SSP0->SR & (1<<4))); //check bit BSY
00213         return(LPC_SSP0->DR);
00214 }
00215
00216 /*************************************************************************
00217  * Function Name: GLCD_SPI_SendBlock
00218  * Parameters: pInt8U pData, uint32_t Size
00219  *
00220  * Return: void
00221  *
00222  * Description: Write block of data to SSP
00223  *
00224  *************************************************************************/
00225 void GLCD_SPI_SendBlock (unsigned char *pData, uint32_t Size)
00226 {
00227         volatile uint32_t Dummy;
00228         uint32_t OutCount = Size;
00229         while (OutCount)
00230         {
00231                 while((LPC_SSP0->SR & (1<<1)) && OutCount)
00232         {
00233                         LPC_SSP0->DR = *pData++ | 0x100;  // Data
00234                         --OutCount;
00235         }
00236         }
00237         while(LPC_SSP0->SR & (1<<4)); //check bit BSY
00238   // draining RX Fifo
00239         while (LPC_SSP0->SR &(1<<2)) // check bit RNE
00240         {
00241                 Dummy = LPC_SSP0->DR;
00242         }
00243 }
00244
00245 /*************************************************************************
00246  * Function Name: GLCD_SPI_ReceiveBlock
00247  * Parameters: unsigned char * pData, uint32_t Size
00248  *
00249  * Return: void
00250  *
00251  * Description: Read block of data from SSP
00252  *
00253  *************************************************************************/
00254 void GLCD_SPI_ReceiveBlock (unsigned char *pData, uint32_t Size)
00255 {
00256         uint32_t Delta = 0;
00257         while (Size || Delta)
00258         {
00259                 while((LPC_SSP0->SR & (1<<1)) && (Delta < SSP_FIFO_SIZE) && Size)
00260                 {
00261                         LPC_SSP0->DR = 0xFFFF;
00262                         --Size; ++Delta;
00263                 }
00264                 while (LPC_SSP0->SR & (1<<2)) //check bit RNE
00265                 {
00266                         *pData++ = LPC_SSP0->DR;
00267                         --Delta;
00268                 }
00269         }
00270 }
Generated on Tue Jun 7 14:59:01 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/LCD/NOKIA6610_LCD/glcd_ll.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/LCD/NOKIA6610_LCD/glcd_ll.h

Go to the documentation of this file.
00001 /*************************************************************************
00002  *
00003  *
00004  *    (c) Copyright IAR Systems 2006
00005  *
00006  *    File name   : glcd_ll.h
00007  *    Description : GLCD low level include file
00008  *
00009  *    History :
00010  *    1. Date        : December 2, 2006
00011  *       Author      : Stanimir Bonev
00012  *       Description : Create
00013  *
00014  *    $Revision: 28532 $
00015  **************************************************************************/
00016 #include "lpc_types.h"
00017
00018 #ifndef __GLCD_LL_H
00019 #define __GLCD_LL_H
00020
00021
00022 #define BACKLIGHT_OFF   0x40
00023 #define BACKLIGHT_ON    0x20
00024 #define SSP_FIFO_SIZE   8
00025
00026 /*************************************************************************
00027  * Function Name: GLCD_SetReset
00028  * Parameters: Boolean State
00029  * Return: none
00030  *
00031  * Description: Set reset pin state
00032  *
00033  *************************************************************************/
00034 void GLCD_SetReset (Bool State);
00035
00036 /*************************************************************************
00037  * Function Name: GLCD_Backlight
00038  * Parameters: Int8U Light
00039  * Return: none
00040  *
00041  * Description: Set backlight level
00042  *
00043  *************************************************************************/
00044 void GLCD_Backlight (uint8_t Light);
00045
00046 /*************************************************************************
00047  * Function Name: GLCD_LLInit
00048  * Parameters: none
00049  * Return: none
00050  *
00051  * Description: Init Reset and Backlight control outputs
00052  *
00053  *************************************************************************/
00054 void GLCD_LLInit (void);
00055
00056 /*************************************************************************
00057  * Function Name: GLCD_SPI_ChipSelect
00058  * Parameters: Boolean Select
00059  * Return: none
00060  *
00061  * Description: SSP0 Chip select control
00062  * Select = true  - Chip is enable
00063  * Select = false - Chip is disable
00064  *
00065  *************************************************************************/
00066 void GLCD_SPI_ChipSelect(Bool Select);
00067
00068 /*************************************************************************
00069  * Function Name: GLCD_SPI_SetWordWidth
00070  * Parameters: uint32_t Width
00071  * Return: Boolean
00072  *
00073  * Description: Set SSP 0 word width
00074  *
00075  *************************************************************************/
00076 Bool GLCD_SPI_SetWordWidth (uint32_t Width);
00077
00078 /*************************************************************************
00079  * Function Name: GLCD_SPI_SetClockFreq
00080  * Parameters: uint32_t Frequency
00081  * Return: uint32_t
00082  *
00083  * Description: Set SSP 0 clock
00084  *
00085  *************************************************************************/
00086 uint32_t GLCD_SPI_SetClockFreq (uint32_t Frequency);
00087
00088 /*************************************************************************
00089  * Function Name: GLCD_SPI_Init
00090  * Parameters: uint32_t Clk, uint32_t Width
00091  * Return: none
00092  *
00093  * Description: Init SSP0
00094  *
00095  *************************************************************************/
00096 void GLCD_SPI_Init(uint32_t Clk, uint32_t Width);
00097
00098 /*************************************************************************
00099  * Function Name: GLCD_SPI_TranserByte
00100  * Parameters: uint32_t Data
00101  * Return: uint32_t
00102  *
00103  * Description: Transfer byte from SSP0
00104  *
00105  *************************************************************************/
00106 uint32_t GLCD_SPI_TranserByte (uint32_t Data);
00107
00108 /*************************************************************************
00109  * Function Name: GLCD_SPI_SendBlock
00110  * Parameters: pInt8U pData, uint32_t Size
00111  *
00112  * Return: void
00113  *
00114  * Description: Read byte from SSP
00115  *
00116  *************************************************************************/
00117 void GLCD_SPI_SendBlock (unsigned char *pData, uint32_t Size);
00118
00119 /*************************************************************************
00120  * Function Name: GLCD_SPI_ReceiveBlock
00121  * Parameters: unsigned char *pData, uint32_t Size
00122  *
00123  * Return: void
00124  *
00125  * Description: Read byte from SSP
00126  *
00127  *************************************************************************/
00128 void GLCD_SPI_ReceiveBlock (unsigned char *pData, uint32_t Size);
00129
00130 #endif // __GLCD_LL_H
Generated on Tue Jun 7 14:59:01 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Data Fields

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Here is a list of all functions, variables, defines, enums, and typedefs with links to the files they belong to:

- k -

  • KB_LED_PIN : emactest.c
Generated on Tue Jun 7 15:00:15 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Data Fields

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Here is a list of all functions, variables, defines, enums, and typedefs with links to the files they belong to:

- l -

  • L : usb.h
  • LAST_ACK : tcpip.h
  • Last_cmd : microwire_test.c
  • LastFrameSent : tcpip.h
  • LC_END : lc-addrlabels.h , lc-switch.h
  • LC_INIT : lc-addrlabels.h , lc-switch.h
  • LC_RESUME : lc-addrlabels.h , lc-switch.h
  • LC_SET : lc-addrlabels.h , lc-switch.h
  • lc_t : lc-addrlabels.h , lc-switch.h
  • LCD_CS : GLCD_SPI_LPC1700.c
  • LCD_FLUSH_PIXELS : drv_glcd.h
  • LCD_SET_WINDOW : drv_glcd.h
  • lcd_text : lcdtest.c
  • LCD_WRITE_PIXEL : drv_glcd.h
  • LdcPixel_t : drv_glcd.h
  • LED : can_ledcontrol.c
  • LED1 : vcomdemo.h
  • LED1_MASK : tcpip.c , emactest.c , main.c
  • LED2 : vcomdemo.h
  • LED2_MASK : main.c , tcpip.c , emactest.c
  • LED3 : vcomdemo.h
  • LED4 : vcomdemo.h
  • LED5 : vcomdemo.h
  • LED6 : vcomdemo.h
  • LED7 : vcomdemo.h
  • LED8 : vcomdemo.h
  • LED_Blink() : emactest.c
  • LED_CFG : memory.h
  • LED_Init() : privilege.c , tcpip.c , emactest.c , main.c , wdt_interrupt_test.c
  • led_mask : LedBlinky.c
  • LED_MSK : memory.h
  • LED_NUM : LedBlinky.c
  • LED_PIN : tcpip.c , clock-arch.c , main.c
  • LED_RD : memory.h
  • Led_State : mpu_test.c
  • LED_SUSP : memory.h
  • LED_toggle : wdt_interrupt_test.c
  • LED_Value : can_ledcontrol.c
  • LED_WR : memory.h
  • LEDMSK : usbaudio.h , vcomdemo.h , demo.h
  • LEDStatus : rit_interrupt.c , timer_int_match.c
  • Length : mscuser.c
  • LightGrey : GLCD.h
  • LISTENING : tcpip.h
  • long_duty : pwm_match_int.c
  • LPC_ADC : LPC17xx.h
  • LPC_ADC_BASE : LPC17xx.h
  • LPC_AHB_BASE : LPC17xx.h
  • LPC_AHBRAM0_BASE : LPC17xx.h
  • LPC_AHBRAM1_BASE : LPC17xx.h
  • LPC_APB0_BASE : LPC17xx.h
  • LPC_APB1_BASE : LPC17xx.h
  • LPC_CAN1 : LPC17xx.h
  • LPC_CAN1_BASE : LPC17xx.h
  • LPC_CAN2 : LPC17xx.h
  • LPC_CAN2_BASE : LPC17xx.h
  • LPC_CANAF : LPC17xx.h
  • LPC_CANAF_BASE : LPC17xx.h
  • LPC_CANAF_RAM : LPC17xx.h
  • LPC_CANAF_RAM_BASE : LPC17xx.h
  • LPC_CANCR : LPC17xx.h
  • LPC_CANCR_BASE : LPC17xx.h
  • LPC_CM3_BASE : LPC17xx.h
  • LPC_DAC : LPC17xx.h
  • LPC_DAC_BASE : LPC17xx.h
  • LPC_EMAC : LPC17xx.h
  • LPC_EMAC_BASE : LPC17xx.h
  • LPC_FLASH_BASE : LPC17xx.h
  • LPC_GPDMA : LPC17xx.h
  • LPC_GPDMA_BASE : LPC17xx.h
  • LPC_GPDMACH0 : LPC17xx.h
  • LPC_GPDMACH0_BASE : LPC17xx.h
  • LPC_GPDMACH1 : LPC17xx.h
  • LPC_GPDMACH1_BASE : LPC17xx.h
  • LPC_GPDMACH2 : LPC17xx.h
  • LPC_GPDMACH2_BASE : LPC17xx.h
  • LPC_GPDMACH3 : LPC17xx.h
  • LPC_GPDMACH3_BASE : LPC17xx.h
  • LPC_GPDMACH4 : LPC17xx.h
  • LPC_GPDMACH4_BASE : LPC17xx.h
  • LPC_GPDMACH5 : LPC17xx.h
  • LPC_GPDMACH5_BASE : LPC17xx.h
  • LPC_GPDMACH6 : LPC17xx.h
  • LPC_GPDMACH6_BASE : LPC17xx.h
  • LPC_GPDMACH7 : LPC17xx.h
  • LPC_GPDMACH7_BASE : LPC17xx.h
  • LPC_GPIO0 : LPC17xx.h
  • LPC_GPIO0_BASE : LPC17xx.h
  • LPC_GPIO1 : LPC17xx.h
  • LPC_GPIO1_BASE : LPC17xx.h
  • LPC_GPIO2 : LPC17xx.h
  • LPC_GPIO2_BASE : LPC17xx.h
  • LPC_GPIO3 : LPC17xx.h
  • LPC_GPIO3_BASE : LPC17xx.h
  • LPC_GPIO4 : LPC17xx.h
  • LPC_GPIO4_BASE : LPC17xx.h
  • LPC_GPIO_BASE : LPC17xx.h
  • LPC_GPIOINT : LPC17xx.h
  • LPC_GPIOINT_BASE : LPC17xx.h
  • LPC_I2C0 : LPC17xx.h
  • LPC_I2C0_BASE : LPC17xx.h
  • LPC_I2C1 : LPC17xx.h
  • LPC_I2C1_BASE : LPC17xx.h
  • LPC_I2C2 : LPC17xx.h
  • LPC_I2C2_BASE : LPC17xx.h
  • LPC_I2S : LPC17xx.h
  • LPC_I2S_BASE : LPC17xx.h
  • LPC_MCPWM : LPC17xx.h
  • LPC_MCPWM_BASE : LPC17xx.h
  • LPC_PINCON : LPC17xx.h
  • LPC_PINCON_BASE : LPC17xx.h
  • LPC_PWM1 : LPC17xx.h
  • LPC_PWM1_BASE : LPC17xx.h
  • LPC_QEI : LPC17xx.h
  • LPC_QEI_BASE : LPC17xx.h
  • LPC_RAM_BASE : LPC17xx.h
  • LPC_RIT : LPC17xx.h
  • LPC_RIT_BASE : LPC17xx.h
  • LPC_RTC : LPC17xx.h
  • LPC_RTC_BASE : LPC17xx.h
  • LPC_SC : LPC17xx.h
  • LPC_SC_BASE : LPC17xx.h
  • LPC_SPI : LPC17xx.h
  • LPC_SPI_BASE : LPC17xx.h
  • LPC_SSP0 : LPC17xx.h
  • LPC_SSP0_BASE : LPC17xx.h
  • LPC_SSP1 : LPC17xx.h
  • LPC_SSP1_BASE : LPC17xx.h
  • LPC_TIM0 : LPC17xx.h
  • LPC_TIM0_BASE : LPC17xx.h
  • LPC_TIM1 : LPC17xx.h
  • LPC_TIM1_BASE : LPC17xx.h
  • LPC_TIM2 : LPC17xx.h
  • LPC_TIM2_BASE : LPC17xx.h
  • LPC_TIM3 : LPC17xx.h
  • LPC_TIM3_BASE : LPC17xx.h
  • LPC_UART0 : LPC17xx.h
  • LPC_UART0_BASE : LPC17xx.h
  • LPC_UART1 : LPC17xx.h
  • LPC_UART1_BASE : LPC17xx.h
  • LPC_UART2 : LPC17xx.h
  • LPC_UART2_BASE : LPC17xx.h
  • LPC_UART3 : LPC17xx.h
  • LPC_UART3_BASE : LPC17xx.h
  • LPC_USB : LPC17xx.h
  • LPC_USB_BASE : LPC17xx.h
  • LPC_WDT : LPC17xx.h
  • LPC_WDT_BASE : LPC17xx.h
Generated on Tue Jun 7 15:00:15 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Data Fields

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  • Functions
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  • x
  • y
Here is a list of all functions, variables, defines, enums, and typedefs with links to the files they belong to:

- m -

  • MADCTR : drv_glcd.h
  • MADCTR_Data_t : drv_glcd.h
  • Magenta : GLCD.h
  • main() : adc_burst_test.c , adc_polling_test.c , privilege.c , i2c_monitor.c , spi_sdcard.c , spi_slave.c , pca8581_test.c , ssp_dma.c , ssp_master.c , dac_dma.c , i2c_interrupt_test.c , microwire_test.c , sc16is750_int.c , i2c_polling_test.c , sc16is750_polling.c , ssp_slave.c , can_ledcontrol.c , dac_sinewave_test.c , slave.c , ti_test.c , 10ms_base.c , i2s_dma_test.c , systick_stclk.c , timer_capture.c , dac_speaker.c , i2s_irq_test.c , freqmeasure.c , gen_diff_delay.c , i2s_mclk.c , gen_diff_freqs.c , timer_int_match.c , adc_dma_test.c , can_self_test.c , dac_wave_generate.c , i2s_test_4_wire.c , timer_poll_match.c , pwm_signal.c , i2s_two_kit.c , uart_autobaud_test.c , uart_dma_test.c , easyweb.c , i2s_polling.c , uart_hw_flow_control.c , uart_interrupt_test.c , lcdtest.c , uart_irda_receive.c , uart_irda_transmit.c , can_test_aflut.c , emactest.c , lcdtest.c , uart_polling_test.c , rs485_master.c , mcpwm_simple.c , rs485_slave.c , uart_fullmodem_test.c , main.c , nvic_priority.c , usbdmain.c , vcomdemo.c , vt_relocation.c , demo.c , memory.c , adc_hardware_trigger_test.c , can_test_bypass_mode.c , flash_2_ram.c , template.c , wdt_interrupt_test.c , wdt_reset_test.c , pwm_dual_edge.c , gpdma_sleep.c , pwm_match_int.c , pwm_single_edge.c , can_test_two_kit.c , link_list.c , extint_sleep.c , nmi_powerdown.c , gpdma_r2r_test.c , rtc_deeppwd.c , wdt_deepsleep.c , adc_interrupt_test.c , bitband.c , gpio_int.c , qei_test_velo.c , rit_interrupt.c , LedBlinky.c , rtc_alarm_cntincr_int.c , rtc_calib.c , mpu_test.c , master.c , spi_loopback_test.c , spi_master.c , i2c_master_slave_int_test.c , spi_interrupt_test.c , spi_polling_test.c
  • Maroon : GLCD.h
  • Master_Buf : master.c , i2c_master_slave_int_test.c
  • Master_Rx_Buf : microwire_test.c , ti_test.c
  • master_test : master.c , i2c_master_slave_int_test.c
  • Master_Tx_Buf : ti_test.c
  • match_cnt : pwm_match_int.c
  • MatchCount : timer_capture.c
  • MAX : lpc_types.h
  • MAX_CAP_TIMES : qei_test_velo.c
  • MAX_ENTRY : can_test_aflut.c
  • MAX_ETH_TX_DATA_SIZE : tcpip.h
  • MAX_GLCD_STR_SIZE : drv_glcd.h
  • MAX_HW_FULLCAN_OBJ : lpc17xx_can.h
  • MAX_RETRIES : resolv.c
  • MAX_RETRYS : tcpip.h
  • MAX_SW_FULLCAN_OBJ : lpc17xx_can.h
  • MAX_TCP_RX_DATA_SIZE : tcpip.h
  • MAX_TCP_TX_DATA_SIZE : tcpip.h
  • MAX_TIME : uip-neighbor.c
  • MAX_VEL : qei_test_velo.c
  • MCB_LPC17XX_ADC_INJECT_TEST : adc_burst_test.c
  • MCB_LPC_1768 : LedBlinky.c , rit_interrupt.c , uart_fullmodem_test.c , wdt_interrupt_test.c , lpc17xx_emac.h , adc_burst_test.c , adc_dma_test.c , adc_interrupt_test.c , adc_polling_test.c , gpio_int.c
  • MCB_LPC_1768_ADC_BURST_MULTI : adc_burst_test.c
  • MCPWM_ACMode() : lpc17xx_mcpwm.h
  • MCPWM_CAPCLR_CAP : lpc17xx_mcpwm.h
  • MCPWM_CAPCON_CAPMCI_FE : lpc17xx_mcpwm.h
  • MCPWM_CAPCON_CAPMCI_RE : lpc17xx_mcpwm.h
  • MCPWM_CAPCON_HNFCAP : lpc17xx_mcpwm.h
  • MCPWM_CAPCON_RT : lpc17xx_mcpwm.h
  • MCPWM_CHANNEL_CENTER_MODE : lpc17xx_mcpwm.h
  • MCPWM_CHANNEL_EDGE_MODE : lpc17xx_mcpwm.h
  • MCPWM_CHANNEL_PASSIVE_HI : lpc17xx_mcpwm.h
  • MCPWM_CHANNEL_PASSIVE_LO : lpc17xx_mcpwm.h
  • MCPWM_ClearCapture() : lpc17xx_mcpwm.h
  • MCPWM_CNTCON_CNTR : lpc17xx_mcpwm.h
  • MCPWM_CNTCON_TCMCI_FE : lpc17xx_mcpwm.h
  • MCPWM_CNTCON_TCMCI_RE : lpc17xx_mcpwm.h
  • MCPWM_CON_ACMODE : lpc17xx_mcpwm.h
  • MCPWM_CON_CENTER : lpc17xx_mcpwm.h
  • MCPWM_CON_DCMODE : lpc17xx_mcpwm.h
  • MCPWM_CON_DISUP : lpc17xx_mcpwm.h
  • MCPWM_CON_DTE : lpc17xx_mcpwm.h
  • MCPWM_CON_INVBDC : lpc17xx_mcpwm.h
  • MCPWM_CON_POLAR : lpc17xx_mcpwm.h
  • MCPWM_CON_RUN : lpc17xx_mcpwm.h
  • MCPWM_ConfigCapture() : lpc17xx_mcpwm.h
  • MCPWM_ConfigChannel() : lpc17xx_mcpwm.h
  • MCPWM_CountConfig() : lpc17xx_mcpwm.h
  • MCPWM_CP_A0 : lpc17xx_mcpwm.h
  • MCPWM_CP_A1 : lpc17xx_mcpwm.h
  • MCPWM_CP_A2 : lpc17xx_mcpwm.h
  • MCPWM_CP_B0 : lpc17xx_mcpwm.h
  • MCPWM_CP_B1 : lpc17xx_mcpwm.h
  • MCPWM_CP_B2 : lpc17xx_mcpwm.h
  • MCPWM_DCMode() : lpc17xx_mcpwm.h
  • MCPWM_DT : lpc17xx_mcpwm.h
  • MCPWM_GetCapture() : lpc17xx_mcpwm.h
  • MCPWM_GetIntStatus() : lpc17xx_mcpwm.h
  • MCPWM_Init() : lpc17xx_mcpwm.h
  • MCPWM_INT_ABORT : lpc17xx_mcpwm.h
  • MCPWM_INT_ICAP : lpc17xx_mcpwm.h
  • MCPWM_INT_ILIM : lpc17xx_mcpwm.h
  • MCPWM_INT_IMAT : lpc17xx_mcpwm.h
  • MCPWM_IntClear() : lpc17xx_mcpwm.h
  • MCPWM_IntConfig() : lpc17xx_mcpwm.h
  • MCPWM_INTFLAG_ABORT : lpc17xx_mcpwm.h
  • MCPWM_INTFLAG_CAP0 : lpc17xx_mcpwm.h
  • MCPWM_INTFLAG_CAP1 : lpc17xx_mcpwm.h
  • MCPWM_INTFLAG_CAP2 : lpc17xx_mcpwm.h
  • MCPWM_INTFLAG_LIM0 : lpc17xx_mcpwm.h
  • MCPWM_INTFLAG_LIM1 : lpc17xx_mcpwm.h
  • MCPWM_INTFLAG_LIM2 : lpc17xx_mcpwm.h
  • MCPWM_INTFLAG_MAT0 : lpc17xx_mcpwm.h
  • MCPWM_INTFLAG_MAT1 : lpc17xx_mcpwm.h
  • MCPWM_INTFLAG_MAT2 : lpc17xx_mcpwm.h
  • MCPWM_IntSet() : lpc17xx_mcpwm.h
  • MCPWM_IRQHandler() : mcpwm_simple.c
  • MCPWM_IRQn : LPC17xx.h
  • MCPWM_PATENT_A0 : lpc17xx_mcpwm.h
  • MCPWM_PATENT_A1 : lpc17xx_mcpwm.h
  • MCPWM_PATENT_A2 : lpc17xx_mcpwm.h
  • MCPWM_PATENT_B0 : lpc17xx_mcpwm.h
  • MCPWM_PATENT_B1 : lpc17xx_mcpwm.h
  • MCPWM_PATENT_B2 : lpc17xx_mcpwm.h
  • MCPWM_Start() : lpc17xx_mcpwm.h
  • MCPWM_Stop() : lpc17xx_mcpwm.h
  • MCPWM_WriteToShadow() : lpc17xx_mcpwm.h
  • MEMB() : telnetd.c
  • MemManage_Handler() : mpu_test.c
  • MemOK : mscuser.c
  • Memory : memory.c , mscuser.c
  • MemoryManagement_IRQn : LPC17xx.h
  • menu : can_ledcontrol.c , can_self_test.c , can_test_aflut.c , wdt_deepsleep.c , can_test_bypass_mode.c , can_test_two_kit.c , bitband.c , vt_relocation.c , mpu_test.c , privilege.c , flash_2_ram.c , link_list.c , i2s_dma_test.c , i2s_irq_test.c , i2s_mclk.c , i2s_test_4_wire.c , i2s_two_kit.c , i2s_polling.c , extint_sleep.c , nmi_powerdown.c , rtc_deeppwd.c , rit_interrupt.c , rtc_calib.c , pwm_signal.c
  • menu1 : uart_fullmodem_test.c , timer_capture.c , freqmeasure.c , gen_diff_delay.c , gen_diff_freqs.c , timer_int_match.c , timer_poll_match.c , uart_autobaud_test.c , uart_hw_flow_control.c , uart_interrupt_test.c , uart_irda_receive.c , uart_polling_test.c , rs485_master.c , rs485_slave.c , wdt_interrupt_test.c , wdt_reset_test.c , i2c_interrupt_test.c , uart_irda_transmit.c , uart_dma_test.c , ti_test.c , microwire_test.c , spi_sdcard.c , master.c , adc_polling_test.c , adc_burst_test.c , adc_dma_test.c , adc_hardware_trigger_test.c , adc_interrupt_test.c , dac_wave_generate.c , gpdma_sleep.c , gpdma_r2r_test.c , i2c_master_slave_int_test.c , i2c_monitor.c , pca8581_test.c , i2c_polling_test.c , slave.c , rtc_alarm_cntincr_int.c , spi_loopback_test.c , spi_master.c , spi_interrupt_test.c , spi_polling_test.c , spi_slave.c , ssp_dma.c , ssp_master.c , sc16is750_int.c , sc16is750_polling.c , ssp_slave.c
  • menu2 : uart_irda_receive.c , adc_dma_test.c , privilege.c , uart_hw_flow_control.c , flash_2_ram.c , rs485_master.c , uart_irda_transmit.c , link_list.c , uart_autobaud_test.c , ssp_slave.c , ti_test.c , pca8581_test.c , i2c_interrupt_test.c , i2c_polling_test.c , sc16is750_polling.c , spi_master.c , spi_polling_test.c , ssp_dma.c , ssp_master.c , sc16is750_int.c , spi_slave.c , spi_interrupt_test.c , uart_interrupt_test.c , spi_loopback_test.c , gpdma_r2r_test.c , gpdma_sleep.c , uart_polling_test.c , uart_fullmodem_test.c
  • menu3 : uart_irda_transmit.c , uart_irda_receive.c , uart_hw_flow_control.c , uart_interrupt_test.c , uart_polling_test.c , uart_dma_test.c , uart_autobaud_test.c , uart_fullmodem_test.c
  • menu4 : uart_irda_transmit.c
  • menu5 : uart_irda_transmit.c
  • MicroWire_RD_CMD : microwire_test.c
  • MicroWire_WR_CMD : microwire_test.c
  • MIN : lpc_types.h
  • MPU_FULL_ACCESS : mpu_test.c
  • MPU_NO_ACCESS : mpu_test.c
  • MPU_PRIVILEGED_ACESS_USER_NO_ACCESS : mpu_test.c
  • MPU_PRIVILEGED_READ_ONLY_USER_NO_ACCESS : mpu_test.c
  • MPU_PRIVILEGED_RW_USER_READ_ONLY : mpu_test.c
  • MPU_RASR_ACCESS_PERMISSION : mpu_test.c
  • MPU_RASR_REGION_SIZE : mpu_test.c
  • MPU_READ_ONLY : mpu_test.c
  • MPU_REGION_ENABLE : mpu_test.c
  • MPU_REGION_SIZE_128B : mpu_test.c
  • MPU_REGION_SIZE_128KB : mpu_test.c
  • MPU_REGION_SIZE_128MB : mpu_test.c
  • MPU_REGION_SIZE_16KB : mpu_test.c
  • MPU_REGION_SIZE_16MB : mpu_test.c
  • MPU_REGION_SIZE_1GB : mpu_test.c
  • MPU_REGION_SIZE_1KB : mpu_test.c
  • MPU_REGION_SIZE_1MB : mpu_test.c
  • MPU_REGION_SIZE_256B : mpu_test.c
  • MPU_REGION_SIZE_256KB : mpu_test.c
  • MPU_REGION_SIZE_256MB : mpu_test.c
  • MPU_REGION_SIZE_2GB : mpu_test.c
  • MPU_REGION_SIZE_2KB : mpu_test.c
  • MPU_REGION_SIZE_2MB : mpu_test.c
  • MPU_REGION_SIZE_32B : mpu_test.c
  • MPU_REGION_SIZE_32KB : mpu_test.c
  • MPU_REGION_SIZE_32MB : mpu_test.c
  • MPU_REGION_SIZE_4GB : mpu_test.c
  • MPU_REGION_SIZE_4KB : mpu_test.c
  • MPU_REGION_SIZE_4MB : mpu_test.c
  • MPU_REGION_SIZE_512B : mpu_test.c
  • MPU_REGION_SIZE_512KB : mpu_test.c
  • MPU_REGION_SIZE_512MB : mpu_test.c
  • MPU_REGION_SIZE_64B : mpu_test.c
  • MPU_REGION_SIZE_64KB : mpu_test.c
  • MPU_REGION_SIZE_64MB : mpu_test.c
  • MPU_REGION_SIZE_8KB : mpu_test.c
  • MPU_REGION_SIZE_8MB : mpu_test.c
  • MPU_UNPREDICTABLE : mpu_test.c
  • MSC_BlockCount : mscuser.h
  • MSC_BlockSize : mscuser.h
  • MSC_BS_CBW : msc.h
  • MSC_BS_CSW : msc.h
  • MSC_BS_DATA_IN : msc.h
  • MSC_BS_DATA_IN_LAST : msc.h
  • MSC_BS_DATA_IN_LAST_STALL : msc.h
  • MSC_BS_DATA_OUT : msc.h
  • MSC_BS_ERROR : msc.h
  • MSC_BulkIn() : mscuser.c , mscuser.h
  • MSC_BulkOut() : mscuser.c , mscuser.h
  • MSC_CBW : msc.h
  • MSC_CBW_Signature : msc.h
  • MSC_CSW : msc.h
  • MSC_CSW_Signature : msc.h
  • MSC_EP_IN : mscuser.h
  • MSC_EP_OUT : mscuser.h
  • MSC_GetCBW() : mscuser.h , mscuser.c
  • MSC_GetMaxLUN() : mscuser.c , mscuser.h
  • MSC_ImageSize : memory.h
  • MSC_Inquiry() : mscuser.c
  • MSC_MAX_PACKET : mscuser.h
  • MSC_MemoryRead() : mscuser.c
  • MSC_MemorySize : mscuser.h
  • MSC_MemoryVerify() : mscuser.c
  • MSC_MemoryWrite() : mscuser.c
  • MSC_ModeSense10() : mscuser.c
  • MSC_ModeSense6() : mscuser.c
  • MSC_PROTOCOL_BULK_ONLY : msc.h
  • MSC_PROTOCOL_CBI_INT : msc.h
  • MSC_PROTOCOL_CBI_NOINT : msc.h
  • MSC_ReadCapacity() : mscuser.c
  • MSC_ReadFormatCapacity() : mscuser.c
  • MSC_REQUEST_GET_MAX_LUN : msc.h
  • MSC_REQUEST_RESET : msc.h
  • MSC_RequestSense() : mscuser.c
  • MSC_Reset() : mscuser.h , mscuser.c
  • MSC_RWSetup() : mscuser.c
  • MSC_SetCSW() : mscuser.c , mscuser.h
  • MSC_SUBCLASS_QIC157 : msc.h
  • MSC_SUBCLASS_RBC : msc.h
  • MSC_SUBCLASS_SCSI : msc.h
  • MSC_SUBCLASS_SFF8020I_MMC2 : msc.h
  • MSC_SUBCLASS_SFF8070I : msc.h
  • MSC_SUBCLASS_UFI : msc.h
  • MSC_TestUnitReady() : mscuser.c
  • MSG_DISABLE : lpc17xx_can.h
  • MSG_ENABLE : lpc17xx_can.h
  • Mute : usbdmain.c , usbaudio.h
  • MyIP : tcpip.h
  • MYIP_1 : tcpip.h
  • MYIP_2 : tcpip.h
  • MYIP_3 : tcpip.h
  • MYIP_4 : tcpip.h
  • MyMAC : tcpip.h , tcpip.c
  • MYMAC_1 : emactest.c , EMAC.h
  • MYMAC_2 : EMAC.h , emactest.c
  • MYMAC_3 : emactest.c , EMAC.h
  • MYMAC_4 : EMAC.h , emactest.c
  • MYMAC_5 : EMAC.h , emactest.c
  • MYMAC_6 : EMAC.h , emactest.c
Generated on Tue Jun 7 15:00:15 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Data Fields

  • All
  • Functions
  • Variables
  • Typedefs
  • Enumerations
  • Enumerator
  • Defines
  • _
  • a
  • b
  • c
  • d
  • e
  • f
  • g
  • h
  • i
  • k
  • l
  • m
  • n
  • o
  • p
  • q
  • r
  • s
  • t
  • u
  • v
  • w
  • x
  • y
Here is a list of all functions, variables, defines, enums, and typedefs with links to the files they belong to:

- n -

  • Navy : GLCD.h
  • NDD_REQ_INT : usbreg.h
  • NELEMENTS : lpc_types.h
  • nextline : rs485_slave.c , rs485_master.c
  • NMI_Handler() : nmi_powerdown.c
  • NONE_BLOCKING : lpc_types.h
  • NonMaskableInt_IRQn : LPC17xx.h
  • NOP : drv_glcd.h
  • NotificationBuf : cdcuser.c
  • ntohs : uip.h
  • NULL : resolv.c , httpd-fs.c , lpc_types.h
  • NUM_SAMPLE : dac_wave_generate.c
  • NUM_SAMPLE_SINE : dac_wave_generate.c
  • NUM_SINE_SAMPLE : dac_sinewave_test.c
  • NVIC : core_cm3.h
  • NVIC_BASE : core_cm3.h
  • NVIC_DeInit() : lpc17xx_nvic.h
  • NVIC_SCBDeInit() : lpc17xx_nvic.h
  • NVIC_SetVTOR() : lpc17xx_nvic.h
  • NVIC_VTOR_MASK : lpc17xx_nvic.c
  • NXP_Logo : NXP_logo.c , NXP_logo.h
  • NXP_LogoStream : NXP_logo.c
Generated on Tue Jun 7 15:00:15 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Data Fields

  • All
  • Functions
  • Variables
  • Typedefs
  • Enumerations
  • Enumerator
  • Defines
  • _
  • a
  • b
  • c
  • d
  • e
  • f
  • g
  • h
  • i
  • k
  • l
  • m
  • n
  • o
  • p
  • q
  • r
  • s
  • t
  • u
  • v
  • w
  • x
  • y
Here is a list of all functions, variables, defines, enums, and typedefs with links to the files they belong to:

- o -

  • Offset : mscuser.c
  • Olive : GLCD.h
  • OP_ARP_ANSWER : tcpip.h
  • OP_ARP_REQUEST : tcpip.h
  • OSC_CLK : system_LPC17xx.c
  • OSCOFF : drv_glcd.h
  • OSCON : drv_glcd.h
  • OutReport : demo.c , demo.h
Generated on Tue Jun 7 15:00:15 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Data Fields

  • All
  • Functions
  • Variables
  • Typedefs
  • Enumerations
  • Enumerator
  • Defines
  • _
  • a
  • b
  • c
  • d
  • e
  • f
  • g
  • h
  • i
  • k
  • l
  • m
  • n
  • o
  • p
  • q
  • r
  • s
  • t
  • u
  • v
  • w
  • x
  • y
Here is a list of all functions, variables, defines, enums, and typedefs with links to the files they belong to:

- a -

  • AC_MODE_TEST : mcpwm_simple.c
  • ack_msg : rs485_slave.c
  • ACMD13_SD_STATUS : spi_sdcard.c
  • ACMD22_SEND_NUM_WR_BLOCKS : spi_sdcard.c
  • ACMD23_SET_WR_BLK_ERASE_COUNT : spi_sdcard.c
  • ACMD41_SEND_OP_COND : spi_sdcard.c
  • ACMD42_SET_CLR_CARD_DETECT : spi_sdcard.c
  • ACMD51_SEND_SCR : spi_sdcard.c
  • ACTIVE : lpc17xx_uart.h
  • ADC_ADCOFFS : lpc17xx_adc.h
  • ADC_ADGINTEN : lpc17xx_adc.h
  • ADC_ADINTEN0 : lpc17xx_adc.h
  • ADC_ADINTEN1 : lpc17xx_adc.h
  • ADC_ADINTEN2 : lpc17xx_adc.h
  • ADC_ADINTEN3 : lpc17xx_adc.h
  • ADC_ADINTEN4 : lpc17xx_adc.h
  • ADC_ADINTEN5 : lpc17xx_adc.h
  • ADC_ADINTEN6 : lpc17xx_adc.h
  • ADC_ADINTEN7 : lpc17xx_adc.h
  • ADC_BurstCmd() : lpc17xx_adc.h
  • ADC_CHANNEL_0 : lpc17xx_adc.h
  • ADC_CHANNEL_1 : lpc17xx_adc.h
  • ADC_CHANNEL_2 : lpc17xx_adc.h
  • ADC_CHANNEL_3 : lpc17xx_adc.h
  • ADC_CHANNEL_4 : lpc17xx_adc.h
  • ADC_CHANNEL_5 : lpc17xx_adc.h
  • ADC_CHANNEL_6 : lpc17xx_adc.h
  • ADC_CHANNEL_7 : lpc17xx_adc.h
  • ADC_CHANNEL_SELECTION : lpc17xx_adc.h
  • ADC_ChannelCmd() : lpc17xx_adc.h
  • ADC_ChannelGetData() : lpc17xx_adc.h
  • ADC_ChannelGetStatus() : lpc17xx_adc.h
  • ADC_CR_BURST : lpc17xx_adc.h
  • ADC_CR_CH_SEL : lpc17xx_adc.h
  • ADC_CR_CLKDIV : lpc17xx_adc.h
  • ADC_CR_EDGE : lpc17xx_adc.h
  • ADC_CR_PDN : lpc17xx_adc.h
  • ADC_CR_START_CAP01 : lpc17xx_adc.h
  • ADC_CR_START_EINT0 : lpc17xx_adc.h
  • ADC_CR_START_MASK : lpc17xx_adc.h
  • ADC_CR_START_MAT01 : lpc17xx_adc.h
  • ADC_CR_START_MAT03 : lpc17xx_adc.h
  • ADC_CR_START_MAT10 : lpc17xx_adc.h
  • ADC_CR_START_MAT11 : lpc17xx_adc.h
  • ADC_CR_START_MODE_SEL : lpc17xx_adc.h
  • ADC_CR_START_NOW : lpc17xx_adc.h
  • ADC_DATA_BURST : lpc17xx_adc.h
  • ADC_DATA_DONE : lpc17xx_adc.h
  • ADC_DATA_STATUS : lpc17xx_adc.h
  • ADC_DeInit() : lpc17xx_adc.h
  • ADC_DR_DONE_FLAG : lpc17xx_adc.h
  • ADC_DR_OVERRUN_FLAG : lpc17xx_adc.h
  • ADC_DR_RESULT : lpc17xx_adc.h
  • ADC_EdgeStartConfig() : lpc17xx_adc.h
  • ADC_EP_GetRequest() : adcuser.c , adcuser.h
  • ADC_EP_SetRequest() : adcuser.c , adcuser.h
  • ADC_GDR_CH : lpc17xx_adc.h
  • ADC_GDR_CH_MASK : lpc17xx_adc.h
  • ADC_GDR_DONE_FLAG : lpc17xx_adc.h
  • ADC_GDR_OVERRUN_FLAG : lpc17xx_adc.h
  • ADC_GDR_RESULT : lpc17xx_adc.h
  • ADC_getCnv() : ADC.c , ADC.h
  • ADC_GetData() : lpc17xx_adc.c
  • ADC_GlobalGetData() : lpc17xx_adc.h
  • ADC_GlobalGetStatus() : lpc17xx_adc.h
  • ADC_IF_GetRequest() : adcuser.c , adcuser.h
  • ADC_IF_SetRequest() : adcuser.c , adcuser.h
  • ADC_Init() : lpc17xx_adc.h
  • ADC_init() : ADC.c , ADC.h
  • ADC_IntConfig() : lpc17xx_adc.h
  • ADC_INTEN_CH : lpc17xx_adc.h
  • ADC_INTEN_GLOBAL : lpc17xx_adc.h
  • ADC_IRQHandler() : adc_hardware_trigger_test.c , adc_interrupt_test.c
  • ADC_IRQn : LPC17xx.h
  • ADC_PowerdownCmd() : lpc17xx_adc.h
  • ADC_START_CONTINUOUS : lpc17xx_adc.h
  • ADC_START_NOW : lpc17xx_adc.h
  • ADC_START_ON_CAP01 : lpc17xx_adc.h
  • ADC_START_ON_EDGE_OPT : lpc17xx_adc.h
  • ADC_START_ON_EINT0 : lpc17xx_adc.h
  • ADC_START_ON_FALLING : lpc17xx_adc.h
  • ADC_START_ON_MAT01 : lpc17xx_adc.h
  • ADC_START_ON_MAT03 : lpc17xx_adc.h
  • ADC_START_ON_MAT10 : lpc17xx_adc.h
  • ADC_START_ON_MAT11 : lpc17xx_adc.h
  • ADC_START_ON_RISING : lpc17xx_adc.h
  • ADC_START_OPT : lpc17xx_adc.h
  • ADC_StartCmd() : lpc17xx_adc.h
  • ADC_startCnv() : ADC.c , ADC.h
  • ADC_STAT_CH_DONE_FLAG : lpc17xx_adc.h
  • ADC_STAT_CH_OVERRUN_FLAG : lpc17xx_adc.h
  • ADC_STAT_INT_FLAG : lpc17xx_adc.h
  • ADC_stopCnv() : ADC.c , ADC.h
  • ADC_TRIM : lpc17xx_adc.h
  • ADC_TYPE_INT_OPT : lpc17xx_adc.h
  • adc_value : adc_hardware_trigger_test.c , adc_interrupt_test.c
  • ADC_VALUE_MAX : ADC.h
  • addr_acc : rs485_slave.c
  • addr_auto : rs485_slave.c
  • addr_menu : rs485_slave.c
  • addr_una : rs485_slave.c
  • AFLUT_ENTRY_Type : lpc17xx_can.h
  • AFRxMsg : can_test_aflut.c , can_test_two_kit.c
  • AFTable : can_test_aflut.c
  • AFTxMsg : can_test_aflut.c , can_test_two_kit.c
  • AP_CLK : usbreg.h
  • APOFF : drv_glcd.h
  • APON : drv_glcd.h
  • ARP_FRAME_SIZE : tcpip.h
  • ARP_HARDW_OFS : tcpip.h
  • ARP_HLEN_PLEN_OFS : tcpip.h
  • ARP_HWTYPE_ETH : uip_arp.c
  • ARP_OPCODE_OFS : tcpip.h
  • ARP_PROT_OFS : tcpip.h
  • ARP_REPLY : uip_arp.c
  • ARP_REQUEST : uip_arp.c , tcpip.h
  • ARP_SENDER_HA_OFS : tcpip.h
  • ARP_SENDER_IP_OFS : tcpip.h
  • ARP_TARGET_HA_OFS : tcpip.h
  • ARP_TARGET_IP_OFS : tcpip.h
  • ASCSET : drv_glcd.h
  • ASCSET_Data_t : drv_glcd.h
  • AUDIO_3D_STEREO_PROCESS : audio.h
  • AUDIO_AC3_CONTROL_UNDEFINED : audio.h
  • AUDIO_AC3_DYN_RANGE_CONTROL : audio.h
  • AUDIO_AC3_HILO_SCALING_CONTROL : audio.h
  • AUDIO_AC3_MODE_CONTROL : audio.h
  • AUDIO_AC3_SCALING_CONTROL : audio.h
  • AUDIO_ATTACK_TIME_CONTROL : audio.h
  • AUDIO_AUTOMATIC_GAIN_CONTROL : audio.h
  • AUDIO_BASS_BOOST_CONTROL : audio.h
  • AUDIO_BASS_CONTROL : audio.h
  • AUDIO_CHANNEL_C : audio.h
  • AUDIO_CHANNEL_L : audio.h
  • AUDIO_CHANNEL_LC : audio.h
  • AUDIO_CHANNEL_LFE : audio.h
  • AUDIO_CHANNEL_LS : audio.h
  • AUDIO_CHANNEL_M : audio.h
  • AUDIO_CHANNEL_R : audio.h
  • AUDIO_CHANNEL_RC : audio.h
  • AUDIO_CHANNEL_RS : audio.h
  • AUDIO_CHANNEL_S : audio.h
  • AUDIO_CHANNEL_SL : audio.h
  • AUDIO_CHANNEL_SR : audio.h
  • AUDIO_CHANNEL_T : audio.h
  • AUDIO_CHORUS_DEPTH_CONTROL : audio.h
  • AUDIO_CHORUS_LEVEL_CONTROL : audio.h
  • AUDIO_CHORUS_PROCESS : audio.h
  • AUDIO_COMPRESSION_RATE_CONTROL : audio.h
  • AUDIO_CONFIGURATION_DESCRIPTOR_TYPE : audio.h
  • AUDIO_CONTROL_ATTACK_TIME : audio.h
  • AUDIO_CONTROL_AUTOMATIC_GAIN : audio.h
  • AUDIO_CONTROL_BASS : audio.h
  • AUDIO_CONTROL_BASS_BOOST : audio.h
  • AUDIO_CONTROL_CHORUS_DEPTH : audio.h
  • AUDIO_CONTROL_CHORUS_LEVEL : audio.h
  • AUDIO_CONTROL_COMPRESSION_RATE : audio.h
  • AUDIO_CONTROL_DEALY : audio.h
  • AUDIO_CONTROL_ENABLE : audio.h
  • AUDIO_CONTROL_EXTENSION_UNIT : audio.h
  • AUDIO_CONTROL_FEATURE_UNIT : audio.h
  • AUDIO_CONTROL_GRAPHIC_EQUALIZER : audio.h
  • AUDIO_CONTROL_HEADER : audio.h
  • AUDIO_CONTROL_INPUT_TERMINAL : audio.h
  • AUDIO_CONTROL_INTERFACE_DESC_SZ : audio.h
  • AUDIO_CONTROL_LOUDNESS : audio.h
  • AUDIO_CONTROL_MAX_AMPL : audio.h
  • AUDIO_CONTROL_MID : audio.h
  • AUDIO_CONTROL_MIXER_UNIT : audio.h
  • AUDIO_CONTROL_MODE_SELECT : audio.h
  • AUDIO_CONTROL_MUTE : audio.h
  • AUDIO_CONTROL_OUTPUT_TERMINAL : audio.h
  • AUDIO_CONTROL_PITCH : audio.h
  • AUDIO_CONTROL_PROCESSING_UNIT : audio.h
  • AUDIO_CONTROL_RELEASE_TIME : audio.h
  • AUDIO_CONTROL_REVERB_FEEDBACK : audio.h
  • AUDIO_CONTROL_REVERB_LEVEL : audio.h
  • AUDIO_CONTROL_REVERB_TIME : audio.h
  • AUDIO_CONTROL_REVERB_TYPE : audio.h
  • AUDIO_CONTROL_SAMPLING_FREQ : audio.h
  • AUDIO_CONTROL_SELECTOR_UNIT : audio.h
  • AUDIO_CONTROL_SHORUS_RATE : audio.h
  • AUDIO_CONTROL_SPACIOUSNESS : audio.h
  • AUDIO_CONTROL_THRESHOLD : audio.h
  • AUDIO_CONTROL_TREBLE : audio.h
  • AUDIO_CONTROL_UNDEFINED : audio.h
  • AUDIO_CONTROL_VOLUME : audio.h
  • AUDIO_COPY_PROTECT_CONTROL : audio.h
  • AUDIO_DELAY_CONTROL : audio.h
  • AUDIO_DEVICE_DESCRIPTOR_TYPE : audio.h
  • AUDIO_DOLBY_PROLOGIC_PROCESS : audio.h
  • AUDIO_DYN_RANGE_COMP_PROCESS : audio.h
  • AUDIO_ENABLE_CONTROL : audio.h
  • AUDIO_ENDPOINT_DESCRIPTOR_TYPE : audio.h
  • AUDIO_ENDPOINT_GENERAL : audio.h
  • AUDIO_ENDPOINT_UNDEFINED : audio.h
  • AUDIO_EXTENSION_UNIT_DESC_SZ : audio.h
  • AUDIO_FEATURE_UNIT_DESC_SZ : audio.h
  • AUDIO_FORMAT_AC3 : audio.h
  • AUDIO_FORMAT_AC3_DESC_SIZE : audio.h
  • AUDIO_FORMAT_ALAW : audio.h
  • AUDIO_FORMAT_IEC1937_AC3 : audio.h
  • AUDIO_FORMAT_IEC1937_MPEG1_L1 : audio.h
  • AUDIO_FORMAT_IEC1937_MPEG1_L2_3 : audio.h
  • AUDIO_FORMAT_IEC1937_MPEG2_EXT : audio.h
  • AUDIO_FORMAT_IEC1937_MPEG2_L1_LS : audio.h
  • AUDIO_FORMAT_IEC1937_MPEG2_L2_3 : audio.h
  • AUDIO_FORMAT_IEC1937_MPEG2_NOEXT : audio.h
  • AUDIO_FORMAT_IEEE_FLOAT : audio.h
  • AUDIO_FORMAT_MPEG : audio.h
  • AUDIO_FORMAT_MPEG_DESC_SIZE : audio.h
  • AUDIO_FORMAT_MULAW : audio.h
  • AUDIO_FORMAT_PCM : audio.h
  • AUDIO_FORMAT_PCM8 : audio.h
  • AUDIO_FORMAT_TYPE_I : audio.h
  • AUDIO_FORMAT_TYPE_I_DESC_SZ : audio.h
  • AUDIO_FORMAT_TYPE_I_UNDEFINED : audio.h
  • AUDIO_FORMAT_TYPE_II : audio.h
  • AUDIO_FORMAT_TYPE_II_DESC_SZ : audio.h
  • AUDIO_FORMAT_TYPE_II_UNDEFINED : audio.h
  • AUDIO_FORMAT_TYPE_III : audio.h
  • AUDIO_FORMAT_TYPE_III_DESC_SZ : audio.h
  • AUDIO_FORMAT_TYPE_III_UNDEFINED : audio.h
  • AUDIO_FORMAT_TYPE_UNDEFINED : audio.h
  • AUDIO_GRAPHIC_EQUALIZER_CONTROL : audio.h
  • AUDIO_INPUT_TERMINAL_DESC_SIZE : audio.h
  • AUDIO_INTERFACE_DESCRIPTOR_TYPE : audio.h
  • AUDIO_LOUDNESS_CONTROL : audio.h
  • AUDIO_MAX_AMPL_CONTROL : audio.h
  • AUDIO_MAX_PACKETS_ONLY : audio.h
  • AUDIO_MID_CONTROL : audio.h
  • AUDIO_MIXER_UNIT_DESC_SZ : audio.h
  • AUDIO_MODE_SELECT_CONTROL : audio.h
  • AUDIO_MPEG_CONTROL_UNDEFINED : audio.h
  • AUDIO_MPEG_DUAL_CHANNEL_CONTROL : audio.h
  • AUDIO_MPEG_DYN_RANGE_CONTROL : audio.h
  • AUDIO_MPEG_HILO_SCALING_CONTROL : audio.h
  • AUDIO_MPEG_MULTILINGUAL_CONTROL : audio.h
  • AUDIO_MPEG_SCALING_CONTROL : audio.h
  • AUDIO_MPEG_SECOND_STEREO_CONTROL : audio.h
  • AUDIO_MUTE_CONTROL : audio.h
  • AUDIO_OUTPUT_TERMINAL_DESC_SIZE : audio.h
  • AUDIO_PITCH_CONTROL : audio.h
  • AUDIO_PROCESSING_UNIT_DESC_SZ : audio.h
  • AUDIO_PROTOCOL_UNDEFINED : audio.h
  • AUDIO_RELEASE_TIME_CONTROL : audio.h
  • AUDIO_REQUEST_GET_CUR : audio.h
  • AUDIO_REQUEST_GET_MAX : audio.h
  • AUDIO_REQUEST_GET_MEM : audio.h
  • AUDIO_REQUEST_GET_MIN : audio.h
  • AUDIO_REQUEST_GET_RES : audio.h
  • AUDIO_REQUEST_GET_STAT : audio.h
  • AUDIO_REQUEST_SET_CUR : audio.h
  • AUDIO_REQUEST_SET_MAX : audio.h
  • AUDIO_REQUEST_SET_MEM : audio.h
  • AUDIO_REQUEST_SET_MIN : audio.h
  • AUDIO_REQUEST_SET_RES : audio.h
  • AUDIO_REQUEST_UNDEFINED : audio.h
  • AUDIO_REVERB_FEEDBACK_CONTROL : audio.h
  • AUDIO_REVERB_LEVEL_CONTROL : audio.h
  • AUDIO_REVERB_TIME_CONTROL : audio.h
  • AUDIO_REVERBERATION_PROCESS : audio.h
  • AUDIO_SAMPLING_FREQ_CONTROL : audio.h
  • AUDIO_SELECTOR_UNIT_DESC_SZ : audio.h
  • AUDIO_SHORUS_RATE_CONTROL : audio.h
  • AUDIO_SPACIOUSNESS_CONTROL : audio.h
  • AUDIO_STANDARD_ENDPOINT_DESC_SIZE : audio.h
  • AUDIO_STREAMING_ENDPOINT_DESC_SIZE : audio.h
  • AUDIO_STREAMING_FORMAT_SPECIFIC : audio.h
  • AUDIO_STREAMING_FORMAT_TYPE : audio.h
  • AUDIO_STREAMING_GENERAL : audio.h
  • AUDIO_STREAMING_INTERFACE_DESC_SIZE : audio.h
  • AUDIO_STREAMING_UNDEFINED : audio.h
  • AUDIO_STRING_DESCRIPTOR_TYPE : audio.h
  • AUDIO_SUBCLASS_AUDIOCONTROL : audio.h
  • AUDIO_SUBCLASS_AUDIOSTREAMING : audio.h
  • AUDIO_SUBCLASS_MIDISTREAMING : audio.h
  • AUDIO_SUBCLASS_UNDEFINED : audio.h
  • AUDIO_TERMINAL_1394_DA_STREAM : audio.h
  • AUDIO_TERMINAL_1394_DA_STREAM_TRACK : audio.h
  • AUDIO_TERMINAL_ANALOG_CONNECTOR : audio.h
  • AUDIO_TERMINAL_ANALOG_TAPE : audio.h
  • AUDIO_TERMINAL_BIDIRECTIONAL_UNDEFINED : audio.h
  • AUDIO_TERMINAL_CABLE_TUNER_AUDIO : audio.h
  • AUDIO_TERMINAL_CALIBRATION_NOISE : audio.h
  • AUDIO_TERMINAL_CD_PLAYER : audio.h
  • AUDIO_TERMINAL_COMMUNICATION_SPEAKER : audio.h
  • AUDIO_TERMINAL_DAT : audio.h
  • AUDIO_TERMINAL_DCC : audio.h
  • AUDIO_TERMINAL_DESKTOP_MICROPHONE : audio.h
  • AUDIO_TERMINAL_DESKTOP_SPEAKER : audio.h
  • AUDIO_TERMINAL_DIGITAL_AUDIO_INTERFACE : audio.h
  • AUDIO_TERMINAL_DOWN_LINE_PHONE : audio.h
  • AUDIO_TERMINAL_DSS_AUDIO : audio.h
  • AUDIO_TERMINAL_DVD_AUDIO : audio.h
  • AUDIO_TERMINAL_EMBEDDED_UNDEFINED : audio.h
  • AUDIO_TERMINAL_EQUALIZATION_NOISE : audio.h
  • AUDIO_TERMINAL_EXTERNAL_UNDEFINED : audio.h
  • AUDIO_TERMINAL_HANDSET : audio.h
  • AUDIO_TERMINAL_HEAD_MOUNTED_AUDIO : audio.h
  • AUDIO_TERMINAL_HEAD_MOUNTED_HANDSET : audio.h
  • AUDIO_TERMINAL_HEADPHONES : audio.h
  • AUDIO_TERMINAL_INPUT_UNDEFINED : audio.h
  • AUDIO_TERMINAL_LEGACY_AUDIO_CONNECTOR : audio.h
  • AUDIO_TERMINAL_LINE_CONNECTOR : audio.h
  • AUDIO_TERMINAL_LOW_FREQ_SPEAKER : audio.h
  • AUDIO_TERMINAL_MICROPHONE : audio.h
  • AUDIO_TERMINAL_MICROPHONE_ARRAY : audio.h
  • AUDIO_TERMINAL_MINI_DISK : audio.h
  • AUDIO_TERMINAL_MULTI_TRACK_RECORDER : audio.h
  • AUDIO_TERMINAL_OMNI_DIR_MICROPHONE : audio.h
  • AUDIO_TERMINAL_OUTPUT_UNDEFINED : audio.h
  • AUDIO_TERMINAL_PERSONAL_MICROPHONE : audio.h
  • AUDIO_TERMINAL_PHONE_LINE : audio.h
  • AUDIO_TERMINAL_PHONOGRAPH : audio.h
  • AUDIO_TERMINAL_PROCESSING_MIC_ARRAY : audio.h
  • AUDIO_TERMINAL_RADIO_RECEIVER : audio.h
  • AUDIO_TERMINAL_RADIO_TRANSMITTER : audio.h
  • AUDIO_TERMINAL_ROOM_SPEAKER : audio.h
  • AUDIO_TERMINAL_SATELLITE_RECEIVER_AUDIO : audio.h
  • AUDIO_TERMINAL_SPDIF_INTERFACE : audio.h
  • AUDIO_TERMINAL_SPEAKER : audio.h
  • AUDIO_TERMINAL_SPEAKERPHONE : audio.h
  • AUDIO_TERMINAL_SPEAKERPHONE_ECHOCANCEL : audio.h
  • AUDIO_TERMINAL_SPEAKERPHONE_ECHOSUPRESS : audio.h
  • AUDIO_TERMINAL_SYNTHESIZER : audio.h
  • AUDIO_TERMINAL_TELEPHONE : audio.h
  • AUDIO_TERMINAL_TELEPHONY_UNDEFINED : audio.h
  • AUDIO_TERMINAL_TV_TUNER_AUDIO : audio.h
  • AUDIO_TERMINAL_USB_STREAMING : audio.h
  • AUDIO_TERMINAL_USB_UNDEFINED : audio.h
  • AUDIO_TERMINAL_USB_VENDOR_SPECIFIC : audio.h
  • AUDIO_TERMINAL_VCR_AUDIO : audio.h
  • AUDIO_TERMINAL_VIDEO_DISC_AUDIO : audio.h
  • AUDIO_THRESHOLD_CONTROL : audio.h
  • AUDIO_TREBLE_CONTROL : audio.h
  • AUDIO_UNDEFINED_DESCRIPTOR_TYPE : audio.h
  • AUDIO_UNDEFINED_PROCESS : audio.h
  • AUDIO_UP_DOWN_MIX_PROCESS : audio.h
  • AUDIO_VOLUME_CONTROL : audio.h
  • AUTO_NEGOTIATION_ENA : emac.h
  • AUTO_RTS_CTS_USE : uart_fullmodem_test.c
  • AUTO_SLVADDR_DETECT : rs485_slave.c
Generated on Tue Jun 7 15:00:15 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Data Fields

  • All
  • Functions
  • Variables
  • Typedefs
  • Enumerations
  • Enumerator
  • Defines
  • _
  • a
  • b
  • c
  • d
  • e
  • f
  • g
  • h
  • i
  • k
  • l
  • m
  • n
  • o
  • p
  • q
  • r
  • s
  • t
  • u
  • v
  • w
  • x
  • y
Here is a list of all functions, variables, defines, enums, and typedefs with links to the files they belong to:

- b -

  • B : usb.h
  • B3VAL : usbdesc.h
  • B_S : usbaudio.h
  • BACKLIGHT_OFF : glcd_ll.h
  • BACKLIGHT_ON : glcd_ll.h
  • bAlternateSetting : usb.h
  • bCBLength : msc.h
  • bcdCDC : cdc.h
  • bcdDevice : usb.h
  • bcdHID : hid.h
  • bcdUSB : usb.h
  • bCharFormat : cdc.h
  • bConfigurationValue : usb.h
  • bCountryCode : hid.h
  • bDataBits : cdc.h
  • bDataInterface : cdc.h
  • bDescriptorSubtype : cdc.h
  • bDescriptorType : usb.h , cdc.h , usb.h , hid.h , usb.h
  • bDeviceClass : usb.h
  • bDeviceProtocol : usb.h
  • bDeviceSubClass : usb.h
  • bEndpointAddress : usb.h
  • bFunctionLength : cdc.h
  • bInterfaceClass : usb.h
  • bInterfaceNumber : usb.h
  • bInterfaceProtocol : usb.h
  • bInterfaceSubClass : usb.h
  • bInterval : usb.h
  • BITBAND_PERI : bitband.c
  • BITBAND_PERI_BASE : bitband.c
  • BITBAND_PERI_ClearBit : bitband.c
  • BITBAND_PERI_GetBit : bitband.c
  • BITBAND_PERI_REF : bitband.c
  • BITBAND_PERI_SetBit : bitband.c
  • BITBAND_SRAM : bitband.c
  • BITBAND_SRAM_BASE : bitband.c
  • BITBAND_SRAM_ClearBit : bitband.c
  • BITBAND_SRAM_GetBit : bitband.c
  • BITBAND_SRAM_REF : bitband.c
  • BITBAND_SRAM_SetBit : bitband.c
  • Black : GLCD.h
  • bLength : usb.h , hid.h , usb.h
  • BLINK_LED_PIN : emactest.c
  • BLOCKING : lpc_types.h
  • Blue : GLCD.h
  • bLUN : msc.h
  • BM : usb.h
  • bMasterInterface : cdc.h
  • bmAttributes : usb.h
  • bMaxPacketSize0 : usb.h
  • bMaxPower : usb.h
  • bmCapabilities : cdc.h
  • bmFlags : msc.h
  • Bmp_t : drv_glcd.h
  • bmRequestType : usb.h
  • bNumConfigurations : usb.h
  • bNumDescriptors : hid.h
  • bNumEndpoints : usb.h
  • bNumInterfaces : usb.h
  • BOD_IRQn : LPC17xx.h
  • Bool : lpc_types.h
  • BOOL_16 : lpc_types.h
  • BOOL_32 : lpc_types.h
  • BOOL_8 : lpc_types.h
  • BOOTP_BROADCAST : dhcpc.c
  • BOUNCE_RX : emactest.c
  • bParityType : cdc.h
  • BPP : GLCD_SPI_LPC1700.c
  • bRequest : usb.h
  • bReserved : usb.h
  • bSlaveInterfaces : cdc.h
  • bStatus : msc.h
  • bString : usb.h
  • BSTROFF : drv_glcd.h
  • BSTRON : drv_glcd.h
  • BSY : GLCD_SPI_LPC1700.c
  • BUF : uip-split.c , main.c , uip-fw.c , uip.c , uip_arp.c
  • BUF_FOUND : psock.c
  • BUF_FULL : psock.c
  • BUF_NOT_FOUND : psock.c
  • BUF_NOT_FULL : psock.c
  • buffer : i2c_monitor.c
  • Buffer_Init() : slave.c , ti_test.c , gpdma_sleep.c , ssp_dma.c , ssp_master.c , flash_2_ram.c , i2s_test_4_wire.c , microwire_test.c , spi_slave.c , ssp_slave.c , spi_loopback_test.c , i2s_dma_test.c , spi_master.c , i2s_irq_test.c , i2s_polling.c , i2s_mclk.c , master.c , i2c_master_slave_int_test.c , gpdma_r2r_test.c
  • BUFFER_SIZE : i2s_dma_test.c , spi_loopback_test.c , ti_test.c , master.c , i2s_irq_test.c , i2s_test_4_wire.c , i2c_master_slave_int_test.c , i2s_polling.c , ssp_master.c , ssp_slave.c , slave.c , i2c_monitor.c , spi_master.c , i2s_mclk.c , spi_slave.c , microwire_test.c
  • Buffer_Verify() : link_list.c , gpdma_r2r_test.c , ssp_master.c , microwire_test.c , ssp_slave.c , i2s_mclk.c , i2s_polling.c , i2s_test_4_wire.c , spi_loopback_test.c , spi_master.c , ti_test.c , i2s_irq_test.c , spi_slave.c , i2s_dma_test.c , flash_2_ram.c , ssp_dma.c , gpdma_sleep.c
  • BulkBuf : mscuser.c
  • BulkBufIn : cdcuser.c
  • BulkBufOut : cdcuser.c
  • BulkLen : mscuser.c
  • BulkStage : mscuser.c
  • BusFault_IRQn : LPC17xx.h
  • BYPP : GLCD_SPI_LPC1700.c
Generated on Tue Jun 7 15:00:15 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Data Fields

  • All
  • Functions
  • Variables
  • Typedefs
  • Enumerations
  • Enumerator
  • Defines
  • _
  • a
  • b
  • c
  • d
  • e
  • f
  • g
  • h
  • i
  • k
  • l
  • m
  • n
  • o
  • p
  • q
  • r
  • s
  • t
  • u
  • v
  • w
  • x
  • y
Here is a list of all functions, variables, defines, enums, and typedefs with links to the files they belong to:

- c -

  • c_entry() : adc_burst_test.c , adc_dma_test.c , adc_interrupt_test.c , can_test_aflut.c , dac_speaker.c , slave.c , microwire_test.c , sc16is750_int.c , i2s_dma_test.c , sc16is750_polling.c , ssp_slave.c , dac_wave_generate.c , i2s_irq_test.c , ti_test.c , 10ms_base.c , i2s_mclk.c , systick_stclk.c , timer_capture.c , can_test_bypass_mode.c , emactest.c , i2s_test_4_wire.c , freqmeasure.c , gen_diff_delay.c , i2s_two_kit.c , gen_diff_freqs.c , timer_int_match.c , main.c , i2s_polling.c , timer_poll_match.c , pwm_signal.c , lcdtest.c , uart_autobaud_test.c , uart_dma_test.c , adc_polling_test.c , can_test_two_kit.c , flash_2_ram.c , lcdtest.c , uart_hw_flow_control.c , uart_interrupt_test.c , mcpwm_simple.c , uart_irda_receive.c , uart_irda_transmit.c , gpdma_sleep.c , nvic_priority.c , uart_polling_test.c , rs485_master.c , vt_relocation.c , rs485_slave.c , uart_fullmodem_test.c , bitband.c , link_list.c , template.c , wdt_interrupt_test.c , wdt_reset_test.c , pwm_dual_edge.c , gpdma_r2r_test.c , pwm_match_int.c , pwm_single_edge.c , adc_hardware_trigger_test.c , can_ledcontrol.c , mpu_test.c , gpio_int.c , extint_sleep.c , nmi_powerdown.c , LedBlinky.c , rtc_deeppwd.c , wdt_deepsleep.c , privilege.c , master.c , qei_test_velo.c , rit_interrupt.c , i2c_master_slave_int_test.c , rtc_alarm_cntincr_int.c , rtc_calib.c , can_self_test.c , dac_dma.c , i2c_monitor.c , spi_loopback_test.c , spi_master.c , pca8581_test.c , spi_interrupt_test.c , spi_polling_test.c , dac_sinewave_test.c , i2c_interrupt_test.c , spi_sdcard.c , spi_slave.c , i2c_polling_test.c , ssp_dma.c , ssp_master.c
  • CalcChecksum() : tcpip.c , tcpip.h
  • CAN1_CTRL : lpc17xx_can.h
  • CAN1SLEEPCLR : lpc17xx_can.h
  • CAN2_CTRL : lpc17xx_can.h
  • CAN2SLEEPCLR : lpc17xx_can.h
  • CAN_AccBP : lpc17xx_can.h
  • CAN_AccOff : lpc17xx_can.h
  • CAN_AF_ENTRY_ERROR : lpc17xx_can.h
  • CAN_AFMODE_Type : lpc17xx_can.h
  • CAN_AFMR_AccBP : lpc17xx_can.h
  • CAN_AFMR_AccOff : lpc17xx_can.h
  • CAN_AFMR_eFCAN : lpc17xx_can.h
  • CAN_BTR_BRP : lpc17xx_can.h
  • CAN_BTR_SAM : lpc17xx_can.h
  • CAN_BTR_SJM : lpc17xx_can.h
  • CAN_BTR_TESG1 : lpc17xx_can.h
  • CAN_BTR_TESG2 : lpc17xx_can.h
  • CAN_ChangeAFTable() : can_test_aflut.c
  • CAN_CMR_AT : lpc17xx_can.h
  • CAN_CMR_CDO : lpc17xx_can.h
  • CAN_CMR_RRB : lpc17xx_can.h
  • CAN_CMR_SRR : lpc17xx_can.h
  • CAN_CMR_STB1 : lpc17xx_can.h
  • CAN_CMR_STB2 : lpc17xx_can.h
  • CAN_CMR_STB3 : lpc17xx_can.h
  • CAN_CMR_TR : lpc17xx_can.h
  • CAN_CONFLICT_ID_ERROR : lpc17xx_can.h
  • CAN_CR_STS_Type : lpc17xx_can.h
  • CAN_CTRL_STS_Type : lpc17xx_can.h
  • CAN_DeInit() : lpc17xx_can.h
  • CAN_eFCAN : lpc17xx_can.h
  • CAN_Eff_GRP_sa : lpc17xx_can.h
  • CAN_EFF_sa : lpc17xx_can.h
  • CAN_EndofTable : lpc17xx_can.h
  • CAN_ENTRY_NOT_EXIT_ERROR : lpc17xx_can.h
  • CAN_ERROR : lpc17xx_can.h
  • CAN_EWL_EWL : lpc17xx_can.h
  • CAN_FCANIC0_IntPnd : lpc17xx_can.h
  • CAN_FCANIC1_IntPnd : lpc17xx_can.h
  • CAN_FCANIE : lpc17xx_can.h
  • CAN_FRAME_Type : lpc17xx_can.h
  • CAN_FULL_OBJ_NOT_RCV : lpc17xx_can.h
  • CAN_FullCANIntGetStatus() : lpc17xx_can.h
  • CAN_FullCANPendGetStatus() : lpc17xx_can.h
  • CAN_GetCRStatus() : lpc17xx_can.h
  • CAN_GetCTRLStatus() : lpc17xx_can.h
  • CAN_GSR_BS : lpc17xx_can.h
  • CAN_GSR_DOS : lpc17xx_can.h
  • CAN_GSR_ES : lpc17xx_can.h
  • CAN_GSR_RBS : lpc17xx_can.h
  • CAN_GSR_RS : lpc17xx_can.h
  • CAN_GSR_RXERR : lpc17xx_can.h
  • CAN_GSR_TBS : lpc17xx_can.h
  • CAN_GSR_TCS : lpc17xx_can.h
  • CAN_GSR_TS : lpc17xx_can.h
  • CAN_GSR_TXERR : lpc17xx_can.h
  • CAN_ICR_ALCBIT : lpc17xx_can.h
  • CAN_ICR_ALI : lpc17xx_can.h
  • CAN_ICR_BEI : lpc17xx_can.h
  • CAN_ICR_DOI : lpc17xx_can.h
  • CAN_ICR_EI : lpc17xx_can.h
  • CAN_ICR_EPI : lpc17xx_can.h
  • CAN_ICR_ERRBIT : lpc17xx_can.h
  • CAN_ICR_ERRC : lpc17xx_can.h
  • CAN_ICR_ERRDIR : lpc17xx_can.h
  • CAN_ICR_IDI : lpc17xx_can.h
  • CAN_ICR_RI : lpc17xx_can.h
  • CAN_ICR_TI1 : lpc17xx_can.h
  • CAN_ICR_TI2 : lpc17xx_can.h
  • CAN_ICR_TI3 : lpc17xx_can.h
  • CAN_ICR_WUI : lpc17xx_can.h
  • CAN_ID_FORMAT_Type : lpc17xx_can.h
  • CAN_IER_ALIE : lpc17xx_can.h
  • CAN_IER_BEIE : lpc17xx_can.h
  • CAN_IER_DOIE : lpc17xx_can.h
  • CAN_IER_EIE : lpc17xx_can.h
  • CAN_IER_EPIE : lpc17xx_can.h
  • CAN_IER_IDIE : lpc17xx_can.h
  • CAN_IER_RIE : lpc17xx_can.h
  • CAN_IER_TIE1 : lpc17xx_can.h
  • CAN_IER_TIE2 : lpc17xx_can.h
  • CAN_IER_TIE3 : lpc17xx_can.h
  • CAN_IER_WUIE : lpc17xx_can.h
  • CAN_Init() : lpc17xx_can.h
  • CAN_InitAFMessage() : can_test_aflut.c , can_test_two_kit.c
  • CAN_InitMessage() : can_ledcontrol.c , can_self_test.c , can_test_aflut.c , can_test_bypass_mode.c , can_test_two_kit.c
  • CAN_INT_EN_Type : lpc17xx_can.h
  • CAN_IntGetStatus() : lpc17xx_can.h
  • CAN_IRQCmd() : lpc17xx_can.h
  • CAN_IRQHandler() : can_ledcontrol.c , can_self_test.c , can_test_aflut.c , can_test_bypass_mode.c , can_test_two_kit.c
  • CAN_IRQn : LPC17xx.h
  • CAN_LISTENONLY_MODE : lpc17xx_can.h
  • CAN_LoadExplicitEntry() : lpc17xx_can.h
  • CAN_LoadFullCANEntry() : lpc17xx_can.h
  • CAN_LoadGroupEntry() : lpc17xx_can.h
  • CAN_LUTerr : lpc17xx_can.h
  • CAN_LUTerrAd : lpc17xx_can.h
  • CAN_MOD_LOM : lpc17xx_can.h
  • CAN_MOD_RM : lpc17xx_can.h
  • CAN_MOD_RPM : lpc17xx_can.h
  • CAN_MOD_SM : lpc17xx_can.h
  • CAN_MOD_STM : lpc17xx_can.h
  • CAN_MOD_TM : lpc17xx_can.h
  • CAN_MOD_TPM : lpc17xx_can.h
  • CAN_MODE_Type : lpc17xx_can.h
  • CAN_ModeConfig() : lpc17xx_can.h
  • CAN_MSR_BS1 : lpc17xx_can.h
  • CAN_MSR_BS2 : lpc17xx_can.h
  • CAN_MSR_E1 : lpc17xx_can.h
  • CAN_MSR_E2 : lpc17xx_can.h
  • CAN_NO_RECEIVE_DATA : lpc17xx_can.h
  • CAN_Normal : lpc17xx_can.h
  • CAN_OBJECTS_FULL_ERROR : lpc17xx_can.h
  • CAN_OK : lpc17xx_can.h
  • CAN_OPERATING_MODE : lpc17xx_can.h
  • CAN_PinCfg() : can_test_aflut.c
  • CAN_RDA_DATA1 : lpc17xx_can.h
  • CAN_RDA_DATA2 : lpc17xx_can.h
  • CAN_RDA_DATA3 : lpc17xx_can.h
  • CAN_RDA_DATA4 : lpc17xx_can.h
  • CAN_RDB_DATA5 : lpc17xx_can.h
  • CAN_RDB_DATA6 : lpc17xx_can.h
  • CAN_RDB_DATA7 : lpc17xx_can.h
  • CAN_RDB_DATA8 : lpc17xx_can.h
  • CAN_RECEIVE : can_test_two_kit.c
  • CAN_ReceiveMsg() : lpc17xx_can.h
  • CAN_RemoveEntry() : lpc17xx_can.h
  • CAN_RESET_MODE : lpc17xx_can.h
  • CAN_RFS_BP : lpc17xx_can.h
  • CAN_RFS_DLC : lpc17xx_can.h
  • CAN_RFS_FF : lpc17xx_can.h
  • CAN_RFS_ID_INDEX : lpc17xx_can.h
  • CAN_RFS_RTR : lpc17xx_can.h
  • CAN_RID_ID_11 : lpc17xx_can.h
  • CAN_RID_ID_29 : lpc17xx_can.h
  • CAN_RSR_DOS1 : lpc17xx_can.h
  • CAN_RSR_DOS2 : lpc17xx_can.h
  • CAN_RSR_RB1 : lpc17xx_can.h
  • CAN_RSR_RB2 : lpc17xx_can.h
  • CAN_RSR_RS1 : lpc17xx_can.h
  • CAN_RSR_RS2 : lpc17xx_can.h
  • CAN_RX_MSG_CNT : can_test_aflut.c
  • CAN_RXPOLARITY_MODE : lpc17xx_can.h
  • CAN_SELFTEST_MODE : lpc17xx_can.h
  • CAN_SendMsg() : lpc17xx_can.h
  • CAN_SetAFMode() : lpc17xx_can.h
  • CAN_SetCommand() : lpc17xx_can.h
  • CAN_SetupAFLUT() : lpc17xx_can.h
  • CAN_SetupAFTable() : can_test_aflut.c , can_test_two_kit.c
  • CAN_SFF_GRP_sa : lpc17xx_can.h
  • CAN_SLEEP_MODE : lpc17xx_can.h
  • CAN_SR_BS : lpc17xx_can.h
  • CAN_SR_DOS : lpc17xx_can.h
  • CAN_SR_ES : lpc17xx_can.h
  • CAN_SR_RBS : lpc17xx_can.h
  • CAN_SR_RS : lpc17xx_can.h
  • CAN_SR_TBS1 : lpc17xx_can.h
  • CAN_SR_TBS2 : lpc17xx_can.h
  • CAN_SR_TBS3 : lpc17xx_can.h
  • CAN_SR_TCS1 : lpc17xx_can.h
  • CAN_SR_TCS2 : lpc17xx_can.h
  • CAN_SR_TCS3 : lpc17xx_can.h
  • CAN_SR_TS1 : lpc17xx_can.h
  • CAN_SR_TS2 : lpc17xx_can.h
  • CAN_SR_TS3 : lpc17xx_can.h
  • CAN_STT_sa : lpc17xx_can.h
  • CAN_TDA_DATA1 : lpc17xx_can.h
  • CAN_TDA_DATA2 : lpc17xx_can.h
  • CAN_TDA_DATA3 : lpc17xx_can.h
  • CAN_TDA_DATA4 : lpc17xx_can.h
  • CAN_TDA_DATA5 : lpc17xx_can.h
  • CAN_TDA_DATA6 : lpc17xx_can.h
  • CAN_TDA_DATA7 : lpc17xx_can.h
  • CAN_TDA_DATA8 : lpc17xx_can.h
  • CAN_TEST_MODE : lpc17xx_can.h
  • CAN_TFI_DLC : lpc17xx_can.h
  • CAN_TFI_FF : lpc17xx_can.h
  • CAN_TFI_PRIO : lpc17xx_can.h
  • CAN_TFI_RTR : lpc17xx_can.h
  • CAN_TID_ID11 : lpc17xx_can.h
  • CAN_TID_ID29 : lpc17xx_can.h
  • CAN_TRANSMIT : can_test_two_kit.c
  • CAN_TSR_TBS1 : lpc17xx_can.h
  • CAN_TSR_TBS2 : lpc17xx_can.h
  • CAN_TSR_TCS1 : lpc17xx_can.h
  • CAN_TSR_TCS2 : lpc17xx_can.h
  • CAN_TSR_TS1 : lpc17xx_can.h
  • CAN_TSR_TS2 : lpc17xx_can.h
  • CAN_TX_MSG_CNT : can_test_aflut.c
  • CAN_TXPRIORITY_MODE : lpc17xx_can.h
  • CAN_VerifyMessage() : can_test_two_kit.c
  • CAN_WAKEFLAGES_CAN1WAKE : lpc17xx_can.h
  • CAN_WAKEFLAGES_CAN2WAKE : lpc17xx_can.h
  • CANActivity_IRQn : LPC17xx.h
  • CANAF_ext_cnt : lpc17xx_can.c
  • CANAF_FullCAN_cnt : lpc17xx_can.c
  • CANAF_gext_cnt : lpc17xx_can.c
  • CANAF_gstd_cnt : lpc17xx_can.c
  • CANAF_std_cnt : lpc17xx_can.c
  • CANCR_MS : lpc17xx_can.h
  • CANCR_RX_STS : lpc17xx_can.h
  • CANCR_TX_STS : lpc17xx_can.h
  • CANCTRL_ERR_WRN : lpc17xx_can.h
  • CANCTRL_GLOBAL_STS : lpc17xx_can.h
  • CANCTRL_INT_CAP : lpc17xx_can.h
  • CANCTRL_STS : lpc17xx_can.h
  • CANErrCount : can_test_aflut.c , can_test_two_kit.c
  • CANINT_ALIE : lpc17xx_can.h
  • CANINT_BEIE : lpc17xx_can.h
  • CANINT_DOIE : lpc17xx_can.h
  • CANINT_EIE : lpc17xx_can.h
  • CANINT_EPIE : lpc17xx_can.h
  • CANINT_FCE : lpc17xx_can.h
  • CANINT_IDIE : lpc17xx_can.h
  • CANINT_RIE : lpc17xx_can.h
  • CANINT_TIE1 : lpc17xx_can.h
  • CANINT_TIE2 : lpc17xx_can.h
  • CANINT_TIE3 : lpc17xx_can.h
  • CANINT_WUIE : lpc17xx_can.h
  • CANRxCount : can_self_test.c , can_test_aflut.c , can_test_bypass_mode.c , can_test_two_kit.c
  • CANTxCount : can_self_test.c , can_test_aflut.c , can_test_bypass_mode.c , can_test_two_kit.c
  • CAP_MODE : qei_test_velo.c
  • CAP_PERIOD : qei_test_velo.c
  • capture : freqmeasure.c
  • CAPTURE_MODE_TEST : mcpwm_simple.c
  • CASET : drv_glcd.h
  • CB : msc.h
  • CBW : mscuser.c
  • CCEMTY_INT : usbreg.h
  • CCLK : memory.h
  • CCLKCFG_Val : system_LPC17xx.c
  • CDC_ABSTRACT_CONTROL_MANAGEMENT : cdc.h
  • CDC_ABSTRACT_CONTROL_MANAGEMENT_DESCRIPTOR : cdc.h
  • CDC_ABSTRACT_CONTROL_MODEL : cdc.h
  • CDC_ABSTRACT_STATE : cdc.h
  • CDC_ACTIVATE_CARRIER : cdc.h
  • CDC_ATM_NETWORKING : cdc.h
  • CDC_ATM_NETWORKING_CONTROL_MODEL : cdc.h
  • CDC_AUX_JACK_HOOK_STATE : cdc.h
  • CDC_BUF_COUNT : cdcuser.c
  • CDC_BUF_EMPTY : cdcuser.c
  • CDC_BUF_FULL : cdcuser.c
  • CDC_BUF_MASK : cdcuser.c
  • CDC_BUF_RD : cdcuser.c
  • CDC_BUF_RESET : cdcuser.c
  • CDC_BUF_SIZE : cdcuser.c
  • CDC_BUF_T : cdcuser.c
  • CDC_BUF_WR : cdcuser.c
  • CDC_BulkIn() : cdcuser.c , cdcuser.h
  • CDC_BulkOut() : cdcuser.c , cdcuser.h
  • CDC_CALL_MANAGEMENT : cdc.h
  • CDC_CALL_MANAGEMENT_DESCRIPTOR : cdc.h
  • CDC_CALL_STATE_CHANGE : cdc.h
  • CDC_CAPI_CONTROL_MANAGEMENT : cdc.h
  • CDC_CAPI_CONTROL_MODEL : cdc.h
  • CDC_CEP_IN : cdcuser.h
  • CDC_CLEAR_COMM_FEATURE : cdc.h
  • CDC_CLEAR_UNIT_PARAMETER : cdc.h
  • CDC_ClearCommFeature() : cdcuser.c , cdcuser.h
  • CDC_COMMUNICATION_INTERFACE_CLASS : cdc.h
  • CDC_CONNECTION_SPEED_CHANGE : cdc.h
  • CDC_COUNTRY_SELECTION : cdc.h
  • CDC_COUNTRY_SETTING : cdc.h
  • CDC_CS_ENDPOINT : cdc.h
  • CDC_CS_INTERFACE : cdc.h
  • CDC_DATA_INTERFACE_CLASS : cdc.h
  • CDC_DATA_MULTPLEXED_STATE : cdc.h
  • CDC_DEP_IN : cdcuser.h
  • CDC_DEP_OUT : cdcuser.h
  • CDC_DepInEmpty : cdcuser.c , cdcuser.h
  • CDC_DIAL_DIGITS : cdc.h
  • CDC_DIRECT_LINE_CONTROL_MODEL : cdc.h
  • CDC_DIRECT_LINE_MANAGEMENT : cdc.h
  • CDC_DTE_PRESENT : cdc.h
  • CDC_ETHERNET_NETWORKING : cdc.h
  • CDC_ETHERNET_NETWORKING_CONTROL_MODEL : cdc.h
  • CDC_EXTENSION_UNIT : cdc.h
  • CDC_GET_ATM_DEVICE_STATISTICS : cdc.h
  • CDC_GET_ATM_VC_STATISTICS : cdc.h
  • CDC_GET_COMM_FEATURE : cdc.h
  • CDC_GET_ENCAPSULATED_RESPONSE : cdc.h
  • CDC_GET_ETHERNET_PMP_FILTER : cdc.h
  • CDC_GET_ETHERNET_STATISTIC : cdc.h
  • CDC_GET_LINE_CODING : cdc.h
  • CDC_GET_LINE_PARMS : cdc.h
  • CDC_GET_OPERATION_PARMS : cdc.h
  • CDC_GET_PROFILE : cdc.h
  • CDC_GET_RINGER_PARMS : cdc.h
  • CDC_GET_UNIT_PARAMETER : cdc.h
  • CDC_GetCommFeature() : cdcuser.c , cdcuser.h
  • CDC_GetEncapsulatedResponse() : cdcuser.c , cdcuser.h
  • CDC_GetLineCoding() : cdcuser.c , cdcuser.h
  • CDC_GetSerialState() : cdcuser.c , cdcuser.h
  • CDC_HEADER : cdc.h
  • CDC_HEADER_DESCRIPTOR : cdc.h
  • CDC_IDLE_SETTING : cdc.h
  • CDC_Init() : cdcuser.c , cdcuser.h
  • CDC_LINE_CODING : cdc.h
  • CDC_LINE_STATE_CHANGE : cdc.h
  • CDC_LineCoding : cdcuser.c
  • CDC_MULTI_CHANNEL_CONTROL_MODEL : cdc.h
  • CDC_MULTI_CHANNEL_MANAGEMENT : cdc.h
  • CDC_NETWORK_CHANNEL : cdc.h
  • CDC_NOTIFICATION_HEADER : cdc.h
  • CDC_NOTIFICATION_NETWORK_CONNECTION : cdc.h
  • CDC_NOTIFICATION_SERIAL_STATE : cdc.h
  • CDC_NotificationIn() : cdcuser.c , cdcuser.h
  • CDC_OutBuf : cdcuser.c
  • CDC_OutBufAvailChar() : cdcuser.c , cdcuser.h
  • CDC_PROTOCOL_CAPI : cdc.h
  • CDC_PROTOCOL_COMMON_AT_COMMANDS : cdc.h
  • CDC_PROTOCOL_DESCRIBED_IN_PUFD : cdc.h
  • CDC_PROTOCOL_EURO_ISDN : cdc.h
  • CDC_PROTOCOL_HDLC : cdc.h
  • CDC_PROTOCOL_HOST_BASED_DRIVER : cdc.h
  • CDC_PROTOCOL_ISDN_BRI : cdc.h
  • CDC_PROTOCOL_Q921_DATA_LINK : cdc.h
  • CDC_PROTOCOL_Q921_MANAGEMENT : cdc.h
  • CDC_PROTOCOL_Q921_MULTIPLEXOR : cdc.h
  • CDC_PROTOCOL_TRANSPARENT : cdc.h
  • CDC_PROTOCOL_UNIT : cdc.h
  • CDC_PROTOCOL_V24_RATE_ADAPTATION : cdc.h
  • CDC_PROTOCOL_V42 : cdc.h
  • CDC_PULSE_SETUP : cdc.h
  • CDC_RdOutBuf() : cdcuser.c , cdcuser.h
  • CDC_REPORTING_CAPABILITIES : cdc.h
  • CDC_RESPONSE_AVAILABLE : cdc.h
  • CDC_RING_AUX_JACK : cdc.h
  • CDC_RING_DETECT : cdc.h
  • CDC_SEND_BREAK : cdc.h
  • CDC_SEND_ENCAPSULATED_COMMAND : cdc.h
  • CDC_SEND_PULSE : cdc.h
  • CDC_SendBreak() : cdcuser.c , cdcuser.h
  • CDC_SendEncapsulatedCommand() : cdcuser.c , cdcuser.h
  • CDC_SERIAL_STATE_BREAK : cdc.h
  • CDC_SERIAL_STATE_FRAMING : cdc.h
  • CDC_SERIAL_STATE_OVERRUN : cdc.h
  • CDC_SERIAL_STATE_PARITY : cdc.h
  • CDC_SERIAL_STATE_RING : cdc.h
  • CDC_SERIAL_STATE_RX_CARRIER : cdc.h
  • CDC_SERIAL_STATE_TX_CARRIER : cdc.h
  • CDC_SerialState : cdcuser.c
  • CDC_SET_ATM_DATA_FORMAT : cdc.h
  • CDC_SET_ATM_DEFAULT_VC : cdc.h
  • CDC_SET_AUX_LINE_STATE : cdc.h
  • CDC_SET_COMM_FEATURE : cdc.h
  • CDC_SET_CONTROL_LINE_STATE : cdc.h
  • CDC_SET_ETHERNET_MULTICAST_FILTERS : cdc.h
  • CDC_SET_ETHERNET_PACKET_FILTER : cdc.h
  • CDC_SET_ETHERNET_PMP_FILTER : cdc.h
  • CDC_SET_HOOK_STATE : cdc.h
  • CDC_SET_LINE_CODING : cdc.h
  • CDC_SET_LINE_PARMS : cdc.h
  • CDC_SET_OPERATION_PARMS : cdc.h
  • CDC_SET_PULSE_TIME : cdc.h
  • CDC_SET_RINGER_PARMS : cdc.h
  • CDC_SET_UNIT_PARAMETER : cdc.h
  • CDC_SetCommFeature() : cdcuser.c , cdcuser.h
  • CDC_SetControlLineState() : cdcuser.c , cdcuser.h
  • CDC_SetLineCoding() : cdcuser.c , cdcuser.h
  • CDC_TELEPHONE_CONTROL_MODEL : cdc.h
  • CDC_TELEPHONE_OPERATIONAL_MODES : cdc.h
  • CDC_TELEPHONE_RINGER : cdc.h
  • CDC_UNION : cdc.h
  • CDC_UNION_1SLAVE_DESCRIPTOR : cdc.h
  • CDC_UNION_DESCRIPTOR : cdc.h
  • CDC_USB_TERMINAL : cdc.h
  • CDC_V1_10 : cdc.h
  • CDC_WrOutBuf() : cdcuser.c , cdcuser.h
  • CDFULL_INT : usbreg.h
  • Channel0_Err : adc_dma_test.c , dac_dma.c , flash_2_ram.c , gpdma_sleep.c , link_list.c , gpdma_r2r_test.c , i2s_dma_test.c , ssp_dma.c , uart_dma_test.c
  • Channel0_TC : dac_dma.c , flash_2_ram.c , gpdma_sleep.c , link_list.c , gpdma_r2r_test.c , i2s_dma_test.c , ssp_dma.c , uart_dma_test.c , adc_dma_test.c
  • Channel1_Err : i2s_dma_test.c , ssp_dma.c , uart_dma_test.c
  • Channel1_TC : i2s_dma_test.c , ssp_dma.c , uart_dma_test.c
  • CHAR : lpc_types.h
  • CHAR_H : Font_24x16.h
  • CHAR_W : Font_24x16.h
  • check_failed() : spi_interrupt_test.c , spi_sdcard.c , ssp_dma.c , lpc17xx_libcfg_default.h , adc_burst_test.c , rtc_alarm_cntincr_int.c , lpc17xx_libcfg.h , adc_dma_test.c , lpc17xx_libcfg.h , qei_test_velo.c , adc_hardware_trigger_test.c , lpc17xx_libcfg.h , adc_interrupt_test.c , rtc_deeppwd.c , lpc17xx_libcfg.h , adc_polling_test.c , lpc17xx_libcfg.h , can_ledcontrol.c , lpc17xx_libcfg.h , can_self_test.c , lpc17xx_libcfg.h , pwm_match_int.c , can_test_aflut.c , lpc17xx_libcfg.h , can_test_bypass_mode.c , template.c , lpc17xx_libcfg.h , can_test_two_kit.c , lpc17xx_libcfg.h , nvic_priority.c , bitband.c , lpc17xx_libcfg.h , mpu_test.c , lpc17xx_libcfg.h , privilege.c , dac_dma.c , lpc17xx_libcfg.h , dac_sinewave_test.c , lpc17xx_libcfg.h , dac_speaker.c , lpc17xx_libcfg.h , dac_wave_generate.c , lpc17xx_libcfg.h , easyweb.c , lpc17xx_libcfg.h , emactest.c , lpc17xx_libcfg.h , main.c , lpc17xx_libcfg.h , flash_2_ram.c , lpc17xx_libcfg.h , gpdma_sleep.c , lpc17xx_libcfg.h , link_list.c , lpc17xx_libcfg.h , gpdma_r2r_test.c , lpc17xx_libcfg.h , gpio_int.c , lpc17xx_libcfg.h , LedBlinky.c , lpc17xx_libcfg.h , master.c , i2c_master_slave_int_test.c , lpc17xx_libcfg.h , i2c_monitor.c , lpc17xx_libcfg.h , pca8581_test.c , i2c_interrupt_test.c , i2c_polling_test.c , lpc17xx_libcfg.h , slave.c , i2s_dma_test.c , lpc17xx_libcfg.h , i2s_irq_test.c , i2s_mclk.c , lpc17xx_libcfg.h , i2s_test_4_wire.c , i2s_two_kit.c , lpc17xx_libcfg.h , i2s_polling.c , lcdtest.c , lpc17xx_libcfg.h , lcdtest.c , lpc17xx_libcfg.h , mcpwm_simple.c , lpc17xx_libcfg.h , vt_relocation.c , lpc17xx_libcfg.h , pwm_dual_edge.c , lpc17xx_libcfg.h , pwm_single_edge.c , extint_sleep.c , lpc17xx_libcfg.h , nmi_powerdown.c , lpc17xx_libcfg.h , wdt_deepsleep.c , lpc17xx_libcfg.h , rit_interrupt.c , lpc17xx_libcfg.h , rtc_calib.c , lpc17xx_libcfg.h , spi_loopback_test.c , lpc17xx_libcfg.h , spi_master.c , lpc17xx_libcfg.h , spi_polling_test.c , lpc17xx_libcfg.h , spi_slave.c , lpc17xx_libcfg.h , ssp_master.c , lpc17xx_libcfg.h , microwire_test.c , lpc17xx_libcfg.h , sc16is750_int.c , lpc17xx_libcfg.h , ssp_slave.c , lpc17xx_libcfg.h , 10ms_base.c , lpc17xx_libcfg.h , timer_capture.c , freqmeasure.c , lpc17xx_libcfg.h , gen_diff_delay.c , lpc17xx_libcfg.h , gen_diff_freqs.c , lpc17xx_libcfg.h , timer_int_match.c , lpc17xx_libcfg.h , pwm_signal.c , lpc17xx_libcfg.h , uart_dma_test.c , lpc17xx_libcfg.h , uart_hw_flow_control.c , lpc17xx_libcfg.h , uart_interrupt_test.c , lpc17xx_libcfg.h , uart_irda_transmit.c , lpc17xx_libcfg.h , rs485_master.c , lpc17xx_libcfg.h , uart_fullmodem_test.c , lpc17xx_libcfg.h , demo.c , lpc17xx_libcfg.h , wdt_interrupt_test.c , lpc17xx_libcfg.h , sc16is750_polling.c , wdt_reset_test.c , memory.c , rs485_slave.c , uart_polling_test.c , uart_irda_receive.c , uart_autobaud_test.c , timer_poll_match.c , lpc17xx_libcfg.h , systick_stclk.c , ti_test.c
  • Check_Message() : can_self_test.c
  • CHECK_PARAM : lpc17xx_libcfg.h , lpc17xx_libcfg_default.h , lpc17xx_libcfg.h
  • CHECK_RANGE : system_LPC17xx.c
  • CHECK_RSVD : system_LPC17xx.c
  • CheckFrameReceived() : EMAC.h , EMAC.c
  • CLKEXT : drv_glcd.h
  • CLKINT : drv_glcd.h
  • CLKOUTCFG_Val : system_LPC17xx.c
  • CLKPWR_CCLKCFG_BITMASK : lpc17xx_clkpwr.h
  • CLKPWR_CLKOUTCFG_BITMASK : lpc17xx_clkpwr.h
  • CLKPWR_CLKOUTCFG_CLKOUT_ACT : lpc17xx_clkpwr.h
  • CLKPWR_CLKOUTCFG_CLKOUT_EN : lpc17xx_clkpwr.h
  • CLKPWR_CLKOUTCFG_CLKOUTDIV : lpc17xx_clkpwr.h
  • CLKPWR_CLKOUTCFG_CLKOUTSEL_CPU : lpc17xx_clkpwr.h
  • CLKPWR_CLKOUTCFG_CLKOUTSEL_MAINOSC : lpc17xx_clkpwr.h
  • CLKPWR_CLKOUTCFG_CLKOUTSEL_RC : lpc17xx_clkpwr.h
  • CLKPWR_CLKOUTCFG_CLKOUTSEL_RTC : lpc17xx_clkpwr.h
  • CLKPWR_CLKOUTCFG_CLKOUTSEL_USB : lpc17xx_clkpwr.h
  • CLKPWR_CLKSRCSEL_BITMASK : lpc17xx_clkpwr.h
  • CLKPWR_CLKSRCSEL_CLKSRC_IRC : lpc17xx_clkpwr.h
  • CLKPWR_CLKSRCSEL_CLKSRC_MAINOSC : lpc17xx_clkpwr.h
  • CLKPWR_CLKSRCSEL_CLKSRC_RTC : lpc17xx_clkpwr.h
  • CLKPWR_ConfigPPWR() : lpc17xx_clkpwr.h
  • CLKPWR_DeepPowerDown() : lpc17xx_clkpwr.h
  • CLKPWR_DeepSleep() : lpc17xx_clkpwr.h
  • CLKPWR_GetPCLK() : lpc17xx_clkpwr.h
  • CLKPWR_GetPCLKSEL() : lpc17xx_clkpwr.h
  • CLKPWR_IRCTRIM_BITMASK : lpc17xx_clkpwr.h
  • CLKPWR_PCLKSEL0_BITMASK : lpc17xx_clkpwr.h
  • CLKPWR_PCLKSEL1_BITMASK : lpc17xx_clkpwr.h
  • CLKPWR_PCLKSEL_ACF : lpc17xx_clkpwr.h
  • CLKPWR_PCLKSEL_ADC : lpc17xx_clkpwr.h
  • CLKPWR_PCLKSEL_BITMASK : lpc17xx_clkpwr.h
  • CLKPWR_PCLKSEL_CAN1 : lpc17xx_clkpwr.h
  • CLKPWR_PCLKSEL_CAN2 : lpc17xx_clkpwr.h
  • CLKPWR_PCLKSEL_CCLK_DIV_1 : lpc17xx_clkpwr.h
  • CLKPWR_PCLKSEL_CCLK_DIV_2 : lpc17xx_clkpwr.h
  • CLKPWR_PCLKSEL_CCLK_DIV_4 : lpc17xx_clkpwr.h
  • CLKPWR_PCLKSEL_DAC : lpc17xx_clkpwr.h
  • CLKPWR_PCLKSEL_GET : lpc17xx_clkpwr.h
  • CLKPWR_PCLKSEL_I2C0 : lpc17xx_clkpwr.h
  • CLKPWR_PCLKSEL_I2C1 : lpc17xx_clkpwr.h
  • CLKPWR_PCLKSEL_I2C2 : lpc17xx_clkpwr.h
  • CLKPWR_PCLKSEL_I2S : lpc17xx_clkpwr.h
  • CLKPWR_PCLKSEL_MC : lpc17xx_clkpwr.h
  • CLKPWR_PCLKSEL_PCB : lpc17xx_clkpwr.h
  • CLKPWR_PCLKSEL_PWM1 : lpc17xx_clkpwr.h
  • CLKPWR_PCLKSEL_QEI : lpc17xx_clkpwr.h
  • CLKPWR_PCLKSEL_RIT : lpc17xx_clkpwr.h
  • CLKPWR_PCLKSEL_SET : lpc17xx_clkpwr.h
  • CLKPWR_PCLKSEL_SPI : lpc17xx_clkpwr.h
  • CLKPWR_PCLKSEL_SSP0 : lpc17xx_clkpwr.h
  • CLKPWR_PCLKSEL_SSP1 : lpc17xx_clkpwr.h
  • CLKPWR_PCLKSEL_SYSCON : lpc17xx_clkpwr.h
  • CLKPWR_PCLKSEL_TIMER0 : lpc17xx_clkpwr.h
  • CLKPWR_PCLKSEL_TIMER1 : lpc17xx_clkpwr.h
  • CLKPWR_PCLKSEL_TIMER2 : lpc17xx_clkpwr.h
  • CLKPWR_PCLKSEL_TIMER3 : lpc17xx_clkpwr.h
  • CLKPWR_PCLKSEL_UART0 : lpc17xx_clkpwr.h
  • CLKPWR_PCLKSEL_UART1 : lpc17xx_clkpwr.h
  • CLKPWR_PCLKSEL_UART2 : lpc17xx_clkpwr.h
  • CLKPWR_PCLKSEL_UART3 : lpc17xx_clkpwr.h
  • CLKPWR_PCLKSEL_WDT : lpc17xx_clkpwr.h
  • CLKPWR_PCON_BODPDM : lpc17xx_clkpwr.h
  • CLKPWR_PCON_BOGD : lpc17xx_clkpwr.h
  • CLKPWR_PCON_BORD : lpc17xx_clkpwr.h
  • CLKPWR_PCON_DPDFLAG : lpc17xx_clkpwr.h
  • CLKPWR_PCON_DSFLAG : lpc17xx_clkpwr.h
  • CLKPWR_PCON_PDFLAG : lpc17xx_clkpwr.h
  • CLKPWR_PCON_PM0 : lpc17xx_clkpwr.h
  • CLKPWR_PCON_PM1 : lpc17xx_clkpwr.h
  • CLKPWR_PCON_SMFLAG : lpc17xx_clkpwr.h
  • CLKPWR_PCONP_BITMASK : lpc17xx_clkpwr.h
  • CLKPWR_PCONP_PCAD : lpc17xx_clkpwr.h
  • CLKPWR_PCONP_PCAN1 : lpc17xx_clkpwr.h
  • CLKPWR_PCONP_PCAN2 : lpc17xx_clkpwr.h
  • CLKPWR_PCONP_PCENET : lpc17xx_clkpwr.h
  • CLKPWR_PCONP_PCGPDMA : lpc17xx_clkpwr.h
  • CLKPWR_PCONP_PCGPIO : lpc17xx_clkpwr.h
  • CLKPWR_PCONP_PCI2C0 : lpc17xx_clkpwr.h
  • CLKPWR_PCONP_PCI2C1 : lpc17xx_clkpwr.h
  • CLKPWR_PCONP_PCI2C2 : lpc17xx_clkpwr.h
  • CLKPWR_PCONP_PCI2S : lpc17xx_clkpwr.h
  • CLKPWR_PCONP_PCMC : lpc17xx_clkpwr.h
  • CLKPWR_PCONP_PCPWM1 : lpc17xx_clkpwr.h
  • CLKPWR_PCONP_PCQEI : lpc17xx_clkpwr.h
  • CLKPWR_PCONP_PCRIT : lpc17xx_clkpwr.h
  • CLKPWR_PCONP_PCRTC : lpc17xx_clkpwr.h
  • CLKPWR_PCONP_PCSPI : lpc17xx_clkpwr.h
  • CLKPWR_PCONP_PCSSP0 : lpc17xx_clkpwr.h
  • CLKPWR_PCONP_PCSSP1 : lpc17xx_clkpwr.h
  • CLKPWR_PCONP_PCTIM0 : lpc17xx_clkpwr.h
  • CLKPWR_PCONP_PCTIM1 : lpc17xx_clkpwr.h
  • CLKPWR_PCONP_PCTIM2 : lpc17xx_clkpwr.h
  • CLKPWR_PCONP_PCTIM3 : lpc17xx_clkpwr.h
  • CLKPWR_PCONP_PCUART0 : lpc17xx_clkpwr.h
  • CLKPWR_PCONP_PCUART1 : lpc17xx_clkpwr.h
  • CLKPWR_PCONP_PCUART2 : lpc17xx_clkpwr.h
  • CLKPWR_PCONP_PCUART3 : lpc17xx_clkpwr.h
  • CLKPWR_PCONP_PCUSB : lpc17xx_clkpwr.h
  • CLKPWR_PLL0CFG_BITMASK : lpc17xx_clkpwr.h
  • CLKPWR_PLL0CFG_MSEL : lpc17xx_clkpwr.h
  • CLKPWR_PLL0CFG_NSEL : lpc17xx_clkpwr.h
  • CLKPWR_PLL0CON_BITMASK : lpc17xx_clkpwr.h
  • CLKPWR_PLL0CON_CONNECT : lpc17xx_clkpwr.h
  • CLKPWR_PLL0CON_ENABLE : lpc17xx_clkpwr.h
  • CLKPWR_PLL0FEED_BITMASK : lpc17xx_clkpwr.h
  • CLKPWR_PLL0STAT_MSEL : lpc17xx_clkpwr.h
  • CLKPWR_PLL0STAT_NSEL : lpc17xx_clkpwr.h
  • CLKPWR_PLL0STAT_PLLC : lpc17xx_clkpwr.h
  • CLKPWR_PLL0STAT_PLLE : lpc17xx_clkpwr.h
  • CLKPWR_PLL0STAT_PLOCK : lpc17xx_clkpwr.h
  • CLKPWR_PLL1CFG_BITMASK : lpc17xx_clkpwr.h
  • CLKPWR_PLL1CFG_MSEL : lpc17xx_clkpwr.h
  • CLKPWR_PLL1CFG_PSEL : lpc17xx_clkpwr.h
  • CLKPWR_PLL1CON_BITMASK : lpc17xx_clkpwr.h
  • CLKPWR_PLL1CON_CONNECT : lpc17xx_clkpwr.h
  • CLKPWR_PLL1CON_ENABLE : lpc17xx_clkpwr.h
  • CLKPWR_PLL1FEED_BITMASK : lpc17xx_clkpwr.h
  • CLKPWR_PLL1STAT_MSEL : lpc17xx_clkpwr.h
  • CLKPWR_PLL1STAT_PLLC : lpc17xx_clkpwr.h
  • CLKPWR_PLL1STAT_PLLE : lpc17xx_clkpwr.h
  • CLKPWR_PLL1STAT_PLOCK : lpc17xx_clkpwr.h
  • CLKPWR_PLL1STAT_PSEL : lpc17xx_clkpwr.h
  • CLKPWR_PowerDown() : lpc17xx_clkpwr.h
  • CLKPWR_SetPCLKDiv() : lpc17xx_clkpwr.h
  • CLKPWR_Sleep() : lpc17xx_clkpwr.h
  • CLKPWR_USBCLKCFG_BITMASK : lpc17xx_clkpwr.h
  • CLKSOURCE_CPU : lpc17xx_systick.h
  • CLKSOURCE_EXT : lpc17xx_systick.h
  • CLKSRCSEL_Val : system_LPC17xx.c
  • CLOCK_CONF_SECOND : clock-arch.h
  • clock_init() : clock-arch.c , clock.h
  • CLOCK_SECOND : clock.h
  • CLOCK_SETUP : system_LPC17xx.c
  • clock_time() : clock.h , clock-arch.c
  • clock_time_t : clock-arch.h
  • CLOSE_WAIT : tcpip.h
  • CLOSED : tcpip.h
  • CLOSING : tcpip.h
  • CLR_BUF_PO : usbreg.h
  • CMD0_GO_IDLE_STATE : spi_sdcard.c
  • CMD10_SEND_CID : spi_sdcard.c
  • CMD12_STOP_TRANSMISSION : spi_sdcard.c
  • CMD13_SEND_STATUS : spi_sdcard.c
  • CMD16_SET_BLOCKLEN : spi_sdcard.c
  • CMD17_READ_SINGLE_BLOCK : spi_sdcard.c
  • CMD18_READ_MULTIPLE_BLOCK : spi_sdcard.c
  • CMD1_SEND_OPCOND : spi_sdcard.c
  • CMD24_WRITE_BLOCK : spi_sdcard.c
  • CMD25_WRITE_MULTIPLE_BLOCK : spi_sdcard.c
  • CMD27_PROGRAM_CSD : spi_sdcard.c
  • CMD28_SET_WRITE_PROT : spi_sdcard.c
  • CMD29_CLR_WRITE_PROT : spi_sdcard.c
  • CMD30_SEND_WRITE_PROT : spi_sdcard.c
  • CMD32_ERASE_WR_BLK_START_ADDR : spi_sdcard.c
  • CMD33_ERASE_WR_BLK_END_ADDR : spi_sdcard.c
  • CMD38_ERASE : spi_sdcard.c
  • CMD55_APP_CMD : spi_sdcard.c
  • CMD56_GEN_CMD : spi_sdcard.c
  • CMD58_READ_OCR : spi_sdcard.c
  • CMD59_CRC_ON_OFF : spi_sdcard.c
  • CMD9_SEND_CSD : spi_sdcard.c
  • CMD_CFG_DEV : usbreg.h
  • CMD_CLR_BUF : usbreg.h
  • CMD_GET_DEV_STAT : usbreg.h
  • CMD_GET_ERR_CODE : usbreg.h
  • CMD_RD_ERR_STAT : usbreg.h
  • CMD_RD_FRAME : usbreg.h
  • CMD_RD_TEST : usbreg.h
  • CMD_SEL_EP : usbreg.h
  • CMD_SEL_EP_CLRI : usbreg.h
  • CMD_SET_ADDR : usbreg.h
  • CMD_SET_DEV_STAT : usbreg.h
  • CMD_SET_EP_STAT : usbreg.h
  • CMD_SET_MODE : usbreg.h
  • CMD_VALID_BUF : usbreg.h
  • CntrSel : lcdtest.c
  • COLMOD : drv_glcd.h
  • COLMOD_Data_t : drv_glcd.h
  • compl_menu : gpdma_r2r_test.c , gpdma_sleep.c , link_list.c , flash_2_ram.c
  • complete : ssp_slave.c , i2c_interrupt_test.c , spi_interrupt_test.c , sc16is750_int.c
  • complete_M : ti_test.c , i2c_master_slave_int_test.c
  • complete_S : i2c_master_slave_int_test.c , ti_test.c
  • CONF_DVICE : usbreg.h
  • CopyFromFrame_EMAC() : EMAC.h , EMAC.c
  • CopyToFrame_EMAC() : EMAC.c , EMAC.h
  • CoreDebug : core_cm3.h
  • CoreDebug_BASE : core_cm3.h
  • CoreDebug_DCRSR_REGSEL_Msk : core_cm3.h
  • CoreDebug_DCRSR_REGSEL_Pos : core_cm3.h
  • CoreDebug_DCRSR_REGWnR_Msk : core_cm3.h
  • CoreDebug_DCRSR_REGWnR_Pos : core_cm3.h
  • CoreDebug_DEMCR_MON_EN_Msk : core_cm3.h
  • CoreDebug_DEMCR_MON_EN_Pos : core_cm3.h
  • CoreDebug_DEMCR_MON_PEND_Msk : core_cm3.h
  • CoreDebug_DEMCR_MON_PEND_Pos : core_cm3.h
  • CoreDebug_DEMCR_MON_REQ_Msk : core_cm3.h
  • CoreDebug_DEMCR_MON_REQ_Pos : core_cm3.h
  • CoreDebug_DEMCR_MON_STEP_Msk : core_cm3.h
  • CoreDebug_DEMCR_MON_STEP_Pos : core_cm3.h
  • CoreDebug_DEMCR_TRCENA_Msk : core_cm3.h
  • CoreDebug_DEMCR_TRCENA_Pos : core_cm3.h
  • CoreDebug_DEMCR_VC_BUSERR_Msk : core_cm3.h
  • CoreDebug_DEMCR_VC_BUSERR_Pos : core_cm3.h
  • CoreDebug_DEMCR_VC_CHKERR_Msk : core_cm3.h
  • CoreDebug_DEMCR_VC_CHKERR_Pos : core_cm3.h
  • CoreDebug_DEMCR_VC_CORERESET_Msk : core_cm3.h
  • CoreDebug_DEMCR_VC_CORERESET_Pos : core_cm3.h
  • CoreDebug_DEMCR_VC_HARDERR_Msk : core_cm3.h
  • CoreDebug_DEMCR_VC_HARDERR_Pos : core_cm3.h
  • CoreDebug_DEMCR_VC_INTERR_Msk : core_cm3.h
  • CoreDebug_DEMCR_VC_INTERR_Pos : core_cm3.h
  • CoreDebug_DEMCR_VC_MMERR_Msk : core_cm3.h
  • CoreDebug_DEMCR_VC_MMERR_Pos : core_cm3.h
  • CoreDebug_DEMCR_VC_NOCPERR_Msk : core_cm3.h
  • CoreDebug_DEMCR_VC_NOCPERR_Pos : core_cm3.h
  • CoreDebug_DEMCR_VC_STATERR_Msk : core_cm3.h
  • CoreDebug_DEMCR_VC_STATERR_Pos : core_cm3.h
  • CoreDebug_DHCSR_C_DEBUGEN_Msk : core_cm3.h
  • CoreDebug_DHCSR_C_DEBUGEN_Pos : core_cm3.h
  • CoreDebug_DHCSR_C_HALT_Msk : core_cm3.h
  • CoreDebug_DHCSR_C_HALT_Pos : core_cm3.h
  • CoreDebug_DHCSR_C_MASKINTS_Msk : core_cm3.h
  • CoreDebug_DHCSR_C_MASKINTS_Pos : core_cm3.h
  • CoreDebug_DHCSR_C_SNAPSTALL_Msk : core_cm3.h
  • CoreDebug_DHCSR_C_SNAPSTALL_Pos : core_cm3.h
  • CoreDebug_DHCSR_C_STEP_Msk : core_cm3.h
  • CoreDebug_DHCSR_C_STEP_Pos : core_cm3.h
  • CoreDebug_DHCSR_DBGKEY_Msk : core_cm3.h
  • CoreDebug_DHCSR_DBGKEY_Pos : core_cm3.h
  • CoreDebug_DHCSR_S_HALT_Msk : core_cm3.h
  • CoreDebug_DHCSR_S_HALT_Pos : core_cm3.h
  • CoreDebug_DHCSR_S_LOCKUP_Msk : core_cm3.h
  • CoreDebug_DHCSR_S_LOCKUP_Pos : core_cm3.h
  • CoreDebug_DHCSR_S_REGRDY_Msk : core_cm3.h
  • CoreDebug_DHCSR_S_REGRDY_Pos : core_cm3.h
  • CoreDebug_DHCSR_S_RESET_ST_Msk : core_cm3.h
  • CoreDebug_DHCSR_S_RESET_ST_Pos : core_cm3.h
  • CoreDebug_DHCSR_S_RETIRE_ST_Msk : core_cm3.h
  • CoreDebug_DHCSR_S_RETIRE_ST_Pos : core_cm3.h
  • CoreDebug_DHCSR_S_SLEEP_Msk : core_cm3.h
  • CoreDebug_DHCSR_S_SLEEP_Pos : core_cm3.h
  • count : i2c_monitor.c , freqmeasure.c
  • COUNT_MODE : qei_test_velo.c
  • CR : Serial.c
  • crc32_add() : crc32.c , crc32.h
  • crc32_bfr() : crc32.c , crc32.h
  • crc32_end() : crc32.c , crc32.h
  • crc32_init() : crc32.c , crc32.h
  • crc_7() : spi_sdcard.c
  • crc_7final() : spi_sdcard.c
  • CriticalSecCntr : lcdtest.c
  • CS_Force() : sc16is750_polling.c , spi_polling_test.c , spi_master.c , spi_sdcard.c , sc16is750_int.c , spi_interrupt_test.c
  • CS_Init() : sc16is750_int.c , sc16is750_polling.c , spi_master.c , spi_sdcard.c , spi_polling_test.c , spi_interrupt_test.c
  • CS_PIN_NUM : spi_sdcard.c , sc16is750_int.c , spi_master.c , spi_interrupt_test.c , spi_loopback_test.c , spi_polling_test.c , sc16is750_polling.c
  • CS_PORT_NUM : sc16is750_polling.c , spi_polling_test.c , spi_interrupt_test.c , spi_sdcard.c , spi_master.c , spi_loopback_test.c , sc16is750_int.c
  • CSW : usbcore.c , mscuser.c
  • CSW_CMD_FAILED : msc.h
  • CSW_CMD_PASSED : msc.h
  • CSW_PHASE_ERROR : msc.h
  • CTRL_RD_EN : usbreg.h
  • CTRL_WR_EN : usbreg.h
  • Cur_State : 10ms_base.c , systick_stclk.c , vt_relocation.c
  • Cyan : GLCD.h
Generated on Tue Jun 7 15:00:15 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Data Fields

  • All
  • Functions
  • Variables
  • Typedefs
  • Enumerations
  • Enumerator
  • Defines
  • _
  • a
  • b
  • c
  • d
  • e
  • f
  • g
  • h
  • i
  • k
  • l
  • m
  • n
  • o
  • p
  • q
  • r
  • s
  • t
  • u
  • v
  • w
  • x
  • y
Here is a list of all functions, variables, defines, enums, and typedefs with links to the files they belong to:

- d -

  • DAC_BIAS_EN : lpc17xx_dac.h
  • DAC_CCNT_VALUE : lpc17xx_dac.h
  • DAC_CNT_ENA : lpc17xx_dac.h
  • DAC_ConfigDAConverterControl() : lpc17xx_dac.h
  • DAC_CURRENT_OPT : lpc17xx_dac.h
  • DAC_DACCTRL_MASK : lpc17xx_dac.h
  • DAC_DBLBUF_ENA : lpc17xx_dac.h
  • DAC_DMA_ENA : lpc17xx_dac.h
  • DAC_GENERATE_ESCALATOR : dac_wave_generate.c
  • DAC_GENERATE_NONE : dac_wave_generate.c
  • DAC_GENERATE_SINE : dac_wave_generate.c
  • DAC_GENERATE_TRIANGLE : dac_wave_generate.c
  • DAC_Init() : lpc17xx_dac.h
  • DAC_MAX_CURRENT_350uA : lpc17xx_dac.h
  • DAC_MAX_CURRENT_700uA : lpc17xx_dac.h
  • DAC_SetBias() : lpc17xx_dac.h
  • DAC_SetDMATimeOut() : lpc17xx_dac.h
  • DAC_UpdateValue() : lpc17xx_dac.h
  • DAC_VALUE : lpc17xx_dac.h
  • DarkCyan : GLCD.h
  • DarkGreen : GLCD.h
  • DarkGrey : GLCD.h
  • DAT_CLR_BUF : usbreg.h
  • DAT_GET_DEV_STAT : usbreg.h
  • DAT_GET_ERR_CODE : usbreg.h
  • DAT_RD_ERR_STAT : usbreg.h
  • DAT_RD_FRAME : usbreg.h
  • DAT_RD_TEST : usbreg.h
  • DAT_SEL_EP : usbreg.h
  • DAT_SEL_EP_CLRI : usbreg.h
  • DAT_WR_BYTE : usbreg.h
  • data : i2s_two_kit.c
  • DATA_FRAME : lpc17xx_can.h
  • DATA_FREQ : usbaudio.h
  • DATA_OFS_MASK : tcpip.h
  • DataBuf : usbdmain.c , usbaudio.h
  • DataIn : usbaudio.h , usbdmain.c
  • DataInFormat() : mscuser.c
  • DataInTransfer() : mscuser.c
  • DataOut : usbaudio.h , usbdmain.c
  • DataRun : usbaudio.h , usbdmain.c
  • DATCTR : drv_glcd.h
  • DATCTR_Data_t : drv_glcd.h
  • DatLen_M : microwire_test.c , ti_test.c
  • DatLen_S : microwire_test.c , ti_test.c
  • db : EMAC.c , emac.c
  • DB : EMAC.c , tcpip.c , emactest.c , emac.c , main.c
  • db_ : tcpip.c , emactest.c
  • DC_MODE_TEST : mcpwm_simple.c
  • DD_ISO_ADR : usbhw.h
  • DD_ISO_CNT : usbhw.h
  • DD_ISO_SZ : usbhw.h
  • DD_NISO_ADR : usbhw.h
  • DD_NISO_CNT : usbhw.h
  • DD_NISO_SZ : usbhw.h
  • DD_SZ : usbhw.h
  • DDAdr : usbhw.c
  • dDataLength : msc.h
  • dDataResidue : msc.h
  • DDSz : usbhw.c
  • DEBUG : lpc17xx_libcfg.h , lpc17xx_libcfg_default.h , lpc17xx_libcfg.h
  • debug_frmwrk_init() : debug_frmwrk.c , debug_frmwrk.h
  • DEBUG_PRINTF : uip.c
  • DEBUG_UART_PORT : debug_frmwrk.h
  • DebugMonitor_IRQn : LPC17xx.h
  • DEF_BACKGND_COLOUR : drv_glcd.h
  • DEF_FONT_COLOUR : drv_glcd.h
  • DEF_X_LEFT : drv_glcd.h
  • DEF_X_RIGHT : drv_glcd.h
  • DEF_Y_DOWN : drv_glcd.h
  • DEF_Y_UP : drv_glcd.h
  • DEFAULT_TTL : tcpip.h
  • delay() : nvic_priority.c , gpio_int.c , extint_sleep.c
  • Delay() : LedBlinky.c
  • DELAY_2N : GLCD_SPI_LPC1700.c
  • DescriptorList : hid.h
  • DEV_ADDR_MASK : usbreg.h
  • DEV_CON : usbreg.h
  • DEV_CON_CH : usbreg.h
  • DEV_EN : usbreg.h
  • DEV_RST : usbreg.h
  • DEV_STAT_INT : usbreg.h
  • DEV_SUS : usbreg.h
  • DEV_SUS_CH : usbreg.h
  • DHCP_HLEN_ETHERNET : dhcpc.c
  • DHCP_HTYPE_ETHERNET : dhcpc.c
  • DHCP_MSG_LEN : dhcpc.c
  • DHCP_OPTION_DNS_SERVER : dhcpc.c
  • DHCP_OPTION_END : dhcpc.c
  • DHCP_OPTION_LEASE_TIME : dhcpc.c
  • DHCP_OPTION_MSG_TYPE : dhcpc.c
  • DHCP_OPTION_REQ_IPADDR : dhcpc.c
  • DHCP_OPTION_REQ_LIST : dhcpc.c
  • DHCP_OPTION_ROUTER : dhcpc.c
  • DHCP_OPTION_SERVER_ID : dhcpc.c
  • DHCP_OPTION_SUBNET_MASK : dhcpc.c
  • DHCP_REPLY : dhcpc.c
  • DHCP_REQUEST : dhcpc.c
  • DHCPACK : dhcpc.c
  • dhcpc_appcall() : dhcpc.h , dhcpc.c
  • DHCPC_CLIENT_PORT : dhcpc.c
  • dhcpc_configured() : dhcpc.h
  • dhcpc_init() : dhcpc.h , dhcpc.c
  • dhcpc_request() : dhcpc.c , dhcpc.h
  • DHCPC_SERVER_PORT : dhcpc.c
  • DHCPDECLINE : dhcpc.c
  • DHCPDISCOVER : dhcpc.c
  • DHCPNAK : dhcpc.c
  • DHCPOFFER : dhcpc.c
  • DHCPRELEASE : dhcpc.c
  • DHCPREQUEST : dhcpc.c
  • Dir : usb.h
  • DISABLE : lpc_types.h
  • DISCTR : drv_glcd.h
  • DiskImage : DiskImg.c , memory.h
  • DISP_TIME : qei_test_velo.c
  • DISPOFF : drv_glcd.h
  • DISPON : drv_glcd.h
  • Dly100us() : drv_glcd.h , lcdtest.c
  • DMA_BUF_ADR : usbhw.h
  • DMA_BUF_SZ : usbhw.h
  • DMA_DATA_SIZE : ssp_dma.c
  • DMA_DST : gpdma_sleep.c , i2s_dma_test.c
  • dma_dst : ssp_dma.c
  • DMA_DST : gpdma_r2r_test.c
  • DMA_IRQHandler() : i2s_dma_test.c , adc_dma_test.c , link_list.c , gpdma_sleep.c , uart_dma_test.c , gpdma_r2r_test.c , flash_2_ram.c , ssp_dma.c , dac_dma.c
  • DMA_IRQn : LPC17xx.h
  • DMA_SIZE : dac_sinewave_test.c , i2s_dma_test.c , dac_wave_generate.c , dac_dma.c , adc_burst_test.c , gpdma_sleep.c , adc_dma_test.c , flash_2_ram.c , gpdma_r2r_test.c , link_list.c
  • DMA_SIZE_SINE : dac_wave_generate.c
  • DMA_SRC : gpdma_sleep.c , gpdma_r2r_test.c
  • dma_src : ssp_dma.c
  • DMA_SRC : i2s_dma_test.c
  • DMADest_Buffer : link_list.c , flash_2_ram.c
  • DMAREQSEL : LPC17xx.h
  • DMASrc_Buffer : flash_2_ram.c
  • DNS_FLAG1_AUTHORATIVE : resolv.c
  • DNS_FLAG1_OPCODE_INVERSE : resolv.c
  • DNS_FLAG1_OPCODE_STANDARD : resolv.c
  • DNS_FLAG1_OPCODE_STATUS : resolv.c
  • DNS_FLAG1_RD : resolv.c
  • DNS_FLAG1_RESPONSE : resolv.c
  • DNS_FLAG1_TRUNC : resolv.c
  • DNS_FLAG2_ERR_MASK : resolv.c
  • DNS_FLAG2_ERR_NAME : resolv.c
  • DNS_FLAG2_ERR_NONE : resolv.c
  • DNS_FLAG2_RA : resolv.c
  • do_crc_behav() : crc32.h
  • done : i2c_monitor.c , freqmeasure.c
  • DoNetworkStuff() : tcpip.h , tcpip.c
  • dSignature : msc.h
  • dTag : msc.h
  • dummy : i2s_mclk.c , i2s_irq_test.c
  • DummyReadFrame_EMAC() : EMAC.h , EMAC.c
  • dwDTERate : cdc.h
Generated on Tue Jun 7 15:00:15 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Data Fields

  • All
  • Functions
  • Variables
  • Typedefs
  • Enumerations
  • Enumerator
  • Defines
  • _
  • a
  • b
  • c
  • d
  • e
  • f
  • g
  • h
  • i
  • k
  • l
  • m
  • n
  • o
  • p
  • q
  • r
  • s
  • t
  • u
  • v
  • w
  • x
  • y
Here is a list of all functions, variables, defines, enums, and typedefs with links to the files they belong to:

- e -

  • EFF_GPR_Table : can_test_aflut.c
  • EFF_Table : can_test_aflut.c
  • EINT0_IRQHandler() : nvic_priority.c
  • EINT0_IRQn : LPC17xx.h
  • EINT1_IRQn : LPC17xx.h
  • EINT2_IRQHandler() : extint_sleep.c
  • EINT2_IRQn : LPC17xx.h
  • EINT3_IRQHandler() : adc_burst_test.c , gpio_int.c , nvic_priority.c
  • EINT3_IRQn : LPC17xx.h
  • EMAC_ADDR0 : emac.h
  • EMAC_ADDR1 : emac.h
  • EMAC_ADDR12 : emactest.c
  • EMAC_ADDR2 : emac.h
  • EMAC_ADDR3 : emac.h
  • EMAC_ADDR34 : emactest.c
  • EMAC_ADDR4 : emac.h
  • EMAC_ADDR5 : emac.h
  • EMAC_ADDR56 : emactest.c
  • EMAC_CheckPHYStatus() : lpc17xx_emac.h
  • EMAC_CheckReceiveDataStatus() : lpc17xx_emac.h
  • EMAC_CheckReceiveIndex() : lpc17xx_emac.h
  • EMAC_CheckTransmitIndex() : lpc17xx_emac.h
  • EMAC_clkdiv : lpc17xx_emac.c
  • EMAC_CLRT_COLL : lpc17xx_emac.h
  • EMAC_CLRT_DEF : lpc17xx_emac.h
  • EMAC_CLRT_MAX_RETX : lpc17xx_emac.h
  • EMAC_CR_FULL_DUP : lpc17xx_emac.h
  • EMAC_CR_PASS_RUNT_FRM : lpc17xx_emac.h
  • EMAC_CR_PASS_RX_FILT : lpc17xx_emac.h
  • EMAC_CR_REG_RES : lpc17xx_emac.h
  • EMAC_CR_RMII : lpc17xx_emac.h
  • EMAC_CR_RX_EN : lpc17xx_emac.h
  • EMAC_CR_RX_RES : lpc17xx_emac.h
  • EMAC_CR_TX_EN : lpc17xx_emac.h
  • EMAC_CR_TX_FLOW_CTRL : lpc17xx_emac.h
  • EMAC_CR_TX_RES : lpc17xx_emac.h
  • EMAC_DEF_ADR : lpc17xx_emac.h
  • EMAC_DeInit() : lpc17xx_emac.h
  • EMAC_DP83848C_ID : lpc17xx_emac.h
  • EMAC_DST_ADDR12 : emactest.c
  • EMAC_DST_ADDR34 : emactest.c
  • EMAC_DST_ADDR56 : emactest.c
  • EMAC_ETH_MAX_FLEN : lpc17xx_emac.h
  • EMAC_FCC_MIRR_CNT : lpc17xx_emac.h
  • EMAC_FCC_PAUSE_TIM : lpc17xx_emac.h
  • EMAC_FCS_MIRR_CNT : lpc17xx_emac.h
  • EMAC_GetReceiveDataSize() : lpc17xx_emac.h
  • EMAC_GetWoLStatus() : lpc17xx_emac.h
  • EMAC_Init() : lpc17xx_emac.h
  • EMAC_INT_RX_DONE : lpc17xx_emac.h
  • EMAC_INT_RX_ERR : lpc17xx_emac.h
  • EMAC_INT_RX_FIN : lpc17xx_emac.h
  • EMAC_INT_RX_OVERRUN : lpc17xx_emac.h
  • EMAC_INT_SOFT_INT : lpc17xx_emac.h
  • EMAC_INT_TX_DONE : lpc17xx_emac.h
  • EMAC_INT_TX_ERR : lpc17xx_emac.h
  • EMAC_INT_TX_FIN : lpc17xx_emac.h
  • EMAC_INT_TX_UNDERRUN : lpc17xx_emac.h
  • EMAC_INT_WAKEUP : lpc17xx_emac.h
  • EMAC_IntCmd() : lpc17xx_emac.h
  • EMAC_IntGetStatus() : lpc17xx_emac.h
  • EMAC_IPGR_NBBIPG_P1 : lpc17xx_emac.h
  • EMAC_IPGR_NBBIPG_P2 : lpc17xx_emac.h
  • EMAC_IPGR_P1_DEF : lpc17xx_emac.h
  • EMAC_IPGR_P2_DEF : lpc17xx_emac.h
  • EMAC_IPGT_BBIPG : lpc17xx_emac.h
  • EMAC_IPGT_FULL_DUP : lpc17xx_emac.h
  • EMAC_IPGT_HALF_DUP : lpc17xx_emac.h
  • EMAC_MAC1_LOOPB : lpc17xx_emac.h
  • EMAC_MAC1_PASS_ALL : lpc17xx_emac.h
  • EMAC_MAC1_REC_EN : lpc17xx_emac.h
  • EMAC_MAC1_RES_MCS_RX : lpc17xx_emac.h
  • EMAC_MAC1_RES_MCS_TX : lpc17xx_emac.h
  • EMAC_MAC1_RES_RX : lpc17xx_emac.h
  • EMAC_MAC1_RES_TX : lpc17xx_emac.h
  • EMAC_MAC1_RX_FLOWC : lpc17xx_emac.h
  • EMAC_MAC1_SIM_RES : lpc17xx_emac.h
  • EMAC_MAC1_SOFT_RES : lpc17xx_emac.h
  • EMAC_MAC1_TX_FLOWC : lpc17xx_emac.h
  • EMAC_MAC2_ADET_PAD_EN : lpc17xx_emac.h
  • EMAC_MAC2_BACK_PRESSURE : lpc17xx_emac.h
  • EMAC_MAC2_CRC_EN : lpc17xx_emac.h
  • EMAC_MAC2_DLY_CRC : lpc17xx_emac.h
  • EMAC_MAC2_EXCESS_DEF : lpc17xx_emac.h
  • EMAC_MAC2_FRM_LEN_CHK : lpc17xx_emac.h
  • EMAC_MAC2_FULL_DUP : lpc17xx_emac.h
  • EMAC_MAC2_HUGE_FRM_EN : lpc17xx_emac.h
  • EMAC_MAC2_LPREAM_ENF : lpc17xx_emac.h
  • EMAC_MAC2_NO_BACKOFF : lpc17xx_emac.h
  • EMAC_MAC2_PAD_EN : lpc17xx_emac.h
  • EMAC_MAC2_PPREAM_ENF : lpc17xx_emac.h
  • EMAC_MAC2_VLAN_PAD_EN : lpc17xx_emac.h
  • EMAC_MADR_PHY_ADR : lpc17xx_emac.h
  • EMAC_MADR_REG_ADR : lpc17xx_emac.h
  • EMAC_MAX_PACKET_SIZE : emac.h
  • EMAC_MAXF_MAXFRMLEN : lpc17xx_emac.h
  • EMAC_MCFG_CLK_SEL : lpc17xx_emac.h
  • EMAC_MCFG_MII_MAXCLK : lpc17xx_emac.h
  • EMAC_MCFG_RES_MII : lpc17xx_emac.h
  • EMAC_MCFG_SCAN_INC : lpc17xx_emac.h
  • EMAC_MCFG_SUPP_PREAM : lpc17xx_emac.h
  • EMAC_MCMD_READ : lpc17xx_emac.h
  • EMAC_MCMD_SCAN : lpc17xx_emac.h
  • EMAC_MII_RD_TOUT : lpc17xx_emac.h
  • EMAC_MII_WR_TOUT : lpc17xx_emac.h
  • EMAC_MIND_BUSY : lpc17xx_emac.h
  • EMAC_MIND_MII_LINK_FAIL : lpc17xx_emac.h
  • EMAC_MIND_NOT_VAL : lpc17xx_emac.h
  • EMAC_MIND_SCAN : lpc17xx_emac.h
  • EMAC_MODE_100M_FULL : lpc17xx_emac.h
  • EMAC_MODE_100M_HALF : lpc17xx_emac.h
  • EMAC_MODE_10M_FULL : lpc17xx_emac.h
  • EMAC_MODE_10M_HALF : lpc17xx_emac.h
  • EMAC_MODE_AUTO : lpc17xx_emac.h
  • EMAC_MRDD_DATA : lpc17xx_emac.h
  • EMAC_MWTD_DATA : lpc17xx_emac.h
  • EMAC_NUM_RX_FRAG : lpc17xx_emac.h
  • EMAC_NUM_TX_FRAG : lpc17xx_emac.h
  • EMAC_OLD_EMAC_MODULE_ID : lpc17xx_emac.h
  • EMAC_PD_POWER_DOWN : lpc17xx_emac.h
  • EMAC_PHY_AUTO_NEG : lpc17xx_emac.h
  • EMAC_PHY_BMCR_AN : lpc17xx_emac.h
  • EMAC_PHY_BMCR_DUPLEX : lpc17xx_emac.h
  • EMAC_PHY_BMCR_ISOLATE : lpc17xx_emac.h
  • EMAC_PHY_BMCR_LOOPBACK : lpc17xx_emac.h
  • EMAC_PHY_BMCR_POWERDOWN : lpc17xx_emac.h
  • EMAC_PHY_BMCR_RE_AN : lpc17xx_emac.h
  • EMAC_PHY_BMCR_RESET : lpc17xx_emac.h
  • EMAC_PHY_BMCR_SPEED_SEL : lpc17xx_emac.h
  • EMAC_PHY_BMSR_100BE_T4 : lpc17xx_emac.h
  • EMAC_PHY_BMSR_100TX_FULL : lpc17xx_emac.h
  • EMAC_PHY_BMSR_100TX_HALF : lpc17xx_emac.h
  • EMAC_PHY_BMSR_10BE_FULL : lpc17xx_emac.h
  • EMAC_PHY_BMSR_10BE_HALF : lpc17xx_emac.h
  • EMAC_PHY_BMSR_AUTO_DONE : lpc17xx_emac.h
  • EMAC_PHY_BMSR_LINK_ESTABLISHED : lpc17xx_emac.h
  • EMAC_PHY_BMSR_LINK_STATUS : lpc17xx_emac.h
  • EMAC_PHY_BMSR_NO_AUTO : lpc17xx_emac.h
  • EMAC_PHY_BMSR_NOPREAM : lpc17xx_emac.h
  • EMAC_PHY_BMSR_REMOTE_FAULT : lpc17xx_emac.h
  • EMAC_PHY_FULLD_100M : lpc17xx_emac.h
  • EMAC_PHY_FULLD_10M : lpc17xx_emac.h
  • EMAC_PHY_HALFD_100M : lpc17xx_emac.h
  • EMAC_PHY_HALFD_10M : lpc17xx_emac.h
  • EMAC_PHY_REG_10BTSCR : lpc17xx_emac.h
  • EMAC_PHY_REG_ANAR : lpc17xx_emac.h
  • EMAC_PHY_REG_ANER : lpc17xx_emac.h
  • EMAC_PHY_REG_ANLPAR : lpc17xx_emac.h
  • EMAC_PHY_REG_ANNPTR : lpc17xx_emac.h
  • EMAC_PHY_REG_BMCR : lpc17xx_emac.h
  • EMAC_PHY_REG_BMSR : lpc17xx_emac.h
  • EMAC_PHY_REG_CDCTRL1 : lpc17xx_emac.h
  • EMAC_PHY_REG_EDCR : lpc17xx_emac.h
  • EMAC_PHY_REG_FCSCR : lpc17xx_emac.h
  • EMAC_PHY_REG_IDR1 : lpc17xx_emac.h
  • EMAC_PHY_REG_IDR2 : lpc17xx_emac.h
  • EMAC_PHY_REG_LEDCR : lpc17xx_emac.h
  • EMAC_PHY_REG_LPNPA : lpc17xx_emac.h
  • EMAC_PHY_REG_MICR : lpc17xx_emac.h
  • EMAC_PHY_REG_MISR : lpc17xx_emac.h
  • EMAC_PHY_REG_PCSR : lpc17xx_emac.h
  • EMAC_PHY_REG_PHYCR : lpc17xx_emac.h
  • EMAC_PHY_REG_RBR : lpc17xx_emac.h
  • EMAC_PHY_REG_RECR : lpc17xx_emac.h
  • EMAC_PHY_REG_STS : lpc17xx_emac.h
  • EMAC_PHY_RESP_TOUT : lpc17xx_emac.h
  • EMAC_PHY_SR_100_SPEED : lpc17xx_emac.h
  • EMAC_PHY_SR_AUTO_DONE : lpc17xx_emac.h
  • EMAC_PHY_SR_DUP : lpc17xx_emac.h
  • EMAC_PHY_SR_FULL_DUP : lpc17xx_emac.h
  • EMAC_PHY_SR_JABBER : lpc17xx_emac.h
  • EMAC_PHY_SR_LINK : lpc17xx_emac.h
  • EMAC_PHY_SR_LOOPBACK : lpc17xx_emac.h
  • EMAC_PHY_SR_REMOTE_FAULT : lpc17xx_emac.h
  • EMAC_PHY_SR_SPEED : lpc17xx_emac.h
  • EMAC_PHY_STAT_DUP : lpc17xx_emac.h
  • EMAC_PHY_STAT_LINK : lpc17xx_emac.h
  • EMAC_PHY_STAT_SPEED : lpc17xx_emac.h
  • EMAC_RCTRL_INT : lpc17xx_emac.h
  • EMAC_RCTRL_SIZE : lpc17xx_emac.h
  • EMAC_ReadPacketBuffer() : lpc17xx_emac.h
  • EMAC_RFC_BCAST_EN : lpc17xx_emac.h
  • EMAC_RFC_MAGP_WOL_EN : lpc17xx_emac.h
  • EMAC_RFC_MCAST_EN : lpc17xx_emac.h
  • EMAC_RFC_MCAST_HASH_EN : lpc17xx_emac.h
  • EMAC_RFC_PERFECT_EN : lpc17xx_emac.h
  • EMAC_RFC_PFILT_WOL_EN : lpc17xx_emac.h
  • EMAC_RFC_UCAST_EN : lpc17xx_emac.h
  • EMAC_RFC_UCAST_HASH_EN : lpc17xx_emac.h
  • EMAC_RHASH_DA : lpc17xx_emac.h
  • EMAC_RHASH_SA : lpc17xx_emac.h
  • EMAC_RINFO_ALIGN_ERR : lpc17xx_emac.h
  • EMAC_RINFO_BCAST : lpc17xx_emac.h
  • EMAC_RINFO_CRC_ERR : lpc17xx_emac.h
  • EMAC_RINFO_CTRL_FRAME : lpc17xx_emac.h
  • EMAC_RINFO_ERR : lpc17xx_emac.h
  • EMAC_RINFO_ERR_MASK : lpc17xx_emac.h
  • EMAC_RINFO_FAIL_FILT : lpc17xx_emac.h
  • EMAC_RINFO_LAST_FLAG : lpc17xx_emac.h
  • EMAC_RINFO_LEN_ERR : lpc17xx_emac.h
  • EMAC_RINFO_MCAST : lpc17xx_emac.h
  • EMAC_RINFO_NO_DESCR : lpc17xx_emac.h
  • EMAC_RINFO_OVERRUN : lpc17xx_emac.h
  • EMAC_RINFO_RANGE_ERR : lpc17xx_emac.h
  • EMAC_RINFO_SIZE : lpc17xx_emac.h
  • EMAC_RINFO_SYM_ERR : lpc17xx_emac.h
  • EMAC_RINFO_VLAN : lpc17xx_emac.h
  • EMAC_RSV_BCAST : lpc17xx_emac.h
  • EMAC_RSV_BYTE_CNT : lpc17xx_emac.h
  • EMAC_RSV_CARR_SEEN : lpc17xx_emac.h
  • EMAC_RSV_CRC_ERR : lpc17xx_emac.h
  • EMAC_RSV_CTRL_FRAME : lpc17xx_emac.h
  • EMAC_RSV_DRIB_NIBB : lpc17xx_emac.h
  • EMAC_RSV_LEN_CHKERR : lpc17xx_emac.h
  • EMAC_RSV_LEN_OUTRNG : lpc17xx_emac.h
  • EMAC_RSV_MCAST : lpc17xx_emac.h
  • EMAC_RSV_PAUSE : lpc17xx_emac.h
  • EMAC_RSV_PKT_IGNORED : lpc17xx_emac.h
  • EMAC_RSV_REC_CODEV : lpc17xx_emac.h
  • EMAC_RSV_REC_OK : lpc17xx_emac.h
  • EMAC_RSV_RXDV_SEEN : lpc17xx_emac.h
  • EMAC_RSV_UNSUPP_OPC : lpc17xx_emac.h
  • EMAC_RSV_VLAN : lpc17xx_emac.h
  • EMAC_SetFilterMode() : lpc17xx_emac.h
  • EMAC_SetHashFilter() : lpc17xx_emac.h
  • EMAC_SetPHYMode() : lpc17xx_emac.h
  • EMAC_SR_RX_EN : lpc17xx_emac.h
  • EMAC_SR_TX_EN : lpc17xx_emac.h
  • EMAC_SUPP_RES_RMII : lpc17xx_emac.h
  • EMAC_SUPP_SPEED : lpc17xx_emac.h
  • EMAC_TCTRL_CRC : lpc17xx_emac.h
  • EMAC_TCTRL_HUGE : lpc17xx_emac.h
  • EMAC_TCTRL_INT : lpc17xx_emac.h
  • EMAC_TCTRL_LAST : lpc17xx_emac.h
  • EMAC_TCTRL_OVERRIDE : lpc17xx_emac.h
  • EMAC_TCTRL_PAD : lpc17xx_emac.h
  • EMAC_TCTRL_SIZE : lpc17xx_emac.h
  • EMAC_TEST_SHCUT_PQUANTA : lpc17xx_emac.h
  • EMAC_TEST_TST_BACKP : lpc17xx_emac.h
  • EMAC_TEST_TST_PAUSE : lpc17xx_emac.h
  • EMAC_TINFO_COL_CNT : lpc17xx_emac.h
  • EMAC_TINFO_DEFER : lpc17xx_emac.h
  • EMAC_TINFO_ERR : lpc17xx_emac.h
  • EMAC_TINFO_EXCESS_COL : lpc17xx_emac.h
  • EMAC_TINFO_EXCESS_DEF : lpc17xx_emac.h
  • EMAC_TINFO_LATE_COL : lpc17xx_emac.h
  • EMAC_TINFO_NO_DESCR : lpc17xx_emac.h
  • EMAC_TINFO_UNDERRUN : lpc17xx_emac.h
  • EMAC_TSV0_BACK_PRESS : lpc17xx_emac.h
  • EMAC_TSV0_BCAST : lpc17xx_emac.h
  • EMAC_TSV0_BYTES : lpc17xx_emac.h
  • EMAC_TSV0_CRC_ERR : lpc17xx_emac.h
  • EMAC_TSV0_CTRL_FRAME : lpc17xx_emac.h
  • EMAC_TSV0_DONE : lpc17xx_emac.h
  • EMAC_TSV0_EXC_COLL : lpc17xx_emac.h
  • EMAC_TSV0_EXC_DEFER : lpc17xx_emac.h
  • EMAC_TSV0_GIANT : lpc17xx_emac.h
  • EMAC_TSV0_LATE_COLL : lpc17xx_emac.h
  • EMAC_TSV0_LEN_CHKERR : lpc17xx_emac.h
  • EMAC_TSV0_LEN_OUTRNG : lpc17xx_emac.h
  • EMAC_TSV0_MCAST : lpc17xx_emac.h
  • EMAC_TSV0_PAUSE : lpc17xx_emac.h
  • EMAC_TSV0_PKT_DEFER : lpc17xx_emac.h
  • EMAC_TSV0_UNDERRUN : lpc17xx_emac.h
  • EMAC_TSV0_VLAN : lpc17xx_emac.h
  • EMAC_TSV1_BYTE_CNT : lpc17xx_emac.h
  • EMAC_TSV1_COLL_CNT : lpc17xx_emac.h
  • EMAC_TX_FRAME_TOUT : lpc17xx_emac.h
  • EMAC_UpdatePHYStatus() : lpc17xx_emac.h
  • EMAC_UpdateRxConsumeIndex() : lpc17xx_emac.h
  • EMAC_UpdateTxProduceIndex() : lpc17xx_emac.h
  • EMAC_WOL_BCAST : lpc17xx_emac.h
  • EMAC_WOL_BITMASK : lpc17xx_emac.h
  • EMAC_WOL_MAG_PACKET : lpc17xx_emac.h
  • EMAC_WOL_MCAST : lpc17xx_emac.h
  • EMAC_WOL_MCAST_HASH : lpc17xx_emac.h
  • EMAC_WOL_PERFECT : lpc17xx_emac.h
  • EMAC_WOL_RX_FILTER : lpc17xx_emac.h
  • EMAC_WOL_UCAST : lpc17xx_emac.h
  • EMAC_WOL_UCAST_HASH : lpc17xx_emac.h
  • EMAC_WritePacketBuffer() : lpc17xx_emac.h
  • ENABLE : lpc_types.h
  • ENABLE_HASH : emactest.c
  • ENABLE_WOL : emactest.c
  • ENC_RES : qei_test_velo.c
  • EndReadFrame() : EMAC.c , EMAC.h
  • ENET_DMA_DESC_NUMB : emac.h
  • ENET_IRQHandler() : emactest.c
  • ENET_IRQn : LPC17xx.h
  • ENTRIES : uip-neighbor.c
  • EOT_INT : usbreg.h
  • EP0Buf : usbcore.c , usbcore.h , usbcore.c , usbcore.h
  • EP0Data : usbcore.c , usbcore.h , usbcore.c , usbcore.h , usbcore.c , usbcore.h
  • EP_FAST_INT : usbreg.h
  • EP_MSK_BULK : usbhw.c
  • EP_MSK_CTRL : usbhw.c
  • EP_MSK_INT : usbhw.c
  • EP_MSK_ISO : usbhw.c
  • EP_RLZED_INT : usbreg.h
  • EP_SEL_B_1_FULL : usbreg.h
  • EP_SEL_B_2_FULL : usbreg.h
  • EP_SEL_EPN : usbreg.h
  • EP_SEL_F : usbreg.h
  • EP_SEL_PO : usbreg.h
  • EP_SEL_ST : usbreg.h
  • EP_SEL_STP : usbreg.h
  • EP_SLOW_INT : usbreg.h
  • EP_STAT_CND_ST : usbreg.h
  • EP_STAT_DA : usbreg.h
  • EP_STAT_RF_MO : usbreg.h
  • EP_STAT_ST : usbreg.h
  • EPAdr() : usbhw.c
  • EPWRIN : drv_glcd.h
  • EPWROUT : drv_glcd.h
  • ERR_B_OVRN : usbreg.h
  • ERR_BTSTF : usbreg.h
  • ERR_DCRC : usbreg.h
  • ERR_EA : usbreg.h
  • ERR_EC_MASK : usbreg.h
  • ERR_EOP : usbreg.h
  • ERR_INT : usbreg.h
  • err_menu : gpdma_r2r_test.c , flash_2_ram.c , link_list.c , gpdma_sleep.c
  • ERR_PID : usbreg.h
  • ERR_TGL : usbreg.h
  • ERR_TIMOUT : usbreg.h
  • ERR_UEPKT : usbreg.h
  • ERROR : lpc_types.h
  • Error_Loop() : link_list.c , pca8581_test.c , gpdma_r2r_test.c , gpdma_sleep.c , microwire_test.c , ti_test.c , ssp_dma.c , ssp_master.c , i2c_interrupt_test.c , spi_slave.c , flash_2_ram.c , spi_master.c , spi_loopback_test.c , i2c_polling_test.c , ssp_slave.c
  • Error_Loop_M() : i2c_master_slave_int_test.c
  • Error_Loop_S() : i2c_master_slave_int_test.c
  • ESTABLISHED : tcpip.h
  • ETH_DA_OFS : tcpip.h
  • ETH_DATA_OFS : tcpip.h
  • ETH_HEADER_SIZE : tcpip.h
  • ETH_SA_OFS : tcpip.h
  • ETH_TYPE_OFS : tcpip.h
  • EXPLICIT_EXTEND_ENTRY : lpc17xx_can.h
  • EXPLICIT_STANDARD_ENTRY : lpc17xx_can.h
  • EXT_ID_FORMAT : lpc17xx_can.h
  • extern : easyweb.c
  • EXTERN : lpc_types.h
  • EXTI_ClearEXTIFlag() : lpc17xx_exti.h
  • EXTI_Config() : lpc17xx_exti.h
  • EXTI_DeInit() : lpc17xx_exti.h
  • EXTI_EINT0 : lpc17xx_exti.h
  • EXTI_EINT0_BIT_MARK : lpc17xx_exti.h
  • EXTI_EINT1 : lpc17xx_exti.h
  • EXTI_EINT1_BIT_MARK : lpc17xx_exti.h
  • EXTI_EINT2 : lpc17xx_exti.h
  • EXTI_EINT2_BIT_MARK : lpc17xx_exti.h
  • EXTI_EINT3 : lpc17xx_exti.h
  • EXTI_EINT3_BIT_MARK : lpc17xx_exti.h
  • EXTI_Init() : lpc17xx_exti.h
  • EXTI_LINE_ENUM : lpc17xx_exti.h
  • EXTI_MODE_EDGE_SENSITIVE : lpc17xx_exti.h
  • EXTI_MODE_ENUM : lpc17xx_exti.h
  • EXTI_MODE_LEVEL_SENSITIVE : lpc17xx_exti.h
  • EXTI_POLARITY_ENUM : lpc17xx_exti.h
  • EXTI_POLARITY_HIGH_ACTIVE_OR_RISING_EDGE : lpc17xx_exti.h
  • EXTI_POLARITY_LOW_ACTIVE_OR_FALLING_EDGE : lpc17xx_exti.h
  • EXTI_SetMode() : lpc17xx_exti.h
  • EXTI_SetPolarity() : lpc17xx_exti.h
Generated on Tue Jun 7 15:00:15 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Data Fields

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  • x
  • y
Here is a list of all functions, variables, defines, enums, and typedefs with links to the files they belong to:

- f -

  • f_err_menu : rs485_master.c , rs485_slave.c
  • FALSE : lpc_types.h
  • FBUF : uip.c
  • FCAN_ReadObj() : lpc17xx_can.h
  • ferror() : Retarget.c
  • fgetc() : Retarget.c
  • file_404_html : httpd-fsdata.c
  • file_fade_png : httpd-fsdata.c
  • file_files_shtml : httpd-fsdata.c
  • file_footer_html : httpd-fsdata.c
  • file_header_html : httpd-fsdata.c
  • file_index_html : httpd-fsdata.c
  • file_processes_shtml : httpd-fsdata.c
  • file_stats_shtml : httpd-fsdata.c
  • file_style_css : httpd-fsdata.c
  • file_tcp_shtml : httpd-fsdata.c
  • FIN_TIMEOUT : tcpip.h
  • FIN_WAIT_1 : tcpip.h
  • FIN_WAIT_2 : tcpip.h
  • FIO_ByteClearValue() : lpc17xx_gpio.h
  • FIO_ByteReadValue() : lpc17xx_gpio.h
  • FIO_ByteSetDir() : lpc17xx_gpio.h
  • FIO_ByteSetMask() : lpc17xx_gpio.h
  • FIO_ByteSetValue() : lpc17xx_gpio.h
  • FIO_ClearInt() : lpc17xx_gpio.h
  • FIO_ClearValue() : lpc17xx_gpio.h
  • FIO_GetIntStatus() : lpc17xx_gpio.h
  • FIO_HalfWordClearValue() : lpc17xx_gpio.h
  • FIO_HalfWordReadValue() : lpc17xx_gpio.h
  • FIO_HalfWordSetDir() : lpc17xx_gpio.h
  • FIO_HalfWordSetMask() : lpc17xx_gpio.h
  • FIO_HalfWordSetValue() : lpc17xx_gpio.h
  • FIO_IntCmd() : lpc17xx_gpio.h
  • FIO_ReadValue() : lpc17xx_gpio.h
  • FIO_SetDir() : lpc17xx_gpio.h
  • FIO_SetMask() : lpc17xx_gpio.h
  • FIO_SetValue() : lpc17xx_gpio.h
  • first_capture : freqmeasure.c
  • FIX_DUPLEX : emac.h
  • FIX_SPEED : emac.h
  • FlagStatus : lpc_types.h
  • FLASH_SETUP : system_LPC17xx.c
  • FLASHCFG_Val : system_LPC17xx.c
  • Font_24x16 : Font_24x16.h
  • FontType_t : drv_glcd.h
  • fputc() : Retarget.c
  • FRAME_ARP : tcpip.h
  • FRAME_INT : usbreg.h
  • FRAME_IP : tcpip.h
  • FRM8SEL : drv_glcd.h
  • FRMSEL : drv_glcd.h
  • FULL_DUPLEX : emac.h
  • FULLCAN_ENABLE : lpc17xx_can.c
  • FULLCAN_ENTRY : lpc17xx_can.h
  • FULLCAN_IC0 : lpc17xx_can.h
  • FULLCAN_IC1 : lpc17xx_can.h
  • FullCAN_IC_Type : lpc17xx_can.h
  • FullCAN_Table : can_test_aflut.c
  • FunctionalState : lpc_types.h
  • FW_TIME : uip-fw.c
  • FWCACHE_SIZE : uip-fw.c
Generated on Tue Jun 7 15:00:15 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Data Fields

  • All
  • Functions
  • Variables
  • Typedefs
  • Enumerations
  • Enumerator
  • Defines
  • _
  • a
  • b
  • c
  • d
  • e
  • f
  • g
  • h
  • i
  • k
  • l
  • m
  • n
  • o
  • p
  • q
  • r
  • s
  • t
  • u
  • v
  • w
  • x
  • y
Here is a list of all functions, variables, defines, enums, and typedefs with links to the files they belong to:

- g -

  • GatewayIP : tcpip.h
  • get_potval() : usbdmain.c
  • GetAD7Val() : easyweb.h , easyweb.c
  • GETBIT : spi_sdcard.c
  • getchar() : Serial.c
  • GetInReport() : demo.h , demo.c
  • getkey() : Retarget.c , Serial.c
  • GetResponse : easyweb.h
  • GetTempVal() : easyweb.c , easyweb.h
  • GLCD_Backlight() : glcd_ll.c , glcd_ll.h
  • GLCD_Bargraph() : GLCD.h , GLCD_SPI_LPC1700.c
  • GLCD_Bitmap() : GLCD.h , GLCD_SPI_LPC1700.c
  • GLCD_Bmp() : GLCD.h , GLCD_SPI_LPC1700.c
  • GLCD_BOOSTER_ON_DLY : drv_glcd.c
  • GLCD_Clear() : GLCD.h , GLCD_SPI_LPC1700.c
  • GLCD_ClearLn() : GLCD.h , GLCD_SPI_LPC1700.c
  • GLCD_CMD_NUMB : drv_glcd.h
  • GLCD_Cmd_t : drv_glcd.h
  • GLCD_CmdCtrl_t : drv_glcd.h
  • GLCD_CmdDir_t : drv_glcd.h
  • GLCD_DATA : drv_glcd.h
  • GLCD_DEF_CLOCK : drv_glcd_cnfg.h
  • GLCD_DEF_DPL_8_COLOR : drv_glcd_cnfg.h
  • GLCD_DEF_DPL_INV : drv_glcd_cnfg.h
  • GLCD_DEF_DPL_ML : drv_glcd_cnfg.h
  • GLCD_DEF_DPL_MX : drv_glcd_cnfg.h
  • GLCD_DEF_DPL_MY : drv_glcd_cnfg.h
  • GLCD_DEF_DPL_PARTIAL_MODE : drv_glcd_cnfg.h
  • GLCD_DEF_DPL_RGB_ORD : drv_glcd_cnfg.h
  • GLCD_DEF_DPL_V : drv_glcd_cnfg.h
  • GLCD_DEF_WIDTH : drv_glcd_cnfg.h
  • GLCD_DISPLAY_STATE : drv_glcd_cnfg.h
  • GLCD_DisplayChar() : GLCD.h , GLCD_SPI_LPC1700.c
  • GLCD_DisplayString() : GLCD.h , GLCD_SPI_LPC1700.c
  • GLCD_DLY_10US : drv_glcd.c
  • GLCD_DrawChar() : GLCD.h , GLCD_SPI_LPC1700.c
  • GLCD_ERROR : drv_glcd.h
  • GLCD_HORIZONTAL_SIZE : drv_glcd_cnfg.h
  • GLCD_ID_ERROR : drv_glcd.h
  • GLCD_Init() : GLCD.h , GLCD_SPI_LPC1700.c
  • GLCD_INV_CMD : drv_glcd.h
  • GLCD_ISS_0 : drv_glcd.h
  • GLCD_ISS_1 : drv_glcd.h
  • GLCD_ISS_t : drv_glcd.h
  • GLCD_LLInit() : glcd_ll.c , glcd_ll.h
  • GLCD_MANF_ID : drv_glcd.h
  • GLCD_MAX_COTRAST : drv_glcd.h
  • GLCD_MIN_COTRAST : drv_glcd.h
  • GLCD_MOD_ID : drv_glcd.h
  • GLCD_OK : drv_glcd.h
  • GLCD_PowerUpInit() : drv_glcd.c , drv_glcd.h
  • GLCD_print() : drv_glcd.c , drv_glcd.h
  • GLCD_putchar() : drv_glcd.c , drv_glcd.h
  • GLCD_PutPixel() : GLCD.h , GLCD_SPI_LPC1700.c
  • GLCD_READ : drv_glcd.h
  • GLCD_RESET_DLY : drv_glcd.c
  • GLCD_SendCmd() : drv_glcd.c , drv_glcd.h
  • GLCD_SetBackColor() : GLCD.h , GLCD_SPI_LPC1700.c
  • GLCD_SetFont() : drv_glcd.c , drv_glcd.h
  • GLCD_SetReset() : glcd_ll.c , glcd_ll.h
  • GLCD_SetTextColor() : GLCD.h , GLCD_SPI_LPC1700.c
  • GLCD_SetWindow() : drv_glcd.c , drv_glcd.h
  • GLCD_SPI_ChipSelect() : glcd_ll.c , glcd_ll.h
  • GLCD_SPI_Init() : glcd_ll.c , glcd_ll.h
  • GLCD_SPI_ReceiveBlock() : glcd_ll.c , glcd_ll.h
  • GLCD_SPI_SendBlock() : glcd_ll.c , glcd_ll.h
  • GLCD_SPI_SetClockFreq() : glcd_ll.c , glcd_ll.h
  • GLCD_SPI_SetWordWidth() : glcd_ll.c , glcd_ll.h
  • GLCD_SPI_TranserByte() : glcd_ll.c , glcd_ll.h
  • GLCD_Status_t : drv_glcd.h
  • GLCD_TextSetPos() : drv_glcd.c , drv_glcd.h
  • GLCD_TextSetTabSize() : drv_glcd.c , drv_glcd.h
  • GLCD_UNSUPPORTED : drv_glcd.h
  • GLCD_VERTICAL_SIZE : drv_glcd_cnfg.h
  • GLCD_WindowMax() : GLCD.h , GLCD_SPI_LPC1700.c
  • GLCD_WRITE : drv_glcd.h
  • GPDMA_BSIZE_1 : lpc17xx_gpdma.h
  • GPDMA_BSIZE_128 : lpc17xx_gpdma.h
  • GPDMA_BSIZE_16 : lpc17xx_gpdma.h
  • GPDMA_BSIZE_256 : lpc17xx_gpdma.h
  • GPDMA_BSIZE_32 : lpc17xx_gpdma.h
  • GPDMA_BSIZE_4 : lpc17xx_gpdma.h
  • GPDMA_BSIZE_64 : lpc17xx_gpdma.h
  • GPDMA_BSIZE_8 : lpc17xx_gpdma.h
  • GPDMA_ChannelCmd() : lpc17xx_gpdma.h
  • GPDMA_ClearIntPending() : lpc17xx_gpdma.h
  • GPDMA_CONN_ADC : lpc17xx_gpdma.h
  • GPDMA_CONN_DAC : lpc17xx_gpdma.h
  • GPDMA_CONN_I2S_Channel_0 : lpc17xx_gpdma.h
  • GPDMA_CONN_I2S_Channel_1 : lpc17xx_gpdma.h
  • GPDMA_CONN_MAT0_0 : lpc17xx_gpdma.h
  • GPDMA_CONN_MAT0_1 : lpc17xx_gpdma.h
  • GPDMA_CONN_MAT1_0 : lpc17xx_gpdma.h
  • GPDMA_CONN_MAT1_1 : lpc17xx_gpdma.h
  • GPDMA_CONN_MAT2_0 : lpc17xx_gpdma.h
  • GPDMA_CONN_MAT2_1 : lpc17xx_gpdma.h
  • GPDMA_CONN_MAT3_0 : lpc17xx_gpdma.h
  • GPDMA_CONN_MAT3_1 : lpc17xx_gpdma.h
  • GPDMA_CONN_SSP0_Rx : lpc17xx_gpdma.h
  • GPDMA_CONN_SSP0_Tx : lpc17xx_gpdma.h
  • GPDMA_CONN_SSP1_Rx : lpc17xx_gpdma.h
  • GPDMA_CONN_SSP1_Tx : lpc17xx_gpdma.h
  • GPDMA_CONN_UART0_Rx : lpc17xx_gpdma.h
  • GPDMA_CONN_UART0_Tx : lpc17xx_gpdma.h
  • GPDMA_CONN_UART1_Rx : lpc17xx_gpdma.h
  • GPDMA_CONN_UART1_Tx : lpc17xx_gpdma.h
  • GPDMA_CONN_UART2_Rx : lpc17xx_gpdma.h
  • GPDMA_CONN_UART2_Tx : lpc17xx_gpdma.h
  • GPDMA_CONN_UART3_Rx : lpc17xx_gpdma.h
  • GPDMA_CONN_UART3_Tx : lpc17xx_gpdma.h
  • GPDMA_DMACConfig_BITMASK : lpc17xx_gpdma.h
  • GPDMA_DMACConfig_E : lpc17xx_gpdma.h
  • GPDMA_DMACConfig_M : lpc17xx_gpdma.h
  • GPDMA_DMACCxConfig_A : lpc17xx_gpdma.h
  • GPDMA_DMACCxConfig_BITMASK : lpc17xx_gpdma.h
  • GPDMA_DMACCxConfig_DestPeripheral : lpc17xx_gpdma.h
  • GPDMA_DMACCxConfig_E : lpc17xx_gpdma.h
  • GPDMA_DMACCxConfig_H : lpc17xx_gpdma.h
  • GPDMA_DMACCxConfig_IE : lpc17xx_gpdma.h
  • GPDMA_DMACCxConfig_ITC : lpc17xx_gpdma.h
  • GPDMA_DMACCxConfig_L : lpc17xx_gpdma.h
  • GPDMA_DMACCxConfig_SrcPeripheral : lpc17xx_gpdma.h
  • GPDMA_DMACCxConfig_TransferType : lpc17xx_gpdma.h
  • GPDMA_DMACCxControl_BITMASK : lpc17xx_gpdma.h
  • GPDMA_DMACCxControl_DBSize : lpc17xx_gpdma.h
  • GPDMA_DMACCxControl_DI : lpc17xx_gpdma.h
  • GPDMA_DMACCxControl_DWidth : lpc17xx_gpdma.h
  • GPDMA_DMACCxControl_I : lpc17xx_gpdma.h
  • GPDMA_DMACCxControl_Prot1 : lpc17xx_gpdma.h
  • GPDMA_DMACCxControl_Prot2 : lpc17xx_gpdma.h
  • GPDMA_DMACCxControl_Prot3 : lpc17xx_gpdma.h
  • GPDMA_DMACCxControl_SBSize : lpc17xx_gpdma.h
  • GPDMA_DMACCxControl_SI : lpc17xx_gpdma.h
  • GPDMA_DMACCxControl_SWidth : lpc17xx_gpdma.h
  • GPDMA_DMACCxControl_TransferSize : lpc17xx_gpdma.h
  • GPDMA_DMACCxLLI_BITMASK : lpc17xx_gpdma.h
  • GPDMA_DMACEnbldChns_BITMASK : lpc17xx_gpdma.h
  • GPDMA_DMACEnbldChns_Ch : lpc17xx_gpdma.h
  • GPDMA_DMACIntErrClr_BITMASK : lpc17xx_gpdma.h
  • GPDMA_DMACIntErrClr_Ch : lpc17xx_gpdma.h
  • GPDMA_DMACIntErrStat_BITMASK : lpc17xx_gpdma.h
  • GPDMA_DMACIntErrStat_Ch : lpc17xx_gpdma.h
  • GPDMA_DMACIntStat_BITMASK : lpc17xx_gpdma.h
  • GPDMA_DMACIntStat_Ch : lpc17xx_gpdma.h
  • GPDMA_DMACIntTCClear_BITMASK : lpc17xx_gpdma.h
  • GPDMA_DMACIntTCClear_Ch : lpc17xx_gpdma.h
  • GPDMA_DMACIntTCStat_BITMASK : lpc17xx_gpdma.h
  • GPDMA_DMACIntTCStat_Ch : lpc17xx_gpdma.h
  • GPDMA_DMACRawIntErrStat_BITMASK : lpc17xx_gpdma.h
  • GPDMA_DMACRawIntErrStat_Ch : lpc17xx_gpdma.h
  • GPDMA_DMACRawIntTCStat_BITMASK : lpc17xx_gpdma.h
  • GPDMA_DMACRawIntTCStat_Ch : lpc17xx_gpdma.h
  • GPDMA_DMACSoftBReq_BITMASK : lpc17xx_gpdma.h
  • GPDMA_DMACSoftBReq_Src : lpc17xx_gpdma.h
  • GPDMA_DMACSoftLBReq_BITMASK : lpc17xx_gpdma.h
  • GPDMA_DMACSoftLBReq_Src : lpc17xx_gpdma.h
  • GPDMA_DMACSoftLSReq_BITMASK : lpc17xx_gpdma.h
  • GPDMA_DMACSoftLSReq_Src : lpc17xx_gpdma.h
  • GPDMA_DMACSoftSReq_BITMASK : lpc17xx_gpdma.h
  • GPDMA_DMACSoftSReq_Src : lpc17xx_gpdma.h
  • GPDMA_DMACSync_BITMASK : lpc17xx_gpdma.h
  • GPDMA_DMACSync_Src : lpc17xx_gpdma.h
  • GPDMA_DMAReqSel_BITMASK : lpc17xx_gpdma.h
  • GPDMA_DMAReqSel_Input : lpc17xx_gpdma.h
  • GPDMA_Init() : lpc17xx_gpdma.h
  • GPDMA_IntGetStatus() : lpc17xx_gpdma.h
  • GPDMA_LUTPerAddr : lpc17xx_gpdma.c
  • GPDMA_LUTPerBurst : lpc17xx_gpdma.c
  • GPDMA_LUTPerWid : lpc17xx_gpdma.c
  • GPDMA_REQSEL_TIMER : lpc17xx_gpdma.h
  • GPDMA_REQSEL_UART : lpc17xx_gpdma.h
  • GPDMA_Setup() : lpc17xx_gpdma.h
  • GPDMA_STAT_ENABLED_CH : lpc17xx_gpdma.h
  • GPDMA_STAT_INT : lpc17xx_gpdma.h
  • GPDMA_STAT_INTERR : lpc17xx_gpdma.h
  • GPDMA_STAT_INTTC : lpc17xx_gpdma.h
  • GPDMA_STAT_RAWINTERR : lpc17xx_gpdma.h
  • GPDMA_STAT_RAWINTTC : lpc17xx_gpdma.h
  • GPDMA_STATCLR_INTERR : lpc17xx_gpdma.h
  • GPDMA_STATCLR_INTTC : lpc17xx_gpdma.h
  • GPDMA_StateClear_Type : lpc17xx_gpdma.h
  • GPDMA_Status_Type : lpc17xx_gpdma.h
  • GPDMA_TRANSFERTYPE_M2M : lpc17xx_gpdma.h
  • GPDMA_TRANSFERTYPE_M2P : lpc17xx_gpdma.h
  • GPDMA_TRANSFERTYPE_P2M : lpc17xx_gpdma.h
  • GPDMA_TRANSFERTYPE_P2P : lpc17xx_gpdma.h
  • GPDMA_WIDTH_BYTE : lpc17xx_gpdma.h
  • GPDMA_WIDTH_HALFWORD : lpc17xx_gpdma.h
  • GPDMA_WIDTH_WORD : lpc17xx_gpdma.h
  • GPDMACfg : dac_dma.c , dac_sinewave_test.c
  • GPIO0_Byte : lpc17xx_gpio.h
  • GPIO0_HalfWord : lpc17xx_gpio.h
  • GPIO1_Byte : lpc17xx_gpio.h
  • GPIO1_HalfWord : lpc17xx_gpio.h
  • GPIO2_Byte : lpc17xx_gpio.h
  • GPIO2_HalfWord : lpc17xx_gpio.h
  • GPIO3_Byte : lpc17xx_gpio.h
  • GPIO3_HalfWord : lpc17xx_gpio.h
  • GPIO4_Byte : lpc17xx_gpio.h
  • GPIO4_HalfWord : lpc17xx_gpio.h
  • GPIO_ClearInt() : lpc17xx_gpio.h
  • GPIO_ClearValue() : lpc17xx_gpio.h
  • GPIO_GetIntStatus() : lpc17xx_gpio.h
  • GPIO_INT : gpio_int.c , adc_burst_test.c
  • GPIO_IntCmd() : lpc17xx_gpio.h
  • GPIO_ReadValue() : lpc17xx_gpio.h
  • GPIO_SetDir() : lpc17xx_gpio.h
  • GPIO_SetValue() : lpc17xx_gpio.h
  • Green : GLCD.h
  • GROUP_EXTEND_ENTRY : lpc17xx_can.h
  • GROUP_STANDARD_ENTRY : lpc17xx_can.h
  • GWIP_1 : tcpip.h
  • GWIP_2 : tcpip.h
  • GWIP_3 : tcpip.h
  • GWIP_4 : tcpip.h
Generated on Tue Jun 7 15:00:15 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Data Fields

  • All
  • Functions
  • Variables
  • Typedefs
  • Enumerations
  • Enumerator
  • Defines
  • _
  • a
  • b
  • c
  • d
  • e
  • f
  • g
  • h
  • i
  • k
  • l
  • m
  • n
  • o
  • p
  • q
  • r
  • s
  • t
  • u
  • v
  • w
  • x
  • y
Here is a list of all functions, variables, defines, enums, and typedefs with links to the files they belong to:

- h -

  • H : usb.h
  • HALF_DUPLEX : emac.h
  • HARDW_ETH10 : tcpip.h
  • HEIGHT : GLCD_SPI_LPC1700.c
  • hello_world_appcall() : hello-world.c
  • hello_world_init() : hello-world.c
  • HID_Absolute : hid.h
  • HID_Application : hid.h
  • HID_Array : hid.h
  • HID_Collection : hid.h
  • HID_Constant : hid.h
  • HID_Data : hid.h
  • HID_DESC_OFFSET : usbdesc.h
  • HID_DESC_SIZE : usbdesc.h
  • HID_DESCRIPTOR : hid.h
  • HID_EndCollection : hid.h
  • HID_Feature : hid.h
  • HID_GetIdle() : hiduser.c , hiduser.h
  • HID_GetProtocol() : hiduser.c , hiduser.h
  • HID_GetReport() : hiduser.c , hiduser.h
  • HID_HID_DESCRIPTOR_TYPE : hid.h
  • HID_IdleTime : hiduser.c , hiduser.h
  • HID_Input : hid.h
  • HID_Linear : hid.h
  • HID_Logical : hid.h
  • HID_LogicalMax : hid.h
  • HID_LogicalMaxL : hid.h
  • HID_LogicalMaxS : hid.h
  • HID_LogicalMin : hid.h
  • HID_LogicalMinL : hid.h
  • HID_LogicalMinS : hid.h
  • HID_NamedArray : hid.h
  • HID_NonLinear : hid.h
  • HID_NoNullPosition : hid.h
  • HID_NonVolatile : hid.h
  • HID_NoPreferred : hid.h
  • HID_NoWrap : hid.h
  • HID_NullState : hid.h
  • HID_Output : hid.h
  • HID_Physical : hid.h
  • HID_PHYSICAL_DESCRIPTOR_TYPE : hid.h
  • HID_PhysicalMax : hid.h
  • HID_PhysicalMaxL : hid.h
  • HID_PhysicalMaxS : hid.h
  • HID_PhysicalMin : hid.h
  • HID_PhysicalMinL : hid.h
  • HID_PhysicalMinS : hid.h
  • HID_Pop : hid.h
  • HID_PreferredState : hid.h
  • HID_Protocol : hiduser.c , hiduser.h
  • HID_PROTOCOL_KEYBOARD : hid.h
  • HID_PROTOCOL_MOUSE : hid.h
  • HID_PROTOCOL_NONE : hid.h
  • HID_Push : hid.h
  • HID_Relative : hid.h
  • HID_Report : hid.h
  • HID_REPORT_DESC_SIZE : usbdesc.h
  • HID_REPORT_DESCRIPTOR_TYPE : hid.h
  • HID_REPORT_FEATURE : hid.h
  • HID_REPORT_INPUT : hid.h
  • HID_REPORT_NUM : hiduser.h
  • HID_REPORT_OUTPUT : hid.h
  • HID_ReportCount : hid.h
  • HID_ReportDescriptor : usbdesc.c , usbdesc.h
  • HID_ReportDescSize : usbdesc.c , usbdesc.h
  • HID_ReportID : hid.h
  • HID_ReportSize : hid.h
  • HID_REQUEST_GET_IDLE : hid.h
  • HID_REQUEST_GET_PROTOCOL : hid.h
  • HID_REQUEST_GET_REPORT : hid.h
  • HID_REQUEST_SET_IDLE : hid.h
  • HID_REQUEST_SET_PROTOCOL : hid.h
  • HID_REQUEST_SET_REPORT : hid.h
  • HID_SetIdle() : hiduser.c , hiduser.h
  • HID_SetProtocol() : hiduser.c , hiduser.h
  • HID_SetReport() : hiduser.c , hiduser.h
  • HID_SUBCLASS_BOOT : hid.h
  • HID_SUBCLASS_NONE : hid.h
  • HID_Unit : hid.h
  • HID_UnitExponent : hid.h
  • HID_UnitL : hid.h
  • HID_UnitS : hid.h
  • HID_Usage : hid.h
  • HID_USAGE_CONSUMER_CONTROL : hid.h
  • HID_USAGE_GENERIC_BYTE_COUNT : hid.h
  • HID_USAGE_GENERIC_COUNTED_BUFFER : hid.h
  • HID_USAGE_GENERIC_DIAL : hid.h
  • HID_USAGE_GENERIC_GAMEPAD : hid.h
  • HID_USAGE_GENERIC_HATSWITCH : hid.h
  • HID_USAGE_GENERIC_JOYSTICK : hid.h
  • HID_USAGE_GENERIC_KEYBOARD : hid.h
  • HID_USAGE_GENERIC_KEYPAD : hid.h
  • HID_USAGE_GENERIC_MOTION_WAKEUP : hid.h
  • HID_USAGE_GENERIC_MOUSE : hid.h
  • HID_USAGE_GENERIC_POINTER : hid.h
  • HID_USAGE_GENERIC_RX : hid.h
  • HID_USAGE_GENERIC_RY : hid.h
  • HID_USAGE_GENERIC_RZ : hid.h
  • HID_USAGE_GENERIC_SLIDER : hid.h
  • HID_USAGE_GENERIC_SYSCTL_APP_MENU : hid.h
  • HID_USAGE_GENERIC_SYSCTL_CONTEXT_MENU : hid.h
  • HID_USAGE_GENERIC_SYSCTL_HELP_MENU : hid.h
  • HID_USAGE_GENERIC_SYSCTL_MAIN_MENU : hid.h
  • HID_USAGE_GENERIC_SYSCTL_MENU_DOWN : hid.h
  • HID_USAGE_GENERIC_SYSCTL_MENU_EXIT : hid.h
  • HID_USAGE_GENERIC_SYSCTL_MENU_LEFT : hid.h
  • HID_USAGE_GENERIC_SYSCTL_MENU_RIGHT : hid.h
  • HID_USAGE_GENERIC_SYSCTL_MENU_SELECT : hid.h
  • HID_USAGE_GENERIC_SYSCTL_MENU_UP : hid.h
  • HID_USAGE_GENERIC_SYSCTL_POWER : hid.h
  • HID_USAGE_GENERIC_SYSCTL_SLEEP : hid.h
  • HID_USAGE_GENERIC_SYSCTL_WAKE : hid.h
  • HID_USAGE_GENERIC_SYSTEM_CTL : hid.h
  • HID_USAGE_GENERIC_VBRX : hid.h
  • HID_USAGE_GENERIC_VBRY : hid.h
  • HID_USAGE_GENERIC_VBRZ : hid.h
  • HID_USAGE_GENERIC_VNO : hid.h
  • HID_USAGE_GENERIC_VX : hid.h
  • HID_USAGE_GENERIC_VY : hid.h
  • HID_USAGE_GENERIC_VZ : hid.h
  • HID_USAGE_GENERIC_WHEEL : hid.h
  • HID_USAGE_GENERIC_X : hid.h
  • HID_USAGE_GENERIC_Y : hid.h
  • HID_USAGE_GENERIC_Z : hid.h
  • HID_USAGE_KEYBOARD_aA : hid.h
  • HID_USAGE_KEYBOARD_CAPS_LOCK : hid.h
  • HID_USAGE_KEYBOARD_DELETE : hid.h
  • HID_USAGE_KEYBOARD_ESCAPE : hid.h
  • HID_USAGE_KEYBOARD_F1 : hid.h
  • HID_USAGE_KEYBOARD_F12 : hid.h
  • HID_USAGE_KEYBOARD_LALT : hid.h
  • HID_USAGE_KEYBOARD_LCTRL : hid.h
  • HID_USAGE_KEYBOARD_LGUI : hid.h
  • HID_USAGE_KEYBOARD_LSHFT : hid.h
  • HID_USAGE_KEYBOARD_NOEVENT : hid.h
  • HID_USAGE_KEYBOARD_NUM_LOCK : hid.h
  • HID_USAGE_KEYBOARD_ONE : hid.h
  • HID_USAGE_KEYBOARD_POSTFAIL : hid.h
  • HID_USAGE_KEYBOARD_PRINT_SCREEN : hid.h
  • HID_USAGE_KEYBOARD_RALT : hid.h
  • HID_USAGE_KEYBOARD_RCTRL : hid.h
  • HID_USAGE_KEYBOARD_RETURN : hid.h
  • HID_USAGE_KEYBOARD_RGUI : hid.h
  • HID_USAGE_KEYBOARD_ROLLOVER : hid.h
  • HID_USAGE_KEYBOARD_RSHFT : hid.h
  • HID_USAGE_KEYBOARD_SCROLL_LOCK : hid.h
  • HID_USAGE_KEYBOARD_UNDEFINED : hid.h
  • HID_USAGE_KEYBOARD_ZERO : hid.h
  • HID_USAGE_KEYBOARD_zZ : hid.h
  • HID_USAGE_LED_AMBER : hid.h
  • HID_USAGE_LED_BATTERY_LOW : hid.h
  • HID_USAGE_LED_BATTERY_OK : hid.h
  • HID_USAGE_LED_BATTERY_OPERATION : hid.h
  • HID_USAGE_LED_BUSY : hid.h
  • HID_USAGE_LED_CALL_PICKUP : hid.h
  • HID_USAGE_LED_CAMERA_OFF : hid.h
  • HID_USAGE_LED_CAMERA_ON : hid.h
  • HID_USAGE_LED_CAPS_LOCK : hid.h
  • HID_USAGE_LED_CAV : hid.h
  • HID_USAGE_LED_CLV : hid.h
  • HID_USAGE_LED_COMPOSE : hid.h
  • HID_USAGE_LED_CONFERENCE : hid.h
  • HID_USAGE_LED_COVERAGE : hid.h
  • HID_USAGE_LED_DATA_MODE : hid.h
  • HID_USAGE_LED_DO_NOT_DISTURB : hid.h
  • HID_USAGE_LED_EQUALIZER_ENABLE : hid.h
  • HID_USAGE_LED_ERROR : hid.h
  • HID_USAGE_LED_FAST_BLINK_OFF_TIME : hid.h
  • HID_USAGE_LED_FAST_BLINK_ON_TIME : hid.h
  • HID_USAGE_LED_FAST_FORWARD : hid.h
  • HID_USAGE_LED_FLASH_ON_TIME : hid.h
  • HID_USAGE_LED_FORWARD : hid.h
  • HID_USAGE_LED_GENERIC_INDICATOR : hid.h
  • HID_USAGE_LED_GREEN : hid.h
  • HID_USAGE_LED_HEAD_SET : hid.h
  • HID_USAGE_LED_HIGH_CUT_FILTER : hid.h
  • HID_USAGE_LED_HOLD : hid.h
  • HID_USAGE_LED_IN_USE_INDICATOR : hid.h
  • HID_USAGE_LED_INDICATOR_COLOR : hid.h
  • HID_USAGE_LED_INDICATOR_FAST_BLINK : hid.h
  • HID_USAGE_LED_INDICATOR_FLASH : hid.h
  • HID_USAGE_LED_INDICATOR_OFF : hid.h
  • HID_USAGE_LED_INDICATOR_ON : hid.h
  • HID_USAGE_LED_INDICATOR_SLOW_BLINK : hid.h
  • HID_USAGE_LED_KANA : hid.h
  • HID_USAGE_LED_LOW_CUT_FILTER : hid.h
  • HID_USAGE_LED_MESSAGE_WAITING : hid.h
  • HID_USAGE_LED_MICROPHONE : hid.h
  • HID_USAGE_LED_MULTI_MODE_INDICATOR : hid.h
  • HID_USAGE_LED_MUTE : hid.h
  • HID_USAGE_LED_NIGHT_MODE : hid.h
  • HID_USAGE_LED_NUM_LOCK : hid.h
  • HID_USAGE_LED_OFF_HOOK : hid.h
  • HID_USAGE_LED_OFF_LINE : hid.h
  • HID_USAGE_LED_ON_LINE : hid.h
  • HID_USAGE_LED_PAPER_JAM : hid.h
  • HID_USAGE_LED_PAPER_OUT : hid.h
  • HID_USAGE_LED_PAUSE : hid.h
  • HID_USAGE_LED_PLAY : hid.h
  • HID_USAGE_LED_POWER : hid.h
  • HID_USAGE_LED_READY : hid.h
  • HID_USAGE_LED_RECORD : hid.h
  • HID_USAGE_LED_RECORDING_FORMAT_DET : hid.h
  • HID_USAGE_LED_RED : hid.h
  • HID_USAGE_LED_REMOTE : hid.h
  • HID_USAGE_LED_REPEAT : hid.h
  • HID_USAGE_LED_REVERSE : hid.h
  • HID_USAGE_LED_REWIND : hid.h
  • HID_USAGE_LED_RING : hid.h
  • HID_USAGE_LED_SAMPLING_RATE_DETECT : hid.h
  • HID_USAGE_LED_SCROLL_LOCK : hid.h
  • HID_USAGE_LED_SELECTED_INDICATOR : hid.h
  • HID_USAGE_LED_SEND_CALLS : hid.h
  • HID_USAGE_LED_SHIFT : hid.h
  • HID_USAGE_LED_SLOW_BLINK_OFF_TIME : hid.h
  • HID_USAGE_LED_SLOW_BLINK_ON_TIME : hid.h
  • HID_USAGE_LED_SOUND_FIELD_ON : hid.h
  • HID_USAGE_LED_SPEAKER : hid.h
  • HID_USAGE_LED_SPINNING : hid.h
  • HID_USAGE_LED_STAND_BY : hid.h
  • HID_USAGE_LED_STEREO : hid.h
  • HID_USAGE_LED_STOP : hid.h
  • HID_USAGE_LED_SURROUND_FIELD_ON : hid.h
  • HID_USAGE_LED_TONE_ENABLE : hid.h
  • HID_USAGE_PAGE_ALPHANUMERIC : hid.h
  • HID_USAGE_PAGE_BUTTON : hid.h
  • HID_USAGE_PAGE_CONSUMER : hid.h
  • HID_USAGE_PAGE_DEV_CONTROLS : hid.h
  • HID_USAGE_PAGE_DIGITIZER : hid.h
  • HID_USAGE_PAGE_GAME : hid.h
  • HID_USAGE_PAGE_GENERIC : hid.h
  • HID_USAGE_PAGE_KEYBOARD : hid.h
  • HID_USAGE_PAGE_LED : hid.h
  • HID_USAGE_PAGE_ORDINAL : hid.h
  • HID_USAGE_PAGE_SIMULATION : hid.h
  • HID_USAGE_PAGE_SPORT : hid.h
  • HID_USAGE_PAGE_TELEPHONY : hid.h
  • HID_USAGE_PAGE_UNDEFINED : hid.h
  • HID_USAGE_PAGE_UNICODE : hid.h
  • HID_USAGE_PAGE_VR : hid.h
  • HID_USAGE_SIMULATION_RUDDER : hid.h
  • HID_USAGE_SIMULATION_THROTTLE : hid.h
  • HID_USAGE_TELEPHONY_ANSWERING_MACHINE : hid.h
  • HID_USAGE_TELEPHONY_HANDSET : hid.h
  • HID_USAGE_TELEPHONY_HEADSET : hid.h
  • HID_USAGE_TELEPHONY_KEYPAD : hid.h
  • HID_USAGE_TELEPHONY_MESSAGE_CONTROLS : hid.h
  • HID_USAGE_TELEPHONY_PHONE : hid.h
  • HID_USAGE_TELEPHONY_PROGRAMMABLE_BUTTON : hid.h
  • HID_UsageMax : hid.h
  • HID_UsageMin : hid.h
  • HID_UsageModifier : hid.h
  • HID_UsagePage : hid.h
  • HID_UsagePageVendor : hid.h
  • HID_UsageSwitch : hid.h
  • HID_Variable : hid.h
  • HID_Volatile : hid.h
  • HID_Wrap : hid.h
  • HTONS : uip.h
  • htons() : uip.c , uip.h
  • http_10 : webclient-strings.c , webclient-strings.h , http-strings.c , http-strings.h
  • http_11 : webclient-strings.h , http-strings.c , http-strings.h , webclient-strings.c
  • http_200 : webclient-strings.h , http-strings.c , http-strings.h , webclient-strings.c
  • http_301 : webclient-strings.h , http-strings.c , http-strings.h , webclient-strings.c
  • http_302 : webclient-strings.h , http-strings.c , http-strings.h , webclient-strings.c
  • http_404_html : webclient-strings.c , http-strings.c , webclient-strings.h , http-strings.h
  • http_content_type : http-strings.c , webclient-strings.h , webclient-strings.c , http-strings.h
  • http_content_type_binary : http-strings.h , webclient-strings.c , http-strings.c , webclient-strings.h
  • http_content_type_css : webclient-strings.h , webclient-strings.c , http-strings.c , http-strings.h
  • http_content_type_gif : webclient-strings.h , http-strings.h , http-strings.c , webclient-strings.c
  • http_content_type_html : webclient-strings.h , http-strings.c , http-strings.h , webclient-strings.c
  • http_content_type_jpg : webclient-strings.h , http-strings.c , http-strings.h , webclient-strings.c
  • http_content_type_plain : http-strings.h , http-strings.c
  • http_content_type_png : webclient-strings.c , webclient-strings.h , http-strings.h , http-strings.c
  • http_content_type_text : webclient-strings.h , http-strings.h , http-strings.c , webclient-strings.c
  • http_crnl : http-strings.h , http-strings.c , webclient-strings.c , webclient-strings.h
  • http_css : webclient-strings.h , webclient-strings.c , http-strings.h , http-strings.c
  • http_get : webclient-strings.c , http-strings.h , http-strings.c , webclient-strings.h
  • http_gif : webclient-strings.h , http-strings.h , http-strings.c , webclient-strings.c
  • http_header_200 : http-strings.c , http-strings.h
  • http_header_404 : http-strings.h , http-strings.c
  • http_host : webclient-strings.h , http-strings.h , webclient-strings.c , http-strings.c
  • http_htm : webclient-strings.h , http-strings.c , http-strings.h , webclient-strings.c
  • http_html : http-strings.c , http-strings.h , webclient-strings.c , webclient-strings.h
  • http_http : http-strings.c , webclient-strings.c , webclient-strings.h , http-strings.h
  • http_index_html : webclient-strings.c , webclient-strings.h , http-strings.c , http-strings.h
  • http_jpg : http-strings.h , webclient-strings.c , http-strings.c , webclient-strings.h
  • http_location : http-strings.h , http-strings.c , webclient-strings.h , webclient-strings.c
  • http_png : webclient-strings.h , http-strings.h , webclient-strings.c , http-strings.c
  • http_referer : http-strings.c , http-strings.h
  • HTTP_SEND_PAGE : easyweb.h
  • http_shtml : webclient-strings.h , http-strings.h , webclient-strings.c , http-strings.c
  • http_text : webclient-strings.h , webclient-strings.c , http-strings.h , http-strings.c
  • http_texthtml : http-strings.c , webclient-strings.c , http-strings.h , webclient-strings.h
  • http_txt : webclient-strings.c , http-strings.c , http-strings.h , webclient-strings.h
  • http_user_agent_fields : webclient-strings.c , webclient-strings.h
  • HTTPBytesToSend : easyweb.h
  • httpd_appcall() : httpd.c , httpd.h
  • httpd_cgi() : httpd-cgi.c
  • HTTPD_CGI_CALL() : httpd-cgi.c , httpd-cgi.h , httpd-cgi.c
  • httpd_cgi_init() : httpd-cgi.h
  • httpd_fs_count() : httpd-fs.c , httpd-fs.h
  • httpd_fs_init() : httpd-fs.h , httpd-fs.c
  • HTTPD_FS_NUMFILES : httpd-fsdata.c
  • httpd_fs_open() : httpd-fs.c , httpd-fs.h
  • HTTPD_FS_ROOT : httpd-fsdata.c
  • HTTPD_FS_STATISTICS : httpd-fs.h
  • httpd_init() : httpd.c , httpd.h
  • httpd_log() : httpd.h
  • httpd_log_file() : httpd.h
  • HTTPFLAG_ERROR : webclient.c
  • HTTPFLAG_MOVED : webclient.c
  • HTTPFLAG_NONE : webclient.c
  • HTTPFLAG_OK : webclient.c
  • HTTPServer() : easyweb.c , easyweb.h
  • HTTPStatus : easyweb.h
Generated on Tue Jun 7 15:00:15 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Data Fields

  • All
  • Functions
  • Variables
  • Typedefs
  • Enumerations
  • Enumerator
  • Defines
  • _
  • a
  • b
  • c
  • d
  • e
  • f
  • g
  • h
  • i
  • k
  • l
  • m
  • n
  • o
  • p
  • q
  • r
  • s
  • t
  • u
  • v
  • w
  • x
  • y
Here is a list of all functions, variables, defines, enums, and typedefs with links to the files they belong to:

- i -

  • I2C0_IRQHandler() : i2c_master_slave_int_test.c , i2c_monitor.c , i2c_interrupt_test.c
  • I2C0_IRQn : LPC17xx.h
  • I2C1_IRQn : LPC17xx.h
  • I2C2_IRQHandler() : i2c_master_slave_int_test.c
  • I2C2_IRQn : LPC17xx.h
  • I2C_Cmd() : lpc17xx_i2c.h
  • I2C_DeInit() : lpc17xx_i2c.h
  • I2C_GetLastStatusCode() : lpc17xx_i2c.h
  • I2C_I2ADR_BITMASK : lpc17xx_i2c.h
  • I2C_I2ADR_GC : lpc17xx_i2c.h
  • I2C_I2CONCLR_AAC : lpc17xx_i2c.h
  • I2C_I2CONCLR_I2ENC : lpc17xx_i2c.h
  • I2C_I2CONCLR_SIC : lpc17xx_i2c.h
  • I2C_I2CONCLR_STAC : lpc17xx_i2c.h
  • I2C_I2CONSET_AA : lpc17xx_i2c.h
  • I2C_I2CONSET_I2EN : lpc17xx_i2c.h
  • I2C_I2CONSET_SI : lpc17xx_i2c.h
  • I2C_I2CONSET_STA : lpc17xx_i2c.h
  • I2C_I2CONSET_STO : lpc17xx_i2c.h
  • I2C_I2DAT_BITMASK : lpc17xx_i2c.h
  • I2C_I2DAT_IDLE_CHAR : lpc17xx_i2c.h
  • I2C_I2MASK_MASK : lpc17xx_i2c.h
  • I2C_I2MMCTRL_BITMASK : lpc17xx_i2c.h
  • I2C_I2MMCTRL_ENA_SCL : lpc17xx_i2c.h
  • I2C_I2MMCTRL_MATCH_ALL : lpc17xx_i2c.h
  • I2C_I2MMCTRL_MM_ENA : lpc17xx_i2c.h
  • I2C_I2SCLH_BITMASK : lpc17xx_i2c.h
  • I2C_I2SCLL_BITMASK : lpc17xx_i2c.h
  • I2C_I2STAT_M_RX_ARB_LOST : lpc17xx_i2c.h
  • I2C_I2STAT_M_RX_DAT_ACK : lpc17xx_i2c.h
  • I2C_I2STAT_M_RX_DAT_NACK : lpc17xx_i2c.h
  • I2C_I2STAT_M_RX_RESTART : lpc17xx_i2c.h
  • I2C_I2STAT_M_RX_SLAR_ACK : lpc17xx_i2c.h
  • I2C_I2STAT_M_RX_SLAR_NACK : lpc17xx_i2c.h
  • I2C_I2STAT_M_RX_START : lpc17xx_i2c.h
  • I2C_I2STAT_M_TX_ARB_LOST : lpc17xx_i2c.h
  • I2C_I2STAT_M_TX_DAT_ACK : lpc17xx_i2c.h
  • I2C_I2STAT_M_TX_DAT_NACK : lpc17xx_i2c.h
  • I2C_I2STAT_M_TX_RESTART : lpc17xx_i2c.h
  • I2C_I2STAT_M_TX_SLAW_ACK : lpc17xx_i2c.h
  • I2C_I2STAT_M_TX_SLAW_NACK : lpc17xx_i2c.h
  • I2C_I2STAT_M_TX_START : lpc17xx_i2c.h
  • I2C_I2STAT_NO_INF : lpc17xx_i2c.h
  • I2C_I2STAT_S_RX_ARB_LOST_M_GENCALL : lpc17xx_i2c.h
  • I2C_I2STAT_S_RX_ARB_LOST_M_SLA : lpc17xx_i2c.h
  • I2C_I2STAT_S_RX_GENCALL_ACK : lpc17xx_i2c.h
  • I2C_I2STAT_S_RX_PRE_GENCALL_DAT_ACK : lpc17xx_i2c.h
  • I2C_I2STAT_S_RX_PRE_GENCALL_DAT_NACK : lpc17xx_i2c.h
  • I2C_I2STAT_S_RX_PRE_SLA_DAT_ACK : lpc17xx_i2c.h
  • I2C_I2STAT_S_RX_PRE_SLA_DAT_NACK : lpc17xx_i2c.h
  • I2C_I2STAT_S_RX_SLAW_ACK : lpc17xx_i2c.h
  • I2C_I2STAT_S_RX_STA_STO_SLVREC_SLVTRX : lpc17xx_i2c.h
  • I2C_I2STAT_S_TX_ARB_LOST_M_SLA : lpc17xx_i2c.h
  • I2C_I2STAT_S_TX_DAT_ACK : lpc17xx_i2c.h
  • I2C_I2STAT_S_TX_DAT_NACK : lpc17xx_i2c.h
  • I2C_I2STAT_S_TX_LAST_DAT_ACK : lpc17xx_i2c.h
  • I2C_I2STAT_S_TX_SLAR_ACK : lpc17xx_i2c.h
  • I2C_Init() : lpc17xx_i2c.h
  • I2C_IntCmd() : lpc17xx_i2c.h
  • I2C_MasterHandler() : lpc17xx_i2c.h
  • I2C_MasterTransferComplete() : lpc17xx_i2c.h
  • I2C_MasterTransferData() : lpc17xx_i2c.h
  • I2C_MONITOR_CFG_MATCHALL : lpc17xx_i2c.h
  • I2C_MONITOR_CFG_SCL_OUTPUT : lpc17xx_i2c.h
  • I2C_MonitorGetDatabuffer() : lpc17xx_i2c.h
  • I2C_MonitorHandler() : lpc17xx_i2c.h
  • I2C_MonitorModeCmd() : lpc17xx_i2c.h
  • I2C_MonitorModeConfig() : lpc17xx_i2c.h
  • I2C_SetOwnSlaveAddr() : lpc17xx_i2c.h
  • I2C_SETUP_STATUS_ARBF : lpc17xx_i2c.h
  • I2C_SETUP_STATUS_DONE : lpc17xx_i2c.h
  • I2C_SETUP_STATUS_NOACKF : lpc17xx_i2c.h
  • I2C_SLAVE_TIME_OUT : lpc17xx_i2c.h
  • I2C_SlaveHandler() : lpc17xx_i2c.h
  • I2C_SlaveTransferComplete() : lpc17xx_i2c.h
  • I2C_SlaveTransferData() : lpc17xx_i2c.h
  • I2C_STAT_CODE_BITMASK : lpc17xx_i2c.h
  • I2C_TRANSFER_INTERRUPT : lpc17xx_i2c.h
  • I2C_TRANSFER_OPT_Type : lpc17xx_i2c.h
  • I2C_TRANSFER_POLLING : lpc17xx_i2c.h
  • I2CDEV : i2c_monitor.c , pca8581_test.c , i2c_interrupt_test.c , i2c_polling_test.c
  • I2CDEV_M : master.c , i2c_master_slave_int_test.c
  • I2CDEV_S : i2c_master_slave_int_test.c , slave.c
  • I2CDEV_S_ADDR : master.c
  • I2CDEV_S_OWN_ADDR : i2c_master_slave_int_test.c , slave.c
  • I2DATA_BUFFER_BITMASK : lpc17xx_i2c.h
  • I2S_4PIN_DISABLE : lpc17xx_i2s.h
  • I2S_4PIN_ENABLE : lpc17xx_i2s.h
  • I2S_BUFFER_DST : i2s_irq_test.c , i2s_mclk.c , i2s_test_4_wire.c , i2s_polling.c
  • I2S_BUFFER_SRC : i2s_irq_test.c , i2s_mclk.c , i2s_test_4_wire.c , i2s_polling.c
  • I2S_CLKSEL_FRDCLK : lpc17xx_i2s.h
  • I2S_CLKSEL_MCLK : lpc17xx_i2s.h
  • I2S_Config() : lpc17xx_i2s.h
  • I2S_DAI_MONO : lpc17xx_i2s.h
  • I2S_DAI_MUTE : lpc17xx_i2s.h
  • I2S_DAI_RESET : lpc17xx_i2s.h
  • I2S_DAI_SLAVE : lpc17xx_i2s.h
  • I2S_DAI_STOP : lpc17xx_i2s.h
  • I2S_DAI_WORDWIDTH_16 : lpc17xx_i2s.h
  • I2S_DAI_WORDWIDTH_32 : lpc17xx_i2s.h
  • I2S_DAI_WORDWIDTH_8 : lpc17xx_i2s.h
  • I2S_DAI_WS_HALFPERIOD : lpc17xx_i2s.h
  • I2S_DAO_MONO : lpc17xx_i2s.h
  • I2S_DAO_MUTE : lpc17xx_i2s.h
  • I2S_DAO_RESET : lpc17xx_i2s.h
  • I2S_DAO_SLAVE : lpc17xx_i2s.h
  • I2S_DAO_STOP : lpc17xx_i2s.h
  • I2S_DAO_WORDWIDTH_16 : lpc17xx_i2s.h
  • I2S_DAO_WORDWIDTH_32 : lpc17xx_i2s.h
  • I2S_DAO_WORDWIDTH_8 : lpc17xx_i2s.h
  • I2S_DAO_WS_HALFPERIOD : lpc17xx_i2s.h
  • I2S_DeInit() : lpc17xx_i2s.h
  • I2S_DMA1_RX_DEPTH : lpc17xx_i2s.h
  • I2S_DMA1_RX_ENABLE : lpc17xx_i2s.h
  • I2S_DMA1_TX_DEPTH : lpc17xx_i2s.h
  • I2S_DMA1_TX_ENABLE : lpc17xx_i2s.h
  • I2S_DMA2_RX_DEPTH : lpc17xx_i2s.h
  • I2S_DMA2_RX_ENABLE : lpc17xx_i2s.h
  • I2S_DMA2_TX_DEPTH : lpc17xx_i2s.h
  • I2S_DMA2_TX_ENABLE : lpc17xx_i2s.h
  • I2S_DMA_1 : lpc17xx_i2s.h
  • I2S_DMA_2 : lpc17xx_i2s.h
  • I2S_DMACmd() : lpc17xx_i2s.h
  • I2S_DMAConfig() : lpc17xx_i2s.h
  • I2S_FreqConfig() : lpc17xx_i2s.h
  • I2S_GetIRQDepth() : lpc17xx_i2s.h
  • I2S_GetIRQStatus() : lpc17xx_i2s.h
  • I2S_GetLevel() : lpc17xx_i2s.h
  • I2S_Init() : lpc17xx_i2s.h
  • I2S_IRQ_RX_DEPTH : lpc17xx_i2s.h
  • I2S_IRQ_RX_ENABLE : lpc17xx_i2s.h
  • I2S_IRQ_TX_DEPTH : lpc17xx_i2s.h
  • I2S_IRQ_TX_ENABLE : lpc17xx_i2s.h
  • I2S_IRQCmd() : lpc17xx_i2s.h
  • I2S_IRQConfig() : lpc17xx_i2s.h
  • I2S_IRQHandler() : i2s_irq_test.c , i2s_mclk.c , i2s_two_kit.c
  • I2S_IRQn : LPC17xx.h
  • I2S_MASTER_MODE : lpc17xx_i2s.h
  • I2S_MCLK_DISABLE : lpc17xx_i2s.h
  • I2S_MCLK_ENABLE : lpc17xx_i2s.h
  • I2S_ModeConfig() : lpc17xx_i2s.h
  • I2S_MONO : lpc17xx_i2s.h
  • I2S_Mute() : lpc17xx_i2s.h
  • I2S_MUTE_DISABLE : lpc17xx_i2s.h
  • I2S_MUTE_ENABLE : lpc17xx_i2s.h
  • I2S_Pause() : lpc17xx_i2s.h
  • I2S_RECEIVE : i2s_two_kit.c
  • I2S_Receive() : lpc17xx_i2s.h
  • I2S_RESET_DISABLE : lpc17xx_i2s.h
  • I2S_RESET_ENABLE : lpc17xx_i2s.h
  • I2S_RX_MODE : lpc17xx_i2s.h
  • I2S_RXBITRATE : lpc17xx_i2s.h
  • I2S_RXMODE_4PIN_ENABLE : lpc17xx_i2s.h
  • I2S_RXMODE_CLKSEL : lpc17xx_i2s.h
  • I2S_RXMODE_MCENA : lpc17xx_i2s.h
  • I2S_RXRATE_X_DIVIDER : lpc17xx_i2s.h
  • I2S_RXRATE_Y_DIVIDER : lpc17xx_i2s.h
  • I2S_Send() : lpc17xx_i2s.h
  • I2S_SetBitRate() : lpc17xx_i2s.h
  • I2S_SLAVE_MODE : lpc17xx_i2s.h
  • I2S_Start() : lpc17xx_i2s.h
  • I2S_STATE_DMA1 : lpc17xx_i2s.h
  • I2S_STATE_DMA2 : lpc17xx_i2s.h
  • I2S_STATE_IRQ : lpc17xx_i2s.h
  • I2S_STATE_RX_LEVEL : lpc17xx_i2s.h
  • I2S_STATE_TX_LEVEL : lpc17xx_i2s.h
  • I2S_STEREO : lpc17xx_i2s.h
  • I2S_Stop() : lpc17xx_i2s.h
  • I2S_STOP_DISABLE : lpc17xx_i2s.h
  • I2S_STOP_ENABLE : lpc17xx_i2s.h
  • I2S_TRANSMIT : i2s_two_kit.c
  • I2S_TX_MODE : lpc17xx_i2s.h
  • I2S_TXBITRATE : lpc17xx_i2s.h
  • I2S_TXMODE_4PIN_ENABLE : lpc17xx_i2s.h
  • I2S_TXMODE_CLKSEL : lpc17xx_i2s.h
  • I2S_TXMODE_MCENA : lpc17xx_i2s.h
  • I2S_TXRATE_X_DIVIDER : lpc17xx_i2s.h
  • I2S_TXRATE_Y_DIVIDER : lpc17xx_i2s.h
  • I2S_WORDWIDTH_16 : lpc17xx_i2s.h
  • I2S_WORDWIDTH_32 : lpc17xx_i2s.h
  • I2S_WORDWIDTH_8 : lpc17xx_i2s.h
  • I2SReadLength : i2s_irq_test.c , i2s_mclk.c , i2s_test_4_wire.c , i2s_polling.c
  • I2SRXBuffer : i2s_dma_test.c , i2s_irq_test.c , i2s_mclk.c , i2s_test_4_wire.c , i2s_polling.c
  • I2SRXDone : i2s_irq_test.c , i2s_mclk.c , i2s_test_4_wire.c , i2s_polling.c
  • I2STXBuffer : i2s_dma_test.c , i2s_irq_test.c , i2s_mclk.c , i2s_test_4_wire.c , i2s_polling.c
  • I2STXDone : i2s_irq_test.c , i2s_mclk.c , i2s_test_4_wire.c , i2s_polling.c
  • I2SWriteLength : i2s_irq_test.c , i2s_mclk.c , i2s_test_4_wire.c , i2s_polling.c
  • IAR_LPC_1768 : privilege.c , extint_sleep.c , wdt_reset_test.c
  • ICMP6_ECHO : uip.c
  • ICMP6_ECHO_REPLY : uip.c
  • ICMP6_FLAG_S : uip.c
  • ICMP6_NEIGHBOR_ADVERTISEMENT : uip.c
  • ICMP6_NEIGHBOR_SOLICITATION : uip.c
  • ICMP6_OPTION_SOURCE_LINK_ADDRESS : uip.c
  • ICMP6_OPTION_TARGET_LINK_ADDRESS : uip.c
  • ICMP_CHKSUM_OFS : tcpip.h
  • ICMP_DATA_OFS : tcpip.h
  • ICMP_ECHO : tcpip.h , uip-fw.c , uip.c
  • ICMP_ECHO_REPLY : tcpip.h , uip.c
  • ICMP_HEADER_SIZE : tcpip.h
  • ICMP_TE : uip-fw.c
  • ICMP_TYPE_CODE_OFS : tcpip.h
  • ICMPBUF : uip-fw.c , uip.c
  • iConfiguration : usb.h
  • ID_11 : lpc17xx_can.h
  • IDLE_CHAR : spi_interrupt_test.c , microwire_test.c , sc16is750_int.c , ti_test.c
  • IDMOFF : drv_glcd.h
  • IDMON : drv_glcd.h
  • idProduct : usb.h
  • idVendor : usb.h
  • iInterface : usb.h
  • iManufacturer : usb.h
  • INACTIVE : lpc17xx_uart.h
  • INAK_BI : usbreg.h
  • INAK_BO : usbreg.h
  • INAK_CI : usbreg.h
  • INAK_CO : usbreg.h
  • INAK_II : usbreg.h
  • INAK_IO : usbreg.h
  • info1 : wdt_interrupt_test.c , wdt_reset_test.c
  • info2 : wdt_interrupt_test.c , wdt_reset_test.c
  • InfoBuf : usbdmain.c , usbaudio.h
  • Init_EMAC() : EMAC.c , EMAC.h
  • init_serial() : Serial.c
  • InitLED() : extint_sleep.c
  • InitOsc() : easyweb.h
  • InitPorts() : easyweb.h
  • InReport : demo.h , demo.c
  • InsertDynamicValues() : easyweb.c , easyweb.h
  • INT3_LED : gpio_int.c
  • INT_16 : lpc_types.h
  • INT_32 : lpc_types.h
  • INT_64 : lpc_types.h
  • INT_8 : lpc_types.h
  • INT_MODE : nvic_priority.c
  • InterruptType : core_cm3.h
  • IntStatus : lpc_types.h
  • IntType_ACTLR_DISDEFWBUF_Msk : core_cm3.h
  • IntType_ACTLR_DISDEFWBUF_Pos : core_cm3.h
  • IntType_ACTLR_DISFOLD_Msk : core_cm3.h
  • IntType_ACTLR_DISFOLD_Pos : core_cm3.h
  • IntType_ACTLR_DISMCYCINT_Msk : core_cm3.h
  • IntType_ACTLR_DISMCYCINT_Pos : core_cm3.h
  • IntType_ICTR_INTLINESNUM_Msk : core_cm3.h
  • IntType_ICTR_INTLINESNUM_Pos : core_cm3.h
  • INVOFF : drv_glcd.h
  • INVON : drv_glcd.h
  • IO_State : systick_stclk.c
  • IOCON : i2c_interrupt_test.c , i2c_polling_test.c
  • iocon_cfg : spi_polling_test.c , i2c_polling_test.c , spi_interrupt_test.c , sc16is750_polling.c , sc16is750_int.c , i2c_interrupt_test.c
  • IODIR : i2c_interrupt_test.c , i2c_polling_test.c
  • iodir_cfg : i2c_polling_test.c , spi_polling_test.c , sc16is750_polling.c , sc16is750_int.c , i2c_interrupt_test.c , spi_interrupt_test.c
  • IOSTATE : i2c_interrupt_test.c , i2c_polling_test.c
  • iostate_cfg_0 : i2c_polling_test.c , i2c_interrupt_test.c
  • iostate_cfg_1 : i2c_interrupt_test.c , i2c_polling_test.c
  • iostate_off : spi_interrupt_test.c , sc16is750_int.c , spi_polling_test.c , sc16is750_polling.c
  • iostate_on : spi_polling_test.c , sc16is750_polling.c , sc16is750_int.c , spi_interrupt_test.c
  • IP_ADDR_RESOLVED : tcpip.h
  • IP_DATA_OFS : tcpip.h
  • IP_DESTINATION_OFS : tcpip.h
  • IP_FLAG_DONTFRAG : tcpip.h
  • IP_FLAG_MOREFRAG : tcpip.h
  • IP_FLAGS_FRAG_OFS : tcpip.h
  • IP_FRAGOFS_MASK : tcpip.h
  • IP_HEAD_CHKSUM_OFS : tcpip.h
  • IP_HEADER_SIZE : tcpip.h
  • IP_HLEN_PLEN : tcpip.h
  • IP_IDENT_OFS : tcpip.h
  • IP_SOURCE_OFS : tcpip.h
  • IP_TOS_D : tcpip.h
  • IP_TOS_R : tcpip.h
  • IP_TOS_T : tcpip.h
  • IP_TOTAL_LENGTH_OFS : tcpip.h
  • IP_TTL_PROT_OFS : tcpip.h
  • IP_VER_IHL : tcpip.h
  • IP_VER_IHL_TOS_OFS : tcpip.h
  • IPBUF : uip_arp.c
  • iProduct : usb.h
  • IRC_OSC : system_LPC17xx.c
  • IRQn : LPC17xx.h
  • IRQn_Type : LPC17xx.h
  • IsBroadcast() : tcpip.c
  • iSerialNumber : usb.h
  • ISNGenHigh : tcpip.h
  • ISO_2 : smtp.c
  • ISO_3 : smtp.c
  • ISO_4 : smtp.c
  • ISO_5 : smtp.c
  • ISO_bang : httpd.c
  • ISO_colon : httpd.c
  • ISO_cr : telnetd.c , webclient.c , smtp.c
  • ISO_nl : smtp.c , telnetd.c , webclient.c , httpd.c
  • ISO_percent : httpd.c
  • ISO_period : smtp.c , httpd.c
  • ISO_slash : httpd.c
  • ISO_space : httpd.c , webclient.c
  • ITM : core_cm3.h
  • ITM_BASE : core_cm3.h
  • ITM_IMCR_INTEGRATION_Msk : core_cm3.h
  • ITM_IMCR_INTEGRATION_Pos : core_cm3.h
  • ITM_IRR_ATREADYM_Msk : core_cm3.h
  • ITM_IRR_ATREADYM_Pos : core_cm3.h
  • ITM_IWR_ATVALIDM_Msk : core_cm3.h
  • ITM_IWR_ATVALIDM_Pos : core_cm3.h
  • ITM_LSR_Access_Msk : core_cm3.h
  • ITM_LSR_Access_Pos : core_cm3.h
  • ITM_LSR_ByteAcc_Msk : core_cm3.h
  • ITM_LSR_ByteAcc_Pos : core_cm3.h
  • ITM_LSR_Present_Msk : core_cm3.h
  • ITM_LSR_Present_Pos : core_cm3.h
  • ITM_RxBuffer : core_cm3.h
  • ITM_RXBUFFER_EMPTY : core_cm3.h
  • ITM_TCR_ATBID_Msk : core_cm3.h
  • ITM_TCR_ATBID_Pos : core_cm3.h
  • ITM_TCR_BUSY_Msk : core_cm3.h
  • ITM_TCR_BUSY_Pos : core_cm3.h
  • ITM_TCR_DWTENA_Msk : core_cm3.h
  • ITM_TCR_DWTENA_Pos : core_cm3.h
  • ITM_TCR_ITMENA_Msk : core_cm3.h
  • ITM_TCR_ITMENA_Pos : core_cm3.h
  • ITM_TCR_SWOENA_Msk : core_cm3.h
  • ITM_TCR_SWOENA_Pos : core_cm3.h
  • ITM_TCR_SYNCENA_Msk : core_cm3.h
  • ITM_TCR_SYNCENA_Pos : core_cm3.h
  • ITM_TCR_TSENA_Msk : core_cm3.h
  • ITM_TCR_TSENA_Pos : core_cm3.h
  • ITM_TCR_TSPrescale_Msk : core_cm3.h
  • ITM_TCR_TSPrescale_Pos : core_cm3.h
  • ITM_TPR_PRIVMASK_Msk : core_cm3.h
  • ITM_TPR_PRIVMASK_Pos : core_cm3.h
Generated on Tue Jun 7 15:00:15 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Data Fields

  • All
  • Functions
  • Variables
  • Typedefs
  • Enumerations
  • Enumerator
  • Defines
  • _
  • a
  • b
  • c
  • d
  • e
  • f
  • g
  • h
  • i
  • k
  • l
  • m
  • n
  • o
  • p
  • q
  • r
  • s
  • t
  • u
  • v
  • w
  • x
  • y
Here is a list of all functions, variables, defines, enums, and typedefs with links to the files they belong to:

- p -

  • P_C : usbaudio.h
  • P_EP : usbuser.c
  • p_err_menu : rs485_master.c , rs485_slave.c
  • P_S : usbaudio.h
  • PacketGen() : emactest.c
  • PacketReceived : emactest.c
  • PAD_RIGHT : printf-stdarg.c
  • PAD_ZERO : printf-stdarg.c
  • PARAM_ADC_CHANNEL_SELECTION : lpc17xx_adc.h
  • PARAM_ADC_DATA_STATUS : lpc17xx_adc.h
  • PARAM_ADC_RATE : lpc17xx_adc.h
  • PARAM_ADC_START_ON_EDGE_OPT : lpc17xx_adc.h
  • PARAM_ADC_START_OPT : lpc17xx_adc.h
  • PARAM_ADC_TYPE_INT_OPT : lpc17xx_adc.h
  • PARAM_ADCx : lpc17xx_adc.h
  • PARAM_AFLUT_ENTRY_TYPE : lpc17xx_can.h
  • PARAM_AFMODE_TYPE : lpc17xx_can.h
  • PARAM_CANAFRAMx : lpc17xx_can.h
  • PARAM_CANAFx : lpc17xx_can.h
  • PARAM_CANCRx : lpc17xx_can.h
  • PARAM_CANx : lpc17xx_can.h
  • PARAM_CR_STS_TYPE : lpc17xx_can.h
  • PARAM_CTRL : lpc17xx_can.h
  • PARAM_CTRL_STS_TYPE : lpc17xx_can.h
  • PARAM_DAC_CURRENT_OPT : lpc17xx_dac.h
  • PARAM_DACx : lpc17xx_dac.h
  • PARAM_DLC : lpc17xx_can.h
  • PARAM_FRAME_TYPE : lpc17xx_can.h
  • PARAM_FULLCAN_IC : lpc17xx_can.h
  • PARAM_FUNCTIONALSTATE : lpc_types.h
  • PARAM_GPDMA_BSIZE : lpc17xx_gpdma.h
  • PARAM_GPDMA_CHANNEL : lpc17xx_gpdma.h
  • PARAM_GPDMA_CONN : lpc17xx_gpdma.h
  • PARAM_GPDMA_REQSEL : lpc17xx_gpdma.h
  • PARAM_GPDMA_STAT : lpc17xx_gpdma.h
  • PARAM_GPDMA_STATCLR : lpc17xx_gpdma.h
  • PARAM_GPDMA_TRANSFERTYPE : lpc17xx_gpdma.h
  • PARAM_GPDMA_WIDTH : lpc17xx_gpdma.h
  • PARAM_GRP_ID : lpc17xx_can.h
  • PARAM_I2C_MONITOR_CFG : lpc17xx_i2c.h
  • PARAM_I2C_SLAVEADDR_CH : lpc17xx_i2c.h
  • PARAM_I2Cx : lpc17xx_i2c.h
  • PARAM_I2S_4PIN : lpc17xx_i2s.h
  • PARAM_I2S_BITRATE : lpc17xx_i2s.h
  • PARAM_I2S_CHANNEL : lpc17xx_i2s.h
  • PARAM_I2S_CLKSEL : lpc17xx_i2s.h
  • PARAM_I2S_DATA : lpc17xx_can.h
  • PARAM_I2S_DMA : lpc17xx_i2s.h
  • PARAM_I2S_DMA_DEPTH : lpc17xx_i2s.h
  • PARAM_I2S_HALFPERIOD : lpc17xx_i2s.h
  • PARAM_I2S_IRQ_LEVEL : lpc17xx_i2s.h
  • PARAM_I2S_MCLK : lpc17xx_i2s.h
  • PARAM_I2S_MUTE : lpc17xx_i2s.h
  • PARAM_I2S_RESET : lpc17xx_i2s.h
  • PARAM_I2S_STOP : lpc17xx_i2s.h
  • PARAM_I2S_TRX : lpc17xx_i2s.h
  • PARAM_I2S_WORDWIDTH : lpc17xx_i2s.h
  • PARAM_I2S_WS_SEL : lpc17xx_i2s.h
  • PARAM_I2Sx : lpc17xx_i2s.h
  • PARAM_ID_11 : lpc17xx_can.h
  • PARAM_ID_29 : lpc17xx_can.h
  • PARAM_ID_FORMAT : lpc17xx_can.h
  • PARAM_INT_EN_TYPE : lpc17xx_can.h
  • PARAM_MODE_TYPE : lpc17xx_can.h
  • PARAM_MSG_DISABLE : lpc17xx_can.h
  • PARAM_POSITION : lpc17xx_can.h
  • PARAM_PWM1_CAPTURE_CHANNEL : lpc17xx_pwm.h
  • PARAM_PWM1_CHANNEL : lpc17xx_pwm.h
  • PARAM_PWM1_EDGE_MODE_CHANNEL : lpc17xx_pwm.h
  • PARAM_PWM1_MATCH_CHANNEL : lpc17xx_pwm.h
  • PARAM_PWM_CHANNEL_EDGE : lpc17xx_pwm.h
  • PARAM_PWM_COUNTER_EDGE : lpc17xx_pwm.h
  • PARAM_PWM_COUNTER_INPUTSEL : lpc17xx_pwm.h
  • PARAM_PWM_INTSTAT : lpc17xx_pwm.h
  • PARAM_PWM_MATCH_UPDATE : lpc17xx_pwm.h
  • PARAM_PWM_TC_MODE : lpc17xx_pwm.h
  • PARAM_PWM_TIMER_PRESCALE : lpc17xx_pwm.h
  • PARAM_PWMx : lpc17xx_pwm.h
  • PARAM_QEI_CAPMODE : lpc17xx_qei.h
  • PARAM_QEI_COMPPOS_CH : lpc17xx_qei.h
  • PARAM_QEI_DIRINV : lpc17xx_qei.h
  • PARAM_QEI_INTFLAG : lpc17xx_qei.h
  • PARAM_QEI_INVINX : lpc17xx_qei.h
  • PARAM_QEI_RESET : lpc17xx_qei.h
  • PARAM_QEI_SIGNALMODE : lpc17xx_qei.h
  • PARAM_QEI_STATUS : lpc17xx_qei.h
  • PARAM_QEI_TIMERRELOAD : lpc17xx_qei.h
  • PARAM_QEIx : lpc17xx_qei.h
  • PARAM_RITx : lpc17xx_rit.h
  • PARAM_RTC_CALIB_DIR : lpc17xx_rtc.h
  • PARAM_RTC_GPREG_CH : lpc17xx_rtc.h
  • PARAM_RTC_INT : lpc17xx_rtc.h
  • PARAM_RTC_TIMETYPE : lpc17xx_rtc.h
  • PARAM_RTCx : lpc17xx_rtc.h
  • PARAM_SETSTATE : lpc_types.h
  • PARAM_SPI_CPHA : lpc17xx_spi.h
  • PARAM_SPI_CPOL : lpc17xx_spi.h
  • PARAM_SPI_DATA_ORDER : lpc17xx_spi.h
  • PARAM_SPI_DATABIT : lpc17xx_spi.h
  • PARAM_SPI_MODE : lpc17xx_spi.h
  • PARAM_SPI_STAT : lpc17xx_spi.h
  • PARAM_SPIx : lpc17xx_spi.h
  • PARAM_SSP_CPHA : lpc17xx_ssp.h
  • PARAM_SSP_CPOL : lpc17xx_ssp.h
  • PARAM_SSP_DATABIT : lpc17xx_ssp.h
  • PARAM_SSP_DMA : lpc17xx_ssp.h
  • PARAM_SSP_FRAME : lpc17xx_ssp.h
  • PARAM_SSP_INTCFG : lpc17xx_ssp.h
  • PARAM_SSP_INTCLR : lpc17xx_ssp.h
  • PARAM_SSP_INTSTAT : lpc17xx_ssp.h
  • PARAM_SSP_INTSTAT_RAW : lpc17xx_ssp.h
  • PARAM_SSP_MODE : lpc17xx_ssp.h
  • PARAM_SSP_STAT : lpc17xx_ssp.h
  • PARAM_SSPx : lpc17xx_ssp.h
  • PARAM_TIM_CAP_MODE_OPT : lpc17xx_timer.h
  • PARAM_TIM_COUNTER_INPUT_OPT : lpc17xx_timer.h
  • PARAM_TIM_EXTMATCH_OPT : lpc17xx_timer.h
  • PARAM_TIM_INT_TYPE : lpc17xx_timer.h
  • PARAM_TIM_MODE_OPT : lpc17xx_timer.h
  • PARAM_TIM_PRESCALE_OPT : lpc17xx_timer.h
  • PARAM_TIMx : lpc17xx_timer.h
  • PARAM_UART1_INTCFG : lpc17xx_uart.h
  • PARAM_UART1_MODEM : lpc17xx_uart.h
  • PARAM_UART1_MODEM_MODE : lpc17xx_uart.h
  • PARAM_UART1_MODEM_PIN : lpc17xx_uart.h
  • PARAM_UART1_RS485_CFG_DELAYVALUE : lpc17xx_uart.h
  • PARAM_UART1_RS485_CFG_MATCHADDRVALUE : lpc17xx_uart.h
  • PARAM_UART1_SIGNALSTATE : lpc17xx_uart.h
  • PARAM_UART_AUTOBAUD_INTSTAT : lpc17xx_uart.h
  • PARAM_UART_AUTOBAUD_MODE : lpc17xx_uart.h
  • PARAM_UART_DATABIT : lpc17xx_uart.h
  • PARAM_UART_FIFO_LEVEL : lpc17xx_uart.h
  • PARAM_UART_INTCFG : lpc17xx_uart.h
  • PARAM_UART_IrDA : lpc17xx_uart.h
  • PARAM_UART_IrDA_PULSEDIV : lpc17xx_uart.h
  • PARAM_UART_PARITY : lpc17xx_uart.h
  • PARAM_UART_RS485_DIRCTRL_PIN : lpc17xx_uart.h
  • PARAM_UART_STOPBIT : lpc17xx_uart.h
  • PARAM_UARTx : lpc17xx_uart.h
  • PARAM_WDT_CLK_OPT : lpc17xx_wdt.h
  • PARAM_WDT_MODE_OPT : lpc17xx_wdt.h
  • pASCSET_Data_t : drv_glcd.h
  • PBINT : demo.h
  • pBmp_t : drv_glcd.h
  • pca8581_rddat : pca8581_test.c
  • PCA8581_Read() : pca8581_test.c
  • PCA8581_SLVADDR : pca8581_test.c
  • pca8581_wrdat : pca8581_test.c
  • PCA8581_Write() : pca8581_test.c
  • PCF8833_ST_ADDR_MODE : drv_glcd.h
  • PCF8833_ST_ALL_PIXELS_OFF : drv_glcd.h
  • PCF8833_ST_ALL_PIXELS_ON : drv_glcd.h
  • PCF8833_ST_BOOSTER_ON : drv_glcd.h
  • PCF8833_ST_DISPLAY_MODE : drv_glcd.h
  • PCF8833_ST_IDLE_MODE : drv_glcd.h
  • PCF8833_ST_INV_MODE : drv_glcd.h
  • PCF8833_ST_LINE_ADDR_ORD : drv_glcd.h
  • PCF8833_ST_NORM_MODE : drv_glcd.h
  • PCF8833_ST_PARTIAL_MODE : drv_glcd.h
  • PCF8833_ST_PIXEL_FORM : drv_glcd.h
  • PCF8833_ST_RGB_ORD : drv_glcd.h
  • PCF8833_ST_SLEEP_MODE : drv_glcd.h
  • PCF8833_ST_TEARING_MODE : drv_glcd.h
  • PCF8833_ST_V_SCROLL_MODE : drv_glcd.h
  • PCF8833_ST_X_ADDR_ODR : drv_glcd.h
  • PCF8833_ST_Y_ADDR_ODR : drv_glcd.h
  • PCLK_DAC_IN_MHZ : dac_sinewave_test.c , dac_wave_generate.c
  • PCLKSEL0_Val : system_LPC17xx.c
  • PCLKSEL1_Val : system_LPC17xx.c
  • pCOLMOD_Data_t : drv_glcd.h
  • PCONP_Val : system_LPC17xx.c
  • PD_LED_PIN : emactest.c
  • pDATCTR_Data_t : drv_glcd.h
  • PendSV_IRQn : LPC17xx.h
  • PERI_ADDRESS : bitband.c
  • PERI_BIT : bitband.c
  • PFI : lpc_types.h
  • pFontType_t : drv_glcd.h
  • PFV : lpc_types.h
  • pGLCD_CmdCtrl_t : drv_glcd.h
  • pGPDMACh : lpc17xx_gpdma.c
  • PHASE_A_PIN : qei_test_velo.c
  • PHASE_B_PIN : qei_test_velo.c
  • PhaseCnt : qei_test_velo.c
  • PHY_TO : emac.h
  • PIN_CS : GLCD_SPI_LPC1700.c
  • PINSEL_ConfigPin() : lpc17xx_pinsel.h
  • PINSEL_ConfigTraceFunc() : lpc17xx_pinsel.h
  • PINSEL_FUNC_0 : lpc17xx_pinsel.h
  • PINSEL_FUNC_1 : lpc17xx_pinsel.h
  • PINSEL_FUNC_2 : lpc17xx_pinsel.h
  • PINSEL_FUNC_3 : lpc17xx_pinsel.h
  • PINSEL_I2C_Fast_Mode : lpc17xx_pinsel.h
  • PINSEL_I2C_Normal_Mode : lpc17xx_pinsel.h
  • PINSEL_I2CPADCFG_SCLDRV0 : lpc17xx_pinsel.h
  • PINSEL_I2CPADCFG_SCLI2C0 : lpc17xx_pinsel.h
  • PINSEL_I2CPADCFG_SDADRV0 : lpc17xx_pinsel.h
  • PINSEL_I2CPADCFG_SDAI2C0 : lpc17xx_pinsel.h
  • PINSEL_PIN_0 : lpc17xx_pinsel.h
  • PINSEL_PIN_1 : lpc17xx_pinsel.h
  • PINSEL_PIN_10 : lpc17xx_pinsel.h
  • PINSEL_PIN_11 : lpc17xx_pinsel.h
  • PINSEL_PIN_12 : lpc17xx_pinsel.h
  • PINSEL_PIN_13 : lpc17xx_pinsel.h
  • PINSEL_PIN_14 : lpc17xx_pinsel.h
  • PINSEL_PIN_15 : lpc17xx_pinsel.h
  • PINSEL_PIN_16 : lpc17xx_pinsel.h
  • PINSEL_PIN_17 : lpc17xx_pinsel.h
  • PINSEL_PIN_18 : lpc17xx_pinsel.h
  • PINSEL_PIN_19 : lpc17xx_pinsel.h
  • PINSEL_PIN_2 : lpc17xx_pinsel.h
  • PINSEL_PIN_20 : lpc17xx_pinsel.h
  • PINSEL_PIN_21 : lpc17xx_pinsel.h
  • PINSEL_PIN_22 : lpc17xx_pinsel.h
  • PINSEL_PIN_23 : lpc17xx_pinsel.h
  • PINSEL_PIN_24 : lpc17xx_pinsel.h
  • PINSEL_PIN_25 : lpc17xx_pinsel.h
  • PINSEL_PIN_26 : lpc17xx_pinsel.h
  • PINSEL_PIN_27 : lpc17xx_pinsel.h
  • PINSEL_PIN_28 : lpc17xx_pinsel.h
  • PINSEL_PIN_29 : lpc17xx_pinsel.h
  • PINSEL_PIN_3 : lpc17xx_pinsel.h
  • PINSEL_PIN_30 : lpc17xx_pinsel.h
  • PINSEL_PIN_31 : lpc17xx_pinsel.h
  • PINSEL_PIN_4 : lpc17xx_pinsel.h
  • PINSEL_PIN_5 : lpc17xx_pinsel.h
  • PINSEL_PIN_6 : lpc17xx_pinsel.h
  • PINSEL_PIN_7 : lpc17xx_pinsel.h
  • PINSEL_PIN_8 : lpc17xx_pinsel.h
  • PINSEL_PIN_9 : lpc17xx_pinsel.h
  • PINSEL_PINMODE_NORMAL : lpc17xx_pinsel.h
  • PINSEL_PINMODE_OPENDRAIN : lpc17xx_pinsel.h
  • PINSEL_PINMODE_PULLDOWN : lpc17xx_pinsel.h
  • PINSEL_PINMODE_PULLUP : lpc17xx_pinsel.h
  • PINSEL_PINMODE_TRISTATE : lpc17xx_pinsel.h
  • PINSEL_PORT_0 : lpc17xx_pinsel.h
  • PINSEL_PORT_1 : lpc17xx_pinsel.h
  • PINSEL_PORT_2 : lpc17xx_pinsel.h
  • PINSEL_PORT_3 : lpc17xx_pinsel.h
  • PINSEL_PORT_4 : lpc17xx_pinsel.h
  • PINSEL_SetI2C0Pins() : lpc17xx_pinsel.h
  • PIXEL_CONV : drv_glcd.h
  • PKT_DV : usbreg.h
  • PKT_LNGTH_MASK : usbreg.h
  • PKT_RDY : usbreg.h
  • pLdcPixel_t : drv_glcd.h
  • PLL0_IRQn : LPC17xx.h
  • PLL0_SETUP : system_LPC17xx.c
  • PLL0CFG_Val : system_LPC17xx.c
  • PLL1_IRQn : LPC17xx.h
  • PLL1_SETUP : system_LPC17xx.c
  • PLL1CFG_Val : system_LPC17xx.c
  • pMADCTR_Data_t : drv_glcd.h
  • POLL_LED : adc_burst_test.c , gpio_int.c
  • PORT_NUM : serial.h
  • PotVal : usbdmain.c
  • PRAM_I2S_FREQ : lpc17xx_can.h , lpc17xx_i2s.h
  • pRdBuf_M : microwire_test.c , ti_test.c
  • pRdBuf_S : ti_test.c
  • PrepareARP_ANSWER() : tcpip.c , tcpip.h
  • PrepareARP_REQUEST() : tcpip.h , tcpip.c
  • PrepareICMP_ECHO_REPLY() : tcpip.c , tcpip.h
  • PrepareTCP_DATA_FRAME() : tcpip.h , tcpip.c
  • PrepareTCP_FRAME() : tcpip.c , tcpip.h
  • PRINT_BUF_LEN : printf-stdarg.c
  • print_menu() : uart_irda_receive.c , uart_irda_transmit.c , adc_burst_test.c , adc_dma_test.c , adc_hardware_trigger_test.c , adc_interrupt_test.c , adc_polling_test.c , can_ledcontrol.c , can_self_test.c , can_test_bypass_mode.c , can_test_two_kit.c , dac_wave_generate.c , gpdma_sleep.c , link_list.c , gpdma_r2r_test.c , uart_polling_test.c , i2c_master_slave_int_test.c , i2c_monitor.c , pca8581_test.c , i2c_polling_test.c , slave.c , i2s_dma_test.c , wdt_interrupt_test.c , i2s_mclk.c , i2s_test_4_wire.c , i2s_two_kit.c , lcdtest.c , nvic_priority.c , vt_relocation.c , timer_poll_match.c , nmi_powerdown.c , rtc_deeppwd.c , wdt_deepsleep.c , rtc_alarm_cntincr_int.c , rtc_calib.c , spi_loopback_test.c , spi_master.c , uart_hw_flow_control.c , spi_polling_test.c , spi_sdcard.c , spi_slave.c , uart_autobaud_test.c , ssp_master.c , sc16is750_int.c , sc16is750_polling.c , ssp_slave.c , uart_dma_test.c , ti_test.c , timer_capture.c , gen_diff_freqs.c , gen_diff_delay.c , timer_int_match.c , freqmeasure.c , pwm_signal.c , uart_interrupt_test.c , spi_interrupt_test.c , rs485_master.c , rs485_slave.c , uart_fullmodem_test.c , microwire_test.c , ssp_dma.c , extint_sleep.c , i2s_irq_test.c , i2s_polling.c , master.c , i2c_interrupt_test.c , can_test_aflut.c , flash_2_ram.c
  • printf() : printf-stdarg.c
  • PrintMessage() : can_test_aflut.c , can_test_two_kit.c , can_self_test.c , can_test_bypass_mode.c
  • PRIVILEGE_LED : privilege.c
  • PRIVILEGE_LEDPORT : privilege.c
  • ProcessEthBroadcastFrame() : tcpip.c , tcpip.h
  • ProcessEthIAFrame() : tcpip.h , tcpip.c
  • ProcessICMPFrame() : tcpip.h , tcpip.c
  • ProcessTCPFrame() : tcpip.h , tcpip.c
  • PROT_ICMP : tcpip.h
  • PROT_TCP : tcpip.h
  • PROT_UDP : tcpip.h
  • PSOCK_BEGIN : psock.h
  • PSOCK_CLOSE : psock.h
  • PSOCK_CLOSE_EXIT : psock.h
  • PSOCK_DATALEN : psock.h
  • psock_datalen() : psock.h , psock.c
  • PSOCK_END : psock.h
  • PSOCK_EXIT : psock.h
  • PSOCK_GENERATOR_SEND : psock.h
  • psock_init() : psock.c , psock.h
  • PSOCK_INIT : psock.h
  • psock_newdata() : psock.c
  • PSOCK_NEWDATA : psock.h
  • psock_newdata() : psock.h
  • PSOCK_READBUF : psock.h
  • PSOCK_READTO : psock.h
  • PSOCK_SEND : psock.h
  • PSOCK_SEND_STR : psock.h
  • PSOCK_WAIT_THREAD : psock.h
  • PSOCK_WAIT_UNTIL : psock.h
  • PT_BEGIN : pt.h
  • PT_END : pt.h
  • PT_ENDED : pt.h
  • PT_EXIT : pt.h
  • PT_EXITED : pt.h
  • PT_INIT : pt.h
  • PT_RESTART : pt.h
  • PT_SCHEDULE : pt.h
  • PT_SPAWN : pt.h
  • PT_THREAD() : psock.h , pt.h , psock.c , httpd-cgi.h , psock.c , psock.h
  • PT_WAIT_THREAD : pt.h
  • PT_WAIT_UNTIL : pt.h
  • PT_WAIT_WHILE : pt.h
  • PT_WAITING : pt.h
  • PT_YIELD : pt.h
  • PT_YIELD_UNTIL : pt.h
  • PT_YIELDED : pt.h
  • PTIN : drv_glcd.h
  • PTLAR : drv_glcd.h
  • PTLON : drv_glcd.h
  • PTLOUT : drv_glcd.h
  • Purple : GLCD.h
  • putchar : printf-stdarg.c
  • PWebSide : easyweb.h
  • PWM0_State : pwm_signal.c
  • PWM1_IRQHandler() : pwm_match_int.c
  • PWM1_IRQn : LPC17xx.h
  • PWM1_State : pwm_signal.c
  • PWM2_State : pwm_signal.c
  • PWM3_State : pwm_signal.c
  • PWM_CCR_BITMASK : lpc17xx_pwm.h
  • PWM_CCR_CAP_FALLING : lpc17xx_pwm.h
  • PWM_CCR_CAP_RISING : lpc17xx_pwm.h
  • PWM_CCR_INT_ON_CAP : lpc17xx_pwm.h
  • PWM_CHANNEL_DUAL_EDGE : lpc17xx_pwm.h
  • PWM_CHANNEL_EDGE_OPT : lpc17xx_pwm.h
  • PWM_CHANNEL_SINGLE_EDGE : lpc17xx_pwm.h
  • PWM_ChannelCmd() : lpc17xx_pwm.h
  • PWM_ChannelConfig() : lpc17xx_pwm.h
  • PWM_ClearIntPending() : lpc17xx_pwm.h
  • PWM_Cmd() : lpc17xx_pwm.h
  • PWM_ConfigCapture() : lpc17xx_pwm.h
  • PWM_ConfigMatch() : lpc17xx_pwm.h
  • PWM_ConfigStructInit() : lpc17xx_pwm.h
  • PWM_COUNTER_ANY : lpc17xx_pwm.h
  • PWM_COUNTER_EDGE_OPT : lpc17xx_pwm.h
  • PWM_COUNTER_FALLING : lpc17xx_pwm.h
  • PWM_COUNTER_INPUTSEL_OPT : lpc17xx_pwm.h
  • PWM_COUNTER_PCAP1_0 : lpc17xx_pwm.h
  • PWM_COUNTER_PCAP1_1 : lpc17xx_pwm.h
  • PWM_COUNTER_RISING : lpc17xx_pwm.h
  • PWM_CounterCmd() : lpc17xx_pwm.h
  • PWM_CTCR_BITMASK : lpc17xx_pwm.h
  • PWM_CTCR_MODE : lpc17xx_pwm.h
  • PWM_CTCR_SELECT_INPUT : lpc17xx_pwm.h
  • PWM_DeInit() : lpc17xx_pwm.h
  • PWM_GetCaptureValue() : lpc17xx_pwm.h
  • PWM_GetIntStatus() : lpc17xx_pwm.h
  • PWM_Init() : lpc17xx_pwm.h
  • PWM_INTSTAT_CAP0 : lpc17xx_pwm.h
  • PWM_INTSTAT_CAP1 : lpc17xx_pwm.h
  • PWM_INTSTAT_MR0 : lpc17xx_pwm.h
  • PWM_INTSTAT_MR1 : lpc17xx_pwm.h
  • PWM_INTSTAT_MR2 : lpc17xx_pwm.h
  • PWM_INTSTAT_MR3 : lpc17xx_pwm.h
  • PWM_INTSTAT_MR4 : lpc17xx_pwm.h
  • PWM_INTSTAT_MR5 : lpc17xx_pwm.h
  • PWM_INTSTAT_MR6 : lpc17xx_pwm.h
  • PWM_INTSTAT_TYPE : lpc17xx_pwm.h
  • PWM_IR_BITMASK : lpc17xx_pwm.h
  • PWM_IR_PWMCAPn : lpc17xx_pwm.h
  • PWM_IR_PWMMRn : lpc17xx_pwm.h
  • PWM_LER_BITMASK : lpc17xx_pwm.h
  • PWM_LER_EN_MATCHn_LATCH : lpc17xx_pwm.h
  • PWM_MATCH_UPDATE_NEXT_RST : lpc17xx_pwm.h
  • PWM_MATCH_UPDATE_NOW : lpc17xx_pwm.h
  • PWM_MATCH_UPDATE_OPT : lpc17xx_pwm.h
  • PWM_MatchUpdate() : lpc17xx_pwm.h
  • PWM_MCR_BITMASK : lpc17xx_pwm.h
  • PWM_MCR_INT_ON_MATCH : lpc17xx_pwm.h
  • PWM_MCR_RESET_ON_MATCH : lpc17xx_pwm.h
  • PWM_MCR_STOP_ON_MATCH : lpc17xx_pwm.h
  • PWM_MODE_COUNTER : lpc17xx_pwm.h
  • PWM_MODE_TIMER : lpc17xx_pwm.h
  • PWM_MultiMatchUpdate() : lpc17xx_pwm.c
  • PWM_PCR_BITMASK : lpc17xx_pwm.h
  • PWM_PCR_PWMENAn : lpc17xx_pwm.h
  • PWM_PCR_PWMSELn : lpc17xx_pwm.h
  • PWM_PinConfig() : lpc17xx_pwm.h
  • PWM_ResetCounter() : lpc17xx_pwm.h
  • PWM_TC_MODE_OPT : lpc17xx_pwm.h
  • PWM_TCR_BITMASK : lpc17xx_pwm.h
  • PWM_TCR_COUNTER_ENABLE : lpc17xx_pwm.h
  • PWM_TCR_COUNTER_RESET : lpc17xx_pwm.h
  • PWM_TCR_PWM_ENABLE : lpc17xx_pwm.h
  • PWM_TIMER_PRESCALE_OPT : lpc17xx_pwm.h
  • PWM_TIMER_PRESCALE_TICKVAL : lpc17xx_pwm.h
  • PWM_TIMER_PRESCALE_USVAL : lpc17xx_pwm.h
  • pWrBuf_M : ti_test.c
  • pWrBuf_S : microwire_test.c , ti_test.c
  • PWRCTR : drv_glcd.h
Generated on Tue Jun 7 15:00:15 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Data Fields

  • All
  • Functions
  • Variables
  • Typedefs
  • Enumerations
  • Enumerator
  • Defines
  • _
  • a
  • b
  • c
  • d
  • e
  • f
  • g
  • h
  • i
  • k
  • l
  • m
  • n
  • o
  • p
  • q
  • r
  • s
  • t
  • u
  • v
  • w
  • x
  • y
Here is a list of all functions, variables, defines, enums, and typedefs with links to the files they belong to:

- q -

  • QEI_CalculateRPM() : lpc17xx_qei.h
  • QEI_CAPMODE_2X : lpc17xx_qei.h
  • QEI_CAPMODE_4X : lpc17xx_qei.h
  • QEI_COMPPOS_CH_0 : lpc17xx_qei.h
  • QEI_COMPPOS_CH_1 : lpc17xx_qei.h
  • QEI_COMPPOS_CH_2 : lpc17xx_qei.h
  • QEI_CON_BITMASK : lpc17xx_qei.h
  • QEI_CON_RESI : lpc17xx_qei.h
  • QEI_CON_RESP : lpc17xx_qei.h
  • QEI_CON_RESPI : lpc17xx_qei.h
  • QEI_CON_RESV : lpc17xx_qei.h
  • QEI_CONF_BITMASK : lpc17xx_qei.h
  • QEI_CONF_CAPMODE : lpc17xx_qei.h
  • QEI_CONF_DIRINV : lpc17xx_qei.h
  • QEI_CONF_INVINX : lpc17xx_qei.h
  • QEI_CONF_SIGMODE : lpc17xx_qei.h
  • QEI_ConfigStructInit() : lpc17xx_qei.h
  • QEI_DeInit() : lpc17xx_qei.h
  • QEI_DIRINV_CMPL : lpc17xx_qei.h
  • QEI_DIRINV_NONE : lpc17xx_qei.h
  • QEI_GetIndex() : lpc17xx_qei.h
  • QEI_GetIntStatus() : lpc17xx_qei.h
  • QEI_GetPosition() : lpc17xx_qei.h
  • QEI_GetStatus() : lpc17xx_qei.h
  • QEI_GetTimer() : lpc17xx_qei.h
  • QEI_GetVelocity() : lpc17xx_qei.h
  • QEI_GetVelocityCap() : lpc17xx_qei.h
  • qei_idx_pin : qei_test_velo.c
  • QEI_IECLR_BITMASK : lpc17xx_qei.h
  • QEI_IECLR_DIR_Int : lpc17xx_qei.h
  • QEI_IECLR_ENCLK_Int : lpc17xx_qei.h
  • QEI_IECLR_ERR_Int : lpc17xx_qei.h
  • QEI_IECLR_INX_Int : lpc17xx_qei.h
  • QEI_IECLR_POS0_Int : lpc17xx_qei.h
  • QEI_IECLR_POS0REV_Int : lpc17xx_qei.h
  • QEI_IECLR_POS1_Int : lpc17xx_qei.h
  • QEI_IECLR_POS1REV_Int : lpc17xx_qei.h
  • QEI_IECLR_POS2_Int : lpc17xx_qei.h
  • QEI_IECLR_POS2REV_Int : lpc17xx_qei.h
  • QEI_IECLR_REV_Int : lpc17xx_qei.h
  • QEI_IECLR_TIM_Int : lpc17xx_qei.h
  • QEI_IECLR_VELC_Int : lpc17xx_qei.h
  • QEI_IESET_BITMASK : lpc17xx_qei.h
  • QEI_IESET_DIR_Int : lpc17xx_qei.h
  • QEI_IESET_ENCLK_Int : lpc17xx_qei.h
  • QEI_IESET_ERR_Int : lpc17xx_qei.h
  • QEI_IESET_INX_Int : lpc17xx_qei.h
  • QEI_IESET_POS0_Int : lpc17xx_qei.h
  • QEI_IESET_POS0REV_Int : lpc17xx_qei.h
  • QEI_IESET_POS1_Int : lpc17xx_qei.h
  • QEI_IESET_POS1REV_Int : lpc17xx_qei.h
  • QEI_IESET_POS2_Int : lpc17xx_qei.h
  • QEI_IESET_POS2REV_Int : lpc17xx_qei.h
  • QEI_IESET_REV_Int : lpc17xx_qei.h
  • QEI_IESET_TIM_Int : lpc17xx_qei.h
  • QEI_IESET_VELC_Int : lpc17xx_qei.h
  • QEI_Init() : lpc17xx_qei.h
  • QEI_IntClear() : lpc17xx_qei.h
  • QEI_INTCLR_BITMASK : lpc17xx_qei.h
  • QEI_INTCLR_DIR_Int : lpc17xx_qei.h
  • QEI_INTCLR_ENCLK_Int : lpc17xx_qei.h
  • QEI_INTCLR_ERR_Int : lpc17xx_qei.h
  • QEI_INTCLR_INX_Int : lpc17xx_qei.h
  • QEI_INTCLR_POS0_Int : lpc17xx_qei.h
  • QEI_INTCLR_POS0REV_Int : lpc17xx_qei.h
  • QEI_INTCLR_POS1_Int : lpc17xx_qei.h
  • QEI_INTCLR_POS1REV_Int : lpc17xx_qei.h
  • QEI_INTCLR_POS2_Int : lpc17xx_qei.h
  • QEI_INTCLR_POS2REV_Int : lpc17xx_qei.h
  • QEI_INTCLR_REV_Int : lpc17xx_qei.h
  • QEI_INTCLR_TIM_Int : lpc17xx_qei.h
  • QEI_INTCLR_VELC_Int : lpc17xx_qei.h
  • QEI_IntCmd() : lpc17xx_qei.h
  • QEI_INTEN_BITMASK : lpc17xx_qei.h
  • QEI_INTEN_DIR_Int : lpc17xx_qei.h
  • QEI_INTEN_ENCLK_Int : lpc17xx_qei.h
  • QEI_INTEN_ERR_Int : lpc17xx_qei.h
  • QEI_INTEN_INX_Int : lpc17xx_qei.h
  • QEI_INTEN_POS0_Int : lpc17xx_qei.h
  • QEI_INTEN_POS0REV_Int : lpc17xx_qei.h
  • QEI_INTEN_POS1_Int : lpc17xx_qei.h
  • QEI_INTEN_POS1REV_Int : lpc17xx_qei.h
  • QEI_INTEN_POS2_Int : lpc17xx_qei.h
  • QEI_INTEN_POS2REV_Int : lpc17xx_qei.h
  • QEI_INTEN_REV_Int : lpc17xx_qei.h
  • QEI_INTEN_TIM_Int : lpc17xx_qei.h
  • QEI_INTEN_VELC_Int : lpc17xx_qei.h
  • QEI_INTFLAG_DIR_Int : lpc17xx_qei.h
  • QEI_INTFLAG_ENCLK_Int : lpc17xx_qei.h
  • QEI_INTFLAG_ERR_Int : lpc17xx_qei.h
  • QEI_INTFLAG_INX_Int : lpc17xx_qei.h
  • QEI_INTFLAG_POS0_Int : lpc17xx_qei.h
  • QEI_INTFLAG_POS0REV_Int : lpc17xx_qei.h
  • QEI_INTFLAG_POS1_Int : lpc17xx_qei.h
  • QEI_INTFLAG_POS1REV_Int : lpc17xx_qei.h
  • QEI_INTFLAG_POS2_Int : lpc17xx_qei.h
  • QEI_INTFLAG_POS2REV_Int : lpc17xx_qei.h
  • QEI_INTFLAG_REV_Int : lpc17xx_qei.h
  • QEI_INTFLAG_TIM_Int : lpc17xx_qei.h
  • QEI_INTFLAG_VELC_Int : lpc17xx_qei.h
  • QEI_IntSet() : lpc17xx_qei.h
  • QEI_INTSET_BITMASK : lpc17xx_qei.h
  • QEI_INTSET_DIR_Int : lpc17xx_qei.h
  • QEI_INTSET_ENCLK_Int : lpc17xx_qei.h
  • QEI_INTSET_ERR_Int : lpc17xx_qei.h
  • QEI_INTSET_INX_Int : lpc17xx_qei.h
  • QEI_INTSET_POS0_Int : lpc17xx_qei.h
  • QEI_INTSET_POS0REV_Int : lpc17xx_qei.h
  • QEI_INTSET_POS1_Int : lpc17xx_qei.h
  • QEI_INTSET_POS1REV_Int : lpc17xx_qei.h
  • QEI_INTSET_POS2_Int : lpc17xx_qei.h
  • QEI_INTSET_POS2REV_Int : lpc17xx_qei.h
  • QEI_INTSET_REV_Int : lpc17xx_qei.h
  • QEI_INTSET_TIM_Int : lpc17xx_qei.h
  • QEI_INTSET_VELC_Int : lpc17xx_qei.h
  • QEI_INTSTAT_BITMASK : lpc17xx_qei.h
  • QEI_INTSTAT_DIR_Int : lpc17xx_qei.h
  • QEI_INTSTAT_ENCLK_Int : lpc17xx_qei.h
  • QEI_INTSTAT_ERR_Int : lpc17xx_qei.h
  • QEI_INTSTAT_INX_Int : lpc17xx_qei.h
  • QEI_INTSTAT_POS0_Int : lpc17xx_qei.h
  • QEI_INTSTAT_POS0REV_Int : lpc17xx_qei.h
  • QEI_INTSTAT_POS1_Int : lpc17xx_qei.h
  • QEI_INTSTAT_POS1REV_Int : lpc17xx_qei.h
  • QEI_INTSTAT_POS2_Int : lpc17xx_qei.h
  • QEI_INTSTAT_POS2REV_Int : lpc17xx_qei.h
  • QEI_INTSTAT_REV_Int : lpc17xx_qei.h
  • QEI_INTSTAT_TIM_Int : lpc17xx_qei.h
  • QEI_INTSTAT_VELC_Int : lpc17xx_qei.h
  • QEI_INVINX_EN : lpc17xx_qei.h
  • QEI_INVINX_NONE : lpc17xx_qei.h
  • QEI_IRQHandler() : qei_test_velo.c
  • QEI_IRQn : LPC17xx.h
  • qei_phaA_pin : qei_test_velo.c
  • qei_phaB_pin : qei_test_velo.c
  • QEI_Reset() : lpc17xx_qei.h
  • QEI_RESET_IDX : lpc17xx_qei.h
  • QEI_RESET_POS : lpc17xx_qei.h
  • QEI_RESET_POSOnIDX : lpc17xx_qei.h
  • QEI_RESET_VEL : lpc17xx_qei.h
  • QEI_SetDigiFilter() : lpc17xx_qei.h
  • QEI_SetIndexComp() : lpc17xx_qei.h
  • QEI_SetMaxPosition() : lpc17xx_qei.h
  • QEI_SetPositionComp() : lpc17xx_qei.h
  • QEI_SetTimerReload() : lpc17xx_qei.h
  • QEI_SetVelocityComp() : lpc17xx_qei.h
  • QEI_SIGNALMODE_CLKDIR : lpc17xx_qei.h
  • QEI_SIGNALMODE_QUAD : lpc17xx_qei.h
  • QEI_STAT_BITMASK : lpc17xx_qei.h
  • QEI_STAT_DIR : lpc17xx_qei.h
  • QEI_STATUS_DIR : lpc17xx_qei.h
  • QEI_TIMERRELOAD_TICKVAL : lpc17xx_qei.h
  • QEI_TIMERRELOAD_USVAL : lpc17xx_qei.h
Generated on Tue Jun 7 15:00:15 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Data Fields

  • All
  • Functions
  • Variables
  • Typedefs
  • Enumerations
  • Enumerator
  • Defines
  • _
  • a
  • b
  • c
  • d
  • e
  • f
  • g
  • h
  • i
  • k
  • l
  • m
  • n
  • o
  • p
  • q
  • r
  • s
  • t
  • u
  • v
  • w
  • x
  • y
Here is a list of all functions, variables, defines, enums, and typedefs with links to the files they belong to:

- r -

  • R1_ADDR_ERR : spi_sdcard.c
  • R1_CRC_ERR : spi_sdcard.c
  • R1_ERASE : spi_sdcard.c
  • R1_ERASE_SEQ : spi_sdcard.c
  • R1_IDLE : spi_sdcard.c
  • R1_ILLEGAL : spi_sdcard.c
  • R1_NOERROR : spi_sdcard.c
  • R1_PARAM_ERR : spi_sdcard.c
  • R2_CTRL_ERR : spi_sdcard.c
  • R2_ECC_FAIL : spi_sdcard.c
  • R2_ERASE_PARAM : spi_sdcard.c
  • R2_ERROR : spi_sdcard.c
  • R2_LOCKED : spi_sdcard.c
  • R2_RANGE_ERR : spi_sdcard.c
  • R2_WP_FAILED : spi_sdcard.c
  • R2_WP_VIOL : spi_sdcard.c
  • RAMWR : drv_glcd.h
  • RASET : drv_glcd.h
  • rb : uart_interrupt_test.c , rs485_master.c , rs485_slave.c , uart_fullmodem_test.c
  • RdCmdDat() : usbhw.c
  • RDDID : drv_glcd.h
  • RDDST : drv_glcd.h
  • RDEV : drv_glcd.h
  • RDID1 : drv_glcd.h
  • RDID2 : drv_glcd.h
  • RDID3 : drv_glcd.h
  • RdIdx_M : microwire_test.c , ti_test.c
  • RdIdx_S : ti_test.c
  • RDRR : drv_glcd.h
  • Rdy4Tx() : EMAC.c , EMAC.h
  • ReadFrame_EMAC() : EMAC.c
  • ReadFrameBE_EMAC() : EMAC.c , EMAC.h
  • RecdFrameIP : tcpip.h
  • RecdFrameLength : tcpip.h
  • RecdFrameMAC : tcpip.h
  • RecdIPFrameLength : tcpip.h
  • ReceiveLength : emactest.c
  • RECEIVER_ALWAYS_EN : rs485_slave.c
  • Recipient : usb.h
  • recv_menu : rs485_master.c
  • recv_msg : rs485_slave.c
  • Red : GLCD.h
  • REGS_ADDR : i2c_interrupt_test.c , i2c_polling_test.c
  • REMOTE_FRAME : lpc17xx_can.h
  • RemoteIP : tcpip.h
  • RemoteMAC : tcpip.h
  • REQUEST_CLASS : usb.h
  • REQUEST_DEVICE_TO_HOST : usb.h
  • REQUEST_HOST_TO_DEVICE : usb.h
  • REQUEST_RESERVED : usb.h
  • REQUEST_STANDARD : usb.h
  • REQUEST_TO_DEVICE : usb.h
  • REQUEST_TO_ENDPOINT : usb.h
  • REQUEST_TO_INTERFACE : usb.h
  • REQUEST_TO_OTHER : usb.h
  • REQUEST_TYPE : usb.h
  • REQUEST_VENDOR : usb.h
  • RequestSend() : EMAC.c , EMAC.h
  • RESET : lpc_types.h
  • resolv_appcall() : resolv.c
  • resolv_conf() : resolv.c
  • RESOLV_ENTRIES : resolv.c
  • resolv_found() : resolv.h
  • resolv_getserver() : resolv.c
  • resolv_init() : resolv.c
  • resolv_lookup() : resolv.c
  • resolv_query() : resolv.c
  • RETRY_TIMEOUT : tcpip.h
  • RetryCounter : tcpip.h
  • RGBSET : drv_glcd.h
  • RIT_Cmd() : lpc17xx_rit.h
  • RIT_CTRL_ENBR : lpc17xx_rit.h
  • RIT_CTRL_ENCLR : lpc17xx_rit.h
  • RIT_CTRL_INTEN : lpc17xx_rit.h
  • RIT_CTRL_TEN : lpc17xx_rit.h
  • RIT_DeInit() : lpc17xx_rit.h
  • RIT_GetIntStatus() : lpc17xx_rit.h
  • RIT_Init() : lpc17xx_rit.h
  • RIT_IRQHandler() : rit_interrupt.c
  • RIT_IRQn : LPC17xx.h
  • RIT_TimerClearCmd() : lpc17xx_rit.h
  • RIT_TimerConfig() : lpc17xx_rit.h
  • RIT_TimerDebugCmd() : lpc17xx_rit.h
  • RMII : emac.h
  • RMWIN : drv_glcd.h
  • RMWOUT : drv_glcd.h
  • RNE : GLCD_SPI_LPC1700.c
  • RTC_AlarmIntConfig() : lpc17xx_rtc.h
  • RTC_AMR_AMRDOM : lpc17xx_rtc.h
  • RTC_AMR_AMRDOW : lpc17xx_rtc.h
  • RTC_AMR_AMRDOY : lpc17xx_rtc.h
  • RTC_AMR_AMRHOUR : lpc17xx_rtc.h
  • RTC_AMR_AMRMIN : lpc17xx_rtc.h
  • RTC_AMR_AMRMON : lpc17xx_rtc.h
  • RTC_AMR_AMRSEC : lpc17xx_rtc.h
  • RTC_AMR_AMRYEAR : lpc17xx_rtc.h
  • RTC_AMR_BITMASK : lpc17xx_rtc.h
  • RTC_AUX_RTC_OSCF : lpc17xx_rtc.h
  • RTC_AUXEN_RTC_OSCFEN : lpc17xx_rtc.h
  • RTC_CALIB_DIR_BACKWARD : lpc17xx_rtc.h
  • RTC_CALIB_DIR_FORWARD : lpc17xx_rtc.h
  • RTC_CalibConfig() : lpc17xx_rtc.h
  • RTC_CalibCounterCmd() : lpc17xx_rtc.h
  • RTC_CALIBRATION_CALVAL_MASK : lpc17xx_rtc.h
  • RTC_CALIBRATION_LIBDIR : lpc17xx_rtc.h
  • RTC_CALIBRATION_MAX : lpc17xx_rtc.h
  • RTC_CCR_BITMASK : lpc17xx_rtc.h
  • RTC_CCR_CCALEN : lpc17xx_rtc.h
  • RTC_CCR_CLKEN : lpc17xx_rtc.h
  • RTC_CCR_CTCRST : lpc17xx_rtc.h
  • RTC_CIIR_BITMASK : lpc17xx_rtc.h
  • RTC_CIIR_IMDOM : lpc17xx_rtc.h
  • RTC_CIIR_IMDOW : lpc17xx_rtc.h
  • RTC_CIIR_IMDOY : lpc17xx_rtc.h
  • RTC_CIIR_IMHOUR : lpc17xx_rtc.h
  • RTC_CIIR_IMMIN : lpc17xx_rtc.h
  • RTC_CIIR_IMMON : lpc17xx_rtc.h
  • RTC_CIIR_IMSEC : lpc17xx_rtc.h
  • RTC_CIIR_IMYEAR : lpc17xx_rtc.h
  • RTC_ClearIntPending() : lpc17xx_rtc.h
  • RTC_CLK : system_LPC17xx.c
  • RTC_Cmd() : lpc17xx_rtc.h
  • RTC_CntIncrIntConfig() : lpc17xx_rtc.h
  • RTC_CTIME0_DOW_MASK : lpc17xx_rtc.h
  • RTC_CTIME0_HOURS_MASK : lpc17xx_rtc.h
  • RTC_CTIME0_MINUTES_MASK : lpc17xx_rtc.h
  • RTC_CTIME0_SECONDS_MASK : lpc17xx_rtc.h
  • RTC_CTIME1_DOM_MASK : lpc17xx_rtc.h
  • RTC_CTIME1_MONTH_MASK : lpc17xx_rtc.h
  • RTC_CTIME1_YEAR_MASK : lpc17xx_rtc.h
  • RTC_CTIME2_DOY_MASK : lpc17xx_rtc.h
  • RTC_DAYOFMONTH_MAX : lpc17xx_rtc.h
  • RTC_DAYOFMONTH_MIN : lpc17xx_rtc.h
  • RTC_DAYOFWEEK_MAX : lpc17xx_rtc.h
  • RTC_DAYOFYEAR_MAX : lpc17xx_rtc.h
  • RTC_DAYOFYEAR_MIN : lpc17xx_rtc.h
  • RTC_DeInit() : lpc17xx_rtc.h
  • RTC_DOM_MASK : lpc17xx_rtc.h
  • RTC_DOW_MASK : lpc17xx_rtc.h
  • RTC_DOY_MASK : lpc17xx_rtc.h
  • RTC_GetAlarmTime() : lpc17xx_rtc.h
  • RTC_GetFullAlarmTime() : lpc17xx_rtc.h
  • RTC_GetFullTime() : lpc17xx_rtc.h
  • RTC_GetIntPending() : lpc17xx_rtc.h
  • RTC_GetTime() : lpc17xx_rtc.h
  • RTC_HOUR_MASK : lpc17xx_rtc.h
  • RTC_HOUR_MAX : lpc17xx_rtc.h
  • RTC_ILR_BITMASK : lpc17xx_rtc.h
  • RTC_Init() : lpc17xx_rtc.h
  • RTC_INT_ALARM : lpc17xx_rtc.h
  • RTC_INT_COUNTER_INCREASE : lpc17xx_rtc.h
  • RTC_INT_OPT : lpc17xx_rtc.h
  • RTC_IRL_RTCALF : lpc17xx_rtc.h
  • RTC_IRL_RTCCIF : lpc17xx_rtc.h
  • RTC_IRQHandle() : rtc_calib.c
  • RTC_IRQHandler() : rtc_alarm_cntincr_int.c , rtc_calib.c , rtc_deeppwd.c
  • RTC_IRQn : LPC17xx.h
  • RTC_MIN_MASK : lpc17xx_rtc.h
  • RTC_MINUTE_MAX : lpc17xx_rtc.h
  • RTC_MONTH_MASK : lpc17xx_rtc.h
  • RTC_MONTH_MAX : lpc17xx_rtc.h
  • RTC_MONTH_MIN : lpc17xx_rtc.h
  • RTC_ReadGPREG() : lpc17xx_rtc.h
  • RTC_ResetClockTickCounter() : lpc17xx_rtc.h
  • RTC_SEC_MASK : lpc17xx_rtc.h
  • RTC_SECOND_MAX : lpc17xx_rtc.h
  • RTC_SetAlarmTime() : lpc17xx_rtc.h
  • RTC_SetFullAlarmTime() : lpc17xx_rtc.h
  • RTC_SetFullTime() : lpc17xx_rtc.h
  • RTC_SetTime() : lpc17xx_rtc.h
  • RTC_TIMETYPE_DAYOFMONTH : lpc17xx_rtc.h
  • RTC_TIMETYPE_DAYOFWEEK : lpc17xx_rtc.h
  • RTC_TIMETYPE_DAYOFYEAR : lpc17xx_rtc.h
  • RTC_TIMETYPE_HOUR : lpc17xx_rtc.h
  • RTC_TIMETYPE_MINUTE : lpc17xx_rtc.h
  • RTC_TIMETYPE_MONTH : lpc17xx_rtc.h
  • RTC_TIMETYPE_Num : lpc17xx_rtc.h
  • RTC_TIMETYPE_SECOND : lpc17xx_rtc.h
  • RTC_TIMETYPE_YEAR : lpc17xx_rtc.h
  • RTC_WriteGPREG() : lpc17xx_rtc.h
  • RTC_YEAR_MASK : lpc17xx_rtc.h
  • RTC_YEAR_MAX : lpc17xx_rtc.h
  • RTS_State : uart_fullmodem_test.c
  • Rx_Buf : spi_master.c , ssp_master.c
  • rx_buf : uart_dma_test.c
  • Rx_Buf : spi_slave.c , ssp_slave.c , spi_loopback_test.c
  • RX_BUF_SIZE : uart_dma_test.c
  • RX_BUFFER_SIZE : can_test_two_kit.c
  • rx_depth_irq : i2s_two_kit.c , i2s_mclk.c , i2s_irq_test.c
  • RX_LED_PIN : emactest.c
  • RxDoneCount : emactest.c
  • RxENDPKT_INT : usbreg.h
  • RXErrorCount : emactest.c
  • RXFIFO_EMPTY : i2s_mclk.c , i2s_irq_test.c
  • RxFinishedCount : emactest.c
  • RXMsg : can_test_bypass_mode.c , can_ledcontrol.c , can_self_test.c , can_test_two_kit.c
  • RXOverrunCount : emactest.c
  • rxsetup : pca8581_test.c
  • RxTCPBuffer : tcpip.h
Generated on Tue Jun 7 15:00:15 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Data Fields

  • All
  • Functions
  • Variables
  • Typedefs
  • Enumerations
  • Enumerator
  • Defines
  • _
  • a
  • b
  • c
  • d
  • e
  • f
  • g
  • h
  • i
  • k
  • l
  • m
  • n
  • o
  • p
  • q
  • r
  • s
  • t
  • u
  • v
  • w
  • x
  • y
Here is a list of all functions, variables, defines, enums, and typedefs with links to the files they belong to:

- s -

  • S2 : vcomdemo.h
  • SC16IS740_IOCON_REG : spi_interrupt_test.c , sc16is750_int.c , sc16is750_polling.c , spi_polling_test.c
  • SC16IS740_IODIR_REG : sc16is750_int.c , sc16is750_polling.c , spi_interrupt_test.c , spi_polling_test.c
  • SC16IS740_IOSTATE_REG : spi_interrupt_test.c , spi_polling_test.c , sc16is750_int.c , sc16is750_polling.c
  • SC16IS740_RD_CMD : sc16is750_int.c , sc16is750_polling.c , spi_interrupt_test.c , spi_polling_test.c
  • SC16IS740_WR_CMD : spi_interrupt_test.c , spi_polling_test.c , sc16is750_int.c , sc16is750_polling.c
  • SCB : core_cm3.h
  • SCB_AIRCR_ENDIANESS_Msk : core_cm3.h
  • SCB_AIRCR_ENDIANESS_Pos : core_cm3.h
  • SCB_AIRCR_PRIGROUP_Msk : core_cm3.h
  • SCB_AIRCR_PRIGROUP_Pos : core_cm3.h
  • SCB_AIRCR_SYSRESETREQ_Msk : core_cm3.h
  • SCB_AIRCR_SYSRESETREQ_Pos : core_cm3.h
  • SCB_AIRCR_VECTCLRACTIVE_Msk : core_cm3.h
  • SCB_AIRCR_VECTCLRACTIVE_Pos : core_cm3.h
  • SCB_AIRCR_VECTKEY_Msk : core_cm3.h
  • SCB_AIRCR_VECTKEY_Pos : core_cm3.h
  • SCB_AIRCR_VECTKEYSTAT_Msk : core_cm3.h
  • SCB_AIRCR_VECTKEYSTAT_Pos : core_cm3.h
  • SCB_AIRCR_VECTRESET_Msk : core_cm3.h
  • SCB_AIRCR_VECTRESET_Pos : core_cm3.h
  • SCB_BASE : core_cm3.h
  • SCB_CCR_BFHFNMIGN_Msk : core_cm3.h
  • SCB_CCR_BFHFNMIGN_Pos : core_cm3.h
  • SCB_CCR_DIV_0_TRP_Msk : core_cm3.h
  • SCB_CCR_DIV_0_TRP_Pos : core_cm3.h
  • SCB_CCR_NONBASETHRDENA_Msk : core_cm3.h
  • SCB_CCR_NONBASETHRDENA_Pos : core_cm3.h
  • SCB_CCR_STKALIGN_Msk : core_cm3.h
  • SCB_CCR_STKALIGN_Pos : core_cm3.h
  • SCB_CCR_UNALIGN_TRP_Msk : core_cm3.h
  • SCB_CCR_UNALIGN_TRP_Pos : core_cm3.h
  • SCB_CCR_USERSETMPEND_Msk : core_cm3.h
  • SCB_CCR_USERSETMPEND_Pos : core_cm3.h
  • SCB_CFSR_BUSFAULTSR_Msk : core_cm3.h
  • SCB_CFSR_BUSFAULTSR_Pos : core_cm3.h
  • SCB_CFSR_MEMFAULTSR_Msk : core_cm3.h
  • SCB_CFSR_MEMFAULTSR_Pos : core_cm3.h
  • SCB_CFSR_USGFAULTSR_Msk : core_cm3.h
  • SCB_CFSR_USGFAULTSR_Pos : core_cm3.h
  • SCB_CPUID_IMPLEMENTER_Msk : core_cm3.h
  • SCB_CPUID_IMPLEMENTER_Pos : core_cm3.h
  • SCB_CPUID_PARTNO_Msk : core_cm3.h
  • SCB_CPUID_PARTNO_Pos : core_cm3.h
  • SCB_CPUID_REVISION_Msk : core_cm3.h
  • SCB_CPUID_REVISION_Pos : core_cm3.h
  • SCB_CPUID_VARIANT_Msk : core_cm3.h
  • SCB_CPUID_VARIANT_Pos : core_cm3.h
  • SCB_DFSR_BKPT_Msk : core_cm3.h
  • SCB_DFSR_BKPT_Pos : core_cm3.h
  • SCB_DFSR_DWTTRAP_Msk : core_cm3.h
  • SCB_DFSR_DWTTRAP_Pos : core_cm3.h
  • SCB_DFSR_EXTERNAL_Msk : core_cm3.h
  • SCB_DFSR_EXTERNAL_Pos : core_cm3.h
  • SCB_DFSR_HALTED_Msk : core_cm3.h
  • SCB_DFSR_HALTED_Pos : core_cm3.h
  • SCB_DFSR_VCATCH_Msk : core_cm3.h
  • SCB_DFSR_VCATCH_Pos : core_cm3.h
  • SCB_HFSR_DEBUGEVT_Msk : core_cm3.h
  • SCB_HFSR_DEBUGEVT_Pos : core_cm3.h
  • SCB_HFSR_FORCED_Msk : core_cm3.h
  • SCB_HFSR_FORCED_Pos : core_cm3.h
  • SCB_HFSR_VECTTBL_Msk : core_cm3.h
  • SCB_HFSR_VECTTBL_Pos : core_cm3.h
  • SCB_ICSR_ISRPENDING_Msk : core_cm3.h
  • SCB_ICSR_ISRPENDING_Pos : core_cm3.h
  • SCB_ICSR_ISRPREEMPT_Msk : core_cm3.h
  • SCB_ICSR_ISRPREEMPT_Pos : core_cm3.h
  • SCB_ICSR_NMIPENDSET_Msk : core_cm3.h
  • SCB_ICSR_NMIPENDSET_Pos : core_cm3.h
  • SCB_ICSR_PENDSTCLR_Msk : core_cm3.h
  • SCB_ICSR_PENDSTCLR_Pos : core_cm3.h
  • SCB_ICSR_PENDSTSET_Msk : core_cm3.h
  • SCB_ICSR_PENDSTSET_Pos : core_cm3.h
  • SCB_ICSR_PENDSVCLR_Msk : core_cm3.h
  • SCB_ICSR_PENDSVCLR_Pos : core_cm3.h
  • SCB_ICSR_PENDSVSET_Msk : core_cm3.h
  • SCB_ICSR_PENDSVSET_Pos : core_cm3.h
  • SCB_ICSR_RETTOBASE_Msk : core_cm3.h
  • SCB_ICSR_RETTOBASE_Pos : core_cm3.h
  • SCB_ICSR_VECTACTIVE_Msk : core_cm3.h
  • SCB_ICSR_VECTACTIVE_Pos : core_cm3.h
  • SCB_ICSR_VECTPENDING_Msk : core_cm3.h
  • SCB_ICSR_VECTPENDING_Pos : core_cm3.h
  • SCB_SCR_SEVONPEND_Msk : core_cm3.h
  • SCB_SCR_SEVONPEND_Pos : core_cm3.h
  • SCB_SCR_SLEEPDEEP_Msk : core_cm3.h
  • SCB_SCR_SLEEPDEEP_Pos : core_cm3.h
  • SCB_SCR_SLEEPONEXIT_Msk : core_cm3.h
  • SCB_SCR_SLEEPONEXIT_Pos : core_cm3.h
  • SCB_SHCSR_BUSFAULTACT_Msk : core_cm3.h
  • SCB_SHCSR_BUSFAULTACT_Pos : core_cm3.h
  • SCB_SHCSR_BUSFAULTENA_Msk : core_cm3.h
  • SCB_SHCSR_BUSFAULTENA_Pos : core_cm3.h
  • SCB_SHCSR_BUSFAULTPENDED_Msk : core_cm3.h
  • SCB_SHCSR_BUSFAULTPENDED_Pos : core_cm3.h
  • SCB_SHCSR_MEMFAULTACT_Msk : core_cm3.h
  • SCB_SHCSR_MEMFAULTACT_Pos : core_cm3.h
  • SCB_SHCSR_MEMFAULTENA_Msk : core_cm3.h
  • SCB_SHCSR_MEMFAULTENA_Pos : core_cm3.h
  • SCB_SHCSR_MEMFAULTPENDED_Msk : core_cm3.h
  • SCB_SHCSR_MEMFAULTPENDED_Pos : core_cm3.h
  • SCB_SHCSR_MONITORACT_Msk : core_cm3.h
  • SCB_SHCSR_MONITORACT_Pos : core_cm3.h
  • SCB_SHCSR_PENDSVACT_Msk : core_cm3.h
  • SCB_SHCSR_PENDSVACT_Pos : core_cm3.h
  • SCB_SHCSR_SVCALLACT_Msk : core_cm3.h
  • SCB_SHCSR_SVCALLACT_Pos : core_cm3.h
  • SCB_SHCSR_SVCALLPENDED_Msk : core_cm3.h
  • SCB_SHCSR_SVCALLPENDED_Pos : core_cm3.h
  • SCB_SHCSR_SYSTICKACT_Msk : core_cm3.h
  • SCB_SHCSR_SYSTICKACT_Pos : core_cm3.h
  • SCB_SHCSR_USGFAULTACT_Msk : core_cm3.h
  • SCB_SHCSR_USGFAULTACT_Pos : core_cm3.h
  • SCB_SHCSR_USGFAULTENA_Msk : core_cm3.h
  • SCB_SHCSR_USGFAULTENA_Pos : core_cm3.h
  • SCB_SHCSR_USGFAULTPENDED_Msk : core_cm3.h
  • SCB_SHCSR_USGFAULTPENDED_Pos : core_cm3.h
  • SCB_VTOR_TBLBASE_Msk : core_cm3.h
  • SCB_VTOR_TBLBASE_Pos : core_cm3.h
  • SCB_VTOR_TBLOFF_Msk : core_cm3.h
  • SCB_VTOR_TBLOFF_Pos : core_cm3.h
  • SCRLAR : drv_glcd.h
  • SCS_BASE : core_cm3.h
  • SCS_Val : system_LPC17xx.c
  • SCSI_FORMAT_UNIT : msc.h
  • SCSI_INQUIRY : msc.h
  • SCSI_MEDIA_REMOVAL : msc.h
  • SCSI_MODE_SELECT10 : msc.h
  • SCSI_MODE_SELECT6 : msc.h
  • SCSI_MODE_SENSE10 : msc.h
  • SCSI_MODE_SENSE6 : msc.h
  • SCSI_READ10 : msc.h
  • SCSI_READ_CAPACITY : msc.h
  • SCSI_READ_FORMAT_CAPACITIES : msc.h
  • SCSI_REQUEST_SENSE : msc.h
  • SCSI_START_STOP_UNIT : msc.h
  • SCSI_TEST_UNIT_READY : msc.h
  • SCSI_VERIFY10 : msc.h
  • SCSI_WRITE10 : msc.h
  • SD_CMD_BAD_PARAMETER : spi_sdcard.c
  • SD_CMD_BLOCK_LENGTH : spi_sdcard.c
  • sd_cmd_buf : spi_sdcard.c
  • sd_connect_status : spi_sdcard.c
  • SD_CONNECTED : spi_sdcard.c
  • SD_DATA_BLOCK_LENGTH : spi_sdcard.c
  • sd_data_buf : spi_sdcard.c
  • SD_DETECT_PINNUM : spi_sdcard.c
  • SD_DETECT_PORTNUM : spi_sdcard.c
  • SD_DISCONNECTED : spi_sdcard.c
  • sd_error : spi_sdcard.c
  • SD_ERROR_ACMD41 : spi_sdcard.c
  • SD_ERROR_BUS_NOT_IDLE : spi_sdcard.c
  • SD_ERROR_CMD0 : spi_sdcard.c
  • SD_ERROR_CMD55 : spi_sdcard.c
  • SD_ERROR_CMD59 : spi_sdcard.c
  • SD_ERROR_TIMEOUT : spi_sdcard.c
  • SD_ERROR_TOKEN : spi_sdcard.c
  • SD_GetCardConnectStatus() : spi_sdcard.c
  • SD_GetCID() : spi_sdcard.c
  • SD_Init() : spi_sdcard.c
  • SD_NG : spi_sdcard.c
  • SD_OK : spi_sdcard.c
  • SD_SendCommand() : spi_sdcard.c
  • SD_SendReceiveData_Polling() : spi_sdcard.c
  • SD_WAIT_R1_TIMEOUT : spi_sdcard.c
  • SD_WaitDeviceIdle() : spi_sdcard.c
  • SD_WaitR1() : spi_sdcard.c
  • SEND_FRAME1 : tcpip.h
  • SEND_FRAME2 : tcpip.h
  • send_menu : rs485_master.c
  • send_msg : rs485_slave.c
  • sendchar() : printf-stdarg.c , Retarget.c , Serial.c
  • SendFrame1() : tcpip.c , tcpip.h
  • SendFrame2() : tcpip.c , tcpip.h
  • ser_AvailChar() : serial.c , serial.h
  • SER_BUF_COUNT : serial.c
  • SER_BUF_EMPTY : serial.c
  • SER_BUF_FULL : serial.c
  • SER_BUF_MASK : serial.c
  • SER_BUF_RD : serial.c
  • SER_BUF_RESET : serial.c
  • SER_BUF_SIZE : serial.c
  • SER_BUF_T : serial.c
  • SER_BUF_WR : serial.c
  • ser_ClosePort() : serial.c , serial.h
  • ser_in : serial.c
  • ser_InitPort0() : serial.c , serial.h
  • ser_InitPort1() : serial.c , serial.h
  • ser_LineState() : serial.c , serial.h
  • ser_lineState : serial.c
  • ser_OpenPort() : serial.c , serial.h
  • ser_out : serial.c
  • ser_Read() : serial.c , serial.h
  • ser_txRestart : serial.c
  • ser_Write() : serial.c , serial.h
  • SET : lpc_types.h
  • SETCON : drv_glcd.h
  • SetOutReport() : demo.c , demo.h
  • SetState : lpc_types.h
  • SetupPacket : usbcore.c , usbcore.h , usbcore.c , usbcore.h , usbcore.c , usbcore.h , usbcore.c , usbcore.h
  • SFF_GPR_Table : can_test_aflut.c
  • SFF_Table : can_test_aflut.c
  • shell_init() : shell.c , shell.h
  • shell_input() : shell.c , shell.h
  • shell_output() : shell.h , telnetd.c
  • SHELL_PROMPT : shell.c
  • shell_prompt() : shell.h , telnetd.c
  • shell_quit() : shell.h , telnetd.c
  • shell_start() : shell.c , shell.h
  • SIGNAL_FREQ_IN_HZ : dac_wave_generate.c
  • SIGNAL_MODE : qei_test_velo.c
  • SINE_FREQ_IN_HZ : dac_sinewave_test.c
  • SLAVE_ADDR : rs485_slave.c
  • SLAVE_ADDR_A : rs485_master.c
  • SLAVE_ADDR_B : rs485_master.c
  • Slave_Buf : i2c_master_slave_int_test.c , slave.c
  • Slave_Rx_Buf : ti_test.c
  • slave_test : i2c_master_slave_int_test.c , slave.c
  • Slave_Tx_Buf : microwire_test.c , ti_test.c
  • slaveA_msg : rs485_master.c
  • slaveB_msg : rs485_master.c
  • SLPIN : drv_glcd.h
  • SLPOUT : drv_glcd.h
  • SLVADDR : i2c_interrupt_test.c , i2c_polling_test.c
  • smtp_220 : smtp-strings.c , smtp-strings.h
  • smtp_appcall() : smtp.c
  • smtp_cc : smtp-strings.c , smtp-strings.h
  • smtp_configure() : smtp.c , smtp.h
  • smtp_crnl : smtp-strings.c , smtp-strings.h
  • smtp_crnlperiodcrnl : smtp-strings.c , smtp-strings.h
  • smtp_data : smtp-strings.c , smtp-strings.h
  • smtp_done() : smtp.h
  • SMTP_ERR_OK : smtp.h
  • smtp_from : smtp-strings.c , smtp-strings.h
  • smtp_helo : smtp-strings.c , smtp-strings.h
  • smtp_init() : smtp.c
  • smtp_mail_from : smtp-strings.c , smtp-strings.h
  • smtp_quit : smtp-strings.c , smtp-strings.h
  • smtp_rcpt_to : smtp-strings.c , smtp-strings.h
  • smtp_send() : smtp.c , smtp.h
  • SMTP_SEND : smtp.h
  • smtp_subject : smtp-strings.c , smtp-strings.h
  • smtp_to : smtp-strings.c , smtp-strings.h
  • snprintf() : printf-stdarg.c
  • SOCK_ACTIVE : tcpip.h
  • SOCK_CONNECTED : tcpip.h
  • SOCK_DATA_AVAILABLE : tcpip.h
  • SOCK_ERR_ARP_TIMEOUT : tcpip.h
  • SOCK_ERR_CONN_RESET : tcpip.h
  • SOCK_ERR_ETHERNET : tcpip.h
  • SOCK_ERR_OK : tcpip.h
  • SOCK_ERR_REMOTE : tcpip.h
  • SOCK_ERR_TCP_TIMEOUT : tcpip.h
  • SOCK_ERROR_MASK : tcpip.h
  • SOCK_TX_BUF_RELEASED : tcpip.h
  • SocketStatus : tcpip.h
  • SPEED_10 : emac.h
  • SPEED_100 : emac.h
  • SPI_CheckStatus() : lpc17xx_spi.h
  • SPI_ClearIntPending() : lpc17xx_spi.h
  • SPI_ConfigStruct : spi_loopback_test.c , spi_master.c , spi_interrupt_test.c , spi_polling_test.c , spi_sdcard.c , spi_slave.c
  • SPI_ConfigStructInit() : lpc17xx_spi.h
  • SPI_CPHA_FIRST : lpc17xx_spi.h
  • SPI_CPHA_SECOND : lpc17xx_spi.h
  • SPI_CPOL_HI : lpc17xx_spi.h
  • SPI_CPOL_LO : lpc17xx_spi.h
  • SPI_DATA : GLCD_SPI_LPC1700.c
  • SPI_DATA_LSB_FIRST : lpc17xx_spi.h
  • SPI_DATA_MSB_FIRST : lpc17xx_spi.h
  • SPI_DATABIT_10 : lpc17xx_spi.h
  • SPI_DATABIT_11 : lpc17xx_spi.h
  • SPI_DATABIT_12 : lpc17xx_spi.h
  • SPI_DATABIT_13 : lpc17xx_spi.h
  • SPI_DATABIT_14 : lpc17xx_spi.h
  • SPI_DATABIT_15 : lpc17xx_spi.h
  • SPI_DATABIT_16 : lpc17xx_spi.h
  • SPI_DATABIT_8 : lpc17xx_spi.h
  • SPI_DATABIT_9 : lpc17xx_spi.h
  • SPI_DATABIT_SIZE : spi_loopback_test.c , spi_master.c , spi_slave.c
  • SPI_DeInit() : lpc17xx_spi.h
  • SPI_GetDataSize() : lpc17xx_spi.h
  • SPI_GetIntStatus() : lpc17xx_spi.h
  • SPI_GetStatus() : lpc17xx_spi.h
  • SPI_INDEX : GLCD_SPI_LPC1700.c
  • SPI_Init() : lpc17xx_spi.h
  • SPI_IntCmd() : lpc17xx_spi.h
  • SPI_IRQHandler() : spi_interrupt_test.c
  • SPI_IRQn : LPC17xx.h
  • SPI_MASTER_MODE : lpc17xx_spi.h
  • SPI_RD : GLCD_SPI_LPC1700.c
  • SPI_ReadWrite() : lpc17xx_spi.h
  • SPI_ReceiveData() : lpc17xx_spi.h
  • SPI_SendData() : lpc17xx_spi.h
  • SPI_SetClock() : lpc17xx_spi.h
  • SPI_SLAVE_MODE : lpc17xx_spi.h
  • SPI_SPCCR_BITMASK : lpc17xx_spi.h
  • SPI_SPCCR_COUNTER : lpc17xx_spi.h
  • SPI_SPCR_BIT_EN : lpc17xx_spi.h
  • SPI_SPCR_BITMASK : lpc17xx_spi.h
  • SPI_SPCR_BITS : lpc17xx_spi.h
  • SPI_SPCR_CPHA_SECOND : lpc17xx_spi.h
  • SPI_SPCR_CPOL_LOW : lpc17xx_spi.h
  • SPI_SPCR_LSBF : lpc17xx_spi.h
  • SPI_SPCR_MSTR : lpc17xx_spi.h
  • SPI_SPCR_SPIE : lpc17xx_spi.h
  • SPI_SPDR_BITMASK : lpc17xx_spi.h
  • SPI_SPDR_HI_MASK : lpc17xx_spi.h
  • SPI_SPDR_LO_MASK : lpc17xx_spi.h
  • SPI_SPINT_BITMASK : lpc17xx_spi.h
  • SPI_SPINT_INTFLAG : lpc17xx_spi.h
  • SPI_SPSR_ABRT : lpc17xx_spi.h
  • SPI_SPSR_BITMASK : lpc17xx_spi.h
  • SPI_SPSR_MODF : lpc17xx_spi.h
  • SPI_SPSR_ROVR : lpc17xx_spi.h
  • SPI_SPSR_SPIF : lpc17xx_spi.h
  • SPI_SPSR_WCOL : lpc17xx_spi.h
  • SPI_SPTCR_BITMASK : lpc17xx_spi.h
  • SPI_SPTCR_TEST_MASK : lpc17xx_spi.h
  • SPI_SPTSR_ABRT : lpc17xx_spi.h
  • SPI_SPTSR_MASKBIT : lpc17xx_spi.h
  • SPI_SPTSR_MODF : lpc17xx_spi.h
  • SPI_SPTSR_ROVR : lpc17xx_spi.h
  • SPI_SPTSR_SPIF : lpc17xx_spi.h
  • SPI_SPTSR_WCOL : lpc17xx_spi.h
  • SPI_START : GLCD_SPI_LPC1700.c
  • SPI_STAT_ABRT : lpc17xx_spi.h
  • SPI_STAT_DONE : lpc17xx_spi.h
  • SPI_STAT_ERROR : lpc17xx_spi.h
  • SPI_STAT_MODF : lpc17xx_spi.h
  • SPI_STAT_ROVR : lpc17xx_spi.h
  • SPI_STAT_SPIF : lpc17xx_spi.h
  • SPI_STAT_WCOL : lpc17xx_spi.h
  • SPI_TRANSFER_INTERRUPT : lpc17xx_spi.h
  • SPI_TRANSFER_POLLING : lpc17xx_spi.h
  • SPI_TRANSFER_Type : lpc17xx_spi.h
  • SPI_WR : GLCD_SPI_LPC1700.c
  • spireadbuf : spi_interrupt_test.c , spi_polling_test.c
  • sprintf() : printf-stdarg.c
  • SSP0_IRQHandler() : ssp_slave.c , ti_test.c , sc16is750_int.c
  • SSP0_IRQn : LPC17xx.h
  • SSP1_IRQHandler() : ti_test.c
  • SSP1_IRQn : LPC17xx.h
  • SSP_ClearIntPending() : lpc17xx_ssp.h
  • SSP_Cmd() : lpc17xx_ssp.h
  • SSP_ConfigStruct : ssp_master.c , microwire_test.c , sc16is750_int.c , sc16is750_polling.c , ssp_slave.c , ti_test.c , ssp_dma.c
  • SSP_ConfigStructInit() : lpc17xx_ssp.h
  • SSP_CPHA_FIRST : lpc17xx_ssp.h
  • SSP_CPHA_SECOND : lpc17xx_ssp.h
  • SSP_CPOL_HI : lpc17xx_ssp.h
  • SSP_CPOL_LO : lpc17xx_ssp.h
  • SSP_CPSR_BITMASK : lpc17xx_ssp.h
  • SSP_CPSR_CPDVSR : lpc17xx_ssp.h
  • SSP_CR0_BITMASK : lpc17xx_ssp.h
  • SSP_CR0_CPHA_SECOND : lpc17xx_ssp.h
  • SSP_CR0_CPOL_HI : lpc17xx_ssp.h
  • SSP_CR0_DSS : lpc17xx_ssp.h
  • SSP_CR0_FRF_MICROWIRE : lpc17xx_ssp.h
  • SSP_CR0_FRF_SPI : lpc17xx_ssp.h
  • SSP_CR0_FRF_TI : lpc17xx_ssp.h
  • SSP_CR0_SCR : lpc17xx_ssp.h
  • SSP_CR1_BITMASK : lpc17xx_ssp.h
  • SSP_CR1_LBM_EN : lpc17xx_ssp.h
  • SSP_CR1_SLAVE_EN : lpc17xx_ssp.h
  • SSP_CR1_SO_DISABLE : lpc17xx_ssp.h
  • SSP_CR1_SSP_EN : lpc17xx_ssp.h
  • SSP_DATABIT_10 : lpc17xx_ssp.h
  • SSP_DATABIT_11 : lpc17xx_ssp.h
  • SSP_DATABIT_12 : lpc17xx_ssp.h
  • SSP_DATABIT_13 : lpc17xx_ssp.h
  • SSP_DATABIT_14 : lpc17xx_ssp.h
  • SSP_DATABIT_15 : lpc17xx_ssp.h
  • SSP_DATABIT_16 : lpc17xx_ssp.h
  • SSP_DATABIT_4 : lpc17xx_ssp.h
  • SSP_DATABIT_5 : lpc17xx_ssp.h
  • SSP_DATABIT_6 : lpc17xx_ssp.h
  • SSP_DATABIT_7 : lpc17xx_ssp.h
  • SSP_DATABIT_8 : lpc17xx_ssp.h
  • SSP_DATABIT_9 : lpc17xx_ssp.h
  • SSP_DeInit() : lpc17xx_ssp.h
  • SSP_DMA_BITMASK : lpc17xx_ssp.h
  • SSP_DMA_RX : lpc17xx_ssp.h
  • SSP_DMA_RXDMA_EN : lpc17xx_ssp.h
  • SSP_DMA_TX : lpc17xx_ssp.h
  • SSP_DMA_TXDMA_EN : lpc17xx_ssp.h
  • SSP_DMACmd() : lpc17xx_ssp.h
  • SSP_DR_BITMASK : lpc17xx_ssp.h
  • SSP_FIFO_SIZE : glcd_ll.h
  • SSP_FRAME_MICROWIRE : lpc17xx_ssp.h
  • SSP_FRAME_SPI : lpc17xx_ssp.h
  • SSP_FRAME_TI : lpc17xx_ssp.h
  • SSP_GetDataSize() : lpc17xx_ssp.h
  • SSP_GetIntStatus() : lpc17xx_ssp.h
  • SSP_GetRawIntStatus() : lpc17xx_ssp.h
  • SSP_GetRawIntStatusReg() : lpc17xx_ssp.h
  • SSP_GetStatus() : lpc17xx_ssp.h
  • SSP_ICR_BITMASK : lpc17xx_ssp.h
  • SSP_ICR_ROR : lpc17xx_ssp.h
  • SSP_ICR_RT : lpc17xx_ssp.h
  • SSP_IMSC_BITMASK : lpc17xx_ssp.h
  • SSP_IMSC_ROR : lpc17xx_ssp.h
  • SSP_IMSC_RT : lpc17xx_ssp.h
  • SSP_IMSC_RX : lpc17xx_ssp.h
  • SSP_IMSC_TX : lpc17xx_ssp.h
  • SSP_Init() : lpc17xx_ssp.h
  • SSP_INTCFG_ROR : lpc17xx_ssp.h
  • SSP_INTCFG_RT : lpc17xx_ssp.h
  • SSP_INTCFG_RX : lpc17xx_ssp.h
  • SSP_INTCFG_TX : lpc17xx_ssp.h
  • SSP_INTCLR_ROR : lpc17xx_ssp.h
  • SSP_INTCLR_RT : lpc17xx_ssp.h
  • SSP_IntConfig() : lpc17xx_ssp.h
  • SSP_INTSTAT_RAW_ROR : lpc17xx_ssp.h
  • SSP_INTSTAT_RAW_RT : lpc17xx_ssp.h
  • SSP_INTSTAT_RAW_RX : lpc17xx_ssp.h
  • SSP_INTSTAT_RAW_TX : lpc17xx_ssp.h
  • SSP_INTSTAT_ROR : lpc17xx_ssp.h
  • SSP_INTSTAT_RT : lpc17xx_ssp.h
  • SSP_INTSTAT_RX : lpc17xx_ssp.h
  • SSP_INTSTAT_TX : lpc17xx_ssp.h
  • SSP_LoopBackCmd() : lpc17xx_ssp.h
  • ssp_Master_IntHandler() : ti_test.c
  • SSP_MASTER_MODE : lpc17xx_ssp.h
  • ssp_MasterReadWrite() : ti_test.c
  • SSP_MIS_BITMASK : lpc17xx_ssp.h
  • SSP_MIS_ROR : lpc17xx_ssp.h
  • SSP_MIS_RT : lpc17xx_ssp.h
  • SSP_MIS_RX : lpc17xx_ssp.h
  • SSP_MIS_TX : lpc17xx_ssp.h
  • ssp_MW_GetCMD() : microwire_test.c
  • ssp_MW_GetRSP() : microwire_test.c
  • ssp_MW_SendCMD() : microwire_test.c
  • ssp_MW_SendRSP() : microwire_test.c
  • SSP_ReadWrite() : lpc17xx_ssp.h
  • SSP_ReceiveData() : lpc17xx_ssp.h
  • SSP_RIS_BITMASK : lpc17xx_ssp.h
  • SSP_RIS_ROR : lpc17xx_ssp.h
  • SSP_RIS_RT : lpc17xx_ssp.h
  • SSP_RIS_RX : lpc17xx_ssp.h
  • SSP_RIS_TX : lpc17xx_ssp.h
  • SSP_SendData() : lpc17xx_ssp.h
  • ssp_Slave_IntHandler() : ti_test.c
  • SSP_SLAVE_MODE : lpc17xx_ssp.h
  • SSP_SlaveOutputCmd() : lpc17xx_ssp.h
  • ssp_SlaveReadWrite() : ti_test.c
  • SSP_SR_BITMASK : lpc17xx_ssp.h
  • SSP_SR_BSY : lpc17xx_ssp.h
  • SSP_SR_RFF : lpc17xx_ssp.h
  • SSP_SR_RNE : lpc17xx_ssp.h
  • SSP_SR_TFE : lpc17xx_ssp.h
  • SSP_SR_TNF : lpc17xx_ssp.h
  • SSP_STAT_BUSY : lpc17xx_ssp.h
  • SSP_STAT_DONE : lpc17xx_ssp.h
  • SSP_STAT_ERROR : lpc17xx_ssp.h
  • SSP_STAT_RXFIFO_FULL : lpc17xx_ssp.h
  • SSP_STAT_RXFIFO_NOTEMPTY : lpc17xx_ssp.h
  • SSP_STAT_TXFIFO_EMPTY : lpc17xx_ssp.h
  • SSP_STAT_TXFIFO_NOTFULL : lpc17xx_ssp.h
  • SSP_TRANSFER_INTERRUPT : lpc17xx_ssp.h
  • SSP_TRANSFER_POLLING : lpc17xx_ssp.h
  • SSP_TRANSFER_Type : lpc17xx_ssp.h
  • SSPDEV_M : ti_test.c , microwire_test.c
  • SSPDEV_S : microwire_test.c , ti_test.c
  • sspreadbuf : sc16is750_polling.c , sc16is750_int.c
  • ST_CALIB_NOREF : lpc17xx_systick.h
  • ST_CALIB_SKEW : lpc17xx_systick.h
  • ST_CALIB_TENMS : lpc17xx_systick.h
  • ST_CTRL_CLKSOURCE : lpc17xx_systick.h
  • ST_CTRL_COUNTFLAG : lpc17xx_systick.h
  • ST_CTRL_ENABLE : lpc17xx_systick.h
  • ST_CTRL_TICKINT : lpc17xx_systick.h
  • ST_RELOAD_CURRENT : lpc17xx_systick.h
  • ST_RELOAD_RELOAD : lpc17xx_systick.h
  • StartReadFrame() : EMAC.h , EMAC.c
  • STATE_ACKED : psock.c
  • STATE_ASKING : resolv.c
  • STATE_BLOCKED_CLOSE : psock.c
  • STATE_BLOCKED_NEWDATA : psock.c
  • STATE_BLOCKED_SEND : psock.c
  • STATE_CLOSE : telnetd.c
  • STATE_CONFIG_RECEIVED : dhcpc.c
  • STATE_DATA_SENT : psock.c
  • STATE_DO : telnetd.c
  • STATE_DONE : resolv.c
  • STATE_DONT : telnetd.c
  • STATE_ERROR : resolv.c
  • STATE_IAC : telnetd.c
  • STATE_INITIAL : dhcpc.c
  • STATE_NEW : resolv.c
  • STATE_NONE : psock.c
  • STATE_NORMAL : telnetd.c
  • STATE_OFFER_RECEIVED : dhcpc.c
  • STATE_OUTPUT : httpd.c
  • STATE_READ : psock.c
  • STATE_SENDING : dhcpc.c
  • STATE_UNUSED : resolv.c
  • STATE_WAITING : httpd.c
  • STATE_WILL : telnetd.c
  • STATE_WONT : telnetd.c
  • STATIC : lpc_types.h
  • Status : lpc_types.h
  • STD_ID_FORMAT : lpc17xx_can.h
  • SUBMASK_1 : tcpip.h
  • SUBMASK_2 : tcpip.h
  • SUBMASK_3 : tcpip.h
  • SUBMASK_4 : tcpip.h
  • SubnetMask : tcpip.h
  • SUCCESS : lpc_types.h
  • sUnion : cdc.h
  • SVC_Handler() : privilege.c
  • SVCall_IRQn : LPC17xx.h
  • SWAPB : tcpip.h
  • SwapBytes() : tcpip.h , tcpip.c
  • SWRESET : drv_glcd.h
  • SYN_RECD : tcpip.h
  • SYN_SENT : tcpip.h
  • Synchronous : uart_autobaud_test.c
  • syncmenu : uart_autobaud_test.c
  • SYS_ERR_INT : usbreg.h
  • SystemCoreClock : system_LPC17xx.c , system_LPC17xx.h
  • SystemCoreClockUpdate() : system_LPC17xx.c , system_LPC17xx.h
  • SystemInit() : system_LPC17xx.c , system_LPC17xx.h
  • SysTick : core_cm3.h
  • SysTick_BASE : core_cm3.h
  • SysTick_CALIB_NOREF_Msk : core_cm3.h
  • SysTick_CALIB_NOREF_Pos : core_cm3.h
  • SysTick_CALIB_SKEW_Msk : core_cm3.h
  • SysTick_CALIB_SKEW_Pos : core_cm3.h
  • SysTick_CALIB_TENMS_Msk : core_cm3.h
  • SysTick_CALIB_TENMS_Pos : core_cm3.h
  • SYSTICK_ClearCounterFlag() : lpc17xx_systick.h
  • SYSTICK_Cmd() : lpc17xx_systick.h
  • SysTick_CTRL_CLKSOURCE_Msk : core_cm3.h
  • SysTick_CTRL_CLKSOURCE_Pos : core_cm3.h
  • SysTick_CTRL_COUNTFLAG_Msk : core_cm3.h
  • SysTick_CTRL_COUNTFLAG_Pos : core_cm3.h
  • SysTick_CTRL_ENABLE_Msk : core_cm3.h
  • SysTick_CTRL_ENABLE_Pos : core_cm3.h
  • SysTick_CTRL_TICKINT_Msk : core_cm3.h
  • SysTick_CTRL_TICKINT_Pos : core_cm3.h
  • SYSTICK_ExternalInit() : lpc17xx_systick.h
  • SYSTICK_GetCurrentValue() : lpc17xx_systick.h
  • SysTick_Handler() : tcpip.c , LedBlinky.c , 10ms_base.c , tcpip.h , clock-arch.c , vt_relocation.c , systick_stclk.c
  • SYSTICK_IntCmd() : lpc17xx_systick.h
  • SYSTICK_InternalInit() : lpc17xx_systick.h
  • SysTick_IRQn : LPC17xx.h
  • SysTick_LOAD_RELOAD_Msk : core_cm3.h
  • SysTick_LOAD_RELOAD_Pos : core_cm3.h
  • SYSTICK_PERIOD : tcpip.c
  • SysTick_VAL_CURRENT_Msk : core_cm3.h
  • SysTick_VAL_CURRENT_Pos : core_cm3.h
  • SysTickCnt : LedBlinky.c
Generated on Tue Jun 7 15:00:15 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Data Fields

  • All
  • Functions
  • Variables
  • Typedefs
  • Enumerations
  • Enumerator
  • Defines
  • _
  • a
  • b
  • c
  • d
  • e
  • f
  • g
  • h
  • i
  • k
  • l
  • m
  • n
  • o
  • p
  • q
  • r
  • s
  • t
  • u
  • v
  • w
  • x
  • y
Here is a list of all functions, variables, defines, enums, and typedefs with links to the files they belong to:

- t -

  • T1 : gen_diff_delay.c
  • T2 : gen_diff_delay.c
  • tapdev_init() : emac.h , emac.c
  • tapdev_read() : emac.c , emac.h
  • tapdev_send() : emac.h , emac.c
  • TCP_ACK : uip.c
  • TCP_ACKNR_OFS : tcpip.h
  • TCP_ACTIVE_OPEN : tcpip.h
  • TCP_CHKSUM_OFS : tcpip.h
  • TCP_CLOSE_REQUESTED : tcpip.h
  • TCP_CODE_ACK : tcpip.h
  • TCP_CODE_FIN : tcpip.h
  • TCP_CODE_PSH : tcpip.h
  • TCP_CODE_RST : tcpip.h
  • TCP_CODE_SYN : tcpip.h
  • TCP_CODE_URG : tcpip.h
  • TCP_CTL : uip.c
  • TCP_DATA_CODE_OFS : tcpip.h
  • TCP_DATA_FRAME : tcpip.h
  • TCP_DATA_OFS : tcpip.h
  • TCP_DESTPORT_OFS : tcpip.h
  • TCP_FIN : uip.c
  • TCP_FIN_FRAME : tcpip.h
  • TCP_HEADER_SIZE : tcpip.h
  • TCP_OPT_END : uip.c
  • TCP_OPT_MSS : tcpip.h , uip.c
  • TCP_OPT_MSS_LEN : uip.c
  • TCP_OPT_MSS_SIZE : tcpip.h
  • TCP_OPT_NOOP : uip.c
  • TCP_PORT_CHARGEN : tcpip.h
  • TCP_PORT_DAYTIME : tcpip.h
  • TCP_PORT_DISCARD : tcpip.h
  • TCP_PORT_ECHO : tcpip.h
  • TCP_PORT_HTTP : tcpip.h
  • TCP_PORT_QOTD : tcpip.h
  • TCP_PSH : uip.c
  • TCP_RST : uip.c
  • TCP_RX_BUF : tcpip.h
  • TCP_SEQNR_OFS : tcpip.h
  • TCP_SRCPORT_OFS : tcpip.h
  • TCP_SYN : uip.c
  • TCP_SYN_ACK_FRAME : tcpip.h
  • TCP_SYN_FRAME : tcpip.h
  • TCP_TIMER_RUNNING : tcpip.h
  • TCP_TX_BUF : tcpip.h
  • TCP_URG : uip.c
  • TCP_URGENT_OFS : tcpip.h
  • TCP_WINDOW_OFS : tcpip.h
  • TCPAckNr : tcpip.h
  • TCPActiveOpen() : tcpip.c , tcpip.h
  • TCPClose() : tcpip.c , tcpip.h
  • TCPFlags : tcpip.h
  • TCPHandleRetransmission() : tcpip.c , tcpip.h
  • TCPHandleTimeout() : tcpip.c , tcpip.h
  • TCPLocalPort : tcpip.h
  • TCPLowLevelInit() : tcpip.c , tcpip.h
  • TCPPassiveOpen() : tcpip.c , tcpip.h
  • TCPReleaseRxBuffer() : tcpip.c , tcpip.h
  • TCPRemotePort : tcpip.h
  • TCPRestartTimer() : tcpip.c , tcpip.h
  • TCPRxDataCount : tcpip.h
  • TCPSeqNr : tcpip.h
  • TCPStartRetryTimer() : tcpip.c , tcpip.h
  • TCPStartTimeWaitTimer() : tcpip.c , tcpip.h
  • TCPStateMachine : tcpip.h
  • TCPStopTimer() : tcpip.c , tcpip.h
  • TCPTimer : tcpip.h
  • TCPTransmitTxBuffer() : tcpip.c , tcpip.h
  • TCPTxDataCount : tcpip.h
  • TCPUNASeqNr : tcpip.h
  • TELNET_DO : telnetd.c
  • TELNET_DONT : telnetd.c
  • TELNET_IAC : telnetd.c
  • TELNET_WILL : telnetd.c
  • TELNET_WONT : telnetd.c
  • telnetd_appcall() : telnetd.c , telnetd.h
  • TELNETD_CONF_LINELEN : telnetd.h
  • TELNETD_CONF_NUMLINES : telnetd.h
  • telnetd_init() : telnetd.c
  • Terminal_18_24_12 : lcdtest.c
  • Terminal_6_8_6 : lcdtest.c
  • Terminal_9_12_6 : lcdtest.c , Terminal_9_12x6.c
  • terminator : rs485_master.c , rs485_slave.c
  • TEST_IRDA : uart_irda_receive.c , uart_irda_transmit.c
  • TEST_UART : uart_hw_flow_control.c , uart_irda_receive.c , uart_irda_transmit.c , uart_polling_test.c
  • TEXT_BEL1_FUNC : drv_glcd.h
  • TEXT_DEF_TAB_SIZE : drv_glcd.h
  • TFE : GLCD_SPI_LPC1700.c
  • THREAD_PRIVILEDGED_MASK : privilege.c
  • THREAD_PRIVILEGED : privilege.c
  • THREAD_UNPRIVILEGED : privilege.c
  • Tick : usbdmain.c
  • Ticks : clock-arch.c
  • TIM_CAP_FALLING : lpc17xx_timer.h
  • TIM_CAP_INT : lpc17xx_timer.h
  • TIM_CAP_MODE_OPT : lpc17xx_timer.h
  • TIM_CAP_RISING : lpc17xx_timer.h
  • TIM_CAPTURE_ANY : lpc17xx_timer.h
  • TIM_CAPTURE_FALLING : lpc17xx_timer.h
  • TIM_CAPTURE_NONE : lpc17xx_timer.h
  • TIM_CAPTURE_RISING : lpc17xx_timer.h
  • TIM_CaptureConfigStruct : timer_capture.c , freqmeasure.c
  • TIM_CCR_CHANNEL_MASKBIT : lpc17xx_timer.h
  • TIM_CCR_MASKBIT : lpc17xx_timer.h
  • TIM_ClearIntCapturePending() : lpc17xx_timer.h
  • TIM_ClearIntPending() : lpc17xx_timer.h
  • TIM_Cmd() : lpc17xx_timer.h
  • TIM_ConfigCapture() : lpc17xx_timer.h
  • TIM_ConfigMatch() : lpc17xx_timer.h
  • TIM_ConfigStruct : timer_capture.c , freqmeasure.c , timer_int_match.c , timer_poll_match.c , pwm_signal.c
  • TIM_ConfigStructInit() : lpc17xx_timer.h
  • TIM_COUNTER_ANY_MODE : lpc17xx_timer.h
  • TIM_COUNTER_FALLING_MODE : lpc17xx_timer.h
  • TIM_COUNTER_INCAP0 : lpc17xx_timer.h
  • TIM_COUNTER_INCAP1 : lpc17xx_timer.h
  • TIM_COUNTER_INPUT_OPT : lpc17xx_timer.h
  • TIM_COUNTER_MODE : lpc17xx_timer.h
  • TIM_COUNTER_RISING_MODE : lpc17xx_timer.h
  • TIM_CR0_INT : lpc17xx_timer.h
  • TIM_CR1_INT : lpc17xx_timer.h
  • TIM_CTCR_INPUT_MASK : lpc17xx_timer.h
  • TIM_CTCR_MASKBIT : lpc17xx_timer.h
  • TIM_CTCR_MODE_MASK : lpc17xx_timer.h
  • TIM_DeInit() : lpc17xx_timer.h
  • TIM_EDGE_MASK : lpc17xx_timer.h
  • TIM_EM : lpc17xx_timer.h
  • TIM_EM_HIGH : lpc17xx_timer.h
  • TIM_EM_LOW : lpc17xx_timer.h
  • TIM_EM_MASK : lpc17xx_timer.h
  • TIM_EM_NOTHING : lpc17xx_timer.h
  • TIM_EM_SET : lpc17xx_timer.h
  • TIM_EM_TOGGLE : lpc17xx_timer.h
  • TIM_EMR_MASKBIT : lpc17xx_timer.h
  • TIM_ENABLE : lpc17xx_timer.h
  • TIM_EXTMATCH_HIGH : lpc17xx_timer.h
  • TIM_EXTMATCH_LOW : lpc17xx_timer.h
  • TIM_EXTMATCH_NOTHING : lpc17xx_timer.h
  • TIM_EXTMATCH_OPT : lpc17xx_timer.h
  • TIM_EXTMATCH_TOGGLE : lpc17xx_timer.h
  • TIM_GetCaptureValue() : lpc17xx_timer.h
  • TIM_GetIntCaptureStatus() : lpc17xx_timer.h
  • TIM_GetIntStatus() : lpc17xx_timer.h
  • TIM_Init() : lpc17xx_timer.h
  • TIM_INT_ON_CAP : lpc17xx_timer.h
  • TIM_INT_ON_MATCH : lpc17xx_timer.h
  • TIM_INT_TYPE : lpc17xx_timer.h
  • TIM_IR_CLR : lpc17xx_timer.h
  • TIM_MATCH_INT : lpc17xx_timer.h
  • TIM_MatchConfigStruct : timer_capture.c , timer_int_match.c , timer_poll_match.c , pwm_signal.c
  • TIM_MCR_CHANNEL_MASKBIT : lpc17xx_timer.h
  • TIM_MCR_MASKBIT : lpc17xx_timer.h
  • TIM_MODE_OPT : lpc17xx_timer.h
  • TIM_MR0_INT : lpc17xx_timer.h
  • TIM_MR1_INT : lpc17xx_timer.h
  • TIM_MR2_INT : lpc17xx_timer.h
  • TIM_MR3_INT : lpc17xx_timer.h
  • TIM_PRESCALE_OPT : lpc17xx_timer.h
  • TIM_PRESCALE_TICKVAL : lpc17xx_timer.h
  • TIM_PRESCALE_USVAL : lpc17xx_timer.h
  • TIM_RESET : lpc17xx_timer.h
  • TIM_RESET_ON_MATCH : lpc17xx_timer.h
  • TIM_ResetCounter() : lpc17xx_timer.h
  • TIM_SetMatchExt() : lpc17xx_timer.h
  • TIM_STOP_ON_MATCH : lpc17xx_timer.h
  • TIM_TCR_MASKBIT : lpc17xx_timer.h
  • TIM_TIMER_MODE : lpc17xx_timer.h
  • TIM_UpdateMatchValue() : lpc17xx_timer.h
  • TIME_INTERVAL : rit_interrupt.c
  • TIME_OUT : pwm_match_int.c , lcdtest.c
  • TIME_WAIT : tcpip.h
  • timer0_flag : timer_int_match.c , timer_capture.c
  • TIMER0_IRQHandler() : timer_capture.c , pwm_signal.c , qei_test_velo.c , lcdtest.c , timer_int_match.c , freqmeasure.c , gen_diff_delay.c , usbdmain.c
  • TIMER0_IRQn : LPC17xx.h
  • TIMER0_TICK_PER_SEC : lcdtest.c
  • timer1_flag : timer_capture.c , timer_int_match.c
  • TIMER1_IRQHandler() : pwm_signal.c , timer_capture.c
  • TIMER1_IRQn : LPC17xx.h
  • TIMER2_IRQHandler() : pwm_signal.c
  • TIMER2_IRQn : LPC17xx.h
  • TIMER3_IRQHandler() : pwm_signal.c
  • TIMER3_IRQn : LPC17xx.h
  • timer_expired() : timer.c
  • timer_reset() : timer.c
  • timer_restart() : timer.c
  • timer_set() : timer.c
  • TIMER_TYPE_RETRY : tcpip.h
  • TLastFrameSent : tcpip.h
  • TMPHIS : drv_glcd.h
  • TMPREAD : drv_glcd.h
  • TMPRNG : drv_glcd.h
  • toggle : gen_diff_delay.c
  • TRANSFER_BLOCK_Type : lpc_types.h
  • TransmitControl : tcpip.h
  • TRUE : lpc_types.h
  • TTCPStateMachine : tcpip.h
  • Turn_off_LED() : privilege.c
  • Turn_on_LED() : privilege.c
  • Tx_Buf : ssp_master.c , spi_master.c , spi_slave.c , spi_loopback_test.c , ssp_slave.c
  • TX_BUFFER_SIZE : can_test_two_kit.c
  • tx_depth_irq : i2s_irq_test.c , i2s_mclk.c , i2s_two_kit.c
  • TX_LED_PIN : emactest.c
  • TX_ONLY : emactest.c
  • TX_PACKET_SIZE : emactest.c
  • TxDoneCount : emactest.c
  • TxENDPKT_INT : usbreg.h
  • TXErrorCount : emactest.c
  • TXFIFO_FULL : i2s_irq_test.c , i2s_mclk.c
  • TxFinishedCount : emactest.c
  • TxFrame1 : tcpip.h
  • TxFrame1Size : tcpip.h
  • TxFrame2 : tcpip.h
  • TxFrame2Size : tcpip.h
  • TxIntStat : uart_interrupt_test.c , uart_fullmodem_test.c
  • TXMsg : can_test_two_kit.c , can_self_test.c , can_ledcontrol.c , can_test_bypass_mode.c
  • txsetup : pca8581_test.c
  • TXUnderrunCount : emactest.c
  • Type : usb.h
Generated on Tue Jun 7 15:00:15 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Data Fields

  • All
  • Functions
  • Variables
  • Typedefs
  • Enumerations
  • Enumerator
  • Defines
  • _
  • a
  • b
  • c
  • d
  • e
  • f
  • g
  • h
  • i
  • k
  • l
  • m
  • n
  • o
  • p
  • q
  • r
  • s
  • t
  • u
  • v
  • w
  • x
  • y
Here is a list of all functions, variables, defines, enums, and typedefs with links to the files they belong to:

- u -

  • u16_t : uip-conf.h
  • u8_t : uip-conf.h
  • UART0_IRQHandler() : uart_interrupt_test.c , serial.c , uart_autobaud_test.c
  • UART0_IRQn : LPC17xx.h
  • UART1_IER_BITMASK : lpc17xx_uart.h
  • UART1_IER_CTSINT_EN : lpc17xx_uart.h
  • UART1_IER_MSINT_EN : lpc17xx_uart.h
  • UART1_IIR_INTID_MODEM : lpc17xx_uart.h
  • UART1_INTCFG_CTS : lpc17xx_uart.h
  • UART1_INTCFG_MS : lpc17xx_uart.h
  • UART1_IntErr() : uart_fullmodem_test.c
  • UART1_IntReceive() : uart_fullmodem_test.c
  • UART1_IntTransmit() : uart_fullmodem_test.c
  • UART1_IRQHandler() : rs485_master.c , rs485_slave.c , uart_fullmodem_test.c , serial.c
  • UART1_IRQn : LPC17xx.h
  • UART1_MCR_AUTO_CTS_EN : lpc17xx_uart.h
  • UART1_MCR_AUTO_RTS_EN : lpc17xx_uart.h
  • UART1_MCR_BITMASK : lpc17xx_uart.h
  • UART1_MCR_DTR_CTRL : lpc17xx_uart.h
  • UART1_MCR_LOOPB_EN : lpc17xx_uart.h
  • UART1_MCR_RTS_CTRL : lpc17xx_uart.h
  • UART1_MODEM_MODE_AUTO_CTS : lpc17xx_uart.h
  • UART1_MODEM_MODE_AUTO_RTS : lpc17xx_uart.h
  • UART1_MODEM_MODE_LOOPBACK : lpc17xx_uart.h
  • UART1_MODEM_PIN_DTR : lpc17xx_uart.h
  • UART1_MODEM_PIN_RTS : lpc17xx_uart.h
  • UART1_MODEM_STAT_CTS : lpc17xx_uart.h
  • UART1_MODEM_STAT_DCD : lpc17xx_uart.h
  • UART1_MODEM_STAT_DELTA_CTS : lpc17xx_uart.h
  • UART1_MODEM_STAT_DELTA_DCD : lpc17xx_uart.h
  • UART1_MODEM_STAT_DELTA_DSR : lpc17xx_uart.h
  • UART1_MODEM_STAT_DSR : lpc17xx_uart.h
  • UART1_MODEM_STAT_LO2HI_RI : lpc17xx_uart.h
  • UART1_MODEM_STAT_RI : lpc17xx_uart.h
  • UART1_MSR_BITMASK : lpc17xx_uart.h
  • UART1_MSR_CTS : lpc17xx_uart.h
  • UART1_MSR_DCD : lpc17xx_uart.h
  • UART1_MSR_DELTA_CTS : lpc17xx_uart.h
  • UART1_MSR_DELTA_DCD : lpc17xx_uart.h
  • UART1_MSR_DELTA_DSR : lpc17xx_uart.h
  • UART1_MSR_DSR : lpc17xx_uart.h
  • UART1_MSR_LO2HI_RI : lpc17xx_uart.h
  • UART1_MSR_RI : lpc17xx_uart.h
  • UART1_RS485_DIRCTRL_DTR : lpc17xx_uart.h
  • UART1_RS485_DIRCTRL_RTS : lpc17xx_uart.h
  • UART1_RS485ADRMATCH_BITMASK : lpc17xx_uart.h
  • UART1_RS485CTRL_AADEN : lpc17xx_uart.h
  • UART1_RS485CTRL_BITMASK : lpc17xx_uart.h
  • UART1_RS485CTRL_DCTRL_EN : lpc17xx_uart.h
  • UART1_RS485CTRL_NMM_EN : lpc17xx_uart.h
  • UART1_RS485CTRL_OINV_1 : lpc17xx_uart.h
  • UART1_RS485CTRL_RX_DIS : lpc17xx_uart.h
  • UART1_RS485CTRL_SEL_DTR : lpc17xx_uart.h
  • UART1_RS485DLY_BITMASK : lpc17xx_uart.h
  • UART1_SignalState : lpc17xx_uart.h
  • UART2_IRQn : LPC17xx.h
  • UART3_IRQn : LPC17xx.h
  • UART_AB_MODE_Type : lpc17xx_uart.h
  • UART_ABClearIntPending() : lpc17xx_uart.h
  • UART_ABCmd() : lpc17xx_uart.h
  • UART_ABEO_Type : lpc17xx_uart.h
  • UART_ACCEPTED_BAUDRATE_ERROR : lpc17xx_uart.h
  • UART_ACR_ABEOINT_CLR : lpc17xx_uart.h
  • UART_ACR_ABTOINT_CLR : lpc17xx_uart.h
  • UART_ACR_AUTO_RESTART : lpc17xx_uart.h
  • UART_ACR_BITMASK : lpc17xx_uart.h
  • UART_ACR_MODE : lpc17xx_uart.h
  • UART_ACR_START : lpc17xx_uart.h
  • UART_AUTOBAUD_INTSTAT_ABEO : lpc17xx_uart.h
  • UART_AUTOBAUD_INTSTAT_ABTO : lpc17xx_uart.h
  • UART_AUTOBAUD_MODE0 : lpc17xx_uart.h
  • UART_AUTOBAUD_MODE1 : lpc17xx_uart.h
  • UART_BLOCKING_TIMEOUT : lpc17xx_uart.h
  • UART_CheckBusy() : lpc17xx_uart.h
  • UART_ConfigStructInit() : lpc17xx_uart.h
  • UART_DATABIT_5 : lpc17xx_uart.h
  • UART_DATABIT_6 : lpc17xx_uart.h
  • UART_DATABIT_7 : lpc17xx_uart.h
  • UART_DATABIT_8 : lpc17xx_uart.h
  • UART_DATABIT_Type : lpc17xx_uart.h
  • UART_DeInit() : lpc17xx_uart.h
  • UART_DLL_MASKBIT : lpc17xx_uart.h
  • UART_DLM_MASKBIT : lpc17xx_uart.h
  • UART_FCR_BITMASK : lpc17xx_uart.h
  • UART_FCR_DMAMODE_SEL : lpc17xx_uart.h
  • UART_FCR_FIFO_EN : lpc17xx_uart.h
  • UART_FCR_RX_RS : lpc17xx_uart.h
  • UART_FCR_TRG_LEV0 : lpc17xx_uart.h
  • UART_FCR_TRG_LEV1 : lpc17xx_uart.h
  • UART_FCR_TRG_LEV2 : lpc17xx_uart.h
  • UART_FCR_TRG_LEV3 : lpc17xx_uart.h
  • UART_FCR_TX_RS : lpc17xx_uart.h
  • UART_FDR_BITMASK : lpc17xx_uart.h
  • UART_FDR_DIVADDVAL : lpc17xx_uart.h
  • UART_FDR_MULVAL : lpc17xx_uart.h
  • UART_FIFO_TRGLEV0 : lpc17xx_uart.h
  • UART_FIFO_TRGLEV1 : lpc17xx_uart.h
  • UART_FIFO_TRGLEV2 : lpc17xx_uart.h
  • UART_FIFO_TRGLEV3 : lpc17xx_uart.h
  • UART_FIFOConfig() : lpc17xx_uart.h
  • UART_FIFOConfigStructInit() : lpc17xx_uart.h
  • UART_FIFOLVL_BITMASK : lpc17xx_uart.h
  • UART_FIFOLVL_RXFIFOLVL : lpc17xx_uart.h
  • UART_FIFOLVL_TXFIFOLVL : lpc17xx_uart.h
  • UART_FITO_LEVEL_Type : lpc17xx_uart.h
  • UART_ForceBreak() : lpc17xx_uart.h
  • UART_FullModemConfigMode() : lpc17xx_uart.h
  • UART_FullModemForcePinState() : lpc17xx_uart.h
  • UART_FullModemGetStatus() : lpc17xx_uart.h
  • UART_GetIntId() : lpc17xx_uart.h
  • UART_GetLineStatus() : lpc17xx_uart.h
  • UART_ICR_BITMASK : lpc17xx_uart.h
  • UART_ICR_FIXPULSE_EN : lpc17xx_uart.h
  • UART_ICR_IRDAEN : lpc17xx_uart.h
  • UART_ICR_IRDAINV : lpc17xx_uart.h
  • UART_ICR_PULSEDIV : lpc17xx_uart.h
  • UART_IER_ABEOINT_EN : lpc17xx_uart.h
  • UART_IER_ABTOINT_EN : lpc17xx_uart.h
  • UART_IER_BITMASK : lpc17xx_uart.h
  • UART_IER_RBRINT_EN : lpc17xx_uart.h
  • UART_IER_RLSINT_EN : lpc17xx_uart.h
  • UART_IER_THREINT_EN : lpc17xx_uart.h
  • UART_IIR_ABEO_INT : lpc17xx_uart.h
  • UART_IIR_ABTO_INT : lpc17xx_uart.h
  • UART_IIR_BITMASK : lpc17xx_uart.h
  • UART_IIR_FIFO_EN : lpc17xx_uart.h
  • UART_IIR_INTID_CTI : lpc17xx_uart.h
  • UART_IIR_INTID_MASK : lpc17xx_uart.h
  • UART_IIR_INTID_RDA : lpc17xx_uart.h
  • UART_IIR_INTID_RLS : lpc17xx_uart.h
  • UART_IIR_INTID_THRE : lpc17xx_uart.h
  • UART_IIR_INTSTAT_PEND : lpc17xx_uart.h
  • UART_Init() : lpc17xx_uart.h
  • UART_INT_Type : lpc17xx_uart.h
  • UART_INTCFG_ABEO : lpc17xx_uart.h
  • UART_INTCFG_ABTO : lpc17xx_uart.h
  • UART_INTCFG_RBR : lpc17xx_uart.h
  • UART_INTCFG_RLS : lpc17xx_uart.h
  • UART_INTCFG_THRE : lpc17xx_uart.h
  • UART_IntConfig() : lpc17xx_uart.h
  • UART_IntErr() : uart_interrupt_test.c , rs485_master.c , rs485_slave.c
  • UART_IntReceive() : uart_interrupt_test.c , rs485_master.c , rs485_slave.c
  • UART_IntTransmit() : uart_interrupt_test.c
  • UART_IrDA_PULSE_Type : lpc17xx_uart.h
  • UART_IrDA_PULSEDIV128 : lpc17xx_uart.h
  • UART_IrDA_PULSEDIV16 : lpc17xx_uart.h
  • UART_IrDA_PULSEDIV2 : lpc17xx_uart.h
  • UART_IrDA_PULSEDIV256 : lpc17xx_uart.h
  • UART_IrDA_PULSEDIV32 : lpc17xx_uart.h
  • UART_IrDA_PULSEDIV4 : lpc17xx_uart.h
  • UART_IrDA_PULSEDIV64 : lpc17xx_uart.h
  • UART_IrDA_PULSEDIV8 : lpc17xx_uart.h
  • UART_IrDACmd() : lpc17xx_uart.h
  • UART_IrDAInvtInputCmd() : lpc17xx_uart.h
  • UART_IrDAPulseDivConfig() : lpc17xx_uart.h
  • UART_LCR_BITMASK : lpc17xx_uart.h
  • UART_LCR_BREAK_EN : lpc17xx_uart.h
  • UART_LCR_DLAB_EN : lpc17xx_uart.h
  • UART_LCR_PARITY_EN : lpc17xx_uart.h
  • UART_LCR_PARITY_EVEN : lpc17xx_uart.h
  • UART_LCR_PARITY_F_0 : lpc17xx_uart.h
  • UART_LCR_PARITY_F_1 : lpc17xx_uart.h
  • UART_LCR_PARITY_ODD : lpc17xx_uart.h
  • UART_LCR_STOPBIT_SEL : lpc17xx_uart.h
  • UART_LCR_WLEN5 : lpc17xx_uart.h
  • UART_LCR_WLEN6 : lpc17xx_uart.h
  • UART_LCR_WLEN7 : lpc17xx_uart.h
  • UART_LCR_WLEN8 : lpc17xx_uart.h
  • UART_LINESTAT_BI : lpc17xx_uart.h
  • UART_LINESTAT_FE : lpc17xx_uart.h
  • UART_LINESTAT_OE : lpc17xx_uart.h
  • UART_LINESTAT_PE : lpc17xx_uart.h
  • UART_LINESTAT_RDR : lpc17xx_uart.h
  • UART_LINESTAT_RXFE : lpc17xx_uart.h
  • UART_LINESTAT_TEMT : lpc17xx_uart.h
  • UART_LINESTAT_THRE : lpc17xx_uart.h
  • UART_LOAD_DLL : lpc17xx_uart.h
  • UART_LOAD_DLM : lpc17xx_uart.h
  • UART_LS_Type : lpc17xx_uart.h
  • UART_LSR_BI : lpc17xx_uart.h
  • UART_LSR_BITMASK : lpc17xx_uart.h
  • UART_LSR_FE : lpc17xx_uart.h
  • UART_LSR_OE : lpc17xx_uart.h
  • UART_LSR_PE : lpc17xx_uart.h
  • UART_LSR_RDR : lpc17xx_uart.h
  • UART_LSR_RXFE : lpc17xx_uart.h
  • UART_LSR_TEMT : lpc17xx_uart.h
  • UART_LSR_THRE : lpc17xx_uart.h
  • UART_MODEM_MODE_Type : lpc17xx_uart.h
  • UART_MODEM_PIN_Type : lpc17xx_uart.h
  • UART_MODEM_STAT_type : lpc17xx_uart.h
  • UART_PARITY_EVEN : lpc17xx_uart.h
  • UART_PARITY_NONE : lpc17xx_uart.h
  • UART_PARITY_ODD : lpc17xx_uart.h
  • UART_PARITY_SP_0 : lpc17xx_uart.h
  • UART_PARITY_SP_1 : lpc17xx_uart.h
  • UART_PARITY_Type : lpc17xx_uart.h
  • UART_PORT : uart_irda_receive.c , uart_irda_transmit.c , uart_polling_test.c
  • UART_RBR_MASKBIT : lpc17xx_uart.h
  • UART_Receive() : lpc17xx_uart.h
  • UART_ReceiveByte() : lpc17xx_uart.h
  • UART_RING_BUFSIZE : uart_interrupt_test.c , rs485_master.c , rs485_slave.c , uart_fullmodem_test.c
  • UART_RS485_DIRCTRL_PIN_Type : lpc17xx_uart.h
  • UART_RS485Config() : lpc17xx_uart.h
  • UART_RS485ReceiverCmd() : lpc17xx_uart.h
  • UART_RS485Send() : lpc17xx_uart.c
  • UART_RS485SendData() : lpc17xx_uart.h
  • UART_RS485SendSlvAddr() : lpc17xx_uart.h
  • UART_SCR_BIMASK : lpc17xx_uart.h
  • UART_Send() : lpc17xx_uart.h
  • UART_SendByte() : lpc17xx_uart.h
  • UART_STOPBIT_1 : lpc17xx_uart.h
  • UART_STOPBIT_2 : lpc17xx_uart.h
  • UART_STOPBIT_Type : lpc17xx_uart.h
  • UART_TER_BITMASK : lpc17xx_uart.h
  • UART_TER_TXEN : lpc17xx_uart.h
  • UART_THR_MASKBIT : lpc17xx_uart.h
  • UART_TX_FIFO_SIZE : lpc17xx_uart.h
  • UART_TxCmd() : lpc17xx_uart.h
  • UARTConfigStruct : timer_capture.c
  • UARTGetChar() : debug_frmwrk.h , debug_frmwrk.c
  • UARTPutChar() : debug_frmwrk.h , debug_frmwrk.c
  • UARTPutDec() : debug_frmwrk.h , debug_frmwrk.c
  • UARTPutDec16() : debug_frmwrk.h , debug_frmwrk.c
  • UARTPutDec32() : debug_frmwrk.h , debug_frmwrk.c
  • UARTPutHex() : debug_frmwrk.h , debug_frmwrk.c
  • UARTPutHex16() : debug_frmwrk.h , debug_frmwrk.c
  • UARTPutHex32() : debug_frmwrk.h , debug_frmwrk.c
  • UARTPuts() : debug_frmwrk.h , debug_frmwrk.c
  • UARTPuts_() : debug_frmwrk.h , debug_frmwrk.c
  • UARTReceive() : rs485_master.c , rs485_slave.c , uart_fullmodem_test.c , uart_interrupt_test.c
  • UARTSend() : uart_interrupt_test.c , uart_fullmodem_test.c
  • UDPBUF : uip.c
  • UIP_ABORT : uip.h
  • uip_abort : uip.h
  • uip_aborted : uip.h
  • uip_acc32 : uip.c , uip.h
  • UIP_ACKDATA : uip.h
  • uip_acked : uip.h
  • UIP_ACTIVE_OPEN : uipopt.h
  • uip_add32() : uip.c , uip_arch.h
  • UIP_APPCALL : hello-world.h , smtp.h , telnetd.h , webclient.h , webserver.h
  • uip_appdata : uip.c , uip.h
  • UIP_APPDATA_SIZE : uip.h
  • uip_arp_arpin() : uip_arp.c
  • uip_arp_init() : uip_arp.c
  • uip_arp_ipin() : uip_arp.c
  • UIP_ARP_MAXAGE : uipopt.h
  • uip_arp_out() : uip_arp.c
  • uip_arp_timer() : uip_arp.c
  • UIP_ARPTAB_SIZE : uipopt.h
  • UIP_BIG_ENDIAN : uipopt.h
  • UIP_BROADCAST : uipopt.h
  • uip_buf : uip.h
  • UIP_BUFSIZE : uipopt.h
  • UIP_BYTE_ORDER : uipopt.h
  • uip_chksum() : uip.c , uip.h , uip_arch.h
  • uip_close : uip.h
  • UIP_CLOSE : uip.h
  • UIP_CLOSED : uip.h
  • uip_closed : uip.h
  • UIP_CLOSING : uip.h
  • UIP_CONF_BUFFER_SIZE : uip-conf.h
  • UIP_CONF_BYTE_ORDER : uip-conf.h
  • UIP_CONF_LOGGING : uip-conf.h
  • UIP_CONF_MAX_CONNECTIONS : uip-conf.h
  • UIP_CONF_MAX_LISTENPORTS : uip-conf.h
  • UIP_CONF_STATISTICS : uip-conf.h
  • UIP_CONF_UDP : uip-conf.h
  • UIP_CONF_UDP_CHECKSUMS : uip-conf.h
  • uip_conn : uip.c , uip.h
  • uip_conn_active : uip.h
  • uip_connect() : uip.c , uip.h
  • UIP_CONNECTED : uip.h
  • uip_connected : uip.h
  • UIP_CONNS : uipopt.h
  • uip_conns : uip.c , uip.h
  • UIP_DATA : uip.h
  • uip_datalen : uip.h
  • uip_draddr : uip.c , uip.h
  • UIP_ESTABLISHED : uip.h
  • uip_ethaddr : uip.c , uip_arp.h
  • UIP_ETHTYPE_ARP : uip_arp.h
  • UIP_ETHTYPE_IP : uip_arp.h
  • UIP_ETHTYPE_IP6 : uip_arp.h
  • UIP_FIN_WAIT_1 : uip.h
  • UIP_FIN_WAIT_2 : uip.h
  • UIP_FIXEDADDR : uipopt.h
  • UIP_FIXEDETHADDR : uipopt.h
  • uip_flags : uip.c , uip.h
  • uip_fw_default() : uip-fw.c
  • UIP_FW_DROPPED : uip-fw.h
  • uip_fw_forward() : uip-fw.c
  • UIP_FW_FORWARDED : uip-fw.h
  • uip_fw_init() : uip-fw.c
  • UIP_FW_LOCAL : uip-fw.h
  • UIP_FW_NETIF : uip-fw.h
  • UIP_FW_NOROUTE : uip-fw.h
  • UIP_FW_OK : uip-fw.h
  • uip_fw_output() : uip-fw.c
  • uip_fw_periodic() : uip-fw.c
  • uip_fw_register() : uip-fw.c
  • uip_fw_setipaddr : uip-fw.h
  • uip_fw_setnetmask : uip-fw.h
  • UIP_FW_TOOLARGE : uip-fw.h
  • UIP_FW_ZEROLEN : uip-fw.h
  • uip_getdraddr : uip.h
  • uip_gethostaddr : uip.h
  • uip_getnetmask : uip.h
  • uip_hostaddr : uip.c , uip.h
  • uip_init() : uip.c , uip.h
  • uip_initialmss : uip.h
  • uip_input : uip.h
  • uip_ip4addr_t : uip.h
  • uip_ip6addr : uip.h
  • uip_ip6addr_t : uip.h
  • uip_ipaddr : uip.h
  • uip_ipaddr1 : uip.h
  • uip_ipaddr2 : uip.h
  • uip_ipaddr3 : uip.h
  • uip_ipaddr4 : uip.h
  • uip_ipaddr_cmp : uip.h
  • uip_ipaddr_copy : uip.h
  • uip_ipaddr_mask : uip.h
  • uip_ipaddr_maskcmp : uip.h
  • uip_ipaddr_t : uip.h
  • uip_ipchksum() : uip.c , uip.h , uip_arch.h
  • UIP_IPH_LEN : uip.h
  • UIP_IPTCPH_LEN : uip.h
  • UIP_IPUDPH_LEN : uip.h
  • UIP_LAST_ACK : uip.h
  • uip_len : uip.c , uip.h
  • uip_listen() : uip.c , uip.h
  • UIP_LISTENPORTS : uipopt.h
  • uip_listenports : uip.c
  • UIP_LITTLE_ENDIAN : uipopt.h
  • UIP_LLH_LEN : uipopt.h
  • UIP_LOG : uip.c
  • uip_log() : main.c , uipopt.h
  • UIP_LOGGING : uipopt.h
  • UIP_MAXRTX : uipopt.h
  • UIP_MAXSYNRTX : uipopt.h
  • uip_mss : uip.h
  • uip_neighbor_add() : uip-neighbor.c , uip-neighbor.h
  • uip_neighbor_init() : uip-neighbor.c , uip-neighbor.h
  • uip_neighbor_lookup() : uip-neighbor.c , uip-neighbor.h
  • uip_neighbor_periodic() : uip-neighbor.c , uip-neighbor.h
  • uip_neighbor_update() : uip-neighbor.c , uip-neighbor.h
  • uip_netmask : uip.c , uip.h
  • uip_newdata : uip.h
  • UIP_NEWDATA : uip.h
  • uip_outstanding : uip.h
  • uip_periodic : uip.h
  • uip_periodic_conn : uip.h
  • UIP_PINGADDRCONF : uipopt.h
  • UIP_POLL : uip.h
  • uip_poll : uip.h
  • uip_poll_conn : uip.h
  • UIP_POLL_REQUEST : uip.h
  • uip_process() : uip.c , uip.h
  • UIP_PROTO_ICMP : uip.h
  • UIP_PROTO_ICMP6 : uip.h
  • UIP_PROTO_TCP : uip.h
  • UIP_PROTO_UDP : uip.h
  • UIP_REASS_MAXAGE : uipopt.h
  • UIP_REASSEMBLY : uipopt.h
  • UIP_RECEIVE_WINDOW : uipopt.h
  • uip_restart : uip.h
  • uip_rexmit : uip.h
  • UIP_REXMIT : uip.h
  • UIP_RTO : uipopt.h
  • uip_sappdata : uip.c
  • uip_send() : uip.c , uip.h
  • uip_setdraddr : uip.h
  • uip_setethaddr : uip_arp.h
  • uip_sethostaddr : uip.h
  • uip_setipid() : uip.c , uip.h
  • uip_setnetmask : uip.h
  • uip_slen : uip.c
  • uip_split_output() : uip-split.c , uip-split.h
  • UIP_STAT : uip.c
  • uip_stat : uip.h
  • UIP_STATISTICS : uipopt.h
  • uip_stats_t : uip-conf.h
  • uip_stop : uip.h
  • uip_stopped : uip.h
  • UIP_STOPPED : uip.h
  • UIP_SYN_RCVD : uip.h
  • UIP_SYN_SENT : uip.h
  • uip_tcp_appstate_t : hello-world.h , smtp.h , telnetd.h , webclient.h , webserver.h
  • UIP_TCP_MSS : uipopt.h
  • uip_tcpchksum() : uip.c , uip.h , uip_arch.h
  • UIP_TCPH_LEN : uip.h
  • UIP_TCPIP_HLEN : uip.h
  • UIP_TIME_WAIT : uip.h
  • UIP_TIME_WAIT_TIMEOUT : uipopt.h
  • uip_timedout : uip.h
  • UIP_TIMEDOUT : uip.h
  • UIP_TIMER : uip.h
  • UIP_TS_MASK : uip.h
  • UIP_TTL : uipopt.h
  • UIP_UDP : uipopt.h
  • UIP_UDP_APPCALL : dhcpc.h , resolv.h
  • uip_udp_appstate_t : dhcpc.h , resolv.h
  • uip_udp_bind : uip.h
  • UIP_UDP_CHECKSUMS : uipopt.h
  • UIP_UDP_CONNS : uipopt.h
  • uip_udp_new() : uip.h
  • uip_udp_remove : uip.h
  • uip_udp_send : uip.h
  • UIP_UDP_SEND_CONN : uip.h
  • uip_udpchksum() : uip.h , uip_arch.h
  • uip_udpconnection : uip.h
  • UIP_UDPH_LEN : uip.h
  • uip_unlisten() : uip.c , uip.h
  • UIP_URGDATA : uipopt.h
  • uip_urgdatalen : uip.h
  • uiplib_ipaddrconv() : uiplib.c , uiplib.h
  • UNPRIVILEGE_LED : privilege.c
  • UNPRIVILEGE_LEDPORT : privilege.c
  • UNS_16 : lpc_types.h
  • UNS_32 : lpc_types.h
  • UNS_64 : lpc_types.h
  • UNS_8 : lpc_types.h
  • UsageFault_IRQn : LPC17xx.h
  • USB_ADC_CIF_NUM : usbcfg.h
  • USB_ADC_SIF1_NUM : usbcfg.h
  • USB_ADC_SIF2_NUM : usbcfg.h
  • USB_AltSetting : usbcore.h , usbcore.c , usbcore.h , usbcore.c , usbcore.h , usbcore.c , usbcore.h , usbcore.c
  • USB_AUDIO : usbcfg.h
  • USB_CDC : usbcfg.h
  • USB_CDC_BUFSIZE : usbcfg.h
  • USB_CDC_CIF_NUM : usbcfg.h
  • USB_CDC_DIF_NUM : usbcfg.h
  • USB_CLASS : usbcfg.h
  • USB_ClearEPBuf() : usbhw.c , usbhw.h , usbhw.c , usbhw.h
  • USB_ClrStallEP() : usbhw.c , usbhw.h , usbhw.c , usbhw.h , usbhw.c , usbhw.h , usbhw.c , usbhw.h
  • USB_COMMON_DESCRIPTOR : usb.h
  • USB_CONFIG_BUS_POWERED : usb.h
  • USB_CONFIG_POWER_MA : usb.h
  • USB_CONFIG_POWERED_MASK : usb.h
  • USB_CONFIG_REMOTE_WAKEUP : usb.h
  • USB_CONFIG_SELF_POWERED : usb.h
  • USB_ConfigDescriptor : usbdesc.c , usbdesc.h , usbdesc.c , usbdesc.h , usbdesc.c , usbdesc.h , usbdesc.c , usbdesc.h
  • USB_ConfigEP() : usbhw.c , usbhw.h , usbhw.c , usbhw.h , usbhw.c , usbhw.h , usbhw.c , usbhw.h
  • USB_CONFIGUARTION_DESC_SIZE : usbdesc.h
  • USB_Configuration : usbcore.c , usbcore.h , usbcore.c , usbcore.h , usbcore.c , usbcore.h , usbcore.c , usbcore.h
  • USB_CONFIGURATION_DESCRIPTOR : usb.h
  • USB_CONFIGURATION_DESCRIPTOR_TYPE : usb.h
  • USB_Configure() : usbhw.c , usbhw.h , usbhw.c , usbhw.h , usbhw.c , usbhw.h , usbhw.c , usbhw.h
  • USB_Configure_Event() : usbuser.h , usbuser.c , usbuser.h , usbuser.c , usbuser.h , usbuser.c , usbuser.h
  • USB_CONFIGURE_EVENT : usbcfg.h
  • USB_Connect() : usbhw.c , usbhw.h , usbhw.c , usbhw.h , usbhw.c , usbhw.h , usbhw.c , usbhw.h
  • USB_DataInStage() : usbcore.c
  • USB_DataOutStage() : usbcore.c
  • USB_DEBUG_DESCRIPTOR_TYPE : usb.h
  • USB_DEVICE_CLASS_AUDIO : usb.h
  • USB_DEVICE_CLASS_COMMUNICATIONS : usb.h
  • USB_DEVICE_CLASS_HUB : usb.h
  • USB_DEVICE_CLASS_HUMAN_INTERFACE : usb.h
  • USB_DEVICE_CLASS_MISCELLANEOUS : usb.h
  • USB_DEVICE_CLASS_MONITOR : usb.h
  • USB_DEVICE_CLASS_PHYSICAL_INTERFACE : usb.h
  • USB_DEVICE_CLASS_POWER : usb.h
  • USB_DEVICE_CLASS_PRINTER : usb.h
  • USB_DEVICE_CLASS_RESERVED : usb.h
  • USB_DEVICE_CLASS_STORAGE : usb.h
  • USB_DEVICE_CLASS_VENDOR_SPECIFIC : usb.h
  • USB_DEVICE_DESC_SIZE : usbdesc.h
  • USB_DEVICE_DESCRIPTOR : usb.h
  • USB_DEVICE_DESCRIPTOR_TYPE : usb.h
  • USB_DEVICE_QUALIFIER_DESCRIPTOR : usb.h
  • USB_DEVICE_QUALIFIER_DESCRIPTOR_TYPE : usb.h
  • USB_DeviceAddress : usbcore.c , usbcore.h , usbcore.c , usbcore.h , usbcore.c , usbcore.h , usbcore.c , usbcore.h
  • USB_DeviceDescriptor : usbdesc.c , usbdesc.h , usbdesc.c , usbdesc.h , usbdesc.c , usbdesc.h , usbdesc.c , usbdesc.h
  • USB_DeviceStatus : usbcore.c , usbcore.h , usbcore.c , usbcore.h , usbcore.c , usbcore.h , usbcore.c , usbcore.h
  • USB_DirCtrlEP() : usbhw.c , usbhw.h , usbhw.c , usbhw.h , usbhw.c , usbhw.h , usbhw.c , usbhw.h
  • USB_DisableEP() : usbhw.c , usbhw.h , usbhw.c , usbhw.h , usbhw.c , usbhw.h , usbhw.c , usbhw.h
  • USB_DMA : usbcfg.h
  • USB_DMA_BufAdr() : usbhw.h , usbhw.c , usbhw.h , usbhw.c , usbhw.h
  • USB_DMA_BufCnt() : usbhw.h , usbhw.c , usbhw.h , usbhw.c , usbhw.h
  • USB_DMA_BUSY : usbhw.h
  • USB_DMA_DESCRIPTOR : usbhw.h
  • USB_DMA_Disable() : usbhw.h , usbhw.c , usbhw.h , usbhw.c , usbhw.h
  • USB_DMA_DONE : usbhw.h
  • USB_DMA_Enable() : usbhw.h , usbhw.c , usbhw.h , usbhw.c
  • USB_DMA_EP : usbcfg.h
  • USB_DMA_ERROR : usbhw.h
  • USB_DMA_IDLE : usbhw.h
  • USB_DMA_INVALID : usbhw.h
  • USB_DMA_OVER_RUN : usbhw.h
  • USB_DMA_Setup() : usbhw.h , usbhw.c , usbhw.h
  • USB_DMA_Status() : usbhw.h , usbhw.c , usbhw.h , usbhw.c
  • USB_DMA_UNDER_RUN : usbhw.h
  • USB_DMA_UNKNOWN : usbhw.h
  • USB_EnableEP() : usbhw.h , usbhw.c , usbhw.h , usbhw.c , usbhw.h , usbhw.c
  • USB_EndPoint0() : usbuser.h , usbcore.c , usbuser.h , usbcore.c , usbuser.h , usbcore.c , usbuser.h , usbcore.c
  • USB_EndPoint1() : usbuser.h , usbuser.c , usbuser.h , usbuser.c , usbuser.h , usbuser.c
  • USB_EndPoint10() : usbuser.h , usbuser.c , usbuser.h , usbuser.c , usbuser.h , usbuser.c , usbuser.h , usbuser.c
  • USB_EndPoint11() : usbuser.h , usbuser.c , usbuser.h , usbuser.c , usbuser.h , usbuser.c
  • USB_EndPoint12() : usbuser.h , usbuser.c , usbuser.h , usbuser.c , usbuser.h , usbuser.c , usbuser.h , usbuser.c
  • USB_EndPoint13() : usbuser.h , usbuser.c , usbuser.h , usbuser.c , usbuser.h , usbuser.c
  • USB_EndPoint14() : usbuser.h , usbuser.c , usbuser.h , usbuser.c , usbuser.h , usbuser.c , usbuser.h , usbuser.c
  • USB_EndPoint15() : usbuser.h , usbuser.c , usbuser.h , usbuser.c , usbuser.h , usbuser.c
  • USB_EndPoint2() : usbuser.h , usbuser.c , usbuser.h , usbuser.c , usbuser.h , usbuser.c , usbuser.h , usbuser.c
  • USB_EndPoint3() : usbuser.h , usbuser.c , usbuser.h , usbuser.c , usbuser.h , usbuser.c
  • USB_EndPoint4() : usbuser.h , usbuser.c , usbuser.h , usbuser.c , usbuser.h , usbuser.c , usbuser.h , usbuser.c
  • USB_EndPoint5() : usbuser.h , usbuser.c , usbuser.h , usbuser.c , usbuser.h , usbuser.c
  • USB_EndPoint6() : usbuser.h , usbuser.c , usbuser.h , usbuser.c , usbuser.h , usbuser.c , usbuser.h , usbuser.c
  • USB_EndPoint7() : usbuser.h , usbuser.c , usbuser.h , usbuser.c , usbuser.h , usbuser.c
  • USB_EndPoint8() : usbuser.h , usbuser.c , usbuser.h , usbuser.c , usbuser.h , usbuser.c , usbuser.h , usbuser.c
  • USB_EndPoint9() : usbuser.h , usbuser.c , usbuser.h , usbuser.c , usbuser.h , usbuser.c
  • USB_ENDPOINT_DESC_SIZE : usbdesc.h
  • USB_ENDPOINT_DESCRIPTOR : usb.h
  • USB_ENDPOINT_DESCRIPTOR_TYPE : usb.h
  • USB_ENDPOINT_DIRECTION_MASK : usb.h
  • USB_ENDPOINT_IN : usb.h
  • USB_ENDPOINT_OUT : usb.h
  • USB_ENDPOINT_SYNC_ADAPTIVE : usb.h
  • USB_ENDPOINT_SYNC_ASYNCHRONOUS : usb.h
  • USB_ENDPOINT_SYNC_MASK : usb.h
  • USB_ENDPOINT_SYNC_NO_SYNCHRONIZATION : usb.h
  • USB_ENDPOINT_SYNC_SYNCHRONOUS : usb.h
  • USB_ENDPOINT_TYPE_BULK : usb.h
  • USB_ENDPOINT_TYPE_CONTROL : usb.h
  • USB_ENDPOINT_TYPE_INTERRUPT : usb.h
  • USB_ENDPOINT_TYPE_ISOCHRONOUS : usb.h
  • USB_ENDPOINT_TYPE_MASK : usb.h
  • USB_ENDPOINT_USAGE_DATA : usb.h
  • USB_ENDPOINT_USAGE_FEEDBACK : usb.h
  • USB_ENDPOINT_USAGE_IMPLICIT_FEEDBACK : usb.h
  • USB_ENDPOINT_USAGE_MASK : usb.h
  • USB_ENDPOINT_USAGE_RESERVED : usb.h
  • USB_EndPointHalt : usbcore.c , usbcore.h , usbcore.c , usbcore.h
  • USB_EndPointMask : usbcore.h , usbcore.c , usbcore.h , usbcore.c , usbcore.h
  • USB_EndPointStall : usbcore.c , usbcore.h , usbcore.c , usbcore.h
  • USB_EP_DATA : usbcore.h
  • USB_EP_EVENT : usbcfg.h
  • USB_EP_NUM : usbcfg.h
  • USB_ERR_B_OVRN : usbhw.h
  • USB_ERR_BTSTF : usbhw.h
  • USB_ERR_DCRC : usbhw.h
  • USB_ERR_EOP : usbhw.h
  • USB_ERR_PID : usbhw.h
  • USB_ERR_TGL : usbhw.h
  • USB_ERR_TIMOUT : usbhw.h
  • USB_ERR_UEPKT : usbhw.h
  • USB_ERROR_EVENT : usbcfg.h
  • USB_Error_Event() : usbuser.h
  • USB_ERROR_EVENT : usbcfg.h
  • USB_Error_Event() : usbuser.h
  • USB_ERROR_EVENT : usbcfg.h
  • USB_EVT_IN : usbuser.h
  • USB_EVT_IN_DMA_EOT : usbuser.h
  • USB_EVT_IN_DMA_ERR : usbuser.h
  • USB_EVT_IN_DMA_NDR : usbuser.h
  • USB_EVT_IN_NAK : usbuser.h
  • USB_EVT_IN_STALL : usbuser.h
  • USB_EVT_OUT : usbuser.h
  • USB_EVT_OUT_DMA_EOT : usbuser.h
  • USB_EVT_OUT_DMA_ERR : usbuser.h
  • USB_EVT_OUT_DMA_NDR : usbuser.h
  • USB_EVT_OUT_NAK : usbuser.h
  • USB_EVT_OUT_STALL : usbuser.h
  • USB_EVT_SETUP : usbuser.h
  • USB_FEATURE_ENDPOINT_STALL : usb.h
  • USB_FEATURE_EVENT : usbcfg.h
  • USB_Feature_Event() : usbuser.h
  • USB_FEATURE_EVENT : usbcfg.h
  • USB_FEATURE_REMOTE_WAKEUP : usb.h
  • USB_GetDescriptor() : usbcore.c
  • USB_GetFrame() : usbhw.c , usbhw.h , usbhw.c , usbhw.h , usbhw.c
  • USB_GetStatus() : usbcore.c
  • USB_GETSTATUS_ENDPOINT_STALL : usb.h
  • USB_GETSTATUS_REMOTE_WAKEUP : usb.h
  • USB_GETSTATUS_SELF_POWERED : usb.h
  • USB_HID : usbcfg.h
  • USB_HID_IF_NUM : usbcfg.h
  • USB_IF_NUM : usbcfg.h
  • USB_Init() : usbhw.h , usbhw.c , usbhw.h , usbhw.c
  • USB_INTERFACE_ASSOCIATION_DESCRIPTOR_TYPE : usb.h
  • USB_INTERFACE_DESC_SIZE : usbdesc.h
  • USB_INTERFACE_DESCRIPTOR : usb.h
  • USB_INTERFACE_DESCRIPTOR_TYPE : usb.h
  • USB_INTERFACE_EVENT : usbcfg.h
  • USB_Interface_Event() : usbuser.h
  • USB_INTERFACE_EVENT : usbcfg.h
  • USB_Interface_Event() : usbuser.h
  • USB_INTERFACE_EVENT : usbcfg.h
  • USB_INTERFACE_POWER_DESCRIPTOR_TYPE : usb.h
  • USB_IRQHandler() : usbhw.h , usbhw.c , usbhw.h , usbhw.c , usbhw.h , usbhw.c
  • USB_IRQn : LPC17xx.h
  • USB_MAX_PACKET0 : usbcfg.h
  • USB_MSC : usbcfg.h
  • USB_MSC_IF_NUM : usbcfg.h
  • USB_NumInterfaces : usbcore.c
  • USB_OTG_DESCRIPTOR_TYPE : usb.h
  • USB_OTHER_SPEED_CONFIG_DESCRIPTOR_TYPE : usb.h
  • USB_P_EP : usbuser.h , usbuser.c , usbuser.h , usbuser.c , usbuser.h , usbuser.c , usbuser.h
  • USB_POWER : usbcfg.h
  • USB_Power_Event() : usbuser.h
  • USB_POWER_EVENT : usbcfg.h
  • USB_Power_Event() : usbuser.h
  • USB_POWER_EVENT : usbcfg.h
  • USB_Power_Event() : usbuser.h
  • USB_RAM_ADR : usbhw.h
  • USB_RAM_SZ : usbhw.h
  • USB_ReadEP() : usbhw.h , usbhw.c , usbhw.h , usbhw.c
  • USB_ReqGetConfiguration() : usbcore.c
  • USB_ReqGetDescriptor() : usbcore.c
  • USB_ReqGetInterface() : usbcore.c
  • USB_ReqGetStatus() : usbcore.c
  • USB_ReqSetAddress() : usbcore.c
  • USB_ReqSetClrFeature() : usbcore.c
  • USB_ReqSetConfiguration() : usbcore.c
  • USB_ReqSetInterface() : usbcore.c
  • USB_REQUEST_CLEAR_FEATURE : usb.h
  • USB_REQUEST_GET_CONFIGURATION : usb.h
  • USB_REQUEST_GET_DESCRIPTOR : usb.h
  • USB_REQUEST_GET_INTERFACE : usb.h
  • USB_REQUEST_GET_STATUS : usb.h
  • USB_REQUEST_SET_ADDRESS : usb.h
  • USB_REQUEST_SET_CONFIGURATION : usb.h
  • USB_REQUEST_SET_DESCRIPTOR : usb.h
  • USB_REQUEST_SET_FEATURE : usb.h
  • USB_REQUEST_SET_INTERFACE : usb.h
  • USB_REQUEST_SYNC_FRAME : usb.h
  • USB_Reset() : usbhw.c , usbhw.h , usbhw.c , usbhw.h
  • USB_RESET_EVENT : usbcfg.h
  • USB_Reset_Event() : usbuser.h , usbuser.c
  • USB_RESET_EVENT : usbcfg.h
  • USB_Reset_Event() : usbuser.c , usbuser.h , usbuser.c
  • USB_RESET_EVENT : usbcfg.h
  • USB_ResetCore() : usbcore.h , usbcore.c , usbcore.h , usbcore.c , usbcore.h , usbcore.c , usbcore.h
  • USB_ResetEP() : usbhw.h , usbhw.c , usbhw.h , usbhw.c
  • USB_Resume() : usbhw.c , usbhw.h , usbhw.c , usbhw.h , usbhw.c , usbhw.h
  • USB_Resume_Event() : usbuser.h
  • USB_RESUME_EVENT : usbcfg.h
  • USB_Resume_Event() : usbuser.h
  • USB_RESUME_EVENT : usbcfg.h
  • USB_Resume_Event() : usbuser.h
  • USB_RESUME_EVENT : usbcfg.h
  • USB_SetAddress() : usbhw.h , usbhw.c , usbhw.h , usbhw.c , usbhw.h
  • USB_SetClrFeature() : usbcore.c
  • USB_SetConfiguration() : usbcore.c
  • USB_SetInterface() : usbcore.c
  • USB_SetStallEP() : usbhw.c , usbhw.h , usbhw.c , usbhw.h , usbhw.c
  • USB_SETUP_PACKET : usb.h
  • USB_SetupStage() : usbcore.c
  • USB_SOF_EVENT : usbcfg.h
  • USB_SOF_Event() : usbuser.h , usbuser.c , usbuser.h
  • USB_SOF_EVENT : usbcfg.h
  • USB_SOF_Event() : usbuser.h
  • USB_StatusInStage() : usbcore.c
  • USB_StatusOutStage() : usbcore.c
  • USB_STRING_DESCRIPTOR : usb.h
  • USB_STRING_DESCRIPTOR_TYPE : usb.h
  • USB_StringDescriptor : usbdesc.h , usbdesc.c , usbdesc.h , usbdesc.c , usbdesc.h
  • USB_Suspend() : usbhw.h , usbhw.c , usbhw.h , usbhw.c , usbhw.h
  • USB_Suspend_Event() : usbuser.h
  • USB_SUSPEND_EVENT : usbcfg.h
  • USB_Suspend_Event() : usbuser.h
  • USB_VENDOR : usbcfg.h
  • USB_WakeUp() : usbhw.h , usbhw.c , usbhw.h , usbhw.c
  • USB_WakeUp_Event() : usbuser.h
  • USB_WAKEUP_EVENT : usbcfg.h
  • USB_WakeUp_Event() : usbuser.h
  • USB_WAKEUP_EVENT : usbcfg.h
  • USB_WakeUp_Event() : usbuser.h
  • USB_WakeUpCfg() : usbhw.h , usbhw.c , usbhw.h , usbhw.c , usbhw.h
  • USB_WriteEP() : usbhw.h , usbhw.c , usbhw.h , usbhw.c , usbhw.h , usbhw.c , usbhw.h , usbhw.c
  • USBActivity_IRQn : LPC17xx.h
  • USBCLKCFG_Val : system_LPC17xx.c
  • USED_UART_DEBUG_PORT : debug_frmwrk.h
  • USEDI2CDEV : i2c_polling_test.c , pca8581_test.c , i2c_interrupt_test.c
  • USEDI2CDEV_M : master.c , i2c_master_slave_int_test.c
  • USEDI2CDEV_S : slave.c , i2c_master_slave_int_test.c
  • USEDSSPDEV_M : microwire_test.c , ti_test.c
  • USEDSSPDEV_S : ti_test.c , microwire_test.c
  • Usr_Init_Emac() : emactest.c
Generated on Tue Jun 7 15:00:15 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Data Fields

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  • y
Here is a list of all functions, variables, defines, enums, and typedefs with links to the files they belong to:

- v -

  • VAR_ADDRESS : bitband.c
  • VAR_BIT : bitband.c
  • VCOM_CheckSerialState() : vcomdemo.c
  • VCOM_Init() : vcomdemo.c
  • VCOM_Serial2Usb() : vcomdemo.c
  • VCOM_Usb2Serial() : vcomdemo.c
  • VeloAcc : qei_test_velo.c
  • VeloAccFlag : qei_test_velo.c
  • VeloCapCnt : qei_test_velo.c
  • VIRTUAL_QEI_SIGNAL : qei_test_velo.c
  • VirtualQEISignal_Init() : qei_test_velo.c
  • VOLCTR : drv_glcd.h
  • VolCur : adcuser.c , usbaudio.h
  • VOLDOWN : drv_glcd.h
  • VolMax : adcuser.c
  • VolMin : adcuser.c
  • VolRes : adcuser.c
  • Volume : usbdmain.c , usbaudio.h
  • VOLUP : drv_glcd.h
  • VSCSAD : drv_glcd.h
  • VTOR_OFFSET : vt_relocation.c
  • VUM : usbdmain.c
Generated on Tue Jun 7 15:00:15 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Data Fields

  • All
  • Functions
  • Variables
  • Typedefs
  • Enumerations
  • Enumerator
  • Defines
  • _
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  • c
  • d
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  • f
  • g
  • h
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  • n
  • o
  • p
  • q
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  • t
  • u
  • v
  • w
  • x
  • y
Here is a list of all functions, variables, defines, enums, and typedefs with links to the files they belong to:

- w -

  • W : usb.h
  • WAITED_PIXEL : drv_glcd.h
  • WB : usb.h
  • WBVAL : usbdesc.h
  • wDescriptorLength : hid.h
  • WDT_CLK_OPT : lpc17xx_wdt.h
  • WDT_CLKSRC_IRC : lpc17xx_wdt.h
  • WDT_CLKSRC_PCLK : lpc17xx_wdt.h
  • WDT_CLKSRC_RTC : lpc17xx_wdt.h
  • WDT_ClrTimeOutFlag() : lpc17xx_wdt.h
  • WDT_Feed() : lpc17xx_wdt.h
  • wdt_flag : wdt_interrupt_test.c
  • WDT_GetCurrentCount() : lpc17xx_wdt.h
  • WDT_Init() : lpc17xx_wdt.h
  • WDT_IRQHandler() : wdt_deepsleep.c , wdt_interrupt_test.c
  • WDT_IRQn : LPC17xx.h
  • WDT_MODE_INT_ONLY : lpc17xx_wdt.h
  • WDT_MODE_OPT : lpc17xx_wdt.h
  • WDT_MODE_RESET : lpc17xx_wdt.h
  • WDT_ReadTimeOutFlag() : lpc17xx_wdt.h
  • WDT_Start() : lpc17xx_wdt.h
  • WDT_TIMEOUT : wdt_deepsleep.c , wdt_interrupt_test.c , wdt_reset_test.c
  • WDT_TIMEOUT_MAX : lpc17xx_wdt.h
  • WDT_TIMEOUT_MIN : lpc17xx_wdt.h
  • WDT_UpdateTimeOut() : lpc17xx_wdt.h
  • WDT_US_INDEX : lpc17xx_wdt.h
  • WDT_WDCLKSEL_MASK : lpc17xx_wdt.h
  • WDT_WDCLKSEL_PCLK : lpc17xx_wdt.h
  • WDT_WDCLKSEL_RC : lpc17xx_wdt.h
  • WDT_WDCLKSEL_RTC : lpc17xx_wdt.h
  • WDT_WDFEED_MASK : lpc17xx_wdt.h
  • WDT_WDMOD : lpc17xx_wdt.h
  • WDT_WDMOD_MASK : lpc17xx_wdt.h
  • WDT_WDMOD_WDEN : lpc17xx_wdt.h
  • WDT_WDMOD_WDINT : lpc17xx_wdt.h
  • WDT_WDMOD_WDRESET : lpc17xx_wdt.h
  • WDT_WDMOD_WDTOF : lpc17xx_wdt.h
  • WDT_WDTC_MASK : lpc17xx_wdt.h
  • webclient_aborted() : webclient.h
  • webclient_appcall() : webclient.c
  • webclient_close() : webclient.c
  • webclient_closed() : webclient.h
  • WEBCLIENT_CONF_MAX_URLLEN : webclient.h
  • webclient_connected() : webclient.h
  • webclient_datahandler() : webclient.h
  • webclient_filename() : webclient.c
  • webclient_get() : webclient.c
  • webclient_hostname() : webclient.c
  • webclient_init() : webclient.c
  • webclient_mimetype() : webclient.c
  • webclient_port() : webclient.c
  • WEBCLIENT_STATE_CLOSE : webclient.c
  • WEBCLIENT_STATE_DATA : webclient.c
  • WEBCLIENT_STATE_HEADERS : webclient.c
  • WEBCLIENT_STATE_STATUSLINE : webclient.c
  • webclient_timedout() : webclient.h
  • WEBCLIENT_TIMEOUT : webclient.c
  • WebSide : webpage.h
  • White : GLCD.h
  • WIDTH : GLCD_SPI_LPC1700.c
  • wIndex : usb.h
  • wLength : usb.h
  • wMaxPacketSize : usb.h
  • WOLCount : emactest.c
  • WORD_BYTE : usb.h
  • WrCmd() : usbhw.c
  • WrCmdDat() : usbhw.c
  • WrCmdEP() : usbhw.c
  • WrIdx_M : ti_test.c
  • WrIdx_S : microwire_test.c , ti_test.c
  • write() : printf-stdarg.c
  • WriteDWBE() : tcpip.h , tcpip.c
  • WriteFrame_EMAC() : EMAC.c
  • WriteWBE() : tcpip.c , tcpip.h
  • wTotalLength : usb.h
  • wValue : usb.h
Generated on Tue Jun 7 15:00:15 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Data Fields

  • All
  • Functions
  • Variables
  • Typedefs
  • Enumerations
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  • _
  • a
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  • c
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  • x
  • y
Here is a list of all functions, variables, defines, enums, and typedefs with links to the files they belong to:

- x -

  • xferConfig : spi_interrupt_test.c , spi_sdcard.c , ssp_slave.c , sc16is750_int.c
  • XTAL : system_LPC17xx.c
Generated on Tue Jun 7 15:00:15 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Data Fields

  • All
  • Functions
  • Variables
  • Typedefs
  • Enumerations
  • Enumerator
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  • _
  • a
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  • x
  • y
Here is a list of all functions, variables, defines, enums, and typedefs with links to the files they belong to:

- y -

  • Yellow : GLCD.h
Generated on Tue Jun 7 15:00:15 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Data Fields

  • All
  • Functions
  • Variables
  • Typedefs
  • Enumerations
  • Enumerator
  • Defines
  • _
  • a
  • b
  • c
  • d
  • e
  • f
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  • h
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  • u
  • v
  • w
  • x
  • y

- _ -

  • __BUF_INCR : uart_interrupt_test.c , rs485_master.c , uart_fullmodem_test.c , rs485_slave.c
  • __BUF_IS_EMPTY : uart_fullmodem_test.c , uart_interrupt_test.c , rs485_master.c , rs485_slave.c
  • __BUF_IS_FULL : uart_interrupt_test.c , rs485_master.c , rs485_slave.c , uart_fullmodem_test.c
  • __BUF_MASK : uart_fullmodem_test.c , uart_interrupt_test.c , rs485_master.c , rs485_slave.c
  • __BUF_RESET : uart_interrupt_test.c , rs485_master.c , rs485_slave.c , uart_fullmodem_test.c
  • __BUF_WILL_FULL : uart_interrupt_test.c , rs485_master.c , rs485_slave.c , uart_fullmodem_test.c
  • __CCLK_DIV : system_LPC17xx.c
  • __CM3_CMSIS_VERSION : core_cm3.h
  • __CM3_CMSIS_VERSION_MAIN : core_cm3.h
  • __CM3_CMSIS_VERSION_SUB : core_cm3.h
  • __CORE_CLK : system_LPC17xx.c
  • __CORTEX_M : core_cm3.h
  • __FCCO : system_LPC17xx.c
  • __I : core_cm3.h
  • __IO : core_cm3.h
  • __LC_SWTICH_H__ : lc-switch.h
  • __M : system_LPC17xx.c
  • __MPU_PRESENT : LPC17xx.h
  • __N : system_LPC17xx.c
  • __NVIC_PRIO_BITS : LPC17xx.h
  • __O : core_cm3.h
  • __Vendor_SysTickConfig : LPC17xx.h
  • _ADC : lpc17xx_libcfg_default.h , lpc17xx_libcfg.h
  • _ADC_CHANNEL : adc_burst_test.c , adc_dma_test.c , adc_hardware_trigger_test.c , adc_interrupt_test.c , adc_polling_test.c
  • _ADC_CHANNEL_3 : adc_burst_test.c
  • _ADC_INT : adc_polling_test.c , adc_burst_test.c , adc_dma_test.c , adc_hardware_trigger_test.c , adc_interrupt_test.c
  • _ADC_INT_3 : adc_burst_test.c
  • _BIT : lpc_types.h
  • _BITMASK : lpc_types.h
  • _CAN : lpc17xx_libcfg_default.h , lpc17xx_libcfg.h
  • _DAC : lpc17xx_libcfg_default.h , lpc17xx_libcfg.h
  • _DBC : debug_frmwrk.h
  • _DBD : debug_frmwrk.h
  • _DBD16 : debug_frmwrk.h
  • _DBD32 : debug_frmwrk.h
  • _DBG : debug_frmwrk.h
  • _DBG_ : debug_frmwrk.h
  • _DBGFWK : lpc17xx_libcfg.h , lpc17xx_libcfg_default.h , lpc17xx_libcfg.h
  • _DBH : debug_frmwrk.h
  • _DBH16 : debug_frmwrk.h
  • _DBH32 : debug_frmwrk.h
  • _DG : debug_frmwrk.h
  • _EMAC : lpc17xx_libcfg_default.h , lpc17xx_libcfg.h
  • _EXT_IRQ : extint_sleep.c
  • _EXTI : lpc17xx_libcfg_default.h , lpc17xx_libcfg.h
  • _EXTINT : extint_sleep.c
  • _GPDMA : lpc17xx_libcfg_default.h , lpc17xx_libcfg.h
  • _GPIO : lpc17xx_libcfg_default.h , lpc17xx_libcfg.h
  • _I2C : lpc17xx_libcfg_default.h , lpc17xx_libcfg.h
  • _I2C0 : lpc17xx_libcfg_default.h , lpc17xx_libcfg.h
  • _I2C1 : lpc17xx_libcfg_default.h , lpc17xx_libcfg.h
  • _I2C2 : lpc17xx_libcfg_default.h , lpc17xx_libcfg.h
  • _I2S : lpc17xx_libcfg.h , lpc17xx_libcfg_default.h , lpc17xx_libcfg.h
  • _MCPWM : lpc17xx_libcfg_default.h , lpc17xx_libcfg.h
  • _PWM : lpc17xx_libcfg_default.h , lpc17xx_libcfg.h
  • _PWM1 : lpc17xx_libcfg_default.h , lpc17xx_libcfg.h
  • _QEI : lpc17xx_libcfg_default.h , lpc17xx_libcfg.h
  • _RIT : lpc17xx_libcfg_default.h , lpc17xx_libcfg.h
  • _RTC : lpc17xx_libcfg_default.h , lpc17xx_libcfg.h
  • _SBF : lpc_types.h
  • _SPI : lpc17xx_libcfg_default.h , lpc17xx_libcfg.h
  • _SSP : lpc17xx_libcfg_default.h , lpc17xx_libcfg.h
  • _SSP0 : lpc17xx_libcfg_default.h , lpc17xx_libcfg.h
  • _SSP1 : lpc17xx_libcfg_default.h , lpc17xx_libcfg.h
  • _SYSTICK : lpc17xx_libcfg_default.h , lpc17xx_libcfg.h
  • _TIM : lpc17xx_libcfg_default.h , lpc17xx_libcfg.h
  • _UART : lpc17xx_libcfg.h , lpc17xx_libcfg_default.h , lpc17xx_libcfg.h
  • _UART0 : lpc17xx_libcfg.h , lpc17xx_libcfg_default.h , lpc17xx_libcfg.h
  • _UART1 : lpc17xx_libcfg.h , lpc17xx_libcfg_default.h , lpc17xx_libcfg.h
  • _UART2 : lpc17xx_libcfg.h , lpc17xx_libcfg_default.h , lpc17xx_libcfg.h
  • _UART3 : lpc17xx_libcfg.h , lpc17xx_libcfg_default.h , lpc17xx_libcfg.h
  • _USB_DMA : lpc17xx_libcfg_default.h
  • _USBDEV : lpc17xx_libcfg_default.h
  • _WDT : lpc17xx_libcfg.h , lpc17xx_libcfg_default.h
Generated on Tue Jun 7 15:00:16 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Data Fields

  • All
  • Functions
  • Variables
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- k -

  • KB_LED_PIN : emactest.c
Generated on Tue Jun 7 15:00:17 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Data Fields

  • All
  • Functions
  • Variables
  • Typedefs
  • Enumerations
  • Enumerator
  • Defines
  • _
  • a
  • b
  • c
  • d
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  • f
  • g
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- l -

  • LC_END : lc-addrlabels.h , lc-switch.h
  • LC_INIT : lc-switch.h , lc-addrlabels.h
  • LC_RESUME : lc-addrlabels.h , lc-switch.h
  • LC_SET : lc-switch.h , lc-addrlabels.h
  • LCD_CS : GLCD_SPI_LPC1700.c
  • LCD_FLUSH_PIXELS : drv_glcd.h
  • LCD_SET_WINDOW : drv_glcd.h
  • LCD_WRITE_PIXEL : drv_glcd.h
  • LED1 : vcomdemo.h
  • LED1_MASK : main.c , tcpip.c , emactest.c
  • LED2 : vcomdemo.h
  • LED2_MASK : tcpip.c , emactest.c , main.c
  • LED3 : vcomdemo.h
  • LED4 : vcomdemo.h
  • LED5 : vcomdemo.h
  • LED6 : vcomdemo.h
  • LED7 : vcomdemo.h
  • LED8 : vcomdemo.h
  • LED_CFG : memory.h
  • LED_MSK : memory.h
  • LED_NUM : LedBlinky.c
  • LED_PIN : main.c , tcpip.c , clock-arch.c
  • LED_RD : memory.h
  • LED_SUSP : memory.h
  • LED_WR : memory.h
  • LEDMSK : usbaudio.h , vcomdemo.h , demo.h
  • LightGrey : GLCD.h
  • LPC_ADC : LPC17xx.h
  • LPC_ADC_BASE : LPC17xx.h
  • LPC_AHB_BASE : LPC17xx.h
  • LPC_AHBRAM0_BASE : LPC17xx.h
  • LPC_AHBRAM1_BASE : LPC17xx.h
  • LPC_APB0_BASE : LPC17xx.h
  • LPC_APB1_BASE : LPC17xx.h
  • LPC_CAN1 : LPC17xx.h
  • LPC_CAN1_BASE : LPC17xx.h
  • LPC_CAN2 : LPC17xx.h
  • LPC_CAN2_BASE : LPC17xx.h
  • LPC_CANAF : LPC17xx.h
  • LPC_CANAF_BASE : LPC17xx.h
  • LPC_CANAF_RAM : LPC17xx.h
  • LPC_CANAF_RAM_BASE : LPC17xx.h
  • LPC_CANCR : LPC17xx.h
  • LPC_CANCR_BASE : LPC17xx.h
  • LPC_CM3_BASE : LPC17xx.h
  • LPC_DAC : LPC17xx.h
  • LPC_DAC_BASE : LPC17xx.h
  • LPC_EMAC : LPC17xx.h
  • LPC_EMAC_BASE : LPC17xx.h
  • LPC_FLASH_BASE : LPC17xx.h
  • LPC_GPDMA : LPC17xx.h
  • LPC_GPDMA_BASE : LPC17xx.h
  • LPC_GPDMACH0 : LPC17xx.h
  • LPC_GPDMACH0_BASE : LPC17xx.h
  • LPC_GPDMACH1 : LPC17xx.h
  • LPC_GPDMACH1_BASE : LPC17xx.h
  • LPC_GPDMACH2 : LPC17xx.h
  • LPC_GPDMACH2_BASE : LPC17xx.h
  • LPC_GPDMACH3 : LPC17xx.h
  • LPC_GPDMACH3_BASE : LPC17xx.h
  • LPC_GPDMACH4 : LPC17xx.h
  • LPC_GPDMACH4_BASE : LPC17xx.h
  • LPC_GPDMACH5 : LPC17xx.h
  • LPC_GPDMACH5_BASE : LPC17xx.h
  • LPC_GPDMACH6 : LPC17xx.h
  • LPC_GPDMACH6_BASE : LPC17xx.h
  • LPC_GPDMACH7 : LPC17xx.h
  • LPC_GPDMACH7_BASE : LPC17xx.h
  • LPC_GPIO0 : LPC17xx.h
  • LPC_GPIO0_BASE : LPC17xx.h
  • LPC_GPIO1 : LPC17xx.h
  • LPC_GPIO1_BASE : LPC17xx.h
  • LPC_GPIO2 : LPC17xx.h
  • LPC_GPIO2_BASE : LPC17xx.h
  • LPC_GPIO3 : LPC17xx.h
  • LPC_GPIO3_BASE : LPC17xx.h
  • LPC_GPIO4 : LPC17xx.h
  • LPC_GPIO4_BASE : LPC17xx.h
  • LPC_GPIO_BASE : LPC17xx.h
  • LPC_GPIOINT : LPC17xx.h
  • LPC_GPIOINT_BASE : LPC17xx.h
  • LPC_I2C0 : LPC17xx.h
  • LPC_I2C0_BASE : LPC17xx.h
  • LPC_I2C1 : LPC17xx.h
  • LPC_I2C1_BASE : LPC17xx.h
  • LPC_I2C2 : LPC17xx.h
  • LPC_I2C2_BASE : LPC17xx.h
  • LPC_I2S : LPC17xx.h
  • LPC_I2S_BASE : LPC17xx.h
  • LPC_MCPWM : LPC17xx.h
  • LPC_MCPWM_BASE : LPC17xx.h
  • LPC_PINCON : LPC17xx.h
  • LPC_PINCON_BASE : LPC17xx.h
  • LPC_PWM1 : LPC17xx.h
  • LPC_PWM1_BASE : LPC17xx.h
  • LPC_QEI : LPC17xx.h
  • LPC_QEI_BASE : LPC17xx.h
  • LPC_RAM_BASE : LPC17xx.h
  • LPC_RIT : LPC17xx.h
  • LPC_RIT_BASE : LPC17xx.h
  • LPC_RTC : LPC17xx.h
  • LPC_RTC_BASE : LPC17xx.h
  • LPC_SC : LPC17xx.h
  • LPC_SC_BASE : LPC17xx.h
  • LPC_SPI : LPC17xx.h
  • LPC_SPI_BASE : LPC17xx.h
  • LPC_SSP0 : LPC17xx.h
  • LPC_SSP0_BASE : LPC17xx.h
  • LPC_SSP1 : LPC17xx.h
  • LPC_SSP1_BASE : LPC17xx.h
  • LPC_TIM0 : LPC17xx.h
  • LPC_TIM0_BASE : LPC17xx.h
  • LPC_TIM1 : LPC17xx.h
  • LPC_TIM1_BASE : LPC17xx.h
  • LPC_TIM2 : LPC17xx.h
  • LPC_TIM2_BASE : LPC17xx.h
  • LPC_TIM3 : LPC17xx.h
  • LPC_TIM3_BASE : LPC17xx.h
  • LPC_UART0 : LPC17xx.h
  • LPC_UART0_BASE : LPC17xx.h
  • LPC_UART1 : LPC17xx.h
  • LPC_UART1_BASE : LPC17xx.h
  • LPC_UART2 : LPC17xx.h
  • LPC_UART2_BASE : LPC17xx.h
  • LPC_UART3 : LPC17xx.h
  • LPC_UART3_BASE : LPC17xx.h
  • LPC_USB : LPC17xx.h
  • LPC_USB_BASE : LPC17xx.h
  • LPC_WDT : LPC17xx.h
  • LPC_WDT_BASE : LPC17xx.h
Generated on Tue Jun 7 15:00:17 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Data Fields

  • All
  • Functions
  • Variables
  • Typedefs
  • Enumerations
  • Enumerator
  • Defines
  • _
  • a
  • b
  • c
  • d
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  • f
  • g
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- m -

  • Magenta : GLCD.h
  • Maroon : GLCD.h
  • MAX : lpc_types.h
  • MAX_CAP_TIMES : qei_test_velo.c
  • MAX_ENTRY : can_test_aflut.c
  • MAX_ETH_TX_DATA_SIZE : tcpip.h
  • MAX_GLCD_STR_SIZE : drv_glcd.h
  • MAX_HW_FULLCAN_OBJ : lpc17xx_can.h
  • MAX_RETRIES : resolv.c
  • MAX_RETRYS : tcpip.h
  • MAX_SW_FULLCAN_OBJ : lpc17xx_can.h
  • MAX_TCP_RX_DATA_SIZE : tcpip.h
  • MAX_TCP_TX_DATA_SIZE : tcpip.h
  • MAX_TIME : uip-neighbor.c
  • MAX_VEL : qei_test_velo.c
  • MCB_LPC17XX_ADC_INJECT_TEST : adc_burst_test.c
  • MCB_LPC_1768 : lpc17xx_emac.h , adc_burst_test.c , adc_dma_test.c , adc_interrupt_test.c , adc_polling_test.c , gpio_int.c , LedBlinky.c , rit_interrupt.c , uart_fullmodem_test.c , wdt_interrupt_test.c
  • MCB_LPC_1768_ADC_BURST_MULTI : adc_burst_test.c
  • MCPWM_CAPCLR_CAP : lpc17xx_mcpwm.h
  • MCPWM_CAPCON_CAPMCI_FE : lpc17xx_mcpwm.h
  • MCPWM_CAPCON_CAPMCI_RE : lpc17xx_mcpwm.h
  • MCPWM_CAPCON_HNFCAP : lpc17xx_mcpwm.h
  • MCPWM_CAPCON_RT : lpc17xx_mcpwm.h
  • MCPWM_CHANNEL_CENTER_MODE : lpc17xx_mcpwm.h
  • MCPWM_CHANNEL_EDGE_MODE : lpc17xx_mcpwm.h
  • MCPWM_CHANNEL_PASSIVE_HI : lpc17xx_mcpwm.h
  • MCPWM_CHANNEL_PASSIVE_LO : lpc17xx_mcpwm.h
  • MCPWM_CNTCON_CNTR : lpc17xx_mcpwm.h
  • MCPWM_CNTCON_TCMCI_FE : lpc17xx_mcpwm.h
  • MCPWM_CNTCON_TCMCI_RE : lpc17xx_mcpwm.h
  • MCPWM_CON_ACMODE : lpc17xx_mcpwm.h
  • MCPWM_CON_CENTER : lpc17xx_mcpwm.h
  • MCPWM_CON_DCMODE : lpc17xx_mcpwm.h
  • MCPWM_CON_DISUP : lpc17xx_mcpwm.h
  • MCPWM_CON_DTE : lpc17xx_mcpwm.h
  • MCPWM_CON_INVBDC : lpc17xx_mcpwm.h
  • MCPWM_CON_POLAR : lpc17xx_mcpwm.h
  • MCPWM_CON_RUN : lpc17xx_mcpwm.h
  • MCPWM_CP_A0 : lpc17xx_mcpwm.h
  • MCPWM_CP_A1 : lpc17xx_mcpwm.h
  • MCPWM_CP_A2 : lpc17xx_mcpwm.h
  • MCPWM_CP_B0 : lpc17xx_mcpwm.h
  • MCPWM_CP_B1 : lpc17xx_mcpwm.h
  • MCPWM_CP_B2 : lpc17xx_mcpwm.h
  • MCPWM_DT : lpc17xx_mcpwm.h
  • MCPWM_INT_ABORT : lpc17xx_mcpwm.h
  • MCPWM_INT_ICAP : lpc17xx_mcpwm.h
  • MCPWM_INT_ILIM : lpc17xx_mcpwm.h
  • MCPWM_INT_IMAT : lpc17xx_mcpwm.h
  • MCPWM_INTFLAG_ABORT : lpc17xx_mcpwm.h
  • MCPWM_INTFLAG_CAP0 : lpc17xx_mcpwm.h
  • MCPWM_INTFLAG_CAP1 : lpc17xx_mcpwm.h
  • MCPWM_INTFLAG_CAP2 : lpc17xx_mcpwm.h
  • MCPWM_INTFLAG_LIM0 : lpc17xx_mcpwm.h
  • MCPWM_INTFLAG_LIM1 : lpc17xx_mcpwm.h
  • MCPWM_INTFLAG_LIM2 : lpc17xx_mcpwm.h
  • MCPWM_INTFLAG_MAT0 : lpc17xx_mcpwm.h
  • MCPWM_INTFLAG_MAT1 : lpc17xx_mcpwm.h
  • MCPWM_INTFLAG_MAT2 : lpc17xx_mcpwm.h
  • MCPWM_PATENT_A0 : lpc17xx_mcpwm.h
  • MCPWM_PATENT_A1 : lpc17xx_mcpwm.h
  • MCPWM_PATENT_A2 : lpc17xx_mcpwm.h
  • MCPWM_PATENT_B0 : lpc17xx_mcpwm.h
  • MCPWM_PATENT_B1 : lpc17xx_mcpwm.h
  • MCPWM_PATENT_B2 : lpc17xx_mcpwm.h
  • MicroWire_RD_CMD : microwire_test.c
  • MicroWire_WR_CMD : microwire_test.c
  • MIN : lpc_types.h
  • MPU_FULL_ACCESS : mpu_test.c
  • MPU_NO_ACCESS : mpu_test.c
  • MPU_PRIVILEGED_ACESS_USER_NO_ACCESS : mpu_test.c
  • MPU_PRIVILEGED_READ_ONLY_USER_NO_ACCESS : mpu_test.c
  • MPU_PRIVILEGED_RW_USER_READ_ONLY : mpu_test.c
  • MPU_RASR_ACCESS_PERMISSION : mpu_test.c
  • MPU_RASR_REGION_SIZE : mpu_test.c
  • MPU_READ_ONLY : mpu_test.c
  • MPU_REGION_ENABLE : mpu_test.c
  • MPU_REGION_SIZE_128B : mpu_test.c
  • MPU_REGION_SIZE_128KB : mpu_test.c
  • MPU_REGION_SIZE_128MB : mpu_test.c
  • MPU_REGION_SIZE_16KB : mpu_test.c
  • MPU_REGION_SIZE_16MB : mpu_test.c
  • MPU_REGION_SIZE_1GB : mpu_test.c
  • MPU_REGION_SIZE_1KB : mpu_test.c
  • MPU_REGION_SIZE_1MB : mpu_test.c
  • MPU_REGION_SIZE_256B : mpu_test.c
  • MPU_REGION_SIZE_256KB : mpu_test.c
  • MPU_REGION_SIZE_256MB : mpu_test.c
  • MPU_REGION_SIZE_2GB : mpu_test.c
  • MPU_REGION_SIZE_2KB : mpu_test.c
  • MPU_REGION_SIZE_2MB : mpu_test.c
  • MPU_REGION_SIZE_32B : mpu_test.c
  • MPU_REGION_SIZE_32KB : mpu_test.c
  • MPU_REGION_SIZE_32MB : mpu_test.c
  • MPU_REGION_SIZE_4GB : mpu_test.c
  • MPU_REGION_SIZE_4KB : mpu_test.c
  • MPU_REGION_SIZE_4MB : mpu_test.c
  • MPU_REGION_SIZE_512B : mpu_test.c
  • MPU_REGION_SIZE_512KB : mpu_test.c
  • MPU_REGION_SIZE_512MB : mpu_test.c
  • MPU_REGION_SIZE_64B : mpu_test.c
  • MPU_REGION_SIZE_64KB : mpu_test.c
  • MPU_REGION_SIZE_64MB : mpu_test.c
  • MPU_REGION_SIZE_8KB : mpu_test.c
  • MPU_REGION_SIZE_8MB : mpu_test.c
  • MPU_UNPREDICTABLE : mpu_test.c
  • MSC_BlockCount : mscuser.h
  • MSC_BlockSize : mscuser.h
  • MSC_BS_CBW : msc.h
  • MSC_BS_CSW : msc.h
  • MSC_BS_DATA_IN : msc.h
  • MSC_BS_DATA_IN_LAST : msc.h
  • MSC_BS_DATA_IN_LAST_STALL : msc.h
  • MSC_BS_DATA_OUT : msc.h
  • MSC_BS_ERROR : msc.h
  • MSC_CBW_Signature : msc.h
  • MSC_CSW_Signature : msc.h
  • MSC_EP_IN : mscuser.h
  • MSC_EP_OUT : mscuser.h
  • MSC_ImageSize : memory.h
  • MSC_MAX_PACKET : mscuser.h
  • MSC_MemorySize : mscuser.h
  • MSC_PROTOCOL_BULK_ONLY : msc.h
  • MSC_PROTOCOL_CBI_INT : msc.h
  • MSC_PROTOCOL_CBI_NOINT : msc.h
  • MSC_REQUEST_GET_MAX_LUN : msc.h
  • MSC_REQUEST_RESET : msc.h
  • MSC_SUBCLASS_QIC157 : msc.h
  • MSC_SUBCLASS_RBC : msc.h
  • MSC_SUBCLASS_SCSI : msc.h
  • MSC_SUBCLASS_SFF8020I_MMC2 : msc.h
  • MSC_SUBCLASS_SFF8070I : msc.h
  • MSC_SUBCLASS_UFI : msc.h
  • MSG_DISABLE : lpc17xx_can.h
  • MSG_ENABLE : lpc17xx_can.h
  • MYIP_1 : tcpip.h
  • MYIP_2 : tcpip.h
  • MYIP_3 : tcpip.h
  • MYIP_4 : tcpip.h
  • MYMAC_1 : EMAC.h , emactest.c
  • MYMAC_2 : EMAC.h , emactest.c
  • MYMAC_3 : EMAC.h , emactest.c
  • MYMAC_4 : EMAC.h , emactest.c
  • MYMAC_5 : emactest.c , EMAC.h
  • MYMAC_6 : EMAC.h , emactest.c
Generated on Tue Jun 7 15:00:17 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Data Fields

  • All
  • Functions
  • Variables
  • Typedefs
  • Enumerations
  • Enumerator
  • Defines
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  • c
  • d
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  • f
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- n -

  • Navy : GLCD.h
  • NDD_REQ_INT : usbreg.h
  • NELEMENTS : lpc_types.h
  • ntohs : uip.h
  • NULL : lpc_types.h , resolv.c , httpd-fs.c
  • NUM_SAMPLE : dac_wave_generate.c
  • NUM_SAMPLE_SINE : dac_wave_generate.c
  • NUM_SINE_SAMPLE : dac_sinewave_test.c
  • NVIC : core_cm3.h
  • NVIC_BASE : core_cm3.h
  • NVIC_VTOR_MASK : lpc17xx_nvic.c
Generated on Tue Jun 7 15:00:17 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Data Fields

  • All
  • Functions
  • Variables
  • Typedefs
  • Enumerations
  • Enumerator
  • Defines
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  • b
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- o -

  • Olive : GLCD.h
  • OP_ARP_ANSWER : tcpip.h
  • OP_ARP_REQUEST : tcpip.h
  • OSC_CLK : system_LPC17xx.c
Generated on Tue Jun 7 15:00:17 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Data Fields

  • All
  • Functions
  • Variables
  • Typedefs
  • Enumerations
  • Enumerator
  • Defines
  • _
  • a
  • b
  • c
  • d
  • e
  • f
  • g
  • h
  • i
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  • l
  • m
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  • p
  • q
  • r
  • s
  • t
  • u
  • v
  • w
  • x
  • y

- a -

  • AC_MODE_TEST : mcpwm_simple.c
  • ACMD13_SD_STATUS : spi_sdcard.c
  • ACMD22_SEND_NUM_WR_BLOCKS : spi_sdcard.c
  • ACMD23_SET_WR_BLK_ERASE_COUNT : spi_sdcard.c
  • ACMD41_SEND_OP_COND : spi_sdcard.c
  • ACMD42_SET_CLR_CARD_DETECT : spi_sdcard.c
  • ACMD51_SEND_SCR : spi_sdcard.c
  • ADC_ADCOFFS : lpc17xx_adc.h
  • ADC_CR_BURST : lpc17xx_adc.h
  • ADC_CR_CH_SEL : lpc17xx_adc.h
  • ADC_CR_CLKDIV : lpc17xx_adc.h
  • ADC_CR_EDGE : lpc17xx_adc.h
  • ADC_CR_PDN : lpc17xx_adc.h
  • ADC_CR_START_CAP01 : lpc17xx_adc.h
  • ADC_CR_START_EINT0 : lpc17xx_adc.h
  • ADC_CR_START_MASK : lpc17xx_adc.h
  • ADC_CR_START_MAT01 : lpc17xx_adc.h
  • ADC_CR_START_MAT03 : lpc17xx_adc.h
  • ADC_CR_START_MAT10 : lpc17xx_adc.h
  • ADC_CR_START_MAT11 : lpc17xx_adc.h
  • ADC_CR_START_MODE_SEL : lpc17xx_adc.h
  • ADC_CR_START_NOW : lpc17xx_adc.h
  • ADC_DR_DONE_FLAG : lpc17xx_adc.h
  • ADC_DR_OVERRUN_FLAG : lpc17xx_adc.h
  • ADC_DR_RESULT : lpc17xx_adc.h
  • ADC_GDR_CH : lpc17xx_adc.h
  • ADC_GDR_CH_MASK : lpc17xx_adc.h
  • ADC_GDR_DONE_FLAG : lpc17xx_adc.h
  • ADC_GDR_OVERRUN_FLAG : lpc17xx_adc.h
  • ADC_GDR_RESULT : lpc17xx_adc.h
  • ADC_INTEN_CH : lpc17xx_adc.h
  • ADC_INTEN_GLOBAL : lpc17xx_adc.h
  • ADC_STAT_CH_DONE_FLAG : lpc17xx_adc.h
  • ADC_STAT_CH_OVERRUN_FLAG : lpc17xx_adc.h
  • ADC_STAT_INT_FLAG : lpc17xx_adc.h
  • ADC_TRIM : lpc17xx_adc.h
  • ADC_VALUE_MAX : ADC.h
  • AP_CLK : usbreg.h
  • ARP_FRAME_SIZE : tcpip.h
  • ARP_HARDW_OFS : tcpip.h
  • ARP_HLEN_PLEN_OFS : tcpip.h
  • ARP_HWTYPE_ETH : uip_arp.c
  • ARP_OPCODE_OFS : tcpip.h
  • ARP_PROT_OFS : tcpip.h
  • ARP_REPLY : uip_arp.c
  • ARP_REQUEST : uip_arp.c
  • ARP_SENDER_HA_OFS : tcpip.h
  • ARP_SENDER_IP_OFS : tcpip.h
  • ARP_TARGET_HA_OFS : tcpip.h
  • ARP_TARGET_IP_OFS : tcpip.h
  • AUDIO_3D_STEREO_PROCESS : audio.h
  • AUDIO_AC3_CONTROL_UNDEFINED : audio.h
  • AUDIO_AC3_DYN_RANGE_CONTROL : audio.h
  • AUDIO_AC3_HILO_SCALING_CONTROL : audio.h
  • AUDIO_AC3_MODE_CONTROL : audio.h
  • AUDIO_AC3_SCALING_CONTROL : audio.h
  • AUDIO_ATTACK_TIME_CONTROL : audio.h
  • AUDIO_AUTOMATIC_GAIN_CONTROL : audio.h
  • AUDIO_BASS_BOOST_CONTROL : audio.h
  • AUDIO_BASS_CONTROL : audio.h
  • AUDIO_CHANNEL_C : audio.h
  • AUDIO_CHANNEL_L : audio.h
  • AUDIO_CHANNEL_LC : audio.h
  • AUDIO_CHANNEL_LFE : audio.h
  • AUDIO_CHANNEL_LS : audio.h
  • AUDIO_CHANNEL_M : audio.h
  • AUDIO_CHANNEL_R : audio.h
  • AUDIO_CHANNEL_RC : audio.h
  • AUDIO_CHANNEL_RS : audio.h
  • AUDIO_CHANNEL_S : audio.h
  • AUDIO_CHANNEL_SL : audio.h
  • AUDIO_CHANNEL_SR : audio.h
  • AUDIO_CHANNEL_T : audio.h
  • AUDIO_CHORUS_DEPTH_CONTROL : audio.h
  • AUDIO_CHORUS_LEVEL_CONTROL : audio.h
  • AUDIO_CHORUS_PROCESS : audio.h
  • AUDIO_COMPRESSION_RATE_CONTROL : audio.h
  • AUDIO_CONFIGURATION_DESCRIPTOR_TYPE : audio.h
  • AUDIO_CONTROL_ATTACK_TIME : audio.h
  • AUDIO_CONTROL_AUTOMATIC_GAIN : audio.h
  • AUDIO_CONTROL_BASS : audio.h
  • AUDIO_CONTROL_BASS_BOOST : audio.h
  • AUDIO_CONTROL_CHORUS_DEPTH : audio.h
  • AUDIO_CONTROL_CHORUS_LEVEL : audio.h
  • AUDIO_CONTROL_COMPRESSION_RATE : audio.h
  • AUDIO_CONTROL_DEALY : audio.h
  • AUDIO_CONTROL_ENABLE : audio.h
  • AUDIO_CONTROL_EXTENSION_UNIT : audio.h
  • AUDIO_CONTROL_FEATURE_UNIT : audio.h
  • AUDIO_CONTROL_GRAPHIC_EQUALIZER : audio.h
  • AUDIO_CONTROL_HEADER : audio.h
  • AUDIO_CONTROL_INPUT_TERMINAL : audio.h
  • AUDIO_CONTROL_INTERFACE_DESC_SZ : audio.h
  • AUDIO_CONTROL_LOUDNESS : audio.h
  • AUDIO_CONTROL_MAX_AMPL : audio.h
  • AUDIO_CONTROL_MID : audio.h
  • AUDIO_CONTROL_MIXER_UNIT : audio.h
  • AUDIO_CONTROL_MODE_SELECT : audio.h
  • AUDIO_CONTROL_MUTE : audio.h
  • AUDIO_CONTROL_OUTPUT_TERMINAL : audio.h
  • AUDIO_CONTROL_PITCH : audio.h
  • AUDIO_CONTROL_PROCESSING_UNIT : audio.h
  • AUDIO_CONTROL_RELEASE_TIME : audio.h
  • AUDIO_CONTROL_REVERB_FEEDBACK : audio.h
  • AUDIO_CONTROL_REVERB_LEVEL : audio.h
  • AUDIO_CONTROL_REVERB_TIME : audio.h
  • AUDIO_CONTROL_REVERB_TYPE : audio.h
  • AUDIO_CONTROL_SAMPLING_FREQ : audio.h
  • AUDIO_CONTROL_SELECTOR_UNIT : audio.h
  • AUDIO_CONTROL_SHORUS_RATE : audio.h
  • AUDIO_CONTROL_SPACIOUSNESS : audio.h
  • AUDIO_CONTROL_THRESHOLD : audio.h
  • AUDIO_CONTROL_TREBLE : audio.h
  • AUDIO_CONTROL_UNDEFINED : audio.h
  • AUDIO_CONTROL_VOLUME : audio.h
  • AUDIO_COPY_PROTECT_CONTROL : audio.h
  • AUDIO_DELAY_CONTROL : audio.h
  • AUDIO_DEVICE_DESCRIPTOR_TYPE : audio.h
  • AUDIO_DOLBY_PROLOGIC_PROCESS : audio.h
  • AUDIO_DYN_RANGE_COMP_PROCESS : audio.h
  • AUDIO_ENABLE_CONTROL : audio.h
  • AUDIO_ENDPOINT_DESCRIPTOR_TYPE : audio.h
  • AUDIO_ENDPOINT_GENERAL : audio.h
  • AUDIO_ENDPOINT_UNDEFINED : audio.h
  • AUDIO_EXTENSION_UNIT_DESC_SZ : audio.h
  • AUDIO_FEATURE_UNIT_DESC_SZ : audio.h
  • AUDIO_FORMAT_AC3 : audio.h
  • AUDIO_FORMAT_AC3_DESC_SIZE : audio.h
  • AUDIO_FORMAT_ALAW : audio.h
  • AUDIO_FORMAT_IEC1937_AC3 : audio.h
  • AUDIO_FORMAT_IEC1937_MPEG1_L1 : audio.h
  • AUDIO_FORMAT_IEC1937_MPEG1_L2_3 : audio.h
  • AUDIO_FORMAT_IEC1937_MPEG2_EXT : audio.h
  • AUDIO_FORMAT_IEC1937_MPEG2_L1_LS : audio.h
  • AUDIO_FORMAT_IEC1937_MPEG2_L2_3 : audio.h
  • AUDIO_FORMAT_IEC1937_MPEG2_NOEXT : audio.h
  • AUDIO_FORMAT_IEEE_FLOAT : audio.h
  • AUDIO_FORMAT_MPEG : audio.h
  • AUDIO_FORMAT_MPEG_DESC_SIZE : audio.h
  • AUDIO_FORMAT_MULAW : audio.h
  • AUDIO_FORMAT_PCM : audio.h
  • AUDIO_FORMAT_PCM8 : audio.h
  • AUDIO_FORMAT_TYPE_I : audio.h
  • AUDIO_FORMAT_TYPE_I_DESC_SZ : audio.h
  • AUDIO_FORMAT_TYPE_I_UNDEFINED : audio.h
  • AUDIO_FORMAT_TYPE_II : audio.h
  • AUDIO_FORMAT_TYPE_II_DESC_SZ : audio.h
  • AUDIO_FORMAT_TYPE_II_UNDEFINED : audio.h
  • AUDIO_FORMAT_TYPE_III : audio.h
  • AUDIO_FORMAT_TYPE_III_DESC_SZ : audio.h
  • AUDIO_FORMAT_TYPE_III_UNDEFINED : audio.h
  • AUDIO_FORMAT_TYPE_UNDEFINED : audio.h
  • AUDIO_GRAPHIC_EQUALIZER_CONTROL : audio.h
  • AUDIO_INPUT_TERMINAL_DESC_SIZE : audio.h
  • AUDIO_INTERFACE_DESCRIPTOR_TYPE : audio.h
  • AUDIO_LOUDNESS_CONTROL : audio.h
  • AUDIO_MAX_AMPL_CONTROL : audio.h
  • AUDIO_MAX_PACKETS_ONLY : audio.h
  • AUDIO_MID_CONTROL : audio.h
  • AUDIO_MIXER_UNIT_DESC_SZ : audio.h
  • AUDIO_MODE_SELECT_CONTROL : audio.h
  • AUDIO_MPEG_CONTROL_UNDEFINED : audio.h
  • AUDIO_MPEG_DUAL_CHANNEL_CONTROL : audio.h
  • AUDIO_MPEG_DYN_RANGE_CONTROL : audio.h
  • AUDIO_MPEG_HILO_SCALING_CONTROL : audio.h
  • AUDIO_MPEG_MULTILINGUAL_CONTROL : audio.h
  • AUDIO_MPEG_SCALING_CONTROL : audio.h
  • AUDIO_MPEG_SECOND_STEREO_CONTROL : audio.h
  • AUDIO_MUTE_CONTROL : audio.h
  • AUDIO_OUTPUT_TERMINAL_DESC_SIZE : audio.h
  • AUDIO_PITCH_CONTROL : audio.h
  • AUDIO_PROCESSING_UNIT_DESC_SZ : audio.h
  • AUDIO_PROTOCOL_UNDEFINED : audio.h
  • AUDIO_RELEASE_TIME_CONTROL : audio.h
  • AUDIO_REQUEST_GET_CUR : audio.h
  • AUDIO_REQUEST_GET_MAX : audio.h
  • AUDIO_REQUEST_GET_MEM : audio.h
  • AUDIO_REQUEST_GET_MIN : audio.h
  • AUDIO_REQUEST_GET_RES : audio.h
  • AUDIO_REQUEST_GET_STAT : audio.h
  • AUDIO_REQUEST_SET_CUR : audio.h
  • AUDIO_REQUEST_SET_MAX : audio.h
  • AUDIO_REQUEST_SET_MEM : audio.h
  • AUDIO_REQUEST_SET_MIN : audio.h
  • AUDIO_REQUEST_SET_RES : audio.h
  • AUDIO_REQUEST_UNDEFINED : audio.h
  • AUDIO_REVERB_FEEDBACK_CONTROL : audio.h
  • AUDIO_REVERB_LEVEL_CONTROL : audio.h
  • AUDIO_REVERB_TIME_CONTROL : audio.h
  • AUDIO_REVERBERATION_PROCESS : audio.h
  • AUDIO_SAMPLING_FREQ_CONTROL : audio.h
  • AUDIO_SELECTOR_UNIT_DESC_SZ : audio.h
  • AUDIO_SHORUS_RATE_CONTROL : audio.h
  • AUDIO_SPACIOUSNESS_CONTROL : audio.h
  • AUDIO_STANDARD_ENDPOINT_DESC_SIZE : audio.h
  • AUDIO_STREAMING_ENDPOINT_DESC_SIZE : audio.h
  • AUDIO_STREAMING_FORMAT_SPECIFIC : audio.h
  • AUDIO_STREAMING_FORMAT_TYPE : audio.h
  • AUDIO_STREAMING_GENERAL : audio.h
  • AUDIO_STREAMING_INTERFACE_DESC_SIZE : audio.h
  • AUDIO_STREAMING_UNDEFINED : audio.h
  • AUDIO_STRING_DESCRIPTOR_TYPE : audio.h
  • AUDIO_SUBCLASS_AUDIOCONTROL : audio.h
  • AUDIO_SUBCLASS_AUDIOSTREAMING : audio.h
  • AUDIO_SUBCLASS_MIDISTREAMING : audio.h
  • AUDIO_SUBCLASS_UNDEFINED : audio.h
  • AUDIO_TERMINAL_1394_DA_STREAM : audio.h
  • AUDIO_TERMINAL_1394_DA_STREAM_TRACK : audio.h
  • AUDIO_TERMINAL_ANALOG_CONNECTOR : audio.h
  • AUDIO_TERMINAL_ANALOG_TAPE : audio.h
  • AUDIO_TERMINAL_BIDIRECTIONAL_UNDEFINED : audio.h
  • AUDIO_TERMINAL_CABLE_TUNER_AUDIO : audio.h
  • AUDIO_TERMINAL_CALIBRATION_NOISE : audio.h
  • AUDIO_TERMINAL_CD_PLAYER : audio.h
  • AUDIO_TERMINAL_COMMUNICATION_SPEAKER : audio.h
  • AUDIO_TERMINAL_DAT : audio.h
  • AUDIO_TERMINAL_DCC : audio.h
  • AUDIO_TERMINAL_DESKTOP_MICROPHONE : audio.h
  • AUDIO_TERMINAL_DESKTOP_SPEAKER : audio.h
  • AUDIO_TERMINAL_DIGITAL_AUDIO_INTERFACE : audio.h
  • AUDIO_TERMINAL_DOWN_LINE_PHONE : audio.h
  • AUDIO_TERMINAL_DSS_AUDIO : audio.h
  • AUDIO_TERMINAL_DVD_AUDIO : audio.h
  • AUDIO_TERMINAL_EMBEDDED_UNDEFINED : audio.h
  • AUDIO_TERMINAL_EQUALIZATION_NOISE : audio.h
  • AUDIO_TERMINAL_EXTERNAL_UNDEFINED : audio.h
  • AUDIO_TERMINAL_HANDSET : audio.h
  • AUDIO_TERMINAL_HEAD_MOUNTED_AUDIO : audio.h
  • AUDIO_TERMINAL_HEAD_MOUNTED_HANDSET : audio.h
  • AUDIO_TERMINAL_HEADPHONES : audio.h
  • AUDIO_TERMINAL_INPUT_UNDEFINED : audio.h
  • AUDIO_TERMINAL_LEGACY_AUDIO_CONNECTOR : audio.h
  • AUDIO_TERMINAL_LINE_CONNECTOR : audio.h
  • AUDIO_TERMINAL_LOW_FREQ_SPEAKER : audio.h
  • AUDIO_TERMINAL_MICROPHONE : audio.h
  • AUDIO_TERMINAL_MICROPHONE_ARRAY : audio.h
  • AUDIO_TERMINAL_MINI_DISK : audio.h
  • AUDIO_TERMINAL_MULTI_TRACK_RECORDER : audio.h
  • AUDIO_TERMINAL_OMNI_DIR_MICROPHONE : audio.h
  • AUDIO_TERMINAL_OUTPUT_UNDEFINED : audio.h
  • AUDIO_TERMINAL_PERSONAL_MICROPHONE : audio.h
  • AUDIO_TERMINAL_PHONE_LINE : audio.h
  • AUDIO_TERMINAL_PHONOGRAPH : audio.h
  • AUDIO_TERMINAL_PROCESSING_MIC_ARRAY : audio.h
  • AUDIO_TERMINAL_RADIO_RECEIVER : audio.h
  • AUDIO_TERMINAL_RADIO_TRANSMITTER : audio.h
  • AUDIO_TERMINAL_ROOM_SPEAKER : audio.h
  • AUDIO_TERMINAL_SATELLITE_RECEIVER_AUDIO : audio.h
  • AUDIO_TERMINAL_SPDIF_INTERFACE : audio.h
  • AUDIO_TERMINAL_SPEAKER : audio.h
  • AUDIO_TERMINAL_SPEAKERPHONE : audio.h
  • AUDIO_TERMINAL_SPEAKERPHONE_ECHOCANCEL : audio.h
  • AUDIO_TERMINAL_SPEAKERPHONE_ECHOSUPRESS : audio.h
  • AUDIO_TERMINAL_SYNTHESIZER : audio.h
  • AUDIO_TERMINAL_TELEPHONE : audio.h
  • AUDIO_TERMINAL_TELEPHONY_UNDEFINED : audio.h
  • AUDIO_TERMINAL_TV_TUNER_AUDIO : audio.h
  • AUDIO_TERMINAL_USB_STREAMING : audio.h
  • AUDIO_TERMINAL_USB_UNDEFINED : audio.h
  • AUDIO_TERMINAL_USB_VENDOR_SPECIFIC : audio.h
  • AUDIO_TERMINAL_VCR_AUDIO : audio.h
  • AUDIO_TERMINAL_VIDEO_DISC_AUDIO : audio.h
  • AUDIO_THRESHOLD_CONTROL : audio.h
  • AUDIO_TREBLE_CONTROL : audio.h
  • AUDIO_UNDEFINED_DESCRIPTOR_TYPE : audio.h
  • AUDIO_UNDEFINED_PROCESS : audio.h
  • AUDIO_UP_DOWN_MIX_PROCESS : audio.h
  • AUDIO_VOLUME_CONTROL : audio.h
  • AUTO_NEGOTIATION_ENA : emac.h
  • AUTO_RTS_CTS_USE : uart_fullmodem_test.c
  • AUTO_SLVADDR_DETECT : rs485_slave.c
Generated on Tue Jun 7 15:00:16 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Data Fields

  • All
  • Functions
  • Variables
  • Typedefs
  • Enumerations
  • Enumerator
  • Defines
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  • a
  • b
  • c
  • d
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  • f
  • g
  • h
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- b -

  • B3VAL : usbdesc.h
  • B_S : usbaudio.h
  • BACKLIGHT_OFF : glcd_ll.h
  • BACKLIGHT_ON : glcd_ll.h
  • BITBAND_PERI : bitband.c
  • BITBAND_PERI_BASE : bitband.c
  • BITBAND_PERI_ClearBit : bitband.c
  • BITBAND_PERI_GetBit : bitband.c
  • BITBAND_PERI_REF : bitband.c
  • BITBAND_PERI_SetBit : bitband.c
  • BITBAND_SRAM : bitband.c
  • BITBAND_SRAM_BASE : bitband.c
  • BITBAND_SRAM_ClearBit : bitband.c
  • BITBAND_SRAM_GetBit : bitband.c
  • BITBAND_SRAM_REF : bitband.c
  • BITBAND_SRAM_SetBit : bitband.c
  • Black : GLCD.h
  • BLINK_LED_PIN : emactest.c
  • Blue : GLCD.h
  • BOOTP_BROADCAST : dhcpc.c
  • BOUNCE_RX : emactest.c
  • BPP : GLCD_SPI_LPC1700.c
  • BSY : GLCD_SPI_LPC1700.c
  • BUF : uip.c , main.c , uip-fw.c , uip-split.c , uip_arp.c
  • BUF_FOUND : psock.c
  • BUF_FULL : psock.c
  • BUF_NOT_FOUND : psock.c
  • BUF_NOT_FULL : psock.c
  • BUFFER_SIZE : microwire_test.c , spi_master.c , i2c_monitor.c , i2s_irq_test.c , ti_test.c , spi_slave.c , slave.c , i2s_dma_test.c , ssp_slave.c , i2c_master_slave_int_test.c , master.c , spi_loopback_test.c , i2s_mclk.c , ssp_master.c , i2s_test_4_wire.c , i2s_polling.c
  • BYPP : GLCD_SPI_LPC1700.c
Generated on Tue Jun 7 15:00:16 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Data Fields

  • All
  • Functions
  • Variables
  • Typedefs
  • Enumerations
  • Enumerator
  • Defines
  • _
  • a
  • b
  • c
  • d
  • e
  • f
  • g
  • h
  • i
  • k
  • l
  • m
  • n
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  • p
  • q
  • r
  • s
  • t
  • u
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  • w
  • x
  • y

- c -

  • CAN1_CTRL : lpc17xx_can.h
  • CAN1SLEEPCLR : lpc17xx_can.h
  • CAN2_CTRL : lpc17xx_can.h
  • CAN2SLEEPCLR : lpc17xx_can.h
  • CAN_AFMR_AccBP : lpc17xx_can.h
  • CAN_AFMR_AccOff : lpc17xx_can.h
  • CAN_AFMR_eFCAN : lpc17xx_can.h
  • CAN_BTR_BRP : lpc17xx_can.h
  • CAN_BTR_SAM : lpc17xx_can.h
  • CAN_BTR_SJM : lpc17xx_can.h
  • CAN_BTR_TESG1 : lpc17xx_can.h
  • CAN_BTR_TESG2 : lpc17xx_can.h
  • CAN_CMR_AT : lpc17xx_can.h
  • CAN_CMR_CDO : lpc17xx_can.h
  • CAN_CMR_RRB : lpc17xx_can.h
  • CAN_CMR_SRR : lpc17xx_can.h
  • CAN_CMR_STB1 : lpc17xx_can.h
  • CAN_CMR_STB2 : lpc17xx_can.h
  • CAN_CMR_STB3 : lpc17xx_can.h
  • CAN_CMR_TR : lpc17xx_can.h
  • CAN_Eff_GRP_sa : lpc17xx_can.h
  • CAN_EFF_sa : lpc17xx_can.h
  • CAN_EndofTable : lpc17xx_can.h
  • CAN_EWL_EWL : lpc17xx_can.h
  • CAN_FCANIC0_IntPnd : lpc17xx_can.h
  • CAN_FCANIC1_IntPnd : lpc17xx_can.h
  • CAN_FCANIE : lpc17xx_can.h
  • CAN_GSR_BS : lpc17xx_can.h
  • CAN_GSR_DOS : lpc17xx_can.h
  • CAN_GSR_ES : lpc17xx_can.h
  • CAN_GSR_RBS : lpc17xx_can.h
  • CAN_GSR_RS : lpc17xx_can.h
  • CAN_GSR_RXERR : lpc17xx_can.h
  • CAN_GSR_TBS : lpc17xx_can.h
  • CAN_GSR_TCS : lpc17xx_can.h
  • CAN_GSR_TS : lpc17xx_can.h
  • CAN_GSR_TXERR : lpc17xx_can.h
  • CAN_ICR_ALCBIT : lpc17xx_can.h
  • CAN_ICR_ALI : lpc17xx_can.h
  • CAN_ICR_BEI : lpc17xx_can.h
  • CAN_ICR_DOI : lpc17xx_can.h
  • CAN_ICR_EI : lpc17xx_can.h
  • CAN_ICR_EPI : lpc17xx_can.h
  • CAN_ICR_ERRBIT : lpc17xx_can.h
  • CAN_ICR_ERRC : lpc17xx_can.h
  • CAN_ICR_ERRDIR : lpc17xx_can.h
  • CAN_ICR_IDI : lpc17xx_can.h
  • CAN_ICR_RI : lpc17xx_can.h
  • CAN_ICR_TI1 : lpc17xx_can.h
  • CAN_ICR_TI2 : lpc17xx_can.h
  • CAN_ICR_TI3 : lpc17xx_can.h
  • CAN_ICR_WUI : lpc17xx_can.h
  • CAN_IER_ALIE : lpc17xx_can.h
  • CAN_IER_BEIE : lpc17xx_can.h
  • CAN_IER_DOIE : lpc17xx_can.h
  • CAN_IER_EIE : lpc17xx_can.h
  • CAN_IER_EPIE : lpc17xx_can.h
  • CAN_IER_IDIE : lpc17xx_can.h
  • CAN_IER_RIE : lpc17xx_can.h
  • CAN_IER_TIE1 : lpc17xx_can.h
  • CAN_IER_TIE2 : lpc17xx_can.h
  • CAN_IER_TIE3 : lpc17xx_can.h
  • CAN_IER_WUIE : lpc17xx_can.h
  • CAN_LUTerr : lpc17xx_can.h
  • CAN_LUTerrAd : lpc17xx_can.h
  • CAN_MOD_LOM : lpc17xx_can.h
  • CAN_MOD_RM : lpc17xx_can.h
  • CAN_MOD_RPM : lpc17xx_can.h
  • CAN_MOD_SM : lpc17xx_can.h
  • CAN_MOD_STM : lpc17xx_can.h
  • CAN_MOD_TM : lpc17xx_can.h
  • CAN_MOD_TPM : lpc17xx_can.h
  • CAN_MSR_BS1 : lpc17xx_can.h
  • CAN_MSR_BS2 : lpc17xx_can.h
  • CAN_MSR_E1 : lpc17xx_can.h
  • CAN_MSR_E2 : lpc17xx_can.h
  • CAN_RDA_DATA1 : lpc17xx_can.h
  • CAN_RDA_DATA2 : lpc17xx_can.h
  • CAN_RDA_DATA3 : lpc17xx_can.h
  • CAN_RDA_DATA4 : lpc17xx_can.h
  • CAN_RDB_DATA5 : lpc17xx_can.h
  • CAN_RDB_DATA6 : lpc17xx_can.h
  • CAN_RDB_DATA7 : lpc17xx_can.h
  • CAN_RDB_DATA8 : lpc17xx_can.h
  • CAN_RECEIVE : can_test_two_kit.c
  • CAN_RFS_BP : lpc17xx_can.h
  • CAN_RFS_DLC : lpc17xx_can.h
  • CAN_RFS_FF : lpc17xx_can.h
  • CAN_RFS_ID_INDEX : lpc17xx_can.h
  • CAN_RFS_RTR : lpc17xx_can.h
  • CAN_RID_ID_11 : lpc17xx_can.h
  • CAN_RID_ID_29 : lpc17xx_can.h
  • CAN_RSR_DOS1 : lpc17xx_can.h
  • CAN_RSR_DOS2 : lpc17xx_can.h
  • CAN_RSR_RB1 : lpc17xx_can.h
  • CAN_RSR_RB2 : lpc17xx_can.h
  • CAN_RSR_RS1 : lpc17xx_can.h
  • CAN_RSR_RS2 : lpc17xx_can.h
  • CAN_RX_MSG_CNT : can_test_aflut.c
  • CAN_SFF_GRP_sa : lpc17xx_can.h
  • CAN_SR_BS : lpc17xx_can.h
  • CAN_SR_DOS : lpc17xx_can.h
  • CAN_SR_ES : lpc17xx_can.h
  • CAN_SR_RBS : lpc17xx_can.h
  • CAN_SR_RS : lpc17xx_can.h
  • CAN_SR_TBS1 : lpc17xx_can.h
  • CAN_SR_TBS2 : lpc17xx_can.h
  • CAN_SR_TBS3 : lpc17xx_can.h
  • CAN_SR_TCS1 : lpc17xx_can.h
  • CAN_SR_TCS2 : lpc17xx_can.h
  • CAN_SR_TCS3 : lpc17xx_can.h
  • CAN_SR_TS1 : lpc17xx_can.h
  • CAN_SR_TS2 : lpc17xx_can.h
  • CAN_SR_TS3 : lpc17xx_can.h
  • CAN_STT_sa : lpc17xx_can.h
  • CAN_TDA_DATA1 : lpc17xx_can.h
  • CAN_TDA_DATA2 : lpc17xx_can.h
  • CAN_TDA_DATA3 : lpc17xx_can.h
  • CAN_TDA_DATA4 : lpc17xx_can.h
  • CAN_TDA_DATA5 : lpc17xx_can.h
  • CAN_TDA_DATA6 : lpc17xx_can.h
  • CAN_TDA_DATA7 : lpc17xx_can.h
  • CAN_TDA_DATA8 : lpc17xx_can.h
  • CAN_TFI_DLC : lpc17xx_can.h
  • CAN_TFI_FF : lpc17xx_can.h
  • CAN_TFI_PRIO : lpc17xx_can.h
  • CAN_TFI_RTR : lpc17xx_can.h
  • CAN_TID_ID11 : lpc17xx_can.h
  • CAN_TID_ID29 : lpc17xx_can.h
  • CAN_TRANSMIT : can_test_two_kit.c
  • CAN_TSR_TBS1 : lpc17xx_can.h
  • CAN_TSR_TBS2 : lpc17xx_can.h
  • CAN_TSR_TCS1 : lpc17xx_can.h
  • CAN_TSR_TCS2 : lpc17xx_can.h
  • CAN_TSR_TS1 : lpc17xx_can.h
  • CAN_TSR_TS2 : lpc17xx_can.h
  • CAN_TX_MSG_CNT : can_test_aflut.c
  • CAN_WAKEFLAGES_CAN1WAKE : lpc17xx_can.h
  • CAN_WAKEFLAGES_CAN2WAKE : lpc17xx_can.h
  • CAP_MODE : qei_test_velo.c
  • CAP_PERIOD : qei_test_velo.c
  • CAPTURE_MODE_TEST : mcpwm_simple.c
  • CCEMTY_INT : usbreg.h
  • CCLK : memory.h
  • CCLKCFG_Val : system_LPC17xx.c
  • CDC_ABSTRACT_CONTROL_MANAGEMENT : cdc.h
  • CDC_ABSTRACT_CONTROL_MODEL : cdc.h
  • CDC_ABSTRACT_STATE : cdc.h
  • CDC_ACTIVATE_CARRIER : cdc.h
  • CDC_ATM_NETWORKING : cdc.h
  • CDC_ATM_NETWORKING_CONTROL_MODEL : cdc.h
  • CDC_AUX_JACK_HOOK_STATE : cdc.h
  • CDC_BUF_COUNT : cdcuser.c
  • CDC_BUF_EMPTY : cdcuser.c
  • CDC_BUF_FULL : cdcuser.c
  • CDC_BUF_MASK : cdcuser.c
  • CDC_BUF_RD : cdcuser.c
  • CDC_BUF_RESET : cdcuser.c
  • CDC_BUF_SIZE : cdcuser.c
  • CDC_BUF_WR : cdcuser.c
  • CDC_CALL_MANAGEMENT : cdc.h
  • CDC_CALL_STATE_CHANGE : cdc.h
  • CDC_CAPI_CONTROL_MANAGEMENT : cdc.h
  • CDC_CAPI_CONTROL_MODEL : cdc.h
  • CDC_CEP_IN : cdcuser.h
  • CDC_CLEAR_COMM_FEATURE : cdc.h
  • CDC_CLEAR_UNIT_PARAMETER : cdc.h
  • CDC_COMMUNICATION_INTERFACE_CLASS : cdc.h
  • CDC_CONNECTION_SPEED_CHANGE : cdc.h
  • CDC_COUNTRY_SELECTION : cdc.h
  • CDC_COUNTRY_SETTING : cdc.h
  • CDC_CS_ENDPOINT : cdc.h
  • CDC_CS_INTERFACE : cdc.h
  • CDC_DATA_INTERFACE_CLASS : cdc.h
  • CDC_DATA_MULTPLEXED_STATE : cdc.h
  • CDC_DEP_IN : cdcuser.h
  • CDC_DEP_OUT : cdcuser.h
  • CDC_DIAL_DIGITS : cdc.h
  • CDC_DIRECT_LINE_CONTROL_MODEL : cdc.h
  • CDC_DIRECT_LINE_MANAGEMENT : cdc.h
  • CDC_DTE_PRESENT : cdc.h
  • CDC_ETHERNET_NETWORKING : cdc.h
  • CDC_ETHERNET_NETWORKING_CONTROL_MODEL : cdc.h
  • CDC_EXTENSION_UNIT : cdc.h
  • CDC_GET_ATM_DEVICE_STATISTICS : cdc.h
  • CDC_GET_ATM_VC_STATISTICS : cdc.h
  • CDC_GET_COMM_FEATURE : cdc.h
  • CDC_GET_ENCAPSULATED_RESPONSE : cdc.h
  • CDC_GET_ETHERNET_PMP_FILTER : cdc.h
  • CDC_GET_ETHERNET_STATISTIC : cdc.h
  • CDC_GET_LINE_CODING : cdc.h
  • CDC_GET_LINE_PARMS : cdc.h
  • CDC_GET_OPERATION_PARMS : cdc.h
  • CDC_GET_PROFILE : cdc.h
  • CDC_GET_RINGER_PARMS : cdc.h
  • CDC_GET_UNIT_PARAMETER : cdc.h
  • CDC_HEADER : cdc.h
  • CDC_IDLE_SETTING : cdc.h
  • CDC_LINE_STATE_CHANGE : cdc.h
  • CDC_MULTI_CHANNEL_CONTROL_MODEL : cdc.h
  • CDC_MULTI_CHANNEL_MANAGEMENT : cdc.h
  • CDC_NETWORK_CHANNEL : cdc.h
  • CDC_NOTIFICATION_NETWORK_CONNECTION : cdc.h
  • CDC_NOTIFICATION_SERIAL_STATE : cdc.h
  • CDC_PROTOCOL_CAPI : cdc.h
  • CDC_PROTOCOL_COMMON_AT_COMMANDS : cdc.h
  • CDC_PROTOCOL_DESCRIBED_IN_PUFD : cdc.h
  • CDC_PROTOCOL_EURO_ISDN : cdc.h
  • CDC_PROTOCOL_HDLC : cdc.h
  • CDC_PROTOCOL_HOST_BASED_DRIVER : cdc.h
  • CDC_PROTOCOL_ISDN_BRI : cdc.h
  • CDC_PROTOCOL_Q921_DATA_LINK : cdc.h
  • CDC_PROTOCOL_Q921_MANAGEMENT : cdc.h
  • CDC_PROTOCOL_Q921_MULTIPLEXOR : cdc.h
  • CDC_PROTOCOL_TRANSPARENT : cdc.h
  • CDC_PROTOCOL_UNIT : cdc.h
  • CDC_PROTOCOL_V24_RATE_ADAPTATION : cdc.h
  • CDC_PROTOCOL_V42 : cdc.h
  • CDC_PULSE_SETUP : cdc.h
  • CDC_REPORTING_CAPABILITIES : cdc.h
  • CDC_RESPONSE_AVAILABLE : cdc.h
  • CDC_RING_AUX_JACK : cdc.h
  • CDC_RING_DETECT : cdc.h
  • CDC_SEND_BREAK : cdc.h
  • CDC_SEND_ENCAPSULATED_COMMAND : cdc.h
  • CDC_SEND_PULSE : cdc.h
  • CDC_SERIAL_STATE_BREAK : cdc.h
  • CDC_SERIAL_STATE_FRAMING : cdc.h
  • CDC_SERIAL_STATE_OVERRUN : cdc.h
  • CDC_SERIAL_STATE_PARITY : cdc.h
  • CDC_SERIAL_STATE_RING : cdc.h
  • CDC_SERIAL_STATE_RX_CARRIER : cdc.h
  • CDC_SERIAL_STATE_TX_CARRIER : cdc.h
  • CDC_SET_ATM_DATA_FORMAT : cdc.h
  • CDC_SET_ATM_DEFAULT_VC : cdc.h
  • CDC_SET_AUX_LINE_STATE : cdc.h
  • CDC_SET_COMM_FEATURE : cdc.h
  • CDC_SET_CONTROL_LINE_STATE : cdc.h
  • CDC_SET_ETHERNET_MULTICAST_FILTERS : cdc.h
  • CDC_SET_ETHERNET_PACKET_FILTER : cdc.h
  • CDC_SET_ETHERNET_PMP_FILTER : cdc.h
  • CDC_SET_HOOK_STATE : cdc.h
  • CDC_SET_LINE_CODING : cdc.h
  • CDC_SET_LINE_PARMS : cdc.h
  • CDC_SET_OPERATION_PARMS : cdc.h
  • CDC_SET_PULSE_TIME : cdc.h
  • CDC_SET_RINGER_PARMS : cdc.h
  • CDC_SET_UNIT_PARAMETER : cdc.h
  • CDC_TELEPHONE_CONTROL_MODEL : cdc.h
  • CDC_TELEPHONE_OPERATIONAL_MODES : cdc.h
  • CDC_TELEPHONE_RINGER : cdc.h
  • CDC_UNION : cdc.h
  • CDC_USB_TERMINAL : cdc.h
  • CDC_V1_10 : cdc.h
  • CDFULL_INT : usbreg.h
  • CHAR_H : Font_24x16.h
  • CHAR_W : Font_24x16.h
  • CHECK_PARAM : lpc17xx_libcfg_default.h , lpc17xx_libcfg.h
  • CHECK_RANGE : system_LPC17xx.c
  • CHECK_RSVD : system_LPC17xx.c
  • CLKOUTCFG_Val : system_LPC17xx.c
  • CLKPWR_CCLKCFG_BITMASK : lpc17xx_clkpwr.h
  • CLKPWR_CLKOUTCFG_BITMASK : lpc17xx_clkpwr.h
  • CLKPWR_CLKOUTCFG_CLKOUT_ACT : lpc17xx_clkpwr.h
  • CLKPWR_CLKOUTCFG_CLKOUT_EN : lpc17xx_clkpwr.h
  • CLKPWR_CLKOUTCFG_CLKOUTDIV : lpc17xx_clkpwr.h
  • CLKPWR_CLKOUTCFG_CLKOUTSEL_CPU : lpc17xx_clkpwr.h
  • CLKPWR_CLKOUTCFG_CLKOUTSEL_MAINOSC : lpc17xx_clkpwr.h
  • CLKPWR_CLKOUTCFG_CLKOUTSEL_RC : lpc17xx_clkpwr.h
  • CLKPWR_CLKOUTCFG_CLKOUTSEL_RTC : lpc17xx_clkpwr.h
  • CLKPWR_CLKOUTCFG_CLKOUTSEL_USB : lpc17xx_clkpwr.h
  • CLKPWR_CLKSRCSEL_BITMASK : lpc17xx_clkpwr.h
  • CLKPWR_CLKSRCSEL_CLKSRC_IRC : lpc17xx_clkpwr.h
  • CLKPWR_CLKSRCSEL_CLKSRC_MAINOSC : lpc17xx_clkpwr.h
  • CLKPWR_CLKSRCSEL_CLKSRC_RTC : lpc17xx_clkpwr.h
  • CLKPWR_IRCTRIM_BITMASK : lpc17xx_clkpwr.h
  • CLKPWR_PCLKSEL0_BITMASK : lpc17xx_clkpwr.h
  • CLKPWR_PCLKSEL1_BITMASK : lpc17xx_clkpwr.h
  • CLKPWR_PCLKSEL_ACF : lpc17xx_clkpwr.h
  • CLKPWR_PCLKSEL_ADC : lpc17xx_clkpwr.h
  • CLKPWR_PCLKSEL_BITMASK : lpc17xx_clkpwr.h
  • CLKPWR_PCLKSEL_CAN1 : lpc17xx_clkpwr.h
  • CLKPWR_PCLKSEL_CAN2 : lpc17xx_clkpwr.h
  • CLKPWR_PCLKSEL_CCLK_DIV_1 : lpc17xx_clkpwr.h
  • CLKPWR_PCLKSEL_CCLK_DIV_2 : lpc17xx_clkpwr.h
  • CLKPWR_PCLKSEL_CCLK_DIV_4 : lpc17xx_clkpwr.h
  • CLKPWR_PCLKSEL_DAC : lpc17xx_clkpwr.h
  • CLKPWR_PCLKSEL_GET : lpc17xx_clkpwr.h
  • CLKPWR_PCLKSEL_I2C0 : lpc17xx_clkpwr.h
  • CLKPWR_PCLKSEL_I2C1 : lpc17xx_clkpwr.h
  • CLKPWR_PCLKSEL_I2C2 : lpc17xx_clkpwr.h
  • CLKPWR_PCLKSEL_I2S : lpc17xx_clkpwr.h
  • CLKPWR_PCLKSEL_MC : lpc17xx_clkpwr.h
  • CLKPWR_PCLKSEL_PCB : lpc17xx_clkpwr.h
  • CLKPWR_PCLKSEL_PWM1 : lpc17xx_clkpwr.h
  • CLKPWR_PCLKSEL_QEI : lpc17xx_clkpwr.h
  • CLKPWR_PCLKSEL_RIT : lpc17xx_clkpwr.h
  • CLKPWR_PCLKSEL_SET : lpc17xx_clkpwr.h
  • CLKPWR_PCLKSEL_SPI : lpc17xx_clkpwr.h
  • CLKPWR_PCLKSEL_SSP0 : lpc17xx_clkpwr.h
  • CLKPWR_PCLKSEL_SSP1 : lpc17xx_clkpwr.h
  • CLKPWR_PCLKSEL_SYSCON : lpc17xx_clkpwr.h
  • CLKPWR_PCLKSEL_TIMER0 : lpc17xx_clkpwr.h
  • CLKPWR_PCLKSEL_TIMER1 : lpc17xx_clkpwr.h
  • CLKPWR_PCLKSEL_TIMER2 : lpc17xx_clkpwr.h
  • CLKPWR_PCLKSEL_TIMER3 : lpc17xx_clkpwr.h
  • CLKPWR_PCLKSEL_UART0 : lpc17xx_clkpwr.h
  • CLKPWR_PCLKSEL_UART1 : lpc17xx_clkpwr.h
  • CLKPWR_PCLKSEL_UART2 : lpc17xx_clkpwr.h
  • CLKPWR_PCLKSEL_UART3 : lpc17xx_clkpwr.h
  • CLKPWR_PCLKSEL_WDT : lpc17xx_clkpwr.h
  • CLKPWR_PCON_BODPDM : lpc17xx_clkpwr.h
  • CLKPWR_PCON_BOGD : lpc17xx_clkpwr.h
  • CLKPWR_PCON_BORD : lpc17xx_clkpwr.h
  • CLKPWR_PCON_DPDFLAG : lpc17xx_clkpwr.h
  • CLKPWR_PCON_DSFLAG : lpc17xx_clkpwr.h
  • CLKPWR_PCON_PDFLAG : lpc17xx_clkpwr.h
  • CLKPWR_PCON_PM0 : lpc17xx_clkpwr.h
  • CLKPWR_PCON_PM1 : lpc17xx_clkpwr.h
  • CLKPWR_PCON_SMFLAG : lpc17xx_clkpwr.h
  • CLKPWR_PCONP_BITMASK : lpc17xx_clkpwr.h
  • CLKPWR_PCONP_PCAD : lpc17xx_clkpwr.h
  • CLKPWR_PCONP_PCAN1 : lpc17xx_clkpwr.h
  • CLKPWR_PCONP_PCAN2 : lpc17xx_clkpwr.h
  • CLKPWR_PCONP_PCENET : lpc17xx_clkpwr.h
  • CLKPWR_PCONP_PCGPDMA : lpc17xx_clkpwr.h
  • CLKPWR_PCONP_PCGPIO : lpc17xx_clkpwr.h
  • CLKPWR_PCONP_PCI2C0 : lpc17xx_clkpwr.h
  • CLKPWR_PCONP_PCI2C1 : lpc17xx_clkpwr.h
  • CLKPWR_PCONP_PCI2C2 : lpc17xx_clkpwr.h
  • CLKPWR_PCONP_PCI2S : lpc17xx_clkpwr.h
  • CLKPWR_PCONP_PCMC : lpc17xx_clkpwr.h
  • CLKPWR_PCONP_PCPWM1 : lpc17xx_clkpwr.h
  • CLKPWR_PCONP_PCQEI : lpc17xx_clkpwr.h
  • CLKPWR_PCONP_PCRIT : lpc17xx_clkpwr.h
  • CLKPWR_PCONP_PCRTC : lpc17xx_clkpwr.h
  • CLKPWR_PCONP_PCSPI : lpc17xx_clkpwr.h
  • CLKPWR_PCONP_PCSSP0 : lpc17xx_clkpwr.h
  • CLKPWR_PCONP_PCSSP1 : lpc17xx_clkpwr.h
  • CLKPWR_PCONP_PCTIM0 : lpc17xx_clkpwr.h
  • CLKPWR_PCONP_PCTIM1 : lpc17xx_clkpwr.h
  • CLKPWR_PCONP_PCTIM2 : lpc17xx_clkpwr.h
  • CLKPWR_PCONP_PCTIM3 : lpc17xx_clkpwr.h
  • CLKPWR_PCONP_PCUART0 : lpc17xx_clkpwr.h
  • CLKPWR_PCONP_PCUART1 : lpc17xx_clkpwr.h
  • CLKPWR_PCONP_PCUART2 : lpc17xx_clkpwr.h
  • CLKPWR_PCONP_PCUART3 : lpc17xx_clkpwr.h
  • CLKPWR_PCONP_PCUSB : lpc17xx_clkpwr.h
  • CLKPWR_PLL0CFG_BITMASK : lpc17xx_clkpwr.h
  • CLKPWR_PLL0CFG_MSEL : lpc17xx_clkpwr.h
  • CLKPWR_PLL0CFG_NSEL : lpc17xx_clkpwr.h
  • CLKPWR_PLL0CON_BITMASK : lpc17xx_clkpwr.h
  • CLKPWR_PLL0CON_CONNECT : lpc17xx_clkpwr.h
  • CLKPWR_PLL0CON_ENABLE : lpc17xx_clkpwr.h
  • CLKPWR_PLL0FEED_BITMASK : lpc17xx_clkpwr.h
  • CLKPWR_PLL0STAT_MSEL : lpc17xx_clkpwr.h
  • CLKPWR_PLL0STAT_NSEL : lpc17xx_clkpwr.h
  • CLKPWR_PLL0STAT_PLLC : lpc17xx_clkpwr.h
  • CLKPWR_PLL0STAT_PLLE : lpc17xx_clkpwr.h
  • CLKPWR_PLL0STAT_PLOCK : lpc17xx_clkpwr.h
  • CLKPWR_PLL1CFG_BITMASK : lpc17xx_clkpwr.h
  • CLKPWR_PLL1CFG_MSEL : lpc17xx_clkpwr.h
  • CLKPWR_PLL1CFG_PSEL : lpc17xx_clkpwr.h
  • CLKPWR_PLL1CON_BITMASK : lpc17xx_clkpwr.h
  • CLKPWR_PLL1CON_CONNECT : lpc17xx_clkpwr.h
  • CLKPWR_PLL1CON_ENABLE : lpc17xx_clkpwr.h
  • CLKPWR_PLL1FEED_BITMASK : lpc17xx_clkpwr.h
  • CLKPWR_PLL1STAT_MSEL : lpc17xx_clkpwr.h
  • CLKPWR_PLL1STAT_PLLC : lpc17xx_clkpwr.h
  • CLKPWR_PLL1STAT_PLLE : lpc17xx_clkpwr.h
  • CLKPWR_PLL1STAT_PLOCK : lpc17xx_clkpwr.h
  • CLKPWR_PLL1STAT_PSEL : lpc17xx_clkpwr.h
  • CLKPWR_USBCLKCFG_BITMASK : lpc17xx_clkpwr.h
  • CLKSOURCE_CPU : lpc17xx_systick.h
  • CLKSOURCE_EXT : lpc17xx_systick.h
  • CLKSRCSEL_Val : system_LPC17xx.c
  • CLOCK_CONF_SECOND : clock-arch.h
  • CLOCK_SECOND : clock.h
  • CLOCK_SETUP : system_LPC17xx.c
  • CLR_BUF_PO : usbreg.h
  • CMD0_GO_IDLE_STATE : spi_sdcard.c
  • CMD10_SEND_CID : spi_sdcard.c
  • CMD12_STOP_TRANSMISSION : spi_sdcard.c
  • CMD13_SEND_STATUS : spi_sdcard.c
  • CMD16_SET_BLOCKLEN : spi_sdcard.c
  • CMD17_READ_SINGLE_BLOCK : spi_sdcard.c
  • CMD18_READ_MULTIPLE_BLOCK : spi_sdcard.c
  • CMD1_SEND_OPCOND : spi_sdcard.c
  • CMD24_WRITE_BLOCK : spi_sdcard.c
  • CMD25_WRITE_MULTIPLE_BLOCK : spi_sdcard.c
  • CMD27_PROGRAM_CSD : spi_sdcard.c
  • CMD28_SET_WRITE_PROT : spi_sdcard.c
  • CMD29_CLR_WRITE_PROT : spi_sdcard.c
  • CMD30_SEND_WRITE_PROT : spi_sdcard.c
  • CMD32_ERASE_WR_BLK_START_ADDR : spi_sdcard.c
  • CMD33_ERASE_WR_BLK_END_ADDR : spi_sdcard.c
  • CMD38_ERASE : spi_sdcard.c
  • CMD55_APP_CMD : spi_sdcard.c
  • CMD56_GEN_CMD : spi_sdcard.c
  • CMD58_READ_OCR : spi_sdcard.c
  • CMD59_CRC_ON_OFF : spi_sdcard.c
  • CMD9_SEND_CSD : spi_sdcard.c
  • CMD_CFG_DEV : usbreg.h
  • CMD_CLR_BUF : usbreg.h
  • CMD_GET_DEV_STAT : usbreg.h
  • CMD_GET_ERR_CODE : usbreg.h
  • CMD_RD_ERR_STAT : usbreg.h
  • CMD_RD_FRAME : usbreg.h
  • CMD_RD_TEST : usbreg.h
  • CMD_SEL_EP : usbreg.h
  • CMD_SEL_EP_CLRI : usbreg.h
  • CMD_SET_ADDR : usbreg.h
  • CMD_SET_DEV_STAT : usbreg.h
  • CMD_SET_EP_STAT : usbreg.h
  • CMD_SET_MODE : usbreg.h
  • CMD_VALID_BUF : usbreg.h
  • CONF_DVICE : usbreg.h
  • CoreDebug : core_cm3.h
  • CoreDebug_BASE : core_cm3.h
  • CoreDebug_DCRSR_REGSEL_Msk : core_cm3.h
  • CoreDebug_DCRSR_REGSEL_Pos : core_cm3.h
  • CoreDebug_DCRSR_REGWnR_Msk : core_cm3.h
  • CoreDebug_DCRSR_REGWnR_Pos : core_cm3.h
  • CoreDebug_DEMCR_MON_EN_Msk : core_cm3.h
  • CoreDebug_DEMCR_MON_EN_Pos : core_cm3.h
  • CoreDebug_DEMCR_MON_PEND_Msk : core_cm3.h
  • CoreDebug_DEMCR_MON_PEND_Pos : core_cm3.h
  • CoreDebug_DEMCR_MON_REQ_Msk : core_cm3.h
  • CoreDebug_DEMCR_MON_REQ_Pos : core_cm3.h
  • CoreDebug_DEMCR_MON_STEP_Msk : core_cm3.h
  • CoreDebug_DEMCR_MON_STEP_Pos : core_cm3.h
  • CoreDebug_DEMCR_TRCENA_Msk : core_cm3.h
  • CoreDebug_DEMCR_TRCENA_Pos : core_cm3.h
  • CoreDebug_DEMCR_VC_BUSERR_Msk : core_cm3.h
  • CoreDebug_DEMCR_VC_BUSERR_Pos : core_cm3.h
  • CoreDebug_DEMCR_VC_CHKERR_Msk : core_cm3.h
  • CoreDebug_DEMCR_VC_CHKERR_Pos : core_cm3.h
  • CoreDebug_DEMCR_VC_CORERESET_Msk : core_cm3.h
  • CoreDebug_DEMCR_VC_CORERESET_Pos : core_cm3.h
  • CoreDebug_DEMCR_VC_HARDERR_Msk : core_cm3.h
  • CoreDebug_DEMCR_VC_HARDERR_Pos : core_cm3.h
  • CoreDebug_DEMCR_VC_INTERR_Msk : core_cm3.h
  • CoreDebug_DEMCR_VC_INTERR_Pos : core_cm3.h
  • CoreDebug_DEMCR_VC_MMERR_Msk : core_cm3.h
  • CoreDebug_DEMCR_VC_MMERR_Pos : core_cm3.h
  • CoreDebug_DEMCR_VC_NOCPERR_Msk : core_cm3.h
  • CoreDebug_DEMCR_VC_NOCPERR_Pos : core_cm3.h
  • CoreDebug_DEMCR_VC_STATERR_Msk : core_cm3.h
  • CoreDebug_DEMCR_VC_STATERR_Pos : core_cm3.h
  • CoreDebug_DHCSR_C_DEBUGEN_Msk : core_cm3.h
  • CoreDebug_DHCSR_C_DEBUGEN_Pos : core_cm3.h
  • CoreDebug_DHCSR_C_HALT_Msk : core_cm3.h
  • CoreDebug_DHCSR_C_HALT_Pos : core_cm3.h
  • CoreDebug_DHCSR_C_MASKINTS_Msk : core_cm3.h
  • CoreDebug_DHCSR_C_MASKINTS_Pos : core_cm3.h
  • CoreDebug_DHCSR_C_SNAPSTALL_Msk : core_cm3.h
  • CoreDebug_DHCSR_C_SNAPSTALL_Pos : core_cm3.h
  • CoreDebug_DHCSR_C_STEP_Msk : core_cm3.h
  • CoreDebug_DHCSR_C_STEP_Pos : core_cm3.h
  • CoreDebug_DHCSR_DBGKEY_Msk : core_cm3.h
  • CoreDebug_DHCSR_DBGKEY_Pos : core_cm3.h
  • CoreDebug_DHCSR_S_HALT_Msk : core_cm3.h
  • CoreDebug_DHCSR_S_HALT_Pos : core_cm3.h
  • CoreDebug_DHCSR_S_LOCKUP_Msk : core_cm3.h
  • CoreDebug_DHCSR_S_LOCKUP_Pos : core_cm3.h
  • CoreDebug_DHCSR_S_REGRDY_Msk : core_cm3.h
  • CoreDebug_DHCSR_S_REGRDY_Pos : core_cm3.h
  • CoreDebug_DHCSR_S_RESET_ST_Msk : core_cm3.h
  • CoreDebug_DHCSR_S_RESET_ST_Pos : core_cm3.h
  • CoreDebug_DHCSR_S_RETIRE_ST_Msk : core_cm3.h
  • CoreDebug_DHCSR_S_RETIRE_ST_Pos : core_cm3.h
  • CoreDebug_DHCSR_S_SLEEP_Msk : core_cm3.h
  • CoreDebug_DHCSR_S_SLEEP_Pos : core_cm3.h
  • COUNT_MODE : qei_test_velo.c
  • CR : Serial.c
  • CS_PIN_NUM : spi_sdcard.c , spi_interrupt_test.c , sc16is750_polling.c , sc16is750_int.c , spi_master.c , spi_loopback_test.c , spi_polling_test.c
  • CS_PORT_NUM : spi_polling_test.c , spi_sdcard.c , sc16is750_int.c , spi_loopback_test.c , spi_interrupt_test.c , sc16is750_polling.c , spi_master.c
  • CSW_CMD_FAILED : msc.h
  • CSW_CMD_PASSED : msc.h
  • CSW_PHASE_ERROR : msc.h
  • CTRL_RD_EN : usbreg.h
  • CTRL_WR_EN : usbreg.h
  • Cyan : GLCD.h
Generated on Tue Jun 7 15:00:16 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Data Fields

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- d -

  • DAC_BIAS_EN : lpc17xx_dac.h
  • DAC_CCNT_VALUE : lpc17xx_dac.h
  • DAC_CNT_ENA : lpc17xx_dac.h
  • DAC_DACCTRL_MASK : lpc17xx_dac.h
  • DAC_DBLBUF_ENA : lpc17xx_dac.h
  • DAC_DMA_ENA : lpc17xx_dac.h
  • DAC_GENERATE_ESCALATOR : dac_wave_generate.c
  • DAC_GENERATE_NONE : dac_wave_generate.c
  • DAC_GENERATE_SINE : dac_wave_generate.c
  • DAC_GENERATE_TRIANGLE : dac_wave_generate.c
  • DAC_VALUE : lpc17xx_dac.h
  • DarkCyan : GLCD.h
  • DarkGreen : GLCD.h
  • DarkGrey : GLCD.h
  • DAT_CLR_BUF : usbreg.h
  • DAT_GET_DEV_STAT : usbreg.h
  • DAT_GET_ERR_CODE : usbreg.h
  • DAT_RD_ERR_STAT : usbreg.h
  • DAT_RD_FRAME : usbreg.h
  • DAT_RD_TEST : usbreg.h
  • DAT_SEL_EP : usbreg.h
  • DAT_SEL_EP_CLRI : usbreg.h
  • DAT_WR_BYTE : usbreg.h
  • DATA_FREQ : usbaudio.h
  • DATA_OFS_MASK : tcpip.h
  • DB : EMAC.c , tcpip.c , emactest.c , emac.c , main.c
  • DC_MODE_TEST : mcpwm_simple.c
  • DD_ISO_ADR : usbhw.h
  • DD_ISO_CNT : usbhw.h
  • DD_ISO_SZ : usbhw.h
  • DD_NISO_ADR : usbhw.h
  • DD_NISO_CNT : usbhw.h
  • DD_NISO_SZ : usbhw.h
  • DD_SZ : usbhw.h
  • DEBUG : lpc17xx_libcfg.h , lpc17xx_libcfg_default.h , lpc17xx_libcfg.h
  • DEBUG_PRINTF : uip.c
  • DEBUG_UART_PORT : debug_frmwrk.h
  • DEF_BACKGND_COLOUR : drv_glcd.h
  • DEF_FONT_COLOUR : drv_glcd.h
  • DEF_X_LEFT : drv_glcd.h
  • DEF_X_RIGHT : drv_glcd.h
  • DEF_Y_DOWN : drv_glcd.h
  • DEF_Y_UP : drv_glcd.h
  • DEFAULT_TTL : tcpip.h
  • DELAY_2N : GLCD_SPI_LPC1700.c
  • DEV_ADDR_MASK : usbreg.h
  • DEV_CON : usbreg.h
  • DEV_CON_CH : usbreg.h
  • DEV_EN : usbreg.h
  • DEV_RST : usbreg.h
  • DEV_STAT_INT : usbreg.h
  • DEV_SUS : usbreg.h
  • DEV_SUS_CH : usbreg.h
  • DHCP_HLEN_ETHERNET : dhcpc.c
  • DHCP_HTYPE_ETHERNET : dhcpc.c
  • DHCP_MSG_LEN : dhcpc.c
  • DHCP_OPTION_DNS_SERVER : dhcpc.c
  • DHCP_OPTION_END : dhcpc.c
  • DHCP_OPTION_LEASE_TIME : dhcpc.c
  • DHCP_OPTION_MSG_TYPE : dhcpc.c
  • DHCP_OPTION_REQ_IPADDR : dhcpc.c
  • DHCP_OPTION_REQ_LIST : dhcpc.c
  • DHCP_OPTION_ROUTER : dhcpc.c
  • DHCP_OPTION_SERVER_ID : dhcpc.c
  • DHCP_OPTION_SUBNET_MASK : dhcpc.c
  • DHCP_REPLY : dhcpc.c
  • DHCP_REQUEST : dhcpc.c
  • DHCPACK : dhcpc.c
  • DHCPC_CLIENT_PORT : dhcpc.c
  • DHCPC_SERVER_PORT : dhcpc.c
  • DHCPDECLINE : dhcpc.c
  • DHCPDISCOVER : dhcpc.c
  • DHCPNAK : dhcpc.c
  • DHCPOFFER : dhcpc.c
  • DHCPRELEASE : dhcpc.c
  • DHCPREQUEST : dhcpc.c
  • DISP_TIME : qei_test_velo.c
  • DMA_BUF_ADR : usbhw.h
  • DMA_BUF_SZ : usbhw.h
  • DMA_DATA_SIZE : ssp_dma.c
  • DMA_DST : i2s_dma_test.c , gpdma_r2r_test.c , gpdma_sleep.c
  • DMA_SIZE : adc_burst_test.c , gpdma_r2r_test.c , i2s_dma_test.c , dac_wave_generate.c , link_list.c , gpdma_sleep.c , dac_dma.c , adc_dma_test.c , dac_sinewave_test.c , flash_2_ram.c
  • DMA_SIZE_SINE : dac_wave_generate.c
  • DMA_SRC : gpdma_r2r_test.c , gpdma_sleep.c , i2s_dma_test.c
  • DMAREQSEL : LPC17xx.h
  • DNS_FLAG1_AUTHORATIVE : resolv.c
  • DNS_FLAG1_OPCODE_INVERSE : resolv.c
  • DNS_FLAG1_OPCODE_STANDARD : resolv.c
  • DNS_FLAG1_OPCODE_STATUS : resolv.c
  • DNS_FLAG1_RD : resolv.c
  • DNS_FLAG1_RESPONSE : resolv.c
  • DNS_FLAG1_TRUNC : resolv.c
  • DNS_FLAG2_ERR_MASK : resolv.c
  • DNS_FLAG2_ERR_NAME : resolv.c
  • DNS_FLAG2_ERR_NONE : resolv.c
  • DNS_FLAG2_RA : resolv.c
Generated on Tue Jun 7 15:00:16 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Data Fields

  • All
  • Functions
  • Variables
  • Typedefs
  • Enumerations
  • Enumerator
  • Defines
  • _
  • a
  • b
  • c
  • d
  • e
  • f
  • g
  • h
  • i
  • k
  • l
  • m
  • n
  • o
  • p
  • q
  • r
  • s
  • t
  • u
  • v
  • w
  • x
  • y

- e -

  • EMAC_ADDR0 : emac.h
  • EMAC_ADDR1 : emac.h
  • EMAC_ADDR12 : emactest.c
  • EMAC_ADDR2 : emac.h
  • EMAC_ADDR3 : emac.h
  • EMAC_ADDR34 : emactest.c
  • EMAC_ADDR4 : emac.h
  • EMAC_ADDR5 : emac.h
  • EMAC_ADDR56 : emactest.c
  • EMAC_CLRT_COLL : lpc17xx_emac.h
  • EMAC_CLRT_DEF : lpc17xx_emac.h
  • EMAC_CLRT_MAX_RETX : lpc17xx_emac.h
  • EMAC_CR_FULL_DUP : lpc17xx_emac.h
  • EMAC_CR_PASS_RUNT_FRM : lpc17xx_emac.h
  • EMAC_CR_PASS_RX_FILT : lpc17xx_emac.h
  • EMAC_CR_REG_RES : lpc17xx_emac.h
  • EMAC_CR_RMII : lpc17xx_emac.h
  • EMAC_CR_RX_EN : lpc17xx_emac.h
  • EMAC_CR_RX_RES : lpc17xx_emac.h
  • EMAC_CR_TX_EN : lpc17xx_emac.h
  • EMAC_CR_TX_FLOW_CTRL : lpc17xx_emac.h
  • EMAC_CR_TX_RES : lpc17xx_emac.h
  • EMAC_DEF_ADR : lpc17xx_emac.h
  • EMAC_DP83848C_ID : lpc17xx_emac.h
  • EMAC_DST_ADDR12 : emactest.c
  • EMAC_DST_ADDR34 : emactest.c
  • EMAC_DST_ADDR56 : emactest.c
  • EMAC_ETH_MAX_FLEN : lpc17xx_emac.h
  • EMAC_FCC_MIRR_CNT : lpc17xx_emac.h
  • EMAC_FCC_PAUSE_TIM : lpc17xx_emac.h
  • EMAC_FCS_MIRR_CNT : lpc17xx_emac.h
  • EMAC_INT_RX_DONE : lpc17xx_emac.h
  • EMAC_INT_RX_ERR : lpc17xx_emac.h
  • EMAC_INT_RX_FIN : lpc17xx_emac.h
  • EMAC_INT_RX_OVERRUN : lpc17xx_emac.h
  • EMAC_INT_SOFT_INT : lpc17xx_emac.h
  • EMAC_INT_TX_DONE : lpc17xx_emac.h
  • EMAC_INT_TX_ERR : lpc17xx_emac.h
  • EMAC_INT_TX_FIN : lpc17xx_emac.h
  • EMAC_INT_TX_UNDERRUN : lpc17xx_emac.h
  • EMAC_INT_WAKEUP : lpc17xx_emac.h
  • EMAC_IPGR_NBBIPG_P1 : lpc17xx_emac.h
  • EMAC_IPGR_NBBIPG_P2 : lpc17xx_emac.h
  • EMAC_IPGR_P1_DEF : lpc17xx_emac.h
  • EMAC_IPGR_P2_DEF : lpc17xx_emac.h
  • EMAC_IPGT_BBIPG : lpc17xx_emac.h
  • EMAC_IPGT_FULL_DUP : lpc17xx_emac.h
  • EMAC_IPGT_HALF_DUP : lpc17xx_emac.h
  • EMAC_MAC1_LOOPB : lpc17xx_emac.h
  • EMAC_MAC1_PASS_ALL : lpc17xx_emac.h
  • EMAC_MAC1_REC_EN : lpc17xx_emac.h
  • EMAC_MAC1_RES_MCS_RX : lpc17xx_emac.h
  • EMAC_MAC1_RES_MCS_TX : lpc17xx_emac.h
  • EMAC_MAC1_RES_RX : lpc17xx_emac.h
  • EMAC_MAC1_RES_TX : lpc17xx_emac.h
  • EMAC_MAC1_RX_FLOWC : lpc17xx_emac.h
  • EMAC_MAC1_SIM_RES : lpc17xx_emac.h
  • EMAC_MAC1_SOFT_RES : lpc17xx_emac.h
  • EMAC_MAC1_TX_FLOWC : lpc17xx_emac.h
  • EMAC_MAC2_ADET_PAD_EN : lpc17xx_emac.h
  • EMAC_MAC2_BACK_PRESSURE : lpc17xx_emac.h
  • EMAC_MAC2_CRC_EN : lpc17xx_emac.h
  • EMAC_MAC2_DLY_CRC : lpc17xx_emac.h
  • EMAC_MAC2_EXCESS_DEF : lpc17xx_emac.h
  • EMAC_MAC2_FRM_LEN_CHK : lpc17xx_emac.h
  • EMAC_MAC2_FULL_DUP : lpc17xx_emac.h
  • EMAC_MAC2_HUGE_FRM_EN : lpc17xx_emac.h
  • EMAC_MAC2_LPREAM_ENF : lpc17xx_emac.h
  • EMAC_MAC2_NO_BACKOFF : lpc17xx_emac.h
  • EMAC_MAC2_PAD_EN : lpc17xx_emac.h
  • EMAC_MAC2_PPREAM_ENF : lpc17xx_emac.h
  • EMAC_MAC2_VLAN_PAD_EN : lpc17xx_emac.h
  • EMAC_MADR_PHY_ADR : lpc17xx_emac.h
  • EMAC_MADR_REG_ADR : lpc17xx_emac.h
  • EMAC_MAX_PACKET_SIZE : emac.h
  • EMAC_MAXF_MAXFRMLEN : lpc17xx_emac.h
  • EMAC_MCFG_CLK_SEL : lpc17xx_emac.h
  • EMAC_MCFG_MII_MAXCLK : lpc17xx_emac.h
  • EMAC_MCFG_RES_MII : lpc17xx_emac.h
  • EMAC_MCFG_SCAN_INC : lpc17xx_emac.h
  • EMAC_MCFG_SUPP_PREAM : lpc17xx_emac.h
  • EMAC_MCMD_READ : lpc17xx_emac.h
  • EMAC_MCMD_SCAN : lpc17xx_emac.h
  • EMAC_MII_RD_TOUT : lpc17xx_emac.h
  • EMAC_MII_WR_TOUT : lpc17xx_emac.h
  • EMAC_MIND_BUSY : lpc17xx_emac.h
  • EMAC_MIND_MII_LINK_FAIL : lpc17xx_emac.h
  • EMAC_MIND_NOT_VAL : lpc17xx_emac.h
  • EMAC_MIND_SCAN : lpc17xx_emac.h
  • EMAC_MODE_100M_FULL : lpc17xx_emac.h
  • EMAC_MODE_100M_HALF : lpc17xx_emac.h
  • EMAC_MODE_10M_FULL : lpc17xx_emac.h
  • EMAC_MODE_10M_HALF : lpc17xx_emac.h
  • EMAC_MODE_AUTO : lpc17xx_emac.h
  • EMAC_MRDD_DATA : lpc17xx_emac.h
  • EMAC_MWTD_DATA : lpc17xx_emac.h
  • EMAC_NUM_RX_FRAG : lpc17xx_emac.h
  • EMAC_NUM_TX_FRAG : lpc17xx_emac.h
  • EMAC_OLD_EMAC_MODULE_ID : lpc17xx_emac.h
  • EMAC_PD_POWER_DOWN : lpc17xx_emac.h
  • EMAC_PHY_AUTO_NEG : lpc17xx_emac.h
  • EMAC_PHY_BMCR_AN : lpc17xx_emac.h
  • EMAC_PHY_BMCR_DUPLEX : lpc17xx_emac.h
  • EMAC_PHY_BMCR_ISOLATE : lpc17xx_emac.h
  • EMAC_PHY_BMCR_LOOPBACK : lpc17xx_emac.h
  • EMAC_PHY_BMCR_POWERDOWN : lpc17xx_emac.h
  • EMAC_PHY_BMCR_RE_AN : lpc17xx_emac.h
  • EMAC_PHY_BMCR_RESET : lpc17xx_emac.h
  • EMAC_PHY_BMCR_SPEED_SEL : lpc17xx_emac.h
  • EMAC_PHY_BMSR_100BE_T4 : lpc17xx_emac.h
  • EMAC_PHY_BMSR_100TX_FULL : lpc17xx_emac.h
  • EMAC_PHY_BMSR_100TX_HALF : lpc17xx_emac.h
  • EMAC_PHY_BMSR_10BE_FULL : lpc17xx_emac.h
  • EMAC_PHY_BMSR_10BE_HALF : lpc17xx_emac.h
  • EMAC_PHY_BMSR_AUTO_DONE : lpc17xx_emac.h
  • EMAC_PHY_BMSR_LINK_ESTABLISHED : lpc17xx_emac.h
  • EMAC_PHY_BMSR_LINK_STATUS : lpc17xx_emac.h
  • EMAC_PHY_BMSR_NO_AUTO : lpc17xx_emac.h
  • EMAC_PHY_BMSR_NOPREAM : lpc17xx_emac.h
  • EMAC_PHY_BMSR_REMOTE_FAULT : lpc17xx_emac.h
  • EMAC_PHY_FULLD_100M : lpc17xx_emac.h
  • EMAC_PHY_FULLD_10M : lpc17xx_emac.h
  • EMAC_PHY_HALFD_100M : lpc17xx_emac.h
  • EMAC_PHY_HALFD_10M : lpc17xx_emac.h
  • EMAC_PHY_REG_10BTSCR : lpc17xx_emac.h
  • EMAC_PHY_REG_ANAR : lpc17xx_emac.h
  • EMAC_PHY_REG_ANER : lpc17xx_emac.h
  • EMAC_PHY_REG_ANLPAR : lpc17xx_emac.h
  • EMAC_PHY_REG_ANNPTR : lpc17xx_emac.h
  • EMAC_PHY_REG_BMCR : lpc17xx_emac.h
  • EMAC_PHY_REG_BMSR : lpc17xx_emac.h
  • EMAC_PHY_REG_CDCTRL1 : lpc17xx_emac.h
  • EMAC_PHY_REG_EDCR : lpc17xx_emac.h
  • EMAC_PHY_REG_FCSCR : lpc17xx_emac.h
  • EMAC_PHY_REG_IDR1 : lpc17xx_emac.h
  • EMAC_PHY_REG_IDR2 : lpc17xx_emac.h
  • EMAC_PHY_REG_LEDCR : lpc17xx_emac.h
  • EMAC_PHY_REG_LPNPA : lpc17xx_emac.h
  • EMAC_PHY_REG_MICR : lpc17xx_emac.h
  • EMAC_PHY_REG_MISR : lpc17xx_emac.h
  • EMAC_PHY_REG_PCSR : lpc17xx_emac.h
  • EMAC_PHY_REG_PHYCR : lpc17xx_emac.h
  • EMAC_PHY_REG_RBR : lpc17xx_emac.h
  • EMAC_PHY_REG_RECR : lpc17xx_emac.h
  • EMAC_PHY_REG_STS : lpc17xx_emac.h
  • EMAC_PHY_RESP_TOUT : lpc17xx_emac.h
  • EMAC_PHY_SR_100_SPEED : lpc17xx_emac.h
  • EMAC_PHY_SR_AUTO_DONE : lpc17xx_emac.h
  • EMAC_PHY_SR_DUP : lpc17xx_emac.h
  • EMAC_PHY_SR_FULL_DUP : lpc17xx_emac.h
  • EMAC_PHY_SR_JABBER : lpc17xx_emac.h
  • EMAC_PHY_SR_LINK : lpc17xx_emac.h
  • EMAC_PHY_SR_LOOPBACK : lpc17xx_emac.h
  • EMAC_PHY_SR_REMOTE_FAULT : lpc17xx_emac.h
  • EMAC_PHY_SR_SPEED : lpc17xx_emac.h
  • EMAC_PHY_STAT_DUP : lpc17xx_emac.h
  • EMAC_PHY_STAT_LINK : lpc17xx_emac.h
  • EMAC_PHY_STAT_SPEED : lpc17xx_emac.h
  • EMAC_RCTRL_INT : lpc17xx_emac.h
  • EMAC_RCTRL_SIZE : lpc17xx_emac.h
  • EMAC_RFC_BCAST_EN : lpc17xx_emac.h
  • EMAC_RFC_MAGP_WOL_EN : lpc17xx_emac.h
  • EMAC_RFC_MCAST_EN : lpc17xx_emac.h
  • EMAC_RFC_MCAST_HASH_EN : lpc17xx_emac.h
  • EMAC_RFC_PERFECT_EN : lpc17xx_emac.h
  • EMAC_RFC_PFILT_WOL_EN : lpc17xx_emac.h
  • EMAC_RFC_UCAST_EN : lpc17xx_emac.h
  • EMAC_RFC_UCAST_HASH_EN : lpc17xx_emac.h
  • EMAC_RHASH_DA : lpc17xx_emac.h
  • EMAC_RHASH_SA : lpc17xx_emac.h
  • EMAC_RINFO_ALIGN_ERR : lpc17xx_emac.h
  • EMAC_RINFO_BCAST : lpc17xx_emac.h
  • EMAC_RINFO_CRC_ERR : lpc17xx_emac.h
  • EMAC_RINFO_CTRL_FRAME : lpc17xx_emac.h
  • EMAC_RINFO_ERR : lpc17xx_emac.h
  • EMAC_RINFO_ERR_MASK : lpc17xx_emac.h
  • EMAC_RINFO_FAIL_FILT : lpc17xx_emac.h
  • EMAC_RINFO_LAST_FLAG : lpc17xx_emac.h
  • EMAC_RINFO_LEN_ERR : lpc17xx_emac.h
  • EMAC_RINFO_MCAST : lpc17xx_emac.h
  • EMAC_RINFO_NO_DESCR : lpc17xx_emac.h
  • EMAC_RINFO_OVERRUN : lpc17xx_emac.h
  • EMAC_RINFO_RANGE_ERR : lpc17xx_emac.h
  • EMAC_RINFO_SIZE : lpc17xx_emac.h
  • EMAC_RINFO_SYM_ERR : lpc17xx_emac.h
  • EMAC_RINFO_VLAN : lpc17xx_emac.h
  • EMAC_RSV_BCAST : lpc17xx_emac.h
  • EMAC_RSV_BYTE_CNT : lpc17xx_emac.h
  • EMAC_RSV_CARR_SEEN : lpc17xx_emac.h
  • EMAC_RSV_CRC_ERR : lpc17xx_emac.h
  • EMAC_RSV_CTRL_FRAME : lpc17xx_emac.h
  • EMAC_RSV_DRIB_NIBB : lpc17xx_emac.h
  • EMAC_RSV_LEN_CHKERR : lpc17xx_emac.h
  • EMAC_RSV_LEN_OUTRNG : lpc17xx_emac.h
  • EMAC_RSV_MCAST : lpc17xx_emac.h
  • EMAC_RSV_PAUSE : lpc17xx_emac.h
  • EMAC_RSV_PKT_IGNORED : lpc17xx_emac.h
  • EMAC_RSV_REC_CODEV : lpc17xx_emac.h
  • EMAC_RSV_REC_OK : lpc17xx_emac.h
  • EMAC_RSV_RXDV_SEEN : lpc17xx_emac.h
  • EMAC_RSV_UNSUPP_OPC : lpc17xx_emac.h
  • EMAC_RSV_VLAN : lpc17xx_emac.h
  • EMAC_SR_RX_EN : lpc17xx_emac.h
  • EMAC_SR_TX_EN : lpc17xx_emac.h
  • EMAC_SUPP_RES_RMII : lpc17xx_emac.h
  • EMAC_SUPP_SPEED : lpc17xx_emac.h
  • EMAC_TCTRL_CRC : lpc17xx_emac.h
  • EMAC_TCTRL_HUGE : lpc17xx_emac.h
  • EMAC_TCTRL_INT : lpc17xx_emac.h
  • EMAC_TCTRL_LAST : lpc17xx_emac.h
  • EMAC_TCTRL_OVERRIDE : lpc17xx_emac.h
  • EMAC_TCTRL_PAD : lpc17xx_emac.h
  • EMAC_TCTRL_SIZE : lpc17xx_emac.h
  • EMAC_TEST_SHCUT_PQUANTA : lpc17xx_emac.h
  • EMAC_TEST_TST_BACKP : lpc17xx_emac.h
  • EMAC_TEST_TST_PAUSE : lpc17xx_emac.h
  • EMAC_TINFO_COL_CNT : lpc17xx_emac.h
  • EMAC_TINFO_DEFER : lpc17xx_emac.h
  • EMAC_TINFO_ERR : lpc17xx_emac.h
  • EMAC_TINFO_EXCESS_COL : lpc17xx_emac.h
  • EMAC_TINFO_EXCESS_DEF : lpc17xx_emac.h
  • EMAC_TINFO_LATE_COL : lpc17xx_emac.h
  • EMAC_TINFO_NO_DESCR : lpc17xx_emac.h
  • EMAC_TINFO_UNDERRUN : lpc17xx_emac.h
  • EMAC_TSV0_BACK_PRESS : lpc17xx_emac.h
  • EMAC_TSV0_BCAST : lpc17xx_emac.h
  • EMAC_TSV0_BYTES : lpc17xx_emac.h
  • EMAC_TSV0_CRC_ERR : lpc17xx_emac.h
  • EMAC_TSV0_CTRL_FRAME : lpc17xx_emac.h
  • EMAC_TSV0_DONE : lpc17xx_emac.h
  • EMAC_TSV0_EXC_COLL : lpc17xx_emac.h
  • EMAC_TSV0_EXC_DEFER : lpc17xx_emac.h
  • EMAC_TSV0_GIANT : lpc17xx_emac.h
  • EMAC_TSV0_LATE_COLL : lpc17xx_emac.h
  • EMAC_TSV0_LEN_CHKERR : lpc17xx_emac.h
  • EMAC_TSV0_LEN_OUTRNG : lpc17xx_emac.h
  • EMAC_TSV0_MCAST : lpc17xx_emac.h
  • EMAC_TSV0_PAUSE : lpc17xx_emac.h
  • EMAC_TSV0_PKT_DEFER : lpc17xx_emac.h
  • EMAC_TSV0_UNDERRUN : lpc17xx_emac.h
  • EMAC_TSV0_VLAN : lpc17xx_emac.h
  • EMAC_TSV1_BYTE_CNT : lpc17xx_emac.h
  • EMAC_TSV1_COLL_CNT : lpc17xx_emac.h
  • EMAC_TX_FRAME_TOUT : lpc17xx_emac.h
  • EMAC_WOL_BCAST : lpc17xx_emac.h
  • EMAC_WOL_BITMASK : lpc17xx_emac.h
  • EMAC_WOL_MAG_PACKET : lpc17xx_emac.h
  • EMAC_WOL_MCAST : lpc17xx_emac.h
  • EMAC_WOL_MCAST_HASH : lpc17xx_emac.h
  • EMAC_WOL_PERFECT : lpc17xx_emac.h
  • EMAC_WOL_RX_FILTER : lpc17xx_emac.h
  • EMAC_WOL_UCAST : lpc17xx_emac.h
  • EMAC_WOL_UCAST_HASH : lpc17xx_emac.h
  • ENABLE_HASH : emactest.c
  • ENABLE_WOL : emactest.c
  • ENC_RES : qei_test_velo.c
  • ENET_DMA_DESC_NUMB : emac.h
  • ENTRIES : uip-neighbor.c
  • EOT_INT : usbreg.h
  • EP_FAST_INT : usbreg.h
  • EP_MSK_BULK : usbhw.c
  • EP_MSK_CTRL : usbhw.c
  • EP_MSK_INT : usbhw.c
  • EP_MSK_ISO : usbhw.c
  • EP_RLZED_INT : usbreg.h
  • EP_SEL_B_1_FULL : usbreg.h
  • EP_SEL_B_2_FULL : usbreg.h
  • EP_SEL_EPN : usbreg.h
  • EP_SEL_F : usbreg.h
  • EP_SEL_PO : usbreg.h
  • EP_SEL_ST : usbreg.h
  • EP_SEL_STP : usbreg.h
  • EP_SLOW_INT : usbreg.h
  • EP_STAT_CND_ST : usbreg.h
  • EP_STAT_DA : usbreg.h
  • EP_STAT_RF_MO : usbreg.h
  • EP_STAT_ST : usbreg.h
  • ERR_B_OVRN : usbreg.h
  • ERR_BTSTF : usbreg.h
  • ERR_DCRC : usbreg.h
  • ERR_EA : usbreg.h
  • ERR_EC_MASK : usbreg.h
  • ERR_EOP : usbreg.h
  • ERR_INT : usbreg.h
  • ERR_PID : usbreg.h
  • ERR_TGL : usbreg.h
  • ERR_TIMOUT : usbreg.h
  • ERR_UEPKT : usbreg.h
  • ETH_DA_OFS : tcpip.h
  • ETH_DATA_OFS : tcpip.h
  • ETH_HEADER_SIZE : tcpip.h
  • ETH_SA_OFS : tcpip.h
  • ETH_TYPE_OFS : tcpip.h
  • extern : easyweb.c
  • EXTERN : lpc_types.h
  • EXTI_EINT0_BIT_MARK : lpc17xx_exti.h
  • EXTI_EINT1_BIT_MARK : lpc17xx_exti.h
  • EXTI_EINT2_BIT_MARK : lpc17xx_exti.h
  • EXTI_EINT3_BIT_MARK : lpc17xx_exti.h
Generated on Tue Jun 7 15:00:16 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Data Fields

  • All
  • Functions
  • Variables
  • Typedefs
  • Enumerations
  • Enumerator
  • Defines
  • _
  • a
  • b
  • c
  • d
  • e
  • f
  • g
  • h
  • i
  • k
  • l
  • m
  • n
  • o
  • p
  • q
  • r
  • s
  • t
  • u
  • v
  • w
  • x
  • y

- f -

  • FBUF : uip.c
  • FIN_TIMEOUT : tcpip.h
  • FIX_DUPLEX : emac.h
  • FIX_SPEED : emac.h
  • FLASH_SETUP : system_LPC17xx.c
  • FLASHCFG_Val : system_LPC17xx.c
  • FRAME_ARP : tcpip.h
  • FRAME_INT : usbreg.h
  • FRAME_IP : tcpip.h
  • FULL_DUPLEX : emac.h
  • FW_TIME : uip-fw.c
  • FWCACHE_SIZE : uip-fw.c
Generated on Tue Jun 7 15:00:16 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Data Fields

  • All
  • Functions
  • Variables
  • Typedefs
  • Enumerations
  • Enumerator
  • Defines
  • _
  • a
  • b
  • c
  • d
  • e
  • f
  • g
  • h
  • i
  • k
  • l
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  • n
  • o
  • p
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  • s
  • t
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  • x
  • y

- g -

  • GETBIT : spi_sdcard.c
  • GLCD_BOOSTER_ON_DLY : drv_glcd.c
  • GLCD_DATA : drv_glcd.h
  • GLCD_DEF_CLOCK : drv_glcd_cnfg.h
  • GLCD_DEF_DPL_8_COLOR : drv_glcd_cnfg.h
  • GLCD_DEF_DPL_INV : drv_glcd_cnfg.h
  • GLCD_DEF_DPL_ML : drv_glcd_cnfg.h
  • GLCD_DEF_DPL_MX : drv_glcd_cnfg.h
  • GLCD_DEF_DPL_MY : drv_glcd_cnfg.h
  • GLCD_DEF_DPL_PARTIAL_MODE : drv_glcd_cnfg.h
  • GLCD_DEF_DPL_RGB_ORD : drv_glcd_cnfg.h
  • GLCD_DEF_DPL_V : drv_glcd_cnfg.h
  • GLCD_DEF_WIDTH : drv_glcd_cnfg.h
  • GLCD_DISPLAY_STATE : drv_glcd_cnfg.h
  • GLCD_DLY_10US : drv_glcd.c
  • GLCD_HORIZONTAL_SIZE : drv_glcd_cnfg.h
  • GLCD_INV_CMD : drv_glcd.h
  • GLCD_MANF_ID : drv_glcd.h
  • GLCD_MAX_COTRAST : drv_glcd.h
  • GLCD_MIN_COTRAST : drv_glcd.h
  • GLCD_MOD_ID : drv_glcd.h
  • GLCD_RESET_DLY : drv_glcd.c
  • GLCD_VERTICAL_SIZE : drv_glcd_cnfg.h
  • GPDMA_BSIZE_1 : lpc17xx_gpdma.h
  • GPDMA_BSIZE_128 : lpc17xx_gpdma.h
  • GPDMA_BSIZE_16 : lpc17xx_gpdma.h
  • GPDMA_BSIZE_256 : lpc17xx_gpdma.h
  • GPDMA_BSIZE_32 : lpc17xx_gpdma.h
  • GPDMA_BSIZE_4 : lpc17xx_gpdma.h
  • GPDMA_BSIZE_64 : lpc17xx_gpdma.h
  • GPDMA_BSIZE_8 : lpc17xx_gpdma.h
  • GPDMA_CONN_ADC : lpc17xx_gpdma.h
  • GPDMA_CONN_DAC : lpc17xx_gpdma.h
  • GPDMA_CONN_I2S_Channel_0 : lpc17xx_gpdma.h
  • GPDMA_CONN_I2S_Channel_1 : lpc17xx_gpdma.h
  • GPDMA_CONN_MAT0_0 : lpc17xx_gpdma.h
  • GPDMA_CONN_MAT0_1 : lpc17xx_gpdma.h
  • GPDMA_CONN_MAT1_0 : lpc17xx_gpdma.h
  • GPDMA_CONN_MAT1_1 : lpc17xx_gpdma.h
  • GPDMA_CONN_MAT2_0 : lpc17xx_gpdma.h
  • GPDMA_CONN_MAT2_1 : lpc17xx_gpdma.h
  • GPDMA_CONN_MAT3_0 : lpc17xx_gpdma.h
  • GPDMA_CONN_MAT3_1 : lpc17xx_gpdma.h
  • GPDMA_CONN_SSP0_Rx : lpc17xx_gpdma.h
  • GPDMA_CONN_SSP0_Tx : lpc17xx_gpdma.h
  • GPDMA_CONN_SSP1_Rx : lpc17xx_gpdma.h
  • GPDMA_CONN_SSP1_Tx : lpc17xx_gpdma.h
  • GPDMA_CONN_UART0_Rx : lpc17xx_gpdma.h
  • GPDMA_CONN_UART0_Tx : lpc17xx_gpdma.h
  • GPDMA_CONN_UART1_Rx : lpc17xx_gpdma.h
  • GPDMA_CONN_UART1_Tx : lpc17xx_gpdma.h
  • GPDMA_CONN_UART2_Rx : lpc17xx_gpdma.h
  • GPDMA_CONN_UART2_Tx : lpc17xx_gpdma.h
  • GPDMA_CONN_UART3_Rx : lpc17xx_gpdma.h
  • GPDMA_CONN_UART3_Tx : lpc17xx_gpdma.h
  • GPDMA_DMACConfig_BITMASK : lpc17xx_gpdma.h
  • GPDMA_DMACConfig_E : lpc17xx_gpdma.h
  • GPDMA_DMACConfig_M : lpc17xx_gpdma.h
  • GPDMA_DMACCxConfig_A : lpc17xx_gpdma.h
  • GPDMA_DMACCxConfig_BITMASK : lpc17xx_gpdma.h
  • GPDMA_DMACCxConfig_DestPeripheral : lpc17xx_gpdma.h
  • GPDMA_DMACCxConfig_E : lpc17xx_gpdma.h
  • GPDMA_DMACCxConfig_H : lpc17xx_gpdma.h
  • GPDMA_DMACCxConfig_IE : lpc17xx_gpdma.h
  • GPDMA_DMACCxConfig_ITC : lpc17xx_gpdma.h
  • GPDMA_DMACCxConfig_L : lpc17xx_gpdma.h
  • GPDMA_DMACCxConfig_SrcPeripheral : lpc17xx_gpdma.h
  • GPDMA_DMACCxConfig_TransferType : lpc17xx_gpdma.h
  • GPDMA_DMACCxControl_BITMASK : lpc17xx_gpdma.h
  • GPDMA_DMACCxControl_DBSize : lpc17xx_gpdma.h
  • GPDMA_DMACCxControl_DI : lpc17xx_gpdma.h
  • GPDMA_DMACCxControl_DWidth : lpc17xx_gpdma.h
  • GPDMA_DMACCxControl_I : lpc17xx_gpdma.h
  • GPDMA_DMACCxControl_Prot1 : lpc17xx_gpdma.h
  • GPDMA_DMACCxControl_Prot2 : lpc17xx_gpdma.h
  • GPDMA_DMACCxControl_Prot3 : lpc17xx_gpdma.h
  • GPDMA_DMACCxControl_SBSize : lpc17xx_gpdma.h
  • GPDMA_DMACCxControl_SI : lpc17xx_gpdma.h
  • GPDMA_DMACCxControl_SWidth : lpc17xx_gpdma.h
  • GPDMA_DMACCxControl_TransferSize : lpc17xx_gpdma.h
  • GPDMA_DMACCxLLI_BITMASK : lpc17xx_gpdma.h
  • GPDMA_DMACEnbldChns_BITMASK : lpc17xx_gpdma.h
  • GPDMA_DMACEnbldChns_Ch : lpc17xx_gpdma.h
  • GPDMA_DMACIntErrClr_BITMASK : lpc17xx_gpdma.h
  • GPDMA_DMACIntErrClr_Ch : lpc17xx_gpdma.h
  • GPDMA_DMACIntErrStat_BITMASK : lpc17xx_gpdma.h
  • GPDMA_DMACIntErrStat_Ch : lpc17xx_gpdma.h
  • GPDMA_DMACIntStat_BITMASK : lpc17xx_gpdma.h
  • GPDMA_DMACIntStat_Ch : lpc17xx_gpdma.h
  • GPDMA_DMACIntTCClear_BITMASK : lpc17xx_gpdma.h
  • GPDMA_DMACIntTCClear_Ch : lpc17xx_gpdma.h
  • GPDMA_DMACIntTCStat_BITMASK : lpc17xx_gpdma.h
  • GPDMA_DMACIntTCStat_Ch : lpc17xx_gpdma.h
  • GPDMA_DMACRawIntErrStat_BITMASK : lpc17xx_gpdma.h
  • GPDMA_DMACRawIntErrStat_Ch : lpc17xx_gpdma.h
  • GPDMA_DMACRawIntTCStat_BITMASK : lpc17xx_gpdma.h
  • GPDMA_DMACRawIntTCStat_Ch : lpc17xx_gpdma.h
  • GPDMA_DMACSoftBReq_BITMASK : lpc17xx_gpdma.h
  • GPDMA_DMACSoftBReq_Src : lpc17xx_gpdma.h
  • GPDMA_DMACSoftLBReq_BITMASK : lpc17xx_gpdma.h
  • GPDMA_DMACSoftLBReq_Src : lpc17xx_gpdma.h
  • GPDMA_DMACSoftLSReq_BITMASK : lpc17xx_gpdma.h
  • GPDMA_DMACSoftLSReq_Src : lpc17xx_gpdma.h
  • GPDMA_DMACSoftSReq_BITMASK : lpc17xx_gpdma.h
  • GPDMA_DMACSoftSReq_Src : lpc17xx_gpdma.h
  • GPDMA_DMACSync_BITMASK : lpc17xx_gpdma.h
  • GPDMA_DMACSync_Src : lpc17xx_gpdma.h
  • GPDMA_DMAReqSel_BITMASK : lpc17xx_gpdma.h
  • GPDMA_DMAReqSel_Input : lpc17xx_gpdma.h
  • GPDMA_REQSEL_TIMER : lpc17xx_gpdma.h
  • GPDMA_REQSEL_UART : lpc17xx_gpdma.h
  • GPDMA_TRANSFERTYPE_M2M : lpc17xx_gpdma.h
  • GPDMA_TRANSFERTYPE_M2P : lpc17xx_gpdma.h
  • GPDMA_TRANSFERTYPE_P2M : lpc17xx_gpdma.h
  • GPDMA_TRANSFERTYPE_P2P : lpc17xx_gpdma.h
  • GPDMA_WIDTH_BYTE : lpc17xx_gpdma.h
  • GPDMA_WIDTH_HALFWORD : lpc17xx_gpdma.h
  • GPDMA_WIDTH_WORD : lpc17xx_gpdma.h
  • GPIO0_Byte : lpc17xx_gpio.h
  • GPIO0_HalfWord : lpc17xx_gpio.h
  • GPIO1_Byte : lpc17xx_gpio.h
  • GPIO1_HalfWord : lpc17xx_gpio.h
  • GPIO2_Byte : lpc17xx_gpio.h
  • GPIO2_HalfWord : lpc17xx_gpio.h
  • GPIO3_Byte : lpc17xx_gpio.h
  • GPIO3_HalfWord : lpc17xx_gpio.h
  • GPIO4_Byte : lpc17xx_gpio.h
  • GPIO4_HalfWord : lpc17xx_gpio.h
  • GPIO_INT : gpio_int.c , adc_burst_test.c
  • Green : GLCD.h
  • GWIP_1 : tcpip.h
  • GWIP_2 : tcpip.h
  • GWIP_3 : tcpip.h
  • GWIP_4 : tcpip.h
Generated on Tue Jun 7 15:00:16 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Data Fields

  • All
  • Functions
  • Variables
  • Typedefs
  • Enumerations
  • Enumerator
  • Defines
  • _
  • a
  • b
  • c
  • d
  • e
  • f
  • g
  • h
  • i
  • k
  • l
  • m
  • n
  • o
  • p
  • q
  • r
  • s
  • t
  • u
  • v
  • w
  • x
  • y

- h -

  • HALF_DUPLEX : emac.h
  • HARDW_ETH10 : tcpip.h
  • HEIGHT : GLCD_SPI_LPC1700.c
  • HID_Absolute : hid.h
  • HID_Application : hid.h
  • HID_Array : hid.h
  • HID_Collection : hid.h
  • HID_Constant : hid.h
  • HID_Data : hid.h
  • HID_DESC_OFFSET : usbdesc.h
  • HID_DESC_SIZE : usbdesc.h
  • HID_EndCollection : hid.h
  • HID_Feature : hid.h
  • HID_HID_DESCRIPTOR_TYPE : hid.h
  • HID_Input : hid.h
  • HID_Linear : hid.h
  • HID_Logical : hid.h
  • HID_LogicalMax : hid.h
  • HID_LogicalMaxL : hid.h
  • HID_LogicalMaxS : hid.h
  • HID_LogicalMin : hid.h
  • HID_LogicalMinL : hid.h
  • HID_LogicalMinS : hid.h
  • HID_NamedArray : hid.h
  • HID_NonLinear : hid.h
  • HID_NoNullPosition : hid.h
  • HID_NonVolatile : hid.h
  • HID_NoPreferred : hid.h
  • HID_NoWrap : hid.h
  • HID_NullState : hid.h
  • HID_Output : hid.h
  • HID_Physical : hid.h
  • HID_PHYSICAL_DESCRIPTOR_TYPE : hid.h
  • HID_PhysicalMax : hid.h
  • HID_PhysicalMaxL : hid.h
  • HID_PhysicalMaxS : hid.h
  • HID_PhysicalMin : hid.h
  • HID_PhysicalMinL : hid.h
  • HID_PhysicalMinS : hid.h
  • HID_Pop : hid.h
  • HID_PreferredState : hid.h
  • HID_PROTOCOL_KEYBOARD : hid.h
  • HID_PROTOCOL_MOUSE : hid.h
  • HID_PROTOCOL_NONE : hid.h
  • HID_Push : hid.h
  • HID_Relative : hid.h
  • HID_Report : hid.h
  • HID_REPORT_DESC_SIZE : usbdesc.h
  • HID_REPORT_DESCRIPTOR_TYPE : hid.h
  • HID_REPORT_FEATURE : hid.h
  • HID_REPORT_INPUT : hid.h
  • HID_REPORT_NUM : hiduser.h
  • HID_REPORT_OUTPUT : hid.h
  • HID_ReportCount : hid.h
  • HID_ReportID : hid.h
  • HID_ReportSize : hid.h
  • HID_REQUEST_GET_IDLE : hid.h
  • HID_REQUEST_GET_PROTOCOL : hid.h
  • HID_REQUEST_GET_REPORT : hid.h
  • HID_REQUEST_SET_IDLE : hid.h
  • HID_REQUEST_SET_PROTOCOL : hid.h
  • HID_REQUEST_SET_REPORT : hid.h
  • HID_SUBCLASS_BOOT : hid.h
  • HID_SUBCLASS_NONE : hid.h
  • HID_Unit : hid.h
  • HID_UnitExponent : hid.h
  • HID_UnitL : hid.h
  • HID_UnitS : hid.h
  • HID_Usage : hid.h
  • HID_USAGE_CONSUMER_CONTROL : hid.h
  • HID_USAGE_GENERIC_BYTE_COUNT : hid.h
  • HID_USAGE_GENERIC_COUNTED_BUFFER : hid.h
  • HID_USAGE_GENERIC_DIAL : hid.h
  • HID_USAGE_GENERIC_GAMEPAD : hid.h
  • HID_USAGE_GENERIC_HATSWITCH : hid.h
  • HID_USAGE_GENERIC_JOYSTICK : hid.h
  • HID_USAGE_GENERIC_KEYBOARD : hid.h
  • HID_USAGE_GENERIC_KEYPAD : hid.h
  • HID_USAGE_GENERIC_MOTION_WAKEUP : hid.h
  • HID_USAGE_GENERIC_MOUSE : hid.h
  • HID_USAGE_GENERIC_POINTER : hid.h
  • HID_USAGE_GENERIC_RX : hid.h
  • HID_USAGE_GENERIC_RY : hid.h
  • HID_USAGE_GENERIC_RZ : hid.h
  • HID_USAGE_GENERIC_SLIDER : hid.h
  • HID_USAGE_GENERIC_SYSCTL_APP_MENU : hid.h
  • HID_USAGE_GENERIC_SYSCTL_CONTEXT_MENU : hid.h
  • HID_USAGE_GENERIC_SYSCTL_HELP_MENU : hid.h
  • HID_USAGE_GENERIC_SYSCTL_MAIN_MENU : hid.h
  • HID_USAGE_GENERIC_SYSCTL_MENU_DOWN : hid.h
  • HID_USAGE_GENERIC_SYSCTL_MENU_EXIT : hid.h
  • HID_USAGE_GENERIC_SYSCTL_MENU_LEFT : hid.h
  • HID_USAGE_GENERIC_SYSCTL_MENU_RIGHT : hid.h
  • HID_USAGE_GENERIC_SYSCTL_MENU_SELECT : hid.h
  • HID_USAGE_GENERIC_SYSCTL_MENU_UP : hid.h
  • HID_USAGE_GENERIC_SYSCTL_POWER : hid.h
  • HID_USAGE_GENERIC_SYSCTL_SLEEP : hid.h
  • HID_USAGE_GENERIC_SYSCTL_WAKE : hid.h
  • HID_USAGE_GENERIC_SYSTEM_CTL : hid.h
  • HID_USAGE_GENERIC_VBRX : hid.h
  • HID_USAGE_GENERIC_VBRY : hid.h
  • HID_USAGE_GENERIC_VBRZ : hid.h
  • HID_USAGE_GENERIC_VNO : hid.h
  • HID_USAGE_GENERIC_VX : hid.h
  • HID_USAGE_GENERIC_VY : hid.h
  • HID_USAGE_GENERIC_VZ : hid.h
  • HID_USAGE_GENERIC_WHEEL : hid.h
  • HID_USAGE_GENERIC_X : hid.h
  • HID_USAGE_GENERIC_Y : hid.h
  • HID_USAGE_GENERIC_Z : hid.h
  • HID_USAGE_KEYBOARD_aA : hid.h
  • HID_USAGE_KEYBOARD_CAPS_LOCK : hid.h
  • HID_USAGE_KEYBOARD_DELETE : hid.h
  • HID_USAGE_KEYBOARD_ESCAPE : hid.h
  • HID_USAGE_KEYBOARD_F1 : hid.h
  • HID_USAGE_KEYBOARD_F12 : hid.h
  • HID_USAGE_KEYBOARD_LALT : hid.h
  • HID_USAGE_KEYBOARD_LCTRL : hid.h
  • HID_USAGE_KEYBOARD_LGUI : hid.h
  • HID_USAGE_KEYBOARD_LSHFT : hid.h
  • HID_USAGE_KEYBOARD_NOEVENT : hid.h
  • HID_USAGE_KEYBOARD_NUM_LOCK : hid.h
  • HID_USAGE_KEYBOARD_ONE : hid.h
  • HID_USAGE_KEYBOARD_POSTFAIL : hid.h
  • HID_USAGE_KEYBOARD_PRINT_SCREEN : hid.h
  • HID_USAGE_KEYBOARD_RALT : hid.h
  • HID_USAGE_KEYBOARD_RCTRL : hid.h
  • HID_USAGE_KEYBOARD_RETURN : hid.h
  • HID_USAGE_KEYBOARD_RGUI : hid.h
  • HID_USAGE_KEYBOARD_ROLLOVER : hid.h
  • HID_USAGE_KEYBOARD_RSHFT : hid.h
  • HID_USAGE_KEYBOARD_SCROLL_LOCK : hid.h
  • HID_USAGE_KEYBOARD_UNDEFINED : hid.h
  • HID_USAGE_KEYBOARD_ZERO : hid.h
  • HID_USAGE_KEYBOARD_zZ : hid.h
  • HID_USAGE_LED_AMBER : hid.h
  • HID_USAGE_LED_BATTERY_LOW : hid.h
  • HID_USAGE_LED_BATTERY_OK : hid.h
  • HID_USAGE_LED_BATTERY_OPERATION : hid.h
  • HID_USAGE_LED_BUSY : hid.h
  • HID_USAGE_LED_CALL_PICKUP : hid.h
  • HID_USAGE_LED_CAMERA_OFF : hid.h
  • HID_USAGE_LED_CAMERA_ON : hid.h
  • HID_USAGE_LED_CAPS_LOCK : hid.h
  • HID_USAGE_LED_CAV : hid.h
  • HID_USAGE_LED_CLV : hid.h
  • HID_USAGE_LED_COMPOSE : hid.h
  • HID_USAGE_LED_CONFERENCE : hid.h
  • HID_USAGE_LED_COVERAGE : hid.h
  • HID_USAGE_LED_DATA_MODE : hid.h
  • HID_USAGE_LED_DO_NOT_DISTURB : hid.h
  • HID_USAGE_LED_EQUALIZER_ENABLE : hid.h
  • HID_USAGE_LED_ERROR : hid.h
  • HID_USAGE_LED_FAST_BLINK_OFF_TIME : hid.h
  • HID_USAGE_LED_FAST_BLINK_ON_TIME : hid.h
  • HID_USAGE_LED_FAST_FORWARD : hid.h
  • HID_USAGE_LED_FLASH_ON_TIME : hid.h
  • HID_USAGE_LED_FORWARD : hid.h
  • HID_USAGE_LED_GENERIC_INDICATOR : hid.h
  • HID_USAGE_LED_GREEN : hid.h
  • HID_USAGE_LED_HEAD_SET : hid.h
  • HID_USAGE_LED_HIGH_CUT_FILTER : hid.h
  • HID_USAGE_LED_HOLD : hid.h
  • HID_USAGE_LED_IN_USE_INDICATOR : hid.h
  • HID_USAGE_LED_INDICATOR_COLOR : hid.h
  • HID_USAGE_LED_INDICATOR_FAST_BLINK : hid.h
  • HID_USAGE_LED_INDICATOR_FLASH : hid.h
  • HID_USAGE_LED_INDICATOR_OFF : hid.h
  • HID_USAGE_LED_INDICATOR_ON : hid.h
  • HID_USAGE_LED_INDICATOR_SLOW_BLINK : hid.h
  • HID_USAGE_LED_KANA : hid.h
  • HID_USAGE_LED_LOW_CUT_FILTER : hid.h
  • HID_USAGE_LED_MESSAGE_WAITING : hid.h
  • HID_USAGE_LED_MICROPHONE : hid.h
  • HID_USAGE_LED_MULTI_MODE_INDICATOR : hid.h
  • HID_USAGE_LED_MUTE : hid.h
  • HID_USAGE_LED_NIGHT_MODE : hid.h
  • HID_USAGE_LED_NUM_LOCK : hid.h
  • HID_USAGE_LED_OFF_HOOK : hid.h
  • HID_USAGE_LED_OFF_LINE : hid.h
  • HID_USAGE_LED_ON_LINE : hid.h
  • HID_USAGE_LED_PAPER_JAM : hid.h
  • HID_USAGE_LED_PAPER_OUT : hid.h
  • HID_USAGE_LED_PAUSE : hid.h
  • HID_USAGE_LED_PLAY : hid.h
  • HID_USAGE_LED_POWER : hid.h
  • HID_USAGE_LED_READY : hid.h
  • HID_USAGE_LED_RECORD : hid.h
  • HID_USAGE_LED_RECORDING_FORMAT_DET : hid.h
  • HID_USAGE_LED_RED : hid.h
  • HID_USAGE_LED_REMOTE : hid.h
  • HID_USAGE_LED_REPEAT : hid.h
  • HID_USAGE_LED_REVERSE : hid.h
  • HID_USAGE_LED_REWIND : hid.h
  • HID_USAGE_LED_RING : hid.h
  • HID_USAGE_LED_SAMPLING_RATE_DETECT : hid.h
  • HID_USAGE_LED_SCROLL_LOCK : hid.h
  • HID_USAGE_LED_SELECTED_INDICATOR : hid.h
  • HID_USAGE_LED_SEND_CALLS : hid.h
  • HID_USAGE_LED_SHIFT : hid.h
  • HID_USAGE_LED_SLOW_BLINK_OFF_TIME : hid.h
  • HID_USAGE_LED_SLOW_BLINK_ON_TIME : hid.h
  • HID_USAGE_LED_SOUND_FIELD_ON : hid.h
  • HID_USAGE_LED_SPEAKER : hid.h
  • HID_USAGE_LED_SPINNING : hid.h
  • HID_USAGE_LED_STAND_BY : hid.h
  • HID_USAGE_LED_STEREO : hid.h
  • HID_USAGE_LED_STOP : hid.h
  • HID_USAGE_LED_SURROUND_FIELD_ON : hid.h
  • HID_USAGE_LED_TONE_ENABLE : hid.h
  • HID_USAGE_PAGE_ALPHANUMERIC : hid.h
  • HID_USAGE_PAGE_BUTTON : hid.h
  • HID_USAGE_PAGE_CONSUMER : hid.h
  • HID_USAGE_PAGE_DEV_CONTROLS : hid.h
  • HID_USAGE_PAGE_DIGITIZER : hid.h
  • HID_USAGE_PAGE_GAME : hid.h
  • HID_USAGE_PAGE_GENERIC : hid.h
  • HID_USAGE_PAGE_KEYBOARD : hid.h
  • HID_USAGE_PAGE_LED : hid.h
  • HID_USAGE_PAGE_ORDINAL : hid.h
  • HID_USAGE_PAGE_SIMULATION : hid.h
  • HID_USAGE_PAGE_SPORT : hid.h
  • HID_USAGE_PAGE_TELEPHONY : hid.h
  • HID_USAGE_PAGE_UNDEFINED : hid.h
  • HID_USAGE_PAGE_UNICODE : hid.h
  • HID_USAGE_PAGE_VR : hid.h
  • HID_USAGE_SIMULATION_RUDDER : hid.h
  • HID_USAGE_SIMULATION_THROTTLE : hid.h
  • HID_USAGE_TELEPHONY_ANSWERING_MACHINE : hid.h
  • HID_USAGE_TELEPHONY_HANDSET : hid.h
  • HID_USAGE_TELEPHONY_HEADSET : hid.h
  • HID_USAGE_TELEPHONY_KEYPAD : hid.h
  • HID_USAGE_TELEPHONY_MESSAGE_CONTROLS : hid.h
  • HID_USAGE_TELEPHONY_PHONE : hid.h
  • HID_USAGE_TELEPHONY_PROGRAMMABLE_BUTTON : hid.h
  • HID_UsageMax : hid.h
  • HID_UsageMin : hid.h
  • HID_UsageModifier : hid.h
  • HID_UsagePage : hid.h
  • HID_UsagePageVendor : hid.h
  • HID_UsageSwitch : hid.h
  • HID_Variable : hid.h
  • HID_Volatile : hid.h
  • HID_Wrap : hid.h
  • HTONS : uip.h
  • HTTP_SEND_PAGE : easyweb.h
  • HTTPD_CGI_CALL : httpd-cgi.h
  • HTTPD_FS_NUMFILES : httpd-fsdata.c
  • HTTPD_FS_ROOT : httpd-fsdata.c
  • HTTPD_FS_STATISTICS : httpd-fs.h
  • HTTPFLAG_ERROR : webclient.c
  • HTTPFLAG_MOVED : webclient.c
  • HTTPFLAG_NONE : webclient.c
  • HTTPFLAG_OK : webclient.c
Generated on Tue Jun 7 15:00:17 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Data Fields

  • All
  • Functions
  • Variables
  • Typedefs
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  • c
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  • s
  • t
  • u
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  • x
  • y

- i -

  • I2C_I2ADR_BITMASK : lpc17xx_i2c.h
  • I2C_I2ADR_GC : lpc17xx_i2c.h
  • I2C_I2CONCLR_AAC : lpc17xx_i2c.h
  • I2C_I2CONCLR_I2ENC : lpc17xx_i2c.h
  • I2C_I2CONCLR_SIC : lpc17xx_i2c.h
  • I2C_I2CONCLR_STAC : lpc17xx_i2c.h
  • I2C_I2CONSET_AA : lpc17xx_i2c.h
  • I2C_I2CONSET_I2EN : lpc17xx_i2c.h
  • I2C_I2CONSET_SI : lpc17xx_i2c.h
  • I2C_I2CONSET_STA : lpc17xx_i2c.h
  • I2C_I2CONSET_STO : lpc17xx_i2c.h
  • I2C_I2DAT_BITMASK : lpc17xx_i2c.h
  • I2C_I2DAT_IDLE_CHAR : lpc17xx_i2c.h
  • I2C_I2MASK_MASK : lpc17xx_i2c.h
  • I2C_I2MMCTRL_BITMASK : lpc17xx_i2c.h
  • I2C_I2MMCTRL_ENA_SCL : lpc17xx_i2c.h
  • I2C_I2MMCTRL_MATCH_ALL : lpc17xx_i2c.h
  • I2C_I2MMCTRL_MM_ENA : lpc17xx_i2c.h
  • I2C_I2SCLH_BITMASK : lpc17xx_i2c.h
  • I2C_I2SCLL_BITMASK : lpc17xx_i2c.h
  • I2C_I2STAT_M_RX_ARB_LOST : lpc17xx_i2c.h
  • I2C_I2STAT_M_RX_DAT_ACK : lpc17xx_i2c.h
  • I2C_I2STAT_M_RX_DAT_NACK : lpc17xx_i2c.h
  • I2C_I2STAT_M_RX_RESTART : lpc17xx_i2c.h
  • I2C_I2STAT_M_RX_SLAR_ACK : lpc17xx_i2c.h
  • I2C_I2STAT_M_RX_SLAR_NACK : lpc17xx_i2c.h
  • I2C_I2STAT_M_RX_START : lpc17xx_i2c.h
  • I2C_I2STAT_M_TX_ARB_LOST : lpc17xx_i2c.h
  • I2C_I2STAT_M_TX_DAT_ACK : lpc17xx_i2c.h
  • I2C_I2STAT_M_TX_DAT_NACK : lpc17xx_i2c.h
  • I2C_I2STAT_M_TX_RESTART : lpc17xx_i2c.h
  • I2C_I2STAT_M_TX_SLAW_ACK : lpc17xx_i2c.h
  • I2C_I2STAT_M_TX_SLAW_NACK : lpc17xx_i2c.h
  • I2C_I2STAT_M_TX_START : lpc17xx_i2c.h
  • I2C_I2STAT_NO_INF : lpc17xx_i2c.h
  • I2C_I2STAT_S_RX_ARB_LOST_M_GENCALL : lpc17xx_i2c.h
  • I2C_I2STAT_S_RX_ARB_LOST_M_SLA : lpc17xx_i2c.h
  • I2C_I2STAT_S_RX_GENCALL_ACK : lpc17xx_i2c.h
  • I2C_I2STAT_S_RX_PRE_GENCALL_DAT_ACK : lpc17xx_i2c.h
  • I2C_I2STAT_S_RX_PRE_GENCALL_DAT_NACK : lpc17xx_i2c.h
  • I2C_I2STAT_S_RX_PRE_SLA_DAT_ACK : lpc17xx_i2c.h
  • I2C_I2STAT_S_RX_PRE_SLA_DAT_NACK : lpc17xx_i2c.h
  • I2C_I2STAT_S_RX_SLAW_ACK : lpc17xx_i2c.h
  • I2C_I2STAT_S_RX_STA_STO_SLVREC_SLVTRX : lpc17xx_i2c.h
  • I2C_I2STAT_S_TX_ARB_LOST_M_SLA : lpc17xx_i2c.h
  • I2C_I2STAT_S_TX_DAT_ACK : lpc17xx_i2c.h
  • I2C_I2STAT_S_TX_DAT_NACK : lpc17xx_i2c.h
  • I2C_I2STAT_S_TX_LAST_DAT_ACK : lpc17xx_i2c.h
  • I2C_I2STAT_S_TX_SLAR_ACK : lpc17xx_i2c.h
  • I2C_MONITOR_CFG_MATCHALL : lpc17xx_i2c.h
  • I2C_MONITOR_CFG_SCL_OUTPUT : lpc17xx_i2c.h
  • I2C_SETUP_STATUS_ARBF : lpc17xx_i2c.h
  • I2C_SETUP_STATUS_DONE : lpc17xx_i2c.h
  • I2C_SETUP_STATUS_NOACKF : lpc17xx_i2c.h
  • I2C_SLAVE_TIME_OUT : lpc17xx_i2c.h
  • I2C_STAT_CODE_BITMASK : lpc17xx_i2c.h
  • I2CDEV : i2c_monitor.c , pca8581_test.c , i2c_interrupt_test.c , i2c_polling_test.c
  • I2CDEV_M : master.c , i2c_master_slave_int_test.c
  • I2CDEV_S : slave.c , i2c_master_slave_int_test.c
  • I2CDEV_S_ADDR : master.c
  • I2CDEV_S_OWN_ADDR : i2c_master_slave_int_test.c , slave.c
  • I2DATA_BUFFER_BITMASK : lpc17xx_i2c.h
  • I2S_4PIN_DISABLE : lpc17xx_i2s.h
  • I2S_4PIN_ENABLE : lpc17xx_i2s.h
  • I2S_BUFFER_DST : i2s_irq_test.c , i2s_mclk.c , i2s_test_4_wire.c , i2s_polling.c
  • I2S_BUFFER_SRC : i2s_irq_test.c , i2s_mclk.c , i2s_test_4_wire.c , i2s_polling.c
  • I2S_CLKSEL_FRDCLK : lpc17xx_i2s.h
  • I2S_CLKSEL_MCLK : lpc17xx_i2s.h
  • I2S_DAI_MONO : lpc17xx_i2s.h
  • I2S_DAI_MUTE : lpc17xx_i2s.h
  • I2S_DAI_RESET : lpc17xx_i2s.h
  • I2S_DAI_SLAVE : lpc17xx_i2s.h
  • I2S_DAI_STOP : lpc17xx_i2s.h
  • I2S_DAI_WORDWIDTH_16 : lpc17xx_i2s.h
  • I2S_DAI_WORDWIDTH_32 : lpc17xx_i2s.h
  • I2S_DAI_WORDWIDTH_8 : lpc17xx_i2s.h
  • I2S_DAI_WS_HALFPERIOD : lpc17xx_i2s.h
  • I2S_DAO_MONO : lpc17xx_i2s.h
  • I2S_DAO_MUTE : lpc17xx_i2s.h
  • I2S_DAO_RESET : lpc17xx_i2s.h
  • I2S_DAO_SLAVE : lpc17xx_i2s.h
  • I2S_DAO_STOP : lpc17xx_i2s.h
  • I2S_DAO_WORDWIDTH_16 : lpc17xx_i2s.h
  • I2S_DAO_WORDWIDTH_32 : lpc17xx_i2s.h
  • I2S_DAO_WORDWIDTH_8 : lpc17xx_i2s.h
  • I2S_DAO_WS_HALFPERIOD : lpc17xx_i2s.h
  • I2S_DMA1_RX_DEPTH : lpc17xx_i2s.h
  • I2S_DMA1_RX_ENABLE : lpc17xx_i2s.h
  • I2S_DMA1_TX_DEPTH : lpc17xx_i2s.h
  • I2S_DMA1_TX_ENABLE : lpc17xx_i2s.h
  • I2S_DMA2_RX_DEPTH : lpc17xx_i2s.h
  • I2S_DMA2_RX_ENABLE : lpc17xx_i2s.h
  • I2S_DMA2_TX_DEPTH : lpc17xx_i2s.h
  • I2S_DMA2_TX_ENABLE : lpc17xx_i2s.h
  • I2S_DMA_1 : lpc17xx_i2s.h
  • I2S_DMA_2 : lpc17xx_i2s.h
  • I2S_IRQ_RX_DEPTH : lpc17xx_i2s.h
  • I2S_IRQ_RX_ENABLE : lpc17xx_i2s.h
  • I2S_IRQ_TX_DEPTH : lpc17xx_i2s.h
  • I2S_IRQ_TX_ENABLE : lpc17xx_i2s.h
  • I2S_MASTER_MODE : lpc17xx_i2s.h
  • I2S_MCLK_DISABLE : lpc17xx_i2s.h
  • I2S_MCLK_ENABLE : lpc17xx_i2s.h
  • I2S_MONO : lpc17xx_i2s.h
  • I2S_MUTE_DISABLE : lpc17xx_i2s.h
  • I2S_MUTE_ENABLE : lpc17xx_i2s.h
  • I2S_RECEIVE : i2s_two_kit.c
  • I2S_RESET_DISABLE : lpc17xx_i2s.h
  • I2S_RESET_ENABLE : lpc17xx_i2s.h
  • I2S_RX_MODE : lpc17xx_i2s.h
  • I2S_RXBITRATE : lpc17xx_i2s.h
  • I2S_RXMODE_4PIN_ENABLE : lpc17xx_i2s.h
  • I2S_RXMODE_CLKSEL : lpc17xx_i2s.h
  • I2S_RXMODE_MCENA : lpc17xx_i2s.h
  • I2S_RXRATE_X_DIVIDER : lpc17xx_i2s.h
  • I2S_RXRATE_Y_DIVIDER : lpc17xx_i2s.h
  • I2S_SLAVE_MODE : lpc17xx_i2s.h
  • I2S_STATE_DMA1 : lpc17xx_i2s.h
  • I2S_STATE_DMA2 : lpc17xx_i2s.h
  • I2S_STATE_IRQ : lpc17xx_i2s.h
  • I2S_STATE_RX_LEVEL : lpc17xx_i2s.h
  • I2S_STATE_TX_LEVEL : lpc17xx_i2s.h
  • I2S_STEREO : lpc17xx_i2s.h
  • I2S_STOP_DISABLE : lpc17xx_i2s.h
  • I2S_STOP_ENABLE : lpc17xx_i2s.h
  • I2S_TRANSMIT : i2s_two_kit.c
  • I2S_TX_MODE : lpc17xx_i2s.h
  • I2S_TXBITRATE : lpc17xx_i2s.h
  • I2S_TXMODE_4PIN_ENABLE : lpc17xx_i2s.h
  • I2S_TXMODE_CLKSEL : lpc17xx_i2s.h
  • I2S_TXMODE_MCENA : lpc17xx_i2s.h
  • I2S_TXRATE_X_DIVIDER : lpc17xx_i2s.h
  • I2S_TXRATE_Y_DIVIDER : lpc17xx_i2s.h
  • I2S_WORDWIDTH_16 : lpc17xx_i2s.h
  • I2S_WORDWIDTH_32 : lpc17xx_i2s.h
  • I2S_WORDWIDTH_8 : lpc17xx_i2s.h
  • IAR_LPC_1768 : wdt_reset_test.c , privilege.c , extint_sleep.c
  • ICMP6_ECHO : uip.c
  • ICMP6_ECHO_REPLY : uip.c
  • ICMP6_FLAG_S : uip.c
  • ICMP6_NEIGHBOR_ADVERTISEMENT : uip.c
  • ICMP6_NEIGHBOR_SOLICITATION : uip.c
  • ICMP6_OPTION_SOURCE_LINK_ADDRESS : uip.c
  • ICMP6_OPTION_TARGET_LINK_ADDRESS : uip.c
  • ICMP_CHKSUM_OFS : tcpip.h
  • ICMP_DATA_OFS : tcpip.h
  • ICMP_ECHO : tcpip.h , uip-fw.c , uip.c
  • ICMP_ECHO_REPLY : tcpip.h , uip.c
  • ICMP_HEADER_SIZE : tcpip.h
  • ICMP_TE : uip-fw.c
  • ICMP_TYPE_CODE_OFS : tcpip.h
  • ICMPBUF : uip-fw.c , uip.c
  • ID_11 : lpc17xx_can.h
  • IDLE_CHAR : spi_interrupt_test.c , microwire_test.c , sc16is750_int.c , ti_test.c
  • INAK_BI : usbreg.h
  • INAK_BO : usbreg.h
  • INAK_CI : usbreg.h
  • INAK_CO : usbreg.h
  • INAK_II : usbreg.h
  • INAK_IO : usbreg.h
  • INT3_LED : gpio_int.c
  • INT_MODE : nvic_priority.c
  • InterruptType : core_cm3.h
  • IntType_ACTLR_DISDEFWBUF_Msk : core_cm3.h
  • IntType_ACTLR_DISDEFWBUF_Pos : core_cm3.h
  • IntType_ACTLR_DISFOLD_Msk : core_cm3.h
  • IntType_ACTLR_DISFOLD_Pos : core_cm3.h
  • IntType_ACTLR_DISMCYCINT_Msk : core_cm3.h
  • IntType_ACTLR_DISMCYCINT_Pos : core_cm3.h
  • IntType_ICTR_INTLINESNUM_Msk : core_cm3.h
  • IntType_ICTR_INTLINESNUM_Pos : core_cm3.h
  • IOCON : i2c_interrupt_test.c , i2c_polling_test.c
  • IODIR : i2c_interrupt_test.c , i2c_polling_test.c
  • IOSTATE : i2c_interrupt_test.c , i2c_polling_test.c
  • IP_ADDR_RESOLVED : tcpip.h
  • IP_DATA_OFS : tcpip.h
  • IP_DESTINATION_OFS : tcpip.h
  • IP_FLAG_DONTFRAG : tcpip.h
  • IP_FLAG_MOREFRAG : tcpip.h
  • IP_FLAGS_FRAG_OFS : tcpip.h
  • IP_FRAGOFS_MASK : tcpip.h
  • IP_HEAD_CHKSUM_OFS : tcpip.h
  • IP_HEADER_SIZE : tcpip.h
  • IP_HLEN_PLEN : tcpip.h
  • IP_IDENT_OFS : tcpip.h
  • IP_SOURCE_OFS : tcpip.h
  • IP_TOS_D : tcpip.h
  • IP_TOS_R : tcpip.h
  • IP_TOS_T : tcpip.h
  • IP_TOTAL_LENGTH_OFS : tcpip.h
  • IP_TTL_PROT_OFS : tcpip.h
  • IP_VER_IHL : tcpip.h
  • IP_VER_IHL_TOS_OFS : tcpip.h
  • IPBUF : uip_arp.c
  • IRC_OSC : system_LPC17xx.c
  • ISO_2 : smtp.c
  • ISO_3 : smtp.c
  • ISO_4 : smtp.c
  • ISO_5 : smtp.c
  • ISO_bang : httpd.c
  • ISO_colon : httpd.c
  • ISO_cr : telnetd.c , webclient.c , smtp.c
  • ISO_nl : httpd.c , telnetd.c , webclient.c , smtp.c
  • ISO_percent : httpd.c
  • ISO_period : httpd.c , smtp.c
  • ISO_slash : httpd.c
  • ISO_space : httpd.c , webclient.c
  • ITM : core_cm3.h
  • ITM_BASE : core_cm3.h
  • ITM_IMCR_INTEGRATION_Msk : core_cm3.h
  • ITM_IMCR_INTEGRATION_Pos : core_cm3.h
  • ITM_IRR_ATREADYM_Msk : core_cm3.h
  • ITM_IRR_ATREADYM_Pos : core_cm3.h
  • ITM_IWR_ATVALIDM_Msk : core_cm3.h
  • ITM_IWR_ATVALIDM_Pos : core_cm3.h
  • ITM_LSR_Access_Msk : core_cm3.h
  • ITM_LSR_Access_Pos : core_cm3.h
  • ITM_LSR_ByteAcc_Msk : core_cm3.h
  • ITM_LSR_ByteAcc_Pos : core_cm3.h
  • ITM_LSR_Present_Msk : core_cm3.h
  • ITM_LSR_Present_Pos : core_cm3.h
  • ITM_RXBUFFER_EMPTY : core_cm3.h
  • ITM_TCR_ATBID_Msk : core_cm3.h
  • ITM_TCR_ATBID_Pos : core_cm3.h
  • ITM_TCR_BUSY_Msk : core_cm3.h
  • ITM_TCR_BUSY_Pos : core_cm3.h
  • ITM_TCR_DWTENA_Msk : core_cm3.h
  • ITM_TCR_DWTENA_Pos : core_cm3.h
  • ITM_TCR_ITMENA_Msk : core_cm3.h
  • ITM_TCR_ITMENA_Pos : core_cm3.h
  • ITM_TCR_SWOENA_Msk : core_cm3.h
  • ITM_TCR_SWOENA_Pos : core_cm3.h
  • ITM_TCR_SYNCENA_Msk : core_cm3.h
  • ITM_TCR_SYNCENA_Pos : core_cm3.h
  • ITM_TCR_TSENA_Msk : core_cm3.h
  • ITM_TCR_TSENA_Pos : core_cm3.h
  • ITM_TCR_TSPrescale_Msk : core_cm3.h
  • ITM_TCR_TSPrescale_Pos : core_cm3.h
  • ITM_TPR_PRIVMASK_Msk : core_cm3.h
  • ITM_TPR_PRIVMASK_Pos : core_cm3.h
Generated on Tue Jun 7 15:00:17 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Data Fields

  • All
  • Functions
  • Variables
  • Typedefs
  • Enumerations
  • Enumerator
  • Defines
  • _
  • a
  • b
  • c
  • d
  • e
  • f
  • g
  • h
  • i
  • k
  • l
  • m
  • n
  • o
  • p
  • q
  • r
  • s
  • t
  • u
  • v
  • w
  • x
  • y

- p -

  • P_C : usbaudio.h
  • P_EP : usbuser.c
  • P_S : usbaudio.h
  • PAD_RIGHT : printf-stdarg.c
  • PAD_ZERO : printf-stdarg.c
  • PARAM_ADC_CHANNEL_SELECTION : lpc17xx_adc.h
  • PARAM_ADC_DATA_STATUS : lpc17xx_adc.h
  • PARAM_ADC_RATE : lpc17xx_adc.h
  • PARAM_ADC_START_ON_EDGE_OPT : lpc17xx_adc.h
  • PARAM_ADC_START_OPT : lpc17xx_adc.h
  • PARAM_ADC_TYPE_INT_OPT : lpc17xx_adc.h
  • PARAM_ADCx : lpc17xx_adc.h
  • PARAM_AFLUT_ENTRY_TYPE : lpc17xx_can.h
  • PARAM_AFMODE_TYPE : lpc17xx_can.h
  • PARAM_CANAFRAMx : lpc17xx_can.h
  • PARAM_CANAFx : lpc17xx_can.h
  • PARAM_CANCRx : lpc17xx_can.h
  • PARAM_CANx : lpc17xx_can.h
  • PARAM_CR_STS_TYPE : lpc17xx_can.h
  • PARAM_CTRL : lpc17xx_can.h
  • PARAM_CTRL_STS_TYPE : lpc17xx_can.h
  • PARAM_DAC_CURRENT_OPT : lpc17xx_dac.h
  • PARAM_DACx : lpc17xx_dac.h
  • PARAM_DLC : lpc17xx_can.h
  • PARAM_FRAME_TYPE : lpc17xx_can.h
  • PARAM_FULLCAN_IC : lpc17xx_can.h
  • PARAM_FUNCTIONALSTATE : lpc_types.h
  • PARAM_GPDMA_BSIZE : lpc17xx_gpdma.h
  • PARAM_GPDMA_CHANNEL : lpc17xx_gpdma.h
  • PARAM_GPDMA_CONN : lpc17xx_gpdma.h
  • PARAM_GPDMA_REQSEL : lpc17xx_gpdma.h
  • PARAM_GPDMA_STAT : lpc17xx_gpdma.h
  • PARAM_GPDMA_STATCLR : lpc17xx_gpdma.h
  • PARAM_GPDMA_TRANSFERTYPE : lpc17xx_gpdma.h
  • PARAM_GPDMA_WIDTH : lpc17xx_gpdma.h
  • PARAM_GRP_ID : lpc17xx_can.h
  • PARAM_I2C_MONITOR_CFG : lpc17xx_i2c.h
  • PARAM_I2C_SLAVEADDR_CH : lpc17xx_i2c.h
  • PARAM_I2Cx : lpc17xx_i2c.h
  • PARAM_I2S_4PIN : lpc17xx_i2s.h
  • PARAM_I2S_BITRATE : lpc17xx_i2s.h
  • PARAM_I2S_CHANNEL : lpc17xx_i2s.h
  • PARAM_I2S_CLKSEL : lpc17xx_i2s.h
  • PARAM_I2S_DATA : lpc17xx_can.h
  • PARAM_I2S_DMA : lpc17xx_i2s.h
  • PARAM_I2S_DMA_DEPTH : lpc17xx_i2s.h
  • PARAM_I2S_HALFPERIOD : lpc17xx_i2s.h
  • PARAM_I2S_IRQ_LEVEL : lpc17xx_i2s.h
  • PARAM_I2S_MCLK : lpc17xx_i2s.h
  • PARAM_I2S_MUTE : lpc17xx_i2s.h
  • PARAM_I2S_RESET : lpc17xx_i2s.h
  • PARAM_I2S_STOP : lpc17xx_i2s.h
  • PARAM_I2S_TRX : lpc17xx_i2s.h
  • PARAM_I2S_WORDWIDTH : lpc17xx_i2s.h
  • PARAM_I2S_WS_SEL : lpc17xx_i2s.h
  • PARAM_I2Sx : lpc17xx_i2s.h
  • PARAM_ID_11 : lpc17xx_can.h
  • PARAM_ID_29 : lpc17xx_can.h
  • PARAM_ID_FORMAT : lpc17xx_can.h
  • PARAM_INT_EN_TYPE : lpc17xx_can.h
  • PARAM_MODE_TYPE : lpc17xx_can.h
  • PARAM_MSG_DISABLE : lpc17xx_can.h
  • PARAM_POSITION : lpc17xx_can.h
  • PARAM_PWM1_CAPTURE_CHANNEL : lpc17xx_pwm.h
  • PARAM_PWM1_CHANNEL : lpc17xx_pwm.h
  • PARAM_PWM1_EDGE_MODE_CHANNEL : lpc17xx_pwm.h
  • PARAM_PWM1_MATCH_CHANNEL : lpc17xx_pwm.h
  • PARAM_PWM_CHANNEL_EDGE : lpc17xx_pwm.h
  • PARAM_PWM_COUNTER_EDGE : lpc17xx_pwm.h
  • PARAM_PWM_COUNTER_INPUTSEL : lpc17xx_pwm.h
  • PARAM_PWM_INTSTAT : lpc17xx_pwm.h
  • PARAM_PWM_MATCH_UPDATE : lpc17xx_pwm.h
  • PARAM_PWM_TC_MODE : lpc17xx_pwm.h
  • PARAM_PWM_TIMER_PRESCALE : lpc17xx_pwm.h
  • PARAM_PWMx : lpc17xx_pwm.h
  • PARAM_QEI_CAPMODE : lpc17xx_qei.h
  • PARAM_QEI_COMPPOS_CH : lpc17xx_qei.h
  • PARAM_QEI_DIRINV : lpc17xx_qei.h
  • PARAM_QEI_INTFLAG : lpc17xx_qei.h
  • PARAM_QEI_INVINX : lpc17xx_qei.h
  • PARAM_QEI_RESET : lpc17xx_qei.h
  • PARAM_QEI_SIGNALMODE : lpc17xx_qei.h
  • PARAM_QEI_STATUS : lpc17xx_qei.h
  • PARAM_QEI_TIMERRELOAD : lpc17xx_qei.h
  • PARAM_QEIx : lpc17xx_qei.h
  • PARAM_RITx : lpc17xx_rit.h
  • PARAM_RTC_CALIB_DIR : lpc17xx_rtc.h
  • PARAM_RTC_GPREG_CH : lpc17xx_rtc.h
  • PARAM_RTC_INT : lpc17xx_rtc.h
  • PARAM_RTC_TIMETYPE : lpc17xx_rtc.h
  • PARAM_RTCx : lpc17xx_rtc.h
  • PARAM_SETSTATE : lpc_types.h
  • PARAM_SPI_CPHA : lpc17xx_spi.h
  • PARAM_SPI_CPOL : lpc17xx_spi.h
  • PARAM_SPI_DATA_ORDER : lpc17xx_spi.h
  • PARAM_SPI_DATABIT : lpc17xx_spi.h
  • PARAM_SPI_MODE : lpc17xx_spi.h
  • PARAM_SPI_STAT : lpc17xx_spi.h
  • PARAM_SPIx : lpc17xx_spi.h
  • PARAM_SSP_CPHA : lpc17xx_ssp.h
  • PARAM_SSP_CPOL : lpc17xx_ssp.h
  • PARAM_SSP_DATABIT : lpc17xx_ssp.h
  • PARAM_SSP_DMA : lpc17xx_ssp.h
  • PARAM_SSP_FRAME : lpc17xx_ssp.h
  • PARAM_SSP_INTCFG : lpc17xx_ssp.h
  • PARAM_SSP_INTCLR : lpc17xx_ssp.h
  • PARAM_SSP_INTSTAT : lpc17xx_ssp.h
  • PARAM_SSP_INTSTAT_RAW : lpc17xx_ssp.h
  • PARAM_SSP_MODE : lpc17xx_ssp.h
  • PARAM_SSP_STAT : lpc17xx_ssp.h
  • PARAM_SSPx : lpc17xx_ssp.h
  • PARAM_TIM_CAP_MODE_OPT : lpc17xx_timer.h
  • PARAM_TIM_COUNTER_INPUT_OPT : lpc17xx_timer.h
  • PARAM_TIM_EXTMATCH_OPT : lpc17xx_timer.h
  • PARAM_TIM_INT_TYPE : lpc17xx_timer.h
  • PARAM_TIM_MODE_OPT : lpc17xx_timer.h
  • PARAM_TIM_PRESCALE_OPT : lpc17xx_timer.h
  • PARAM_TIMx : lpc17xx_timer.h
  • PARAM_UART1_INTCFG : lpc17xx_uart.h
  • PARAM_UART1_MODEM : lpc17xx_uart.h
  • PARAM_UART1_MODEM_MODE : lpc17xx_uart.h
  • PARAM_UART1_MODEM_PIN : lpc17xx_uart.h
  • PARAM_UART1_RS485_CFG_DELAYVALUE : lpc17xx_uart.h
  • PARAM_UART1_RS485_CFG_MATCHADDRVALUE : lpc17xx_uart.h
  • PARAM_UART1_SIGNALSTATE : lpc17xx_uart.h
  • PARAM_UART_AUTOBAUD_INTSTAT : lpc17xx_uart.h
  • PARAM_UART_AUTOBAUD_MODE : lpc17xx_uart.h
  • PARAM_UART_DATABIT : lpc17xx_uart.h
  • PARAM_UART_FIFO_LEVEL : lpc17xx_uart.h
  • PARAM_UART_INTCFG : lpc17xx_uart.h
  • PARAM_UART_IrDA : lpc17xx_uart.h
  • PARAM_UART_IrDA_PULSEDIV : lpc17xx_uart.h
  • PARAM_UART_PARITY : lpc17xx_uart.h
  • PARAM_UART_RS485_DIRCTRL_PIN : lpc17xx_uart.h
  • PARAM_UART_STOPBIT : lpc17xx_uart.h
  • PARAM_UARTx : lpc17xx_uart.h
  • PARAM_WDT_CLK_OPT : lpc17xx_wdt.h
  • PARAM_WDT_MODE_OPT : lpc17xx_wdt.h
  • PBINT : demo.h
  • PCA8581_SLVADDR : pca8581_test.c
  • PCF8833_ST_ADDR_MODE : drv_glcd.h
  • PCF8833_ST_ALL_PIXELS_OFF : drv_glcd.h
  • PCF8833_ST_ALL_PIXELS_ON : drv_glcd.h
  • PCF8833_ST_BOOSTER_ON : drv_glcd.h
  • PCF8833_ST_DISPLAY_MODE : drv_glcd.h
  • PCF8833_ST_IDLE_MODE : drv_glcd.h
  • PCF8833_ST_INV_MODE : drv_glcd.h
  • PCF8833_ST_LINE_ADDR_ORD : drv_glcd.h
  • PCF8833_ST_NORM_MODE : drv_glcd.h
  • PCF8833_ST_PARTIAL_MODE : drv_glcd.h
  • PCF8833_ST_PIXEL_FORM : drv_glcd.h
  • PCF8833_ST_RGB_ORD : drv_glcd.h
  • PCF8833_ST_SLEEP_MODE : drv_glcd.h
  • PCF8833_ST_TEARING_MODE : drv_glcd.h
  • PCF8833_ST_V_SCROLL_MODE : drv_glcd.h
  • PCF8833_ST_X_ADDR_ODR : drv_glcd.h
  • PCF8833_ST_Y_ADDR_ODR : drv_glcd.h
  • PCLK_DAC_IN_MHZ : dac_sinewave_test.c , dac_wave_generate.c
  • PCLKSEL0_Val : system_LPC17xx.c
  • PCLKSEL1_Val : system_LPC17xx.c
  • PCONP_Val : system_LPC17xx.c
  • PD_LED_PIN : emactest.c
  • PERI_ADDRESS : bitband.c
  • PERI_BIT : bitband.c
  • PHASE_A_PIN : qei_test_velo.c
  • PHASE_B_PIN : qei_test_velo.c
  • PHY_TO : emac.h
  • PIN_CS : GLCD_SPI_LPC1700.c
  • PINSEL_FUNC_0 : lpc17xx_pinsel.h
  • PINSEL_FUNC_1 : lpc17xx_pinsel.h
  • PINSEL_FUNC_2 : lpc17xx_pinsel.h
  • PINSEL_FUNC_3 : lpc17xx_pinsel.h
  • PINSEL_I2C_Fast_Mode : lpc17xx_pinsel.h
  • PINSEL_I2C_Normal_Mode : lpc17xx_pinsel.h
  • PINSEL_I2CPADCFG_SCLDRV0 : lpc17xx_pinsel.h
  • PINSEL_I2CPADCFG_SCLI2C0 : lpc17xx_pinsel.h
  • PINSEL_I2CPADCFG_SDADRV0 : lpc17xx_pinsel.h
  • PINSEL_I2CPADCFG_SDAI2C0 : lpc17xx_pinsel.h
  • PINSEL_PIN_0 : lpc17xx_pinsel.h
  • PINSEL_PIN_1 : lpc17xx_pinsel.h
  • PINSEL_PIN_10 : lpc17xx_pinsel.h
  • PINSEL_PIN_11 : lpc17xx_pinsel.h
  • PINSEL_PIN_12 : lpc17xx_pinsel.h
  • PINSEL_PIN_13 : lpc17xx_pinsel.h
  • PINSEL_PIN_14 : lpc17xx_pinsel.h
  • PINSEL_PIN_15 : lpc17xx_pinsel.h
  • PINSEL_PIN_16 : lpc17xx_pinsel.h
  • PINSEL_PIN_17 : lpc17xx_pinsel.h
  • PINSEL_PIN_18 : lpc17xx_pinsel.h
  • PINSEL_PIN_19 : lpc17xx_pinsel.h
  • PINSEL_PIN_2 : lpc17xx_pinsel.h
  • PINSEL_PIN_20 : lpc17xx_pinsel.h
  • PINSEL_PIN_21 : lpc17xx_pinsel.h
  • PINSEL_PIN_22 : lpc17xx_pinsel.h
  • PINSEL_PIN_23 : lpc17xx_pinsel.h
  • PINSEL_PIN_24 : lpc17xx_pinsel.h
  • PINSEL_PIN_25 : lpc17xx_pinsel.h
  • PINSEL_PIN_26 : lpc17xx_pinsel.h
  • PINSEL_PIN_27 : lpc17xx_pinsel.h
  • PINSEL_PIN_28 : lpc17xx_pinsel.h
  • PINSEL_PIN_29 : lpc17xx_pinsel.h
  • PINSEL_PIN_3 : lpc17xx_pinsel.h
  • PINSEL_PIN_30 : lpc17xx_pinsel.h
  • PINSEL_PIN_31 : lpc17xx_pinsel.h
  • PINSEL_PIN_4 : lpc17xx_pinsel.h
  • PINSEL_PIN_5 : lpc17xx_pinsel.h
  • PINSEL_PIN_6 : lpc17xx_pinsel.h
  • PINSEL_PIN_7 : lpc17xx_pinsel.h
  • PINSEL_PIN_8 : lpc17xx_pinsel.h
  • PINSEL_PIN_9 : lpc17xx_pinsel.h
  • PINSEL_PINMODE_NORMAL : lpc17xx_pinsel.h
  • PINSEL_PINMODE_OPENDRAIN : lpc17xx_pinsel.h
  • PINSEL_PINMODE_PULLDOWN : lpc17xx_pinsel.h
  • PINSEL_PINMODE_PULLUP : lpc17xx_pinsel.h
  • PINSEL_PINMODE_TRISTATE : lpc17xx_pinsel.h
  • PINSEL_PORT_0 : lpc17xx_pinsel.h
  • PINSEL_PORT_1 : lpc17xx_pinsel.h
  • PINSEL_PORT_2 : lpc17xx_pinsel.h
  • PINSEL_PORT_3 : lpc17xx_pinsel.h
  • PINSEL_PORT_4 : lpc17xx_pinsel.h
  • PIXEL_CONV : drv_glcd.h
  • PKT_DV : usbreg.h
  • PKT_LNGTH_MASK : usbreg.h
  • PKT_RDY : usbreg.h
  • PLL0_SETUP : system_LPC17xx.c
  • PLL0CFG_Val : system_LPC17xx.c
  • PLL1_SETUP : system_LPC17xx.c
  • PLL1CFG_Val : system_LPC17xx.c
  • POLL_LED : gpio_int.c , adc_burst_test.c
  • PORT_NUM : serial.h
  • PRAM_I2S_FREQ : lpc17xx_i2s.h , lpc17xx_can.h
  • PRINT_BUF_LEN : printf-stdarg.c
  • PRIVILEGE_LED : privilege.c
  • PRIVILEGE_LEDPORT : privilege.c
  • PROT_ICMP : tcpip.h
  • PROT_TCP : tcpip.h
  • PROT_UDP : tcpip.h
  • PSOCK_BEGIN : psock.h
  • PSOCK_CLOSE : psock.h
  • PSOCK_CLOSE_EXIT : psock.h
  • PSOCK_DATALEN : psock.h
  • PSOCK_END : psock.h
  • PSOCK_EXIT : psock.h
  • PSOCK_GENERATOR_SEND : psock.h
  • PSOCK_INIT : psock.h
  • PSOCK_NEWDATA : psock.h
  • PSOCK_READBUF : psock.h
  • PSOCK_READTO : psock.h
  • PSOCK_SEND : psock.h
  • PSOCK_SEND_STR : psock.h
  • PSOCK_WAIT_THREAD : psock.h
  • PSOCK_WAIT_UNTIL : psock.h
  • PT_BEGIN : pt.h
  • PT_END : pt.h
  • PT_ENDED : pt.h
  • PT_EXIT : pt.h
  • PT_EXITED : pt.h
  • PT_INIT : pt.h
  • PT_RESTART : pt.h
  • PT_SCHEDULE : pt.h
  • PT_SPAWN : pt.h
  • PT_THREAD : pt.h
  • PT_WAIT_THREAD : pt.h
  • PT_WAIT_UNTIL : pt.h
  • PT_WAIT_WHILE : pt.h
  • PT_WAITING : pt.h
  • PT_YIELD : pt.h
  • PT_YIELD_UNTIL : pt.h
  • PT_YIELDED : pt.h
  • Purple : GLCD.h
  • putchar : printf-stdarg.c
  • PWM_CCR_BITMASK : lpc17xx_pwm.h
  • PWM_CCR_CAP_FALLING : lpc17xx_pwm.h
  • PWM_CCR_CAP_RISING : lpc17xx_pwm.h
  • PWM_CCR_INT_ON_CAP : lpc17xx_pwm.h
  • PWM_CTCR_BITMASK : lpc17xx_pwm.h
  • PWM_CTCR_MODE : lpc17xx_pwm.h
  • PWM_CTCR_SELECT_INPUT : lpc17xx_pwm.h
  • PWM_IR_BITMASK : lpc17xx_pwm.h
  • PWM_IR_PWMCAPn : lpc17xx_pwm.h
  • PWM_IR_PWMMRn : lpc17xx_pwm.h
  • PWM_LER_BITMASK : lpc17xx_pwm.h
  • PWM_LER_EN_MATCHn_LATCH : lpc17xx_pwm.h
  • PWM_MCR_BITMASK : lpc17xx_pwm.h
  • PWM_MCR_INT_ON_MATCH : lpc17xx_pwm.h
  • PWM_MCR_RESET_ON_MATCH : lpc17xx_pwm.h
  • PWM_MCR_STOP_ON_MATCH : lpc17xx_pwm.h
  • PWM_PCR_BITMASK : lpc17xx_pwm.h
  • PWM_PCR_PWMENAn : lpc17xx_pwm.h
  • PWM_PCR_PWMSELn : lpc17xx_pwm.h
  • PWM_TCR_BITMASK : lpc17xx_pwm.h
  • PWM_TCR_COUNTER_ENABLE : lpc17xx_pwm.h
  • PWM_TCR_COUNTER_RESET : lpc17xx_pwm.h
  • PWM_TCR_PWM_ENABLE : lpc17xx_pwm.h
Generated on Tue Jun 7 15:00:17 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Data Fields

  • All
  • Functions
  • Variables
  • Typedefs
  • Enumerations
  • Enumerator
  • Defines
  • _
  • a
  • b
  • c
  • d
  • e
  • f
  • g
  • h
  • i
  • k
  • l
  • m
  • n
  • o
  • p
  • q
  • r
  • s
  • t
  • u
  • v
  • w
  • x
  • y

- q -

  • QEI_CAPMODE_2X : lpc17xx_qei.h
  • QEI_CAPMODE_4X : lpc17xx_qei.h
  • QEI_COMPPOS_CH_0 : lpc17xx_qei.h
  • QEI_COMPPOS_CH_1 : lpc17xx_qei.h
  • QEI_COMPPOS_CH_2 : lpc17xx_qei.h
  • QEI_CON_BITMASK : lpc17xx_qei.h
  • QEI_CON_RESI : lpc17xx_qei.h
  • QEI_CON_RESP : lpc17xx_qei.h
  • QEI_CON_RESPI : lpc17xx_qei.h
  • QEI_CON_RESV : lpc17xx_qei.h
  • QEI_CONF_BITMASK : lpc17xx_qei.h
  • QEI_CONF_CAPMODE : lpc17xx_qei.h
  • QEI_CONF_DIRINV : lpc17xx_qei.h
  • QEI_CONF_INVINX : lpc17xx_qei.h
  • QEI_CONF_SIGMODE : lpc17xx_qei.h
  • QEI_DIRINV_CMPL : lpc17xx_qei.h
  • QEI_DIRINV_NONE : lpc17xx_qei.h
  • QEI_IECLR_BITMASK : lpc17xx_qei.h
  • QEI_IECLR_DIR_Int : lpc17xx_qei.h
  • QEI_IECLR_ENCLK_Int : lpc17xx_qei.h
  • QEI_IECLR_ERR_Int : lpc17xx_qei.h
  • QEI_IECLR_INX_Int : lpc17xx_qei.h
  • QEI_IECLR_POS0_Int : lpc17xx_qei.h
  • QEI_IECLR_POS0REV_Int : lpc17xx_qei.h
  • QEI_IECLR_POS1_Int : lpc17xx_qei.h
  • QEI_IECLR_POS1REV_Int : lpc17xx_qei.h
  • QEI_IECLR_POS2_Int : lpc17xx_qei.h
  • QEI_IECLR_POS2REV_Int : lpc17xx_qei.h
  • QEI_IECLR_REV_Int : lpc17xx_qei.h
  • QEI_IECLR_TIM_Int : lpc17xx_qei.h
  • QEI_IECLR_VELC_Int : lpc17xx_qei.h
  • QEI_IESET_BITMASK : lpc17xx_qei.h
  • QEI_IESET_DIR_Int : lpc17xx_qei.h
  • QEI_IESET_ENCLK_Int : lpc17xx_qei.h
  • QEI_IESET_ERR_Int : lpc17xx_qei.h
  • QEI_IESET_INX_Int : lpc17xx_qei.h
  • QEI_IESET_POS0_Int : lpc17xx_qei.h
  • QEI_IESET_POS0REV_Int : lpc17xx_qei.h
  • QEI_IESET_POS1_Int : lpc17xx_qei.h
  • QEI_IESET_POS1REV_Int : lpc17xx_qei.h
  • QEI_IESET_POS2_Int : lpc17xx_qei.h
  • QEI_IESET_POS2REV_Int : lpc17xx_qei.h
  • QEI_IESET_REV_Int : lpc17xx_qei.h
  • QEI_IESET_TIM_Int : lpc17xx_qei.h
  • QEI_IESET_VELC_Int : lpc17xx_qei.h
  • QEI_INTCLR_BITMASK : lpc17xx_qei.h
  • QEI_INTCLR_DIR_Int : lpc17xx_qei.h
  • QEI_INTCLR_ENCLK_Int : lpc17xx_qei.h
  • QEI_INTCLR_ERR_Int : lpc17xx_qei.h
  • QEI_INTCLR_INX_Int : lpc17xx_qei.h
  • QEI_INTCLR_POS0_Int : lpc17xx_qei.h
  • QEI_INTCLR_POS0REV_Int : lpc17xx_qei.h
  • QEI_INTCLR_POS1_Int : lpc17xx_qei.h
  • QEI_INTCLR_POS1REV_Int : lpc17xx_qei.h
  • QEI_INTCLR_POS2_Int : lpc17xx_qei.h
  • QEI_INTCLR_POS2REV_Int : lpc17xx_qei.h
  • QEI_INTCLR_REV_Int : lpc17xx_qei.h
  • QEI_INTCLR_TIM_Int : lpc17xx_qei.h
  • QEI_INTCLR_VELC_Int : lpc17xx_qei.h
  • QEI_INTEN_BITMASK : lpc17xx_qei.h
  • QEI_INTEN_DIR_Int : lpc17xx_qei.h
  • QEI_INTEN_ENCLK_Int : lpc17xx_qei.h
  • QEI_INTEN_ERR_Int : lpc17xx_qei.h
  • QEI_INTEN_INX_Int : lpc17xx_qei.h
  • QEI_INTEN_POS0_Int : lpc17xx_qei.h
  • QEI_INTEN_POS0REV_Int : lpc17xx_qei.h
  • QEI_INTEN_POS1_Int : lpc17xx_qei.h
  • QEI_INTEN_POS1REV_Int : lpc17xx_qei.h
  • QEI_INTEN_POS2_Int : lpc17xx_qei.h
  • QEI_INTEN_POS2REV_Int : lpc17xx_qei.h
  • QEI_INTEN_REV_Int : lpc17xx_qei.h
  • QEI_INTEN_TIM_Int : lpc17xx_qei.h
  • QEI_INTEN_VELC_Int : lpc17xx_qei.h
  • QEI_INTFLAG_DIR_Int : lpc17xx_qei.h
  • QEI_INTFLAG_ENCLK_Int : lpc17xx_qei.h
  • QEI_INTFLAG_ERR_Int : lpc17xx_qei.h
  • QEI_INTFLAG_INX_Int : lpc17xx_qei.h
  • QEI_INTFLAG_POS0_Int : lpc17xx_qei.h
  • QEI_INTFLAG_POS0REV_Int : lpc17xx_qei.h
  • QEI_INTFLAG_POS1_Int : lpc17xx_qei.h
  • QEI_INTFLAG_POS1REV_Int : lpc17xx_qei.h
  • QEI_INTFLAG_POS2_Int : lpc17xx_qei.h
  • QEI_INTFLAG_POS2REV_Int : lpc17xx_qei.h
  • QEI_INTFLAG_REV_Int : lpc17xx_qei.h
  • QEI_INTFLAG_TIM_Int : lpc17xx_qei.h
  • QEI_INTFLAG_VELC_Int : lpc17xx_qei.h
  • QEI_INTSET_BITMASK : lpc17xx_qei.h
  • QEI_INTSET_DIR_Int : lpc17xx_qei.h
  • QEI_INTSET_ENCLK_Int : lpc17xx_qei.h
  • QEI_INTSET_ERR_Int : lpc17xx_qei.h
  • QEI_INTSET_INX_Int : lpc17xx_qei.h
  • QEI_INTSET_POS0_Int : lpc17xx_qei.h
  • QEI_INTSET_POS0REV_Int : lpc17xx_qei.h
  • QEI_INTSET_POS1_Int : lpc17xx_qei.h
  • QEI_INTSET_POS1REV_Int : lpc17xx_qei.h
  • QEI_INTSET_POS2_Int : lpc17xx_qei.h
  • QEI_INTSET_POS2REV_Int : lpc17xx_qei.h
  • QEI_INTSET_REV_Int : lpc17xx_qei.h
  • QEI_INTSET_TIM_Int : lpc17xx_qei.h
  • QEI_INTSET_VELC_Int : lpc17xx_qei.h
  • QEI_INTSTAT_BITMASK : lpc17xx_qei.h
  • QEI_INTSTAT_DIR_Int : lpc17xx_qei.h
  • QEI_INTSTAT_ENCLK_Int : lpc17xx_qei.h
  • QEI_INTSTAT_ERR_Int : lpc17xx_qei.h
  • QEI_INTSTAT_INX_Int : lpc17xx_qei.h
  • QEI_INTSTAT_POS0_Int : lpc17xx_qei.h
  • QEI_INTSTAT_POS0REV_Int : lpc17xx_qei.h
  • QEI_INTSTAT_POS1_Int : lpc17xx_qei.h
  • QEI_INTSTAT_POS1REV_Int : lpc17xx_qei.h
  • QEI_INTSTAT_POS2_Int : lpc17xx_qei.h
  • QEI_INTSTAT_POS2REV_Int : lpc17xx_qei.h
  • QEI_INTSTAT_REV_Int : lpc17xx_qei.h
  • QEI_INTSTAT_TIM_Int : lpc17xx_qei.h
  • QEI_INTSTAT_VELC_Int : lpc17xx_qei.h
  • QEI_INVINX_EN : lpc17xx_qei.h
  • QEI_INVINX_NONE : lpc17xx_qei.h
  • QEI_RESET_IDX : lpc17xx_qei.h
  • QEI_RESET_POS : lpc17xx_qei.h
  • QEI_RESET_POSOnIDX : lpc17xx_qei.h
  • QEI_RESET_VEL : lpc17xx_qei.h
  • QEI_SIGNALMODE_CLKDIR : lpc17xx_qei.h
  • QEI_SIGNALMODE_QUAD : lpc17xx_qei.h
  • QEI_STAT_BITMASK : lpc17xx_qei.h
  • QEI_STAT_DIR : lpc17xx_qei.h
  • QEI_STATUS_DIR : lpc17xx_qei.h
  • QEI_TIMERRELOAD_TICKVAL : lpc17xx_qei.h
  • QEI_TIMERRELOAD_USVAL : lpc17xx_qei.h
Generated on Tue Jun 7 15:00:17 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Data Fields

  • All
  • Functions
  • Variables
  • Typedefs
  • Enumerations
  • Enumerator
  • Defines
  • _
  • a
  • b
  • c
  • d
  • e
  • f
  • g
  • h
  • i
  • k
  • l
  • m
  • n
  • o
  • p
  • q
  • r
  • s
  • t
  • u
  • v
  • w
  • x
  • y

- r -

  • R1_ADDR_ERR : spi_sdcard.c
  • R1_CRC_ERR : spi_sdcard.c
  • R1_ERASE : spi_sdcard.c
  • R1_ERASE_SEQ : spi_sdcard.c
  • R1_IDLE : spi_sdcard.c
  • R1_ILLEGAL : spi_sdcard.c
  • R1_NOERROR : spi_sdcard.c
  • R1_PARAM_ERR : spi_sdcard.c
  • R2_CTRL_ERR : spi_sdcard.c
  • R2_ECC_FAIL : spi_sdcard.c
  • R2_ERASE_PARAM : spi_sdcard.c
  • R2_ERROR : spi_sdcard.c
  • R2_LOCKED : spi_sdcard.c
  • R2_RANGE_ERR : spi_sdcard.c
  • R2_WP_FAILED : spi_sdcard.c
  • R2_WP_VIOL : spi_sdcard.c
  • RECEIVER_ALWAYS_EN : rs485_slave.c
  • Red : GLCD.h
  • REGS_ADDR : i2c_interrupt_test.c , i2c_polling_test.c
  • REQUEST_CLASS : usb.h
  • REQUEST_DEVICE_TO_HOST : usb.h
  • REQUEST_HOST_TO_DEVICE : usb.h
  • REQUEST_RESERVED : usb.h
  • REQUEST_STANDARD : usb.h
  • REQUEST_TO_DEVICE : usb.h
  • REQUEST_TO_ENDPOINT : usb.h
  • REQUEST_TO_INTERFACE : usb.h
  • REQUEST_TO_OTHER : usb.h
  • REQUEST_VENDOR : usb.h
  • RESOLV_ENTRIES : resolv.c
  • RETRY_TIMEOUT : tcpip.h
  • RIT_CTRL_ENBR : lpc17xx_rit.h
  • RIT_CTRL_ENCLR : lpc17xx_rit.h
  • RIT_CTRL_INTEN : lpc17xx_rit.h
  • RIT_CTRL_TEN : lpc17xx_rit.h
  • RMII : emac.h
  • RNE : GLCD_SPI_LPC1700.c
  • RTC_AMR_AMRDOM : lpc17xx_rtc.h
  • RTC_AMR_AMRDOW : lpc17xx_rtc.h
  • RTC_AMR_AMRDOY : lpc17xx_rtc.h
  • RTC_AMR_AMRHOUR : lpc17xx_rtc.h
  • RTC_AMR_AMRMIN : lpc17xx_rtc.h
  • RTC_AMR_AMRMON : lpc17xx_rtc.h
  • RTC_AMR_AMRSEC : lpc17xx_rtc.h
  • RTC_AMR_AMRYEAR : lpc17xx_rtc.h
  • RTC_AMR_BITMASK : lpc17xx_rtc.h
  • RTC_AUX_RTC_OSCF : lpc17xx_rtc.h
  • RTC_AUXEN_RTC_OSCFEN : lpc17xx_rtc.h
  • RTC_CALIB_DIR_BACKWARD : lpc17xx_rtc.h
  • RTC_CALIB_DIR_FORWARD : lpc17xx_rtc.h
  • RTC_CALIBRATION_CALVAL_MASK : lpc17xx_rtc.h
  • RTC_CALIBRATION_LIBDIR : lpc17xx_rtc.h
  • RTC_CALIBRATION_MAX : lpc17xx_rtc.h
  • RTC_CCR_BITMASK : lpc17xx_rtc.h
  • RTC_CCR_CCALEN : lpc17xx_rtc.h
  • RTC_CCR_CLKEN : lpc17xx_rtc.h
  • RTC_CCR_CTCRST : lpc17xx_rtc.h
  • RTC_CIIR_BITMASK : lpc17xx_rtc.h
  • RTC_CIIR_IMDOM : lpc17xx_rtc.h
  • RTC_CIIR_IMDOW : lpc17xx_rtc.h
  • RTC_CIIR_IMDOY : lpc17xx_rtc.h
  • RTC_CIIR_IMHOUR : lpc17xx_rtc.h
  • RTC_CIIR_IMMIN : lpc17xx_rtc.h
  • RTC_CIIR_IMMON : lpc17xx_rtc.h
  • RTC_CIIR_IMSEC : lpc17xx_rtc.h
  • RTC_CIIR_IMYEAR : lpc17xx_rtc.h
  • RTC_CLK : system_LPC17xx.c
  • RTC_CTIME0_DOW_MASK : lpc17xx_rtc.h
  • RTC_CTIME0_HOURS_MASK : lpc17xx_rtc.h
  • RTC_CTIME0_MINUTES_MASK : lpc17xx_rtc.h
  • RTC_CTIME0_SECONDS_MASK : lpc17xx_rtc.h
  • RTC_CTIME1_DOM_MASK : lpc17xx_rtc.h
  • RTC_CTIME1_MONTH_MASK : lpc17xx_rtc.h
  • RTC_CTIME1_YEAR_MASK : lpc17xx_rtc.h
  • RTC_CTIME2_DOY_MASK : lpc17xx_rtc.h
  • RTC_DAYOFMONTH_MAX : lpc17xx_rtc.h
  • RTC_DAYOFMONTH_MIN : lpc17xx_rtc.h
  • RTC_DAYOFWEEK_MAX : lpc17xx_rtc.h
  • RTC_DAYOFYEAR_MAX : lpc17xx_rtc.h
  • RTC_DAYOFYEAR_MIN : lpc17xx_rtc.h
  • RTC_DOM_MASK : lpc17xx_rtc.h
  • RTC_DOW_MASK : lpc17xx_rtc.h
  • RTC_DOY_MASK : lpc17xx_rtc.h
  • RTC_HOUR_MASK : lpc17xx_rtc.h
  • RTC_HOUR_MAX : lpc17xx_rtc.h
  • RTC_ILR_BITMASK : lpc17xx_rtc.h
  • RTC_IRL_RTCALF : lpc17xx_rtc.h
  • RTC_IRL_RTCCIF : lpc17xx_rtc.h
  • RTC_MIN_MASK : lpc17xx_rtc.h
  • RTC_MINUTE_MAX : lpc17xx_rtc.h
  • RTC_MONTH_MASK : lpc17xx_rtc.h
  • RTC_MONTH_MAX : lpc17xx_rtc.h
  • RTC_MONTH_MIN : lpc17xx_rtc.h
  • RTC_SEC_MASK : lpc17xx_rtc.h
  • RTC_SECOND_MAX : lpc17xx_rtc.h
  • RTC_YEAR_MASK : lpc17xx_rtc.h
  • RTC_YEAR_MAX : lpc17xx_rtc.h
  • RX_BUF_SIZE : uart_dma_test.c
  • RX_BUFFER_SIZE : can_test_two_kit.c
  • RX_LED_PIN : emactest.c
  • RxENDPKT_INT : usbreg.h
  • RXFIFO_EMPTY : i2s_mclk.c , i2s_irq_test.c
  • RxTCPBuffer : tcpip.h
Generated on Tue Jun 7 15:00:17 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Data Fields

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- s -

  • S2 : vcomdemo.h
  • SC16IS740_IOCON_REG : spi_interrupt_test.c , sc16is750_int.c , sc16is750_polling.c , spi_polling_test.c
  • SC16IS740_IODIR_REG : sc16is750_int.c , sc16is750_polling.c , spi_interrupt_test.c , spi_polling_test.c
  • SC16IS740_IOSTATE_REG : spi_interrupt_test.c , spi_polling_test.c , sc16is750_int.c , sc16is750_polling.c
  • SC16IS740_RD_CMD : sc16is750_int.c , sc16is750_polling.c , spi_interrupt_test.c , spi_polling_test.c
  • SC16IS740_WR_CMD : spi_interrupt_test.c , spi_polling_test.c , sc16is750_int.c , sc16is750_polling.c
  • SCB : core_cm3.h
  • SCB_AIRCR_ENDIANESS_Msk : core_cm3.h
  • SCB_AIRCR_ENDIANESS_Pos : core_cm3.h
  • SCB_AIRCR_PRIGROUP_Msk : core_cm3.h
  • SCB_AIRCR_PRIGROUP_Pos : core_cm3.h
  • SCB_AIRCR_SYSRESETREQ_Msk : core_cm3.h
  • SCB_AIRCR_SYSRESETREQ_Pos : core_cm3.h
  • SCB_AIRCR_VECTCLRACTIVE_Msk : core_cm3.h
  • SCB_AIRCR_VECTCLRACTIVE_Pos : core_cm3.h
  • SCB_AIRCR_VECTKEY_Msk : core_cm3.h
  • SCB_AIRCR_VECTKEY_Pos : core_cm3.h
  • SCB_AIRCR_VECTKEYSTAT_Msk : core_cm3.h
  • SCB_AIRCR_VECTKEYSTAT_Pos : core_cm3.h
  • SCB_AIRCR_VECTRESET_Msk : core_cm3.h
  • SCB_AIRCR_VECTRESET_Pos : core_cm3.h
  • SCB_BASE : core_cm3.h
  • SCB_CCR_BFHFNMIGN_Msk : core_cm3.h
  • SCB_CCR_BFHFNMIGN_Pos : core_cm3.h
  • SCB_CCR_DIV_0_TRP_Msk : core_cm3.h
  • SCB_CCR_DIV_0_TRP_Pos : core_cm3.h
  • SCB_CCR_NONBASETHRDENA_Msk : core_cm3.h
  • SCB_CCR_NONBASETHRDENA_Pos : core_cm3.h
  • SCB_CCR_STKALIGN_Msk : core_cm3.h
  • SCB_CCR_STKALIGN_Pos : core_cm3.h
  • SCB_CCR_UNALIGN_TRP_Msk : core_cm3.h
  • SCB_CCR_UNALIGN_TRP_Pos : core_cm3.h
  • SCB_CCR_USERSETMPEND_Msk : core_cm3.h
  • SCB_CCR_USERSETMPEND_Pos : core_cm3.h
  • SCB_CFSR_BUSFAULTSR_Msk : core_cm3.h
  • SCB_CFSR_BUSFAULTSR_Pos : core_cm3.h
  • SCB_CFSR_MEMFAULTSR_Msk : core_cm3.h
  • SCB_CFSR_MEMFAULTSR_Pos : core_cm3.h
  • SCB_CFSR_USGFAULTSR_Msk : core_cm3.h
  • SCB_CFSR_USGFAULTSR_Pos : core_cm3.h
  • SCB_CPUID_IMPLEMENTER_Msk : core_cm3.h
  • SCB_CPUID_IMPLEMENTER_Pos : core_cm3.h
  • SCB_CPUID_PARTNO_Msk : core_cm3.h
  • SCB_CPUID_PARTNO_Pos : core_cm3.h
  • SCB_CPUID_REVISION_Msk : core_cm3.h
  • SCB_CPUID_REVISION_Pos : core_cm3.h
  • SCB_CPUID_VARIANT_Msk : core_cm3.h
  • SCB_CPUID_VARIANT_Pos : core_cm3.h
  • SCB_DFSR_BKPT_Msk : core_cm3.h
  • SCB_DFSR_BKPT_Pos : core_cm3.h
  • SCB_DFSR_DWTTRAP_Msk : core_cm3.h
  • SCB_DFSR_DWTTRAP_Pos : core_cm3.h
  • SCB_DFSR_EXTERNAL_Msk : core_cm3.h
  • SCB_DFSR_EXTERNAL_Pos : core_cm3.h
  • SCB_DFSR_HALTED_Msk : core_cm3.h
  • SCB_DFSR_HALTED_Pos : core_cm3.h
  • SCB_DFSR_VCATCH_Msk : core_cm3.h
  • SCB_DFSR_VCATCH_Pos : core_cm3.h
  • SCB_HFSR_DEBUGEVT_Msk : core_cm3.h
  • SCB_HFSR_DEBUGEVT_Pos : core_cm3.h
  • SCB_HFSR_FORCED_Msk : core_cm3.h
  • SCB_HFSR_FORCED_Pos : core_cm3.h
  • SCB_HFSR_VECTTBL_Msk : core_cm3.h
  • SCB_HFSR_VECTTBL_Pos : core_cm3.h
  • SCB_ICSR_ISRPENDING_Msk : core_cm3.h
  • SCB_ICSR_ISRPENDING_Pos : core_cm3.h
  • SCB_ICSR_ISRPREEMPT_Msk : core_cm3.h
  • SCB_ICSR_ISRPREEMPT_Pos : core_cm3.h
  • SCB_ICSR_NMIPENDSET_Msk : core_cm3.h
  • SCB_ICSR_NMIPENDSET_Pos : core_cm3.h
  • SCB_ICSR_PENDSTCLR_Msk : core_cm3.h
  • SCB_ICSR_PENDSTCLR_Pos : core_cm3.h
  • SCB_ICSR_PENDSTSET_Msk : core_cm3.h
  • SCB_ICSR_PENDSTSET_Pos : core_cm3.h
  • SCB_ICSR_PENDSVCLR_Msk : core_cm3.h
  • SCB_ICSR_PENDSVCLR_Pos : core_cm3.h
  • SCB_ICSR_PENDSVSET_Msk : core_cm3.h
  • SCB_ICSR_PENDSVSET_Pos : core_cm3.h
  • SCB_ICSR_RETTOBASE_Msk : core_cm3.h
  • SCB_ICSR_RETTOBASE_Pos : core_cm3.h
  • SCB_ICSR_VECTACTIVE_Msk : core_cm3.h
  • SCB_ICSR_VECTACTIVE_Pos : core_cm3.h
  • SCB_ICSR_VECTPENDING_Msk : core_cm3.h
  • SCB_ICSR_VECTPENDING_Pos : core_cm3.h
  • SCB_SCR_SEVONPEND_Msk : core_cm3.h
  • SCB_SCR_SEVONPEND_Pos : core_cm3.h
  • SCB_SCR_SLEEPDEEP_Msk : core_cm3.h
  • SCB_SCR_SLEEPDEEP_Pos : core_cm3.h
  • SCB_SCR_SLEEPONEXIT_Msk : core_cm3.h
  • SCB_SCR_SLEEPONEXIT_Pos : core_cm3.h
  • SCB_SHCSR_BUSFAULTACT_Msk : core_cm3.h
  • SCB_SHCSR_BUSFAULTACT_Pos : core_cm3.h
  • SCB_SHCSR_BUSFAULTENA_Msk : core_cm3.h
  • SCB_SHCSR_BUSFAULTENA_Pos : core_cm3.h
  • SCB_SHCSR_BUSFAULTPENDED_Msk : core_cm3.h
  • SCB_SHCSR_BUSFAULTPENDED_Pos : core_cm3.h
  • SCB_SHCSR_MEMFAULTACT_Msk : core_cm3.h
  • SCB_SHCSR_MEMFAULTACT_Pos : core_cm3.h
  • SCB_SHCSR_MEMFAULTENA_Msk : core_cm3.h
  • SCB_SHCSR_MEMFAULTENA_Pos : core_cm3.h
  • SCB_SHCSR_MEMFAULTPENDED_Msk : core_cm3.h
  • SCB_SHCSR_MEMFAULTPENDED_Pos : core_cm3.h
  • SCB_SHCSR_MONITORACT_Msk : core_cm3.h
  • SCB_SHCSR_MONITORACT_Pos : core_cm3.h
  • SCB_SHCSR_PENDSVACT_Msk : core_cm3.h
  • SCB_SHCSR_PENDSVACT_Pos : core_cm3.h
  • SCB_SHCSR_SVCALLACT_Msk : core_cm3.h
  • SCB_SHCSR_SVCALLACT_Pos : core_cm3.h
  • SCB_SHCSR_SVCALLPENDED_Msk : core_cm3.h
  • SCB_SHCSR_SVCALLPENDED_Pos : core_cm3.h
  • SCB_SHCSR_SYSTICKACT_Msk : core_cm3.h
  • SCB_SHCSR_SYSTICKACT_Pos : core_cm3.h
  • SCB_SHCSR_USGFAULTACT_Msk : core_cm3.h
  • SCB_SHCSR_USGFAULTACT_Pos : core_cm3.h
  • SCB_SHCSR_USGFAULTENA_Msk : core_cm3.h
  • SCB_SHCSR_USGFAULTENA_Pos : core_cm3.h
  • SCB_SHCSR_USGFAULTPENDED_Msk : core_cm3.h
  • SCB_SHCSR_USGFAULTPENDED_Pos : core_cm3.h
  • SCB_VTOR_TBLBASE_Msk : core_cm3.h
  • SCB_VTOR_TBLBASE_Pos : core_cm3.h
  • SCB_VTOR_TBLOFF_Msk : core_cm3.h
  • SCB_VTOR_TBLOFF_Pos : core_cm3.h
  • SCS_BASE : core_cm3.h
  • SCS_Val : system_LPC17xx.c
  • SCSI_FORMAT_UNIT : msc.h
  • SCSI_INQUIRY : msc.h
  • SCSI_MEDIA_REMOVAL : msc.h
  • SCSI_MODE_SELECT10 : msc.h
  • SCSI_MODE_SELECT6 : msc.h
  • SCSI_MODE_SENSE10 : msc.h
  • SCSI_MODE_SENSE6 : msc.h
  • SCSI_READ10 : msc.h
  • SCSI_READ_CAPACITY : msc.h
  • SCSI_READ_FORMAT_CAPACITIES : msc.h
  • SCSI_REQUEST_SENSE : msc.h
  • SCSI_START_STOP_UNIT : msc.h
  • SCSI_TEST_UNIT_READY : msc.h
  • SCSI_VERIFY10 : msc.h
  • SCSI_WRITE10 : msc.h
  • SD_CMD_BLOCK_LENGTH : spi_sdcard.c
  • SD_DATA_BLOCK_LENGTH : spi_sdcard.c
  • SD_DETECT_PINNUM : spi_sdcard.c
  • SD_DETECT_PORTNUM : spi_sdcard.c
  • SD_WAIT_R1_TIMEOUT : spi_sdcard.c
  • SEND_FRAME1 : tcpip.h
  • SEND_FRAME2 : tcpip.h
  • SER_BUF_COUNT : serial.c
  • SER_BUF_EMPTY : serial.c
  • SER_BUF_FULL : serial.c
  • SER_BUF_MASK : serial.c
  • SER_BUF_RD : serial.c
  • SER_BUF_RESET : serial.c
  • SER_BUF_SIZE : serial.c
  • SER_BUF_WR : serial.c
  • SHELL_PROMPT : shell.c
  • SIGNAL_FREQ_IN_HZ : dac_wave_generate.c
  • SIGNAL_MODE : qei_test_velo.c
  • SINE_FREQ_IN_HZ : dac_sinewave_test.c
  • SLAVE_ADDR : rs485_slave.c
  • SLAVE_ADDR_A : rs485_master.c
  • SLAVE_ADDR_B : rs485_master.c
  • SLVADDR : i2c_interrupt_test.c , i2c_polling_test.c
  • SMTP_ERR_OK : smtp.h
  • SMTP_SEND : smtp.h
  • SOCK_ACTIVE : tcpip.h
  • SOCK_CONNECTED : tcpip.h
  • SOCK_DATA_AVAILABLE : tcpip.h
  • SOCK_ERR_ARP_TIMEOUT : tcpip.h
  • SOCK_ERR_CONN_RESET : tcpip.h
  • SOCK_ERR_ETHERNET : tcpip.h
  • SOCK_ERR_OK : tcpip.h
  • SOCK_ERR_REMOTE : tcpip.h
  • SOCK_ERR_TCP_TIMEOUT : tcpip.h
  • SOCK_ERROR_MASK : tcpip.h
  • SOCK_TX_BUF_RELEASED : tcpip.h
  • SPEED_10 : emac.h
  • SPEED_100 : emac.h
  • SPI_CPHA_FIRST : lpc17xx_spi.h
  • SPI_CPHA_SECOND : lpc17xx_spi.h
  • SPI_CPOL_HI : lpc17xx_spi.h
  • SPI_CPOL_LO : lpc17xx_spi.h
  • SPI_DATA : GLCD_SPI_LPC1700.c
  • SPI_DATA_LSB_FIRST : lpc17xx_spi.h
  • SPI_DATA_MSB_FIRST : lpc17xx_spi.h
  • SPI_DATABIT_10 : lpc17xx_spi.h
  • SPI_DATABIT_11 : lpc17xx_spi.h
  • SPI_DATABIT_12 : lpc17xx_spi.h
  • SPI_DATABIT_13 : lpc17xx_spi.h
  • SPI_DATABIT_14 : lpc17xx_spi.h
  • SPI_DATABIT_15 : lpc17xx_spi.h
  • SPI_DATABIT_16 : lpc17xx_spi.h
  • SPI_DATABIT_8 : lpc17xx_spi.h
  • SPI_DATABIT_9 : lpc17xx_spi.h
  • SPI_DATABIT_SIZE : spi_loopback_test.c , spi_master.c , spi_slave.c
  • SPI_INDEX : GLCD_SPI_LPC1700.c
  • SPI_MASTER_MODE : lpc17xx_spi.h
  • SPI_RD : GLCD_SPI_LPC1700.c
  • SPI_SLAVE_MODE : lpc17xx_spi.h
  • SPI_SPCCR_BITMASK : lpc17xx_spi.h
  • SPI_SPCCR_COUNTER : lpc17xx_spi.h
  • SPI_SPCR_BIT_EN : lpc17xx_spi.h
  • SPI_SPCR_BITMASK : lpc17xx_spi.h
  • SPI_SPCR_BITS : lpc17xx_spi.h
  • SPI_SPCR_CPHA_SECOND : lpc17xx_spi.h
  • SPI_SPCR_CPOL_LOW : lpc17xx_spi.h
  • SPI_SPCR_LSBF : lpc17xx_spi.h
  • SPI_SPCR_MSTR : lpc17xx_spi.h
  • SPI_SPCR_SPIE : lpc17xx_spi.h
  • SPI_SPDR_BITMASK : lpc17xx_spi.h
  • SPI_SPDR_HI_MASK : lpc17xx_spi.h
  • SPI_SPDR_LO_MASK : lpc17xx_spi.h
  • SPI_SPINT_BITMASK : lpc17xx_spi.h
  • SPI_SPINT_INTFLAG : lpc17xx_spi.h
  • SPI_SPSR_ABRT : lpc17xx_spi.h
  • SPI_SPSR_BITMASK : lpc17xx_spi.h
  • SPI_SPSR_MODF : lpc17xx_spi.h
  • SPI_SPSR_ROVR : lpc17xx_spi.h
  • SPI_SPSR_SPIF : lpc17xx_spi.h
  • SPI_SPSR_WCOL : lpc17xx_spi.h
  • SPI_SPTCR_BITMASK : lpc17xx_spi.h
  • SPI_SPTCR_TEST_MASK : lpc17xx_spi.h
  • SPI_SPTSR_ABRT : lpc17xx_spi.h
  • SPI_SPTSR_MASKBIT : lpc17xx_spi.h
  • SPI_SPTSR_MODF : lpc17xx_spi.h
  • SPI_SPTSR_ROVR : lpc17xx_spi.h
  • SPI_SPTSR_SPIF : lpc17xx_spi.h
  • SPI_SPTSR_WCOL : lpc17xx_spi.h
  • SPI_START : GLCD_SPI_LPC1700.c
  • SPI_STAT_ABRT : lpc17xx_spi.h
  • SPI_STAT_DONE : lpc17xx_spi.h
  • SPI_STAT_ERROR : lpc17xx_spi.h
  • SPI_STAT_MODF : lpc17xx_spi.h
  • SPI_STAT_ROVR : lpc17xx_spi.h
  • SPI_STAT_SPIF : lpc17xx_spi.h
  • SPI_STAT_WCOL : lpc17xx_spi.h
  • SPI_WR : GLCD_SPI_LPC1700.c
  • SSP_CPHA_FIRST : lpc17xx_ssp.h
  • SSP_CPHA_SECOND : lpc17xx_ssp.h
  • SSP_CPOL_HI : lpc17xx_ssp.h
  • SSP_CPOL_LO : lpc17xx_ssp.h
  • SSP_CPSR_BITMASK : lpc17xx_ssp.h
  • SSP_CPSR_CPDVSR : lpc17xx_ssp.h
  • SSP_CR0_BITMASK : lpc17xx_ssp.h
  • SSP_CR0_CPHA_SECOND : lpc17xx_ssp.h
  • SSP_CR0_CPOL_HI : lpc17xx_ssp.h
  • SSP_CR0_DSS : lpc17xx_ssp.h
  • SSP_CR0_FRF_MICROWIRE : lpc17xx_ssp.h
  • SSP_CR0_FRF_SPI : lpc17xx_ssp.h
  • SSP_CR0_FRF_TI : lpc17xx_ssp.h
  • SSP_CR0_SCR : lpc17xx_ssp.h
  • SSP_CR1_BITMASK : lpc17xx_ssp.h
  • SSP_CR1_LBM_EN : lpc17xx_ssp.h
  • SSP_CR1_SLAVE_EN : lpc17xx_ssp.h
  • SSP_CR1_SO_DISABLE : lpc17xx_ssp.h
  • SSP_CR1_SSP_EN : lpc17xx_ssp.h
  • SSP_DATABIT_10 : lpc17xx_ssp.h
  • SSP_DATABIT_11 : lpc17xx_ssp.h
  • SSP_DATABIT_12 : lpc17xx_ssp.h
  • SSP_DATABIT_13 : lpc17xx_ssp.h
  • SSP_DATABIT_14 : lpc17xx_ssp.h
  • SSP_DATABIT_15 : lpc17xx_ssp.h
  • SSP_DATABIT_16 : lpc17xx_ssp.h
  • SSP_DATABIT_4 : lpc17xx_ssp.h
  • SSP_DATABIT_5 : lpc17xx_ssp.h
  • SSP_DATABIT_6 : lpc17xx_ssp.h
  • SSP_DATABIT_7 : lpc17xx_ssp.h
  • SSP_DATABIT_8 : lpc17xx_ssp.h
  • SSP_DATABIT_9 : lpc17xx_ssp.h
  • SSP_DMA_BITMASK : lpc17xx_ssp.h
  • SSP_DMA_RX : lpc17xx_ssp.h
  • SSP_DMA_RXDMA_EN : lpc17xx_ssp.h
  • SSP_DMA_TX : lpc17xx_ssp.h
  • SSP_DMA_TXDMA_EN : lpc17xx_ssp.h
  • SSP_DR_BITMASK : lpc17xx_ssp.h
  • SSP_FIFO_SIZE : glcd_ll.h
  • SSP_FRAME_MICROWIRE : lpc17xx_ssp.h
  • SSP_FRAME_SPI : lpc17xx_ssp.h
  • SSP_FRAME_TI : lpc17xx_ssp.h
  • SSP_ICR_BITMASK : lpc17xx_ssp.h
  • SSP_ICR_ROR : lpc17xx_ssp.h
  • SSP_ICR_RT : lpc17xx_ssp.h
  • SSP_IMSC_BITMASK : lpc17xx_ssp.h
  • SSP_IMSC_ROR : lpc17xx_ssp.h
  • SSP_IMSC_RT : lpc17xx_ssp.h
  • SSP_IMSC_RX : lpc17xx_ssp.h
  • SSP_IMSC_TX : lpc17xx_ssp.h
  • SSP_INTCFG_ROR : lpc17xx_ssp.h
  • SSP_INTCFG_RT : lpc17xx_ssp.h
  • SSP_INTCFG_RX : lpc17xx_ssp.h
  • SSP_INTCFG_TX : lpc17xx_ssp.h
  • SSP_INTCLR_ROR : lpc17xx_ssp.h
  • SSP_INTCLR_RT : lpc17xx_ssp.h
  • SSP_INTSTAT_RAW_ROR : lpc17xx_ssp.h
  • SSP_INTSTAT_RAW_RT : lpc17xx_ssp.h
  • SSP_INTSTAT_RAW_RX : lpc17xx_ssp.h
  • SSP_INTSTAT_RAW_TX : lpc17xx_ssp.h
  • SSP_INTSTAT_ROR : lpc17xx_ssp.h
  • SSP_INTSTAT_RT : lpc17xx_ssp.h
  • SSP_INTSTAT_RX : lpc17xx_ssp.h
  • SSP_INTSTAT_TX : lpc17xx_ssp.h
  • SSP_MASTER_MODE : lpc17xx_ssp.h
  • SSP_MIS_BITMASK : lpc17xx_ssp.h
  • SSP_MIS_ROR : lpc17xx_ssp.h
  • SSP_MIS_RT : lpc17xx_ssp.h
  • SSP_MIS_RX : lpc17xx_ssp.h
  • SSP_MIS_TX : lpc17xx_ssp.h
  • SSP_RIS_BITMASK : lpc17xx_ssp.h
  • SSP_RIS_ROR : lpc17xx_ssp.h
  • SSP_RIS_RT : lpc17xx_ssp.h
  • SSP_RIS_RX : lpc17xx_ssp.h
  • SSP_RIS_TX : lpc17xx_ssp.h
  • SSP_SLAVE_MODE : lpc17xx_ssp.h
  • SSP_SR_BITMASK : lpc17xx_ssp.h
  • SSP_SR_BSY : lpc17xx_ssp.h
  • SSP_SR_RFF : lpc17xx_ssp.h
  • SSP_SR_RNE : lpc17xx_ssp.h
  • SSP_SR_TFE : lpc17xx_ssp.h
  • SSP_SR_TNF : lpc17xx_ssp.h
  • SSP_STAT_BUSY : lpc17xx_ssp.h
  • SSP_STAT_DONE : lpc17xx_ssp.h
  • SSP_STAT_ERROR : lpc17xx_ssp.h
  • SSP_STAT_RXFIFO_FULL : lpc17xx_ssp.h
  • SSP_STAT_RXFIFO_NOTEMPTY : lpc17xx_ssp.h
  • SSP_STAT_TXFIFO_EMPTY : lpc17xx_ssp.h
  • SSP_STAT_TXFIFO_NOTFULL : lpc17xx_ssp.h
  • SSPDEV_M : ti_test.c , microwire_test.c
  • SSPDEV_S : microwire_test.c , ti_test.c
  • ST_CALIB_NOREF : lpc17xx_systick.h
  • ST_CALIB_SKEW : lpc17xx_systick.h
  • ST_CALIB_TENMS : lpc17xx_systick.h
  • ST_CTRL_CLKSOURCE : lpc17xx_systick.h
  • ST_CTRL_COUNTFLAG : lpc17xx_systick.h
  • ST_CTRL_ENABLE : lpc17xx_systick.h
  • ST_CTRL_TICKINT : lpc17xx_systick.h
  • ST_RELOAD_CURRENT : lpc17xx_systick.h
  • ST_RELOAD_RELOAD : lpc17xx_systick.h
  • STATE_ACKED : psock.c
  • STATE_ASKING : resolv.c
  • STATE_BLOCKED_CLOSE : psock.c
  • STATE_BLOCKED_NEWDATA : psock.c
  • STATE_BLOCKED_SEND : psock.c
  • STATE_CLOSE : telnetd.c
  • STATE_CONFIG_RECEIVED : dhcpc.c
  • STATE_DATA_SENT : psock.c
  • STATE_DO : telnetd.c
  • STATE_DONE : resolv.c
  • STATE_DONT : telnetd.c
  • STATE_ERROR : resolv.c
  • STATE_IAC : telnetd.c
  • STATE_INITIAL : dhcpc.c
  • STATE_NEW : resolv.c
  • STATE_NONE : psock.c
  • STATE_NORMAL : telnetd.c
  • STATE_OFFER_RECEIVED : dhcpc.c
  • STATE_OUTPUT : httpd.c
  • STATE_READ : psock.c
  • STATE_SENDING : dhcpc.c
  • STATE_UNUSED : resolv.c
  • STATE_WAITING : httpd.c
  • STATE_WILL : telnetd.c
  • STATE_WONT : telnetd.c
  • STATIC : lpc_types.h
  • SUBMASK_1 : tcpip.h
  • SUBMASK_2 : tcpip.h
  • SUBMASK_3 : tcpip.h
  • SUBMASK_4 : tcpip.h
  • SWAPB : tcpip.h
  • SYS_ERR_INT : usbreg.h
  • SysTick : core_cm3.h
  • SysTick_BASE : core_cm3.h
  • SysTick_CALIB_NOREF_Msk : core_cm3.h
  • SysTick_CALIB_NOREF_Pos : core_cm3.h
  • SysTick_CALIB_SKEW_Msk : core_cm3.h
  • SysTick_CALIB_SKEW_Pos : core_cm3.h
  • SysTick_CALIB_TENMS_Msk : core_cm3.h
  • SysTick_CALIB_TENMS_Pos : core_cm3.h
  • SysTick_CTRL_CLKSOURCE_Msk : core_cm3.h
  • SysTick_CTRL_CLKSOURCE_Pos : core_cm3.h
  • SysTick_CTRL_COUNTFLAG_Msk : core_cm3.h
  • SysTick_CTRL_COUNTFLAG_Pos : core_cm3.h
  • SysTick_CTRL_ENABLE_Msk : core_cm3.h
  • SysTick_CTRL_ENABLE_Pos : core_cm3.h
  • SysTick_CTRL_TICKINT_Msk : core_cm3.h
  • SysTick_CTRL_TICKINT_Pos : core_cm3.h
  • SysTick_LOAD_RELOAD_Msk : core_cm3.h
  • SysTick_LOAD_RELOAD_Pos : core_cm3.h
  • SYSTICK_PERIOD : tcpip.c
  • SysTick_VAL_CURRENT_Msk : core_cm3.h
  • SysTick_VAL_CURRENT_Pos : core_cm3.h
Generated on Tue Jun 7 15:00:17 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Data Fields

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  • Variables
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- t -

  • TCP_ACK : uip.c
  • TCP_ACKNR_OFS : tcpip.h
  • TCP_ACTIVE_OPEN : tcpip.h
  • TCP_CHKSUM_OFS : tcpip.h
  • TCP_CLOSE_REQUESTED : tcpip.h
  • TCP_CODE_ACK : tcpip.h
  • TCP_CODE_FIN : tcpip.h
  • TCP_CODE_PSH : tcpip.h
  • TCP_CODE_RST : tcpip.h
  • TCP_CODE_SYN : tcpip.h
  • TCP_CODE_URG : tcpip.h
  • TCP_CTL : uip.c
  • TCP_DATA_CODE_OFS : tcpip.h
  • TCP_DATA_OFS : tcpip.h
  • TCP_DESTPORT_OFS : tcpip.h
  • TCP_FIN : uip.c
  • TCP_HEADER_SIZE : tcpip.h
  • TCP_OPT_END : uip.c
  • TCP_OPT_MSS : tcpip.h , uip.c
  • TCP_OPT_MSS_LEN : uip.c
  • TCP_OPT_MSS_SIZE : tcpip.h
  • TCP_OPT_NOOP : uip.c
  • TCP_PORT_CHARGEN : tcpip.h
  • TCP_PORT_DAYTIME : tcpip.h
  • TCP_PORT_DISCARD : tcpip.h
  • TCP_PORT_ECHO : tcpip.h
  • TCP_PORT_HTTP : tcpip.h
  • TCP_PORT_QOTD : tcpip.h
  • TCP_PSH : uip.c
  • TCP_RST : uip.c
  • TCP_RX_BUF : tcpip.h
  • TCP_SEQNR_OFS : tcpip.h
  • TCP_SRCPORT_OFS : tcpip.h
  • TCP_SYN : uip.c
  • TCP_TIMER_RUNNING : tcpip.h
  • TCP_TX_BUF : tcpip.h
  • TCP_URG : uip.c
  • TCP_URGENT_OFS : tcpip.h
  • TCP_WINDOW_OFS : tcpip.h
  • TELNET_DO : telnetd.c
  • TELNET_DONT : telnetd.c
  • TELNET_IAC : telnetd.c
  • TELNET_WILL : telnetd.c
  • TELNET_WONT : telnetd.c
  • TELNETD_CONF_LINELEN : telnetd.h
  • TELNETD_CONF_NUMLINES : telnetd.h
  • TEST_IRDA : uart_irda_receive.c , uart_irda_transmit.c
  • TEST_UART : uart_hw_flow_control.c , uart_irda_receive.c , uart_irda_transmit.c , uart_polling_test.c
  • TEXT_BEL1_FUNC : drv_glcd.h
  • TEXT_DEF_TAB_SIZE : drv_glcd.h
  • TFE : GLCD_SPI_LPC1700.c
  • THREAD_PRIVILEDGED_MASK : privilege.c
  • THREAD_PRIVILEGED : privilege.c
  • THREAD_UNPRIVILEGED : privilege.c
  • TIM_CAP_FALLING : lpc17xx_timer.h
  • TIM_CAP_INT : lpc17xx_timer.h
  • TIM_CAP_RISING : lpc17xx_timer.h
  • TIM_CCR_CHANNEL_MASKBIT : lpc17xx_timer.h
  • TIM_CCR_MASKBIT : lpc17xx_timer.h
  • TIM_COUNTER_MODE : lpc17xx_timer.h
  • TIM_CTCR_INPUT_MASK : lpc17xx_timer.h
  • TIM_CTCR_MASKBIT : lpc17xx_timer.h
  • TIM_CTCR_MODE_MASK : lpc17xx_timer.h
  • TIM_EDGE_MASK : lpc17xx_timer.h
  • TIM_EM : lpc17xx_timer.h
  • TIM_EM_HIGH : lpc17xx_timer.h
  • TIM_EM_LOW : lpc17xx_timer.h
  • TIM_EM_MASK : lpc17xx_timer.h
  • TIM_EM_NOTHING : lpc17xx_timer.h
  • TIM_EM_SET : lpc17xx_timer.h
  • TIM_EM_TOGGLE : lpc17xx_timer.h
  • TIM_EMR_MASKBIT : lpc17xx_timer.h
  • TIM_ENABLE : lpc17xx_timer.h
  • TIM_INT_ON_CAP : lpc17xx_timer.h
  • TIM_INT_ON_MATCH : lpc17xx_timer.h
  • TIM_IR_CLR : lpc17xx_timer.h
  • TIM_MATCH_INT : lpc17xx_timer.h
  • TIM_MCR_CHANNEL_MASKBIT : lpc17xx_timer.h
  • TIM_MCR_MASKBIT : lpc17xx_timer.h
  • TIM_RESET : lpc17xx_timer.h
  • TIM_RESET_ON_MATCH : lpc17xx_timer.h
  • TIM_STOP_ON_MATCH : lpc17xx_timer.h
  • TIM_TCR_MASKBIT : lpc17xx_timer.h
  • TIME_INTERVAL : rit_interrupt.c
  • TIME_OUT : pwm_match_int.c , lcdtest.c
  • TIMER0_TICK_PER_SEC : lcdtest.c
  • TIMER_TYPE_RETRY : tcpip.h
  • TX_BUFFER_SIZE : can_test_two_kit.c
  • TX_LED_PIN : emactest.c
  • TX_ONLY : emactest.c
  • TX_PACKET_SIZE : emactest.c
  • TxENDPKT_INT : usbreg.h
  • TXFIFO_FULL : i2s_irq_test.c , i2s_mclk.c
  • TxFrame1 : tcpip.h
  • TxFrame2 : tcpip.h
Generated on Tue Jun 7 15:00:17 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Data Fields

  • All
  • Functions
  • Variables
  • Typedefs
  • Enumerations
  • Enumerator
  • Defines
  • _
  • a
  • b
  • c
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  • e
  • f
  • g
  • h
  • i
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  • l
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- u -

  • UART1_IER_BITMASK : lpc17xx_uart.h
  • UART1_IER_CTSINT_EN : lpc17xx_uart.h
  • UART1_IER_MSINT_EN : lpc17xx_uart.h
  • UART1_IIR_INTID_MODEM : lpc17xx_uart.h
  • UART1_MCR_AUTO_CTS_EN : lpc17xx_uart.h
  • UART1_MCR_AUTO_RTS_EN : lpc17xx_uart.h
  • UART1_MCR_BITMASK : lpc17xx_uart.h
  • UART1_MCR_DTR_CTRL : lpc17xx_uart.h
  • UART1_MCR_LOOPB_EN : lpc17xx_uart.h
  • UART1_MCR_RTS_CTRL : lpc17xx_uart.h
  • UART1_MSR_BITMASK : lpc17xx_uart.h
  • UART1_MSR_CTS : lpc17xx_uart.h
  • UART1_MSR_DCD : lpc17xx_uart.h
  • UART1_MSR_DELTA_CTS : lpc17xx_uart.h
  • UART1_MSR_DELTA_DCD : lpc17xx_uart.h
  • UART1_MSR_DELTA_DSR : lpc17xx_uart.h
  • UART1_MSR_DSR : lpc17xx_uart.h
  • UART1_MSR_LO2HI_RI : lpc17xx_uart.h
  • UART1_MSR_RI : lpc17xx_uart.h
  • UART1_RS485ADRMATCH_BITMASK : lpc17xx_uart.h
  • UART1_RS485CTRL_AADEN : lpc17xx_uart.h
  • UART1_RS485CTRL_BITMASK : lpc17xx_uart.h
  • UART1_RS485CTRL_DCTRL_EN : lpc17xx_uart.h
  • UART1_RS485CTRL_NMM_EN : lpc17xx_uart.h
  • UART1_RS485CTRL_OINV_1 : lpc17xx_uart.h
  • UART1_RS485CTRL_RX_DIS : lpc17xx_uart.h
  • UART1_RS485CTRL_SEL_DTR : lpc17xx_uart.h
  • UART1_RS485DLY_BITMASK : lpc17xx_uart.h
  • UART_ACCEPTED_BAUDRATE_ERROR : lpc17xx_uart.h
  • UART_ACR_ABEOINT_CLR : lpc17xx_uart.h
  • UART_ACR_ABTOINT_CLR : lpc17xx_uart.h
  • UART_ACR_AUTO_RESTART : lpc17xx_uart.h
  • UART_ACR_BITMASK : lpc17xx_uart.h
  • UART_ACR_MODE : lpc17xx_uart.h
  • UART_ACR_START : lpc17xx_uart.h
  • UART_BLOCKING_TIMEOUT : lpc17xx_uart.h
  • UART_DLL_MASKBIT : lpc17xx_uart.h
  • UART_DLM_MASKBIT : lpc17xx_uart.h
  • UART_FCR_BITMASK : lpc17xx_uart.h
  • UART_FCR_DMAMODE_SEL : lpc17xx_uart.h
  • UART_FCR_FIFO_EN : lpc17xx_uart.h
  • UART_FCR_RX_RS : lpc17xx_uart.h
  • UART_FCR_TRG_LEV0 : lpc17xx_uart.h
  • UART_FCR_TRG_LEV1 : lpc17xx_uart.h
  • UART_FCR_TRG_LEV2 : lpc17xx_uart.h
  • UART_FCR_TRG_LEV3 : lpc17xx_uart.h
  • UART_FCR_TX_RS : lpc17xx_uart.h
  • UART_FDR_BITMASK : lpc17xx_uart.h
  • UART_FDR_DIVADDVAL : lpc17xx_uart.h
  • UART_FDR_MULVAL : lpc17xx_uart.h
  • UART_FIFOLVL_BITMASK : lpc17xx_uart.h
  • UART_FIFOLVL_RXFIFOLVL : lpc17xx_uart.h
  • UART_FIFOLVL_TXFIFOLVL : lpc17xx_uart.h
  • UART_ICR_BITMASK : lpc17xx_uart.h
  • UART_ICR_FIXPULSE_EN : lpc17xx_uart.h
  • UART_ICR_IRDAEN : lpc17xx_uart.h
  • UART_ICR_IRDAINV : lpc17xx_uart.h
  • UART_ICR_PULSEDIV : lpc17xx_uart.h
  • UART_IER_ABEOINT_EN : lpc17xx_uart.h
  • UART_IER_ABTOINT_EN : lpc17xx_uart.h
  • UART_IER_BITMASK : lpc17xx_uart.h
  • UART_IER_RBRINT_EN : lpc17xx_uart.h
  • UART_IER_RLSINT_EN : lpc17xx_uart.h
  • UART_IER_THREINT_EN : lpc17xx_uart.h
  • UART_IIR_ABEO_INT : lpc17xx_uart.h
  • UART_IIR_ABTO_INT : lpc17xx_uart.h
  • UART_IIR_BITMASK : lpc17xx_uart.h
  • UART_IIR_FIFO_EN : lpc17xx_uart.h
  • UART_IIR_INTID_CTI : lpc17xx_uart.h
  • UART_IIR_INTID_MASK : lpc17xx_uart.h
  • UART_IIR_INTID_RDA : lpc17xx_uart.h
  • UART_IIR_INTID_RLS : lpc17xx_uart.h
  • UART_IIR_INTID_THRE : lpc17xx_uart.h
  • UART_IIR_INTSTAT_PEND : lpc17xx_uart.h
  • UART_LCR_BITMASK : lpc17xx_uart.h
  • UART_LCR_BREAK_EN : lpc17xx_uart.h
  • UART_LCR_DLAB_EN : lpc17xx_uart.h
  • UART_LCR_PARITY_EN : lpc17xx_uart.h
  • UART_LCR_PARITY_EVEN : lpc17xx_uart.h
  • UART_LCR_PARITY_F_0 : lpc17xx_uart.h
  • UART_LCR_PARITY_F_1 : lpc17xx_uart.h
  • UART_LCR_PARITY_ODD : lpc17xx_uart.h
  • UART_LCR_STOPBIT_SEL : lpc17xx_uart.h
  • UART_LCR_WLEN5 : lpc17xx_uart.h
  • UART_LCR_WLEN6 : lpc17xx_uart.h
  • UART_LCR_WLEN7 : lpc17xx_uart.h
  • UART_LCR_WLEN8 : lpc17xx_uart.h
  • UART_LOAD_DLL : lpc17xx_uart.h
  • UART_LOAD_DLM : lpc17xx_uart.h
  • UART_LSR_BI : lpc17xx_uart.h
  • UART_LSR_BITMASK : lpc17xx_uart.h
  • UART_LSR_FE : lpc17xx_uart.h
  • UART_LSR_OE : lpc17xx_uart.h
  • UART_LSR_PE : lpc17xx_uart.h
  • UART_LSR_RDR : lpc17xx_uart.h
  • UART_LSR_RXFE : lpc17xx_uart.h
  • UART_LSR_TEMT : lpc17xx_uart.h
  • UART_LSR_THRE : lpc17xx_uart.h
  • UART_PORT : uart_irda_receive.c , uart_irda_transmit.c , uart_polling_test.c
  • UART_RBR_MASKBIT : lpc17xx_uart.h
  • UART_RING_BUFSIZE : uart_interrupt_test.c , rs485_master.c , rs485_slave.c , uart_fullmodem_test.c
  • UART_SCR_BIMASK : lpc17xx_uart.h
  • UART_TER_BITMASK : lpc17xx_uart.h
  • UART_TER_TXEN : lpc17xx_uart.h
  • UART_THR_MASKBIT : lpc17xx_uart.h
  • UART_TX_FIFO_SIZE : lpc17xx_uart.h
  • UDPBUF : uip.c
  • UIP_ABORT : uip.h
  • uip_abort : uip.h
  • uip_aborted : uip.h
  • UIP_ACKDATA : uip.h
  • uip_acked : uip.h
  • UIP_ACTIVE_OPEN : uipopt.h
  • UIP_APPCALL : hello-world.h , smtp.h , telnetd.h , webclient.h , webserver.h
  • UIP_APPDATA_SIZE : uip.h
  • UIP_ARP_MAXAGE : uipopt.h
  • UIP_ARPTAB_SIZE : uipopt.h
  • UIP_BIG_ENDIAN : uipopt.h
  • UIP_BROADCAST : uipopt.h
  • UIP_BUFSIZE : uipopt.h
  • UIP_BYTE_ORDER : uipopt.h
  • uip_close : uip.h
  • UIP_CLOSE : uip.h
  • UIP_CLOSED : uip.h
  • uip_closed : uip.h
  • UIP_CLOSING : uip.h
  • UIP_CONF_BUFFER_SIZE : uip-conf.h
  • UIP_CONF_BYTE_ORDER : uip-conf.h
  • UIP_CONF_LOGGING : uip-conf.h
  • UIP_CONF_MAX_CONNECTIONS : uip-conf.h
  • UIP_CONF_MAX_LISTENPORTS : uip-conf.h
  • UIP_CONF_STATISTICS : uip-conf.h
  • UIP_CONF_UDP : uip-conf.h
  • UIP_CONF_UDP_CHECKSUMS : uip-conf.h
  • uip_conn_active : uip.h
  • UIP_CONNECTED : uip.h
  • uip_connected : uip.h
  • UIP_CONNS : uipopt.h
  • UIP_DATA : uip.h
  • uip_datalen : uip.h
  • UIP_ESTABLISHED : uip.h
  • UIP_ETHTYPE_ARP : uip_arp.h
  • UIP_ETHTYPE_IP : uip_arp.h
  • UIP_ETHTYPE_IP6 : uip_arp.h
  • UIP_FIN_WAIT_1 : uip.h
  • UIP_FIN_WAIT_2 : uip.h
  • UIP_FIXEDADDR : uipopt.h
  • UIP_FIXEDETHADDR : uipopt.h
  • UIP_FW_DROPPED : uip-fw.h
  • UIP_FW_FORWARDED : uip-fw.h
  • UIP_FW_LOCAL : uip-fw.h
  • UIP_FW_NETIF : uip-fw.h
  • UIP_FW_NOROUTE : uip-fw.h
  • UIP_FW_OK : uip-fw.h
  • uip_fw_setipaddr : uip-fw.h
  • uip_fw_setnetmask : uip-fw.h
  • UIP_FW_TOOLARGE : uip-fw.h
  • UIP_FW_ZEROLEN : uip-fw.h
  • uip_getdraddr : uip.h
  • uip_gethostaddr : uip.h
  • uip_getnetmask : uip.h
  • uip_initialmss : uip.h
  • uip_input : uip.h
  • uip_ip6addr : uip.h
  • uip_ipaddr : uip.h
  • uip_ipaddr1 : uip.h
  • uip_ipaddr2 : uip.h
  • uip_ipaddr3 : uip.h
  • uip_ipaddr4 : uip.h
  • uip_ipaddr_cmp : uip.h
  • uip_ipaddr_copy : uip.h
  • uip_ipaddr_mask : uip.h
  • uip_ipaddr_maskcmp : uip.h
  • UIP_IPH_LEN : uip.h
  • UIP_IPTCPH_LEN : uip.h
  • UIP_IPUDPH_LEN : uip.h
  • UIP_LAST_ACK : uip.h
  • UIP_LISTENPORTS : uipopt.h
  • UIP_LITTLE_ENDIAN : uipopt.h
  • UIP_LLH_LEN : uipopt.h
  • UIP_LOG : uip.c
  • UIP_LOGGING : uipopt.h
  • UIP_MAXRTX : uipopt.h
  • UIP_MAXSYNRTX : uipopt.h
  • uip_mss : uip.h
  • uip_newdata : uip.h
  • UIP_NEWDATA : uip.h
  • uip_outstanding : uip.h
  • uip_periodic : uip.h
  • uip_periodic_conn : uip.h
  • UIP_PINGADDRCONF : uipopt.h
  • UIP_POLL : uip.h
  • uip_poll : uip.h
  • uip_poll_conn : uip.h
  • UIP_POLL_REQUEST : uip.h
  • UIP_PROTO_ICMP : uip.h
  • UIP_PROTO_ICMP6 : uip.h
  • UIP_PROTO_TCP : uip.h
  • UIP_PROTO_UDP : uip.h
  • UIP_REASS_MAXAGE : uipopt.h
  • UIP_REASSEMBLY : uipopt.h
  • UIP_RECEIVE_WINDOW : uipopt.h
  • uip_restart : uip.h
  • uip_rexmit : uip.h
  • UIP_REXMIT : uip.h
  • UIP_RTO : uipopt.h
  • uip_setdraddr : uip.h
  • uip_setethaddr : uip_arp.h
  • uip_sethostaddr : uip.h
  • uip_setnetmask : uip.h
  • UIP_STAT : uip.c
  • UIP_STATISTICS : uipopt.h
  • uip_stop : uip.h
  • uip_stopped : uip.h
  • UIP_STOPPED : uip.h
  • UIP_SYN_RCVD : uip.h
  • UIP_SYN_SENT : uip.h
  • UIP_TCP_MSS : uipopt.h
  • UIP_TCPH_LEN : uip.h
  • UIP_TCPIP_HLEN : uip.h
  • UIP_TIME_WAIT : uip.h
  • UIP_TIME_WAIT_TIMEOUT : uipopt.h
  • uip_timedout : uip.h
  • UIP_TIMEDOUT : uip.h
  • UIP_TIMER : uip.h
  • UIP_TS_MASK : uip.h
  • UIP_TTL : uipopt.h
  • UIP_UDP : uipopt.h
  • UIP_UDP_APPCALL : dhcpc.h , resolv.h
  • uip_udp_bind : uip.h
  • UIP_UDP_CHECKSUMS : uipopt.h
  • UIP_UDP_CONNS : uipopt.h
  • uip_udp_remove : uip.h
  • uip_udp_send : uip.h
  • UIP_UDP_SEND_CONN : uip.h
  • uip_udpconnection : uip.h
  • UIP_UDPH_LEN : uip.h
  • UIP_URGDATA : uipopt.h
  • uip_urgdatalen : uip.h
  • UNPRIVILEGE_LED : privilege.c
  • UNPRIVILEGE_LEDPORT : privilege.c
  • USB_ADC_CIF_NUM : usbcfg.h
  • USB_ADC_SIF1_NUM : usbcfg.h
  • USB_ADC_SIF2_NUM : usbcfg.h
  • USB_AUDIO : usbcfg.h
  • USB_CDC : usbcfg.h
  • USB_CDC_BUFSIZE : usbcfg.h
  • USB_CDC_CIF_NUM : usbcfg.h
  • USB_CDC_DIF_NUM : usbcfg.h
  • USB_CLASS : usbcfg.h
  • USB_CONFIG_BUS_POWERED : usb.h
  • USB_CONFIG_POWER_MA : usb.h
  • USB_CONFIG_POWERED_MASK : usb.h
  • USB_CONFIG_REMOTE_WAKEUP : usb.h
  • USB_CONFIG_SELF_POWERED : usb.h
  • USB_CONFIGUARTION_DESC_SIZE : usbdesc.h
  • USB_CONFIGURATION_DESCRIPTOR_TYPE : usb.h
  • USB_CONFIGURE_EVENT : usbcfg.h
  • USB_DEBUG_DESCRIPTOR_TYPE : usb.h
  • USB_DEVICE_CLASS_AUDIO : usb.h
  • USB_DEVICE_CLASS_COMMUNICATIONS : usb.h
  • USB_DEVICE_CLASS_HUB : usb.h
  • USB_DEVICE_CLASS_HUMAN_INTERFACE : usb.h
  • USB_DEVICE_CLASS_MISCELLANEOUS : usb.h
  • USB_DEVICE_CLASS_MONITOR : usb.h
  • USB_DEVICE_CLASS_PHYSICAL_INTERFACE : usb.h
  • USB_DEVICE_CLASS_POWER : usb.h
  • USB_DEVICE_CLASS_PRINTER : usb.h
  • USB_DEVICE_CLASS_RESERVED : usb.h
  • USB_DEVICE_CLASS_STORAGE : usb.h
  • USB_DEVICE_CLASS_VENDOR_SPECIFIC : usb.h
  • USB_DEVICE_DESC_SIZE : usbdesc.h
  • USB_DEVICE_DESCRIPTOR_TYPE : usb.h
  • USB_DEVICE_QUALIFIER_DESCRIPTOR_TYPE : usb.h
  • USB_DMA : usbcfg.h
  • USB_DMA_BUSY : usbhw.h
  • USB_DMA_DONE : usbhw.h
  • USB_DMA_EP : usbcfg.h
  • USB_DMA_ERROR : usbhw.h
  • USB_DMA_IDLE : usbhw.h
  • USB_DMA_INVALID : usbhw.h
  • USB_DMA_OVER_RUN : usbhw.h
  • USB_DMA_UNDER_RUN : usbhw.h
  • USB_DMA_UNKNOWN : usbhw.h
  • USB_ENDPOINT_DESC_SIZE : usbdesc.h
  • USB_ENDPOINT_DESCRIPTOR_TYPE : usb.h
  • USB_ENDPOINT_DIRECTION_MASK : usb.h
  • USB_ENDPOINT_IN : usb.h
  • USB_ENDPOINT_OUT : usb.h
  • USB_ENDPOINT_SYNC_ADAPTIVE : usb.h
  • USB_ENDPOINT_SYNC_ASYNCHRONOUS : usb.h
  • USB_ENDPOINT_SYNC_MASK : usb.h
  • USB_ENDPOINT_SYNC_NO_SYNCHRONIZATION : usb.h
  • USB_ENDPOINT_SYNC_SYNCHRONOUS : usb.h
  • USB_ENDPOINT_TYPE_BULK : usb.h
  • USB_ENDPOINT_TYPE_CONTROL : usb.h
  • USB_ENDPOINT_TYPE_INTERRUPT : usb.h
  • USB_ENDPOINT_TYPE_ISOCHRONOUS : usb.h
  • USB_ENDPOINT_TYPE_MASK : usb.h
  • USB_ENDPOINT_USAGE_DATA : usb.h
  • USB_ENDPOINT_USAGE_FEEDBACK : usb.h
  • USB_ENDPOINT_USAGE_IMPLICIT_FEEDBACK : usb.h
  • USB_ENDPOINT_USAGE_MASK : usb.h
  • USB_ENDPOINT_USAGE_RESERVED : usb.h
  • USB_EP_EVENT : usbcfg.h
  • USB_EP_NUM : usbcfg.h
  • USB_ERR_B_OVRN : usbhw.h
  • USB_ERR_BTSTF : usbhw.h
  • USB_ERR_DCRC : usbhw.h
  • USB_ERR_EOP : usbhw.h
  • USB_ERR_PID : usbhw.h
  • USB_ERR_TGL : usbhw.h
  • USB_ERR_TIMOUT : usbhw.h
  • USB_ERR_UEPKT : usbhw.h
  • USB_ERROR_EVENT : usbcfg.h
  • USB_EVT_IN : usbuser.h
  • USB_EVT_IN_DMA_EOT : usbuser.h
  • USB_EVT_IN_DMA_ERR : usbuser.h
  • USB_EVT_IN_DMA_NDR : usbuser.h
  • USB_EVT_IN_NAK : usbuser.h
  • USB_EVT_IN_STALL : usbuser.h
  • USB_EVT_OUT : usbuser.h
  • USB_EVT_OUT_DMA_EOT : usbuser.h
  • USB_EVT_OUT_DMA_ERR : usbuser.h
  • USB_EVT_OUT_DMA_NDR : usbuser.h
  • USB_EVT_OUT_NAK : usbuser.h
  • USB_EVT_OUT_STALL : usbuser.h
  • USB_EVT_SETUP : usbuser.h
  • USB_FEATURE_ENDPOINT_STALL : usb.h
  • USB_FEATURE_EVENT : usbcfg.h
  • USB_FEATURE_REMOTE_WAKEUP : usb.h
  • USB_GETSTATUS_ENDPOINT_STALL : usb.h
  • USB_GETSTATUS_REMOTE_WAKEUP : usb.h
  • USB_GETSTATUS_SELF_POWERED : usb.h
  • USB_HID : usbcfg.h
  • USB_HID_IF_NUM : usbcfg.h
  • USB_IF_NUM : usbcfg.h
  • USB_INTERFACE_ASSOCIATION_DESCRIPTOR_TYPE : usb.h
  • USB_INTERFACE_DESC_SIZE : usbdesc.h
  • USB_INTERFACE_DESCRIPTOR_TYPE : usb.h
  • USB_INTERFACE_EVENT : usbcfg.h
  • USB_INTERFACE_POWER_DESCRIPTOR_TYPE : usb.h
  • USB_MAX_PACKET0 : usbcfg.h
  • USB_MSC : usbcfg.h
  • USB_MSC_IF_NUM : usbcfg.h
  • USB_OTG_DESCRIPTOR_TYPE : usb.h
  • USB_OTHER_SPEED_CONFIG_DESCRIPTOR_TYPE : usb.h
  • USB_POWER : usbcfg.h
  • USB_POWER_EVENT : usbcfg.h
  • USB_RAM_ADR : usbhw.h
  • USB_RAM_SZ : usbhw.h
  • USB_REQUEST_CLEAR_FEATURE : usb.h
  • USB_REQUEST_GET_CONFIGURATION : usb.h
  • USB_REQUEST_GET_DESCRIPTOR : usb.h
  • USB_REQUEST_GET_INTERFACE : usb.h
  • USB_REQUEST_GET_STATUS : usb.h
  • USB_REQUEST_SET_ADDRESS : usb.h
  • USB_REQUEST_SET_CONFIGURATION : usb.h
  • USB_REQUEST_SET_DESCRIPTOR : usb.h
  • USB_REQUEST_SET_FEATURE : usb.h
  • USB_REQUEST_SET_INTERFACE : usb.h
  • USB_REQUEST_SYNC_FRAME : usb.h
  • USB_RESET_EVENT : usbcfg.h
  • USB_RESUME_EVENT : usbcfg.h
  • USB_SOF_EVENT : usbcfg.h
  • USB_STRING_DESCRIPTOR_TYPE : usb.h
  • USB_SUSPEND_EVENT : usbcfg.h
  • USB_VENDOR : usbcfg.h
  • USB_WAKEUP_EVENT : usbcfg.h
  • USBCLKCFG_Val : system_LPC17xx.c
  • USED_UART_DEBUG_PORT : debug_frmwrk.h
  • USEDI2CDEV : i2c_interrupt_test.c , i2c_polling_test.c , pca8581_test.c
  • USEDI2CDEV_M : i2c_master_slave_int_test.c , master.c
  • USEDI2CDEV_S : slave.c , i2c_master_slave_int_test.c
  • USEDSSPDEV_M : ti_test.c , microwire_test.c
  • USEDSSPDEV_S : microwire_test.c , ti_test.c
Generated on Tue Jun 7 15:00:17 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Data Fields

  • All
  • Functions
  • Variables
  • Typedefs
  • Enumerations
  • Enumerator
  • Defines
  • _
  • a
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  • e
  • f
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  • h
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- v -

  • VAR_ADDRESS : bitband.c
  • VAR_BIT : bitband.c
  • VIRTUAL_QEI_SIGNAL : qei_test_velo.c
  • VTOR_OFFSET : vt_relocation.c
Generated on Tue Jun 7 15:00:17 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Data Fields

  • All
  • Functions
  • Variables
  • Typedefs
  • Enumerations
  • Enumerator
  • Defines
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- w -

  • WAITED_PIXEL : drv_glcd.h
  • WBVAL : usbdesc.h
  • WDT_TIMEOUT : wdt_reset_test.c , wdt_deepsleep.c , wdt_interrupt_test.c
  • WDT_TIMEOUT_MAX : lpc17xx_wdt.h
  • WDT_TIMEOUT_MIN : lpc17xx_wdt.h
  • WDT_US_INDEX : lpc17xx_wdt.h
  • WDT_WDCLKSEL_MASK : lpc17xx_wdt.h
  • WDT_WDCLKSEL_PCLK : lpc17xx_wdt.h
  • WDT_WDCLKSEL_RC : lpc17xx_wdt.h
  • WDT_WDCLKSEL_RTC : lpc17xx_wdt.h
  • WDT_WDFEED_MASK : lpc17xx_wdt.h
  • WDT_WDMOD : lpc17xx_wdt.h
  • WDT_WDMOD_MASK : lpc17xx_wdt.h
  • WDT_WDMOD_WDEN : lpc17xx_wdt.h
  • WDT_WDMOD_WDINT : lpc17xx_wdt.h
  • WDT_WDMOD_WDRESET : lpc17xx_wdt.h
  • WDT_WDMOD_WDTOF : lpc17xx_wdt.h
  • WDT_WDTC_MASK : lpc17xx_wdt.h
  • WEBCLIENT_CONF_MAX_URLLEN : webclient.h
  • WEBCLIENT_STATE_CLOSE : webclient.c
  • WEBCLIENT_STATE_DATA : webclient.c
  • WEBCLIENT_STATE_HEADERS : webclient.c
  • WEBCLIENT_STATE_STATUSLINE : webclient.c
  • WEBCLIENT_TIMEOUT : webclient.c
  • White : GLCD.h
  • WIDTH : GLCD_SPI_LPC1700.c
Generated on Tue Jun 7 15:00:17 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Data Fields

  • All
  • Functions
  • Variables
  • Typedefs
  • Enumerations
  • Enumerator
  • Defines
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- x -

  • XTAL : system_LPC17xx.c
Generated on Tue Jun 7 15:00:17 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Data Fields

  • All
  • Functions
  • Variables
  • Typedefs
  • Enumerations
  • Enumerator
  • Defines
  • _
  • a
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- y -

  • Yellow : GLCD.h
Generated on Tue Jun 7 15:00:17 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Data Fields

  • All
  • Functions
  • Variables
  • Typedefs
  • Enumerations
  • Enumerator
  • Defines
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- _ -

  • _GLCD_Cmd_t : drv_glcd.h
  • _GLCD_CmdDir_t : drv_glcd.h
  • _GLCD_ISS_t : drv_glcd.h
  • _GLCD_Status_t : drv_glcd.h
  • _sd_connect_status : spi_sdcard.c
  • _sd_error : spi_sdcard.c

- a -

  • ADC_CHANNEL_SELECTION : lpc17xx_adc.h
  • ADC_DATA_STATUS : lpc17xx_adc.h
  • ADC_START_ON_EDGE_OPT : lpc17xx_adc.h
  • ADC_START_OPT : lpc17xx_adc.h
  • ADC_TYPE_INT_OPT : lpc17xx_adc.h
  • AFLUT_ENTRY_Type : lpc17xx_can.h

- b -

  • Bool : lpc_types.h

- c -

  • CAN_AFMODE_Type : lpc17xx_can.h
  • CAN_CR_STS_Type : lpc17xx_can.h
  • CAN_CTRL_STS_Type : lpc17xx_can.h
  • CAN_ERROR : lpc17xx_can.h
  • CAN_FRAME_Type : lpc17xx_can.h
  • CAN_ID_FORMAT_Type : lpc17xx_can.h
  • CAN_INT_EN_Type : lpc17xx_can.h
  • CAN_MODE_Type : lpc17xx_can.h

- d -

  • DAC_CURRENT_OPT : lpc17xx_dac.h

- e -

  • EXTI_LINE_ENUM : lpc17xx_exti.h
  • EXTI_MODE_ENUM : lpc17xx_exti.h
  • EXTI_POLARITY_ENUM : lpc17xx_exti.h

- f -

  • FlagStatus : lpc_types.h
  • FullCAN_IC_Type : lpc17xx_can.h
  • FunctionalState : lpc_types.h

- g -

  • GPDMA_StateClear_Type : lpc17xx_gpdma.h
  • GPDMA_Status_Type : lpc17xx_gpdma.h

- i -

  • I2C_TRANSFER_OPT_Type : lpc17xx_i2c.h
  • IRQn : LPC17xx.h

- p -

  • PWM_CHANNEL_EDGE_OPT : lpc17xx_pwm.h
  • PWM_COUNTER_EDGE_OPT : lpc17xx_pwm.h
  • PWM_COUNTER_INPUTSEL_OPT : lpc17xx_pwm.h
  • PWM_INTSTAT_TYPE : lpc17xx_pwm.h
  • PWM_MATCH_UPDATE_OPT : lpc17xx_pwm.h
  • PWM_TC_MODE_OPT : lpc17xx_pwm.h
  • PWM_TIMER_PRESCALE_OPT : lpc17xx_pwm.h

- r -

  • RTC_INT_OPT : lpc17xx_rtc.h
  • RTC_TIMETYPE_Num : lpc17xx_rtc.h

- s -

  • SPI_TRANSFER_Type : lpc17xx_spi.h
  • SSP_TRANSFER_Type : lpc17xx_ssp.h
  • Status : lpc_types.h

- t -

  • TIM_CAP_MODE_OPT : lpc17xx_timer.h
  • TIM_COUNTER_INPUT_OPT : lpc17xx_timer.h
  • TIM_EXTMATCH_OPT : lpc17xx_timer.h
  • TIM_INT_TYPE : lpc17xx_timer.h
  • TIM_MODE_OPT : lpc17xx_timer.h
  • TIM_PRESCALE_OPT : lpc17xx_timer.h
  • TLastFrameSent : tcpip.h
  • TRANSFER_BLOCK_Type : lpc_types.h
  • TTCPStateMachine : tcpip.h

- u -

  • UART1_SignalState : lpc17xx_uart.h
  • UART_AB_MODE_Type : lpc17xx_uart.h
  • UART_ABEO_Type : lpc17xx_uart.h
  • UART_DATABIT_Type : lpc17xx_uart.h
  • UART_FITO_LEVEL_Type : lpc17xx_uart.h
  • UART_INT_Type : lpc17xx_uart.h
  • UART_IrDA_PULSE_Type : lpc17xx_uart.h
  • UART_LS_Type : lpc17xx_uart.h
  • UART_MODEM_MODE_Type : lpc17xx_uart.h
  • UART_MODEM_PIN_Type : lpc17xx_uart.h
  • UART_MODEM_STAT_type : lpc17xx_uart.h
  • UART_PARITY_Type : lpc17xx_uart.h
  • UART_RS485_DIRCTRL_PIN_Type : lpc17xx_uart.h
  • UART_STOPBIT_Type : lpc17xx_uart.h

- w -

  • WDT_CLK_OPT : lpc17xx_wdt.h
  • WDT_MODE_OPT : lpc17xx_wdt.h
Generated on Tue Jun 7 15:00:16 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Data Fields

  • All
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  • Enumerations
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  • Defines
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- a -

  • ACTIVE : lpc17xx_uart.h
  • ADC_ADGINTEN : lpc17xx_adc.h
  • ADC_ADINTEN0 : lpc17xx_adc.h
  • ADC_ADINTEN1 : lpc17xx_adc.h
  • ADC_ADINTEN2 : lpc17xx_adc.h
  • ADC_ADINTEN3 : lpc17xx_adc.h
  • ADC_ADINTEN4 : lpc17xx_adc.h
  • ADC_ADINTEN5 : lpc17xx_adc.h
  • ADC_ADINTEN6 : lpc17xx_adc.h
  • ADC_ADINTEN7 : lpc17xx_adc.h
  • ADC_CHANNEL_0 : lpc17xx_adc.h
  • ADC_CHANNEL_1 : lpc17xx_adc.h
  • ADC_CHANNEL_2 : lpc17xx_adc.h
  • ADC_CHANNEL_3 : lpc17xx_adc.h
  • ADC_CHANNEL_4 : lpc17xx_adc.h
  • ADC_CHANNEL_5 : lpc17xx_adc.h
  • ADC_CHANNEL_6 : lpc17xx_adc.h
  • ADC_CHANNEL_7 : lpc17xx_adc.h
  • ADC_DATA_BURST : lpc17xx_adc.h
  • ADC_DATA_DONE : lpc17xx_adc.h
  • ADC_IRQn : LPC17xx.h
  • ADC_START_CONTINUOUS : lpc17xx_adc.h
  • ADC_START_NOW : lpc17xx_adc.h
  • ADC_START_ON_CAP01 : lpc17xx_adc.h
  • ADC_START_ON_EINT0 : lpc17xx_adc.h
  • ADC_START_ON_FALLING : lpc17xx_adc.h
  • ADC_START_ON_MAT01 : lpc17xx_adc.h
  • ADC_START_ON_MAT03 : lpc17xx_adc.h
  • ADC_START_ON_MAT10 : lpc17xx_adc.h
  • ADC_START_ON_MAT11 : lpc17xx_adc.h
  • ADC_START_ON_RISING : lpc17xx_adc.h
  • APOFF : drv_glcd.h
  • APON : drv_glcd.h
  • ARP_REQUEST : tcpip.h
  • ASCSET : drv_glcd.h
Generated on Tue Jun 7 15:00:16 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Data Fields

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- l -

  • LAST_ACK : tcpip.h
  • LISTENING : tcpip.h
Generated on Tue Jun 7 15:00:16 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Data Fields

  • All
  • Functions
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  • Typedefs
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- m -

  • MADCTR : drv_glcd.h
  • MCPWM_IRQn : LPC17xx.h
  • MemoryManagement_IRQn : LPC17xx.h
Generated on Tue Jun 7 15:00:16 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Data Fields

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- n -

  • NONE_BLOCKING : lpc_types.h
  • NonMaskableInt_IRQn : LPC17xx.h
  • NOP : drv_glcd.h
Generated on Tue Jun 7 15:00:16 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Data Fields

  • All
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- o -

  • OSCOFF : drv_glcd.h
  • OSCON : drv_glcd.h
Generated on Tue Jun 7 15:00:16 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Data Fields

  • All
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- b -

  • BLOCKING : lpc_types.h
  • BOD_IRQn : LPC17xx.h
  • BSTROFF : drv_glcd.h
  • BSTRON : drv_glcd.h
  • BusFault_IRQn : LPC17xx.h
Generated on Tue Jun 7 15:00:16 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Data Fields

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- c -

  • CAN_AccBP : lpc17xx_can.h
  • CAN_AccOff : lpc17xx_can.h
  • CAN_AF_ENTRY_ERROR : lpc17xx_can.h
  • CAN_CONFLICT_ID_ERROR : lpc17xx_can.h
  • CAN_eFCAN : lpc17xx_can.h
  • CAN_ENTRY_NOT_EXIT_ERROR : lpc17xx_can.h
  • CAN_FULL_OBJ_NOT_RCV : lpc17xx_can.h
  • CAN_IRQn : LPC17xx.h
  • CAN_LISTENONLY_MODE : lpc17xx_can.h
  • CAN_NO_RECEIVE_DATA : lpc17xx_can.h
  • CAN_Normal : lpc17xx_can.h
  • CAN_OBJECTS_FULL_ERROR : lpc17xx_can.h
  • CAN_OK : lpc17xx_can.h
  • CAN_OPERATING_MODE : lpc17xx_can.h
  • CAN_RESET_MODE : lpc17xx_can.h
  • CAN_RXPOLARITY_MODE : lpc17xx_can.h
  • CAN_SELFTEST_MODE : lpc17xx_can.h
  • CAN_SLEEP_MODE : lpc17xx_can.h
  • CAN_TEST_MODE : lpc17xx_can.h
  • CAN_TXPRIORITY_MODE : lpc17xx_can.h
  • CANActivity_IRQn : LPC17xx.h
  • CANCR_MS : lpc17xx_can.h
  • CANCR_RX_STS : lpc17xx_can.h
  • CANCR_TX_STS : lpc17xx_can.h
  • CANCTRL_ERR_WRN : lpc17xx_can.h
  • CANCTRL_GLOBAL_STS : lpc17xx_can.h
  • CANCTRL_INT_CAP : lpc17xx_can.h
  • CANCTRL_STS : lpc17xx_can.h
  • CANINT_ALIE : lpc17xx_can.h
  • CANINT_BEIE : lpc17xx_can.h
  • CANINT_DOIE : lpc17xx_can.h
  • CANINT_EIE : lpc17xx_can.h
  • CANINT_EPIE : lpc17xx_can.h
  • CANINT_FCE : lpc17xx_can.h
  • CANINT_IDIE : lpc17xx_can.h
  • CANINT_RIE : lpc17xx_can.h
  • CANINT_TIE1 : lpc17xx_can.h
  • CANINT_TIE2 : lpc17xx_can.h
  • CANINT_TIE3 : lpc17xx_can.h
  • CANINT_WUIE : lpc17xx_can.h
  • CASET : drv_glcd.h
  • CLKEXT : drv_glcd.h
  • CLKINT : drv_glcd.h
  • CLOSE_WAIT : tcpip.h
  • CLOSED : tcpip.h
  • CLOSING : tcpip.h
  • COLMOD : drv_glcd.h
Generated on Tue Jun 7 15:00:16 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Data Fields

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- d -

  • DAC_MAX_CURRENT_350uA : lpc17xx_dac.h
  • DAC_MAX_CURRENT_700uA : lpc17xx_dac.h
  • DATA_FRAME : lpc17xx_can.h
  • DATCTR : drv_glcd.h
  • DebugMonitor_IRQn : LPC17xx.h
  • DISABLE : lpc_types.h
  • DISCTR : drv_glcd.h
  • DISPOFF : drv_glcd.h
  • DISPON : drv_glcd.h
  • DMA_IRQn : LPC17xx.h
Generated on Tue Jun 7 15:00:16 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Data Fields

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- e -

  • EINT0_IRQn : LPC17xx.h
  • EINT1_IRQn : LPC17xx.h
  • EINT2_IRQn : LPC17xx.h
  • EINT3_IRQn : LPC17xx.h
  • ENABLE : lpc_types.h
  • ENET_IRQn : LPC17xx.h
  • EPWRIN : drv_glcd.h
  • EPWROUT : drv_glcd.h
  • ERROR : lpc_types.h
  • ESTABLISHED : tcpip.h
  • EXPLICIT_EXTEND_ENTRY : lpc17xx_can.h
  • EXPLICIT_STANDARD_ENTRY : lpc17xx_can.h
  • EXT_ID_FORMAT : lpc17xx_can.h
  • EXTI_EINT0 : lpc17xx_exti.h
  • EXTI_EINT1 : lpc17xx_exti.h
  • EXTI_EINT2 : lpc17xx_exti.h
  • EXTI_EINT3 : lpc17xx_exti.h
  • EXTI_MODE_EDGE_SENSITIVE : lpc17xx_exti.h
  • EXTI_MODE_LEVEL_SENSITIVE : lpc17xx_exti.h
  • EXTI_POLARITY_HIGH_ACTIVE_OR_RISING_EDGE : lpc17xx_exti.h
  • EXTI_POLARITY_LOW_ACTIVE_OR_FALLING_EDGE : lpc17xx_exti.h
Generated on Tue Jun 7 15:00:16 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Data Fields

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- f -

  • FALSE : lpc_types.h
  • FIN_WAIT_1 : tcpip.h
  • FIN_WAIT_2 : tcpip.h
  • FRM8SEL : drv_glcd.h
  • FRMSEL : drv_glcd.h
  • FULLCAN_ENTRY : lpc17xx_can.h
  • FULLCAN_IC0 : lpc17xx_can.h
  • FULLCAN_IC1 : lpc17xx_can.h
Generated on Tue Jun 7 15:00:16 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Data Fields

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- g -

  • GLCD_CMD_NUMB : drv_glcd.h
  • GLCD_ERROR : drv_glcd.h
  • GLCD_ID_ERROR : drv_glcd.h
  • GLCD_ISS_0 : drv_glcd.h
  • GLCD_ISS_1 : drv_glcd.h
  • GLCD_OK : drv_glcd.h
  • GLCD_READ : drv_glcd.h
  • GLCD_UNSUPPORTED : drv_glcd.h
  • GLCD_WRITE : drv_glcd.h
  • GPDMA_STAT_ENABLED_CH : lpc17xx_gpdma.h
  • GPDMA_STAT_INT : lpc17xx_gpdma.h
  • GPDMA_STAT_INTERR : lpc17xx_gpdma.h
  • GPDMA_STAT_INTTC : lpc17xx_gpdma.h
  • GPDMA_STAT_RAWINTERR : lpc17xx_gpdma.h
  • GPDMA_STAT_RAWINTTC : lpc17xx_gpdma.h
  • GPDMA_STATCLR_INTERR : lpc17xx_gpdma.h
  • GPDMA_STATCLR_INTTC : lpc17xx_gpdma.h
  • GROUP_EXTEND_ENTRY : lpc17xx_can.h
  • GROUP_STANDARD_ENTRY : lpc17xx_can.h
Generated on Tue Jun 7 15:00:16 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Data Fields

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- i -

  • I2C0_IRQn : LPC17xx.h
  • I2C1_IRQn : LPC17xx.h
  • I2C2_IRQn : LPC17xx.h
  • I2C_TRANSFER_INTERRUPT : lpc17xx_i2c.h
  • I2C_TRANSFER_POLLING : lpc17xx_i2c.h
  • I2S_IRQn : LPC17xx.h
  • IDMOFF : drv_glcd.h
  • IDMON : drv_glcd.h
  • INACTIVE : lpc17xx_uart.h
  • INVOFF : drv_glcd.h
  • INVON : drv_glcd.h
Generated on Tue Jun 7 15:00:16 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Data Fields

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- p -

  • PendSV_IRQn : LPC17xx.h
  • PLL0_IRQn : LPC17xx.h
  • PLL1_IRQn : LPC17xx.h
  • PTIN : drv_glcd.h
  • PTLAR : drv_glcd.h
  • PTLON : drv_glcd.h
  • PTLOUT : drv_glcd.h
  • PWM1_IRQn : LPC17xx.h
  • PWM_CHANNEL_DUAL_EDGE : lpc17xx_pwm.h
  • PWM_CHANNEL_SINGLE_EDGE : lpc17xx_pwm.h
  • PWM_COUNTER_ANY : lpc17xx_pwm.h
  • PWM_COUNTER_FALLING : lpc17xx_pwm.h
  • PWM_COUNTER_PCAP1_0 : lpc17xx_pwm.h
  • PWM_COUNTER_PCAP1_1 : lpc17xx_pwm.h
  • PWM_COUNTER_RISING : lpc17xx_pwm.h
  • PWM_INTSTAT_CAP0 : lpc17xx_pwm.h
  • PWM_INTSTAT_CAP1 : lpc17xx_pwm.h
  • PWM_INTSTAT_MR0 : lpc17xx_pwm.h
  • PWM_INTSTAT_MR1 : lpc17xx_pwm.h
  • PWM_INTSTAT_MR2 : lpc17xx_pwm.h
  • PWM_INTSTAT_MR3 : lpc17xx_pwm.h
  • PWM_INTSTAT_MR4 : lpc17xx_pwm.h
  • PWM_INTSTAT_MR5 : lpc17xx_pwm.h
  • PWM_INTSTAT_MR6 : lpc17xx_pwm.h
  • PWM_MATCH_UPDATE_NEXT_RST : lpc17xx_pwm.h
  • PWM_MATCH_UPDATE_NOW : lpc17xx_pwm.h
  • PWM_MODE_COUNTER : lpc17xx_pwm.h
  • PWM_MODE_TIMER : lpc17xx_pwm.h
  • PWM_TIMER_PRESCALE_TICKVAL : lpc17xx_pwm.h
  • PWM_TIMER_PRESCALE_USVAL : lpc17xx_pwm.h
  • PWRCTR : drv_glcd.h
Generated on Tue Jun 7 15:00:16 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Data Fields

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- q -

  • QEI_IRQn : LPC17xx.h
Generated on Tue Jun 7 15:00:16 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Data Fields

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- r -

  • RAMWR : drv_glcd.h
  • RASET : drv_glcd.h
  • RDDID : drv_glcd.h
  • RDDST : drv_glcd.h
  • RDEV : drv_glcd.h
  • RDID1 : drv_glcd.h
  • RDID2 : drv_glcd.h
  • RDID3 : drv_glcd.h
  • RDRR : drv_glcd.h
  • REMOTE_FRAME : lpc17xx_can.h
  • RESET : lpc_types.h
  • RGBSET : drv_glcd.h
  • RIT_IRQn : LPC17xx.h
  • RMWIN : drv_glcd.h
  • RMWOUT : drv_glcd.h
  • RTC_INT_ALARM : lpc17xx_rtc.h
  • RTC_INT_COUNTER_INCREASE : lpc17xx_rtc.h
  • RTC_IRQn : LPC17xx.h
  • RTC_TIMETYPE_DAYOFMONTH : lpc17xx_rtc.h
  • RTC_TIMETYPE_DAYOFWEEK : lpc17xx_rtc.h
  • RTC_TIMETYPE_DAYOFYEAR : lpc17xx_rtc.h
  • RTC_TIMETYPE_HOUR : lpc17xx_rtc.h
  • RTC_TIMETYPE_MINUTE : lpc17xx_rtc.h
  • RTC_TIMETYPE_MONTH : lpc17xx_rtc.h
  • RTC_TIMETYPE_SECOND : lpc17xx_rtc.h
  • RTC_TIMETYPE_YEAR : lpc17xx_rtc.h
Generated on Tue Jun 7 15:00:16 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Data Fields

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- s -

  • SCRLAR : drv_glcd.h
  • SD_CMD_BAD_PARAMETER : spi_sdcard.c
  • SD_CONNECTED : spi_sdcard.c
  • SD_DISCONNECTED : spi_sdcard.c
  • SD_ERROR_ACMD41 : spi_sdcard.c
  • SD_ERROR_BUS_NOT_IDLE : spi_sdcard.c
  • SD_ERROR_CMD0 : spi_sdcard.c
  • SD_ERROR_CMD55 : spi_sdcard.c
  • SD_ERROR_CMD59 : spi_sdcard.c
  • SD_ERROR_TIMEOUT : spi_sdcard.c
  • SD_ERROR_TOKEN : spi_sdcard.c
  • SD_NG : spi_sdcard.c
  • SD_OK : spi_sdcard.c
  • SET : lpc_types.h
  • SETCON : drv_glcd.h
  • SLPIN : drv_glcd.h
  • SLPOUT : drv_glcd.h
  • SPI_IRQn : LPC17xx.h
  • SPI_TRANSFER_INTERRUPT : lpc17xx_spi.h
  • SPI_TRANSFER_POLLING : lpc17xx_spi.h
  • SSP0_IRQn : LPC17xx.h
  • SSP1_IRQn : LPC17xx.h
  • SSP_TRANSFER_INTERRUPT : lpc17xx_ssp.h
  • SSP_TRANSFER_POLLING : lpc17xx_ssp.h
  • STD_ID_FORMAT : lpc17xx_can.h
  • SUCCESS : lpc_types.h
  • SVCall_IRQn : LPC17xx.h
  • SWRESET : drv_glcd.h
  • SYN_RECD : tcpip.h
  • SYN_SENT : tcpip.h
  • SysTick_IRQn : LPC17xx.h
Generated on Tue Jun 7 15:00:16 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Data Fields

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- t -

  • TCP_DATA_FRAME : tcpip.h
  • TCP_FIN_FRAME : tcpip.h
  • TCP_SYN_ACK_FRAME : tcpip.h
  • TCP_SYN_FRAME : tcpip.h
  • TIM_CAPTURE_ANY : lpc17xx_timer.h
  • TIM_CAPTURE_FALLING : lpc17xx_timer.h
  • TIM_CAPTURE_NONE : lpc17xx_timer.h
  • TIM_CAPTURE_RISING : lpc17xx_timer.h
  • TIM_COUNTER_ANY_MODE : lpc17xx_timer.h
  • TIM_COUNTER_FALLING_MODE : lpc17xx_timer.h
  • TIM_COUNTER_INCAP0 : lpc17xx_timer.h
  • TIM_COUNTER_INCAP1 : lpc17xx_timer.h
  • TIM_COUNTER_RISING_MODE : lpc17xx_timer.h
  • TIM_CR0_INT : lpc17xx_timer.h
  • TIM_CR1_INT : lpc17xx_timer.h
  • TIM_EXTMATCH_HIGH : lpc17xx_timer.h
  • TIM_EXTMATCH_LOW : lpc17xx_timer.h
  • TIM_EXTMATCH_NOTHING : lpc17xx_timer.h
  • TIM_EXTMATCH_TOGGLE : lpc17xx_timer.h
  • TIM_MR0_INT : lpc17xx_timer.h
  • TIM_MR1_INT : lpc17xx_timer.h
  • TIM_MR2_INT : lpc17xx_timer.h
  • TIM_MR3_INT : lpc17xx_timer.h
  • TIM_PRESCALE_TICKVAL : lpc17xx_timer.h
  • TIM_PRESCALE_USVAL : lpc17xx_timer.h
  • TIM_TIMER_MODE : lpc17xx_timer.h
  • TIME_WAIT : tcpip.h
  • TIMER0_IRQn : LPC17xx.h
  • TIMER1_IRQn : LPC17xx.h
  • TIMER2_IRQn : LPC17xx.h
  • TIMER3_IRQn : LPC17xx.h
  • TMPHIS : drv_glcd.h
  • TMPREAD : drv_glcd.h
  • TMPRNG : drv_glcd.h
  • TRUE : lpc_types.h
Generated on Tue Jun 7 15:00:16 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Data Fields

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- u -

  • UART0_IRQn : LPC17xx.h
  • UART1_INTCFG_CTS : lpc17xx_uart.h
  • UART1_INTCFG_MS : lpc17xx_uart.h
  • UART1_IRQn : LPC17xx.h
  • UART1_MODEM_MODE_AUTO_CTS : lpc17xx_uart.h
  • UART1_MODEM_MODE_AUTO_RTS : lpc17xx_uart.h
  • UART1_MODEM_MODE_LOOPBACK : lpc17xx_uart.h
  • UART1_MODEM_PIN_DTR : lpc17xx_uart.h
  • UART1_MODEM_PIN_RTS : lpc17xx_uart.h
  • UART1_MODEM_STAT_CTS : lpc17xx_uart.h
  • UART1_MODEM_STAT_DCD : lpc17xx_uart.h
  • UART1_MODEM_STAT_DELTA_CTS : lpc17xx_uart.h
  • UART1_MODEM_STAT_DELTA_DCD : lpc17xx_uart.h
  • UART1_MODEM_STAT_DELTA_DSR : lpc17xx_uart.h
  • UART1_MODEM_STAT_DSR : lpc17xx_uart.h
  • UART1_MODEM_STAT_LO2HI_RI : lpc17xx_uart.h
  • UART1_MODEM_STAT_RI : lpc17xx_uart.h
  • UART1_RS485_DIRCTRL_DTR : lpc17xx_uart.h
  • UART1_RS485_DIRCTRL_RTS : lpc17xx_uart.h
  • UART2_IRQn : LPC17xx.h
  • UART3_IRQn : LPC17xx.h
  • UART_AUTOBAUD_INTSTAT_ABEO : lpc17xx_uart.h
  • UART_AUTOBAUD_INTSTAT_ABTO : lpc17xx_uart.h
  • UART_AUTOBAUD_MODE0 : lpc17xx_uart.h
  • UART_AUTOBAUD_MODE1 : lpc17xx_uart.h
  • UART_DATABIT_5 : lpc17xx_uart.h
  • UART_DATABIT_6 : lpc17xx_uart.h
  • UART_DATABIT_7 : lpc17xx_uart.h
  • UART_DATABIT_8 : lpc17xx_uart.h
  • UART_FIFO_TRGLEV0 : lpc17xx_uart.h
  • UART_FIFO_TRGLEV1 : lpc17xx_uart.h
  • UART_FIFO_TRGLEV2 : lpc17xx_uart.h
  • UART_FIFO_TRGLEV3 : lpc17xx_uart.h
  • UART_INTCFG_ABEO : lpc17xx_uart.h
  • UART_INTCFG_ABTO : lpc17xx_uart.h
  • UART_INTCFG_RBR : lpc17xx_uart.h
  • UART_INTCFG_RLS : lpc17xx_uart.h
  • UART_INTCFG_THRE : lpc17xx_uart.h
  • UART_IrDA_PULSEDIV128 : lpc17xx_uart.h
  • UART_IrDA_PULSEDIV16 : lpc17xx_uart.h
  • UART_IrDA_PULSEDIV2 : lpc17xx_uart.h
  • UART_IrDA_PULSEDIV256 : lpc17xx_uart.h
  • UART_IrDA_PULSEDIV32 : lpc17xx_uart.h
  • UART_IrDA_PULSEDIV4 : lpc17xx_uart.h
  • UART_IrDA_PULSEDIV64 : lpc17xx_uart.h
  • UART_IrDA_PULSEDIV8 : lpc17xx_uart.h
  • UART_LINESTAT_BI : lpc17xx_uart.h
  • UART_LINESTAT_FE : lpc17xx_uart.h
  • UART_LINESTAT_OE : lpc17xx_uart.h
  • UART_LINESTAT_PE : lpc17xx_uart.h
  • UART_LINESTAT_RDR : lpc17xx_uart.h
  • UART_LINESTAT_RXFE : lpc17xx_uart.h
  • UART_LINESTAT_TEMT : lpc17xx_uart.h
  • UART_LINESTAT_THRE : lpc17xx_uart.h
  • UART_PARITY_EVEN : lpc17xx_uart.h
  • UART_PARITY_NONE : lpc17xx_uart.h
  • UART_PARITY_ODD : lpc17xx_uart.h
  • UART_PARITY_SP_0 : lpc17xx_uart.h
  • UART_PARITY_SP_1 : lpc17xx_uart.h
  • UART_STOPBIT_1 : lpc17xx_uart.h
  • UART_STOPBIT_2 : lpc17xx_uart.h
  • UsageFault_IRQn : LPC17xx.h
  • USB_IRQn : LPC17xx.h
  • USBActivity_IRQn : LPC17xx.h
Generated on Tue Jun 7 15:00:16 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Data Fields

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  • VOLCTR : drv_glcd.h
  • VOLDOWN : drv_glcd.h
  • VOLUP : drv_glcd.h
  • VSCSAD : drv_glcd.h
Generated on Tue Jun 7 15:00:16 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Data Fields

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  • WDT_CLKSRC_IRC : lpc17xx_wdt.h
  • WDT_CLKSRC_PCLK : lpc17xx_wdt.h
  • WDT_CLKSRC_RTC : lpc17xx_wdt.h
  • WDT_IRQn : LPC17xx.h
  • WDT_MODE_INT_ONLY : lpc17xx_wdt.h
  • WDT_MODE_RESET : lpc17xx_wdt.h
Generated on Tue Jun 7 15:00:16 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Data Fields

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  • __attribute__() : emactest.c , link_list.c
  • _close_r() : syscalls.c
  • _fstat_r() : syscalls.c
  • _isatty_r() : syscalls.c
  • _lseek_r() : syscalls.c
  • _read_r() : syscalls.c
  • _sbrk_r() : syscalls.c
  • _sys_exit() : Retarget.c
  • _ttywrch() : Retarget.c
  • _write_r() : syscalls.c
Generated on Tue Jun 7 15:00:15 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Data Fields

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  • LED_Blink() : emactest.c
  • LED_Init() : wdt_interrupt_test.c , main.c , emactest.c , tcpip.c , privilege.c
Generated on Tue Jun 7 15:00:15 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Data Fields

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  • main() : adc_burst_test.c , adc_dma_test.c , adc_interrupt_test.c , can_test_aflut.c , dac_speaker.c , i2c_polling_test.c , ssp_master.c , microwire_test.c , slave.c , sc16is750_int.c , sc16is750_polling.c , dac_wave_generate.c , i2s_dma_test.c , ssp_slave.c , ti_test.c , i2s_irq_test.c , 10ms_base.c , systick_stclk.c , can_test_bypass_mode.c , easyweb.c , i2s_mclk.c , timer_capture.c , freqmeasure.c , i2s_test_4_wire.c , gen_diff_delay.c , gen_diff_freqs.c , emactest.c , i2s_two_kit.c , timer_int_match.c , timer_poll_match.c , i2s_polling.c , pwm_signal.c , uart_autobaud_test.c , adc_polling_test.c , can_test_two_kit.c , main.c , lcdtest.c , uart_dma_test.c , uart_hw_flow_control.c , lcdtest.c , uart_interrupt_test.c , uart_irda_receive.c , wdt_reset_test.c , wdt_interrupt_test.c , memory.c , demo.c , vcomdemo.c , usbdmain.c , uart_fullmodem_test.c , rs485_slave.c , rs485_master.c , flash_2_ram.c , mcpwm_simple.c , uart_irda_transmit.c , uart_polling_test.c , nvic_priority.c , bitband.c , gpdma_sleep.c , vt_relocation.c , template.c , link_list.c , pwm_dual_edge.c , pwm_match_int.c , adc_hardware_trigger_test.c , can_ledcontrol.c , mpu_test.c , gpdma_r2r_test.c , pwm_single_edge.c , extint_sleep.c , gpio_int.c , nmi_powerdown.c , rtc_deeppwd.c , privilege.c , ssp_dma.c , spi_slave.c , spi_sdcard.c , spi_polling_test.c , spi_interrupt_test.c , spi_master.c , spi_loopback_test.c , rtc_calib.c , rtc_alarm_cntincr_int.c , rit_interrupt.c , LedBlinky.c , wdt_deepsleep.c , qei_test_velo.c , master.c , can_self_test.c , dac_dma.c , i2c_master_slave_int_test.c , i2c_monitor.c , dac_sinewave_test.c , pca8581_test.c , i2c_interrupt_test.c
  • MCPWM_ACMode() : lpc17xx_mcpwm.h
  • MCPWM_ClearCapture() : lpc17xx_mcpwm.h
  • MCPWM_ConfigCapture() : lpc17xx_mcpwm.h
  • MCPWM_ConfigChannel() : lpc17xx_mcpwm.h
  • MCPWM_CountConfig() : lpc17xx_mcpwm.h
  • MCPWM_DCMode() : lpc17xx_mcpwm.h
  • MCPWM_GetCapture() : lpc17xx_mcpwm.h
  • MCPWM_GetIntStatus() : lpc17xx_mcpwm.h
  • MCPWM_Init() : lpc17xx_mcpwm.h
  • MCPWM_IntClear() : lpc17xx_mcpwm.h
  • MCPWM_IntConfig() : lpc17xx_mcpwm.h
  • MCPWM_IntSet() : lpc17xx_mcpwm.h
  • MCPWM_IRQHandler() : mcpwm_simple.c
  • MCPWM_Start() : lpc17xx_mcpwm.h
  • MCPWM_Stop() : lpc17xx_mcpwm.h
  • MCPWM_WriteToShadow() : lpc17xx_mcpwm.h
  • MEMB() : telnetd.c
  • MemManage_Handler() : mpu_test.c
  • MSC_BulkIn() : mscuser.h , mscuser.c
  • MSC_BulkOut() : mscuser.c , mscuser.h
  • MSC_GetCBW() : mscuser.c , mscuser.h
  • MSC_GetMaxLUN() : mscuser.c , mscuser.h
  • MSC_Inquiry() : mscuser.c
  • MSC_MemoryRead() : mscuser.c
  • MSC_MemoryVerify() : mscuser.c
  • MSC_MemoryWrite() : mscuser.c
  • MSC_ModeSense10() : mscuser.c
  • MSC_ModeSense6() : mscuser.c
  • MSC_ReadCapacity() : mscuser.c
  • MSC_ReadFormatCapacity() : mscuser.c
  • MSC_RequestSense() : mscuser.c
  • MSC_Reset() : mscuser.c , mscuser.h
  • MSC_RWSetup() : mscuser.c
  • MSC_SetCSW() : mscuser.h , mscuser.c
  • MSC_TestUnitReady() : mscuser.c
Generated on Tue Jun 7 15:00:15 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Data Fields

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- n -

  • NMI_Handler() : nmi_powerdown.c
  • NVIC_DeInit() : lpc17xx_nvic.h
  • NVIC_SCBDeInit() : lpc17xx_nvic.h
  • NVIC_SetVTOR() : lpc17xx_nvic.h
Generated on Tue Jun 7 15:00:15 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Data Fields

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  • ADC_BurstCmd() : lpc17xx_adc.h
  • ADC_ChannelCmd() : lpc17xx_adc.h
  • ADC_ChannelGetData() : lpc17xx_adc.h
  • ADC_ChannelGetStatus() : lpc17xx_adc.h
  • ADC_DeInit() : lpc17xx_adc.h
  • ADC_EdgeStartConfig() : lpc17xx_adc.h
  • ADC_EP_GetRequest() : adcuser.h , adcuser.c
  • ADC_EP_SetRequest() : adcuser.c , adcuser.h
  • ADC_getCnv() : ADC.c , ADC.h
  • ADC_GetData() : lpc17xx_adc.c
  • ADC_GlobalGetData() : lpc17xx_adc.h
  • ADC_GlobalGetStatus() : lpc17xx_adc.h
  • ADC_IF_GetRequest() : adcuser.c , adcuser.h
  • ADC_IF_SetRequest() : adcuser.c , adcuser.h
  • ADC_Init() : lpc17xx_adc.h
  • ADC_init() : ADC.c , ADC.h
  • ADC_IntConfig() : lpc17xx_adc.h
  • ADC_IRQHandler() : adc_interrupt_test.c , adc_hardware_trigger_test.c
  • ADC_PowerdownCmd() : lpc17xx_adc.h
  • ADC_StartCmd() : lpc17xx_adc.h
  • ADC_startCnv() : ADC.c , ADC.h
  • ADC_stopCnv() : ADC.c , ADC.h
Generated on Tue Jun 7 15:00:15 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Data Fields

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  • Buffer_Init() : flash_2_ram.c , gpdma_sleep.c , master.c , i2s_irq_test.c , ssp_master.c , microwire_test.c , i2s_mclk.c , ssp_slave.c , ti_test.c , i2c_master_slave_int_test.c , i2s_test_4_wire.c , i2s_polling.c , gpdma_r2r_test.c , slave.c , spi_loopback_test.c , spi_master.c , i2s_dma_test.c , spi_slave.c , ssp_dma.c
  • Buffer_Verify() : ssp_master.c , ssp_slave.c , ti_test.c , gpdma_sleep.c , link_list.c , i2s_dma_test.c , i2s_irq_test.c , i2s_polling.c , spi_loopback_test.c , spi_slave.c , microwire_test.c , flash_2_ram.c , gpdma_r2r_test.c , i2s_test_4_wire.c , spi_master.c , ssp_dma.c , i2s_mclk.c
Generated on Tue Jun 7 15:00:15 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Data Fields

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  • Typedefs
  • Enumerations
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  • c_entry() : adc_burst_test.c , adc_dma_test.c , adc_interrupt_test.c , can_test_aflut.c , dac_speaker.c , slave.c , microwire_test.c , sc16is750_int.c , i2s_dma_test.c , sc16is750_polling.c , ssp_slave.c , dac_wave_generate.c , i2s_irq_test.c , ti_test.c , 10ms_base.c , i2s_mclk.c , systick_stclk.c , timer_capture.c , can_test_bypass_mode.c , emactest.c , i2s_test_4_wire.c , freqmeasure.c , gen_diff_delay.c , i2s_two_kit.c , gen_diff_freqs.c , timer_int_match.c , main.c , i2s_polling.c , timer_poll_match.c , pwm_signal.c , lcdtest.c , uart_autobaud_test.c , uart_dma_test.c , adc_polling_test.c , can_test_two_kit.c , flash_2_ram.c , lcdtest.c , uart_hw_flow_control.c , uart_interrupt_test.c , mcpwm_simple.c , uart_irda_receive.c , uart_irda_transmit.c , gpdma_sleep.c , nvic_priority.c , uart_polling_test.c , rs485_master.c , vt_relocation.c , rs485_slave.c , uart_fullmodem_test.c , bitband.c , link_list.c , template.c , wdt_interrupt_test.c , wdt_reset_test.c , pwm_dual_edge.c , gpdma_r2r_test.c , pwm_match_int.c , pwm_single_edge.c , adc_hardware_trigger_test.c , can_ledcontrol.c , mpu_test.c , gpio_int.c , extint_sleep.c , nmi_powerdown.c , LedBlinky.c , rtc_deeppwd.c , wdt_deepsleep.c , privilege.c , master.c , qei_test_velo.c , rit_interrupt.c , i2c_master_slave_int_test.c , rtc_alarm_cntincr_int.c , rtc_calib.c , can_self_test.c , dac_dma.c , i2c_monitor.c , spi_loopback_test.c , spi_master.c , pca8581_test.c , spi_interrupt_test.c , spi_polling_test.c , dac_sinewave_test.c , i2c_interrupt_test.c , spi_sdcard.c , spi_slave.c , i2c_polling_test.c , ssp_dma.c , ssp_master.c
  • CalcChecksum() : tcpip.c , tcpip.h
  • CAN_ChangeAFTable() : can_test_aflut.c
  • CAN_DeInit() : lpc17xx_can.h
  • CAN_FullCANIntGetStatus() : lpc17xx_can.h
  • CAN_FullCANPendGetStatus() : lpc17xx_can.h
  • CAN_GetCRStatus() : lpc17xx_can.h
  • CAN_GetCTRLStatus() : lpc17xx_can.h
  • CAN_Init() : lpc17xx_can.h
  • CAN_InitAFMessage() : can_test_aflut.c , can_test_two_kit.c
  • CAN_InitMessage() : can_ledcontrol.c , can_self_test.c , can_test_aflut.c , can_test_bypass_mode.c , can_test_two_kit.c
  • CAN_IntGetStatus() : lpc17xx_can.h
  • CAN_IRQCmd() : lpc17xx_can.h
  • CAN_IRQHandler() : can_ledcontrol.c , can_self_test.c , can_test_aflut.c , can_test_bypass_mode.c , can_test_two_kit.c
  • CAN_LoadExplicitEntry() : lpc17xx_can.h
  • CAN_LoadFullCANEntry() : lpc17xx_can.h
  • CAN_LoadGroupEntry() : lpc17xx_can.h
  • CAN_ModeConfig() : lpc17xx_can.h
  • CAN_PinCfg() : can_test_aflut.c
  • CAN_ReceiveMsg() : lpc17xx_can.h
  • CAN_RemoveEntry() : lpc17xx_can.h
  • CAN_SendMsg() : lpc17xx_can.h
  • CAN_SetAFMode() : lpc17xx_can.h
  • CAN_SetCommand() : lpc17xx_can.h
  • CAN_SetupAFLUT() : lpc17xx_can.h
  • CAN_SetupAFTable() : can_test_aflut.c , can_test_two_kit.c
  • CAN_VerifyMessage() : can_test_two_kit.c
  • CDC_BulkIn() : cdcuser.h , cdcuser.c
  • CDC_BulkOut() : cdcuser.c , cdcuser.h
  • CDC_ClearCommFeature() : cdcuser.c , cdcuser.h
  • CDC_GetCommFeature() : cdcuser.c , cdcuser.h
  • CDC_GetEncapsulatedResponse() : cdcuser.c , cdcuser.h
  • CDC_GetLineCoding() : cdcuser.c , cdcuser.h
  • CDC_GetSerialState() : cdcuser.c , cdcuser.h
  • CDC_Init() : cdcuser.c , cdcuser.h
  • CDC_NotificationIn() : cdcuser.c , cdcuser.h
  • CDC_OutBufAvailChar() : cdcuser.c , cdcuser.h
  • CDC_RdOutBuf() : cdcuser.c , cdcuser.h
  • CDC_SendBreak() : cdcuser.c , cdcuser.h
  • CDC_SendEncapsulatedCommand() : cdcuser.c , cdcuser.h
  • CDC_SetCommFeature() : cdcuser.c , cdcuser.h
  • CDC_SetControlLineState() : cdcuser.c , cdcuser.h
  • CDC_SetLineCoding() : cdcuser.c , cdcuser.h
  • CDC_WrOutBuf() : cdcuser.c , cdcuser.h
  • check_failed() : lpc17xx_libcfg.h , i2s_dma_test.c , slave.c , i2s_irq_test.c , sc16is750_polling.c , lpc17xx_libcfg.h , pwm_single_edge.c , pca8581_test.c , extint_sleep.c , lpc17xx_libcfg.h , i2c_monitor.c , lpc17xx_libcfg.h , nmi_powerdown.c , master.c , lpc17xx_libcfg.h , LedBlinky.c , lpc17xx_libcfg.h , gpio_int.c , lpc17xx_libcfg.h , rtc_deeppwd.c , lpc17xx_libcfg.h , gpdma_sleep.c , lpc17xx_libcfg.h , flash_2_ram.c , lpc17xx_libcfg.h , emactest.c , lpc17xx_libcfg.h , easyweb.c , lpc17xx_libcfg.h , pwm_match_int.c , lpc17xx_libcfg.h , rtc_calib.c , lpc17xx_libcfg.h , privilege.c , lpc17xx_libcfg.h , template.c , lpc17xx_libcfg.h , bitband.c , lpc17xx_libcfg.h , can_test_two_kit.c , lpc17xx_libcfg.h , can_test_bypass_mode.c , lpc17xx_libcfg.h , can_self_test.c , lpc17xx_libcfg.h , can_ledcontrol.c , lpc17xx_libcfg.h , demo.c , lpc17xx_libcfg.h , uart_fullmodem_test.c , lpc17xx_libcfg.h , uart_irda_transmit.c , lpc17xx_libcfg.h , pwm_dual_edge.c , lpc17xx_libcfg.h , lcdtest.c , lpc17xx_libcfg.h , gen_diff_delay.c , freqmeasure.c , timer_capture.c , mcpwm_simple.c , nvic_priority.c , lpc17xx_libcfg.h , ssp_master.c , lpc17xx_libcfg.h , 10ms_base.c , i2s_test_4_wire.c , lpc17xx_libcfg.h , lcdtest.c , lpc17xx_libcfg.h , memory.c , lpc17xx_libcfg.h , uart_dma_test.c , lpc17xx_libcfg_default.h , adc_burst_test.c , lpc17xx_libcfg.h , vt_relocation.c , lpc17xx_libcfg.h , i2s_polling.c , i2s_two_kit.c , lpc17xx_libcfg.h , i2s_mclk.c , lpc17xx_libcfg.h , timer_poll_match.c , lpc17xx_libcfg.h , adc_dma_test.c , i2c_interrupt_test.c , lpc17xx_libcfg.h , uart_autobaud_test.c , lpc17xx_libcfg.h , uart_hw_flow_control.c , lpc17xx_libcfg.h , gpdma_r2r_test.c , link_list.c , uart_irda_receive.c , lpc17xx_libcfg.h , main.c , pwm_signal.c , lpc17xx_libcfg.h , dac_sinewave_test.c , dac_dma.c , rs485_slave.c , adc_hardware_trigger_test.c , lpc17xx_libcfg.h , can_test_aflut.c , lpc17xx_libcfg.h , wdt_reset_test.c , lpc17xx_libcfg.h , adc_interrupt_test.c , lpc17xx_libcfg.h , adc_polling_test.c , wdt_interrupt_test.c , ssp_slave.c , rs485_master.c , lpc17xx_libcfg.h , mpu_test.c , ti_test.c , uart_interrupt_test.c , uart_polling_test.c , dac_speaker.c , lpc17xx_libcfg.h , dac_wave_generate.c , lpc17xx_libcfg.h , sc16is750_int.c , lpc17xx_libcfg.h , microwire_test.c , spi_polling_test.c , qei_test_velo.c , lpc17xx_libcfg.h , rtc_alarm_cntincr_int.c , systick_stclk.c , spi_loopback_test.c , timer_int_match.c , spi_interrupt_test.c , lpc17xx_libcfg.h , spi_sdcard.c , i2c_master_slave_int_test.c , lpc17xx_libcfg.h , ssp_dma.c , spi_slave.c , lpc17xx_libcfg.h , gen_diff_freqs.c , i2c_polling_test.c , spi_master.c , wdt_deepsleep.c , lpc17xx_libcfg.h , rit_interrupt.c
  • Check_Message() : can_self_test.c
  • CheckFrameReceived() : EMAC.c , EMAC.h
  • CLKPWR_ConfigPPWR() : lpc17xx_clkpwr.h
  • CLKPWR_DeepPowerDown() : lpc17xx_clkpwr.h
  • CLKPWR_DeepSleep() : lpc17xx_clkpwr.h
  • CLKPWR_GetPCLK() : lpc17xx_clkpwr.h
  • CLKPWR_GetPCLKSEL() : lpc17xx_clkpwr.h
  • CLKPWR_PowerDown() : lpc17xx_clkpwr.h
  • CLKPWR_SetPCLKDiv() : lpc17xx_clkpwr.h
  • CLKPWR_Sleep() : lpc17xx_clkpwr.h
  • clock_init() : clock-arch.c , clock.h
  • clock_time() : clock-arch.c , clock.h
  • CopyFromFrame_EMAC() : EMAC.c , EMAC.h
  • CopyToFrame_EMAC() : EMAC.c , EMAC.h
  • crc32_add() : crc32.h , crc32.c
  • crc32_bfr() : crc32.c , crc32.h
  • crc32_end() : crc32.h , crc32.c
  • crc32_init() : crc32.h , crc32.c
  • crc_7() : spi_sdcard.c
  • crc_7final() : spi_sdcard.c
  • CS_Force() : sc16is750_polling.c , sc16is750_int.c , spi_polling_test.c , spi_sdcard.c , spi_master.c , spi_interrupt_test.c
  • CS_Init() : spi_polling_test.c , spi_sdcard.c , spi_master.c , sc16is750_polling.c , sc16is750_int.c , spi_interrupt_test.c
Generated on Tue Jun 7 15:00:15 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Data Fields

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- d -

  • DAC_ConfigDAConverterControl() : lpc17xx_dac.h
  • DAC_Init() : lpc17xx_dac.h
  • DAC_SetBias() : lpc17xx_dac.h
  • DAC_SetDMATimeOut() : lpc17xx_dac.h
  • DAC_UpdateValue() : lpc17xx_dac.h
  • DataInFormat() : mscuser.c
  • DataInTransfer() : mscuser.c
  • debug_frmwrk_init() : debug_frmwrk.h , debug_frmwrk.c
  • delay() : gpio_int.c , nvic_priority.c , extint_sleep.c
  • Delay() : LedBlinky.c
  • dhcpc_appcall() : dhcpc.c , dhcpc.h
  • dhcpc_configured() : dhcpc.h
  • dhcpc_init() : dhcpc.c , dhcpc.h
  • dhcpc_request() : dhcpc.c , dhcpc.h
  • Dly100us() : drv_glcd.h , lcdtest.c
  • DMA_IRQHandler() : flash_2_ram.c , link_list.c , uart_dma_test.c , dac_dma.c , ssp_dma.c , i2s_dma_test.c , adc_dma_test.c , gpdma_sleep.c , gpdma_r2r_test.c
  • do_crc_behav() : crc32.h
  • DoNetworkStuff() : tcpip.h , tcpip.c
  • DummyReadFrame_EMAC() : EMAC.h , EMAC.c
Generated on Tue Jun 7 15:00:15 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Data Fields

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- e -

  • EINT0_IRQHandler() : nvic_priority.c
  • EINT2_IRQHandler() : extint_sleep.c
  • EINT3_IRQHandler() : gpio_int.c , nvic_priority.c , adc_burst_test.c
  • EMAC_CheckPHYStatus() : lpc17xx_emac.h
  • EMAC_CheckReceiveDataStatus() : lpc17xx_emac.h
  • EMAC_CheckReceiveIndex() : lpc17xx_emac.h
  • EMAC_CheckTransmitIndex() : lpc17xx_emac.h
  • EMAC_DeInit() : lpc17xx_emac.h
  • EMAC_GetReceiveDataSize() : lpc17xx_emac.h
  • EMAC_GetWoLStatus() : lpc17xx_emac.h
  • EMAC_Init() : lpc17xx_emac.h
  • EMAC_IntCmd() : lpc17xx_emac.h
  • EMAC_IntGetStatus() : lpc17xx_emac.h
  • EMAC_ReadPacketBuffer() : lpc17xx_emac.h
  • EMAC_SetFilterMode() : lpc17xx_emac.h
  • EMAC_SetHashFilter() : lpc17xx_emac.h
  • EMAC_SetPHYMode() : lpc17xx_emac.h
  • EMAC_UpdatePHYStatus() : lpc17xx_emac.h
  • EMAC_UpdateRxConsumeIndex() : lpc17xx_emac.h
  • EMAC_UpdateTxProduceIndex() : lpc17xx_emac.h
  • EMAC_WritePacketBuffer() : lpc17xx_emac.h
  • EndReadFrame() : EMAC.c , EMAC.h
  • ENET_IRQHandler() : emactest.c
  • EPAdr() : usbhw.c
  • Error_Loop() : i2c_polling_test.c , pca8581_test.c , gpdma_sleep.c , link_list.c , gpdma_r2r_test.c , spi_loopback_test.c , i2c_interrupt_test.c , spi_master.c , spi_slave.c , ti_test.c , ssp_slave.c , ssp_master.c , ssp_dma.c , microwire_test.c , flash_2_ram.c
  • Error_Loop_M() : i2c_master_slave_int_test.c
  • Error_Loop_S() : i2c_master_slave_int_test.c
  • EXTI_ClearEXTIFlag() : lpc17xx_exti.h
  • EXTI_Config() : lpc17xx_exti.h
  • EXTI_DeInit() : lpc17xx_exti.h
  • EXTI_Init() : lpc17xx_exti.h
  • EXTI_SetMode() : lpc17xx_exti.h
  • EXTI_SetPolarity() : lpc17xx_exti.h
Generated on Tue Jun 7 15:00:15 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Data Fields

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- f -

  • FCAN_ReadObj() : lpc17xx_can.h
  • ferror() : Retarget.c
  • fgetc() : Retarget.c
  • FIO_ByteClearValue() : lpc17xx_gpio.h
  • FIO_ByteReadValue() : lpc17xx_gpio.h
  • FIO_ByteSetDir() : lpc17xx_gpio.h
  • FIO_ByteSetMask() : lpc17xx_gpio.h
  • FIO_ByteSetValue() : lpc17xx_gpio.h
  • FIO_ClearInt() : lpc17xx_gpio.h
  • FIO_ClearValue() : lpc17xx_gpio.h
  • FIO_GetIntStatus() : lpc17xx_gpio.h
  • FIO_HalfWordClearValue() : lpc17xx_gpio.h
  • FIO_HalfWordReadValue() : lpc17xx_gpio.h
  • FIO_HalfWordSetDir() : lpc17xx_gpio.h
  • FIO_HalfWordSetMask() : lpc17xx_gpio.h
  • FIO_HalfWordSetValue() : lpc17xx_gpio.h
  • FIO_IntCmd() : lpc17xx_gpio.h
  • FIO_ReadValue() : lpc17xx_gpio.h
  • FIO_SetDir() : lpc17xx_gpio.h
  • FIO_SetMask() : lpc17xx_gpio.h
  • FIO_SetValue() : lpc17xx_gpio.h
  • fputc() : Retarget.c
Generated on Tue Jun 7 15:00:15 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Data Fields

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- g -

  • get_potval() : usbdmain.c
  • GetAD7Val() : easyweb.c , easyweb.h
  • getchar() : Serial.c
  • GetInReport() : demo.c , demo.h
  • getkey() : Serial.c , Retarget.c
  • GetTempVal() : easyweb.c , easyweb.h
  • GLCD_Backlight() : glcd_ll.c , glcd_ll.h
  • GLCD_Bargraph() : GLCD.h , GLCD_SPI_LPC1700.c
  • GLCD_Bitmap() : GLCD_SPI_LPC1700.c , GLCD.h
  • GLCD_Bmp() : GLCD.h , GLCD_SPI_LPC1700.c
  • GLCD_Clear() : GLCD.h , GLCD_SPI_LPC1700.c
  • GLCD_ClearLn() : GLCD.h , GLCD_SPI_LPC1700.c
  • GLCD_DisplayChar() : GLCD.h , GLCD_SPI_LPC1700.c
  • GLCD_DisplayString() : GLCD.h , GLCD_SPI_LPC1700.c
  • GLCD_DrawChar() : GLCD.h , GLCD_SPI_LPC1700.c
  • GLCD_Init() : GLCD.h , GLCD_SPI_LPC1700.c
  • GLCD_LLInit() : glcd_ll.h , glcd_ll.c
  • GLCD_PowerUpInit() : drv_glcd.c , drv_glcd.h
  • GLCD_print() : drv_glcd.c , drv_glcd.h
  • GLCD_putchar() : drv_glcd.c , drv_glcd.h
  • GLCD_PutPixel() : GLCD.h , GLCD_SPI_LPC1700.c
  • GLCD_SendCmd() : drv_glcd.c , drv_glcd.h
  • GLCD_SetBackColor() : GLCD.h , GLCD_SPI_LPC1700.c
  • GLCD_SetFont() : drv_glcd.c , drv_glcd.h
  • GLCD_SetReset() : glcd_ll.c , glcd_ll.h
  • GLCD_SetTextColor() : GLCD.h , GLCD_SPI_LPC1700.c
  • GLCD_SetWindow() : drv_glcd.c , drv_glcd.h
  • GLCD_SPI_ChipSelect() : glcd_ll.c , glcd_ll.h
  • GLCD_SPI_Init() : glcd_ll.c , glcd_ll.h
  • GLCD_SPI_ReceiveBlock() : glcd_ll.c , glcd_ll.h
  • GLCD_SPI_SendBlock() : glcd_ll.h , glcd_ll.c
  • GLCD_SPI_SetClockFreq() : glcd_ll.c , glcd_ll.h
  • GLCD_SPI_SetWordWidth() : glcd_ll.h , glcd_ll.c
  • GLCD_SPI_TranserByte() : glcd_ll.c , glcd_ll.h
  • GLCD_TextSetPos() : drv_glcd.c , drv_glcd.h
  • GLCD_TextSetTabSize() : drv_glcd.c , drv_glcd.h
  • GLCD_WindowMax() : GLCD.h , GLCD_SPI_LPC1700.c
  • GPDMA_ChannelCmd() : lpc17xx_gpdma.h
  • GPDMA_ClearIntPending() : lpc17xx_gpdma.h
  • GPDMA_Init() : lpc17xx_gpdma.h
  • GPDMA_IntGetStatus() : lpc17xx_gpdma.h
  • GPDMA_Setup() : lpc17xx_gpdma.h
  • GPIO_ClearInt() : lpc17xx_gpio.h
  • GPIO_ClearValue() : lpc17xx_gpio.h
  • GPIO_GetIntStatus() : lpc17xx_gpio.h
  • GPIO_IntCmd() : lpc17xx_gpio.h
  • GPIO_ReadValue() : lpc17xx_gpio.h
  • GPIO_SetDir() : lpc17xx_gpio.h
  • GPIO_SetValue() : lpc17xx_gpio.h
Generated on Tue Jun 7 15:00:15 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Data Fields

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- h -

  • hello_world_appcall() : hello-world.c
  • hello_world_init() : hello-world.c
  • HID_GetIdle() : hiduser.h , hiduser.c
  • HID_GetProtocol() : hiduser.c , hiduser.h
  • HID_GetReport() : hiduser.h , hiduser.c
  • HID_SetIdle() : hiduser.c , hiduser.h
  • HID_SetProtocol() : hiduser.c , hiduser.h
  • HID_SetReport() : hiduser.c , hiduser.h
  • htons() : uip.h , uip.c
  • httpd_appcall() : httpd.c , httpd.h
  • httpd_cgi() : httpd-cgi.c
  • HTTPD_CGI_CALL() : httpd-cgi.c
  • httpd_cgi_init() : httpd-cgi.h
  • httpd_fs_count() : httpd-fs.h , httpd-fs.c
  • httpd_fs_init() : httpd-fs.c , httpd-fs.h
  • httpd_fs_open() : httpd-fs.h , httpd-fs.c
  • httpd_init() : httpd.h , httpd.c
  • httpd_log() : httpd.h
  • httpd_log_file() : httpd.h
  • HTTPServer() : easyweb.c , easyweb.h
Generated on Tue Jun 7 15:00:15 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Data Fields

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- i -

  • I2C0_IRQHandler() : i2c_master_slave_int_test.c , i2c_monitor.c , i2c_interrupt_test.c
  • I2C2_IRQHandler() : i2c_master_slave_int_test.c
  • I2C_Cmd() : lpc17xx_i2c.h
  • I2C_DeInit() : lpc17xx_i2c.h
  • I2C_GetLastStatusCode() : lpc17xx_i2c.h
  • I2C_Init() : lpc17xx_i2c.h
  • I2C_IntCmd() : lpc17xx_i2c.h
  • I2C_MasterHandler() : lpc17xx_i2c.h
  • I2C_MasterTransferComplete() : lpc17xx_i2c.h
  • I2C_MasterTransferData() : lpc17xx_i2c.h
  • I2C_MonitorGetDatabuffer() : lpc17xx_i2c.h
  • I2C_MonitorHandler() : lpc17xx_i2c.h
  • I2C_MonitorModeCmd() : lpc17xx_i2c.h
  • I2C_MonitorModeConfig() : lpc17xx_i2c.h
  • I2C_SetOwnSlaveAddr() : lpc17xx_i2c.h
  • I2C_SlaveHandler() : lpc17xx_i2c.h
  • I2C_SlaveTransferComplete() : lpc17xx_i2c.h
  • I2C_SlaveTransferData() : lpc17xx_i2c.h
  • I2S_Config() : lpc17xx_i2s.h
  • I2S_DeInit() : lpc17xx_i2s.h
  • I2S_DMACmd() : lpc17xx_i2s.h
  • I2S_DMAConfig() : lpc17xx_i2s.h
  • I2S_FreqConfig() : lpc17xx_i2s.h
  • I2S_GetIRQDepth() : lpc17xx_i2s.h
  • I2S_GetIRQStatus() : lpc17xx_i2s.h
  • I2S_GetLevel() : lpc17xx_i2s.h
  • I2S_Init() : lpc17xx_i2s.h
  • I2S_IRQCmd() : lpc17xx_i2s.h
  • I2S_IRQConfig() : lpc17xx_i2s.h
  • I2S_IRQHandler() : i2s_irq_test.c , i2s_mclk.c , i2s_two_kit.c
  • I2S_ModeConfig() : lpc17xx_i2s.h
  • I2S_Mute() : lpc17xx_i2s.h
  • I2S_Pause() : lpc17xx_i2s.h
  • I2S_Receive() : lpc17xx_i2s.h
  • I2S_Send() : lpc17xx_i2s.h
  • I2S_SetBitRate() : lpc17xx_i2s.h
  • I2S_Start() : lpc17xx_i2s.h
  • I2S_Stop() : lpc17xx_i2s.h
  • Init_EMAC() : EMAC.h , EMAC.c
  • init_serial() : Serial.c
  • InitLED() : extint_sleep.c
  • InitOsc() : easyweb.h
  • InitPorts() : easyweb.h
  • InsertDynamicValues() : easyweb.c , easyweb.h
  • IsBroadcast() : tcpip.c
Generated on Tue Jun 7 15:00:15 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Data Fields

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- p -

  • PacketGen() : emactest.c
  • PCA8581_Read() : pca8581_test.c
  • PCA8581_Write() : pca8581_test.c
  • PINSEL_ConfigPin() : lpc17xx_pinsel.h
  • PINSEL_ConfigTraceFunc() : lpc17xx_pinsel.h
  • PINSEL_SetI2C0Pins() : lpc17xx_pinsel.h
  • PrepareARP_ANSWER() : tcpip.h , tcpip.c
  • PrepareARP_REQUEST() : tcpip.c , tcpip.h
  • PrepareICMP_ECHO_REPLY() : tcpip.c , tcpip.h
  • PrepareTCP_DATA_FRAME() : tcpip.c , tcpip.h
  • PrepareTCP_FRAME() : tcpip.h , tcpip.c
  • print_menu() : master.c , sc16is750_polling.c , ssp_slave.c , i2c_master_slave_int_test.c , ti_test.c , timer_capture.c , adc_burst_test.c , i2c_monitor.c , freqmeasure.c , gen_diff_delay.c , pca8581_test.c , gen_diff_freqs.c , timer_int_match.c , adc_dma_test.c , i2c_interrupt_test.c , timer_poll_match.c , pwm_signal.c , i2c_polling_test.c , uart_autobaud_test.c , uart_dma_test.c , adc_hardware_trigger_test.c , slave.c , uart_hw_flow_control.c , uart_interrupt_test.c , i2s_dma_test.c , uart_irda_receive.c , uart_irda_transmit.c , adc_interrupt_test.c , i2s_irq_test.c , uart_polling_test.c , wdt_interrupt_test.c , rs485_master.c , i2s_mclk.c , rs485_slave.c , uart_fullmodem_test.c , adc_polling_test.c , i2s_test_4_wire.c , i2s_two_kit.c , can_ledcontrol.c , i2s_polling.c , lcdtest.c , can_self_test.c , nvic_priority.c , vt_relocation.c , can_test_aflut.c , extint_sleep.c , nmi_powerdown.c , can_test_bypass_mode.c , rtc_deeppwd.c , wdt_deepsleep.c , can_test_two_kit.c , sc16is750_int.c , microwire_test.c , ssp_master.c , rtc_alarm_cntincr_int.c , spi_slave.c , spi_sdcard.c , rtc_calib.c , dac_wave_generate.c , spi_loopback_test.c , spi_master.c , flash_2_ram.c , spi_interrupt_test.c , spi_polling_test.c , gpdma_sleep.c , link_list.c , ssp_dma.c , gpdma_r2r_test.c
  • printf() : printf-stdarg.c
  • PrintMessage() : can_test_two_kit.c , can_self_test.c , can_test_aflut.c , can_test_bypass_mode.c
  • ProcessEthBroadcastFrame() : tcpip.c , tcpip.h
  • ProcessEthIAFrame() : tcpip.c , tcpip.h
  • ProcessICMPFrame() : tcpip.h , tcpip.c
  • ProcessTCPFrame() : tcpip.c , tcpip.h
  • psock_datalen() : psock.h , psock.c
  • psock_init() : psock.h , psock.c
  • psock_newdata() : psock.c , psock.h
  • PT_THREAD() : psock.c , httpd-cgi.h , psock.h , psock.c , psock.h , psock.c , psock.h
  • PWM1_IRQHandler() : pwm_match_int.c
  • PWM_ChannelCmd() : lpc17xx_pwm.h
  • PWM_ChannelConfig() : lpc17xx_pwm.h
  • PWM_ClearIntPending() : lpc17xx_pwm.h
  • PWM_Cmd() : lpc17xx_pwm.h
  • PWM_ConfigCapture() : lpc17xx_pwm.h
  • PWM_ConfigMatch() : lpc17xx_pwm.h
  • PWM_ConfigStructInit() : lpc17xx_pwm.h
  • PWM_CounterCmd() : lpc17xx_pwm.h
  • PWM_DeInit() : lpc17xx_pwm.h
  • PWM_GetCaptureValue() : lpc17xx_pwm.h
  • PWM_GetIntStatus() : lpc17xx_pwm.h
  • PWM_Init() : lpc17xx_pwm.h
  • PWM_MatchUpdate() : lpc17xx_pwm.h
  • PWM_MultiMatchUpdate() : lpc17xx_pwm.c
  • PWM_PinConfig() : lpc17xx_pwm.h
  • PWM_ResetCounter() : lpc17xx_pwm.h
Generated on Tue Jun 7 15:00:15 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Data Fields

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- q -

  • QEI_CalculateRPM() : lpc17xx_qei.h
  • QEI_ConfigStructInit() : lpc17xx_qei.h
  • QEI_DeInit() : lpc17xx_qei.h
  • QEI_GetIndex() : lpc17xx_qei.h
  • QEI_GetIntStatus() : lpc17xx_qei.h
  • QEI_GetPosition() : lpc17xx_qei.h
  • QEI_GetStatus() : lpc17xx_qei.h
  • QEI_GetTimer() : lpc17xx_qei.h
  • QEI_GetVelocity() : lpc17xx_qei.h
  • QEI_GetVelocityCap() : lpc17xx_qei.h
  • QEI_Init() : lpc17xx_qei.h
  • QEI_IntClear() : lpc17xx_qei.h
  • QEI_IntCmd() : lpc17xx_qei.h
  • QEI_IntSet() : lpc17xx_qei.h
  • QEI_IRQHandler() : qei_test_velo.c
  • QEI_Reset() : lpc17xx_qei.h
  • QEI_SetDigiFilter() : lpc17xx_qei.h
  • QEI_SetIndexComp() : lpc17xx_qei.h
  • QEI_SetMaxPosition() : lpc17xx_qei.h
  • QEI_SetPositionComp() : lpc17xx_qei.h
  • QEI_SetTimerReload() : lpc17xx_qei.h
  • QEI_SetVelocityComp() : lpc17xx_qei.h
Generated on Tue Jun 7 15:00:15 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Data Fields

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- r -

  • RdCmdDat() : usbhw.c
  • Rdy4Tx() : EMAC.c , EMAC.h
  • ReadFrame_EMAC() : EMAC.c
  • ReadFrameBE_EMAC() : EMAC.c , EMAC.h
  • RequestSend() : EMAC.c , EMAC.h
  • resolv_appcall() : resolv.c
  • resolv_conf() : resolv.c
  • resolv_found() : resolv.h
  • resolv_getserver() : resolv.c
  • resolv_init() : resolv.c
  • resolv_lookup() : resolv.c
  • resolv_query() : resolv.c
  • RIT_Cmd() : lpc17xx_rit.h
  • RIT_DeInit() : lpc17xx_rit.h
  • RIT_GetIntStatus() : lpc17xx_rit.h
  • RIT_Init() : lpc17xx_rit.h
  • RIT_IRQHandler() : rit_interrupt.c
  • RIT_TimerClearCmd() : lpc17xx_rit.h
  • RIT_TimerConfig() : lpc17xx_rit.h
  • RIT_TimerDebugCmd() : lpc17xx_rit.h
  • RTC_AlarmIntConfig() : lpc17xx_rtc.h
  • RTC_CalibConfig() : lpc17xx_rtc.h
  • RTC_CalibCounterCmd() : lpc17xx_rtc.h
  • RTC_ClearIntPending() : lpc17xx_rtc.h
  • RTC_Cmd() : lpc17xx_rtc.h
  • RTC_CntIncrIntConfig() : lpc17xx_rtc.h
  • RTC_DeInit() : lpc17xx_rtc.h
  • RTC_GetAlarmTime() : lpc17xx_rtc.h
  • RTC_GetFullAlarmTime() : lpc17xx_rtc.h
  • RTC_GetFullTime() : lpc17xx_rtc.h
  • RTC_GetIntPending() : lpc17xx_rtc.h
  • RTC_GetTime() : lpc17xx_rtc.h
  • RTC_Init() : lpc17xx_rtc.h
  • RTC_IRQHandle() : rtc_calib.c
  • RTC_IRQHandler() : rtc_alarm_cntincr_int.c , rtc_deeppwd.c , rtc_calib.c
  • RTC_ReadGPREG() : lpc17xx_rtc.h
  • RTC_ResetClockTickCounter() : lpc17xx_rtc.h
  • RTC_SetAlarmTime() : lpc17xx_rtc.h
  • RTC_SetFullAlarmTime() : lpc17xx_rtc.h
  • RTC_SetFullTime() : lpc17xx_rtc.h
  • RTC_SetTime() : lpc17xx_rtc.h
  • RTC_WriteGPREG() : lpc17xx_rtc.h
Generated on Tue Jun 7 15:00:15 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Data Fields

  • All
  • Functions
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- s -

  • SD_GetCardConnectStatus() : spi_sdcard.c
  • SD_GetCID() : spi_sdcard.c
  • SD_Init() : spi_sdcard.c
  • SD_SendCommand() : spi_sdcard.c
  • SD_SendReceiveData_Polling() : spi_sdcard.c
  • SD_WaitDeviceIdle() : spi_sdcard.c
  • SD_WaitR1() : spi_sdcard.c
  • sendchar() : printf-stdarg.c , Retarget.c , Serial.c
  • SendFrame1() : tcpip.c , tcpip.h
  • SendFrame2() : tcpip.c , tcpip.h
  • ser_AvailChar() : serial.h , serial.c
  • ser_ClosePort() : serial.c , serial.h
  • ser_InitPort0() : serial.c , serial.h
  • ser_InitPort1() : serial.c , serial.h
  • ser_LineState() : serial.c , serial.h
  • ser_OpenPort() : serial.c , serial.h
  • ser_Read() : serial.c , serial.h
  • ser_Write() : serial.c , serial.h
  • SetOutReport() : demo.h , demo.c
  • shell_init() : shell.c , shell.h
  • shell_input() : shell.c , shell.h
  • shell_output() : shell.h , telnetd.c
  • shell_prompt() : shell.h , telnetd.c
  • shell_quit() : shell.h , telnetd.c
  • shell_start() : shell.c , shell.h
  • smtp_appcall() : smtp.c
  • smtp_configure() : smtp.c , smtp.h
  • smtp_done() : smtp.h
  • smtp_init() : smtp.c
  • smtp_send() : smtp.c , smtp.h
  • snprintf() : printf-stdarg.c
  • SPI_CheckStatus() : lpc17xx_spi.h
  • SPI_ClearIntPending() : lpc17xx_spi.h
  • SPI_ConfigStructInit() : lpc17xx_spi.h
  • SPI_DeInit() : lpc17xx_spi.h
  • SPI_GetDataSize() : lpc17xx_spi.h
  • SPI_GetIntStatus() : lpc17xx_spi.h
  • SPI_GetStatus() : lpc17xx_spi.h
  • SPI_Init() : lpc17xx_spi.h
  • SPI_IntCmd() : lpc17xx_spi.h
  • SPI_IRQHandler() : spi_interrupt_test.c
  • SPI_ReadWrite() : lpc17xx_spi.h
  • SPI_ReceiveData() : lpc17xx_spi.h
  • SPI_SendData() : lpc17xx_spi.h
  • SPI_SetClock() : lpc17xx_spi.h
  • sprintf() : printf-stdarg.c
  • SSP0_IRQHandler() : sc16is750_int.c , ssp_slave.c , ti_test.c
  • SSP1_IRQHandler() : ti_test.c
  • SSP_ClearIntPending() : lpc17xx_ssp.h
  • SSP_Cmd() : lpc17xx_ssp.h
  • SSP_ConfigStructInit() : lpc17xx_ssp.h
  • SSP_DeInit() : lpc17xx_ssp.h
  • SSP_DMACmd() : lpc17xx_ssp.h
  • SSP_GetDataSize() : lpc17xx_ssp.h
  • SSP_GetIntStatus() : lpc17xx_ssp.h
  • SSP_GetRawIntStatus() : lpc17xx_ssp.h
  • SSP_GetRawIntStatusReg() : lpc17xx_ssp.h
  • SSP_GetStatus() : lpc17xx_ssp.h
  • SSP_Init() : lpc17xx_ssp.h
  • SSP_IntConfig() : lpc17xx_ssp.h
  • SSP_LoopBackCmd() : lpc17xx_ssp.h
  • ssp_Master_IntHandler() : ti_test.c
  • ssp_MasterReadWrite() : ti_test.c
  • ssp_MW_GetCMD() : microwire_test.c
  • ssp_MW_GetRSP() : microwire_test.c
  • ssp_MW_SendCMD() : microwire_test.c
  • ssp_MW_SendRSP() : microwire_test.c
  • SSP_ReadWrite() : lpc17xx_ssp.h
  • SSP_ReceiveData() : lpc17xx_ssp.h
  • SSP_SendData() : lpc17xx_ssp.h
  • ssp_Slave_IntHandler() : ti_test.c
  • SSP_SlaveOutputCmd() : lpc17xx_ssp.h
  • ssp_SlaveReadWrite() : ti_test.c
  • StartReadFrame() : EMAC.h , EMAC.c
  • SVC_Handler() : privilege.c
  • SwapBytes() : tcpip.c , tcpip.h
  • SystemCoreClockUpdate() : system_LPC17xx.h , system_LPC17xx.c
  • SystemInit() : system_LPC17xx.c , system_LPC17xx.h
  • SYSTICK_ClearCounterFlag() : lpc17xx_systick.h
  • SYSTICK_Cmd() : lpc17xx_systick.h
  • SYSTICK_ExternalInit() : lpc17xx_systick.h
  • SYSTICK_GetCurrentValue() : lpc17xx_systick.h
  • SysTick_Handler() : 10ms_base.c , LedBlinky.c , systick_stclk.c , clock-arch.c , tcpip.c , vt_relocation.c , tcpip.h
  • SYSTICK_IntCmd() : lpc17xx_systick.h
  • SYSTICK_InternalInit() : lpc17xx_systick.h
Generated on Tue Jun 7 15:00:16 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Data Fields

  • All
  • Functions
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- t -

  • tapdev_init() : emac.c , emac.h
  • tapdev_read() : emac.h , emac.c
  • tapdev_send() : emac.c , emac.h
  • TCPActiveOpen() : tcpip.h , tcpip.c
  • TCPClose() : tcpip.c , tcpip.h
  • TCPHandleRetransmission() : tcpip.c , tcpip.h
  • TCPHandleTimeout() : tcpip.c , tcpip.h
  • TCPLowLevelInit() : tcpip.h , tcpip.c
  • TCPPassiveOpen() : tcpip.c , tcpip.h
  • TCPReleaseRxBuffer() : tcpip.c , tcpip.h
  • TCPRestartTimer() : tcpip.c , tcpip.h
  • TCPStartRetryTimer() : tcpip.c , tcpip.h
  • TCPStartTimeWaitTimer() : tcpip.c , tcpip.h
  • TCPStopTimer() : tcpip.c , tcpip.h
  • TCPTransmitTxBuffer() : tcpip.c , tcpip.h
  • telnetd_appcall() : telnetd.h , telnetd.c
  • telnetd_init() : telnetd.c
  • TIM_ClearIntCapturePending() : lpc17xx_timer.h
  • TIM_ClearIntPending() : lpc17xx_timer.h
  • TIM_Cmd() : lpc17xx_timer.h
  • TIM_ConfigCapture() : lpc17xx_timer.h
  • TIM_ConfigMatch() : lpc17xx_timer.h
  • TIM_ConfigStructInit() : lpc17xx_timer.h
  • TIM_DeInit() : lpc17xx_timer.h
  • TIM_GetCaptureValue() : lpc17xx_timer.h
  • TIM_GetIntCaptureStatus() : lpc17xx_timer.h
  • TIM_GetIntStatus() : lpc17xx_timer.h
  • TIM_Init() : lpc17xx_timer.h
  • TIM_ResetCounter() : lpc17xx_timer.h
  • TIM_SetMatchExt() : lpc17xx_timer.h
  • TIM_UpdateMatchValue() : lpc17xx_timer.h
  • TIMER0_IRQHandler() : pwm_signal.c , qei_test_velo.c , usbdmain.c , freqmeasure.c , timer_capture.c , lcdtest.c , gen_diff_delay.c , timer_int_match.c
  • TIMER1_IRQHandler() : pwm_signal.c , timer_capture.c
  • TIMER2_IRQHandler() : pwm_signal.c
  • TIMER3_IRQHandler() : pwm_signal.c
  • timer_expired() : timer.c
  • timer_reset() : timer.c
  • timer_restart() : timer.c
  • timer_set() : timer.c
  • Turn_off_LED() : privilege.c
  • Turn_on_LED() : privilege.c
Generated on Tue Jun 7 15:00:16 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Data Fields

  • All
  • Functions
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- u -

  • UART0_IRQHandler() : uart_autobaud_test.c , uart_interrupt_test.c , serial.c
  • UART1_IntErr() : uart_fullmodem_test.c
  • UART1_IntReceive() : uart_fullmodem_test.c
  • UART1_IntTransmit() : uart_fullmodem_test.c
  • UART1_IRQHandler() : rs485_slave.c , uart_fullmodem_test.c , serial.c , rs485_master.c
  • UART_ABClearIntPending() : lpc17xx_uart.h
  • UART_ABCmd() : lpc17xx_uart.h
  • UART_CheckBusy() : lpc17xx_uart.h
  • UART_ConfigStructInit() : lpc17xx_uart.h
  • UART_DeInit() : lpc17xx_uart.h
  • UART_FIFOConfig() : lpc17xx_uart.h
  • UART_FIFOConfigStructInit() : lpc17xx_uart.h
  • UART_ForceBreak() : lpc17xx_uart.h
  • UART_FullModemConfigMode() : lpc17xx_uart.h
  • UART_FullModemForcePinState() : lpc17xx_uart.h
  • UART_FullModemGetStatus() : lpc17xx_uart.h
  • UART_GetIntId() : lpc17xx_uart.h
  • UART_GetLineStatus() : lpc17xx_uart.h
  • UART_Init() : lpc17xx_uart.h
  • UART_IntConfig() : lpc17xx_uart.h
  • UART_IntErr() : uart_interrupt_test.c , rs485_master.c , rs485_slave.c
  • UART_IntReceive() : uart_interrupt_test.c , rs485_master.c , rs485_slave.c
  • UART_IntTransmit() : uart_interrupt_test.c
  • UART_IrDACmd() : lpc17xx_uart.h
  • UART_IrDAInvtInputCmd() : lpc17xx_uart.h
  • UART_IrDAPulseDivConfig() : lpc17xx_uart.h
  • UART_Receive() : lpc17xx_uart.h
  • UART_ReceiveByte() : lpc17xx_uart.h
  • UART_RS485Config() : lpc17xx_uart.h
  • UART_RS485ReceiverCmd() : lpc17xx_uart.h
  • UART_RS485Send() : lpc17xx_uart.c
  • UART_RS485SendData() : lpc17xx_uart.h
  • UART_RS485SendSlvAddr() : lpc17xx_uart.h
  • UART_Send() : lpc17xx_uart.h
  • UART_SendByte() : lpc17xx_uart.h
  • UART_TxCmd() : lpc17xx_uart.h
  • UARTGetChar() : debug_frmwrk.h , debug_frmwrk.c
  • UARTPutChar() : debug_frmwrk.h , debug_frmwrk.c
  • UARTPutDec() : debug_frmwrk.h , debug_frmwrk.c
  • UARTPutDec16() : debug_frmwrk.h , debug_frmwrk.c
  • UARTPutDec32() : debug_frmwrk.h , debug_frmwrk.c
  • UARTPutHex() : debug_frmwrk.h , debug_frmwrk.c
  • UARTPutHex16() : debug_frmwrk.h , debug_frmwrk.c
  • UARTPutHex32() : debug_frmwrk.h , debug_frmwrk.c
  • UARTPuts() : debug_frmwrk.h , debug_frmwrk.c
  • UARTPuts_() : debug_frmwrk.h , debug_frmwrk.c
  • UARTReceive() : uart_interrupt_test.c , rs485_master.c , rs485_slave.c , uart_fullmodem_test.c
  • UARTSend() : uart_interrupt_test.c , uart_fullmodem_test.c
  • uip_add32() : uip.c , uip_arch.h
  • uip_arp_arpin() : uip_arp.c
  • uip_arp_init() : uip_arp.c
  • uip_arp_ipin() : uip_arp.c
  • uip_arp_out() : uip_arp.c
  • uip_arp_timer() : uip_arp.c
  • uip_chksum() : uip.c , uip.h , uip_arch.h
  • uip_connect() : uip.c , uip.h
  • uip_fw_default() : uip-fw.c
  • uip_fw_forward() : uip-fw.c
  • uip_fw_init() : uip-fw.c
  • uip_fw_output() : uip-fw.c
  • uip_fw_periodic() : uip-fw.c
  • uip_fw_register() : uip-fw.c
  • uip_init() : uip.c , uip.h
  • uip_ipchksum() : uip.c , uip.h , uip_arch.h
  • uip_listen() : uip.c , uip.h
  • uip_log() : main.c , uipopt.h
  • uip_neighbor_add() : uip-neighbor.c , uip-neighbor.h
  • uip_neighbor_init() : uip-neighbor.c , uip-neighbor.h
  • uip_neighbor_lookup() : uip-neighbor.c , uip-neighbor.h
  • uip_neighbor_periodic() : uip-neighbor.c , uip-neighbor.h
  • uip_neighbor_update() : uip-neighbor.c , uip-neighbor.h
  • uip_process() : uip.c , uip.h
  • uip_send() : uip.c , uip.h
  • uip_setipid() : uip.c , uip.h
  • uip_split_output() : uip-split.c , uip-split.h
  • uip_tcpchksum() : uip.c , uip.h , uip_arch.h
  • uip_udp_new() : uip.h
  • uip_udpchksum() : uip.h , uip_arch.h
  • uip_unlisten() : uip.c , uip.h
  • uiplib_ipaddrconv() : uiplib.c , uiplib.h
  • USB_ClearEPBuf() : usbhw.h , usbhw.c , usbhw.h , usbhw.c
  • USB_ClrStallEP() : usbhw.c , usbhw.h , usbhw.c , usbhw.h , usbhw.c , usbhw.h , usbhw.c , usbhw.h
  • USB_ConfigEP() : usbhw.c , usbhw.h , usbhw.c , usbhw.h , usbhw.c , usbhw.h , usbhw.c , usbhw.h
  • USB_Configure() : usbhw.c , usbhw.h , usbhw.c , usbhw.h , usbhw.c , usbhw.h , usbhw.c , usbhw.h
  • USB_Configure_Event() : usbuser.h , usbuser.c , usbuser.h , usbuser.c , usbuser.h , usbuser.c , usbuser.h
  • USB_Connect() : usbhw.c , usbhw.h , usbhw.c , usbhw.h , usbhw.c , usbhw.h , usbhw.c , usbhw.h
  • USB_DataInStage() : usbcore.c
  • USB_DataOutStage() : usbcore.c
  • USB_DirCtrlEP() : usbhw.c , usbhw.h , usbhw.c , usbhw.h , usbhw.c , usbhw.h , usbhw.c , usbhw.h
  • USB_DisableEP() : usbhw.c , usbhw.h , usbhw.c , usbhw.h , usbhw.c , usbhw.h , usbhw.c , usbhw.h
  • USB_DMA_BufAdr() : usbhw.h , usbhw.c , usbhw.h , usbhw.c , usbhw.h
  • USB_DMA_BufCnt() : usbhw.h , usbhw.c , usbhw.h , usbhw.c , usbhw.h
  • USB_DMA_Disable() : usbhw.h , usbhw.c , usbhw.h , usbhw.c , usbhw.h
  • USB_DMA_Enable() : usbhw.h , usbhw.c , usbhw.h , usbhw.c , usbhw.h
  • USB_DMA_Setup() : usbhw.h , usbhw.c , usbhw.h , usbhw.c , usbhw.h
  • USB_DMA_Status() : usbhw.h , usbhw.c , usbhw.h , usbhw.c , usbhw.h
  • USB_EnableEP() : usbhw.c , usbhw.h , usbhw.c , usbhw.h , usbhw.c , usbhw.h , usbhw.c , usbhw.h
  • USB_EndPoint0() : usbcore.c , usbuser.h , usbcore.c , usbuser.h , usbcore.c , usbuser.h , usbcore.c , usbuser.h
  • USB_EndPoint1() : usbuser.c , usbuser.h , usbuser.c , usbuser.h , usbuser.c , usbuser.h , usbuser.c , usbuser.h
  • USB_EndPoint10() : usbuser.c , usbuser.h , usbuser.c , usbuser.h , usbuser.c , usbuser.h , usbuser.c , usbuser.h
  • USB_EndPoint11() : usbuser.c , usbuser.h , usbuser.c , usbuser.h , usbuser.c , usbuser.h , usbuser.c , usbuser.h
  • USB_EndPoint12() : usbuser.c , usbuser.h , usbuser.c , usbuser.h , usbuser.c , usbuser.h , usbuser.c , usbuser.h
  • USB_EndPoint13() : usbuser.h , usbuser.c , usbuser.h , usbuser.c , usbuser.h , usbuser.c , usbuser.h
  • USB_EndPoint14() : usbuser.h , usbuser.c , usbuser.h , usbuser.c , usbuser.h , usbuser.c , usbuser.h
  • USB_EndPoint15() : usbuser.h , usbuser.c , usbuser.h , usbuser.c , usbuser.h
  • USB_EndPoint2() : usbuser.c , usbuser.h , usbuser.c , usbuser.h , usbuser.c , usbuser.h
  • USB_EndPoint3() : usbuser.c , usbuser.h , usbuser.c , usbuser.h
  • USB_EndPoint4() : usbuser.c , usbuser.h , usbuser.c , usbuser.h , usbuser.c , usbuser.h
  • USB_EndPoint5() : usbuser.c , usbuser.h , usbuser.c , usbuser.h
  • USB_EndPoint6() : usbuser.c , usbuser.h , usbuser.c , usbuser.h , usbuser.c , usbuser.h
  • USB_EndPoint7() : usbuser.c , usbuser.h , usbuser.c , usbuser.h
  • USB_EndPoint8() : usbuser.c , usbuser.h , usbuser.c , usbuser.h , usbuser.c , usbuser.h
  • USB_EndPoint9() : usbuser.c , usbuser.h , usbuser.c , usbuser.h
  • USB_Error_Event() : usbuser.h
  • USB_Feature_Event() : usbuser.h
  • USB_GetDescriptor() : usbcore.c
  • USB_GetFrame() : usbhw.h , usbhw.c
  • USB_GetStatus() : usbcore.c
  • USB_Init() : usbhw.c , usbhw.h , usbhw.c , usbhw.h , usbhw.c
  • USB_Interface_Event() : usbuser.h
  • USB_IRQHandler() : usbhw.h , usbhw.c , usbhw.h , usbhw.c , usbhw.h , usbhw.c
  • USB_Power_Event() : usbuser.h
  • USB_ReadEP() : usbhw.c , usbhw.h , usbhw.c , usbhw.h
  • USB_ReqGetConfiguration() : usbcore.c
  • USB_ReqGetDescriptor() : usbcore.c
  • USB_ReqGetInterface() : usbcore.c
  • USB_ReqGetStatus() : usbcore.c
  • USB_ReqSetAddress() : usbcore.c
  • USB_ReqSetClrFeature() : usbcore.c
  • USB_ReqSetConfiguration() : usbcore.c
  • USB_ReqSetInterface() : usbcore.c
  • USB_Reset() : usbhw.h , usbhw.c , usbhw.h , usbhw.c , usbhw.h , usbhw.c
  • USB_Reset_Event() : usbuser.c , usbuser.h , usbuser.c
  • USB_ResetCore() : usbcore.h , usbcore.c , usbcore.h , usbcore.c
  • USB_ResetEP() : usbhw.c , usbhw.h , usbhw.c , usbhw.h , usbhw.c
  • USB_Resume() : usbhw.c , usbhw.h , usbhw.c , usbhw.h
  • USB_Resume_Event() : usbuser.h
  • USB_SetAddress() : usbhw.h , usbhw.c , usbhw.h , usbhw.c , usbhw.h
  • USB_SetClrFeature() : usbcore.c
  • USB_SetConfiguration() : usbcore.c
  • USB_SetInterface() : usbcore.c
  • USB_SetStallEP() : usbhw.c , usbhw.h , usbhw.c , usbhw.h , usbhw.c , usbhw.h
  • USB_SetupStage() : usbcore.c
  • USB_SOF_Event() : usbuser.h , usbuser.c , usbuser.h
  • USB_StatusInStage() : usbcore.c
  • USB_StatusOutStage() : usbcore.c
  • USB_Suspend() : usbhw.c , usbhw.h , usbhw.c , usbhw.h , usbhw.c , usbhw.h
  • USB_Suspend_Event() : usbuser.h
  • USB_WakeUp() : usbhw.h , usbhw.c , usbhw.h , usbhw.c , usbhw.h
  • USB_WakeUp_Event() : usbuser.h
  • USB_WakeUpCfg() : usbhw.h , usbhw.c , usbhw.h
  • USB_WriteEP() : usbhw.c , usbhw.h , usbhw.c , usbhw.h , usbhw.c , usbhw.h , usbhw.c
  • Usr_Init_Emac() : emactest.c
Generated on Tue Jun 7 15:00:16 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Data Fields

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  • Functions
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- v -

  • VCOM_CheckSerialState() : vcomdemo.c
  • VCOM_Init() : vcomdemo.c
  • VCOM_Serial2Usb() : vcomdemo.c
  • VCOM_Usb2Serial() : vcomdemo.c
  • VirtualQEISignal_Init() : qei_test_velo.c
Generated on Tue Jun 7 15:00:16 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Data Fields

  • All
  • Functions
  • Variables
  • Typedefs
  • Enumerations
  • Enumerator
  • Defines
  • _
  • a
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  • w

- w -

  • WDT_ClrTimeOutFlag() : lpc17xx_wdt.h
  • WDT_Feed() : lpc17xx_wdt.h
  • WDT_GetCurrentCount() : lpc17xx_wdt.h
  • WDT_Init() : lpc17xx_wdt.h
  • WDT_IRQHandler() : wdt_deepsleep.c , wdt_interrupt_test.c
  • WDT_ReadTimeOutFlag() : lpc17xx_wdt.h
  • WDT_Start() : lpc17xx_wdt.h
  • WDT_UpdateTimeOut() : lpc17xx_wdt.h
  • webclient_aborted() : webclient.h
  • webclient_appcall() : webclient.c
  • webclient_close() : webclient.c
  • webclient_closed() : webclient.h
  • webclient_connected() : webclient.h
  • webclient_datahandler() : webclient.h
  • webclient_filename() : webclient.c
  • webclient_get() : webclient.c
  • webclient_hostname() : webclient.c
  • webclient_init() : webclient.c
  • webclient_mimetype() : webclient.c
  • webclient_port() : webclient.c
  • webclient_timedout() : webclient.h
  • WrCmd() : usbhw.c
  • WrCmdDat() : usbhw.c
  • WrCmdEP() : usbhw.c
  • write() : printf-stdarg.c
  • WriteDWBE() : tcpip.h , tcpip.c
  • WriteFrame_EMAC() : EMAC.c
  • WriteWBE() : tcpip.h , tcpip.c
Generated on Tue Jun 7 15:00:16 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Data Fields

  • All
  • Functions
  • Variables
  • Typedefs
  • Enumerations
  • Enumerator
  • Defines
  • a
  • b
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  • i
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  • s
  • u

- a -

  • ASCSET_Data_t : drv_glcd.h

- b -

  • Bmp_t : drv_glcd.h
  • BOOL_16 : lpc_types.h
  • BOOL_32 : lpc_types.h
  • BOOL_8 : lpc_types.h

- c -

  • CDC_BUF_T : cdcuser.c
  • CDC_NOTIFICATION_HEADER : cdc.h
  • CHAR : lpc_types.h
  • clock_time_t : clock-arch.h
  • COLMOD_Data_t : drv_glcd.h

- d -

  • DATCTR_Data_t : drv_glcd.h

- f -

  • FontType_t : drv_glcd.h

- g -

  • GLCD_Cmd_t : drv_glcd.h
  • GLCD_CmdCtrl_t : drv_glcd.h
  • GLCD_CmdDir_t : drv_glcd.h
  • GLCD_ISS_t : drv_glcd.h
  • GLCD_Status_t : drv_glcd.h

- i -

  • INT_16 : lpc_types.h
  • INT_32 : lpc_types.h
  • INT_64 : lpc_types.h
  • INT_8 : lpc_types.h
  • IntStatus : lpc_types.h
  • IRQn_Type : LPC17xx.h

- l -

  • lc_t : lc-addrlabels.h , lc-switch.h
  • LdcPixel_t : drv_glcd.h

- m -

  • MADCTR_Data_t : drv_glcd.h

- p -

  • pASCSET_Data_t : drv_glcd.h
  • pBmp_t : drv_glcd.h
  • pCOLMOD_Data_t : drv_glcd.h
  • pDATCTR_Data_t : drv_glcd.h
  • PFI : lpc_types.h
  • pFontType_t : drv_glcd.h
  • PFV : lpc_types.h
  • pGLCD_CmdCtrl_t : drv_glcd.h
  • pLdcPixel_t : drv_glcd.h
  • pMADCTR_Data_t : drv_glcd.h

- s -

  • sd_connect_status : spi_sdcard.c
  • sd_error : spi_sdcard.c
  • SER_BUF_T : serial.c
  • SetState : lpc_types.h

- u -

  • u16_t : uip-conf.h
  • u8_t : uip-conf.h
  • uip_ip4addr_t : uip.h
  • uip_ip6addr_t : uip.h
  • uip_ipaddr_t : uip.h
  • uip_stats_t : uip-conf.h
  • uip_tcp_appstate_t : smtp.h , telnetd.h , webclient.h , webserver.h , hello-world.h
  • uip_udp_appstate_t : dhcpc.h , resolv.h
  • UNS_16 : lpc_types.h
  • UNS_32 : lpc_types.h
  • UNS_64 : lpc_types.h
  • UNS_8 : lpc_types.h
  • USB_DMA_DESCRIPTOR : usbhw.h
  • USB_EP_DATA : usbcore.h
Generated on Tue Jun 7 15:00:16 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Data Fields

  • All
  • Functions
  • Variables
  • Typedefs
  • Enumerations
  • Enumerator
  • Defines
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- _ -

  • __stdin : Retarget.c
  • __stdout : Retarget.c
  • _db : main.c
  • _db_char : debug_frmwrk.h , debug_frmwrk.c
  • _db_dec : debug_frmwrk.h , debug_frmwrk.c
  • _db_dec_16 : debug_frmwrk.h , debug_frmwrk.c
  • _db_dec_32 : debug_frmwrk.h , debug_frmwrk.c
  • _db_get_char : debug_frmwrk.h , debug_frmwrk.c
  • _db_hex : debug_frmwrk.c , debug_frmwrk.h
  • _db_hex_16 : debug_frmwrk.h , debug_frmwrk.c
  • _db_hex_32 : debug_frmwrk.h , debug_frmwrk.c
  • _db_msg : debug_frmwrk.h , debug_frmwrk.c
  • _db_msg_ : debug_frmwrk.c , debug_frmwrk.h
  • _tickVal : tcpip.c
Generated on Tue Jun 7 15:00:16 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Data Fields

  • All
  • Functions
  • Variables
  • Typedefs
  • Enumerations
  • Enumerator
  • Defines
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- l -

  • L : usb.h
  • Last_cmd : microwire_test.c
  • LastFrameSent : tcpip.h
  • lcd_text : lcdtest.c
  • LED : can_ledcontrol.c
  • led_mask : LedBlinky.c
  • Led_State : mpu_test.c
  • LED_toggle : wdt_interrupt_test.c
  • LED_Value : can_ledcontrol.c
  • LEDStatus : rit_interrupt.c , timer_int_match.c
  • Length : mscuser.c
  • long_duty : pwm_match_int.c
Generated on Tue Jun 7 15:00:16 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Data Fields

  • All
  • Functions
  • Variables
  • Typedefs
  • Enumerations
  • Enumerator
  • Defines
  • _
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- m -

  • Master_Buf : master.c , i2c_master_slave_int_test.c
  • Master_Rx_Buf : ti_test.c , microwire_test.c
  • master_test : master.c , i2c_master_slave_int_test.c
  • Master_Tx_Buf : ti_test.c
  • match_cnt : pwm_match_int.c
  • MatchCount : timer_capture.c
  • MemOK : mscuser.c
  • Memory : memory.c , mscuser.c
  • menu : can_test_bypass_mode.c , rtc_deeppwd.c , wdt_deepsleep.c , can_test_two_kit.c , rit_interrupt.c , rtc_calib.c , bitband.c , pwm_signal.c , mpu_test.c , privilege.c , flash_2_ram.c , link_list.c , i2s_dma_test.c , i2s_irq_test.c , i2s_mclk.c , can_ledcontrol.c , i2s_test_4_wire.c , i2s_two_kit.c , can_self_test.c , i2s_polling.c , vt_relocation.c , can_test_aflut.c , extint_sleep.c , nmi_powerdown.c
  • menu1 : ssp_slave.c , ti_test.c , timer_capture.c , freqmeasure.c , gen_diff_delay.c , gen_diff_freqs.c , timer_int_match.c , timer_poll_match.c , uart_autobaud_test.c , uart_dma_test.c , wdt_reset_test.c , wdt_interrupt_test.c , adc_burst_test.c , uart_hw_flow_control.c , rs485_master.c , uart_polling_test.c , uart_interrupt_test.c , adc_dma_test.c , uart_irda_receive.c , uart_irda_transmit.c , adc_hardware_trigger_test.c , adc_interrupt_test.c , rs485_slave.c , uart_fullmodem_test.c , adc_polling_test.c , dac_wave_generate.c , gpdma_sleep.c , gpdma_r2r_test.c , master.c , i2c_master_slave_int_test.c , sc16is750_polling.c , i2c_monitor.c , pca8581_test.c , i2c_interrupt_test.c , ssp_dma.c , i2c_polling_test.c , slave.c , rtc_alarm_cntincr_int.c , spi_loopback_test.c , spi_master.c , spi_interrupt_test.c , spi_polling_test.c , spi_sdcard.c , spi_slave.c , ssp_master.c , microwire_test.c , sc16is750_int.c
  • menu2 : spi_slave.c , gpdma_sleep.c , spi_loopback_test.c , uart_hw_flow_control.c , rs485_master.c , gpdma_r2r_test.c , i2c_polling_test.c , pca8581_test.c , flash_2_ram.c , uart_fullmodem_test.c , privilege.c , uart_polling_test.c , uart_interrupt_test.c , adc_dma_test.c , i2c_interrupt_test.c , link_list.c , uart_irda_receive.c , uart_irda_transmit.c , sc16is750_polling.c , ti_test.c , uart_autobaud_test.c , spi_polling_test.c , ssp_dma.c , sc16is750_int.c , ssp_master.c , spi_interrupt_test.c , ssp_slave.c , spi_master.c
  • menu3 : uart_polling_test.c , uart_fullmodem_test.c , uart_hw_flow_control.c , uart_irda_receive.c , uart_dma_test.c , uart_autobaud_test.c , uart_irda_transmit.c , uart_interrupt_test.c
  • menu4 : uart_irda_transmit.c
  • menu5 : uart_irda_transmit.c
  • MSC_CBW : msc.h
  • MSC_CSW : msc.h
  • Mute : usbdmain.c , usbaudio.h
  • MyIP : tcpip.h
  • MyMAC : tcpip.c , tcpip.h
Generated on Tue Jun 7 15:00:16 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Data Fields

  • All
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- n -

  • nextline : rs485_master.c , rs485_slave.c
  • NotificationBuf : cdcuser.c
  • NXP_Logo : NXP_logo.c , NXP_logo.h
  • NXP_LogoStream : NXP_logo.c
Generated on Tue Jun 7 15:00:16 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Data Fields

  • All
  • Functions
  • Variables
  • Typedefs
  • Enumerations
  • Enumerator
  • Defines
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- o -

  • Offset : mscuser.c
  • OutReport : demo.h , demo.c
Generated on Tue Jun 7 15:00:16 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Data Fields

  • All
  • Functions
  • Variables
  • Typedefs
  • Enumerations
  • Enumerator
  • Defines
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- a -

  • ack_msg : rs485_slave.c
  • adc_value : adc_hardware_trigger_test.c , adc_interrupt_test.c
  • addr_acc : rs485_slave.c
  • addr_auto : rs485_slave.c
  • addr_menu : rs485_slave.c
  • addr_una : rs485_slave.c
  • AFRxMsg : can_test_two_kit.c , can_test_aflut.c
  • AFTable : can_test_aflut.c
  • AFTxMsg : can_test_two_kit.c , can_test_aflut.c
Generated on Tue Jun 7 15:00:16 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Data Fields

  • All
  • Functions
  • Variables
  • Typedefs
  • Enumerations
  • Enumerator
  • Defines
  • _
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- b -

  • B : usb.h
  • bAlternateSetting : usb.h
  • bCBLength : msc.h
  • bcdCDC : cdc.h
  • bcdDevice : usb.h
  • bcdHID : hid.h
  • bcdUSB : usb.h
  • bCharFormat : cdc.h
  • bConfigurationValue : usb.h
  • bCountryCode : hid.h
  • bDataBits : cdc.h
  • bDataInterface : cdc.h
  • bDescriptorSubtype : cdc.h
  • bDescriptorType : hid.h , usb.h , cdc.h , usb.h
  • bDeviceClass : usb.h
  • bDeviceProtocol : usb.h
  • bDeviceSubClass : usb.h
  • bEndpointAddress : usb.h
  • bFunctionLength : cdc.h
  • bInterfaceClass : usb.h
  • bInterfaceNumber : usb.h
  • bInterfaceProtocol : usb.h
  • bInterfaceSubClass : usb.h
  • bInterval : usb.h
  • bLength : usb.h , hid.h , usb.h
  • bLUN : msc.h
  • BM : usb.h
  • bMasterInterface : cdc.h
  • bmAttributes : usb.h
  • bMaxPacketSize0 : usb.h
  • bMaxPower : usb.h
  • bmCapabilities : cdc.h
  • bmFlags : msc.h
  • bmRequestType : usb.h
  • bNumConfigurations : usb.h
  • bNumDescriptors : hid.h
  • bNumEndpoints : usb.h
  • bNumInterfaces : usb.h
  • bParityType : cdc.h
  • bRequest : usb.h
  • bReserved : usb.h
  • bSlaveInterfaces : cdc.h
  • bStatus : msc.h
  • bString : usb.h
  • buffer : i2c_monitor.c
  • BulkBuf : mscuser.c
  • BulkBufIn : cdcuser.c
  • BulkBufOut : cdcuser.c
  • BulkLen : mscuser.c
  • BulkStage : mscuser.c
Generated on Tue Jun 7 15:00:16 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Data Fields

  • All
  • Functions
  • Variables
  • Typedefs
  • Enumerations
  • Enumerator
  • Defines
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- c -

  • CANAF_ext_cnt : lpc17xx_can.c
  • CANAF_FullCAN_cnt : lpc17xx_can.c
  • CANAF_gext_cnt : lpc17xx_can.c
  • CANAF_gstd_cnt : lpc17xx_can.c
  • CANAF_std_cnt : lpc17xx_can.c
  • CANErrCount : can_test_aflut.c , can_test_two_kit.c
  • CANRxCount : can_self_test.c , can_test_aflut.c , can_test_bypass_mode.c , can_test_two_kit.c
  • CANTxCount : can_self_test.c , can_test_aflut.c , can_test_bypass_mode.c , can_test_two_kit.c
  • capture : freqmeasure.c
  • CB : msc.h
  • CBW : mscuser.c
  • CDC_ABSTRACT_CONTROL_MANAGEMENT_DESCRIPTOR : cdc.h
  • CDC_CALL_MANAGEMENT_DESCRIPTOR : cdc.h
  • CDC_DepInEmpty : cdcuser.c , cdcuser.h
  • CDC_HEADER_DESCRIPTOR : cdc.h
  • CDC_LINE_CODING : cdc.h
  • CDC_LineCoding : cdcuser.c
  • CDC_OutBuf : cdcuser.c
  • CDC_SerialState : cdcuser.c
  • CDC_UNION_1SLAVE_DESCRIPTOR : cdc.h
  • CDC_UNION_DESCRIPTOR : cdc.h
  • Channel0_Err : flash_2_ram.c , gpdma_sleep.c , link_list.c , gpdma_r2r_test.c , i2s_dma_test.c , ssp_dma.c , uart_dma_test.c , adc_dma_test.c , dac_dma.c
  • Channel0_TC : link_list.c , adc_dma_test.c , dac_dma.c , flash_2_ram.c , gpdma_sleep.c , gpdma_r2r_test.c , i2s_dma_test.c , ssp_dma.c , uart_dma_test.c
  • Channel1_Err : i2s_dma_test.c , ssp_dma.c , uart_dma_test.c
  • Channel1_TC : uart_dma_test.c , i2s_dma_test.c , ssp_dma.c
  • CntrSel : lcdtest.c
  • compl_menu : flash_2_ram.c , link_list.c , gpdma_sleep.c , gpdma_r2r_test.c
  • complete : ssp_slave.c , i2c_interrupt_test.c , sc16is750_int.c , spi_interrupt_test.c
  • complete_M : i2c_master_slave_int_test.c , ti_test.c
  • complete_S : ti_test.c , i2c_master_slave_int_test.c
  • count : i2c_monitor.c , freqmeasure.c
  • CriticalSecCntr : lcdtest.c
  • CSW : usbcore.c , mscuser.c
  • Cur_State : systick_stclk.c , 10ms_base.c , vt_relocation.c
Generated on Tue Jun 7 15:00:16 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Data Fields

  • All
  • Functions
  • Variables
  • Typedefs
  • Enumerations
  • Enumerator
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- d -

  • data : i2s_two_kit.c
  • DataBuf : usbaudio.h , usbdmain.c
  • DataIn : usbaudio.h , usbdmain.c
  • DataOut : usbaudio.h , usbdmain.c
  • DataRun : usbaudio.h , usbdmain.c
  • DatLen_M : microwire_test.c , ti_test.c
  • DatLen_S : microwire_test.c , ti_test.c
  • db : EMAC.c , emac.c
  • db_ : tcpip.c , emactest.c
  • DDAdr : usbhw.c
  • dDataLength : msc.h
  • dDataResidue : msc.h
  • DDSz : usbhw.c
  • DescriptorList : hid.h
  • Dir : usb.h
  • DiskImage : DiskImg.c , memory.h
  • dma_dst : ssp_dma.c
  • dma_src : ssp_dma.c
  • DMADest_Buffer : flash_2_ram.c , link_list.c
  • DMASrc_Buffer : flash_2_ram.c
  • done : freqmeasure.c , i2c_monitor.c
  • dSignature : msc.h
  • dTag : msc.h
  • dummy : i2s_mclk.c , i2s_irq_test.c
  • dwDTERate : cdc.h
Generated on Tue Jun 7 15:00:16 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Data Fields

  • All
  • Functions
  • Variables
  • Typedefs
  • Enumerations
  • Enumerator
  • Defines
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- e -

  • EFF_GPR_Table : can_test_aflut.c
  • EFF_Table : can_test_aflut.c
  • EMAC_clkdiv : lpc17xx_emac.c
  • EP0Buf : usbcore.c , usbcore.h , usbcore.c , usbcore.h , usbcore.c , usbcore.h
  • EP0Data : usbcore.h , usbcore.c , usbcore.h , usbcore.c , usbcore.h , usbcore.c , usbcore.h , usbcore.c
  • err_menu : flash_2_ram.c , gpdma_sleep.c , gpdma_r2r_test.c , link_list.c
Generated on Tue Jun 7 15:00:16 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Data Fields

  • All
  • Functions
  • Variables
  • Typedefs
  • Enumerations
  • Enumerator
  • Defines
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- f -

  • f_err_menu : rs485_master.c , rs485_slave.c
  • file_404_html : httpd-fsdata.c
  • file_fade_png : httpd-fsdata.c
  • file_files_shtml : httpd-fsdata.c
  • file_footer_html : httpd-fsdata.c
  • file_header_html : httpd-fsdata.c
  • file_index_html : httpd-fsdata.c
  • file_processes_shtml : httpd-fsdata.c
  • file_stats_shtml : httpd-fsdata.c
  • file_style_css : httpd-fsdata.c
  • file_tcp_shtml : httpd-fsdata.c
  • first_capture : freqmeasure.c
  • Font_24x16 : Font_24x16.h
  • FULLCAN_ENABLE : lpc17xx_can.c
  • FullCAN_Table : can_test_aflut.c
Generated on Tue Jun 7 15:00:16 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Data Fields

  • All
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- g -

  • GatewayIP : tcpip.h
  • GetResponse : easyweb.h
  • GPDMA_LUTPerAddr : lpc17xx_gpdma.c
  • GPDMA_LUTPerBurst : lpc17xx_gpdma.c
  • GPDMA_LUTPerWid : lpc17xx_gpdma.c
  • GPDMACfg : dac_dma.c , dac_sinewave_test.c
Generated on Tue Jun 7 15:00:16 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Data Fields

  • All
  • Functions
  • Variables
  • Typedefs
  • Enumerations
  • Enumerator
  • Defines
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- h -

  • H : usb.h
  • HID_DESCRIPTOR : hid.h
  • HID_IdleTime : hiduser.c , hiduser.h
  • HID_Protocol : hiduser.c , hiduser.h
  • HID_ReportDescriptor : usbdesc.c , usbdesc.h
  • HID_ReportDescSize : usbdesc.c , usbdesc.h
  • http_10 : http-strings.c , http-strings.h , webclient-strings.c , webclient-strings.h
  • http_11 : webclient-strings.c , webclient-strings.h , http-strings.c , http-strings.h
  • http_200 : webclient-strings.c , webclient-strings.h , http-strings.c , http-strings.h
  • http_301 : webclient-strings.c , webclient-strings.h , http-strings.c , http-strings.h
  • http_302 : http-strings.c , http-strings.h , webclient-strings.c , webclient-strings.h
  • http_404_html : webclient-strings.c , webclient-strings.h , http-strings.c , http-strings.h
  • http_content_type : webclient-strings.c , webclient-strings.h , http-strings.c , http-strings.h
  • http_content_type_binary : webclient-strings.c , webclient-strings.h , http-strings.c , http-strings.h
  • http_content_type_css : webclient-strings.c , webclient-strings.h , http-strings.c , http-strings.h
  • http_content_type_gif : webclient-strings.c , webclient-strings.h , http-strings.c , http-strings.h
  • http_content_type_html : webclient-strings.c , webclient-strings.h , http-strings.c , http-strings.h
  • http_content_type_jpg : webclient-strings.c , webclient-strings.h , http-strings.c , http-strings.h
  • http_content_type_plain : http-strings.c , http-strings.h
  • http_content_type_png : webclient-strings.c , webclient-strings.h , http-strings.c , http-strings.h
  • http_content_type_text : webclient-strings.c , webclient-strings.h , http-strings.c , http-strings.h
  • http_crnl : webclient-strings.c , webclient-strings.h , http-strings.c , http-strings.h
  • http_css : http-strings.h , webclient-strings.c , webclient-strings.h , http-strings.c
  • http_get : webclient-strings.c , webclient-strings.h , http-strings.c , http-strings.h
  • http_gif : webclient-strings.c , webclient-strings.h , http-strings.c , http-strings.h
  • http_header_200 : http-strings.c , http-strings.h
  • http_header_404 : http-strings.c , http-strings.h
  • http_host : webclient-strings.c , webclient-strings.h , http-strings.c , http-strings.h
  • http_htm : webclient-strings.c , webclient-strings.h , http-strings.c , http-strings.h
  • http_html : webclient-strings.h , webclient-strings.c , http-strings.c , http-strings.h
  • http_http : http-strings.c , webclient-strings.h , webclient-strings.c , http-strings.h
  • http_index_html : webclient-strings.h , http-strings.c , http-strings.h , webclient-strings.c
  • http_jpg : webclient-strings.h , http-strings.c , http-strings.h , webclient-strings.c
  • http_location : webclient-strings.h , webclient-strings.c , http-strings.c , http-strings.h
  • http_png : http-strings.c , http-strings.h , webclient-strings.h , webclient-strings.c
  • http_referer : http-strings.c , http-strings.h
  • http_shtml : http-strings.c , http-strings.h , webclient-strings.c , webclient-strings.h
  • http_text : http-strings.c , webclient-strings.h , webclient-strings.c , http-strings.h
  • http_texthtml : webclient-strings.h , http-strings.c , http-strings.h , webclient-strings.c
  • http_txt : webclient-strings.c , http-strings.c , webclient-strings.h , http-strings.h
  • http_user_agent_fields : webclient-strings.c , webclient-strings.h
  • HTTPBytesToSend : easyweb.h
  • HTTPStatus : easyweb.h
Generated on Tue Jun 7 15:00:16 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Data Fields

  • All
  • Functions
  • Variables
  • Typedefs
  • Enumerations
  • Enumerator
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- i -

  • I2SReadLength : i2s_irq_test.c , i2s_mclk.c , i2s_polling.c , i2s_test_4_wire.c
  • I2SRXBuffer : i2s_test_4_wire.c , i2s_polling.c , i2s_dma_test.c , i2s_irq_test.c , i2s_mclk.c
  • I2SRXDone : i2s_irq_test.c , i2s_mclk.c , i2s_test_4_wire.c , i2s_polling.c
  • I2STXBuffer : i2s_mclk.c , i2s_test_4_wire.c , i2s_polling.c , i2s_dma_test.c , i2s_irq_test.c
  • I2STXDone : i2s_irq_test.c , i2s_mclk.c , i2s_test_4_wire.c , i2s_polling.c
  • I2SWriteLength : i2s_irq_test.c , i2s_mclk.c , i2s_test_4_wire.c , i2s_polling.c
  • iConfiguration : usb.h
  • idProduct : usb.h
  • idVendor : usb.h
  • iInterface : usb.h
  • iManufacturer : usb.h
  • info1 : wdt_interrupt_test.c , wdt_reset_test.c
  • info2 : wdt_interrupt_test.c , wdt_reset_test.c
  • InfoBuf : usbaudio.h , usbdmain.c
  • InReport : demo.c , demo.h
  • IO_State : systick_stclk.c
  • iocon_cfg : spi_polling_test.c , i2c_interrupt_test.c , i2c_polling_test.c , spi_interrupt_test.c , sc16is750_int.c , sc16is750_polling.c
  • iodir_cfg : spi_interrupt_test.c , spi_polling_test.c , sc16is750_int.c , sc16is750_polling.c , i2c_interrupt_test.c , i2c_polling_test.c
  • iostate_cfg_0 : i2c_interrupt_test.c , i2c_polling_test.c
  • iostate_cfg_1 : i2c_polling_test.c , i2c_interrupt_test.c
  • iostate_off : spi_interrupt_test.c , spi_polling_test.c , sc16is750_polling.c , sc16is750_int.c
  • iostate_on : spi_interrupt_test.c , sc16is750_int.c , spi_polling_test.c , sc16is750_polling.c
  • iProduct : usb.h
  • iSerialNumber : usb.h
  • ISNGenHigh : tcpip.h
  • ITM_RxBuffer : core_cm3.h
Generated on Tue Jun 7 15:00:16 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Data Fields

  • All
  • Functions
  • Variables
  • Typedefs
  • Enumerations
  • Enumerator
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- p -

  • p_err_menu : rs485_master.c , rs485_slave.c
  • PacketReceived : emactest.c
  • pca8581_rddat : pca8581_test.c
  • pca8581_wrdat : pca8581_test.c
  • pGPDMACh : lpc17xx_gpdma.c
  • PhaseCnt : qei_test_velo.c
  • PotVal : usbdmain.c
  • pRdBuf_M : microwire_test.c , ti_test.c
  • pRdBuf_S : ti_test.c
  • PWebSide : easyweb.h
  • PWM0_State : pwm_signal.c
  • PWM1_State : pwm_signal.c
  • PWM2_State : pwm_signal.c
  • PWM3_State : pwm_signal.c
  • pWrBuf_M : ti_test.c
  • pWrBuf_S : microwire_test.c , ti_test.c
Generated on Tue Jun 7 15:00:16 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Data Fields

  • All
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- q -

  • qei_idx_pin : qei_test_velo.c
  • qei_phaA_pin : qei_test_velo.c
  • qei_phaB_pin : qei_test_velo.c
Generated on Tue Jun 7 15:00:16 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Data Fields

  • All
  • Functions
  • Variables
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- r -

  • rb : uart_interrupt_test.c , rs485_master.c , uart_fullmodem_test.c , rs485_slave.c
  • RdIdx_M : microwire_test.c , ti_test.c
  • RdIdx_S : ti_test.c
  • RecdFrameIP : tcpip.h
  • RecdFrameLength : tcpip.h
  • RecdFrameMAC : tcpip.h
  • RecdIPFrameLength : tcpip.h
  • ReceiveLength : emactest.c
  • Recipient : usb.h
  • recv_menu : rs485_master.c
  • recv_msg : rs485_slave.c
  • RemoteIP : tcpip.h
  • RemoteMAC : tcpip.h
  • REQUEST_TYPE : usb.h
  • RetryCounter : tcpip.h
  • RTS_State : uart_fullmodem_test.c
  • rx_buf : uart_dma_test.c
  • Rx_Buf : spi_slave.c , spi_loopback_test.c , ssp_slave.c , spi_master.c , ssp_master.c
  • rx_depth_irq : i2s_two_kit.c , i2s_mclk.c , i2s_irq_test.c
  • RxDoneCount : emactest.c
  • RXErrorCount : emactest.c
  • RxFinishedCount : emactest.c
  • RXMsg : can_self_test.c , can_ledcontrol.c , can_test_two_kit.c , can_test_bypass_mode.c
  • RXOverrunCount : emactest.c
  • rxsetup : pca8581_test.c
Generated on Tue Jun 7 15:00:16 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Data Fields

  • All
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  • Variables
  • Typedefs
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- s -

  • sd_cmd_buf : spi_sdcard.c
  • sd_data_buf : spi_sdcard.c
  • send_menu : rs485_master.c
  • send_msg : rs485_slave.c
  • ser_in : serial.c
  • ser_lineState : serial.c
  • ser_out : serial.c
  • ser_txRestart : serial.c
  • SetupPacket : usbcore.h , usbcore.c , usbcore.h , usbcore.c , usbcore.h , usbcore.c , usbcore.h , usbcore.c
  • SFF_GPR_Table : can_test_aflut.c
  • SFF_Table : can_test_aflut.c
  • Slave_Buf : i2c_master_slave_int_test.c , slave.c
  • Slave_Rx_Buf : ti_test.c
  • slave_test : i2c_master_slave_int_test.c , slave.c
  • Slave_Tx_Buf : microwire_test.c , ti_test.c
  • slaveA_msg : rs485_master.c
  • slaveB_msg : rs485_master.c
  • smtp_220 : smtp-strings.c , smtp-strings.h
  • smtp_cc : smtp-strings.c , smtp-strings.h
  • smtp_crnl : smtp-strings.c , smtp-strings.h
  • smtp_crnlperiodcrnl : smtp-strings.c , smtp-strings.h
  • smtp_data : smtp-strings.c , smtp-strings.h
  • smtp_from : smtp-strings.c , smtp-strings.h
  • smtp_helo : smtp-strings.c , smtp-strings.h
  • smtp_mail_from : smtp-strings.h , smtp-strings.c
  • smtp_quit : smtp-strings.c , smtp-strings.h
  • smtp_rcpt_to : smtp-strings.c , smtp-strings.h
  • smtp_subject : smtp-strings.c , smtp-strings.h
  • smtp_to : smtp-strings.c , smtp-strings.h
  • SocketStatus : tcpip.h
  • SPI_ConfigStruct : spi_sdcard.c , spi_interrupt_test.c , spi_loopback_test.c , spi_master.c , spi_slave.c , spi_polling_test.c
  • spireadbuf : spi_interrupt_test.c , spi_polling_test.c
  • SSP_ConfigStruct : microwire_test.c , ti_test.c , sc16is750_polling.c , sc16is750_int.c , ssp_dma.c , ssp_slave.c , ssp_master.c
  • sspreadbuf : sc16is750_polling.c , sc16is750_int.c
  • SubnetMask : tcpip.h
  • sUnion : cdc.h
  • Synchronous : uart_autobaud_test.c
  • syncmenu : uart_autobaud_test.c
  • SystemCoreClock : system_LPC17xx.h , system_LPC17xx.c
  • SysTickCnt : LedBlinky.c
Generated on Tue Jun 7 15:00:16 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Data Fields

  • All
  • Functions
  • Variables
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- t -

  • T1 : gen_diff_delay.c
  • T2 : gen_diff_delay.c
  • TCPAckNr : tcpip.h
  • TCPFlags : tcpip.h
  • TCPLocalPort : tcpip.h
  • TCPRemotePort : tcpip.h
  • TCPRxDataCount : tcpip.h
  • TCPSeqNr : tcpip.h
  • TCPStateMachine : tcpip.h
  • TCPTimer : tcpip.h
  • TCPTxDataCount : tcpip.h
  • TCPUNASeqNr : tcpip.h
  • Terminal_18_24_12 : lcdtest.c
  • Terminal_6_8_6 : lcdtest.c
  • Terminal_9_12_6 : Terminal_9_12x6.c , lcdtest.c
  • terminator : rs485_master.c , rs485_slave.c
  • Tick : usbdmain.c
  • Ticks : clock-arch.c
  • TIM_CaptureConfigStruct : timer_capture.c , freqmeasure.c
  • TIM_ConfigStruct : timer_capture.c , freqmeasure.c , timer_int_match.c , timer_poll_match.c , pwm_signal.c
  • TIM_MatchConfigStruct : timer_capture.c , timer_int_match.c , timer_poll_match.c , pwm_signal.c
  • timer0_flag : timer_capture.c , timer_int_match.c
  • timer1_flag : timer_capture.c , timer_int_match.c
  • toggle : gen_diff_delay.c
  • TransmitControl : tcpip.h
  • Tx_Buf : spi_loopback_test.c , spi_slave.c , ssp_master.c , ssp_slave.c , spi_master.c
  • tx_depth_irq : i2s_two_kit.c , i2s_irq_test.c , i2s_mclk.c
  • TxDoneCount : emactest.c
  • TXErrorCount : emactest.c
  • TxFinishedCount : emactest.c
  • TxFrame1Size : tcpip.h
  • TxFrame2Size : tcpip.h
  • TxIntStat : uart_fullmodem_test.c , uart_interrupt_test.c
  • TXMsg : can_self_test.c , can_ledcontrol.c , can_test_bypass_mode.c , can_test_two_kit.c
  • txsetup : pca8581_test.c
  • TXUnderrunCount : emactest.c
  • Type : usb.h
Generated on Tue Jun 7 15:00:16 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Data Fields

  • All
  • Functions
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- u -

  • UARTConfigStruct : timer_capture.c
  • uip_acc32 : uip.c , uip.h
  • uip_appdata : uip.c , uip.h
  • uip_buf : uip.h
  • uip_conn : uip.h , uip.c
  • uip_conns : uip.c , uip.h
  • uip_draddr : uip.c , uip.h
  • uip_ethaddr : uip.c , uip_arp.h
  • uip_flags : uip.h , uip.c
  • uip_hostaddr : uip.c , uip.h
  • uip_len : uip.c , uip.h
  • uip_listenports : uip.c
  • uip_netmask : uip.c , uip.h
  • uip_sappdata : uip.c
  • uip_slen : uip.c
  • uip_stat : uip.h
  • USB_AltSetting : usbcore.h , usbcore.c , usbcore.h , usbcore.c , usbcore.h , usbcore.c , usbcore.h , usbcore.c
  • USB_COMMON_DESCRIPTOR : usb.h
  • USB_ConfigDescriptor : usbdesc.c , usbdesc.h , usbdesc.c , usbdesc.h , usbdesc.c , usbdesc.h , usbdesc.c , usbdesc.h
  • USB_Configuration : usbcore.c , usbcore.h , usbcore.c , usbcore.h , usbcore.c , usbcore.h , usbcore.c , usbcore.h
  • USB_CONFIGURATION_DESCRIPTOR : usb.h
  • USB_DEVICE_DESCRIPTOR : usb.h
  • USB_DEVICE_QUALIFIER_DESCRIPTOR : usb.h
  • USB_DeviceAddress : usbcore.c , usbcore.h , usbcore.c , usbcore.h , usbcore.c , usbcore.h , usbcore.c , usbcore.h
  • USB_DeviceDescriptor : usbdesc.c , usbdesc.h , usbdesc.c , usbdesc.h , usbdesc.c , usbdesc.h
  • USB_DeviceStatus : usbcore.c , usbcore.h , usbcore.c , usbcore.h , usbcore.c , usbcore.h , usbcore.c
  • USB_ENDPOINT_DESCRIPTOR : usb.h
  • USB_EndPointHalt : usbcore.c , usbcore.h , usbcore.c , usbcore.h , usbcore.c
  • USB_EndPointMask : usbcore.h , usbcore.c , usbcore.h , usbcore.c
  • USB_EndPointStall : usbcore.c , usbcore.h , usbcore.c
  • USB_INTERFACE_DESCRIPTOR : usb.h
  • USB_NumInterfaces : usbcore.c
  • USB_P_EP : usbuser.h , usbuser.c , usbuser.h , usbuser.c
  • USB_SETUP_PACKET : usb.h
  • USB_STRING_DESCRIPTOR : usb.h
  • USB_StringDescriptor : usbdesc.h , usbdesc.c , usbdesc.h , usbdesc.c
Generated on Tue Jun 7 15:00:16 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Data Fields

  • All
  • Functions
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- v -

  • VeloAcc : qei_test_velo.c
  • VeloAccFlag : qei_test_velo.c
  • VeloCapCnt : qei_test_velo.c
  • VolCur : adcuser.c , usbaudio.h
  • VolMax : adcuser.c
  • VolMin : adcuser.c
  • VolRes : adcuser.c
  • Volume : usbaudio.h , usbdmain.c
  • VUM : usbdmain.c
Generated on Tue Jun 7 15:00:16 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Data Fields

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  • Functions
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- w -

  • W : usb.h
  • WB : usb.h
  • wDescriptorLength : hid.h
  • wdt_flag : wdt_interrupt_test.c
  • WebSide : webpage.h
  • wIndex : usb.h
  • wLength : usb.h
  • wMaxPacketSize : usb.h
  • WOLCount : emactest.c
  • WORD_BYTE : usb.h
  • WrIdx_M : ti_test.c
  • WrIdx_S : microwire_test.c , ti_test.c
  • wTotalLength : usb.h
  • wValue : usb.h
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  • xferConfig : spi_interrupt_test.c , ssp_slave.c , sc16is750_int.c , spi_sdcard.c
Generated on Tue Jun 7 15:00:16 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/GPDMA/Ram_2_Ram_Test/gpdma_r2r_test.c Source File

C:/nxpdrv/LPC1700CMSIS/Examples/GPDMA/Ram_2_Ram_Test/gpdma_r2r_test.c

Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          gpdma_m2m_test.c                                2010-05-21
00003 */
00025 #include "lpc17xx_gpdma.h"
00026 #include "lpc17xx_libcfg.h"
00027 #include "lpc17xx_pinsel.h"
00028 #include "debug_frmwrk.h"
00029
00030 /* Example group ----------------------------------------------------------- */
00036 /************************** PRIVATE MACROS *************************/
00038 #define DMA_SIZE                0x100UL
00039
00043 #define DMA_SRC                 LPC_AHBRAM1_BASE
00044
00048 #define DMA_DST                 (DMA_SRC+DMA_SIZE)
00049
00050
00051 /************************** PRIVATE VARIABLES *************************/
00052 uint8_t menu1[] =
00053 "********************************************************************************\n\r"
00054 "Hello NXP Semiconductors \n\r"
00055 "GPDMA demo \n\r"
00056 "\t - MCU: LPC17xx \n\r"
00057 "\t - Core: ARM Cortex-M3 \n\r"
00058 "\t - Communicate via: UART0 - 115200bps \n\r"
00059 " This example will transfer 2 blocks of data from memory boundary \n\r"
00060 " to the other memory boundary on RAM using GPDMA module with interrupt \n\r"
00061 "********************************************************************************\n\r";
00062 uint8_t menu2[] = "Demo terminated! \n\r";
00063 uint8_t err_menu[] = "Buffer Check fail!";
00064 uint8_t compl_menu[] = "Buffer Check success!";
00065
00066 // Terminal Counter flag for Channel 0
00067 __IO uint32_t Channel0_TC;
00068
00069 // Error Counter flag for Channel 0
00070 __IO uint32_t Channel0_Err;
00071
00072
00073 /************************** PRIVATE FUNCTIONS *************************/
00074 void DMA_IRQHandler (void);
00075
00076 void print_menu(void);
00077 void Buffer_Init(void);
00078 void Error_Loop(void);
00079
00080 /*----------------- INTERRUPT SERVICE ROUTINES --------------------------*/
00081 /*********************************************************************/
00086 void DMA_IRQHandler (void)
00087 {
00088         // check GPDMA interrupt on channel 0
00089         if (GPDMA_IntGetStatus(GPDMA_STAT_INT, 0)){ //check interrupt status on channel 0
00090                 // Check counter terminal status
00091                 if(GPDMA_IntGetStatus(GPDMA_STAT_INTTC, 0)){
00092                         // Clear terminate counter Interrupt pending
00093                         GPDMA_ClearIntPending (GPDMA_STATCLR_INTTC, 0);
00094                                 Channel0_TC++;
00095                 }
00096                 if (GPDMA_IntGetStatus(GPDMA_STAT_INTERR, 0)){
00097                         // Clear error counter Interrupt pending
00098                         GPDMA_ClearIntPending (GPDMA_STATCLR_INTERR, 0);
00099                         Channel0_Err++;
00100                 }
00101         }
00102 }
00103
00104 /*-------------------------PRIVATE FUNCTIONS-----------------------------*/
00105 /*********************************************************************/
00110 void print_menu(void)
00111 {
00112         _DBG(menu1);
00113 }
00114
00115 /*********************************************************************/
00120 void Buffer_Init(void)
00121 {
00122         uint8_t i;
00123         uint32_t *src_addr = (uint32_t *)DMA_SRC;
00124         uint32_t *dest_addr = (uint32_t *)DMA_DST;
00125
00126          for ( i = 0; i < DMA_SIZE/4; i++ )
00127         {
00128                 *src_addr++ = i;
00129                 *dest_addr++ = 0;
00130         }
00131 }
00132
00133
00134 /*********************************************************************/
00139 void Buffer_Verify(void)
00140 {
00141         uint8_t i;
00142         uint32_t *src_addr = (uint32_t *)DMA_SRC;
00143         uint32_t *dest_addr = (uint32_t *)DMA_DST;
00144
00145         for ( i = 0; i < DMA_SIZE/4; i++ )
00146         {
00147                 if ( *src_addr++ != *dest_addr++ )
00148                 {
00149                         /* Call Error Loop */
00150                         Error_Loop();
00151                 }
00152         }
00153 }
00154
00155
00156 /*********************************************************************/
00161 void Error_Loop(void)
00162 {
00163         _DBG(err_menu);
00164
00165         /* Loop forever */
00166         while (1);
00167 }
00168
00169
00170 /*-------------------------MAIN FUNCTION--------------------------------*/
00171 /*********************************************************************/
00176 int c_entry(void)
00177 {
00178         GPDMA_Channel_CFG_Type GPDMACfg;
00179
00180         /* Initialize debug via UART0
00181          * – 115200bps
00182          * – 8 data bit
00183          * – No parity
00184          * – 1 stop bit
00185          * – No flow control
00186          */
00187         debug_frmwrk_init();
00188
00189         // print welcome screen
00190         print_menu();
00191
00192         /* GPDMA block section -------------------------------------------- */
00193         /* Initialize buffer */
00194         _DBG_("Initialize Buffer...");
00195         Buffer_Init();
00196
00197     /* Disable GPDMA interrupt */
00198     NVIC_DisableIRQ(DMA_IRQn);
00199     /* preemption = 1, sub-priority = 1 */
00200     NVIC_SetPriority(DMA_IRQn, ((0x01<<3)|0x01));
00201
00202     /* Initialize GPDMA controller */
00203         GPDMA_Init();
00204
00205         // Setup GPDMA channel --------------------------------
00206         // channel 0
00207         GPDMACfg.ChannelNum = 0;
00208         // Source memory
00209         GPDMACfg.SrcMemAddr = DMA_SRC;
00210         // Destination memory
00211         GPDMACfg.DstMemAddr = DMA_DST;
00212         // Transfer size
00213         GPDMACfg.TransferSize = DMA_SIZE;
00214         // Transfer width
00215         GPDMACfg.TransferWidth = GPDMA_WIDTH_WORD;
00216         // Transfer type
00217         GPDMACfg.TransferType = GPDMA_TRANSFERTYPE_M2M;
00218         // Source connection - unused
00219         GPDMACfg.SrcConn = 0;
00220         // Destination connection - unused
00221         GPDMACfg.DstConn = 0;
00222         // Linker List Item - unused
00223         GPDMACfg.DMALLI = 0;
00224         // Setup channel with given parameter
00225         GPDMA_Setup(&GPDMACfg);
00226
00227         /* Reset terminal counter */
00228         Channel0_TC = 0;
00229         /* Reset Error counter */
00230         Channel0_Err = 0;
00231
00232         _DBG_("Start transfer...");
00233
00234         // Enable GPDMA channel 0
00235         GPDMA_ChannelCmd(0, ENABLE);
00236
00237         /* Enable GPDMA interrupt */
00238         NVIC_EnableIRQ(DMA_IRQn);
00239
00240         /* Wait for GPDMA processing complete */
00241         while ((Channel0_TC == 0) && (Channel0_Err == 0));
00242
00243         /* Verify buffer */
00244         Buffer_Verify();
00245
00246         _DBG(compl_menu);
00247
00248     /* Loop forever */
00249     while(1);
00250     return 1;
00251 }
00252
00253 /* With ARM and GHS toolsets, the entry point is main() - this will
00254    allow the linker to generate wrapper code to setup stacks, allocate
00255    heap area, and initialize and copy code and data segments. For GNU
00256    toolsets, the entry point is through __start() in the crt0_gnu.asm
00257    file, and that startup code will setup stacks and data */
00258 int main(void)
00259 {
00260     return c_entry();
00261 }
00262
00263
00264 #ifdef  DEBUG
00265 /*******************************************************************************
00266 * @brief                Reports the name of the source file and the source line number
00267 *                               where the CHECK_PARAM error has occurred.
00268 * @param[in]    file Pointer to the source file name
00269 * @param[in]    line assert_param error line source number
00270 * @return               None
00271 *******************************************************************************/
00272 void check_failed(uint8_t *file, uint32_t line)
00273 {
00274         /* User can add his own implementation to report the file name and line number,
00275          ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
00276
00277         /* Infinite loop */
00278         while(1);
00279 }
00280 #endif
00281 /*
00282  * @}
00283  */
Generated on Tue Jun 7 14:59:01 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/GPDMA/GPDMA_Sleep/gpdma_sleep.c Source File

C:/nxpdrv/LPC1700CMSIS/Examples/GPDMA/GPDMA_Sleep/gpdma_sleep.c

Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          gpdma_sleep.c                           2010-06-18
00003 */
00025 #include "lpc17xx_gpdma.h"
00026 #include "lpc17xx_libcfg.h"
00027 #include "lpc17xx_pinsel.h"
00028 #include "debug_frmwrk.h"
00029 #include "lpc17xx_clkpwr.h"
00030
00031 /* Example group ----------------------------------------------------------- */
00037 /************************** PRIVATE MACROS *************************/
00039 #define DMA_SIZE                0x100UL
00040
00044 #define DMA_SRC                 LPC_AHBRAM1_BASE
00045
00049 #define DMA_DST                 (DMA_SRC+DMA_SIZE)
00050
00051
00052 /************************** PRIVATE VARIABLES *************************/
00053 uint8_t menu1[] =
00054         "********************************************************************************\n\r"
00055         "Hello NXP Semiconductors \n\r"
00056         "GPDMA demo \n\r"
00057         "\t - MCU: LPC17xx \n\r"
00058         "\t - Core: ARM Cortex-M3 \n\r"
00059         "\t - Communicate via: UART0 - 115200bps \n\r"
00060         " This example used to test GPDMA function in sleep mode\n\r"
00061         " It will transfer 2 blocks of data from memory boundary \n\r"
00062         " to the other memory boundary on RAM using GPDMA module in sleep mode \n\r"
00063         "********************************************************************************\n\r";
00064 uint8_t menu2[] = "Demo terminated! \n\r";
00065 uint8_t err_menu[] = "Buffer Check fail!";
00066 uint8_t compl_menu[] = "Buffer Check success!";
00067
00068 // Terminal Counter flag for Channel 0
00069 __IO uint32_t Channel0_TC;
00070
00071 // Error Counter flag for Channel 0
00072 __IO uint32_t Channel0_Err;
00073
00074
00075 /************************** PRIVATE FUNCTIONS *************************/
00076 void DMA_IRQHandler (void);
00077
00078 void print_menu(void);
00079 void Buffer_Init(void);
00080 void Error_Loop(void);
00081
00082 /*----------------- INTERRUPT SERVICE ROUTINES --------------------------*/
00083 /*********************************************************************/
00088 void DMA_IRQHandler (void)
00089 {
00090         // check GPDMA interrupt on channel 0
00091         if (GPDMA_IntGetStatus(GPDMA_STAT_INT, 0)){ //check interrupt status on channel 0
00092                 // Check counter terminal status
00093                 if(GPDMA_IntGetStatus(GPDMA_STAT_INTTC, 0)){
00094                         // Clear terminate counter Interrupt pending
00095                         GPDMA_ClearIntPending (GPDMA_STATCLR_INTTC, 0);
00096                                 Channel0_TC++;
00097                 }
00098                 if (GPDMA_IntGetStatus(GPDMA_STAT_INTERR, 0)){
00099                         // Clear error counter Interrupt pending
00100                         GPDMA_ClearIntPending (GPDMA_STATCLR_INTERR, 0);
00101                         Channel0_Err++;
00102                 }
00103         }
00104 }
00105
00106 /*-------------------------PRIVATE FUNCTIONS-----------------------------*/
00107 /*********************************************************************/
00112 void print_menu(void)
00113 {
00114         _DBG(menu1);
00115 }
00116
00117 /*********************************************************************/
00122 void Buffer_Init(void)
00123 {
00124         uint8_t i;
00125         uint32_t *src_addr = (uint32_t *)DMA_SRC;
00126         uint32_t *dest_addr = (uint32_t *)DMA_DST;
00127
00128          for ( i = 0; i < DMA_SIZE/4; i++ )
00129         {
00130                 *src_addr++ = i;
00131                 *dest_addr++ = 0;
00132         }
00133 }
00134
00135
00136 /*********************************************************************/
00141 void Buffer_Verify(void)
00142 {
00143         uint8_t i;
00144         uint32_t *src_addr = (uint32_t *)DMA_SRC;
00145         uint32_t *dest_addr = (uint32_t *)DMA_DST;
00146
00147         for ( i = 0; i < DMA_SIZE/4; i++ )
00148         {
00149                 if ( *src_addr++ != *dest_addr++ )
00150                 {
00151                         /* Call Error Loop */
00152                         Error_Loop();
00153                 }
00154         }
00155 }
00156
00157
00158 /*********************************************************************/
00163 void Error_Loop(void)
00164 {
00165         _DBG(err_menu);
00166
00167         /* Loop forever */
00168         while (1);
00169 }
00170
00171
00172 /*-------------------------MAIN FUNCTION--------------------------------*/
00173 /*********************************************************************/
00178 int c_entry(void)
00179 {
00180         GPDMA_Channel_CFG_Type GPDMACfg;
00181
00182         /* Initialize debug via UART0
00183          * – 115200bps
00184          * – 8 data bit
00185          * – No parity
00186          * – 1 stop bit
00187          * – No flow control
00188          */
00189         debug_frmwrk_init();
00190
00191         // print welcome screen
00192         print_menu();
00193
00194         /* GPDMA block section -------------------------------------------- */
00195         /* Initialize buffer */
00196         _DBG_("Initialize Buffer...");
00197         Buffer_Init();
00198
00199     /* Disable GPDMA interrupt */
00200     NVIC_DisableIRQ(DMA_IRQn);
00201     /* preemption = 1, sub-priority = 1 */
00202     NVIC_SetPriority(DMA_IRQn, ((0x01<<3)|0x01));
00203
00204     /* Initialize GPDMA controller */
00205         GPDMA_Init();
00206
00207         // Setup GPDMA channel --------------------------------
00208         // channel 0
00209         GPDMACfg.ChannelNum = 0;
00210         // Source memory
00211         GPDMACfg.SrcMemAddr = DMA_SRC;
00212         // Destination memory
00213         GPDMACfg.DstMemAddr = DMA_DST;
00214         // Transfer size
00215         GPDMACfg.TransferSize = DMA_SIZE;
00216         // Transfer width
00217         GPDMACfg.TransferWidth = GPDMA_WIDTH_WORD;
00218         // Transfer type
00219         GPDMACfg.TransferType = GPDMA_TRANSFERTYPE_M2M;
00220         // Source connection - unused
00221         GPDMACfg.SrcConn = 0;
00222         // Destination connection - unused
00223         GPDMACfg.DstConn = 0;
00224         // Linker List Item - unused
00225         GPDMACfg.DMALLI = 0;
00226         // Setup channel with given parameter
00227         GPDMA_Setup(&GPDMACfg);
00228
00229         /* Reset terminal counter */
00230         Channel0_TC = 0;
00231         /* Reset Error counter */
00232         Channel0_Err = 0;
00233
00234         _DBG_("Start GPDMA transfer and enter system in sleep mode...");
00235
00236         // Enable GPDMA channel 0
00237         GPDMA_ChannelCmd(0, ENABLE);
00238
00239         /* Enable GPDMA interrupt */
00240         NVIC_EnableIRQ(DMA_IRQn);
00241
00242         /* Enter in sleep mode */
00243         CLKPWR_Sleep();
00244
00245         /* Wait for GPDMA processing complete */
00246         while ((Channel0_TC == 0) && (Channel0_Err == 0));
00247
00248         /* Verify buffer */
00249         Buffer_Verify();
00250
00251         _DBG(compl_menu);
00252
00253     /* Loop forever */
00254     while(1);
00255     return 1;
00256 }
00257
00258 /* With ARM and GHS toolsets, the entry point is main() - this will
00259    allow the linker to generate wrapper code to setup stacks, allocate
00260    heap area, and initialize and copy code and data segments. For GNU
00261    toolsets, the entry point is through __start() in the crt0_gnu.asm
00262    file, and that startup code will setup stacks and data */
00263 int main(void)
00264 {
00265     return c_entry();
00266 }
00267
00268
00269 #ifdef  DEBUG
00270 /*******************************************************************************
00271 * @brief                Reports the name of the source file and the source line number
00272 *                               where the CHECK_PARAM error has occurred.
00273 * @param[in]    file Pointer to the source file name
00274 * @param[in]    line assert_param error line source number
00275 * @return               None
00276 *******************************************************************************/
00277 void check_failed(uint8_t *file, uint32_t line)
00278 {
00279         /* User can add his own implementation to report the file name and line number,
00280          ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
00281
00282         /* Infinite loop */
00283         while(1);
00284 }
00285 #endif
00286
00287 /*
00288  * @}
00289  */
Generated on Tue Jun 7 14:59:01 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/GPIO/GPIO_Interrupt/gpio_int.c Source File

C:/nxpdrv/LPC1700CMSIS/Examples/GPIO/GPIO_Interrupt/gpio_int.c

Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          gpio_int.c                              2010-05-21
00003 */
00025 #include "LPC17xx.h"
00026 #include "lpc17xx_gpio.h"
00027 #include "lpc17xx_pinsel.h"
00028 #include "lpc17xx_libcfg.h"
00029
00030 /* Example group ----------------------------------------------------------- */
00036 /************************** PRIVATE DEFINITIONS *************************/
00037 #define MCB_LPC_1768
00038 //#define IAR_LPC_1768
00039
00040 #ifdef MCB_LPC_1768
00041 /* LED pin in byte style on P1 */
00042 #define POLL_LED        (1<<4)          // P1.28
00043 #define INT3_LED        (1<<5)          // P1.29
00044 #define GPIO_INT        (1<<25)         // test GPIO interrupt on P0.25
00045 #elif defined(IAR_LPC_1768)
00046 #define POLL_LED        (1<<1)          //P1.25 (LED2)
00047 #define INT3_LED        (1<<4)          //P0.4  (LED1)
00048 #define GPIO_INT        (1<<23)         // test GPIO interrupt on P0.23
00049 #endif
00050
00051
00052 /************************** PRIVATE FUNCTIONS *************************/
00053 void EINT3_IRQHandler(void);
00054
00055 void delay (void);
00056
00057 /*----------------- INTERRUPT SERVICE ROUTINES --------------------------*/
00058 /*********************************************************************/
00063 void EINT3_IRQHandler(void)
00064 {
00065               int j;
00066               if(GPIO_GetIntStatus(0, 25, 1))
00067                   {
00068                   GPIO_ClearInt(0,(1<<25));
00069                           for (j= 0; j<8; j++)
00070                           {
00071 #ifdef MCB_LPC_1768
00072                                   /* Use MCB1700 board:
00073                                    * blink LED P1.29 when EINT3 occur
00074                                    */
00075                                     FIO_ByteSetValue(1, 3, INT3_LED);
00076                                         delay();
00077                                         FIO_ByteClearValue(1, 3, INT3_LED);
00078                                     delay();
00079 #elif defined(IAR_LPC_1768)
00080                                 /* Use IAR LPC1768 KS board:
00081                                  * blink LED2 P0.4 when EINT3 occur
00082                                  */
00083                                     FIO_ByteSetValue(0, 0, INT3_LED);
00084                                         delay();
00085                                         FIO_ByteClearValue(0, 0, INT3_LED);
00086                                     delay();
00087 #endif
00088                           }
00089           }
00090 }
00091
00092 /*-------------------------PRIVATE FUNCTIONS------------------------------*/
00093 /*********************************************************************/
00098 void delay (void) {
00099   unsigned int i;
00100
00101   for (i = 0; i < 0x100000; i++) {
00102   }
00103 }
00104
00105
00106 /*-------------------------MAIN FUNCTION------------------------------*/
00107 /*********************************************************************/
00112 int c_entry (void)
00113 {
00118 #ifdef MCB_LPC_1768
00119         FIO_ByteSetDir(1, 3, POLL_LED, 1);
00120         FIO_ByteSetDir(1, 3, INT3_LED, 1);
00121         // Turn off all LEDs
00122         FIO_ByteClearValue(1, 3, POLL_LED);
00123         FIO_ByteClearValue(1, 3, INT3_LED);
00124 #elif defined(IAR_LPC_1768)
00125         FIO_ByteSetDir(1, 3, POLL_LED, 1);
00126         FIO_ByteSetDir(0, 0, INT3_LED, 1);
00127         // Turn off all LEDs
00128         FIO_ByteSetValue(1, 3, POLL_LED);
00129         FIO_ByteSetValue(0, 0, INT3_LED);
00130 #endif
00131
00132         // Enable GPIO interrupt
00133         /* Use MCB1700: test GPIO interrupt on P0.25->connects with ADC potentiometer
00134          * Use IAR KS : test GPIO interrupt on P0.23->connects with BUT1 button
00135          */
00136         GPIO_IntCmd(0,(1<<25),1);
00137         NVIC_EnableIRQ(EINT3_IRQn);
00138
00139         while (1)
00140         {
00141                 //polling led while idle
00142                 FIO_ByteSetValue(1, 3, POLL_LED);
00143                 delay();
00144                 FIO_ByteClearValue(1, 3, POLL_LED);
00145                 delay();
00146         }
00147 }
00148
00149
00150 /* With ARM and GHS toolsets, the entry point is main() - this will
00151    allow the linker to generate wrapper code to setup stacks, allocate
00152    heap area, and initialize and copy code and data segments. For GNU
00153    toolsets, the entry point is through __start() in the crt0_gnu.asm
00154    file, and that startup code will setup stacks and data */
00155 int main(void)
00156 {
00157     return c_entry();
00158 }
00159
00160 #ifdef  DEBUG
00161 /*******************************************************************************
00162 * @brief                Reports the name of the source file and the source line number
00163 *                               where the CHECK_PARAM error has occurred.
00164 * @param[in]    file Pointer to the source file name
00165 * @param[in]    line assert_param error line source number
00166 * @return               None
00167 *******************************************************************************/
00168 void check_failed(uint8_t *file, uint32_t line)
00169 {
00170         /* User can add his own implementation to report the file name and line number,
00171          ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
00172
00173         /* Infinite loop */
00174         while(1);
00175 }
00176 #endif
00177
00178 /*
00179  * @}
00180  */
Generated on Tue Jun 7 14:59:01 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/hello-world/hello-world.c Source File

C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/hello-world/hello-world.c

Go to the documentation of this file.
00001
00014 /*
00015  * This is a short example of how to write uIP applications using
00016  * protosockets.
00017  */
00018
00019 /*
00020  * We define the application state (struct hello_world_state) in the
00021  * hello-world.h file, so we need to include it here. We also include
00022  * uip.h (since this cannot be included in hello-world.h) and
00023  * <string.h>, since we use the memcpy() function in the code.
00024  */
00025 #include "hello-world.h"
00026 #include "uip.h"
00027 #include <string.h>
00028
00029 /*
00030  * Declaration of the protosocket function that handles the connection
00031  * (defined at the end of the code).
00032  */
00033 static int handle_connection(struct hello_world_state *s);
00034 /*---------------------------------------------------------------------------*/
00035 /*
00036  * The initialization function. We must explicitly call this function
00037  * from the system initialization code, some time after uip_init() is
00038  * called.
00039  */
00040 void
00041 hello_world_init(void)
00042 {
00043   /* We start to listen for connections on TCP port 1000. */
00044   uip_listen(HTONS(1000));
00045 }
00046 /*---------------------------------------------------------------------------*/
00047 /*
00048  * In hello-world.h we have defined the UIP_APPCALL macro to
00049  * hello_world_appcall so that this funcion is uIP's application
00050  * function. This function is called whenever an uIP event occurs
00051  * (e.g. when a new connection is established, new data arrives, sent
00052  * data is acknowledged, data needs to be retransmitted, etc.).
00053  */
00054 void
00055 hello_world_appcall(void)
00056 {
00057   /*
00058    * The uip_conn structure has a field called "appstate" that holds
00059    * the application state of the connection. We make a pointer to
00060    * this to access it easier.
00061    */
00062   struct hello_world_state *s = &(uip_conn->appstate);
00063
00064   /*
00065    * If a new connection was just established, we should initialize
00066    * the protosocket in our applications' state structure.
00067    */
00068   if(uip_connected()) {
00069     PSOCK_INIT(&s->p, s->inputbuffer, sizeof(s->inputbuffer));
00070   }
00071
00072   /*
00073    * Finally, we run the protosocket function that actually handles
00074    * the communication. We pass it a pointer to the application state
00075    * of the current connection.
00076    */
00077   handle_connection(s);
00078 }
00079 /*---------------------------------------------------------------------------*/
00080 /*
00081  * This is the protosocket function that handles the communication. A
00082  * protosocket function must always return an int, but must never
00083  * explicitly return - all return statements are hidden in the PSOCK
00084  * macros.
00085  */
00086 static int
00087 handle_connection(struct hello_world_state *s)
00088 {
00089   PSOCK_BEGIN(&s->p);
00090
00091   PSOCK_SEND_STR(&s->p, "Hello. What is your name?\n");
00092   PSOCK_READTO(&s->p, '\n');
00093   strncpy(s->name, s->inputbuffer, sizeof(s->name));
00094   PSOCK_SEND_STR(&s->p, "Hello ");
00095   PSOCK_SEND_STR(&s->p, s->name);
00096   PSOCK_CLOSE(&s->p);
00097
00098   PSOCK_END(&s->p);
00099 }
00100 /*---------------------------------------------------------------------------*/
Generated on Tue Jun 7 14:58:59 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/hello-world/hello-world.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/hello-world/hello-world.h

Go to the documentation of this file.
00001
00026 #ifndef __HELLO_WORLD_H__
00027 #define __HELLO_WORLD_H__
00028
00029 /* Since this file will be included by uip.h, we cannot include uip.h
00030    here. But we might need to include uipopt.h if we need the u8_t and
00031    u16_t datatypes. */
00032 #include "uipopt.h"
00033
00034 #include "psock.h"
00035
00036 /* Next, we define the uip_tcp_appstate_t datatype. This is the state
00037    of our application, and the memory required for this state is
00038    allocated together with each TCP connection. One application state
00039    for each TCP connection. */
00040 typedef struct hello_world_state {
00041   struct psock p;
00042   char inputbuffer[10];
00043   char name[40];
00044 } uip_tcp_appstate_t;
00045
00046 /* Finally we define the application function to be called by uIP. */
00047 void hello_world_appcall(void);
00048 #ifndef UIP_APPCALL
00049 #define UIP_APPCALL hello_world_appcall
00050 #endif /* UIP_APPCALL */
00051
00052 void hello_world_init(void);
00053
00054 #endif /* __HELLO_WORLD_H__ */
00055
Generated on Tue Jun 7 14:58:59 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBHID/hid.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBHID/hid.h

Go to the documentation of this file.
00001 /*----------------------------------------------------------------------------
00002  *      U S B  -  K e r n e l
00003  *----------------------------------------------------------------------------
00004  *      Name:    HID.H
00005  *      Purpose: USB HID (Human Interface Device) Definitions
00006  *      Version: V1.10
00007  *----------------------------------------------------------------------------
00008  *      This software is supplied "AS IS" without any warranties, express,
00009  *      implied or statutory, including but not limited to the implied
00010  *      warranties of fitness for purpose, satisfactory quality and
00011  *      noninfringement. Keil extends you a royalty-free right to reproduce
00012  *      and distribute executable files created using this software for use
00013  *      on NXP Semiconductors LPC family microcontroller devices only. Nothing
00014  *      else gives you the right to use this software.
00015  *
00016  *      Copyright (c) 2005-2009 Keil Software.
00017  *---------------------------------------------------------------------------*/
00018
00019 #ifndef __HID_H__
00020 #define __HID_H__
00021
00022 #if defined   (  __GNUC__  )
00023 #define __packed __attribute__((__packed__))
00024 #endif
00025
00026
00027 /* HID Subclass Codes */
00028 #define HID_SUBCLASS_NONE               0x00
00029 #define HID_SUBCLASS_BOOT               0x01
00030
00031 /* HID Protocol Codes */
00032 #define HID_PROTOCOL_NONE               0x00
00033 #define HID_PROTOCOL_KEYBOARD           0x01
00034 #define HID_PROTOCOL_MOUSE              0x02
00035
00036
00037 /* HID Descriptor Types */
00038 #define HID_HID_DESCRIPTOR_TYPE         0x21
00039 #define HID_REPORT_DESCRIPTOR_TYPE      0x22
00040 #define HID_PHYSICAL_DESCRIPTOR_TYPE    0x23
00041
00042
00043 /* HID Descriptor */
00044 #if defined     (  __CC_ARM  )
00045 typedef __packed struct _HID_DESCRIPTOR {
00046 #elif defined   (  __GNUC__  )
00047 typedef struct __packed _HID_DESCRIPTOR {
00048 #elif defined   (  __IAR_SYSTEMS_ICC__  )
00049 #pragma pack(1)
00050 typedef struct _HID_DESCRIPTOR {
00051 #endif
00052   uint8_t  bLength;
00053   uint8_t  bDescriptorType;
00054   uint16_t  bcdHID;
00055   uint8_t  bCountryCode;
00056   uint8_t  bNumDescriptors;
00057   /* Array of one or more descriptors */
00058 #if defined     (  __CC_ARM  )
00059   __packed struct _HID_DESCRIPTOR_LIST {
00060 #elif defined   (  __GNUC__  )
00061   struct __packed _HID_DESCRIPTOR_LIST {
00062 #elif defined   (  __IAR_SYSTEMS_ICC__  )
00063 #pragma pack(1)
00064   struct _HID_DESCRIPTOR_LIST {
00065 #endif
00066     uint8_t  bDescriptorType;
00067     uint16_t  wDescriptorLength;
00068   } DescriptorList[1];
00069 #ifdef __IAR_SYSTEMS_ICC__
00070 #pragma pack()
00071 #endif
00072 } HID_DESCRIPTOR;
00073 #ifdef __IAR_SYSTEMS_ICC__
00074 #pragma pack()
00075 #endif
00076
00077 /* HID Request Codes */
00078 #define HID_REQUEST_GET_REPORT          0x01
00079 #define HID_REQUEST_GET_IDLE            0x02
00080 #define HID_REQUEST_GET_PROTOCOL        0x03
00081 #define HID_REQUEST_SET_REPORT          0x09
00082 #define HID_REQUEST_SET_IDLE            0x0A
00083 #define HID_REQUEST_SET_PROTOCOL        0x0B
00084
00085 /* HID Report Types */
00086 #define HID_REPORT_INPUT                0x01
00087 #define HID_REPORT_OUTPUT               0x02
00088 #define HID_REPORT_FEATURE              0x03
00089
00090
00091 /* Usage Pages */
00092 #define HID_USAGE_PAGE_UNDEFINED        0x00
00093 #define HID_USAGE_PAGE_GENERIC          0x01
00094 #define HID_USAGE_PAGE_SIMULATION       0x02
00095 #define HID_USAGE_PAGE_VR               0x03
00096 #define HID_USAGE_PAGE_SPORT            0x04
00097 #define HID_USAGE_PAGE_GAME             0x05
00098 #define HID_USAGE_PAGE_DEV_CONTROLS     0x06
00099 #define HID_USAGE_PAGE_KEYBOARD         0x07
00100 #define HID_USAGE_PAGE_LED              0x08
00101 #define HID_USAGE_PAGE_BUTTON           0x09
00102 #define HID_USAGE_PAGE_ORDINAL          0x0A
00103 #define HID_USAGE_PAGE_TELEPHONY        0x0B
00104 #define HID_USAGE_PAGE_CONSUMER         0x0C
00105 #define HID_USAGE_PAGE_DIGITIZER        0x0D
00106 #define HID_USAGE_PAGE_UNICODE          0x10
00107 #define HID_USAGE_PAGE_ALPHANUMERIC     0x14
00108 /* ... */
00109
00110
00111 /* Generic Desktop Page (0x01) */
00112 #define HID_USAGE_GENERIC_POINTER               0x01
00113 #define HID_USAGE_GENERIC_MOUSE                 0x02
00114 #define HID_USAGE_GENERIC_JOYSTICK              0x04
00115 #define HID_USAGE_GENERIC_GAMEPAD               0x05
00116 #define HID_USAGE_GENERIC_KEYBOARD              0x06
00117 #define HID_USAGE_GENERIC_KEYPAD                0x07
00118 #define HID_USAGE_GENERIC_X                     0x30
00119 #define HID_USAGE_GENERIC_Y                     0x31
00120 #define HID_USAGE_GENERIC_Z                     0x32
00121 #define HID_USAGE_GENERIC_RX                    0x33
00122 #define HID_USAGE_GENERIC_RY                    0x34
00123 #define HID_USAGE_GENERIC_RZ                    0x35
00124 #define HID_USAGE_GENERIC_SLIDER                0x36
00125 #define HID_USAGE_GENERIC_DIAL                  0x37
00126 #define HID_USAGE_GENERIC_WHEEL                 0x38
00127 #define HID_USAGE_GENERIC_HATSWITCH             0x39
00128 #define HID_USAGE_GENERIC_COUNTED_BUFFER        0x3A
00129 #define HID_USAGE_GENERIC_BYTE_COUNT            0x3B
00130 #define HID_USAGE_GENERIC_MOTION_WAKEUP         0x3C
00131 #define HID_USAGE_GENERIC_VX                    0x40
00132 #define HID_USAGE_GENERIC_VY                    0x41
00133 #define HID_USAGE_GENERIC_VZ                    0x42
00134 #define HID_USAGE_GENERIC_VBRX                  0x43
00135 #define HID_USAGE_GENERIC_VBRY                  0x44
00136 #define HID_USAGE_GENERIC_VBRZ                  0x45
00137 #define HID_USAGE_GENERIC_VNO                   0x46
00138 #define HID_USAGE_GENERIC_SYSTEM_CTL            0x80
00139 #define HID_USAGE_GENERIC_SYSCTL_POWER          0x81
00140 #define HID_USAGE_GENERIC_SYSCTL_SLEEP          0x82
00141 #define HID_USAGE_GENERIC_SYSCTL_WAKE           0x83
00142 #define HID_USAGE_GENERIC_SYSCTL_CONTEXT_MENU   0x84
00143 #define HID_USAGE_GENERIC_SYSCTL_MAIN_MENU      0x85
00144 #define HID_USAGE_GENERIC_SYSCTL_APP_MENU       0x86
00145 #define HID_USAGE_GENERIC_SYSCTL_HELP_MENU      0x87
00146 #define HID_USAGE_GENERIC_SYSCTL_MENU_EXIT      0x88
00147 #define HID_USAGE_GENERIC_SYSCTL_MENU_SELECT    0x89
00148 #define HID_USAGE_GENERIC_SYSCTL_MENU_RIGHT     0x8A
00149 #define HID_USAGE_GENERIC_SYSCTL_MENU_LEFT      0x8B
00150 #define HID_USAGE_GENERIC_SYSCTL_MENU_UP        0x8C
00151 #define HID_USAGE_GENERIC_SYSCTL_MENU_DOWN      0x8D
00152 /* ... */
00153
00154 /* Simulation Controls Page (0x02) */
00155 /* ... */
00156 #define HID_USAGE_SIMULATION_RUDDER             0xBA
00157 #define HID_USAGE_SIMULATION_THROTTLE           0xBB
00158 /* ... */
00159
00160 /* Virtual Reality Controls Page (0x03) */
00161 /* ... */
00162
00163 /* Sport Controls Page (0x04) */
00164 /* ... */
00165
00166 /* Game Controls Page (0x05) */
00167 /* ... */
00168
00169 /* Generic Device Controls Page (0x06) */
00170 /* ... */
00171
00172 /* Keyboard/Keypad Page (0x07) */
00173
00174 /* Error "keys" */
00175 #define HID_USAGE_KEYBOARD_NOEVENT              0x00
00176 #define HID_USAGE_KEYBOARD_ROLLOVER             0x01
00177 #define HID_USAGE_KEYBOARD_POSTFAIL             0x02
00178 #define HID_USAGE_KEYBOARD_UNDEFINED            0x03
00179
00180 /* Letters */
00181 #define HID_USAGE_KEYBOARD_aA                   0x04
00182 #define HID_USAGE_KEYBOARD_zZ                   0x1D
00183
00184 /* Numbers */
00185 #define HID_USAGE_KEYBOARD_ONE                  0x1E
00186 #define HID_USAGE_KEYBOARD_ZERO                 0x27
00187
00188 #define HID_USAGE_KEYBOARD_RETURN               0x28
00189 #define HID_USAGE_KEYBOARD_ESCAPE               0x29
00190 #define HID_USAGE_KEYBOARD_DELETE               0x2A
00191
00192 /* Funtion keys */
00193 #define HID_USAGE_KEYBOARD_F1                   0x3A
00194 #define HID_USAGE_KEYBOARD_F12                  0x45
00195
00196 #define HID_USAGE_KEYBOARD_PRINT_SCREEN         0x46
00197
00198 /* Modifier Keys */
00199 #define HID_USAGE_KEYBOARD_LCTRL                0xE0
00200 #define HID_USAGE_KEYBOARD_LSHFT                0xE1
00201 #define HID_USAGE_KEYBOARD_LALT                 0xE2
00202 #define HID_USAGE_KEYBOARD_LGUI                 0xE3
00203 #define HID_USAGE_KEYBOARD_RCTRL                0xE4
00204 #define HID_USAGE_KEYBOARD_RSHFT                0xE5
00205 #define HID_USAGE_KEYBOARD_RALT                 0xE6
00206 #define HID_USAGE_KEYBOARD_RGUI                 0xE7
00207 #define HID_USAGE_KEYBOARD_SCROLL_LOCK          0x47
00208 #define HID_USAGE_KEYBOARD_NUM_LOCK             0x53
00209 #define HID_USAGE_KEYBOARD_CAPS_LOCK            0x39
00210
00211 /* ... */
00212
00213 /* LED Page (0x08) */
00214 #define HID_USAGE_LED_NUM_LOCK                  0x01
00215 #define HID_USAGE_LED_CAPS_LOCK                 0x02
00216 #define HID_USAGE_LED_SCROLL_LOCK               0x03
00217 #define HID_USAGE_LED_COMPOSE                   0x04
00218 #define HID_USAGE_LED_KANA                      0x05
00219 #define HID_USAGE_LED_POWER                     0x06
00220 #define HID_USAGE_LED_SHIFT                     0x07
00221 #define HID_USAGE_LED_DO_NOT_DISTURB            0x08
00222 #define HID_USAGE_LED_MUTE                      0x09
00223 #define HID_USAGE_LED_TONE_ENABLE               0x0A
00224 #define HID_USAGE_LED_HIGH_CUT_FILTER           0x0B
00225 #define HID_USAGE_LED_LOW_CUT_FILTER            0x0C
00226 #define HID_USAGE_LED_EQUALIZER_ENABLE          0x0D
00227 #define HID_USAGE_LED_SOUND_FIELD_ON            0x0E
00228 #define HID_USAGE_LED_SURROUND_FIELD_ON         0x0F
00229 #define HID_USAGE_LED_REPEAT                    0x10
00230 #define HID_USAGE_LED_STEREO                    0x11
00231 #define HID_USAGE_LED_SAMPLING_RATE_DETECT      0x12
00232 #define HID_USAGE_LED_SPINNING                  0x13
00233 #define HID_USAGE_LED_CAV                       0x14
00234 #define HID_USAGE_LED_CLV                       0x15
00235 #define HID_USAGE_LED_RECORDING_FORMAT_DET      0x16
00236 #define HID_USAGE_LED_OFF_HOOK                  0x17
00237 #define HID_USAGE_LED_RING                      0x18
00238 #define HID_USAGE_LED_MESSAGE_WAITING           0x19
00239 #define HID_USAGE_LED_DATA_MODE                 0x1A
00240 #define HID_USAGE_LED_BATTERY_OPERATION         0x1B
00241 #define HID_USAGE_LED_BATTERY_OK                0x1C
00242 #define HID_USAGE_LED_BATTERY_LOW               0x1D
00243 #define HID_USAGE_LED_SPEAKER                   0x1E
00244 #define HID_USAGE_LED_HEAD_SET                  0x1F
00245 #define HID_USAGE_LED_HOLD                      0x20
00246 #define HID_USAGE_LED_MICROPHONE                0x21
00247 #define HID_USAGE_LED_COVERAGE                  0x22
00248 #define HID_USAGE_LED_NIGHT_MODE                0x23
00249 #define HID_USAGE_LED_SEND_CALLS                0x24
00250 #define HID_USAGE_LED_CALL_PICKUP               0x25
00251 #define HID_USAGE_LED_CONFERENCE                0x26
00252 #define HID_USAGE_LED_STAND_BY                  0x27
00253 #define HID_USAGE_LED_CAMERA_ON                 0x28
00254 #define HID_USAGE_LED_CAMERA_OFF                0x29
00255 #define HID_USAGE_LED_ON_LINE                   0x2A
00256 #define HID_USAGE_LED_OFF_LINE                  0x2B
00257 #define HID_USAGE_LED_BUSY                      0x2C
00258 #define HID_USAGE_LED_READY                     0x2D
00259 #define HID_USAGE_LED_PAPER_OUT                 0x2E
00260 #define HID_USAGE_LED_PAPER_JAM                 0x2F
00261 #define HID_USAGE_LED_REMOTE                    0x30
00262 #define HID_USAGE_LED_FORWARD                   0x31
00263 #define HID_USAGE_LED_REVERSE                   0x32
00264 #define HID_USAGE_LED_STOP                      0x33
00265 #define HID_USAGE_LED_REWIND                    0x34
00266 #define HID_USAGE_LED_FAST_FORWARD              0x35
00267 #define HID_USAGE_LED_PLAY                      0x36
00268 #define HID_USAGE_LED_PAUSE                     0x37
00269 #define HID_USAGE_LED_RECORD                    0x38
00270 #define HID_USAGE_LED_ERROR                     0x39
00271 #define HID_USAGE_LED_SELECTED_INDICATOR        0x3A
00272 #define HID_USAGE_LED_IN_USE_INDICATOR          0x3B
00273 #define HID_USAGE_LED_MULTI_MODE_INDICATOR      0x3C
00274 #define HID_USAGE_LED_INDICATOR_ON              0x3D
00275 #define HID_USAGE_LED_INDICATOR_FLASH           0x3E
00276 #define HID_USAGE_LED_INDICATOR_SLOW_BLINK      0x3F
00277 #define HID_USAGE_LED_INDICATOR_FAST_BLINK      0x40
00278 #define HID_USAGE_LED_INDICATOR_OFF             0x41
00279 #define HID_USAGE_LED_FLASH_ON_TIME             0x42
00280 #define HID_USAGE_LED_SLOW_BLINK_ON_TIME        0x43
00281 #define HID_USAGE_LED_SLOW_BLINK_OFF_TIME       0x44
00282 #define HID_USAGE_LED_FAST_BLINK_ON_TIME        0x45
00283 #define HID_USAGE_LED_FAST_BLINK_OFF_TIME       0x46
00284 #define HID_USAGE_LED_INDICATOR_COLOR           0x47
00285 #define HID_USAGE_LED_RED                       0x48
00286 #define HID_USAGE_LED_GREEN                     0x49
00287 #define HID_USAGE_LED_AMBER                     0x4A
00288 #define HID_USAGE_LED_GENERIC_INDICATOR         0x4B
00289
00290 /* Button Page (0x09) */
00291 /*   There is no need to label these usages. */
00292
00293 /* Ordinal Page (0x0A) */
00294 /*   There is no need to label these usages. */
00295
00296 /* Telephony Device Page (0x0B) */
00297 #define HID_USAGE_TELEPHONY_PHONE               0x01
00298 #define HID_USAGE_TELEPHONY_ANSWERING_MACHINE   0x02
00299 #define HID_USAGE_TELEPHONY_MESSAGE_CONTROLS    0x03
00300 #define HID_USAGE_TELEPHONY_HANDSET             0x04
00301 #define HID_USAGE_TELEPHONY_HEADSET             0x05
00302 #define HID_USAGE_TELEPHONY_KEYPAD              0x06
00303 #define HID_USAGE_TELEPHONY_PROGRAMMABLE_BUTTON 0x07
00304 /* ... */
00305
00306 /* Consumer Page (0x0C) */
00307 #define HID_USAGE_CONSUMER_CONTROL              0x01
00308 /* ... */
00309
00310 /* and others ... */
00311
00312
00313 /* HID Report Item Macros */
00314
00315 /* Main Items */
00316 #define HID_Input(x)           0x81,x
00317 #define HID_Output(x)          0x91,x
00318 #define HID_Feature(x)         0xB1,x
00319 #define HID_Collection(x)      0xA1,x
00320 #define HID_EndCollection      0xC0
00321
00322 /* Data (Input, Output, Feature) */
00323 #define HID_Data               0<<0
00324 #define HID_Constant           1<<0
00325 #define HID_Array              0<<1
00326 #define HID_Variable           1<<1
00327 #define HID_Absolute           0<<2
00328 #define HID_Relative           1<<2
00329 #define HID_NoWrap             0<<3
00330 #define HID_Wrap               1<<3
00331 #define HID_Linear             0<<4
00332 #define HID_NonLinear          1<<4
00333 #define HID_PreferredState     0<<5
00334 #define HID_NoPreferred        1<<5
00335 #define HID_NoNullPosition     0<<6
00336 #define HID_NullState          1<<6
00337 #define HID_NonVolatile        0<<7
00338 #define HID_Volatile           1<<7
00339
00340 /* Collection Data */
00341 #define HID_Physical           0x00
00342 #define HID_Application        0x01
00343 #define HID_Logical            0x02
00344 #define HID_Report             0x03
00345 #define HID_NamedArray         0x04
00346 #define HID_UsageSwitch        0x05
00347 #define HID_UsageModifier      0x06
00348
00349 /* Global Items */
00350 #define HID_UsagePage(x)       0x05,x
00351 #define HID_UsagePageVendor(x) 0x06,x,0xFF
00352 #define HID_LogicalMin(x)      0x15,x
00353 #define HID_LogicalMinS(x)     0x16,(x&0xFF),((x>>8)&0xFF)
00354 #define HID_LogicalMinL(x)     0x17,(x&0xFF),((x>>8)&0xFF),((x>>16)&0xFF),((x>>24)&0xFF)
00355 #define HID_LogicalMax(x)      0x25,x
00356 #define HID_LogicalMaxS(x)     0x26,(x&0xFF),((x>>8)&0xFF)
00357 #define HID_LogicalMaxL(x)     0x27,(x&0xFF),((x>>8)&0xFF),((x>>16)&0xFF),((x>>24)&0xFF)
00358 #define HID_PhysicalMin(x)     0x35,x
00359 #define HID_PhysicalMinS(x)    0x36,(x&0xFF),((x>>8)&0xFF)
00360 #define HID_PhysicalMinL(x)    0x37,(x&0xFF),((x>>8)&0xFF),((x>>16)&0xFF),((x>>24)&0xFF)
00361 #define HID_PhysicalMax(x)     0x45,x
00362 #define HID_PhysicalMaxS(x)    0x46,(x&0xFF),((x>>8)&0xFF)
00363 #define HID_PhysicalMaxL(x)    0x47,(x&0xFF),((x>>8)&0xFF),((x>>16)&0xFF),((x>>24)&0xFF)
00364 #define HID_UnitExponent(x)    0x55,x
00365 #define HID_Unit(x)            0x65,x
00366 #define HID_UnitS(x)           0x66,(x&0xFF),((x>>8)&0xFF)
00367 #define HID_UnitL(x)           0x67,(x&0xFF),((x>>8)&0xFF),((x>>16)&0xFF),((x>>24)&0xFF)
00368 #define HID_ReportSize(x)      0x75,x
00369 #define HID_ReportID(x)        0x85,x
00370 #define HID_ReportCount(x)     0x95,x
00371 #define HID_Push               0xA0
00372 #define HID_Pop                0xB0
00373
00374 /* Local Items */
00375 #define HID_Usage(x)           0x09,x
00376 #define HID_UsageMin(x)        0x19,x
00377 #define HID_UsageMax(x)        0x29,x
00378
00379
00380 #endif  /* __HID_H__ */
Generated on Tue Jun 7 14:59:05 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBHID/hiduser.c Source File

C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBHID/hiduser.c

Go to the documentation of this file.
00001 /*----------------------------------------------------------------------------
00002  *      U S B  -  K e r n e l
00003  *----------------------------------------------------------------------------
00004  *      Name:    HIDUSER.C
00005  *      Purpose: HID Custom User Module
00006  *      Version: V1.10
00007  *----------------------------------------------------------------------------
00008 *      This software is supplied "AS IS" without any warranties, express,
00009  *      implied or statutory, including but not limited to the implied
00010  *      warranties of fitness for purpose, satisfactory quality and
00011  *      noninfringement. Keil extends you a royalty-free right to reproduce
00012  *      and distribute executable files created using this software for use
00013  *      on NXP Semiconductors LPC family microcontroller devices only. Nothing
00014  *      else gives you the right to use this software.
00015  *
00016  *      Copyright (c) 2005-2009 Keil Software.
00017  *---------------------------------------------------------------------------*/
00018
00019
00020 #include "lpc_types.h"
00021
00022 #include "usb.h"
00023 #include "hid.h"
00024 #include "usbcfg.h"
00025 #include "usbcore.h"
00026 #include "hiduser.h"
00027
00028 #include "demo.h"
00029
00030
00031 uint8_t HID_Protocol;
00032 uint8_t HID_IdleTime[HID_REPORT_NUM];
00033
00034
00035 /*
00036  *  HID Get Report Request Callback
00037  *   Called automatically on HID Get Report Request
00038  *    Parameters:      None (global SetupPacket and EP0Buf)
00039  *    Return Value:    TRUE - Success, FALSE - Error
00040  */
00041
00042 uint32_t HID_GetReport (void) {
00043
00044   /* ReportID = SetupPacket.wValue.WB.L; */
00045   switch (SetupPacket.wValue.WB.H) {
00046     case HID_REPORT_INPUT:
00047       GetInReport();
00048       EP0Buf[0] = InReport;
00049       break;
00050     case HID_REPORT_OUTPUT:
00051       return (FALSE);          /* Not Supported */
00052     case HID_REPORT_FEATURE:
00053       /* EP0Buf[] = ...; */
00054       /* break; */
00055       return (FALSE);          /* Not Supported */
00056   }
00057   return (TRUE);
00058 }
00059
00060
00061 /*
00062  *  HID Set Report Request Callback
00063  *   Called automatically on HID Set Report Request
00064  *    Parameters:      None (global SetupPacket and EP0Buf)
00065  *    Return Value:    TRUE - Success, FALSE - Error
00066  */
00067
00068 uint32_t HID_SetReport (void) {
00069
00070   /* ReportID = SetupPacket.wValue.WB.L; */
00071   switch (SetupPacket.wValue.WB.H) {
00072     case HID_REPORT_INPUT:
00073       return (FALSE);          /* Not Supported */
00074     case HID_REPORT_OUTPUT:
00075       OutReport = EP0Buf[0];
00076       SetOutReport();
00077       break;
00078     case HID_REPORT_FEATURE:
00079       return (FALSE);          /* Not Supported */
00080   }
00081   return (TRUE);
00082 }
00083
00084
00085 /*
00086  *  HID Get Idle Request Callback
00087  *   Called automatically on HID Get Idle Request
00088  *    Parameters:      None (global SetupPacket and EP0Buf)
00089  *    Return Value:    TRUE - Success, FALSE - Error
00090  */
00091
00092 uint32_t HID_GetIdle (void) {
00093
00094   EP0Buf[0] = HID_IdleTime[SetupPacket.wValue.WB.L];
00095   return (TRUE);
00096 }
00097
00098
00099 /*
00100  *  HID Set Idle Request Callback
00101  *   Called automatically on HID Set Idle Request
00102  *    Parameters:      None (global SetupPacket)
00103  *    Return Value:    TRUE - Success, FALSE - Error
00104  */
00105
00106 uint32_t HID_SetIdle (void) {
00107
00108   HID_IdleTime[SetupPacket.wValue.WB.L] = SetupPacket.wValue.WB.H;
00109
00110   /* Idle Handling if needed */
00111   /* ... */
00112
00113   return (TRUE);
00114 }
00115
00116
00117 /*
00118  *  HID Get Protocol Request Callback
00119  *   Called automatically on HID Get Protocol Request
00120  *    Parameters:      None (global SetupPacket)
00121  *    Return Value:    TRUE - Success, FALSE - Error
00122  */
00123
00124 uint32_t HID_GetProtocol (void) {
00125
00126   EP0Buf[0] = HID_Protocol;
00127   return (TRUE);
00128 }
00129
00130
00131 /*
00132  *  HID Set Protocol Request Callback
00133  *   Called automatically on HID Set Protocol Request
00134  *    Parameters:      None (global SetupPacket)
00135  *    Return Value:    TRUE - Success, FALSE - Error
00136  */
00137
00138 uint32_t HID_SetProtocol (void) {
00139
00140   HID_Protocol = SetupPacket.wValue.WB.L;
00141
00142   /* Protocol Handling if needed */
00143   /* ... */
00144
00145   return (TRUE);
00146 }
Generated on Tue Jun 7 14:59:05 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBHID/hiduser.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBHID/hiduser.h

Go to the documentation of this file.
00001 /*----------------------------------------------------------------------------
00002  *      U S B  -  K e r n e l
00003  *----------------------------------------------------------------------------
00004  *      Name:    HIDUSER.H
00005  *      Purpose: HID Custom User Definitions
00006  *      Version: V1.10
00007  *----------------------------------------------------------------------------
00008  *      This software is supplied "AS IS" without any warranties, express,
00009  *      implied or statutory, including but not limited to the implied
00010  *      warranties of fitness for purpose, satisfactory quality and
00011  *      noninfringement. Keil extends you a royalty-free right to reproduce
00012  *      and distribute executable files created using this software for use
00013  *      on NXP Semiconductors LPC family microcontroller devices only. Nothing
00014  *      else gives you the right to use this software.
00015  *
00016  *      Copyright (c) 2005-2009 Keil Software.
00017  *---------------------------------------------------------------------------*/
00018
00019 #ifndef __HIDUSER_H__
00020 #define __HIDUSER_H__
00021
00022
00023 /* HID Number of Reports */
00024 #define HID_REPORT_NUM      1
00025
00026 /* HID Global Variables */
00027 extern uint8_t HID_Protocol;
00028 extern uint8_t HID_IdleTime[HID_REPORT_NUM];
00029
00030 /* HID Requests Callback Functions */
00031 extern uint32_t HID_GetReport   (void);
00032 extern uint32_t HID_SetReport   (void);
00033 extern uint32_t HID_GetIdle     (void);
00034 extern uint32_t HID_SetIdle     (void);
00035 extern uint32_t HID_GetProtocol (void);
00036 extern uint32_t HID_SetProtocol (void);
00037
00038
00039 #endif  /* __HIDUSER_H__ */
Generated on Tue Jun 7 14:59:05 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/webserver/http-strings.c Source File

C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/webserver/http-strings.c

Go to the documentation of this file.
00001 const char http_http[8] =
00002 /* "http://" */
00003 {0x68, 0x74, 0x74, 0x70, 0x3a, 0x2f, 0x2f, };
00004 const char http_200[5] =
00005 /* "200 " */
00006 {0x32, 0x30, 0x30, 0x20, };
00007 const char http_301[5] =
00008 /* "301 " */
00009 {0x33, 0x30, 0x31, 0x20, };
00010 const char http_302[5] =
00011 /* "302 " */
00012 {0x33, 0x30, 0x32, 0x20, };
00013 const char http_get[5] =
00014 /* "GET " */
00015 {0x47, 0x45, 0x54, 0x20, };
00016 const char http_10[9] =
00017 /* "HTTP/1.0" */
00018 {0x48, 0x54, 0x54, 0x50, 0x2f, 0x31, 0x2e, 0x30, };
00019 const char http_11[9] =
00020 /* "HTTP/1.1" */
00021 {0x48, 0x54, 0x54, 0x50, 0x2f, 0x31, 0x2e, 0x31, };
00022 const char http_content_type[15] =
00023 /* "content-type: " */
00024 {0x63, 0x6f, 0x6e, 0x74, 0x65, 0x6e, 0x74, 0x2d, 0x74, 0x79, 0x70, 0x65, 0x3a, 0x20, };
00025 const char http_texthtml[10] =
00026 /* "text/html" */
00027 {0x74, 0x65, 0x78, 0x74, 0x2f, 0x68, 0x74, 0x6d, 0x6c, };
00028 const char http_location[11] =
00029 /* "location: " */
00030 {0x6c, 0x6f, 0x63, 0x61, 0x74, 0x69, 0x6f, 0x6e, 0x3a, 0x20, };
00031 const char http_host[7] =
00032 /* "host: " */
00033 {0x68, 0x6f, 0x73, 0x74, 0x3a, 0x20, };
00034 const char http_crnl[3] =
00035 /* "\r\n" */
00036 {0xd, 0xa, };
00037 const char http_index_html[12] =
00038 /* "/index.html" */
00039 {0x2f, 0x69, 0x6e, 0x64, 0x65, 0x78, 0x2e, 0x68, 0x74, 0x6d, 0x6c, };
00040 const char http_404_html[10] =
00041 /* "/404.html" */
00042 {0x2f, 0x34, 0x30, 0x34, 0x2e, 0x68, 0x74, 0x6d, 0x6c, };
00043 const char http_referer[9] =
00044 /* "Referer:" */
00045 {0x52, 0x65, 0x66, 0x65, 0x72, 0x65, 0x72, 0x3a, };
00046 const char http_header_200[84] =
00047 /* "HTTP/1.0 200 OK\r\nServer: uIP/1.0 http://www.sics.se/~adam/uip/\r\nConnection: close\r\n" */
00048 {0x48, 0x54, 0x54, 0x50, 0x2f, 0x31, 0x2e, 0x30, 0x20, 0x32, 0x30, 0x30, 0x20, 0x4f, 0x4b, 0xd, 0xa, 0x53, 0x65, 0x72, 0x76, 0x65, 0x72, 0x3a, 0x20, 0x75, 0x49, 0x50, 0x2f, 0x31, 0x2e, 0x30, 0x20, 0x68, 0x74, 0x74, 0x70, 0x3a, 0x2f, 0x2f, 0x77, 0x77, 0x77, 0x2e, 0x73, 0x69, 0x63, 0x73, 0x2e, 0x73, 0x65, 0x2f, 0x7e, 0x61, 0x64, 0x61, 0x6d, 0x2f, 0x75, 0x69, 0x70, 0x2f, 0xd, 0xa, 0x43, 0x6f, 0x6e, 0x6e, 0x65, 0x63, 0x74, 0x69, 0x6f, 0x6e, 0x3a, 0x20, 0x63, 0x6c, 0x6f, 0x73, 0x65, 0xd, 0xa, };
00049 const char http_header_404[91] =
00050 /* "HTTP/1.0 404 Not found\r\nServer: uIP/1.0 http://www.sics.se/~adam/uip/\r\nConnection: close\r\n" */
00051 {0x48, 0x54, 0x54, 0x50, 0x2f, 0x31, 0x2e, 0x30, 0x20, 0x34, 0x30, 0x34, 0x20, 0x4e, 0x6f, 0x74, 0x20, 0x66, 0x6f, 0x75, 0x6e, 0x64, 0xd, 0xa, 0x53, 0x65, 0x72, 0x76, 0x65, 0x72, 0x3a, 0x20, 0x75, 0x49, 0x50, 0x2f, 0x31, 0x2e, 0x30, 0x20, 0x68, 0x74, 0x74, 0x70, 0x3a, 0x2f, 0x2f, 0x77, 0x77, 0x77, 0x2e, 0x73, 0x69, 0x63, 0x73, 0x2e, 0x73, 0x65, 0x2f, 0x7e, 0x61, 0x64, 0x61, 0x6d, 0x2f, 0x75, 0x69, 0x70, 0x2f, 0xd, 0xa, 0x43, 0x6f, 0x6e, 0x6e, 0x65, 0x63, 0x74, 0x69, 0x6f, 0x6e, 0x3a, 0x20, 0x63, 0x6c, 0x6f, 0x73, 0x65, 0xd, 0xa, };
00052 const char http_content_type_plain[29] =
00053 /* "Content-type: text/plain\r\n\r\n" */
00054 {0x43, 0x6f, 0x6e, 0x74, 0x65, 0x6e, 0x74, 0x2d, 0x74, 0x79, 0x70, 0x65, 0x3a, 0x20, 0x74, 0x65, 0x78, 0x74, 0x2f, 0x70, 0x6c, 0x61, 0x69, 0x6e, 0xd, 0xa, 0xd, 0xa, };
00055 const char http_content_type_html[28] =
00056 /* "Content-type: text/html\r\n\r\n" */
00057 {0x43, 0x6f, 0x6e, 0x74, 0x65, 0x6e, 0x74, 0x2d, 0x74, 0x79, 0x70, 0x65, 0x3a, 0x20, 0x74, 0x65, 0x78, 0x74, 0x2f, 0x68, 0x74, 0x6d, 0x6c, 0xd, 0xa, 0xd, 0xa, };
00058 const char http_content_type_css [27] =
00059 /* "Content-type: text/css\r\n\r\n" */
00060 {0x43, 0x6f, 0x6e, 0x74, 0x65, 0x6e, 0x74, 0x2d, 0x74, 0x79, 0x70, 0x65, 0x3a, 0x20, 0x74, 0x65, 0x78, 0x74, 0x2f, 0x63, 0x73, 0x73, 0xd, 0xa, 0xd, 0xa, };
00061 const char http_content_type_text[28] =
00062 /* "Content-type: text/text\r\n\r\n" */
00063 {0x43, 0x6f, 0x6e, 0x74, 0x65, 0x6e, 0x74, 0x2d, 0x74, 0x79, 0x70, 0x65, 0x3a, 0x20, 0x74, 0x65, 0x78, 0x74, 0x2f, 0x74, 0x65, 0x78, 0x74, 0xd, 0xa, 0xd, 0xa, };
00064 const char http_content_type_png [28] =
00065 /* "Content-type: image/png\r\n\r\n" */
00066 {0x43, 0x6f, 0x6e, 0x74, 0x65, 0x6e, 0x74, 0x2d, 0x74, 0x79, 0x70, 0x65, 0x3a, 0x20, 0x69, 0x6d, 0x61, 0x67, 0x65, 0x2f, 0x70, 0x6e, 0x67, 0xd, 0xa, 0xd, 0xa, };
00067 const char http_content_type_gif [28] =
00068 /* "Content-type: image/gif\r\n\r\n" */
00069 {0x43, 0x6f, 0x6e, 0x74, 0x65, 0x6e, 0x74, 0x2d, 0x74, 0x79, 0x70, 0x65, 0x3a, 0x20, 0x69, 0x6d, 0x61, 0x67, 0x65, 0x2f, 0x67, 0x69, 0x66, 0xd, 0xa, 0xd, 0xa, };
00070 const char http_content_type_jpg [29] =
00071 /* "Content-type: image/jpeg\r\n\r\n" */
00072 {0x43, 0x6f, 0x6e, 0x74, 0x65, 0x6e, 0x74, 0x2d, 0x74, 0x79, 0x70, 0x65, 0x3a, 0x20, 0x69, 0x6d, 0x61, 0x67, 0x65, 0x2f, 0x6a, 0x70, 0x65, 0x67, 0xd, 0xa, 0xd, 0xa, };
00073 const char http_content_type_binary[43] =
00074 /* "Content-type: application/octet-stream\r\n\r\n" */
00075 {0x43, 0x6f, 0x6e, 0x74, 0x65, 0x6e, 0x74, 0x2d, 0x74, 0x79, 0x70, 0x65, 0x3a, 0x20, 0x61, 0x70, 0x70, 0x6c, 0x69, 0x63, 0x61, 0x74, 0x69, 0x6f, 0x6e, 0x2f, 0x6f, 0x63, 0x74, 0x65, 0x74, 0x2d, 0x73, 0x74, 0x72, 0x65, 0x61, 0x6d, 0xd, 0xa, 0xd, 0xa, };
00076 const char http_html[6] =
00077 /* ".html" */
00078 {0x2e, 0x68, 0x74, 0x6d, 0x6c, };
00079 const char http_shtml[7] =
00080 /* ".shtml" */
00081 {0x2e, 0x73, 0x68, 0x74, 0x6d, 0x6c, };
00082 const char http_htm[5] =
00083 /* ".htm" */
00084 {0x2e, 0x68, 0x74, 0x6d, };
00085 const char http_css[5] =
00086 /* ".css" */
00087 {0x2e, 0x63, 0x73, 0x73, };
00088 const char http_png[5] =
00089 /* ".png" */
00090 {0x2e, 0x70, 0x6e, 0x67, };
00091 const char http_gif[5] =
00092 /* ".gif" */
00093 {0x2e, 0x67, 0x69, 0x66, };
00094 const char http_jpg[5] =
00095 /* ".jpg" */
00096 {0x2e, 0x6a, 0x70, 0x67, };
00097 const char http_text[5] =
00098 /* ".txt" */
00099 {0x2e, 0x74, 0x78, 0x74, };
00100 const char http_txt[5] =
00101 /* ".txt" */
00102 {0x2e, 0x74, 0x78, 0x74, };
Generated on Tue Jun 7 14:59:00 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/webserver/http-strings.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/webserver/http-strings.h

Go to the documentation of this file.
00001 extern const char http_http[8];
00002 extern const char http_200[5];
00003 extern const char http_301[5];
00004 extern const char http_302[5];
00005 extern const char http_get[5];
00006 extern const char http_10[9];
00007 extern const char http_11[9];
00008 extern const char http_content_type[15];
00009 extern const char http_texthtml[10];
00010 extern const char http_location[11];
00011 extern const char http_host[7];
00012 extern const char http_crnl[3];
00013 extern const char http_index_html[12];
00014 extern const char http_404_html[10];
00015 extern const char http_referer[9];
00016 extern const char http_header_200[84];
00017 extern const char http_header_404[91];
00018 extern const char http_content_type_plain[29];
00019 extern const char http_content_type_html[28];
00020 extern const char http_content_type_css [27];
00021 extern const char http_content_type_text[28];
00022 extern const char http_content_type_png [28];
00023 extern const char http_content_type_gif [28];
00024 extern const char http_content_type_jpg [29];
00025 extern const char http_content_type_binary[43];
00026 extern const char http_html[6];
00027 extern const char http_shtml[7];
00028 extern const char http_htm[5];
00029 extern const char http_css[5];
00030 extern const char http_png[5];
00031 extern const char http_gif[5];
00032 extern const char http_jpg[5];
00033 extern const char http_text[5];
00034 extern const char http_txt[5];
Generated on Tue Jun 7 14:59:00 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/webserver/httpd-cgi.c Source File

C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/webserver/httpd-cgi.c

Go to the documentation of this file.
00001
00014 /*
00015  * Copyright (c) 2001-2006, Adam Dunkels.
00016  * All rights reserved.
00017  *
00018  * Redistribution and use in source and binary forms, with or without
00019  * modification, are permitted provided that the following conditions
00020  * are met:
00021  * 1. Redistributions of source code must retain the above copyright
00022  *    notice, this list of conditions and the following disclaimer.
00023  * 2. Redistributions in binary form must reproduce the above copyright
00024  *    notice, this list of conditions and the following disclaimer in the
00025  *    documentation and/or other materials provided with the distribution.
00026  * 3. The name of the author may not be used to endorse or promote
00027  *    products derived from this software without specific prior
00028  *    written permission.
00029  *
00030  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS
00031  * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
00032  * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
00033  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
00034  * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
00035  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
00036  * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
00037  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
00038  * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
00039  * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
00040  * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
00041  *
00042  * This file is part of the uIP TCP/IP stack.
00043  *
00044  * $Id: httpd-cgi.c,v 1.2 2006/06/11 21:46:37 adam Exp $
00045  *
00046  */
00047
00048 #include "uip.h"
00049 #include "psock.h"
00050 #include "httpd.h"
00051 #include "httpd-cgi.h"
00052 #include "httpd-fs.h"
00053
00054 #include <stdio.h>
00055 #include <string.h>
00056
00057 HTTPD_CGI_CALL(file, "file-stats", file_stats);
00058 HTTPD_CGI_CALL(tcp, "tcp-connections", tcp_stats);
00059 HTTPD_CGI_CALL(net, "net-stats", net_stats);
00060
00061 static const struct httpd_cgi_call *calls[] = { &file, &tcp, &net, NULL };
00062
00063 /*---------------------------------------------------------------------------*/
00064 static
00065 PT_THREAD(nullfunction(struct httpd_state *s, char *ptr))
00066 {
00067   PSOCK_BEGIN(&s->sout);
00068   PSOCK_END(&s->sout);
00069 }
00070 /*---------------------------------------------------------------------------*/
00071 httpd_cgifunction
00072 httpd_cgi(char *name)
00073 {
00074   const struct httpd_cgi_call **f;
00075
00076   /* Find the matching name in the table, return the function. */
00077   for(f = calls; *f != NULL; ++f) {
00078     if(strncmp((*f)->name, name, strlen((*f)->name)) == 0) {
00079       return (*f)->function;
00080     }
00081   }
00082   return nullfunction;
00083 }
00084 /*---------------------------------------------------------------------------*/
00085 static unsigned short
00086 generate_file_stats(void *arg)
00087 {
00088   char *f = (char *)arg;
00089   return snprintf((char *)uip_appdata, UIP_APPDATA_SIZE, "%5u", httpd_fs_count(f));
00090 }
00091 /*---------------------------------------------------------------------------*/
00092 static
00093 PT_THREAD(file_stats(struct httpd_state *s, char *ptr))
00094 {
00095   PSOCK_BEGIN(&s->sout);
00096
00097   PSOCK_GENERATOR_SEND(&s->sout, generate_file_stats, strchr(ptr, ' ') + 1);
00098
00099   PSOCK_END(&s->sout);
00100 }
00101 /*---------------------------------------------------------------------------*/
00102 static const char closed[] =   /*  "CLOSED",*/
00103 {0x43, 0x4c, 0x4f, 0x53, 0x45, 0x44, 0};
00104 static const char syn_rcvd[] = /*  "SYN-RCVD",*/
00105 {0x53, 0x59, 0x4e, 0x2d, 0x52, 0x43, 0x56,
00106  0x44,  0};
00107 static const char syn_sent[] = /*  "SYN-SENT",*/
00108 {0x53, 0x59, 0x4e, 0x2d, 0x53, 0x45, 0x4e,
00109  0x54,  0};
00110 static const char established[] = /*  "ESTABLISHED",*/
00111 {0x45, 0x53, 0x54, 0x41, 0x42, 0x4c, 0x49, 0x53, 0x48,
00112  0x45, 0x44, 0};
00113 static const char fin_wait_1[] = /*  "FIN-WAIT-1",*/
00114 {0x46, 0x49, 0x4e, 0x2d, 0x57, 0x41, 0x49,
00115  0x54, 0x2d, 0x31, 0};
00116 static const char fin_wait_2[] = /*  "FIN-WAIT-2",*/
00117 {0x46, 0x49, 0x4e, 0x2d, 0x57, 0x41, 0x49,
00118  0x54, 0x2d, 0x32, 0};
00119 static const char closing[] = /*  "CLOSING",*/
00120 {0x43, 0x4c, 0x4f, 0x53, 0x49,
00121  0x4e, 0x47, 0};
00122 static const char time_wait[] = /*  "TIME-WAIT,"*/
00123 {0x54, 0x49, 0x4d, 0x45, 0x2d, 0x57, 0x41,
00124  0x49, 0x54, 0};
00125 static const char last_ack[] = /*  "LAST-ACK"*/
00126 {0x4c, 0x41, 0x53, 0x54, 0x2d, 0x41, 0x43,
00127  0x4b, 0};
00128
00129 static const char *states[] = {
00130   closed,
00131   syn_rcvd,
00132   syn_sent,
00133   established,
00134   fin_wait_1,
00135   fin_wait_2,
00136   closing,
00137   time_wait,
00138   last_ack};
00139
00140
00141 static unsigned short
00142 generate_tcp_stats(void *arg)
00143 {
00144   struct uip_conn *conn;
00145   struct httpd_state *s = (struct httpd_state *)arg;
00146
00147   conn = &uip_conns[s->count];
00148   return snprintf((char *)uip_appdata, UIP_APPDATA_SIZE,
00149                  "<tr><td>%d</td><td>%u.%u.%u.%u:%u</td><td>%s</td><td>%u</td><td>%u</td><td>%c %c</td></tr>\r\n",
00150                  htons(conn->lport),
00151                  htons(conn->ripaddr[0]) >> 8,
00152                  htons(conn->ripaddr[0]) & 0xff,
00153                  htons(conn->ripaddr[1]) >> 8,
00154                  htons(conn->ripaddr[1]) & 0xff,
00155                  htons(conn->rport),
00156                  states[conn->tcpstateflags & UIP_TS_MASK],
00157                  conn->nrtx,
00158                  conn->timer,
00159                  (uip_outstanding(conn))? '*':' ',
00160                  (uip_stopped(conn))? '!':' ');
00161 }
00162 /*---------------------------------------------------------------------------*/
00163 static
00164 PT_THREAD(tcp_stats(struct httpd_state *s, char *ptr))
00165 {
00166
00167   PSOCK_BEGIN(&s->sout);
00168
00169   for(s->count = 0; s->count < UIP_CONNS; ++s->count) {
00170     if((uip_conns[s->count].tcpstateflags & UIP_TS_MASK) != UIP_CLOSED) {
00171       PSOCK_GENERATOR_SEND(&s->sout, generate_tcp_stats, s);
00172     }
00173   }
00174
00175   PSOCK_END(&s->sout);
00176 }
00177 /*---------------------------------------------------------------------------*/
00178 static unsigned short
00179 generate_net_stats(void *arg)
00180 {
00181   struct httpd_state *s = (struct httpd_state *)arg;
00182   return snprintf((char *)uip_appdata, UIP_APPDATA_SIZE,
00183                   "%5u\n", ((uip_stats_t *)&uip_stat)[s->count]);
00184 }
00185
00186 static
00187 PT_THREAD(net_stats(struct httpd_state *s, char *ptr))
00188 {
00189   PSOCK_BEGIN(&s->sout);
00190
00191 #if UIP_STATISTICS
00192
00193   for(s->count = 0; s->count < sizeof(uip_stat) / sizeof(uip_stats_t);
00194       ++s->count) {
00195     PSOCK_GENERATOR_SEND(&s->sout, generate_net_stats, s);
00196   }
00197
00198 #endif /* UIP_STATISTICS */
00199
00200   PSOCK_END(&s->sout);
00201 }
00202 /*---------------------------------------------------------------------------*/
Generated on Tue Jun 7 14:59:00 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/webserver/httpd-cgi.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/webserver/httpd-cgi.h

Go to the documentation of this file.
00001
00016 /*
00017  * Copyright (c) 2001, Adam Dunkels.
00018  * All rights reserved.
00019  *
00020  * Redistribution and use in source and binary forms, with or without
00021  * modification, are permitted provided that the following conditions
00022  * are met:
00023  * 1. Redistributions of source code must retain the above copyright
00024  *    notice, this list of conditions and the following disclaimer.
00025  * 2. Redistributions in binary form must reproduce the above copyright
00026  *    notice, this list of conditions and the following disclaimer in the
00027  *    documentation and/or other materials provided with the distribution.
00028  * 3. The name of the author may not be used to endorse or promote
00029  *    products derived from this software without specific prior
00030  *    written permission.
00031  *
00032  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS
00033  * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
00034  * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
00035  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
00036  * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
00037  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
00038  * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
00039  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
00040  * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
00041  * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
00042  * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
00043  *
00044  * This file is part of the uIP TCP/IP stack.
00045  *
00046  * $Id: httpd-cgi.h,v 1.2 2006/06/11 21:46:38 adam Exp $
00047  *
00048  */
00049
00050 #ifndef __HTTPD_CGI_H__
00051 #define __HTTPD_CGI_H__
00052
00053 #include "psock.h"
00054 #include "httpd.h"
00055
00056 typedef PT_THREAD((* httpd_cgifunction)(struct httpd_state *, char *));
00057
00058 httpd_cgifunction httpd_cgi(char *name);
00059
00060 struct httpd_cgi_call {
00061   const char *name;
00062   const httpd_cgifunction function;
00063 };
00064
00077 #define HTTPD_CGI_CALL(name, str, function) \
00078 static PT_THREAD(function(struct httpd_state *, char *)); \
00079 static const struct httpd_cgi_call name = {str, function}
00080
00081 void httpd_cgi_init(void);
00082 #endif /* __HTTPD_CGI_H__ */
00083
Generated on Tue Jun 7 14:59:00 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/webserver/httpd-fs.c Source File

C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/webserver/httpd-fs.c

Go to the documentation of this file.
00001 /*
00002  * Copyright (c) 2001, Swedish Institute of Computer Science.
00003  * All rights reserved.
00004  *
00005  * Redistribution and use in source and binary forms, with or without
00006  * modification, are permitted provided that the following conditions
00007  * are met:
00008  * 1. Redistributions of source code must retain the above copyright
00009  *    notice, this list of conditions and the following disclaimer.
00010  * 2. Redistributions in binary form must reproduce the above copyright
00011  *    notice, this list of conditions and the following disclaimer in the
00012  *    documentation and/or other materials provided with the distribution.
00013  * 3. Neither the name of the Institute nor the names of its contributors
00014  *    may be used to endorse or promote products derived from this software
00015  *    without specific prior written permission.
00016  *
00017  * THIS SOFTWARE IS PROVIDED BY THE INSTITUTE AND CONTRIBUTORS ``AS IS'' AND
00018  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
00019  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
00020  * ARE DISCLAIMED.  IN NO EVENT SHALL THE INSTITUTE OR CONTRIBUTORS BE LIABLE
00021  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
00022  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
00023  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
00024  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
00025  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
00026  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
00027  * SUCH DAMAGE.
00028  *
00029  * This file is part of the lwIP TCP/IP stack.
00030  *
00031  * Author: Adam Dunkels <adam@sics.se>
00032  *
00033  * $Id: httpd-fs.c,v 1.1 2006/06/07 09:13:08 adam Exp $
00034  */
00035
00036 #include "httpd.h"
00037 #include "httpd-fs.h"
00038 #include "httpd-fsdata.h"
00039
00040 #ifndef NULL
00041 #define NULL 0
00042 #endif /* NULL */
00043
00044 #include "httpd-fsdata.c"
00045
00046 #if HTTPD_FS_STATISTICS
00047 static u16_t count[HTTPD_FS_NUMFILES];
00048 #endif /* HTTPD_FS_STATISTICS */
00049
00050 /*-----------------------------------------------------------------------------------*/
00051 static u8_t
00052 httpd_fs_strcmp(const char *str1, const char *str2)
00053 {
00054   u8_t i;
00055   i = 0;
00056  loop:
00057
00058   if(str2[i] == 0 ||
00059      str1[i] == '\r' ||
00060      str1[i] == '\n') {
00061     return 0;
00062   }
00063
00064   if(str1[i] != str2[i]) {
00065     return 1;
00066   }
00067
00068
00069   ++i;
00070   goto loop;
00071 }
00072 /*-----------------------------------------------------------------------------------*/
00073 int
00074 httpd_fs_open(const char *name, struct httpd_fs_file *file)
00075 {
00076 #if HTTPD_FS_STATISTICS
00077   u16_t i = 0;
00078 #endif /* HTTPD_FS_STATISTICS */
00079   struct httpd_fsdata_file_noconst *f;
00080
00081   for(f = (struct httpd_fsdata_file_noconst *)HTTPD_FS_ROOT;
00082       f != NULL;
00083       f = (struct httpd_fsdata_file_noconst *)f->next) {
00084
00085     if(httpd_fs_strcmp(name, f->name) == 0) {
00086       file->data = f->data;
00087       file->len = f->len;
00088 #if HTTPD_FS_STATISTICS
00089       ++count[i];
00090 #endif /* HTTPD_FS_STATISTICS */
00091       return 1;
00092     }
00093 #if HTTPD_FS_STATISTICS
00094     ++i;
00095 #endif /* HTTPD_FS_STATISTICS */
00096
00097   }
00098   return 0;
00099 }
00100 /*-----------------------------------------------------------------------------------*/
00101 void
00102 httpd_fs_init(void)
00103 {
00104 #if HTTPD_FS_STATISTICS
00105   u16_t i;
00106   for(i = 0; i < HTTPD_FS_NUMFILES; i++) {
00107     count[i] = 0;
00108   }
00109 #endif /* HTTPD_FS_STATISTICS */
00110 }
00111 /*-----------------------------------------------------------------------------------*/
00112 #if HTTPD_FS_STATISTICS
00113 u16_t httpd_fs_count
00114 (char *name)
00115 {
00116   struct httpd_fsdata_file_noconst *f;
00117   u16_t i;
00118
00119   i = 0;
00120   for(f = (struct httpd_fsdata_file_noconst *)HTTPD_FS_ROOT;
00121       f != NULL;
00122       f = (struct httpd_fsdata_file_noconst *)f->next) {
00123
00124     if(httpd_fs_strcmp(name, f->name) == 0) {
00125       return count[i];
00126     }
00127     ++i;
00128   }
00129   return 0;
00130 }
00131 #endif /* HTTPD_FS_STATISTICS */
00132 /*-----------------------------------------------------------------------------------*/
Generated on Tue Jun 7 14:59:00 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/webserver/httpd-fs.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/webserver/httpd-fs.h

Go to the documentation of this file.
00001 /*
00002  * Copyright (c) 2001, Swedish Institute of Computer Science.
00003  * All rights reserved.
00004  *
00005  * Redistribution and use in source and binary forms, with or without
00006  * modification, are permitted provided that the following conditions
00007  * are met:
00008  * 1. Redistributions of source code must retain the above copyright
00009  *    notice, this list of conditions and the following disclaimer.
00010  * 2. Redistributions in binary form must reproduce the above copyright
00011  *    notice, this list of conditions and the following disclaimer in the
00012  *    documentation and/or other materials provided with the distribution.
00013  * 3. Neither the name of the Institute nor the names of its contributors
00014  *    may be used to endorse or promote products derived from this software
00015  *    without specific prior written permission.
00016  *
00017  * THIS SOFTWARE IS PROVIDED BY THE INSTITUTE AND CONTRIBUTORS ``AS IS'' AND
00018  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
00019  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
00020  * ARE DISCLAIMED.  IN NO EVENT SHALL THE INSTITUTE OR CONTRIBUTORS BE LIABLE
00021  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
00022  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
00023  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
00024  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
00025  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
00026  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
00027  * SUCH DAMAGE.
00028  *
00029  * This file is part of the lwIP TCP/IP stack.
00030  *
00031  * Author: Adam Dunkels <adam@sics.se>
00032  *
00033  * $Id: httpd-fs.h,v 1.1 2006/06/07 09:13:08 adam Exp $
00034  */
00035 #ifndef __HTTPD_FS_H__
00036 #define __HTTPD_FS_H__
00037
00038 #define HTTPD_FS_STATISTICS 1
00039
00040 struct httpd_fs_file {
00041   char *data;
00042   int len;
00043 };
00044
00045 /* file must be allocated by caller and will be filled in
00046    by the function. */
00047 int httpd_fs_open(const char *name, struct httpd_fs_file *file);
00048
00049 #ifdef HTTPD_FS_STATISTICS
00050 #if HTTPD_FS_STATISTICS == 1
00051 u16_t httpd_fs_count(char *name);
00052 #endif /* HTTPD_FS_STATISTICS */
00053 #endif /* HTTPD_FS_STATISTICS */
00054
00055 void httpd_fs_init(void);
00056
00057 #endif /* __HTTPD_FS_H__ */
Generated on Tue Jun 7 14:59:00 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/webserver/httpd-fsdata.c Source File

C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/webserver/httpd-fsdata.c

Go to the documentation of this file.
00001 static const unsigned char data_processes_shtml[] = {
00002         /* /processes.shtml */
00003         0x2f, 0x70, 0x72, 0x6f, 0x63, 0x65, 0x73, 0x73, 0x65, 0x73, 0x2e, 0x73, 0x68, 0x74, 0x6d, 0x6c, 0,
00004         0x25, 0x21, 0x3a, 0x20, 0x2f, 0x68, 0x65, 0x61, 0x64, 0x65,
00005         0x72, 0x2e, 0x68, 0x74, 0x6d, 0x6c, 0xa, 0x3c, 0x68, 0x31,
00006         0x3e, 0x53, 0x79, 0x73, 0x74, 0x65, 0x6d, 0x20, 0x70, 0x72,
00007         0x6f, 0x63, 0x65, 0x73, 0x73, 0x65, 0x73, 0x3c, 0x2f, 0x68,
00008         0x31, 0x3e, 0x3c, 0x62, 0x72, 0x3e, 0x3c, 0x74, 0x61, 0x62,
00009         0x6c, 0x65, 0x20, 0x77, 0x69, 0x64, 0x74, 0x68, 0x3d, 0x22,
00010         0x31, 0x30, 0x30, 0x25, 0x22, 0x3e, 0xa, 0x3c, 0x74, 0x72,
00011         0x3e, 0x3c, 0x74, 0x68, 0x3e, 0x49, 0x44, 0x3c, 0x2f, 0x74,
00012         0x68, 0x3e, 0x3c, 0x74, 0x68, 0x3e, 0x4e, 0x61, 0x6d, 0x65,
00013         0x3c, 0x2f, 0x74, 0x68, 0x3e, 0x3c, 0x74, 0x68, 0x3e, 0x50,
00014         0x72, 0x69, 0x6f, 0x72, 0x69, 0x74, 0x79, 0x3c, 0x2f, 0x74,
00015         0x68, 0x3e, 0x3c, 0x74, 0x68, 0x3e, 0x50, 0x6f, 0x6c, 0x6c,
00016         0x20, 0x68, 0x61, 0x6e, 0x64, 0x6c, 0x65, 0x72, 0x3c, 0x2f,
00017         0x74, 0x68, 0x3e, 0x3c, 0x74, 0x68, 0x3e, 0x45, 0x76, 0x65,
00018         0x6e, 0x74, 0x20, 0x68, 0x61, 0x6e, 0x64, 0x6c, 0x65, 0x72,
00019         0x3c, 0x2f, 0x74, 0x68, 0x3e, 0x3c, 0x74, 0x68, 0x3e, 0x50,
00020         0x72, 0x6f, 0x63, 0x73, 0x74, 0x61, 0x74, 0x65, 0x3c, 0x2f,
00021         0x74, 0x68, 0x3e, 0x3c, 0x2f, 0x74, 0x72, 0x3e, 0xa, 0x25,
00022         0x21, 0x20, 0x70, 0x72, 0x6f, 0x63, 0x65, 0x73, 0x73, 0x65,
00023         0x73, 0xa, 0x25, 0x21, 0x3a, 0x20, 0x2f, 0x66, 0x6f, 0x6f,
00024         0x74, 0x65, 0x72, 0x2e, 0x68, 0x74, 0x6d, 0x6c, 0};
00025
00026 static const unsigned char data_404_html[] = {
00027         /* /404.html */
00028         0x2f, 0x34, 0x30, 0x34, 0x2e, 0x68, 0x74, 0x6d, 0x6c, 0,
00029         0x3c, 0x68, 0x74, 0x6d, 0x6c, 0x3e, 0xa, 0x20, 0x20, 0x3c,
00030         0x62, 0x6f, 0x64, 0x79, 0x20, 0x62, 0x67, 0x63, 0x6f, 0x6c,
00031         0x6f, 0x72, 0x3d, 0x22, 0x77, 0x68, 0x69, 0x74, 0x65, 0x22,
00032         0x3e, 0xa, 0x20, 0x20, 0x20, 0x20, 0x3c, 0x63, 0x65, 0x6e,
00033         0x74, 0x65, 0x72, 0x3e, 0xa, 0x20, 0x20, 0x20, 0x20, 0x20,
00034         0x20, 0x3c, 0x68, 0x31, 0x3e, 0x34, 0x30, 0x34, 0x20, 0x2d,
00035         0x20, 0x66, 0x69, 0x6c, 0x65, 0x20, 0x6e, 0x6f, 0x74, 0x20,
00036         0x66, 0x6f, 0x75, 0x6e, 0x64, 0x3c, 0x2f, 0x68, 0x31, 0x3e,
00037         0xa, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x3c, 0x68, 0x33,
00038         0x3e, 0x47, 0x6f, 0x20, 0x3c, 0x61, 0x20, 0x68, 0x72, 0x65,
00039         0x66, 0x3d, 0x22, 0x2f, 0x22, 0x3e, 0x68, 0x65, 0x72, 0x65,
00040         0x3c, 0x2f, 0x61, 0x3e, 0x20, 0x69, 0x6e, 0x73, 0x74, 0x65,
00041         0x61, 0x64, 0x2e, 0x3c, 0x2f, 0x68, 0x33, 0x3e, 0xa, 0x20,
00042         0x20, 0x20, 0x20, 0x3c, 0x2f, 0x63, 0x65, 0x6e, 0x74, 0x65,
00043         0x72, 0x3e, 0xa, 0x20, 0x20, 0x3c, 0x2f, 0x62, 0x6f, 0x64,
00044         0x79, 0x3e, 0xa, 0x3c, 0x2f, 0x68, 0x74, 0x6d, 0x6c, 0x3e,
00045 0};
00046
00047 static const unsigned char data_files_shtml[] = {
00048         /* /files.shtml */
00049         0x2f, 0x66, 0x69, 0x6c, 0x65, 0x73, 0x2e, 0x73, 0x68, 0x74, 0x6d, 0x6c, 0,
00050         0x25, 0x21, 0x3a, 0x20, 0x2f, 0x68, 0x65, 0x61, 0x64, 0x65,
00051         0x72, 0x2e, 0x68, 0x74, 0x6d, 0x6c, 0xa, 0x3c, 0x68, 0x31,
00052         0x3e, 0x46, 0x69, 0x6c, 0x65, 0x20, 0x73, 0x74, 0x61, 0x74,
00053         0x69, 0x73, 0x74, 0x69, 0x63, 0x73, 0x3c, 0x2f, 0x68, 0x31,
00054         0x3e, 0xa, 0x3c, 0x63, 0x65, 0x6e, 0x74, 0x65, 0x72, 0x3e,
00055         0xa, 0x3c, 0x74, 0x61, 0x62, 0x6c, 0x65, 0x20, 0x77, 0x69,
00056         0x64, 0x74, 0x68, 0x3d, 0x22, 0x33, 0x30, 0x30, 0x22, 0x3e,
00057         0xa, 0x3c, 0x74, 0x72, 0x3e, 0x3c, 0x74, 0x64, 0x3e, 0x3c,
00058         0x61, 0x20, 0x68, 0x72, 0x65, 0x66, 0x3d, 0x22, 0x2f, 0x69,
00059         0x6e, 0x64, 0x65, 0x78, 0x2e, 0x68, 0x74, 0x6d, 0x6c, 0x22,
00060         0x3e, 0x2f, 0x69, 0x6e, 0x64, 0x65, 0x78, 0x2e, 0x68, 0x74,
00061         0x6d, 0x6c, 0x3c, 0x2f, 0x61, 0x3e, 0x3c, 0x2f, 0x74, 0x64,
00062         0x3e, 0xa, 0x3c, 0x74, 0x64, 0x3e, 0x25, 0x21, 0x20, 0x66,
00063         0x69, 0x6c, 0x65, 0x2d, 0x73, 0x74, 0x61, 0x74, 0x73, 0x20,
00064         0x2f, 0x69, 0x6e, 0x64, 0x65, 0x78, 0x2e, 0x68, 0x74, 0x6d,
00065         0x6c, 0xa, 0x3c, 0x2f, 0x74, 0x64, 0x3e, 0x3c, 0x74, 0x64,
00066         0x3e, 0x3c, 0x69, 0x6d, 0x67, 0x20, 0x73, 0x72, 0x63, 0x3d,
00067         0x22, 0x2f, 0x66, 0x61, 0x64, 0x65, 0x2e, 0x70, 0x6e, 0x67,
00068         0x22, 0x20, 0x68, 0x65, 0x69, 0x67, 0x68, 0x74, 0x3d, 0x31,
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00176
00177 static const unsigned char data_footer_html[] = {
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00182
00183 static const unsigned char data_header_html[] = {
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00249
00250 static const unsigned char data_index_html[] = {
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00341
00342 static const unsigned char data_style_css[] = {
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00446         0xa, 0x7d, 0xa, 0xa, 0};
00447
00448 static const unsigned char data_tcp_shtml[] = {
00449         /* /tcp.shtml */
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00453         0x3e, 0x43, 0x75, 0x72, 0x72, 0x65, 0x6e, 0x74, 0x20, 0x63,
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00472 0};
00473
00474 static const unsigned char data_fade_png[] = {
00475         /* /fade.png */
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00477         0x89, 0x50, 0x4e, 0x47, 0xd, 0xa, 0x1a, 0xa, 00, 00,
00478         00, 0xd, 0x49, 0x48, 0x44, 0x52, 00, 00, 00, 0x4,
00479         00, 00, 00, 0xa, 0x8, 0x2, 00, 00, 00, 0x1c,
00480         0x99, 0x68, 0x59, 00, 00, 00, 0x9, 0x70, 0x48, 0x59,
00481         0x73, 00, 00, 0xb, 0x13, 00, 00, 0xb, 0x13, 0x1,
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00490         0x10, 0xc4, 0x2e, 0x37, 0x9e, 0x40, 0x65, 0xfd, 0xff, 0x83,
00491         0xf4, 0xa, 0x1c, 0x8d, 0x54, 0x9b, 0xc9, 0xcc, 0x9a, 0x3d,
00492         0x90, 0x73, 0x71, 0x67, 0x91, 0xd4, 0x74, 0x36, 0xa9, 0x55,
00493         0x1, 0xf8, 0x29, 0x58, 0xc8, 0xbf, 0x48, 0xc4, 0x81, 0x74,
00494         0xb, 0xa3, 0xf, 0x7c, 0xdb, 0x4, 0xe8, 0x40, 0x5, 0xdf,
00495         0xa1, 0xf3, 0xfc, 0x73, 00, 00, 00, 00, 0x49, 0x45,
00496         0x4e, 0x44, 0xae, 0x42, 0x60, 0x82, 0};
00497
00498 static const unsigned char data_stats_shtml[] = {
00499         /* /stats.shtml */
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00583         0xa, 0};
00584
00585 const struct httpd_fsdata_file file_processes_shtml[] = {{NULL, data_processes_shtml, data_processes_shtml + 17, sizeof(data_processes_shtml) - 17}};
00586
00587 const struct httpd_fsdata_file file_404_html[] = {{file_processes_shtml, data_404_html, data_404_html + 10, sizeof(data_404_html) - 10}};
00588
00589 const struct httpd_fsdata_file file_files_shtml[] = {{file_404_html, data_files_shtml, data_files_shtml + 13, sizeof(data_files_shtml) - 13}};
00590
00591 const struct httpd_fsdata_file file_footer_html[] = {{file_files_shtml, data_footer_html, data_footer_html + 13, sizeof(data_footer_html) - 13}};
00592
00593 const struct httpd_fsdata_file file_header_html[] = {{file_footer_html, data_header_html, data_header_html + 13, sizeof(data_header_html) - 13}};
00594
00595 const struct httpd_fsdata_file file_index_html[] = {{file_header_html, data_index_html, data_index_html + 12, sizeof(data_index_html) - 12}};
00596
00597 const struct httpd_fsdata_file file_style_css[] = {{file_index_html, data_style_css, data_style_css + 11, sizeof(data_style_css) - 11}};
00598
00599 const struct httpd_fsdata_file file_tcp_shtml[] = {{file_style_css, data_tcp_shtml, data_tcp_shtml + 11, sizeof(data_tcp_shtml) - 11}};
00600
00601 const struct httpd_fsdata_file file_fade_png[] = {{file_tcp_shtml, data_fade_png, data_fade_png + 10, sizeof(data_fade_png) - 10}};
00602
00603 const struct httpd_fsdata_file file_stats_shtml[] = {{file_fade_png, data_stats_shtml, data_stats_shtml + 13, sizeof(data_stats_shtml) - 13}};
00604
00605 #define HTTPD_FS_ROOT file_stats_shtml
00606
00607 #define HTTPD_FS_NUMFILES 10
Generated on Tue Jun 7 14:59:00 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/webserver/httpd-fsdata.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/webserver/httpd-fsdata.h

Go to the documentation of this file.
00001 /*
00002  * Copyright (c) 2001, Swedish Institute of Computer Science.
00003  * All rights reserved.
00004  *
00005  * Redistribution and use in source and binary forms, with or without
00006  * modification, are permitted provided that the following conditions
00007  * are met:
00008  * 1. Redistributions of source code must retain the above copyright
00009  *    notice, this list of conditions and the following disclaimer.
00010  * 2. Redistributions in binary form must reproduce the above copyright
00011  *    notice, this list of conditions and the following disclaimer in the
00012  *    documentation and/or other materials provided with the distribution.
00013  * 3. Neither the name of the Institute nor the names of its contributors
00014  *    may be used to endorse or promote products derived from this software
00015  *    without specific prior written permission.
00016  *
00017  * THIS SOFTWARE IS PROVIDED BY THE INSTITUTE AND CONTRIBUTORS ``AS IS'' AND
00018  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
00019  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
00020  * ARE DISCLAIMED.  IN NO EVENT SHALL THE INSTITUTE OR CONTRIBUTORS BE LIABLE
00021  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
00022  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
00023  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
00024  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
00025  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
00026  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
00027  * SUCH DAMAGE.
00028  *
00029  * This file is part of the lwIP TCP/IP stack.
00030  *
00031  * Author: Adam Dunkels <adam@sics.se>
00032  *
00033  * $Id: httpd-fsdata.h,v 1.1 2006/06/07 09:13:08 adam Exp $
00034  */
00035 #ifndef __HTTPD_FSDATA_H__
00036 #define __HTTPD_FSDATA_H__
00037
00038 #include "uip.h"
00039
00040 struct httpd_fsdata_file {
00041   const struct httpd_fsdata_file *next;
00042   const char *name;
00043   const char *data;
00044   const int len;
00045 #ifdef HTTPD_FS_STATISTICS
00046 #if HTTPD_FS_STATISTICS == 1
00047   u16_t count;
00048 #endif /* HTTPD_FS_STATISTICS */
00049 #endif /* HTTPD_FS_STATISTICS */
00050 };
00051
00052 struct httpd_fsdata_file_noconst {
00053   struct httpd_fsdata_file *next;
00054   char *name;
00055   char *data;
00056   int len;
00057 #ifdef HTTPD_FS_STATISTICS
00058 #if HTTPD_FS_STATISTICS == 1
00059   u16_t count;
00060 #endif /* HTTPD_FS_STATISTICS */
00061 #endif /* HTTPD_FS_STATISTICS */
00062 };
00063
00064 #endif /* __HTTPD_FSDATA_H__ */
Generated on Tue Jun 7 14:59:00 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/webserver/httpd.c Source File

C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/webserver/httpd.c

Go to the documentation of this file.
00001
00026 /*
00027  * Copyright (c) 2004, Adam Dunkels.
00028  * All rights reserved.
00029  *
00030  * Redistribution and use in source and binary forms, with or without
00031  * modification, are permitted provided that the following conditions
00032  * are met:
00033  * 1. Redistributions of source code must retain the above copyright
00034  *    notice, this list of conditions and the following disclaimer.
00035  * 2. Redistributions in binary form must reproduce the above copyright
00036  *    notice, this list of conditions and the following disclaimer in the
00037  *    documentation and/or other materials provided with the distribution.
00038  * 3. Neither the name of the Institute nor the names of its contributors
00039  *    may be used to endorse or promote products derived from this software
00040  *    without specific prior written permission.
00041  *
00042  * THIS SOFTWARE IS PROVIDED BY THE INSTITUTE AND CONTRIBUTORS ``AS IS'' AND
00043  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
00044  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
00045  * ARE DISCLAIMED.  IN NO EVENT SHALL THE INSTITUTE OR CONTRIBUTORS BE LIABLE
00046  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
00047  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
00048  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
00049  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
00050  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
00051  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
00052  * SUCH DAMAGE.
00053  *
00054  * This file is part of the uIP TCP/IP stack.
00055  *
00056  * Author: Adam Dunkels <adam@sics.se>
00057  *
00058  * $Id: httpd.c,v 1.2 2006/06/11 21:46:38 adam Exp $
00059  */
00060
00061 #include "uip.h"
00062 #include "httpd.h"
00063 #include "httpd-fs.h"
00064 #include "httpd-cgi.h"
00065 #include "http-strings.h"
00066
00067 #include <string.h>
00068
00069 #define STATE_WAITING 0
00070 #define STATE_OUTPUT  1
00071
00072 #define ISO_nl      0x0a
00073 #define ISO_space   0x20
00074 #define ISO_bang    0x21
00075 #define ISO_percent 0x25
00076 #define ISO_period  0x2e
00077 #define ISO_slash   0x2f
00078 #define ISO_colon   0x3a
00079
00080
00081 /*---------------------------------------------------------------------------*/
00082 static unsigned short
00083 generate_part_of_file(void *state)
00084 {
00085   struct httpd_state *s = (struct httpd_state *)state;
00086
00087   if(s->file.len > uip_mss()) {
00088     s->len = uip_mss();
00089   } else {
00090     s->len = s->file.len;
00091   }
00092   memcpy(uip_appdata, s->file.data, s->len);
00093
00094   return s->len;
00095 }
00096 /*---------------------------------------------------------------------------*/
00097 static
00098 PT_THREAD(send_file(struct httpd_state *s))
00099 {
00100   PSOCK_BEGIN(&s->sout);
00101
00102   do {
00103     PSOCK_GENERATOR_SEND(&s->sout, generate_part_of_file, s);
00104     s->file.len -= s->len;
00105     s->file.data += s->len;
00106   } while(s->file.len > 0);
00107
00108   PSOCK_END(&s->sout);
00109 }
00110 /*---------------------------------------------------------------------------*/
00111 static
00112 PT_THREAD(send_part_of_file(struct httpd_state *s))
00113 {
00114   PSOCK_BEGIN(&s->sout);
00115
00116   PSOCK_SEND(&s->sout, s->file.data, s->len);
00117
00118   PSOCK_END(&s->sout);
00119 }
00120 /*---------------------------------------------------------------------------*/
00121 static void
00122 next_scriptstate(struct httpd_state *s)
00123 {
00124   char *p;
00125   p = strchr(s->scriptptr, ISO_nl) + 1;
00126   s->scriptlen -= (unsigned short)(p - s->scriptptr);
00127   s->scriptptr = p;
00128 }
00129 /*---------------------------------------------------------------------------*/
00130 static
00131 PT_THREAD(handle_script(struct httpd_state *s))
00132 {
00133   char *ptr;
00134
00135   PT_BEGIN(&s->scriptpt);
00136
00137
00138   while(s->file.len > 0) {
00139
00140     /* Check if we should start executing a script. */
00141     if(*s->file.data == ISO_percent &&
00142        *(s->file.data + 1) == ISO_bang) {
00143       s->scriptptr = s->file.data + 3;
00144       s->scriptlen = s->file.len - 3;
00145       if(*(s->scriptptr - 1) == ISO_colon) {
00146         httpd_fs_open(s->scriptptr + 1, &s->file);
00147         PT_WAIT_THREAD(&s->scriptpt, send_file(s));
00148       } else {
00149         PT_WAIT_THREAD(&s->scriptpt,
00150                        httpd_cgi(s->scriptptr)(s, s->scriptptr));
00151       }
00152       next_scriptstate(s);
00153
00154       /* The script is over, so we reset the pointers and continue
00155          sending the rest of the file. */
00156       s->file.data = s->scriptptr;
00157       s->file.len = s->scriptlen;
00158     } else {
00159       /* See if we find the start of script marker in the block of HTML
00160          to be sent. */
00161
00162       if(s->file.len > uip_mss()) {
00163         s->len = uip_mss();
00164       } else {
00165         s->len = s->file.len;
00166       }
00167
00168       if(*s->file.data == ISO_percent) {
00169         ptr = strchr(s->file.data + 1, ISO_percent);
00170       } else {
00171         ptr = strchr(s->file.data, ISO_percent);
00172       }
00173       if(ptr != NULL &&
00174          ptr != s->file.data) {
00175         s->len = (int)(ptr - s->file.data);
00176         if(s->len >= uip_mss()) {
00177           s->len = uip_mss();
00178         }
00179       }
00180       PT_WAIT_THREAD(&s->scriptpt, send_part_of_file(s));
00181       s->file.data += s->len;
00182       s->file.len -= s->len;
00183
00184     }
00185   }
00186
00187   PT_END(&s->scriptpt);
00188 }
00189 /*---------------------------------------------------------------------------*/
00190 static
00191 PT_THREAD(send_headers(struct httpd_state *s, const char *statushdr))
00192 {
00193   char *ptr;
00194
00195   PSOCK_BEGIN(&s->sout);
00196
00197   PSOCK_SEND_STR(&s->sout, statushdr);
00198
00199   ptr = strrchr(s->filename, ISO_period);
00200   if(ptr == NULL) {
00201     PSOCK_SEND_STR(&s->sout, http_content_type_binary);
00202   } else if(strncmp(http_html, ptr, 5) == 0 ||
00203             strncmp(http_shtml, ptr, 6) == 0) {
00204     PSOCK_SEND_STR(&s->sout, http_content_type_html);
00205   } else if(strncmp(http_css, ptr, 4) == 0) {
00206     PSOCK_SEND_STR(&s->sout, http_content_type_css);
00207   } else if(strncmp(http_png, ptr, 4) == 0) {
00208     PSOCK_SEND_STR(&s->sout, http_content_type_png);
00209   } else if(strncmp(http_gif, ptr, 4) == 0) {
00210     PSOCK_SEND_STR(&s->sout, http_content_type_gif);
00211   } else if(strncmp(http_jpg, ptr, 4) == 0) {
00212     PSOCK_SEND_STR(&s->sout, http_content_type_jpg);
00213   } else {
00214     PSOCK_SEND_STR(&s->sout, http_content_type_plain);
00215   }
00216   PSOCK_END(&s->sout);
00217 }
00218 /*---------------------------------------------------------------------------*/
00219 static
00220 PT_THREAD(handle_output(struct httpd_state *s))
00221 {
00222   char *ptr;
00223
00224   PT_BEGIN(&s->outputpt);
00225
00226   if(!httpd_fs_open(s->filename, &s->file)) {
00227     httpd_fs_open(http_404_html, &s->file);
00228     strcpy(s->filename, http_404_html);
00229     PT_WAIT_THREAD(&s->outputpt,
00230                    send_headers(s,
00231                    http_header_404));
00232     PT_WAIT_THREAD(&s->outputpt,
00233                    send_file(s));
00234   } else {
00235     PT_WAIT_THREAD(&s->outputpt,
00236                    send_headers(s,
00237                    http_header_200));
00238     ptr = strchr(s->filename, ISO_period);
00239     if(ptr != NULL && strncmp(ptr, http_shtml, 6) == 0) {
00240       PT_INIT(&s->scriptpt);
00241       PT_WAIT_THREAD(&s->outputpt, handle_script(s));
00242     } else {
00243       PT_WAIT_THREAD(&s->outputpt,
00244                      send_file(s));
00245     }
00246   }
00247   PSOCK_CLOSE(&s->sout);
00248   PT_END(&s->outputpt);
00249 }
00250 /*---------------------------------------------------------------------------*/
00251 static
00252 PT_THREAD(handle_input(struct httpd_state *s))
00253 {
00254   PSOCK_BEGIN(&s->sin);
00255
00256   PSOCK_READTO(&s->sin, ISO_space);
00257
00258
00259   if(strncmp(s->inputbuf, http_get, 4) != 0) {
00260     PSOCK_CLOSE_EXIT(&s->sin);
00261   }
00262   PSOCK_READTO(&s->sin, ISO_space);
00263
00264   if(s->inputbuf[0] != ISO_slash) {
00265     PSOCK_CLOSE_EXIT(&s->sin);
00266   }
00267
00268   if(s->inputbuf[1] == ISO_space) {
00269     strncpy(s->filename, http_index_html, sizeof(s->filename));
00270   } else {
00271     s->inputbuf[PSOCK_DATALEN(&s->sin) - 1] = 0;
00272     strncpy(s->filename, &s->inputbuf[0], sizeof(s->filename));
00273   }
00274
00275   /*  httpd_log_file(uip_conn->ripaddr, s->filename);*/
00276
00277   s->state = STATE_OUTPUT;
00278
00279   while(1) {
00280     PSOCK_READTO(&s->sin, ISO_nl);
00281
00282     if(strncmp(s->inputbuf, http_referer, 8) == 0) {
00283       s->inputbuf[PSOCK_DATALEN(&s->sin) - 2] = 0;
00284       /*      httpd_log(&s->inputbuf[9]);*/
00285     }
00286   }
00287
00288   PSOCK_END(&s->sin);
00289 }
00290 /*---------------------------------------------------------------------------*/
00291 static void
00292 handle_connection(struct httpd_state *s)
00293 {
00294   handle_input(s);
00295   if(s->state == STATE_OUTPUT) {
00296     handle_output(s);
00297   }
00298 }
00299 /*---------------------------------------------------------------------------*/
00300 void
00301 httpd_appcall(void)
00302 {
00303   struct httpd_state *s = (struct httpd_state *)&(uip_conn->appstate);
00304
00305   if(uip_closed() || uip_aborted() || uip_timedout()) {
00306   } else if(uip_connected()) {
00307     PSOCK_INIT(&s->sin, s->inputbuf, sizeof(s->inputbuf) - 1);
00308     PSOCK_INIT(&s->sout, s->inputbuf, sizeof(s->inputbuf) - 1);
00309     PT_INIT(&s->outputpt);
00310     s->state = STATE_WAITING;
00311     /*    timer_set(&s->timer, CLOCK_SECOND * 100);*/
00312     s->timer = 0;
00313     handle_connection(s);
00314   } else if(s != NULL) {
00315     if(uip_poll()) {
00316       ++s->timer;
00317       if(s->timer >= 20) {
00318         uip_abort();
00319       }
00320     } else {
00321       s->timer = 0;
00322     }
00323     handle_connection(s);
00324   } else {
00325     uip_abort();
00326   }
00327 }
00328 /*---------------------------------------------------------------------------*/
00335 void
00336 httpd_init(void)
00337 {
00338   uip_listen(HTONS(80));
00339 }
00340 /*---------------------------------------------------------------------------*/
Generated on Tue Jun 7 14:59:00 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/webserver/httpd.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/webserver/httpd.h

Go to the documentation of this file.
00001 /*
00002  * Copyright (c) 2001-2005, Adam Dunkels.
00003  * All rights reserved.
00004  *
00005  * Redistribution and use in source and binary forms, with or without
00006  * modification, are permitted provided that the following conditions
00007  * are met:
00008  * 1. Redistributions of source code must retain the above copyright
00009  *    notice, this list of conditions and the following disclaimer.
00010  * 2. Redistributions in binary form must reproduce the above copyright
00011  *    notice, this list of conditions and the following disclaimer in the
00012  *    documentation and/or other materials provided with the distribution.
00013  * 3. The name of the author may not be used to endorse or promote
00014  *    products derived from this software without specific prior
00015  *    written permission.
00016  *
00017  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS
00018  * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
00019  * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
00020  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
00021  * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
00022  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
00023  * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
00024  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
00025  * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
00026  * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
00027  * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
00028  *
00029  * This file is part of the uIP TCP/IP stack.
00030  *
00031  * $Id: httpd.h,v 1.2 2006/06/11 21:46:38 adam Exp $
00032  *
00033  */
00034
00035 #ifndef __HTTPD_H__
00036 #define __HTTPD_H__
00037
00038 #include "psock.h"
00039 #include "httpd-fs.h"
00040
00041 struct httpd_state {
00042   unsigned char timer;
00043   struct psock sin, sout;
00044   struct pt outputpt, scriptpt;
00045   char inputbuf[50];
00046   char filename[20];
00047   char state;
00048   struct httpd_fs_file file;
00049   int len;
00050   char *scriptptr;
00051   int scriptlen;
00052
00053   unsigned short count;
00054 };
00055
00056 void httpd_init(void);
00057 void httpd_appcall(void);
00058
00059 void httpd_log(char *msg);
00060 void httpd_log_file(u16_t *requester, char *file);
00061
00062 #endif /* __HTTPD_H__ */
Generated on Tue Jun 7 14:59:00 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/I2C/sc16is750_int/i2c_interrupt_test.c Source File

C:/nxpdrv/LPC1700CMSIS/Examples/I2C/sc16is750_int/i2c_interrupt_test.c

Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          i2c_interrupt_test.c                            2010-05-21
00003 */
00027 #include "lpc17xx_i2c.h"
00028 #include "lpc17xx_libcfg.h"
00029 #include "lpc17xx_pinsel.h"
00030 #include "debug_frmwrk.h"
00031
00032 /* Example group ----------------------------------------------------------- */
00038 /************************** PRIVATE DEFINITIONS *************************/
00040 #define USEDI2CDEV      0
00041
00042 /* Definition of internal register of SC16IS750/760 */
00043 #define IODIR           0x0A
00044 #define IOSTATE         0x0B
00045 #define IOCON           0x0E
00046 #define SLVADDR         (0x90>>1)
00047 #define REGS_ADDR(n) (n<<3)
00048
00049
00050 #if (USEDI2CDEV == 0)
00051 #define I2CDEV LPC_I2C0
00052 #elif (USEDI2CDEV == 2)
00053 #define I2CDEV LPC_I2C2
00054 #else
00055 #error "I2C device not defined!"
00056 #endif
00057
00058 /************************** PRIVATE VARIABLES *************************/
00059 uint8_t menu1[] =
00060 "********************************************************************************\n\r"
00061 "Hello NXP Semiconductors \n\r"
00062 "I2C demo \n\r"
00063 "\t - MCU: LPC17xx \n\r"
00064 "\t - Core: ARM Cortex-M3 \n\r"
00065 "\t - Communicate via: UART0 - 115.2 kbps \n\r"
00066 " Communicate with I2C function on SC16IS750/760 Demo Board\n\r"
00067 " Use IO function on SC16IS740/750/760 chip to turn ON/OFF LEDs\n\r"
00068 "Press '1' to turn ON LEDs, '2' to turn OFF LEDs \n\r"
00069 "********************************************************************************\n\r";
00070 uint8_t menu2[] = "Demo terminated! \n\r";
00071
00072 /* Define array data with match data to set internal register value of SC16IS740/750/760 */
00073 uint8_t iocon_cfg[2] = {REGS_ADDR(IOCON), 0x00};
00074 uint8_t iodir_cfg[2] = {REGS_ADDR(IODIR), 0xFF};
00075 uint8_t iostate_cfg_0[2] = {REGS_ADDR(IOSTATE), 0x00};
00076 uint8_t iostate_cfg_1[2] = {REGS_ADDR(IOSTATE), 0xFF};
00077
00078 __IO FlagStatus complete;
00079
00080 /************************** PRIVATE FUNCTIONS *************************/
00081 #if (USEDI2CDEV == 0)
00082 void I2C0_IRQHandler(void);
00083 #elif (USEDI2CDEV == 2)
00084 void I2C2_IRQHandler(void);
00085 #endif
00086
00087 void print_menu(void);
00088 void Error_Loop(uint8_t ErrorCode);
00089
00090
00091 #if (USEDI2CDEV == 0)
00092 /*----------------- INTERRUPT SERVICE ROUTINES --------------------------*/
00093 /*********************************************************************/
00098 void I2C0_IRQHandler(void){
00099         // just call std int handler
00100         I2C_MasterHandler(I2CDEV);
00101         if (I2C_MasterTransferComplete(I2CDEV)){
00102                 complete = SET;
00103         }
00104 }
00105 #elif (USEDI2CDEV == 2)
00106 /*********************************************************************/
00111 void I2C2_IRQHandler(void){
00112         // just call std int handler
00113         I2C_MasterHandler(I2CDEV);
00114         if (I2C_MasterTransferComplete(I2CDEV)){
00115                 complete = SET;
00116         }
00117 }
00118 #endif
00119
00120 /*-------------------------PRIVATE FUNCTIONS------------------------------*/
00121 /*********************************************************************/
00126 void print_menu(void)
00127 {
00128         _DBG_(menu1);
00129 }
00130
00131
00132 /*********************************************************************/
00138 void Error_Loop(uint8_t ErrorCode)
00139 {
00140         /*
00141          * Insert your code here...
00142          */
00143         while(1);
00144 }
00145
00146
00147 /*-------------------------MAIN FUNCTION------------------------------*/
00148 /*********************************************************************/
00153 int c_entry(void)
00154 {
00155         uint8_t tmpchar[2] = {0, 0};
00156         __IO FlagStatus exitflag;
00157         PINSEL_CFG_Type PinCfg;
00158         I2C_M_SETUP_Type transferCfg;
00159         uint8_t SC16IS_RegStat;
00160
00161 #if (USEDI2CDEV == 0)
00162     /* Disable I2C0 interrupt */
00163     NVIC_DisableIRQ(I2C0_IRQn);
00164     /* preemption = 1, sub-priority = 1 */
00165     NVIC_SetPriority(I2C0_IRQn, ((0x01<<3)|0x01));
00166 #elif (USEDI2CDEV == 2)
00167     /* Disable I2C2 interrupt */
00168     NVIC_DisableIRQ(I2C2_IRQn);
00169     /* preemption = 1, sub-priority = 1 */
00170     NVIC_SetPriority(I2C2_IRQn, ((0x01<<3)|0x01));
00171 #endif
00172
00173         /* Initialize debug via UART0
00174          * – 115200bps
00175          * – 8 data bit
00176          * – No parity
00177          * – 1 stop bit
00178          * – No flow control
00179          */
00180         debug_frmwrk_init();
00181
00182         // print welcome screen
00183         print_menu();
00184
00185         /*
00186          * Init I2C pin connect
00187          */
00188         PinCfg.OpenDrain = 0;
00189         PinCfg.Pinmode = 0;
00190 #if (USEDI2CDEV == 0)
00191         PinCfg.Funcnum = 1;
00192         PinCfg.Pinnum = 27;
00193         PinCfg.Portnum = 0;
00194         PINSEL_ConfigPin(&PinCfg);
00195         PinCfg.Pinnum = 28;
00196         PINSEL_ConfigPin(&PinCfg);
00197 #elif (USEDI2CDEV == 2)
00198         PinCfg.Funcnum = 2;
00199         PinCfg.Pinnum = 10;
00200         PinCfg.Portnum = 0;
00201         PINSEL_ConfigPin(&PinCfg);
00202         PinCfg.Pinnum = 11;
00203         PINSEL_ConfigPin(&PinCfg);
00204 #endif
00205
00206         /* I2C block ------------------------------------------------------------------- */
00207         // Initialize I2C peripheral
00208         I2C_Init(I2CDEV, 100000);
00209
00210         /* Enable I2C1 operation */
00211         I2C_Cmd(I2CDEV, ENABLE);
00212
00213         // test
00214         complete = RESET;
00215         transferCfg.sl_addr7bit = SLVADDR;
00216         transferCfg.tx_data = NULL;
00217         transferCfg.tx_length = 0;
00218         transferCfg.rx_data = &SC16IS_RegStat;
00219         transferCfg.rx_length = 1;
00220         transferCfg.retransmissions_max = 2;
00221         I2C_MasterTransferData(I2CDEV, &transferCfg, I2C_TRANSFER_INTERRUPT);
00222         while (complete == RESET);
00223
00224         /* Configure SC16IS750 ---------------------------------------------------------- */
00225         /* First, send some command to reset SC16IS740 chip via I2C bus interface */
00226         complete = RESET;
00227         transferCfg.sl_addr7bit = SLVADDR;
00228         transferCfg.tx_data = (uint8_t *)iocon_cfg;
00229         transferCfg.tx_length = sizeof(iocon_cfg);
00230         transferCfg.rx_data = NULL;
00231         transferCfg.rx_length = 0;
00232         transferCfg.retransmissions_max = 2;
00233         I2C_MasterTransferData(I2CDEV, &transferCfg, I2C_TRANSFER_INTERRUPT);
00234         while (complete == RESET);
00235
00236         complete = RESET;
00237         transferCfg.sl_addr7bit = SLVADDR;
00238         transferCfg.tx_data = (uint8_t *)iodir_cfg;
00239         transferCfg.tx_length = sizeof(iodir_cfg);
00240         transferCfg.rx_data = NULL;
00241         transferCfg.rx_length = 0;
00242         transferCfg.retransmissions_max = 2;
00243         I2C_MasterTransferData(I2CDEV, &transferCfg, I2C_TRANSFER_INTERRUPT);
00244         while (complete == RESET);
00245
00246         complete = RESET;
00247         transferCfg.sl_addr7bit = SLVADDR;
00248         transferCfg.tx_data = (uint8_t *)iostate_cfg_0;
00249         transferCfg.tx_length = sizeof(iostate_cfg_0);
00250         transferCfg.rx_data = NULL;
00251         transferCfg.rx_length = 0;
00252         transferCfg.retransmissions_max = 2;
00253         I2C_MasterTransferData(I2CDEV, &transferCfg, I2C_TRANSFER_INTERRUPT);
00254         while (complete == RESET);
00255
00256
00257         /* Validate value of SC16IS750 register ------------------------------------------ */
00258         /* This section will dump out value of register that set through I2C bus */
00259         complete = RESET;
00260         transferCfg.sl_addr7bit = SLVADDR;
00261         transferCfg.tx_data = NULL; //(uint8_t *)iocon_cfg;
00262         transferCfg.tx_length = 0;//1;
00263         transferCfg.rx_data = &SC16IS_RegStat;
00264         transferCfg.rx_length = 1;
00265         transferCfg.retransmissions_max = 2;
00266         I2C_MasterTransferData(I2CDEV, &transferCfg, I2C_TRANSFER_INTERRUPT);
00267         while (complete == RESET);
00268
00269         complete = RESET;
00270         transferCfg.sl_addr7bit = SLVADDR;
00271         transferCfg.tx_data = (uint8_t *)iodir_cfg;
00272         transferCfg.tx_length = 1;
00273         transferCfg.rx_data = &SC16IS_RegStat;
00274         transferCfg.rx_length = 1;
00275         transferCfg.retransmissions_max = 2;
00276         I2C_MasterTransferData(I2CDEV, &transferCfg, I2C_TRANSFER_INTERRUPT);
00277         while (complete == RESET);
00278
00279         complete = RESET;
00280         transferCfg.sl_addr7bit = SLVADDR;
00281         transferCfg.tx_data = (uint8_t *)iostate_cfg_0;
00282         transferCfg.tx_length = 1;
00283         transferCfg.rx_data = &SC16IS_RegStat;
00284         transferCfg.rx_length = 1;
00285         transferCfg.retransmissions_max = 2;
00286         I2C_MasterTransferData(I2CDEV, &transferCfg, I2C_TRANSFER_INTERRUPT);
00287         while (complete == RESET);
00288
00289
00290         // Reset exit flag
00291         exitflag = RESET;
00292
00293     /* Read some data from the buffer */
00294     while (exitflag == RESET){
00295
00296         while((tmpchar[0] = _DG) == 0);
00297
00298         if (tmpchar[0] == 27){
00299                         /* ESC key, set exit flag */
00300                         _DBG_(menu2);
00301                         exitflag = SET;
00302                 }
00303                 else if (tmpchar[0] == 'r'){
00304                         print_menu();
00305                 }
00306                 else{
00307                         if (tmpchar[0] == '1'){
00308                                 // LEDs are ON now...
00309                                 transferCfg.sl_addr7bit = SLVADDR;
00310                                 transferCfg.tx_data = (uint8_t *)iostate_cfg_0;
00311                                 transferCfg.tx_length = sizeof(iostate_cfg_0);
00312                                 transferCfg.rx_data = NULL;
00313                                 transferCfg.rx_length = 0;
00314                                 transferCfg.retransmissions_max = 2;
00315                                 if (I2C_MasterTransferData(I2CDEV, &transferCfg, I2C_TRANSFER_POLLING) \
00316                                                 == ERROR){
00317                                         Error_Loop(transferCfg.status);
00318                                 }
00319                         }
00320                         else if (tmpchar[0] == '2')
00321                         {
00322                                 // LEDs are OFF now...
00323                                 transferCfg.sl_addr7bit = SLVADDR;
00324                                 transferCfg.tx_data = (uint8_t *)iostate_cfg_1;
00325                                 transferCfg.tx_length = sizeof(iostate_cfg_1);
00326                                 transferCfg.rx_data = NULL;
00327                                 transferCfg.rx_length = 0;
00328                                 transferCfg.retransmissions_max = 2;
00329                                 if (I2C_MasterTransferData(I2CDEV, &transferCfg, I2C_TRANSFER_POLLING) \
00330                                                 == ERROR){
00331                                         Error_Loop(transferCfg.status);
00332                                 }
00333                         }
00334                         /* Then Echo it back */
00335                         _DBG_(tmpchar);
00336                 }
00337     }
00338
00339     // wait for current transmission complete - THR must be empty
00340     while (UART_CheckBusy(LPC_UART0) == SET);
00341
00342     // DeInitialize UART0 peripheral
00343     UART_DeInit(LPC_UART0);
00344     I2C_DeInit(I2CDEV);
00345
00346     /* Loop forever */
00347     while(1);
00348     return 1;
00349 }
00350
00351 /* With ARM and GHS toolsets, the entry point is main() - this will
00352    allow the linker to generate wrapper code to setup stacks, allocate
00353    heap area, and initialize and copy code and data segments. For GNU
00354    toolsets, the entry point is through __start() in the crt0_gnu.asm
00355    file, and that startup code will setup stacks and data */
00356 int main(void)
00357 {
00358     return c_entry();
00359 }
00360
00361
00362 #ifdef  DEBUG
00363 /*******************************************************************************
00364 * @brief                Reports the name of the source file and the source line number
00365 *                               where the CHECK_PARAM error has occurred.
00366 * @param[in]    file Pointer to the source file name
00367 * @param[in]    line assert_param error line source number
00368 * @return               None
00369 *******************************************************************************/
00370 void check_failed(uint8_t *file, uint32_t line)
00371 {
00372         /* User can add his own implementation to report the file name and line number,
00373          ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
00374
00375         /* Infinite loop */
00376         while(1);
00377 }
00378 #endif
00379
00380 /*
00381  * @}
00382  */
Generated on Tue Jun 7 14:59:01 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/I2C/Master_Slave_Interrupt/i2c_master_slave_int_test.c Source File

C:/nxpdrv/LPC1700CMSIS/Examples/I2C/Master_Slave_Interrupt/i2c_master_slave_int_test.c

Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          i2c_master_slave_int_test.c                             2010-05-21
00003 */
00026 #include "lpc17xx_i2c.h"
00027 #include "lpc17xx_libcfg.h"
00028 #include "lpc17xx_pinsel.h"
00029 #include "debug_frmwrk.h"
00030
00031 /* Example group ----------------------------------------------------------- */
00037 /************************** PRIVATE DEFINITIONS *************************/
00039 #define USEDI2CDEV_M            2
00040
00042 #define USEDI2CDEV_S            0
00043
00044 #define I2CDEV_S_OWN_ADDR       (0x90>>1)
00045
00047 #define BUFFER_SIZE                     0x10
00048
00049
00050 #if (USEDI2CDEV_M == USEDI2CDEV_S)
00051 #error "Master and Slave I2C device are duplicated!"
00052 #endif
00053
00054 #if (USEDI2CDEV_M == 0)
00055 #define I2CDEV_M LPC_I2C0
00056 #elif (USEDI2CDEV_M == 2)
00057 #define I2CDEV_M LPC_I2C2
00058 #else
00059 #error "Master I2C device not defined!"
00060 #endif
00061
00062
00063 #if (USEDI2CDEV_S == 0)
00064 #define I2CDEV_S LPC_I2C0
00065 #elif (USEDI2CDEV_S == 2)
00066 #define I2CDEV_S LPC_I2C2
00067 #else
00068 #error "Slave I2C device not defined!"
00069 #endif
00070
00071 /************************** PRIVATE VARIABLES *************************/
00072 uint8_t menu1[] =
00073 "********************************************************************************\n\r"
00074 "Hello NXP Semiconductors \n\r"
00075 "I2C demo \n\r"
00076 "\t - MCU: LPC17xx \n\r"
00077 "\t - Core: ARM Cortex-M3 \n\r"
00078 "\t - This example uses two I2C peripheral, one set as master and \n\r"
00079 "\t the other set as slave \n\r"
00080 "\t First, the master send 16 bytes of data to slave \n\r"
00081 "\t Then, the master receive 16 bytes of data from slave \n\r"
00082 "\t Both of them used in interrupt mode \n\r"
00083 "********************************************************************************\n\r";
00084
00086 __IO FlagStatus complete_M;
00087 uint8_t Master_Buf[BUFFER_SIZE];
00088
00089
00091 __IO FlagStatus complete_S;
00092 uint8_t Slave_Buf[BUFFER_SIZE];
00093
00094
00095 uint8_t master_test[2];
00096 uint8_t slave_test[2];
00097
00098 /************************** PRIVATE FUNCTIONS *************************/
00099 /* Interrupt service routines */
00100 #if ((USEDI2CDEV_M == 0) || (USEDI2CDEV_S == 0))
00101 void I2C0_IRQHandler(void);
00102 #endif
00103 #if ((USEDI2CDEV_M == 2) || (USEDI2CDEV_S == 2))
00104 void I2C2_IRQHandler(void);
00105 #endif
00106
00107 void print_menu(void);
00108 void Error_Loop_M(uint8_t ErrorCode);
00109 void Error_Loop_S(uint8_t ErrorCode);
00110
00111
00112 #if ((USEDI2CDEV_M == 0) || (USEDI2CDEV_S == 0))
00113 /*----------------- INTERRUPT SERVICE ROUTINES --------------------------*/
00114 /*********************************************************************/
00119 void I2C0_IRQHandler(void)
00120 {
00121 #if (USEDI2CDEV_M == 0)
00122         I2C_MasterHandler(I2CDEV_M);
00123         if (I2C_MasterTransferComplete(I2CDEV_M)){
00124                 complete_M = SET;
00125         }
00126 #endif
00127
00128 #if (USEDI2CDEV_S == 0)
00129         I2C_SlaveHandler(I2CDEV_S);
00130         if (I2C_SlaveTransferComplete(I2CDEV_S)){
00131                 complete_S = SET;
00132         }
00133 #endif
00134 }
00135 #endif /* ((USEDI2CDEV_M == 0) || (USEDI2CDEV_S == 0)) */
00136
00137
00138 #if ((USEDI2CDEV_M == 2) || (USEDI2CDEV_S == 2))
00139
00140 /*********************************************************************/
00145 void I2C2_IRQHandler(void)
00146 {
00147 #if (USEDI2CDEV_M == 2)
00148         I2C_MasterHandler(I2CDEV_M);
00149         if (I2C_MasterTransferComplete(I2CDEV_M)){
00150                 complete_M = SET;
00151         }
00152 #endif
00153 #if (USEDI2CDEV_S == 2)
00154         I2C_SlaveHandler(I2CDEV_S);
00155         if (I2C_SlaveTransferComplete(I2CDEV_S)){
00156                 complete_S = SET;
00157         }
00158 #endif
00159 }
00160 #endif /* ((USEDI2CDEV_M == 2) || (USEDI2CDEV_S == 2)) */
00161
00162 /*-------------------------PRIVATE FUNCTIONS------------------------------*/
00163 /*********************************************************************/
00168 void print_menu(void)
00169 {
00170         _DBG_(menu1);
00171 }
00172
00173 /*********************************************************************/
00183 void Buffer_Init(uint8_t type)
00184 {
00185         uint8_t i;
00186
00187         if (type)
00188         {
00189                 for (i = 0; i < BUFFER_SIZE; i++) {
00190                         Master_Buf[i] = 0;
00191                         Slave_Buf[i] = i;
00192                 }
00193         }
00194         else
00195         {
00196                 for (i = 0; i < BUFFER_SIZE; i++) {
00197                         Master_Buf[i] = i;
00198                         Slave_Buf[i] = 0;
00199                 }
00200         }
00201 }
00202
00203 /*********************************************************************/
00209 void Error_Loop_M(uint8_t ErrorCode)
00210 {
00211         /*
00212          * Insert your code here...
00213          */
00214         while(1);
00215 }
00216
00217 /*********************************************************************/
00223 void Error_Loop_S(uint8_t ErrorCode)
00224 {
00225         /*
00226          * Insert your code here...
00227          */
00228         while(1);
00229 }
00230
00231 /*-------------------------MAIN FUNCTION------------------------------*/
00232 /*********************************************************************/
00237 int c_entry(void)
00238 {
00239         PINSEL_CFG_Type PinCfg;
00240         I2C_OWNSLAVEADDR_CFG_Type OwnSlavAdr;
00241         I2C_M_SETUP_Type transferMCfg;
00242         I2C_S_SETUP_Type transferSCfg;
00243         uint32_t tempp;
00244         uint8_t *sp, *dp;
00245
00246         /* Initialize debug via UART0
00247          * – 115200bps
00248          * – 8 data bit
00249          * – No parity
00250          * – 1 stop bit
00251          * – No flow control
00252          */
00253         debug_frmwrk_init();
00254
00255         //print menu screen
00256         print_menu();
00257
00258
00259         /* I2C block ------------------------------------------------------------------- */
00260
00261         /*
00262          * Init I2C pin connect
00263          */
00264         PinCfg.OpenDrain = 0;
00265         PinCfg.Pinmode = 0;
00266 #if ((USEDI2CDEV_M == 0) || (USEDI2CDEV_S == 0))
00267         PinCfg.Funcnum = 1;
00268         PinCfg.Pinnum = 27;
00269         PinCfg.Portnum = 0;
00270         PINSEL_ConfigPin(&PinCfg);
00271         PinCfg.Pinnum = 28;
00272         PINSEL_ConfigPin(&PinCfg);
00273 #endif
00274 #if ((USEDI2CDEV_M == 2) || (USEDI2CDEV_S == 2))
00275         PinCfg.Funcnum = 2;
00276         PinCfg.Pinnum = 10;
00277         PinCfg.Portnum = 0;
00278         PINSEL_ConfigPin(&PinCfg);
00279         PinCfg.Pinnum = 11;
00280         PINSEL_ConfigPin(&PinCfg);
00281 #endif
00282
00283         // Initialize Master I2C peripheral
00284         I2C_Init(I2CDEV_M, 100000);
00285         // Initialize Slave I2C peripheral
00286         I2C_Init(I2CDEV_S, 100000);
00287
00288         /* Set  Own slave address for I2C device */
00289         OwnSlavAdr.GeneralCallState = ENABLE;
00290         OwnSlavAdr.SlaveAddrChannel= 0;
00291         OwnSlavAdr.SlaveAddrMaskValue = 0xFF;
00292         OwnSlavAdr.SlaveAddr_7bit = I2CDEV_S_OWN_ADDR;
00293         I2C_SetOwnSlaveAddr(I2CDEV_S, &OwnSlavAdr);
00294
00295         /*
00296          * Note: The master should be set higher priority than
00297          * the slave that let interrupt in master can appear
00298          * in slave's timeout condition.
00299          * A higher interrupt priority has lower number level!!!
00300          */
00301
00302         /* Configure interrupt for I2C in NVIC of ARM core */
00303 #if ((USEDI2CDEV_M == 0) || (USEDI2CDEV_S == 0))
00304     /* Disable I2C0 interrupt */
00305     NVIC_DisableIRQ(I2C0_IRQn);
00306 #if (USEDI2CDEV_M == 0)
00307     /* preemption = 1, sub-priority = 0 */
00308     NVIC_SetPriority(I2C0_IRQn, ((0x00<<3)|0x01));
00309 #else
00310     /* preemption = 1, sub-priority = 2 */
00311     NVIC_SetPriority(I2C0_IRQn, ((0x02<<3)|0x01));
00312 #endif
00313 #endif /* ((USEDI2CDEV_M == 0) || (USEDI2CDEV_S == 0)) */
00314
00315 #if ((USEDI2CDEV_M == 2) || (USEDI2CDEV_S == 2))
00316     /* Disable I2C2 interrupt */
00317     NVIC_DisableIRQ(I2C2_IRQn);
00318 #if (USEDI2CDEV_M == 2)
00319     /* preemption = 1, sub-priority = 0 */
00320     NVIC_SetPriority(I2C2_IRQn, ((0x00<<3)|0x01));
00321 #else
00322     /* preemption = 1, sub-priority = 2 */
00323     NVIC_SetPriority(I2C2_IRQn, ((0x02<<3)|0x01));
00324 #endif
00325 #endif
00326
00327
00328         /* Enable Master I2C operation */
00329         I2C_Cmd(I2CDEV_M, ENABLE);
00330         /* Enable Slave I2C operation */
00331         I2C_Cmd(I2CDEV_S, ENABLE);
00332
00333
00334 #if 1
00335         /* MASTER SEND DATA TO SLAVE -------------------------------------------------------- */
00336         /* Force complete flag for the first time of running */
00337         complete_S =  RESET;
00338         complete_M =  RESET;
00339
00340         _DBG_("Master transmit data to slave...");
00341
00342         /* Initialize buffer */
00343         Buffer_Init(0);
00344
00345         /* Start I2C slave device first */
00346         transferSCfg.tx_data = NULL;
00347         transferSCfg.tx_length = 0;
00348         transferSCfg.rx_data = Slave_Buf;
00349         transferSCfg.rx_length = sizeof(Slave_Buf);
00350         I2C_SlaveTransferData(I2CDEV_S, &transferSCfg, I2C_TRANSFER_INTERRUPT);
00351
00352         /* Then start I2C master device */
00353         transferMCfg.sl_addr7bit = I2CDEV_S_OWN_ADDR;
00354         transferMCfg.tx_data = Master_Buf;
00355         transferMCfg.tx_length = sizeof(Master_Buf);
00356         transferMCfg.rx_data = NULL;
00357         transferMCfg.rx_length = 0;
00358         transferMCfg.retransmissions_max = 3;
00359         I2C_MasterTransferData(I2CDEV_M, &transferMCfg, I2C_TRANSFER_INTERRUPT);
00360
00361         /* Wait until both of them complete */
00362         while ((complete_M == RESET) || (complete_S == RESET));
00363         // verify data
00364         sp = Master_Buf;
00365         dp = Slave_Buf;
00366         for (tempp = sizeof(Master_Buf); tempp; tempp--){
00367                 if(*sp++ != *dp++){
00368                         _DBG_("Verify data error!");
00369                 }
00370         }
00371         // Success!
00372         if (tempp == 0){
00373                 _DBG_("Verify data successfully!");
00374         }
00375
00376
00377         /* MASTER RECEIVE DATA FROM SLAVE -------------------------------------------------------- */
00378         /* Force complete flag for the first time of running */
00379         complete_S =  RESET;
00380         complete_M =  RESET;
00381
00382         _DBG_("Master read data from slave...");
00383
00384         /* Initialize buffer */
00385         Buffer_Init(1);
00386
00387         /* Start I2C slave device first */
00388         transferSCfg.tx_data = Slave_Buf;
00389         transferSCfg.tx_length = sizeof(Slave_Buf);
00390         transferSCfg.rx_data = NULL;
00391         transferSCfg.rx_length = 0;
00392         I2C_SlaveTransferData(I2CDEV_S, &transferSCfg, I2C_TRANSFER_INTERRUPT);
00393
00394         /* Then start I2C master device */
00395         transferMCfg.sl_addr7bit = I2CDEV_S_OWN_ADDR;
00396         transferMCfg.tx_data = NULL;
00397         transferMCfg.tx_length = 0;
00398         transferMCfg.rx_data = Master_Buf;
00399         transferMCfg.rx_length = sizeof(Master_Buf);
00400         transferMCfg.retransmissions_max = 3;
00401         I2C_MasterTransferData(I2CDEV_M, &transferMCfg, I2C_TRANSFER_INTERRUPT);
00402
00403         /* Wait until both of them complete */
00404         while ((complete_M == RESET) || (complete_S == RESET));
00405         // verify data
00406         sp = Master_Buf;
00407         dp = Slave_Buf;
00408         for (tempp = sizeof(Master_Buf); tempp; tempp--){
00409                 if(*sp++ != *dp++){
00410                         _DBG_("Verify data error!");
00411                 }
00412         }
00413         // Success!
00414         if (tempp == 0){
00415                 _DBG_("Verify data successfully!");
00416         }
00417 #endif
00418
00419
00420 #if 1
00421         // TEST-----------------------------------------------------------
00422         // Master transmit two bytes, then repeat start and reading from slave
00423         // a number of byte
00424         /* Force complete flag for the first time of running */
00425         complete_S =  RESET;
00426         complete_M =  RESET;
00427
00428         _DBG_("Master transmit data to slave first, then repeat start and read data from slave...");
00429         /* Initialize buffer */
00430         Buffer_Init(1);
00431         master_test[0] = 0xAA;
00432         master_test[1] = 0x55;
00433         slave_test[0] = 0x00;
00434         slave_test[1] = 0x00;
00435
00436         /* Start I2C slave device first */
00437         transferSCfg.tx_data = Slave_Buf;
00438         transferSCfg.tx_length = sizeof(Slave_Buf);
00439         transferSCfg.rx_data = slave_test;
00440         transferSCfg.rx_length = sizeof(slave_test);
00441         I2C_SlaveTransferData(I2CDEV_S, &transferSCfg, I2C_TRANSFER_INTERRUPT);
00442
00443         /* Then start I2C master device */
00444         transferMCfg.sl_addr7bit = I2CDEV_S_OWN_ADDR;
00445         transferMCfg.tx_data = master_test;
00446         transferMCfg.tx_length = sizeof(master_test);
00447         transferMCfg.rx_data = Master_Buf;
00448         transferMCfg.rx_length = sizeof(Master_Buf);
00449         transferMCfg.retransmissions_max = 3;
00450         I2C_MasterTransferData(I2CDEV_M, &transferMCfg, I2C_TRANSFER_INTERRUPT);
00451
00452         /* Wait until both of them complete */
00453         while ((complete_M == RESET) || (complete_S == RESET));
00454         // verify data
00455         sp = Master_Buf;
00456         dp = Slave_Buf;
00457         for (tempp = sizeof(Master_Buf); tempp; tempp--){
00458                 if(*sp++ != *dp++){
00459                         _DBG_("Verify data error!");
00460                 }
00461         }
00462         // Success!
00463         if (tempp == 0){
00464                 _DBG_("Verify data successfully!");
00465         }
00466         sp = master_test;
00467         dp = slave_test;
00468         for (tempp = sizeof(master_test); tempp; tempp--){
00469                 if(*sp++ != *dp++){
00470                         _DBG_("Verify data error!");
00471                 }
00472         }
00473         // Success!
00474         if (tempp == 0){
00475                 _DBG_("Verify data successfully!");
00476         }
00477 #endif
00478
00479         while (1){
00480                 tempp++;
00481         }
00482
00483     /* Loop forever */
00484     while(1);
00485     return 1;
00486 }
00487
00488 /* With ARM and GHS toolsets, the entry point is main() - this will
00489    allow the linker to generate wrapper code to setup stacks, allocate
00490    heap area, and initialize and copy code and data segments. For GNU
00491    toolsets, the entry point is through __start() in the crt0_gnu.asm
00492    file, and that startup code will setup stacks and data */
00493 int main(void)
00494 {
00495     return c_entry();
00496 }
00497
00498
00499 #ifdef  DEBUG
00500 /*******************************************************************************
00501 * @brief                Reports the name of the source file and the source line number
00502 *                               where the CHECK_PARAM error has occurred.
00503 * @param[in]    file Pointer to the source file name
00504 * @param[in]    line assert_param error line source number
00505 * @return               None
00506 *******************************************************************************/
00507 void check_failed(uint8_t *file, uint32_t line)
00508 {
00509         /* User can add his own implementation to report the file name and line number,
00510          ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
00511
00512         /* Infinite loop */
00513         while(1);
00514 }
00515 #endif
00516
00517 /*
00518  * @}
00519  */
Generated on Tue Jun 7 14:59:01 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/I2C/Monitor/i2c_monitor.c Source File

C:/nxpdrv/LPC1700CMSIS/Examples/I2C/Monitor/i2c_monitor.c

Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          i2c_monitor.c                           2010-07-16
00003 */
00026 #include "lpc17xx_i2c.h"
00027 #include "lpc17xx_libcfg.h"
00028 #include "lpc17xx_pinsel.h"
00029 #include "debug_frmwrk.h"
00030
00031 /* Example group ----------------------------------------------------------- */
00037 /************************** PRIVATE DEFINITIONS *************************/
00038 #define I2CDEV LPC_I2C0
00039
00041 #define BUFFER_SIZE                     0x80
00042 /************************** PRIVATE VARIABLES *************************/
00043 uint8_t menu1[] =
00044 "********************************************************************************\n\r"
00045 "Hello NXP Semiconductors \n\r"
00046 "I2C monitor I2C bus demo \n\r"
00047 "\t - MCU: LPC17xx \n\r"
00048 "\t - Core: ARM Cortex-M3 \n\r"
00049 "\t - This example describes how to uses I2C peripheral on LPC1768 \n\r"
00050 "\t in monitor mode. \n\r"
00051 "\t I2C0 monitors I2C data transfered on I2C bus. \n\r"
00052 "\t UART0 (115200bps, 8 data bit, no parity, 1 stop bit, no flow control) \n\r"
00053 "\t is used to display captured data. \n\r"
00054 "********************************************************************************\n\r";
00055 uint8_t buffer[BUFFER_SIZE];
00056 BOOL_8 done=FALSE;
00057 uint32_t count=0;
00058
00059 /************************** PRIVATE FUNCTIONS *************************/
00060 void I2C0_IRQHandler(void);
00061 void print_menu(void);
00062 /*----------------- INTERRUPT SERVICE ROUTINES --------------------------*/
00063 /*********************************************************************/
00068 void I2C0_IRQHandler(void)
00069 {
00070         done = I2C_MonitorHandler(LPC_I2C0,buffer,count);
00071         if(done)
00072         {
00073                 I2C_MonitorModeConfig(I2CDEV,(uint32_t)I2C_MONITOR_CFG_MATCHALL, DISABLE);
00074                 I2C_MonitorModeCmd(I2CDEV, DISABLE);
00075         }
00076 }
00077
00078 /*-------------------------PRIVATE FUNCTIONS------------------------------*/
00079 /*********************************************************************/
00084 void print_menu(void)
00085 {
00086         _DBG(menu1);
00087 }
00088
00089 /*-------------------------MAIN FUNCTION------------------------------*/
00090 /*********************************************************************/
00095 int c_entry(void)
00096 {
00097         PINSEL_CFG_Type PinCfg;
00098         uint8_t idx,i;
00099         /* Initialize debug via UART0
00100          * – 115200bps
00101          * – 8 data bit
00102          * – No parity
00103          * – 1 stop bit
00104          * – No flow control
00105          */
00106         debug_frmwrk_init();
00107
00108         //print menu screen
00109         print_menu();
00110
00111         /* I2C block ------------------------------------------------------------------- */
00112
00113         /*
00114          * Init I2C pin connect
00115          */
00116         PinCfg.OpenDrain = 0;
00117         PinCfg.Pinmode = 0;
00118         PinCfg.Funcnum = 1;
00119         PinCfg.Pinnum = 27;
00120         PinCfg.Portnum = 0;
00121         PINSEL_ConfigPin(&PinCfg);//SDA0
00122         PinCfg.Pinnum = 28;
00123         PINSEL_ConfigPin(&PinCfg);//SCL0
00124
00125         // Initialize I2C peripheral
00126         I2C_Init(I2CDEV, 100000);
00127
00128         /* Configure interrupt for I2C in NVIC of ARM core */
00129     /* Disable I2C0 interrupt */
00130     NVIC_DisableIRQ(I2C0_IRQn);
00131     /* preemption = 1, sub-priority = 0 */
00132     NVIC_SetPriority(I2C0_IRQn, ((0x01<<3)|0x01));
00133     //enable I2C interrupt
00134     I2C_IntCmd(LPC_I2C0, ENABLE);
00135
00136         /* Enable I2C operation */
00137         I2C_Cmd(I2CDEV, ENABLE);
00138
00139         while(1)
00140         {
00141                 idx=0;count=0;
00142                 while(idx<2)
00143                 {
00144                         if(idx==0)
00145                         {
00146                                 _DBG_("\n\rEnter monitor buffer size: ");
00147                         }
00148                         idx++;
00149                         switch(_DG)
00150                         {
00151                                 case '0': count=(count<<4)|0x00;break;
00152                                 case '1': count=(count<<4)|0x01;break;
00153                                 case '2': count=(count<<4)|0x02;break;
00154                                 case '3': count=(count<<4)|0x03;break;
00155                                 case '4': count=(count<<4)|0x04;break;
00156                                 case '5': count=(count<<4)|0x05;break;
00157                                 case '6': count=(count<<4)|0x06;break;
00158                                 case '7': count=(count<<4)|0x07;break;
00159                                 case '8': count=(count<<4)|0x08;break;
00160                                 case '9': count=(count<<4)|0x09;break;
00161                                 case 'a': count=(count<<4)|0x0A;break;
00162                                 case 'A': count=(count<<4)|0x0A;break;
00163                                 case 'b': count=(count<<4)|0x0B;break;
00164                                 case 'B': count=(count<<4)|0x0B;break;
00165                                 case 'c': count=(count<<4)|0x0C;break;
00166                                 case 'C': count=(count<<4)|0x0C;break;
00167                                 case 'd': count=(count<<4)|0x0D;break;
00168                                 case 'D': count=(count<<4)|0x0D;break;
00169                                 case 'e': count=(count<<4)|0x0E;break;
00170                                 case 'E': count=(count<<4)|0x0E;break;
00171                                 case 'f': count=(count<<4)|0x0F;break;
00172                                 case 'F': count=(count<<4)|0x0F;break;
00173                                 default: idx=0;count=0;break;
00174                         }
00175                         if(idx==2)
00176                         {
00177                                 if(count>BUFFER_SIZE)
00178                                 {
00179                                         _DBG_("invalid! The size is bigger than ");_DBH(BUFFER_SIZE);
00180                                         idx=0;count=0;
00181                                 }
00182                                 else
00183                                         _DBH(count);
00184                         }
00185                 }
00186                 //Configure I2C in monitor mode
00187                 I2C_MonitorModeConfig(I2CDEV,(uint32_t)I2C_MONITOR_CFG_MATCHALL, ENABLE);
00188                 I2C_MonitorModeCmd(I2CDEV, ENABLE);
00189
00190                 _DBG_("\n\rStart monitoring I2C bus...");
00191
00192                 while(done==FALSE); done=FALSE;
00193                 _DBG_("done!");
00194                 for(i=0;i<count;i++)
00195                 {
00196                         if((i%16)==0) _DBG_("");
00197                         _DBH(buffer[i]);_DBC(0x20);
00198                         buffer[i]=0;
00199                 }
00200
00201         }
00202         return 1;
00203 }
00204
00205 /* With ARM and GHS toolsets, the entry point is main() - this will
00206    allow the linker to generate wrapper code to setup stacks, allocate
00207    heap area, and initialize and copy code and data segments. For GNU
00208    toolsets, the entry point is through __start() in the crt0_gnu.asm
00209    file, and that startup code will setup stacks and data */
00210 int main(void)
00211 {
00212     return c_entry();
00213 }
00214
00215
00216 #ifdef  DEBUG
00217 /*******************************************************************************
00218 * @brief                Reports the name of the source file and the source line number
00219 *                               where the CHECK_PARAM error has occurred.
00220 * @param[in]    file Pointer to the source file name
00221 * @param[in]    line assert_param error line source number
00222 * @return               None
00223 *******************************************************************************/
00224 void check_failed(uint8_t *file, uint32_t line)
00225 {
00226         /* User can add his own implementation to report the file name and line number,
00227          ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
00228
00229         /* Infinite loop */
00230         while(1);
00231 }
00232 #endif
00233
00234 /*
00235  * @}
00236  */
Generated on Tue Jun 7 14:59:01 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/I2C/sc16is750_polling/i2c_polling_test.c Source File

C:/nxpdrv/LPC1700CMSIS/Examples/I2C/sc16is750_polling/i2c_polling_test.c

Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          i2c_polling_test.c                              2010-05-21
00003 */
00027 #include "lpc17xx_i2c.h"
00028 #include "lpc17xx_libcfg.h"
00029 #include "lpc17xx_pinsel.h"
00030 #include "debug_frmwrk.h"
00031
00032 /* Example group ----------------------------------------------------------- */
00038 /************************** PRIVATE DEFINITIONS *************************/
00040 #define USEDI2CDEV      0
00041
00042 /* Definition of internal register of SC16IS750/760 */
00043 #define IODIR           0x0A
00044 #define IOSTATE         0x0B
00045 #define IOCON           0x0E
00046 #define SLVADDR         (0x90>>1)
00047 #define REGS_ADDR(n) (n<<3)
00048
00049 #if (USEDI2CDEV == 0)
00050 #define I2CDEV LPC_I2C0
00051 #elif (USEDI2CDEV == 2)
00052 #define I2CDEV LPC_I2C2
00053 #else
00054 #error "I2C device not defined!"
00055 #endif
00056
00057 /************************** PRIVATE VARIABLES *************************/
00058 uint8_t menu1[] =
00059 "********************************************************************************\n\r"
00060 "Hello NXP Semiconductors \n\r"
00061 "I2C demo \n\r"
00062 "\t - MCU: LPC17xx \n\r"
00063 "\t - Core: ARM Cortex-M3 \n\r"
00064 "\t - Communicate via: UART0 - 115.2 kbps \n\r"
00065 " An example of I2C using polling mode to test the I2C driver \n\r"
00066 " Using I2C at mode I2C master/8bit on LPC1766 to communicate with \n\r"
00067 " SC16IS750/760 Demo Board \n\r"
00068 " Press '1' to turn ON, '2' to turn OFF LEDs \n\r"
00069 "********************************************************************************\n\r";
00070 uint8_t menu2[] = "Demo terminated! \n\r";
00071
00072 /* Define array data with match data to set internal register value of SC16IS740/750/760 */
00073 uint8_t iocon_cfg[2] = {REGS_ADDR(IOCON), 0x00};
00074 uint8_t iodir_cfg[2] = {REGS_ADDR(IODIR), 0xFF};
00075 uint8_t iostate_cfg_0[2] = {REGS_ADDR(IOSTATE), 0x00};
00076 uint8_t iostate_cfg_1[2] = {REGS_ADDR(IOSTATE), 0xFF};
00077
00078
00079 /************************** PRIVATE FUNCTIONS *************************/
00080 void print_menu(void);
00081 void Error_Loop(uint32_t ErrorCode);
00082
00083 /*-------------------------PRIVATE FUNCTIONS------------------------------*/
00084 /*********************************************************************/
00089 void print_menu(void)
00090 {
00091         _DBG_(menu1);
00092 }
00093
00094
00095 /*********************************************************************/
00101 void Error_Loop(uint32_t ErrorCode)
00102 {
00103         uint32_t test;
00104
00105         // for testing purpose
00106         test = ErrorCode;
00107         /*
00108          * Insert your code here...
00109          */
00110         while(1);
00111 }
00112
00113
00114 /*-------------------------MAIN FUNCTION------------------------------*/
00115 /*********************************************************************/
00120 int c_entry(void)
00121 {
00122         uint8_t tmpchar[2] = {0, 0};
00123         __IO FlagStatus exitflag;
00124         PINSEL_CFG_Type PinCfg;
00125         I2C_M_SETUP_Type transferCfg;
00126         uint8_t SC16IS_RegStat;
00127
00128         /* Initialize debug via UART0
00129          * – 115200bps
00130          * – 8 data bit
00131          * – No parity
00132          * – 1 stop bit
00133          * – No flow control
00134          */
00135         debug_frmwrk_init();
00136
00137         // print welcome screen
00138         print_menu();
00139
00140         /*
00141          * Init I2C pin connect
00142          */
00143         PinCfg.OpenDrain = 0;
00144         PinCfg.Pinmode = 0;
00145 #if (USEDI2CDEV == 0)
00146         PinCfg.Funcnum = 1;
00147         PinCfg.Pinnum = 27;
00148         PinCfg.Portnum = 0;
00149         PINSEL_ConfigPin(&PinCfg);
00150         PinCfg.Pinnum = 28;
00151         PINSEL_ConfigPin(&PinCfg);
00152 #elif (USEDI2CDEV == 2)
00153         PinCfg.Funcnum = 2;
00154         PinCfg.Pinnum = 10;
00155         PinCfg.Portnum = 0;
00156         PINSEL_ConfigPin(&PinCfg);
00157         PinCfg.Pinnum = 11;
00158         PINSEL_ConfigPin(&PinCfg);
00159 #endif
00160
00161         /* I2C block ------------------------------------------------------------------- */
00162         // Initialize I2C peripheral
00163         I2C_Init(I2CDEV, 100000);
00164
00165         /* Enable I2C1 operation */
00166         I2C_Cmd(I2CDEV, ENABLE);
00167
00168         /* Configure SC16IS750 ---------------------------------------------------------- */
00169         /* First, send some command to reset SC16IS740 chip via I2C bus interface */
00170         transferCfg.sl_addr7bit = SLVADDR;
00171         transferCfg.tx_data = (uint8_t *)iocon_cfg;
00172         transferCfg.tx_length = sizeof(iocon_cfg);
00173         transferCfg.rx_data = NULL;
00174         transferCfg.rx_length = 0;
00175         transferCfg.retransmissions_max = 2;
00176         if (I2C_MasterTransferData(I2CDEV, &transferCfg, I2C_TRANSFER_POLLING) \
00177                         == ERROR){
00178                 Error_Loop(transferCfg.status);
00179         }
00180
00181         transferCfg.sl_addr7bit = SLVADDR;
00182         transferCfg.tx_data = (uint8_t *)iodir_cfg;
00183         transferCfg.tx_length = sizeof(iodir_cfg);
00184         transferCfg.rx_data = NULL;
00185         transferCfg.rx_length = 0;
00186         transferCfg.retransmissions_max = 2;
00187         if (I2C_MasterTransferData(I2CDEV, &transferCfg, I2C_TRANSFER_POLLING) \
00188                         == ERROR){
00189                 Error_Loop(transferCfg.status);
00190         }
00191
00192         transferCfg.sl_addr7bit = SLVADDR;
00193         transferCfg.tx_data = (uint8_t *)iostate_cfg_0;
00194         transferCfg.tx_length = sizeof(iostate_cfg_0);
00195         transferCfg.rx_data = NULL;
00196         transferCfg.rx_length = 0;
00197         transferCfg.retransmissions_max = 2;
00198         if (I2C_MasterTransferData(I2CDEV, &transferCfg, I2C_TRANSFER_POLLING) \
00199                         == ERROR){
00200                 Error_Loop(transferCfg.status);
00201         }
00202
00203
00204         /* Validate value of SC16IS750 register ------------------------------------------ */
00205         /* This section will dump out value of register that set through I2C bus */
00206
00207         transferCfg.sl_addr7bit = SLVADDR;
00208         transferCfg.tx_data = (uint8_t *)iocon_cfg;
00209         transferCfg.tx_length = 1;
00210         transferCfg.rx_data = (uint8_t *)&SC16IS_RegStat;
00211         transferCfg.rx_length = 1;
00212         transferCfg.retransmissions_max = 2;
00213         if (I2C_MasterTransferData(I2CDEV, &transferCfg, I2C_TRANSFER_POLLING) \
00214                         == ERROR){
00215                 Error_Loop(transferCfg.status);
00216         }
00217
00218         transferCfg.sl_addr7bit = SLVADDR;
00219         transferCfg.tx_data = (uint8_t *)iodir_cfg;
00220         transferCfg.tx_length = 1;
00221         transferCfg.rx_data = (uint8_t *)&SC16IS_RegStat;
00222         transferCfg.rx_length = 1;
00223         transferCfg.retransmissions_max = 2;
00224         if (I2C_MasterTransferData(I2CDEV, &transferCfg, I2C_TRANSFER_POLLING) \
00225                         == ERROR){
00226                 Error_Loop(transferCfg.status);
00227         }
00228
00229         transferCfg.sl_addr7bit = SLVADDR;
00230         transferCfg.tx_data = (uint8_t *)iostate_cfg_0;
00231         transferCfg.tx_length = 1;
00232         transferCfg.rx_data = (uint8_t *)&SC16IS_RegStat;
00233         transferCfg.rx_length = 1;
00234         transferCfg.retransmissions_max = 2;
00235         if (I2C_MasterTransferData(I2CDEV, &transferCfg, I2C_TRANSFER_POLLING) \
00236                         == ERROR){
00237                 Error_Loop(transferCfg.status);
00238         }
00239
00240         // Reset exit flag
00241         exitflag = RESET;
00242
00243     /* Read some data from the buffer */
00244     while (exitflag == RESET){
00245
00246         while((tmpchar[0] = _DG) == 0);
00247
00248         if (tmpchar[0] == 27){
00249                         /* ESC key, set exit flag */
00250                         _DBG_(menu2);
00251                         exitflag = SET;
00252                 }
00253                 else if (tmpchar[0] == 'r'){
00254                         print_menu();
00255                 }
00256                 else{
00257                         if (tmpchar[0] == '1'){
00258                                 // LEDs are ON now...
00259                                 transferCfg.sl_addr7bit = SLVADDR;
00260                                 transferCfg.tx_data = (uint8_t *)iostate_cfg_0;
00261                                 transferCfg.tx_length = sizeof(iostate_cfg_0);
00262                                 transferCfg.rx_data = NULL;
00263                                 transferCfg.rx_length = 0;
00264                                 transferCfg.retransmissions_max = 2;
00265                                 if (I2C_MasterTransferData(I2CDEV, &transferCfg, I2C_TRANSFER_POLLING) \
00266                                                 == ERROR){
00267                                         Error_Loop(transferCfg.status);
00268                                 }
00269                         }
00270                         else if (tmpchar[0] == '2')
00271                         {
00272                                 // LEDs are OFF now...
00273                                 transferCfg.sl_addr7bit = SLVADDR;
00274                                 transferCfg.tx_data = (uint8_t *)iostate_cfg_1;
00275                                 transferCfg.tx_length = sizeof(iostate_cfg_1);
00276                                 transferCfg.rx_data = NULL;
00277                                 transferCfg.rx_length = 0;
00278                                 transferCfg.retransmissions_max = 2;
00279                                 if (I2C_MasterTransferData(I2CDEV, &transferCfg, I2C_TRANSFER_POLLING) \
00280                                                 == ERROR){
00281                                         Error_Loop(transferCfg.status);
00282                                 }
00283                         }
00284                         /* Then Echo it back */
00285                         _DBG_(tmpchar);
00286                 }
00287     }
00288
00289     // wait for current transmission complete - THR must be empty
00290     while (UART_CheckBusy(LPC_UART0)==SET);
00291
00292     // DeInitialize UART0 peripheral
00293     UART_DeInit(LPC_UART0);
00294     I2C_DeInit(I2CDEV);
00295     /* Loop forever */
00296     while(1);
00297     return 1;
00298 }
00299
00300 /* With ARM and GHS toolsets, the entry point is main() - this will
00301    allow the linker to generate wrapper code to setup stacks, allocate
00302    heap area, and initialize and copy code and data segments. For GNU
00303    toolsets, the entry point is through __start() in the crt0_gnu.asm
00304    file, and that startup code will setup stacks and data */
00305 int main(void)
00306 {
00307     return c_entry();
00308 }
00309
00310
00311 #ifdef  DEBUG
00312 /*******************************************************************************
00313 * @brief                Reports the name of the source file and the source line number
00314 *                               where the CHECK_PARAM error has occurred.
00315 * @param[in]    file Pointer to the source file name
00316 * @param[in]    line assert_param error line source number
00317 * @return               None
00318 *******************************************************************************/
00319 void check_failed(uint8_t *file, uint32_t line)
00320 {
00321         /* User can add his own implementation to report the file name and line number,
00322          ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
00323
00324         /* Infinite loop */
00325         while(1);
00326 }
00327 #endif
00328
00329 /*
00330  * @}
00331  */
Generated on Tue Jun 7 14:59:01 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/I2S/I2S_DMA/i2s_dma_test.c Source File

C:/nxpdrv/LPC1700CMSIS/Examples/I2S/I2S_DMA/i2s_dma_test.c

Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          i2s_dma_test.c                          2010-05-21
00003 */
00026 #include "lpc17xx_i2s.h"
00027 #include "lpc17xx_libcfg.h"
00028 #include "lpc17xx_gpdma.h"
00029 #include "debug_frmwrk.h"
00030 #include "lpc17xx_pinsel.h"
00031
00032 /* Example group ----------------------------------------------------------- */
00038 /************************** PRIVATE DEFINITIONS *************************/
00040 #define BUFFER_SIZE                     0x0A
00041
00042 #define DMA_SIZE                0x100UL
00043
00047 #define DMA_SRC                 LPC_AHBRAM1_BASE
00048
00052 #define DMA_DST                 (DMA_SRC+DMA_SIZE)
00053
00054 /************************** PRIVATE VARIABLES ***********************/
00055 uint8_t menu[]=
00056         "********************************************************************************\n\r"
00057         "Hello NXP Semiconductors \n\r"
00058         " I2S test DMA mode demo \n\r"
00059         "\t - MCU: LPC17xx \n\r"
00060         "\t - Core: ARM CORTEX-M3 \n\r"
00061         "\t - Communicate via: UART0 - 115200 bps \n\r"
00062         " Use two I2S channels in the same board to transfer data use DMA mode\n\r"
00063         "********************************************************************************\n\r";
00064
00065 // Terminal Counter flag for Channel 0
00066 __IO uint32_t Channel0_TC;
00067
00068 // Error Counter flag for Channel 0
00069 __IO uint32_t Channel0_Err;
00070
00071 // Terminal Counter flag for Channel 1
00072 __IO uint32_t Channel1_TC;
00073
00074 // Error Counter flag for Channel 1
00075 __IO uint32_t Channel1_Err;
00076
00077 volatile uint32_t *I2STXBuffer = (uint32_t*)(DMA_SRC);
00078 volatile uint32_t *I2SRXBuffer = (uint32_t*)(DMA_DST);
00079
00080 /************************** PRIVATE FUNCTIONS *************************/
00081 void DMA_IRQHandler (void);
00082
00083 void Buffer_Init(void);
00084 Bool Buffer_Verify(void);
00085 void print_menu(void);
00086
00087 /*----------------- INTERRUPT SERVICE ROUTINES --------------------------*/
00088 /*********************************************************************/
00093 void DMA_IRQHandler (void)
00094 {
00095         // check GPDMA interrupt on channel 0
00096         if (GPDMA_IntGetStatus(GPDMA_STAT_INT, 0)){ //check interrupt status on channel 0
00097                 // Check counter terminal status
00098                 if(GPDMA_IntGetStatus(GPDMA_STAT_INTTC, 0)){
00099                         // Clear terminate counter Interrupt pending
00100                         GPDMA_ClearIntPending (GPDMA_STATCLR_INTTC, 0);
00101                                 Channel0_TC++;
00102                 }
00103                 // Check error terminal status
00104                 if (GPDMA_IntGetStatus(GPDMA_STAT_INTERR, 0)){
00105                         // Clear error counter Interrupt pending
00106                         GPDMA_ClearIntPending (GPDMA_STATCLR_INTERR, 0);
00107                         Channel0_Err++;
00108                 }
00109         }
00110         if (GPDMA_IntGetStatus(GPDMA_STAT_INT, 1)){ //check interrupt status on channel 0
00111                 // Check counter terminal status
00112                 if(GPDMA_IntGetStatus(GPDMA_STAT_INTTC, 1)){
00113                         // Clear terminate counter Interrupt pending
00114                         GPDMA_ClearIntPending (GPDMA_STATCLR_INTTC, 1);
00115                                 Channel1_TC++;
00116                 }
00117                 // Check error terminal status
00118                 if (GPDMA_IntGetStatus(GPDMA_STAT_INTERR,1)){
00119                         // Clear error counter Interrupt pending
00120                         GPDMA_ClearIntPending (GPDMA_STATCLR_INTERR, 1);
00121                         Channel1_Err++;
00122                 }
00123         }
00124 }
00125
00126 /*-------------------------PRIVATE FUNCTIONS------------------------------*/
00127 /*********************************************************************/
00132 void Buffer_Init(void) {
00133         uint8_t i;
00134
00135         for (i = 0; i < BUFFER_SIZE; i++) {
00136                 I2STXBuffer[i] = ((i+1)<<16) + i + 1;
00137                 I2SRXBuffer[i] = 0;
00138         }
00139 }
00140
00141 /*********************************************************************/
00146 Bool Buffer_Verify(void) {
00147         uint8_t i;
00148         uint32_t *pTX = (uint32_t *) &I2STXBuffer[0];
00149         uint32_t *pRX = (uint32_t *) &I2SRXBuffer[1];
00150
00151         for (i = 0; i < BUFFER_SIZE; i++) {
00152                 if (*pTX++ != *pRX++)  {
00153                         /* Call Error Loop */
00154                         return FALSE;
00155                 }
00156         }
00157         return TRUE;
00158 }
00159 /*********************************************************************/
00164 void print_menu(void)
00165 {
00166         _DBG_(menu);
00167 }
00168
00169
00170 /*-------------------------MAIN FUNCTION------------------------------*/
00171 /*********************************************************************/
00176 int c_entry(void)
00177 {
00178         uint32_t i;
00179         GPDMA_Channel_CFG_Type GPDMACfg;
00180         I2S_MODEConf_Type I2S_ClkConfig;
00181         I2S_CFG_Type I2S_ConfigStruct;
00182         I2S_DMAConf_Type I2S_DMAStruct;
00183         PINSEL_CFG_Type PinCfg;
00184
00185         /* Initialize debug via UART0
00186          * – 115200bps
00187          * – 8 data bit
00188          * – No parity
00189          * – 1 stop bit
00190          * – No flow control
00191          */
00192         debug_frmwrk_init();
00193
00194         //print menu screen
00195         print_menu();
00196
00197         //Initialize buffer
00198         Buffer_Init();
00199
00200         _DBG_("Press '1' to initialize buffer...");
00201         while(_DG !='1');
00202         _DBG_("Transmit Buffer init: ...");
00203         for(i=0;i<BUFFER_SIZE;i++)
00204         {
00205                 _DBH32(I2STXBuffer[i]);_DBG_("");
00206         }
00207         _DBG_("Receive Buffer init: ...");
00208         for(i=0;i<BUFFER_SIZE;i++)
00209         {
00210                 _DBH32(I2SRXBuffer[i]);_DBG_("");
00211         }
00212
00213         /* Pin configuration:
00214          * Assign:      - P0.4 as I2SRX_CLK
00215          *                      - P0.5 as I2SRX_WS
00216          *                      - P0.6 as I2SRX_SDA
00217          *                      - P0.7 as I2STX_CLK
00218          *                      - P0.8 as I2STX_WS
00219          *                      - P0.9 as I2STX_SDA
00220          */
00221         PinCfg.Funcnum = 1;
00222         PinCfg.OpenDrain = 0;
00223         PinCfg.Pinmode = 0;
00224         PinCfg.Pinnum = 4;
00225         PinCfg.Portnum = 0;
00226         PINSEL_ConfigPin(&PinCfg);
00227         PinCfg.Pinnum = 5;
00228         PINSEL_ConfigPin(&PinCfg);
00229         PinCfg.Pinnum = 6;
00230         PINSEL_ConfigPin(&PinCfg);
00231         PinCfg.Pinnum = 7;
00232         PINSEL_ConfigPin(&PinCfg);
00233         PinCfg.Pinnum = 8;
00234         PINSEL_ConfigPin(&PinCfg);
00235         PinCfg.Pinnum = 9;
00236         PINSEL_ConfigPin(&PinCfg);
00237
00238         /* Initialize I2S */
00239         I2S_Init(LPC_I2S);
00240
00241         //Setup for I2S: RX is similar with TX
00242         /* setup:
00243          *              - wordwidth: 16 bits
00244          *              - stereo mode
00245          *              - master mode for I2S_TX and slave for I2S_RX
00246          *              - ws_halfperiod is 31
00247          *              - not use mute mode
00248          *              - use reset and stop mode
00249          *              - select the fractional rate divider clock output as the source,
00250          *              - disable 4-pin mode
00251          *              - MCLK ouput is disable
00252          *              - Frequency = 44.1 kHz
00253          * Because we use mode I2STXMODE[3:0]= 0000, I2SDAO[5]=0 and
00254          * I2SRX[3:0]=0000, I2SDAI[5] = 1. So we have I2SRX_CLK = I2STX_CLK
00255          * --> I2SRXBITRATE = 1 (not divide TXCLK to produce RXCLK)
00256          */
00257
00258         /* Audio Config*/
00259         I2S_ConfigStruct.wordwidth = I2S_WORDWIDTH_16;
00260         I2S_ConfigStruct.mono = I2S_STEREO;
00261         I2S_ConfigStruct.stop = I2S_STOP_ENABLE;
00262         I2S_ConfigStruct.reset = I2S_RESET_ENABLE;
00263         I2S_ConfigStruct.ws_sel = I2S_MASTER_MODE;
00264         I2S_ConfigStruct.mute = I2S_MUTE_DISABLE;
00265         I2S_Config(LPC_I2S,I2S_TX_MODE,&I2S_ConfigStruct);
00266
00267         I2S_ConfigStruct.ws_sel = I2S_SLAVE_MODE;
00268         I2S_Config(LPC_I2S,I2S_RX_MODE,&I2S_ConfigStruct);
00269
00270         /* Clock Mode Config*/
00271         I2S_ClkConfig.clksel = I2S_CLKSEL_FRDCLK;
00272         I2S_ClkConfig.fpin = I2S_4PIN_DISABLE;
00273         I2S_ClkConfig.mcena = I2S_MCLK_DISABLE;
00274         I2S_ModeConfig(LPC_I2S,&I2S_ClkConfig,I2S_TX_MODE);
00275         I2S_ModeConfig(LPC_I2S,&I2S_ClkConfig,I2S_RX_MODE);
00276
00277         /* Set up frequency and bit rate*/
00278         I2S_FreqConfig(LPC_I2S, 44100, I2S_TX_MODE);
00279         I2S_SetBitRate(LPC_I2S, 0, I2S_RX_MODE);
00280         _DBG_("Press '2' to initialize DMA...");
00281         while(_DG !='2');
00282           /* GPDMA Interrupt configuration section ------------------------------------------------- */
00283
00284          /* Initialize GPDMA controller */
00285          GPDMA_Init();
00286          LPC_GPDMA->DMACConfig = 0x01;
00287
00288          /* Setting GPDMA interrupt */
00289      // Disable interrupt for DMA
00290      NVIC_DisableIRQ (DMA_IRQn);
00291      /* preemption = 1, sub-priority = 1 */
00292      NVIC_SetPriority(DMA_IRQn, ((0x01<<3)|0x01));
00293
00294         /*
00295          * Configure GPDMA channel 0 -------------------------------------------------------------
00296          * Used for I2S Transmit
00297          */
00298         // Setup GPDMA channel --------------------------------
00299         // channel 0
00300         GPDMACfg.ChannelNum = 0;
00301         // Source memory
00302         GPDMACfg.SrcMemAddr = DMA_SRC;
00303         // Destination memory
00304         GPDMACfg.DstMemAddr = 0;
00305         // Transfer size
00306         GPDMACfg.TransferSize = BUFFER_SIZE;
00307         // Transfer width - unused
00308         GPDMACfg.TransferWidth = 0;
00309         // Transfer type
00310         GPDMACfg.TransferType = GPDMA_TRANSFERTYPE_M2P;
00311         // Source connection
00312         GPDMACfg.SrcConn = 0;
00313         // Destination connection - unused
00314         GPDMACfg.DstConn = GPDMA_CONN_I2S_Channel_0;
00315         // Linker List Item - unused
00316         GPDMACfg.DMALLI = 0;
00317         GPDMA_Setup(&GPDMACfg);
00318         _DBG_("DMA Channel 0 setting finised...");
00319         /* Reset terminal counter */
00320         Channel0_TC = 0;
00321         /* Reset Error counter */
00322         Channel0_Err = 0;
00323
00324         /*
00325         * Configure GPDMA channel 1 -------------------------------------------------------------
00326         * Used for UART0 Receive
00327         */
00328         // Setup GPDMA channel --------------------------------
00329         // channel 1
00330         GPDMACfg.ChannelNum = 1;
00331         // Source memory - unused
00332         GPDMACfg.SrcMemAddr = 0;
00333         // Destination memory
00334         GPDMACfg.DstMemAddr = DMA_DST;
00335         // Transfer size
00336         GPDMACfg.TransferSize = BUFFER_SIZE+1;
00337         // Transfer width - unused
00338         GPDMACfg.TransferWidth = 0;
00339         // Transfer type
00340         GPDMACfg.TransferType = GPDMA_TRANSFERTYPE_P2M;
00341         // Source connection - unused
00342         GPDMACfg.SrcConn = GPDMA_CONN_I2S_Channel_1;
00343         // Destination connection
00344         GPDMACfg.DstConn = 0;
00345         // Linker List Item - unused
00346         GPDMACfg.DMALLI = 0;
00347         GPDMA_Setup(&GPDMACfg);
00348         _DBG_("DMA Channel 1 setting finised...");
00349         /* Reset terminal counter */
00350         Channel1_TC = 0;
00351         /* Reset Error counter */
00352         Channel1_Err = 0;
00353
00354         // Enable GPDMA channel 0 & 1
00355         GPDMA_ChannelCmd(0, ENABLE);
00356         GPDMA_ChannelCmd(1, ENABLE);
00357
00358         // Enable interrupt for DMA
00359         NVIC_EnableIRQ (DMA_IRQn);
00360         _DBG_("Press '3' to start I2S transfer process...");
00361         while(_DG !='3');
00362         _DBG_("I2S Start...");
00363
00364         I2S_DMAStruct.DMAIndex = I2S_DMA_2;
00365         I2S_DMAStruct.depth = 8;
00366         I2S_DMAConfig(LPC_I2S, &I2S_DMAStruct, I2S_RX_MODE);
00367         I2S_DMAStruct.DMAIndex = I2S_DMA_1;
00368         I2S_DMAStruct.depth = 1;
00369         I2S_DMAConfig(LPC_I2S, &I2S_DMAStruct, I2S_TX_MODE);
00370
00371         I2S_Start(LPC_I2S);
00372
00373         I2S_DMACmd(LPC_I2S, I2S_DMA_2, I2S_RX_MODE, ENABLE);
00374         I2S_DMACmd(LPC_I2S, I2S_DMA_1, I2S_TX_MODE, ENABLE);
00375
00376         while ((Channel0_TC == 0)||(Channel1_TC == 0) );
00377
00378         _DBG_("I2S Finish...");
00379         _DBG_("Receive Buffer data: ...");
00380         for(i=0;i<BUFFER_SIZE+1;i++)
00381         {
00382          _DBH32(I2SRXBuffer[i]);
00383          if(I2SRXBuffer[i]==0)
00384          {
00385                  _DBG_(" ->Dummy data");
00386          }
00387          else _DBG_("");
00388         }
00389         I2S_DeInit(LPC_I2S);
00390         while(1);
00391         return 1;
00392 }
00393
00394 /* With ARM and GHS toolsets, the entry point is main() - this will
00395    allow the linker to generate wrapper code to setup stacks, allocate
00396    heap area, and initialize and copy code and data segments. For GNU
00397    toolsets, the entry point is through __start() in the crt0_gnu.asm
00398    file, and that startup code will setup stacks and data */
00399 int main(void)
00400 {
00401     return c_entry();
00402 }
00403
00404 #ifdef  DEBUG
00405 /*******************************************************************************
00406 * @brief                Reports the name of the source file and the source line number
00407 *                               where the CHECK_PARAM error has occurred.
00408 * @param[in]    file Pointer to the source file name
00409 * @param[in]    line assert_param error line source number
00410 * @return               None
00411 *******************************************************************************/
00412 void check_failed(uint8_t *file, uint32_t line)
00413 {
00414         /* User can add his own implementation to report the file name and line number,
00415          ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
00416
00417         /* Infinite loop */
00418         while(1);
00419 }
00420 #endif
00421
00422 /*
00423  * @}
00424  */
Generated on Tue Jun 7 14:59:01 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/I2S/I2S_IRQ/i2s_irq_test.c Source File

C:/nxpdrv/LPC1700CMSIS/Examples/I2S/I2S_IRQ/i2s_irq_test.c

Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          i2s_irq_test.c                          2010-05-21
00003 */
00026 #include "lpc17xx_i2s.h"
00027 #include "lpc17xx_libcfg.h"
00028 #include "lpc17xx_pinsel.h"
00029 #include "debug_frmwrk.h"
00030
00031 /* Example group ----------------------------------------------------------- */
00037 /************************** PRIVATE DEFINITIONS *************************/
00039 #define BUFFER_SIZE                             0x400
00040
00044 #define I2S_BUFFER_SRC                  LPC_AHBRAM1_BASE //0x20080000
00045
00049 #define I2S_BUFFER_DST                  (I2S_BUFFER_SRC+0x1000UL) //0x20081000
00050
00051 #define RXFIFO_EMPTY            0
00052 #define TXFIFO_FULL                     8
00053 /************************** PRIVATE VARIABLES ***********************/
00054 uint8_t menu[]=
00055         "********************************************************************************\n\r"
00056         "Hello NXP Semiconductors \n\r"
00057         " I2S interrupt mode demo \n\r"
00058         "\t - MCU: LPC17xx \n\r"
00059         "\t - Core: ARM CORTEX-M3 \n\r"
00060         "\t - Communicate via: UART0 - 115200 bps \n\r"
00061         " Use two I2S channels in the same board to transfer data in interrupt mode\n\r"
00062         "********************************************************************************\n\r";
00063
00064 volatile uint8_t  I2STXDone = 0;
00065 volatile uint8_t  I2SRXDone = 0;
00066
00067 volatile uint32_t *I2STXBuffer = (uint32_t*)(I2S_BUFFER_SRC);
00068 volatile uint32_t *I2SRXBuffer = (uint32_t *)(I2S_BUFFER_DST);
00069
00070 volatile uint32_t I2SReadLength = 0;
00071 volatile uint32_t I2SWriteLength = 0;
00072
00073 uint8_t tx_depth_irq = 0;
00074 uint8_t rx_depth_irq = 0;
00075 uint8_t dummy=0;
00076
00077
00078 /************************** PRIVATE FUNCTIONS *************************/
00079 void I2S_IRQHandler(void);
00080
00081 void Buffer_Init(void);
00082 Bool Buffer_Verify(void);
00083 void print_menu(void);
00084
00085 /*----------------- INTERRUPT SERVICE ROUTINES --------------------------*/
00086 /*********************************************************************/
00091 void I2S_IRQHandler()
00092 {
00093         uint32_t RXLevel = 0;
00094
00095         //Check RX interrupt
00096         if(I2S_GetIRQStatus(LPC_I2S, I2S_RX_MODE))
00097         {
00098                 RXLevel = I2S_GetLevel(LPC_I2S, I2S_RX_MODE);
00099                 if ( (RXLevel != RXFIFO_EMPTY) && !I2SRXDone )
00100                 {
00101                         while ( RXLevel > 0 )
00102                         {
00103                                 if ( I2SReadLength == BUFFER_SIZE )
00104                                 {
00105                                         //Stop RX
00106                                         I2S_Stop(LPC_I2S, I2S_RX_MODE);
00107                                         // Disable RX
00108                                         I2S_IRQCmd(LPC_I2S, I2S_RX_MODE, DISABLE);
00109                                         I2SRXDone = 1;
00110                                         break;
00111                                 }
00112                                 else
00113                                 {
00114                                         I2SRXBuffer[I2SReadLength++] = LPC_I2S->I2SRXFIFO;
00115                                 }
00116                                 RXLevel--;
00117                         }
00118                 }
00119         }
00120         return;
00121 }
00122
00123 /*-------------------------PRIVATE FUNCTIONS------------------------------*/
00124 /*********************************************************************/
00129 void Buffer_Init(void) {
00130         uint32_t i;
00131         for ( i = 0; i < BUFFER_SIZE; i++ )     /* clear buffer */
00132         {
00133         I2STXBuffer[i] = i;
00134         I2SRXBuffer[i] = 0;
00135         }
00136
00137 }
00138
00139 /*********************************************************************/
00145 Bool Buffer_Verify(void) {
00146         uint32_t i;
00147         uint32_t *pTX = (uint32_t *) &I2STXBuffer[0];
00148         uint32_t *pRX = (uint32_t *) &I2SRXBuffer[1];
00149         /* Because first element of RX is dummy 0 value, so we just verify
00150          * from 2nd element
00151          */
00152         for (i = 1; i < BUFFER_SIZE; i++) {
00153                 if (*pTX++ != *pRX++)  {
00154                         return FALSE;
00155                 }
00156         }
00157         return TRUE;
00158 }
00159 /*********************************************************************/
00164 void print_menu(void)
00165 {
00166         _DBG_(menu);
00167 }
00168
00169
00170 /*-------------------------MAIN FUNCTION------------------------------*/
00171 /*********************************************************************/
00176 int c_entry (void) {                       /* Main Program */
00177         I2S_MODEConf_Type I2S_ClkConfig;
00178         I2S_CFG_Type I2S_ConfigStruct;
00179         PINSEL_CFG_Type PinCfg;
00180
00181         uint32_t i;
00182         /* Initialize debug via UART0
00183          * – 115200bps
00184          * – 8 data bit
00185          * – No parity
00186          * – 1 stop bit
00187          * – No flow control
00188          */
00189         debug_frmwrk_init();
00190
00191         //print menu screen
00192         print_menu();
00193 /* Initialize I2S peripheral ------------------------------------*/
00194         /* Pin configuration:
00195          * Assign:      - P0.4 as I2SRX_CLK
00196          *                      - P0.5 as I2SRX_WS
00197          *                      - P0.6 as I2SRX_SDA
00198          *                      - P0.7 as I2STX_CLK
00199          *                      - P0.8 as I2STX_WS
00200          *                      - P0.9 as I2STX_SDA
00201          */
00202         PinCfg.Funcnum = 1;
00203         PinCfg.OpenDrain = 0;
00204         PinCfg.Pinmode = 0;
00205         PinCfg.Pinnum = 4;
00206         PinCfg.Portnum = 0;
00207         PINSEL_ConfigPin(&PinCfg);
00208         PinCfg.Pinnum = 5;
00209         PINSEL_ConfigPin(&PinCfg);
00210         PinCfg.Pinnum = 6;
00211         PINSEL_ConfigPin(&PinCfg);
00212         PinCfg.Pinnum = 7;
00213         PINSEL_ConfigPin(&PinCfg);
00214         PinCfg.Pinnum = 8;
00215         PINSEL_ConfigPin(&PinCfg);
00216         PinCfg.Pinnum = 9;
00217         PINSEL_ConfigPin(&PinCfg);
00218
00219         Buffer_Init();
00220
00221         I2S_Init(LPC_I2S);
00222
00223         /* setup:
00224          *              - wordwidth: 16 bits
00225          *              - stereo mode
00226          *              - master mode for I2S_TX and slave for I2S_RX
00227          *              - ws_halfperiod is 31
00228          *              - not use mute mode
00229          *              - use reset and stop mode
00230          *              - select the fractional rate divider clock output as the source,
00231          *              - disable 4-pin mode
00232          *              - MCLK ouput is disable
00233          *              - Frequency = 44.1 kHz
00234          * Because we use mode I2STXMODE[3:0]= 0000, I2SDAO[5]=0 and
00235          * I2SRX[3:0]=0000, I2SDAI[5] = 1. So we have I2SRX_CLK = I2STX_CLK
00236          * --> I2SRXBITRATE = 1 (not divide TXCLK to produce RXCLK)
00237          */
00238
00239         /* Audio Config*/
00240         I2S_ConfigStruct.wordwidth = I2S_WORDWIDTH_16;
00241         I2S_ConfigStruct.mono = I2S_STEREO;
00242         I2S_ConfigStruct.stop = I2S_STOP_ENABLE;
00243         I2S_ConfigStruct.reset = I2S_RESET_ENABLE;
00244         I2S_ConfigStruct.ws_sel = I2S_MASTER_MODE;
00245         I2S_ConfigStruct.mute = I2S_MUTE_DISABLE;
00246         I2S_Config(LPC_I2S,I2S_TX_MODE,&I2S_ConfigStruct);
00247
00248         I2S_ConfigStruct.ws_sel = I2S_SLAVE_MODE;
00249         I2S_Config(LPC_I2S,I2S_RX_MODE,&I2S_ConfigStruct);
00250
00251         /* Clock Mode Config*/
00252         I2S_ClkConfig.clksel = I2S_CLKSEL_FRDCLK;
00253         I2S_ClkConfig.fpin = I2S_4PIN_DISABLE;
00254         I2S_ClkConfig.mcena = I2S_MCLK_DISABLE;
00255         I2S_ModeConfig(LPC_I2S,&I2S_ClkConfig,I2S_TX_MODE);
00256         I2S_ModeConfig(LPC_I2S,&I2S_ClkConfig,I2S_RX_MODE);
00257
00258         I2S_FreqConfig(LPC_I2S, 44100, I2S_TX_MODE);
00259         I2S_SetBitRate(LPC_I2S, 0, I2S_RX_MODE);
00260
00261         I2S_Stop(LPC_I2S, I2S_TX_MODE);
00262         I2S_Stop(LPC_I2S, I2S_RX_MODE);
00263
00264         NVIC_EnableIRQ(I2S_IRQn);
00265
00266         /* RX FIFO depth is 1, TX FIFO depth is 8. */
00267         I2S_IRQConfig(LPC_I2S,I2S_TX_MODE,8);
00268         I2S_IRQConfig(LPC_I2S,I2S_RX_MODE,1);
00269         I2S_IRQCmd(LPC_I2S,I2S_RX_MODE,ENABLE);
00270         I2S_Start(LPC_I2S);
00271
00272 /* I2S transmit ---------------------------------------------------*/
00273         while ( I2SWriteLength < BUFFER_SIZE )
00274         {
00275                 while(I2S_GetLevel(LPC_I2S, I2S_TX_MODE)==TXFIFO_FULL);
00276                 I2S_Send(LPC_I2S, I2STXBuffer[I2SWriteLength++]);
00277         }
00278
00279         I2STXDone = 1;
00280
00281         /* Wait for transmit/receive complete */
00282         while ( !I2SRXDone || !I2STXDone );
00283         for(i=0;i<BUFFER_SIZE;i++)
00284         {
00285                 _DBH32(I2SRXBuffer[i]);_DBG_("");
00286         }
00287         /* Verify RX and TX Buffer */
00288         if(Buffer_Verify())
00289         {
00290                 _DBG_("Verify Buffer: OK...");
00291         }
00292         else
00293         {
00294                 _DBG_("Verify Buffer: ERROR...");
00295         }
00296
00297
00298         return 0;
00299 }
00300
00301 /* With ARM and GHS toolsets, the entry point is main() - this will
00302    allow the linker to generate wrapper code to setup stacks, allocate
00303    heap area, and initialize and copy code and data segments. For GNU
00304    toolsets, the entry point is through __start() in the crt0_gnu.asm
00305    file, and that startup code will setup stacks and data */
00306 int main(void)
00307 {
00308     return c_entry();
00309 }
00310
00311 #ifdef  DEBUG
00312 /*******************************************************************************
00313 * @brief                Reports the name of the source file and the source line number
00314 *                               where the CHECK_PARAM error has occurred.
00315 * @param[in]    file Pointer to the source file name
00316 * @param[in]    line assert_param error line source number
00317 * @return               None
00318 *******************************************************************************/
00319 void check_failed(uint8_t *file, uint32_t line)
00320 {
00321         /* User can add his own implementation to report the file name and line number,
00322          ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
00323
00324         /* Infinite loop */
00325         while(1);
00326 }
00327 #endif
00328
00329 /*
00330  * @}
00331  */
Generated on Tue Jun 7 14:59:01 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/I2S/I2S_MCLK/i2s_mclk.c Source File

C:/nxpdrv/LPC1700CMSIS/Examples/I2S/I2S_MCLK/i2s_mclk.c

Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          i2s_mclk.c                              2010-06-18
00003 */
00025 #include "lpc17xx_i2s.h"
00026 #include "lpc17xx_libcfg.h"
00027 #include "lpc17xx_pinsel.h"
00028 #include "debug_frmwrk.h"
00029
00030 /* Example group ----------------------------------------------------------- */
00036 /************************** PRIVATE DEFINITIONS *************************/
00038 #define BUFFER_SIZE                             0x400
00039
00043 #define I2S_BUFFER_SRC                  LPC_AHBRAM1_BASE //0x20080000
00044
00048 #define I2S_BUFFER_DST                  (I2S_BUFFER_SRC+0x1000UL) //0x20081000
00049
00050 #define RXFIFO_EMPTY            0
00051 #define TXFIFO_FULL                     8
00052 /************************** PRIVATE VARIABLES ***********************/
00053 uint8_t menu[]=
00054         "********************************************************************************\n\r"
00055         "Hello NXP Semiconductors \n\r"
00056         " I2S MCLK demo \n\r"
00057         "\t - MCU: LPC17xx \n\r"
00058         "\t - Core: ARM CORTEX-M3 \n\r"
00059         "\t - Communicate via: UART0 - 115200 bps \n\r"
00060         " This example describes how to use I2S master clock as I2S clock source\n\r"
00061         "********************************************************************************\n\r";
00062
00063 volatile uint8_t  I2STXDone = 0;
00064 volatile uint8_t  I2SRXDone = 0;
00065
00066 volatile uint32_t *I2STXBuffer = (uint32_t*)(I2S_BUFFER_SRC);
00067 volatile uint32_t *I2SRXBuffer = (uint32_t *)(I2S_BUFFER_DST);
00068
00069 volatile uint32_t I2SReadLength = 0;
00070 volatile uint32_t I2SWriteLength = 0;
00071
00072 uint8_t tx_depth_irq = 0;
00073 uint8_t rx_depth_irq = 0;
00074 uint8_t dummy=0;
00075
00076
00077 /************************** PRIVATE FUNCTIONS *************************/
00078 void I2S_IRQHandler(void);
00079
00080 void Buffer_Init(void);
00081 Bool Buffer_Verify(void);
00082 void print_menu(void);
00083
00084 /*----------------- INTERRUPT SERVICE ROUTINES --------------------------*/
00085 /*********************************************************************/
00090 void I2S_IRQHandler()
00091 {
00092         uint32_t RXLevel = 0;
00093
00094         //Check RX interrupt
00095         if(I2S_GetIRQStatus(LPC_I2S, I2S_RX_MODE))
00096         {
00097                 RXLevel = I2S_GetLevel(LPC_I2S, I2S_RX_MODE);
00098                 if ( (RXLevel != RXFIFO_EMPTY) && !I2SRXDone )
00099                 {
00100                         while ( RXLevel > 0 )
00101                         {
00102                                 if ( I2SReadLength == BUFFER_SIZE )
00103                                 {
00104                                         //Stop RX
00105                                         I2S_Stop(LPC_I2S, I2S_RX_MODE);
00106                                         // Disable RX
00107                                         I2S_IRQCmd(LPC_I2S, I2S_RX_MODE, DISABLE);
00108                                         I2SRXDone = 1;
00109                                         break;
00110                                 }
00111                                 else
00112                                 {
00113                                         I2SRXBuffer[I2SReadLength++] = LPC_I2S->I2SRXFIFO;
00114                                 }
00115                                 RXLevel--;
00116                         }
00117                 }
00118         }
00119         return;
00120 }
00121
00122 /*-------------------------PRIVATE FUNCTIONS------------------------------*/
00123 /*********************************************************************/
00128 void Buffer_Init(void) {
00129         uint32_t i;
00130         for ( i = 0; i < BUFFER_SIZE; i++ )     /* clear buffer */
00131         {
00132         I2STXBuffer[i] = i;
00133         I2SRXBuffer[i] = 0;
00134         }
00135
00136 }
00137
00138 /*********************************************************************/
00144 Bool Buffer_Verify(void) {
00145         uint32_t i;
00146         uint32_t *pTX = (uint32_t *) &I2STXBuffer[0];
00147         uint32_t *pRX = (uint32_t *) &I2SRXBuffer[1];
00148         /* Because first element of RX is dummy 0 value, so we just verify
00149          * from 2nd element
00150          */
00151         for (i = 1; i < BUFFER_SIZE; i++) {
00152                 if (*pTX++ != *pRX++)  {
00153                         return FALSE;
00154                 }
00155         }
00156         return TRUE;
00157 }
00158 /*********************************************************************/
00163 void print_menu(void)
00164 {
00165         _DBG_(menu);
00166 }
00167
00168
00169 /*-------------------------MAIN FUNCTION------------------------------*/
00170 /*********************************************************************/
00175 int c_entry (void) {                       /* Main Program */
00176         I2S_MODEConf_Type I2S_ClkConfig;
00177         I2S_CFG_Type I2S_ConfigStruct;
00178         PINSEL_CFG_Type PinCfg;
00179
00180         uint32_t i;
00181         /* Initialize debug via UART0
00182          * – 115200bps
00183          * – 8 data bit
00184          * – No parity
00185          * – 1 stop bit
00186          * – No flow control
00187          */
00188         debug_frmwrk_init();
00189
00190         //print menu screen
00191         print_menu();
00192 /* Initialize I2S peripheral ------------------------------------*/
00193         /* Pin configuration:
00194          * Assign:      - P0.4 as I2SRX_CLK
00195          *                      - P0.5 as I2SRX_WS
00196          *                      - P0.6 as I2SRX_SDA
00197          *                      - P0.7 as I2STX_CLK
00198          *                      - P0.8 as I2STX_WS
00199          *                      - P0.9 as I2STX_SDA
00200          */
00201         PinCfg.Funcnum = 1;
00202         PinCfg.OpenDrain = 0;
00203         PinCfg.Pinmode = 0;
00204         PinCfg.Pinnum = 4;
00205         PinCfg.Portnum = 0;
00206         PINSEL_ConfigPin(&PinCfg);
00207         PinCfg.Pinnum = 5;
00208         PINSEL_ConfigPin(&PinCfg);
00209         PinCfg.Pinnum = 6;
00210         PINSEL_ConfigPin(&PinCfg);
00211         PinCfg.Pinnum = 7;
00212         PINSEL_ConfigPin(&PinCfg);
00213         PinCfg.Pinnum = 8;
00214         PINSEL_ConfigPin(&PinCfg);
00215         PinCfg.Pinnum = 9;
00216         PINSEL_ConfigPin(&PinCfg);
00217
00218         /* P4.29 as TX_MCLK */
00219         PinCfg.Funcnum = 1;
00220         PinCfg.OpenDrain = 0;
00221         PinCfg.Pinmode = 0;
00222         PinCfg.Pinnum = 29;
00223         PinCfg.Portnum = 4;
00224         PINSEL_ConfigPin(&PinCfg);
00225
00226         Buffer_Init();
00227
00228         I2S_Init(LPC_I2S);
00229
00230         /* setup:
00231          *              - wordwidth: 16 bits
00232          *              - stereo mode
00233          *              - master mode for I2S_TX and slave for I2S_RX
00234          *              - ws_halfperiod is 31
00235          *              - not use mute mode
00236          *              - use reset and stop mode
00237          *              - select the fractional rate divider clock output as the source,
00238          *              - disable 4-pin mode
00239          *              - MCLK ouput is disable
00240          *              - Frequency = 44.1 kHz
00241          * Because we use mode I2STXMODE[3:0]= 0000, I2SDAO[5]=0 and
00242          * I2SRX[3:0]=0000, I2SDAI[5] = 1. So we have I2SRX_CLK = I2STX_CLK
00243          * --> I2SRXBITRATE = 1 (not divide TXCLK to produce RXCLK)
00244          */
00245
00246         /* Audio Config*/
00247         I2S_ConfigStruct.wordwidth = I2S_WORDWIDTH_16;
00248         I2S_ConfigStruct.mono = I2S_STEREO;
00249         I2S_ConfigStruct.stop = I2S_STOP_ENABLE;
00250         I2S_ConfigStruct.reset = I2S_RESET_ENABLE;
00251         I2S_ConfigStruct.ws_sel = I2S_MASTER_MODE;
00252         I2S_ConfigStruct.mute = I2S_MUTE_DISABLE;
00253         I2S_Config(LPC_I2S,I2S_TX_MODE,&I2S_ConfigStruct);
00254
00255         I2S_ConfigStruct.ws_sel = I2S_SLAVE_MODE;
00256         I2S_Config(LPC_I2S,I2S_RX_MODE,&I2S_ConfigStruct);
00257
00258         I2S_Stop(LPC_I2S, I2S_TX_MODE);
00259         I2S_Stop(LPC_I2S, I2S_RX_MODE);
00260
00261         /* Clock Mode Config
00262          * I2S transmitter:
00263          *      - Select TX fractional rate divider clock ouput as the source
00264          *  - Disable 4-wire mode
00265          *  - Enable for the TX_MCLK output (optional, this setting just for
00266          *  user can observe master clock on oscilloscope)
00267          * I2S receiver:
00268          *      - Select TX_MCLK signal as the RX_MCLK clock source
00269          *  - Disable 4-wire mode
00270          *  - Disable for the RX_MCLK output
00271          */
00272         I2S_ClkConfig.clksel = I2S_CLKSEL_FRDCLK;
00273         I2S_ClkConfig.fpin = I2S_4PIN_DISABLE;
00274         I2S_ClkConfig.mcena = I2S_MCLK_ENABLE;
00275         I2S_ModeConfig(LPC_I2S,&I2S_ClkConfig,I2S_TX_MODE);
00276
00277         I2S_ClkConfig.clksel = I2S_CLKSEL_MCLK;
00278         I2S_ClkConfig.mcena = I2S_MCLK_DISABLE;
00279         I2S_ModeConfig(LPC_I2S,&I2S_ClkConfig,I2S_RX_MODE);
00280
00281         I2S_FreqConfig(LPC_I2S, 44100, I2S_TX_MODE);
00282         I2S_FreqConfig(LPC_I2S, 44100, I2S_RX_MODE);
00283
00284         NVIC_EnableIRQ(I2S_IRQn);
00285
00286         /* RX FIFO depth is 1, TX FIFO depth is 8. */
00287         I2S_IRQConfig(LPC_I2S,I2S_TX_MODE,8);
00288         I2S_IRQConfig(LPC_I2S,I2S_RX_MODE,1);
00289         I2S_IRQCmd(LPC_I2S,I2S_RX_MODE,ENABLE);
00290         I2S_Start(LPC_I2S);
00291
00292 /* I2S transmit ---------------------------------------------------*/
00293         while ( I2SWriteLength < BUFFER_SIZE )
00294         {
00295                 while(I2S_GetLevel(LPC_I2S, I2S_TX_MODE)==TXFIFO_FULL);
00296                 I2S_Send(LPC_I2S, I2STXBuffer[I2SWriteLength++]);
00297         }
00298
00299         I2STXDone = 1;
00300
00301         /* Wait for transmit/receive complete */
00302         while ( !I2SRXDone || !I2STXDone );
00303         for(i=0;i<BUFFER_SIZE;i++)
00304         {
00305                 _DBH32(I2SRXBuffer[i]);_DBG_("");
00306         }
00307         /* Verify RX and TX Buffer */
00308         if(Buffer_Verify())
00309         {
00310                 _DBG_("Verify Buffer: OK...");
00311         }
00312         else
00313         {
00314                 _DBG_("Verify Buffer: ERROR...");
00315         }
00316         while(1);
00317 }
00318
00319 /* With ARM and GHS toolsets, the entry point is main() - this will
00320    allow the linker to generate wrapper code to setup stacks, allocate
00321    heap area, and initialize and copy code and data segments. For GNU
00322    toolsets, the entry point is through __start() in the crt0_gnu.asm
00323    file, and that startup code will setup stacks and data */
00324 int main(void)
00325 {
00326     return c_entry();
00327 }
00328
00329 #ifdef  DEBUG
00330 /*******************************************************************************
00331 * @brief                Reports the name of the source file and the source line number
00332 *                               where the CHECK_PARAM error has occurred.
00333 * @param[in]    file Pointer to the source file name
00334 * @param[in]    line assert_param error line source number
00335 * @return               None
00336 *******************************************************************************/
00337 void check_failed(uint8_t *file, uint32_t line)
00338 {
00339         /* User can add his own implementation to report the file name and line number,
00340          ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
00341
00342         /* Infinite loop */
00343         while(1);
00344 }
00345 #endif
00346
00347 /*
00348  * @}
00349  */
Generated on Tue Jun 7 14:59:01 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/I2S/Polling/i2s_polling.c Source File

C:/nxpdrv/LPC1700CMSIS/Examples/I2S/Polling/i2s_polling.c

Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          i2s_polling.c                           2010-05-21
00003 */
00026 #include "lpc17xx_i2s.h"
00027 #include "lpc17xx_libcfg.h"
00028 #include "lpc17xx_pinsel.h"
00029 #include "debug_frmwrk.h"
00030
00031 /* Example group ----------------------------------------------------------- */
00037 /************************** PRIVATE DEFINITIONS *************************/
00039 #define BUFFER_SIZE                     0x400
00040
00044 #define I2S_BUFFER_SRC                  LPC_AHBRAM1_BASE
00045
00049 #define I2S_BUFFER_DST                  (I2S_BUFFER_SRC+0x1000UL)
00050
00051 /************************** PRIVATE VARIABLE ***********************/
00052 uint8_t menu[]=
00053         "********************************************************************************\n\r"
00054         "Hello NXP Semiconductors \n\r"
00055         " I2S polling mode demo \n\r"
00056         "\t - MCU: LPC17xx \n\r"
00057         "\t - Core: ARM CORTEX-M3 \n\r"
00058         "\t - Communicate via: UART0 - 115200 bps \n\r"
00059         " Use two I2S channels in the same board to transfer data in polling mode\n\r"
00060         "********************************************************************************\n\r";
00061
00062 volatile uint8_t  I2STXDone = 0;
00063 volatile uint8_t  I2SRXDone = 0;
00064
00065 volatile uint32_t *I2STXBuffer = (uint32_t*)(I2S_BUFFER_SRC);
00066 volatile uint32_t *I2SRXBuffer = (uint32_t *)(I2S_BUFFER_DST);
00067
00068 volatile uint32_t I2SReadLength = 0;
00069 volatile uint32_t I2SWriteLength = 0;
00070
00071 /************************** PRIVATE FUNCTIONS *************************/
00072 void Buffer_Init(void);
00073 Bool Buffer_Verify(void);
00074 void print_menu(void);
00075
00076 /*-------------------------PRIVATE FUNCTIONS------------------------------*/
00077 /*********************************************************************/
00082 void Buffer_Init(void) {
00083         uint32_t i;
00084
00085         for (i = 0; i < BUFFER_SIZE; i++) {
00086                 I2STXBuffer[i] = i+1;
00087                 I2SRXBuffer[i] = 0;
00088         }
00089 }
00090
00091 /*********************************************************************/
00097 Bool Buffer_Verify(void) {
00098         uint32_t i;
00099         uint32_t *pTX = (uint32_t *) &I2STXBuffer[0];
00100         /* Generally, first element of RX buffer is a dummy data, so
00101          * it will be discarded
00102          */
00103         uint32_t *pRX = (uint32_t *) &I2SRXBuffer[1];
00104
00105         for (i = 1; i < BUFFER_SIZE; i++) {
00106                 if (*pTX++ != *pRX++)  {
00107                         return FALSE;
00108                 }
00109         }
00110         return TRUE;
00111 }
00112
00113 /*********************************************************************/
00118 void print_menu(void)
00119 {
00120         _DBG_(menu);
00121 }
00122
00123
00124 /*-------------------------MAIN FUNCTION------------------------------*/
00125 /*********************************************************************/
00130 int c_entry (void) {
00131         uint32_t i;
00132         uint32_t dummy=0;
00133         I2S_MODEConf_Type I2S_ClkConfig;
00134         I2S_CFG_Type I2S_ConfigStruct;
00135         PINSEL_CFG_Type PinCfg;
00136
00137         /* Initialize debug via UART0
00138          * – 115200bps
00139          * – 8 data bit
00140          * – No parity
00141          * – 1 stop bit
00142          * – No flow control
00143          */
00144         debug_frmwrk_init();
00145
00146         //print menu screen
00147         print_menu();
00148
00149         Buffer_Init();
00150
00151         /* Pin configuration:
00152          * Assign:      - P0.4 as I2SRX_CLK
00153          *                      - P0.5 as I2SRX_WS
00154          *                      - P0.6 as I2SRX_SDA
00155          *                      - P0.7 as I2STX_CLK
00156          *                      - P0.8 as I2STX_WS
00157          *                      - P0.9 as I2STX_SDA
00158          */
00159         PinCfg.Funcnum = 1;
00160         PinCfg.OpenDrain = 0;
00161         PinCfg.Pinmode = 0;
00162         PinCfg.Pinnum = 4;
00163         PinCfg.Portnum = 0;
00164         PINSEL_ConfigPin(&PinCfg);
00165         PinCfg.Pinnum = 5;
00166         PINSEL_ConfigPin(&PinCfg);
00167         PinCfg.Pinnum = 6;
00168         PINSEL_ConfigPin(&PinCfg);
00169         PinCfg.Pinnum = 7;
00170         PINSEL_ConfigPin(&PinCfg);
00171         PinCfg.Pinnum = 8;
00172         PINSEL_ConfigPin(&PinCfg);
00173         PinCfg.Pinnum = 9;
00174         PINSEL_ConfigPin(&PinCfg);
00175
00176         I2S_Init(LPC_I2S);
00177
00178         //Setup for I2S: RX is similar with TX
00179         /* setup:
00180          *              - wordwidth: 16 bits
00181          *              - stereo mode
00182          *              - master mode for I2S_TX and slave for I2S_RX
00183          *              - ws_halfperiod is 31
00184          *              - not use mute mode
00185          *              - use reset and stop mode
00186          *              - select the fractional rate divider clock output as the source,
00187          *              - disable 4-pin mode
00188          *              - MCLK ouput is disable
00189          *              - Frequency = 44.1 kHz (x=8,y=51 - automatic setting)
00190          * Because we use mode I2STXMODE[3:0]= 0000, I2SDAO[5]=0 and
00191          * I2SRX[3:0]=0000, I2SDAI[5] = 1. So we have I2SRX_CLK = I2STX_CLK
00192          * --> I2SRXBITRATE = 1 (not divide TXCLK to produce RXCLK)
00193          */
00194
00195         /* Audio Config*/
00196         I2S_ConfigStruct.wordwidth = I2S_WORDWIDTH_16;
00197         I2S_ConfigStruct.mono = I2S_STEREO;
00198         I2S_ConfigStruct.stop = I2S_STOP_ENABLE;
00199         I2S_ConfigStruct.reset = I2S_RESET_ENABLE;
00200         I2S_ConfigStruct.ws_sel = I2S_MASTER_MODE;
00201         I2S_ConfigStruct.mute = I2S_MUTE_DISABLE;
00202         I2S_Config(LPC_I2S,I2S_TX_MODE,&I2S_ConfigStruct);
00203
00204         I2S_ConfigStruct.ws_sel = I2S_SLAVE_MODE;
00205         I2S_Config(LPC_I2S,I2S_RX_MODE,&I2S_ConfigStruct);
00206
00207         /* Clock Mode Config*/
00208         I2S_ClkConfig.clksel = I2S_CLKSEL_FRDCLK;
00209         I2S_ClkConfig.fpin = I2S_4PIN_DISABLE;
00210         I2S_ClkConfig.mcena = I2S_MCLK_DISABLE;
00211         I2S_ModeConfig(LPC_I2S,&I2S_ClkConfig,I2S_TX_MODE);
00212         I2S_ModeConfig(LPC_I2S,&I2S_ClkConfig,I2S_RX_MODE);
00213
00214         /* Set up frequency and bit rate*/
00215         I2S_FreqConfig(LPC_I2S, 44100, I2S_TX_MODE);
00216         I2S_SetBitRate(LPC_I2S, 0, I2S_RX_MODE);
00217
00218         I2S_Start(LPC_I2S);
00219          while(I2STXDone == 0||I2SRXDone == 0){
00220                 if(I2STXDone ==0){
00221                          I2S_Send(LPC_I2S,I2STXBuffer[I2SWriteLength]);
00222                          I2SWriteLength +=1;
00223                          if(I2SWriteLength == BUFFER_SIZE) I2STXDone = 1;
00224                 }
00225                 if(I2SRXDone == 0)
00226                 {
00227                         while(I2S_GetLevel(LPC_I2S,I2S_RX_MODE)==0x00);
00228                         if(dummy == 0) //dummy receive
00229                         {
00230                                 i = I2S_Receive(LPC_I2S);
00231                                 dummy = 1;
00232                         }
00233                         else
00234                         {
00235                                 *(uint32_t *)(&I2SRXBuffer[I2SReadLength]) = I2S_Receive(LPC_I2S);
00236                                 I2SReadLength +=1;
00237                         }
00238                         if(I2SReadLength == BUFFER_SIZE) I2SRXDone = 1;
00239                 }
00240          }
00241
00242          /* print received data */
00243          _DBG_("Receive Buffer data: ...");
00244          for(i=0;i<BUFFER_SIZE;i++)
00245          {
00246                  _DBH32(I2SRXBuffer[i]);_DBG_("");
00247          }
00248
00249          /* Validate received data */
00250          if(Buffer_Verify())
00251          {
00252                  _DBG_("Verify Buffer: OK...");
00253          }
00254          else
00255          {
00256                  _DBG_("Verify Buffer: ERROR...");
00257          }
00258          I2S_DeInit(LPC_I2S);
00259          while(1);
00260 }
00261
00262 /* With ARM and GHS toolsets, the entry point is main() - this will
00263    allow the linker to generate wrapper code to setup stacks, allocate
00264    heap area, and initialize and copy code and data segments. For GNU
00265    toolsets, the entry point is through __start() in the crt0_gnu.asm
00266    file, and that startup code will setup stacks and data */
00267 int main(void)
00268 {
00269     return c_entry();
00270 }
00271
00272 #ifdef  DEBUG
00273 /*******************************************************************************
00274 * @brief                Reports the name of the source file and the source line number
00275 *                               where the CHECK_PARAM error has occurred.
00276 * @param[in]    file Pointer to the source file name
00277 * @param[in]    line assert_param error line source number
00278 * @return               None
00279 *******************************************************************************/
00280 void check_failed(uint8_t *file, uint32_t line)
00281 {
00282         /* User can add his own implementation to report the file name and line number,
00283          ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
00284
00285         /* Infinite loop */
00286         while(1);
00287 }
00288 #endif
00289
00290 /*
00291  * @}
00292  */
Generated on Tue Jun 7 14:59:01 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/I2S/I2S_test_4_wire/i2s_test_4_wire.c Source File

C:/nxpdrv/LPC1700CMSIS/Examples/I2S/I2S_test_4_wire/i2s_test_4_wire.c

Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          i2s_test_4_wire.c                               2010-05-21
00003 */
00025 #include "lpc17xx_i2s.h"
00026 #include "lpc17xx_libcfg.h"
00027 #include "lpc17xx_pinsel.h"
00028 #include "debug_frmwrk.h"
00029
00030 /* Example group ----------------------------------------------------------- */
00036
00037
00038 #define BUFFER_SIZE                     0x400
00039
00043 #define I2S_BUFFER_SRC                  LPC_AHBRAM1_BASE
00044
00048 #define I2S_BUFFER_DST                  (I2S_BUFFER_SRC+0x1000UL)
00049
00050 /************************** PRIVATE VARIABLES ***********************/
00051 uint8_t menu[]=
00052         "********************************************************************************\n\r"
00053         "Hello NXP Semiconductors \n\r"
00054         " I2S 4-wire demo \n\r"
00055         "\t - MCU: LPC17xx \n\r"
00056         "\t - Core: ARM CORTEX-M3 \n\r"
00057         "\t - Communicate via: UART0 - 115200 bps \n\r"
00058         " Use two I2S channels in the same board to transfer data in 4-wire mode\n\r"
00059         "********************************************************************************\n\r";
00060 volatile uint8_t  I2STXDone = 0;
00061 volatile uint8_t  I2SRXDone = 0;
00062
00063 volatile uint32_t *I2STXBuffer = (uint32_t*)(I2S_BUFFER_SRC);
00064 volatile uint32_t *I2SRXBuffer = (uint32_t *)(I2S_BUFFER_DST);
00065
00066 volatile uint32_t I2SReadLength = 0;
00067 volatile uint32_t I2SWriteLength = 0;
00068
00069
00070 /************************** PRIVATE FUNCTIONS *************************/
00071 void Buffer_Init(void);
00072 Bool Buffer_Verify(void);
00073 void print_menu(void);
00074
00075 /*-------------------------PRIVATE FUNCTIONS------------------------------*/
00076 /*********************************************************************/
00081 void Buffer_Init(void) {
00082         uint32_t i;
00083
00084         for (i = 0; i < BUFFER_SIZE; i++) {
00085                 I2STXBuffer[i] = i;
00086                 I2SRXBuffer[i] = 0;
00087         }
00088 }
00089
00090 /*********************************************************************/
00096 Bool Buffer_Verify(void) {
00097         uint32_t i;
00098         uint32_t *pTX = (uint32_t *) &I2STXBuffer[0];
00099         /* Generally, first element of RX buffer is a dummy data, so
00100          * it will be discarded
00101          */
00102         uint32_t *pRX = (uint32_t *) &I2SRXBuffer[1];
00103
00104         for (i = 1; i < BUFFER_SIZE; i++) {
00105                 if (*pTX++ != *pRX++)  {
00106                         return FALSE;
00107                 }
00108         }
00109         return TRUE;
00110 }
00111 /*********************************************************************/
00116 void print_menu(void)
00117 {
00118         _DBG_(menu);
00119 }
00120
00121 /*-------------------------MAIN FUNCTION------------------------------*/
00122 /*********************************************************************/
00127 int c_entry (void) {
00128         uint32_t i;
00129         uint8_t dummy=0;
00130         I2S_MODEConf_Type I2S_ClkConfig;
00131         I2S_CFG_Type I2S_ConfigStruct;
00132         PINSEL_CFG_Type PinCfg;
00133
00134         /* Initialize debug via UART0
00135          * – 115200bps
00136          * – 8 data bit
00137          * – No parity
00138          * – 1 stop bit
00139          * – No flow control
00140          */
00141         debug_frmwrk_init();
00142
00143         //print menu screen
00144         print_menu();
00145
00146         Buffer_Init();
00147
00148         /* Pin configuration:
00149          * Assign:      - P0.4 as I2SRX_CLK
00150          *                      - P0.5 as I2SRX_WS
00151          *                      - P0.6 as I2SRX_SDA
00152          *                      - P0.7 as I2STX_CLK
00153          *                      - P0.8 as I2STX_WS
00154          *                      - P0.9 as I2STX_SDA
00155          */
00156         PinCfg.Funcnum = 1;
00157         PinCfg.OpenDrain = 0;
00158         PinCfg.Pinmode = 0;
00159         PinCfg.Pinnum = 4;
00160         PinCfg.Portnum = 0;
00161         PINSEL_ConfigPin(&PinCfg);
00162         PinCfg.Pinnum = 5;
00163         PINSEL_ConfigPin(&PinCfg);
00164         PinCfg.Pinnum = 6;
00165         PINSEL_ConfigPin(&PinCfg);
00166         PinCfg.Pinnum = 7;
00167         PINSEL_ConfigPin(&PinCfg);
00168         PinCfg.Pinnum = 8;
00169         PINSEL_ConfigPin(&PinCfg);
00170         PinCfg.Pinnum = 9;
00171         PINSEL_ConfigPin(&PinCfg);
00172
00173         I2S_Init(LPC_I2S);
00174
00175         //Setup for I2S: RX is similar with TX
00176         /* setup:
00177          *              - wordwidth: 16 bits
00178          *              - stereo mode
00179          *              - master mode for I2S_TX and slave for I2S_RX
00180          *              - ws_halfperiod is 31
00181          *              - not use mute mode
00182          *              - use reset and stop mode
00183          *              - select the fractional rate divider clock output as the source,
00184          *              - disable 4-pin mode
00185          *              - MCLK ouput is disable
00186          *              - Frequency = 44.1 kHz (x=8,y=51 - automatic setting)
00187          * Because we use mode I2STXMODE[3:0]= 0000, I2SDAO[5]=0 and
00188          * I2SRX[3:0]=0000, I2SDAI[5] = 1. So we have I2SRX_CLK = I2STX_CLK
00189          * --> I2SRXBITRATE = 1 (not divide TXCLK to produce RXCLK)
00190          */
00191
00192         /* Audio Config*/
00193         I2S_ConfigStruct.wordwidth = I2S_WORDWIDTH_16;
00194         I2S_ConfigStruct.mono = I2S_STEREO;
00195         I2S_ConfigStruct.stop = I2S_STOP_ENABLE;
00196         I2S_ConfigStruct.reset = I2S_RESET_ENABLE;
00197         I2S_ConfigStruct.ws_sel = I2S_MASTER_MODE;
00198         I2S_ConfigStruct.mute = I2S_MUTE_DISABLE;
00199         I2S_Config(LPC_I2S,I2S_TX_MODE,&I2S_ConfigStruct);
00200
00201         I2S_ConfigStruct.ws_sel = I2S_SLAVE_MODE;
00202         I2S_Config(LPC_I2S,I2S_RX_MODE,&I2S_ConfigStruct);
00203
00204         /* Clock Mode Config*/
00205         I2S_ClkConfig.clksel = I2S_CLKSEL_FRDCLK;
00206         I2S_ClkConfig.fpin = I2S_4PIN_DISABLE;
00207         I2S_ClkConfig.mcena = I2S_MCLK_DISABLE;
00208         I2S_ModeConfig(LPC_I2S,&I2S_ClkConfig,I2S_TX_MODE);
00209         I2S_ClkConfig.fpin = I2S_4PIN_ENABLE;
00210         I2S_ModeConfig(LPC_I2S,&I2S_ClkConfig,I2S_RX_MODE);
00211
00212         /* Set up frequency and bit rate*/
00213         I2S_FreqConfig(LPC_I2S, 44100, I2S_TX_MODE);
00214
00215          I2S_Start(LPC_I2S);
00216          while(I2STXDone == 0||I2SRXDone == 0){
00217            if(I2STXDone ==0){
00218                          while (I2S_GetLevel(LPC_I2S,I2S_TX_MODE)!=0x00);
00219                          I2S_Send(LPC_I2S,I2STXBuffer[I2SWriteLength]);
00220                          I2SWriteLength +=1;
00221                          if(I2SWriteLength == BUFFER_SIZE) I2STXDone = 1;
00222
00223                 }
00224                 if(I2SRXDone == 0)
00225                 {
00226                         while(I2S_GetLevel(LPC_I2S,I2S_RX_MODE)==0x00);
00227                         if(dummy == 0) //dummy receive
00228                         {
00229                                 i = I2S_Receive(LPC_I2S);
00230                                         dummy = 1;
00231                         }
00232                         else
00233                         {
00234                                 *(uint32_t *)(&I2SRXBuffer[I2SReadLength]) = I2S_Receive(LPC_I2S);
00235                                 I2SReadLength +=1;
00236                         }
00237                         if(I2SReadLength == BUFFER_SIZE) I2SRXDone = 1;
00238                 }
00239          }
00240          for(i=0;i<BUFFER_SIZE;i++)
00241          {
00242                  _DBH32(I2SRXBuffer[i]);_DBG_("");
00243          }
00244          if(Buffer_Verify())
00245          {
00246                  _DBG_("Verify Buffer: OK...");
00247          }
00248          else
00249          {
00250                  _DBG_("Verify Buffer: ERROR...");
00251          }
00252          while(1);
00253 }
00254
00255 /* With ARM and GHS toolsets, the entry point is main() - this will
00256    allow the linker to generate wrapper code to setup stacks, allocate
00257    heap area, and initialize and copy code and data segments. For GNU
00258    toolsets, the entry point is through __start() in the crt0_gnu.asm
00259    file, and that startup code will setup stacks and data */
00260 int main(void)
00261 {
00262     return c_entry();
00263 }
00264
00265 #ifdef  DEBUG
00266 /*******************************************************************************
00267 * @brief                Reports the name of the source file and the source line number
00268 *                               where the CHECK_PARAM error has occurred.
00269 * @param[in]    file Pointer to the source file name
00270 * @param[in]    line assert_param error line source number
00271 * @return               None
00272 *******************************************************************************/
00273 void check_failed(uint8_t *file, uint32_t line)
00274 {
00275         /* User can add his own implementation to report the file name and line number,
00276          ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
00277
00278         /* Infinite loop */
00279         while(1);
00280 }
00281 #endif
00282
00283 /*
00284  * @}
00285  */
Generated on Tue Jun 7 14:59:01 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/I2S/I2S_two_kit/i2s_two_kit.c Source File

C:/nxpdrv/LPC1700CMSIS/Examples/I2S/I2S_two_kit/i2s_two_kit.c

Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          i2s_two_kit.c                           2010-05-21
00003 */
00026 #include "lpc17xx_i2s.h"
00027 #include "lpc17xx_libcfg.h"
00028 #include "lpc17xx_pinsel.h"
00029 #include "debug_frmwrk.h"
00030
00031
00032 /* Example group ----------------------------------------------------------- */
00038 /************************** PRIVATE DEFINITIONS *************************/
00039 #define I2S_TRANSMIT                    0
00040 #define I2S_RECEIVE                             !I2S_TRANSMIT
00041
00042
00043 /************************** PRIVATE VARIABLE ***********************/
00044 uint8_t menu[]=
00045         "********************************************************************************\n\r"
00046         "Hello NXP Semiconductors \n\r"
00047         " I2S polling mode demo \n\r"
00048         "\t - MCU: LPC17xx \n\r"
00049         "\t - Core: ARM CORTEX-M3 \n\r"
00050         "\t - Communicate via: UART0 - 115200 bps \n\r"
00051         " Use two I2S channels on 2 board to transfer data \n\r"
00052         "********************************************************************************\n\r";
00053 uint8_t tx_depth_irq = 0;
00054 uint8_t rx_depth_irq = 0;
00055 uint32_t data;
00056
00057 /************************** PRIVATE FUNCTIONS *************************/
00058 /* Interrupt service routine */
00059 void I2S_IRQHandler(void);
00060
00061 void print_menu(void);
00062
00063 /*----------------- INTERRUPT SERVICE ROUTINES --------------------------*/
00064 /*********************************************************************/
00069 void I2S_IRQHandler()
00070 {
00071         uint8_t rx_level,
00072                         tx_level,
00073                         tx_depth_irq,
00074                         rx_depth_irq;
00075         uint32_t data;
00076         uint8_t i;
00077
00078         if(I2S_GetIRQStatus(LPC_I2S, I2S_RX_MODE)){ //receive interrupt
00079                 rx_level = I2S_GetLevel(LPC_I2S, I2S_RX_MODE);
00080                 rx_depth_irq = I2S_GetIRQDepth(LPC_I2S, I2S_RX_MODE);
00081
00082                 if (rx_level >= rx_depth_irq)//receive interrupt
00083                 {
00084                         while(I2S_GetLevel(LPC_I2S, I2S_RX_MODE)>0)
00085                         {
00086                                 data = I2S_Receive(LPC_I2S);
00087                                 _DBH32(data); _DBG_("");
00088                         }
00089                 }
00090         }
00091         else if (I2S_GetIRQStatus(LPC_I2S, I2S_TX_MODE))
00092         {
00093                 tx_level = I2S_GetLevel(LPC_I2S, I2S_TX_MODE);
00094                 tx_depth_irq = I2S_GetIRQDepth(LPC_I2S, I2S_TX_MODE);
00095                 if(tx_level <= tx_depth_irq)//transmit interrupt
00096                 {
00097                         for(i=0;i<4;i++)
00098                         {
00099                                 I2S_Send(LPC_I2S,data);
00100                                 _DBH32(data);
00101                                 _DBG_(" Send successful!!!");
00102                                 data++;
00103                                 if(data == 0xFFFFFFFF) data  = 0;
00104                         }
00105                 }
00106         }
00107 }
00108
00109 /*-------------------------PRIVATE FUNCTIONS------------------------------*/
00110 /*********************************************************************/
00115 void print_menu()
00116 {
00117         _DBG_(menu);
00118 }
00119
00120
00121 /*-------------------------MAIN FUNCTION------------------------------*/
00122 /*********************************************************************/
00127 int c_entry (void) {
00128         I2S_MODEConf_Type I2S_ClkConfig;
00129         I2S_CFG_Type I2S_ConfigStruct;
00130         PINSEL_CFG_Type PinCfg;
00131
00132         /* Initialize debug via UART0
00133          * – 115200bps
00134          * – 8 data bit
00135          * – No parity
00136          * – 1 stop bit
00137          * – No flow control
00138          */
00139         debug_frmwrk_init();
00140
00141         //print menu screen
00142         print_menu();
00143
00144         NVIC_EnableIRQ(I2S_IRQn);
00145         //Setup for I2S: RX is similar with TX
00146         /* setup:
00147          *              - wordwidth: 16 bits
00148          *              - stereo mode
00149          *              - master mode for I2S_TX and slave for I2S_RX
00150          *              - ws_halfperiod is 31
00151          *              - not use mute mode
00152          *              - use reset and stop mode
00153          *              - select the fractional rate divider clock output as the source,
00154          *              - disable 4-pin mode
00155          *              - MCLK ouput is disable
00156          *              - Frequency = 44.1 kHz (x=8,y=51 - automatic setting)
00157          * Because we use mode I2STXMODE[3:0]= 0000, I2SDAO[5]=0 and
00158          * I2SRX[3:0]=0000, I2SDAI[5] = 1. So we have I2SRX_CLK = I2STX_CLK
00159          * --> I2SRXBITRATE = 1 (not divide TXCLK to produce RXCLK)
00160          */
00161
00162 #if I2S_TRANSMIT
00163         /* Pin configuration for I2S Transmitter:
00164          * Assign:      - P0.7 as I2STX_CLK
00165          *                      - P0.8 as I2STX_WS
00166          *                      - P0.9 as I2STX_SDA
00167          */
00168         PinCfg.Funcnum = 1;
00169         PinCfg.OpenDrain = 0;
00170         PinCfg.Pinmode = 0;
00171         PinCfg.Pinnum = 7;
00172         PinCfg.Portnum = 0;
00173         PINSEL_ConfigPin(&PinCfg);
00174         PinCfg.Pinnum = 8;
00175         PINSEL_ConfigPin(&PinCfg);
00176         PinCfg.Pinnum = 9;
00177         PINSEL_ConfigPin(&PinCfg);
00178
00179         I2S_Init(LPC_I2S);
00180
00181         /* Audio Config*/
00182         I2S_ConfigStruct.wordwidth = I2S_WORDWIDTH_16;
00183         I2S_ConfigStruct.mono = I2S_STEREO;
00184         I2S_ConfigStruct.stop = I2S_STOP_ENABLE;
00185         I2S_ConfigStruct.reset = I2S_RESET_ENABLE;
00186         I2S_ConfigStruct.ws_sel = I2S_SLAVE_MODE;
00187         I2S_ConfigStruct.mute = I2S_MUTE_ENABLE;
00188         I2S_Config(LPC_I2S,I2S_TX_MODE,&I2S_ConfigStruct);
00189
00190         /* Clock Mode Config*/
00191         I2S_ClkConfig.clksel = I2S_CLKSEL_FRDCLK;
00192         I2S_ClkConfig.fpin = I2S_4PIN_DISABLE;
00193         I2S_ClkConfig.mcena = I2S_MCLK_DISABLE;
00194         I2S_ModeConfig(LPC_I2S,&I2S_ClkConfig,I2S_TX_MODE);
00195
00196         LPC_I2S->I2STXRATE = 0x00;
00197         LPC_I2S->I2STXBITRATE = 0x00;
00198         I2S_SetBitRate(LPC_I2S, 0, I2S_TX_MODE);
00199
00200         I2S_Start(LPC_I2S);
00201         I2S_IRQConfig(LPC_I2S,I2S_TX_MODE,4);
00202         I2S_IRQCmd(LPC_I2S,I2S_TX_MODE,ENABLE);
00203
00204 #else
00205         /* Pin configuration for I2S Receiver:
00206          * Assign:      - P0.4 as I2SRX_CLK
00207          *                      - P0.5 as I2SRX_WS
00208          *                      - P0.6 as I2SRX_SDA
00209          */
00210         PinCfg.Funcnum = 1;
00211         PinCfg.OpenDrain = 0;
00212         PinCfg.Pinmode = 0;
00213         PinCfg.Pinnum = 4;
00214         PinCfg.Portnum = 0;
00215         PINSEL_ConfigPin(&PinCfg);
00216         PinCfg.Pinnum = 5;
00217         PINSEL_ConfigPin(&PinCfg);
00218         PinCfg.Pinnum = 6;
00219         PINSEL_ConfigPin(&PinCfg);
00220
00221         I2S_Init(LPC_I2S);
00222
00223         I2S_ConfigStruct.wordwidth = I2S_WORDWIDTH_16;
00224         I2S_ConfigStruct.mono = I2S_STEREO;
00225         I2S_ConfigStruct.stop = I2S_STOP_ENABLE;
00226         I2S_ConfigStruct.reset = I2S_RESET_ENABLE;
00227         I2S_ConfigStruct.ws_sel = I2S_MASTER_MODE;
00228         I2S_ConfigStruct.mute = I2S_MUTE_DISABLE;
00229         I2S_Config(LPC_I2S,I2S_RX_MODE,&I2S_ConfigStruct);
00230
00231         /* Clock Mode Config*/
00232         I2S_ClkConfig.clksel = I2S_CLKSEL_FRDCLK;
00233         I2S_ClkConfig.fpin = I2S_4PIN_DISABLE;
00234         I2S_ClkConfig.mcena = I2S_MCLK_DISABLE;
00235         I2S_ModeConfig(LPC_I2S,&I2S_ClkConfig,I2S_RX_MODE);
00236
00237         /* Set up frequency and bit rate*/
00238         I2S_FreqConfig(LPC_I2S, 44100, I2S_RX_MODE);
00239         I2S_IRQConfig(LPC_I2S,I2S_RX_MODE,4);
00240         I2S_IRQCmd(LPC_I2S,I2S_RX_MODE,ENABLE);
00241
00242         _DBG_("Press '1' to start I2S operation...");
00243         while(_DG !='1');
00244         I2S_Start(LPC_I2S);
00245         _DBG_("I2S Start ...");
00246 #endif
00247         while(1);
00248 }
00249
00250 /* With ARM and GHS toolsets, the entry point is main() - this will
00251    allow the linker to generate wrapper code to setup stacks, allocate
00252    heap area, and initialize and copy code and data segments. For GNU
00253    toolsets, the entry point is through __start() in the crt0_gnu.asm
00254    file, and that startup code will setup stacks and data */
00255 int main(void)
00256 {
00257     return c_entry();
00258 }
00259
00260 #ifdef  DEBUG
00261 /*******************************************************************************
00262 * @brief                Reports the name of the source file and the source line number
00263 *                               where the CHECK_PARAM error has occurred.
00264 * @param[in]    file Pointer to the source file name
00265 * @param[in]    line assert_param error line source number
00266 * @return               None
00267 *******************************************************************************/
00268 void check_failed(uint8_t *file, uint32_t line)
00269 {
00270         /* User can add his own implementation to report the file name and line number,
00271          ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
00272
00273         /* Infinite loop */
00274         while(1);
00275 }
00276 #endif
00277
00278 /*
00279  * @}
00280  */
Generated on Tue Jun 7 14:59:01 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/uip/lc-addrlabels.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/uip/lc-addrlabels.h

Go to the documentation of this file.
00001 /*
00002  * Copyright (c) 2004-2005, Swedish Institute of Computer Science.
00003  * All rights reserved.
00004  *
00005  * Redistribution and use in source and binary forms, with or without
00006  * modification, are permitted provided that the following conditions
00007  * are met:
00008  * 1. Redistributions of source code must retain the above copyright
00009  *    notice, this list of conditions and the following disclaimer.
00010  * 2. Redistributions in binary form must reproduce the above copyright
00011  *    notice, this list of conditions and the following disclaimer in the
00012  *    documentation and/or other materials provided with the distribution.
00013  * 3. Neither the name of the Institute nor the names of its contributors
00014  *    may be used to endorse or promote products derived from this software
00015  *    without specific prior written permission.
00016  *
00017  * THIS SOFTWARE IS PROVIDED BY THE INSTITUTE AND CONTRIBUTORS ``AS IS'' AND
00018  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
00019  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
00020  * ARE DISCLAIMED.  IN NO EVENT SHALL THE INSTITUTE OR CONTRIBUTORS BE LIABLE
00021  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
00022  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
00023  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
00024  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
00025  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
00026  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
00027  * SUCH DAMAGE.
00028  *
00029  * This file is part of the uIP TCP/IP stack
00030  *
00031  * Author: Adam Dunkels <adam@sics.se>
00032  *
00033  * $Id: lc-addrlabels.h,v 1.3 2006/06/12 08:00:30 adam Exp $
00034  */
00035
00060 #ifndef __LC_ADDRLABELS_H__
00061 #define __LC_ADDRLABELS_H__
00062
00064 typedef void * lc_t;
00065
00066 #define LC_INIT(s) s = NULL
00067
00068
00069 #define LC_RESUME(s)                            \
00070   do {                                          \
00071     if(s != NULL) {                             \
00072       goto *s;                                  \
00073     }                                           \
00074   } while(0)
00075
00076 #define LC_SET(s)                               \
00077   do { ({ __label__ resume; resume: (s) = &&resume; }); }while(0)
00078
00079 #define LC_END(s)
00080
00081 #endif /* __LC_ADDRLABELS_H__ */
00082
Generated on Tue Jun 7 14:59:00 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/uip/lc-switch.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/uip/lc-switch.h

Go to the documentation of this file.
00001 /*
00002  * Copyright (c) 2004-2005, Swedish Institute of Computer Science.
00003  * All rights reserved.
00004  *
00005  * Redistribution and use in source and binary forms, with or without
00006  * modification, are permitted provided that the following conditions
00007  * are met:
00008  * 1. Redistributions of source code must retain the above copyright
00009  *    notice, this list of conditions and the following disclaimer.
00010  * 2. Redistributions in binary form must reproduce the above copyright
00011  *    notice, this list of conditions and the following disclaimer in the
00012  *    documentation and/or other materials provided with the distribution.
00013  * 3. Neither the name of the Institute nor the names of its contributors
00014  *    may be used to endorse or promote products derived from this software
00015  *    without specific prior written permission.
00016  *
00017  * THIS SOFTWARE IS PROVIDED BY THE INSTITUTE AND CONTRIBUTORS ``AS IS'' AND
00018  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
00019  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
00020  * ARE DISCLAIMED.  IN NO EVENT SHALL THE INSTITUTE OR CONTRIBUTORS BE LIABLE
00021  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
00022  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
00023  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
00024  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
00025  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
00026  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
00027  * SUCH DAMAGE.
00028  *
00029  * This file is part of the uIP TCP/IP stack
00030  *
00031  * Author: Adam Dunkels <adam@sics.se>
00032  *
00033  * $Id: lc-switch.h,v 1.2 2006/06/12 08:00:30 adam Exp $
00034  */
00035
00057 #ifndef __LC_SWITCH_H__
00058 #define __LC_SWTICH_H__
00059
00060 /* WARNING! lc implementation using switch() does not work if an
00061    LC_SET() is done within another switch() statement! */
00062
00064 typedef unsigned short lc_t;
00065
00066 #define LC_INIT(s) s = 0;
00067
00068 #define LC_RESUME(s) switch(s) { case 0:
00069
00070 #define LC_SET(s) s = __LINE__; case __LINE__:
00071
00072 #define LC_END(s) }
00073
00074 #endif /* __LC_SWITCH_H__ */
00075
Generated on Tue Jun 7 14:59:00 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/uip/lc.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/uip/lc.h

Go to the documentation of this file.
00001 /*
00002  * Copyright (c) 2004-2005, Swedish Institute of Computer Science.
00003  * All rights reserved.
00004  *
00005  * Redistribution and use in source and binary forms, with or without
00006  * modification, are permitted provided that the following conditions
00007  * are met:
00008  * 1. Redistributions of source code must retain the above copyright
00009  *    notice, this list of conditions and the following disclaimer.
00010  * 2. Redistributions in binary form must reproduce the above copyright
00011  *    notice, this list of conditions and the following disclaimer in the
00012  *    documentation and/or other materials provided with the distribution.
00013  * 3. Neither the name of the Institute nor the names of its contributors
00014  *    may be used to endorse or promote products derived from this software
00015  *    without specific prior written permission.
00016  *
00017  * THIS SOFTWARE IS PROVIDED BY THE INSTITUTE AND CONTRIBUTORS ``AS IS'' AND
00018  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
00019  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
00020  * ARE DISCLAIMED.  IN NO EVENT SHALL THE INSTITUTE OR CONTRIBUTORS BE LIABLE
00021  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
00022  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
00023  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
00024  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
00025  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
00026  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
00027  * SUCH DAMAGE.
00028  *
00029  * This file is part of the uIP TCP/IP stack
00030  *
00031  * Author: Adam Dunkels <adam@sics.se>
00032  *
00033  * $Id: lc.h,v 1.2 2006/06/12 08:00:30 adam Exp $
00034  */
00035
00066 #ifdef DOXYGEN
00067
00075 #define LC_INIT(lc)
00076
00088 #define LC_SET(lc)
00089
00100 #define LC_RESUME(lc)
00101
00112 #define LC_END(lc)
00113
00121 #endif /* DOXYGEN */
00122
00123 #ifndef __LC_H__
00124 #define __LC_H__
00125
00126 #ifdef LC_CONF_INCLUDE
00127 #include LC_CONF_INCLUDE
00128 #else
00129 #include "lc-switch.h"
00130 #endif /* LC_CONF_INCLUDE */
00131
00132 #endif /* __LC_H__ */
00133
Generated on Tue Jun 7 14:59:00 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/EmacRaw/libnosys_gnu.c Source File

C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/EmacRaw/libnosys_gnu.c

Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          libnosys_gnu.c                                  2008-12-01
00003 */
00026 #if defined(__GNUC__)
00027
00028 #include "lpc_types.h"
00029 #include <errno.h>
00030 #include <sys/times.h>
00031 #include <sys/stat.h>
00032
00033 /* errno definition */
00034 #undef errno
00035 extern int errno;
00036
00037 char *__env[1] = { 0 };
00038 char **environ = __env;
00039
00040 int _close(int file)
00041 {
00042   return -1;
00043 }
00044
00045 int _execve(char *name, char **argv, char **env)
00046 {
00047   errno = ENOMEM;
00048   return -1;
00049 }
00050 int _exit()
00051 {
00052   return 0;
00053 }
00054
00055 int _fork()
00056 {
00057   errno = EAGAIN;
00058   return -1;
00059 }
00060
00061 int _fstat(int file, struct stat *st)
00062 {
00063   st->st_mode = S_IFCHR;
00064   return 0;
00065 }
00066
00067 int _getpid()
00068 {
00069   return 1;
00070 }
00071
00072 int _kill(int pid, int sig)
00073 {
00074   errno = EINVAL;
00075   return(-1);
00076 }
00077
00078 int isatty(int fildes)
00079 {
00080   return 1;
00081 }
00082 int _isatty(int fildes)
00083 {
00084   return 1;
00085 }
00086
00087 int _link(char *old, char *new)
00088 {
00089   errno = EMLINK;
00090   return -1;
00091 }
00092
00093 int _lseek(int file, int ptr, int dir)
00094 {
00095   return 0;
00096 }
00097
00098 int _open(const char *name, int flags, int mode)
00099 {
00100   return -1;
00101 }
00102
00103 int _read(int file, char *ptr, int len)
00104 {
00105   return 0;
00106 }
00107
00108 caddr_t _sbrk(int incr)
00109 {
00110   extern char estack;           /* Defined by the linker */
00111   static char *heap_end;
00112   char *prev_heap_end;
00113
00114   if (heap_end == 0)
00115   {
00116     heap_end = &estack;
00117     /* give 16KB area for stacks and use the rest of memory for heap*/
00118     heap_end += 0x4000;
00119   }
00120   prev_heap_end = heap_end;
00121
00122   heap_end += incr;
00123   return (caddr_t) prev_heap_end;
00124 }
00125
00126 int _stat(char *file, struct stat *st)
00127 {
00128   st->st_mode = S_IFCHR;
00129   return 0;
00130 }
00131 int _times(struct tms *buf)
00132 {
00133   return -1;
00134 }
00135
00136 int _unlink(char *name)
00137 {
00138   errno = ENOENT;
00139   return -1;
00140 }
00141
00142 int _wait(int *status)
00143 {
00144   errno = ECHILD;
00145   return -1;
00146 }
00147
00148 int _write(int file, char *ptr, int len)
00149 {
00150   return 0;
00151 }
00152
00153 #endif /*__GNUC__*/
Generated on Tue Jun 7 14:58:59 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/GPDMA/Link_list/link_list.c Source File

C:/nxpdrv/LPC1700CMSIS/Examples/GPDMA/Link_list/link_list.c

Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          link_list.c                             2010-06-16
00003 */
00025 #include "lpc17xx_gpdma.h"
00026 #include "lpc17xx_libcfg.h"
00027 #include "debug_frmwrk.h"
00028
00029 /* Example group ----------------------------------------------------------- */
00035 /************************** PRIVATE DEFINTIONS*************************/
00037 #define DMA_SIZE                32
00038
00039 /************************** PRIVATE VARIABLES *************************/
00040 uint8_t menu[]=
00041         "********************************************************************************\n\r"
00042         "Hello NXP Semiconductors \n\r"
00043         "GPDMA demo \n\r"
00044         "\t - MCU: LPC17xx \n\r"
00045         "\t - Core: ARM CORTEX-M3 \n\r"
00046         "\t - Communicate via: UART0 - 115200 bps \n\r"
00047         "This example used to test GPDMA link list function \n\r"
00048         "********************************************************************************\n\r";
00049 uint8_t menu2[] = "Demo terminated! \n\r";
00050 uint8_t err_menu[] = "Buffer Check fail!\n\r";
00051 uint8_t compl_menu[] = "Buffer Check success!\n\r";
00052
00053 uint32_t DMADest_Buffer[DMA_SIZE];
00054
00055 #if (defined (__ICCARM__))
00056 #pragma location = "data_init"
00057 uint32_t const DMASrc_Buffer1[DMA_SIZE/2] =
00058 #else
00059 uint32_t DMASrc_Buffer1[DMA_SIZE/2] __attribute__((at(0x2007C000))) =
00060 #endif
00061 {
00062         0x01020304,0x05060708,0x090A0B0C,0x0D0E0F10,
00063         0x11121314,0x15161718,0x191A1B1C,0x1D1E1F20,
00064         0x21222324,0x25262728,0x292A2B2C,0x2D2E2F30,
00065         0x31323334,0x35363738,0x393A3B3C,0x3D3E3F40
00066 };
00067
00068 // Terminal Counter flag for Channel 0
00069 __IO uint32_t Channel0_TC;
00070
00071 // Error Counter flag for Channel 0
00072 __IO uint32_t Channel0_Err;
00073
00074 #if (defined (__ICCARM__))
00075 #pragma location = "data_init"
00076 uint32_t const DMASrc_Buffer2[DMA_SIZE/2] =
00077 #else
00078 uint32_t DMASrc_Buffer2[DMA_SIZE/2] __attribute__((at(0x2007C200)))=
00079 #endif
00080 {
00081         0x41424344,0x45464748,0x494A4B4C,0x4D4E4F50,
00082         0x51525354,0x55565758,0x595A5B5C,0x5D5E5F60,
00083         0x61626364,0x65666768,0x696A6B6C,0x6D6E6F70,
00084         0x71727374,0x75767778,0x797A7B7C,0x7D7E7F80
00085 };
00086
00087 /*-------------------------MAIN FUNCTION------------------------------*/
00088 void DMA_IRQHandler (void);
00089
00090 void print_menu(void);
00091 void Error_Loop(void);
00092
00093 /*----------------- INTERRUPT SERVICE ROUTINES --------------------------*/
00094 /*********************************************************************/
00099 void DMA_IRQHandler (void)
00100 {
00101         // check GPDMA interrupt on channel 0
00102         if (GPDMA_IntGetStatus(GPDMA_STAT_INT, 0)){ //check interrupt status on channel 0
00103                 // Check counter terminal status
00104                 if(GPDMA_IntGetStatus(GPDMA_STAT_INTTC, 0)){
00105                         // Clear terminate counter Interrupt pending
00106                         GPDMA_ClearIntPending (GPDMA_STATCLR_INTTC, 0);
00107                                 Channel0_TC++;
00108                 }
00109                 if (GPDMA_IntGetStatus(GPDMA_STAT_INTERR, 0)){
00110                         // Clear error counter Interrupt pending
00111                         GPDMA_ClearIntPending (GPDMA_STATCLR_INTERR, 0);
00112                         Channel0_Err++;
00113                 }
00114         }
00115 }
00116
00117 /*-------------------------PRIVATE FUNCTIONS-----------------------------*/
00118 /*********************************************************************/
00123 void print_menu(void)
00124 {
00125         _DBG(menu);
00126 }
00127
00128
00129 /*********************************************************************/
00134 void Buffer_Verify(void)
00135 {
00136         uint8_t i;
00137         uint32_t *src_addr = (uint32_t *)DMASrc_Buffer1;
00138         uint32_t *dest_addr = (uint32_t *)DMADest_Buffer;
00139
00140         for ( i = 0; i < DMA_SIZE/2; i++ )
00141         {
00142                 if ( *src_addr++ != *dest_addr++ )
00143                 {
00144                         /* Call Error Loop */
00145                         Error_Loop();
00146                 }
00147         }
00148         src_addr = (uint32_t *)DMASrc_Buffer2;
00149         for ( i = 0; i < DMA_SIZE/2; i++ )
00150         {
00151                 if ( *src_addr++ != *dest_addr++ )
00152                 {
00153                         /* Call Error Loop */
00154                         Error_Loop();
00155                 }
00156         }
00157 }
00158
00159
00160 /*********************************************************************/
00165 void Error_Loop(void)
00166 {
00167         _DBG(err_menu);
00168
00169         /* Loop forever */
00170         while (1);
00171 }
00172
00173
00174 /*-------------------------MAIN FUNCTION--------------------------------*/
00175 /*********************************************************************/
00180 int c_entry(void)
00181 {
00182         GPDMA_Channel_CFG_Type GPDMACfg;
00183         GPDMA_LLI_Type DMA_LLI_Struct[2];
00184
00185         /* Initialize debug via UART0
00186          * – 115200bps
00187          * – 8 data bit
00188          * – No parity
00189          * – 1 stop bit
00190          * – No flow control
00191          */
00192         debug_frmwrk_init();
00193
00194         // print welcome screen
00195         print_menu();
00196
00197         /* GPDMA block section -------------------------------------------- */
00198     /* Disable GPDMA interrupt */
00199     NVIC_DisableIRQ(DMA_IRQn);
00200     /* preemption = 1, sub-priority = 1 */
00201     NVIC_SetPriority(DMA_IRQn, ((0x01<<3)|0x01));
00202
00203     /* Initialize GPDMA controller */
00204         GPDMA_Init();
00205
00206         /* Init GPDMA link list */
00207         DMA_LLI_Struct[0].SrcAddr = (uint32_t)&DMASrc_Buffer1;
00208         DMA_LLI_Struct[0].DstAddr = (uint32_t)&DMADest_Buffer;
00209         DMA_LLI_Struct[0].NextLLI = (uint32_t)&DMA_LLI_Struct[1];
00210         DMA_LLI_Struct[0].Control = (DMA_SIZE/2)
00211                                                                 | (2<<18) //source width 32 bit
00212                                                                 | (2<<21) //dest. width 32 bit
00213                                                                 | (1<<26) //source increment
00214                                                                 | (1<<27)
00215                                                                 ;
00216         DMA_LLI_Struct[1].SrcAddr = (uint32_t)&DMASrc_Buffer2;
00217         DMA_LLI_Struct[1].DstAddr = ((uint32_t)&DMADest_Buffer) + (DMA_SIZE/2)*4;
00218         DMA_LLI_Struct[1].NextLLI = 0;
00219         DMA_LLI_Struct[1].Control = (DMA_SIZE/2)
00220                                                                 | (2<<18) //source width 32 bit
00221                                                                 | (2<<21) //dest. width 32 bit
00222                                                                 | (1<<26) //source increment
00223                                                                 | (1<<27)
00224                                                                 ;
00225
00226         // Setup GPDMA channel --------------------------------
00227         // channel 0
00228         GPDMACfg.ChannelNum = 0;
00229         // Source memory
00230         GPDMACfg.SrcMemAddr = (uint32_t)DMASrc_Buffer1;
00231         // Destination memory
00232         GPDMACfg.DstMemAddr = (uint32_t)DMADest_Buffer;
00233         // Transfer size
00234         GPDMACfg.TransferSize = DMA_SIZE;
00235         // Transfer width
00236         GPDMACfg.TransferWidth = GPDMA_WIDTH_WORD;
00237         // Transfer type
00238         GPDMACfg.TransferType = GPDMA_TRANSFERTYPE_M2M;
00239         // Source connection - unused
00240         GPDMACfg.SrcConn = 0;
00241         // Destination connection - unused
00242         GPDMACfg.DstConn = 0;
00243         // Linker List Item
00244         GPDMACfg.DMALLI = (uint32_t)&DMA_LLI_Struct[0];
00245         // Setup channel with given parameter
00246         GPDMA_Setup(&GPDMACfg);
00247
00248         /* Reset terminal counter */
00249         Channel0_TC = 0;
00250         /* Reset Error counter */
00251         Channel0_Err = 0;
00252
00253         _DBG_("Start transfer...");
00254
00255         // Enable GPDMA channel 0
00256         GPDMA_ChannelCmd(0, ENABLE);
00257
00258         /* Enable GPDMA interrupt */
00259         NVIC_EnableIRQ(DMA_IRQn);
00260
00261         /* Wait for GPDMA processing complete */
00262         while ((Channel0_TC == 0) && (Channel0_Err == 0));
00263
00264         /* Verify buffer */
00265         Buffer_Verify();
00266
00267         _DBG(compl_menu);
00268
00269     /* Loop forever */
00270     while(1);
00271     return 1;
00272 }
00273
00274 /* With ARM and GHS toolsets, the entry point is main() - this will
00275  allow the linker to generate wrapper code to setup stacks, allocate
00276  heap area, and initialize and copy code and data segments. For GNU
00277  toolsets, the entry point is through __start() in the crt0_gnu.asm
00278  file, and that startup code will setup stacks and data */
00279 int main(void) {
00280         return c_entry();
00281 }
00282
00283 #ifdef  DEBUG
00284 /*******************************************************************************
00285  * @brief               Reports the name of the source file and the source line number
00286  *                              where the CHECK_PARAM error has occurred.
00287  * @param[in]   file Pointer to the source file name
00288  * @param[in]    line assert_param error line source number
00289  * @return              None
00290  *******************************************************************************/
00291 void check_failed(uint8_t *file, uint32_t line) {
00292         /* User can add his own implementation to report the file name and line number,
00293          ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
00294
00295         /* Infinite loop */
00296         while (1)
00297                 ;
00298 }
00299 #endif
00300
00301 /*
00302  * @}
00303  */
Generated on Tue Jun 7 14:59:01 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Drivers/source/lpc17xx_adc.c Source File

C:/nxpdrv/LPC1700CMSIS/Drivers/source/lpc17xx_adc.c

Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          lpc17xx_adc.c                           2010-06-18
00003 */
00026 /* Peripheral group ----------------------------------------------------------- */
00031 /* Includes ------------------------------------------------------------------- */
00032 #include "lpc17xx_adc.h"
00033 #include "lpc17xx_clkpwr.h"
00034
00035 /* If this source file built with example, the LPC17xx FW library configuration
00036  * file in each example directory ("lpc17xx_libcfg.h") must be included,
00037  * otherwise the default FW library configuration file must be included instead
00038  */
00039 #ifdef __BUILD_WITH_EXAMPLE__
00040 #include "lpc17xx_libcfg.h"
00041 #else
00042 #include "lpc17xx_libcfg_default.h"
00043 #endif /* __BUILD_WITH_EXAMPLE__ */
00044
00045
00046 #ifdef _ADC
00047
00048 /* Public Functions ----------------------------------------------------------- */
00053 /*********************************************************************/
00062 void ADC_Init(LPC_ADC_TypeDef *ADCx, uint32_t rate)
00063 {
00064         uint32_t temp, tmp;
00065
00066         CHECK_PARAM(PARAM_ADCx(ADCx));
00067         CHECK_PARAM(PARAM_ADC_RATE(rate));
00068
00069         // Turn on power and clock
00070         CLKPWR_ConfigPPWR (CLKPWR_PCONP_PCAD, ENABLE);
00071
00072         ADCx->ADCR = 0;
00073
00074         //Enable PDN bit
00075         tmp = ADC_CR_PDN;
00076         // Set clock frequency
00077         temp = CLKPWR_GetPCLK(CLKPWR_PCLKSEL_ADC);
00078         /* The APB clock (PCLK_ADC0) is divided by (CLKDIV+1) to produce the clock for
00079          * A/D converter, which should be less than or equal to 13MHz.
00080          * A fully conversion requires 65 of these clocks.
00081          * ADC clock = PCLK_ADC0 / (CLKDIV + 1);
00082          * ADC rate = ADC clock / 65;
00083          */
00084         temp = (temp /(rate * 65)) - 1;
00085         tmp |=  ADC_CR_CLKDIV(temp);
00086
00087         ADCx->ADCR = tmp;
00088 }
00089
00090
00091 /*********************************************************************/
00096 void ADC_DeInit(LPC_ADC_TypeDef *ADCx)
00097 {
00098         CHECK_PARAM(PARAM_ADCx(ADCx));
00099
00100         // Clear PDN bit
00101         ADCx->ADCR &= ~ADC_CR_PDN;
00102         // Turn on power and clock
00103         CLKPWR_ConfigPPWR (CLKPWR_PCONP_PCAD, DISABLE);
00104 }
00105
00106
00107 /*********************************************************************/
00112 uint32_t ADC_GetData(uint32_t channel)
00113 {
00114         uint32_t adc_value;
00115
00116         CHECK_PARAM(PARAM_ADC_CHANNEL_SELECTION(channel));
00117
00118         adc_value = *(uint32_t *)((&LPC_ADC->ADDR0) + channel);
00119         return ADC_GDR_RESULT(adc_value);
00120 }
00121
00122 /*********************************************************************/
00137 void ADC_StartCmd(LPC_ADC_TypeDef *ADCx, uint8_t start_mode)
00138 {
00139         CHECK_PARAM(PARAM_ADCx(ADCx));
00140         CHECK_PARAM(PARAM_ADC_START_OPT(start_mode));
00141
00142         ADCx->ADCR &= ~ADC_CR_START_MASK;
00143         ADCx->ADCR |=ADC_CR_START_MODE_SEL((uint32_t)start_mode);
00144 }
00145
00146
00147 /*********************************************************************/
00155 void ADC_BurstCmd(LPC_ADC_TypeDef *ADCx, FunctionalState NewState)
00156 {
00157         CHECK_PARAM(PARAM_ADCx(ADCx));
00158
00159         ADCx->ADCR &= ~ADC_CR_BURST;
00160         if (NewState){
00161                 ADCx->ADCR |= ADC_CR_BURST;
00162         }
00163 }
00164
00165 /*********************************************************************/
00173 void ADC_PowerdownCmd(LPC_ADC_TypeDef *ADCx, FunctionalState NewState)
00174 {
00175         CHECK_PARAM(PARAM_ADCx(ADCx));
00176
00177         ADCx->ADCR &= ~ADC_CR_PDN;
00178         if (NewState){
00179                 ADCx->ADCR |= ADC_CR_PDN;
00180         }
00181 }
00182
00183 /*********************************************************************/
00191 void ADC_EdgeStartConfig(LPC_ADC_TypeDef *ADCx, uint8_t EdgeOption)
00192 {
00193         CHECK_PARAM(PARAM_ADCx(ADCx));
00194         CHECK_PARAM(PARAM_ADC_START_ON_EDGE_OPT(EdgeOption));
00195
00196         ADCx->ADCR &= ~ADC_CR_EDGE;
00197         if (EdgeOption){
00198                 ADCx->ADCR |= ADC_CR_EDGE;
00199         }
00200 }
00201
00202 /*********************************************************************/
00216 void ADC_IntConfig (LPC_ADC_TypeDef *ADCx, ADC_TYPE_INT_OPT IntType, FunctionalState NewState)
00217 {
00218         CHECK_PARAM(PARAM_ADCx(ADCx));
00219         CHECK_PARAM(PARAM_ADC_TYPE_INT_OPT(IntType));
00220
00221         ADCx->ADINTEN &= ~ADC_INTEN_CH(IntType);
00222         if (NewState){
00223                 ADCx->ADINTEN |= ADC_INTEN_CH(IntType);
00224         }
00225 }
00226
00227 /*********************************************************************/
00235 void ADC_ChannelCmd (LPC_ADC_TypeDef *ADCx, uint8_t Channel, FunctionalState NewState)
00236 {
00237         CHECK_PARAM(PARAM_ADCx(ADCx));
00238         CHECK_PARAM(PARAM_ADC_CHANNEL_SELECTION(Channel));
00239
00240         if (NewState == ENABLE) {
00241                 ADCx->ADCR |= ADC_CR_CH_SEL(Channel);
00242         } else {
00243                 ADCx->ADCR &= ~ADC_CR_CH_SEL(Channel);
00244         }
00245 }
00246
00247 /*********************************************************************/
00253 uint16_t ADC_ChannelGetData(LPC_ADC_TypeDef *ADCx, uint8_t channel)
00254 {
00255         uint32_t adc_value;
00256
00257         CHECK_PARAM(PARAM_ADCx(ADCx));
00258         CHECK_PARAM(PARAM_ADC_CHANNEL_SELECTION(channel));
00259
00260         adc_value = *(uint32_t *) ((&ADCx->ADDR0) + channel);
00261         return ADC_DR_RESULT(adc_value);
00262 }
00263
00264 /*********************************************************************/
00273 FlagStatus ADC_ChannelGetStatus(LPC_ADC_TypeDef *ADCx, uint8_t channel, uint32_t StatusType)
00274 {
00275         uint32_t temp;
00276
00277         CHECK_PARAM(PARAM_ADCx(ADCx));
00278         CHECK_PARAM(PARAM_ADC_CHANNEL_SELECTION(channel));
00279         CHECK_PARAM(PARAM_ADC_DATA_STATUS(StatusType));
00280
00281         temp =  *(uint32_t *) ((&ADCx->ADDR0) + channel);
00282         if (StatusType) {
00283                 temp &= ADC_DR_DONE_FLAG;
00284         }else{
00285                 temp &= ADC_DR_OVERRUN_FLAG;
00286         }
00287         if (temp) {
00288                 return SET;
00289         } else {
00290                 return RESET;
00291         }
00292
00293 }
00294
00295 /*********************************************************************/
00300 uint32_t ADC_GlobalGetData(LPC_ADC_TypeDef *ADCx)
00301 {
00302         CHECK_PARAM(PARAM_ADCx(ADCx));
00303
00304         return ((uint32_t)(ADCx->ADGDR));
00305 }
00306
00307 /*********************************************************************/
00315 FlagStatus      ADC_GlobalGetStatus(LPC_ADC_TypeDef *ADCx, uint32_t StatusType)
00316 {
00317         uint32_t temp;
00318
00319         CHECK_PARAM(PARAM_ADCx(ADCx));
00320         CHECK_PARAM(PARAM_ADC_DATA_STATUS(StatusType));
00321
00322         temp =  ADCx->ADGDR;
00323         if (StatusType){
00324                 temp &= ADC_DR_DONE_FLAG;
00325         }else{
00326                 temp &= ADC_DR_OVERRUN_FLAG;
00327         }
00328         if (temp){
00329                 return SET;
00330         }else{
00331                 return RESET;
00332         }
00333 }
00334
00339 #endif /* _ADC */
00340
00345 /* --------------------------------- End Of File ------------------------------ */
00346
Generated on Tue Jun 7 14:58:55 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_adc.h Source File

C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_adc.h

Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          lpc17xx_adc.h                   2008-07-27
00003 */
00029 /* Peripheral group ----------------------------------------------------------- */
00035 #ifndef LPC17XX_ADC_H_
00036 #define LPC17XX_ADC_H_
00037
00038 /* Includes ------------------------------------------------------------------- */
00039 #include "LPC17xx.h"
00040 #include "lpc_types.h"
00041
00042
00043 #ifdef __cplusplus
00044 extern "C"
00045 {
00046 #endif
00047
00048 /* Private macros ------------------------------------------------------------- */
00053 /* -------------------------- BIT DEFINITIONS ----------------------------------- */
00054 /*********************************************************************/
00058 #define ADC_CR_CH_SEL(n)        ((1UL << n))
00059
00061 #define ADC_CR_CLKDIV(n)        ((n<<8))
00062
00063 #define ADC_CR_BURST            ((1UL<<16))
00064
00065 #define ADC_CR_PDN                      ((1UL<<21))
00066
00067 #define ADC_CR_START_MASK       ((7UL<<24))
00068
00069 #define ADC_CR_START_MODE_SEL(SEL)      ((SEL<<24))
00070
00071 #define ADC_CR_START_NOW        ((1UL<<24))
00072
00073 #define ADC_CR_START_EINT0      ((2UL<<24))
00074
00075 #define ADC_CR_START_CAP01      ((3UL<<24))
00076
00077 #define ADC_CR_START_MAT01      ((4UL<<24))
00078
00079 #define ADC_CR_START_MAT03      ((5UL<<24))
00080
00081 #define ADC_CR_START_MAT10      ((6UL<<24))
00082
00083 #define ADC_CR_START_MAT11      ((7UL<<24))
00084
00085 #define ADC_CR_EDGE                     ((1UL<<27))
00086
00087 /*********************************************************************/
00091 #define ADC_GDR_RESULT(n)               (((n>>4)&0xFFF))
00092
00093 #define ADC_GDR_CH(n)                   (((n>>24)&0x7))
00094
00096 #define ADC_GDR_OVERRUN_FLAG    ((1UL<<30))
00097
00098 #define ADC_GDR_DONE_FLAG               ((1UL<<31))
00099
00101 #define ADC_GDR_CH_MASK         ((7UL<<24))
00102 /*********************************************************************/
00107 #define ADC_INTEN_CH(n)                 ((1UL<<n))
00108
00109 #define ADC_INTEN_GLOBAL                ((1UL<<8))
00110
00111 /*********************************************************************/
00115 #define ADC_DR_RESULT(n)                (((n>>4)&0xFFF))
00116
00118 #define ADC_DR_OVERRUN_FLAG             ((1UL<<30))
00119
00121 #define ADC_DR_DONE_FLAG                ((1UL<<31))
00122
00123 /*********************************************************************/
00128 #define ADC_STAT_CH_DONE_FLAG(n)                ((n&0xFF))
00129
00131 #define ADC_STAT_CH_OVERRUN_FLAG(n)             (((n>>8)&0xFF))
00132
00133 #define ADC_STAT_INT_FLAG                               ((1UL<<16))
00134
00135 /*********************************************************************/
00139 #define ADC_ADCOFFS(n)          (((n&0xF)<<4))
00140
00141 #define ADC_TRIM(n)                 (((n&0xF)<<8))
00142
00143 /* ------------------- CHECK PARAM DEFINITIONS ------------------------- */
00145 #define PARAM_ADCx(n)    (((uint32_t *)n)==((uint32_t *)LPC_ADC))
00146
00148 #define PARAM_ADC_START_ON_EDGE_OPT(OPT)    ((OPT == ADC_START_ON_RISING)||(OPT == ADC_START_ON_FALLING))
00149
00151 #define PARAM_ADC_DATA_STATUS(OPT)    ((OPT== ADC_DATA_BURST)||(OPT== ADC_DATA_DONE))
00152
00154 #define PARAM_ADC_RATE(rate)    ((rate>0)&&(rate<=200000))
00155
00157 #define PARAM_ADC_CHANNEL_SELECTION(SEL)        ((SEL == ADC_CHANNEL_0)||(ADC_CHANNEL_1)\
00158 ||(SEL == ADC_CHANNEL_2)|(ADC_CHANNEL_3)\
00159 ||(SEL == ADC_CHANNEL_4)||(ADC_CHANNEL_5)\
00160 ||(SEL == ADC_CHANNEL_6)||(ADC_CHANNEL_7))
00161
00163 #define PARAM_ADC_START_OPT(OPT)    ((OPT == ADC_START_CONTINUOUS)||(OPT == ADC_START_NOW)\
00164 ||(OPT == ADC_START_ON_EINT0)||(OPT == ADC_START_ON_CAP01)\
00165 ||(OPT == ADC_START_ON_MAT01)||(OPT == ADC_START_ON_MAT03)\
00166 ||(OPT == ADC_START_ON_MAT10)||(OPT == ADC_START_ON_MAT11))
00167
00169 #define PARAM_ADC_TYPE_INT_OPT(OPT)    ((OPT == ADC_ADINTEN0)||(OPT == ADC_ADINTEN1)\
00170 ||(OPT == ADC_ADINTEN2)||(OPT == ADC_ADINTEN3)\
00171 ||(OPT == ADC_ADINTEN4)||(OPT == ADC_ADINTEN5)\
00172 ||(OPT == ADC_ADINTEN6)||(OPT == ADC_ADINTEN7)\
00173 ||(OPT == ADC_ADGINTEN))
00174
00180 /* Public Types --------------------------------------------------------------- */
00185 /*********************************************************************/
00189 typedef enum
00190 {
00191         ADC_CHANNEL_0  = 0,
00192         ADC_CHANNEL_1,
00193         ADC_CHANNEL_2,
00194         ADC_CHANNEL_3,
00195         ADC_CHANNEL_4,
00196         ADC_CHANNEL_5,
00197         ADC_CHANNEL_6,
00198         ADC_CHANNEL_7
00199 }ADC_CHANNEL_SELECTION;
00200
00202 typedef enum
00203 {
00204         ADC_START_CONTINUOUS =0,
00205         ADC_START_NOW,
00206         ADC_START_ON_EINT0,
00208         ADC_START_ON_CAP01,
00210         ADC_START_ON_MAT01,
00212         ADC_START_ON_MAT03,
00214         ADC_START_ON_MAT10,
00216         ADC_START_ON_MAT11
00218 } ADC_START_OPT;
00219
00220
00222 typedef enum
00223 {
00224         ADC_START_ON_RISING = 0,
00226         ADC_START_ON_FALLING
00228 } ADC_START_ON_EDGE_OPT;
00229
00231 typedef enum
00232 {
00233         ADC_ADINTEN0 = 0,
00234         ADC_ADINTEN1,
00235         ADC_ADINTEN2,
00236         ADC_ADINTEN3,
00237         ADC_ADINTEN4,
00238         ADC_ADINTEN5,
00239         ADC_ADINTEN6,
00240         ADC_ADINTEN7,
00241         ADC_ADGINTEN
00242 }ADC_TYPE_INT_OPT;
00243
00245 typedef enum
00246 {
00247         ADC_DATA_BURST = 0,             /*Burst bit*/
00248         ADC_DATA_DONE            /*Done bit*/
00249 }ADC_DATA_STATUS;
00250
00256 /* Public Functions ----------------------------------------------------------- */
00260 /* Init/DeInit ADC peripheral ----------------*/
00261 void ADC_Init(LPC_ADC_TypeDef *ADCx, uint32_t rate);
00262 void ADC_DeInit(LPC_ADC_TypeDef *ADCx);
00263
00264 /* Enable/Disable ADC functions --------------*/
00265 void ADC_BurstCmd(LPC_ADC_TypeDef *ADCx, FunctionalState NewState);
00266 void ADC_PowerdownCmd(LPC_ADC_TypeDef *ADCx, FunctionalState NewState);
00267 void ADC_StartCmd(LPC_ADC_TypeDef *ADCx, uint8_t start_mode);
00268 void ADC_ChannelCmd (LPC_ADC_TypeDef *ADCx, uint8_t Channel, FunctionalState NewState);
00269
00270 /* Configure ADC functions -------------------*/
00271 void ADC_EdgeStartConfig(LPC_ADC_TypeDef *ADCx, uint8_t EdgeOption);
00272 void ADC_IntConfig (LPC_ADC_TypeDef *ADCx, ADC_TYPE_INT_OPT IntType, FunctionalState NewState);
00273
00274 /* Get ADC information functions -------------------*/
00275 uint16_t ADC_ChannelGetData(LPC_ADC_TypeDef *ADCx, uint8_t channel);
00276 FlagStatus ADC_ChannelGetStatus(LPC_ADC_TypeDef *ADCx, uint8_t channel, uint32_t StatusType);
00277 uint32_t ADC_GlobalGetData(LPC_ADC_TypeDef *ADCx);
00278 FlagStatus      ADC_GlobalGetStatus(LPC_ADC_TypeDef *ADCx, uint32_t StatusType);
00279
00285 #ifdef __cplusplus
00286 }
00287 #endif
00288
00289
00290 #endif /* LPC17XX_ADC_H_ */
00291
00296 /* --------------------------------- End Of File ------------------------------ */
Generated on Tue Jun 7 14:58:55 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Drivers/source/lpc17xx_can.c Source File

C:/nxpdrv/LPC1700CMSIS/Drivers/source/lpc17xx_can.c

Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          lpc17xx_can.c                           2011-03-09
00003 */
00026 /* Peripheral group ----------------------------------------------------------- */
00031 /* Includes ------------------------------------------------------------------- */
00032 #include "lpc17xx_can.h"
00033 #include "lpc17xx_clkpwr.h"
00034
00035 /* If this source file built with example, the LPC17xx FW library configuration
00036  * file in each example directory ("lpc17xx_libcfg.h") must be included,
00037  * otherwise the default FW library configuration file must be included instead
00038  */
00039 #ifdef __BUILD_WITH_EXAMPLE__
00040 #include "lpc17xx_libcfg.h"
00041 #else
00042 #include "lpc17xx_libcfg_default.h"
00043 #endif /* __BUILD_WITH_EXAMPLE__ */
00044
00045
00046 #ifdef _CAN
00047
00048 /* Private Variables ---------------------------------------------------------- */
00053 FunctionalState FULLCAN_ENABLE;
00054
00055
00056 /* Counts number of filters (CAN message objects) used */
00057 uint16_t CANAF_FullCAN_cnt = 0;
00058 uint16_t CANAF_std_cnt = 0;
00059 uint16_t CANAF_gstd_cnt = 0;
00060 uint16_t CANAF_ext_cnt = 0;
00061 uint16_t CANAF_gext_cnt = 0;
00062
00063 /* End of Private Variables ----------------------------------------------------*/
00068 /* Private Variables ---------------------------------------------------------- */
00069 static void can_SetBaudrate (LPC_CAN_TypeDef *CANx, uint32_t baudrate);
00070
00071 /*********************************************************************/
00079 static void can_SetBaudrate (LPC_CAN_TypeDef *CANx, uint32_t baudrate)
00080 {
00081         uint32_t result = 0;
00082         uint8_t NT, TSEG1, TSEG2, BRFail;
00083         uint32_t CANPclk = 0;
00084         uint32_t BRP;
00085         CHECK_PARAM(PARAM_CANx(CANx));
00086
00087         if (CANx == LPC_CAN1)
00088         {
00089                 CANPclk = CLKPWR_GetPCLK (CLKPWR_PCLKSEL_CAN1);
00090         }
00091         else
00092         {
00093                 CANPclk = CLKPWR_GetPCLK (CLKPWR_PCLKSEL_CAN2);
00094         }
00095         result = CANPclk / baudrate;
00096         /* Calculate suitable nominal time value
00097          * NT (nominal time) = (TSEG1 + TSEG2 + 3)
00098          * NT <= 24
00099          * TSEG1 >= 2*TSEG2
00100          */
00101         BRFail = 1;
00102         for(NT=24;NT>0;NT=NT-2)
00103         {
00104                 if ((result%NT)==0)
00105                 {
00106                         BRP = result / NT - 1;
00107                         NT--;
00108                         TSEG2 = (NT/3) - 1;
00109                         TSEG1 = NT -(NT/3) - 1;
00110                         BRFail = 0;
00111                         break;
00112                 }
00113         }
00114         if(BRFail)
00115                 while(1); // Failed to calculate exact CAN baud rate
00116         /* Enter reset mode */
00117         CANx->MOD = 0x01;
00118         /* Set bit timing
00119          * Default: SAM = 0x00;
00120          *          SJW = 0x03;
00121          */
00122         CANx->BTR  = (TSEG2<<20)|(TSEG1<<16)|(3<<14)|BRP;
00123         /* Return to normal operating */
00124         CANx->MOD = 0;
00125 }
00126 /* End of Private Functions ----------------------------------------------------*/
00127
00128
00129 /* Public Functions ----------------------------------------------------------- */
00134 /********************************************************************/
00142 void CAN_Init(LPC_CAN_TypeDef *CANx, uint32_t baudrate)
00143 {
00144         uint32_t temp;
00145         uint16_t i;
00146         CHECK_PARAM(PARAM_CANx(CANx));
00147
00148         if(CANx == LPC_CAN1)
00149         {
00150                 /* Turn on power and clock for CAN1 */
00151                 CLKPWR_ConfigPPWR(CLKPWR_PCONP_PCAN1, ENABLE);
00152                 /* Set clock divide for CAN1 */
00153         }
00154         else
00155         {
00156                 /* Turn on power and clock for CAN1 */
00157                 CLKPWR_ConfigPPWR(CLKPWR_PCONP_PCAN2, ENABLE);
00158                 /* Set clock divide for CAN2 */
00159         }
00160         CLKPWR_SetPCLKDiv (CLKPWR_PCLKSEL_CAN1, CLKPWR_PCLKSEL_CCLK_DIV_2);
00161         CLKPWR_SetPCLKDiv (CLKPWR_PCLKSEL_CAN2, CLKPWR_PCLKSEL_CCLK_DIV_2);
00162         CLKPWR_SetPCLKDiv (CLKPWR_PCLKSEL_ACF, CLKPWR_PCLKSEL_CCLK_DIV_2);
00163
00164         CANx->MOD = 1; // Enter Reset Mode
00165         CANx->IER = 0; // Disable All CAN Interrupts
00166         CANx->GSR = 0;
00167         /* Request command to release Rx, Tx buffer and clear data overrun */
00168         //CANx->CMR = CAN_CMR_AT | CAN_CMR_RRB | CAN_CMR_CDO;
00169         CANx->CMR = (1<<1)|(1<<2)|(1<<3);
00170         /* Read to clear interrupt pending in interrupt capture register */
00171         temp = CANx->ICR;
00172         CANx->MOD = 0;// Return Normal operating
00173
00174         //Reset CANAF value
00175         LPC_CANAF->AFMR = 0x01;
00176
00177         //clear ALUT RAM
00178         for (i = 0; i < 512; i++) {
00179                 LPC_CANAF_RAM->mask[i] = 0x00;
00180         }
00181
00182         LPC_CANAF->SFF_sa = 0x00;
00183         LPC_CANAF->SFF_GRP_sa = 0x00;
00184         LPC_CANAF->EFF_sa = 0x00;
00185         LPC_CANAF->EFF_GRP_sa = 0x00;
00186         LPC_CANAF->ENDofTable = 0x00;
00187
00188         LPC_CANAF->AFMR = 0x00;
00189         /* Set baudrate */
00190         can_SetBaudrate (CANx, baudrate);
00191 }
00192
00193 /********************************************************************/
00200 void CAN_DeInit(LPC_CAN_TypeDef *CANx)
00201 {
00202         CHECK_PARAM(PARAM_CANx(CANx));
00203
00204         if(CANx == LPC_CAN1)
00205         {
00206                 /* Turn on power and clock for CAN1 */
00207                 CLKPWR_ConfigPPWR(CLKPWR_PCONP_PCAN1, DISABLE);
00208         }
00209         else
00210         {
00211                 /* Turn on power and clock for CAN1 */
00212                 CLKPWR_ConfigPPWR(CLKPWR_PCONP_PCAN2, DISABLE);
00213         }
00214 }
00215
00216 /********************************************************************/
00227 CAN_ERROR CAN_SetupAFLUT(LPC_CANAF_TypeDef* CANAFx, AF_SectionDef* AFSection)
00228 {
00229         uint8_t ctrl1,ctrl2;
00230         uint8_t dis1, dis2;
00231         uint16_t SID, ID_temp,i, count = 0;
00232         uint32_t EID, entry, buf;
00233         uint16_t lowerSID, upperSID;
00234         uint32_t lowerEID, upperEID;
00235
00236         CHECK_PARAM(PARAM_CANAFx(CANAFx));
00237         CANAFx->AFMR = 0x01;
00238
00239 /***** setup FullCAN Table *****/
00240         if(AFSection->FullCAN_Sec == NULL)
00241         {
00242                 FULLCAN_ENABLE = DISABLE;
00243         }
00244         else
00245         {
00246                 FULLCAN_ENABLE = ENABLE;
00247                 for(i=0;i<(AFSection->FC_NumEntry);i++)
00248                 {
00249                         if(count + 1 > 64)
00250                         {
00251                                 return CAN_OBJECTS_FULL_ERROR;
00252                         }
00253                         ctrl1 = AFSection->FullCAN_Sec->controller;
00254                         SID = AFSection->FullCAN_Sec->id_11;
00255                         dis1 = AFSection->FullCAN_Sec->disable;
00256
00257                         CHECK_PARAM(PARAM_CTRL(ctrl1));
00258                         CHECK_PARAM(PARAM_ID_11(SID));
00259                         CHECK_PARAM(PARAM_MSG_DISABLE(dis1));
00260                         entry = 0x00; //reset entry value
00261                         if((CANAF_FullCAN_cnt & 0x00000001)==0)
00262                         {
00263                                 if(count!=0x00)
00264                                 {
00265                                         buf = LPC_CANAF_RAM->mask[count-1];
00266                                         ID_temp = (buf & 0xE7FF); //mask controller & identifier bits
00267                                         if(ID_temp > ((ctrl1<<13)|SID))
00268                                         {
00269                                                 return CAN_AF_ENTRY_ERROR;
00270                                         }
00271                                 }
00272                                 entry = (ctrl1<<29)|(dis1<<28)|(SID<<16)|(1<<27);
00273                                 LPC_CANAF_RAM->mask[count] &= 0x0000FFFF;
00274                                 LPC_CANAF_RAM->mask[count] |= entry;
00275                                 CANAF_FullCAN_cnt++;
00276                                 if(CANAF_FullCAN_cnt == AFSection->FC_NumEntry) //this is the lastest FullCAN entry
00277                                         count++;
00278                         }
00279                         else
00280                         {
00281                                 buf = LPC_CANAF_RAM->mask[count];
00282                                 ID_temp = (buf >>16) & 0xE7FF;
00283                                 if(ID_temp > ((ctrl1<<13)|SID))
00284                                 {
00285                                         return CAN_AF_ENTRY_ERROR;
00286                                 }
00287                                 entry = (ctrl1<<13)|(dis1<<12)|(SID<<0)|(1<<11);
00288                                 LPC_CANAF_RAM->mask[count] &= 0xFFFF0000;
00289                                 LPC_CANAF_RAM->mask[count]|= entry;
00290                                 count++;
00291                                 CANAF_FullCAN_cnt++;
00292                         }
00293                         AFSection->FullCAN_Sec = (FullCAN_Entry *)((uint32_t)(AFSection->FullCAN_Sec)+ sizeof(FullCAN_Entry));
00294                 }
00295         }
00296
00297 /***** Setup Explicit Standard Frame Format Section *****/
00298         if(AFSection->SFF_Sec != NULL)
00299         {
00300                 for(i=0;i<(AFSection->SFF_NumEntry);i++)
00301                 {
00302                         if(count + 1 > 512)
00303                         {
00304                                 return CAN_OBJECTS_FULL_ERROR;
00305                         }
00306                         ctrl1 = AFSection->SFF_Sec->controller;
00307                         SID = AFSection->SFF_Sec->id_11;
00308                         dis1 = AFSection->SFF_Sec->disable;
00309
00310                         //check parameter
00311                         CHECK_PARAM(PARAM_CTRL(ctrl1));
00312                         CHECK_PARAM(PARAM_ID_11(SID));
00313                         CHECK_PARAM(PARAM_MSG_DISABLE(dis1));
00314
00315                         entry = 0x00; //reset entry value
00316                         if((CANAF_std_cnt & 0x00000001)==0)
00317                         {
00318                                 if(CANAF_std_cnt !=0 )
00319                                 {
00320                                         buf = LPC_CANAF_RAM->mask[count-1];
00321                                         ID_temp = (buf & 0xE7FF); //mask controller & identifier bits
00322                                         if(ID_temp > ((ctrl1<<13)|SID))
00323                                         {
00324                                                 return CAN_AF_ENTRY_ERROR;
00325                                         }
00326                                 }
00327                                 entry = (ctrl1<<29)|(dis1<<28)|(SID<<16);
00328                                 LPC_CANAF_RAM->mask[count] &= 0x0000FFFF;
00329                                 LPC_CANAF_RAM->mask[count] |= entry;
00330                                 CANAF_std_cnt++;
00331                                 if(CANAF_std_cnt == AFSection->SFF_NumEntry)//if this is the last SFF entry
00332                                         count++;
00333                         }
00334                         else
00335                         {
00336                                 buf = LPC_CANAF_RAM->mask[count];
00337                                 ID_temp = (buf >>16) & 0xE7FF;
00338                                 if(ID_temp > ((ctrl1<<13)|SID))
00339                                 {
00340                                         return CAN_AF_ENTRY_ERROR;
00341                                 }
00342                                 entry = (ctrl1<<13)|(dis1<<12)|(SID<<0);
00343                                 LPC_CANAF_RAM->mask[count] &= 0xFFFF0000;
00344                                 LPC_CANAF_RAM->mask[count] |= entry;
00345                                 count++;
00346                                 CANAF_std_cnt++;
00347                         }
00348                         AFSection->SFF_Sec = (SFF_Entry *)((uint32_t)(AFSection->SFF_Sec)+ sizeof(SFF_Entry));
00349                 }
00350         }
00351
00352 /***** Setup Group of Standard Frame Format Identifier Section *****/
00353         if(AFSection->SFF_GPR_Sec != NULL)
00354         {
00355                 for(i=0;i<(AFSection->SFF_GPR_NumEntry);i++)
00356                 {
00357                         if(count + 1 > 512)
00358                         {
00359                                 return CAN_OBJECTS_FULL_ERROR;
00360                         }
00361                         ctrl1 = AFSection->SFF_GPR_Sec->controller1;
00362                         ctrl2 = AFSection->SFF_GPR_Sec->controller2;
00363                         dis1 = AFSection->SFF_GPR_Sec->disable1;
00364                         dis2 = AFSection->SFF_GPR_Sec->disable2;
00365                         lowerSID = AFSection->SFF_GPR_Sec->lowerID;
00366                         upperSID = AFSection->SFF_GPR_Sec->upperID;
00367
00368                         /* check parameter */
00369                         CHECK_PARAM(PARAM_CTRL(ctrl1));
00370                         CHECK_PARAM(PARAM_CTRL(ctrl2));
00371                         CHECK_PARAM(PARAM_MSG_DISABLE(dis1));
00372                         CHECK_PARAM(PARAM_MSG_DISABLE(dis2));
00373                         CHECK_PARAM(PARAM_ID_11(lowerSID));
00374                         CHECK_PARAM(PARAM_ID_11(upperSID));
00375
00376                         entry = 0x00;
00377                         if(CANAF_gstd_cnt!=0)
00378                         {
00379                                 buf = LPC_CANAF_RAM->mask[count-1];
00380                                 ID_temp = buf & 0xE7FF;
00381                                 if((ctrl1 != ctrl2)||(lowerSID > upperSID)||(ID_temp > ((ctrl1<<13)|lowerSID)))
00382                                 {
00383                                         return CAN_AF_ENTRY_ERROR;
00384                                 }
00385                         }
00386                         entry = (ctrl1 << 29)|(dis1 << 28)|(lowerSID << 16)|  \
00387                                         (ctrl2 << 13)|(dis2 << 12)|(upperSID << 0);
00388                         LPC_CANAF_RAM->mask[count] = entry;
00389                         CANAF_gstd_cnt++;
00390                         count++;
00391                         AFSection->SFF_GPR_Sec = (SFF_GPR_Entry *)((uint32_t)(AFSection->SFF_GPR_Sec)+ sizeof(SFF_GPR_Entry));
00392                 }
00393         }
00394
00395 /***** Setup Explicit Extend Frame Format Identifier Section *****/
00396         if(AFSection->EFF_Sec != NULL)
00397         {
00398                 for(i=0;i<(AFSection->EFF_NumEntry);i++)
00399                 {
00400                         if(count + 1 > 512)
00401                         {
00402                                 return CAN_OBJECTS_FULL_ERROR;
00403                         }
00404                         EID = AFSection->EFF_Sec->ID_29;
00405                         ctrl1 = AFSection->EFF_Sec->controller;
00406
00407                         // check parameter
00408                         CHECK_PARAM(PARAM_ID_29(EID));
00409                         CHECK_PARAM(PARAM_CTRL(ctrl1));
00410
00411                         entry = (ctrl1 << 29)|(EID << 0);
00412                         if(CANAF_ext_cnt != 0)
00413                         {
00414                                 buf = LPC_CANAF_RAM->mask[count-1];
00415 //                              EID_temp = buf & 0x0FFFFFFF;
00416                                 if(buf > entry)
00417                                 {
00418                                         return CAN_AF_ENTRY_ERROR;
00419                                 }
00420                         }
00421                         LPC_CANAF_RAM->mask[count] = entry;
00422                         CANAF_ext_cnt ++;
00423                         count++;
00424                         AFSection->EFF_Sec = (EFF_Entry *)((uint32_t)(AFSection->EFF_Sec)+ sizeof(EFF_Entry));
00425                 }
00426         }
00427
00428 /***** Setup Group of Extended Frame Format Identifier Section *****/
00429         if(AFSection->EFF_GPR_Sec != NULL)
00430         {
00431                 for(i=0;i<(AFSection->EFF_GPR_NumEntry);i++)
00432                 {
00433                         if(count + 2 > 512)
00434                         {
00435                                 return CAN_OBJECTS_FULL_ERROR;
00436                         }
00437                         ctrl1 = AFSection->EFF_GPR_Sec->controller1;
00438                         ctrl2 = AFSection->EFF_GPR_Sec->controller2;
00439                         lowerEID = AFSection->EFF_GPR_Sec->lowerEID;
00440                         upperEID = AFSection->EFF_GPR_Sec->upperEID;
00441
00442                         //check parameter
00443                         CHECK_PARAM(PARAM_CTRL(ctrl1));
00444                         CHECK_PARAM(PARAM_CTRL(ctrl2));
00445                         CHECK_PARAM(PARAM_ID_29(lowerEID));
00446                         CHECK_PARAM(PARAM_ID_29(upperEID));
00447
00448                         entry = 0x00;
00449                         if(CANAF_gext_cnt != 0)
00450                         {
00451                                 buf = LPC_CANAF_RAM->mask[count-1];
00452 //                              EID_temp = buf & 0x0FFFFFFF;
00453                                 if((ctrl1 != ctrl2) || (lowerEID > upperEID) || (buf > ((ctrl1 << 29)|(lowerEID << 0))))
00454                                 {
00455                                         return CAN_AF_ENTRY_ERROR;
00456                                 }
00457                         }
00458                         entry = (ctrl1 << 29)|(lowerEID << 0);
00459                         LPC_CANAF_RAM->mask[count++] = entry;
00460                         entry = (ctrl2 << 29)|(upperEID << 0);
00461                         LPC_CANAF_RAM->mask[count++] = entry;
00462                         CANAF_gext_cnt++;
00463                         AFSection->EFF_GPR_Sec = (EFF_GPR_Entry *)((uint32_t)(AFSection->EFF_GPR_Sec)+ sizeof(EFF_GPR_Entry));
00464                 }
00465         }
00466         //update address values
00467         LPC_CANAF->SFF_sa = ((CANAF_FullCAN_cnt + 1)>>1)<<2;
00468         LPC_CANAF->SFF_GRP_sa = LPC_CANAF->SFF_sa + (((CANAF_std_cnt+1)>>1)<< 2);
00469         LPC_CANAF->EFF_sa = LPC_CANAF->SFF_GRP_sa + (CANAF_gstd_cnt << 2);
00470         LPC_CANAF->EFF_GRP_sa = LPC_CANAF->EFF_sa + (CANAF_ext_cnt << 2);
00471         LPC_CANAF->ENDofTable = LPC_CANAF->EFF_GRP_sa + (CANAF_gext_cnt << 3);
00472
00473         if(FULLCAN_ENABLE == DISABLE)
00474         {
00475                 LPC_CANAF->AFMR = 0x00; // Normal mode
00476         }
00477         else
00478         {
00479                 LPC_CANAF->AFMR = 0x04;
00480         }
00481         return CAN_OK;
00482 }
00483 /********************************************************************/
00497 CAN_ERROR CAN_LoadExplicitEntry(LPC_CAN_TypeDef* CANx, uint32_t id, CAN_ID_FORMAT_Type format)
00498 {
00499         uint32_t tmp0 = 0;
00500         uint32_t buf0=0, buf1=0;
00501         int16_t cnt1=0, cnt2=0, bound1=0, total=0;
00502
00503
00504         CHECK_PARAM(PARAM_CANx(CANx));
00505         CHECK_PARAM(PARAM_ID_FORMAT(format));
00506
00507         if (CANx == LPC_CAN1)
00508         {
00509                 tmp0 = 0;
00510         }
00511         else if (CANx == LPC_CAN2)
00512         {
00513                 tmp0 = 1;
00514         }
00515
00516         /* Acceptance Filter Memory full - return */
00517         total =((CANAF_FullCAN_cnt+1)>>1)+ CANAF_FullCAN_cnt*3 +((CANAF_std_cnt + 1) >> 1)+  \
00518                         CANAF_gstd_cnt + CANAF_ext_cnt + (CANAF_gext_cnt<<1);
00519         if (total >= 512){ //don't have enough space
00520                 return CAN_OBJECTS_FULL_ERROR;
00521         }
00522
00523         /* Setup Acceptance Filter Configuration
00524     Acceptance Filter Mode Register = Off */
00525         LPC_CANAF->AFMR = 0x00000001;
00526
00527 /*********** Add Explicit Standard Identifier Frame Format entry *********/
00528         if(format == STD_ID_FORMAT)
00529         {
00530                 id &= 0x07FF;
00531                 id |= (tmp0 << 13); /* Add controller number */
00532                 /* Move all remaining sections one place up
00533                 if new entry will increase FullCAN list */
00534                 if ((CANAF_std_cnt & 0x0001) == 0)
00535                 {
00536                         cnt1   = ((CANAF_FullCAN_cnt+1)>>1)+((CANAF_std_cnt+1)>>1);
00537                         bound1 = total - cnt1;
00538                         buf0   = LPC_CANAF_RAM->mask[cnt1];
00539                         while(bound1--)
00540                         {
00541                                 cnt1++;
00542                                 buf1 = LPC_CANAF_RAM->mask[cnt1];
00543                                 LPC_CANAF_RAM->mask[cnt1] = buf0;
00544                                 buf0 = buf1;
00545                         }
00546                 }
00547                 if (CANAF_std_cnt == 0)
00548                 {
00549                         cnt2 = (CANAF_FullCAN_cnt + 1)>>1;
00550                         /* For entering first ID */
00551                         LPC_CANAF_RAM->mask[cnt2] = 0x0000FFFF | (id << 16);
00552                 }
00553                 else if (CANAF_std_cnt == 1)
00554                 {
00555                         cnt2 = (CANAF_FullCAN_cnt + 1)>>1;
00556                         /* For entering second ID */
00557                         if (((LPC_CANAF_RAM->mask[cnt2] >> 16)& 0xE7FF) > id)
00558                         {
00559                                 LPC_CANAF_RAM->mask[cnt2] = (LPC_CANAF_RAM->mask[cnt2] >> 16) | (id << 16);
00560                         }
00561                         else
00562                         {
00563                                 LPC_CANAF_RAM->mask[cnt2] = (LPC_CANAF_RAM->mask[cnt2] & 0xFFFF0000) | id;
00564                         }
00565                 }
00566                 else
00567                 {
00568                         /* Find where to insert new ID */
00569                         cnt1 = (CANAF_FullCAN_cnt+1)>>1;
00570                         cnt2 = CANAF_std_cnt;
00571                         bound1 = ((CANAF_FullCAN_cnt+1)>>1)+((CANAF_std_cnt+1)>>1);
00572                         while (cnt1 < bound1)
00573                         {
00574                                 /* Loop through standard existing IDs */
00575                                 if (((LPC_CANAF_RAM->mask[cnt1] >> 16) & 0xE7FF) > id)
00576                                 {
00577                                         cnt2 = cnt1 * 2;
00578                                         break;
00579                                 }
00580
00581                                 if ((LPC_CANAF_RAM->mask[cnt1] & 0x0000E7FF) > id)
00582                                 {
00583                                         cnt2 = cnt1 * 2 + 1;
00584                                         break;
00585                                 }
00586
00587                                 cnt1++;
00588                         }
00589                         /* cnt1 = U32 where to insert new ID */
00590                         /* cnt2 = U16 where to insert new ID */
00591
00592                         if (cnt1 == bound1)
00593                         {
00594                                 /* Adding ID as last entry */
00595                                 /* Even number of IDs exists */
00596                                 if ((CANAF_std_cnt & 0x0001) == 0)
00597                                 {
00598                                         LPC_CANAF_RAM->mask[cnt1]  = 0x0000FFFF | (id << 16);
00599                                 }
00600                                 /* Odd  number of IDs exists */
00601                                 else
00602                                 {
00603                                         LPC_CANAF_RAM->mask[cnt1]  = (LPC_CANAF_RAM->mask[cnt1] & 0xFFFF0000) | id;
00604                                 }
00605                         }
00606                         else
00607                         {
00608                                 buf0 = LPC_CANAF_RAM->mask[cnt1]; /* Remember current entry */
00609                                 if ((cnt2 & 0x0001) == 0)
00610                                 {
00611                                         /* Insert new mask to even address*/
00612                                         buf1 = (id << 16) | (buf0 >> 16);
00613                                 }
00614                                 else
00615                                 {
00616                                         /* Insert new mask to odd  address */
00617                                         buf1 = (buf0 & 0xFFFF0000) | id;
00618                                 }
00619                                 LPC_CANAF_RAM->mask[cnt1] = buf1;/* Insert mask */
00620                                 bound1 = ((CANAF_FullCAN_cnt+1)>>1)+((CANAF_std_cnt+1)>>1)-1;
00621                                 /* Move all remaining standard mask entries one place up */
00622                                 while (cnt1 < bound1)
00623                                 {
00624                                         cnt1++;
00625                                         buf1  = LPC_CANAF_RAM->mask[cnt1];
00626                                         LPC_CANAF_RAM->mask[cnt1] = (buf1 >> 16) | (buf0 << 16);
00627                                         buf0  = buf1;
00628                                 }
00629
00630                                 if ((CANAF_std_cnt & 0x0001) == 0)
00631                                 {
00632                                         /* Even number of IDs exists */
00633                                         LPC_CANAF_RAM->mask[cnt1+1] = (buf0 <<16) |(0x0000FFFF);
00634                                 }
00635                         }
00636                 }
00637                 CANAF_std_cnt++;
00638                 //update address values
00639                 LPC_CANAF->SFF_GRP_sa +=0x04 ;
00640                 LPC_CANAF->EFF_sa     +=0x04 ;
00641                 LPC_CANAF->EFF_GRP_sa +=0x04;
00642                 LPC_CANAF->ENDofTable +=0x04;
00643         }
00644
00645 /*********** Add Explicit Extended Identifier Frame Format entry *********/
00646         else
00647         {
00648                 /* Add controller number */
00649                 id |= (tmp0) << 29;
00650
00651                 cnt1 = ((CANAF_FullCAN_cnt+1)>>1)+(((CANAF_std_cnt + 1) >> 1) + CANAF_gstd_cnt);
00652                 cnt2 = 0;
00653                 while (cnt2 < CANAF_ext_cnt)
00654                 {
00655                         /* Loop through extended existing masks*/
00656                         if (LPC_CANAF_RAM->mask[cnt1] > id)
00657                         {
00658                                 break;
00659                         }
00660                         cnt1++;/* cnt1 = U32 where to insert new mask */
00661                         cnt2++;
00662                 }
00663
00664                 buf0 = LPC_CANAF_RAM->mask[cnt1];  /* Remember current entry */
00665                 LPC_CANAF_RAM->mask[cnt1] = id;    /* Insert mask */
00666
00667                 CANAF_ext_cnt++;
00668
00669                 bound1 = total;
00670                 /* Move all remaining extended mask entries one place up*/
00671                 while (cnt2 < bound1)
00672                 {
00673                         cnt1++;
00674                         cnt2++;
00675                         buf1 = LPC_CANAF_RAM->mask[cnt1];
00676                         LPC_CANAF_RAM->mask[cnt1] = buf0;
00677                         buf0 = buf1;
00678                 }
00679                 /* update address values */
00680                 LPC_CANAF->EFF_GRP_sa += 4;
00681                 LPC_CANAF->ENDofTable += 4;
00682         }
00683         if(CANAF_FullCAN_cnt == 0) //not use FullCAN mode
00684         {
00685                 LPC_CANAF->AFMR = 0x00;//not use FullCAN mode
00686         }
00687         else
00688         {
00689                 LPC_CANAF->AFMR = 0x04;
00690         }
00691
00692         return CAN_OK;
00693 }
00694
00695 /********************************************************************/
00706 CAN_ERROR CAN_LoadFullCANEntry (LPC_CAN_TypeDef* CANx, uint16_t id)
00707 {
00708         uint32_t ctrl0 = 0;
00709         uint32_t buf0=0, buf1=0, buf2=0;
00710         uint32_t tmp0=0, tmp1=0, tmp2=0;
00711         int16_t cnt1=0, cnt2=0, bound1=0, total=0;
00712         uint32_t abc;
00713
00714         CHECK_PARAM(PARAM_CANx(CANx));
00715
00716         if (CANx == LPC_CAN1)
00717         {
00718                 ctrl0 = 0;
00719         }
00720         else if (CANx == LPC_CAN2)
00721         {
00722                 ctrl0 = 1;
00723         }
00724
00725         /* Acceptance Filter Memory full - return */
00726         total =((CANAF_FullCAN_cnt+1)>>1)+ CANAF_FullCAN_cnt*3 +((CANAF_std_cnt + 1) >> 1)+  \
00727                         CANAF_gstd_cnt + CANAF_ext_cnt + (CANAF_gext_cnt<<1);
00728         //don't have enough space for this fullCAN Entry and its Object(3*32 bytes)
00729         if ((total >=508)||(CANAF_FullCAN_cnt>=64)){
00730                 return CAN_OBJECTS_FULL_ERROR;
00731         }
00732         /* Setup Acceptance Filter Configuration
00733     Acceptance Filter Mode Register = Off */
00734         LPC_CANAF->AFMR = 0x00000001;
00735
00736         /* Add mask for standard identifiers   */
00737         id &= 0x07FF;
00738         id |= (ctrl0 << 13) | (1 << 11); /* Add controller number */
00739 //      total = ((CANAF_std_cnt + 1) >> 1)+ CANAF_gstd_cnt + CANAF_ext_cnt + (CANAF_gext_cnt<<1);
00740         /* Move all remaining sections one place up
00741         if new entry will increase FullCAN list */
00742         if (((CANAF_FullCAN_cnt & 0x0001) == 0)&&(total!=0))
00743         {
00744                 //then remove remaining section
00745                 cnt1   = (CANAF_FullCAN_cnt >> 1);
00746                 bound1 = total;
00747                 buf0   = LPC_CANAF_RAM->mask[cnt1];
00748
00749                 while (bound1--)
00750                 {
00751                         cnt1++;
00752                         buf1 = LPC_CANAF_RAM->mask[cnt1];
00753                         LPC_CANAF_RAM->mask[cnt1] = buf0;
00754                         buf0 = buf1;
00755                 }
00756         }
00757         if (CANAF_FullCAN_cnt == 0)
00758         {
00759                 /* For entering first ID */
00760                 LPC_CANAF_RAM->mask[0] = 0x0000FFFF | (id << 16);
00761         }
00762         else if (CANAF_FullCAN_cnt == 1)
00763         {
00764                 /* For entering second ID */
00765                 if (((LPC_CANAF_RAM->mask[0] >> 16)& 0xE7FF) > id)
00766                 {
00767                         LPC_CANAF_RAM->mask[0] = (LPC_CANAF_RAM->mask[0] >> 16) | (id << 16);
00768                 }
00769                 else
00770                 {
00771                         LPC_CANAF_RAM->mask[0] = (LPC_CANAF_RAM->mask[0] & 0xFFFF0000) | id;
00772                 }
00773         }
00774         else
00775         {
00776                 /* Find where to insert new ID */
00777                 cnt1 = 0;
00778                 cnt2 = CANAF_FullCAN_cnt;
00779                 bound1 = (CANAF_FullCAN_cnt - 1) >> 1;
00780                 while (cnt1 <= bound1)
00781                 {
00782                         abc = (LPC_CANAF_RAM->mask[cnt1] >> 16)& 0xE7FF;
00783                         /* Loop through standard existing IDs */
00784                         if (((LPC_CANAF_RAM->mask[cnt1] >> 16) & 0xE7FF) > (id & 0xE7FF))
00785                         {
00786                                 cnt2 = cnt1 * 2;
00787                                 break;
00788                         }
00789
00790                         abc = LPC_CANAF_RAM->mask[cnt1] & 0x0000E7FF;
00791                         if ((LPC_CANAF_RAM->mask[cnt1] & 0x0000E7FF) > (id & 0xE7FF))
00792                         {
00793                                 cnt2 = cnt1 * 2 + 1;
00794                                 break;
00795                         }
00796
00797                         cnt1++;
00798                 }
00799                 /* cnt1 = U32 where to insert new ID */
00800                 /* cnt2 = U16 where to insert new ID */
00801
00802                 if (cnt1 > bound1)
00803                 {
00804                         /* Adding ID as last entry */
00805                         /* Even number of IDs exists */
00806                         if ((CANAF_FullCAN_cnt & 0x0001) == 0)
00807                         {
00808                                 LPC_CANAF_RAM->mask[cnt1]  = 0x0000FFFF | (id << 16);
00809                         }
00810                         /* Odd  number of IDs exists */
00811                         else
00812                         {
00813                                 LPC_CANAF_RAM->mask[cnt1]  = (LPC_CANAF_RAM->mask[cnt1] & 0xFFFF0000) | id;
00814                         }
00815                 }
00816                 else
00817                 {
00818                         buf0 = LPC_CANAF_RAM->mask[cnt1]; /* Remember current entry */
00819                         if ((cnt2 & 0x0001) == 0)
00820                         {
00821                                 /* Insert new mask to even address*/
00822                                 buf1 = (id << 16) | (buf0 >> 16);
00823                         }
00824                         else
00825                         {
00826                                 /* Insert new mask to odd  address */
00827                                 buf1 = (buf0 & 0xFFFF0000) | id;
00828                         }
00829                         LPC_CANAF_RAM->mask[cnt1] = buf1;/* Insert mask */
00830                         bound1 = CANAF_FullCAN_cnt >> 1;
00831                         /* Move all remaining standard mask entries one place up */
00832                         while (cnt1 < bound1)
00833                         {
00834                                 cnt1++;
00835                                 buf1  = LPC_CANAF_RAM->mask[cnt1];
00836                                 LPC_CANAF_RAM->mask[cnt1] = (buf1 >> 16) | (buf0 << 16);
00837                                 buf0  = buf1;
00838                         }
00839
00840                         if ((CANAF_FullCAN_cnt & 0x0001) == 0)
00841                         {
00842                                 /* Even number of IDs exists */
00843                                 LPC_CANAF_RAM->mask[cnt1] = (LPC_CANAF_RAM->mask[cnt1] & 0xFFFF0000)
00844                                                                                         | (0x0000FFFF);
00845                         }
00846                 }
00847         }
00848         //restruct FulCAN Object Section
00849         bound1 = CANAF_FullCAN_cnt - cnt2;
00850         cnt1 = total - (CANAF_FullCAN_cnt)*3 + cnt2*3 + 1;
00851         buf0 = LPC_CANAF_RAM->mask[cnt1];
00852         buf1 = LPC_CANAF_RAM->mask[cnt1+1];
00853         buf2 = LPC_CANAF_RAM->mask[cnt1+2];
00854         LPC_CANAF_RAM->mask[cnt1]=LPC_CANAF_RAM->mask[cnt1+1]= LPC_CANAF_RAM->mask[cnt1+2]=0x00;
00855         cnt1+=3;
00856         while(bound1--)
00857         {
00858                 tmp0 = LPC_CANAF_RAM->mask[cnt1];
00859                 tmp1 = LPC_CANAF_RAM->mask[cnt1+1];
00860                 tmp2 = LPC_CANAF_RAM->mask[cnt1+2];
00861                 LPC_CANAF_RAM->mask[cnt1]= buf0;
00862                 LPC_CANAF_RAM->mask[cnt1+1]= buf1;
00863                 LPC_CANAF_RAM->mask[cnt1+2]= buf2;
00864                 buf0 = tmp0;
00865                 buf1 = tmp1;
00866                 buf2 = tmp2;
00867                 cnt1+=3;
00868         }
00869         CANAF_FullCAN_cnt++;
00870         //update address values
00871         LPC_CANAF->SFF_sa         +=0x04;
00872         LPC_CANAF->SFF_GRP_sa +=0x04 ;
00873         LPC_CANAF->EFF_sa     +=0x04 ;
00874         LPC_CANAF->EFF_GRP_sa +=0x04;
00875         LPC_CANAF->ENDofTable +=0x04;
00876
00877         LPC_CANAF->AFMR = 0x04;
00878         return CAN_OK;
00879 }
00880
00881 /********************************************************************/
00895 CAN_ERROR CAN_LoadGroupEntry(LPC_CAN_TypeDef* CANx, uint32_t lowerID, \
00896                 uint32_t upperID, CAN_ID_FORMAT_Type format)
00897 {
00898         uint16_t tmp = 0;
00899         uint32_t buf0, buf1, entry1, entry2, LID,UID;
00900         int16_t cnt1, bound1, total;
00901         //LPC_CANAF_RAM_TypeDef *AFLUTTest = LPC_CANAF_RAM;
00902
00903         CHECK_PARAM(PARAM_CANx(CANx));
00904         CHECK_PARAM(PARAM_ID_FORMAT(format));
00905
00906         if(lowerID > upperID) return CAN_CONFLICT_ID_ERROR;
00907         if(CANx == LPC_CAN1)
00908         {
00909                 tmp = 0;
00910         }
00911         else
00912         {
00913                 tmp = 1;
00914         }
00915
00916         total =((CANAF_FullCAN_cnt+1)>>1)+ CANAF_FullCAN_cnt*3 +((CANAF_std_cnt + 1) >> 1)+  \
00917                         CANAF_gstd_cnt + CANAF_ext_cnt + (CANAF_gext_cnt<<1);
00918
00919         /* Setup Acceptance Filter Configuration
00920         Acceptance Filter Mode Register = Off */
00921         LPC_CANAF->AFMR = 0x00000001;
00922
00923 /*********Add Group of Standard Identifier Frame Format************/
00924         if(format == STD_ID_FORMAT)
00925         {
00926                 if ((total >= 512)){//don't have enough space
00927                         return CAN_OBJECTS_FULL_ERROR;
00928                 }
00929                 lowerID &=0x7FF; //mask ID
00930                 upperID &=0x7FF;
00931                 entry1  = (tmp << 29)|(lowerID << 16)|(tmp << 13)|(upperID << 0);
00932                 cnt1 = ((CANAF_FullCAN_cnt+1)>>1) + ((CANAF_std_cnt + 1) >> 1);
00933
00934                 //if this is the first Group standard ID entry
00935                 if(CANAF_gstd_cnt == 0)
00936                 {
00937                         LPC_CANAF_RAM->mask[cnt1] = entry1;
00938                 }
00939                 else
00940                 {
00941                         //find the position to add new Group entry
00942                         bound1 = ((CANAF_FullCAN_cnt+1)>>1) + ((CANAF_std_cnt + 1) >> 1) + CANAF_gstd_cnt;
00943                         while(cnt1 < bound1)
00944                         {
00945                                 //compare controller first
00946                                 while((LPC_CANAF_RAM->mask[cnt1] >> 29)< (entry1 >> 29))//increase until meet greater or equal controller
00947                                         cnt1++;
00948                                 buf0 = LPC_CANAF_RAM->mask[cnt1];
00949                                 if((LPC_CANAF_RAM->mask[cnt1] >> 29)> (entry1 >> 29)) //meet greater controller
00950                                 {
00951                                         //add at this position
00952                                         LPC_CANAF_RAM->mask[cnt1] = entry1;
00953                                         break;
00954                                 }
00955                                 else //meet equal controller
00956                                 {
00957                                         LID  = (buf0 >> 16)&0x7FF;
00958                                         UID  = buf0 & 0x7FF;
00959                                         if (upperID <= LID)
00960                                         {
00961                                                 //add new entry before this entry
00962                                                 LPC_CANAF_RAM->mask[cnt1] = entry1;
00963                                                 break;
00964                                         }
00965                                         else if (lowerID >= UID)
00966                                         {
00967                                                 //load next entry to compare
00968                                                 cnt1 ++;
00969                                         }
00970                                         else
00971                                                 return CAN_CONFLICT_ID_ERROR;
00972                                 }
00973                         }
00974                         if(cnt1 >= bound1)
00975                         {
00976                                 //add new entry at the last position in this list
00977                                 buf0 = LPC_CANAF_RAM->mask[cnt1];
00978                                 LPC_CANAF_RAM->mask[cnt1] = entry1;
00979                         }
00980
00981                         //remove all remaining entry of this section one place up
00982                         bound1 = total - cnt1;
00983                         while(bound1--)
00984                         {
00985                                 cnt1++;
00986                                 buf1 = LPC_CANAF_RAM->mask[cnt1];
00987                                 LPC_CANAF_RAM->mask[cnt1] = buf0;
00988                                 buf0 = buf1;
00989                         }
00990                 }
00991                 CANAF_gstd_cnt++;
00992                 //update address values
00993                 LPC_CANAF->EFF_sa     +=0x04 ;
00994                 LPC_CANAF->EFF_GRP_sa +=0x04;
00995                 LPC_CANAF->ENDofTable +=0x04;
00996         }
00997
00998
00999 /*********Add Group of Extended Identifier Frame Format************/
01000         else
01001         {
01002                 if ((total >= 511)){//don't have enough space
01003                         return CAN_OBJECTS_FULL_ERROR;
01004                 }
01005                 lowerID  &= 0x1FFFFFFF; //mask ID
01006                 upperID &= 0x1FFFFFFF;
01007                 entry1   = (tmp << 29)|(lowerID << 0);
01008                 entry2   = (tmp << 29)|(upperID << 0);
01009
01010                 cnt1 = ((CANAF_FullCAN_cnt+1)>>1) + ((CANAF_std_cnt + 1) >> 1) + CANAF_gstd_cnt + CANAF_ext_cnt;
01011                 //if this is the first Group standard ID entry
01012                 if(CANAF_gext_cnt == 0)
01013                 {
01014                         LPC_CANAF_RAM->mask[cnt1] = entry1;
01015                         LPC_CANAF_RAM->mask[cnt1+1] = entry2;
01016                 }
01017                 else
01018                 {
01019                         //find the position to add new Group entry
01020                         bound1 = ((CANAF_FullCAN_cnt+1)>>1) + ((CANAF_std_cnt + 1) >> 1) + CANAF_gstd_cnt \
01021                                                 + CANAF_ext_cnt + (CANAF_gext_cnt<<1);
01022                         while(cnt1 < bound1)
01023                         {
01024                                 while((LPC_CANAF_RAM->mask[cnt1] >>29)< tmp) //increase until meet greater or equal controller
01025                                         cnt1++;
01026                                 buf0 = LPC_CANAF_RAM->mask[cnt1];
01027                                 buf1 = LPC_CANAF_RAM->mask[cnt1+1];
01028                                 if((LPC_CANAF_RAM->mask[cnt1] >> 29)> (entry1 >> 29)) //meet greater controller
01029                                 {
01030                                         //add at this position
01031                                         LPC_CANAF_RAM->mask[cnt1] = entry1;
01032                                         LPC_CANAF_RAM->mask[++cnt1] = entry2;
01033                                         break;
01034                                 }
01035                                 else //meet equal controller
01036                                 {
01037                                         LID  = buf0 & 0x1FFFFFFF; //mask ID
01038                                         UID  = buf1 & 0x1FFFFFFF;
01039                                         if (upperID <= LID)
01040                                         {
01041                                                 //add new entry before this entry
01042                                                 LPC_CANAF_RAM->mask[cnt1] = entry1;
01043                                                 LPC_CANAF_RAM->mask[++cnt1] = entry2;
01044                                                 break;
01045                                         }
01046                                         else if (lowerID >= UID)
01047                                         {
01048                                                 //load next entry to compare
01049                                                 cnt1 +=2;
01050                                         }
01051                                         else
01052                                                 return CAN_CONFLICT_ID_ERROR;
01053                                 }
01054                         }
01055                         if(cnt1 >= bound1)
01056                         {
01057                                 //add new entry at the last position in this list
01058                                 buf0 = LPC_CANAF_RAM->mask[cnt1];
01059                                 buf1 = LPC_CANAF_RAM->mask[cnt1+1];
01060                                 LPC_CANAF_RAM->mask[cnt1]   = entry1;
01061                                 LPC_CANAF_RAM->mask[++cnt1] = entry2;
01062                         }
01063                         //remove all remaining entry of this section two place up
01064                         bound1 = total - cnt1 + 1;
01065                         cnt1++;
01066                         while(bound1>0)
01067                         {
01068                                 entry1 = LPC_CANAF_RAM->mask[cnt1];
01069                                 entry2 = LPC_CANAF_RAM->mask[cnt1+1];
01070                                 LPC_CANAF_RAM->mask[cnt1]   = buf0;
01071                                 LPC_CANAF_RAM->mask[cnt1+1] = buf1;
01072                                 buf0 = entry1;
01073                                 buf1 = entry2;
01074                                 cnt1   +=2;
01075                                 bound1 -=2;
01076                         }
01077                 }
01078                 CANAF_gext_cnt++;
01079                 //update address values
01080                 LPC_CANAF->ENDofTable +=0x08;
01081         }
01082         LPC_CANAF->AFMR = 0x04;
01083         return CAN_OK;
01084 }
01085
01086 /********************************************************************/
01100 CAN_ERROR CAN_RemoveEntry(AFLUT_ENTRY_Type EntryType, uint16_t position)
01101 {
01102         uint16_t cnt, bound, total;
01103         uint32_t buf0, buf1;
01104         CHECK_PARAM(PARAM_AFLUT_ENTRY_TYPE(EntryType));
01105         CHECK_PARAM(PARAM_POSITION(position));
01106
01107         /* Setup Acceptance Filter Configuration
01108         Acceptance Filter Mode Register = Off */
01109         LPC_CANAF->AFMR = 0x00000001;
01110         total = ((CANAF_FullCAN_cnt+1)>>1)+((CANAF_std_cnt + 1) >> 1) + \
01111                         CANAF_gstd_cnt + CANAF_ext_cnt + (CANAF_gext_cnt<<1);
01112
01113
01114 /************** Remove FullCAN Entry *************/
01115         if(EntryType == FULLCAN_ENTRY)
01116         {
01117                 if((CANAF_FullCAN_cnt==0)||(position >= CANAF_FullCAN_cnt))
01118                 {
01119                         return CAN_ENTRY_NOT_EXIT_ERROR;
01120                 }
01121                 else
01122                 {
01123                         cnt = position >> 1;
01124                         buf0 = LPC_CANAF_RAM->mask[cnt];
01125                         bound = (CANAF_FullCAN_cnt - position -1)>>1;
01126                         if((position & 0x0001) == 0) //event position
01127                         {
01128                                 while(bound--)
01129                                 {
01130                                         //remove all remaining FullCAN entry one place down
01131                                         buf1  = LPC_CANAF_RAM->mask[cnt+1];
01132                                         LPC_CANAF_RAM->mask[cnt] = (buf1 >> 16) | (buf0 << 16);
01133                                         buf0  = buf1;
01134                                         cnt++;
01135                                 }
01136                         }
01137                         else //odd position
01138                         {
01139                                 while(bound--)
01140                                 {
01141                                         //remove all remaining FullCAN entry one place down
01142                                         buf1  = LPC_CANAF_RAM->mask[cnt+1];
01143                                         LPC_CANAF_RAM->mask[cnt] = (buf0 & 0xFFFF0000)|(buf1 >> 16);
01144                                         LPC_CANAF_RAM->mask[cnt+1] = LPC_CANAF_RAM->mask[cnt+1] << 16;
01145                                         buf0  = buf1<<16;
01146                                         cnt++;
01147                                 }
01148                         }
01149                         if((CANAF_FullCAN_cnt & 0x0001) == 0)
01150                         {
01151                                 if((position & 0x0001)==0)
01152                                         LPC_CANAF_RAM->mask[cnt] = (buf0 << 16) | (0x0000FFFF);
01153                                 else
01154                                         LPC_CANAF_RAM->mask[cnt] = buf0 | 0x0000FFFF;
01155                         }
01156                         else
01157                         {
01158                                 //remove all remaining section one place down
01159                                 cnt = (CANAF_FullCAN_cnt + 1)>>1;
01160                                 bound = total + CANAF_FullCAN_cnt * 3;
01161                                 while(bound>cnt)
01162                                 {
01163                                         LPC_CANAF_RAM->mask[cnt-1] = LPC_CANAF_RAM->mask[cnt];
01164                                         cnt++;
01165                                 }
01166                                 LPC_CANAF_RAM->mask[cnt-1]=0x00;
01167                                 //update address values
01168                                 LPC_CANAF->SFF_sa         -=0x04;
01169                                 LPC_CANAF->SFF_GRP_sa -=0x04 ;
01170                                 LPC_CANAF->EFF_sa     -=0x04 ;
01171                                 LPC_CANAF->EFF_GRP_sa -=0x04;
01172                                 LPC_CANAF->ENDofTable -=0x04;
01173                         }
01174                         CANAF_FullCAN_cnt--;
01175
01176                         //delete its FullCAN Object in the FullCAN Object section
01177                         //remove all remaining FullCAN Object three place down
01178                         cnt = total + position * 3;
01179                         bound = (CANAF_FullCAN_cnt - position + 1) * 3;
01180
01181                         while(bound)
01182                         {
01183                                 LPC_CANAF_RAM->mask[cnt]=LPC_CANAF_RAM->mask[cnt+3];;
01184                                 LPC_CANAF_RAM->mask[cnt+1]=LPC_CANAF_RAM->mask[cnt+4];
01185                                 LPC_CANAF_RAM->mask[cnt+2]=LPC_CANAF_RAM->mask[cnt+5];
01186                                 bound -=3;
01187                                 cnt   +=3;
01188                         }
01189                 }
01190         }
01191
01192 /************** Remove Explicit Standard ID Entry *************/
01193         else if(EntryType == EXPLICIT_STANDARD_ENTRY)
01194         {
01195                 if((CANAF_std_cnt==0)||(position >= CANAF_std_cnt))
01196                 {
01197                         return CAN_ENTRY_NOT_EXIT_ERROR;
01198                 }
01199                 else
01200                 {
01201                         cnt = ((CANAF_FullCAN_cnt+1)>>1)+ (position >> 1);
01202                         buf0 = LPC_CANAF_RAM->mask[cnt];
01203                         bound = (CANAF_std_cnt - position - 1)>>1;
01204                         if((position & 0x0001) == 0) //event position
01205                         {
01206                                 while(bound--)
01207                                 {
01208                                         //remove all remaining FullCAN entry one place down
01209                                         buf1  = LPC_CANAF_RAM->mask[cnt+1];
01210                                         LPC_CANAF_RAM->mask[cnt] = (buf1 >> 16) | (buf0 << 16);
01211                                         buf0  = buf1;
01212                                         cnt++;
01213                                 }
01214                         }
01215                         else //odd position
01216                         {
01217                                 while(bound--)
01218                                 {
01219                                         //remove all remaining FullCAN entry one place down
01220                                         buf1  = LPC_CANAF_RAM->mask[cnt+1];
01221                                         LPC_CANAF_RAM->mask[cnt] = (buf0 & 0xFFFF0000)|(buf1 >> 16);
01222                                         LPC_CANAF_RAM->mask[cnt+1] = LPC_CANAF_RAM->mask[cnt+1] << 16;
01223                                         buf0  = buf1<<16;
01224                                         cnt++;
01225                                 }
01226                         }
01227                         if((CANAF_std_cnt & 0x0001) == 0)
01228                         {
01229                                 if((position & 0x0001)==0)
01230                                         LPC_CANAF_RAM->mask[cnt] = (buf0 << 16) | (0x0000FFFF);
01231                                 else
01232                                         LPC_CANAF_RAM->mask[cnt] = buf0 | 0x0000FFFF;
01233                         }
01234                         else
01235                         {
01236                                 //remove all remaining section one place down
01237                                 cnt = ((CANAF_FullCAN_cnt + 1)>>1) + ((CANAF_std_cnt + 1) >> 1);
01238                                 bound = total + CANAF_FullCAN_cnt * 3;
01239                                 while(bound>cnt)
01240                                 {
01241                                         LPC_CANAF_RAM->mask[cnt-1] = LPC_CANAF_RAM->mask[cnt];
01242                                         cnt++;
01243                                 }
01244                                 LPC_CANAF_RAM->mask[cnt-1]=0x00;
01245                                 //update address value
01246                                 LPC_CANAF->SFF_GRP_sa -=0x04 ;
01247                                 LPC_CANAF->EFF_sa     -=0x04 ;
01248                                 LPC_CANAF->EFF_GRP_sa -=0x04;
01249                                 LPC_CANAF->ENDofTable -=0x04;
01250                         }
01251                         CANAF_std_cnt--;
01252                 }
01253         }
01254
01255 /************** Remove Group of Standard ID Entry *************/
01256         else if(EntryType == GROUP_STANDARD_ENTRY)
01257         {
01258                 if((CANAF_gstd_cnt==0)||(position >= CANAF_gstd_cnt))
01259                 {
01260                         return CAN_ENTRY_NOT_EXIT_ERROR;
01261                 }
01262                 else
01263                 {
01264                         cnt = ((CANAF_FullCAN_cnt + 1)>>1) + ((CANAF_std_cnt + 1) >> 1)+ position + 1;
01265                         bound = total + CANAF_FullCAN_cnt * 3;
01266                         while (cnt<bound)
01267                         {
01268                                 LPC_CANAF_RAM->mask[cnt-1] = LPC_CANAF_RAM->mask[cnt];
01269                                 cnt++;
01270                         }
01271                         LPC_CANAF_RAM->mask[cnt-1]=0x00;
01272                 }
01273                 CANAF_gstd_cnt--;
01274                 //update address value
01275                 LPC_CANAF->EFF_sa     -=0x04;
01276                 LPC_CANAF->EFF_GRP_sa -=0x04;
01277                 LPC_CANAF->ENDofTable -=0x04;
01278         }
01279
01280 /************** Remove Explicit Extended ID Entry *************/
01281         else if(EntryType == EXPLICIT_EXTEND_ENTRY)
01282         {
01283                 if((CANAF_ext_cnt==0)||(position >= CANAF_ext_cnt))
01284                 {
01285                         return CAN_ENTRY_NOT_EXIT_ERROR;
01286                 }
01287                 else
01288                 {
01289                         cnt = ((CANAF_FullCAN_cnt + 1)>>1) + ((CANAF_std_cnt + 1) >> 1)+ CANAF_gstd_cnt + position + 1;
01290                         bound = total + CANAF_FullCAN_cnt * 3;
01291                         while (cnt<bound)
01292                         {
01293                                 LPC_CANAF_RAM->mask[cnt-1] = LPC_CANAF_RAM->mask[cnt];
01294                                 cnt++;
01295                         }
01296                         LPC_CANAF_RAM->mask[cnt-1]=0x00;
01297                 }
01298                 CANAF_ext_cnt--;
01299                 LPC_CANAF->EFF_GRP_sa -=0x04;
01300                 LPC_CANAF->ENDofTable -=0x04;
01301         }
01302
01303 /************** Remove Group of Extended ID Entry *************/
01304         else
01305         {
01306                 if((CANAF_gext_cnt==0)||(position >= CANAF_gext_cnt))
01307                 {
01308                         return CAN_ENTRY_NOT_EXIT_ERROR;
01309                 }
01310                 else
01311                 {
01312                         cnt = total - (CANAF_gext_cnt<<1) + (position<<1);
01313                         bound = total + CANAF_FullCAN_cnt * 3;
01314                         while (cnt<bound)
01315                         {
01316                                 //remove all remaining entry two place up
01317                                 LPC_CANAF_RAM->mask[cnt] = LPC_CANAF_RAM->mask[cnt+2];
01318                                 LPC_CANAF_RAM->mask[cnt+1] = LPC_CANAF_RAM->mask[cnt+3];
01319                                 cnt+=2;
01320                         }
01321                 }
01322                 CANAF_gext_cnt--;
01323                 LPC_CANAF->ENDofTable -=0x08;
01324         }
01325         LPC_CANAF->AFMR = 0x04;
01326         return CAN_OK;
01327 }
01328
01329 /********************************************************************/
01340 Status CAN_SendMsg (LPC_CAN_TypeDef *CANx, CAN_MSG_Type *CAN_Msg)
01341 {
01342         uint32_t data;
01343         CHECK_PARAM(PARAM_CANx(CANx));
01344         CHECK_PARAM(PARAM_ID_FORMAT(CAN_Msg->format));
01345         if(CAN_Msg->format==STD_ID_FORMAT)
01346         {
01347                 CHECK_PARAM(PARAM_ID_11(CAN_Msg->id));
01348         }
01349         else
01350         {
01351                 CHECK_PARAM(PARAM_ID_29(CAN_Msg->id));
01352         }
01353         CHECK_PARAM(PARAM_DLC(CAN_Msg->len));
01354         CHECK_PARAM(PARAM_FRAME_TYPE(CAN_Msg->type));
01355
01356         //Check status of Transmit Buffer 1
01357         if (CANx->SR & (1<<2))
01358         {
01359                 /* Transmit Channel 1 is available */
01360                 /* Write frame informations and frame data into its CANxTFI1,
01361                  * CANxTID1, CANxTDA1, CANxTDB1 register */
01362                 CANx->TFI1 &= ~0x000F0000;
01363                 CANx->TFI1 |= (CAN_Msg->len)<<16;
01364                 if(CAN_Msg->type == REMOTE_FRAME)
01365                 {
01366                         CANx->TFI1 |= (1<<30); //set bit RTR
01367                 }
01368                 else
01369                 {
01370                         CANx->TFI1 &= ~(1<<30);
01371                 }
01372                 if(CAN_Msg->format == EXT_ID_FORMAT)
01373                 {
01374                         CANx->TFI1 |= (1<<31); //set bit FF
01375                 }
01376                 else
01377                 {
01378                         CANx->TFI1 &= ~(1<<31);
01379                 }
01380
01381                 /* Write CAN ID*/
01382                 CANx->TID1 = CAN_Msg->id;
01383
01384                 /*Write first 4 data bytes*/
01385                 data = (CAN_Msg->dataA[0])|(((CAN_Msg->dataA[1]))<<8)|((CAN_Msg->dataA[2])<<16)|((CAN_Msg->dataA[3])<<24);
01386                 CANx->TDA1 = data;
01387
01388                 /*Write second 4 data bytes*/
01389                 data = (CAN_Msg->dataB[0])|(((CAN_Msg->dataB[1]))<<8)|((CAN_Msg->dataB[2])<<16)|((CAN_Msg->dataB[3])<<24);
01390                 CANx->TDB1 = data;
01391
01392                  /*Write transmission request*/
01393                  CANx->CMR = 0x21;
01394                  return SUCCESS;
01395         }
01396         //check status of Transmit Buffer 2
01397         else if(CANx->SR & (1<<10))
01398         {
01399                 /* Transmit Channel 2 is available */
01400                 /* Write frame informations and frame data into its CANxTFI2,
01401                  * CANxTID2, CANxTDA2, CANxTDB2 register */
01402                 CANx->TFI2 &= ~0x000F0000;
01403                 CANx->TFI2 |= (CAN_Msg->len)<<16;
01404                 if(CAN_Msg->type == REMOTE_FRAME)
01405                 {
01406                         CANx->TFI2 |= (1<<30); //set bit RTR
01407                 }
01408                 else
01409                 {
01410                         CANx->TFI2 &= ~(1<<30);
01411                 }
01412                 if(CAN_Msg->format == EXT_ID_FORMAT)
01413                 {
01414                         CANx->TFI2 |= (1<<31); //set bit FF
01415                 }
01416                 else
01417                 {
01418                         CANx->TFI2 &= ~(1<<31);
01419                 }
01420
01421                 /* Write CAN ID*/
01422                 CANx->TID2 = CAN_Msg->id;
01423
01424                 /*Write first 4 data bytes*/
01425                 data = (CAN_Msg->dataA[0])|(((CAN_Msg->dataA[1]))<<8)|((CAN_Msg->dataA[2])<<16)|((CAN_Msg->dataA[3])<<24);
01426                 CANx->TDA2 = data;
01427
01428                 /*Write second 4 data bytes*/
01429                 data = (CAN_Msg->dataB[0])|(((CAN_Msg->dataB[1]))<<8)|((CAN_Msg->dataB[2])<<16)|((CAN_Msg->dataB[3])<<24);
01430                 CANx->TDB2 = data;
01431
01432                 /*Write transmission request*/
01433                 CANx->CMR = 0x41;
01434                 return SUCCESS;
01435         }
01436         //check status of Transmit Buffer 3
01437         else if (CANx->SR & (1<<18))
01438         {
01439                 /* Transmit Channel 3 is available */
01440                 /* Write frame informations and frame data into its CANxTFI3,
01441                  * CANxTID3, CANxTDA3, CANxTDB3 register */
01442                 CANx->TFI3 &= ~0x000F0000;
01443                 CANx->TFI3 |= (CAN_Msg->len)<<16;
01444                 if(CAN_Msg->type == REMOTE_FRAME)
01445                 {
01446                         CANx->TFI3 |= (1<<30); //set bit RTR
01447                 }
01448                 else
01449                 {
01450                         CANx->TFI3 &= ~(1<<30);
01451                 }
01452                 if(CAN_Msg->format == EXT_ID_FORMAT)
01453                 {
01454                         CANx->TFI3 |= (1<<31); //set bit FF
01455                 }
01456                 else
01457                 {
01458                         CANx->TFI3 &= ~(1<<31);
01459                 }
01460
01461                 /* Write CAN ID*/
01462                 CANx->TID3 = CAN_Msg->id;
01463
01464                 /*Write first 4 data bytes*/
01465                 data = (CAN_Msg->dataA[0])|(((CAN_Msg->dataA[1]))<<8)|((CAN_Msg->dataA[2])<<16)|((CAN_Msg->dataA[3])<<24);
01466                 CANx->TDA3 = data;
01467
01468                 /*Write second 4 data bytes*/
01469                 data = (CAN_Msg->dataB[0])|(((CAN_Msg->dataB[1]))<<8)|((CAN_Msg->dataB[2])<<16)|((CAN_Msg->dataB[3])<<24);
01470                 CANx->TDB3 = data;
01471
01472                 /*Write transmission request*/
01473                 CANx->CMR = 0x81;
01474                 return SUCCESS;
01475         }
01476         else
01477         {
01478                 return ERROR;
01479         }
01480 }
01481
01482 /********************************************************************/
01493 Status CAN_ReceiveMsg (LPC_CAN_TypeDef *CANx, CAN_MSG_Type *CAN_Msg)
01494 {
01495         uint32_t data;
01496
01497         CHECK_PARAM(PARAM_CANx(CANx));
01498
01499         //check status of Receive Buffer
01500         if((CANx->SR &0x00000001))
01501         {
01502                 /* Receive message is available */
01503                 /* Read frame informations */
01504                 CAN_Msg->format   = (uint8_t)(((CANx->RFS) & 0x80000000)>>31);
01505                 CAN_Msg->type     = (uint8_t)(((CANx->RFS) & 0x40000000)>>30);
01506                 CAN_Msg->len      = (uint8_t)(((CANx->RFS) & 0x000F0000)>>16);
01507
01508
01509                 /* Read CAN message identifier */
01510                 CAN_Msg->id = CANx->RID;
01511
01512                 /* Read the data if received message was DATA FRAME */
01513                 if (CAN_Msg->type == DATA_FRAME)
01514                 {
01515                         /* Read first 4 data bytes */
01516                         data = CANx->RDA;
01517                         *((uint8_t *) &CAN_Msg->dataA[0])= data & 0x000000FF;
01518                         *((uint8_t *) &CAN_Msg->dataA[1])= (data & 0x0000FF00)>>8;;
01519                         *((uint8_t *) &CAN_Msg->dataA[2])= (data & 0x00FF0000)>>16;
01520                         *((uint8_t *) &CAN_Msg->dataA[3])= (data & 0xFF000000)>>24;
01521
01522                         /* Read second 4 data bytes */
01523                         data = CANx->RDB;
01524                         *((uint8_t *) &CAN_Msg->dataB[0])= data & 0x000000FF;
01525                         *((uint8_t *) &CAN_Msg->dataB[1])= (data & 0x0000FF00)>>8;
01526                         *((uint8_t *) &CAN_Msg->dataB[2])= (data & 0x00FF0000)>>16;
01527                         *((uint8_t *) &CAN_Msg->dataB[3])= (data & 0xFF000000)>>24;
01528
01529                 /*release receive buffer*/
01530                 CANx->CMR = 0x04;
01531                 }
01532                 else
01533                 {
01534                         /* Received Frame is a Remote Frame, not have data, we just receive
01535                          * message information only */
01536                         CANx->CMR = 0x04; /*release receive buffer*/
01537                         return SUCCESS;
01538                 }
01539         }
01540         else
01541         {
01542                 // no receive message available
01543                 return ERROR;
01544         }
01545         return SUCCESS;
01546 }
01547
01548 /********************************************************************/
01558 CAN_ERROR FCAN_ReadObj (LPC_CANAF_TypeDef* CANAFx, CAN_MSG_Type *CAN_Msg)
01559 {
01560         uint32_t *pSrc, data;
01561         uint32_t interrut_word, msg_idx, test_bit, head_idx, tail_idx;
01562
01563         CHECK_PARAM(PARAM_CANAFx(CANAFx));
01564
01565         interrut_word = 0;
01566
01567         if (LPC_CANAF->FCANIC0 != 0)
01568         {
01569                 interrut_word = LPC_CANAF->FCANIC0;
01570                 head_idx = 0;
01571                 tail_idx = 31;
01572         }
01573         else if (LPC_CANAF->FCANIC1 != 0)
01574         {
01575                 interrut_word = LPC_CANAF->FCANIC1;
01576                 head_idx = 32;
01577                 tail_idx = 63;
01578         }
01579
01580         if (interrut_word != 0)
01581         {
01582                 /* Detect for interrupt pending */
01583                 msg_idx = 0;
01584                 for (msg_idx = head_idx; msg_idx <= tail_idx; msg_idx++)
01585                 {
01586                         test_bit = interrut_word & 0x1;
01587                         interrut_word = interrut_word >> 1;
01588
01589                         if (test_bit)
01590                         {
01591                                 pSrc = (uint32_t *) (LPC_CANAF->ENDofTable + LPC_CANAF_RAM_BASE + msg_idx * 12);
01592
01593                         /* Has been finished updating the content */
01594                         if ((*pSrc & 0x03000000L) == 0x03000000L)
01595                         {
01596                                 /*clear semaphore*/
01597                                 *pSrc &= 0xFCFFFFFF;
01598
01599                                 /*Set to DatA*/
01600                                 pSrc++;
01601                                 /* Copy to dest buf */
01602                                 data = *pSrc;
01603                                 *((uint8_t *) &CAN_Msg->dataA[0])= data & 0x000000FF;
01604                                 *((uint8_t *) &CAN_Msg->dataA[1])= (data & 0x0000FF00)>>8;
01605                                 *((uint8_t *) &CAN_Msg->dataA[2])= (data & 0x00FF0000)>>16;
01606                                 *((uint8_t *) &CAN_Msg->dataA[3])= (data & 0xFF000000)>>24;
01607
01608                                 /*Set to DatB*/
01609                                 pSrc++;
01610                                 /* Copy to dest buf */
01611                                 data = *pSrc;
01612                                 *((uint8_t *) &CAN_Msg->dataB[0])= data & 0x000000FF;
01613                                 *((uint8_t *) &CAN_Msg->dataB[1])= (data & 0x0000FF00)>>8;
01614                                 *((uint8_t *) &CAN_Msg->dataB[2])= (data & 0x00FF0000)>>16;
01615                                 *((uint8_t *) &CAN_Msg->dataB[3])= (data & 0xFF000000)>>24;
01616                                 /*Back to Dat1*/
01617                                 pSrc -= 2;
01618
01619                                 CAN_Msg->id = *pSrc & 0x7FF;
01620                                 CAN_Msg->len = (uint8_t) (*pSrc >> 16) & 0x0F;
01621                                         CAN_Msg->format = 0; //FullCAN Object ID always is 11-bit value
01622                                         CAN_Msg->type = (uint8_t)(*pSrc >> 30) &0x01;
01623                                 /*Re-read semaphore*/
01624                                 if ((*pSrc & 0x03000000L) == 0)
01625                                 {
01626                                         return CAN_OK;
01627                                 }
01628                         }
01629                         }
01630                 }
01631         }
01632         return CAN_FULL_OBJ_NOT_RCV;
01633 }
01634 /********************************************************************/
01647 uint32_t CAN_GetCTRLStatus (LPC_CAN_TypeDef* CANx, CAN_CTRL_STS_Type arg)
01648 {
01649         CHECK_PARAM(PARAM_CANx(CANx));
01650         CHECK_PARAM(PARAM_CTRL_STS_TYPE(arg));
01651
01652         switch (arg)
01653         {
01654         case CANCTRL_GLOBAL_STS:
01655                 return CANx->GSR;
01656
01657         case CANCTRL_INT_CAP:
01658                 return CANx->ICR;
01659
01660         case CANCTRL_ERR_WRN:
01661                 return CANx->EWL;
01662
01663         default: // CANCTRL_STS
01664                 return CANx->SR;
01665         }
01666 }
01667 /********************************************************************/
01677 uint32_t CAN_GetCRStatus (LPC_CANCR_TypeDef* CANCRx, CAN_CR_STS_Type arg)
01678 {
01679         CHECK_PARAM(PARAM_CANCRx(CANCRx));
01680         CHECK_PARAM(PARAM_CR_STS_TYPE(arg));
01681
01682         switch (arg)
01683         {
01684         case CANCR_TX_STS:
01685                 return CANCRx->CANTxSR;
01686
01687         case CANCR_RX_STS:
01688                 return CANCRx->CANRxSR;
01689
01690         default:        // CANCR_MS
01691                 return CANCRx->CANMSR;
01692         }
01693 }
01694 /********************************************************************/
01718 void CAN_IRQCmd (LPC_CAN_TypeDef* CANx, CAN_INT_EN_Type arg, FunctionalState NewState)
01719 {
01720         CHECK_PARAM(PARAM_CANx(CANx));
01721         CHECK_PARAM(PARAM_INT_EN_TYPE(arg));
01722         CHECK_PARAM(PARAM_FUNCTIONALSTATE(NewState));
01723
01724         if(NewState == ENABLE)
01725         {
01726                 if(arg==CANINT_FCE)
01727                 {
01728                         LPC_CANAF->AFMR = 0x01;
01729                         LPC_CANAF->FCANIE = 0x01;
01730                         LPC_CANAF->AFMR = 0x04;
01731                 }
01732                 else
01733                         CANx->IER |= (1 << arg);
01734         }
01735         else
01736         {
01737                 if(arg==CANINT_FCE){
01738                         LPC_CANAF->AFMR = 0x01;
01739                         LPC_CANAF->FCANIE = 0x01;
01740                         LPC_CANAF->AFMR = 0x00;
01741                 }
01742                 else
01743                         CANx->IER &= ~(1 << arg);
01744         }
01745 }
01746
01747 /********************************************************************/
01757 void CAN_SetAFMode (LPC_CANAF_TypeDef* CANAFx, CAN_AFMODE_Type AFMode)
01758 {
01759         CHECK_PARAM(PARAM_CANAFx(CANAFx));
01760         CHECK_PARAM(PARAM_AFMODE_TYPE(AFMode));
01761
01762         switch(AFMode)
01763         {
01764         case CAN_Normal:
01765                 CANAFx->AFMR = 0x00;
01766                 break;
01767         case CAN_AccOff:
01768                 CANAFx->AFMR = 0x01;
01769                 break;
01770         case CAN_AccBP:
01771                 CANAFx->AFMR = 0x02;
01772                 break;
01773         case CAN_eFCAN:
01774                 CANAFx->AFMR = 0x04;
01775                 break;
01776         }
01777 }
01778
01779 /********************************************************************/
01798 void CAN_ModeConfig(LPC_CAN_TypeDef* CANx, CAN_MODE_Type mode, FunctionalState NewState)
01799 {
01800         CHECK_PARAM(PARAM_CANx(CANx));
01801         CHECK_PARAM(PARAM_MODE_TYPE(mode));
01802         CHECK_PARAM(PARAM_FUNCTIONALSTATE(NewState));
01803
01804         switch(mode)
01805         {
01806         case CAN_OPERATING_MODE:
01807                 CANx->MOD = 0x00;
01808                 break;
01809         case CAN_RESET_MODE:
01810                 if(NewState == ENABLE)
01811                         CANx->MOD |=CAN_MOD_RM;
01812                 else
01813                         CANx->MOD &= ~CAN_MOD_RM;
01814                 break;
01815         case CAN_LISTENONLY_MODE:
01816                 CANx->MOD |=CAN_MOD_RM;//Enter Reset mode
01817                 if(NewState == ENABLE)
01818                         CANx->MOD |=CAN_MOD_LOM;
01819                 else
01820                         CANx->MOD &=~CAN_MOD_LOM;
01821                 CANx->MOD &=~CAN_MOD_RM;//Release Reset mode
01822                 break;
01823         case CAN_SELFTEST_MODE:
01824                 CANx->MOD |=CAN_MOD_RM;//Enter Reset mode
01825                 if(NewState == ENABLE)
01826                         CANx->MOD |=CAN_MOD_STM;
01827                 else
01828                         CANx->MOD &=~CAN_MOD_STM;
01829                 CANx->MOD &=~CAN_MOD_RM;//Release Reset mode
01830                 break;
01831         case CAN_TXPRIORITY_MODE:
01832                 if(NewState == ENABLE)
01833                         CANx->MOD |=CAN_MOD_TPM;
01834                 else
01835                         CANx->MOD &=~CAN_MOD_TPM;
01836                 break;
01837         case CAN_SLEEP_MODE:
01838                 if(NewState == ENABLE)
01839                         CANx->MOD |=CAN_MOD_SM;
01840                 else
01841                         CANx->MOD &=~CAN_MOD_SM;
01842                 break;
01843         case CAN_RXPOLARITY_MODE:
01844                 if(NewState == ENABLE)
01845                         CANx->MOD |=CAN_MOD_RPM;
01846                 else
01847                         CANx->MOD &=~CAN_MOD_RPM;
01848                 break;
01849         case CAN_TEST_MODE:
01850                 if(NewState == ENABLE)
01851                         CANx->MOD |=CAN_MOD_TM;
01852                 else
01853                         CANx->MOD &=~CAN_MOD_TM;
01854                 break;
01855         }
01856 }
01857 /*********************************************************************/
01873 void CAN_SetCommand(LPC_CAN_TypeDef* CANx, uint32_t CMRType)
01874 {
01875         CHECK_PARAM(PARAM_CANx(CANx));
01876         CANx->CMR |= CMRType;
01877 }
01878
01879 /*********************************************************************/
01886 uint32_t CAN_IntGetStatus(LPC_CAN_TypeDef* CANx)
01887 {
01888         CHECK_PARAM(PARAM_CANx(CANx));
01889         return CANx->ICR;
01890 }
01891
01892 /*********************************************************************/
01899 IntStatus CAN_FullCANIntGetStatus (LPC_CANAF_TypeDef* CANAFx)
01900 {
01901         CHECK_PARAM( PARAM_CANAFx(CANAFx));
01902         if (CANAFx->FCANIE)
01903                 return SET;
01904         return RESET;
01905 }
01906
01907 /*********************************************************************/
01915 uint32_t CAN_FullCANPendGetStatus(LPC_CANAF_TypeDef* CANAFx, FullCAN_IC_Type type)
01916 {
01917         CHECK_PARAM(PARAM_CANAFx(CANAFx));
01918         CHECK_PARAM( PARAM_FULLCAN_IC(type));
01919         if (type == FULLCAN_IC0)
01920                 return CANAFx->FCANIC0;
01921         return CANAFx->FCANIC1;
01922 }
01923 /* End of Public Variables ---------------------------------------------------------- */
01928 #endif /* _CAN */
01929
01934 /* --------------------------------- End Of File ------------------------------ */
Generated on Tue Jun 7 14:58:56 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_can.h Source File

C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_can.h

Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          lpc17xx_can.h                   2010-06-18
00003 */
00027 /* Peripheral group ----------------------------------------------------------- */
00033 #ifndef LPC17XX_CAN_H_
00034 #define LPC17XX_CAN_H_
00035
00036 /* Includes ------------------------------------------------------------------- */
00037 #include "LPC17xx.h"
00038 #include "lpc_types.h"
00039
00040 #ifdef __cplusplus
00041 extern "C"
00042 {
00043 #endif
00044
00045 /* Public Types --------------------------------------------------------------- */
00049 #define MSG_ENABLE                              ((uint8_t)(0))
00050 #define MSG_DISABLE                             ((uint8_t)(1))
00051 #define CAN1_CTRL                               ((uint8_t)(0))
00052 #define CAN2_CTRL                               ((uint8_t)(1))
00053 #define PARAM_FULLCAN_IC(n)             ((n==FULLCAN_IC0)||(n==FULLCAN_IC1))
00054 #define ID_11                                   1
00055 #define MAX_HW_FULLCAN_OBJ              64
00056 #define MAX_SW_FULLCAN_OBJ              32
00057
00062 /* Private Macros ------------------------------------------------------------- */
00067 /* --------------------- BIT DEFINITIONS -------------------------------------- */
00068 /*********************************************************************/
00072 #define CAN_MOD_RM                      ((uint32_t)(1))
00073
00074 #define CAN_MOD_LOM                     ((uint32_t)(1<<1))
00075
00076 #define CAN_MOD_STM                     ((uint32_t)(1<<2))
00077
00078 #define CAN_MOD_TPM                     ((uint32_t)(1<<3))
00079
00080 #define CAN_MOD_SM                      ((uint32_t)(1<<4))
00081
00082 #define CAN_MOD_RPM                     ((uint32_t)(1<<5))
00083
00084 #define CAN_MOD_TM                      ((uint32_t)(1<<7))
00085
00086 /*********************************************************************/
00090 #define CAN_CMR_TR                      ((uint32_t)(1))
00091
00092 #define CAN_CMR_AT                      ((uint32_t)(1<<1))
00093
00094 #define CAN_CMR_RRB                     ((uint32_t)(1<<2))
00095
00096 #define CAN_CMR_CDO                     ((uint32_t)(1<<3))
00097
00098 #define CAN_CMR_SRR                     ((uint32_t)(1<<4))
00099
00100 #define CAN_CMR_STB1            ((uint32_t)(1<<5))
00101
00102 #define CAN_CMR_STB2            ((uint32_t)(1<<6))
00103
00104 #define CAN_CMR_STB3            ((uint32_t)(1<<7))
00105
00106 /*********************************************************************/
00110 #define CAN_GSR_RBS                     ((uint32_t)(1))
00111
00112 #define CAN_GSR_DOS                     ((uint32_t)(1<<1))
00113
00114 #define CAN_GSR_TBS                     ((uint32_t)(1<<2))
00115
00116 #define CAN_GSR_TCS                     ((uint32_t)(1<<3))
00117
00118 #define CAN_GSR_RS                      ((uint32_t)(1<<4))
00119
00120 #define CAN_GSR_TS                      ((uint32_t)(1<<5))
00121
00122 #define CAN_GSR_ES                      ((uint32_t)(1<<6))
00123
00124 #define CAN_GSR_BS                      ((uint32_t)(1<<7))
00125
00126 #define CAN_GSR_RXERR(n)        ((uint32_t)((n&0xFF)<<16))
00127
00128 #define CAN_GSR_TXERR(n)        ((uint32_t)(n&0xFF)<<24))
00129
00130 /*********************************************************************/
00134 #define CAN_ICR_RI                      ((uint32_t)(1))
00135
00136 #define CAN_ICR_TI1                     ((uint32_t)(1<<1))
00137
00138 #define CAN_ICR_EI                      ((uint32_t)(1<<2))
00139
00140 #define CAN_ICR_DOI                     ((uint32_t)(1<<3))
00141
00142 #define CAN_ICR_WUI                     ((uint32_t)(1<<4))
00143
00144 #define CAN_ICR_EPI                     ((uint32_t)(1<<5))
00145
00146 #define CAN_ICR_ALI                     ((uint32_t)(1<<6))
00147
00148 #define CAN_ICR_BEI                     ((uint32_t)(1<<7))
00149
00150 #define CAN_ICR_IDI                     ((uint32_t)(1<<8))
00151
00152 #define CAN_ICR_TI2                     ((uint32_t)(1<<9))
00153
00154 #define CAN_ICR_TI3                     ((uint32_t)(1<<10))
00155
00156 #define CAN_ICR_ERRBIT(n)       ((uint32_t)((n&0x1F)<<16))
00157
00158 #define CAN_ICR_ERRDIR          ((uint32_t)(1<<21))
00159
00160 #define CAN_ICR_ERRC(n)         ((uint32_t)((n&0x3)<<22))
00161
00162 #define CAN_ICR_ALCBIT(n)               ((uint32_t)((n&0xFF)<<24))
00163
00164 /*********************************************************************/
00168 #define CAN_IER_RIE                     ((uint32_t)(1))
00169
00170 #define CAN_IER_TIE1            ((uint32_t)(1<<1))
00171
00172 #define CAN_IER_EIE                     ((uint32_t)(1<<2))
00173
00174 #define CAN_IER_DOIE            ((uint32_t)(1<<3))
00175
00176 #define CAN_IER_WUIE            ((uint32_t)(1<<4))
00177
00178 #define CAN_IER_EPIE            ((uint32_t)(1<<5))
00179
00180 #define CAN_IER_ALIE            ((uint32_t)(1<<6))
00181
00182 #define CAN_IER_BEIE            ((uint32_t)(1<<7))
00183
00184 #define CAN_IER_IDIE            ((uint32_t)(1<<8))
00185
00186 #define CAN_IER_TIE2            ((uint32_t)(1<<9))
00187
00188 #define CAN_IER_TIE3            ((uint32_t)(1<<10))
00189
00190 /*********************************************************************/
00194 #define CAN_BTR_BRP(n)          ((uint32_t)(n&0x3FF))
00195
00196 #define CAN_BTR_SJM(n)          ((uint32_t)((n&0x3)<<14))
00197
00198 #define CAN_BTR_TESG1(n)        ((uint32_t)(n&0xF)<<16))
00199
00200 #define CAN_BTR_TESG2(n)        ((uint32_t)(n&0xF)<<20))
00201
00202 #define CAN_BTR_SAM(n)          ((uint32_t)(1<<23))
00203
00204 /*********************************************************************/
00208 #define CAN_EWL_EWL(n)          ((uint32_t)(n&0xFF))
00209
00210 /*********************************************************************/
00214 #define CAN_SR_RBS              ((uint32_t)(1))
00215
00216 #define CAN_SR_DOS              ((uint32_t)(1<<1))
00217
00218 #define CAN_SR_TBS1             ((uint32_t)(1<<2))
00219
00220 #define CAN_SR_TCS1             ((uint32_t)(1<<3))
00221
00222 #define CAN_SR_RS               ((uint32_t)(1<<4))
00223
00224 #define CAN_SR_TS1              ((uint32_t)(1<<5))
00225
00226 #define CAN_SR_ES               ((uint32_t)(1<<6))
00227
00228 #define CAN_SR_BS               ((uint32_t)(1<<7))
00229
00230 #define CAN_SR_TBS2             ((uint32_t)(1<<10))
00231
00232 #define CAN_SR_TCS2             ((uint32_t)(1<<11))
00233
00234 #define CAN_SR_TS2              ((uint32_t)(1<<13))
00235
00236 #define CAN_SR_TBS3             ((uint32_t)(1<<18))
00237
00238 #define CAN_SR_TCS3             ((uint32_t)(1<<19))
00239
00240 #define CAN_SR_TS3              ((uint32_t)(1<<21))
00241
00242 /*********************************************************************/
00246 #define CAN_RFS_ID_INDEX(n)     ((uint32_t)(n&0x3FF))
00247
00248 #define CAN_RFS_BP                      ((uint32_t)(1<<10))
00249
00250 #define CAN_RFS_DLC(n)          ((uint32_t)((n&0xF)<<16)
00251
00252 #define CAN_RFS_RTR                     ((uint32_t)(1<<30))
00253
00254 #define CAN_RFS_FF                      ((uint32_t)(1<<31))
00255
00256 /*********************************************************************/
00260 #define CAN_RID_ID_11(n)                ((uint32_t)(n&0x7FF))
00261
00262 #define CAN_RID_ID_29(n)                ((uint32_t)(n&0x1FFFFFFF))
00263
00264 /*********************************************************************/
00268 #define CAN_RDA_DATA1(n)                ((uint32_t)(n&0xFF))
00269
00270 #define CAN_RDA_DATA2(n)                ((uint32_t)((n&0xFF)<<8))
00271
00272 #define CAN_RDA_DATA3(n)                ((uint32_t)((n&0xFF)<<16))
00273
00274 #define CAN_RDA_DATA4(n)                ((uint32_t)((n&0xFF)<<24))
00275
00276 /*********************************************************************/
00280 #define CAN_RDB_DATA5(n)                ((uint32_t)(n&0xFF))
00281
00282 #define CAN_RDB_DATA6(n)                ((uint32_t)((n&0xFF)<<8))
00283
00284 #define CAN_RDB_DATA7(n)                ((uint32_t)((n&0xFF)<<16))
00285
00286 #define CAN_RDB_DATA8(n)                ((uint32_t)((n&0xFF)<<24))
00287
00288 /*********************************************************************/
00292 #define CAN_TFI_PRIO(n)                 ((uint32_t)(n&0xFF))
00293
00294 #define CAN_TFI_DLC(n)                  ((uint32_t)((n&0xF)<<16))
00295
00296 #define CAN_TFI_RTR                             ((uint32_t)(1<<30))
00297
00298 #define CAN_TFI_FF                              ((uint32_t)(1<<31))
00299
00300 /*********************************************************************/
00304 #define CAN_TID_ID11(n)                 ((uint32_t)(n&0x7FF))
00305
00306 #define CAN_TID_ID29(n)                 ((uint32_t)(n&0x1FFFFFFF))
00307
00308 /*********************************************************************/
00312 #define CAN_TDA_DATA1(n)                ((uint32_t)(n&0xFF))
00313
00314 #define CAN_TDA_DATA2(n)                ((uint32_t)((n&0xFF)<<8))
00315
00316 #define CAN_TDA_DATA3(n)                ((uint32_t)((n&0xFF)<<16))
00317
00318 #define CAN_TDA_DATA4(n)                ((uint32_t)((n&0xFF)<<24))
00319
00320 /*********************************************************************/
00324 #define CAN_TDA_DATA5(n)                ((uint32_t)(n&0xFF))
00325
00326 #define CAN_TDA_DATA6(n)                ((uint32_t)((n&0xFF)<<8))
00327
00328 #define CAN_TDA_DATA7(n)                ((uint32_t)((n&0xFF)<<16))
00329
00330 #define CAN_TDA_DATA8(n)                ((uint32_t)((n&0xFF)<<24))
00331
00332 /*********************************************************************/
00336 #define CAN1SLEEPCLR                    ((uint32_t)(1<<1))
00337
00338 #define CAN2SLEEPCLR                    ((uint32_t)(1<<2))
00339
00340 /*********************************************************************/
00344 #define CAN_WAKEFLAGES_CAN1WAKE         ((uint32_t)(1<<1))
00345
00346 #define CAN_WAKEFLAGES_CAN2WAKE         ((uint32_t)(1<<2))
00347
00348 /*********************************************************************/
00352 #define CAN_TSR_TS1                     ((uint32_t)(1))
00353
00354 #define CAN_TSR_TS2                     ((uint32_t)(1<<1))
00355
00356 #define CAN_TSR_TBS1                    ((uint32_t)(1<<8))
00357
00358 #define CAN_TSR_TBS2                    ((uint32_t)(1<<9))
00359
00360 #define CAN_TSR_TCS1                    ((uint32_t)(1<<16))
00361
00362 #define CAN_TSR_TCS2                    ((uint32_t)(1<<17))
00363
00364 /*********************************************************************/
00368 #define CAN_RSR_RS1                             ((uint32_t)(1))
00369
00370 #define CAN_RSR_RS2                             ((uint32_t)(1<<1))
00371
00372 #define CAN_RSR_RB1                             ((uint32_t)(1<<8))
00373
00374 #define CAN_RSR_RB2                             ((uint32_t)(1<<9))
00375
00376 #define CAN_RSR_DOS1                    ((uint32_t)(1<<16))
00377
00378 #define CAN_RSR_DOS2                    ((uint32_t)(1<<17))
00379
00380 /*********************************************************************/
00384 #define CAN_MSR_E1              ((uint32_t)(1))
00385
00386 #define CAN_MSR_E2              ((uint32_t)(1<<1))
00387
00388 #define CAN_MSR_BS1             ((uint32_t)(1<<8))
00389
00390 #define CAN_MSR_BS2             ((uint32_t)(1<<9))
00391
00392 /*********************************************************************/
00396 #define CAN_AFMR_AccOff         ((uint32_t)(1))
00397
00398 #define CAN_AFMR_AccBP          ((uint32_t)(1<<1))
00399
00400 #define CAN_AFMR_eFCAN          ((uint32_t)(1<<2))
00401
00402 /*********************************************************************/
00406 #define CAN_STT_sa(n)           ((uint32_t)((n&1FF)<<2))
00407
00408 /*********************************************************************/
00412 #define CAN_SFF_GRP_sa(n)               ((uint32_t)((n&3FF)<<2))
00413
00414 /*********************************************************************/
00418 #define CAN_EFF_sa(n)           ((uint32_t)((n&1FF)<<2))
00419
00420 /*********************************************************************/
00424 #define CAN_Eff_GRP_sa(n)               ((uint32_t)((n&3FF)<<2))
00425
00426 /*********************************************************************/
00430 #define CAN_EndofTable(n)               ((uint32_t)((n&3FF)<<2))
00431
00432 /*********************************************************************/
00436 #define CAN_LUTerrAd(n)         ((uint32_t)((n&1FF)<<2))
00437
00438 /*********************************************************************/
00442 #define CAN_LUTerr              ((uint32_t)(1))
00443
00444 /*********************************************************************/
00448 #define CAN_FCANIE              ((uint32_t)(1))
00449
00450 /*********************************************************************/
00454 #define CAN_FCANIC0_IntPnd(n)   ((uint32_t)(1<<n))
00455
00456 /*********************************************************************/
00460 #define CAN_FCANIC1_IntPnd(n)   ((uint32_t)(1<<(n-32)))
00461
00462
00463 /* ---------------- CHECK PARAMETER DEFINITIONS ---------------------------- */
00465 #define PARAM_CANx(x)                   ((((uint32_t*)x)==((uint32_t *)LPC_CAN1)) \
00466 ||(((uint32_t*)x)==((uint32_t *)LPC_CAN2)))
00467
00468 /*      Macro to determine if it is valid CANAF or not*/
00469 #define PARAM_CANAFx(x)                 (((uint32_t*)x)== ((uint32_t*)LPC_CANAF))
00470
00471 /*      Macro to determine if it is valid CANAF RAM or not*/
00472 #define PARAM_CANAFRAMx(x)              (((uint32_t*)x)== (uint32_t*)LPC_CANAF_RAM)
00473
00474 /*      Macro to determine if it is valid CANCR or not*/
00475 #define PARAM_CANCRx(x)                 (((uint32_t*)x)==((uint32_t*)LPC_CANCR))
00476
00478 #define PARAM_I2S_DATA(data)    ((data>=0)&&(data <= 0xFFFFFFFF))
00479
00481 #define PRAM_I2S_FREQ(freq)             ((freq>=16000)&&(freq <= 96000))
00482
00484 #define PARAM_ID_11(n)                  ((n>>11)==0) /*-- 11 bit --*/
00485 #define PARAM_ID_29(n)                  ((n>>29)==0) /*-- 29 bit --*/
00486
00488 #define PARAM_DLC(n)                    ((n>>4)==0)  /*-- 4 bit --*/
00489
00490 #define PARAM_ID_FORMAT(n)              ((n==STD_ID_FORMAT)||(n==EXT_ID_FORMAT))
00491
00493 #define PARAM_GRP_ID(x, y)              ((x<=y))
00494
00496 #define PARAM_FRAME_TYPE(n)             ((n==DATA_FRAME)||(n==REMOTE_FRAME))
00497
00499 #define PARAM_CTRL_STS_TYPE(n)  ((n==CANCTRL_GLOBAL_STS)||(n==CANCTRL_INT_CAP) \
00500 ||(n==CANCTRL_ERR_WRN)||(n==CANCTRL_STS))
00501
00503 #define PARAM_CR_STS_TYPE(n)    ((n==CANCR_TX_STS)||(n==CANCR_RX_STS) \
00504 ||(n==CANCR_MS))
00505
00506 #define PARAM_AFMODE_TYPE(n)    ((n==CAN_Normal)||(n==CAN_AccOff) \
00507 ||(n==CAN_AccBP)||(n==CAN_eFCAN))
00508
00510 #define PARAM_MODE_TYPE(n)              ((n==CAN_OPERATING_MODE)||(n==CAN_RESET_MODE) \
00511 ||(n==CAN_LISTENONLY_MODE)||(n==CAN_SELFTEST_MODE) \
00512 ||(n==CAN_TXPRIORITY_MODE)||(n==CAN_SLEEP_MODE) \
00513 ||(n==CAN_RXPOLARITY_MODE)||(n==CAN_TEST_MODE))
00514
00516 #define PARAM_CTRL(n)   ((n==CAN1_CTRL)|(n==CAN2_CTRL))
00517
00519 #define PARAM_MSG_DISABLE(n)    ((n==MSG_ENABLE)|(n==MSG_DISABLE))
00520
00522 #define PARAM_INT_EN_TYPE(n)    ((n==CANINT_RIE)||(n==CANINT_TIE1) \
00523 ||(n==CANINT_EIE)||(n==CANINT_DOIE) \
00524 ||(n==CANINT_WUIE)||(n==CANINT_EPIE) \
00525 ||(n==CANINT_ALIE)||(n==CANINT_BEIE) \
00526 ||(n==CANINT_IDIE)||(n==CANINT_TIE2) \
00527 ||(n==CANINT_TIE3)||(n==CANINT_FCE))
00528
00530 #define PARAM_AFLUT_ENTRY_TYPE(n)       ((n==FULLCAN_ENTRY)||(n==EXPLICIT_STANDARD_ENTRY)\
00531 ||(n==GROUP_STANDARD_ENTRY)||(n==EXPLICIT_EXTEND_ENTRY) \
00532 ||(n==GROUP_EXTEND_ENTRY))
00533
00535 #define PARAM_POSITION(n)       ((n>=0)&&(n<512))
00536
00541 /* Public Types --------------------------------------------------------------- */
00547 /***********************************************************************
00548  * CAN device configuration commands (IOCTL commands and arguments)
00549  **********************************************************************/
00553 typedef enum {
00554         STD_ID_FORMAT = 0,
00555         EXT_ID_FORMAT = 1
00556 } CAN_ID_FORMAT_Type;
00557
00561 typedef enum {
00562         FULLCAN_ENTRY = 0,
00563         EXPLICIT_STANDARD_ENTRY,
00564         GROUP_STANDARD_ENTRY,
00565         EXPLICIT_EXTEND_ENTRY,
00566         GROUP_EXTEND_ENTRY
00567 } AFLUT_ENTRY_Type;
00568
00572 typedef enum {
00573         DATA_FRAME = 0,
00574         REMOTE_FRAME = 1
00575 } CAN_FRAME_Type;
00576
00580 typedef enum {
00581         CANCTRL_GLOBAL_STS = 0,
00582         CANCTRL_INT_CAP,
00583         CANCTRL_ERR_WRN,
00584         CANCTRL_STS
00585 } CAN_CTRL_STS_Type;
00586
00590 typedef enum {
00591         CANCR_TX_STS = 0,
00592         CANCR_RX_STS,
00593         CANCR_MS
00594 } CAN_CR_STS_Type;
00595
00599 typedef enum{
00600         FULLCAN_IC0,
00601         FULLCAN_IC1
00602 }FullCAN_IC_Type;
00603
00607 typedef enum {
00608         CANINT_RIE = 0,
00609         CANINT_TIE1,
00610         CANINT_EIE,
00611         CANINT_DOIE,
00612         CANINT_WUIE,
00613         CANINT_EPIE,
00614         CANINT_ALIE,
00615         CANINT_BEIE,
00616         CANINT_IDIE,
00617         CANINT_TIE2,
00618         CANINT_TIE3,
00619         CANINT_FCE
00620 } CAN_INT_EN_Type;
00621
00625 typedef enum {
00626         CAN_Normal = 0,
00627         CAN_AccOff,
00628         CAN_AccBP,
00629         CAN_eFCAN
00630 } CAN_AFMODE_Type;
00631
00635 typedef enum {
00636         CAN_OPERATING_MODE = 0,
00637         CAN_RESET_MODE,
00638         CAN_LISTENONLY_MODE,
00639         CAN_SELFTEST_MODE,
00640         CAN_TXPRIORITY_MODE,
00641         CAN_SLEEP_MODE,
00642         CAN_RXPOLARITY_MODE,
00643         CAN_TEST_MODE
00644 } CAN_MODE_Type;
00645
00649 typedef enum {
00650         CAN_OK = 1,
00651         CAN_OBJECTS_FULL_ERROR,
00652         CAN_FULL_OBJ_NOT_RCV,
00653         CAN_NO_RECEIVE_DATA,
00654         CAN_AF_ENTRY_ERROR,
00655         CAN_CONFLICT_ID_ERROR,
00656         CAN_ENTRY_NOT_EXIT_ERROR
00657 } CAN_ERROR;
00658
00662 typedef struct {
00663         uint8_t RD;
00671         uint8_t TD;
00679 } CAN_PinCFG_Type;
00680
00684 typedef struct {
00685         uint32_t id;
00689         uint8_t dataA[4];
00690         uint8_t dataB[4];
00691         uint8_t len;
00695         uint8_t format;
00699         uint8_t type;
00704 } CAN_MSG_Type;
00705
00709 typedef struct {
00710         uint8_t controller;
00714         uint8_t disable;
00718         uint16_t id_11;
00719 } FullCAN_Entry;
00720
00724 typedef struct {
00725         uint8_t controller;
00729         uint8_t disable;
00733         uint16_t id_11;
00734 } SFF_Entry;
00735
00739 typedef struct {
00740         uint8_t controller1;
00744         uint8_t disable1;
00748         uint16_t lowerID;
00749         uint8_t controller2;
00753         uint8_t disable2;
00757         uint16_t upperID;
00760 } SFF_GPR_Entry;
00761
00765 typedef struct {
00766         uint8_t controller;
00770         uint32_t ID_29;
00771 } EFF_Entry;
00772
00773
00777 typedef struct {
00778         uint8_t controller1;
00782         uint8_t controller2;
00786         uint32_t lowerEID;
00787         uint32_t upperEID;
00788 } EFF_GPR_Entry;
00789
00790
00794 typedef struct {
00795         FullCAN_Entry* FullCAN_Sec;
00796         uint8_t FC_NumEntry;
00797         SFF_Entry* SFF_Sec;
00798         uint8_t SFF_NumEntry;
00799         SFF_GPR_Entry* SFF_GPR_Sec;
00800         uint8_t SFF_GPR_NumEntry;
00801         EFF_Entry* EFF_Sec;
00802         uint8_t EFF_NumEntry;
00803         EFF_GPR_Entry* EFF_GPR_Sec;
00804         uint8_t EFF_GPR_NumEntry;
00805 } AF_SectionDef;
00806
00812 /* Public Functions ----------------------------------------------------------- */
00817 /* Init/DeInit CAN peripheral -----------*/
00818 void CAN_Init(LPC_CAN_TypeDef *CANx, uint32_t baudrate);
00819 void CAN_DeInit(LPC_CAN_TypeDef *CANx);
00820
00821 /* CAN messages functions ---------------*/
00822 Status CAN_SendMsg(LPC_CAN_TypeDef *CANx, CAN_MSG_Type *CAN_Msg);
00823 Status CAN_ReceiveMsg(LPC_CAN_TypeDef *CANx, CAN_MSG_Type *CAN_Msg);
00824 CAN_ERROR FCAN_ReadObj(LPC_CANAF_TypeDef* CANAFx, CAN_MSG_Type *CAN_Msg);
00825
00826 /* CAN configure functions ---------------*/
00827 void CAN_ModeConfig(LPC_CAN_TypeDef* CANx, CAN_MODE_Type mode,
00828                 FunctionalState NewState);
00829 void CAN_SetAFMode(LPC_CANAF_TypeDef* CANAFx, CAN_AFMODE_Type AFmode);
00830 void CAN_SetCommand(LPC_CAN_TypeDef* CANx, uint32_t CMRType);
00831
00832 /* AFLUT functions ---------------------- */
00833 CAN_ERROR CAN_SetupAFLUT(LPC_CANAF_TypeDef* CANAFx, AF_SectionDef* AFSection);
00834 CAN_ERROR CAN_LoadFullCANEntry(LPC_CAN_TypeDef* CANx, uint16_t ID);
00835 CAN_ERROR CAN_LoadExplicitEntry(LPC_CAN_TypeDef* CANx, uint32_t ID,
00836                 CAN_ID_FORMAT_Type format);
00837 CAN_ERROR CAN_LoadGroupEntry(LPC_CAN_TypeDef* CANx, uint32_t lowerID,
00838                 uint32_t upperID, CAN_ID_FORMAT_Type format);
00839 CAN_ERROR CAN_RemoveEntry(AFLUT_ENTRY_Type EntryType, uint16_t position);
00840
00841 /* CAN interrupt functions -----------------*/
00842 void CAN_IRQCmd(LPC_CAN_TypeDef* CANx, CAN_INT_EN_Type arg, FunctionalState NewState);
00843 uint32_t CAN_IntGetStatus(LPC_CAN_TypeDef* CANx);
00844
00845 /* CAN get status functions ----------------*/
00846 IntStatus CAN_FullCANIntGetStatus (LPC_CANAF_TypeDef* CANAFx);
00847 uint32_t CAN_FullCANPendGetStatus (LPC_CANAF_TypeDef* CANAFx, FullCAN_IC_Type type);
00848 uint32_t CAN_GetCTRLStatus(LPC_CAN_TypeDef* CANx, CAN_CTRL_STS_Type arg);
00849 uint32_t CAN_GetCRStatus(LPC_CANCR_TypeDef* CANCRx, CAN_CR_STS_Type arg);
00850
00856 #ifdef __cplusplus
00857 }
00858 #endif
00859
00860 #endif /* LPC17XX_CAN_H_ */
00861
00866 /* --------------------------------- End Of File ------------------------------ */
Generated on Tue Jun 7 14:58:55 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Drivers/source/lpc17xx_clkpwr.c Source File

C:/nxpdrv/LPC1700CMSIS/Drivers/source/lpc17xx_clkpwr.c

Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          lpc17xx_clkpwr.c                                2010-06-18
00003 */
00027 /* Peripheral group ----------------------------------------------------------- */
00032 /* Includes ------------------------------------------------------------------- */
00033 #include "lpc17xx_clkpwr.h"
00034
00035
00036 /* Public Functions ----------------------------------------------------------- */
00041 /*********************************************************************/
00080 void CLKPWR_SetPCLKDiv (uint32_t ClkType, uint32_t DivVal)
00081 {
00082         uint32_t bitpos;
00083
00084         bitpos = (ClkType < 32) ? (ClkType) : (ClkType - 32);
00085
00086         /* PCLKSEL0 selected */
00087         if (ClkType < 32)
00088         {
00089                 /* Clear two bit at bit position */
00090                 LPC_SC->PCLKSEL0 &= (~(CLKPWR_PCLKSEL_BITMASK(bitpos)));
00091
00092                 /* Set two selected bit */
00093                 LPC_SC->PCLKSEL0 |= (CLKPWR_PCLKSEL_SET(bitpos, DivVal));
00094         }
00095         /* PCLKSEL1 selected */
00096         else
00097         {
00098                 /* Clear two bit at bit position */
00099                 LPC_SC->PCLKSEL1 &= ~(CLKPWR_PCLKSEL_BITMASK(bitpos));
00100
00101                 /* Set two selected bit */
00102                 LPC_SC->PCLKSEL1 |= (CLKPWR_PCLKSEL_SET(bitpos, DivVal));
00103         }
00104 }
00105
00106
00107 /*********************************************************************/
00141 uint32_t CLKPWR_GetPCLKSEL (uint32_t ClkType)
00142 {
00143         uint32_t bitpos, retval;
00144
00145         if (ClkType < 32)
00146         {
00147                 bitpos = ClkType;
00148                 retval = LPC_SC->PCLKSEL0;
00149         }
00150         else
00151         {
00152                 bitpos = ClkType - 32;
00153                 retval = LPC_SC->PCLKSEL1;
00154         }
00155
00156         retval = CLKPWR_PCLKSEL_GET(bitpos, retval);
00157         return retval;
00158 }
00159
00160
00161
00162 /*********************************************************************/
00196 uint32_t CLKPWR_GetPCLK (uint32_t ClkType)
00197 {
00198         uint32_t retval, div;
00199
00200         retval = SystemCoreClock;
00201         div = CLKPWR_GetPCLKSEL(ClkType);
00202
00203         switch (div)
00204         {
00205         case 0:
00206                 div = 4;
00207                 break;
00208
00209         case 1:
00210                 div = 1;
00211                 break;
00212
00213         case 2:
00214                 div = 2;
00215                 break;
00216
00217         case 3:
00218                 div = 8;
00219                 break;
00220         }
00221         retval /= div;
00222
00223         return retval;
00224 }
00225
00226
00227
00228 /*********************************************************************/
00266 void CLKPWR_ConfigPPWR (uint32_t PPType, FunctionalState NewState)
00267 {
00268         if (NewState == ENABLE)
00269         {
00270                 LPC_SC->PCONP |= PPType & CLKPWR_PCONP_BITMASK;
00271         }
00272         else if (NewState == DISABLE)
00273         {
00274                 LPC_SC->PCONP &= (~PPType) & CLKPWR_PCONP_BITMASK;
00275         }
00276 }
00277
00278
00279 /*********************************************************************/
00284 void CLKPWR_Sleep(void)
00285 {
00286         LPC_SC->PCON = 0x00;
00287         /* Sleep Mode*/
00288         __WFI();
00289 }
00290
00291
00292 /*********************************************************************/
00297 void CLKPWR_DeepSleep(void)
00298 {
00299     /* Deep-Sleep Mode, set SLEEPDEEP bit */
00300         SCB->SCR = 0x4;
00301         LPC_SC->PCON = 0x8;
00302         /* Deep Sleep Mode*/
00303         __WFI();
00304 }
00305
00306
00307 /*********************************************************************/
00312 void CLKPWR_PowerDown(void)
00313 {
00314     /* Deep-Sleep Mode, set SLEEPDEEP bit */
00315         SCB->SCR = 0x4;
00316         LPC_SC->PCON = 0x09;
00317         /* Power Down Mode*/
00318         __WFI();
00319 }
00320
00321
00322 /*********************************************************************/
00327 void CLKPWR_DeepPowerDown(void)
00328 {
00329     /* Deep-Sleep Mode, set SLEEPDEEP bit */
00330         SCB->SCR = 0x4;
00331         LPC_SC->PCON = 0x03;
00332         /* Deep Power Down Mode*/
00333         __WFI();
00334 }
00335
00344 /* --------------------------------- End Of File ------------------------------ */
Generated on Tue Jun 7 14:58:56 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_clkpwr.h Source File

C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_clkpwr.h

Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          lpc17xx_clkpwr.h                        2010-05-21
00003 */
00027 /* Peripheral group ----------------------------------------------------------- */
00033 #ifndef LPC17XX_CLKPWR_H_
00034 #define LPC17XX_CLKPWR_H_
00035
00036 /* Includes ------------------------------------------------------------------- */
00037 #include "lpc17xx.h"
00038 #include "lpc_types.h"
00039
00040 #ifdef __cplusplus
00041 extern "C"
00042 {
00043 #endif
00044
00045 /* Public Macros -------------------------------------------------------------- */
00050 /**********************************************************************
00051  * Peripheral Clock Selection Definitions
00052  **********************************************************************/
00054 #define CLKPWR_PCLKSEL_WDT              ((uint32_t)(0))
00055
00056 #define CLKPWR_PCLKSEL_TIMER0           ((uint32_t)(2))
00057
00058 #define CLKPWR_PCLKSEL_TIMER1           ((uint32_t)(4))
00059
00060 #define CLKPWR_PCLKSEL_UART0            ((uint32_t)(6))
00061
00062 #define CLKPWR_PCLKSEL_UART1            ((uint32_t)(8))
00063
00064 #define CLKPWR_PCLKSEL_PWM1             ((uint32_t)(12))
00065
00066 #define CLKPWR_PCLKSEL_I2C0             ((uint32_t)(14))
00067
00068 #define CLKPWR_PCLKSEL_SPI              ((uint32_t)(16))
00069
00070 #define CLKPWR_PCLKSEL_SSP1             ((uint32_t)(20))
00071
00072 #define CLKPWR_PCLKSEL_DAC              ((uint32_t)(22))
00073
00074 #define CLKPWR_PCLKSEL_ADC              ((uint32_t)(24))
00075
00076 #define CLKPWR_PCLKSEL_CAN1             ((uint32_t)(26))
00077
00078 #define CLKPWR_PCLKSEL_CAN2             ((uint32_t)(28))
00079
00080 #define CLKPWR_PCLKSEL_ACF              ((uint32_t)(30))
00081
00082 #define CLKPWR_PCLKSEL_QEI              ((uint32_t)(32))
00083
00084 #define CLKPWR_PCLKSEL_PCB              ((uint32_t)(36))
00085
00086 #define CLKPWR_PCLKSEL_I2C1             ((uint32_t)(38))
00087
00088 #define CLKPWR_PCLKSEL_SSP0             ((uint32_t)(42))
00089
00090 #define CLKPWR_PCLKSEL_TIMER2           ((uint32_t)(44))
00091
00092 #define CLKPWR_PCLKSEL_TIMER3           ((uint32_t)(46))
00093
00094 #define CLKPWR_PCLKSEL_UART2            ((uint32_t)(48))
00095
00096 #define CLKPWR_PCLKSEL_UART3            ((uint32_t)(50))
00097
00098 #define CLKPWR_PCLKSEL_I2C2             ((uint32_t)(52))
00099
00100 #define CLKPWR_PCLKSEL_I2S              ((uint32_t)(54))
00101
00102 #define CLKPWR_PCLKSEL_RIT              ((uint32_t)(58))
00103
00104 #define CLKPWR_PCLKSEL_SYSCON           ((uint32_t)(60))
00105
00106 #define CLKPWR_PCLKSEL_MC                       ((uint32_t)(62))
00107
00112 /* Peripheral clock divider is set to 4 from CCLK */
00113 #define CLKPWR_PCLKSEL_CCLK_DIV_4  ((uint32_t)(0))
00114
00115 #define CLKPWR_PCLKSEL_CCLK_DIV_1  ((uint32_t)(1))
00116
00117 #define CLKPWR_PCLKSEL_CCLK_DIV_2  ((uint32_t)(2))
00118
00119
00120 /********************************************************************
00121 * Power Control for Peripherals Definitions
00122 **********************************************************************/
00124 #define  CLKPWR_PCONP_PCTIM0    ((uint32_t)(1<<1))
00125 /* Timer/Counter 1 power/clock control bit */
00126 #define  CLKPWR_PCONP_PCTIM1    ((uint32_t)(1<<2))
00127
00128 #define  CLKPWR_PCONP_PCUART0   ((uint32_t)(1<<3))
00129
00130 #define  CLKPWR_PCONP_PCUART1   ((uint32_t)(1<<4))
00131
00132 #define  CLKPWR_PCONP_PCPWM1    ((uint32_t)(1<<6))
00133
00134 #define  CLKPWR_PCONP_PCI2C0    ((uint32_t)(1<<7))
00135
00136 #define  CLKPWR_PCONP_PCSPI     ((uint32_t)(1<<8))
00137
00138 #define  CLKPWR_PCONP_PCRTC     ((uint32_t)(1<<9))
00139
00140 #define  CLKPWR_PCONP_PCSSP1    ((uint32_t)(1<<10))
00141
00142 #define  CLKPWR_PCONP_PCAD      ((uint32_t)(1<<12))
00143
00144 #define  CLKPWR_PCONP_PCAN1     ((uint32_t)(1<<13))
00145
00146 #define  CLKPWR_PCONP_PCAN2     ((uint32_t)(1<<14))
00147
00148 #define CLKPWR_PCONP_PCGPIO     ((uint32_t)(1<<15))
00149
00150 #define CLKPWR_PCONP_PCRIT              ((uint32_t)(1<<16))
00151
00152 #define CLKPWR_PCONP_PCMC               ((uint32_t)(1<<17))
00153
00154 #define CLKPWR_PCONP_PCQEI              ((uint32_t)(1<<18))
00155
00156 #define  CLKPWR_PCONP_PCI2C1    ((uint32_t)(1<<19))
00157
00158 #define  CLKPWR_PCONP_PCSSP0    ((uint32_t)(1<<21))
00159
00160 #define  CLKPWR_PCONP_PCTIM2    ((uint32_t)(1<<22))
00161
00162 #define  CLKPWR_PCONP_PCTIM3    ((uint32_t)(1<<23))
00163
00164 #define  CLKPWR_PCONP_PCUART2   ((uint32_t)(1<<24))
00165
00166 #define  CLKPWR_PCONP_PCUART3   ((uint32_t)(1<<25))
00167
00168 #define  CLKPWR_PCONP_PCI2C2    ((uint32_t)(1<<26))
00169
00170 #define  CLKPWR_PCONP_PCI2S     ((uint32_t)(1<<27))
00171
00172 #define  CLKPWR_PCONP_PCGPDMA   ((uint32_t)(1<<29))
00173
00174 #define  CLKPWR_PCONP_PCENET    ((uint32_t)(1<<30))
00175
00176 #define  CLKPWR_PCONP_PCUSB     ((uint32_t)(1<<31))
00177
00178
00182 /* Private Macros ------------------------------------------------------------- */
00187 /* --------------------- BIT DEFINITIONS -------------------------------------- */
00188 /*********************************************************************/
00192 #define CLKPWR_CLKSRCSEL_CLKSRC_IRC                     ((uint32_t)(0x00))
00193
00194 #define CLKPWR_CLKSRCSEL_CLKSRC_MAINOSC         ((uint32_t)(0x01))
00195
00196 #define CLKPWR_CLKSRCSEL_CLKSRC_RTC                     ((uint32_t)(0x02))
00197
00198 #define CLKPWR_CLKSRCSEL_BITMASK                        ((uint32_t)(0x03))
00199
00200 /*********************************************************************/
00203 /* Clock Output Configuration register definition */
00205 #define CLKPWR_CLKOUTCFG_CLKOUTSEL_CPU          ((uint32_t)(0x00))
00206
00207 #define CLKPWR_CLKOUTCFG_CLKOUTSEL_MAINOSC      ((uint32_t)(0x01))
00208
00209 #define CLKPWR_CLKOUTCFG_CLKOUTSEL_RC           ((uint32_t)(0x02))
00210
00211 #define CLKPWR_CLKOUTCFG_CLKOUTSEL_USB          ((uint32_t)(0x03))
00212
00213 #define CLKPWR_CLKOUTCFG_CLKOUTSEL_RTC          ((uint32_t)(0x04))
00214
00215 #define CLKPWR_CLKOUTCFG_CLKOUTDIV(n)           ((uint32_t)((n&0x0F)<<4))
00216
00217 #define CLKPWR_CLKOUTCFG_CLKOUT_EN                      ((uint32_t)(1<<8))
00218
00219 #define CLKPWR_CLKOUTCFG_CLKOUT_ACT                     ((uint32_t)(1<<9))
00220
00221 #define CLKPWR_CLKOUTCFG_BITMASK                        ((uint32_t)(0x3FF))
00222
00223 /*********************************************************************/
00227 #define CLKPWR_PLL0CON_ENABLE           ((uint32_t)(0x01))
00228
00229 #define CLKPWR_PLL0CON_CONNECT          ((uint32_t)(0x02))
00230
00231 #define CLKPWR_PLL0CON_BITMASK          ((uint32_t)(0x03))
00232
00233 /*********************************************************************/
00237 #define CLKPWR_PLL0CFG_MSEL(n)          ((uint32_t)(n&0x7FFF))
00238
00239 #define CLKPWR_PLL0CFG_NSEL(n)          ((uint32_t)((n<<16)&0xFF0000))
00240
00241 #define CLKPWR_PLL0CFG_BITMASK          ((uint32_t)(0xFF7FFF))
00242
00243
00244 /*********************************************************************/
00248 #define CLKPWR_PLL0STAT_MSEL(n)         ((uint32_t)(n&0x7FFF))
00249
00250 #define CLKPWR_PLL0STAT_NSEL(n)         ((uint32_t)((n>>16)&0xFF))
00251
00252 #define CLKPWR_PLL0STAT_PLLE            ((uint32_t)(1<<24))
00253
00254 #define CLKPWR_PLL0STAT_PLLC            ((uint32_t)(1<<25))
00255
00256 #define CLKPWR_PLL0STAT_PLOCK           ((uint32_t)(1<<26))
00257
00258 /*********************************************************************/
00262 #define CLKPWR_PLL0FEED_BITMASK                 ((uint32_t)0xFF)
00263
00264 /*********************************************************************/
00268 #define CLKPWR_PLL1CON_ENABLE           ((uint32_t)(0x01))
00269
00270 #define CLKPWR_PLL1CON_CONNECT          ((uint32_t)(0x02))
00271
00272 #define CLKPWR_PLL1CON_BITMASK          ((uint32_t)(0x03))
00273
00274 /*********************************************************************/
00278 #define CLKPWR_PLL1CFG_MSEL(n)          ((uint32_t)(n&0x1F))
00279
00280 #define CLKPWR_PLL1CFG_PSEL(n)          ((uint32_t)((n&0x03)<<5))
00281
00282 #define CLKPWR_PLL1CFG_BITMASK          ((uint32_t)(0x7F))
00283
00284 /*********************************************************************/
00288 #define CLKPWR_PLL1STAT_MSEL(n)         ((uint32_t)(n&0x1F))
00289
00290 #define CLKPWR_PLL1STAT_PSEL(n)         ((uint32_t)((n>>5)&0x03))
00291
00292 #define CLKPWR_PLL1STAT_PLLE            ((uint32_t)(1<<8))
00293
00294 #define CLKPWR_PLL1STAT_PLLC            ((uint32_t)(1<<9))
00295
00296 #define CLKPWR_PLL1STAT_PLOCK           ((uint32_t)(1<<10))
00297
00298 /*********************************************************************/
00302 #define CLKPWR_PLL1FEED_BITMASK         ((uint32_t)0xFF)
00303
00304 /*********************************************************************/
00308 #define CLKPWR_CCLKCFG_BITMASK          ((uint32_t)(0xFF))
00309
00310 /*********************************************************************/
00314 #define CLKPWR_USBCLKCFG_BITMASK        ((uint32_t)(0x0F))
00315
00316 /*********************************************************************/
00320 #define CLKPWR_IRCTRIM_BITMASK          ((uint32_t)(0x0F))
00321
00322 /*********************************************************************/
00326 #define CLKPWR_PCLKSEL0_BITMASK         ((uint32_t)(0xFFF3F3FF))
00327
00328 #define CLKPWR_PCLKSEL1_BITMASK         ((uint32_t)(0xFCF3F0F3))
00329
00332 #define CLKPWR_PCLKSEL_SET(p,n)         _SBF(p,n)
00333
00334 #define CLKPWR_PCLKSEL_BITMASK(p)       _SBF(p,0x03)
00335
00336 #define CLKPWR_PCLKSEL_GET(p, n)        ((uint32_t)((n>>p)&0x03))
00337
00338 /*********************************************************************/
00342 #define CLKPWR_PCON_PM0                 ((uint32_t)(1<<0))
00343
00344 #define CLKPWR_PCON_PM1                 ((uint32_t)(1<<1))
00345
00346 #define CLKPWR_PCON_BODPDM              ((uint32_t)(1<<2))
00347
00348 #define CLKPWR_PCON_BOGD                ((uint32_t)(1<<3))
00349
00350 #define CLKPWR_PCON_BORD                ((uint32_t)(1<<4))
00351
00352 #define CLKPWR_PCON_SMFLAG              ((uint32_t)(1<<8))
00353
00354 #define CLKPWR_PCON_DSFLAG              ((uint32_t)(1<<9))
00355
00356 #define CLKPWR_PCON_PDFLAG              ((uint32_t)(1<<10))
00357
00358 #define CLKPWR_PCON_DPDFLAG             ((uint32_t)(1<<11))
00359
00360 /*********************************************************************/
00364 #define CLKPWR_PCONP_BITMASK    0xEFEFF7DE
00365
00371 /* Public Functions ----------------------------------------------------------- */
00376 void CLKPWR_SetPCLKDiv (uint32_t ClkType, uint32_t DivVal);
00377 uint32_t CLKPWR_GetPCLKSEL (uint32_t ClkType);
00378 uint32_t CLKPWR_GetPCLK (uint32_t ClkType);
00379 void CLKPWR_ConfigPPWR (uint32_t PPType, FunctionalState NewState);
00380 void CLKPWR_Sleep(void);
00381 void CLKPWR_DeepSleep(void);
00382 void CLKPWR_PowerDown(void);
00383 void CLKPWR_DeepPowerDown(void);
00384
00390 #ifdef __cplusplus
00391 }
00392 #endif
00393
00394 #endif /* LPC17XX_CLKPWR_H_ */
00395
00400 /* --------------------------------- End Of File ------------------------------ */
Generated on Tue Jun 7 14:58:55 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Drivers/source/lpc17xx_dac.c Source File

C:/nxpdrv/LPC1700CMSIS/Drivers/source/lpc17xx_dac.c

Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          lpc17xx_dac.c                           2010-05-21
00003 */
00026 /* Peripheral group ----------------------------------------------------------- */
00031 /* Includes ------------------------------------------------------------------- */
00032 #include "lpc17xx_dac.h"
00033 #include "lpc17xx_clkpwr.h"
00034
00035 /* If this source file built with example, the LPC17xx FW library configuration
00036  * file in each example directory ("lpc17xx_libcfg.h") must be included,
00037  * otherwise the default FW library configuration file must be included instead
00038  */
00039 #ifdef __BUILD_WITH_EXAMPLE__
00040 #include "lpc17xx_libcfg.h"
00041 #else
00042 #include "lpc17xx_libcfg_default.h"
00043 #endif /* __BUILD_WITH_EXAMPLE__ */
00044
00045
00046 #ifdef _DAC
00047
00048 /* Public Functions ----------------------------------------------------------- */
00053 /*********************************************************************/
00060 void DAC_Init(LPC_DAC_TypeDef *DACx)
00061 {
00062         CHECK_PARAM(PARAM_DACx(DACx));
00063         /* Set default clock divider for DAC */
00064         // CLKPWR_SetPCLKDiv (CLKPWR_PCLKSEL_DAC, CLKPWR_PCLKSEL_CCLK_DIV_4);
00065         //Set maximum current output
00066         DAC_SetBias(LPC_DAC,DAC_MAX_CURRENT_700uA);
00067 }
00068
00069 /*********************************************************************/
00075 void DAC_UpdateValue (LPC_DAC_TypeDef *DACx,uint32_t dac_value)
00076 {
00077         uint32_t tmp;
00078         CHECK_PARAM(PARAM_DACx(DACx));
00079         tmp = DACx->DACR & DAC_BIAS_EN;
00080         tmp |= DAC_VALUE(dac_value);
00081         // Update value
00082         DACx->DACR = tmp;
00083 }
00084
00085 /*********************************************************************/
00092 void DAC_SetBias (LPC_DAC_TypeDef *DACx,uint32_t bias)
00093 {
00094         CHECK_PARAM(PARAM_DAC_CURRENT_OPT(bias));
00095         DACx->DACR &=~DAC_BIAS_EN;
00096         if (bias  == DAC_MAX_CURRENT_350uA)
00097         {
00098                 DACx->DACR |= DAC_BIAS_EN;
00099         }
00100 }
00101
00102 /*********************************************************************/
00111 void DAC_ConfigDAConverterControl (LPC_DAC_TypeDef *DACx,DAC_CONVERTER_CFG_Type *DAC_ConverterConfigStruct)
00112 {
00113         CHECK_PARAM(PARAM_DACx(DACx));
00114         DACx->DACCTRL &= ~DAC_DACCTRL_MASK;
00115         if (DAC_ConverterConfigStruct->DBLBUF_ENA)
00116                 DACx->DACCTRL   |= DAC_DBLBUF_ENA;
00117         if (DAC_ConverterConfigStruct->CNT_ENA)
00118                 DACx->DACCTRL   |= DAC_CNT_ENA;
00119         if (DAC_ConverterConfigStruct->DMA_ENA)
00120                 DACx->DACCTRL   |= DAC_DMA_ENA;
00121 }
00122
00123 /*********************************************************************/
00129 void DAC_SetDMATimeOut(LPC_DAC_TypeDef *DACx, uint32_t time_out)
00130 {
00131         CHECK_PARAM(PARAM_DACx(DACx));
00132         DACx->DACCNTVAL = DAC_CCNT_VALUE(time_out);
00133 }
00134
00139 #endif /* _DAC */
00140
00145 /* --------------------------------- End Of File ------------------------------ */
Generated on Tue Jun 7 14:58:56 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_dac.h Source File

C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_dac.h

Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          lpc17xx_dac.h                           2010-05-21
00003 */
00027 /* Peripheral group ----------------------------------------------------------- */
00033 #ifndef LPC17XX_DAC_H_
00034 #define LPC17XX_DAC_H_
00035
00036 /* Includes ------------------------------------------------------------------- */
00037 #include "LPC17xx.h"
00038 #include "lpc_types.h"
00039
00040
00041 #ifdef __cplusplus
00042 extern "C"
00043 {
00044 #endif
00045
00046 /* Public Macros -------------------------------------------------------------- */
00054 #define DAC_VALUE(n)            ((uint32_t)((n&0x3FF)<<6))
00055
00059 #define DAC_BIAS_EN                     ((uint32_t)(1<<16))
00060
00061 #define DAC_CCNT_VALUE(n)  ((uint32_t)(n&0xffff))
00062
00064 #define DAC_DBLBUF_ENA          ((uint32_t)(1<<1))
00065
00066 #define DAC_CNT_ENA                     ((uint32_t)(1<<2))
00067
00068 #define DAC_DMA_ENA                     ((uint32_t)(1<<3))
00069
00070 #define DAC_DACCTRL_MASK        ((uint32_t)(0x0F))
00071
00073 #define PARAM_DACx(n)   (((uint32_t *)n)==((uint32_t *)LPC_DAC))
00074
00076 #define PARAM_DAC_CURRENT_OPT(OPTION) ((OPTION == DAC_MAX_CURRENT_700uA)\
00077 ||(OPTION == DAC_MAX_CURRENT_350uA))
00078
00081 /* Public Types --------------------------------------------------------------- */
00088 typedef enum
00089 {
00090         DAC_MAX_CURRENT_700uA = 0,
00092         DAC_MAX_CURRENT_350uA
00094 } DAC_CURRENT_OPT;
00095
00098 typedef struct
00099 {
00100
00101         uint8_t  DBLBUF_ENA;
00105         uint8_t  CNT_ENA;
00109         uint8_t  DMA_ENA;
00113         uint8_t RESERVED;
00114
00115 } DAC_CONVERTER_CFG_Type;
00116
00121 /* Public Functions ----------------------------------------------------------- */
00126 void    DAC_Init(LPC_DAC_TypeDef *DACx);
00127 void    DAC_UpdateValue (LPC_DAC_TypeDef *DACx, uint32_t dac_value);
00128 void    DAC_SetBias (LPC_DAC_TypeDef *DACx,uint32_t bias);
00129 void    DAC_ConfigDAConverterControl (LPC_DAC_TypeDef *DACx,DAC_CONVERTER_CFG_Type *DAC_ConverterConfigStruct);
00130 void    DAC_SetDMATimeOut(LPC_DAC_TypeDef *DACx,uint32_t time_out);
00131
00136 #ifdef __cplusplus
00137 }
00138 #endif
00139
00140
00141 #endif /* LPC17XX_DAC_H_ */
00142
00147 /* --------------------------------- End Of File ------------------------------ */
00148
Generated on Tue Jun 7 14:58:55 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Drivers/source/lpc17xx_emac.c Source File

C:/nxpdrv/LPC1700CMSIS/Drivers/source/lpc17xx_emac.c

Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          lpc17xx_dac.c                           2010-05-21
00003 */
00027 /* Peripheral group ----------------------------------------------------------- */
00032 /* Includes ------------------------------------------------------------------- */
00033 #include "lpc17xx_emac.h"
00034 #include "lpc17xx_clkpwr.h"
00035
00036 /* If this source file built with example, the LPC17xx FW library configuration
00037  * file in each example directory ("lpc17xx_libcfg.h") must be included,
00038  * otherwise the default FW library configuration file must be included instead
00039  */
00040 #ifdef __BUILD_WITH_EXAMPLE__
00041 #include "lpc17xx_libcfg.h"
00042 #else
00043 #include "lpc17xx_libcfg_default.h"
00044 #endif /* __BUILD_WITH_EXAMPLE__ */
00045
00046
00047 #ifdef _EMAC
00048
00049 /* Private Variables ---------------------------------------------------------- */
00054 /* MII Mgmt Configuration register - Clock divider setting */
00055 const uint8_t EMAC_clkdiv[] = { 4, 6, 8, 10, 14, 20, 28 };
00056
00057 /* EMAC local DMA Descriptors */
00058
00060 static RX_Desc Rx_Desc[EMAC_NUM_RX_FRAG];
00061
00063 #if defined ( __CC_ARM   )
00064 static __align(8) RX_Stat Rx_Stat[EMAC_NUM_RX_FRAG];
00065 #elif defined ( __ICCARM__ )
00066 #pragma data_alignment=8
00067 static RX_Stat Rx_Stat[EMAC_NUM_RX_FRAG];
00068 #elif defined   (  __GNUC__  )
00069 static __attribute__ ((aligned (8))) RX_Stat Rx_Stat[EMAC_NUM_RX_FRAG];
00070 #endif
00071
00073 static TX_Desc Tx_Desc[EMAC_NUM_TX_FRAG];
00075 static TX_Stat Tx_Stat[EMAC_NUM_TX_FRAG];
00076
00077 /* EMAC local DMA buffers */
00079 static uint32_t rx_buf[EMAC_NUM_RX_FRAG][EMAC_ETH_MAX_FLEN>>2];
00081 static uint32_t tx_buf[EMAC_NUM_TX_FRAG][EMAC_ETH_MAX_FLEN>>2];
00082
00087 /* Private Functions ---------------------------------------------------------- */
00088 static void rx_descr_init (void);
00089 static void tx_descr_init (void);
00090 static int32_t write_PHY (uint32_t PhyReg, uint16_t Value);
00091 static int32_t  read_PHY (uint32_t PhyReg);
00092
00093 static void setEmacAddr(uint8_t abStationAddr[]);
00094 static int32_t emac_CRCCalc(uint8_t frame_no_fcs[], int32_t frame_len);
00095
00096
00097 /*--------------------------- rx_descr_init ---------------------------------*/
00098 /*********************************************************************/
00103 static void rx_descr_init (void)
00104 {
00105         /* Initialize Receive Descriptor and Status array. */
00106         uint32_t i;
00107
00108         for (i = 0; i < EMAC_NUM_RX_FRAG; i++) {
00109                 Rx_Desc[i].Packet  = (uint32_t)&rx_buf[i];
00110                 Rx_Desc[i].Ctrl    = EMAC_RCTRL_INT | (EMAC_ETH_MAX_FLEN - 1);
00111                 Rx_Stat[i].Info    = 0;
00112                 Rx_Stat[i].HashCRC = 0;
00113         }
00114
00115         /* Set EMAC Receive Descriptor Registers. */
00116         LPC_EMAC->RxDescriptor       = (uint32_t)&Rx_Desc[0];
00117         LPC_EMAC->RxStatus           = (uint32_t)&Rx_Stat[0];
00118         LPC_EMAC->RxDescriptorNumber = EMAC_NUM_RX_FRAG - 1;
00119
00120         /* Rx Descriptors Point to 0 */
00121         LPC_EMAC->RxConsumeIndex  = 0;
00122 }
00123
00124
00125 /*--------------------------- tx_descr_init ---- ----------------------------*/
00126 /*********************************************************************/
00131 static void tx_descr_init (void) {
00132         /* Initialize Transmit Descriptor and Status array. */
00133         uint32_t i;
00134
00135         for (i = 0; i < EMAC_NUM_TX_FRAG; i++) {
00136                 Tx_Desc[i].Packet = (uint32_t)&tx_buf[i];
00137                 Tx_Desc[i].Ctrl   = 0;
00138                 Tx_Stat[i].Info   = 0;
00139         }
00140
00141         /* Set EMAC Transmit Descriptor Registers. */
00142         LPC_EMAC->TxDescriptor       = (uint32_t)&Tx_Desc[0];
00143         LPC_EMAC->TxStatus           = (uint32_t)&Tx_Stat[0];
00144         LPC_EMAC->TxDescriptorNumber = EMAC_NUM_TX_FRAG - 1;
00145
00146         /* Tx Descriptors Point to 0 */
00147         LPC_EMAC->TxProduceIndex  = 0;
00148 }
00149
00150
00151 /*--------------------------- write_PHY -------------------------------------*/
00152 /*********************************************************************/
00159 static int32_t write_PHY (uint32_t PhyReg, uint16_t Value)
00160 {
00161         /* Write a data 'Value' to PHY register 'PhyReg'. */
00162         uint32_t tout;
00163
00164         LPC_EMAC->MADR = EMAC_DEF_ADR | PhyReg;
00165         LPC_EMAC->MWTD = Value;
00166
00167         /* Wait until operation completed */
00168         tout = 0;
00169         for (tout = 0; tout < EMAC_MII_WR_TOUT; tout++) {
00170                 if ((LPC_EMAC->MIND & EMAC_MIND_BUSY) == 0) {
00171                         return (0);
00172                 }
00173         }
00174         // Time out!
00175         return (-1);
00176 }
00177
00178
00179 /*--------------------------- read_PHY --------------------------------------*/
00180 /*********************************************************************/
00186 static int32_t read_PHY (uint32_t PhyReg)
00187 {
00188         /* Read a PHY register 'PhyReg'. */
00189         uint32_t tout;
00190
00191         LPC_EMAC->MADR = EMAC_DEF_ADR | PhyReg;
00192         LPC_EMAC->MCMD = EMAC_MCMD_READ;
00193
00194         /* Wait until operation completed */
00195         tout = 0;
00196         for (tout = 0; tout < EMAC_MII_RD_TOUT; tout++) {
00197                 if ((LPC_EMAC->MIND & EMAC_MIND_BUSY) == 0) {
00198                         LPC_EMAC->MCMD = 0;
00199                         return (LPC_EMAC->MRDD);
00200                 }
00201         }
00202         // Time out!
00203         return (-1);
00204 }
00205
00206 /*********************************************************************/
00212 static void setEmacAddr(uint8_t abStationAddr[])
00213 {
00214         /* Set the Ethernet MAC Address registers */
00215         LPC_EMAC->SA0 = ((uint32_t)abStationAddr[5] << 8) | (uint32_t)abStationAddr[4];
00216         LPC_EMAC->SA1 = ((uint32_t)abStationAddr[3] << 8) | (uint32_t)abStationAddr[2];
00217         LPC_EMAC->SA2 = ((uint32_t)abStationAddr[1] << 8) | (uint32_t)abStationAddr[0];
00218 }
00219
00220
00221 /*********************************************************************/
00227 static int32_t emac_CRCCalc(uint8_t frame_no_fcs[], int32_t frame_len)
00228 {
00229         int i;          // iterator
00230         int j;          // another iterator
00231         char byte;      // current byte
00232         int crc;        // CRC result
00233         int q0, q1, q2, q3; // temporary variables
00234         crc = 0xFFFFFFFF;
00235         for (i = 0; i < frame_len; i++) {
00236                 byte = *frame_no_fcs++;
00237                 for (j = 0; j < 2; j++) {
00238                         if (((crc >> 28) ^ (byte >> 3)) & 0x00000001) {
00239                                 q3 = 0x04C11DB7;
00240                         } else {
00241                                 q3 = 0x00000000;
00242                         }
00243                         if (((crc >> 29) ^ (byte >> 2)) & 0x00000001) {
00244                                 q2 = 0x09823B6E;
00245                         } else {
00246                                 q2 = 0x00000000;
00247                         }
00248                         if (((crc >> 30) ^ (byte >> 1)) & 0x00000001) {
00249                                 q1 = 0x130476DC;
00250                         } else {
00251                                 q1 = 0x00000000;
00252                         }
00253                         if (((crc >> 31) ^ (byte >> 0)) & 0x00000001) {
00254                                 q0 = 0x2608EDB8;
00255                         } else {
00256                                 q0 = 0x00000000;
00257                         }
00258                         crc = (crc << 4) ^ q3 ^ q2 ^ q1 ^ q0;
00259                         byte >>= 4;
00260                 }
00261         }
00262         return crc;
00263 }
00264 /* End of Private Functions --------------------------------------------------- */
00265
00266
00267 /* Public Functions ----------------------------------------------------------- */
00273 /*********************************************************************/
00292 Status EMAC_Init(EMAC_CFG_Type *EMAC_ConfigStruct)
00293 {
00294         /* Initialize the EMAC Ethernet controller. */
00295         int32_t regv,tout, tmp;
00296
00297         /* Set up clock and power for Ethernet module */
00298         CLKPWR_ConfigPPWR (CLKPWR_PCONP_PCENET, ENABLE);
00299
00300         /* Reset all EMAC internal modules */
00301         LPC_EMAC->MAC1    = EMAC_MAC1_RES_TX | EMAC_MAC1_RES_MCS_TX | EMAC_MAC1_RES_RX |
00302                                         EMAC_MAC1_RES_MCS_RX | EMAC_MAC1_SIM_RES | EMAC_MAC1_SOFT_RES;
00303
00304         LPC_EMAC->Command = EMAC_CR_REG_RES | EMAC_CR_TX_RES | EMAC_CR_RX_RES | EMAC_CR_PASS_RUNT_FRM;
00305
00306         /* A short delay after reset. */
00307         for (tout = 100; tout; tout--);
00308
00309         /* Initialize MAC control registers. */
00310         LPC_EMAC->MAC1 = EMAC_MAC1_PASS_ALL;
00311         LPC_EMAC->MAC2 = EMAC_MAC2_CRC_EN | EMAC_MAC2_PAD_EN;
00312         LPC_EMAC->MAXF = EMAC_ETH_MAX_FLEN;
00313         /*
00314          * Find the clock that close to desired target clock
00315          */
00316         tmp = SystemCoreClock / EMAC_MCFG_MII_MAXCLK;
00317         for (tout = 0; tout < sizeof (EMAC_clkdiv); tout++){
00318                 if (EMAC_clkdiv[tout] >= tmp) break;
00319         }
00320         tout++;
00321         // Write to MAC configuration register and reset
00322         LPC_EMAC->MCFG = EMAC_MCFG_CLK_SEL(tout) | EMAC_MCFG_RES_MII;
00323         // release reset
00324         LPC_EMAC->MCFG &= ~(EMAC_MCFG_RES_MII);
00325         LPC_EMAC->CLRT = EMAC_CLRT_DEF;
00326         LPC_EMAC->IPGR = EMAC_IPGR_P2_DEF;
00327
00328         /* Enable Reduced MII interface. */
00329         LPC_EMAC->Command = EMAC_CR_RMII | EMAC_CR_PASS_RUNT_FRM;
00330
00331         /* Reset Reduced MII Logic. */
00332         LPC_EMAC->SUPP = EMAC_SUPP_RES_RMII;
00333
00334         for (tout = 100; tout; tout--);
00335         LPC_EMAC->SUPP = 0;
00336
00337         /* Put the DP83848C in reset mode */
00338         write_PHY (EMAC_PHY_REG_BMCR, EMAC_PHY_BMCR_RESET);
00339
00340         /* Wait for hardware reset to end. */
00341         for (tout = EMAC_PHY_RESP_TOUT; tout; tout--) {
00342                 regv = read_PHY (EMAC_PHY_REG_BMCR);
00343                 if (!(regv & (EMAC_PHY_BMCR_RESET | EMAC_PHY_BMCR_POWERDOWN))) {
00344                         /* Reset complete, device not Power Down. */
00345                         break;
00346                 }
00347                 if (tout == 0){
00348                         // Time out, return ERROR
00349                         return (ERROR);
00350                 }
00351         }
00352
00353         // Set PHY mode
00354         if (EMAC_SetPHYMode(EMAC_ConfigStruct->Mode) < 0){
00355                 return (ERROR);
00356         }
00357
00358         // Set EMAC address
00359         setEmacAddr(EMAC_ConfigStruct->pbEMAC_Addr);
00360
00361         /* Initialize Tx and Rx DMA Descriptors */
00362         rx_descr_init ();
00363         tx_descr_init ();
00364
00365         // Set Receive Filter register: enable broadcast and multicast
00366         LPC_EMAC->RxFilterCtrl = EMAC_RFC_MCAST_EN | EMAC_RFC_BCAST_EN | EMAC_RFC_PERFECT_EN;
00367
00368         /* Enable Rx Done and Tx Done interrupt for EMAC */
00369         LPC_EMAC->IntEnable = EMAC_INT_RX_DONE | EMAC_INT_TX_DONE;
00370
00371         /* Reset all interrupts */
00372         LPC_EMAC->IntClear  = 0xFFFF;
00373
00374         /* Enable receive and transmit mode of MAC Ethernet core */
00375         LPC_EMAC->Command  |= (EMAC_CR_RX_EN | EMAC_CR_TX_EN);
00376         LPC_EMAC->MAC1     |= EMAC_MAC1_REC_EN;
00377
00378         return SUCCESS;
00379 }
00380
00381
00382 /*********************************************************************/
00388 void EMAC_DeInit(void)
00389 {
00390         // Disable all interrupt
00391         LPC_EMAC->IntEnable = 0x00;
00392         // Clear all pending interrupt
00393         LPC_EMAC->IntClear = (0xFF) | (EMAC_INT_SOFT_INT | EMAC_INT_WAKEUP);
00394
00395         /* TurnOff clock and power for Ethernet module */
00396         CLKPWR_ConfigPPWR (CLKPWR_PCONP_PCENET, DISABLE);
00397 }
00398
00399
00400 /*********************************************************************/
00420 int32_t EMAC_CheckPHYStatus(uint32_t ulPHYState)
00421 {
00422         int32_t regv, tmp;
00423 #ifdef MCB_LPC_1768
00424         regv = read_PHY (EMAC_PHY_REG_STS);
00425         switch(ulPHYState){
00426         case EMAC_PHY_STAT_LINK:
00427                 tmp = (regv & EMAC_PHY_SR_LINK) ? 1 : 0;
00428                 break;
00429         case EMAC_PHY_STAT_SPEED:
00430                 tmp = (regv & EMAC_PHY_SR_SPEED) ? 0 : 1;
00431                 break;
00432         case EMAC_PHY_STAT_DUP:
00433                 tmp = (regv & EMAC_PHY_SR_FULL_DUP) ? 1 : 0;
00434                 break;
00435 #elif defined(IAR_LPC_1768)
00436         /* Use IAR_LPC_1768 board:
00437          * FSZ8721BL doesn't have Status Register
00438          * so we read Basic Mode Status Register (0x01h) instead
00439          */
00440         regv = read_PHY (EMAC_PHY_REG_BMSR);
00441         switch(ulPHYState){
00442         case EMAC_PHY_STAT_LINK:
00443                 tmp = (regv & EMAC_PHY_BMSR_LINK_STATUS) ? 1 : 0;
00444                 break;
00445         case EMAC_PHY_STAT_SPEED:
00446                 tmp = (regv & EMAC_PHY_SR_100_SPEED) ? 1 : 0;
00447                 break;
00448         case EMAC_PHY_STAT_DUP:
00449                 tmp = (regv & EMAC_PHY_SR_FULL_DUP) ? 1 : 0;
00450                 break;
00451 #endif
00452         default:
00453                 tmp = -1;
00454                 break;
00455         }
00456         return (tmp);
00457 }
00458
00459
00460 /*********************************************************************/
00470 int32_t EMAC_SetPHYMode(uint32_t ulPHYMode)
00471 {
00472         int32_t id1, id2, tout, regv;
00473
00474         /* Check if this is a DP83848C PHY. */
00475         id1 = read_PHY (EMAC_PHY_REG_IDR1);
00476         id2 = read_PHY (EMAC_PHY_REG_IDR2);
00477
00478 #ifdef MCB_LPC_1768
00479         if (((id1 << 16) | (id2 & 0xFFF0)) == EMAC_DP83848C_ID) {
00480                 switch(ulPHYMode){
00481                 case EMAC_MODE_AUTO:
00482                         write_PHY (EMAC_PHY_REG_BMCR, EMAC_PHY_AUTO_NEG);
00483 #elif defined(IAR_LPC_1768) /* Use IAR LPC1768 KickStart board */
00484         if (((id1 << 16) | id2) == EMAC_KSZ8721BL_ID) {
00485                 /* Configure the PHY device */
00486                 switch(ulPHYMode){
00487                 case EMAC_MODE_AUTO:
00488                         /* Use auto-negotiation about the link speed. */
00489                         write_PHY (EMAC_PHY_REG_BMCR, EMAC_PHY_AUTO_NEG);
00490 //                      write_PHY (EMAC_PHY_REG_BMCR, EMAC_PHY_BMCR_AN);
00491 #endif
00492                         /* Wait to complete Auto_Negotiation */
00493                         for (tout = EMAC_PHY_RESP_TOUT; tout; tout--) {
00494                                 regv = read_PHY (EMAC_PHY_REG_BMSR);
00495                                 if (regv & EMAC_PHY_BMSR_AUTO_DONE) {
00496                                         /* Auto-negotiation Complete. */
00497                                         break;
00498                                 }
00499                                 if (tout == 0){
00500                                         // Time out, return error
00501                                         return (-1);
00502                                 }
00503                         }
00504                         break;
00505                 case EMAC_MODE_10M_FULL:
00506                         /* Connect at 10MBit full-duplex */
00507                         write_PHY (EMAC_PHY_REG_BMCR, EMAC_PHY_FULLD_10M);
00508                         break;
00509                 case EMAC_MODE_10M_HALF:
00510                         /* Connect at 10MBit half-duplex */
00511                         write_PHY (EMAC_PHY_REG_BMCR, EMAC_PHY_HALFD_10M);
00512                         break;
00513                 case EMAC_MODE_100M_FULL:
00514                         /* Connect at 100MBit full-duplex */
00515                         write_PHY (EMAC_PHY_REG_BMCR, EMAC_PHY_FULLD_100M);
00516                         break;
00517                 case EMAC_MODE_100M_HALF:
00518                         /* Connect at 100MBit half-duplex */
00519                         write_PHY (EMAC_PHY_REG_BMCR, EMAC_PHY_HALFD_100M);
00520                         break;
00521                 default:
00522                         // un-supported
00523                         return (-1);
00524                 }
00525         }
00526         // It's not correct module ID
00527         else {
00528                 return (-1);
00529         }
00530
00531         // Update EMAC configuration with current PHY status
00532         if (EMAC_UpdatePHYStatus() < 0){
00533                 return (-1);
00534         }
00535
00536         // Complete
00537         return (0);
00538 }
00539
00540
00541 /*********************************************************************/
00551 int32_t EMAC_UpdatePHYStatus(void)
00552 {
00553         int32_t regv, tout;
00554
00555         /* Check the link status. */
00556 #ifdef MCB_LPC_1768
00557         for (tout = EMAC_PHY_RESP_TOUT; tout; tout--) {
00558                 regv = read_PHY (EMAC_PHY_REG_STS);
00559                 if (regv & EMAC_PHY_SR_LINK) {
00560                         /* Link is on. */
00561                         break;
00562                 }
00563                 if (tout == 0){
00564                         // time out
00565                         return (-1);
00566                 }
00567         }
00568         /* Configure Full/Half Duplex mode. */
00569         if (regv & EMAC_PHY_SR_DUP) {
00570         /* Full duplex is enabled. */
00571                         LPC_EMAC->MAC2    |= EMAC_MAC2_FULL_DUP;
00572                         LPC_EMAC->Command |= EMAC_CR_FULL_DUP;
00573                         LPC_EMAC->IPGT     = EMAC_IPGT_FULL_DUP;
00574         } else {
00575                 /* Half duplex mode. */
00576                 LPC_EMAC->IPGT = EMAC_IPGT_HALF_DUP;
00577         }
00578         if (regv & EMAC_PHY_SR_SPEED) {
00579         /* 10MBit mode. */
00580                 LPC_EMAC->SUPP = 0;
00581         } else {
00582                 /* 100MBit mode. */
00583                 LPC_EMAC->SUPP = EMAC_SUPP_SPEED;
00584         }
00585 #elif defined(IAR_LPC_1768)
00586         for (tout = EMAC_PHY_RESP_TOUT; tout; tout--) {
00587                 regv = read_PHY (EMAC_PHY_REG_BMSR);
00588                 if (regv & EMAC_PHY_BMSR_LINK_STATUS) {
00589                         /* Link is on. */
00590                         break;
00591                 }
00592                 if (tout == 0){
00593                         // time out
00594                         return (-1);
00595                 }
00596         }
00597
00598         /* Configure Full/Half Duplex mode. */
00599         if (regv & EMAC_PHY_SR_FULL_DUP) {
00600                 /* Full duplex is enabled. */
00601                 LPC_EMAC->MAC2    |= EMAC_MAC2_FULL_DUP;
00602                 LPC_EMAC->Command |= EMAC_CR_FULL_DUP;
00603                 LPC_EMAC->IPGT     = EMAC_IPGT_FULL_DUP;
00604         } else {
00605                 /* Half duplex mode. */
00606                 LPC_EMAC->IPGT = EMAC_IPGT_HALF_DUP;
00607         }
00608
00609         /* Configure 100MBit/10MBit mode. */
00610         if (!(regv & EMAC_PHY_SR_100_SPEED)) {
00611                 /* 10MBit mode. */
00612                 LPC_EMAC->SUPP = 0;
00613         } else {
00614                 /* 100MBit mode. */
00615                 LPC_EMAC->SUPP = EMAC_SUPP_SPEED;
00616         }
00617 #endif
00618         // Complete
00619         return (0);
00620 }
00621
00622
00623 /*********************************************************************/
00642 void EMAC_SetHashFilter(uint8_t dstMAC_addr[], FunctionalState NewState)
00643 {
00644         uint32_t *pReg;
00645         uint32_t tmp;
00646         int32_t crc;
00647
00648         // Calculate the CRC from the destination MAC address
00649         crc = emac_CRCCalc(dstMAC_addr, 6);
00650         // Extract the value from CRC to get index value for hash filter table
00651         crc = (crc >> 23) & 0x3F;
00652
00653         pReg = (crc > 31) ? ((uint32_t *)&LPC_EMAC->HashFilterH) \
00654                                                                 : ((uint32_t *)&LPC_EMAC->HashFilterL);
00655         tmp = (crc > 31) ? (crc - 32) : crc;
00656         if (NewState == ENABLE) {
00657                 (*pReg) |= (1UL << tmp);
00658         } else {
00659                 (*pReg) &= ~(1UL << tmp);
00660         }
00661         // Enable Rx Filter
00662         LPC_EMAC->Command &= ~EMAC_CR_PASS_RX_FILT;
00663 }
00664
00665 /*********************************************************************/
00692 void EMAC_SetFilterMode(uint32_t ulFilterMode, FunctionalState NewState)
00693 {
00694         if (NewState == ENABLE){
00695                 LPC_EMAC->RxFilterCtrl |= ulFilterMode;
00696         } else {
00697                 LPC_EMAC->RxFilterCtrl &= ~ulFilterMode;
00698         }
00699 }
00700
00701 /*********************************************************************/
00718 FlagStatus EMAC_GetWoLStatus(uint32_t ulWoLMode)
00719 {
00720         if (LPC_EMAC->RxFilterWoLStatus & ulWoLMode) {
00721                 LPC_EMAC->RxFilterWoLClear = ulWoLMode;
00722                 return SET;
00723         } else {
00724                 return RESET;
00725         }
00726 }
00727
00728
00729 /*********************************************************************/
00737 void EMAC_WritePacketBuffer(EMAC_PACKETBUF_Type *pDataStruct)
00738 {
00739         uint32_t idx,len;
00740         uint32_t *sp,*dp;
00741
00742         idx = LPC_EMAC->TxProduceIndex;
00743         sp  = (uint32_t *)pDataStruct->pbDataBuf;
00744         dp  = (uint32_t *)Tx_Desc[idx].Packet;
00745         /* Copy frame data to EMAC packet buffers. */
00746         for (len = (pDataStruct->ulDataLen + 3) >> 2; len; len--) {
00747                 *dp++ = *sp++;
00748         }
00749         Tx_Desc[idx].Ctrl = (pDataStruct->ulDataLen - 1) | (EMAC_TCTRL_INT | EMAC_TCTRL_LAST);
00750 }
00751
00752 /*********************************************************************/
00760 void EMAC_ReadPacketBuffer(EMAC_PACKETBUF_Type *pDataStruct)
00761 {
00762         uint32_t idx, len;
00763         uint32_t *dp, *sp;
00764
00765         idx = LPC_EMAC->RxConsumeIndex;
00766         dp = (uint32_t *)pDataStruct->pbDataBuf;
00767         sp = (uint32_t *)Rx_Desc[idx].Packet;
00768
00769         if (pDataStruct->pbDataBuf != NULL) {
00770                 for (len = (pDataStruct->ulDataLen + 3) >> 2; len; len--) {
00771                         *dp++ = *sp++;
00772                 }
00773         }
00774 }
00775
00776 /*********************************************************************/
00794 void EMAC_IntCmd(uint32_t ulIntType, FunctionalState NewState)
00795 {
00796         if (NewState == ENABLE) {
00797                 LPC_EMAC->IntEnable |= ulIntType;
00798         } else {
00799                 LPC_EMAC->IntEnable &= ~(ulIntType);
00800         }
00801 }
00802
00803 /*********************************************************************/
00820 IntStatus EMAC_IntGetStatus(uint32_t ulIntType)
00821 {
00822         if (LPC_EMAC->IntStatus & ulIntType) {
00823                 LPC_EMAC->IntClear = ulIntType;
00824                 return SET;
00825         } else {
00826                 return RESET;
00827         }
00828 }
00829
00830
00831 /*********************************************************************/
00841 Bool EMAC_CheckReceiveIndex(void)
00842 {
00843         if (LPC_EMAC->RxConsumeIndex != LPC_EMAC->RxProduceIndex) {
00844                 return TRUE;
00845         } else {
00846                 return FALSE;
00847         }
00848 }
00849
00850
00851 /*********************************************************************/
00861 Bool EMAC_CheckTransmitIndex(void)
00862 {
00863         uint32_t tmp = LPC_EMAC->TxConsumeIndex -1;
00864         if (LPC_EMAC->TxProduceIndex == tmp) {
00865                 return FALSE;
00866         } else {
00867                 return TRUE;
00868         }
00869 }
00870
00871
00872 /*********************************************************************/
00891 FlagStatus EMAC_CheckReceiveDataStatus(uint32_t ulRxStatType)
00892 {
00893         uint32_t idx;
00894         idx = LPC_EMAC->RxConsumeIndex;
00895         return (((Rx_Stat[idx].Info) & ulRxStatType) ? SET : RESET);
00896 }
00897
00898
00899 /*********************************************************************/
00905 uint32_t EMAC_GetReceiveDataSize(void)
00906 {
00907         uint32_t idx;
00908         idx =LPC_EMAC->RxConsumeIndex;
00909         return ((Rx_Stat[idx].Info) & EMAC_RINFO_SIZE);
00910 }
00911
00912 /*********************************************************************/
00919 void EMAC_UpdateRxConsumeIndex(void)
00920 {
00921         // Get current Rx consume index
00922         uint32_t idx = LPC_EMAC->RxConsumeIndex;
00923
00924         /* Release frame from EMAC buffer */
00925         if (++idx == EMAC_NUM_RX_FRAG) idx = 0;
00926         LPC_EMAC->RxConsumeIndex = idx;
00927 }
00928
00929 /*********************************************************************/
00936 void EMAC_UpdateTxProduceIndex(void)
00937 {
00938         // Get current Tx produce index
00939         uint32_t idx = LPC_EMAC->TxProduceIndex;
00940
00941         /* Start frame transmission */
00942         if (++idx == EMAC_NUM_TX_FRAG) idx = 0;
00943         LPC_EMAC->TxProduceIndex = idx;
00944 }
00945
00946
00951 #endif /* _EMAC */
00952
00957 /* --------------------------------- End Of File ------------------------------ */
Generated on Tue Jun 7 14:58:56 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_emac.h Source File

C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_emac.h

Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          lpc17xx_emac.h                          2010-05-21
00003 */
00027 /* Peripheral group ----------------------------------------------------------- */
00033 #ifndef LPC17XX_EMAC_H_
00034 #define LPC17XX_EMAC_H_
00035
00036 /* Includes ------------------------------------------------------------------- */
00037 #include "LPC17xx.h"
00038 #include "lpc_types.h"
00039
00040
00041 #ifdef __cplusplus
00042 extern "C"
00043 {
00044 #endif
00045
00046 #define MCB_LPC_1768
00047 //#define IAR_LPC_1768
00048
00049 /* Public Macros -------------------------------------------------------------- */
00055 /* EMAC PHY status type definitions */
00056 #define EMAC_PHY_STAT_LINK                      (0)
00057 #define EMAC_PHY_STAT_SPEED                     (1)
00058 #define EMAC_PHY_STAT_DUP                       (2)
00060 /* EMAC PHY device Speed definitions */
00061 #define EMAC_MODE_AUTO                          (0)
00062 #define EMAC_MODE_10M_FULL                      (1)
00063 #define EMAC_MODE_10M_HALF                      (2)
00064 #define EMAC_MODE_100M_FULL                     (3)
00065 #define EMAC_MODE_100M_HALF                     (4)
00070 /* Private Macros ------------------------------------------------------------- */
00071
00076 /* EMAC Memory Buffer configuration for 16K Ethernet RAM */
00077 #define EMAC_NUM_RX_FRAG         4
00078 #define EMAC_NUM_TX_FRAG         3
00079 #define EMAC_ETH_MAX_FLEN        1536
00080 #define EMAC_TX_FRAME_TOUT       0x00100000
00082 /* --------------------- BIT DEFINITIONS -------------------------------------- */
00083 /*********************************************************************/
00086 #define EMAC_MAC1_REC_EN         0x00000001
00087 #define EMAC_MAC1_PASS_ALL       0x00000002
00088 #define EMAC_MAC1_RX_FLOWC       0x00000004
00089 #define EMAC_MAC1_TX_FLOWC       0x00000008
00090 #define EMAC_MAC1_LOOPB          0x00000010
00091 #define EMAC_MAC1_RES_TX         0x00000100
00092 #define EMAC_MAC1_RES_MCS_TX     0x00000200
00093 #define EMAC_MAC1_RES_RX         0x00000400
00094 #define EMAC_MAC1_RES_MCS_RX     0x00000800
00095 #define EMAC_MAC1_SIM_RES        0x00004000
00096 #define EMAC_MAC1_SOFT_RES       0x00008000
00098 /*********************************************************************/
00101 #define EMAC_MAC2_FULL_DUP       0x00000001
00102 #define EMAC_MAC2_FRM_LEN_CHK    0x00000002
00103 #define EMAC_MAC2_HUGE_FRM_EN    0x00000004
00104 #define EMAC_MAC2_DLY_CRC        0x00000008
00105 #define EMAC_MAC2_CRC_EN         0x00000010
00106 #define EMAC_MAC2_PAD_EN         0x00000020
00107 #define EMAC_MAC2_VLAN_PAD_EN    0x00000040
00108 #define EMAC_MAC2_ADET_PAD_EN    0x00000080
00109 #define EMAC_MAC2_PPREAM_ENF     0x00000100
00110 #define EMAC_MAC2_LPREAM_ENF     0x00000200
00111 #define EMAC_MAC2_NO_BACKOFF     0x00001000
00112 #define EMAC_MAC2_BACK_PRESSURE  0x00002000
00113 #define EMAC_MAC2_EXCESS_DEF     0x00004000
00115 /*********************************************************************/
00120 #define EMAC_IPGT_BBIPG(n)              (n&0x7F)
00121
00124 #define EMAC_IPGT_FULL_DUP              (EMAC_IPGT_BBIPG(0x15))
00125
00128 #define EMAC_IPGT_HALF_DUP      (EMAC_IPGT_BBIPG(0x12))
00129
00130 /*********************************************************************/
00134 #define EMAC_IPGR_NBBIPG_P2(n)  (n&0x7F)
00135
00136 #define EMAC_IPGR_P2_DEF                (EMAC_IPGR_NBBIPG_P2(0x12))
00137
00139 #define EMAC_IPGR_NBBIPG_P1(n)  ((n&0x7F)<<8)
00140
00141 #define EMAC_IPGR_P1_DEF        EMAC_IPGR_NBBIPG_P1(0x0C)
00142
00143 /*********************************************************************/
00148 #define EMAC_CLRT_MAX_RETX(n)   (n&0x0F)
00149
00151 #define EMAC_CLRT_COLL(n)               ((n&0x3F)<<8)
00152
00153 #define EMAC_CLRT_DEF           ((EMAC_CLRT_MAX_RETX(0x0F))|(EMAC_CLRT_COLL(0x37)))
00154
00155 /*********************************************************************/
00159 #define EMAC_MAXF_MAXFRMLEN(n)  (n&0xFFFF)
00160
00161 /*********************************************************************/
00164 #define EMAC_SUPP_SPEED                 0x00000100
00165 #define EMAC_SUPP_RES_RMII      0x00000800
00167 /*********************************************************************/
00170 #define EMAC_TEST_SHCUT_PQUANTA  0x00000001
00171 #define EMAC_TEST_TST_PAUSE      0x00000002
00172 #define EMAC_TEST_TST_BACKP      0x00000004
00174 /*********************************************************************/
00177 #define EMAC_MCFG_SCAN_INC       0x00000001
00178 #define EMAC_MCFG_SUPP_PREAM     0x00000002
00179 #define EMAC_MCFG_CLK_SEL(n)     ((n&0x0F)<<2)
00180 #define EMAC_MCFG_RES_MII        0x00008000
00181 #define EMAC_MCFG_MII_MAXCLK     2500000UL
00183 /*********************************************************************/
00186 #define EMAC_MCMD_READ           0x00000001
00187 #define EMAC_MCMD_SCAN           0x00000002
00189 #define EMAC_MII_WR_TOUT         0x00050000
00190 #define EMAC_MII_RD_TOUT         0x00050000
00192 /*********************************************************************/
00195 #define EMAC_MADR_REG_ADR(n)     (n&0x1F)
00196 #define EMAC_MADR_PHY_ADR(n)     ((n&0x1F)<<8)
00198 /*********************************************************************/
00201 #define EMAC_MWTD_DATA(n)               (n&0xFFFF)
00203 /*********************************************************************/
00206 #define EMAC_MRDD_DATA(n)               (n&0xFFFF)
00208 /*********************************************************************/
00211 #define EMAC_MIND_BUSY           0x00000001
00212 #define EMAC_MIND_SCAN           0x00000002
00213 #define EMAC_MIND_NOT_VAL        0x00000004
00214 #define EMAC_MIND_MII_LINK_FAIL  0x00000008
00216 /* Station Address 0 Register */
00217 /* Station Address 1 Register */
00218 /* Station Address 2 Register */
00219
00220
00221 /* Control register definitions --------------------------------------------------------------------------- */
00222 /*********************************************************************/
00225 #define EMAC_CR_RX_EN            0x00000001
00226 #define EMAC_CR_TX_EN            0x00000002
00227 #define EMAC_CR_REG_RES          0x00000008
00228 #define EMAC_CR_TX_RES           0x00000010
00229 #define EMAC_CR_RX_RES           0x00000020
00230 #define EMAC_CR_PASS_RUNT_FRM    0x00000040
00231 #define EMAC_CR_PASS_RX_FILT     0x00000080
00232 #define EMAC_CR_TX_FLOW_CTRL     0x00000100
00233 #define EMAC_CR_RMII             0x00000200
00234 #define EMAC_CR_FULL_DUP         0x00000400
00236 /*********************************************************************/
00239 #define EMAC_SR_RX_EN            0x00000001
00240 #define EMAC_SR_TX_EN            0x00000002
00242 /*********************************************************************/
00245 #define EMAC_TSV0_CRC_ERR        0x00000001
00246 #define EMAC_TSV0_LEN_CHKERR     0x00000002
00247 #define EMAC_TSV0_LEN_OUTRNG     0x00000004
00248 #define EMAC_TSV0_DONE           0x00000008
00249 #define EMAC_TSV0_MCAST          0x00000010
00250 #define EMAC_TSV0_BCAST          0x00000020
00251 #define EMAC_TSV0_PKT_DEFER      0x00000040
00252 #define EMAC_TSV0_EXC_DEFER      0x00000080
00253 #define EMAC_TSV0_EXC_COLL       0x00000100
00254 #define EMAC_TSV0_LATE_COLL      0x00000200
00255 #define EMAC_TSV0_GIANT          0x00000400
00256 #define EMAC_TSV0_UNDERRUN       0x00000800
00257 #define EMAC_TSV0_BYTES          0x0FFFF000
00258 #define EMAC_TSV0_CTRL_FRAME     0x10000000
00259 #define EMAC_TSV0_PAUSE          0x20000000
00260 #define EMAC_TSV0_BACK_PRESS     0x40000000
00261 #define EMAC_TSV0_VLAN           0x80000000
00263 /*********************************************************************/
00266 #define EMAC_TSV1_BYTE_CNT       0x0000FFFF
00267 #define EMAC_TSV1_COLL_CNT       0x000F0000
00269 /*********************************************************************/
00272 #define EMAC_RSV_BYTE_CNT        0x0000FFFF
00273 #define EMAC_RSV_PKT_IGNORED     0x00010000
00274 #define EMAC_RSV_RXDV_SEEN       0x00020000
00275 #define EMAC_RSV_CARR_SEEN       0x00040000
00276 #define EMAC_RSV_REC_CODEV       0x00080000
00277 #define EMAC_RSV_CRC_ERR         0x00100000
00278 #define EMAC_RSV_LEN_CHKERR      0x00200000
00279 #define EMAC_RSV_LEN_OUTRNG      0x00400000
00280 #define EMAC_RSV_REC_OK          0x00800000
00281 #define EMAC_RSV_MCAST           0x01000000
00282 #define EMAC_RSV_BCAST           0x02000000
00283 #define EMAC_RSV_DRIB_NIBB       0x04000000
00284 #define EMAC_RSV_CTRL_FRAME      0x08000000
00285 #define EMAC_RSV_PAUSE           0x10000000
00286 #define EMAC_RSV_UNSUPP_OPC      0x20000000
00287 #define EMAC_RSV_VLAN            0x40000000
00289 /*********************************************************************/
00292 #define EMAC_FCC_MIRR_CNT(n)            (n&0xFFFF)
00293 #define EMAC_FCC_PAUSE_TIM(n)           ((n&0xFFFF)<<16)
00295 /*********************************************************************/
00298 #define EMAC_FCS_MIRR_CNT(n)            (n&0xFFFF)
00301 /* Receive filter register definitions -------------------------------------------------------- */
00302 /*********************************************************************/
00305 #define EMAC_RFC_UCAST_EN        0x00000001
00306 #define EMAC_RFC_BCAST_EN        0x00000002
00307 #define EMAC_RFC_MCAST_EN        0x00000004
00308 #define EMAC_RFC_UCAST_HASH_EN   0x00000008
00309 #define EMAC_RFC_MCAST_HASH_EN   0x00000010
00310 #define EMAC_RFC_PERFECT_EN      0x00000020
00311 #define EMAC_RFC_MAGP_WOL_EN     0x00001000
00312 #define EMAC_RFC_PFILT_WOL_EN    0x00002000
00314 /*********************************************************************/
00317 #define EMAC_WOL_UCAST           0x00000001
00318 #define EMAC_WOL_BCAST           0x00000002
00319 #define EMAC_WOL_MCAST           0x00000004
00320 #define EMAC_WOL_UCAST_HASH      0x00000008
00321 #define EMAC_WOL_MCAST_HASH      0x00000010
00322 #define EMAC_WOL_PERFECT         0x00000020
00323 #define EMAC_WOL_RX_FILTER       0x00000080
00324 #define EMAC_WOL_MAG_PACKET      0x00000100
00325 #define EMAC_WOL_BITMASK                 0x01BF
00328 /* Module control register definitions ---------------------------------------------------- */
00329 /*********************************************************************/
00332 #define EMAC_INT_RX_OVERRUN      0x00000001
00333 #define EMAC_INT_RX_ERR          0x00000002
00334 #define EMAC_INT_RX_FIN          0x00000004
00335 #define EMAC_INT_RX_DONE         0x00000008
00336 #define EMAC_INT_TX_UNDERRUN     0x00000010
00337 #define EMAC_INT_TX_ERR          0x00000020
00338 #define EMAC_INT_TX_FIN          0x00000040
00339 #define EMAC_INT_TX_DONE         0x00000080
00340 #define EMAC_INT_SOFT_INT        0x00001000
00341 #define EMAC_INT_WAKEUP          0x00002000
00343 /*********************************************************************/
00346 #define EMAC_PD_POWER_DOWN       0x80000000
00348 /* Descriptor and status formats ---------------------------------------------------- */
00349 /*********************************************************************/
00352 #define EMAC_RCTRL_SIZE(n)       (n&0x7FF)
00353 #define EMAC_RCTRL_INT           0x80000000
00355 /*********************************************************************/
00358 #define EMAC_RHASH_SA            0x000001FF
00359 #define EMAC_RHASH_DA            0x001FF000
00361 /*********************************************************************/
00364 #define EMAC_RINFO_SIZE          0x000007FF
00365 #define EMAC_RINFO_CTRL_FRAME    0x00040000
00366 #define EMAC_RINFO_VLAN          0x00080000
00367 #define EMAC_RINFO_FAIL_FILT     0x00100000
00368 #define EMAC_RINFO_MCAST         0x00200000
00369 #define EMAC_RINFO_BCAST         0x00400000
00370 #define EMAC_RINFO_CRC_ERR       0x00800000
00371 #define EMAC_RINFO_SYM_ERR       0x01000000
00372 #define EMAC_RINFO_LEN_ERR       0x02000000
00373 #define EMAC_RINFO_RANGE_ERR     0x04000000
00374 #define EMAC_RINFO_ALIGN_ERR     0x08000000
00375 #define EMAC_RINFO_OVERRUN       0x10000000
00376 #define EMAC_RINFO_NO_DESCR      0x20000000
00377 #define EMAC_RINFO_LAST_FLAG     0x40000000
00378 #define EMAC_RINFO_ERR           0x80000000
00379 #define EMAC_RINFO_ERR_MASK     (EMAC_RINFO_FAIL_FILT | EMAC_RINFO_CRC_ERR   | EMAC_RINFO_SYM_ERR | \
00380 EMAC_RINFO_LEN_ERR   | EMAC_RINFO_ALIGN_ERR | EMAC_RINFO_OVERRUN)
00381
00382 /*********************************************************************/
00385 #define EMAC_TCTRL_SIZE          0x000007FF
00386 #define EMAC_TCTRL_OVERRIDE      0x04000000
00387 #define EMAC_TCTRL_HUGE          0x08000000
00388 #define EMAC_TCTRL_PAD           0x10000000
00389 #define EMAC_TCTRL_CRC           0x20000000
00390 #define EMAC_TCTRL_LAST          0x40000000
00391 #define EMAC_TCTRL_INT           0x80000000
00393 /*********************************************************************/
00396 #define EMAC_TINFO_COL_CNT       0x01E00000
00397 #define EMAC_TINFO_DEFER         0x02000000
00398 #define EMAC_TINFO_EXCESS_DEF    0x04000000
00399 #define EMAC_TINFO_EXCESS_COL    0x08000000
00400 #define EMAC_TINFO_LATE_COL      0x10000000
00401 #define EMAC_TINFO_UNDERRUN      0x20000000
00402 #define EMAC_TINFO_NO_DESCR      0x40000000
00403 #define EMAC_TINFO_ERR           0x80000000
00405 #ifdef MCB_LPC_1768
00406 /* DP83848C PHY definition ------------------------------------------------------------ */
00407
00409 #define EMAC_PHY_RESP_TOUT              0x100000UL
00410
00411 /* ENET Device Revision ID */
00412 #define EMAC_OLD_EMAC_MODULE_ID  0x39022000
00414 /*********************************************************************/
00417 #define EMAC_PHY_REG_BMCR        0x00
00418 #define EMAC_PHY_REG_BMSR        0x01
00419 #define EMAC_PHY_REG_IDR1        0x02
00420 #define EMAC_PHY_REG_IDR2        0x03
00421 #define EMAC_PHY_REG_ANAR        0x04
00422 #define EMAC_PHY_REG_ANLPAR      0x05
00423 #define EMAC_PHY_REG_ANER        0x06
00424 #define EMAC_PHY_REG_ANNPTR      0x07
00425 #define EMAC_PHY_REG_LPNPA               0x08
00426
00427 /*********************************************************************/
00430 #define EMAC_PHY_REG_STS         0x10
00431 #define EMAC_PHY_REG_MICR        0x11
00432 #define EMAC_PHY_REG_MISR        0x12
00433 #define EMAC_PHY_REG_FCSCR       0x14
00434 #define EMAC_PHY_REG_RECR        0x15
00435 #define EMAC_PHY_REG_PCSR        0x16
00436 #define EMAC_PHY_REG_RBR         0x17
00437 #define EMAC_PHY_REG_LEDCR       0x18
00438 #define EMAC_PHY_REG_PHYCR       0x19
00439 #define EMAC_PHY_REG_10BTSCR     0x1A
00440 #define EMAC_PHY_REG_CDCTRL1     0x1B
00441 #define EMAC_PHY_REG_EDCR        0x1D
00443 /*********************************************************************/
00446 #define EMAC_PHY_BMCR_RESET                             (1<<15)
00447 #define EMAC_PHY_BMCR_LOOPBACK                  (1<<14)
00448 #define EMAC_PHY_BMCR_SPEED_SEL                 (1<<13)
00449 #define EMAC_PHY_BMCR_AN                                        (1<<12)
00450 #define EMAC_PHY_BMCR_POWERDOWN                         (1<<11)
00451 #define EMAC_PHY_BMCR_ISOLATE                           (1<<10)
00452 #define EMAC_PHY_BMCR_RE_AN                                     (1<<9)
00453 #define EMAC_PHY_BMCR_DUPLEX                            (1<<8)
00455 /*********************************************************************/
00458 #define EMAC_PHY_BMSR_100BE_T4                  (1<<15)
00459 #define EMAC_PHY_BMSR_100TX_FULL                        (1<<14)
00460 #define EMAC_PHY_BMSR_100TX_HALF                        (1<<13)
00461 #define EMAC_PHY_BMSR_10BE_FULL                         (1<<12)
00462 #define EMAC_PHY_BMSR_10BE_HALF                         (1<<11)
00463 #define EMAC_PHY_BMSR_NOPREAM                           (1<<6)
00464 #define EMAC_PHY_BMSR_AUTO_DONE                         (1<<5)
00465 #define EMAC_PHY_BMSR_REMOTE_FAULT                      (1<<4)
00466 #define EMAC_PHY_BMSR_NO_AUTO                           (1<<3)
00467 #define EMAC_PHY_BMSR_LINK_ESTABLISHED          (1<<2)
00469 /*********************************************************************/
00472 #define EMAC_PHY_SR_REMOTE_FAULT                        (1<<6)
00473 #define EMAC_PHY_SR_JABBER                                      (1<<5)
00474 #define EMAC_PHY_SR_AUTO_DONE                           (1<<4)
00475 #define EMAC_PHY_SR_LOOPBACK                            (1<<3)
00476 #define EMAC_PHY_SR_DUP                                         (1<<2)
00477 #define EMAC_PHY_SR_SPEED                                       (1<<1)
00478 #define EMAC_PHY_SR_LINK                                        (1<<0)
00480 #define EMAC_PHY_FULLD_100M      0x2100
00481 #define EMAC_PHY_HALFD_100M      0x2000
00482 #define EMAC_PHY_FULLD_10M       0x0100
00483 #define EMAC_PHY_HALFD_10M       0x0000
00484 #define EMAC_PHY_AUTO_NEG        0x3000
00486 #define EMAC_DEF_ADR    0x0100
00487 #define EMAC_DP83848C_ID         0x20005C90
00489 #define EMAC_PHY_SR_100_SPEED           ((1<<14)|(1<<13))
00490 #define EMAC_PHY_SR_FULL_DUP            ((1<<14)|(1<<12))
00491 #define EMAC_PHY_BMSR_LINK_STATUS                       (1<<2)
00493 #elif defined(IAR_LPC_1768)
00494 /* KSZ8721BL PHY definition ------------------------------------------------------------ */
00496 #define EMAC_PHY_RESP_TOUT              0x100000UL
00497
00498 /* ENET Device Revision ID */
00499 #define EMAC_OLD_EMAC_MODULE_ID  0x39022000
00501 /*********************************************************************/
00504 #define EMAC_PHY_REG_BMCR        0x00
00505 #define EMAC_PHY_REG_BMSR        0x01
00506 #define EMAC_PHY_REG_IDR1        0x02
00507 #define EMAC_PHY_REG_IDR2        0x03
00508 #define EMAC_PHY_REG_ANAR        0x04
00509 #define EMAC_PHY_REG_ANLPAR      0x05
00510 #define EMAC_PHY_REG_ANER        0x06
00511 #define EMAC_PHY_REG_ANNPTR      0x07
00512 #define EMAC_PHY_REG_LPNPA               0x08
00513 #define EMAC_PHY_REG_REC                 0x15
00514 #define EMAC_PHY_REG_ISC                 0x1b
00515 #define EMAC_PHY_REG_100BASE     0x1f
00517 /*********************************************************************/
00520 #define EMAC_PHY_BMCR_RESET                             (1<<15)
00521 #define EMAC_PHY_BMCR_LOOPBACK                  (1<<14)
00522 #define EMAC_PHY_BMCR_SPEED_SEL                 (1<<13)
00523 #define EMAC_PHY_BMCR_AN                                        (1<<12)
00524 #define EMAC_PHY_BMCR_POWERDOWN                         (1<<11)
00525 #define EMAC_PHY_BMCR_ISOLATE                           (1<<10)
00526 #define EMAC_PHY_BMCR_RE_AN                                     (1<<9)
00527 #define EMAC_PHY_BMCR_DUPLEX                            (1<<8)
00528 #define EMAC_PHY_BMCR_COLLISION                         (1<<7)
00529 #define EMAC_PHY_BMCR_TXDIS                                     (1<<0)
00531 /*********************************************************************/
00534 #define EMAC_PHY_BMSR_100BE_T4                  (1<<15)
00535 #define EMAC_PHY_BMSR_100TX_FULL                        (1<<14)
00536 #define EMAC_PHY_BMSR_100TX_HALF                        (1<<13)
00537 #define EMAC_PHY_BMSR_10BE_FULL                         (1<<12)
00538 #define EMAC_PHY_BMSR_10BE_HALF                         (1<<11)
00539 #define EMAC_PHY_BMSR_NOPREAM                           (1<<6)
00540 #define EMAC_PHY_BMSR_AUTO_DONE                         (1<<5)
00541 #define EMAC_PHY_BMSR_REMOTE_FAULT                      (1<<4)
00542 #define EMAC_PHY_BMSR_NO_AUTO                           (1<<3)
00543 #define EMAC_PHY_BMSR_LINK_STATUS                       (1<<2)
00544 #define EMAC_PHY_BMSR_JABBER_DETECT                     (1<<1)
00545 #define EMAC_PHY_BMSR_EXTEND                            (1<<0)
00547 /*********************************************************************/
00550 /* PHY Identifier 1 bitmap definitions */
00551 #define EMAC_PHY_IDR1(n)                (n & 0xFFFF)
00553 /* PHY Identifier 2 bitmap definitions */
00554 #define EMAC_PHY_IDR2(n)                (n & 0xFFFF)
00556 /*********************************************************************/
00559 #define EMAC_PHY_AN_NEXTPAGE                                    (1<<15)
00560 #define EMAC_PHY_AN_REMOTE_FAULT                                (1<<13)
00561 #define EMAC_PHY_AN_PAUSE                                               (1<<10)
00562 #define EMAC_PHY_AN_100BASE_T4                                  (1<<9)
00563 #define EMAC_PHY_AN_100BASE_TX_FD                               (1<<8)
00564 #define EMAC_PHY_AN_100BASE_TX                                  (1<<7)
00565 #define EMAC_PHY_AN_10BASE_T_FD                                 (1<<6)
00566 #define EMAC_PHY_AN_10BASE_T                                    (1<<5)
00567 #define EMAC_PHY_AN_FIELD(n)                                    (n & 0x1F)
00569 #define EMAC_PHY_FULLD_100M      0x2100
00570 #define EMAC_PHY_HALFD_100M      0x2000
00571 #define EMAC_PHY_FULLD_10M       0x0100
00572 #define EMAC_PHY_HALFD_10M       0x0000
00573 #define EMAC_PHY_AUTO_NEG        0x3000
00575 #define EMAC_PHY_SR_100_SPEED           ((1<<14)|(1<<13))
00576 #define EMAC_PHY_SR_FULL_DUP            ((1<<14)|(1<<12))
00577
00578 #define EMAC_DEF_ADR    (0x01<<8)
00579 #define EMAC_KSZ8721BL_ID       ((0x22 << 16) | 0x1619 )
00580 #endif
00581
00587 /* Public Types --------------------------------------------------------------- */
00592 /* Descriptor and status formats ---------------------------------------------- */
00593
00597 typedef struct {
00598         uint32_t Packet;
00599         uint32_t Ctrl;
00600 } RX_Desc;
00601
00605 typedef struct {
00606         uint32_t Info;
00607         uint32_t HashCRC;
00608 } RX_Stat;
00609
00613 typedef struct {
00614         uint32_t Packet;
00615         uint32_t Ctrl;
00616 } TX_Desc;
00617
00621 typedef struct {
00622    uint32_t Info;
00623 } TX_Stat;
00624
00625
00629 typedef struct {
00630         uint32_t ulDataLen;
00631         uint32_t *pbDataBuf;
00632 } EMAC_PACKETBUF_Type;
00633
00637 typedef struct {
00638         uint32_t        Mode;
00645         uint8_t         *pbEMAC_Addr;
00648 } EMAC_CFG_Type;
00649
00650
00656 /* Public Functions ----------------------------------------------------------- */
00660 /* Init/DeInit EMAC peripheral */
00661 Status EMAC_Init(EMAC_CFG_Type *EMAC_ConfigStruct);
00662 void EMAC_DeInit(void);
00663
00664 /* PHY functions --------------*/
00665 int32_t EMAC_CheckPHYStatus(uint32_t ulPHYState);
00666 int32_t EMAC_SetPHYMode(uint32_t ulPHYMode);
00667 int32_t EMAC_UpdatePHYStatus(void);
00668
00669 /* Filter functions ----------*/
00670 void EMAC_SetHashFilter(uint8_t dstMAC_addr[], FunctionalState NewState);
00671 void EMAC_SetFilterMode(uint32_t ulFilterMode, FunctionalState NewState);
00672
00673 /* EMAC Packet Buffer functions */
00674 void EMAC_WritePacketBuffer(EMAC_PACKETBUF_Type *pDataStruct);
00675 void EMAC_ReadPacketBuffer(EMAC_PACKETBUF_Type *pDataStruct);
00676
00677 /* EMAC Interrupt functions -------*/
00678 void EMAC_IntCmd(uint32_t ulIntType, FunctionalState NewState);
00679 IntStatus EMAC_IntGetStatus(uint32_t ulIntType);
00680
00681 /* EMAC Index functions -----------*/
00682 Bool EMAC_CheckReceiveIndex(void);
00683 Bool EMAC_CheckTransmitIndex(void);
00684 void EMAC_UpdateRxConsumeIndex(void);
00685 void EMAC_UpdateTxProduceIndex(void);
00686
00687 FlagStatus EMAC_CheckReceiveDataStatus(uint32_t ulRxStatType);
00688 uint32_t EMAC_GetReceiveDataSize(void);
00689 FlagStatus EMAC_GetWoLStatus(uint32_t ulWoLMode);
00690
00695 #ifdef __cplusplus
00696 }
00697 #endif
00698
00699 #endif /* LPC17XX_EMAC_H_ */
00700
00705 /* --------------------------------- End Of File ------------------------------ */
Generated on Tue Jun 7 14:58:55 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Drivers/source/lpc17xx_exti.c Source File

C:/nxpdrv/LPC1700CMSIS/Drivers/source/lpc17xx_exti.c

Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          lpc17xx_exti.c                          2010-06-18
00003 */
00027 /* Peripheral group ----------------------------------------------------------- */
00032 /* Includes ------------------------------------------------------------------- */
00033 #include "lpc17xx_exti.h"
00034
00035 /* If this source file built with example, the LPC17xx FW library configuration
00036  * file in each example directory ("lpc17xx_libcfg.h") must be included,
00037  * otherwise the default FW library configuration file must be included instead
00038  */
00039 #ifdef __BUILD_WITH_EXAMPLE__
00040 #include "lpc17xx_libcfg.h"
00041 #else
00042 #include "lpc17xx_libcfg_default.h"
00043 #endif /* __BUILD_WITH_EXAMPLE__ */
00044
00045
00046 #ifdef _EXTI
00047
00048 /* Public Functions ----------------------------------------------------------- */
00053 /*********************************************************************/
00059 void EXTI_Init(void)
00060 {
00061         LPC_SC->EXTINT = 0xF;
00062         LPC_SC->EXTMODE = 0x0;
00063         LPC_SC->EXTPOLAR = 0x0;
00064 }
00065
00066
00067 /*********************************************************************/
00072 void    EXTI_DeInit(void)
00073 {
00074         ;
00075 }
00076
00077 /*********************************************************************/
00085 void EXTI_Config(EXTI_InitTypeDef *EXTICfg)
00086 {
00087         LPC_SC->EXTINT = 0x0;
00088         EXTI_SetMode(EXTICfg->EXTI_Line, EXTICfg->EXTI_Mode);
00089         EXTI_SetPolarity(EXTICfg->EXTI_Line, EXTICfg->EXTI_polarity);
00090 }
00091
00092 /*********************************************************************/
00104 void EXTI_SetMode(EXTI_LINE_ENUM EXTILine, EXTI_MODE_ENUM mode)
00105 {
00106         if(mode == EXTI_MODE_EDGE_SENSITIVE)
00107         {
00108                 LPC_SC->EXTMODE |= (1 << EXTILine);
00109         }
00110         else if(mode == EXTI_MODE_LEVEL_SENSITIVE)
00111         {
00112                 LPC_SC->EXTMODE &= ~(1 << EXTILine);
00113         }
00114 }
00115
00116 /*********************************************************************/
00128 void EXTI_SetPolarity(EXTI_LINE_ENUM EXTILine, EXTI_POLARITY_ENUM polarity)
00129 {
00130         if(polarity == EXTI_POLARITY_HIGH_ACTIVE_OR_RISING_EDGE)
00131         {
00132                 LPC_SC->EXTPOLAR |= (1 << EXTILine);
00133         }
00134         else if(polarity == EXTI_POLARITY_LOW_ACTIVE_OR_FALLING_EDGE)
00135         {
00136                 LPC_SC->EXTPOLAR &= ~(1 << EXTILine);
00137         }
00138 }
00139
00140 /*********************************************************************/
00149 void EXTI_ClearEXTIFlag(EXTI_LINE_ENUM EXTILine)
00150 {
00151                 LPC_SC->EXTINT |= (1 << EXTILine);
00152 }
00153
00158 #endif /* _EXTI */
00159
00164 /* --------------------------------- End Of File ------------------------------ */
00165
Generated on Tue Jun 7 14:58:56 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_exti.h Source File

C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_exti.h

Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          lpc17xx_exti.h                          2010-05-21
00003 */
00027 /* Peripheral group ----------------------------------------------------------- */
00033 #ifndef LPC17XX_EXTI_H_
00034 #define LPC17XX_EXTI_H_
00035
00036 /* Includes ------------------------------------------------------------------- */
00037 #include "LPC17xx.h"
00038 #include "lpc_types.h"
00039
00040
00041 #ifdef __cplusplus
00042 extern "C"
00043 {
00044 #endif
00045
00046
00047 /* Private Macros ------------------------------------------------------------- */
00051 /*********************************************************************/
00054 #define EXTI_EINT0_BIT_MARK     0x01
00055 #define EXTI_EINT1_BIT_MARK     0x02
00056 #define EXTI_EINT2_BIT_MARK     0x04
00057 #define EXTI_EINT3_BIT_MARK     0x08
00058
00063 /* Private Macros ------------------------------------------------------------- */
00071 typedef enum
00072 {
00073         EXTI_EINT0,
00074         EXTI_EINT1,
00075         EXTI_EINT2,
00076         EXTI_EINT3
00077 } EXTI_LINE_ENUM;
00078
00082 typedef enum
00083 {
00084         EXTI_MODE_LEVEL_SENSITIVE,
00085         EXTI_MODE_EDGE_SENSITIVE
00086 } EXTI_MODE_ENUM;
00087
00091 typedef enum
00092 {
00093         EXTI_POLARITY_LOW_ACTIVE_OR_FALLING_EDGE,
00095         EXTI_POLARITY_HIGH_ACTIVE_OR_RISING_EDGE
00097 } EXTI_POLARITY_ENUM;
00098
00102 typedef struct
00103 {
00104         EXTI_LINE_ENUM EXTI_Line;
00106         EXTI_MODE_ENUM EXTI_Mode;
00108         EXTI_POLARITY_ENUM EXTI_polarity;
00111 }EXTI_InitTypeDef;
00112
00113
00119 /* Public Functions ----------------------------------------------------------- */
00124 void EXTI_Init(void);
00125 void EXTI_DeInit(void);
00126
00127 void EXTI_Config(EXTI_InitTypeDef *EXTICfg);
00128 void EXTI_SetMode(EXTI_LINE_ENUM EXTILine, EXTI_MODE_ENUM mode);
00129 void EXTI_SetPolarity(EXTI_LINE_ENUM EXTILine, EXTI_POLARITY_ENUM polarity);
00130 void EXTI_ClearEXTIFlag(EXTI_LINE_ENUM EXTILine);
00131
00132
00138 #ifdef __cplusplus
00139 }
00140 #endif
00141
00142
00143 #endif /* LPC17XX_EXTI_H_ */
00144
00149 /* --------------------------------- End Of File ------------------------------ */
Generated on Tue Jun 7 14:58:55 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Drivers/source/lpc17xx_gpdma.c Source File

C:/nxpdrv/LPC1700CMSIS/Drivers/source/lpc17xx_gpdma.c

Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          lpc17xx_gpdma.c                         2010-03-21
00003 */
00027 /* Peripheral group ----------------------------------------------------------- */
00032 /* Includes ------------------------------------------------------------------- */
00033 #include "lpc17xx_gpdma.h"
00034 #include "lpc17xx_clkpwr.h"
00035
00036 /* If this source file built with example, the LPC17xx FW library configuration
00037  * file in each example directory ("lpc17xx_libcfg.h") must be included,
00038  * otherwise the default FW library configuration file must be included instead
00039  */
00040 #ifdef __BUILD_WITH_EXAMPLE__
00041 #include "lpc17xx_libcfg.h"
00042 #else
00043 #include "lpc17xx_libcfg_default.h"
00044 #endif /* __BUILD_WITH_EXAMPLE__ */
00045
00046 #ifdef _GPDMA
00047
00048
00049 /* Private Variables ---------------------------------------------------------- */
00058 #ifdef __IAR_SYSTEMS_ICC__
00059 volatile const void *GPDMA_LUTPerAddr[] = {
00060                 (&LPC_SSP0->DR),                                // SSP0 Tx
00061                 (&LPC_SSP0->DR),                                // SSP0 Rx
00062                 (&LPC_SSP1->DR),                                // SSP1 Tx
00063                 (&LPC_SSP1->DR),                                // SSP1 Rx
00064                 (&LPC_ADC->ADGDR),                      // ADC
00065                 (&LPC_I2S->I2STXFIFO),          // I2S Tx
00066                 (&LPC_I2S->I2SRXFIFO),          // I2S Rx
00067                 (&LPC_DAC->DACR),                               // DAC
00068                 (&LPC_UART0->/*RBTHDLR.*/THR),  // UART0 Tx
00069                 (&LPC_UART0->/*RBTHDLR.*/RBR),  // UART0 Rx
00070                 (&LPC_UART1->/*RBTHDLR.*/THR),  // UART1 Tx
00071                 (&LPC_UART1->/*RBTHDLR.*/RBR),  // UART1 Rx
00072                 (&LPC_UART2->/*RBTHDLR.*/THR),  // UART2 Tx
00073                 (&LPC_UART2->/*RBTHDLR.*/RBR),  // UART2 Rx
00074                 (&LPC_UART3->/*RBTHDLR.*/THR),  // UART3 Tx
00075                 (&LPC_UART3->/*RBTHDLR.*/RBR),  // UART3 Rx
00076                 (&LPC_TIM0->MR0),                               // MAT0.0
00077                 (&LPC_TIM0->MR1),                               // MAT0.1
00078                 (&LPC_TIM1->MR0),                               // MAT1.0
00079                 (&LPC_TIM1->MR1),                               // MAT1.1
00080                 (&LPC_TIM2->MR0),                               // MAT2.0
00081                 (&LPC_TIM2->MR1),                               // MAT2.1
00082                 (&LPC_TIM3->MR0),                               // MAT3.0
00083                 (&LPC_TIM3->MR1)                                // MAT3.1
00084 };
00085 #else
00086 const uint32_t GPDMA_LUTPerAddr[] = {
00087                 ((uint32_t)&LPC_SSP0->DR),                              // SSP0 Tx
00088                 ((uint32_t)&LPC_SSP0->DR),                              // SSP0 Rx
00089                 ((uint32_t)&LPC_SSP1->DR),                              // SSP1 Tx
00090                 ((uint32_t)&LPC_SSP1->DR),                              // SSP1 Rx
00091                 ((uint32_t)&LPC_ADC->ADGDR),                    // ADC
00092                 ((uint32_t)&LPC_I2S->I2STXFIFO),                // I2S Tx
00093                 ((uint32_t)&LPC_I2S->I2SRXFIFO),                // I2S Rx
00094                 ((uint32_t)&LPC_DAC->DACR),                             // DAC
00095                 ((uint32_t)&LPC_UART0->/*RBTHDLR.*/THR),        // UART0 Tx
00096                 ((uint32_t)&LPC_UART0->/*RBTHDLR.*/RBR),        // UART0 Rx
00097                 ((uint32_t)&LPC_UART1->/*RBTHDLR.*/THR),        // UART1 Tx
00098                 ((uint32_t)&LPC_UART1->/*RBTHDLR.*/RBR),        // UART1 Rx
00099                 ((uint32_t)&LPC_UART2->/*RBTHDLR.*/THR),        // UART2 Tx
00100                 ((uint32_t)&LPC_UART2->/*RBTHDLR.*/RBR),        // UART2 Rx
00101                 ((uint32_t)&LPC_UART3->/*RBTHDLR.*/THR),        // UART3 Tx
00102                 ((uint32_t)&LPC_UART3->/*RBTHDLR.*/RBR),        // UART3 Rx
00103                 ((uint32_t)&LPC_TIM0->MR0),                             // MAT0.0
00104                 ((uint32_t)&LPC_TIM0->MR1),                             // MAT0.1
00105                 ((uint32_t)&LPC_TIM1->MR0),                             // MAT1.0
00106                 ((uint32_t)&LPC_TIM1->MR1),                             // MAT1.1
00107                 ((uint32_t)&LPC_TIM2->MR0),                             // MAT2.0
00108                 ((uint32_t)&LPC_TIM2->MR1),                             // MAT2.1
00109                 ((uint32_t)&LPC_TIM3->MR0),                             // MAT3.0
00110                 ((uint32_t)&LPC_TIM3->MR1)                              // MAT3.1
00111 };
00112 #endif
00113
00117 const LPC_GPDMACH_TypeDef *pGPDMACh[8] = {
00118                 LPC_GPDMACH0,   // GPDMA Channel 0
00119                 LPC_GPDMACH1,   // GPDMA Channel 1
00120                 LPC_GPDMACH2,   // GPDMA Channel 2
00121                 LPC_GPDMACH3,   // GPDMA Channel 3
00122                 LPC_GPDMACH4,   // GPDMA Channel 4
00123                 LPC_GPDMACH5,   // GPDMA Channel 5
00124                 LPC_GPDMACH6,   // GPDMA Channel 6
00125                 LPC_GPDMACH7    // GPDMA Channel 7
00126 };
00130 const uint8_t GPDMA_LUTPerBurst[] = {
00131                 GPDMA_BSIZE_4,                          // SSP0 Tx
00132                 GPDMA_BSIZE_4,                          // SSP0 Rx
00133                 GPDMA_BSIZE_4,                          // SSP1 Tx
00134                 GPDMA_BSIZE_4,                          // SSP1 Rx
00135                 GPDMA_BSIZE_4,                          // ADC
00136                 GPDMA_BSIZE_32,                         // I2S channel 0
00137                 GPDMA_BSIZE_32,                         // I2S channel 1
00138                 GPDMA_BSIZE_1,                          // DAC
00139                 GPDMA_BSIZE_1,                          // UART0 Tx
00140                 GPDMA_BSIZE_1,                          // UART0 Rx
00141                 GPDMA_BSIZE_1,                          // UART1 Tx
00142                 GPDMA_BSIZE_1,                          // UART1 Rx
00143                 GPDMA_BSIZE_1,                          // UART2 Tx
00144                 GPDMA_BSIZE_1,                          // UART2 Rx
00145                 GPDMA_BSIZE_1,                          // UART3 Tx
00146                 GPDMA_BSIZE_1,                          // UART3 Rx
00147                 GPDMA_BSIZE_1,                          // MAT0.0
00148                 GPDMA_BSIZE_1,                          // MAT0.1
00149                 GPDMA_BSIZE_1,                          // MAT1.0
00150                 GPDMA_BSIZE_1,                          // MAT1.1
00151                 GPDMA_BSIZE_1,                          // MAT2.0
00152                 GPDMA_BSIZE_1,                          // MAT2.1
00153                 GPDMA_BSIZE_1,                          // MAT3.0
00154                 GPDMA_BSIZE_1                           // MAT3.1
00155 };
00159 const uint8_t GPDMA_LUTPerWid[] = {
00160                 GPDMA_WIDTH_BYTE,                               // SSP0 Tx
00161                 GPDMA_WIDTH_BYTE,                               // SSP0 Rx
00162                 GPDMA_WIDTH_BYTE,                               // SSP1 Tx
00163                 GPDMA_WIDTH_BYTE,                               // SSP1 Rx
00164                 GPDMA_WIDTH_WORD,                               // ADC
00165                 GPDMA_WIDTH_WORD,                               // I2S channel 0
00166                 GPDMA_WIDTH_WORD,                               // I2S channel 1
00167                 GPDMA_WIDTH_BYTE,                               // DAC
00168                 GPDMA_WIDTH_BYTE,                               // UART0 Tx
00169                 GPDMA_WIDTH_BYTE,                               // UART0 Rx
00170                 GPDMA_WIDTH_BYTE,                               // UART1 Tx
00171                 GPDMA_WIDTH_BYTE,                               // UART1 Rx
00172                 GPDMA_WIDTH_BYTE,                               // UART2 Tx
00173                 GPDMA_WIDTH_BYTE,                               // UART2 Rx
00174                 GPDMA_WIDTH_BYTE,                               // UART3 Tx
00175                 GPDMA_WIDTH_BYTE,                               // UART3 Rx
00176                 GPDMA_WIDTH_WORD,                               // MAT0.0
00177                 GPDMA_WIDTH_WORD,                               // MAT0.1
00178                 GPDMA_WIDTH_WORD,                               // MAT1.0
00179                 GPDMA_WIDTH_WORD,                               // MAT1.1
00180                 GPDMA_WIDTH_WORD,                               // MAT2.0
00181                 GPDMA_WIDTH_WORD,                               // MAT2.1
00182                 GPDMA_WIDTH_WORD,                               // MAT3.0
00183                 GPDMA_WIDTH_WORD                                // MAT3.1
00184 };
00185
00190 /* Public Functions ----------------------------------------------------------- */
00195 /********************************************************************/
00200 void GPDMA_Init(void)
00201 {
00202         /* Enable GPDMA clock */
00203         CLKPWR_ConfigPPWR (CLKPWR_PCONP_PCGPDMA, ENABLE);
00204
00205         // Reset all channel configuration register
00206         LPC_GPDMACH0->DMACCConfig = 0;
00207         LPC_GPDMACH1->DMACCConfig = 0;
00208         LPC_GPDMACH2->DMACCConfig = 0;
00209         LPC_GPDMACH3->DMACCConfig = 0;
00210         LPC_GPDMACH4->DMACCConfig = 0;
00211         LPC_GPDMACH5->DMACCConfig = 0;
00212         LPC_GPDMACH6->DMACCConfig = 0;
00213         LPC_GPDMACH7->DMACCConfig = 0;
00214
00215         /* Clear all DMA interrupt and error flag */
00216         LPC_GPDMA->DMACIntTCClear = 0xFF;
00217         LPC_GPDMA->DMACIntErrClr = 0xFF;
00218 }
00219
00220 /********************************************************************/
00229 Status GPDMA_Setup(GPDMA_Channel_CFG_Type *GPDMAChannelConfig)
00230 {
00231         LPC_GPDMACH_TypeDef *pDMAch;
00232         uint32_t tmp1, tmp2;
00233
00234         if (LPC_GPDMA->DMACEnbldChns & (GPDMA_DMACEnbldChns_Ch(GPDMAChannelConfig->ChannelNum))) {
00235                 // This channel is enabled, return ERROR, need to release this channel first
00236                 return ERROR;
00237         }
00238
00239         // Get Channel pointer
00240         pDMAch = (LPC_GPDMACH_TypeDef *) pGPDMACh[GPDMAChannelConfig->ChannelNum];
00241
00242         // Reset the Interrupt status
00243         LPC_GPDMA->DMACIntTCClear = GPDMA_DMACIntTCClear_Ch(GPDMAChannelConfig->ChannelNum);
00244         LPC_GPDMA->DMACIntErrClr = GPDMA_DMACIntErrClr_Ch(GPDMAChannelConfig->ChannelNum);
00245
00246         // Clear DMA configure
00247         pDMAch->DMACCControl = 0x00;
00248         pDMAch->DMACCConfig = 0x00;
00249
00250         /* Assign Linker List Item value */
00251         pDMAch->DMACCLLI = GPDMAChannelConfig->DMALLI;
00252
00253         /* Set value to Channel Control Registers */
00254         switch (GPDMAChannelConfig->TransferType)
00255         {
00256         // Memory to memory
00257         case GPDMA_TRANSFERTYPE_M2M:
00258                 // Assign physical source and destination address
00259                 pDMAch->DMACCSrcAddr = GPDMAChannelConfig->SrcMemAddr;
00260                 pDMAch->DMACCDestAddr = GPDMAChannelConfig->DstMemAddr;
00261                 pDMAch->DMACCControl
00262                                 = GPDMA_DMACCxControl_TransferSize(GPDMAChannelConfig->TransferSize) \
00263                                                 | GPDMA_DMACCxControl_SBSize(GPDMA_BSIZE_32) \
00264                                                 | GPDMA_DMACCxControl_DBSize(GPDMA_BSIZE_32) \
00265                                                 | GPDMA_DMACCxControl_SWidth(GPDMAChannelConfig->TransferWidth) \
00266                                                 | GPDMA_DMACCxControl_DWidth(GPDMAChannelConfig->TransferWidth) \
00267                                                 | GPDMA_DMACCxControl_SI \
00268                                                 | GPDMA_DMACCxControl_DI \
00269                                                 | GPDMA_DMACCxControl_I;
00270                 break;
00271         // Memory to peripheral
00272         case GPDMA_TRANSFERTYPE_M2P:
00273                 // Assign physical source
00274                 pDMAch->DMACCSrcAddr = GPDMAChannelConfig->SrcMemAddr;
00275                 // Assign peripheral destination address
00276                 pDMAch->DMACCDestAddr = (uint32_t)GPDMA_LUTPerAddr[GPDMAChannelConfig->DstConn];
00277                 pDMAch->DMACCControl
00278                                 = GPDMA_DMACCxControl_TransferSize((uint32_t)GPDMAChannelConfig->TransferSize) \
00279                                                 | GPDMA_DMACCxControl_SBSize((uint32_t)GPDMA_LUTPerBurst[GPDMAChannelConfig->DstConn]) \
00280                                                 | GPDMA_DMACCxControl_DBSize((uint32_t)GPDMA_LUTPerBurst[GPDMAChannelConfig->DstConn]) \
00281                                                 | GPDMA_DMACCxControl_SWidth((uint32_t)GPDMA_LUTPerWid[GPDMAChannelConfig->DstConn]) \
00282                                                 | GPDMA_DMACCxControl_DWidth((uint32_t)GPDMA_LUTPerWid[GPDMAChannelConfig->DstConn]) \
00283                                                 | GPDMA_DMACCxControl_SI \
00284                                                 | GPDMA_DMACCxControl_I;
00285                 break;
00286         // Peripheral to memory
00287         case GPDMA_TRANSFERTYPE_P2M:
00288                 // Assign peripheral source address
00289                 pDMAch->DMACCSrcAddr = (uint32_t)GPDMA_LUTPerAddr[GPDMAChannelConfig->SrcConn];
00290                 // Assign memory destination address
00291                 pDMAch->DMACCDestAddr = GPDMAChannelConfig->DstMemAddr;
00292                 pDMAch->DMACCControl
00293                                 = GPDMA_DMACCxControl_TransferSize((uint32_t)GPDMAChannelConfig->TransferSize) \
00294                                                 | GPDMA_DMACCxControl_SBSize((uint32_t)GPDMA_LUTPerBurst[GPDMAChannelConfig->SrcConn]) \
00295                                                 | GPDMA_DMACCxControl_DBSize((uint32_t)GPDMA_LUTPerBurst[GPDMAChannelConfig->SrcConn]) \
00296                                                 | GPDMA_DMACCxControl_SWidth((uint32_t)GPDMA_LUTPerWid[GPDMAChannelConfig->SrcConn]) \
00297                                                 | GPDMA_DMACCxControl_DWidth((uint32_t)GPDMA_LUTPerWid[GPDMAChannelConfig->SrcConn]) \
00298                                                 | GPDMA_DMACCxControl_DI \
00299                                                 | GPDMA_DMACCxControl_I;
00300                 break;
00301         // Peripheral to peripheral
00302         case GPDMA_TRANSFERTYPE_P2P:
00303                 // Assign peripheral source address
00304                 pDMAch->DMACCSrcAddr = (uint32_t)GPDMA_LUTPerAddr[GPDMAChannelConfig->SrcConn];
00305                 // Assign peripheral destination address
00306                 pDMAch->DMACCDestAddr = (uint32_t)GPDMA_LUTPerAddr[GPDMAChannelConfig->DstConn];
00307                 pDMAch->DMACCControl
00308                                 = GPDMA_DMACCxControl_TransferSize((uint32_t)GPDMAChannelConfig->TransferSize) \
00309                                                 | GPDMA_DMACCxControl_SBSize((uint32_t)GPDMA_LUTPerBurst[GPDMAChannelConfig->SrcConn]) \
00310                                                 | GPDMA_DMACCxControl_DBSize((uint32_t)GPDMA_LUTPerBurst[GPDMAChannelConfig->DstConn]) \
00311                                                 | GPDMA_DMACCxControl_SWidth((uint32_t)GPDMA_LUTPerWid[GPDMAChannelConfig->SrcConn]) \
00312                                                 | GPDMA_DMACCxControl_DWidth((uint32_t)GPDMA_LUTPerWid[GPDMAChannelConfig->DstConn]) \
00313                                                 | GPDMA_DMACCxControl_I;
00314                 break;
00315         // Do not support any more transfer type, return ERROR
00316         default:
00317                 return ERROR;
00318         }
00319
00320         /* Re-Configure DMA Request Select for source peripheral */
00321         if (GPDMAChannelConfig->SrcConn > 15)
00322         {
00323                 DMAREQSEL |= (1<<(GPDMAChannelConfig->SrcConn - 16));
00324         } else {
00325                 DMAREQSEL &= ~(1<<(GPDMAChannelConfig->SrcConn - 8));
00326         }
00327
00328         /* Re-Configure DMA Request Select for Destination peripheral */
00329         if (GPDMAChannelConfig->DstConn > 15)
00330         {
00331                 DMAREQSEL |= (1<<(GPDMAChannelConfig->DstConn - 16));
00332         } else {
00333                 DMAREQSEL &= ~(1<<(GPDMAChannelConfig->DstConn - 8));
00334         }
00335
00336         /* Enable DMA channels, little endian */
00337         LPC_GPDMA->DMACConfig = GPDMA_DMACConfig_E;
00338         while (!(LPC_GPDMA->DMACConfig & GPDMA_DMACConfig_E));
00339
00340         // Calculate absolute value for Connection number
00341         tmp1 = GPDMAChannelConfig->SrcConn;
00342         tmp1 = ((tmp1 > 15) ? (tmp1 - 8) : tmp1);
00343         tmp2 = GPDMAChannelConfig->DstConn;
00344         tmp2 = ((tmp2 > 15) ? (tmp2 - 8) : tmp2);
00345
00346         // Configure DMA Channel, enable Error Counter and Terminate counter
00347         pDMAch->DMACCConfig = GPDMA_DMACCxConfig_IE | GPDMA_DMACCxConfig_ITC /*| GPDMA_DMACCxConfig_E*/ \
00348                 | GPDMA_DMACCxConfig_TransferType((uint32_t)GPDMAChannelConfig->TransferType) \
00349                 | GPDMA_DMACCxConfig_SrcPeripheral(tmp1) \
00350                 | GPDMA_DMACCxConfig_DestPeripheral(tmp2);
00351
00352         return SUCCESS;
00353 }
00354
00355
00356 /*********************************************************************/
00364 void GPDMA_ChannelCmd(uint8_t channelNum, FunctionalState NewState)
00365 {
00366         LPC_GPDMACH_TypeDef *pDMAch;
00367
00368         // Get Channel pointer
00369         pDMAch = (LPC_GPDMACH_TypeDef *) pGPDMACh[channelNum];
00370
00371         if (NewState == ENABLE) {
00372                 pDMAch->DMACCConfig |= GPDMA_DMACCxConfig_E;
00373         } else {
00374                 pDMAch->DMACCConfig &= ~GPDMA_DMACCxConfig_E;
00375         }
00376 }
00377 /*********************************************************************/
00393 IntStatus GPDMA_IntGetStatus(GPDMA_Status_Type type, uint8_t channel)
00394 {
00395         CHECK_PARAM(PARAM_GPDMA_STAT(type));
00396         CHECK_PARAM(PARAM_GPDMA_CHANNEL(channel));
00397
00398         switch (type)
00399         {
00400         case GPDMA_STAT_INT: //check status of DMA channel interrupts
00401                 if (LPC_GPDMA->DMACIntStat & (GPDMA_DMACIntStat_Ch(channel)))
00402                         return SET;
00403                 return RESET;
00404         case GPDMA_STAT_INTTC: // check terminal count interrupt request status for DMA
00405                 if (LPC_GPDMA->DMACIntTCStat & GPDMA_DMACIntTCStat_Ch(channel))
00406                         return SET;
00407                 return RESET;
00408         case GPDMA_STAT_INTERR: //check interrupt status for DMA channels
00409                 if (LPC_GPDMA->DMACIntErrStat & GPDMA_DMACIntTCClear_Ch(channel))
00410                         return SET;
00411                 return RESET;
00412         case GPDMA_STAT_RAWINTTC: //check status of the terminal count interrupt for DMA channels
00413                 if (LPC_GPDMA->DMACRawIntErrStat & GPDMA_DMACRawIntTCStat_Ch(channel))
00414                         return SET;
00415                 return RESET;
00416         case GPDMA_STAT_RAWINTERR: //check status of the error interrupt for DMA channels
00417                 if (LPC_GPDMA->DMACRawIntTCStat & GPDMA_DMACRawIntErrStat_Ch(channel))
00418                         return SET;
00419                 return RESET;
00420         default: //check enable status for DMA channels
00421                 if (LPC_GPDMA->DMACEnbldChns & GPDMA_DMACEnbldChns_Ch(channel))
00422                         return SET;
00423                 return RESET;
00424         }
00425 }
00426
00427 /*********************************************************************/
00435 void GPDMA_ClearIntPending(GPDMA_StateClear_Type type, uint8_t channel)
00436 {
00437         CHECK_PARAM(PARAM_GPDMA_STATCLR(type));
00438         CHECK_PARAM(PARAM_GPDMA_CHANNEL(channel));
00439
00440         if (type == GPDMA_STATCLR_INTTC) // clears the terminal count interrupt request on DMA channel
00441                 LPC_GPDMA->DMACIntTCClear = GPDMA_DMACIntTCClear_Ch(channel);
00442         else // clear the error interrupt request
00443                 LPC_GPDMA->DMACIntErrClr = GPDMA_DMACIntErrClr_Ch(channel);
00444 }
00445
00450 #endif /* _GPDMA */
00451
00456 /* --------------------------------- End Of File ------------------------------ */
00457
Generated on Tue Jun 7 14:58:56 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_gpdma.h Source File

C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_gpdma.h

Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          lpc17xx_gpdma.h                         2010-05-21
00003 */
00027 /* Peripheral group ----------------------------------------------------------- */
00033 #ifndef LPC17XX_GPDMA_H_
00034 #define LPC17XX_GPDMA_H_
00035
00036 /* Includes ------------------------------------------------------------------- */
00037 #include "LPC17xx.h"
00038 #include "lpc_types.h"
00039
00040
00041 #ifdef __cplusplus
00042 extern "C"
00043 {
00044 #endif
00045
00046 /* Public Macros -------------------------------------------------------------- */
00052 #define GPDMA_CONN_SSP0_Tx                      ((0UL))
00053 #define GPDMA_CONN_SSP0_Rx                      ((1UL))
00054 #define GPDMA_CONN_SSP1_Tx                      ((2UL))
00055 #define GPDMA_CONN_SSP1_Rx                      ((3UL))
00056 #define GPDMA_CONN_ADC                          ((4UL))
00057 #define GPDMA_CONN_I2S_Channel_0        ((5UL))
00058 #define GPDMA_CONN_I2S_Channel_1        ((6UL))
00059 #define GPDMA_CONN_DAC                          ((7UL))
00060 #define GPDMA_CONN_UART0_Tx                     ((8UL))
00061 #define GPDMA_CONN_UART0_Rx                     ((9UL))
00062 #define GPDMA_CONN_UART1_Tx                     ((10UL))
00063 #define GPDMA_CONN_UART1_Rx                     ((11UL))
00064 #define GPDMA_CONN_UART2_Tx                     ((12UL))
00065 #define GPDMA_CONN_UART2_Rx                     ((13UL))
00066 #define GPDMA_CONN_UART3_Tx                     ((14UL))
00067 #define GPDMA_CONN_UART3_Rx                     ((15UL))
00068 #define GPDMA_CONN_MAT0_0                       ((16UL))
00069 #define GPDMA_CONN_MAT0_1                       ((17UL))
00070 #define GPDMA_CONN_MAT1_0                       ((18UL))
00071 #define GPDMA_CONN_MAT1_1               ((19UL))
00072 #define GPDMA_CONN_MAT2_0               ((20UL))
00073 #define GPDMA_CONN_MAT2_1               ((21UL))
00074 #define GPDMA_CONN_MAT3_0                       ((22UL))
00075 #define GPDMA_CONN_MAT3_1               ((23UL))
00078 #define GPDMA_TRANSFERTYPE_M2M          ((0UL))
00079 #define GPDMA_TRANSFERTYPE_M2P          ((1UL))
00080 #define GPDMA_TRANSFERTYPE_P2M          ((2UL))
00081 #define GPDMA_TRANSFERTYPE_P2P          ((3UL))
00084 #define GPDMA_BSIZE_1   ((0UL))
00085 #define GPDMA_BSIZE_4   ((1UL))
00086 #define GPDMA_BSIZE_8   ((2UL))
00087 #define GPDMA_BSIZE_16  ((3UL))
00088 #define GPDMA_BSIZE_32  ((4UL))
00089 #define GPDMA_BSIZE_64  ((5UL))
00090 #define GPDMA_BSIZE_128 ((6UL))
00091 #define GPDMA_BSIZE_256 ((7UL))
00094 #define GPDMA_WIDTH_BYTE                ((0UL))
00095 #define GPDMA_WIDTH_HALFWORD    ((1UL))
00096 #define GPDMA_WIDTH_WORD                ((2UL))
00099 #define GPDMA_REQSEL_UART       ((0UL))
00100 #define GPDMA_REQSEL_TIMER      ((1UL))
00107 /* Private Macros ------------------------------------------------------------- */
00108
00112 /* --------------------- BIT DEFINITIONS -------------------------------------- */
00113 /*********************************************************************/
00116 #define GPDMA_DMACIntStat_Ch(n)                 (((1UL<<n)&0xFF))
00117 #define GPDMA_DMACIntStat_BITMASK               ((0xFF))
00118
00119 /*********************************************************************/
00122 #define GPDMA_DMACIntTCStat_Ch(n)               (((1UL<<n)&0xFF))
00123 #define GPDMA_DMACIntTCStat_BITMASK             ((0xFF))
00124
00125 /*********************************************************************/
00128 #define GPDMA_DMACIntTCClear_Ch(n)              (((1UL<<n)&0xFF))
00129 #define GPDMA_DMACIntTCClear_BITMASK    ((0xFF))
00130
00131 /*********************************************************************/
00134 #define GPDMA_DMACIntErrStat_Ch(n)              (((1UL<<n)&0xFF))
00135 #define GPDMA_DMACIntErrStat_BITMASK    ((0xFF))
00136
00137 /*********************************************************************/
00140 #define GPDMA_DMACIntErrClr_Ch(n)               (((1UL<<n)&0xFF))
00141 #define GPDMA_DMACIntErrClr_BITMASK             ((0xFF))
00142
00143 /*********************************************************************/
00146 #define GPDMA_DMACRawIntTCStat_Ch(n)    (((1UL<<n)&0xFF))
00147 #define GPDMA_DMACRawIntTCStat_BITMASK  ((0xFF))
00148
00149 /*********************************************************************/
00152 #define GPDMA_DMACRawIntErrStat_Ch(n)   (((1UL<<n)&0xFF))
00153 #define GPDMA_DMACRawIntErrStat_BITMASK ((0xFF))
00154
00155 /*********************************************************************/
00158 #define GPDMA_DMACEnbldChns_Ch(n)               (((1UL<<n)&0xFF))
00159 #define GPDMA_DMACEnbldChns_BITMASK             ((0xFF))
00160
00161 /*********************************************************************/
00164 #define GPDMA_DMACSoftBReq_Src(n)               (((1UL<<n)&0xFFFF))
00165 #define GPDMA_DMACSoftBReq_BITMASK              ((0xFFFF))
00166
00167 /*********************************************************************/
00170 #define GPDMA_DMACSoftSReq_Src(n)               (((1UL<<n)&0xFFFF))
00171 #define GPDMA_DMACSoftSReq_BITMASK              ((0xFFFF))
00172
00173 /*********************************************************************/
00176 #define GPDMA_DMACSoftLBReq_Src(n)              (((1UL<<n)&0xFFFF))
00177 #define GPDMA_DMACSoftLBReq_BITMASK             ((0xFFFF))
00178
00179 /*********************************************************************/
00182 #define GPDMA_DMACSoftLSReq_Src(n)              (((1UL<<n)&0xFFFF))
00183 #define GPDMA_DMACSoftLSReq_BITMASK             ((0xFFFF))
00184
00185 /*********************************************************************/
00188 #define GPDMA_DMACConfig_E                              ((0x01))
00189 #define GPDMA_DMACConfig_M                              ((0x02))
00190 #define GPDMA_DMACConfig_BITMASK                ((0x03))
00191
00192 /*********************************************************************/
00195 #define GPDMA_DMACSync_Src(n)                   (((1UL<<n)&0xFFFF))
00196 #define GPDMA_DMACSync_BITMASK                  ((0xFFFF))
00197
00198 /*********************************************************************/
00201 #define GPDMA_DMAReqSel_Input(n)                (((1UL<<(n-8))&0xFF))
00202 #define GPDMA_DMAReqSel_BITMASK                 ((0xFF))
00203
00204 /*********************************************************************/
00208 #define GPDMA_DMACCxLLI_BITMASK                 ((0xFFFFFFFC))
00209
00210 /*********************************************************************/
00213 #define GPDMA_DMACCxControl_TransferSize(n) (((n&0xFFF)<<0))
00214 #define GPDMA_DMACCxControl_SBSize(n)           (((n&0x07)<<12))
00215 #define GPDMA_DMACCxControl_DBSize(n)           (((n&0x07)<<15))
00216 #define GPDMA_DMACCxControl_SWidth(n)           (((n&0x07)<<18))
00217 #define GPDMA_DMACCxControl_DWidth(n)           (((n&0x07)<<21))
00218 #define GPDMA_DMACCxControl_SI                          ((1UL<<26))
00219 #define GPDMA_DMACCxControl_DI                          ((1UL<<27))
00220 #define GPDMA_DMACCxControl_Prot1                       ((1UL<<28))
00221 #define GPDMA_DMACCxControl_Prot2                       ((1UL<<29))
00222 #define GPDMA_DMACCxControl_Prot3                       ((1UL<<30))
00223 #define GPDMA_DMACCxControl_I                           ((1UL<<31))
00225 #define GPDMA_DMACCxControl_BITMASK                     ((0xFCFFFFFF))
00226
00227 /*********************************************************************/
00230 #define GPDMA_DMACCxConfig_E                                    ((1UL<<0))
00231 #define GPDMA_DMACCxConfig_SrcPeripheral(n)     (((n&0x1F)<<1))
00232 #define GPDMA_DMACCxConfig_DestPeripheral(n)    (((n&0x1F)<<6))
00233 #define GPDMA_DMACCxConfig_TransferType(n)              (((n&0x7)<<11))
00234 #define GPDMA_DMACCxConfig_IE                                   ((1UL<<14))
00235 #define GPDMA_DMACCxConfig_ITC                                  ((1UL<<15))
00236 #define GPDMA_DMACCxConfig_L                                    ((1UL<<16))
00237 #define GPDMA_DMACCxConfig_A                                    ((1UL<<17))
00238 #define GPDMA_DMACCxConfig_H                                    ((1UL<<18))
00240 #define GPDMA_DMACCxConfig_BITMASK                              ((0x7FFFF))
00241
00242 /* ---------------- CHECK PARAMETER DEFINITIONS ---------------------------- */
00243 /* Macros check GPDMA channel */
00244 #define PARAM_GPDMA_CHANNEL(n)  ((n>=0) && (n<=7))
00245
00246 /* Macros check GPDMA connection type */
00247 #define PARAM_GPDMA_CONN(n)             ((n==GPDMA_CONN_SSP0_Tx) || (n==GPDMA_CONN_SSP0_Rx) \
00248 || (n==GPDMA_CONN_SSP1_Tx) || (n==GPDMA_CONN_SSP1_Rx) \
00249 || (n==GPDMA_CONN_ADC) || (n==GPDMA_CONN_I2S_Channel_0) \
00250 || (n==GPDMA_CONN_I2S_Channel_1) || (n==GPDMA_CONN_DAC) \
00251 || (n==GPDMA_CONN_UART0_Tx) || (n==GPDMA_CONN_UART0_Rx) \
00252 || (n==GPDMA_CONN_UART1_Tx) || (n==GPDMA_CONN_UART1_Rx) \
00253 || (n==GPDMA_CONN_UART2_Tx) || (n==GPDMA_CONN_UART2_Rx) \
00254 || (n==GPDMA_CONN_UART3_Tx) || (n==GPDMA_CONN_UART3_Rx) \
00255 || (n==GPDMA_CONN_MAT0_0) || (n==GPDMA_CONN_MAT0_1) \
00256 || (n==GPDMA_CONN_MAT1_0) || (n==GPDMA_CONN_MAT1_1) \
00257 || (n==GPDMA_CONN_MAT2_0) || (n==GPDMA_CONN_MAT2_1) \
00258 || (n==GPDMA_CONN_MAT3_0) || (n==GPDMA_CONN_MAT3_1))
00259
00260 /* Macros check GPDMA burst size type */
00261 #define PARAM_GPDMA_BSIZE(n)    ((n==GPDMA_BSIZE_1) || (n==GPDMA_BSIZE_4) \
00262 || (n==GPDMA_BSIZE_8) || (n==GPDMA_BSIZE_16) \
00263 || (n==GPDMA_BSIZE_32) || (n==GPDMA_BSIZE_64) \
00264 || (n==GPDMA_BSIZE_128) || (n==GPDMA_BSIZE_256))
00265
00266 /* Macros check GPDMA width type */
00267 #define PARAM_GPDMA_WIDTH(n) ((n==GPDMA_WIDTH_BYTE) || (n==GPDMA_WIDTH_HALFWORD) \
00268 || (n==GPDMA_WIDTH_WORD))
00269
00270 /* Macros check GPDMA status type */
00271 #define PARAM_GPDMA_STAT(n)     ((n==GPDMA_STAT_INT) || (n==GPDMA_STAT_INTTC) \
00272 || (n==GPDMA_STAT_INTERR) || (n==GPDMA_STAT_RAWINTTC) \
00273 || (n==GPDMA_STAT_RAWINTERR) || (n==GPDMA_STAT_ENABLED_CH))
00274
00275 /* Macros check GPDMA transfer type */
00276 #define PARAM_GPDMA_TRANSFERTYPE(n) ((n==GPDMA_TRANSFERTYPE_M2M)||(n==GPDMA_TRANSFERTYPE_M2P) \
00277 ||(n==GPDMA_TRANSFERTYPE_P2M)||(n==GPDMA_TRANSFERTYPE_P2P))
00278
00279 /* Macros check GPDMA state clear type */
00280 #define PARAM_GPDMA_STATCLR(n)  ((n==GPDMA_STATCLR_INTTC) || (n==GPDMA_STATCLR_INTERR))
00281
00282 /* Macros check GPDMA request select type */
00283 #define PARAM_GPDMA_REQSEL(n)   ((n==GPDMA_REQSEL_UART) || (n==GPDMA_REQSEL_TIMER))
00284
00289 /* Public Types --------------------------------------------------------------- */
00297 typedef enum {
00298         GPDMA_STAT_INT,
00299         GPDMA_STAT_INTTC,
00300         GPDMA_STAT_INTERR,
00301         GPDMA_STAT_RAWINTTC,
00302         GPDMA_STAT_RAWINTERR,
00303         GPDMA_STAT_ENABLED_CH
00304 } GPDMA_Status_Type;
00305
00309 typedef enum{
00310         GPDMA_STATCLR_INTTC,
00311         GPDMA_STATCLR_INTERR
00312 }GPDMA_StateClear_Type;
00313
00317 typedef struct {
00318         uint32_t ChannelNum;
00323         uint32_t TransferSize;
00324         uint32_t TransferWidth;
00325         uint32_t SrcMemAddr;
00327         uint32_t DstMemAddr;
00329         uint32_t TransferType;
00335         uint32_t SrcConn;
00355         uint32_t DstConn;
00375         uint32_t DMALLI;
00378 } GPDMA_Channel_CFG_Type;
00379
00383 typedef struct {
00384         uint32_t SrcAddr;
00385         uint32_t DstAddr;
00386         uint32_t NextLLI;
00387         uint32_t Control;
00388 } GPDMA_LLI_Type;
00389
00390
00395 /* Public Functions ----------------------------------------------------------- */
00400 void GPDMA_Init(void);
00401 //Status GPDMA_Setup(GPDMA_Channel_CFG_Type *GPDMAChannelConfig, fnGPDMACbs_Type *pfnGPDMACbs);
00402 Status GPDMA_Setup(GPDMA_Channel_CFG_Type *GPDMAChannelConfig);
00403 IntStatus GPDMA_IntGetStatus(GPDMA_Status_Type type, uint8_t channel);
00404 void GPDMA_ClearIntPending(GPDMA_StateClear_Type type, uint8_t channel);
00405 void GPDMA_ChannelCmd(uint8_t channelNum, FunctionalState NewState);
00406 //void GPDMA_IntHandler(void);
00407
00413 #ifdef __cplusplus
00414 }
00415 #endif
00416
00417 #endif /* LPC17XX_GPDMA_H_ */
00418
00423 /* --------------------------------- End Of File ------------------------------ */
Generated on Tue Jun 7 14:58:55 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Drivers/source/lpc17xx_gpio.c Source File

C:/nxpdrv/LPC1700CMSIS/Drivers/source/lpc17xx_gpio.c

Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          lpc17xx_gpio.c                          2010-05-21
00003 */
00027 /* Peripheral group ----------------------------------------------------------- */
00032 /* Includes ------------------------------------------------------------------- */
00033 #include "lpc17xx_gpio.h"
00034
00035 /* If this source file built with example, the LPC17xx FW library configuration
00036  * file in each example directory ("lpc17xx_libcfg.h") must be included,
00037  * otherwise the default FW library configuration file must be included instead
00038  */
00039 #ifdef __BUILD_WITH_EXAMPLE__
00040 #include "lpc17xx_libcfg.h"
00041 #else
00042 #include "lpc17xx_libcfg_default.h"
00043 #endif /* __BUILD_WITH_EXAMPLE__ */
00044
00045
00046 #ifdef _GPIO
00047
00048 /* Private Functions ---------------------------------------------------------- */
00049
00050 static LPC_GPIO_TypeDef *GPIO_GetPointer(uint8_t portNum);
00051 static GPIO_HalfWord_TypeDef *FIO_HalfWordGetPointer(uint8_t portNum);
00052 static GPIO_Byte_TypeDef *FIO_ByteGetPointer(uint8_t portNum);
00053
00054 /*********************************************************************/
00059 static LPC_GPIO_TypeDef *GPIO_GetPointer(uint8_t portNum)
00060 {
00061         LPC_GPIO_TypeDef *pGPIO = NULL;
00062
00063         switch (portNum) {
00064         case 0:
00065                 pGPIO = LPC_GPIO0;
00066                 break;
00067         case 1:
00068                 pGPIO = LPC_GPIO1;
00069                 break;
00070         case 2:
00071                 pGPIO = LPC_GPIO2;
00072                 break;
00073         case 3:
00074                 pGPIO = LPC_GPIO3;
00075                 break;
00076         case 4:
00077                 pGPIO = LPC_GPIO4;
00078                 break;
00079         default:
00080                 break;
00081         }
00082
00083         return pGPIO;
00084 }
00085
00086 /*********************************************************************/
00092 static GPIO_HalfWord_TypeDef *FIO_HalfWordGetPointer(uint8_t portNum)
00093 {
00094         GPIO_HalfWord_TypeDef *pFIO = NULL;
00095
00096         switch (portNum) {
00097         case 0:
00098                 pFIO = GPIO0_HalfWord;
00099                 break;
00100         case 1:
00101                 pFIO = GPIO1_HalfWord;
00102                 break;
00103         case 2:
00104                 pFIO = GPIO2_HalfWord;
00105                 break;
00106         case 3:
00107                 pFIO = GPIO3_HalfWord;
00108                 break;
00109         case 4:
00110                 pFIO = GPIO4_HalfWord;
00111                 break;
00112         default:
00113                 break;
00114         }
00115
00116         return pFIO;
00117 }
00118
00119 /*********************************************************************/
00125 static GPIO_Byte_TypeDef *FIO_ByteGetPointer(uint8_t portNum)
00126 {
00127         GPIO_Byte_TypeDef *pFIO = NULL;
00128
00129         switch (portNum) {
00130         case 0:
00131                 pFIO = GPIO0_Byte;
00132                 break;
00133         case 1:
00134                 pFIO = GPIO1_Byte;
00135                 break;
00136         case 2:
00137                 pFIO = GPIO2_Byte;
00138                 break;
00139         case 3:
00140                 pFIO = GPIO3_Byte;
00141                 break;
00142         case 4:
00143                 pFIO = GPIO4_Byte;
00144                 break;
00145         default:
00146                 break;
00147         }
00148
00149         return pFIO;
00150 }
00151
00152 /* End of Private Functions --------------------------------------------------- */
00153
00154
00155 /* Public Functions ----------------------------------------------------------- */
00161 /* GPIO ------------------------------------------------------------------------------ */
00162
00163 /*********************************************************************/
00177 void GPIO_SetDir(uint8_t portNum, uint32_t bitValue, uint8_t dir)
00178 {
00179         LPC_GPIO_TypeDef *pGPIO = GPIO_GetPointer(portNum);
00180
00181         if (pGPIO != NULL) {
00182                 // Enable Output
00183                 if (dir) {
00184                         pGPIO->FIODIR |= bitValue;
00185                 }
00186                 // Enable Input
00187                 else {
00188                         pGPIO->FIODIR &= ~bitValue;
00189                 }
00190         }
00191 }
00192
00193
00194 /*********************************************************************/
00208 void GPIO_SetValue(uint8_t portNum, uint32_t bitValue)
00209 {
00210         LPC_GPIO_TypeDef *pGPIO = GPIO_GetPointer(portNum);
00211
00212         if (pGPIO != NULL) {
00213                 pGPIO->FIOSET = bitValue;
00214         }
00215 }
00216
00217 /*********************************************************************/
00231 void GPIO_ClearValue(uint8_t portNum, uint32_t bitValue)
00232 {
00233         LPC_GPIO_TypeDef *pGPIO = GPIO_GetPointer(portNum);
00234
00235         if (pGPIO != NULL) {
00236                 pGPIO->FIOCLR = bitValue;
00237         }
00238 }
00239
00240 /*********************************************************************/
00248 uint32_t GPIO_ReadValue(uint8_t portNum)
00249 {
00250         LPC_GPIO_TypeDef *pGPIO = GPIO_GetPointer(portNum);
00251
00252         if (pGPIO != NULL) {
00253                 return pGPIO->FIOPIN;
00254         }
00255
00256         return (0);
00257 }
00258
00259 /*********************************************************************/
00269 void GPIO_IntCmd(uint8_t portNum, uint32_t bitValue, uint8_t edgeState)
00270 {
00271         if((portNum == 0)&&(edgeState == 0))
00272                 LPC_GPIOINT->IO0IntEnR = bitValue;
00273         else if ((portNum == 2)&&(edgeState == 0))
00274                 LPC_GPIOINT->IO2IntEnR = bitValue;
00275         else if ((portNum == 0)&&(edgeState == 1))
00276                 LPC_GPIOINT->IO0IntEnF = bitValue;
00277         else if ((portNum == 2)&&(edgeState == 1))
00278                 LPC_GPIOINT->IO2IntEnF = bitValue;
00279         else
00280                 //Error
00281                 while(1);
00282 }
00283
00284 /*********************************************************************/
00297 FunctionalState GPIO_GetIntStatus(uint8_t portNum, uint32_t pinNum, uint8_t edgeState)
00298 {
00299         if((portNum == 0) && (edgeState == 0))//Rising Edge
00300                 return ((FunctionalState)(((LPC_GPIOINT->IO0IntStatR)>>pinNum)& 0x1));
00301         else if ((portNum == 2) && (edgeState == 0))
00302                 return ((FunctionalState)(((LPC_GPIOINT->IO2IntStatR)>>pinNum)& 0x1));
00303         else if ((portNum == 0) && (edgeState == 1))//Falling Edge
00304                 return ((FunctionalState)(((LPC_GPIOINT->IO0IntStatF)>>pinNum)& 0x1));
00305         else if ((portNum == 2) && (edgeState == 1))
00306                 return ((FunctionalState)(((LPC_GPIOINT->IO2IntStatF)>>pinNum)& 0x1));
00307         else
00308                 //Error
00309                 while(1);
00310 }
00311 /*********************************************************************/
00318 void GPIO_ClearInt(uint8_t portNum, uint32_t bitValue)
00319 {
00320         if(portNum == 0)
00321                 LPC_GPIOINT->IO0IntClr = bitValue;
00322         else if (portNum == 2)
00323                 LPC_GPIOINT->IO2IntClr = bitValue;
00324         else
00325                 //Invalid portNum
00326                 while(1);
00327 }
00328
00329 /* FIO word accessible ----------------------------------------------------------------- */
00330 /* Stub function for FIO (word-accessible) style */
00331
00335 void FIO_SetDir(uint8_t portNum, uint32_t bitValue, uint8_t dir)
00336 {
00337         GPIO_SetDir(portNum, bitValue, dir);
00338 }
00339
00343 void FIO_SetValue(uint8_t portNum, uint32_t bitValue)
00344 {
00345         GPIO_SetValue(portNum, bitValue);
00346 }
00347
00351 void FIO_ClearValue(uint8_t portNum, uint32_t bitValue)
00352 {
00353         GPIO_ClearValue(portNum, bitValue);
00354 }
00355
00359 uint32_t FIO_ReadValue(uint8_t portNum)
00360 {
00361         return (GPIO_ReadValue(portNum));
00362 }
00363
00367 void FIO_IntCmd(uint8_t portNum, uint32_t bitValue, uint8_t edgeState)
00368 {
00369         GPIO_IntCmd(portNum, bitValue, edgeState);
00370 }
00371
00375 FunctionalState FIO_GetIntStatus(uint8_t portNum, uint32_t pinNum, uint8_t edgeState)
00376 {
00377         return (GPIO_GetIntStatus(portNum, pinNum, edgeState));
00378 }
00379
00383 void FIO_ClearInt(uint8_t portNum, uint32_t bitValue)
00384 {
00385         GPIO_ClearInt(portNum, bitValue);
00386 }
00387 /*********************************************************************/
00405 void FIO_SetMask(uint8_t portNum, uint32_t bitValue, uint8_t maskValue)
00406 {
00407         LPC_GPIO_TypeDef *pFIO = GPIO_GetPointer(portNum);
00408         if(pFIO != NULL) {
00409                 // Mask
00410                 if (maskValue){
00411                         pFIO->FIOMASK |= bitValue;
00412                 }
00413                 // Un-mask
00414                 else {
00415                         pFIO->FIOMASK &= ~bitValue;
00416                 }
00417         }
00418 }
00419
00420
00421 /* FIO halfword accessible ------------------------------------------------------------- */
00422
00423 /*********************************************************************/
00437 void FIO_HalfWordSetDir(uint8_t portNum, uint8_t halfwordNum, uint16_t bitValue, uint8_t dir)
00438 {
00439         GPIO_HalfWord_TypeDef *pFIO = FIO_HalfWordGetPointer(portNum);
00440         if(pFIO != NULL) {
00441                 // Output direction
00442                 if (dir) {
00443                         // Upper
00444                         if(halfwordNum) {
00445                                 pFIO->FIODIRU |= bitValue;
00446                         }
00447                         // lower
00448                         else {
00449                                 pFIO->FIODIRL |= bitValue;
00450                         }
00451                 }
00452                 // Input direction
00453                 else {
00454                         // Upper
00455                         if(halfwordNum) {
00456                                 pFIO->FIODIRU &= ~bitValue;
00457                         }
00458                         // lower
00459                         else {
00460                                 pFIO->FIODIRL &= ~bitValue;
00461                         }
00462                 }
00463         }
00464 }
00465
00466
00467 /*********************************************************************/
00486 void FIO_HalfWordSetMask(uint8_t portNum, uint8_t halfwordNum, uint16_t bitValue, uint8_t maskValue)
00487 {
00488         GPIO_HalfWord_TypeDef *pFIO = FIO_HalfWordGetPointer(portNum);
00489         if(pFIO != NULL) {
00490                 // Mask
00491                 if (maskValue){
00492                         // Upper
00493                         if(halfwordNum) {
00494                                 pFIO->FIOMASKU |= bitValue;
00495                         }
00496                         // lower
00497                         else {
00498                                 pFIO->FIOMASKL |= bitValue;
00499                         }
00500                 }
00501                 // Un-mask
00502                 else {
00503                         // Upper
00504                         if(halfwordNum) {
00505                                 pFIO->FIOMASKU &= ~bitValue;
00506                         }
00507                         // lower
00508                         else {
00509                                 pFIO->FIOMASKL &= ~bitValue;
00510                         }
00511                 }
00512         }
00513 }
00514
00515
00516 /*********************************************************************/
00530 void FIO_HalfWordSetValue(uint8_t portNum, uint8_t halfwordNum, uint16_t bitValue)
00531 {
00532         GPIO_HalfWord_TypeDef *pFIO = FIO_HalfWordGetPointer(portNum);
00533         if(pFIO != NULL) {
00534                 // Upper
00535                 if(halfwordNum) {
00536                         pFIO->FIOSETU = bitValue;
00537                 }
00538                 // lower
00539                 else {
00540                         pFIO->FIOSETL = bitValue;
00541                 }
00542         }
00543 }
00544
00545
00546 /*********************************************************************/
00560 void FIO_HalfWordClearValue(uint8_t portNum, uint8_t halfwordNum, uint16_t bitValue)
00561 {
00562         GPIO_HalfWord_TypeDef *pFIO = FIO_HalfWordGetPointer(portNum);
00563         if(pFIO != NULL) {
00564                 // Upper
00565                 if(halfwordNum) {
00566                         pFIO->FIOCLRU = bitValue;
00567                 }
00568                 // lower
00569                 else {
00570                         pFIO->FIOCLRL = bitValue;
00571                 }
00572         }
00573 }
00574
00575
00576 /*********************************************************************/
00585 uint16_t FIO_HalfWordReadValue(uint8_t portNum, uint8_t halfwordNum)
00586 {
00587         GPIO_HalfWord_TypeDef *pFIO = FIO_HalfWordGetPointer(portNum);
00588         if(pFIO != NULL) {
00589                 // Upper
00590                 if(halfwordNum) {
00591                         return (pFIO->FIOPINU);
00592                 }
00593                 // lower
00594                 else {
00595                         return (pFIO->FIOPINL);
00596                 }
00597         }
00598         return (0);
00599 }
00600
00601
00602 /* FIO Byte accessible ------------------------------------------------------------ */
00603
00604 /*********************************************************************/
00618 void FIO_ByteSetDir(uint8_t portNum, uint8_t byteNum, uint8_t bitValue, uint8_t dir)
00619 {
00620         GPIO_Byte_TypeDef *pFIO = FIO_ByteGetPointer(portNum);
00621         if(pFIO != NULL) {
00622                 // Output direction
00623                 if (dir) {
00624                         if (byteNum <= 3) {
00625                                 pFIO->FIODIR[byteNum] |= bitValue;
00626                         }
00627                 }
00628                 // Input direction
00629                 else {
00630                         if (byteNum <= 3) {
00631                                 pFIO->FIODIR[byteNum] &= ~bitValue;
00632                         }
00633                 }
00634         }
00635 }
00636
00637 /*********************************************************************/
00656 void FIO_ByteSetMask(uint8_t portNum, uint8_t byteNum, uint8_t bitValue, uint8_t maskValue)
00657 {
00658         GPIO_Byte_TypeDef *pFIO = FIO_ByteGetPointer(portNum);
00659         if(pFIO != NULL) {
00660                 // Mask
00661                 if (maskValue) {
00662                         if (byteNum <= 3) {
00663                                 pFIO->FIOMASK[byteNum] |= bitValue;
00664                         }
00665                 }
00666                 // Un-mask
00667                 else {
00668                         if (byteNum <= 3) {
00669                                 pFIO->FIOMASK[byteNum] &= ~bitValue;
00670                         }
00671                 }
00672         }
00673 }
00674
00675
00676 /*********************************************************************/
00690 void FIO_ByteSetValue(uint8_t portNum, uint8_t byteNum, uint8_t bitValue)
00691 {
00692         GPIO_Byte_TypeDef *pFIO = FIO_ByteGetPointer(portNum);
00693         if (pFIO != NULL) {
00694                 if (byteNum <= 3){
00695                         pFIO->FIOSET[byteNum] = bitValue;
00696                 }
00697         }
00698 }
00699
00700
00701 /*********************************************************************/
00715 void FIO_ByteClearValue(uint8_t portNum, uint8_t byteNum, uint8_t bitValue)
00716 {
00717         GPIO_Byte_TypeDef *pFIO = FIO_ByteGetPointer(portNum);
00718         if (pFIO != NULL) {
00719                 if (byteNum <= 3){
00720                         pFIO->FIOCLR[byteNum] = bitValue;
00721                 }
00722         }
00723 }
00724
00725
00726 /*********************************************************************/
00735 uint8_t FIO_ByteReadValue(uint8_t portNum, uint8_t byteNum)
00736 {
00737         GPIO_Byte_TypeDef *pFIO = FIO_ByteGetPointer(portNum);
00738         if (pFIO != NULL) {
00739                 if (byteNum <= 3){
00740                         return (pFIO->FIOPIN[byteNum]);
00741                 }
00742         }
00743         return (0);
00744 }
00745
00750 #endif /* _GPIO */
00751
00756 /* --------------------------------- End Of File ------------------------------ */
Generated on Tue Jun 7 14:58:56 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_gpio.h Source File

C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_gpio.h

Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          lpc17xx_gpio.h                          2010-06-18
00003 */
00027 /* Peripheral group ----------------------------------------------------------- */
00033 #ifndef LPC17XX_GPIO_H_
00034 #define LPC17XX_GPIO_H_
00035
00036 /* Includes ------------------------------------------------------------------- */
00037 #include "LPC17xx.h"
00038 #include "lpc_types.h"
00039
00040
00041 #ifdef __cplusplus
00042 extern "C"
00043 {
00044 #endif
00045
00046 /* Public Macros -------------------------------------------------------------- */
00052 #define GPIO0_Byte      ((GPIO_Byte_TypeDef *)(LPC_GPIO0_BASE))
00053
00054 #define GPIO1_Byte      ((GPIO_Byte_TypeDef *)(LPC_GPIO1_BASE))
00055
00056 #define GPIO2_Byte      ((GPIO_Byte_TypeDef *)(LPC_GPIO2_BASE))
00057
00058 #define GPIO3_Byte      ((GPIO_Byte_TypeDef *)(LPC_GPIO3_BASE))
00059
00060 #define GPIO4_Byte      ((GPIO_Byte_TypeDef *)(LPC_GPIO4_BASE))
00061
00062
00064 #define GPIO0_HalfWord  ((GPIO_HalfWord_TypeDef *)(LPC_GPIO0_BASE))
00065
00066 #define GPIO1_HalfWord  ((GPIO_HalfWord_TypeDef *)(LPC_GPIO1_BASE))
00067
00068 #define GPIO2_HalfWord  ((GPIO_HalfWord_TypeDef *)(LPC_GPIO2_BASE))
00069
00070 #define GPIO3_HalfWord  ((GPIO_HalfWord_TypeDef *)(LPC_GPIO3_BASE))
00071
00072 #define GPIO4_HalfWord  ((GPIO_HalfWord_TypeDef *)(LPC_GPIO4_BASE))
00073
00078 /* Public Types --------------------------------------------------------------- */
00086 typedef struct {
00087         __IO uint8_t FIODIR[4];
00088            uint32_t RESERVED0[3];
00089         __IO uint8_t FIOMASK[4];
00090         __IO uint8_t FIOPIN[4];
00091         __IO uint8_t FIOSET[4];
00092         __O  uint8_t FIOCLR[4];
00093 } GPIO_Byte_TypeDef;
00094
00095
00099 typedef struct {
00100         __IO uint16_t FIODIRL;
00101         __IO uint16_t FIODIRU;
00102            uint32_t RESERVED0[3];
00103         __IO uint16_t FIOMASKL;
00104         __IO uint16_t FIOMASKU;
00105         __IO uint16_t FIOPINL;
00106         __IO uint16_t FIOPINU;
00107         __IO uint16_t FIOSETL;
00108         __IO uint16_t FIOSETU;
00109         __O  uint16_t FIOCLRL;
00110         __O  uint16_t FIOCLRU;
00111 } GPIO_HalfWord_TypeDef;
00112
00118 /* Public Functions ----------------------------------------------------------- */
00123 /* GPIO style ------------------------------- */
00124 void GPIO_SetDir(uint8_t portNum, uint32_t bitValue, uint8_t dir);
00125 void GPIO_SetValue(uint8_t portNum, uint32_t bitValue);
00126 void GPIO_ClearValue(uint8_t portNum, uint32_t bitValue);
00127 uint32_t GPIO_ReadValue(uint8_t portNum);
00128 void GPIO_IntCmd(uint8_t portNum, uint32_t bitValue, uint8_t edgeState);
00129 FunctionalState GPIO_GetIntStatus(uint8_t portNum, uint32_t pinNum, uint8_t edgeState);
00130 void GPIO_ClearInt(uint8_t portNum, uint32_t bitValue);
00131
00132 /* FIO (word-accessible) style ------------------------------- */
00133 void FIO_SetDir(uint8_t portNum, uint32_t bitValue, uint8_t dir);
00134 void FIO_SetValue(uint8_t portNum, uint32_t bitValue);
00135 void FIO_ClearValue(uint8_t portNum, uint32_t bitValue);
00136 uint32_t FIO_ReadValue(uint8_t portNum);
00137 void FIO_SetMask(uint8_t portNum, uint32_t bitValue, uint8_t maskValue);
00138 void FIO_IntCmd(uint8_t portNum, uint32_t bitValue, uint8_t edgeState);
00139 FunctionalState FIO_GetIntStatus(uint8_t portNum, uint32_t pinNum, uint8_t edgeState);
00140 void FIO_ClearInt(uint8_t portNum, uint32_t pinNum);
00141
00142 /* FIO (halfword-accessible) style ------------------------------- */
00143 void FIO_HalfWordSetDir(uint8_t portNum, uint8_t halfwordNum, uint16_t bitValue, uint8_t dir);
00144 void FIO_HalfWordSetMask(uint8_t portNum, uint8_t halfwordNum, uint16_t bitValue, uint8_t maskValue);
00145 void FIO_HalfWordSetValue(uint8_t portNum, uint8_t halfwordNum, uint16_t bitValue);
00146 void FIO_HalfWordClearValue(uint8_t portNum, uint8_t halfwordNum, uint16_t bitValue);
00147 uint16_t FIO_HalfWordReadValue(uint8_t portNum, uint8_t halfwordNum);
00148
00149 /* FIO (byte-accessible) style ------------------------------- */
00150 void FIO_ByteSetDir(uint8_t portNum, uint8_t byteNum, uint8_t bitValue, uint8_t dir);
00151 void FIO_ByteSetMask(uint8_t portNum, uint8_t byteNum, uint8_t bitValue, uint8_t maskValue);
00152 void FIO_ByteSetValue(uint8_t portNum, uint8_t byteNum, uint8_t bitValue);
00153 void FIO_ByteClearValue(uint8_t portNum, uint8_t byteNum, uint8_t bitValue);
00154 uint8_t FIO_ByteReadValue(uint8_t portNum, uint8_t byteNum);
00155
00161 #ifdef __cplusplus
00162 }
00163 #endif
00164
00165 #endif /* LPC17XX_GPIO_H_ */
00166
00171 /* --------------------------------- End Of File ------------------------------ */
Generated on Tue Jun 7 14:58:55 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Drivers/source/lpc17xx_i2c.c Source File

C:/nxpdrv/LPC1700CMSIS/Drivers/source/lpc17xx_i2c.c

Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          lpc17xx_gpio.c                          2011-03-31
00003 */
00027 /* Peripheral group ----------------------------------------------------------- */
00032 /* Includes ------------------------------------------------------------------- */
00033 #include "lpc17xx_i2c.h"
00034 #include "lpc17xx_clkpwr.h"
00035 #include "lpc17xx_pinsel.h"
00036
00037
00038 /* If this source file built with example, the LPC17xx FW library configuration
00039  * file in each example directory ("lpc17xx_libcfg.h") must be included,
00040  * otherwise the default FW library configuration file must be included instead
00041  */
00042 #ifdef __BUILD_WITH_EXAMPLE__
00043 #include "lpc17xx_libcfg.h"
00044 #else
00045 #include "lpc17xx_libcfg_default.h"
00046 #endif /* __BUILD_WITH_EXAMPLE__ */
00047
00048
00049 #ifdef _I2C
00050
00051
00052 /* Private Types -------------------------------------------------------------- */
00060 typedef struct
00061 {
00062   uint32_t      txrx_setup;                                             /* Transmission setup */
00063   int32_t               dir;                                                            /* Current direction phase, 0 - write, 1 - read */
00064 } I2C_CFG_T;
00065
00070 /* Private Variables ---------------------------------------------------------- */
00074 static I2C_CFG_T i2cdat[3];
00075
00076 static uint32_t I2C_MasterComplete[3];
00077 static uint32_t I2C_SlaveComplete[3];
00078
00079 static uint32_t I2C_MonitorBufferIndex;
00080
00081 /* Private Functions ---------------------------------------------------------- */
00082
00083 /* Get I2C number */
00084 static int32_t I2C_getNum(LPC_I2C_TypeDef *I2Cx);
00085
00086 /* Generate a start condition on I2C bus (in master mode only) */
00087 static uint32_t I2C_Start (LPC_I2C_TypeDef *I2Cx);
00088
00089 /* Generate a stop condition on I2C bus (in master mode only) */
00090 static void I2C_Stop (LPC_I2C_TypeDef *I2Cx);
00091
00092 /* I2C send byte subroutine */
00093 static uint32_t I2C_SendByte (LPC_I2C_TypeDef *I2Cx, uint8_t databyte);
00094
00095 /* I2C get byte subroutine */
00096 static uint32_t I2C_GetByte (LPC_I2C_TypeDef *I2Cx, uint8_t *retdat, Bool ack);
00097
00098 /* I2C set clock (hz) */
00099 static void I2C_SetClock (LPC_I2C_TypeDef *I2Cx, uint32_t target_clock);
00100
00101 /*--------------------------------------------------------------------------------*/
00102 /********************************************************************/
00110 static int32_t I2C_getNum(LPC_I2C_TypeDef *I2Cx){
00111         if (I2Cx == LPC_I2C0) {
00112                 return (0);
00113         } else if (I2Cx == LPC_I2C1) {
00114                 return (1);
00115         } else if (I2Cx == LPC_I2C2) {
00116                 return (2);
00117         }
00118         return (-1);
00119 }
00120
00121 /********************************************************************/
00129 static uint32_t I2C_Start (LPC_I2C_TypeDef *I2Cx)
00130 {
00131         I2Cx->I2CONSET = I2C_I2CONSET_STA;
00132         I2Cx->I2CONCLR = I2C_I2CONCLR_SIC;
00133
00134         // Wait for complete
00135         while (!(I2Cx->I2CONSET & I2C_I2CONSET_SI));
00136         I2Cx->I2CONCLR = I2C_I2CONCLR_STAC;
00137         return (I2Cx->I2STAT & I2C_STAT_CODE_BITMASK);
00138 }
00139
00140 /********************************************************************/
00148 static void I2C_Stop (LPC_I2C_TypeDef *I2Cx)
00149 {
00150
00151         /* Make sure start bit is not active */
00152         if (I2Cx->I2CONSET & I2C_I2CONSET_STA)
00153         {
00154                 I2Cx->I2CONCLR = I2C_I2CONCLR_STAC;
00155         }
00156         I2Cx->I2CONSET = I2C_I2CONSET_STO;
00157         I2Cx->I2CONCLR = I2C_I2CONCLR_SIC;
00158 }
00159
00160 /********************************************************************/
00169 static uint32_t I2C_SendByte (LPC_I2C_TypeDef *I2Cx, uint8_t databyte)
00170 {
00171         /* Make sure start bit is not active */
00172         if (I2Cx->I2CONSET & I2C_I2CONSET_STA)
00173         {
00174                 I2Cx->I2CONCLR = I2C_I2CONCLR_STAC;
00175         }
00176         I2Cx->I2DAT = databyte & I2C_I2DAT_BITMASK;
00177         I2Cx->I2CONCLR = I2C_I2CONCLR_SIC;
00178
00179         while (!(I2Cx->I2CONSET & I2C_I2CONSET_SI));
00180         return (I2Cx->I2STAT & I2C_STAT_CODE_BITMASK);
00181 }
00182
00183 /********************************************************************/
00193 static uint32_t I2C_GetByte (LPC_I2C_TypeDef *I2Cx, uint8_t *retdat, Bool ack)
00194 {
00195         if (ack == TRUE)
00196         {
00197                 I2Cx->I2CONSET = I2C_I2CONSET_AA;
00198         }
00199         else
00200         {
00201                 I2Cx->I2CONCLR = I2C_I2CONCLR_AAC;
00202         }
00203         I2Cx->I2CONCLR = I2C_I2CONCLR_SIC;
00204
00205         while (!(I2Cx->I2CONSET & I2C_I2CONSET_SI));
00206         *retdat = (uint8_t) (I2Cx->I2DAT & I2C_I2DAT_BITMASK);
00207         return (I2Cx->I2STAT & I2C_STAT_CODE_BITMASK);
00208 }
00209
00210 /*********************************************************************/
00219 static void I2C_SetClock (LPC_I2C_TypeDef *I2Cx, uint32_t target_clock)
00220 {
00221         uint32_t temp;
00222
00223         CHECK_PARAM(PARAM_I2Cx(I2Cx));
00224
00225         // Get PCLK of I2C controller
00226         if (I2Cx == LPC_I2C0)
00227         {
00228                 temp = CLKPWR_GetPCLK (CLKPWR_PCLKSEL_I2C0) / target_clock;
00229         }
00230         else if (I2Cx == LPC_I2C1)
00231         {
00232                 temp = CLKPWR_GetPCLK (CLKPWR_PCLKSEL_I2C1) / target_clock;
00233         }
00234         else if (I2Cx == LPC_I2C2)
00235         {
00236                 temp = CLKPWR_GetPCLK (CLKPWR_PCLKSEL_I2C2) / target_clock;
00237         }
00238
00239         /* Set the I2C clock value to register */
00240         I2Cx->I2SCLH = (uint32_t)(temp / 2);
00241         I2Cx->I2SCLL = (uint32_t)(temp - I2Cx->I2SCLH);
00242 }
00243 /* End of Private Functions --------------------------------------------------- */
00244
00245
00246 /* Public Functions ----------------------------------------------------------- */
00251 /********************************************************************/
00261 void I2C_Init(LPC_I2C_TypeDef *I2Cx, uint32_t clockrate)
00262 {
00263         CHECK_PARAM(PARAM_I2Cx(I2Cx));
00264
00265         if (I2Cx==LPC_I2C0)
00266         {
00267                 /* Set up clock and power for I2C0 module */
00268                 CLKPWR_ConfigPPWR (CLKPWR_PCONP_PCI2C0, ENABLE);
00269                 /* As default, peripheral clock for I2C0 module
00270                  * is set to FCCLK / 2 */
00271                 CLKPWR_SetPCLKDiv(CLKPWR_PCLKSEL_I2C0, CLKPWR_PCLKSEL_CCLK_DIV_2);
00272         }
00273         else if (I2Cx==LPC_I2C1)
00274         {
00275                 /* Set up clock and power for I2C1 module */
00276                 CLKPWR_ConfigPPWR (CLKPWR_PCONP_PCI2C1, ENABLE);
00277                 /* As default, peripheral clock for I2C1 module
00278                  * is set to FCCLK / 2 */
00279                 CLKPWR_SetPCLKDiv(CLKPWR_PCLKSEL_I2C1, CLKPWR_PCLKSEL_CCLK_DIV_2);
00280         }
00281         else if (I2Cx==LPC_I2C2)
00282         {
00283                 /* Set up clock and power for I2C2 module */
00284                 CLKPWR_ConfigPPWR (CLKPWR_PCONP_PCI2C2, ENABLE);
00285                 /* As default, peripheral clock for I2C2 module
00286                  * is set to FCCLK / 2 */
00287                 CLKPWR_SetPCLKDiv(CLKPWR_PCLKSEL_I2C2, CLKPWR_PCLKSEL_CCLK_DIV_2);
00288         }
00289         else {
00290                 // Up-Support this device
00291                 return;
00292         }
00293
00294     /* Set clock rate */
00295     I2C_SetClock(I2Cx, clockrate);
00296     /* Set I2C operation to default */
00297     I2Cx->I2CONCLR = (I2C_I2CONCLR_AAC | I2C_I2CONCLR_STAC | I2C_I2CONCLR_I2ENC);
00298 }
00299
00300 /*********************************************************************/
00309 void I2C_DeInit(LPC_I2C_TypeDef* I2Cx)
00310 {
00311         CHECK_PARAM(PARAM_I2Cx(I2Cx));
00312
00313         /* Disable I2C control */
00314         I2Cx->I2CONCLR = I2C_I2CONCLR_I2ENC;
00315
00316         if (I2Cx==LPC_I2C0)
00317         {
00318                 /* Disable power for I2C0 module */
00319                 CLKPWR_ConfigPPWR (CLKPWR_PCONP_PCI2C0, DISABLE);
00320         }
00321         else if (I2Cx==LPC_I2C1)
00322         {
00323                 /* Disable power for I2C1 module */
00324                 CLKPWR_ConfigPPWR (CLKPWR_PCONP_PCI2C1, DISABLE);
00325         }
00326         else if (I2Cx==LPC_I2C2)
00327         {
00328                 /* Disable power for I2C2 module */
00329                 CLKPWR_ConfigPPWR (CLKPWR_PCONP_PCI2C2, DISABLE);
00330         }
00331 }
00332
00333 /*********************************************************************/
00342 void I2C_Cmd(LPC_I2C_TypeDef* I2Cx, FunctionalState NewState)
00343 {
00344         CHECK_PARAM(PARAM_FUNCTIONALSTATE(NewState));
00345         CHECK_PARAM(PARAM_I2Cx(I2Cx));
00346
00347         if (NewState == ENABLE)
00348         {
00349                 I2Cx->I2CONSET = I2C_I2CONSET_I2EN;
00350         }
00351         else
00352         {
00353                 I2Cx->I2CONCLR = I2C_I2CONCLR_I2ENC;
00354         }
00355 }
00356
00357 /*********************************************************************/
00369 void I2C_IntCmd (LPC_I2C_TypeDef *I2Cx, Bool NewState)
00370 {
00371         if (NewState)
00372         {
00373                 if(I2Cx == LPC_I2C0)
00374                 {
00375                         NVIC_EnableIRQ(I2C0_IRQn);
00376                 }
00377                 else if (I2Cx == LPC_I2C1)
00378                 {
00379                         NVIC_EnableIRQ(I2C1_IRQn);
00380                 }
00381                 else if (I2Cx == LPC_I2C2)
00382                 {
00383                         NVIC_EnableIRQ(I2C2_IRQn);
00384                 }
00385         }
00386         else
00387         {
00388                 if(I2Cx == LPC_I2C0)
00389                 {
00390                         NVIC_DisableIRQ(I2C0_IRQn);
00391                 }
00392                 else if (I2Cx == LPC_I2C1)
00393                 {
00394                         NVIC_DisableIRQ(I2C1_IRQn);
00395                 }
00396                 else if (I2Cx == LPC_I2C2)
00397                 {
00398                         NVIC_DisableIRQ(I2C2_IRQn);
00399                 }
00400         }
00401     return;
00402 }
00403
00404
00405 /*********************************************************************/
00413 void I2C_MasterHandler (LPC_I2C_TypeDef  *I2Cx)
00414 {
00415         int32_t tmp;
00416         uint8_t returnCode;
00417         I2C_M_SETUP_Type *txrx_setup;
00418
00419         tmp = I2C_getNum(I2Cx);
00420         txrx_setup = (I2C_M_SETUP_Type *) i2cdat[tmp].txrx_setup;
00421
00422         returnCode = (I2Cx->I2STAT & I2C_STAT_CODE_BITMASK);
00423         // Save current status
00424         txrx_setup->status = returnCode;
00425         // there's no relevant information
00426         if (returnCode == I2C_I2STAT_NO_INF){
00427                 I2Cx->I2CONCLR = I2C_I2CONCLR_SIC;
00428                 return;
00429         }
00430
00431         /* ----------------------------- TRANSMIT PHASE --------------------------*/
00432         if (i2cdat[tmp].dir == 0){
00433                 switch (returnCode)
00434                 {
00435                 /* A start/repeat start condition has been transmitted -------------------*/
00436                 case I2C_I2STAT_M_TX_START:
00437                 case I2C_I2STAT_M_TX_RESTART:
00438                         I2Cx->I2CONCLR = I2C_I2CONCLR_STAC;
00439                         /*
00440                          * If there's any transmit data, then start to
00441                          * send SLA+W right now, otherwise check whether if there's
00442                          * any receive data for next state.
00443                          */
00444                         if ((txrx_setup->tx_data != NULL) && (txrx_setup->tx_length != 0)){
00445                                 I2Cx->I2DAT = (txrx_setup->sl_addr7bit << 1);
00446                                 I2Cx->I2CONCLR = I2C_I2CONCLR_SIC;
00447                         } else {
00448                                 goto next_stage;
00449                         }
00450                         break;
00451
00452                 /* SLA+W has been transmitted, ACK has been received ----------------------*/
00453                 case I2C_I2STAT_M_TX_SLAW_ACK:
00454                 /* Data has been transmitted, ACK has been received */
00455                 case I2C_I2STAT_M_TX_DAT_ACK:
00456                         /* Send more data */
00457                         if ((txrx_setup->tx_count < txrx_setup->tx_length) \
00458                                         && (txrx_setup->tx_data != NULL)){
00459                                 I2Cx->I2DAT =  *(uint8_t *)(txrx_setup->tx_data + txrx_setup->tx_count);
00460                                 txrx_setup->tx_count++;
00461                                 I2Cx->I2CONCLR = I2C_I2CONCLR_SIC;
00462                         }
00463                         // no more data, switch to next stage
00464                         else {
00465 next_stage:
00466                                 // change direction
00467                                 i2cdat[tmp].dir = 1;
00468                                 // Check if any data to receive
00469                                 if ((txrx_setup->rx_length != 0) && (txrx_setup->rx_data != NULL)){
00470                                                 // check whether if we need to issue an repeat start
00471                                                 if ((txrx_setup->tx_length != 0) && (txrx_setup->tx_data != NULL)){
00472                                                         // Send out an repeat start command
00473                                                         I2Cx->I2CONSET = I2C_I2CONSET_STA;
00474                                                         I2Cx->I2CONCLR = I2C_I2CONCLR_AAC | I2C_I2CONCLR_SIC;
00475                                                 }
00476                                                 // Don't need issue an repeat start, just goto send SLA+R
00477                                                 else {
00478                                                         goto send_slar;
00479                                                 }
00480                                 }
00481                                 // no more data send, the go to end stage now
00482                                 else {
00483                                         // success, goto end stage
00484                                         txrx_setup->status |= I2C_SETUP_STATUS_DONE;
00485                                         goto end_stage;
00486                                 }
00487                         }
00488                         break;
00489
00490                 /* SLA+W has been transmitted, NACK has been received ----------------------*/
00491                 case I2C_I2STAT_M_TX_SLAW_NACK:
00492                 /* Data has been transmitted, NACK has been received -----------------------*/
00493                 case I2C_I2STAT_M_TX_DAT_NACK:
00494                         // update status
00495                         txrx_setup->status |= I2C_SETUP_STATUS_NOACKF;
00496                         goto retry;
00497                 /* Arbitration lost in SLA+R/W or Data bytes -------------------------------*/
00498                 case I2C_I2STAT_M_TX_ARB_LOST:
00499                         // update status
00500                         txrx_setup->status |= I2C_SETUP_STATUS_ARBF;
00501                 default:
00502                         goto retry;
00503                 }
00504         }
00505
00506         /* ----------------------------- RECEIVE PHASE --------------------------*/
00507         else if (i2cdat[tmp].dir == 1){
00508                 switch (returnCode){
00509                         /* A start/repeat start condition has been transmitted ---------------------*/
00510                 case I2C_I2STAT_M_RX_START:
00511                 case I2C_I2STAT_M_RX_RESTART:
00512                         I2Cx->I2CONCLR = I2C_I2CONCLR_STAC;
00513                         /*
00514                          * If there's any receive data, then start to
00515                          * send SLA+R right now, otherwise check whether if there's
00516                          * any receive data for end of state.
00517                          */
00518                         if ((txrx_setup->rx_data != NULL) && (txrx_setup->rx_length != 0)){
00519 send_slar:
00520                                 I2Cx->I2DAT = (txrx_setup->sl_addr7bit << 1) | 0x01;
00521                                 I2Cx->I2CONCLR = I2C_I2CONCLR_SIC;
00522                         } else {
00523                                 // Success, goto end stage
00524                                 txrx_setup->status |= I2C_SETUP_STATUS_DONE;
00525                                 goto end_stage;
00526                         }
00527                         break;
00528
00529                 /* SLA+R has been transmitted, ACK has been received -----------------*/
00530                 case I2C_I2STAT_M_RX_SLAR_ACK:
00531                         if (txrx_setup->rx_count < (txrx_setup->rx_length - 1)) {
00532                                 /*Data will be received,  ACK will be return*/
00533                                 I2Cx->I2CONSET = I2C_I2CONSET_AA;
00534                         }
00535                         else {
00536                                 /*Last data will be received,  NACK will be return*/
00537                                 I2Cx->I2CONCLR = I2C_I2CONSET_AA;
00538                         }
00539                         I2Cx->I2CONCLR = I2C_I2CONCLR_SIC;
00540                         break;
00541
00542                 /* Data has been received, ACK has been returned ----------------------*/
00543                 case I2C_I2STAT_M_RX_DAT_ACK:
00544                         // Note save data and increase counter first, then check later
00545                         /* Save data  */
00546                         if ((txrx_setup->rx_data != NULL) && (txrx_setup->rx_count < txrx_setup->rx_length)){
00547                                 *(uint8_t *)(txrx_setup->rx_data + txrx_setup->rx_count) = (I2Cx->I2DAT & I2C_I2DAT_BITMASK);
00548                                 txrx_setup->rx_count++;
00549                         }
00550                         if (txrx_setup->rx_count < (txrx_setup->rx_length - 1)) {
00551                                 /*Data will be received,  ACK will be return*/
00552                                 I2Cx->I2CONSET = I2C_I2CONSET_AA;
00553                         }
00554                         else {
00555                                 /*Last data will be received,  NACK will be return*/
00556                                 I2Cx->I2CONCLR = I2C_I2CONSET_AA;
00557                         }
00558
00559                         I2Cx->I2CONCLR = I2C_I2CONCLR_SIC;
00560                         break;
00561
00562                 /* Data has been received, NACK has been return -------------------------*/
00563                 case I2C_I2STAT_M_RX_DAT_NACK:
00564                         /* Save the last data */
00565                         if ((txrx_setup->rx_data != NULL) && (txrx_setup->rx_count < txrx_setup->rx_length)){
00566                                 *(uint8_t *)(txrx_setup->rx_data + txrx_setup->rx_count) = (I2Cx->I2DAT & I2C_I2DAT_BITMASK);
00567                                 txrx_setup->rx_count++;
00568                         }
00569                         // success, go to end stage
00570                         txrx_setup->status |= I2C_SETUP_STATUS_DONE;
00571                         goto end_stage;
00572
00573                 /* SLA+R has been transmitted, NACK has been received ------------------*/
00574                 case I2C_I2STAT_M_RX_SLAR_NACK:
00575                         // update status
00576                         txrx_setup->status |= I2C_SETUP_STATUS_NOACKF;
00577                         goto retry;
00578
00579                 /* Arbitration lost ----------------------------------------------------*/
00580                 case I2C_I2STAT_M_RX_ARB_LOST:
00581                         // update status
00582                         txrx_setup->status |= I2C_SETUP_STATUS_ARBF;
00583                 default:
00584 retry:
00585                         // check if retransmission is available
00586                         if (txrx_setup->retransmissions_count < txrx_setup->retransmissions_max){
00587                                 // Clear tx count
00588                                 txrx_setup->tx_count = 0;
00589                                 I2Cx->I2CONSET = I2C_I2CONSET_STA;
00590                                 I2Cx->I2CONCLR = I2C_I2CONCLR_AAC | I2C_I2CONCLR_SIC;
00591                                 txrx_setup->retransmissions_count++;
00592                         }
00593                         // End of stage
00594                         else {
00595 end_stage:
00596                                 // Disable interrupt
00597                                 I2C_IntCmd(I2Cx, 0);
00598                                 // Send stop
00599                                 I2C_Stop(I2Cx);
00600
00601                                 I2C_MasterComplete[tmp] = TRUE;
00602                         }
00603                         break;
00604                 }
00605         }
00606 }
00607
00608
00609 /*********************************************************************/
00617 void I2C_SlaveHandler (LPC_I2C_TypeDef  *I2Cx)
00618 {
00619         int32_t tmp;
00620         uint8_t returnCode;
00621         I2C_S_SETUP_Type *txrx_setup;
00622         uint32_t timeout;
00623
00624         tmp = I2C_getNum(I2Cx);
00625         txrx_setup = (I2C_S_SETUP_Type *) i2cdat[tmp].txrx_setup;
00626
00627         returnCode = (I2Cx->I2STAT & I2C_STAT_CODE_BITMASK);
00628         // Save current status
00629         txrx_setup->status = returnCode;
00630         // there's no relevant information
00631         if (returnCode == I2C_I2STAT_NO_INF){
00632                 I2Cx->I2CONCLR = I2C_I2CONCLR_SIC;
00633                 return;
00634         }
00635
00636
00637         switch (returnCode)
00638         {
00639
00640         /* No status information */
00641         case I2C_I2STAT_NO_INF:
00642                 I2Cx->I2CONSET = I2C_I2CONSET_AA;
00643                 I2Cx->I2CONCLR = I2C_I2CONCLR_SIC;
00644                 break;
00645
00646         /* Reading phase -------------------------------------------------------- */
00647         /* Own SLA+R has been received, ACK has been returned */
00648         case I2C_I2STAT_S_RX_SLAW_ACK:
00649         /* General call address has been received, ACK has been returned */
00650         case I2C_I2STAT_S_RX_GENCALL_ACK:
00651                 I2Cx->I2CONSET = I2C_I2CONSET_AA;
00652                 I2Cx->I2CONCLR = I2C_I2CONCLR_SIC;
00653                 break;
00654
00655         /* Previously addressed with own SLA;
00656          * DATA byte has been received;
00657          * ACK has been returned */
00658         case I2C_I2STAT_S_RX_PRE_SLA_DAT_ACK:
00659         /* DATA has been received, ACK hasn been return */
00660         case I2C_I2STAT_S_RX_PRE_GENCALL_DAT_ACK:
00661                 /*
00662                  * All data bytes that over-flow the specified receive
00663                  * data length, just ignore them.
00664                  */
00665                 if ((txrx_setup->rx_count < txrx_setup->rx_length) \
00666                                 && (txrx_setup->rx_data != NULL)){
00667                         *(uint8_t *)(txrx_setup->rx_data + txrx_setup->rx_count) = (uint8_t)I2Cx->I2DAT;
00668                         txrx_setup->rx_count++;
00669                 }
00670                 I2Cx->I2CONSET = I2C_I2CONSET_AA;
00671                 I2Cx->I2CONCLR = I2C_I2CONCLR_SIC;
00672                 break;
00673
00674         /* Previously addressed with own SLA;
00675          * DATA byte has been received;
00676          * NOT ACK has been returned */
00677         case I2C_I2STAT_S_RX_PRE_SLA_DAT_NACK:
00678         /* DATA has been received, NOT ACK has been returned */
00679         case I2C_I2STAT_S_RX_PRE_GENCALL_DAT_NACK:
00680                 I2Cx->I2CONCLR = I2C_I2CONCLR_SIC;
00681                 break;
00682
00683         /*
00684          * Note that: Return code only let us know a stop condition mixed
00685          * with a repeat start condition in the same code value.
00686          * So we should provide a time-out. In case this is really a stop
00687          * condition, this will return back after time out condition. Otherwise,
00688          * next session that is slave receive data will be completed.
00689          */
00690
00691         /* A Stop or a repeat start condition */
00692         case I2C_I2STAT_S_RX_STA_STO_SLVREC_SLVTRX:
00693                 // Temporally lock the interrupt for timeout condition
00694                 I2C_IntCmd(I2Cx, 0);
00695                 I2Cx->I2CONCLR = I2C_I2CONCLR_SIC;
00696                 // enable time out
00697                 timeout = I2C_SLAVE_TIME_OUT;
00698                 while(1){
00699                         if (I2Cx->I2CONSET & I2C_I2CONSET_SI){
00700                                 // re-Enable interrupt
00701                                 I2C_IntCmd(I2Cx, 1);
00702                                 break;
00703                         } else {
00704                                 timeout--;
00705                                 if (timeout == 0){
00706                                         // timeout occur, it's really a stop condition
00707                                         txrx_setup->status |= I2C_SETUP_STATUS_DONE;
00708                                         goto s_int_end;
00709                                 }
00710                         }
00711                 }
00712                 break;
00713
00714         /* Writing phase -------------------------------------------------------- */
00715         /* Own SLA+R has been received, ACK has been returned */
00716         case I2C_I2STAT_S_TX_SLAR_ACK:
00717         /* Data has been transmitted, ACK has been received */
00718         case I2C_I2STAT_S_TX_DAT_ACK:
00719                 /*
00720                  * All data bytes that over-flow the specified receive
00721                  * data length, just ignore them.
00722                  */
00723                 if ((txrx_setup->tx_count < txrx_setup->tx_length) \
00724                                 && (txrx_setup->tx_data != NULL)){
00725                         I2Cx->I2DAT = *(uint8_t *) (txrx_setup->tx_data + txrx_setup->tx_count);
00726                         txrx_setup->tx_count++;
00727                 }
00728                 I2Cx->I2CONSET = I2C_I2CONSET_AA;
00729                 I2Cx->I2CONCLR = I2C_I2CONCLR_SIC;
00730                 break;
00731
00732         /* Data has been transmitted, NACK has been received,
00733          * that means there's no more data to send, exit now */
00734         /*
00735          * Note: Don't wait for stop event since in slave transmit mode,
00736          * since there no proof lets us know when a stop signal has been received
00737          * on slave side.
00738          */
00739         case I2C_I2STAT_S_TX_DAT_NACK:
00740                 I2Cx->I2CONSET = I2C_I2CONSET_AA;
00741                 I2Cx->I2CONCLR = I2C_I2CONCLR_SIC;
00742                 txrx_setup->status |= I2C_SETUP_STATUS_DONE;
00743                 goto s_int_end;
00744
00745         // Other status must be captured
00746         default:
00747 s_int_end:
00748                 // Disable interrupt
00749                 I2C_IntCmd(I2Cx, 0);
00750                 I2Cx->I2CONCLR = I2C_I2CONCLR_AAC | I2C_I2CONCLR_SIC | I2C_I2CONCLR_STAC;
00751                 I2C_SlaveComplete[tmp] = TRUE;
00752                 break;
00753         }
00754 }
00755
00756 /*********************************************************************/
00778 Status I2C_MasterTransferData(LPC_I2C_TypeDef *I2Cx, I2C_M_SETUP_Type *TransferCfg, \
00779                                                                 I2C_TRANSFER_OPT_Type Opt)
00780 {
00781         uint8_t *txdat;
00782         uint8_t *rxdat;
00783         uint32_t CodeStatus;
00784         uint8_t tmp;
00785
00786         // reset all default state
00787         txdat = (uint8_t *) TransferCfg->tx_data;
00788         rxdat = (uint8_t *) TransferCfg->rx_data;
00789         // Reset I2C setup value to default state
00790         TransferCfg->tx_count = 0;
00791         TransferCfg->rx_count = 0;
00792         TransferCfg->status = 0;
00793
00794         if (Opt == I2C_TRANSFER_POLLING){
00795
00796                 /* First Start condition -------------------------------------------------------------- */
00797                 TransferCfg->retransmissions_count = 0;
00798 retry:
00799                 // reset all default state
00800                 txdat = (uint8_t *) TransferCfg->tx_data;
00801                 rxdat = (uint8_t *) TransferCfg->rx_data;
00802                 // Reset I2C setup value to default state
00803                 TransferCfg->tx_count = 0;
00804                 TransferCfg->rx_count = 0;
00805                 CodeStatus = 0;
00806
00807                 // Start command
00808                 CodeStatus = I2C_Start(I2Cx);
00809                 if ((CodeStatus != I2C_I2STAT_M_TX_START) \
00810                                 && (CodeStatus != I2C_I2STAT_M_TX_RESTART)){
00811                         TransferCfg->retransmissions_count++;
00812                         if (TransferCfg->retransmissions_count > TransferCfg->retransmissions_max){
00813                                 // save status
00814                                 TransferCfg->status = CodeStatus;
00815                                 goto error;
00816                         } else {
00817                                 goto retry;
00818                         }
00819                 }
00820
00821                 /* In case of sending data first --------------------------------------------------- */
00822                 if ((TransferCfg->tx_length != 0) && (TransferCfg->tx_data != NULL)){
00823
00824                         /* Send slave address + WR direction bit = 0 ----------------------------------- */
00825                         CodeStatus = I2C_SendByte(I2Cx, (TransferCfg->sl_addr7bit << 1));
00826                         if (CodeStatus != I2C_I2STAT_M_TX_SLAW_ACK){
00827                                 TransferCfg->retransmissions_count++;
00828                                 if (TransferCfg->retransmissions_count > TransferCfg->retransmissions_max){
00829                                         // save status
00830                                         TransferCfg->status = CodeStatus | I2C_SETUP_STATUS_NOACKF;
00831                                         goto error;
00832                                 } else {
00833                                         goto retry;
00834                                 }
00835                         }
00836
00837                         /* Send a number of data bytes ---------------------------------------- */
00838                         while (TransferCfg->tx_count < TransferCfg->tx_length)
00839                         {
00840                                 CodeStatus = I2C_SendByte(I2Cx, *txdat);
00841                                 if (CodeStatus != I2C_I2STAT_M_TX_DAT_ACK){
00842                                         TransferCfg->retransmissions_count++;
00843                                         if (TransferCfg->retransmissions_count > TransferCfg->retransmissions_max){
00844                                                 // save status
00845                                                 TransferCfg->status = CodeStatus | I2C_SETUP_STATUS_NOACKF;
00846                                                 goto error;
00847                                         } else {
00848                                                 goto retry;
00849                                         }
00850                                 }
00851
00852                                 txdat++;
00853                                 TransferCfg->tx_count++;
00854                         }
00855                 }
00856
00857                 /* Second Start condition (Repeat Start) ------------------------------------------- */
00858                 if ((TransferCfg->tx_length != 0) && (TransferCfg->tx_data != NULL) \
00859                                 && (TransferCfg->rx_length != 0) && (TransferCfg->rx_data != NULL)){
00860
00861                         CodeStatus = I2C_Start(I2Cx);
00862                         if ((CodeStatus != I2C_I2STAT_M_RX_START) \
00863                                         && (CodeStatus != I2C_I2STAT_M_RX_RESTART)){
00864                                 TransferCfg->retransmissions_count++;
00865                                 if (TransferCfg->retransmissions_count > TransferCfg->retransmissions_max){
00866                                         // Update status
00867                                         TransferCfg->status = CodeStatus;
00868                                         goto error;
00869                                 } else {
00870                                         goto retry;
00871                                 }
00872                         }
00873                 }
00874
00875                 /* Then, start reading after sending data -------------------------------------- */
00876                 if ((TransferCfg->rx_length != 0) && (TransferCfg->rx_data != NULL)){
00877                         /* Send slave address + RD direction bit = 1 ----------------------------------- */
00878
00879                         CodeStatus = I2C_SendByte(I2Cx, ((TransferCfg->sl_addr7bit << 1) | 0x01));
00880                         if (CodeStatus != I2C_I2STAT_M_RX_SLAR_ACK){
00881                                 TransferCfg->retransmissions_count++;
00882                                 if (TransferCfg->retransmissions_count > TransferCfg->retransmissions_max){
00883                                         // update status
00884                                         TransferCfg->status = CodeStatus | I2C_SETUP_STATUS_NOACKF;
00885                                         goto error;
00886                                 } else {
00887                                         goto retry;
00888                                 }
00889                         }
00890
00891                         /* Receive a number of data bytes ------------------------------------------------- */
00892                         while (TransferCfg->rx_count < TransferCfg->rx_length){
00893
00894                                 /*
00895                                  * Note that: if data length is only one, the master should not
00896                                  * issue an ACK signal on bus after reading to avoid of next data frame
00897                                  * on slave side
00898                                  */
00899                                 if (TransferCfg->rx_count < (TransferCfg->rx_length - 1)){
00900                                         // Issue an ACK signal for next data frame
00901                                         CodeStatus = I2C_GetByte(I2Cx, &tmp, 1);
00902                                         if (CodeStatus != I2C_I2STAT_M_RX_DAT_ACK){
00903                                                 TransferCfg->retransmissions_count++;
00904                                                 if (TransferCfg->retransmissions_count > TransferCfg->retransmissions_max){
00905                                                         // update status
00906                                                         TransferCfg->status = CodeStatus;
00907                                                         goto error;
00908                                                 } else {
00909                                                         goto retry;
00910                                                 }
00911                                         }
00912                                 } else {
00913                                         // Do not issue an ACK signal
00914                                         CodeStatus = I2C_GetByte(I2Cx, &tmp, 0);
00915                                         if (CodeStatus != I2C_I2STAT_M_RX_DAT_NACK){
00916                                                 TransferCfg->retransmissions_count++;
00917                                                 if (TransferCfg->retransmissions_count > TransferCfg->retransmissions_max){
00918                                                         // update status
00919                                                         TransferCfg->status = CodeStatus;
00920                                                         goto error;
00921                                                 } else {
00922                                                         goto retry;
00923                                                 }
00924                                         }
00925                                 }
00926                                 *rxdat++ = tmp;
00927                                 TransferCfg->rx_count++;
00928                         }
00929                 }
00930
00931                 /* Send STOP condition ------------------------------------------------- */
00932                 I2C_Stop(I2Cx);
00933                 return SUCCESS;
00934
00935 error:
00936                 // Send stop condition
00937                 I2C_Stop(I2Cx);
00938                 return ERROR;
00939         }
00940
00941         else if (Opt == I2C_TRANSFER_INTERRUPT){
00942                 // Setup tx_rx data, callback and interrupt handler
00943                 tmp = I2C_getNum(I2Cx);
00944                 i2cdat[tmp].txrx_setup = (uint32_t) TransferCfg;
00945                 // Set direction phase, write first
00946                 i2cdat[tmp].dir = 0;
00947
00948                 /* First Start condition -------------------------------------------------------------- */
00949                 I2Cx->I2CONCLR = I2C_I2CONCLR_SIC;
00950                 I2Cx->I2CONSET = I2C_I2CONSET_STA;
00951                 I2C_IntCmd(I2Cx, 1);
00952
00953                 return (SUCCESS);
00954         }
00955
00956         return ERROR;
00957 }
00958
00959 /*********************************************************************/
00990 Status I2C_SlaveTransferData(LPC_I2C_TypeDef *I2Cx, I2C_S_SETUP_Type *TransferCfg, \
00991                                                                 I2C_TRANSFER_OPT_Type Opt)
00992 {
00993         uint8_t *txdat;
00994         uint8_t *rxdat;
00995         uint32_t CodeStatus;
00996         uint32_t timeout;
00997         int32_t time_en;
00998         int32_t tmp;
00999
01000         // reset all default state
01001         txdat = (uint8_t *) TransferCfg->tx_data;
01002         rxdat = (uint8_t *) TransferCfg->rx_data;
01003         // Reset I2C setup value to default state
01004         TransferCfg->tx_count = 0;
01005         TransferCfg->rx_count = 0;
01006         TransferCfg->status = 0;
01007
01008
01009         // Polling option
01010         if (Opt == I2C_TRANSFER_POLLING){
01011
01012                 /* Set AA bit to ACK command on I2C bus */
01013                 I2Cx->I2CONSET = I2C_I2CONSET_AA;
01014                 /* Clear SI bit to be ready ... */
01015                 I2Cx->I2CONCLR = (I2C_I2CONCLR_SIC | I2C_I2CONCLR_STAC);
01016
01017                 time_en = 0;
01018                 timeout = 0;
01019
01020                 while (1)
01021                 {
01022                         /* Check SI flag ready */
01023                         if (I2Cx->I2CONSET & I2C_I2CONSET_SI)
01024                         {
01025                                 time_en = 0;
01026
01027                                 switch (CodeStatus = (I2Cx->I2STAT & I2C_STAT_CODE_BITMASK))
01028                                 {
01029
01030                                 /* No status information */
01031                                 case I2C_I2STAT_NO_INF:
01032                                         I2Cx->I2CONSET = I2C_I2CONSET_AA;
01033                                         I2Cx->I2CONCLR = I2C_I2CONCLR_SIC;
01034                                         break;
01035
01036                                 /* Reading phase -------------------------------------------------------- */
01037                                 /* Own SLA+R has been received, ACK has been returned */
01038                                 case I2C_I2STAT_S_RX_SLAW_ACK:
01039                                 /* General call address has been received, ACK has been returned */
01040                                 case I2C_I2STAT_S_RX_GENCALL_ACK:
01041                                         I2Cx->I2CONSET = I2C_I2CONSET_AA;
01042                                         I2Cx->I2CONCLR = I2C_I2CONCLR_SIC;
01043                                         break;
01044
01045                                 /* Previously addressed with own SLA;
01046                                  * DATA byte has been received;
01047                                  * ACK has been returned */
01048                                 case I2C_I2STAT_S_RX_PRE_SLA_DAT_ACK:
01049                                 /* DATA has been received, ACK hasn been return */
01050                                 case I2C_I2STAT_S_RX_PRE_GENCALL_DAT_ACK:
01051                                         /*
01052                                          * All data bytes that over-flow the specified receive
01053                                          * data length, just ignore them.
01054                                          */
01055                                         if ((TransferCfg->rx_count < TransferCfg->rx_length) \
01056                                                         && (TransferCfg->rx_data != NULL)){
01057                                                 *rxdat++ = (uint8_t)I2Cx->I2DAT;
01058                                                 TransferCfg->rx_count++;
01059                                         }
01060                                         I2Cx->I2CONSET = I2C_I2CONSET_AA;
01061                                         I2Cx->I2CONCLR = I2C_I2CONCLR_SIC;
01062                                         break;
01063
01064                                 /* Previously addressed with own SLA;
01065                                  * DATA byte has been received;
01066                                  * NOT ACK has been returned */
01067                                 case I2C_I2STAT_S_RX_PRE_SLA_DAT_NACK:
01068                                 /* DATA has been received, NOT ACK has been returned */
01069                                 case I2C_I2STAT_S_RX_PRE_GENCALL_DAT_NACK:
01070                                         I2Cx->I2CONCLR = I2C_I2CONCLR_SIC;
01071                                         break;
01072
01073                                 /*
01074                                  * Note that: Return code only let us know a stop condition mixed
01075                                  * with a repeat start condition in the same code value.
01076                                  * So we should provide a time-out. In case this is really a stop
01077                                  * condition, this will return back after time out condition. Otherwise,
01078                                  * next session that is slave receive data will be completed.
01079                                  */
01080
01081                                 /* A Stop or a repeat start condition */
01082                                 case I2C_I2STAT_S_RX_STA_STO_SLVREC_SLVTRX:
01083                                         I2Cx->I2CONCLR = I2C_I2CONCLR_SIC;
01084                                         // enable time out
01085                                         time_en = 1;
01086                                         timeout = 0;
01087                                         break;
01088
01089                                 /* Writing phase -------------------------------------------------------- */
01090                                 /* Own SLA+R has been received, ACK has been returned */
01091                                 case I2C_I2STAT_S_TX_SLAR_ACK:
01092                                 /* Data has been transmitted, ACK has been received */
01093                                 case I2C_I2STAT_S_TX_DAT_ACK:
01094                                         /*
01095                                          * All data bytes that over-flow the specified receive
01096                                          * data length, just ignore them.
01097                                          */
01098                                         if ((TransferCfg->tx_count < TransferCfg->tx_length) \
01099                                                         && (TransferCfg->tx_data != NULL)){
01100                                                 I2Cx->I2DAT = *txdat++;
01101                                                 TransferCfg->tx_count++;
01102                                         }
01103                                         I2Cx->I2CONSET = I2C_I2CONSET_AA;
01104                                         I2Cx->I2CONCLR = I2C_I2CONCLR_SIC;
01105                                         break;
01106
01107                                 /* Data has been transmitted, NACK has been received,
01108                                  * that means there's no more data to send, exit now */
01109                                 /*
01110                                  * Note: Don't wait for stop event since in slave transmit mode,
01111                                  * since there no proof lets us know when a stop signal has been received
01112                                  * on slave side.
01113                                  */
01114                                 case I2C_I2STAT_S_TX_DAT_NACK:
01115                                         I2Cx->I2CONSET = I2C_I2CONSET_AA;
01116                                         I2Cx->I2CONCLR = I2C_I2CONCLR_SIC;
01117                                         // enable time out
01118                                         time_en = 1;
01119                                         timeout = 0;
01120                                         break;
01121
01122                                 // Other status must be captured
01123                                 default:
01124                                         I2Cx->I2CONCLR = I2C_I2CONCLR_SIC;
01125                                         goto s_error;
01126                                 }
01127                         } else if (time_en){
01128                                 if (timeout++ > I2C_SLAVE_TIME_OUT){
01129                                         // it's really a stop condition, goto end stage
01130                                         goto s_end_stage;
01131                                 }
01132                         }
01133                 }
01134
01135 s_end_stage:
01136                 /* Clear AA bit to disable ACK on I2C bus */
01137                 I2Cx->I2CONCLR = I2C_I2CONCLR_AAC;
01138                 // Check if there's no error during operation
01139                 // Update status
01140                 TransferCfg->status = CodeStatus | I2C_SETUP_STATUS_DONE;
01141                 return SUCCESS;
01142
01143 s_error:
01144                 /* Clear AA bit to disable ACK on I2C bus */
01145                 I2Cx->I2CONCLR = I2C_I2CONCLR_AAC;
01146                 // Update status
01147                 TransferCfg->status = CodeStatus;
01148                 return ERROR;
01149         }
01150
01151         else if (Opt == I2C_TRANSFER_INTERRUPT){
01152                 // Setup tx_rx data, callback and interrupt handler
01153                 tmp = I2C_getNum(I2Cx);
01154                 i2cdat[tmp].txrx_setup = (uint32_t) TransferCfg;
01155                 // Set direction phase, read first
01156                 i2cdat[tmp].dir = 1;
01157
01158                 // Enable AA
01159                 I2Cx->I2CONSET = I2C_I2CONSET_AA;
01160                 I2Cx->I2CONCLR = I2C_I2CONCLR_SIC | I2C_I2CONCLR_STAC;
01161                 I2C_IntCmd(I2Cx, 1);
01162
01163                 return (SUCCESS);
01164         }
01165
01166         return ERROR;
01167 }
01168
01169 /*********************************************************************/
01181 void I2C_SetOwnSlaveAddr(LPC_I2C_TypeDef *I2Cx, I2C_OWNSLAVEADDR_CFG_Type *OwnSlaveAddrConfigStruct)
01182 {
01183         uint32_t tmp;
01184         CHECK_PARAM(PARAM_I2Cx(I2Cx));
01185         CHECK_PARAM(PARAM_I2C_SLAVEADDR_CH(OwnSlaveAddrConfigStruct->SlaveAddrChannel));
01186         CHECK_PARAM(PARAM_FUNCTIONALSTATE(OwnSlaveAddrConfigStruct->GeneralCallState));
01187
01188         tmp = (((uint32_t)(OwnSlaveAddrConfigStruct->SlaveAddr_7bit << 1)) \
01189                         | ((OwnSlaveAddrConfigStruct->GeneralCallState == ENABLE) ? 0x01 : 0x00))& I2C_I2ADR_BITMASK;
01190         switch (OwnSlaveAddrConfigStruct->SlaveAddrChannel)
01191         {
01192         case 0:
01193                 I2Cx->I2ADR0 = tmp;
01194                 I2Cx->I2MASK0 = I2C_I2MASK_MASK((uint32_t) \
01195                                 (OwnSlaveAddrConfigStruct->SlaveAddrMaskValue));
01196                 break;
01197         case 1:
01198                 I2Cx->I2ADR1 = tmp;
01199                 I2Cx->I2MASK1 = I2C_I2MASK_MASK((uint32_t) \
01200                                 (OwnSlaveAddrConfigStruct->SlaveAddrMaskValue));
01201                 break;
01202         case 2:
01203                 I2Cx->I2ADR2 = tmp;
01204                 I2Cx->I2MASK2 = I2C_I2MASK_MASK((uint32_t) \
01205                                 (OwnSlaveAddrConfigStruct->SlaveAddrMaskValue));
01206                 break;
01207         case 3:
01208                 I2Cx->I2ADR3 = tmp;
01209                 I2Cx->I2MASK3 = I2C_I2MASK_MASK((uint32_t) \
01210                                 (OwnSlaveAddrConfigStruct->SlaveAddrMaskValue));
01211                 break;
01212         }
01213 }
01214
01215
01216 /*********************************************************************/
01234 void I2C_MonitorModeConfig(LPC_I2C_TypeDef *I2Cx, uint32_t MonitorCfgType, FunctionalState NewState)
01235 {
01236         CHECK_PARAM(PARAM_I2Cx(I2Cx));
01237         CHECK_PARAM(PARAM_I2C_MONITOR_CFG(MonitorCfgType));
01238         CHECK_PARAM(PARAM_FUNCTIONALSTATE(NewState));
01239
01240         if (NewState == ENABLE)
01241         {
01242                 I2Cx->MMCTRL |= MonitorCfgType;
01243         }
01244         else
01245         {
01246                 I2Cx->MMCTRL &= (~MonitorCfgType) & I2C_I2MMCTRL_BITMASK;
01247         }
01248 }
01249
01250
01251 /*********************************************************************/
01262 void I2C_MonitorModeCmd(LPC_I2C_TypeDef *I2Cx, FunctionalState NewState)
01263 {
01264         CHECK_PARAM(PARAM_I2Cx(I2Cx));
01265         CHECK_PARAM(PARAM_FUNCTIONALSTATE(NewState));
01266
01267         if (NewState == ENABLE)
01268         {
01269                 I2Cx->MMCTRL |= I2C_I2MMCTRL_MM_ENA;
01270                 I2Cx->I2CONSET = I2C_I2CONSET_AA;
01271                 I2Cx->I2CONCLR = I2C_I2CONCLR_SIC | I2C_I2CONCLR_STAC;
01272         }
01273         else
01274         {
01275                 I2Cx->MMCTRL &= (~I2C_I2MMCTRL_MM_ENA) & I2C_I2MMCTRL_BITMASK;
01276                 I2Cx->I2CONCLR = I2C_I2CONCLR_SIC | I2C_I2CONCLR_STAC | I2C_I2CONCLR_AAC;
01277         }
01278         I2C_MonitorBufferIndex = 0;
01279 }
01280
01281
01282 /*********************************************************************/
01297 uint8_t I2C_MonitorGetDatabuffer(LPC_I2C_TypeDef *I2Cx)
01298 {
01299         CHECK_PARAM(PARAM_I2Cx(I2Cx));
01300         return ((uint8_t)(I2Cx->I2DATA_BUFFER));
01301 }
01302
01303 /*********************************************************************/
01318 BOOL_8 I2C_MonitorHandler(LPC_I2C_TypeDef *I2Cx, uint8_t *buffer, uint32_t size)
01319 {
01320         BOOL_8 ret=FALSE;
01321
01322         I2Cx->I2CONCLR = I2C_I2CONCLR_SIC;
01323
01324         buffer[I2C_MonitorBufferIndex] = (uint8_t)(I2Cx->I2DATA_BUFFER);
01325         I2C_MonitorBufferIndex++;
01326         if(I2C_MonitorBufferIndex >= size)
01327         {
01328                 ret = TRUE;
01329         }
01330         return ret;
01331 }
01332 /*********************************************************************/
01342 uint32_t I2C_MasterTransferComplete(LPC_I2C_TypeDef *I2Cx)
01343 {
01344         uint32_t retval, tmp;
01345         tmp = I2C_getNum(I2Cx);
01346         retval = I2C_MasterComplete[tmp];
01347         I2C_MasterComplete[tmp] = FALSE;
01348         return retval;
01349 }
01350
01351 /*********************************************************************/
01359 uint32_t I2C_SlaveTransferComplete(LPC_I2C_TypeDef *I2Cx)
01360 {
01361         uint32_t retval, tmp;
01362         tmp = I2C_getNum(I2Cx);
01363         retval = I2C_SlaveComplete[tmp];
01364         I2C_SlaveComplete[tmp] = FALSE;
01365         return retval;
01366 }
01367
01368
01369
01374 #endif /* _I2C */
01375
01380 /* --------------------------------- End Of File ------------------------------ */
Generated on Tue Jun 7 14:58:56 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_i2c.h Source File

C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_i2c.h

Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          lpc17xx_i2c.h                           2010-05-21
00003 */
00027 /* Peripheral group ----------------------------------------------------------- */
00033 #ifndef LPC17XX_I2C_H_
00034 #define LPC17XX_I2C_H_
00035
00036 /* Includes ------------------------------------------------------------------- */
00037 #include "LPC17xx.h"
00038 #include "lpc_types.h"
00039
00040
00041 #ifdef __cplusplus
00042 extern "C"
00043 {
00044 #endif
00045
00046
00047 /* Private Macros ------------------------------------------------------------- */
00052 /* --------------------- BIT DEFINITIONS -------------------------------------- */
00053 /*******************************************************************/
00056 #define I2C_I2CONSET_AA                         ((0x04))
00057 #define I2C_I2CONSET_SI                         ((0x08))
00058 #define I2C_I2CONSET_STO                        ((0x10))
00059 #define I2C_I2CONSET_STA                        ((0x20))
00060 #define I2C_I2CONSET_I2EN                       ((0x40))
00062 /*******************************************************************/
00066 #define I2C_I2CONCLR_AAC                        ((1<<2))
00067
00068 #define I2C_I2CONCLR_SIC                        ((1<<3))
00069
00070 #define I2C_I2CONCLR_STAC                       ((1<<5))
00071
00072 #define I2C_I2CONCLR_I2ENC                      ((1<<6))
00073
00074 /********************************************************************/
00077 /* Return Code in I2C status register */
00078 #define I2C_STAT_CODE_BITMASK           ((0xF8))
00079
00080 /* I2C return status code definitions ----------------------------- */
00081
00083 #define I2C_I2STAT_NO_INF                                               ((0xF8))
00084
00085 /* Master transmit mode -------------------------------------------- */
00087 #define I2C_I2STAT_M_TX_START                                   ((0x08))
00088
00089 #define I2C_I2STAT_M_TX_RESTART                                 ((0x10))
00090
00091 #define I2C_I2STAT_M_TX_SLAW_ACK                                ((0x18))
00092
00093 #define I2C_I2STAT_M_TX_SLAW_NACK                               ((0x20))
00094
00095 #define I2C_I2STAT_M_TX_DAT_ACK                                 ((0x28))
00096
00097 #define I2C_I2STAT_M_TX_DAT_NACK                                ((0x30))
00098
00099 #define I2C_I2STAT_M_TX_ARB_LOST                                ((0x38))
00100
00101 /* Master receive mode -------------------------------------------- */
00103 #define I2C_I2STAT_M_RX_START                                   ((0x08))
00104
00105 #define I2C_I2STAT_M_RX_RESTART                                 ((0x10))
00106
00107 #define I2C_I2STAT_M_RX_ARB_LOST                                ((0x38))
00108
00109 #define I2C_I2STAT_M_RX_SLAR_ACK                                ((0x40))
00110
00111 #define I2C_I2STAT_M_RX_SLAR_NACK                               ((0x48))
00112
00113 #define I2C_I2STAT_M_RX_DAT_ACK                                 ((0x50))
00114
00115 #define I2C_I2STAT_M_RX_DAT_NACK                                ((0x58))
00116
00117 /* Slave receive mode -------------------------------------------- */
00119 #define I2C_I2STAT_S_RX_SLAW_ACK                                ((0x60))
00120
00122 #define I2C_I2STAT_S_RX_ARB_LOST_M_SLA                  ((0x68))
00123
00124 //#define I2C_I2STAT_S_RX_SLAW_ACK                              ((0x68))
00125
00127 #define I2C_I2STAT_S_RX_GENCALL_ACK                             ((0x70))
00128
00130 #define I2C_I2STAT_S_RX_ARB_LOST_M_GENCALL              ((0x78))
00131
00132 //#define I2C_I2STAT_S_RX_GENCALL_ACK                           ((0x78))
00133
00136 #define I2C_I2STAT_S_RX_PRE_SLA_DAT_ACK                 ((0x80))
00137
00139 #define I2C_I2STAT_S_RX_PRE_SLA_DAT_NACK                ((0x88))
00140
00142 #define I2C_I2STAT_S_RX_PRE_GENCALL_DAT_ACK             ((0x90))
00143
00145 #define I2C_I2STAT_S_RX_PRE_GENCALL_DAT_NACK    ((0x98))
00146
00149 #define I2C_I2STAT_S_RX_STA_STO_SLVREC_SLVTRX   ((0xA0))
00150
00153 #define I2C_I2STAT_S_TX_SLAR_ACK                                ((0xA8))
00154
00156 #define I2C_I2STAT_S_TX_ARB_LOST_M_SLA                  ((0xB0))
00157
00158 //#define I2C_I2STAT_S_TX_SLAR_ACK                              ((0xB0))
00159
00161 #define I2C_I2STAT_S_TX_DAT_ACK                                 ((0xB8))
00162
00163 #define I2C_I2STAT_S_TX_DAT_NACK                                ((0xC0))
00164
00166 #define I2C_I2STAT_S_TX_LAST_DAT_ACK                    ((0xC8))
00167
00169 #define I2C_SLAVE_TIME_OUT                                              0x10000UL
00170
00171 /********************************************************************/
00175 #define I2C_I2DAT_BITMASK                       ((0xFF))
00176
00180 #define I2C_I2DAT_IDLE_CHAR                     (0xFF)
00181
00182 /********************************************************************/
00185 #define I2C_I2MMCTRL_MM_ENA                     ((1<<0))
00186 #define I2C_I2MMCTRL_ENA_SCL            ((1<<1))
00187 #define I2C_I2MMCTRL_MATCH_ALL          ((1<<2))
00188 #define I2C_I2MMCTRL_BITMASK            ((0x07))
00190 /********************************************************************/
00194 #define I2DATA_BUFFER_BITMASK           ((0xFF))
00195
00196 /********************************************************************/
00200 #define I2C_I2ADR_GC                            ((1<<0))
00201
00202 #define I2C_I2ADR_BITMASK                       ((0xFF))
00203
00204 /********************************************************************/
00208 #define I2C_I2MASK_MASK(n)                      ((n&0xFE))
00209
00210 /********************************************************************/
00214 #define I2C_I2SCLH_BITMASK                      ((0xFFFF))
00215
00216 /********************************************************************/
00220 #define I2C_I2SCLL_BITMASK                      ((0xFFFF))
00221
00222 /* I2C status values */
00223 #define I2C_SETUP_STATUS_ARBF   (1<<8)
00224 #define I2C_SETUP_STATUS_NOACKF (1<<9)
00225 #define I2C_SETUP_STATUS_DONE   (1<<10)
00227 /*********************************************************************/
00230 #define I2C_MONITOR_CFG_SCL_OUTPUT      I2C_I2MMCTRL_ENA_SCL
00231 #define I2C_MONITOR_CFG_MATCHALL        I2C_I2MMCTRL_MATCH_ALL
00233 /* ---------------- CHECK PARAMETER DEFINITIONS ---------------------------- */
00234 /* Macros check I2C slave address */
00235 #define PARAM_I2C_SLAVEADDR_CH(n)       ((n>=0) && (n<=3))
00236
00238 #define PARAM_I2Cx(n)   ((((uint32_t *)n)==((uint32_t *)LPC_I2C0)) \
00239 || (((uint32_t *)n)==((uint32_t *)LPC_I2C1)) \
00240 || (((uint32_t *)n)==((uint32_t *)LPC_I2C2)))
00241
00242 /* Macros check I2C monitor configuration type */
00243 #define PARAM_I2C_MONITOR_CFG(n) ((n==I2C_MONITOR_CFG_SCL_OUTPUT) || (I2C_MONITOR_CFG_MATCHALL))
00244
00251 /* Public Types --------------------------------------------------------------- */
00259 typedef struct {
00260         uint8_t SlaveAddrChannel;
00263         uint8_t SlaveAddr_7bit;
00264         uint8_t GeneralCallState;
00269         uint8_t SlaveAddrMaskValue;
00277 } I2C_OWNSLAVEADDR_CFG_Type;
00278
00279
00283 typedef struct
00284 {
00285   uint32_t          sl_addr7bit;
00286   uint8_t*          tx_data;
00288   uint32_t          tx_length;
00290   uint32_t          tx_count;
00291   uint8_t*          rx_data;
00293   uint32_t          rx_length;
00295   uint32_t          rx_count;
00296   uint32_t          retransmissions_max;
00297   uint32_t          retransmissions_count;
00298   uint32_t          status;
00299   void                          (*callback)(void);
00301 } I2C_M_SETUP_Type;
00302
00303
00307 typedef struct
00308 {
00309   uint8_t*          tx_data;
00310   uint32_t          tx_length;
00311   uint32_t          tx_count;
00312   uint8_t*          rx_data;
00313   uint32_t          rx_length;
00314   uint32_t          rx_count;
00315   uint32_t          status;
00316   void                          (*callback)(void);
00317 } I2C_S_SETUP_Type;
00318
00322 typedef enum {
00323         I2C_TRANSFER_POLLING = 0,
00324         I2C_TRANSFER_INTERRUPT
00325 } I2C_TRANSFER_OPT_Type;
00326
00327
00333 /* Public Functions ----------------------------------------------------------- */
00338 /* I2C Init/DeInit functions ---------- */
00339 void I2C_Init(LPC_I2C_TypeDef *I2Cx, uint32_t clockrate);
00340 void I2C_DeInit(LPC_I2C_TypeDef* I2Cx);
00341 //void I2C_SetClock (LPC_I2C_TypeDef *I2Cx, uint32_t target_clock);
00342 void I2C_Cmd(LPC_I2C_TypeDef* I2Cx, FunctionalState NewState);
00343
00344 /* I2C transfer data functions -------- */
00345 Status I2C_MasterTransferData(LPC_I2C_TypeDef *I2Cx, \
00346                 I2C_M_SETUP_Type *TransferCfg, I2C_TRANSFER_OPT_Type Opt);
00347 Status I2C_SlaveTransferData(LPC_I2C_TypeDef *I2Cx, \
00348                 I2C_S_SETUP_Type *TransferCfg, I2C_TRANSFER_OPT_Type Opt);
00349 uint32_t I2C_MasterTransferComplete(LPC_I2C_TypeDef *I2Cx);
00350 uint32_t I2C_SlaveTransferComplete(LPC_I2C_TypeDef *I2Cx);
00351
00352
00353 void I2C_SetOwnSlaveAddr(LPC_I2C_TypeDef *I2Cx, I2C_OWNSLAVEADDR_CFG_Type *OwnSlaveAddrConfigStruct);
00354 uint8_t I2C_GetLastStatusCode(LPC_I2C_TypeDef* I2Cx);
00355
00356 /* I2C Monitor functions ---------------*/
00357 void I2C_MonitorModeConfig(LPC_I2C_TypeDef *I2Cx, uint32_t MonitorCfgType, FunctionalState NewState);
00358 void I2C_MonitorModeCmd(LPC_I2C_TypeDef *I2Cx, FunctionalState NewState);
00359 uint8_t I2C_MonitorGetDatabuffer(LPC_I2C_TypeDef *I2Cx);
00360 BOOL_8 I2C_MonitorHandler(LPC_I2C_TypeDef *I2Cx, uint8_t *buffer, uint32_t size);
00361
00362 /* I2C Interrupt handler functions ------*/
00363 void I2C_IntCmd (LPC_I2C_TypeDef *I2Cx, Bool NewState);
00364 void I2C_MasterHandler (LPC_I2C_TypeDef *I2Cx);
00365 void I2C_SlaveHandler (LPC_I2C_TypeDef *I2Cx);
00366
00367
00373 #ifdef __cplusplus
00374 }
00375 #endif
00376
00377 #endif /* LPC17XX_I2C_H_ */
00378
00383 /* --------------------------------- End Of File ------------------------------ */
Generated on Tue Jun 7 14:58:55 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Drivers/source/lpc17xx_i2s.c Source File

C:/nxpdrv/LPC1700CMSIS/Drivers/source/lpc17xx_i2s.c

Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          lpc17xx_i2s.c                           2010-09-23
00003 */
00027 /* Peripheral group ----------------------------------------------------------- */
00032 /* Includes ------------------------------------------------------------------- */
00033 #include "lpc17xx_i2s.h"
00034 #include "lpc17xx_clkpwr.h"
00035
00036
00037 /* If this source file built with example, the LPC17xx FW library configuration
00038  * file in each example directory ("lpc17xx_libcfg.h") must be included,
00039  * otherwise the default FW library configuration file must be included instead
00040  */
00041 #ifdef __BUILD_WITH_EXAMPLE__
00042 #include "lpc17xx_libcfg.h"
00043 #else
00044 #include "lpc17xx_libcfg_default.h"
00045 #endif /* __BUILD_WITH_EXAMPLE__ */
00046
00047
00048 #ifdef _I2S
00049
00050 /* Private Functions ---------------------------------------------------------- */
00051
00052 static uint8_t i2s_GetWordWidth(LPC_I2S_TypeDef *I2Sx, uint8_t TRMode);
00053 static uint8_t i2s_GetChannel(LPC_I2S_TypeDef *I2Sx, uint8_t TRMode);
00054
00055 /********************************************************************/
00063 static uint8_t i2s_GetWordWidth(LPC_I2S_TypeDef *I2Sx, uint8_t TRMode) {
00064         uint8_t value;
00065
00066         CHECK_PARAM(PARAM_I2Sx(I2Sx));
00067         CHECK_PARAM(PARAM_I2S_TRX(TRMode));
00068
00069         if (TRMode == I2S_TX_MODE) {
00070                 value = (I2Sx->I2SDAO) & 0x03; /* get wordwidth bit */
00071         } else {
00072                 value = (I2Sx->I2SDAI) & 0x03; /* get wordwidth bit */
00073         }
00074         switch (value) {
00075         case I2S_WORDWIDTH_8:
00076                 return 8;
00077         case I2S_WORDWIDTH_16:
00078                 return 16;
00079         default:
00080                 return 32;
00081         }
00082 }
00083
00084 /********************************************************************/
00092 static uint8_t i2s_GetChannel(LPC_I2S_TypeDef *I2Sx, uint8_t TRMode) {
00093         uint8_t value;
00094
00095         CHECK_PARAM(PARAM_I2Sx(I2Sx));
00096         CHECK_PARAM(PARAM_I2S_TRX(TRMode));
00097
00098         if (TRMode == I2S_TX_MODE) {
00099                 value = ((I2Sx->I2SDAO) & 0x04)>>2; /* get bit[2] */
00100         } else {
00101                 value = ((I2Sx->I2SDAI) & 0x04)>>2; /* get bit[2] */
00102         }
00103         if(value == I2S_MONO) return 1;
00104           return 2;
00105 }
00106
00107 /* End of Private Functions --------------------------------------------------- */
00108
00109
00110 /* Public Functions ----------------------------------------------------------- */
00115 /********************************************************************/
00121 void I2S_Init(LPC_I2S_TypeDef *I2Sx) {
00122         CHECK_PARAM(PARAM_I2Sx(I2Sx));
00123
00124         // Turn on power and clock
00125         CLKPWR_ConfigPPWR(CLKPWR_PCONP_PCI2S, ENABLE);
00126         LPC_I2S->I2SDAI = LPC_I2S->I2SDAO = 0x00;
00127 }
00128
00129 /********************************************************************/
00142 void I2S_Config(LPC_I2S_TypeDef *I2Sx, uint8_t TRMode, I2S_CFG_Type* ConfigStruct)
00143 {
00144         uint32_t bps, config;
00145
00146         CHECK_PARAM(PARAM_I2Sx(I2Sx));
00147
00148         CHECK_PARAM(PARAM_I2S_WORDWIDTH(ConfigStruct->wordwidth));
00149         CHECK_PARAM(PARAM_I2S_CHANNEL(ConfigStruct->mono));
00150         CHECK_PARAM(PARAM_I2S_STOP(ConfigStruct->stop));
00151         CHECK_PARAM(PARAM_I2S_RESET(ConfigStruct->reset));
00152         CHECK_PARAM(PARAM_I2S_WS_SEL(ConfigStruct->ws_sel));
00153         CHECK_PARAM(PARAM_I2S_MUTE(ConfigStruct->mute));
00154
00155         /* Setup clock */
00156         bps = (ConfigStruct->wordwidth +1)*8;
00157
00158         /* Calculate audio config */
00159         config = (bps - 1)<<6 | (ConfigStruct->ws_sel)<<5 | (ConfigStruct->reset)<<4 |
00160                 (ConfigStruct->stop)<<3 | (ConfigStruct->mono)<<2 | (ConfigStruct->wordwidth);
00161
00162         if(TRMode == I2S_RX_MODE){
00163                 LPC_I2S->I2SDAI = config;
00164         }else{
00165                 LPC_I2S->I2SDAO = config;
00166         }
00167 }
00168
00169 /********************************************************************/
00174 void I2S_DeInit(LPC_I2S_TypeDef *I2Sx) {
00175         CHECK_PARAM(PARAM_I2Sx(I2Sx));
00176
00177         // Turn off power and clock
00178         CLKPWR_ConfigPPWR(CLKPWR_PCONP_PCI2S, DISABLE);
00179 }
00180
00181 /********************************************************************/
00189 uint8_t I2S_GetLevel(LPC_I2S_TypeDef *I2Sx, uint8_t TRMode)
00190 {
00191         CHECK_PARAM(PARAM_I2Sx(I2Sx));
00192         CHECK_PARAM(PARAM_I2S_TRX(TRMode));
00193
00194         if(TRMode == I2S_TX_MODE)
00195         {
00196                 return ((I2Sx->I2SSTATE >> 16) & 0xFF);
00197         }
00198         else
00199         {
00200                 return ((I2Sx->I2SSTATE >> 8) & 0xFF);
00201         }
00202 }
00203
00204 /********************************************************************/
00209 void I2S_Start(LPC_I2S_TypeDef *I2Sx)
00210 {
00211         //Clear STOP,RESET and MUTE bit
00212         I2Sx->I2SDAO &= ~I2S_DAI_RESET;
00213         I2Sx->I2SDAI &= ~I2S_DAI_RESET;
00214         I2Sx->I2SDAO &= ~I2S_DAI_STOP;
00215         I2Sx->I2SDAI &= ~I2S_DAI_STOP;
00216         I2Sx->I2SDAO &= ~I2S_DAI_MUTE;
00217 }
00218
00219 /********************************************************************/
00225 void I2S_Send(LPC_I2S_TypeDef *I2Sx, uint32_t BufferData) {
00226         CHECK_PARAM(PARAM_I2Sx(I2Sx));
00227
00228         I2Sx->I2STXFIFO = BufferData;
00229 }
00230
00231 /********************************************************************/
00236 uint32_t I2S_Receive(LPC_I2S_TypeDef* I2Sx) {
00237         CHECK_PARAM(PARAM_I2Sx(I2Sx));
00238
00239         return (I2Sx->I2SRXFIFO);
00240
00241 }
00242
00243 /********************************************************************/
00251 void I2S_Pause(LPC_I2S_TypeDef *I2Sx, uint8_t TRMode) {
00252         CHECK_PARAM(PARAM_I2Sx(I2Sx));
00253         CHECK_PARAM(PARAM_I2S_TRX(TRMode));
00254
00255         if (TRMode == I2S_TX_MODE) //Transmit mode
00256         {
00257                 I2Sx->I2SDAO |= I2S_DAO_STOP;
00258         } else //Receive mode
00259         {
00260                 I2Sx->I2SDAI |= I2S_DAI_STOP;
00261         }
00262 }
00263
00264 /********************************************************************/
00272 void I2S_Mute(LPC_I2S_TypeDef *I2Sx, uint8_t TRMode) {
00273         CHECK_PARAM(PARAM_I2Sx(I2Sx));
00274         CHECK_PARAM(PARAM_I2S_TRX(TRMode));
00275
00276         if (TRMode == I2S_TX_MODE) //Transmit mode
00277         {
00278                 I2Sx->I2SDAO |= I2S_DAO_MUTE;
00279         } else //Receive mode
00280         {
00281                 I2Sx->I2SDAI |= I2S_DAI_MUTE;
00282         }
00283 }
00284
00285 /********************************************************************/
00293 void I2S_Stop(LPC_I2S_TypeDef *I2Sx, uint8_t TRMode) {
00294         CHECK_PARAM(PARAM_I2Sx(I2Sx));
00295         CHECK_PARAM(PARAM_I2S_TRX(TRMode));
00296
00297         if (TRMode == I2S_TX_MODE) //Transmit mode
00298         {
00299                 I2Sx->I2SDAO &= ~I2S_DAO_MUTE;
00300                 I2Sx->I2SDAO |= I2S_DAO_STOP;
00301                 I2Sx->I2SDAO |= I2S_DAO_RESET;
00302         } else //Receive mode
00303         {
00304                 I2Sx->I2SDAI |= I2S_DAI_STOP;
00305                 I2Sx->I2SDAI |= I2S_DAI_RESET;
00306         }
00307 }
00308
00309 /********************************************************************/
00319 Status I2S_FreqConfig(LPC_I2S_TypeDef *I2Sx, uint32_t Freq, uint8_t TRMode) {
00320
00321         uint32_t i2sMclk;
00322         uint8_t bitrate, channel, wordwidth;
00323
00324         CHECK_PARAM(PARAM_I2Sx(I2Sx));
00325         CHECK_PARAM(PRAM_I2S_FREQ(Freq));
00326         CHECK_PARAM(PARAM_I2S_TRX(TRMode));
00327
00328         //set i2s reference is i2s_pclk/2 as default
00329         i2sMclk = CLKPWR_GetPCLK(CLKPWR_PCLKSEL_I2S)/2;
00330         I2Sx->I2STXRATE = 1  | (1<<8);
00331         I2Sx->I2SRXRATE = 1  | (1<<8);
00332         if(TRMode == I2S_TX_MODE)
00333         {
00334                 channel = i2s_GetChannel(I2Sx,I2S_TX_MODE);
00335                 wordwidth = i2s_GetWordWidth(I2Sx,I2S_TX_MODE);
00336         }
00337         else
00338         {
00339                 channel = i2s_GetChannel(I2Sx,I2S_RX_MODE);
00340                 wordwidth = i2s_GetWordWidth(I2Sx,I2S_RX_MODE);
00341         }
00342         bitrate = i2sMclk/(Freq * channel * wordwidth) - 1;
00343         if (TRMode == I2S_TX_MODE)// Transmitter
00344         {
00345                 I2Sx->I2STXBITRATE = bitrate;
00346         } else //Receiver
00347         {
00348                 I2Sx->I2SRXBITRATE = bitrate;
00349         }
00350         return SUCCESS;
00351 }
00352
00353 /********************************************************************/
00363 void I2S_SetBitRate(LPC_I2S_TypeDef *I2Sx, uint8_t bitrate, uint8_t TRMode)
00364 {
00365         CHECK_PARAM(PARAM_I2Sx(I2Sx));
00366         CHECK_PARAM(PARAM_I2S_BITRATE(bitrate));
00367         CHECK_PARAM(PARAM_I2S_TRX(TRMode));
00368
00369         if(TRMode == I2S_TX_MODE)
00370         {
00371                 I2Sx->I2STXBITRATE = bitrate;
00372         }
00373         else
00374         {
00375                 I2Sx->I2SRXBITRATE = bitrate;
00376         }
00377 }
00378
00379 /********************************************************************/
00389 void I2S_ModeConfig(LPC_I2S_TypeDef *I2Sx, I2S_MODEConf_Type* ModeConfig,
00390                 uint8_t TRMode)
00391 {
00392         CHECK_PARAM(PARAM_I2Sx(I2Sx));
00393         CHECK_PARAM(PARAM_I2S_CLKSEL(ModeConfig->clksel));
00394         CHECK_PARAM(PARAM_I2S_4PIN(ModeConfig->fpin));
00395         CHECK_PARAM(PARAM_I2S_MCLK(ModeConfig->mcena));
00396         CHECK_PARAM(PARAM_I2S_TRX(TRMode));
00397
00398         if (TRMode == I2S_TX_MODE) {
00399                 I2Sx->I2STXMODE &= ~0x0F; //clear bit 3:0 in I2STXMODE register
00400                 if (ModeConfig->clksel == I2S_CLKSEL_MCLK) {
00401                         I2Sx->I2STXMODE |= 0x02;
00402                 }
00403                 if (ModeConfig->fpin == I2S_4PIN_ENABLE) {
00404                         I2Sx->I2STXMODE |= (1 << 2);
00405                 }
00406                 if (ModeConfig->mcena == I2S_MCLK_ENABLE) {
00407                         I2Sx->I2STXMODE |= (1 << 3);
00408                 }
00409         } else {
00410                 I2Sx->I2SRXMODE &= ~0x0F; //clear bit 3:0 in I2STXMODE register
00411                 if (ModeConfig->clksel == I2S_CLKSEL_MCLK) {
00412                         I2Sx->I2SRXMODE |= 0x02;
00413                 }
00414                 if (ModeConfig->fpin == I2S_4PIN_ENABLE) {
00415                         I2Sx->I2SRXMODE |= (1 << 2);
00416                 }
00417                 if (ModeConfig->mcena == I2S_MCLK_ENABLE) {
00418                         I2Sx->I2SRXMODE |= (1 << 3);
00419                 }
00420         }
00421 }
00422
00423 /********************************************************************/
00432 void I2S_DMAConfig(LPC_I2S_TypeDef *I2Sx, I2S_DMAConf_Type* DMAConfig,
00433                 uint8_t TRMode)
00434 {
00435         CHECK_PARAM(PARAM_I2Sx(I2Sx));
00436         CHECK_PARAM(PARAM_I2S_DMA(DMAConfig->DMAIndex));
00437         CHECK_PARAM(PARAM_I2S_DMA_DEPTH(DMAConfig->depth));
00438         CHECK_PARAM(PARAM_I2S_TRX(TRMode));
00439
00440         if (TRMode == I2S_RX_MODE) {
00441                 if (DMAConfig->DMAIndex == I2S_DMA_1) {
00442                         LPC_I2S->I2SDMA1 = (DMAConfig->depth) << 8;
00443                 } else {
00444                         LPC_I2S->I2SDMA2 = (DMAConfig->depth) << 8;
00445                 }
00446         } else {
00447                 if (DMAConfig->DMAIndex == I2S_DMA_1) {
00448                         LPC_I2S->I2SDMA1 = (DMAConfig->depth) << 16;
00449                 } else {
00450                         LPC_I2S->I2SDMA2 = (DMAConfig->depth) << 16;
00451                 }
00452         }
00453 }
00454
00455 /********************************************************************/
00469 void I2S_DMACmd(LPC_I2S_TypeDef *I2Sx, uint8_t DMAIndex, uint8_t TRMode,
00470                 FunctionalState NewState)
00471 {
00472         CHECK_PARAM(PARAM_I2Sx(I2Sx));
00473         CHECK_PARAM(PARAM_FUNCTIONALSTATE(NewState));
00474         CHECK_PARAM(PARAM_I2S_DMA(DMAIndex));
00475         CHECK_PARAM(PARAM_I2S_TRX(TRMode));
00476
00477         if (TRMode == I2S_RX_MODE) {
00478                 if (DMAIndex == I2S_DMA_1) {
00479                         if (NewState == ENABLE)
00480                                 I2Sx->I2SDMA1 |= 0x01;
00481                         else
00482                                 I2Sx->I2SDMA1 &= ~0x01;
00483                 } else {
00484                         if (NewState == ENABLE)
00485                                 I2Sx->I2SDMA2 |= 0x01;
00486                         else
00487                                 I2Sx->I2SDMA2 &= ~0x01;
00488                 }
00489         } else {
00490                 if (DMAIndex == I2S_DMA_1) {
00491                         if (NewState == ENABLE)
00492                                 I2Sx->I2SDMA1 |= 0x02;
00493                         else
00494                                 I2Sx->I2SDMA1 &= ~0x02;
00495                 } else {
00496                         if (NewState == ENABLE)
00497                                 I2Sx->I2SDMA2 |= 0x02;
00498                         else
00499                                 I2Sx->I2SDMA2 &= ~0x02;
00500                 }
00501         }
00502 }
00503
00504 /********************************************************************/
00513 void I2S_IRQConfig(LPC_I2S_TypeDef *I2Sx, uint8_t TRMode, uint8_t level) {
00514         CHECK_PARAM(PARAM_I2Sx(I2Sx));
00515         CHECK_PARAM(PARAM_I2S_TRX(TRMode));
00516         CHECK_PARAM(PARAM_I2S_IRQ_LEVEL(level));
00517
00518         if (TRMode == I2S_RX_MODE) {
00519                 I2Sx->I2SIRQ |= (level << 8);
00520         } else {
00521                 I2Sx->I2SIRQ |= (level << 16);
00522         }
00523 }
00524
00525 /********************************************************************/
00536 void I2S_IRQCmd(LPC_I2S_TypeDef *I2Sx, uint8_t TRMode, FunctionalState NewState) {
00537         CHECK_PARAM(PARAM_I2Sx(I2Sx));
00538         CHECK_PARAM(PARAM_FUNCTIONALSTATE(NewState));
00539
00540         if (TRMode == I2S_RX_MODE) {
00541                 if (NewState == ENABLE)
00542                         I2Sx->I2SIRQ |= 0x01;
00543                 else
00544                         I2Sx->I2SIRQ &= ~0x01;
00545                 //Enable DMA
00546
00547         } else {
00548                 if (NewState == ENABLE)
00549                         I2Sx->I2SIRQ |= 0x02;
00550                 else
00551                         I2Sx->I2SIRQ &= ~0x02;
00552         }
00553 }
00554
00555 /********************************************************************/
00565 FunctionalState I2S_GetIRQStatus(LPC_I2S_TypeDef *I2Sx,uint8_t TRMode)
00566 {
00567         CHECK_PARAM(PARAM_I2Sx(I2Sx));
00568         if(TRMode == I2S_TX_MODE)
00569                 return ((FunctionalState)((I2Sx->I2SIRQ >> 1)&0x01));
00570         else
00571                 return ((FunctionalState)((I2Sx->I2SIRQ)&0x01));
00572 }
00573
00574 /********************************************************************/
00582 uint8_t I2S_GetIRQDepth(LPC_I2S_TypeDef *I2Sx,uint8_t TRMode)
00583 {
00584         CHECK_PARAM(PARAM_I2Sx(I2Sx));
00585         if(TRMode == I2S_TX_MODE)
00586                 return (((I2Sx->I2SIRQ)>>16)&0xFF);
00587         else
00588                 return (((I2Sx->I2SIRQ)>>8)&0xFF);
00589 }
00594 #endif /* _I2S */
00595
00600 /* --------------------------------- End Of File ------------------------------ */
00601
Generated on Tue Jun 7 14:58:56 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_i2s.h Source File

C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_i2s.h

Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          lpc17xx_i2s.h                           2011-06-06
00003 */
00027 /* Peripheral group ----------------------------------------------------------- */
00033 #ifndef LPC17XX_I2S_H_
00034 #define LPC17XX_I2S_H_
00035
00036 /* Includes ------------------------------------------------------------------- */
00037 #include "LPC17xx.h"
00038 #include "lpc_types.h"
00039
00040
00041 #ifdef __cplusplus
00042 extern "C"
00043 {
00044 #endif
00045
00046 /* Public Macros -------------------------------------------------------------- */
00051 /*********************************************************************/
00055 #define I2S_WORDWIDTH_8         ((uint32_t)(0))
00056 #define I2S_WORDWIDTH_16        ((uint32_t)(1))
00057 #define I2S_WORDWIDTH_32        ((uint32_t)(3))
00058
00059 #define I2S_STEREO                      ((uint32_t)(0))
00060 #define I2S_MONO                        ((uint32_t)(1))
00061
00062 #define I2S_MASTER_MODE         ((uint8_t)(0))
00063 #define I2S_SLAVE_MODE          ((uint8_t)(1))
00064
00065 #define I2S_STOP_ENABLE         ((uint8_t)(1))
00066 #define I2S_STOP_DISABLE        ((uint8_t)(0))
00067
00068 #define I2S_RESET_ENABLE        ((uint8_t)(1))
00069 #define I2S_RESET_DISABLE       ((uint8_t)(0))
00070
00071 #define I2S_MUTE_ENABLE         ((uint8_t)(1))
00072 #define I2S_MUTE_DISABLE        ((uint8_t)(0))
00073
00074 #define I2S_TX_MODE                     ((uint8_t)(0))
00075 #define I2S_RX_MODE                     ((uint8_t)(1))
00076
00077 #define I2S_CLKSEL_FRDCLK       ((uint8_t)(0))
00078 #define I2S_CLKSEL_MCLK         ((uint8_t)(2))
00079
00080 #define I2S_4PIN_ENABLE         ((uint8_t)(1))
00081 #define I2S_4PIN_DISABLE        ((uint8_t)(0))
00082
00083 #define I2S_MCLK_ENABLE         ((uint8_t)(1))
00084 #define I2S_MCLK_DISABLE        ((uint8_t)(0))
00085
00086 #define I2S_DMA_1                       ((uint8_t)(0))
00087 #define I2S_DMA_2                       ((uint8_t)(1))
00088
00093 /* Private Macros ------------------------------------------------------------- */
00098 /*********************************************************************/
00102 #define I2S_DAO_WORDWIDTH_8             ((uint32_t)(0))
00103 #define I2S_DAO_WORDWIDTH_16    ((uint32_t)(1))
00104 #define I2S_DAO_WORDWIDTH_32    ((uint32_t)(3))
00106 #define I2S_DAO_MONO                    ((uint32_t)(1<<2))
00107
00108 #define I2S_DAO_STOP                    ((uint32_t)(1<<3))
00109
00110 #define I2S_DAO_RESET                   ((uint32_t)(1<<4))
00111
00112 #define I2S_DAO_SLAVE                   ((uint32_t)(1<<5))
00113
00114 #define I2S_DAO_WS_HALFPERIOD(n)        ((uint32_t)(n<<6))
00115
00116 #define I2S_DAO_MUTE                    ((uint32_t)(1<<15))
00117
00118 /*********************************************************************/
00122 #define I2S_DAI_WORDWIDTH_8             ((uint32_t)(0))
00123 #define I2S_DAI_WORDWIDTH_16    ((uint32_t)(1))
00124 #define I2S_DAI_WORDWIDTH_32    ((uint32_t)(3))
00126 #define I2S_DAI_MONO                    ((uint32_t)(1<<2))
00127
00128 #define I2S_DAI_STOP                    ((uint32_t)(1<<3))
00129
00130 #define I2S_DAI_RESET                   ((uint32_t)(1<<4))
00131
00132 #define I2S_DAI_SLAVE                   ((uint32_t)(1<<5))
00133
00134 #define I2S_DAI_WS_HALFPERIOD(n)        ((uint32_t)((n&0x1FF)<<6))
00135
00136 #define I2S_DAI_MUTE                    ((uint32_t)(1<<15))
00137
00138 /*********************************************************************/
00142 #define I2S_STATE_IRQ           ((uint32_t)(1))
00143
00144 #define I2S_STATE_DMA1          ((uint32_t)(1<<1))
00145
00146 #define I2S_STATE_DMA2          ((uint32_t)(1<<2))
00147
00148 #define I2S_STATE_RX_LEVEL(n)   ((uint32_t)((n&1F)<<8))
00149
00150 #define I2S_STATE_TX_LEVEL(n)   ((uint32_t)((n&1F)<<16))
00151
00152 /*********************************************************************/
00156 #define I2S_DMA1_RX_ENABLE              ((uint32_t)(1))
00157
00158 #define I2S_DMA1_TX_ENABLE              ((uint32_t)(1<<1))
00159
00160 #define I2S_DMA1_RX_DEPTH(n)    ((uint32_t)((n&0x1F)<<8))
00161
00162 #define I2S_DMA1_TX_DEPTH(n)    ((uint32_t)((n&0x1F)<<16))
00163
00164 /*********************************************************************/
00168 #define I2S_DMA2_RX_ENABLE              ((uint32_t)(1))
00169
00170 #define I2S_DMA2_TX_ENABLE              ((uint32_t)(1<<1))
00171
00172 #define I2S_DMA2_RX_DEPTH(n)    ((uint32_t)((n&0x1F)<<8))
00173
00174 #define I2S_DMA2_TX_DEPTH(n)    ((uint32_t)((n&0x1F)<<16))
00175
00176 /*********************************************************************/
00180 #define I2S_IRQ_RX_ENABLE               ((uint32_t)(1))
00181
00182 #define I2S_IRQ_TX_ENABLE               ((uint32_t)(1<<1))
00183
00184 #define I2S_IRQ_RX_DEPTH(n)             ((uint32_t)((n&0x1F)<<8))
00185
00186 #define I2S_IRQ_TX_DEPTH(n)             ((uint32_t)((n&0x1F)<<16))
00187
00188 /********************************************************************************/
00192 #define I2S_TXRATE_Y_DIVIDER(n) ((uint32_t)(n&0xFF))
00193
00194 #define I2S_TXRATE_X_DIVIDER(n) ((uint32_t)((n&0xFF)<<8))
00195
00196 #define I2S_RXRATE_Y_DIVIDER(n) ((uint32_t)(n&0xFF))
00197
00198 #define I2S_RXRATE_X_DIVIDER(n) ((uint32_t)((n&0xFF)<<8))
00199
00200 /*************************************************************************************/
00203 #define I2S_TXBITRATE(n)        ((uint32_t)(n&0x3F))
00204 #define I2S_RXBITRATE(n)        ((uint32_t)(n&0x3F))
00205
00206 /**********************************************************************************/
00210 #define I2S_TXMODE_CLKSEL(n)    ((uint32_t)(n&0x03))
00211
00212 #define I2S_TXMODE_4PIN_ENABLE  ((uint32_t)(1<<2))
00213
00214 #define I2S_TXMODE_MCENA                ((uint32_t)(1<<3))
00215
00216 #define I2S_RXMODE_CLKSEL(n)    ((uint32_t)(n&0x03))
00217
00218 #define I2S_RXMODE_4PIN_ENABLE  ((uint32_t)(1<<2))
00219
00220 #define I2S_RXMODE_MCENA                ((uint32_t)(1<<3))
00221
00222
00223 /* ---------------- CHECK PARAMETER DEFINITIONS ---------------------------- */
00225 #define PARAM_I2Sx(n)   (((uint32_t *)n)==((uint32_t *)LPC_I2S))
00226
00227 #define PRAM_I2S_FREQ(freq)             ((freq>=16000)&&(freq <= 96000))
00228 /* Macro check I2S word width type */
00229 #define PARAM_I2S_WORDWIDTH(n)  ((n==I2S_WORDWIDTH_8)||(n==I2S_WORDWIDTH_16)\
00230 ||(n==I2S_WORDWIDTH_32))
00231 /* Macro check I2S channel type */
00232 #define PARAM_I2S_CHANNEL(n)    ((n==I2S_STEREO)||(n==I2S_MONO))
00233 /* Macro check I2S master/slave mode */
00234 #define PARAM_I2S_WS_SEL(n)             ((n==I2S_MASTER_MODE)||(n==I2S_SLAVE_MODE))
00235 /* Macro check I2S stop mode */
00236 #define PARAM_I2S_STOP(n)       ((n==I2S_STOP_ENABLE)||(n==I2S_STOP_DISABLE))
00237 /* Macro check I2S reset mode */
00238 #define PARAM_I2S_RESET(n)      ((n==I2S_RESET_ENABLE)||(n==I2S_RESET_DISABLE))
00239 /* Macro check I2S reset mode */
00240 #define PARAM_I2S_MUTE(n)       ((n==I2S_MUTE_ENABLE)||(n==I2S_MUTE_DISABLE))
00241 /* Macro check I2S transmit/receive mode */
00242 #define PARAM_I2S_TRX(n)                ((n==I2S_TX_MODE)||(n==I2S_RX_MODE))
00243 /* Macro check I2S clock select mode */
00244 #define PARAM_I2S_CLKSEL(n)             ((n==I2S_CLKSEL_FRDCLK)||(n==I2S_CLKSEL_MCLK))
00245 /* Macro check I2S 4-pin mode */
00246 #define PARAM_I2S_4PIN(n)       ((n==I2S_4PIN_ENABLE)||(n==I2S_4PIN_DISABLE))
00247 /* Macro check I2S MCLK mode */
00248 #define PARAM_I2S_MCLK(n)       ((n==I2S_MCLK_ENABLE)||(n==I2S_MCLK_DISABLE))
00249 /* Macro check I2S DMA mode */
00250 #define PARAM_I2S_DMA(n)                ((n==I2S_DMA_1)||(n==I2S_DMA_2))
00251 /* Macro check I2S DMA depth value */
00252 #define PARAM_I2S_DMA_DEPTH(n)  (n<=31)
00253 /* Macro check I2S irq level value */
00254 #define PARAM_I2S_IRQ_LEVEL(n)  (n<=31)
00255 /* Macro check I2S half-period value */
00256 #define PARAM_I2S_HALFPERIOD(n) (n<512)
00257 /* Macro check I2S bit-rate value */
00258 #define PARAM_I2S_BITRATE(n)    (n<=63)
00259
00265 /* Public Types --------------------------------------------------------------- */
00273 typedef struct {
00274         uint8_t wordwidth;
00278         uint8_t mono;
00281         uint8_t stop;
00284         uint8_t reset;
00287         uint8_t ws_sel;
00290         uint8_t mute;
00293         uint8_t Reserved0[2];
00294 } I2S_CFG_Type;
00295
00299 typedef struct {
00300         uint8_t DMAIndex;
00303         uint8_t depth;
00304         uint8_t Reserved0[2];
00305 }I2S_DMAConf_Type;
00306
00310 typedef struct{
00311         uint8_t clksel;
00314         uint8_t fpin;
00317         uint8_t mcena;
00320         uint8_t Reserved;
00321 }I2S_MODEConf_Type;
00322
00323
00329 /* Public Functions ----------------------------------------------------------- */
00333 /* I2S Init/DeInit functions ---------*/
00334 void I2S_Init(LPC_I2S_TypeDef *I2Sx);
00335 void I2S_DeInit(LPC_I2S_TypeDef *I2Sx);
00336
00337 /* I2S configuration functions --------*/
00338 void I2S_Config(LPC_I2S_TypeDef *I2Sx, uint8_t TRMode, I2S_CFG_Type* ConfigStruct);
00339 Status I2S_FreqConfig(LPC_I2S_TypeDef *I2Sx, uint32_t Freq, uint8_t TRMode);
00340 void I2S_SetBitRate(LPC_I2S_TypeDef *I2Sx, uint8_t bitrate, uint8_t TRMode);
00341 void I2S_ModeConfig(LPC_I2S_TypeDef *I2Sx, I2S_MODEConf_Type* ModeConfig, uint8_t TRMode);
00342 uint8_t I2S_GetLevel(LPC_I2S_TypeDef *I2Sx, uint8_t TRMode);
00343
00344 /* I2S operate functions -------------*/
00345 void I2S_Send(LPC_I2S_TypeDef *I2Sx, uint32_t BufferData);
00346 uint32_t I2S_Receive(LPC_I2S_TypeDef* I2Sx);
00347 void I2S_Start(LPC_I2S_TypeDef *I2Sx);
00348 void I2S_Pause(LPC_I2S_TypeDef *I2Sx, uint8_t TRMode);
00349 void I2S_Mute(LPC_I2S_TypeDef *I2Sx, uint8_t TRMode);
00350 void I2S_Stop(LPC_I2S_TypeDef *I2Sx, uint8_t TRMode);
00351
00352 /* I2S DMA functions ----------------*/
00353 void I2S_DMAConfig(LPC_I2S_TypeDef *I2Sx, I2S_DMAConf_Type* DMAConfig, uint8_t TRMode);
00354 void I2S_DMACmd(LPC_I2S_TypeDef *I2Sx, uint8_t DMAIndex,uint8_t TRMode, FunctionalState NewState);
00355
00356 /* I2S IRQ functions ----------------*/
00357 void I2S_IRQCmd(LPC_I2S_TypeDef *I2Sx,uint8_t TRMode, FunctionalState NewState);
00358 void I2S_IRQConfig(LPC_I2S_TypeDef *I2Sx, uint8_t TRMode, uint8_t level);
00359 FunctionalState I2S_GetIRQStatus(LPC_I2S_TypeDef *I2Sx,uint8_t TRMode);
00360 uint8_t I2S_GetIRQDepth(LPC_I2S_TypeDef *I2Sx,uint8_t TRMode);
00361
00367 #ifdef __cplusplus
00368 }
00369 #endif
00370
00371
00372 #endif /* LPC17XX_SSP_H_ */
00373
00378 /* --------------------------------- End Of File ------------------------------ */
Generated on Tue Jun 7 14:58:55 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Drivers/source/lpc17xx_libcfg_default.c Source File

C:/nxpdrv/LPC1700CMSIS/Drivers/source/lpc17xx_libcfg_default.c

Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          lpc17xx_libcfg_default.c                                2010-05-21
00003 */
00027 /* Library group ----------------------------------------------------------- */
00032 /* Includes ------------------------------------------------------------------- */
00033 #include "lpc17xx_libcfg_default.h"
00034
00035 /* Public Functions ----------------------------------------------------------- */
00040 #ifndef __BUILD_WITH_EXAMPLE__
00041
00042 #ifdef  DEBUG
00043 /*******************************************************************************
00044 * @brief                Reports the name of the source file and the source line number
00045 *                               where the CHECK_PARAM error has occurred.
00046 * @param[in]    file Pointer to the source file name
00047 * @param[in]    line assert_param error line source number
00048 * @return               None
00049 *******************************************************************************/
00050 void check_failed(uint8_t *file, uint32_t line)
00051 {
00052         /* User can add his own implementation to report the file name and line number,
00053          ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
00054
00055         /* Infinite loop */
00056         while(1);
00057 }
00058 #endif /* DEBUG */
00059
00060 #endif /* __BUILD_WITH_EXAMPLE__ */
00061
00070 /* --------------------------------- End Of File ------------------------------ */
Generated on Tue Jun 7 14:58:56 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_libcfg_default.h Source File

C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_libcfg_default.h

Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          lpc17xx_libcfg_default.h                                2010-05-21
00003 */
00026 /* Library Configuration group ----------------------------------------------------------- */
00032 #ifndef LPC17XX_LIBCFG_DEFAULT_H_
00033 #define LPC17XX_LIBCFG_DEFAULT_H_
00034
00035 /* Includes ------------------------------------------------------------------- */
00036 #include "lpc_types.h"
00037
00038
00039 /* Public Macros -------------------------------------------------------------- */
00044 /************************** DEBUG MODE DEFINITIONS *********************************/
00045 /* Un-comment the line below to compile the library in DEBUG mode, this will expanse
00046    the "CHECK_PARAM" macro in the FW library code */
00047
00048 #define DEBUG
00049
00050
00051 /******************* PERIPHERAL FW LIBRARY CONFIGURATION DEFINITIONS ***********************/
00052 /* Comment the line below to disable the specific peripheral inclusion */
00053
00054 /* DEBUG_FRAMWORK ------------------------------ */
00055 #define _DBGFWK
00056
00057 /* GPIO ------------------------------- */
00058 #define _GPIO
00059
00060 /* EXTI ------------------------------- */
00061 #define _EXTI
00062
00063 /* UART ------------------------------- */
00064 #define _UART
00065 #define _UART0
00066 #define _UART1
00067 #define _UART2
00068 #define _UART3
00069
00070 /* SPI ------------------------------- */
00071 #define _SPI
00072
00073 /* SYSTICK --------------------------- */
00074 #define _SYSTICK
00075
00076 /* SSP ------------------------------- */
00077 #define _SSP
00078 #define _SSP0
00079 #define _SSP1
00080
00081
00082 /* I2C ------------------------------- */
00083 #define _I2C
00084 #define _I2C0
00085 #define _I2C1
00086 #define _I2C2
00087
00088 /* TIMER ------------------------------- */
00089 #define _TIM
00090
00091 /* WDT ------------------------------- */
00092 #define _WDT
00093
00094
00095 /* GPDMA ------------------------------- */
00096 #define _GPDMA
00097
00098
00099 /* DAC ------------------------------- */
00100 #define _DAC
00101
00102 /* DAC ------------------------------- */
00103 #define _ADC
00104
00105
00106 /* PWM ------------------------------- */
00107 #define _PWM
00108 #define _PWM1
00109
00110 /* RTC ------------------------------- */
00111 #define _RTC
00112
00113 /* I2S ------------------------------- */
00114 #define _I2S
00115
00116 /* USB device ------------------------------- */
00117 #define _USBDEV
00118 #define _USB_DMA
00119
00120 /* QEI ------------------------------- */
00121 #define _QEI
00122
00123 /* MCPWM ------------------------------- */
00124 #define _MCPWM
00125
00126 /* CAN--------------------------------*/
00127 #define _CAN
00128
00129 /* RIT ------------------------------- */
00130 #define _RIT
00131
00132 /* EMAC ------------------------------ */
00133 #define _EMAC
00134
00135 /************************** GLOBAL/PUBLIC MACRO DEFINITIONS *********************************/
00136
00137 #ifdef  DEBUG
00138 /*******************************************************************************
00139 * @brief                The CHECK_PARAM macro is used for function's parameters check.
00140 *                               It is used only if the library is compiled in DEBUG mode.
00141 * @param[in]    expr - If expr is false, it calls check_failed() function
00142 *                       which reports the name of the source file and the source
00143 *                       line number of the call that failed.
00144 *                    - If expr is true, it returns no value.
00145 * @return               None
00146 *******************************************************************************/
00147 #define CHECK_PARAM(expr) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))
00148 #else
00149 #define CHECK_PARAM(expr)
00150 #endif /* DEBUG */
00151
00157 /* Public Functions ----------------------------------------------------------- */
00162 #ifdef  DEBUG
00163 void check_failed(uint8_t *file, uint32_t line);
00164 #endif
00165
00170 #endif /* LPC17XX_LIBCFG_DEFAULT_H_ */
00171
00176 /* --------------------------------- End Of File ------------------------------ */
Generated on Tue Jun 7 14:58:55 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Drivers/source/lpc17xx_mcpwm.c Source File

C:/nxpdrv/LPC1700CMSIS/Drivers/source/lpc17xx_mcpwm.c

Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          lpc17xx_mcpwm.c                         2010-05-21
00003 */
00027 /* Peripheral group ----------------------------------------------------------- */
00032 /* Includes ------------------------------------------------------------------- */
00033 #include "lpc17xx_mcpwm.h"
00034 #include "lpc17xx_clkpwr.h"
00035
00036 /* If this source file built with example, the LPC17xx FW library configuration
00037  * file in each example directory ("lpc17xx_libcfg.h") must be included,
00038  * otherwise the default FW library configuration file must be included instead
00039  */
00040 #ifdef __BUILD_WITH_EXAMPLE__
00041 #include "lpc17xx_libcfg.h"
00042 #else
00043 #include "lpc17xx_libcfg_default.h"
00044 #endif /* __BUILD_WITH_EXAMPLE__ */
00045
00046
00047 #ifdef _MCPWM
00048
00049 /* Public Functions ----------------------------------------------------------- */
00054 /*********************************************************************/
00060 void MCPWM_Init(LPC_MCPWM_TypeDef *MCPWMx)
00061 {
00062
00063         /* Turn On MCPWM PCLK */
00064         CLKPWR_ConfigPPWR (CLKPWR_PCONP_PCMC, ENABLE);
00065         /* As default, peripheral clock for MCPWM module
00066          * is set to FCCLK / 2 */
00067         // CLKPWR_SetPCLKDiv(CLKPWR_PCLKSEL_MC, CLKPWR_PCLKSEL_CCLK_DIV_2);
00068
00069         MCPWMx->MCCAP_CLR = MCPWM_CAPCLR_CAP(0) | MCPWM_CAPCLR_CAP(1) | MCPWM_CAPCLR_CAP(2);
00070         MCPWMx->MCINTFLAG_CLR = MCPWM_INT_ILIM(0) | MCPWM_INT_ILIM(1) | MCPWM_INT_ILIM(2) \
00071                                                         | MCPWM_INT_IMAT(0) | MCPWM_INT_IMAT(1) | MCPWM_INT_IMAT(2) \
00072                                                         | MCPWM_INT_ICAP(0) | MCPWM_INT_ICAP(1) | MCPWM_INT_ICAP(2);
00073         MCPWMx->MCINTEN_CLR = MCPWM_INT_ILIM(0) | MCPWM_INT_ILIM(1) | MCPWM_INT_ILIM(2) \
00074                                                         | MCPWM_INT_IMAT(0) | MCPWM_INT_IMAT(1) | MCPWM_INT_IMAT(2) \
00075                                                         | MCPWM_INT_ICAP(0) | MCPWM_INT_ICAP(1) | MCPWM_INT_ICAP(2);
00076 }
00077
00078
00079 /*********************************************************************/
00090 void MCPWM_ConfigChannel(LPC_MCPWM_TypeDef *MCPWMx, uint32_t channelNum,
00091                                                 MCPWM_CHANNEL_CFG_Type * channelSetup)
00092 {
00093         if ((channelNum >= 0) && (channelNum <= 2)) {
00094                 if (channelNum == 0) {
00095                         MCPWMx->MCTIM0 = channelSetup->channelTimercounterValue;
00096                         MCPWMx->MCPER0 = channelSetup->channelPeriodValue;
00097                         MCPWMx->MCPW0 = channelSetup->channelPulsewidthValue;
00098                 } else if (channelNum == 1) {
00099                         MCPWMx->MCTIM1 = channelSetup->channelTimercounterValue;
00100                         MCPWMx->MCPER1 = channelSetup->channelPeriodValue;
00101                         MCPWMx->MCPW1 = channelSetup->channelPulsewidthValue;
00102                 } else if (channelNum == 2) {
00103                         MCPWMx->MCTIM2 = channelSetup->channelTimercounterValue;
00104                         MCPWMx->MCPER2 = channelSetup->channelPeriodValue;
00105                         MCPWMx->MCPW2 = channelSetup->channelPulsewidthValue;
00106                 } else {
00107                         return;
00108                 }
00109
00110                 if (channelSetup->channelType /* == MCPWM_CHANNEL_CENTER_MODE */){
00111                         MCPWMx->MCCON_SET = MCPWM_CON_CENTER(channelNum);
00112                 } else {
00113                         MCPWMx->MCCON_CLR = MCPWM_CON_CENTER(channelNum);
00114                 }
00115
00116                 if (channelSetup->channelPolarity /* == MCPWM_CHANNEL_PASSIVE_HI */){
00117                         MCPWMx->MCCON_SET = MCPWM_CON_POLAR(channelNum);
00118                 } else {
00119                         MCPWMx->MCCON_CLR = MCPWM_CON_POLAR(channelNum);
00120                 }
00121
00122                 if (channelSetup->channelDeadtimeEnable /* == ENABLE */){
00123                         MCPWMx->MCCON_SET = MCPWM_CON_DTE(channelNum);
00124                         MCPWMx->MCDEADTIME &= ~(MCPWM_DT(channelNum, 0x3FF));
00125                         MCPWMx->MCDEADTIME |= MCPWM_DT(channelNum, channelSetup->channelDeadtimeValue);
00126                 } else {
00127                         MCPWMx->MCCON_CLR = MCPWM_CON_DTE(channelNum);
00128                 }
00129
00130                 if (channelSetup->channelUpdateEnable /* == ENABLE */){
00131                         MCPWMx->MCCON_CLR = MCPWM_CON_DISUP(channelNum);
00132                 } else {
00133                         MCPWMx->MCCON_SET = MCPWM_CON_DISUP(channelNum);
00134                 }
00135         }
00136 }
00137
00138
00139 /*********************************************************************/
00150 void MCPWM_WriteToShadow(LPC_MCPWM_TypeDef *MCPWMx, uint32_t channelNum,
00151                                                                 MCPWM_CHANNEL_CFG_Type *channelSetup)
00152 {
00153         if (channelNum == 0){
00154                 MCPWMx->MCPER0 = channelSetup->channelPeriodValue;
00155                 MCPWMx->MCPW0 = channelSetup->channelPulsewidthValue;
00156         } else if (channelNum == 1) {
00157                 MCPWMx->MCPER1 = channelSetup->channelPeriodValue;
00158                 MCPWMx->MCPW1 = channelSetup->channelPulsewidthValue;
00159         } else if (channelNum == 2) {
00160                 MCPWMx->MCPER2 = channelSetup->channelPeriodValue;
00161                 MCPWMx->MCPW2 = channelSetup->channelPulsewidthValue;
00162         }
00163 }
00164
00165
00166
00167 /*********************************************************************/
00178 void MCPWM_ConfigCapture(LPC_MCPWM_TypeDef *MCPWMx, uint32_t channelNum,
00179                                                 MCPWM_CAPTURE_CFG_Type *captureConfig)
00180 {
00181         if ((channelNum >= 0) && (channelNum <= 2)) {
00182
00183                 if (captureConfig->captureFalling /* == ENABLE */) {
00184                         MCPWMx->MCCAPCON_SET = MCPWM_CAPCON_CAPMCI_FE(captureConfig->captureChannel, channelNum);
00185                 } else {
00186                         MCPWMx->MCCAPCON_CLR = MCPWM_CAPCON_CAPMCI_FE(captureConfig->captureChannel, channelNum);
00187                 }
00188
00189                 if (captureConfig->captureRising /* == ENABLE */) {
00190                         MCPWMx->MCCAPCON_SET = MCPWM_CAPCON_CAPMCI_RE(captureConfig->captureChannel, channelNum);
00191                 } else {
00192                         MCPWMx->MCCAPCON_CLR = MCPWM_CAPCON_CAPMCI_RE(captureConfig->captureChannel, channelNum);
00193                 }
00194
00195                 if (captureConfig->timerReset /* == ENABLE */){
00196                         MCPWMx->MCCAPCON_SET = MCPWM_CAPCON_RT(captureConfig->captureChannel);
00197                 } else {
00198                         MCPWMx->MCCAPCON_CLR = MCPWM_CAPCON_RT(captureConfig->captureChannel);
00199                 }
00200
00201                 if (captureConfig->hnfEnable /* == ENABLE */){
00202                         MCPWMx->MCCAPCON_SET = MCPWM_CAPCON_HNFCAP(channelNum);
00203                 } else {
00204                         MCPWMx->MCCAPCON_CLR = MCPWM_CAPCON_HNFCAP(channelNum);
00205                 }
00206         }
00207 }
00208
00209
00210 /*********************************************************************/
00217 void MCPWM_ClearCapture(LPC_MCPWM_TypeDef *MCPWMx, uint32_t captureChannel)
00218 {
00219         MCPWMx->MCCAP_CLR = MCPWM_CAPCLR_CAP(captureChannel);
00220 }
00221
00222 /*********************************************************************/
00229 uint32_t MCPWM_GetCapture(LPC_MCPWM_TypeDef *MCPWMx, uint32_t captureChannel)
00230 {
00231         if (captureChannel == 0){
00232                 return (MCPWMx->MCCR0);
00233         } else if (captureChannel == 1) {
00234                 return (MCPWMx->MCCR1);
00235         } else if (captureChannel == 2) {
00236                 return (MCPWMx->MCCR2);
00237         }
00238         return (0);
00239 }
00240
00241
00242 /*********************************************************************/
00255 void MCPWM_CountConfig(LPC_MCPWM_TypeDef *MCPWMx, uint32_t channelNum,
00256                                         uint32_t countMode, MCPWM_COUNT_CFG_Type *countConfig)
00257 {
00258         if ((channelNum >= 0) && (channelNum <= 2)) {
00259                 if (countMode /* == ENABLE */){
00260                         MCPWMx->MCCNTCON_SET = MCPWM_CNTCON_CNTR(channelNum);
00261                         if (countConfig->countFalling /* == ENABLE */) {
00262                                 MCPWMx->MCCNTCON_SET = MCPWM_CNTCON_TCMCI_FE(countConfig->counterChannel,channelNum);
00263                         } else {
00264                                 MCPWMx->MCCNTCON_CLR = MCPWM_CNTCON_TCMCI_FE(countConfig->counterChannel,channelNum);
00265                         }
00266                         if (countConfig->countRising /* == ENABLE */) {
00267                                 MCPWMx->MCCNTCON_SET = MCPWM_CNTCON_TCMCI_RE(countConfig->counterChannel,channelNum);
00268                         } else {
00269                                 MCPWMx->MCCNTCON_CLR = MCPWM_CNTCON_TCMCI_RE(countConfig->counterChannel,channelNum);
00270                         }
00271                 } else {
00272                         MCPWMx->MCCNTCON_CLR = MCPWM_CNTCON_CNTR(channelNum);
00273                 }
00274         }
00275 }
00276
00277
00278 /*********************************************************************/
00293 void MCPWM_Start(LPC_MCPWM_TypeDef *MCPWMx, uint32_t channel0,
00294                                         uint32_t channel1, uint32_t channel2)
00295 {
00296         uint32_t regVal = 0;
00297         regVal = (channel0 ? MCPWM_CON_RUN(0) : 0) | (channel1 ? MCPWM_CON_RUN(1) : 0) \
00298                                 | (channel2 ? MCPWM_CON_RUN(2) : 0);
00299         MCPWMx->MCCON_SET = regVal;
00300 }
00301
00302
00303 /*********************************************************************/
00318 void MCPWM_Stop(LPC_MCPWM_TypeDef *MCPWMx, uint32_t channel0,
00319                 uint32_t channel1, uint32_t channel2)
00320 {
00321         uint32_t regVal = 0;
00322         regVal = (channel0 ? MCPWM_CON_RUN(0) : 0) | (channel1 ? MCPWM_CON_RUN(1) : 0) \
00323                                 | (channel2 ? MCPWM_CON_RUN(2) : 0);
00324         MCPWMx->MCCON_CLR = regVal;
00325 }
00326
00327
00328 /*********************************************************************/
00337 void MCPWM_ACMode(LPC_MCPWM_TypeDef *MCPWMx, uint32_t acMode)
00338 {
00339         if (acMode){
00340                 MCPWMx->MCCON_SET = MCPWM_CON_ACMODE;
00341         } else {
00342                 MCPWMx->MCCON_CLR = MCPWM_CON_ACMODE;
00343         }
00344 }
00345
00346
00347 /*********************************************************************/
00372 void MCPWM_DCMode(LPC_MCPWM_TypeDef *MCPWMx, uint32_t dcMode,
00373                                         uint32_t outputInvered, uint32_t outputPattern)
00374 {
00375         if (dcMode){
00376                 MCPWMx->MCCON_SET = MCPWM_CON_DCMODE;
00377         } else {
00378                 MCPWMx->MCCON_CLR = MCPWM_CON_DCMODE;
00379         }
00380
00381         if (outputInvered) {
00382                 MCPWMx->MCCON_SET = MCPWM_CON_INVBDC;
00383         } else {
00384                 MCPWMx->MCCON_CLR = MCPWM_CON_INVBDC;
00385         }
00386
00387         MCPWMx->MCCCP = outputPattern;
00388 }
00389
00390
00391 /*********************************************************************/
00413 void MCPWM_IntConfig(LPC_MCPWM_TypeDef *MCPWMx, uint32_t ulIntType, FunctionalState NewState)
00414 {
00415         if (NewState) {
00416                 MCPWMx->MCINTEN_SET = ulIntType;
00417         } else {
00418                 MCPWMx->MCINTEN_CLR = ulIntType;
00419         }
00420 }
00421
00422
00423 /*********************************************************************/
00441 void MCPWM_IntSet(LPC_MCPWM_TypeDef *MCPWMx, uint32_t ulIntType)
00442 {
00443         MCPWMx->MCINTFLAG_SET = ulIntType;
00444 }
00445
00446
00447 /*********************************************************************/
00465 void MCPWM_IntClear(LPC_MCPWM_TypeDef *MCPWMx, uint32_t ulIntType)
00466 {
00467         MCPWMx->MCINTFLAG_CLR = ulIntType;
00468 }
00469
00470
00471 /*********************************************************************/
00488 FlagStatus MCPWM_GetIntStatus(LPC_MCPWM_TypeDef *MCPWMx, uint32_t ulIntType)
00489 {
00490         return ((MCPWMx->MCINTFLAG & ulIntType) ? SET : RESET);
00491 }
00492
00497 #endif /* _MCPWM */
00498
00503 /* --------------------------------- End Of File ------------------------------ */
Generated on Tue Jun 7 14:58:56 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_mcpwm.h Source File

C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_mcpwm.h

Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          lpc17xx_mcpwm.h                         2010-05-21
00003 */
00027 /* Peripheral group ----------------------------------------------------------- */
00033 #ifndef LPC17XX_MCPWM_H_
00034 #define LPC17XX_MCPWM_H_
00035
00036 /* Includes ------------------------------------------------------------------- */
00037 #include "LPC17xx.h"
00038 #include "lpc_types.h"
00039
00040
00041 #ifdef __cplusplus
00042 extern "C"
00043 {
00044 #endif
00045
00046 /* Public Macros -------------------------------------------------------------- */
00053 #define MCPWM_CHANNEL_EDGE_MODE                 ((uint32_t)(0))
00054
00055 #define MCPWM_CHANNEL_CENTER_MODE               ((uint32_t)(1))
00056
00058 #define MCPWM_CHANNEL_PASSIVE_LO                ((uint32_t)(0))
00059
00060 #define MCPWM_CHANNEL_PASSIVE_HI                ((uint32_t)(1))
00061
00062 /* Output Patent in 3-phase DC mode, the internal MCOA0 signal is routed to any or all of
00063  * the six output pins under the control of the bits in this register */
00064 #define MCPWM_PATENT_A0         ((uint32_t)(1<<0))
00065 #define MCPWM_PATENT_B0         ((uint32_t)(1<<1))
00066 #define MCPWM_PATENT_A1         ((uint32_t)(1<<2))
00067 #define MCPWM_PATENT_B1         ((uint32_t)(1<<3))
00068 #define MCPWM_PATENT_A2         ((uint32_t)(1<<4))
00069 #define MCPWM_PATENT_B2         ((uint32_t)(1<<5))
00071 /* Interrupt type in MCPWM */
00072
00073 #define MCPWM_INTFLAG_LIM0      MCPWM_INT_ILIM(0)
00074
00075 #define MCPWM_INTFLAG_MAT0      MCPWM_INT_IMAT(0)
00076
00077 #define MCPWM_INTFLAG_CAP0      MCPWM_INT_ICAP(0)
00078
00080 #define MCPWM_INTFLAG_LIM1      MCPWM_INT_ILIM(1)
00081
00082 #define MCPWM_INTFLAG_MAT1      MCPWM_INT_IMAT(1)
00083
00084 #define MCPWM_INTFLAG_CAP1      MCPWM_INT_ICAP(1)
00085
00087 #define MCPWM_INTFLAG_LIM2      MCPWM_INT_ILIM(2)
00088
00089 #define MCPWM_INTFLAG_MAT2      MCPWM_INT_IMAT(2)
00090
00091 #define MCPWM_INTFLAG_CAP2      MCPWM_INT_ICAP(2)
00092
00094 #define MCPWM_INTFLAG_ABORT     MCPWM_INT_ABORT
00095
00100 /* Private Macros ------------------------------------------------------------- */
00105 /*********************************************************************/
00108 /* MCPWM Control register, these macro definitions below can be applied for these
00109  * register type:
00110  * - MCPWM Control read address
00111  * - MCPWM Control set address
00112  * - MCPWM Control clear address
00113  */
00114 #define MCPWM_CON_RUN(n)                ((n<=2) ? ((uint32_t)(1<<((n*8)+0))) : (0))
00115 #define MCPWM_CON_CENTER(n)             ((n<=2) ? ((uint32_t)(1<<((n*8)+1))) : (0))
00116 #define MCPWM_CON_POLAR(n)              ((n<=2) ? ((uint32_t)(1<<((n*8)+2))) : (0))
00117 #define MCPWM_CON_DTE(n)                ((n<=2) ? ((uint32_t)(1<<((n*8)+3))) : (0))
00118 #define MCPWM_CON_DISUP(n)              ((n<=2) ? ((uint32_t)(1<<((n*8)+4))) : (0))
00119 #define MCPWM_CON_INVBDC                ((uint32_t)(1<<29))
00120 #define MCPWM_CON_ACMODE                ((uint32_t)(1<<30))
00121 #define MCPWM_CON_DCMODE                ((uint32_t)(1<<31))
00123 /*********************************************************************/
00126 /* Capture Control register, these macro definitions below can be applied for these
00127  * register type:
00128  * - MCPWM Capture Control read address
00129  * - MCPWM Capture Control set address
00130  * - MCPWM Capture control clear address
00131  */
00132
00133 #define MCPWM_CAPCON_CAPMCI_RE(cap,mci) (((cap<=2)&&(mci<=2)) ? ((uint32_t)(1<<((cap*6)+(mci*2)+0))) : (0))
00134
00135 #define MCPWM_CAPCON_CAPMCI_FE(cap,mci) (((cap<=2)&&(mci<=2)) ? ((uint32_t)(1<<((cap*6)+(mci*2)+1))) : (0))
00136
00137 #define MCPWM_CAPCON_RT(n)                              ((n<=2) ? ((uint32_t)(1<<(18+(n)))) : (0))
00138
00139 #define MCPWM_CAPCON_HNFCAP(n)                  ((n<=2) ? ((uint32_t)(1<<(21+(n)))) : (0))
00140
00141 /*********************************************************************/
00144 /* Interrupt registers, these macro definitions below can be applied for these
00145  * register type:
00146  * - MCPWM Interrupt Enable read address
00147  * - MCPWM Interrupt Enable set address
00148  * - MCPWM Interrupt Enable clear address
00149  * - MCPWM Interrupt Flags read address
00150  * - MCPWM Interrupt Flags set address
00151  * - MCPWM Interrupt Flags clear address
00152  */
00154 #define MCPWM_INT_ILIM(n)       (((n>=0)&&(n<=2)) ? ((uint32_t)(1<<((n*4)+0))) : (0))
00155
00156 #define MCPWM_INT_IMAT(n)       (((n>=0)&&(n<=2)) ? ((uint32_t)(1<<((n*4)+1))) : (0))
00157
00158 #define MCPWM_INT_ICAP(n)       (((n>=0)&&(n<=2)) ? ((uint32_t)(1<<((n*4)+2))) : (0))
00159
00160 #define MCPWM_INT_ABORT         ((uint32_t)(1<<15))
00161
00162 /*********************************************************************/
00165 /* MCPWM Count Control register, these macro definitions below can be applied for these
00166  * register type:
00167  * - MCPWM Count Control read address
00168  * - MCPWM Count Control set address
00169  * - MCPWM Count Control clear address
00170  */
00172 #define MCPWM_CNTCON_TCMCI_RE(tc,mci)   (((tc>=0)&&(tc<=2)&&(mci>=0)&&(mci<=2)) ? ((uint32_t)(1<<((6*tc)+(2*mci)+0))) : (0))
00173
00174 #define MCPWM_CNTCON_TCMCI_FE(tc,mci)   (((tc>=0)&&(tc<=2)&&(mci>=0)&&(mci<=2)) ? ((uint32_t)(1<<((6*tc)+(2*mci)+1))) : (0))
00175
00176 #define MCPWM_CNTCON_CNTR(n)                    (((n>=0)&&(n<=2)) ? ((uint32_t)(1<<(29+n))) : (0))
00177
00178 /*********************************************************************/
00182 #define MCPWM_DT(n,x)           ((n<=2) ? ((uint32_t)((x&0x3FF)<<(n*10))) : (0))
00183
00184 /*********************************************************************/
00187 #define MCPWM_CP_A0             ((uint32_t)(1<<0))
00188 #define MCPWM_CP_B0             ((uint32_t)(1<<1))
00189 #define MCPWM_CP_A1             ((uint32_t)(1<<2))
00190 #define MCPWM_CP_B1             ((uint32_t)(1<<3))
00191 #define MCPWM_CP_A2             ((uint32_t)(1<<4))
00192 #define MCPWM_CP_B2             ((uint32_t)(1<<5))
00194 /*********************************************************************/
00198 #define MCPWM_CAPCLR_CAP(n)             ((n<=2) ? ((uint32_t)(1<<n)) : (0))
00199
00200
00206 /* Public Types --------------------------------------------------------------- */
00214 typedef struct {
00215         uint32_t channelType;
00220         uint32_t channelPolarity;
00224         uint32_t channelDeadtimeEnable;
00228         uint32_t channelDeadtimeValue;
00229         uint32_t channelUpdateEnable;
00234         uint32_t channelTimercounterValue;
00235         uint32_t channelPeriodValue;
00236         uint32_t channelPulsewidthValue;
00237 } MCPWM_CHANNEL_CFG_Type;
00238
00242 typedef struct {
00243         uint32_t captureChannel;
00244         uint32_t captureRising;
00248         uint32_t captureFalling;
00252         uint32_t timerReset;
00256         uint32_t hnfEnable;
00260 } MCPWM_CAPTURE_CFG_Type;
00261
00262
00266 typedef struct {
00267         uint32_t counterChannel;
00268         uint32_t countRising;
00272         uint32_t countFalling;
00276 } MCPWM_COUNT_CFG_Type;
00277
00283 /* Public Functions ----------------------------------------------------------- */
00288 void MCPWM_Init(LPC_MCPWM_TypeDef *MCPWMx);
00289 void MCPWM_ConfigChannel(LPC_MCPWM_TypeDef *MCPWMx, uint32_t channelNum,
00290                                                 MCPWM_CHANNEL_CFG_Type * channelSetup);
00291 void MCPWM_WriteToShadow(LPC_MCPWM_TypeDef *MCPWMx, uint32_t channelNum,
00292                                                 MCPWM_CHANNEL_CFG_Type *channelSetup);
00293 void MCPWM_ConfigCapture(LPC_MCPWM_TypeDef *MCPWMx, uint32_t channelNum,
00294                                                 MCPWM_CAPTURE_CFG_Type *captureConfig);
00295 void MCPWM_ClearCapture(LPC_MCPWM_TypeDef *MCPWMx, uint32_t captureChannel);
00296 uint32_t MCPWM_GetCapture(LPC_MCPWM_TypeDef *MCPWMx, uint32_t captureChannel);
00297 void MCPWM_CountConfig(LPC_MCPWM_TypeDef *MCPWMx, uint32_t channelNum,
00298                                         uint32_t countMode, MCPWM_COUNT_CFG_Type *countConfig);
00299 void MCPWM_Start(LPC_MCPWM_TypeDef *MCPWMx,uint32_t channel0, uint32_t channel1, uint32_t channel2);
00300 void MCPWM_Stop(LPC_MCPWM_TypeDef *MCPWMx,uint32_t channel0, uint32_t channel1, uint32_t channel2);
00301 void MCPWM_ACMode(LPC_MCPWM_TypeDef *MCPWMx,uint32_t acMode);
00302 void MCPWM_DCMode(LPC_MCPWM_TypeDef *MCPWMx, uint32_t dcMode,
00303                                         uint32_t outputInvered, uint32_t outputPattern);
00304 void MCPWM_IntConfig(LPC_MCPWM_TypeDef *MCPWMx, uint32_t ulIntType, FunctionalState NewState);
00305 void MCPWM_IntSet(LPC_MCPWM_TypeDef *MCPWMx, uint32_t ulIntType);
00306 void MCPWM_IntClear(LPC_MCPWM_TypeDef *MCPWMx, uint32_t ulIntType);
00307 FlagStatus MCPWM_GetIntStatus(LPC_MCPWM_TypeDef *MCPWMx, uint32_t ulIntType);
00308
00313 #ifdef __cplusplus
00314 }
00315 #endif
00316
00317 #endif /* LPC17XX_MCPWM_H_ */
00318
00323 /* --------------------------------- End Of File ------------------------------ */
Generated on Tue Jun 7 14:58:55 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Drivers/source/lpc17xx_nvic.c Source File

C:/nxpdrv/LPC1700CMSIS/Drivers/source/lpc17xx_nvic.c

Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          lpc17xx_nvic.c                          2010-05-21
00003 */
00028 /* Peripheral group ----------------------------------------------------------- */
00033 /* Includes ------------------------------------------------------------------- */
00034 #include "lpc17xx_nvic.h"
00035
00036
00037 /* Private Macros ------------------------------------------------------------- */
00042 /* Vector table offset bit mask */
00043 #define NVIC_VTOR_MASK              0x3FFFFF80
00044
00050 /* Public Functions ----------------------------------------------------------- */
00056 /*****************************************************************************/
00067 void NVIC_DeInit(void)
00068 {
00069         uint8_t tmp;
00070
00071         /* Disable all interrupts */
00072         NVIC->ICER[0] = 0xFFFFFFFF;
00073         NVIC->ICER[1] = 0x00000001;
00074         /* Clear all pending interrupts */
00075         NVIC->ICPR[0] = 0xFFFFFFFF;
00076         NVIC->ICPR[1] = 0x00000001;
00077
00078         /* Clear all interrupt priority */
00079         for (tmp = 0; tmp < 32; tmp++) {
00080                 NVIC->IP[tmp] = 0x00;
00081         }
00082 }
00083
00084 /*****************************************************************************/
00102 void NVIC_SCBDeInit(void)
00103 {
00104         uint8_t tmp;
00105
00106         SCB->ICSR = 0x0A000000;
00107         SCB->VTOR = 0x00000000;
00108         SCB->AIRCR = 0x05FA0000;
00109         SCB->SCR = 0x00000000;
00110         SCB->CCR = 0x00000000;
00111
00112         for (tmp = 0; tmp < 32; tmp++) {
00113                 SCB->SHP[tmp] = 0x00;
00114         }
00115
00116         SCB->SHCSR = 0x00000000;
00117         SCB->CFSR = 0xFFFFFFFF;
00118         SCB->HFSR = 0xFFFFFFFF;
00119         SCB->DFSR = 0xFFFFFFFF;
00120 }
00121
00122
00123 /*****************************************************************************/
00128 void NVIC_SetVTOR(uint32_t offset)
00129 {
00130 //      SCB->VTOR  = (offset & NVIC_VTOR_MASK);
00131         SCB->VTOR  = offset;
00132 }
00133
00142 /* --------------------------------- End Of File ------------------------------ */
Generated on Tue Jun 7 14:58:56 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_nvic.h Source File

C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_nvic.h

Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          lpc17xx_nvic.h                          2010-05-21
00003 */
00028 /* Peripheral group ----------------------------------------------------------- */
00034 #ifndef LPC17XX_NVIC_H_
00035 #define LPC17XX_NVIC_H_
00036
00037 /* Includes ------------------------------------------------------------------- */
00038 #include "LPC17xx.h"
00039 #include "lpc_types.h"
00040
00041 #ifdef __cplusplus
00042 extern "C"
00043 {
00044 #endif
00045
00046
00047 /* Public Functions ----------------------------------------------------------- */
00052 void NVIC_DeInit(void);
00053 void NVIC_SCBDeInit(void);
00054 void NVIC_SetVTOR(uint32_t offset);
00055
00060 #ifdef __cplusplus
00061 }
00062 #endif
00063
00064 #endif /* LPC17XX_NVIC_H_ */
00065
00070 /* --------------------------------- End Of File ------------------------------ */
Generated on Tue Jun 7 14:58:55 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Drivers/source/lpc17xx_pinsel.c Source File

C:/nxpdrv/LPC1700CMSIS/Drivers/source/lpc17xx_pinsel.c

Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          lpc17xx_pinsel.c                                2010-05-21
00003 */
00027 /* Peripheral group ----------------------------------------------------------- */
00032 /* Includes ------------------------------------------------------------------- */
00033 #include "lpc17xx_pinsel.h"
00034
00035 /* Public Functions ----------------------------------------------------------- */
00036
00037 static void set_PinFunc ( uint8_t portnum, uint8_t pinnum, uint8_t funcnum);
00038 static void set_ResistorMode ( uint8_t portnum, uint8_t pinnum, uint8_t modenum);
00039 static void set_OpenDrainMode( uint8_t portnum, uint8_t pinnum, uint8_t modenum);
00040
00041 /*********************************************************************/
00094 static void set_PinFunc ( uint8_t portnum, uint8_t pinnum, uint8_t funcnum)
00095 {
00096         uint32_t pinnum_t = pinnum;
00097         uint32_t pinselreg_idx = 2 * portnum;
00098         uint32_t *pPinCon = (uint32_t *)&LPC_PINCON->PINSEL0;
00099
00100         if (pinnum_t >= 16) {
00101                 pinnum_t -= 16;
00102                 pinselreg_idx++;
00103         }
00104         *(uint32_t *)(pPinCon + pinselreg_idx) &= ~(0x03UL << (pinnum_t * 2));
00105         *(uint32_t *)(pPinCon + pinselreg_idx) |= ((uint32_t)funcnum) << (pinnum_t * 2);
00106 }
00107
00108 /*********************************************************************/
00159 void set_ResistorMode ( uint8_t portnum, uint8_t pinnum, uint8_t modenum)
00160 {
00161         uint32_t pinnum_t = pinnum;
00162         uint32_t pinmodereg_idx = 2 * portnum;
00163         uint32_t *pPinCon = (uint32_t *)&LPC_PINCON->PINMODE0;
00164
00165         if (pinnum_t >= 16) {
00166                 pinnum_t -= 16;
00167                 pinmodereg_idx++ ;
00168         }
00169
00170         *(uint32_t *)(pPinCon + pinmodereg_idx) &= ~(0x03UL << (pinnum_t * 2));
00171         *(uint32_t *)(pPinCon + pinmodereg_idx) |= ((uint32_t)modenum) << (pinnum_t * 2);
00172 }
00173
00174 /*********************************************************************/
00225 void set_OpenDrainMode( uint8_t portnum, uint8_t pinnum, uint8_t modenum)
00226 {
00227         uint32_t *pPinCon = (uint32_t *)&LPC_PINCON->PINMODE_OD0;
00228
00229         if (modenum == PINSEL_PINMODE_OPENDRAIN){
00230                 *(uint32_t *)(pPinCon + portnum) |= (0x01UL << pinnum);
00231         } else {
00232                 *(uint32_t *)(pPinCon + portnum) &= ~(0x01UL << pinnum);
00233         }
00234 }
00235
00236 /* End of Public Functions ---------------------------------------------------- */
00237
00238 /* Public Functions ----------------------------------------------------------- */
00242 /*********************************************************************/
00251 void PINSEL_ConfigTraceFunc(FunctionalState NewState)
00252 {
00253         if (NewState == ENABLE) {
00254                 LPC_PINCON->PINSEL10 |= (0x01UL << 3);
00255         } else if (NewState == DISABLE) {
00256                 LPC_PINCON->PINSEL10 &= ~(0x01UL << 3);
00257         }
00258 }
00259
00260 /*********************************************************************/
00273 void PINSEL_SetI2C0Pins(uint8_t i2cPinMode, FunctionalState filterSlewRateEnable)
00274 {
00275         uint32_t regVal;
00276
00277         if (i2cPinMode == PINSEL_I2C_Fast_Mode){
00278                 regVal = PINSEL_I2CPADCFG_SCLDRV0 | PINSEL_I2CPADCFG_SDADRV0;
00279         }
00280
00281         if (filterSlewRateEnable == DISABLE){
00282                 regVal = PINSEL_I2CPADCFG_SCLI2C0 | PINSEL_I2CPADCFG_SDAI2C0;
00283         }
00284         LPC_PINCON->I2CPADCFG = regVal;
00285 }
00286
00287
00288 /*********************************************************************/
00296 void PINSEL_ConfigPin(PINSEL_CFG_Type *PinCfg)
00297 {
00298         set_PinFunc(PinCfg->Portnum, PinCfg->Pinnum, PinCfg->Funcnum);
00299         set_ResistorMode(PinCfg->Portnum, PinCfg->Pinnum, PinCfg->Pinmode);
00300         set_OpenDrainMode(PinCfg->Portnum, PinCfg->Pinnum, PinCfg->OpenDrain);
00301 }
00302
00303
00312 /* --------------------------------- End Of File ------------------------------ */
Generated on Tue Jun 7 14:58:56 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_pinsel.h Source File

C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_pinsel.h

Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          lpc17xx_pinsel.h                                2010-05-21
00003 */
00027 /* Peripheral group ----------------------------------------------------------- */
00033 #ifndef LPC17XX_PINSEL_H_
00034 #define LPC17XX_PINSEL_H_
00035
00036 /* Includes ------------------------------------------------------------------- */
00037 #include "lpc17xx.h"
00038 #include "lpc_types.h"
00039
00040 #ifdef __cplusplus
00041 extern "C"
00042 {
00043 #endif
00044
00045 /* Public Macros -------------------------------------------------------------- */
00050 /*********************************************************************/
00053 #define PINSEL_PORT_0   ((0))
00054 #define PINSEL_PORT_1   ((1))
00055 #define PINSEL_PORT_2   ((2))
00056 #define PINSEL_PORT_3   ((3))
00057 #define PINSEL_PORT_4   ((4))
00059 /***********************************************************************
00060  * Macros define for Pin Function selection
00061  **********************************************************************/
00062 #define PINSEL_FUNC_0   ((0))
00063 #define PINSEL_FUNC_1   ((1))
00064 #define PINSEL_FUNC_2   ((2))
00065 #define PINSEL_FUNC_3   ((3))
00067 /***********************************************************************
00068  * Macros define for Pin Number of Port
00069  **********************************************************************/
00070 #define PINSEL_PIN_0    ((0))
00071 #define PINSEL_PIN_1    ((1))
00072 #define PINSEL_PIN_2    ((2))
00073 #define PINSEL_PIN_3    ((3))
00074 #define PINSEL_PIN_4    ((4))
00075 #define PINSEL_PIN_5    ((5))
00076 #define PINSEL_PIN_6    ((6))
00077 #define PINSEL_PIN_7    ((7))
00078 #define PINSEL_PIN_8    ((8))
00079 #define PINSEL_PIN_9    ((9))
00080 #define PINSEL_PIN_10   ((10))
00081 #define PINSEL_PIN_11   ((11))
00082 #define PINSEL_PIN_12   ((12))
00083 #define PINSEL_PIN_13   ((13))
00084 #define PINSEL_PIN_14   ((14))
00085 #define PINSEL_PIN_15   ((15))
00086 #define PINSEL_PIN_16   ((16))
00087 #define PINSEL_PIN_17   ((17))
00088 #define PINSEL_PIN_18   ((18))
00089 #define PINSEL_PIN_19   ((19))
00090 #define PINSEL_PIN_20   ((20))
00091 #define PINSEL_PIN_21   ((21))
00092 #define PINSEL_PIN_22   ((22))
00093 #define PINSEL_PIN_23   ((23))
00094 #define PINSEL_PIN_24   ((24))
00095 #define PINSEL_PIN_25   ((25))
00096 #define PINSEL_PIN_26   ((26))
00097 #define PINSEL_PIN_27   ((27))
00098 #define PINSEL_PIN_28   ((28))
00099 #define PINSEL_PIN_29   ((29))
00100 #define PINSEL_PIN_30   ((30))
00101 #define PINSEL_PIN_31   ((31))
00103 /***********************************************************************
00104  * Macros define for Pin mode
00105  **********************************************************************/
00106 #define PINSEL_PINMODE_PULLUP           ((0))
00107 #define PINSEL_PINMODE_TRISTATE         ((2))
00108 #define PINSEL_PINMODE_PULLDOWN         ((3))
00110 /***********************************************************************
00111  * Macros define for Pin mode (normal/open drain)
00112  **********************************************************************/
00113 #define PINSEL_PINMODE_NORMAL           ((0))
00114 #define PINSEL_PINMODE_OPENDRAIN        ((1))
00116 /***********************************************************************
00117  * Macros define for I2C mode
00118  ***********************************************************************/
00119 #define PINSEL_I2C_Normal_Mode          ((0))
00120 #define PINSEL_I2C_Fast_Mode            ((1))
00126 /* Private Macros ------------------------------------------------------------- */
00127
00131 /* Pin selection define */
00132 /* I2C Pin Configuration register bit description */
00133 #define PINSEL_I2CPADCFG_SDADRV0        _BIT(0)
00134 #define PINSEL_I2CPADCFG_SDAI2C0        _BIT(1)
00135 #define PINSEL_I2CPADCFG_SCLDRV0        _BIT(2)
00136 #define PINSEL_I2CPADCFG_SCLI2C0        _BIT(3)
00143 /* Public Types --------------------------------------------------------------- */
00144
00149 typedef struct
00150 {
00151         uint8_t Portnum;
00153         uint8_t Pinnum;
00155         uint8_t Funcnum;
00157         uint8_t Pinmode;
00161         uint8_t OpenDrain;
00164 } PINSEL_CFG_Type;
00165
00171 /* Public Functions ----------------------------------------------------------- */
00176 void PINSEL_ConfigPin(PINSEL_CFG_Type *PinCfg);
00177 void PINSEL_ConfigTraceFunc (FunctionalState NewState);
00178 void PINSEL_SetI2C0Pins(uint8_t i2cPinMode, FunctionalState filterSlewRateEnable);
00179
00180
00186 #ifdef __cplusplus
00187 }
00188 #endif
00189
00190 #endif /* LPC17XX_PINSEL_H_ */
00191
00196 /* --------------------------------- End Of File ------------------------------ */
00197
Generated on Tue Jun 7 14:58:55 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Drivers/source/lpc17xx_pwm.c Source File

C:/nxpdrv/LPC1700CMSIS/Drivers/source/lpc17xx_pwm.c

Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          lpc17xx_pwm.c                           2011-03-31
00003 */
00026 /* Peripheral group ----------------------------------------------------------- */
00031 /* Includes ------------------------------------------------------------------- */
00032 #include "lpc17xx_pwm.h"
00033 #include "lpc17xx_clkpwr.h"
00034
00035 /* If this source file built with example, the LPC17xx FW library configuration
00036  * file in each example directory ("lpc17xx_libcfg.h") must be included,
00037  * otherwise the default FW library configuration file must be included instead
00038  */
00039 #ifdef __BUILD_WITH_EXAMPLE__
00040 #include "lpc17xx_libcfg.h"
00041 #else
00042 #include "lpc17xx_libcfg_default.h"
00043 #endif /* __BUILD_WITH_EXAMPLE__ */
00044
00045
00046 #ifdef _PWM
00047
00048
00049 /* Public Functions ----------------------------------------------------------- */
00055 /*********************************************************************/
00070 IntStatus PWM_GetIntStatus(LPC_PWM_TypeDef *PWMx, uint32_t IntFlag)
00071 {
00072         CHECK_PARAM(PARAM_PWMx(PWMx));
00073         CHECK_PARAM(PARAM_PWM_INTSTAT(IntFlag));
00074
00075         return ((PWMx->IR & IntFlag) ? SET : RESET);
00076 }
00077
00078
00079
00080 /*********************************************************************/
00095 void PWM_ClearIntPending(LPC_PWM_TypeDef *PWMx, uint32_t IntFlag)
00096 {
00097         CHECK_PARAM(PARAM_PWMx(PWMx));
00098         CHECK_PARAM(PARAM_PWM_INTSTAT(IntFlag));
00099         PWMx->IR = IntFlag;
00100 }
00101
00102
00103
00104 /*****************************************************************************/
00121 void PWM_ConfigStructInit(uint8_t PWMTimerCounterMode, void *PWM_InitStruct)
00122 {
00123         PWM_TIMERCFG_Type *pTimeCfg;
00124         PWM_COUNTERCFG_Type *pCounterCfg;
00125         CHECK_PARAM(PARAM_PWM_TC_MODE(PWMTimerCounterMode));
00126
00127         pTimeCfg = (PWM_TIMERCFG_Type *) PWM_InitStruct;
00128         pCounterCfg = (PWM_COUNTERCFG_Type *) PWM_InitStruct;
00129
00130         if (PWMTimerCounterMode == PWM_MODE_TIMER )
00131         {
00132                 pTimeCfg->PrescaleOption = PWM_TIMER_PRESCALE_USVAL;
00133                 pTimeCfg->PrescaleValue = 1;
00134         }
00135         else if (PWMTimerCounterMode == PWM_MODE_COUNTER)
00136         {
00137                 pCounterCfg->CountInputSelect = PWM_COUNTER_PCAP1_0;
00138                 pCounterCfg->CounterOption = PWM_COUNTER_RISING;
00139         }
00140 }
00141
00142
00143 /*********************************************************************/
00156 void PWM_Init(LPC_PWM_TypeDef *PWMx, uint32_t PWMTimerCounterMode, void *PWM_ConfigStruct)
00157 {
00158         PWM_TIMERCFG_Type *pTimeCfg;
00159         PWM_COUNTERCFG_Type *pCounterCfg;
00160         uint64_t clkdlycnt;
00161
00162         CHECK_PARAM(PARAM_PWMx(PWMx));
00163         CHECK_PARAM(PARAM_PWM_TC_MODE(PWMTimerCounterMode));
00164
00165         pTimeCfg = (PWM_TIMERCFG_Type *)PWM_ConfigStruct;
00166         pCounterCfg = (PWM_COUNTERCFG_Type *)PWM_ConfigStruct;
00167
00168
00169         CLKPWR_ConfigPPWR (CLKPWR_PCONP_PCPWM1, ENABLE);
00170         CLKPWR_SetPCLKDiv (CLKPWR_PCLKSEL_PWM1, CLKPWR_PCLKSEL_CCLK_DIV_4);
00171         // Get peripheral clock of PWM1
00172         clkdlycnt = (uint64_t) CLKPWR_GetPCLK (CLKPWR_PCLKSEL_PWM1);
00173
00174
00175         // Clear all interrupts pending
00176         PWMx->IR = 0xFF & PWM_IR_BITMASK;
00177         PWMx->TCR = 0x00;
00178         PWMx->CTCR = 0x00;
00179         PWMx->MCR = 0x00;
00180         PWMx->CCR = 0x00;
00181         PWMx->PCR = 0x00;
00182         PWMx->LER = 0x00;
00183
00184         if (PWMTimerCounterMode == PWM_MODE_TIMER)
00185         {
00186                 CHECK_PARAM(PARAM_PWM_TIMER_PRESCALE(pTimeCfg->PrescaleOption));
00187
00188                 /* Absolute prescale value */
00189                 if (pTimeCfg->PrescaleOption == PWM_TIMER_PRESCALE_TICKVAL)
00190                 {
00191                         PWMx->PR   = pTimeCfg->PrescaleValue - 1;
00192                 }
00193                 /* uSecond prescale value */
00194                 else
00195                 {
00196                         clkdlycnt = (clkdlycnt * pTimeCfg->PrescaleValue) / 1000000;
00197                         PWMx->PR = ((uint32_t) clkdlycnt) - 1;
00198                 }
00199
00200         }
00201         else if (PWMTimerCounterMode == PWM_MODE_COUNTER)
00202         {
00203                 CHECK_PARAM(PARAM_PWM_COUNTER_INPUTSEL(pCounterCfg->CountInputSelect));
00204                 CHECK_PARAM(PARAM_PWM_COUNTER_EDGE(pCounterCfg->CounterOption));
00205
00206                 PWMx->CTCR |= (PWM_CTCR_MODE((uint32_t)pCounterCfg->CounterOption)) \
00207                                                 | (PWM_CTCR_SELECT_INPUT((uint32_t)pCounterCfg->CountInputSelect));
00208         }
00209 }
00210
00211 /*********************************************************************/
00217 void PWM_DeInit (LPC_PWM_TypeDef *PWMx)
00218 {
00219         CHECK_PARAM(PARAM_PWMx(PWMx));
00220
00221         // Disable PWM control (timer, counter and PWM)
00222         PWMx->TCR = 0x00;
00223         CLKPWR_ConfigPPWR (CLKPWR_PCONP_PCPWM1, DISABLE);
00224
00225 }
00226
00227
00228 /*********************************************************************/
00236 void PWM_Cmd(LPC_PWM_TypeDef *PWMx, FunctionalState NewState)
00237 {
00238         CHECK_PARAM(PARAM_PWMx(PWMx));
00239         CHECK_PARAM(PARAM_FUNCTIONALSTATE(NewState));
00240
00241         if (NewState == ENABLE)
00242         {
00243                 PWMx->TCR       |=  PWM_TCR_PWM_ENABLE;
00244         }
00245         else
00246         {
00247                 PWMx->TCR &= (~PWM_TCR_PWM_ENABLE) & PWM_TCR_BITMASK;
00248         }
00249 }
00250
00251
00252 /*********************************************************************/
00260 void PWM_CounterCmd(LPC_PWM_TypeDef *PWMx, FunctionalState NewState)
00261 {
00262         CHECK_PARAM(PARAM_PWMx(PWMx));
00263         CHECK_PARAM(PARAM_FUNCTIONALSTATE(NewState));
00264         if (NewState == ENABLE)
00265         {
00266                 PWMx->TCR       |=  PWM_TCR_COUNTER_ENABLE;
00267         }
00268         else
00269         {
00270                 PWMx->TCR &= (~PWM_TCR_COUNTER_ENABLE) & PWM_TCR_BITMASK;
00271         }
00272 }
00273
00274
00275 /*********************************************************************/
00280 void PWM_ResetCounter(LPC_PWM_TypeDef *PWMx)
00281 {
00282         CHECK_PARAM(PARAM_PWMx(PWMx));
00283         PWMx->TCR |= PWM_TCR_COUNTER_RESET;
00284         PWMx->TCR &= (~PWM_TCR_COUNTER_RESET) & PWM_TCR_BITMASK;
00285 }
00286
00287
00288 /*********************************************************************/
00296 void PWM_ConfigMatch(LPC_PWM_TypeDef *PWMx, PWM_MATCHCFG_Type *PWM_MatchConfigStruct)
00297 {
00298         CHECK_PARAM(PARAM_PWMx(PWMx));
00299         CHECK_PARAM(PARAM_PWM1_MATCH_CHANNEL(PWM_MatchConfigStruct->MatchChannel));
00300         CHECK_PARAM(PARAM_FUNCTIONALSTATE(PWM_MatchConfigStruct->IntOnMatch));
00301         CHECK_PARAM(PARAM_FUNCTIONALSTATE(PWM_MatchConfigStruct->ResetOnMatch));
00302         CHECK_PARAM(PARAM_FUNCTIONALSTATE(PWM_MatchConfigStruct->StopOnMatch));
00303
00304         //interrupt on MRn
00305         if (PWM_MatchConfigStruct->IntOnMatch == ENABLE)
00306         {
00307                 PWMx->MCR |= PWM_MCR_INT_ON_MATCH(PWM_MatchConfigStruct->MatchChannel);
00308         }
00309         else
00310         {
00311                 PWMx->MCR &= (~PWM_MCR_INT_ON_MATCH(PWM_MatchConfigStruct->MatchChannel)) \
00312                                         & PWM_MCR_BITMASK;
00313         }
00314
00315         //reset on MRn
00316         if (PWM_MatchConfigStruct->ResetOnMatch == ENABLE)
00317         {
00318                 PWMx->MCR |= PWM_MCR_RESET_ON_MATCH(PWM_MatchConfigStruct->MatchChannel);
00319         }
00320         else
00321         {
00322                 PWMx->MCR &= (~PWM_MCR_RESET_ON_MATCH(PWM_MatchConfigStruct->MatchChannel)) \
00323                                         & PWM_MCR_BITMASK;
00324         }
00325
00326         //stop on MRn
00327         if (PWM_MatchConfigStruct->StopOnMatch == ENABLE)
00328         {
00329                 PWMx->MCR |= PWM_MCR_STOP_ON_MATCH(PWM_MatchConfigStruct->MatchChannel);
00330         }
00331         else
00332         {
00333                 PWMx->MCR &= (~PWM_MCR_STOP_ON_MATCH(PWM_MatchConfigStruct->MatchChannel)) \
00334                                         & PWM_MCR_BITMASK;
00335         }
00336 }
00337
00338
00339 /*********************************************************************/
00347 void PWM_ConfigCapture(LPC_PWM_TypeDef *PWMx, PWM_CAPTURECFG_Type *PWM_CaptureConfigStruct)
00348 {
00349         CHECK_PARAM(PARAM_PWMx(PWMx));
00350         CHECK_PARAM(PARAM_PWM1_CAPTURE_CHANNEL(PWM_CaptureConfigStruct->CaptureChannel));
00351         CHECK_PARAM(PARAM_FUNCTIONALSTATE(PWM_CaptureConfigStruct->FallingEdge));
00352         CHECK_PARAM(PARAM_FUNCTIONALSTATE(PWM_CaptureConfigStruct->IntOnCaption));
00353         CHECK_PARAM(PARAM_FUNCTIONALSTATE(PWM_CaptureConfigStruct->RisingEdge));
00354
00355         if (PWM_CaptureConfigStruct->RisingEdge == ENABLE)
00356         {
00357                 PWMx->CCR |= PWM_CCR_CAP_RISING(PWM_CaptureConfigStruct->CaptureChannel);
00358         }
00359         else
00360         {
00361                 PWMx->CCR &= (~PWM_CCR_CAP_RISING(PWM_CaptureConfigStruct->CaptureChannel)) \
00362                                         & PWM_CCR_BITMASK;
00363         }
00364
00365         if (PWM_CaptureConfigStruct->FallingEdge == ENABLE)
00366         {
00367                 PWMx->CCR |= PWM_CCR_CAP_FALLING(PWM_CaptureConfigStruct->CaptureChannel);
00368         }
00369         else
00370         {
00371                 PWMx->CCR &= (~PWM_CCR_CAP_FALLING(PWM_CaptureConfigStruct->CaptureChannel)) \
00372                                         & PWM_CCR_BITMASK;
00373         }
00374
00375         if (PWM_CaptureConfigStruct->IntOnCaption == ENABLE)
00376         {
00377                 PWMx->CCR |= PWM_CCR_INT_ON_CAP(PWM_CaptureConfigStruct->CaptureChannel);
00378         }
00379         else
00380         {
00381                 PWMx->CCR &= (~PWM_CCR_INT_ON_CAP(PWM_CaptureConfigStruct->CaptureChannel)) \
00382                                         & PWM_CCR_BITMASK;
00383         }
00384 }
00385
00386
00387 /*********************************************************************/
00394 uint32_t PWM_GetCaptureValue(LPC_PWM_TypeDef *PWMx, uint8_t CaptureChannel)
00395 {
00396         CHECK_PARAM(PARAM_PWMx(PWMx));
00397         CHECK_PARAM(PARAM_PWM1_CAPTURE_CHANNEL(CaptureChannel));
00398
00399         switch (CaptureChannel)
00400         {
00401         case 0:
00402                 return PWMx->CR0;
00403
00404         case 1:
00405                 return PWMx->CR1;
00406
00407         default:
00408                 return (0);
00409         }
00410 }
00411
00412
00413 /********************************************************************/
00425 void PWM_MatchUpdate(LPC_PWM_TypeDef *PWMx, uint8_t MatchChannel, \
00426                                         uint32_t MatchValue, uint8_t UpdateType)
00427 {
00428         CHECK_PARAM(PARAM_PWMx(PWMx));
00429         CHECK_PARAM(PARAM_PWM1_MATCH_CHANNEL(MatchChannel));
00430         CHECK_PARAM(PARAM_PWM_MATCH_UPDATE(UpdateType));
00431
00432         switch (MatchChannel)
00433         {
00434         case 0:
00435                 PWMx->MR0 = MatchValue;
00436                 break;
00437
00438         case 1:
00439                 PWMx->MR1 = MatchValue;
00440                 break;
00441
00442         case 2:
00443                 PWMx->MR2 = MatchValue;
00444                 break;
00445
00446         case 3:
00447                 PWMx->MR3 = MatchValue;
00448                 break;
00449
00450         case 4:
00451                 PWMx->MR4 = MatchValue;
00452                 break;
00453
00454         case 5:
00455                 PWMx->MR5 = MatchValue;
00456                 break;
00457
00458         case 6:
00459                 PWMx->MR6 = MatchValue;
00460                 break;
00461         }
00462
00463         // Write Latch register
00464         PWMx->LER |= PWM_LER_EN_MATCHn_LATCH(MatchChannel);
00465
00466         // In case of update now
00467         if (UpdateType == PWM_MATCH_UPDATE_NOW)
00468         {
00469                 PWMx->TCR |= PWM_TCR_COUNTER_RESET;
00470                 PWMx->TCR &= (~PWM_TCR_COUNTER_RESET) & PWM_TCR_BITMASK;
00471         }
00472 }
00473
00474 /********************************************************************/
00486 void PWM_MultiMatchUpdate(LPC_PWM_TypeDef *PWMx, PWM_Match_T *MatchStruct , uint8_t UpdateType)
00487 {
00488         uint8_t LatchValue = 0;
00489         uint8_t i;
00490
00491         CHECK_PARAM(PARAM_PWMx(PWMx));
00492         CHECK_PARAM(PARAM_PWM_MATCH_UPDATE(UpdateType));
00493
00494         //Update match value
00495         for(i=0;i<7;i++)
00496         {
00497                 if(MatchStruct[i].Status == SET)
00498                 {
00499                         if(i<4)
00500                                 *((volatile unsigned int *)(&(PWMx->MR0) + i)) = MatchStruct[i].Matchvalue;
00501                         else
00502                         {
00503                                 *((volatile unsigned int *)(&(PWMx->MR4) + (i-4))) = MatchStruct[i].Matchvalue;
00504                         }
00505                         LatchValue |=(1<<i);
00506                 }
00507         }
00508         //set update for multi-channel at the same time
00509         PWMx->LER = LatchValue;
00510
00511         // In case of update now
00512         if (UpdateType == PWM_MATCH_UPDATE_NOW)
00513         {
00514                 PWMx->TCR |= PWM_TCR_COUNTER_RESET;
00515                 PWMx->TCR &= (~PWM_TCR_COUNTER_RESET) & PWM_TCR_BITMASK;
00516         }
00517 }
00518 /********************************************************************/
00528 void PWM_ChannelConfig(LPC_PWM_TypeDef *PWMx, uint8_t PWMChannel, uint8_t ModeOption)
00529 {
00530         CHECK_PARAM(PARAM_PWMx(PWMx));
00531         CHECK_PARAM(PARAM_PWM1_EDGE_MODE_CHANNEL(PWMChannel));
00532         CHECK_PARAM(PARAM_PWM_CHANNEL_EDGE(ModeOption));
00533
00534         // Single edge mode
00535         if (ModeOption == PWM_CHANNEL_SINGLE_EDGE)
00536         {
00537                 PWMx->PCR &= (~PWM_PCR_PWMSELn(PWMChannel)) & PWM_PCR_BITMASK;
00538         }
00539         // Double edge mode
00540         else if (PWM_CHANNEL_DUAL_EDGE)
00541         {
00542                 PWMx->PCR |= PWM_PCR_PWMSELn(PWMChannel);
00543         }
00544 }
00545
00546
00547
00548 /********************************************************************/
00557 void PWM_ChannelCmd(LPC_PWM_TypeDef *PWMx, uint8_t PWMChannel, FunctionalState NewState)
00558 {
00559         CHECK_PARAM(PARAM_PWMx(PWMx));
00560         CHECK_PARAM(PARAM_PWM1_CHANNEL(PWMChannel));
00561
00562         if (NewState == ENABLE)
00563         {
00564                 PWMx->PCR |= PWM_PCR_PWMENAn(PWMChannel);
00565         }
00566         else
00567         {
00568                 PWMx->PCR &= (~PWM_PCR_PWMENAn(PWMChannel)) & PWM_PCR_BITMASK;
00569         }
00570 }
00571
00576 #endif /* _PWM */
00577
00582 /* --------------------------------- End Of File ------------------------------ */
Generated on Tue Jun 7 14:58:56 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_pwm.h Source File

C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_pwm.h

Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          lpc17xx_pwm.h                           2011-03-31
00003 */
00027 /* Peripheral group ----------------------------------------------------------- */
00033 #ifndef LPC17XX_PWM_H_
00034 #define LPC17XX_PWM_H_
00035
00036 /* Includes ------------------------------------------------------------------- */
00037 #include "LPC17xx.h"
00038 #include "lpc_types.h"
00039
00040
00041 #ifdef __cplusplus
00042 extern "C"
00043 {
00044 #endif
00045
00046
00047 /* Private Macros ------------------------------------------------------------- */
00052 /* --------------------- BIT DEFINITIONS -------------------------------------- */
00053 /**********************************************************************
00054 * IR register definitions
00055 **********************************************************************/
00057 #define PWM_IR_PWMMRn(n)        ((uint32_t)((n<4)?(1<<n):(1<<(n+4))))
00058
00059 #define PWM_IR_PWMCAPn(n)               ((uint32_t)(1<<(n+4)))
00060
00061 #define PWM_IR_BITMASK                  ((uint32_t)(0x0000073F))
00062
00063 /**********************************************************************
00064 * TCR register definitions
00065 **********************************************************************/
00067 #define PWM_TCR_BITMASK                         ((uint32_t)(0x0000000B))
00068 #define PWM_TCR_COUNTER_ENABLE      ((uint32_t)(1<<0))
00069 #define PWM_TCR_COUNTER_RESET       ((uint32_t)(1<<1))
00070 #define PWM_TCR_PWM_ENABLE          ((uint32_t)(1<<3))
00072 /**********************************************************************
00073 * CTCR register definitions
00074 **********************************************************************/
00075
00076 #define PWM_CTCR_BITMASK                        ((uint32_t)(0x0000000F))
00077
00078 #define PWM_CTCR_MODE(n)                ((uint32_t)(n&0x03))
00079
00080 #define PWM_CTCR_SELECT_INPUT(n)        ((uint32_t)((n&0x03)<<2))
00081
00082 /**********************************************************************
00083 * MCR register definitions
00084 **********************************************************************/
00086 #define PWM_MCR_BITMASK                         ((uint32_t)(0x001FFFFF))
00087
00088 #define PWM_MCR_INT_ON_MATCH(n)     ((uint32_t)(1<<(((n&0x7)<<1)+(n&0x07))))
00089
00090 #define PWM_MCR_RESET_ON_MATCH(n)   ((uint32_t)(1<<(((n&0x7)<<1)+(n&0x07)+1)))
00091
00092 #define PWM_MCR_STOP_ON_MATCH(n)    ((uint32_t)(1<<(((n&0x7)<<1)+(n&0x07)+2)))
00093
00094 /**********************************************************************
00095 * CCR register definitions
00096 **********************************************************************/
00098 #define PWM_CCR_BITMASK                         ((uint32_t)(0x0000003F))
00099
00100 #define PWM_CCR_CAP_RISING(n)           ((uint32_t)(1<<(((n&0x2)<<1)+(n&0x1))))
00101
00102 #define PWM_CCR_CAP_FALLING(n)          ((uint32_t)(1<<(((n&0x2)<<1)+(n&0x1)+1)))
00103
00104 #define PWM_CCR_INT_ON_CAP(n)           ((uint32_t)(1<<(((n&0x2)<<1)+(n&0x1)+2)))
00105
00106 /**********************************************************************
00107 * PCR register definitions
00108 **********************************************************************/
00110 #define PWM_PCR_BITMASK                 (uint32_t)0x00007E7C
00111
00112 #define PWM_PCR_PWMSELn(n)      ((uint32_t)(((n&0x7)<2) ? 0 : (1<<n)))
00113
00114 #define PWM_PCR_PWMENAn(n)      ((uint32_t)(((n&0x7)<1) ? 0 : (1<<(n+8))))
00115
00116 /**********************************************************************
00117 * LER register definitions
00118 **********************************************************************/
00120 #define PWM_LER_BITMASK                         ((uint32_t)(0x0000007F))
00121
00122 #define PWM_LER_EN_MATCHn_LATCH(n)   ((uint32_t)((n<7) ? (1<<n) : 0))
00123
00124 /* ---------------- CHECK PARAMETER DEFINITIONS ---------------------------- */
00126 #define PARAM_PWMx(n)   (((uint32_t *)n)==((uint32_t *)LPC_PWM1))
00127
00129 #define PARAM_PWM1_MATCH_CHANNEL(n)             ((n>=0) && (n<=6))
00130
00132 #define PARAM_PWM1_CHANNEL(n)                   ((n>=1) && (n<=6))
00133
00135 #define PARAM_PWM1_EDGE_MODE_CHANNEL(n)                 ((n>=2) && (n<=6))
00136
00138 #define PARAM_PWM1_CAPTURE_CHANNEL(n)   ((n==0) || (n==1))
00139
00141 #define PARAM_PWM_INTSTAT(n)    ((n==PWM_INTSTAT_MR0) || (n==PWM_INTSTAT_MR1) || (n==PWM_INTSTAT_MR2) \
00142 || (n==PWM_INTSTAT_MR3) || (n==PWM_INTSTAT_MR4) || (n==PWM_INTSTAT_MR5) \
00143 || (n==PWM_INTSTAT_MR6) || (n==PWM_INTSTAT_CAP0) || (n==PWM_INTSTAT_CAP1))
00144
00149 /* Public Types --------------------------------------------------------------- */
00155 typedef struct {
00156
00157         uint8_t PrescaleOption;
00161         uint8_t Reserved[3];
00162         uint32_t PrescaleValue;
00165 } PWM_TIMERCFG_Type;
00166
00168 typedef struct {
00169
00170         uint8_t CounterOption;
00175         uint8_t CountInputSelect;
00179         uint8_t Reserved[2];
00180 } PWM_COUNTERCFG_Type;
00181
00183 typedef struct {
00184         uint8_t MatchChannel;
00186         uint8_t IntOnMatch;
00190         uint8_t StopOnMatch;
00194         uint8_t ResetOnMatch;
00198 } PWM_MATCHCFG_Type;
00199
00200
00202 typedef struct {
00203         uint8_t CaptureChannel;
00205         uint8_t RisingEdge;
00209         uint8_t FallingEdge;
00213         uint8_t IntOnCaption;
00217 } PWM_CAPTURECFG_Type;
00218
00219 /* Timer/Counter in PWM configuration type definition -----------------------------------*/
00220
00222 typedef enum {
00223         PWM_MODE_TIMER = 0,
00224         PWM_MODE_COUNTER
00225 } PWM_TC_MODE_OPT;
00226
00227 #define PARAM_PWM_TC_MODE(n) ((n==PWM_MODE_TIMER) || (n==PWM_MODE_COUNTER))
00228
00229
00231 typedef enum
00232 {
00233         PWM_TIMER_PRESCALE_TICKVAL = 0,
00234         PWM_TIMER_PRESCALE_USVAL
00235 } PWM_TIMER_PRESCALE_OPT;
00236
00237 #define PARAM_PWM_TIMER_PRESCALE(n) ((n==PWM_TIMER_PRESCALE_TICKVAL) || (n==PWM_TIMER_PRESCALE_USVAL))
00238
00239
00241 typedef enum {
00242         PWM_COUNTER_PCAP1_0 = 0,
00243         PWM_COUNTER_PCAP1_1
00244 } PWM_COUNTER_INPUTSEL_OPT;
00245
00246 #define PARAM_PWM_COUNTER_INPUTSEL(n) ((n==PWM_COUNTER_PCAP1_0) || (n==PWM_COUNTER_PCAP1_1))
00247
00249 typedef enum {
00250     PWM_COUNTER_RISING = 1,
00251     PWM_COUNTER_FALLING = 2,
00252     PWM_COUNTER_ANY = 3
00253 } PWM_COUNTER_EDGE_OPT;
00254
00255 #define PARAM_PWM_COUNTER_EDGE(n)       ((n==PWM_COUNTER_RISING) || (n==PWM_COUNTER_FALLING) \
00256 || (n==PWM_COUNTER_ANY))
00257
00258
00259 /* PWM configuration type definition ----------------------------------------------------- */
00261 typedef enum {
00262     PWM_CHANNEL_SINGLE_EDGE,
00263     PWM_CHANNEL_DUAL_EDGE
00264 } PWM_CHANNEL_EDGE_OPT;
00265
00266 #define PARAM_PWM_CHANNEL_EDGE(n)       ((n==PWM_CHANNEL_SINGLE_EDGE) || (n==PWM_CHANNEL_DUAL_EDGE))
00267
00268
00270 typedef enum {
00271         PWM_MATCH_UPDATE_NOW = 0,
00272         PWM_MATCH_UPDATE_NEXT_RST
00274 } PWM_MATCH_UPDATE_OPT;
00275
00276 #define PARAM_PWM_MATCH_UPDATE(n)       ((n==PWM_MATCH_UPDATE_NOW) || (n==PWM_MATCH_UPDATE_NEXT_RST))
00277
00278
00281 typedef enum
00282 {
00283         PWM_INTSTAT_MR0 = PWM_IR_PWMMRn(0),
00284         PWM_INTSTAT_MR1 = PWM_IR_PWMMRn(1),
00285         PWM_INTSTAT_MR2 = PWM_IR_PWMMRn(2),
00286         PWM_INTSTAT_MR3 = PWM_IR_PWMMRn(3),
00287         PWM_INTSTAT_CAP0 = PWM_IR_PWMCAPn(0),
00288         PWM_INTSTAT_CAP1 = PWM_IR_PWMCAPn(1),
00289         PWM_INTSTAT_MR4 = PWM_IR_PWMMRn(4),
00290         PWM_INTSTAT_MR6 = PWM_IR_PWMMRn(5),
00291         PWM_INTSTAT_MR5 = PWM_IR_PWMMRn(6)
00292 }PWM_INTSTAT_TYPE;
00293
00295 typedef struct
00296 {
00297         uint32_t Matchvalue;
00298         FlagStatus Status;
00299 }PWM_Match_T;
00300
00306 /* Public Functions ----------------------------------------------------------- */
00311 void PWM_PinConfig(LPC_PWM_TypeDef *PWMx, uint8_t PWM_Channel, uint8_t PinselOption);
00312 IntStatus PWM_GetIntStatus(LPC_PWM_TypeDef *PWMx, uint32_t IntFlag);
00313 void PWM_ClearIntPending(LPC_PWM_TypeDef *PWMx, uint32_t IntFlag);
00314 void PWM_ConfigStructInit(uint8_t PWMTimerCounterMode, void *PWM_InitStruct);
00315 void PWM_Init(LPC_PWM_TypeDef *PWMx, uint32_t PWMTimerCounterMode, void *PWM_ConfigStruct);
00316 void PWM_DeInit (LPC_PWM_TypeDef *PWMx);
00317 void PWM_Cmd(LPC_PWM_TypeDef *PWMx, FunctionalState NewState);
00318 void PWM_CounterCmd(LPC_PWM_TypeDef *PWMx, FunctionalState NewState);
00319 void PWM_ResetCounter(LPC_PWM_TypeDef *PWMx);
00320 void PWM_ConfigMatch(LPC_PWM_TypeDef *PWMx, PWM_MATCHCFG_Type *PWM_MatchConfigStruct);
00321 void PWM_ConfigCapture(LPC_PWM_TypeDef *PWMx, PWM_CAPTURECFG_Type *PWM_CaptureConfigStruct);
00322 uint32_t PWM_GetCaptureValue(LPC_PWM_TypeDef *PWMx, uint8_t CaptureChannel);
00323 void PWM_MatchUpdate(LPC_PWM_TypeDef *PWMx, uint8_t MatchChannel, \
00324                                         uint32_t MatchValue, uint8_t UpdateType);
00325 void PWM_ChannelConfig(LPC_PWM_TypeDef *PWMx, uint8_t PWMChannel, uint8_t ModeOption);
00326 void PWM_ChannelCmd(LPC_PWM_TypeDef *PWMx, uint8_t PWMChannel, FunctionalState NewState);
00327
00332 #ifdef __cplusplus
00333 }
00334 #endif
00335
00336 #endif /* LPC17XX_PWM_H_ */
00337
00342 /* --------------------------------- End Of File ------------------------------ */
Generated on Tue Jun 7 14:58:55 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Drivers/source/lpc17xx_qei.c Source File

C:/nxpdrv/LPC1700CMSIS/Drivers/source/lpc17xx_qei.c

Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          lpc17xx_qei.c                           2010-05-21
00003 */
00026 /* Peripheral group ----------------------------------------------------------- */
00031 /* Includes ------------------------------------------------------------------- */
00032 #include "lpc17xx_qei.h"
00033 #include "lpc17xx_clkpwr.h"
00034
00035
00036 /* If this source file built with example, the LPC17xx FW library configuration
00037  * file in each example directory ("lpc17xx_libcfg.h") must be included,
00038  * otherwise the default FW library configuration file must be included instead
00039  */
00040 #ifdef __BUILD_WITH_EXAMPLE__
00041 #include "lpc17xx_libcfg.h"
00042 #else
00043 #include "lpc17xx_libcfg_default.h"
00044 #endif /* __BUILD_WITH_EXAMPLE__ */
00045
00046
00047 #ifdef _QEI
00048
00049 /* Private Types -------------------------------------------------------------- */
00057 typedef union {
00058         QEI_CFG_Type bmQEIConfig;
00059         uint32_t ulQEIConfig;
00060 } QEI_CFGOPT_Type;
00061
00067 /* Public Functions ----------------------------------------------------------- */
00072 /*********************************************************************/
00083 void QEI_Reset(LPC_QEI_TypeDef *QEIx, uint32_t ulResetType)
00084 {
00085         CHECK_PARAM(PARAM_QEIx(QEIx));
00086         CHECK_PARAM(PARAM_QEI_RESET(ulResetType));
00087
00088         QEIx->QEICON = ulResetType;
00089 }
00090
00091 /*********************************************************************/
00100 void QEI_Init(LPC_QEI_TypeDef *QEIx, QEI_CFG_Type *QEI_ConfigStruct)
00101 {
00102
00103         CHECK_PARAM(PARAM_QEIx(QEIx));
00104         CHECK_PARAM(PARAM_QEI_DIRINV(QEI_ConfigStruct->DirectionInvert));
00105         CHECK_PARAM(PARAM_QEI_SIGNALMODE(QEI_ConfigStruct->SignalMode));
00106         CHECK_PARAM(PARAM_QEI_CAPMODE(QEI_ConfigStruct->CaptureMode));
00107         CHECK_PARAM(PARAM_QEI_INVINX(QEI_ConfigStruct->InvertIndex));
00108
00109         /* Set up clock and power for QEI module */
00110         CLKPWR_ConfigPPWR (CLKPWR_PCONP_PCQEI, ENABLE);
00111
00112         /* As default, peripheral clock for QEI module
00113          * is set to FCCLK / 2 */
00114         CLKPWR_SetPCLKDiv(CLKPWR_PCLKSEL_QEI, CLKPWR_PCLKSEL_CCLK_DIV_1);
00115
00116         // Reset all remaining value in QEI peripheral
00117         QEIx->QEICON = QEI_CON_RESP | QEI_CON_RESV | QEI_CON_RESI;
00118         QEIx->QEIMAXPOS = 0x00;
00119         QEIx->CMPOS0 = 0x00;
00120         QEIx->CMPOS1 = 0x00;
00121         QEIx->CMPOS2 = 0x00;
00122         QEIx->INXCMP = 0x00;
00123         QEIx->QEILOAD = 0x00;
00124         QEIx->VELCOMP = 0x00;
00125         QEIx->FILTER = 0x00;
00126         // Disable all Interrupt
00127         QEIx->QEIIEC = QEI_IECLR_BITMASK;
00128         // Clear all Interrupt pending
00129         QEIx->QEICLR = QEI_INTCLR_BITMASK;
00130         // Set QEI configuration value corresponding to its setting up value
00131         QEIx->QEICONF = ((QEI_CFGOPT_Type *)QEI_ConfigStruct)->ulQEIConfig;
00132 }
00133
00134
00135 /*********************************************************************/
00141 void QEI_DeInit(LPC_QEI_TypeDef *QEIx)
00142 {
00143         CHECK_PARAM(PARAM_QEIx(QEIx));
00144
00145         /* Turn off clock and power for QEI module */
00146         CLKPWR_ConfigPPWR (CLKPWR_PCONP_PCQEI, DISABLE);
00147 }
00148
00149
00150 /*****************************************************************************/
00160 void QEI_ConfigStructInit(QEI_CFG_Type *QIE_InitStruct)
00161 {
00162         QIE_InitStruct->CaptureMode = QEI_CAPMODE_4X;
00163         QIE_InitStruct->DirectionInvert = QEI_DIRINV_NONE;
00164         QIE_InitStruct->InvertIndex = QEI_INVINX_NONE;
00165         QIE_InitStruct->SignalMode = QEI_SIGNALMODE_QUAD;
00166 }
00167
00168
00169 /*********************************************************************/
00176 FlagStatus QEI_GetStatus(LPC_QEI_TypeDef *QEIx, uint32_t ulFlagType)
00177 {
00178         CHECK_PARAM(PARAM_QEIx(QEIx));
00179         CHECK_PARAM(PARAM_QEI_STATUS(ulFlagType));
00180         return ((QEIx->QEISTAT & ulFlagType) ? SET : RESET);
00181 }
00182
00183 /*********************************************************************/
00188 uint32_t QEI_GetPosition(LPC_QEI_TypeDef *QEIx)
00189 {
00190         CHECK_PARAM(PARAM_QEIx(QEIx));
00191         return (QEIx->QEIPOS);
00192 }
00193
00194 /*********************************************************************/
00200 void QEI_SetMaxPosition(LPC_QEI_TypeDef *QEIx, uint32_t ulMaxPos)
00201 {
00202         CHECK_PARAM(PARAM_QEIx(QEIx));
00203         QEIx->QEIMAXPOS = ulMaxPos;
00204 }
00205
00206 /*********************************************************************/
00216 void QEI_SetPositionComp(LPC_QEI_TypeDef *QEIx, uint8_t bPosCompCh, uint32_t ulPosComp)
00217 {
00218         uint32_t *tmp;
00219
00220         CHECK_PARAM(PARAM_QEIx(QEIx));
00221         CHECK_PARAM(PARAM_QEI_COMPPOS_CH(bPosCompCh));
00222         tmp = (uint32_t *) (&(QEIx->CMPOS0) + bPosCompCh * 4);
00223         *tmp = ulPosComp;
00224
00225 }
00226
00227 /*********************************************************************/
00232 uint32_t QEI_GetIndex(LPC_QEI_TypeDef *QEIx)
00233 {
00234         CHECK_PARAM(PARAM_QEIx(QEIx));
00235         return (QEIx->INXCNT);
00236 }
00237
00238 /*********************************************************************/
00244 void QEI_SetIndexComp(LPC_QEI_TypeDef *QEIx, uint32_t ulIndexComp)
00245 {
00246         CHECK_PARAM(PARAM_QEIx(QEIx));
00247         QEIx->INXCMP = ulIndexComp;
00248 }
00249
00250 /*********************************************************************/
00259 void QEI_SetTimerReload(LPC_QEI_TypeDef *QEIx, QEI_RELOADCFG_Type *QEIReloadStruct)
00260 {
00261         uint64_t pclk;
00262
00263         CHECK_PARAM(PARAM_QEIx(QEIx));
00264         CHECK_PARAM(PARAM_QEI_TIMERRELOAD(QEIReloadStruct->ReloadOption));
00265
00266         if (QEIReloadStruct->ReloadOption == QEI_TIMERRELOAD_TICKVAL) {
00267                 QEIx->QEILOAD = QEIReloadStruct->ReloadValue - 1;
00268         } else {
00269                 pclk = (uint64_t)CLKPWR_GetPCLK(CLKPWR_PCLKSEL_QEI);
00270                 pclk = (pclk /(1000000/QEIReloadStruct->ReloadValue)) - 1;
00271                 QEIx->QEILOAD = (uint32_t)pclk;
00272         }
00273 }
00274
00275 /*********************************************************************/
00280 uint32_t QEI_GetTimer(LPC_QEI_TypeDef *QEIx)
00281 {
00282         CHECK_PARAM(PARAM_QEIx(QEIx));
00283         return (QEIx->QEITIME);
00284 }
00285
00286 /*********************************************************************/
00291 uint32_t QEI_GetVelocity(LPC_QEI_TypeDef *QEIx)
00292 {
00293         CHECK_PARAM(PARAM_QEIx(QEIx));
00294         return (QEIx->QEIVEL);
00295 }
00296
00297 /*********************************************************************/
00304 uint32_t QEI_GetVelocityCap(LPC_QEI_TypeDef *QEIx)
00305 {
00306         CHECK_PARAM(PARAM_QEIx(QEIx));
00307         return (QEIx->QEICAP);
00308 }
00309
00310 /*********************************************************************/
00316 void QEI_SetVelocityComp(LPC_QEI_TypeDef *QEIx, uint32_t ulVelComp)
00317 {
00318         CHECK_PARAM(PARAM_QEIx(QEIx));
00319         QEIx->VELCOMP = ulVelComp;
00320 }
00321
00322 /*********************************************************************/
00329 void QEI_SetDigiFilter(LPC_QEI_TypeDef *QEIx, uint32_t ulSamplingPulse)
00330 {
00331         CHECK_PARAM(PARAM_QEIx(QEIx));
00332         QEIx->FILTER = ulSamplingPulse;
00333 }
00334
00335 /*********************************************************************/
00359 FlagStatus QEI_GetIntStatus(LPC_QEI_TypeDef *QEIx, uint32_t ulIntType)
00360 {
00361         CHECK_PARAM(PARAM_QEIx(QEIx));
00362         CHECK_PARAM(PARAM_QEI_INTFLAG(ulIntType));
00363
00364         return((QEIx->QEIINTSTAT & ulIntType) ? SET : RESET);
00365 }
00366
00367 /*********************************************************************/
00393 void QEI_IntCmd(LPC_QEI_TypeDef *QEIx, uint32_t ulIntType, FunctionalState NewState)
00394 {
00395         CHECK_PARAM(PARAM_QEIx(QEIx));
00396         CHECK_PARAM(PARAM_QEI_INTFLAG(ulIntType));
00397         CHECK_PARAM(PARAM_FUNCTIONALSTATE(NewState));
00398
00399         if (NewState == ENABLE) {
00400                 QEIx->QEIIES = ulIntType;
00401         } else {
00402                 QEIx->QEIIEC = ulIntType;
00403         }
00404 }
00405
00406
00407 /*********************************************************************/
00430 void QEI_IntSet(LPC_QEI_TypeDef *QEIx, uint32_t ulIntType)
00431 {
00432         CHECK_PARAM(PARAM_QEIx(QEIx));
00433         CHECK_PARAM(PARAM_QEI_INTFLAG(ulIntType));
00434
00435         QEIx->QEISET = ulIntType;
00436 }
00437
00438 /*********************************************************************/
00461 void QEI_IntClear(LPC_QEI_TypeDef *QEIx, uint32_t ulIntType)
00462 {
00463         CHECK_PARAM(PARAM_QEIx(QEIx));
00464         CHECK_PARAM(PARAM_QEI_INTFLAG(ulIntType));
00465
00466         QEIx->QEICLR = ulIntType;
00467 }
00468
00469
00470 /*********************************************************************/
00480 uint32_t QEI_CalculateRPM(LPC_QEI_TypeDef *QEIx, uint32_t ulVelCapValue, uint32_t ulPPR)
00481 {
00482         uint64_t rpm, clock, Load, edges;
00483
00484         // Get current Clock rate for timer input
00485         clock = (uint64_t)CLKPWR_GetPCLK(CLKPWR_PCLKSEL_QEI);
00486         // Get Timer load value (velocity capture period)
00487         Load  = (uint64_t)(QEIx->QEILOAD + 1);
00488         // Get Edge
00489         edges = (uint64_t)((QEIx->QEICONF & QEI_CONF_CAPMODE) ? 4 : 2);
00490         // Calculate RPM
00491         rpm = ((clock * ulVelCapValue * 60) / (Load * ulPPR * edges));
00492
00493         return (uint32_t)(rpm);
00494 }
00495
00496
00501 #endif /* _QEI */
00502
00507 /* --------------------------------- End Of File ------------------------------ */
00508
Generated on Tue Jun 7 14:58:56 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_qei.h Source File

C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_qei.h

Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          lpc17xx_qei.h                           2010-05-21
00003 */
00027 /* Peripheral group ----------------------------------------------------------- */
00033 #ifndef LPC17XX_QEI_H_
00034 #define LPC17XX_QEI_H_
00035
00036 /* Includes ------------------------------------------------------------------- */
00037 #include "LPC17xx.h"
00038 #include "lpc_types.h"
00039
00040
00041 #ifdef __cplusplus
00042 extern "C"
00043 {
00044 #endif
00045
00046 /* Public Macros -------------------------------------------------------------- */
00051 /* QEI Reset types */
00052 #define QEI_RESET_POS                   QEI_CON_RESP
00053 #define QEI_RESET_POSOnIDX              QEI_CON_RESPI
00054 #define QEI_RESET_VEL                   QEI_CON_RESV
00055 #define QEI_RESET_IDX                   QEI_CON_RESI
00057 /* QEI Direction Invert Type Option */
00058 #define QEI_DIRINV_NONE         ((uint32_t)(0))
00059 #define QEI_DIRINV_CMPL         ((uint32_t)(1))
00061 /* QEI Signal Mode Option */
00062 #define QEI_SIGNALMODE_QUAD             ((uint32_t)(0))
00063 #define QEI_SIGNALMODE_CLKDIR   ((uint32_t)(1))
00065 /* QEI Capture Mode Option */
00066 #define QEI_CAPMODE_2X                  ((uint32_t)(0))
00067 #define QEI_CAPMODE_4X                  ((uint32_t)(1))
00069 /* QEI Invert Index Signal Option */
00070 #define QEI_INVINX_NONE                 ((uint32_t)(0))
00071 #define QEI_INVINX_EN                   ((uint32_t)(1))
00073 /* QEI timer reload option */
00074 #define QEI_TIMERRELOAD_TICKVAL ((uint8_t)(0))
00075 #define QEI_TIMERRELOAD_USVAL   ((uint8_t)(1))
00077 /* QEI Flag Status type */
00078 #define QEI_STATUS_DIR                  ((uint32_t)(1<<0))
00080 /* QEI Compare Position channel option */
00081 #define QEI_COMPPOS_CH_0                        ((uint8_t)(0))
00082 #define QEI_COMPPOS_CH_1                        ((uint8_t)(1))
00083 #define QEI_COMPPOS_CH_2                        ((uint8_t)(2))
00085 /* QEI interrupt flag type */
00086 #define QEI_INTFLAG_INX_Int                     ((uint32_t)(1<<0))
00087 #define QEI_INTFLAG_TIM_Int                     ((uint32_t)(1<<1))
00088 #define QEI_INTFLAG_VELC_Int            ((uint32_t)(1<<2))
00089 #define QEI_INTFLAG_DIR_Int                     ((uint32_t)(1<<3))
00090 #define QEI_INTFLAG_ERR_Int                     ((uint32_t)(1<<4))
00091 #define QEI_INTFLAG_ENCLK_Int           ((uint32_t)(1<<5))
00092 #define QEI_INTFLAG_POS0_Int            ((uint32_t)(1<<6))
00094 #define QEI_INTFLAG_POS1_Int            ((uint32_t)(1<<7))
00096 #define QEI_INTFLAG_POS2_Int            ((uint32_t)(1<<8))
00098 #define QEI_INTFLAG_REV_Int                     ((uint32_t)(1<<9))
00100 #define QEI_INTFLAG_POS0REV_Int         ((uint32_t)(1<<10))
00101 #define QEI_INTFLAG_POS1REV_Int         ((uint32_t)(1<<11))
00102 #define QEI_INTFLAG_POS2REV_Int         ((uint32_t)(1<<12))
00109 /* Private Macros ------------------------------------------------------------- */
00110
00114 /* --------------------- BIT DEFINITIONS -------------------------------------- */
00115 /* Quadrature Encoder Interface Control Register Definition --------------------- */
00116 /*********************************************************************/
00119 #define QEI_CON_RESP            ((uint32_t)(1<<0))
00120 #define QEI_CON_RESPI           ((uint32_t)(1<<1))
00121 #define QEI_CON_RESV            ((uint32_t)(1<<2))
00122 #define QEI_CON_RESI            ((uint32_t)(1<<3))
00123 #define QEI_CON_BITMASK         ((uint32_t)(0x0F))
00125 /*********************************************************************/
00128 #define QEI_CONF_DIRINV         ((uint32_t)(1<<0))
00129 #define QEI_CONF_SIGMODE        ((uint32_t)(1<<1))
00130 #define QEI_CONF_CAPMODE        ((uint32_t)(1<<2))
00131 #define QEI_CONF_INVINX         ((uint32_t)(1<<3))
00132 #define QEI_CONF_BITMASK        ((uint32_t)(0x0F))
00134 /*********************************************************************/
00137 #define QEI_STAT_DIR            ((uint32_t)(1<<0))
00138 #define QEI_STAT_BITMASK        ((uint32_t)(1<<0))
00140 /* Quadrature Encoder Interface Interrupt registers definitions --------------------- */
00141 /*********************************************************************/
00144 #define QEI_INTSTAT_INX_Int                     ((uint32_t)(1<<0))
00145 #define QEI_INTSTAT_TIM_Int                     ((uint32_t)(1<<1))
00146 #define QEI_INTSTAT_VELC_Int            ((uint32_t)(1<<2))
00147 #define QEI_INTSTAT_DIR_Int                     ((uint32_t)(1<<3))
00148 #define QEI_INTSTAT_ERR_Int                     ((uint32_t)(1<<4))
00149 #define QEI_INTSTAT_ENCLK_Int           ((uint32_t)(1<<5))
00150 #define QEI_INTSTAT_POS0_Int            ((uint32_t)(1<<6))
00152 #define QEI_INTSTAT_POS1_Int            ((uint32_t)(1<<7))
00154 #define QEI_INTSTAT_POS2_Int            ((uint32_t)(1<<8))
00156 #define QEI_INTSTAT_REV_Int                     ((uint32_t)(1<<9))
00158 #define QEI_INTSTAT_POS0REV_Int         ((uint32_t)(1<<10))
00160 #define QEI_INTSTAT_POS1REV_Int         ((uint32_t)(1<<11))
00162 #define QEI_INTSTAT_POS2REV_Int         ((uint32_t)(1<<12))
00164 #define QEI_INTSTAT_BITMASK                     ((uint32_t)(0x1FFF))
00166 /*********************************************************************/
00169 #define QEI_INTSET_INX_Int                      ((uint32_t)(1<<0))
00170 #define QEI_INTSET_TIM_Int                      ((uint32_t)(1<<1))
00171 #define QEI_INTSET_VELC_Int                     ((uint32_t)(1<<2))
00172 #define QEI_INTSET_DIR_Int                      ((uint32_t)(1<<3))
00173 #define QEI_INTSET_ERR_Int                      ((uint32_t)(1<<4))
00174 #define QEI_INTSET_ENCLK_Int            ((uint32_t)(1<<5))
00175 #define QEI_INTSET_POS0_Int                     ((uint32_t)(1<<6))
00177 #define QEI_INTSET_POS1_Int                     ((uint32_t)(1<<7))
00179 #define QEI_INTSET_POS2_Int                     ((uint32_t)(1<<8))
00181 #define QEI_INTSET_REV_Int                      ((uint32_t)(1<<9))
00183 #define QEI_INTSET_POS0REV_Int          ((uint32_t)(1<<10))
00184 #define QEI_INTSET_POS1REV_Int          ((uint32_t)(1<<11))
00185 #define QEI_INTSET_POS2REV_Int          ((uint32_t)(1<<12))
00186 #define QEI_INTSET_BITMASK                      ((uint32_t)(0x1FFF))
00188 /*********************************************************************/
00191 #define QEI_INTCLR_INX_Int                      ((uint32_t)(1<<0))
00192 #define QEI_INTCLR_TIM_Int                      ((uint32_t)(1<<1))
00193 #define QEI_INTCLR_VELC_Int                     ((uint32_t)(1<<2))
00194 #define QEI_INTCLR_DIR_Int                      ((uint32_t)(1<<3))
00195 #define QEI_INTCLR_ERR_Int                      ((uint32_t)(1<<4))
00196 #define QEI_INTCLR_ENCLK_Int            ((uint32_t)(1<<5))
00197 #define QEI_INTCLR_POS0_Int                     ((uint32_t)(1<<6))
00199 #define QEI_INTCLR_POS1_Int                     ((uint32_t)(1<<7))
00201 #define QEI_INTCLR_POS2_Int                     ((uint32_t)(1<<8))
00203 #define QEI_INTCLR_REV_Int                      ((uint32_t)(1<<9))
00205 #define QEI_INTCLR_POS0REV_Int          ((uint32_t)(1<<10))
00206 #define QEI_INTCLR_POS1REV_Int          ((uint32_t)(1<<11))
00207 #define QEI_INTCLR_POS2REV_Int          ((uint32_t)(1<<12))
00208 #define QEI_INTCLR_BITMASK                      ((uint32_t)(0x1FFF))
00210 /*********************************************************************/
00213 #define QEI_INTEN_INX_Int                       ((uint32_t)(1<<0))
00214 #define QEI_INTEN_TIM_Int                       ((uint32_t)(1<<1))
00215 #define QEI_INTEN_VELC_Int                      ((uint32_t)(1<<2))
00216 #define QEI_INTEN_DIR_Int                       ((uint32_t)(1<<3))
00217 #define QEI_INTEN_ERR_Int                       ((uint32_t)(1<<4))
00218 #define QEI_INTEN_ENCLK_Int                     ((uint32_t)(1<<5))
00219 #define QEI_INTEN_POS0_Int                      ((uint32_t)(1<<6))
00221 #define QEI_INTEN_POS1_Int                      ((uint32_t)(1<<7))
00223 #define QEI_INTEN_POS2_Int                      ((uint32_t)(1<<8))
00225 #define QEI_INTEN_REV_Int                       ((uint32_t)(1<<9))
00227 #define QEI_INTEN_POS0REV_Int           ((uint32_t)(1<<10))
00228 #define QEI_INTEN_POS1REV_Int           ((uint32_t)(1<<11))
00229 #define QEI_INTEN_POS2REV_Int           ((uint32_t)(1<<12))
00230 #define QEI_INTEN_BITMASK                       ((uint32_t)(0x1FFF))
00232 /*********************************************************************/
00235 #define QEI_IESET_INX_Int                       ((uint32_t)(1<<0))
00236 #define QEI_IESET_TIM_Int                       ((uint32_t)(1<<1))
00237 #define QEI_IESET_VELC_Int                      ((uint32_t)(1<<2))
00238 #define QEI_IESET_DIR_Int                       ((uint32_t)(1<<3))
00239 #define QEI_IESET_ERR_Int                       ((uint32_t)(1<<4))
00240 #define QEI_IESET_ENCLK_Int                     ((uint32_t)(1<<5))
00241 #define QEI_IESET_POS0_Int                      ((uint32_t)(1<<6))
00243 #define QEI_IESET_POS1_Int                      ((uint32_t)(1<<7))
00245 #define QEI_IESET_POS2_Int                      ((uint32_t)(1<<8))
00247 #define QEI_IESET_REV_Int                       ((uint32_t)(1<<9))
00249 #define QEI_IESET_POS0REV_Int           ((uint32_t)(1<<10))
00250 #define QEI_IESET_POS1REV_Int           ((uint32_t)(1<<11))
00251 #define QEI_IESET_POS2REV_Int           ((uint32_t)(1<<12))
00252 #define QEI_IESET_BITMASK                       ((uint32_t)(0x1FFF))
00254 /*********************************************************************/
00257 #define QEI_IECLR_INX_Int                       ((uint32_t)(1<<0))
00258 #define QEI_IECLR_TIM_Int                       ((uint32_t)(1<<1))
00259 #define QEI_IECLR_VELC_Int                      ((uint32_t)(1<<2))
00260 #define QEI_IECLR_DIR_Int                       ((uint32_t)(1<<3))
00261 #define QEI_IECLR_ERR_Int                       ((uint32_t)(1<<4))
00262 #define QEI_IECLR_ENCLK_Int                     ((uint32_t)(1<<5))
00263 #define QEI_IECLR_POS0_Int                      ((uint32_t)(1<<6))
00265 #define QEI_IECLR_POS1_Int                      ((uint32_t)(1<<7))
00267 #define QEI_IECLR_POS2_Int                      ((uint32_t)(1<<8))
00269 #define QEI_IECLR_REV_Int                       ((uint32_t)(1<<9))
00271 #define QEI_IECLR_POS0REV_Int           ((uint32_t)(1<<10))
00272 #define QEI_IECLR_POS1REV_Int           ((uint32_t)(1<<11))
00273 #define QEI_IECLR_POS2REV_Int           ((uint32_t)(1<<12))
00274 #define QEI_IECLR_BITMASK                       ((uint32_t)(0x1FFF))
00277 /* ---------------- CHECK PARAMETER DEFINITIONS ---------------------------- */
00278 /* Macro check QEI peripheral */
00279 #define PARAM_QEIx(n)   ((n==LPC_QEI))
00280
00281 /* Macro check QEI reset type */
00282 #define PARAM_QEI_RESET(n)      ((n==QEI_CON_RESP) \
00283 || (n==QEI_RESET_POSOnIDX) \
00284 || (n==QEI_RESET_VEL) \
00285 || (n==QEI_RESET_IDX))
00286
00287 /* Macro check QEI Direction invert mode */
00288 #define PARAM_QEI_DIRINV(n)     ((n==QEI_DIRINV_NONE) || (n==QEI_DIRINV_CMPL))
00289
00290 /* Macro check QEI signal mode */
00291 #define PARAM_QEI_SIGNALMODE(n) ((n==QEI_SIGNALMODE_QUAD) || (n==QEI_SIGNALMODE_CLKDIR))
00292
00293 /* Macro check QEI Capture mode */
00294 #define PARAM_QEI_CAPMODE(n)    ((n==QEI_CAPMODE_2X) || (n==QEI_CAPMODE_4X))
00295
00296 /* Macro check QEI Invert index mode */
00297 #define PARAM_QEI_INVINX(n)             ((n==QEI_INVINX_NONE) || (n==QEI_INVINX_EN))
00298
00299 /* Macro check QEI Direction invert mode */
00300 #define PARAM_QEI_TIMERRELOAD(n)        ((n==QEI_TIMERRELOAD_TICKVAL) || (n==QEI_TIMERRELOAD_USVAL))
00301
00302 /* Macro check QEI status type */
00303 #define PARAM_QEI_STATUS(n)             ((n==QEI_STATUS_DIR))
00304
00305 /* Macro check QEI combine position type */
00306 #define PARAM_QEI_COMPPOS_CH(n)         ((n==QEI_COMPPOS_CH_0) || (n==QEI_COMPPOS_CH_1) || (n==QEI_COMPPOS_CH_2))
00307
00308 /* Macro check QEI interrupt flag type */
00309 #define PARAM_QEI_INTFLAG(n)    ((n==QEI_INTFLAG_INX_Int) \
00310 || (n==QEI_INTFLAG_TIM_Int) \
00311 || (n==QEI_INTFLAG_VELC_Int) \
00312 || (n==QEI_INTFLAG_DIR_Int) \
00313 || (n==QEI_INTFLAG_ERR_Int) \
00314 || (n==QEI_INTFLAG_ENCLK_Int) \
00315 || (n==QEI_INTFLAG_POS0_Int) \
00316 || (n==QEI_INTFLAG_POS1_Int) \
00317 || (n==QEI_INTFLAG_POS2_Int) \
00318 || (n==QEI_INTFLAG_REV_Int) \
00319 || (n==QEI_INTFLAG_POS0REV_Int) \
00320 || (n==QEI_INTFLAG_POS1REV_Int) \
00321 || (n==QEI_INTFLAG_POS2REV_Int))
00322
00326 /* Public Types --------------------------------------------------------------- */
00334 typedef struct {
00335         uint32_t DirectionInvert        :1;
00339         uint32_t SignalMode                     :1;
00343         uint32_t CaptureMode            :1;
00347         uint32_t InvertIndex            :1;
00351 } QEI_CFG_Type;
00352
00356 typedef struct {
00357
00358         uint8_t ReloadOption;
00362         uint8_t Reserved[3];
00363         uint32_t ReloadValue;
00366 } QEI_RELOADCFG_Type;
00367
00376 /* Public Functions ----------------------------------------------------------- */
00381 void QEI_Reset(LPC_QEI_TypeDef *QEIx, uint32_t ulResetType);
00382 void QEI_Init(LPC_QEI_TypeDef *QEIx, QEI_CFG_Type *QEI_ConfigStruct);
00383 void QEI_ConfigStructInit(QEI_CFG_Type *QIE_InitStruct);
00384 void QEI_DeInit(LPC_QEI_TypeDef *QEIx);
00385 FlagStatus QEI_GetStatus(LPC_QEI_TypeDef *QEIx, uint32_t ulFlagType);
00386 uint32_t QEI_GetPosition(LPC_QEI_TypeDef *QEIx);
00387 void QEI_SetMaxPosition(LPC_QEI_TypeDef *QEIx, uint32_t ulMaxPos);
00388 void QEI_SetPositionComp(LPC_QEI_TypeDef *QEIx, uint8_t bPosCompCh, uint32_t ulPosComp);
00389 uint32_t QEI_GetIndex(LPC_QEI_TypeDef *QEIx);
00390 void QEI_SetIndexComp(LPC_QEI_TypeDef *QEIx, uint32_t ulIndexComp);
00391 void QEI_SetTimerReload(LPC_QEI_TypeDef *QEIx, QEI_RELOADCFG_Type *QEIReloadStruct);
00392 uint32_t QEI_GetTimer(LPC_QEI_TypeDef *QEIx);
00393 uint32_t QEI_GetVelocity(LPC_QEI_TypeDef *QEIx);
00394 uint32_t QEI_GetVelocityCap(LPC_QEI_TypeDef *QEIx);
00395 void QEI_SetVelocityComp(LPC_QEI_TypeDef *QEIx, uint32_t ulVelComp);
00396 void QEI_SetDigiFilter(LPC_QEI_TypeDef *QEIx, uint32_t ulSamplingPulse);
00397 FlagStatus QEI_GetIntStatus(LPC_QEI_TypeDef *QEIx, uint32_t ulIntType);
00398 void QEI_IntCmd(LPC_QEI_TypeDef *QEIx, uint32_t ulIntType, FunctionalState NewState);
00399 void QEI_IntSet(LPC_QEI_TypeDef *QEIx, uint32_t ulIntType);
00400 void QEI_IntClear(LPC_QEI_TypeDef *QEIx, uint32_t ulIntType);
00401 uint32_t QEI_CalculateRPM(LPC_QEI_TypeDef *QEIx, uint32_t ulVelCapValue, uint32_t ulPPR);
00402
00403
00408 #ifdef __cplusplus
00409 }
00410 #endif
00411
00412 #endif /* LPC17XX_QEI_H_ */
00413
00418 /* --------------------------------- End Of File ------------------------------ */
Generated on Tue Jun 7 14:58:55 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Drivers/source/lpc17xx_rit.c Source File

C:/nxpdrv/LPC1700CMSIS/Drivers/source/lpc17xx_rit.c

Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          lpc17xx_rit.c                           2010-05-21
00003 */
00026 /* Peripheral group ----------------------------------------------------------- */
00031 /* Includes ------------------------------------------------------------------- */
00032 #include "lpc17xx_rit.h"
00033 #include "lpc17xx_clkpwr.h"
00034
00035 /* If this source file built with example, the LPC17xx FW library configuration
00036  * file in each example directory ("lpc17xx_libcfg.h") must be included,
00037  * otherwise the default FW library configuration file must be included instead
00038  */
00039 #ifdef __BUILD_WITH_EXAMPLE__
00040 #include "lpc17xx_libcfg.h"
00041 #else
00042 #include "lpc17xx_libcfg_default.h"
00043 #endif /* __BUILD_WITH_EXAMPLE__ */
00044
00045 #ifdef _RIT
00046
00047 /* Public Functions ----------------------------------------------------------- */
00052 /******************************************************************************//*
00053  * @brief               Initial for RIT
00054  *                                      - Turn on power and clock
00055  *                                      - Setup default register values
00056  * @param[in]   RITx is RIT peripheral selected, should be: LPC_RIT
00057  * @return              None
00058  *******************************************************************************/
00059 void RIT_Init(LPC_RIT_TypeDef *RITx)
00060 {
00061         CHECK_PARAM(PARAM_RITx(RITx));
00062         CLKPWR_ConfigPPWR (CLKPWR_PCONP_PCRIT, ENABLE);
00063         //Set up default register values
00064         RITx->RICOMPVAL = 0xFFFFFFFF;
00065         RITx->RIMASK    = 0x00000000;
00066         RITx->RICTRL    = 0x0C;
00067         RITx->RICOUNTER = 0x00000000;
00068         // Turn on power and clock
00069
00070 }
00071 /******************************************************************************//*
00072  * @brief               DeInitial for RIT
00073  *                                      - Turn off power and clock
00074  *                                      - ReSetup default register values
00075  * @param[in]   RITx is RIT peripheral selected, should be: LPC_RIT
00076  * @return              None
00077  *******************************************************************************/
00078 void RIT_DeInit(LPC_RIT_TypeDef *RITx)
00079 {
00080         CHECK_PARAM(PARAM_RITx(RITx));
00081
00082         // Turn off power and clock
00083         CLKPWR_ConfigPPWR (CLKPWR_PCONP_PCRIT, DISABLE);
00084         //ReSetup default register values
00085         RITx->RICOMPVAL = 0xFFFFFFFF;
00086         RITx->RIMASK    = 0x00000000;
00087         RITx->RICTRL    = 0x0C;
00088         RITx->RICOUNTER = 0x00000000;
00089 }
00090
00091 /******************************************************************************//*
00092  * @brief               Set compare value, mask value and time counter value
00093  * @param[in]   RITx is RIT peripheral selected, should be: LPC_RIT
00094  * @param[in]   time_interval: timer interval value (ms)
00095  * @return              None
00096  *******************************************************************************/
00097 void RIT_TimerConfig(LPC_RIT_TypeDef *RITx, uint32_t time_interval)
00098 {
00099         uint32_t clock_rate, cmp_value;
00100         CHECK_PARAM(PARAM_RITx(RITx));
00101
00102         // Get PCLK value of RIT
00103         clock_rate = CLKPWR_GetPCLK(CLKPWR_PCLKSEL_RIT);
00104
00105         /* calculate compare value for RIT to generate interrupt at
00106          * specified time interval
00107          * COMPVAL = (RIT_PCLK * time_interval)/1000
00108          * (with time_interval unit is millisecond)
00109          */
00110         cmp_value = (clock_rate /1000) * time_interval;
00111         RITx->RICOMPVAL = cmp_value;
00112
00113         /* Set timer enable clear bit to clear timer to 0 whenever
00114          * counter value equals the contents of RICOMPVAL
00115          */
00116         RITx->RICTRL |= (1<<1);
00117 }
00118
00119
00120 /******************************************************************************//*
00121  * @brief               Enable/Disable Timer
00122  * @param[in]   RITx is RIT peripheral selected, should be: LPC_RIT
00123  * @param[in]   NewState        New State of this function
00124  *                                      -ENABLE: Enable Timer
00125  *                                      -DISABLE: Disable Timer
00126  * @return              None
00127  *******************************************************************************/
00128 void RIT_Cmd(LPC_RIT_TypeDef *RITx, FunctionalState NewState)
00129 {
00130         CHECK_PARAM(PARAM_RITx(RITx));
00131         CHECK_PARAM(PARAM_FUNCTIONALSTATE(NewState));
00132
00133         //Enable or Disable Timer
00134         if(NewState==ENABLE)
00135         {
00136                 RITx->RICTRL |= RIT_CTRL_TEN;
00137         }
00138         else
00139         {
00140                 RITx->RICTRL &= ~RIT_CTRL_TEN;
00141         }
00142 }
00143
00144 /******************************************************************************//*
00145  * @brief               Timer Enable/Disable on debug
00146  * @param[in]   RITx is RIT peripheral selected, should be: LPC_RIT
00147  * @param[in]   NewState        New State of this function
00148  *                                      -ENABLE: The timer is halted whenever a hardware break condition occurs
00149  *                                      -DISABLE: Hardware break has no effect on the timer operation
00150  * @return              None
00151  *******************************************************************************/
00152 void RIT_TimerDebugCmd(LPC_RIT_TypeDef *RITx, FunctionalState NewState)
00153 {
00154         CHECK_PARAM(PARAM_RITx(RITx));
00155         CHECK_PARAM(PARAM_FUNCTIONALSTATE(NewState));
00156
00157         //Timer Enable/Disable on break
00158         if(NewState==ENABLE)
00159         {
00160                 RITx->RICTRL |= RIT_CTRL_ENBR;
00161         }
00162         else
00163         {
00164                 RITx->RICTRL &= ~RIT_CTRL_ENBR;
00165         }
00166 }
00167 /******************************************************************************//*
00168  * @brief               Check whether interrupt flag is set or not
00169  * @param[in]   RITx is RIT peripheral selected, should be: LPC_RIT
00170  * @return              Current interrupt status, could be: SET/RESET
00171  *******************************************************************************/
00172 IntStatus RIT_GetIntStatus(LPC_RIT_TypeDef *RITx)
00173 {
00174         uint8_t result;
00175         CHECK_PARAM(PARAM_RITx(RITx));
00176         if((RITx->RICTRL&RIT_CTRL_INTEN)==1)    result= SET;
00177         else return RESET;
00178         //clear interrupt flag
00179         RITx->RICTRL |= RIT_CTRL_INTEN;
00180         return result;
00181 }
00182
00187 #endif /* _RIT */
00188
00193 /* --------------------------------- End Of File ------------------------------ */
Generated on Tue Jun 7 14:58:56 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_rit.h Source File

C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_rit.h

Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          lpc17xx_rit.h                           2010-05-21
00003 */
00027 /* Peripheral group ----------------------------------------------------------- */
00033 #ifndef LPC17XX_RIT_H_
00034 #define LPC17XX_RIT_H_
00035
00036 /* Includes ------------------------------------------------------------------- */
00037 #include "LPC17xx.h"
00038 #include "lpc_types.h"
00039
00040
00041 #ifdef __cplusplus
00042 extern "C"
00043 {
00044 #endif
00045
00046
00047 /* Private Macros ------------------------------------------------------------- */
00052 /* --------------------- BIT DEFINITIONS -------------------------------------- */
00053 /*********************************************************************/
00057 #define RIT_CTRL_INTEN  ((uint32_t) (1))
00058
00059 #define RIT_CTRL_ENCLR  ((uint32_t) _BIT(1))
00060
00061 #define RIT_CTRL_ENBR   ((uint32_t) _BIT(2))
00062
00063 #define RIT_CTRL_TEN    ((uint32_t) _BIT(3))
00064
00066 #define PARAM_RITx(n)   (((uint32_t *)n)==((uint32_t *)LPC_RIT))
00067
00073 /* Public Functions ----------------------------------------------------------- */
00077 /* RIT Init/DeInit functions */
00078 void RIT_Init(LPC_RIT_TypeDef *RITx);
00079 void RIT_DeInit(LPC_RIT_TypeDef *RITx);
00080
00081 /* RIT config timer functions */
00082 void RIT_TimerConfig(LPC_RIT_TypeDef *RITx, uint32_t time_interval);
00083
00084 /* Enable/Disable RIT functions */
00085 void RIT_TimerClearCmd(LPC_RIT_TypeDef *RITx, FunctionalState NewState);
00086 void RIT_Cmd(LPC_RIT_TypeDef *RITx, FunctionalState NewState);
00087 void RIT_TimerDebugCmd(LPC_RIT_TypeDef *RITx, FunctionalState NewState);
00088
00089 /* RIT Interrupt functions */
00090 IntStatus RIT_GetIntStatus(LPC_RIT_TypeDef *RITx);
00091
00096 #ifdef __cplusplus
00097 }
00098 #endif
00099
00100 #endif /* LPC17XX_RIT_H_ */
00101
00106 /* --------------------------------- End Of File ------------------------------ */
Generated on Tue Jun 7 14:58:55 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Drivers/source/lpc17xx_rtc.c Source File

C:/nxpdrv/LPC1700CMSIS/Drivers/source/lpc17xx_rtc.c

Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          lpc17xx_rtc.c                           2011-06-06
00003 */
00027 /* Peripheral group ----------------------------------------------------------- */
00032 /* Includes ------------------------------------------------------------------- */
00033 #include "lpc17xx_rtc.h"
00034 #include "lpc17xx_clkpwr.h"
00035
00036
00037 /* If this source file built with example, the LPC17xx FW library configuration
00038  * file in each example directory ("lpc17xx_libcfg.h") must be included,
00039  * otherwise the default FW library configuration file must be included instead
00040  */
00041 #ifdef __BUILD_WITH_EXAMPLE__
00042 #include "lpc17xx_libcfg.h"
00043 #else
00044 #include "lpc17xx_libcfg_default.h"
00045 #endif /* __BUILD_WITH_EXAMPLE__ */
00046
00047
00048 #ifdef _RTC
00049
00050 /* Public Functions ----------------------------------------------------------- */
00055 /********************************************************************/
00060 void RTC_Init (LPC_RTC_TypeDef *RTCx)
00061 {
00062         CHECK_PARAM(PARAM_RTCx(RTCx));
00063
00064         /* Set up clock and power for RTC module */
00065         CLKPWR_ConfigPPWR (CLKPWR_PCONP_PCRTC, ENABLE);
00066
00067         // Clear all register to be default
00068         RTCx->ILR = 0x00;
00069         RTCx->CCR = 0x00;
00070         RTCx->CIIR = 0x00;
00071         RTCx->AMR = 0xFF;
00072         RTCx->CALIBRATION = 0x00;
00073 }
00074
00075
00076 /*********************************************************************/
00082 void RTC_DeInit(LPC_RTC_TypeDef *RTCx)
00083 {
00084         CHECK_PARAM(PARAM_RTCx(RTCx));
00085
00086         RTCx->CCR = 0x00;
00087         // Disable power and clock for RTC module
00088         CLKPWR_ConfigPPWR (CLKPWR_PCONP_PCRTC, DISABLE);
00089 }
00090
00091 /*********************************************************************/
00096 void RTC_ResetClockTickCounter(LPC_RTC_TypeDef *RTCx)
00097 {
00098         CHECK_PARAM(PARAM_RTCx(RTCx));
00099
00100         RTCx->CCR |= RTC_CCR_CTCRST;
00101         RTCx->CCR &= (~RTC_CCR_CTCRST) & RTC_CCR_BITMASK;
00102 }
00103
00104 /*********************************************************************/
00112 void RTC_Cmd (LPC_RTC_TypeDef *RTCx, FunctionalState NewState)
00113 {
00114         CHECK_PARAM(PARAM_RTCx(RTCx));
00115         CHECK_PARAM(PARAM_FUNCTIONALSTATE(NewState));
00116
00117         if (NewState == ENABLE)
00118         {
00119                 RTCx->CCR |= RTC_CCR_CLKEN;
00120         }
00121         else
00122         {
00123                 RTCx->CCR &= (~RTC_CCR_CLKEN) & RTC_CCR_BITMASK;
00124         }
00125 }
00126
00127
00128 /*********************************************************************/
00150 void RTC_CntIncrIntConfig (LPC_RTC_TypeDef *RTCx, uint32_t CntIncrIntType, \
00151                                                                 FunctionalState NewState)
00152 {
00153         CHECK_PARAM(PARAM_RTCx(RTCx));
00154         CHECK_PARAM(PARAM_FUNCTIONALSTATE(NewState));
00155         CHECK_PARAM(PARAM_RTC_TIMETYPE(CntIncrIntType));
00156
00157         if (NewState ==  ENABLE)
00158         {
00159                 switch (CntIncrIntType)
00160                 {
00161                 case RTC_TIMETYPE_SECOND:
00162                         RTCx->CIIR |= RTC_CIIR_IMSEC;
00163                         break;
00164                 case RTC_TIMETYPE_MINUTE:
00165                         RTCx->CIIR |= RTC_CIIR_IMMIN;
00166                         break;
00167                 case RTC_TIMETYPE_HOUR:
00168                         RTCx->CIIR |= RTC_CIIR_IMHOUR;
00169                         break;
00170                 case RTC_TIMETYPE_DAYOFWEEK:
00171                         RTCx->CIIR |= RTC_CIIR_IMDOW;
00172                         break;
00173                 case RTC_TIMETYPE_DAYOFMONTH:
00174                         RTCx->CIIR |= RTC_CIIR_IMDOM;
00175                         break;
00176                 case RTC_TIMETYPE_DAYOFYEAR:
00177                         RTCx->CIIR |= RTC_CIIR_IMDOY;
00178                         break;
00179                 case RTC_TIMETYPE_MONTH:
00180                         RTCx->CIIR |= RTC_CIIR_IMMON;
00181                         break;
00182                 case RTC_TIMETYPE_YEAR:
00183                         RTCx->CIIR |= RTC_CIIR_IMYEAR;
00184                         break;
00185                 }
00186         }
00187         else
00188         {
00189                 switch (CntIncrIntType)
00190                 {
00191                 case RTC_TIMETYPE_SECOND:
00192                         RTCx->CIIR &= (~RTC_CIIR_IMSEC) & RTC_CIIR_BITMASK;
00193                         break;
00194                 case RTC_TIMETYPE_MINUTE:
00195                         RTCx->CIIR &= (~RTC_CIIR_IMMIN) & RTC_CIIR_BITMASK;
00196                         break;
00197                 case RTC_TIMETYPE_HOUR:
00198                         RTCx->CIIR &= (~RTC_CIIR_IMHOUR) & RTC_CIIR_BITMASK;
00199                         break;
00200                 case RTC_TIMETYPE_DAYOFWEEK:
00201                         RTCx->CIIR &= (~RTC_CIIR_IMDOW) & RTC_CIIR_BITMASK;
00202                         break;
00203                 case RTC_TIMETYPE_DAYOFMONTH:
00204                         RTCx->CIIR &= (~RTC_CIIR_IMDOM) & RTC_CIIR_BITMASK;
00205                         break;
00206                 case RTC_TIMETYPE_DAYOFYEAR:
00207                         RTCx->CIIR &= (~RTC_CIIR_IMDOY) & RTC_CIIR_BITMASK;
00208                         break;
00209                 case RTC_TIMETYPE_MONTH:
00210                         RTCx->CIIR &= (~RTC_CIIR_IMMON) & RTC_CIIR_BITMASK;
00211                         break;
00212                 case RTC_TIMETYPE_YEAR:
00213                         RTCx->CIIR &= (~RTC_CIIR_IMYEAR) & RTC_CIIR_BITMASK;
00214                         break;
00215                 }
00216         }
00217 }
00218
00219
00220 /*********************************************************************/
00242 void RTC_AlarmIntConfig (LPC_RTC_TypeDef *RTCx, uint32_t AlarmTimeType, \
00243                                                                 FunctionalState NewState)
00244 {
00245         CHECK_PARAM(PARAM_RTCx(RTCx));
00246         CHECK_PARAM(PARAM_FUNCTIONALSTATE(NewState));
00247         CHECK_PARAM(PARAM_RTC_TIMETYPE(AlarmTimeType));
00248
00249         if (NewState == ENABLE)
00250         {
00251                 switch (AlarmTimeType)
00252                 {
00253                 case RTC_TIMETYPE_SECOND:
00254                         RTCx->AMR &= (~RTC_AMR_AMRSEC) & RTC_AMR_BITMASK;
00255                         break;
00256                 case RTC_TIMETYPE_MINUTE:
00257                         RTCx->AMR &= (~RTC_AMR_AMRMIN) & RTC_AMR_BITMASK;
00258                         break;
00259                 case RTC_TIMETYPE_HOUR:
00260                         RTCx->AMR &= (~RTC_AMR_AMRHOUR) & RTC_AMR_BITMASK;
00261                         break;
00262                 case RTC_TIMETYPE_DAYOFWEEK:
00263                         RTCx->AMR &= (~RTC_AMR_AMRDOW) & RTC_AMR_BITMASK;
00264                         break;
00265                 case RTC_TIMETYPE_DAYOFMONTH:
00266                         RTCx->AMR &= (~RTC_AMR_AMRDOM) & RTC_AMR_BITMASK;
00267                         break;
00268                 case RTC_TIMETYPE_DAYOFYEAR:
00269                         RTCx->AMR &= (~RTC_AMR_AMRDOY) & RTC_AMR_BITMASK;
00270                         break;
00271                 case RTC_TIMETYPE_MONTH:
00272                         RTCx->AMR &= (~RTC_AMR_AMRMON) & RTC_AMR_BITMASK;
00273                         break;
00274                 case RTC_TIMETYPE_YEAR:
00275                         RTCx->AMR &= (~RTC_AMR_AMRYEAR) & RTC_AMR_BITMASK;
00276                         break;
00277                 }
00278         }
00279         else
00280         {
00281                 switch (AlarmTimeType)
00282                 {
00283                 case RTC_TIMETYPE_SECOND:
00284                         RTCx->AMR |= (RTC_AMR_AMRSEC);
00285                         break;
00286                 case RTC_TIMETYPE_MINUTE:
00287                         RTCx->AMR |= (RTC_AMR_AMRMIN);
00288                         break;
00289                 case RTC_TIMETYPE_HOUR:
00290                         RTCx->AMR |= (RTC_AMR_AMRHOUR);
00291                         break;
00292                 case RTC_TIMETYPE_DAYOFWEEK:
00293                         RTCx->AMR |= (RTC_AMR_AMRDOW);
00294                         break;
00295                 case RTC_TIMETYPE_DAYOFMONTH:
00296                         RTCx->AMR |= (RTC_AMR_AMRDOM);
00297                         break;
00298                 case RTC_TIMETYPE_DAYOFYEAR:
00299                         RTCx->AMR |= (RTC_AMR_AMRDOY);
00300                         break;
00301                 case RTC_TIMETYPE_MONTH:
00302                         RTCx->AMR |= (RTC_AMR_AMRMON);
00303                         break;
00304                 case RTC_TIMETYPE_YEAR:
00305                         RTCx->AMR |= (RTC_AMR_AMRYEAR);
00306                         break;
00307                 }
00308         }
00309 }
00310
00311
00312 /*********************************************************************/
00327 void RTC_SetTime (LPC_RTC_TypeDef *RTCx, uint32_t Timetype, uint32_t TimeValue)
00328 {
00329         CHECK_PARAM(PARAM_RTCx(RTCx));
00330         CHECK_PARAM(PARAM_RTC_TIMETYPE(Timetype));
00331
00332         switch ( Timetype)
00333         {
00334         case RTC_TIMETYPE_SECOND:
00335                 CHECK_PARAM(TimeValue <= RTC_SECOND_MAX);
00336
00337                 RTCx->SEC = TimeValue & RTC_SEC_MASK;
00338                 break;
00339
00340         case RTC_TIMETYPE_MINUTE:
00341                 CHECK_PARAM(TimeValue <= RTC_MINUTE_MAX);
00342
00343                 RTCx->MIN = TimeValue & RTC_MIN_MASK;
00344                 break;
00345
00346         case RTC_TIMETYPE_HOUR:
00347                 CHECK_PARAM(TimeValue <= RTC_HOUR_MAX);
00348
00349                 RTCx->HOUR = TimeValue & RTC_HOUR_MASK;
00350                 break;
00351
00352         case RTC_TIMETYPE_DAYOFWEEK:
00353                 CHECK_PARAM(TimeValue <= RTC_DAYOFWEEK_MAX);
00354
00355                 RTCx->DOW = TimeValue & RTC_DOW_MASK;
00356                 break;
00357
00358         case RTC_TIMETYPE_DAYOFMONTH:
00359                 CHECK_PARAM((TimeValue <= RTC_DAYOFMONTH_MAX) \
00360                                 && (TimeValue >= RTC_DAYOFMONTH_MIN));
00361
00362                 RTCx->DOM = TimeValue & RTC_DOM_MASK;
00363                 break;
00364
00365         case RTC_TIMETYPE_DAYOFYEAR:
00366                 CHECK_PARAM((TimeValue >= RTC_DAYOFYEAR_MIN) \
00367                                 && (TimeValue <= RTC_DAYOFYEAR_MAX));
00368
00369                 RTCx->DOY = TimeValue & RTC_DOY_MASK;
00370                 break;
00371
00372         case RTC_TIMETYPE_MONTH:
00373                 CHECK_PARAM((TimeValue >= RTC_MONTH_MIN) \
00374                                 && (TimeValue <= RTC_MONTH_MAX));
00375
00376                 RTCx->MONTH = TimeValue & RTC_MONTH_MASK;
00377                 break;
00378
00379         case RTC_TIMETYPE_YEAR:
00380                 CHECK_PARAM(TimeValue <= RTC_YEAR_MAX);
00381
00382                 RTCx->YEAR = TimeValue & RTC_YEAR_MASK;
00383                 break;
00384         }
00385 }
00386
00387 /*********************************************************************/
00401 uint32_t RTC_GetTime(LPC_RTC_TypeDef *RTCx, uint32_t Timetype)
00402 {
00403         CHECK_PARAM(PARAM_RTCx(RTCx));
00404         CHECK_PARAM(PARAM_RTC_TIMETYPE(Timetype));
00405
00406         switch (Timetype)
00407         {
00408         case RTC_TIMETYPE_SECOND:
00409                 return (RTCx->SEC & RTC_SEC_MASK);
00410         case RTC_TIMETYPE_MINUTE:
00411                 return (RTCx->MIN & RTC_MIN_MASK);
00412         case RTC_TIMETYPE_HOUR:
00413                 return (RTCx->HOUR & RTC_HOUR_MASK);
00414         case RTC_TIMETYPE_DAYOFWEEK:
00415                 return (RTCx->DOW & RTC_DOW_MASK);
00416         case RTC_TIMETYPE_DAYOFMONTH:
00417                 return (RTCx->DOM & RTC_DOM_MASK);
00418         case RTC_TIMETYPE_DAYOFYEAR:
00419                 return (RTCx->DOY & RTC_DOY_MASK);
00420         case RTC_TIMETYPE_MONTH:
00421                 return (RTCx->MONTH & RTC_MONTH_MASK);
00422         case RTC_TIMETYPE_YEAR:
00423                 return (RTCx->YEAR & RTC_YEAR_MASK);
00424         default:
00425                 return (0);
00426         }
00427 }
00428
00429
00430 /*********************************************************************/
00437 void RTC_SetFullTime (LPC_RTC_TypeDef *RTCx, RTC_TIME_Type *pFullTime)
00438 {
00439         CHECK_PARAM(PARAM_RTCx(RTCx));
00440
00441         RTCx->DOM = pFullTime->DOM & RTC_DOM_MASK;
00442         RTCx->DOW = pFullTime->DOW & RTC_DOW_MASK;
00443         RTCx->DOY = pFullTime->DOY & RTC_DOY_MASK;
00444         RTCx->HOUR = pFullTime->HOUR & RTC_HOUR_MASK;
00445         RTCx->MIN = pFullTime->MIN & RTC_MIN_MASK;
00446         RTCx->SEC = pFullTime->SEC & RTC_SEC_MASK;
00447         RTCx->MONTH = pFullTime->MONTH & RTC_MONTH_MASK;
00448         RTCx->YEAR = pFullTime->YEAR & RTC_YEAR_MASK;
00449 }
00450
00451
00452 /*********************************************************************/
00459 void RTC_GetFullTime (LPC_RTC_TypeDef *RTCx, RTC_TIME_Type *pFullTime)
00460 {
00461         CHECK_PARAM(PARAM_RTCx(RTCx));
00462
00463         pFullTime->DOM = RTCx->DOM & RTC_DOM_MASK;
00464         pFullTime->DOW = RTCx->DOW & RTC_DOW_MASK;
00465         pFullTime->DOY = RTCx->DOY & RTC_DOY_MASK;
00466         pFullTime->HOUR = RTCx->HOUR & RTC_HOUR_MASK;
00467         pFullTime->MIN = RTCx->MIN & RTC_MIN_MASK;
00468         pFullTime->SEC = RTCx->SEC & RTC_SEC_MASK;
00469         pFullTime->MONTH = RTCx->MONTH & RTC_MONTH_MASK;
00470         pFullTime->YEAR = RTCx->YEAR & RTC_YEAR_MASK;
00471 }
00472
00473
00474 /*********************************************************************/
00489 void RTC_SetAlarmTime (LPC_RTC_TypeDef *RTCx, uint32_t Timetype, uint32_t ALValue)
00490 {
00491         CHECK_PARAM(PARAM_RTCx(RTCx));
00492
00493         switch (Timetype)
00494         {
00495         case RTC_TIMETYPE_SECOND:
00496                 CHECK_PARAM(ALValue <= RTC_SECOND_MAX);
00497
00498                 RTCx->ALSEC = ALValue & RTC_SEC_MASK;
00499                 break;
00500
00501         case RTC_TIMETYPE_MINUTE:
00502                 CHECK_PARAM(ALValue <= RTC_MINUTE_MAX);
00503
00504                 RTCx->ALMIN = ALValue & RTC_MIN_MASK;
00505                 break;
00506
00507         case RTC_TIMETYPE_HOUR:
00508                 CHECK_PARAM(ALValue <= RTC_HOUR_MAX);
00509
00510                 RTCx->ALHOUR = ALValue & RTC_HOUR_MASK;
00511                 break;
00512
00513         case RTC_TIMETYPE_DAYOFWEEK:
00514                 CHECK_PARAM(ALValue <= RTC_DAYOFWEEK_MAX);
00515
00516                 RTCx->ALDOW = ALValue & RTC_DOW_MASK;
00517                 break;
00518
00519         case RTC_TIMETYPE_DAYOFMONTH:
00520                 CHECK_PARAM((ALValue <= RTC_DAYOFMONTH_MAX) \
00521                                 && (ALValue >= RTC_DAYOFMONTH_MIN));
00522
00523                 RTCx->ALDOM = ALValue & RTC_DOM_MASK;
00524                 break;
00525
00526         case RTC_TIMETYPE_DAYOFYEAR:
00527                 CHECK_PARAM((ALValue >= RTC_DAYOFYEAR_MIN) \
00528                                 && (ALValue <= RTC_DAYOFYEAR_MAX));
00529
00530                 RTCx->ALDOY = ALValue & RTC_DOY_MASK;
00531                 break;
00532
00533         case RTC_TIMETYPE_MONTH:
00534                 CHECK_PARAM((ALValue >= RTC_MONTH_MIN) \
00535                                 && (ALValue <= RTC_MONTH_MAX));
00536
00537                 RTCx->ALMON = ALValue & RTC_MONTH_MASK;
00538                 break;
00539
00540         case RTC_TIMETYPE_YEAR:
00541                 CHECK_PARAM(ALValue <= RTC_YEAR_MAX);
00542
00543                 RTCx->ALYEAR = ALValue & RTC_YEAR_MASK;
00544                 break;
00545         }
00546 }
00547
00548
00549
00550 /*********************************************************************/
00564 uint32_t RTC_GetAlarmTime (LPC_RTC_TypeDef *RTCx, uint32_t Timetype)
00565 {
00566         switch (Timetype)
00567         {
00568         case RTC_TIMETYPE_SECOND:
00569                 return (RTCx->ALSEC & RTC_SEC_MASK);
00570         case RTC_TIMETYPE_MINUTE:
00571                 return (RTCx->ALMIN & RTC_MIN_MASK);
00572         case RTC_TIMETYPE_HOUR:
00573                 return (RTCx->ALHOUR & RTC_HOUR_MASK);
00574         case RTC_TIMETYPE_DAYOFWEEK:
00575                 return (RTCx->ALDOW & RTC_DOW_MASK);
00576         case RTC_TIMETYPE_DAYOFMONTH:
00577                 return (RTCx->ALDOM & RTC_DOM_MASK);
00578         case RTC_TIMETYPE_DAYOFYEAR:
00579                 return (RTCx->ALDOY & RTC_DOY_MASK);
00580         case RTC_TIMETYPE_MONTH:
00581                 return (RTCx->ALMON & RTC_MONTH_MASK);
00582         case RTC_TIMETYPE_YEAR:
00583                 return (RTCx->ALYEAR & RTC_YEAR_MASK);
00584         default:
00585                 return (0);
00586         }
00587 }
00588
00589
00590 /*********************************************************************/
00597 void RTC_SetFullAlarmTime (LPC_RTC_TypeDef *RTCx, RTC_TIME_Type *pFullTime)
00598 {
00599         CHECK_PARAM(PARAM_RTCx(RTCx));
00600
00601         RTCx->ALDOM = pFullTime->DOM & RTC_DOM_MASK;
00602         RTCx->ALDOW = pFullTime->DOW & RTC_DOW_MASK;
00603         RTCx->ALDOY = pFullTime->DOY & RTC_DOY_MASK;
00604         RTCx->ALHOUR = pFullTime->HOUR & RTC_HOUR_MASK;
00605         RTCx->ALMIN = pFullTime->MIN & RTC_MIN_MASK;
00606         RTCx->ALSEC = pFullTime->SEC & RTC_SEC_MASK;
00607         RTCx->ALMON = pFullTime->MONTH & RTC_MONTH_MASK;
00608         RTCx->ALYEAR = pFullTime->YEAR & RTC_YEAR_MASK;
00609 }
00610
00611
00612 /*********************************************************************/
00619 void RTC_GetFullAlarmTime (LPC_RTC_TypeDef *RTCx, RTC_TIME_Type *pFullTime)
00620 {
00621         CHECK_PARAM(PARAM_RTCx(RTCx));
00622
00623         pFullTime->DOM = RTCx->ALDOM & RTC_DOM_MASK;
00624         pFullTime->DOW = RTCx->ALDOW & RTC_DOW_MASK;
00625         pFullTime->DOY = RTCx->ALDOY & RTC_DOY_MASK;
00626         pFullTime->HOUR = RTCx->ALHOUR & RTC_HOUR_MASK;
00627         pFullTime->MIN = RTCx->ALMIN & RTC_MIN_MASK;
00628         pFullTime->SEC = RTCx->ALSEC & RTC_SEC_MASK;
00629         pFullTime->MONTH = RTCx->ALMON & RTC_MONTH_MASK;
00630         pFullTime->YEAR = RTCx->ALYEAR & RTC_YEAR_MASK;
00631 }
00632
00633
00634 /*********************************************************************/
00646 IntStatus RTC_GetIntPending (LPC_RTC_TypeDef *RTCx, uint32_t IntType)
00647 {
00648         CHECK_PARAM(PARAM_RTCx(RTCx));
00649         CHECK_PARAM(PARAM_RTC_INT(IntType));
00650
00651         return ((RTCx->ILR & IntType) ? SET : RESET);
00652 }
00653
00654
00655 /*********************************************************************/
00665 void RTC_ClearIntPending (LPC_RTC_TypeDef *RTCx, uint32_t IntType)
00666 {
00667         CHECK_PARAM(PARAM_RTCx(RTCx));
00668         CHECK_PARAM(PARAM_RTC_INT(IntType));
00669
00670         RTCx->ILR |= IntType;
00671 }
00672
00673 /*********************************************************************/
00681 void RTC_CalibCounterCmd(LPC_RTC_TypeDef *RTCx, FunctionalState NewState)
00682 {
00683         CHECK_PARAM(PARAM_RTCx(RTCx));
00684         CHECK_PARAM(PARAM_FUNCTIONALSTATE(NewState));
00685
00686         if (NewState == ENABLE)
00687         {
00688                 RTCx->CCR &= (~RTC_CCR_CCALEN) & RTC_CCR_BITMASK;
00689         }
00690         else
00691         {
00692                 RTCx->CCR |= RTC_CCR_CCALEN;
00693         }
00694 }
00695
00696
00697 /*********************************************************************/
00707 void RTC_CalibConfig(LPC_RTC_TypeDef *RTCx, uint32_t CalibValue, uint8_t CalibDir)
00708 {
00709         CHECK_PARAM(PARAM_RTCx(RTCx));
00710         CHECK_PARAM(PARAM_RTC_CALIB_DIR(CalibDir));
00711         CHECK_PARAM(CalibValue < RTC_CALIBRATION_MAX);
00712
00713         RTCx->CALIBRATION = ((CalibValue - 1) & RTC_CALIBRATION_CALVAL_MASK) \
00714                         | ((CalibDir == RTC_CALIB_DIR_BACKWARD) ? RTC_CALIBRATION_LIBDIR : 0);
00715 }
00716
00717
00718 /*********************************************************************/
00729 void RTC_WriteGPREG (LPC_RTC_TypeDef *RTCx, uint8_t Channel, uint32_t Value)
00730 {
00731         uint32_t *preg;
00732
00733         CHECK_PARAM(PARAM_RTCx(RTCx));
00734         CHECK_PARAM(PARAM_RTC_GPREG_CH(Channel));
00735
00736         preg = (uint32_t *)&RTCx->GPREG0;
00737         preg += Channel;
00738         *preg = Value;
00739 }
00740
00741
00742 /*********************************************************************/
00752 uint32_t RTC_ReadGPREG (LPC_RTC_TypeDef *RTCx, uint8_t Channel)
00753 {
00754         uint32_t *preg;
00755         uint32_t value;
00756
00757         CHECK_PARAM(PARAM_RTCx(RTCx));
00758         CHECK_PARAM(PARAM_RTC_GPREG_CH(Channel));
00759
00760         preg = (uint32_t *)&RTCx->GPREG0;
00761         preg += Channel;
00762         value = *preg;
00763         return (value);
00764 }
00765
00770 #endif /* _RTC */
00771
00776 /* --------------------------------- End Of File ------------------------------ */
00777
Generated on Tue Jun 7 14:58:56 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_rtc.h Source File

C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_rtc.h

Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          lpc17xx_rtc.h                           2010-05-21
00003 */
00027 /* Peripheral group ----------------------------------------------------------- */
00033 #ifndef LPC17XX_RTC_H_
00034 #define LPC17XX_RTC_H_
00035
00036 /* Includes ------------------------------------------------------------------- */
00037 #include "LPC17xx.h"
00038 #include "lpc_types.h"
00039
00040
00041 #ifdef __cplusplus
00042 extern "C"
00043 {
00044 #endif
00045
00046
00047 /* Private Macros ------------------------------------------------------------- */
00052 /* ----------------------- BIT DEFINITIONS ----------------------------------- */
00053 /* Miscellaneous register group --------------------------------------------- */
00054 /**********************************************************************
00055 * ILR register definitions
00056 **********************************************************************/
00058 #define RTC_ILR_BITMASK                 ((0x00000003))
00059
00060 #define RTC_IRL_RTCCIF                  ((1<<0))
00061
00062 #define RTC_IRL_RTCALF                  ((1<<1))
00063
00064 /**********************************************************************
00065 * CCR register definitions
00066 **********************************************************************/
00068 #define RTC_CCR_BITMASK                 ((0x00000013))
00069
00070 #define RTC_CCR_CLKEN                   ((1<<0))
00071
00072 #define RTC_CCR_CTCRST                  ((1<<1))
00073
00074 #define RTC_CCR_CCALEN                  ((1<<4))
00075
00076 /**********************************************************************
00077 * CIIR register definitions
00078 **********************************************************************/
00080 #define RTC_CIIR_IMSEC                  ((1<<0))
00081
00082 #define RTC_CIIR_IMMIN                  ((1<<1))
00083
00084 #define RTC_CIIR_IMHOUR                 ((1<<2))
00085
00086 #define RTC_CIIR_IMDOM                  ((1<<3))
00087
00088 #define RTC_CIIR_IMDOW                  ((1<<4))
00089
00090 #define RTC_CIIR_IMDOY                  ((1<<5))
00091
00092 #define RTC_CIIR_IMMON                  ((1<<6))
00093
00094 #define RTC_CIIR_IMYEAR                 ((1<<7))
00095
00096 #define RTC_CIIR_BITMASK                ((0xFF))
00097
00098 /**********************************************************************
00099 * AMR register definitions
00100 **********************************************************************/
00102 #define RTC_AMR_AMRSEC                  ((1<<0))
00103
00104 #define RTC_AMR_AMRMIN                  ((1<<1))
00105
00106 #define RTC_AMR_AMRHOUR                 ((1<<2))
00107
00108 #define RTC_AMR_AMRDOM                  ((1<<3))
00109
00110 #define RTC_AMR_AMRDOW                  ((1<<4))
00111
00112 #define RTC_AMR_AMRDOY                  ((1<<5))
00113
00114 #define RTC_AMR_AMRMON                  ((1<<6))
00115
00116 #define RTC_AMR_AMRYEAR                 ((1<<7))
00117
00118 #define RTC_AMR_BITMASK                 ((0xFF))
00119
00120 /**********************************************************************
00121 * RTC_AUX register definitions
00122 **********************************************************************/
00124 #define RTC_AUX_RTC_OSCF                ((1<<4))
00125
00126 /**********************************************************************
00127 * RTC_AUXEN register definitions
00128 **********************************************************************/
00130 #define RTC_AUXEN_RTC_OSCFEN    ((1<<4))
00131
00132 /* Consolidated time register group ----------------------------------- */
00133 /**********************************************************************
00134 * Consolidated Time Register 0 definitions
00135 **********************************************************************/
00136 #define RTC_CTIME0_SECONDS_MASK         ((0x3F))
00137 #define RTC_CTIME0_MINUTES_MASK         ((0x3F00))
00138 #define RTC_CTIME0_HOURS_MASK           ((0x1F0000))
00139 #define RTC_CTIME0_DOW_MASK                     ((0x7000000))
00140
00141 /**********************************************************************
00142 * Consolidated Time Register 1 definitions
00143 **********************************************************************/
00144 #define RTC_CTIME1_DOM_MASK                     ((0x1F))
00145 #define RTC_CTIME1_MONTH_MASK           ((0xF00))
00146 #define RTC_CTIME1_YEAR_MASK            ((0xFFF0000))
00147
00148 /**********************************************************************
00149 * Consolidated Time Register 2 definitions
00150 **********************************************************************/
00151 #define RTC_CTIME2_DOY_MASK                     ((0xFFF))
00152
00153 /**********************************************************************
00154 * Time Counter Group and Alarm register group
00155 **********************************************************************/
00157 #define RTC_SEC_MASK                    (0x0000003F)
00158
00159 #define RTC_MIN_MASK                    (0x0000003F)
00160
00161 #define RTC_HOUR_MASK                   (0x0000001F)
00162
00163 #define RTC_DOM_MASK                    (0x0000001F)
00164
00165 #define RTC_DOW_MASK                    (0x00000007)
00166
00167 #define RTC_DOY_MASK                    (0x000001FF)
00168
00169 #define RTC_MONTH_MASK                  (0x0000000F)
00170
00171 #define RTC_YEAR_MASK                   (0x00000FFF)
00172
00173 #define RTC_SECOND_MAX          59
00174 #define RTC_MINUTE_MAX          59
00175 #define RTC_HOUR_MAX            23
00176 #define RTC_MONTH_MIN           1
00177 #define RTC_MONTH_MAX           12
00178 #define RTC_DAYOFMONTH_MIN      1
00179 #define RTC_DAYOFMONTH_MAX      31
00180 #define RTC_DAYOFWEEK_MAX       6
00181 #define RTC_DAYOFYEAR_MIN       1
00182 #define RTC_DAYOFYEAR_MAX       366
00183 #define RTC_YEAR_MAX            4095
00185 /**********************************************************************
00186 * Calibration register
00187 **********************************************************************/
00188 /* Calibration register */
00190 #define RTC_CALIBRATION_CALVAL_MASK             ((0x1FFFF))
00191
00192 #define RTC_CALIBRATION_LIBDIR                  ((1<<17))
00193
00194 #define RTC_CALIBRATION_MAX                             ((0x20000))
00195
00196 #define RTC_CALIB_DIR_FORWARD                   ((uint8_t)(0))
00197 #define RTC_CALIB_DIR_BACKWARD                  ((uint8_t)(1))
00198
00199
00200 /* ---------------- CHECK PARAMETER DEFINITIONS ---------------------------- */
00202 #define PARAM_RTCx(x)   (((uint32_t *)x)==((uint32_t *)LPC_RTC))
00203
00204 /* Macro check RTC interrupt type */
00205 #define PARAM_RTC_INT(n)        ((n==RTC_INT_COUNTER_INCREASE) || (n==RTC_INT_ALARM))
00206
00207 /* Macro check RTC time type */
00208 #define PARAM_RTC_TIMETYPE(n)   ((n==RTC_TIMETYPE_SECOND) || (n==RTC_TIMETYPE_MINUTE) \
00209 || (n==RTC_TIMETYPE_HOUR) || (n==RTC_TIMETYPE_DAYOFWEEK) \
00210 || (n==RTC_TIMETYPE_DAYOFMONTH) || (n==RTC_TIMETYPE_DAYOFYEAR) \
00211 || (n==RTC_TIMETYPE_MONTH) || (n==RTC_TIMETYPE_YEAR))
00212
00213 /* Macro check RTC calibration type */
00214 #define PARAM_RTC_CALIB_DIR(n)  ((n==RTC_CALIB_DIR_FORWARD) || (n==RTC_CALIB_DIR_BACKWARD))
00215
00216 /* Macro check RTC GPREG type */
00217 #define PARAM_RTC_GPREG_CH(n)   ((n>=0) && (n<=4))
00218
00224 /* Public Types --------------------------------------------------------------- */
00230 typedef struct {
00231         uint32_t SEC;
00232         uint32_t MIN;
00233         uint32_t HOUR;
00234         uint32_t DOM;
00235         uint32_t DOW;
00236         uint32_t DOY;
00237         uint32_t MONTH;
00238         uint32_t YEAR;
00239 } RTC_TIME_Type;
00240
00242 typedef enum {
00243         RTC_INT_COUNTER_INCREASE = RTC_IRL_RTCCIF,
00244         RTC_INT_ALARM = RTC_IRL_RTCALF
00245 } RTC_INT_OPT;
00246
00247
00249 typedef enum {
00250         RTC_TIMETYPE_SECOND = 0,
00251         RTC_TIMETYPE_MINUTE = 1,
00252         RTC_TIMETYPE_HOUR = 2,
00253         RTC_TIMETYPE_DAYOFWEEK = 3,
00254         RTC_TIMETYPE_DAYOFMONTH = 4,
00255         RTC_TIMETYPE_DAYOFYEAR = 5,
00256         RTC_TIMETYPE_MONTH = 6,
00257         RTC_TIMETYPE_YEAR = 7
00258 } RTC_TIMETYPE_Num;
00259
00266 /* Public Functions ----------------------------------------------------------- */
00271 void RTC_Init (LPC_RTC_TypeDef *RTCx);
00272 void RTC_DeInit(LPC_RTC_TypeDef *RTCx);
00273 void RTC_ResetClockTickCounter(LPC_RTC_TypeDef *RTCx);
00274 void RTC_Cmd (LPC_RTC_TypeDef *RTCx, FunctionalState NewState);
00275 void RTC_CntIncrIntConfig (LPC_RTC_TypeDef *RTCx, uint32_t CntIncrIntType, \
00276                                                                 FunctionalState NewState);
00277 void RTC_AlarmIntConfig (LPC_RTC_TypeDef *RTCx, uint32_t AlarmTimeType, \
00278                                                                 FunctionalState NewState);
00279 void RTC_SetTime (LPC_RTC_TypeDef *RTCx, uint32_t Timetype, uint32_t TimeValue);
00280 uint32_t RTC_GetTime(LPC_RTC_TypeDef *RTCx, uint32_t Timetype);
00281 void RTC_SetFullTime (LPC_RTC_TypeDef *RTCx, RTC_TIME_Type *pFullTime);
00282 void RTC_GetFullTime (LPC_RTC_TypeDef *RTCx, RTC_TIME_Type *pFullTime);
00283 void RTC_SetAlarmTime (LPC_RTC_TypeDef *RTCx, uint32_t Timetype, uint32_t ALValue);
00284 uint32_t RTC_GetAlarmTime (LPC_RTC_TypeDef *RTCx, uint32_t Timetype);
00285 void RTC_SetFullAlarmTime (LPC_RTC_TypeDef *RTCx, RTC_TIME_Type *pFullTime);
00286 void RTC_GetFullAlarmTime (LPC_RTC_TypeDef *RTCx, RTC_TIME_Type *pFullTime);
00287 IntStatus RTC_GetIntPending (LPC_RTC_TypeDef *RTCx, uint32_t IntType);
00288 void RTC_ClearIntPending (LPC_RTC_TypeDef *RTCx, uint32_t IntType);
00289 void RTC_CalibCounterCmd(LPC_RTC_TypeDef *RTCx, FunctionalState NewState);
00290 void RTC_CalibConfig(LPC_RTC_TypeDef *RTCx, uint32_t CalibValue, uint8_t CalibDir);
00291 void RTC_WriteGPREG (LPC_RTC_TypeDef *RTCx, uint8_t Channel, uint32_t Value);
00292 uint32_t RTC_ReadGPREG (LPC_RTC_TypeDef *RTCx, uint8_t Channel);
00293
00298 #ifdef __cplusplus
00299 }
00300 #endif
00301
00302 #endif /* LPC17XX_RTC_H_ */
00303
00308 /* --------------------------------- End Of File ------------------------------ */
Generated on Tue Jun 7 14:58:55 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Drivers/source/lpc17xx_spi.c Source File

C:/nxpdrv/LPC1700CMSIS/Drivers/source/lpc17xx_spi.c

Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          lpc17xx_spi.c                           2010-05-21
00003 */
00026 /* Peripheral group ----------------------------------------------------------- */
00031 /* Includes ------------------------------------------------------------------- */
00032 #include "lpc17xx_spi.h"
00033 #include "lpc17xx_clkpwr.h"
00034
00035 /* If this source file built with example, the LPC17xx FW library configuration
00036  * file in each example directory ("lpc17xx_libcfg.h") must be included,
00037  * otherwise the default FW library configuration file must be included instead
00038  */
00039 #ifdef __BUILD_WITH_EXAMPLE__
00040 #include "lpc17xx_libcfg.h"
00041 #else
00042 #include "lpc17xx_libcfg_default.h"
00043 #endif /* __BUILD_WITH_EXAMPLE__ */
00044
00045 #ifdef _SPI
00046
00047
00048 /* Public Functions ----------------------------------------------------------- */
00053 /*********************************************************************/
00059 void SPI_SetClock (LPC_SPI_TypeDef *SPIx, uint32_t target_clock)
00060 {
00061         uint32_t spi_pclk;
00062         uint32_t prescale, temp;
00063
00064         CHECK_PARAM(PARAM_SPIx(SPIx));
00065
00066         if (SPIx == LPC_SPI){
00067                 spi_pclk =  CLKPWR_GetPCLK (CLKPWR_PCLKSEL_SPI);
00068         } else {
00069                 return;
00070         }
00071
00072         prescale = 8;
00073         // Find closest clock to target clock
00074         while (1){
00075                 temp = target_clock * prescale;
00076                 if (temp >= spi_pclk){
00077                         break;
00078                 }
00079                 prescale += 2;
00080                 if(prescale >= 254){
00081                         break;
00082                 }
00083         }
00084
00085         // Write to register
00086         SPIx->SPCCR = SPI_SPCCR_COUNTER(prescale);
00087 }
00088
00089
00090 /*********************************************************************/
00096 void SPI_DeInit(LPC_SPI_TypeDef *SPIx)
00097 {
00098         CHECK_PARAM(PARAM_SPIx(SPIx));
00099
00100         if (SPIx == LPC_SPI){
00101                 /* Set up clock and power for SPI module */
00102                 CLKPWR_ConfigPPWR (CLKPWR_PCONP_PCSPI, DISABLE);
00103         }
00104 }
00105
00106 /*********************************************************************/
00111 uint8_t SPI_GetDataSize (LPC_SPI_TypeDef *SPIx)
00112 {
00113         CHECK_PARAM(PARAM_SPIx(SPIx));
00114         return ((SPIx->SPCR)>>8 & 0xF);
00115 }
00116
00117 /********************************************************************/
00126 void SPI_Init(LPC_SPI_TypeDef *SPIx, SPI_CFG_Type *SPI_ConfigStruct)
00127 {
00128         uint32_t tmp;
00129
00130         CHECK_PARAM(PARAM_SPIx(SPIx));
00131
00132         if(SPIx == LPC_SPI){
00133                 /* Set up clock and power for UART module */
00134                 CLKPWR_ConfigPPWR (CLKPWR_PCONP_PCSPI, ENABLE);
00135         } else {
00136                 return;
00137         }
00138
00139         // Configure SPI, interrupt is disable as default
00140         tmp = ((SPI_ConfigStruct->CPHA) | (SPI_ConfigStruct->CPOL) \
00141                 | (SPI_ConfigStruct->DataOrder) | (SPI_ConfigStruct->Databit) \
00142                 | (SPI_ConfigStruct->Mode) | SPI_SPCR_BIT_EN) & SPI_SPCR_BITMASK;
00143         // write back to SPI control register
00144         SPIx->SPCR = tmp;
00145
00146         // Set clock rate for SPI peripheral
00147         SPI_SetClock(SPIx, SPI_ConfigStruct->ClockRate);
00148
00149         // If interrupt flag is set, Write '1' to Clear interrupt flag
00150         if (SPIx->SPINT & SPI_SPINT_INTFLAG){
00151                 SPIx->SPINT = SPI_SPINT_INTFLAG;
00152         }
00153 }
00154
00155
00156
00157 /*****************************************************************************/
00169 void SPI_ConfigStructInit(SPI_CFG_Type *SPI_InitStruct)
00170 {
00171         SPI_InitStruct->CPHA = SPI_CPHA_FIRST;
00172         SPI_InitStruct->CPOL = SPI_CPOL_HI;
00173         SPI_InitStruct->ClockRate = 1000000;
00174         SPI_InitStruct->DataOrder = SPI_DATA_MSB_FIRST;
00175         SPI_InitStruct->Databit = SPI_DATABIT_8;
00176         SPI_InitStruct->Mode = SPI_MASTER_MODE;
00177 }
00178
00179 /*********************************************************************/
00186 void SPI_SendData(LPC_SPI_TypeDef* SPIx, uint16_t Data)
00187 {
00188         CHECK_PARAM(PARAM_SPIx(SPIx));
00189
00190         SPIx->SPDR = Data & SPI_SPDR_BITMASK;
00191 }
00192
00193
00194
00195 /*********************************************************************/
00200 uint16_t SPI_ReceiveData(LPC_SPI_TypeDef* SPIx)
00201 {
00202         CHECK_PARAM(PARAM_SPIx(SPIx));
00203
00204         return ((uint16_t) (SPIx->SPDR & SPI_SPDR_BITMASK));
00205 }
00206
00207 /*********************************************************************/
00221 int32_t SPI_ReadWrite (LPC_SPI_TypeDef *SPIx, SPI_DATA_SETUP_Type *dataCfg, \
00222                                                 SPI_TRANSFER_Type xfType)
00223 {
00224         uint8_t *rdata8;
00225     uint8_t *wdata8;
00226         uint16_t *rdata16;
00227     uint16_t *wdata16;
00228     uint32_t stat;
00229     uint32_t temp;
00230     uint8_t dataword;
00231
00232         //read for empty buffer
00233         temp = SPIx->SPDR;
00234         //dummy to clear status
00235         temp = SPIx->SPSR;
00236         dataCfg->counter = 0;
00237         dataCfg->status = 0;
00238
00239         if(SPI_GetDataSize (SPIx) == 8)
00240                 dataword = 0;
00241         else dataword = 1;
00242         if (xfType == SPI_TRANSFER_POLLING){
00243
00244                 if (dataword == 0){
00245                         rdata8 = (uint8_t *)dataCfg->rx_data;
00246                         wdata8 = (uint8_t *)dataCfg->tx_data;
00247                 } else {
00248                         rdata16 = (uint16_t *)dataCfg->rx_data;
00249                         wdata16 = (uint16_t *)dataCfg->tx_data;
00250                 }
00251
00252                 while(dataCfg->counter < dataCfg->length)
00253                 {
00254                         // Write data to buffer
00255                         if(dataCfg->tx_data == NULL){
00256                                 if (dataword == 0){
00257                                         SPI_SendData(SPIx, 0xFF);
00258                                 } else {
00259                                         SPI_SendData(SPIx, 0xFFFF);
00260                                 }
00261                         } else {
00262                                 if (dataword == 0){
00263                                         SPI_SendData(SPIx, *wdata8);
00264                                         wdata8++;
00265                                 } else {
00266                                         SPI_SendData(SPIx, *wdata16);
00267                                         wdata16++;
00268                                 }
00269                         }
00270                         // Wait for transfer complete
00271                         while (!((stat = SPIx->SPSR) & SPI_SPSR_SPIF));
00272                         // Check for error
00273                         if (stat & (SPI_SPSR_ABRT | SPI_SPSR_MODF | SPI_SPSR_ROVR | SPI_SPSR_WCOL)){
00274                                 // save status
00275                                 dataCfg->status = stat | SPI_STAT_ERROR;
00276                                 return (dataCfg->counter);
00277                         }
00278                         // Read data from SPI dat
00279                         temp = (uint32_t) SPI_ReceiveData(SPIx);
00280
00281                         // Store data to destination
00282                         if (dataCfg->rx_data != NULL)
00283                         {
00284                                 if (dataword == 0){
00285                                         *(rdata8) = (uint8_t) temp;
00286                                         rdata8++;
00287                                 } else {
00288                                         *(rdata16) = (uint16_t) temp;
00289                                         rdata16++;
00290                                 }
00291                         }
00292                         // Increase counter
00293                         if (dataword == 0){
00294                                 dataCfg->counter++;
00295                         } else {
00296                                 dataCfg->counter += 2;
00297                         }
00298                 }
00299
00300                 // Return length of actual data transferred
00301                 // save status
00302                 dataCfg->status = stat | SPI_STAT_DONE;
00303                 return (dataCfg->counter);
00304         }
00305         // Interrupt mode
00306         else {
00307
00308                 // Check if interrupt flag is already set
00309                 if(SPIx->SPINT & SPI_SPINT_INTFLAG){
00310                         SPIx->SPINT = SPI_SPINT_INTFLAG;
00311                 }
00312                 if (dataCfg->counter < dataCfg->length){
00313                         // Write data to buffer
00314                         if(dataCfg->tx_data == NULL){
00315                                 if (dataword == 0){
00316                                         SPI_SendData(SPIx, 0xFF);
00317                                 } else {
00318                                         SPI_SendData(SPIx, 0xFFFF);
00319                                 }
00320                         } else {
00321                                 if (dataword == 0){
00322                                         SPI_SendData(SPIx, (*(uint8_t *)dataCfg->tx_data));
00323                                 } else {
00324                                         SPI_SendData(SPIx, (*(uint16_t *)dataCfg->tx_data));
00325                                 }
00326                         }
00327                         SPI_IntCmd(SPIx, ENABLE);
00328                 } else {
00329                         // Save status
00330                         dataCfg->status = SPI_STAT_DONE;
00331                 }
00332                 return (0);
00333         }
00334 }
00335
00336
00337 /********************************************************************/
00346 void SPI_IntCmd(LPC_SPI_TypeDef *SPIx, FunctionalState NewState)
00347 {
00348         CHECK_PARAM(PARAM_SPIx(SPIx));
00349         CHECK_PARAM(PARAM_FUNCTIONALSTATE(NewState));
00350
00351         if (NewState == ENABLE)
00352         {
00353                 SPIx->SPCR |= SPI_SPCR_SPIE;
00354         }
00355         else
00356         {
00357                 SPIx->SPCR &= (~SPI_SPCR_SPIE) & SPI_SPCR_BITMASK;
00358         }
00359 }
00360
00361
00362 /********************************************************************/
00367 IntStatus SPI_GetIntStatus (LPC_SPI_TypeDef *SPIx)
00368 {
00369         CHECK_PARAM(PARAM_SPIx(SPIx));
00370
00371         return ((SPIx->SPINT & SPI_SPINT_INTFLAG) ? SET : RESET);
00372 }
00373
00374 /********************************************************************/
00379 void SPI_ClearIntPending(LPC_SPI_TypeDef *SPIx)
00380 {
00381         CHECK_PARAM(PARAM_SPIx(SPIx));
00382
00383         SPIx->SPINT = SPI_SPINT_INTFLAG;
00384 }
00385
00386 /********************************************************************/
00398 uint32_t SPI_GetStatus(LPC_SPI_TypeDef* SPIx)
00399 {
00400         CHECK_PARAM(PARAM_SPIx(SPIx));
00401
00402         return (SPIx->SPSR & SPI_SPSR_BITMASK);
00403 }
00404
00405 /********************************************************************/
00419 FlagStatus SPI_CheckStatus (uint32_t inputSPIStatus,  uint8_t SPIStatus)
00420 {
00421         CHECK_PARAM(PARAM_SPI_STAT(SPIStatus));
00422
00423         return ((inputSPIStatus & SPIStatus) ? SET : RESET);
00424 }
00425
00426
00431 #endif /* _SPI */
00432
00437 /* --------------------------------- End Of File ------------------------------ */
Generated on Tue Jun 7 14:58:56 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_spi.h Source File

C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_spi.h

Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          lpc17xx_spi.h                           2010-05-21
00003 */
00027 /* Peripheral group ----------------------------------------------------------- */
00033 #ifndef LPC17XX_SPI_H_
00034 #define LPC17XX_SPI_H_
00035
00036 /* Includes ------------------------------------------------------------------- */
00037 #include "LPC17xx.h"
00038 #include "lpc_types.h"
00039
00040
00041 #ifdef __cplusplus
00042 extern "C"
00043 {
00044 #endif
00045
00046 /* Public Macros -------------------------------------------------------------- */
00051 /*********************************************************************/
00055 #define SPI_CPHA_FIRST                  ((uint32_t)(0))
00056 #define SPI_CPHA_SECOND                 ((uint32_t)(1<<3))
00057
00059 #define SPI_CPOL_HI                             ((uint32_t)(0))
00060 #define SPI_CPOL_LO                             ((uint32_t)(1<<4))
00061
00063 #define SPI_SLAVE_MODE                  ((uint32_t)(0))
00064 #define SPI_MASTER_MODE                 ((uint32_t)(1<<5))
00065
00067 #define SPI_DATA_MSB_FIRST              ((uint32_t)(0))
00068 #define SPI_DATA_LSB_FIRST              ((uint32_t)(1<<6))
00069
00071 #define SPI_DATABIT_16          SPI_SPCR_BITS(0)
00072 #define SPI_DATABIT_8           SPI_SPCR_BITS(0x08)
00073 #define SPI_DATABIT_9           SPI_SPCR_BITS(0x09)
00074 #define SPI_DATABIT_10          SPI_SPCR_BITS(0x0A)
00075 #define SPI_DATABIT_11          SPI_SPCR_BITS(0x0B)
00076 #define SPI_DATABIT_12          SPI_SPCR_BITS(0x0C)
00077 #define SPI_DATABIT_13          SPI_SPCR_BITS(0x0D)
00078 #define SPI_DATABIT_14          SPI_SPCR_BITS(0x0E)
00079 #define SPI_DATABIT_15          SPI_SPCR_BITS(0x0F)
00081 /*********************************************************************/
00085 #define SPI_STAT_ABRT           SPI_SPSR_ABRT
00086
00087 #define SPI_STAT_MODF           SPI_SPSR_MODF
00088
00089 #define SPI_STAT_ROVR           SPI_SPSR_ROVR
00090
00091 #define SPI_STAT_WCOL           SPI_SPSR_WCOL
00092
00093 #define SPI_STAT_SPIF           SPI_SPSR_SPIF
00094
00095 /* SPI Status Implementation definitions */
00096 #define SPI_STAT_DONE           (1UL<<8)
00097 #define SPI_STAT_ERROR          (1UL<<9)
00104 /* Private Macros ------------------------------------------------------------- */
00105
00109 /* --------------------- BIT DEFINITIONS -------------------------------------- */
00110 /*********************************************************************/
00115 #define SPI_SPCR_BIT_EN                 ((uint32_t)(1<<2))
00116
00117 #define SPI_SPCR_CPHA_SECOND    ((uint32_t)(1<<3))
00118
00119 #define SPI_SPCR_CPOL_LOW               ((uint32_t)(1<<4))
00120
00121 #define SPI_SPCR_MSTR                   ((uint32_t)(1<<5))
00122
00123 #define SPI_SPCR_LSBF                   ((uint32_t)(1<<6))
00124
00125 #define SPI_SPCR_SPIE                   ((uint32_t)(1<<7))
00126
00128 #define SPI_SPCR_BITS(n)                ((n==0) ? ((uint32_t)0) : ((uint32_t)((n&0x0F)<<8)))
00129
00130 #define SPI_SPCR_BITMASK                ((uint32_t)(0xFFC))
00131
00132 /*********************************************************************/
00136 #define SPI_SPSR_ABRT           ((uint32_t)(1<<3))
00137
00138 #define SPI_SPSR_MODF           ((uint32_t)(1<<4))
00139
00140 #define SPI_SPSR_ROVR           ((uint32_t)(1<<5))
00141
00142 #define SPI_SPSR_WCOL           ((uint32_t)(1<<6))
00143
00144 #define SPI_SPSR_SPIF           ((uint32_t)(1<<7))
00145
00146 #define SPI_SPSR_BITMASK        ((uint32_t)(0xF8))
00147
00148 /*********************************************************************/
00152 #define SPI_SPDR_LO_MASK        ((uint32_t)(0xFF))
00153
00154 #define SPI_SPDR_HI_MASK        ((uint32_t)(0xFF00))
00155
00156 #define SPI_SPDR_BITMASK        ((uint32_t)(0xFFFF))
00157
00158 /*********************************************************************/
00162 #define SPI_SPCCR_COUNTER(n)    ((uint32_t)(n&0xFF))
00163
00164 #define SPI_SPCCR_BITMASK               ((uint32_t)(0xFF))
00165
00166 /***********************************************************************
00167  * Macro defines for SPI Test Control Register
00168  **********************************************************************/
00170 #define SPI_SPTCR_TEST_MASK     ((uint32_t)(0xFE))
00171
00172 #define SPI_SPTCR_BITMASK       ((uint32_t)(0xFE))
00173
00174 /*********************************************************************/
00178 #define SPI_SPTSR_ABRT          ((uint32_t)(1<<3))
00179
00180 #define SPI_SPTSR_MODF          ((uint32_t)(1<<4))
00181
00182 #define SPI_SPTSR_ROVR          ((uint32_t)(1<<5))
00183
00184 #define SPI_SPTSR_WCOL          ((uint32_t)(1<<6))
00185
00186 #define SPI_SPTSR_SPIF          ((uint32_t)(1<<7))
00187
00188 #define SPI_SPTSR_MASKBIT       ((uint32_t)(0xF8))
00189
00190 /*********************************************************************/
00194 #define SPI_SPINT_INTFLAG       ((uint32_t)(1<<0))
00195
00196 #define SPI_SPINT_BITMASK       ((uint32_t)(0x01))
00197
00198
00199 /* ---------------- CHECK PARAMETER DEFINITIONS ---------------------------- */
00201 #define PARAM_SPIx(n)   (((uint32_t *)n)==((uint32_t *)LPC_SPI))
00202
00204 #define PARAM_SPI_CPHA(n)       ((n==SPI_CPHA_FIRST) || (n==SPI_CPHA_SECOND))
00205
00207 #define PARAM_SPI_CPOL(n)       ((n==SPI_CPOL_HI) || (n==SPI_CPOL_LO))
00208
00210 #define PARAM_SPI_MODE(n)       ((n==SPI_SLAVE_MODE) || (n==SPI_MASTER_MODE))
00211
00213 #define PARAM_SPI_DATA_ORDER(n) ((n==SPI_DATA_MSB_FIRST) || (n==SPI_DATA_LSB_FIRST))
00214
00216 #define PARAM_SPI_DATABIT(n)    ((n==SPI_DATABIT_16) || (n==SPI_DATABIT_8) \
00217 || (n==SPI_DATABIT_9) || (n==SPI_DATABIT_10) \
00218 || (n==SPI_DATABIT_11) || (n==SPI_DATABIT_12) \
00219 || (n==SPI_DATABIT_13) || (n==SPI_DATABIT_14) \
00220 || (n==SPI_DATABIT_15))
00221
00223 #define PARAM_SPI_STAT(n)       ((n==SPI_STAT_ABRT) || (n==SPI_STAT_MODF) \
00224 || (n==SPI_STAT_ROVR) || (n==SPI_STAT_WCOL) \
00225 || (n==SPI_STAT_SPIF))
00226
00232 /* Public Types --------------------------------------------------------------- */
00238 typedef struct {
00239         uint32_t Databit;
00241         uint32_t CPHA;
00244         uint32_t CPOL;
00247         uint32_t Mode;
00250         uint32_t DataOrder;
00253         uint32_t ClockRate;
00255 } SPI_CFG_Type;
00256
00257
00261 typedef enum {
00262         SPI_TRANSFER_POLLING = 0,
00263         SPI_TRANSFER_INTERRUPT
00264 } SPI_TRANSFER_Type;
00265
00269 typedef struct {
00270         void *tx_data;
00271         void *rx_data;
00272         uint32_t length;
00273         uint32_t counter;
00274         uint32_t status;
00275 } SPI_DATA_SETUP_Type;
00276
00282 /* Public Functions ----------------------------------------------------------- */
00287 /* SPI Init/DeInit functions ---------*/
00288 void SPI_Init(LPC_SPI_TypeDef *SPIx, SPI_CFG_Type *SPI_ConfigStruct);
00289 void SPI_DeInit(LPC_SPI_TypeDef *SPIx);
00290 void SPI_SetClock (LPC_SPI_TypeDef *SPIx, uint32_t target_clock);
00291 void SPI_ConfigStructInit(SPI_CFG_Type *SPI_InitStruct);
00292
00293 /* SPI transfer functions ------------*/
00294 void SPI_SendData(LPC_SPI_TypeDef *SPIx, uint16_t Data);
00295 uint16_t SPI_ReceiveData(LPC_SPI_TypeDef *SPIx);
00296 int32_t SPI_ReadWrite (LPC_SPI_TypeDef *SPIx, SPI_DATA_SETUP_Type *dataCfg, SPI_TRANSFER_Type xfType);
00297
00298 /* SPI Interrupt functions ---------*/
00299 void SPI_IntCmd(LPC_SPI_TypeDef *SPIx, FunctionalState NewState);
00300 IntStatus SPI_GetIntStatus (LPC_SPI_TypeDef *SPIx);
00301 void SPI_ClearIntPending(LPC_SPI_TypeDef *SPIx);
00302
00303 /* SPI get information functions-----*/
00304 uint8_t SPI_GetDataSize (LPC_SPI_TypeDef *SPIx);
00305 uint32_t SPI_GetStatus(LPC_SPI_TypeDef *SPIx);
00306 FlagStatus SPI_CheckStatus (uint32_t inputSPIStatus,  uint8_t SPIStatus);
00307
00312 #ifdef __cplusplus
00313 }
00314 #endif
00315
00316 #endif /* LPC17XX_SPI_H_ */
00317
00322 /* --------------------------------- End Of File ------------------------------ */
Generated on Tue Jun 7 14:58:55 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Drivers/source/lpc17xx_ssp.c Source File

C:/nxpdrv/LPC1700CMSIS/Drivers/source/lpc17xx_ssp.c

Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          lpc17xx_ssp.c                           2010-06-18
00003 */
00026 /* Peripheral group ----------------------------------------------------------- */
00031 /* Includes ------------------------------------------------------------------- */
00032 #include "lpc17xx_ssp.h"
00033 #include "lpc17xx_clkpwr.h"
00034
00035
00036 /* If this source file built with example, the LPC17xx FW library configuration
00037  * file in each example directory ("lpc17xx_libcfg.h") must be included,
00038  * otherwise the default FW library configuration file must be included instead
00039  */
00040 #ifdef __BUILD_WITH_EXAMPLE__
00041 #include "lpc17xx_libcfg.h"
00042 #else
00043 #include "lpc17xx_libcfg_default.h"
00044 #endif /* __BUILD_WITH_EXAMPLE__ */
00045
00046
00047 #ifdef _SSP
00048
00049 /* Public Functions ----------------------------------------------------------- */
00053 static void setSSPclock (LPC_SSP_TypeDef *SSPx, uint32_t target_clock);
00054
00055 /*********************************************************************/
00063 static void setSSPclock (LPC_SSP_TypeDef *SSPx, uint32_t target_clock)
00064 {
00065     uint32_t prescale, cr0_div, cmp_clk, ssp_clk;
00066
00067     CHECK_PARAM(PARAM_SSPx(SSPx));
00068
00069     /* The SSP clock is derived from the (main system oscillator / 2),
00070        so compute the best divider from that clock */
00071     if (SSPx == LPC_SSP0){
00072         ssp_clk = CLKPWR_GetPCLK (CLKPWR_PCLKSEL_SSP0);
00073     } else if (SSPx == LPC_SSP1) {
00074         ssp_clk = CLKPWR_GetPCLK (CLKPWR_PCLKSEL_SSP1);
00075     } else {
00076         return;
00077     }
00078
00079         /* Find closest divider to get at or under the target frequency.
00080            Use smallest prescale possible and rely on the divider to get
00081            the closest target frequency */
00082         cr0_div = 0;
00083         cmp_clk = 0xFFFFFFFF;
00084         prescale = 2;
00085         while (cmp_clk > target_clock)
00086         {
00087                 cmp_clk = ssp_clk / ((cr0_div + 1) * prescale);
00088                 if (cmp_clk > target_clock)
00089                 {
00090                         cr0_div++;
00091                         if (cr0_div > 0xFF)
00092                         {
00093                                 cr0_div = 0;
00094                                 prescale += 2;
00095                         }
00096                 }
00097         }
00098
00099     /* Write computed prescaler and divider back to register */
00100     SSPx->CR0 &= (~SSP_CR0_SCR(0xFF)) & SSP_CR0_BITMASK;
00101     SSPx->CR0 |= (SSP_CR0_SCR(cr0_div)) & SSP_CR0_BITMASK;
00102     SSPx->CPSR = prescale & SSP_CPSR_BITMASK;
00103 }
00104
00109 /* Public Functions ----------------------------------------------------------- */
00114 /********************************************************************/
00125 void SSP_Init(LPC_SSP_TypeDef *SSPx, SSP_CFG_Type *SSP_ConfigStruct)
00126 {
00127         uint32_t tmp;
00128
00129         CHECK_PARAM(PARAM_SSPx(SSPx));
00130
00131         if(SSPx == LPC_SSP0) {
00132                 /* Set up clock and power for SSP0 module */
00133                 CLKPWR_ConfigPPWR (CLKPWR_PCONP_PCSSP0, ENABLE);
00134         } else if(SSPx == LPC_SSP1) {
00135                 /* Set up clock and power for SSP1 module */
00136                 CLKPWR_ConfigPPWR (CLKPWR_PCONP_PCSSP1, ENABLE);
00137         } else {
00138                 return;
00139         }
00140
00141         /* Configure SSP, interrupt is disable, LoopBack mode is disable,
00142          * SSP is disable, Slave output is disable as default
00143          */
00144         tmp = ((SSP_ConfigStruct->CPHA) | (SSP_ConfigStruct->CPOL) \
00145                 | (SSP_ConfigStruct->FrameFormat) | (SSP_ConfigStruct->Databit))
00146                 & SSP_CR0_BITMASK;
00147         // write back to SSP control register
00148         SSPx->CR0 = tmp;
00149
00150         tmp = SSP_ConfigStruct->Mode & SSP_CR1_BITMASK;
00151         // Write back to CR1
00152         SSPx->CR1 = tmp;
00153
00154         // Set clock rate for SSP peripheral
00155         setSSPclock(SSPx, SSP_ConfigStruct->ClockRate);
00156 }
00157
00158 /*********************************************************************/
00166 void SSP_DeInit(LPC_SSP_TypeDef* SSPx)
00167 {
00168         CHECK_PARAM(PARAM_SSPx(SSPx));
00169
00170         if (SSPx == LPC_SSP0){
00171                 /* Set up clock and power for SSP0 module */
00172                 CLKPWR_ConfigPPWR (CLKPWR_PCONP_PCSSP0, DISABLE);
00173         } else if (SSPx == LPC_SSP1) {
00174                 /* Set up clock and power for SSP1 module */
00175                 CLKPWR_ConfigPPWR (CLKPWR_PCONP_PCSSP1, DISABLE);
00176         }
00177 }
00178
00179 /*****************************************************************************/
00190 uint8_t SSP_GetDataSize(LPC_SSP_TypeDef* SSPx)
00191 {
00192         CHECK_PARAM(PARAM_SSPx(SSPx));
00193         return (SSPx->CR0 & (0xF));
00194 }
00195
00196 /*****************************************************************************/
00208 void SSP_ConfigStructInit(SSP_CFG_Type *SSP_InitStruct)
00209 {
00210         SSP_InitStruct->CPHA = SSP_CPHA_FIRST;
00211         SSP_InitStruct->CPOL = SSP_CPOL_HI;
00212         SSP_InitStruct->ClockRate = 1000000;
00213         SSP_InitStruct->Databit = SSP_DATABIT_8;
00214         SSP_InitStruct->Mode = SSP_MASTER_MODE;
00215         SSP_InitStruct->FrameFormat = SSP_FRAME_SPI;
00216 }
00217
00218
00219 /*********************************************************************/
00227 void SSP_Cmd(LPC_SSP_TypeDef* SSPx, FunctionalState NewState)
00228 {
00229         CHECK_PARAM(PARAM_SSPx(SSPx));
00230         CHECK_PARAM(PARAM_FUNCTIONALSTATE(NewState));
00231
00232         if (NewState == ENABLE)
00233         {
00234                 SSPx->CR1 |= SSP_CR1_SSP_EN;
00235         }
00236         else
00237         {
00238                 SSPx->CR1 &= (~SSP_CR1_SSP_EN) & SSP_CR1_BITMASK;
00239         }
00240 }
00241
00242 /*********************************************************************/
00252 void SSP_LoopBackCmd(LPC_SSP_TypeDef* SSPx, FunctionalState NewState)
00253 {
00254         CHECK_PARAM(PARAM_SSPx(SSPx));
00255         CHECK_PARAM(PARAM_FUNCTIONALSTATE(NewState));
00256
00257         if (NewState == ENABLE)
00258         {
00259                 SSPx->CR1 |= SSP_CR1_LBM_EN;
00260         }
00261         else
00262         {
00263                 SSPx->CR1 &= (~SSP_CR1_LBM_EN) & SSP_CR1_BITMASK;
00264         }
00265 }
00266
00267 /*********************************************************************/
00280 void SSP_SlaveOutputCmd(LPC_SSP_TypeDef* SSPx, FunctionalState NewState)
00281 {
00282         CHECK_PARAM(PARAM_SSPx(SSPx));
00283         CHECK_PARAM(PARAM_FUNCTIONALSTATE(NewState));
00284
00285         if (NewState == ENABLE)
00286         {
00287                 SSPx->CR1 &= (~SSP_CR1_SO_DISABLE) & SSP_CR1_BITMASK;
00288         }
00289         else
00290         {
00291                 SSPx->CR1 |= SSP_CR1_SO_DISABLE;
00292         }
00293 }
00294
00295
00296
00297 /*********************************************************************/
00306 void SSP_SendData(LPC_SSP_TypeDef* SSPx, uint16_t Data)
00307 {
00308         CHECK_PARAM(PARAM_SSPx(SSPx));
00309
00310         SSPx->DR = SSP_DR_BITMASK(Data);
00311 }
00312
00313
00314
00315 /*********************************************************************/
00322 uint16_t SSP_ReceiveData(LPC_SSP_TypeDef* SSPx)
00323 {
00324         CHECK_PARAM(PARAM_SSPx(SSPx));
00325
00326         return ((uint16_t) (SSP_DR_BITMASK(SSPx->DR)));
00327 }
00328
00329 /*********************************************************************/
00345 int32_t SSP_ReadWrite (LPC_SSP_TypeDef *SSPx, SSP_DATA_SETUP_Type *dataCfg, \
00346                                                 SSP_TRANSFER_Type xfType)
00347 {
00348         uint8_t *rdata8;
00349     uint8_t *wdata8;
00350         uint16_t *rdata16;
00351     uint16_t *wdata16;
00352     uint32_t stat;
00353     uint32_t tmp;
00354     int32_t dataword;
00355
00356     dataCfg->rx_cnt = 0;
00357     dataCfg->tx_cnt = 0;
00358     dataCfg->status = 0;
00359
00360
00361         /* Clear all remaining data in RX FIFO */
00362         while (SSPx->SR & SSP_SR_RNE){
00363                 tmp = (uint32_t) SSP_ReceiveData(SSPx);
00364         }
00365
00366         // Clear status
00367         SSPx->ICR = SSP_ICR_BITMASK;
00368         if(SSP_GetDataSize(SSPx)>8)
00369                 dataword = 1;
00370         else dataword = 0;
00371
00372         // Polling mode ----------------------------------------------------------------------
00373         if (xfType == SSP_TRANSFER_POLLING){
00374                 if (dataword == 0){
00375                         rdata8 = (uint8_t *)dataCfg->rx_data;
00376                         wdata8 = (uint8_t *)dataCfg->tx_data;
00377                 } else {
00378                         rdata16 = (uint16_t *)dataCfg->rx_data;
00379                         wdata16 = (uint16_t *)dataCfg->tx_data;
00380                 }
00381                 while ((dataCfg->tx_cnt != dataCfg->length) || (dataCfg->rx_cnt != dataCfg->length)){
00382                         if ((SSPx->SR & SSP_SR_TNF) && (dataCfg->tx_cnt != dataCfg->length)){
00383                                 // Write data to buffer
00384                                 if(dataCfg->tx_data == NULL){
00385                                         if (dataword == 0){
00386                                                 SSP_SendData(SSPx, 0xFF);
00387                                                 dataCfg->tx_cnt++;
00388                                         } else {
00389                                                 SSP_SendData(SSPx, 0xFFFF);
00390                                                 dataCfg->tx_cnt += 2;
00391                                         }
00392                                 } else {
00393                                         if (dataword == 0){
00394                                                 SSP_SendData(SSPx, *wdata8);
00395                                                 wdata8++;
00396                                                 dataCfg->tx_cnt++;
00397                                         } else {
00398                                                 SSP_SendData(SSPx, *wdata16);
00399                                                 wdata16++;
00400                                                 dataCfg->tx_cnt += 2;
00401                                         }
00402                                 }
00403                         }
00404
00405                         // Check overrun error
00406                         if ((stat = SSPx->RIS) & SSP_RIS_ROR){
00407                                 // save status and return
00408                                 dataCfg->status = stat | SSP_STAT_ERROR;
00409                                 return (-1);
00410                         }
00411
00412                         // Check for any data available in RX FIFO
00413                         while ((SSPx->SR & SSP_SR_RNE) && (dataCfg->rx_cnt != dataCfg->length)){
00414                                 // Read data from SSP data
00415                                 tmp = SSP_ReceiveData(SSPx);
00416
00417                                 // Store data to destination
00418                                 if (dataCfg->rx_data != NULL)
00419                                 {
00420                                         if (dataword == 0){
00421                                                 *(rdata8) = (uint8_t) tmp;
00422                                                 rdata8++;
00423                                         } else {
00424                                                 *(rdata16) = (uint16_t) tmp;
00425                                                 rdata16++;
00426                                         }
00427                                 }
00428                                 // Increase counter
00429                                 if (dataword == 0){
00430                                         dataCfg->rx_cnt++;
00431                                 } else {
00432                                         dataCfg->rx_cnt += 2;
00433                                 }
00434                         }
00435                 }
00436
00437                 // save status
00438                 dataCfg->status = SSP_STAT_DONE;
00439
00440                 if (dataCfg->tx_data != NULL){
00441                         return dataCfg->tx_cnt;
00442                 } else if (dataCfg->rx_data != NULL){
00443                         return dataCfg->rx_cnt;
00444                 } else {
00445                         return (0);
00446                 }
00447         }
00448
00449         // Interrupt mode ----------------------------------------------------------------------
00450         else if (xfType == SSP_TRANSFER_INTERRUPT){
00451
00452                 while ((SSPx->SR & SSP_SR_TNF) && (dataCfg->tx_cnt != dataCfg->length)){
00453                         // Write data to buffer
00454                         if(dataCfg->tx_data == NULL){
00455                                 if (dataword == 0){
00456                                         SSP_SendData(SSPx, 0xFF);
00457                                         dataCfg->tx_cnt++;
00458                                 } else {
00459                                         SSP_SendData(SSPx, 0xFFFF);
00460                                         dataCfg->tx_cnt += 2;
00461                                 }
00462                         } else {
00463                                 if (dataword == 0){
00464                                         SSP_SendData(SSPx, (*(uint8_t *)((uint32_t)dataCfg->tx_data + dataCfg->tx_cnt)));
00465                                         dataCfg->tx_cnt++;
00466                                 } else {
00467                                         SSP_SendData(SSPx, (*(uint16_t *)((uint32_t)dataCfg->tx_data + dataCfg->tx_cnt)));
00468                                         dataCfg->tx_cnt += 2;
00469                                 }
00470                         }
00471
00472                         // Check error
00473                         if ((stat = SSPx->RIS) & SSP_RIS_ROR){
00474                                 // save status and return
00475                                 dataCfg->status = stat | SSP_STAT_ERROR;
00476                                 return (-1);
00477                         }
00478
00479                         // Check for any data available in RX FIFO
00480                         while ((SSPx->SR & SSP_SR_RNE) && (dataCfg->rx_cnt != dataCfg->length)){
00481                                 // Read data from SSP data
00482                                 tmp = SSP_ReceiveData(SSPx);
00483
00484                                 // Store data to destination
00485                                 if (dataCfg->rx_data != NULL)
00486                                 {
00487                                         if (dataword == 0){
00488                                                 *(uint8_t *)((uint32_t)dataCfg->rx_data + dataCfg->rx_cnt) = (uint8_t) tmp;
00489                                         } else {
00490                                                 *(uint16_t *)((uint32_t)dataCfg->rx_data + dataCfg->rx_cnt) = (uint16_t) tmp;
00491                                         }
00492                                 }
00493                                 // Increase counter
00494                                 if (dataword == 0){
00495                                         dataCfg->rx_cnt++;
00496                                 } else {
00497                                         dataCfg->rx_cnt += 2;
00498                                 }
00499                         }
00500                 }
00501
00502                 // If there more data to sent or receive
00503                 if ((dataCfg->rx_cnt != dataCfg->length) || (dataCfg->tx_cnt != dataCfg->length)){
00504                         // Enable all interrupt
00505                         SSPx->IMSC = SSP_IMSC_BITMASK;
00506                 } else {
00507                         // Save status
00508                         dataCfg->status = SSP_STAT_DONE;
00509                 }
00510                 return (0);
00511         }
00512
00513         return (-1);
00514 }
00515
00516 /*********************************************************************/
00530 FlagStatus SSP_GetStatus(LPC_SSP_TypeDef* SSPx, uint32_t FlagType)
00531 {
00532         CHECK_PARAM(PARAM_SSPx(SSPx));
00533         CHECK_PARAM(PARAM_SSP_STAT(FlagType));
00534
00535         return ((SSPx->SR & FlagType) ? SET : RESET);
00536 }
00537
00538 /*********************************************************************/
00554 void SSP_IntConfig(LPC_SSP_TypeDef *SSPx, uint32_t IntType, FunctionalState NewState)
00555 {
00556         CHECK_PARAM(PARAM_SSPx(SSPx));
00557
00558         if (NewState == ENABLE)
00559         {
00560                 SSPx->IMSC |= IntType;
00561         }
00562         else
00563         {
00564                 SSPx->IMSC &= (~IntType) & SSP_IMSC_BITMASK;
00565         }
00566 }
00567
00568 /*********************************************************************/
00583 IntStatus SSP_GetRawIntStatus(LPC_SSP_TypeDef *SSPx, uint32_t RawIntType)
00584 {
00585         CHECK_PARAM(PARAM_SSPx(SSPx));
00586         CHECK_PARAM(PARAM_SSP_INTSTAT_RAW(RawIntType));
00587
00588         return ((SSPx->RIS & RawIntType) ? SET : RESET);
00589 }
00590
00591 /*********************************************************************/
00598 uint32_t SSP_GetRawIntStatusReg(LPC_SSP_TypeDef *SSPx)
00599 {
00600         CHECK_PARAM(PARAM_SSPx(SSPx));
00601         return (SSPx->RIS);
00602 }
00603
00604 /*********************************************************************/
00619 IntStatus SSP_GetIntStatus (LPC_SSP_TypeDef *SSPx, uint32_t IntType)
00620 {
00621         CHECK_PARAM(PARAM_SSPx(SSPx));
00622         CHECK_PARAM(PARAM_SSP_INTSTAT(IntType));
00623
00624         return ((SSPx->MIS & IntType) ? SET :RESET);
00625 }
00626
00627 /*********************************************************************/
00639 void SSP_ClearIntPending(LPC_SSP_TypeDef *SSPx, uint32_t IntType)
00640 {
00641         CHECK_PARAM(PARAM_SSPx(SSPx));
00642         CHECK_PARAM(PARAM_SSP_INTCLR(IntType));
00643
00644         SSPx->ICR = IntType;
00645 }
00646
00647 /*********************************************************************/
00661 void SSP_DMACmd(LPC_SSP_TypeDef *SSPx, uint32_t DMAMode, FunctionalState NewState)
00662 {
00663         CHECK_PARAM(PARAM_SSPx(SSPx));
00664         CHECK_PARAM(PARAM_SSP_DMA(DMAMode));
00665         CHECK_PARAM(PARAM_FUNCTIONALSTATE(NewState));
00666
00667         if (NewState == ENABLE)
00668         {
00669                 SSPx->DMACR |= DMAMode;
00670         }
00671         else
00672         {
00673                 SSPx->DMACR &= (~DMAMode) & SSP_DMA_BITMASK;
00674         }
00675 }
00676
00681 #endif /* _SSP */
00682
00687 /* --------------------------------- End Of File ------------------------------ */
00688
Generated on Tue Jun 7 14:58:56 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_ssp.h Source File

C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_ssp.h

Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          lpc17xx_ssp.h                           2010-06-18
00003 */
00027 /* Peripheral group ----------------------------------------------------------- */
00033 #ifndef LPC17XX_SSP_H_
00034 #define LPC17XX_SSP_H_
00035
00036 /* Includes ------------------------------------------------------------------- */
00037 #include "LPC17xx.h"
00038 #include "lpc_types.h"
00039
00040
00041 #ifdef __cplusplus
00042 extern "C"
00043 {
00044 #endif
00045
00046 /* Public Macros -------------------------------------------------------------- */
00051 /*********************************************************************/
00055 #define SSP_CPHA_FIRST                  ((uint32_t)(0))
00056 #define SSP_CPHA_SECOND                 SSP_CR0_CPHA_SECOND
00057
00058
00060 /* There's no bug here!!!
00061  * - If bit[6] in SSPnCR0 is 0: SSP controller maintains the bus clock low between frames.
00062  * That means the active clock is in HI state.
00063  * - If bit[6] in SSPnCR0 is 1 (SSP_CR0_CPOL_HI): SSP controller maintains the bus clock
00064  * high between frames. That means the active clock is in LO state.
00065  */
00066 #define SSP_CPOL_HI                             ((uint32_t)(0))
00067 #define SSP_CPOL_LO                             SSP_CR0_CPOL_HI
00068
00070 #define SSP_SLAVE_MODE                  SSP_CR1_SLAVE_EN
00071 #define SSP_MASTER_MODE                 ((uint32_t)(0))
00072
00074 #define SSP_DATABIT_4           SSP_CR0_DSS(4)
00075 #define SSP_DATABIT_5           SSP_CR0_DSS(5)
00076 #define SSP_DATABIT_6           SSP_CR0_DSS(6)
00077 #define SSP_DATABIT_7           SSP_CR0_DSS(7)
00078 #define SSP_DATABIT_8           SSP_CR0_DSS(8)
00079 #define SSP_DATABIT_9           SSP_CR0_DSS(9)
00080 #define SSP_DATABIT_10          SSP_CR0_DSS(10)
00081 #define SSP_DATABIT_11          SSP_CR0_DSS(11)
00082 #define SSP_DATABIT_12          SSP_CR0_DSS(12)
00083 #define SSP_DATABIT_13          SSP_CR0_DSS(13)
00084 #define SSP_DATABIT_14          SSP_CR0_DSS(14)
00085 #define SSP_DATABIT_15          SSP_CR0_DSS(15)
00086 #define SSP_DATABIT_16          SSP_CR0_DSS(16)
00090 #define SSP_FRAME_SPI           SSP_CR0_FRF_SPI
00091
00092 #define SSP_FRAME_TI            SSP_CR0_FRF_TI
00093
00094 #define SSP_FRAME_MICROWIRE     SSP_CR0_FRF_MICROWIRE
00095
00096 /*********************************************************************/
00100 #define SSP_STAT_TXFIFO_EMPTY           SSP_SR_TFE
00101
00102 #define SSP_STAT_TXFIFO_NOTFULL         SSP_SR_TNF
00103
00104 #define SSP_STAT_RXFIFO_NOTEMPTY        SSP_SR_RNE
00105
00106 #define SSP_STAT_RXFIFO_FULL            SSP_SR_RFF
00107
00108 #define SSP_STAT_BUSY                           SSP_SR_BSY
00109
00110 /*********************************************************************/
00114 #define SSP_INTCFG_ROR          SSP_IMSC_ROR
00115
00116 #define SSP_INTCFG_RT           SSP_IMSC_RT
00117
00118 #define SSP_INTCFG_RX           SSP_IMSC_RX
00119
00120 #define SSP_INTCFG_TX           SSP_IMSC_TX
00121
00122 /*********************************************************************/
00126 #define SSP_INTSTAT_ROR         SSP_MIS_ROR
00127
00128 #define SSP_INTSTAT_RT          SSP_MIS_RT
00129
00130 #define SSP_INTSTAT_RX          SSP_MIS_RX
00131
00132 #define SSP_INTSTAT_TX          SSP_MIS_TX
00133
00134 /*********************************************************************/
00138 #define SSP_INTSTAT_RAW_ROR             SSP_RIS_ROR
00139
00140 #define SSP_INTSTAT_RAW_RT              SSP_RIS_RT
00141
00142 #define SSP_INTSTAT_RAW_RX              SSP_RIS_RX
00143
00144 #define SSP_INTSTAT_RAW_TX              SSP_RIS_TX
00145
00146 /*********************************************************************/
00151 #define SSP_INTCLR_ROR          SSP_ICR_ROR
00152
00154 #define SSP_INTCLR_RT           SSP_ICR_RT
00155
00156 /*********************************************************************/
00160 #define SSP_DMA_RX              SSP_DMA_RXDMA_EN
00161
00162 #define SSP_DMA_TX              SSP_DMA_TXDMA_EN
00163
00164 /* SSP Status Implementation definitions */
00165 #define SSP_STAT_DONE           (1UL<<8)
00166 #define SSP_STAT_ERROR          (1UL<<9)
00172 /* Private Macros ------------------------------------------------------------- */
00173
00177 /* --------------------- BIT DEFINITIONS -------------------------------------- */
00178 /*********************************************************************/
00182 #define SSP_CR0_DSS(n)                  ((uint32_t)((n-1)&0xF))
00183
00184 #define SSP_CR0_FRF_SPI                 ((uint32_t)(0<<4))
00185
00186 #define SSP_CR0_FRF_TI                  ((uint32_t)(1<<4))
00187
00188 #define SSP_CR0_FRF_MICROWIRE   ((uint32_t)(2<<4))
00189
00191 #define SSP_CR0_CPOL_HI         ((uint32_t)(1<<6))
00192
00194 #define SSP_CR0_CPHA_SECOND     ((uint32_t)(1<<7))
00195
00197 #define SSP_CR0_SCR(n)          ((uint32_t)((n&0xFF)<<8))
00198
00199 #define SSP_CR0_BITMASK         ((uint32_t)(0xFFFF))
00200
00201 /*********************************************************************/
00205 #define SSP_CR1_LBM_EN          ((uint32_t)(1<<0))
00206
00207 #define SSP_CR1_SSP_EN          ((uint32_t)(1<<1))
00208
00209 #define SSP_CR1_SLAVE_EN        ((uint32_t)(1<<2))
00210
00212 #define SSP_CR1_SO_DISABLE      ((uint32_t)(1<<3))
00213
00214 #define SSP_CR1_BITMASK         ((uint32_t)(0x0F))
00215
00216 /*********************************************************************/
00220 #define SSP_DR_BITMASK(n)   ((n)&0xFFFF)
00221
00222 /*********************************************************************/
00226 #define SSP_SR_TFE      ((uint32_t)(1<<0))
00227
00228 #define SSP_SR_TNF      ((uint32_t)(1<<1))
00229
00230 #define SSP_SR_RNE      ((uint32_t)(1<<2))
00231
00232 #define SSP_SR_RFF      ((uint32_t)(1<<3))
00233
00234 #define SSP_SR_BSY      ((uint32_t)(1<<4))
00235
00236 #define SSP_SR_BITMASK  ((uint32_t)(0x1F))
00237
00238 /*********************************************************************/
00242 #define SSP_CPSR_CPDVSR(n)      ((uint32_t)(n&0xFF))
00243
00244 #define SSP_CPSR_BITMASK        ((uint32_t)(0xFF))
00245
00246 /*********************************************************************/
00250 #define SSP_IMSC_ROR    ((uint32_t)(1<<0))
00251
00252 #define SSP_IMSC_RT             ((uint32_t)(1<<1))
00253
00254 #define SSP_IMSC_RX             ((uint32_t)(1<<2))
00255
00256 #define SSP_IMSC_TX             ((uint32_t)(1<<3))
00257
00258 #define SSP_IMSC_BITMASK        ((uint32_t)(0x0F))
00259
00260 /*********************************************************************/
00264 #define SSP_RIS_ROR             ((uint32_t)(1<<0))
00265
00266 #define SSP_RIS_RT              ((uint32_t)(1<<1))
00267
00268 #define SSP_RIS_RX              ((uint32_t)(1<<2))
00269
00270 #define SSP_RIS_TX              ((uint32_t)(1<<3))
00271
00272 #define SSP_RIS_BITMASK ((uint32_t)(0x0F))
00273
00274 /*********************************************************************/
00278 #define SSP_MIS_ROR             ((uint32_t)(1<<0))
00279
00280 #define SSP_MIS_RT              ((uint32_t)(1<<1))
00281
00282 #define SSP_MIS_RX              ((uint32_t)(1<<2))
00283
00284 #define SSP_MIS_TX              ((uint32_t)(1<<3))
00285
00286 #define SSP_MIS_BITMASK ((uint32_t)(0x0F))
00287
00288 /*********************************************************************/
00293 #define SSP_ICR_ROR             ((uint32_t)(1<<0))
00294
00296 #define SSP_ICR_RT              ((uint32_t)(1<<1))
00297
00298 #define SSP_ICR_BITMASK ((uint32_t)(0x03))
00299
00300 /*********************************************************************/
00304 #define SSP_DMA_RXDMA_EN        ((uint32_t)(1<<0))
00305
00306 #define SSP_DMA_TXDMA_EN        ((uint32_t)(1<<1))
00307
00308 #define SSP_DMA_BITMASK         ((uint32_t)(0x03))
00309
00310
00311 /* ---------------- CHECK PARAMETER DEFINITIONS ---------------------------- */
00313 #define PARAM_SSPx(n)   ((((uint32_t *)n)==((uint32_t *)LPC_SSP0)) \
00314 || (((uint32_t *)n)==((uint32_t *)LPC_SSP1)))
00315
00317 #define PARAM_SSP_CPHA(n)               ((n==SSP_CPHA_FIRST) || (n==SSP_CPHA_SECOND))
00318
00320 #define PARAM_SSP_CPOL(n)               ((n==SSP_CPOL_HI) || (n==SSP_CPOL_LO))
00321
00322 /* Macro check master/slave mode */
00323 #define PARAM_SSP_MODE(n)               ((n==SSP_SLAVE_MODE) || (n==SSP_MASTER_MODE))
00324
00325 /* Macro check databit value */
00326 #define PARAM_SSP_DATABIT(n)    ((n==SSP_DATABIT_4) || (n==SSP_DATABIT_5) \
00327 || (n==SSP_DATABIT_6) || (n==SSP_DATABIT_16) \
00328 || (n==SSP_DATABIT_7) || (n==SSP_DATABIT_8) \
00329 || (n==SSP_DATABIT_9) || (n==SSP_DATABIT_10) \
00330 || (n==SSP_DATABIT_11) || (n==SSP_DATABIT_12) \
00331 || (n==SSP_DATABIT_13) || (n==SSP_DATABIT_14) \
00332 || (n==SSP_DATABIT_15))
00333
00334 /* Macro check frame type */
00335 #define PARAM_SSP_FRAME(n) ((n==SSP_FRAME_SPI) || (n==SSP_FRAME_TI)\
00336 || (n==SSP_FRAME_MICROWIRE))
00337
00338 /* Macro check SSP status */
00339 #define PARAM_SSP_STAT(n) ((n==SSP_STAT_TXFIFO_EMPTY) || (n==SSP_STAT_TXFIFO_NOTFULL) \
00340 || (n==SSP_STAT_RXFIFO_NOTEMPTY) || (n==SSP_STAT_RXFIFO_FULL) \
00341 || (n==SSP_STAT_BUSY))
00342
00343 /* Macro check interrupt configuration */
00344 #define PARAM_SSP_INTCFG(n)     ((n==SSP_INTCFG_ROR) || (n==SSP_INTCFG_RT) \
00345 || (n==SSP_INTCFG_RX) || (n==SSP_INTCFG_TX))
00346
00347 /* Macro check interrupt status value */
00348 #define PARAM_SSP_INTSTAT(n) ((n==SSP_INTSTAT_ROR) || (n==SSP_INTSTAT_RT) \
00349 || (n==SSP_INTSTAT_RX) || (n==SSP_INTSTAT_TX))
00350
00351 /* Macro check interrupt status raw value */
00352 #define PARAM_SSP_INTSTAT_RAW(n)        ((n==SSP_INTSTAT_RAW_ROR) || (n==SSP_INTSTAT_RAW_RT) \
00353 || (n==SSP_INTSTAT_RAW_RX) || (n==SSP_INTSTAT_RAW_TX))
00354
00355 /* Macro check interrupt clear mode */
00356 #define PARAM_SSP_INTCLR(n)     ((n==SSP_INTCLR_ROR) || (n==SSP_INTCLR_RT))
00357
00358 /* Macro check DMA mode */
00359 #define PARAM_SSP_DMA(n)        ((n==SSP_DMA_TX) || (n==SSP_DMA_RX))
00360
00365 /* Public Types --------------------------------------------------------------- */
00371 typedef struct {
00372         uint32_t Databit;
00374         uint32_t CPHA;
00377         uint32_t CPOL;
00380         uint32_t Mode;
00383         uint32_t FrameFormat;
00387         uint32_t ClockRate;
00388 } SSP_CFG_Type;
00389
00393 typedef enum {
00394         SSP_TRANSFER_POLLING = 0,
00395         SSP_TRANSFER_INTERRUPT
00396 } SSP_TRANSFER_Type;
00397
00401 typedef struct {
00402         void *tx_data;
00403         uint32_t tx_cnt;
00404         void *rx_data;
00405         uint32_t rx_cnt;
00406         uint32_t length;
00407         uint32_t status;
00408 } SSP_DATA_SETUP_Type;
00409
00410
00416 /* Public Functions ----------------------------------------------------------- */
00421 /* SSP Init/DeInit functions --------------------------------------------------*/
00422 void SSP_Init(LPC_SSP_TypeDef *SSPx, SSP_CFG_Type *SSP_ConfigStruct);
00423 void SSP_DeInit(LPC_SSP_TypeDef* SSPx);
00424
00425 /* SSP configure functions ----------------------------------------------------*/
00426 void SSP_ConfigStructInit(SSP_CFG_Type *SSP_InitStruct);
00427
00428 /* SSP enable/disable functions -----------------------------------------------*/
00429 void SSP_Cmd(LPC_SSP_TypeDef* SSPx, FunctionalState NewState);
00430 void SSP_LoopBackCmd(LPC_SSP_TypeDef* SSPx, FunctionalState NewState);
00431 void SSP_SlaveOutputCmd(LPC_SSP_TypeDef* SSPx, FunctionalState NewState);
00432 void SSP_DMACmd(LPC_SSP_TypeDef *SSPx, uint32_t DMAMode, FunctionalState NewState);
00433
00434 /* SSP get information functions ----------------------------------------------*/
00435 FlagStatus SSP_GetStatus(LPC_SSP_TypeDef* SSPx, uint32_t FlagType);
00436 uint8_t SSP_GetDataSize(LPC_SSP_TypeDef* SSPx);
00437 IntStatus SSP_GetRawIntStatus(LPC_SSP_TypeDef *SSPx, uint32_t RawIntType);
00438 uint32_t SSP_GetRawIntStatusReg(LPC_SSP_TypeDef *SSPx);
00439 IntStatus SSP_GetIntStatus (LPC_SSP_TypeDef *SSPx, uint32_t IntType);
00440
00441 /* SSP transfer data functions ------------------------------------------------*/
00442 void SSP_SendData(LPC_SSP_TypeDef* SSPx, uint16_t Data);
00443 uint16_t SSP_ReceiveData(LPC_SSP_TypeDef* SSPx);
00444 int32_t SSP_ReadWrite (LPC_SSP_TypeDef *SSPx, SSP_DATA_SETUP_Type *dataCfg, \
00445                                                 SSP_TRANSFER_Type xfType);
00446
00447 /* SSP IRQ function ------------------------------------------------------------*/
00448 void SSP_IntConfig(LPC_SSP_TypeDef *SSPx, uint32_t IntType, FunctionalState NewState);
00449 void SSP_ClearIntPending(LPC_SSP_TypeDef *SSPx, uint32_t IntType);
00450
00451
00456 #ifdef __cplusplus
00457 }
00458 #endif
00459
00460 #endif /* LPC17XX_SSP_H_ */
00461
00466 /* --------------------------------- End Of File ------------------------------ */
Generated on Tue Jun 7 14:58:55 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Drivers/source/lpc17xx_systick.c Source File

C:/nxpdrv/LPC1700CMSIS/Drivers/source/lpc17xx_systick.c

Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          lpc17xx_systick.c                               2010-05-21
00003 */
00027 /* Peripheral group ----------------------------------------------------------- */
00032 /* Includes ------------------------------------------------------------------- */
00033 #include "lpc17xx_systick.h"
00034 #include "lpc17xx_clkpwr.h"
00035
00036 /* If this source file built with example, the LPC17xx FW library configuration
00037  * file in each example directory ("lpc17xx_libcfg.h") must be included,
00038  * otherwise the default FW library configuration file must be included instead
00039  */
00040 #ifdef __BUILD_WITH_EXAMPLE__
00041 #include "lpc17xx_libcfg.h"
00042 #else
00043 #include "lpc17xx_libcfg_default.h"
00044 #endif /* __BUILD_WITH_EXAMPLE__ */
00045
00046
00047 #ifdef _SYSTICK
00048
00049 /* Public Functions ----------------------------------------------------------- */
00053 /*********************************************************************/
00058 void SYSTICK_InternalInit(uint32_t time)
00059 {
00060         uint32_t cclk;
00061         float maxtime;
00062
00063         cclk = SystemCoreClock;
00064         /* With internal CPU clock frequency for LPC17xx is 'SystemCoreClock'
00065          * And limit 24 bit for RELOAD value
00066          * So the maximum time can be set:
00067          * 1/SystemCoreClock * (2^24) * 1000 (ms)
00068          */
00069         //check time value is available or not
00070         maxtime = (1<<24)/(SystemCoreClock / 1000) ;
00071         if(time > maxtime)
00072                 //Error loop
00073                 while(1);
00074         else
00075         {
00076                 //Select CPU clock is System Tick clock source
00077                 SysTick->CTRL |= ST_CTRL_CLKSOURCE;
00078                 /* Set RELOAD value
00079                  * RELOAD = (SystemCoreClock/1000) * time - 1
00080                  * with time base is millisecond
00081                  */
00082                 SysTick->LOAD = (cclk/1000)*time - 1;
00083         }
00084 }
00085
00086 /*********************************************************************/
00092 void SYSTICK_ExternalInit(uint32_t freq, uint32_t time)
00093 {
00094         float maxtime;
00095
00096         /* With external clock frequency for LPC17xx is 'freq'
00097          * And limit 24 bit for RELOAD value
00098          * So the maximum time can be set:
00099          * 1/freq * (2^24) * 1000 (ms)
00100          */
00101         //check time value is available or not
00102         maxtime = (1<<24)/(freq / 1000) ;
00103         if (time>maxtime)
00104                 //Error Loop
00105                 while(1);
00106         else
00107         {
00108                 //Select external clock is System Tick clock source
00109                 SysTick->CTRL &= ~ ST_CTRL_CLKSOURCE;
00110                 /* Set RELOAD value
00111                  * RELOAD = (freq/1000) * time - 1
00112                  * with time base is millisecond
00113                  */
00114                 maxtime = (freq/1000)*time - 1;
00115                 SysTick->LOAD = (freq/1000)*time - 1;
00116         }
00117 }
00118
00119 /*********************************************************************/
00126 void SYSTICK_Cmd(FunctionalState NewState)
00127 {
00128         CHECK_PARAM(PARAM_FUNCTIONALSTATE(NewState));
00129
00130         if(NewState == ENABLE)
00131                 //Enable System Tick counter
00132                 SysTick->CTRL |= ST_CTRL_ENABLE;
00133         else
00134                 //Disable System Tick counter
00135                 SysTick->CTRL &= ~ST_CTRL_ENABLE;
00136 }
00137
00138 /*********************************************************************/
00145 void SYSTICK_IntCmd(FunctionalState NewState)
00146 {
00147         CHECK_PARAM(PARAM_FUNCTIONALSTATE(NewState));
00148
00149         if(NewState == ENABLE)
00150                 //Enable System Tick counter
00151                 SysTick->CTRL |= ST_CTRL_TICKINT;
00152         else
00153                 //Disable System Tick counter
00154                 SysTick->CTRL &= ~ST_CTRL_TICKINT;
00155 }
00156
00157 /*********************************************************************/
00162 uint32_t SYSTICK_GetCurrentValue(void)
00163 {
00164         return (SysTick->VAL);
00165 }
00166
00167 /*********************************************************************/
00172 void SYSTICK_ClearCounterFlag(void)
00173 {
00174         SysTick->CTRL &= ~ST_CTRL_COUNTFLAG;
00175 }
00180 #endif /* _SYSTICK */
00181
00186 /* --------------------------------- End Of File ------------------------------ */
00187
Generated on Tue Jun 7 14:58:56 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_systick.h Source File

C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_systick.h

Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          lpc17xx_systick.h                               2010-05-21
00003 */
00027 /* Peripheral group ----------------------------------------------------------- */
00033 #ifndef LPC17XX_SYSTICK_H_
00034 #define LPC17XX_SYSTICK_H_
00035
00036 /* Includes ------------------------------------------------------------------- */
00037 #include "LPC17xx.h"
00038 #include "lpc_types.h"
00039
00040
00041 #ifdef __cplusplus
00042 extern "C"
00043 {
00044 #endif
00045
00046
00047 /* Private Macros ------------------------------------------------------------- */
00051 /*********************************************************************/
00054 #define ST_CTRL_ENABLE          ((uint32_t)(1<<0))
00055 #define ST_CTRL_TICKINT         ((uint32_t)(1<<1))
00056 #define ST_CTRL_CLKSOURCE       ((uint32_t)(1<<2))
00057 #define ST_CTRL_COUNTFLAG       ((uint32_t)(1<<16))
00058
00059 /*********************************************************************/
00062 #define ST_RELOAD_RELOAD(n)             ((uint32_t)(n & 0x00FFFFFF))
00063
00064 /*********************************************************************/
00067 #define ST_RELOAD_CURRENT(n)    ((uint32_t)(n & 0x00FFFFFF))
00068
00069 /*********************************************************************/
00072 #define ST_CALIB_TENMS(n)               ((uint32_t)(n & 0x00FFFFFF))
00073 #define ST_CALIB_SKEW                   ((uint32_t)(1<<30))
00074 #define ST_CALIB_NOREF                  ((uint32_t)(1<<31))
00075
00076 #define CLKSOURCE_EXT                   ((uint32_t)(0))
00077 #define CLKSOURCE_CPU                   ((uint32_t)(1))
00078
00084 /* Public Functions ----------------------------------------------------------- */
00089 void SYSTICK_InternalInit(uint32_t time);
00090 void SYSTICK_ExternalInit(uint32_t freq, uint32_t time);
00091
00092 void SYSTICK_Cmd(FunctionalState NewState);
00093 void SYSTICK_IntCmd(FunctionalState NewState);
00094 uint32_t SYSTICK_GetCurrentValue(void);
00095 void SYSTICK_ClearCounterFlag(void);
00096
00102 #ifdef __cplusplus
00103 }
00104 #endif
00105
00106
00107 #endif /* LPC17XX_SYSTICK_H_ */
00108
00113 /* --------------------------------- End Of File ------------------------------ */
Generated on Tue Jun 7 14:58:55 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Drivers/source/lpc17xx_timer.c Source File

C:/nxpdrv/LPC1700CMSIS/Drivers/source/lpc17xx_timer.c

Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          lpc17xx_timer.c                         2011-03-10
00003 */
00027 /* Peripheral group ----------------------------------------------------------- */
00032 /* Includes ------------------------------------------------------------------- */
00033 #include "lpc17xx_timer.h"
00034 #include "lpc17xx_clkpwr.h"
00035 #include "lpc17xx_pinsel.h"
00036
00037 /* If this source file built with example, the LPC17xx FW library configuration
00038  * file in each example directory ("lpc17xx_libcfg.h") must be included,
00039  * otherwise the default FW library configuration file must be included instead
00040  */
00041 #ifdef __BUILD_WITH_EXAMPLE__
00042 #include "lpc17xx_libcfg.h"
00043 #else
00044 #include "lpc17xx_libcfg_default.h"
00045 #endif /* __BUILD_WITH_EXAMPLE__ */
00046
00047 #ifdef _TIM
00048
00049 /* Private Functions ---------------------------------------------------------- */
00050
00051 static uint32_t getPClock (uint32_t timernum);
00052 static uint32_t converUSecToVal (uint32_t timernum, uint32_t usec);
00053 static uint32_t converPtrToTimeNum (LPC_TIM_TypeDef *TIMx);
00054
00055
00056 /*********************************************************************/
00061 static uint32_t getPClock (uint32_t timernum)
00062 {
00063         uint32_t clkdlycnt;
00064         switch (timernum)
00065         {
00066         case 0:
00067                 clkdlycnt = CLKPWR_GetPCLK (CLKPWR_PCLKSEL_TIMER0);
00068                 break;
00069
00070         case 1:
00071                 clkdlycnt = CLKPWR_GetPCLK (CLKPWR_PCLKSEL_TIMER1);
00072                 break;
00073
00074         case 2:
00075                 clkdlycnt = CLKPWR_GetPCLK (CLKPWR_PCLKSEL_TIMER2);
00076                 break;
00077
00078         case 3:
00079                 clkdlycnt = CLKPWR_GetPCLK (CLKPWR_PCLKSEL_TIMER3);
00080                 break;
00081         }
00082         return clkdlycnt;
00083 }
00084
00085
00086 /*********************************************************************/
00092 uint32_t converUSecToVal (uint32_t timernum, uint32_t usec)
00093 {
00094         uint64_t clkdlycnt;
00095
00096         // Get Pclock of timer
00097         clkdlycnt = (uint64_t) getPClock(timernum);
00098
00099         clkdlycnt = (clkdlycnt * usec) / 1000000;
00100         return (uint32_t) clkdlycnt;
00101 }
00102
00103
00104 /*********************************************************************/
00113 uint32_t converPtrToTimeNum (LPC_TIM_TypeDef *TIMx)
00114 {
00115         uint32_t tnum = -1;
00116
00117         if (TIMx == LPC_TIM0)
00118         {
00119                 tnum = 0;
00120         }
00121         else if (TIMx == LPC_TIM1)
00122         {
00123                 tnum = 1;
00124         }
00125         else if (TIMx == LPC_TIM2)
00126         {
00127                 tnum = 2;
00128         }
00129         else if (TIMx == LPC_TIM3)
00130         {
00131                 tnum = 3;
00132         }
00133
00134         return tnum;
00135 }
00136
00137 /* End of Private Functions ---------------------------------------------------- */
00138
00139
00140 /* Public Functions ----------------------------------------------------------- */
00145 /*********************************************************************/
00163 FlagStatus TIM_GetIntStatus(LPC_TIM_TypeDef *TIMx, TIM_INT_TYPE IntFlag)
00164 {
00165         uint8_t temp;
00166         CHECK_PARAM(PARAM_TIMx(TIMx));
00167         CHECK_PARAM(PARAM_TIM_INT_TYPE(IntFlag));
00168         temp = (TIMx->IR)& TIM_IR_CLR(IntFlag);
00169         if (temp)
00170                 return SET;
00171
00172         return RESET;
00173
00174 }
00175 /*********************************************************************/
00193 FlagStatus TIM_GetIntCaptureStatus(LPC_TIM_TypeDef *TIMx, TIM_INT_TYPE IntFlag)
00194 {
00195         uint8_t temp;
00196         CHECK_PARAM(PARAM_TIMx(TIMx));
00197         CHECK_PARAM(PARAM_TIM_INT_TYPE(IntFlag));
00198         temp = (TIMx->IR) & (1<<(4+IntFlag));
00199         if(temp)
00200                 return SET;
00201         return RESET;
00202 }
00203 /*********************************************************************/
00219 void TIM_ClearIntPending(LPC_TIM_TypeDef *TIMx, TIM_INT_TYPE IntFlag)
00220 {
00221         CHECK_PARAM(PARAM_TIMx(TIMx));
00222         CHECK_PARAM(PARAM_TIM_INT_TYPE(IntFlag));
00223         TIMx->IR = TIM_IR_CLR(IntFlag);
00224 }
00225
00226 /*********************************************************************/
00242 void TIM_ClearIntCapturePending(LPC_TIM_TypeDef *TIMx, TIM_INT_TYPE IntFlag)
00243 {
00244         CHECK_PARAM(PARAM_TIMx(TIMx));
00245         CHECK_PARAM(PARAM_TIM_INT_TYPE(IntFlag));
00246         TIMx->IR = (1<<(4+IntFlag));
00247 }
00248
00249 /*********************************************************************/
00260 void TIM_ConfigStructInit(TIM_MODE_OPT TimerCounterMode, void *TIM_ConfigStruct)
00261 {
00262         if (TimerCounterMode == TIM_TIMER_MODE )
00263         {
00264                 TIM_TIMERCFG_Type * pTimeCfg = (TIM_TIMERCFG_Type *)TIM_ConfigStruct;
00265                 pTimeCfg->PrescaleOption = TIM_PRESCALE_USVAL;
00266                 pTimeCfg->PrescaleValue = 1;
00267         }
00268         else
00269         {
00270                 TIM_COUNTERCFG_Type * pCounterCfg = (TIM_COUNTERCFG_Type *)TIM_ConfigStruct;
00271                 pCounterCfg->CountInputSelect = TIM_COUNTER_INCAP0;
00272         }
00273 }
00274
00275 /*********************************************************************/
00294 void TIM_Init(LPC_TIM_TypeDef *TIMx, TIM_MODE_OPT TimerCounterMode, void *TIM_ConfigStruct)
00295 {
00296         TIM_TIMERCFG_Type *pTimeCfg;
00297         TIM_COUNTERCFG_Type *pCounterCfg;
00298
00299         CHECK_PARAM(PARAM_TIMx(TIMx));
00300         CHECK_PARAM(PARAM_TIM_MODE_OPT(TimerCounterMode));
00301
00302         //set power
00303
00304         if (TIMx== LPC_TIM0)
00305         {
00306                 CLKPWR_ConfigPPWR (CLKPWR_PCONP_PCTIM0, ENABLE);
00307                 //PCLK_Timer0 = CCLK/4
00308                 CLKPWR_SetPCLKDiv (CLKPWR_PCLKSEL_TIMER0, CLKPWR_PCLKSEL_CCLK_DIV_4);
00309         }
00310         else if (TIMx== LPC_TIM1)
00311         {
00312                 CLKPWR_ConfigPPWR (CLKPWR_PCONP_PCTIM1, ENABLE);
00313                 //PCLK_Timer1 = CCLK/4
00314                 CLKPWR_SetPCLKDiv (CLKPWR_PCLKSEL_TIMER1, CLKPWR_PCLKSEL_CCLK_DIV_4);
00315
00316         }
00317
00318         else if (TIMx== LPC_TIM2)
00319         {
00320                 CLKPWR_ConfigPPWR (CLKPWR_PCONP_PCTIM2, ENABLE);
00321                 //PCLK_Timer2= CCLK/4
00322                 CLKPWR_SetPCLKDiv (CLKPWR_PCLKSEL_TIMER2, CLKPWR_PCLKSEL_CCLK_DIV_4);
00323         }
00324         else if (TIMx== LPC_TIM3)
00325         {
00326                 CLKPWR_ConfigPPWR (CLKPWR_PCONP_PCTIM3, ENABLE);
00327                 //PCLK_Timer3= CCLK/4
00328                 CLKPWR_SetPCLKDiv (CLKPWR_PCLKSEL_TIMER3, CLKPWR_PCLKSEL_CCLK_DIV_4);
00329
00330         }
00331
00332         TIMx->CCR &= ~TIM_CTCR_MODE_MASK;
00333         TIMx->CCR |= TIM_TIMER_MODE;
00334
00335         TIMx->TC =0;
00336         TIMx->PC =0;
00337         TIMx->PR =0;
00338         TIMx->TCR |= (1<<1); //Reset Counter
00339         TIMx->TCR &= ~(1<<1); //release reset
00340         if (TimerCounterMode == TIM_TIMER_MODE )
00341         {
00342                 pTimeCfg = (TIM_TIMERCFG_Type *)TIM_ConfigStruct;
00343                 if (pTimeCfg->PrescaleOption  == TIM_PRESCALE_TICKVAL)
00344                 {
00345                         TIMx->PR   = pTimeCfg->PrescaleValue -1  ;
00346                 }
00347                 else
00348                 {
00349                         TIMx->PR   = converUSecToVal (converPtrToTimeNum(TIMx),pTimeCfg->PrescaleValue)-1;
00350                 }
00351         }
00352         else
00353         {
00354
00355                 pCounterCfg = (TIM_COUNTERCFG_Type *)TIM_ConfigStruct;
00356                 TIMx->CCR  &= ~TIM_CTCR_INPUT_MASK;
00357                 if (pCounterCfg->CountInputSelect == TIM_COUNTER_INCAP1)
00358                         TIMx->CCR |= _BIT(2);
00359         }
00360
00361         // Clear interrupt pending
00362         TIMx->IR = 0xFFFFFFFF;
00363
00364 }
00365
00366 /*********************************************************************/
00375 void TIM_DeInit (LPC_TIM_TypeDef *TIMx)
00376 {
00377         CHECK_PARAM(PARAM_TIMx(TIMx));
00378         // Disable timer/counter
00379         TIMx->TCR = 0x00;
00380
00381         // Disable power
00382         if (TIMx== LPC_TIM0)
00383                 CLKPWR_ConfigPPWR (CLKPWR_PCONP_PCTIM0, DISABLE);
00384
00385         else if (TIMx== LPC_TIM1)
00386                 CLKPWR_ConfigPPWR (CLKPWR_PCONP_PCTIM1, DISABLE);
00387
00388         else if (TIMx== LPC_TIM2)
00389                 CLKPWR_ConfigPPWR (CLKPWR_PCONP_PCTIM2, DISABLE);
00390
00391         else if (TIMx== LPC_TIM3)
00392                 CLKPWR_ConfigPPWR (CLKPWR_PCONP_PCTIM2, DISABLE);
00393
00394 }
00395
00396 /*********************************************************************/
00408 void TIM_Cmd(LPC_TIM_TypeDef *TIMx, FunctionalState NewState)
00409 {
00410         CHECK_PARAM(PARAM_TIMx(TIMx));
00411         if (NewState == ENABLE)
00412         {
00413                 TIMx->TCR       |=  TIM_ENABLE;
00414         }
00415         else
00416         {
00417                 TIMx->TCR &= ~TIM_ENABLE;
00418         }
00419 }
00420
00421 /*********************************************************************/
00432 void TIM_ResetCounter(LPC_TIM_TypeDef *TIMx)
00433 {
00434         CHECK_PARAM(PARAM_TIMx(TIMx));
00435         TIMx->TCR |= TIM_RESET;
00436         TIMx->TCR &= ~TIM_RESET;
00437 }
00438
00439 /*********************************************************************/
00462 void TIM_ConfigMatch(LPC_TIM_TypeDef *TIMx, TIM_MATCHCFG_Type *TIM_MatchConfigStruct)
00463 {
00464
00465         CHECK_PARAM(PARAM_TIMx(TIMx));
00466         CHECK_PARAM(PARAM_TIM_EXTMATCH_OPT(TIM_MatchConfigStruct->ExtMatchOutputType));
00467
00468         switch(TIM_MatchConfigStruct->MatchChannel)
00469         {
00470         case 0:
00471                 TIMx->MR0 = TIM_MatchConfigStruct->MatchValue;
00472                 break;
00473         case 1:
00474                 TIMx->MR1 = TIM_MatchConfigStruct->MatchValue;
00475                 break;
00476         case 2:
00477                 TIMx->MR2 = TIM_MatchConfigStruct->MatchValue;
00478                 break;
00479         case 3:
00480                 TIMx->MR3 = TIM_MatchConfigStruct->MatchValue;
00481                 break;
00482         default:
00483                 //Error match value
00484                 //Error loop
00485                 while(1);
00486         }
00487         //interrupt on MRn
00488         TIMx->MCR &=~TIM_MCR_CHANNEL_MASKBIT(TIM_MatchConfigStruct->MatchChannel);
00489
00490         if (TIM_MatchConfigStruct->IntOnMatch)
00491                 TIMx->MCR |= TIM_INT_ON_MATCH(TIM_MatchConfigStruct->MatchChannel);
00492
00493         //reset on MRn
00494         if (TIM_MatchConfigStruct->ResetOnMatch)
00495                 TIMx->MCR |= TIM_RESET_ON_MATCH(TIM_MatchConfigStruct->MatchChannel);
00496
00497         //stop on MRn
00498         if (TIM_MatchConfigStruct->StopOnMatch)
00499                 TIMx->MCR |= TIM_STOP_ON_MATCH(TIM_MatchConfigStruct->MatchChannel);
00500
00501         // match output type
00502
00503         TIMx->EMR       &= ~TIM_EM_MASK(TIM_MatchConfigStruct->MatchChannel);
00504         TIMx->EMR   |= TIM_EM_SET(TIM_MatchConfigStruct->MatchChannel,TIM_MatchConfigStruct->ExtMatchOutputType);
00505 }
00506 /*********************************************************************/
00517 void TIM_UpdateMatchValue(LPC_TIM_TypeDef *TIMx,uint8_t MatchChannel, uint32_t MatchValue)
00518 {
00519         CHECK_PARAM(PARAM_TIMx(TIMx));
00520         switch(MatchChannel)
00521         {
00522         case 0:
00523                 TIMx->MR0 = MatchValue;
00524                 break;
00525         case 1:
00526                 TIMx->MR1 = MatchValue;
00527                 break;
00528         case 2:
00529                 TIMx->MR2 = MatchValue;
00530                 break;
00531         case 3:
00532                 TIMx->MR3 = MatchValue;
00533                 break;
00534         default:
00535                 //Error Loop
00536                 while(1);
00537         }
00538
00539 }
00540 /*********************************************************************/
00554 void TIM_ConfigCapture(LPC_TIM_TypeDef *TIMx, TIM_CAPTURECFG_Type *TIM_CaptureConfigStruct)
00555 {
00556
00557         CHECK_PARAM(PARAM_TIMx(TIMx));
00558         TIMx->CCR &= ~TIM_CCR_CHANNEL_MASKBIT(TIM_CaptureConfigStruct->CaptureChannel);
00559
00560         if (TIM_CaptureConfigStruct->RisingEdge)
00561                 TIMx->CCR |= TIM_CAP_RISING(TIM_CaptureConfigStruct->CaptureChannel);
00562
00563         if (TIM_CaptureConfigStruct->FallingEdge)
00564                 TIMx->CCR |= TIM_CAP_FALLING(TIM_CaptureConfigStruct->CaptureChannel);
00565
00566         if (TIM_CaptureConfigStruct->IntOnCaption)
00567                 TIMx->CCR |= TIM_INT_ON_CAP(TIM_CaptureConfigStruct->CaptureChannel);
00568 }
00569
00570 /*********************************************************************/
00582 uint32_t TIM_GetCaptureValue(LPC_TIM_TypeDef *TIMx, TIM_COUNTER_INPUT_OPT CaptureChannel)
00583 {
00584         CHECK_PARAM(PARAM_TIMx(TIMx));
00585         CHECK_PARAM(PARAM_TIM_COUNTER_INPUT_OPT(CaptureChannel));
00586
00587         if(CaptureChannel==0)
00588                 return TIMx->CR0;
00589         else
00590                 return TIMx->CR1;
00591 }
00592
00597 #endif /* _TIMER */
00598
00603 /* --------------------------------- End Of File ------------------------------ */
Generated on Tue Jun 7 14:58:56 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_timer.h Source File

C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_timer.h

Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          lpc17xx_timer.h                         2010-05-21
00003 */
00027 /* Peripheral group ----------------------------------------------------------- */
00033 #ifndef __LPC17XX_TIMER_H_
00034 #define __LPC17XX_TIMER_H_
00035
00036 /* Includes ------------------------------------------------------------------- */
00037 #include "LPC17xx.h"
00038 #include "lpc_types.h"
00039
00040 #ifdef __cplusplus
00041 extern "C"
00042 {
00043 #endif
00044
00045 /* Private Macros ------------------------------------------------------------- */
00050 /* --------------------- BIT DEFINITIONS -------------------------------------- */
00051 /**********************************************************************
00052 ** Interrupt information
00053 **********************************************************************/
00055 #define TIM_IR_CLR(n) _BIT(n)
00056
00057 /**********************************************************************
00058 ** Timer interrupt register definitions
00059 **********************************************************************/
00061 #define TIM_MATCH_INT(n)                (_BIT(n & 0x0F))
00062
00063 #define TIM_CAP_INT(n)     (_BIT(((n & 0x0F) + 4)))
00064
00065 /**********************************************************************
00066 * Timer control register definitions
00067 **********************************************************************/
00069 #define TIM_ENABLE                      ((uint32_t)(1<<0))
00070
00071 #define TIM_RESET                       ((uint32_t)(1<<1))
00072
00073 #define TIM_TCR_MASKBIT         ((uint32_t)(3))
00074
00075 /**********************************************************************
00076 * Timer match control register definitions
00077 **********************************************************************/
00079 #define TIM_INT_ON_MATCH(n)             (_BIT((n * 3)))
00080
00081 #define TIM_RESET_ON_MATCH(n)           (_BIT(((n * 3) + 1)))
00082
00083 #define TIM_STOP_ON_MATCH(n)            (_BIT(((n * 3) + 2)))
00084
00085 #define TIM_MCR_MASKBIT                    ((uint32_t)(0x0FFF))
00086
00087 #define TIM_MCR_CHANNEL_MASKBIT(n)              ((uint32_t)(7<<(n*3)))
00088
00089 /**********************************************************************
00090 * Timer capture control register definitions
00091 **********************************************************************/
00093 #define TIM_CAP_RISING(n)       (_BIT((n * 3)))
00094
00095 #define TIM_CAP_FALLING(n)      (_BIT(((n * 3) + 1)))
00096
00097 #define TIM_INT_ON_CAP(n)       (_BIT(((n * 3) + 2)))
00098
00099 #define TIM_EDGE_MASK(n)                (_SBF((n * 3), 0x03))
00100
00101 #define TIM_CCR_MASKBIT                 ((uint32_t)(0x3F))
00102
00103 #define TIM_CCR_CHANNEL_MASKBIT(n)              ((uint32_t)(7<<(n*3)))
00104
00105 /**********************************************************************
00106 * Timer external match register definitions
00107 **********************************************************************/
00110 #define TIM_EM(n)                       _BIT(n)
00111
00112 #define TIM_EM_NOTHING          ((uint8_t)(0x0))
00113
00114 #define TIM_EM_LOW              ((uint8_t)(0x1))
00115
00116 #define TIM_EM_HIGH             ((uint8_t)(0x2))
00117
00118 #define TIM_EM_TOGGLE           ((uint8_t)(0x3))
00119
00120 #define TIM_EM_SET(n,s)         (_SBF(((n << 1) + 4), (s & 0x03)))
00121
00122 #define TIM_EM_MASK(n)          (_SBF(((n << 1) + 4), 0x03))
00123
00124 #define TIM_EMR_MASKBIT 0x0FFF
00125
00126 /**********************************************************************
00127 * Timer Count Control Register definitions
00128 **********************************************************************/
00130 #define TIM_CTCR_MODE_MASK  0x3
00131
00132 #define TIM_CTCR_INPUT_MASK 0xC
00133
00134 #define TIM_CTCR_MASKBIT        0xF
00135 #define TIM_COUNTER_MODE ((uint8_t)(1))
00136
00137
00138 /* ---------------- CHECK PARAMETER DEFINITIONS ---------------------------- */
00140 #define PARAM_TIMx(n)   ((((uint32_t *)n)==((uint32_t *)LPC_TIM0)) || (((uint32_t *)n)==((uint32_t *)LPC_TIM1)) \
00141 || (((uint32_t *)n)==((uint32_t *)LPC_TIM2)) || (((uint32_t *)n)==((uint32_t *)LPC_TIM3)))
00142
00143 /* Macro check interrupt type */
00144 #define PARAM_TIM_INT_TYPE(TYPE)        ((TYPE ==TIM_MR0_INT)||(TYPE ==TIM_MR1_INT)\
00145 ||(TYPE ==TIM_MR2_INT)||(TYPE ==TIM_MR3_INT)\
00146 ||(TYPE ==TIM_CR0_INT)||(TYPE ==TIM_CR1_INT))
00147
00148 /* Macro check TIMER mode */
00149 #define PARAM_TIM_MODE_OPT(MODE)        ((MODE == TIM_TIMER_MODE)||(MODE == TIM_COUNTER_RISING_MODE)\
00150 || (MODE == TIM_COUNTER_RISING_MODE)||(MODE == TIM_COUNTER_RISING_MODE))
00151
00152 /* Macro check TIMER prescale value */
00153 #define PARAM_TIM_PRESCALE_OPT(OPT)     ((OPT == TIM_PRESCALE_TICKVAL)||(OPT == TIM_PRESCALE_USVAL))
00154
00155 /* Macro check TIMER counter intput mode */
00156 #define PARAM_TIM_COUNTER_INPUT_OPT(OPT)        ((OPT == TIM_COUNTER_INCAP0)||(OPT == TIM_COUNTER_INCAP1))
00157
00158 /* Macro check TIMER external match mode */
00159 #define PARAM_TIM_EXTMATCH_OPT(OPT)     ((OPT == TIM_EXTMATCH_NOTHING)||(OPT == TIM_EXTMATCH_LOW)\
00160 ||(OPT == TIM_EXTMATCH_HIGH)||(OPT == TIM_EXTMATCH_TOGGLE))
00161
00162 /* Macro check TIMER external match mode */
00163 #define PARAM_TIM_CAP_MODE_OPT(OPT)     ((OPT == TIM_CAPTURE_NONE)||(OPT == TIM_CAPTURE_RISING) \
00164 ||(OPT == TIM_CAPTURE_FALLING)||(OPT == TIM_CAPTURE_ANY))
00165
00171 /* Public Types --------------------------------------------------------------- */
00176 /***********************************************************************
00177  * Timer device enumeration
00178 **********************************************************************/
00180 typedef enum
00181 {
00182         TIM_MR0_INT =0,
00183         TIM_MR1_INT =1,
00184         TIM_MR2_INT =2,
00185         TIM_MR3_INT =3,
00186         TIM_CR0_INT =4,
00187         TIM_CR1_INT =5
00188 }TIM_INT_TYPE;
00189
00191 typedef enum
00192 {
00193         TIM_TIMER_MODE = 0,
00194         TIM_COUNTER_RISING_MODE,
00195         TIM_COUNTER_FALLING_MODE,
00196         TIM_COUNTER_ANY_MODE
00197 } TIM_MODE_OPT;
00198
00200 typedef enum
00201 {
00202         TIM_PRESCALE_TICKVAL = 0,
00203         TIM_PRESCALE_USVAL
00204 } TIM_PRESCALE_OPT;
00205
00207 typedef enum
00208 {
00209         TIM_COUNTER_INCAP0 = 0,
00210         TIM_COUNTER_INCAP1,
00211 } TIM_COUNTER_INPUT_OPT;
00212
00214 typedef enum
00215 {
00216         TIM_EXTMATCH_NOTHING = 0,
00217         TIM_EXTMATCH_LOW,
00218         TIM_EXTMATCH_HIGH,
00219         TIM_EXTMATCH_TOGGLE
00220 }TIM_EXTMATCH_OPT;
00221
00223 typedef enum {
00224         TIM_CAPTURE_NONE = 0,
00225         TIM_CAPTURE_RISING,
00226         TIM_CAPTURE_FALLING,
00227         TIM_CAPTURE_ANY
00228 } TIM_CAP_MODE_OPT;
00229
00231 typedef struct
00232 {
00233
00234         uint8_t PrescaleOption;
00238         uint8_t Reserved[3];
00239         uint32_t PrescaleValue;
00240 } TIM_TIMERCFG_Type;
00241
00243 typedef struct {
00244
00245         uint8_t CounterOption;
00249         uint8_t CountInputSelect;
00250         uint8_t Reserved[2];
00251 } TIM_COUNTERCFG_Type;
00252
00254 typedef struct {
00255         uint8_t MatchChannel;
00257         uint8_t IntOnMatch;
00261         uint8_t StopOnMatch;
00265         uint8_t ResetOnMatch;
00270         uint8_t ExtMatchOutputType;
00276         uint8_t Reserved[3];
00277         uint32_t MatchValue;
00278 } TIM_MATCHCFG_Type;
00279
00281 typedef struct {
00282         uint8_t CaptureChannel;
00284         uint8_t RisingEdge;
00288         uint8_t FallingEdge;
00292         uint8_t IntOnCaption;
00297 } TIM_CAPTURECFG_Type;
00298
00304 /* Public Functions ----------------------------------------------------------- */
00308 /* Init/DeInit TIM functions -----------*/
00309 void TIM_Init(LPC_TIM_TypeDef *TIMx, TIM_MODE_OPT TimerCounterMode, void *TIM_ConfigStruct);
00310 void TIM_DeInit(LPC_TIM_TypeDef *TIMx);
00311
00312 /* TIM interrupt functions -------------*/
00313 void TIM_ClearIntPending(LPC_TIM_TypeDef *TIMx, TIM_INT_TYPE IntFlag);
00314 void TIM_ClearIntCapturePending(LPC_TIM_TypeDef *TIMx, TIM_INT_TYPE IntFlag);
00315 FlagStatus TIM_GetIntStatus(LPC_TIM_TypeDef *TIMx, TIM_INT_TYPE IntFlag);
00316 FlagStatus TIM_GetIntCaptureStatus(LPC_TIM_TypeDef *TIMx, TIM_INT_TYPE IntFlag);
00317
00318 /* TIM configuration functions --------*/
00319 void TIM_ConfigStructInit(TIM_MODE_OPT TimerCounterMode, void *TIM_ConfigStruct);
00320 void TIM_ConfigMatch(LPC_TIM_TypeDef *TIMx, TIM_MATCHCFG_Type *TIM_MatchConfigStruct);
00321 void TIM_UpdateMatchValue(LPC_TIM_TypeDef *TIMx,uint8_t MatchChannel, uint32_t MatchValue);
00322 void TIM_SetMatchExt(LPC_TIM_TypeDef *TIMx,TIM_EXTMATCH_OPT ext_match );
00323 void TIM_ConfigCapture(LPC_TIM_TypeDef *TIMx, TIM_CAPTURECFG_Type *TIM_CaptureConfigStruct);
00324 void TIM_Cmd(LPC_TIM_TypeDef *TIMx, FunctionalState NewState);
00325
00326 uint32_t TIM_GetCaptureValue(LPC_TIM_TypeDef *TIMx, TIM_COUNTER_INPUT_OPT CaptureChannel);
00327 void TIM_ResetCounter(LPC_TIM_TypeDef *TIMx);
00328
00332 #ifdef __cplusplus
00333 }
00334 #endif
00335
00336 #endif /* __LPC17XX_TIMER_H_ */
00337
00342 /* --------------------------------- End Of File ------------------------------ */
Generated on Tue Jun 7 14:58:55 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Drivers/source/lpc17xx_uart.c Source File

C:/nxpdrv/LPC1700CMSIS/Drivers/source/lpc17xx_uart.c

Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          lpc17xx_uart.c                  2011-06-06
00003 */
00027 /* Peripheral group ----------------------------------------------------------- */
00032 /* Includes ------------------------------------------------------------------- */
00033 #include "lpc17xx_uart.h"
00034 #include "lpc17xx_clkpwr.h"
00035
00036 /* If this source file built with example, the LPC17xx FW library configuration
00037  * file in each example directory ("lpc17xx_libcfg.h") must be included,
00038  * otherwise the default FW library configuration file must be included instead
00039  */
00040 #ifdef __BUILD_WITH_EXAMPLE__
00041 #include "lpc17xx_libcfg.h"
00042 #else
00043 #include "lpc17xx_libcfg_default.h"
00044 #endif /* __BUILD_WITH_EXAMPLE__ */
00045
00046
00047 #ifdef _UART
00048
00049 /* Private Functions ---------------------------------------------------------- */
00050
00051 static Status uart_set_divisors(LPC_UART_TypeDef *UARTx, uint32_t baudrate);
00052
00053
00054 /*********************************************************************/
00066 static Status uart_set_divisors(LPC_UART_TypeDef *UARTx, uint32_t baudrate)
00067 {
00068         Status errorStatus = ERROR;
00069
00070         uint32_t uClk;
00071         uint32_t d, m, bestd, bestm, tmp;
00072         uint64_t best_divisor, divisor;
00073         uint32_t current_error, best_error;
00074         uint32_t recalcbaud;
00075
00076         /* get UART block clock */
00077         if (UARTx == LPC_UART0)
00078         {
00079                 uClk = CLKPWR_GetPCLK (CLKPWR_PCLKSEL_UART0);
00080         }
00081         else if (UARTx == (LPC_UART_TypeDef *)LPC_UART1)
00082         {
00083                 uClk = CLKPWR_GetPCLK (CLKPWR_PCLKSEL_UART1);
00084         }
00085         else if (UARTx == LPC_UART2)
00086         {
00087                 uClk = CLKPWR_GetPCLK (CLKPWR_PCLKSEL_UART2);
00088         }
00089         else if (UARTx == LPC_UART3)
00090         {
00091                 uClk = CLKPWR_GetPCLK (CLKPWR_PCLKSEL_UART3);
00092         }
00093
00094
00095         uClk = uClk >> 4; /* div by 16 */
00096         /* In the Uart IP block, baud rate is calculated using FDR and DLL-DLM registers
00097         * The formula is :
00098         * BaudRate= uClk * (mulFracDiv/(mulFracDiv+dividerAddFracDiv) / (16 * (DLL)
00099         * It involves floating point calculations. That's the reason the formulae are adjusted with
00100         * Multiply and divide method.*/
00101         /* The value of mulFracDiv and dividerAddFracDiv should comply to the following expressions:
00102         * 0 < mulFracDiv <= 15, 0 <= dividerAddFracDiv <= 15 */
00103         best_error = 0xFFFFFFFF; /* Worst case */
00104         bestd = 0;
00105         bestm = 0;
00106         best_divisor = 0;
00107         for (m = 1 ; m <= 15 ;m++)
00108         {
00109                 for (d = 0 ; d < m ; d++)
00110                 {
00111                   divisor = ((uint64_t)uClk<<28)*m/(baudrate*(m+d));
00112                   current_error = divisor & 0xFFFFFFFF;
00113
00114                   tmp = divisor>>32;
00115
00116                   /* Adjust error */
00117                   if(current_error > ((uint32_t)1<<31)){
00118                         current_error = -current_error;
00119                         tmp++;
00120                         }
00121
00122                   if(tmp<1 || tmp>65536) /* Out of range */
00123                   continue;
00124
00125                   if( current_error < best_error){
00126                         best_error = current_error;
00127                         best_divisor = tmp;
00128                         bestd = d;
00129                         bestm = m;
00130                         if(best_error == 0) break;
00131                         }
00132                 } /* end of inner for loop */
00133
00134                 if (best_error == 0)
00135                   break;
00136         } /* end of outer for loop  */
00137
00138         if(best_divisor == 0) return ERROR; /* can not find best match */
00139
00140         recalcbaud = (uClk>>4) * bestm/(best_divisor * (bestm + bestd));
00141
00142         /* reuse best_error to evaluate baud error*/
00143         if(baudrate>recalcbaud) best_error = baudrate - recalcbaud;
00144         else best_error = recalcbaud -baudrate;
00145
00146         best_error = best_error * 100 / baudrate;
00147
00148         if (best_error < UART_ACCEPTED_BAUDRATE_ERROR)
00149                 {
00150                         if (((LPC_UART1_TypeDef *)UARTx) == LPC_UART1)
00151                         {
00152                                 ((LPC_UART1_TypeDef *)UARTx)->LCR |= UART_LCR_DLAB_EN;
00153                                 ((LPC_UART1_TypeDef *)UARTx)->/*DLIER.*/DLM = UART_LOAD_DLM(best_divisor);
00154                                 ((LPC_UART1_TypeDef *)UARTx)->/*RBTHDLR.*/DLL = UART_LOAD_DLL(best_divisor);
00155                                 /* Then reset DLAB bit */
00156                                 ((LPC_UART1_TypeDef *)UARTx)->LCR &= (~UART_LCR_DLAB_EN) & UART_LCR_BITMASK;
00157                                 ((LPC_UART1_TypeDef *)UARTx)->FDR = (UART_FDR_MULVAL(bestm) \
00158                                                 | UART_FDR_DIVADDVAL(bestd)) & UART_FDR_BITMASK;
00159                         }
00160                         else
00161                         {
00162                                 UARTx->LCR |= UART_LCR_DLAB_EN;
00163                                 UARTx->/*DLIER.*/DLM = UART_LOAD_DLM(best_divisor);
00164                                 UARTx->/*RBTHDLR.*/DLL = UART_LOAD_DLL(best_divisor);
00165                                 /* Then reset DLAB bit */
00166                                 UARTx->LCR &= (~UART_LCR_DLAB_EN) & UART_LCR_BITMASK;
00167                                 UARTx->FDR = (UART_FDR_MULVAL(bestm) \
00168                                                 | UART_FDR_DIVADDVAL(bestd)) & UART_FDR_BITMASK;
00169                         }
00170                         errorStatus = SUCCESS;
00171                 }
00172
00173                 return errorStatus;
00174 }
00175
00176 /* End of Private Functions ---------------------------------------------------- */
00177
00178
00179 /* Public Functions ----------------------------------------------------------- */
00183 /* UART Init/DeInit functions -------------------------------------------------*/
00184 /********************************************************************/
00197 void UART_Init(LPC_UART_TypeDef *UARTx, UART_CFG_Type *UART_ConfigStruct)
00198 {
00199         uint32_t tmp;
00200
00201         // For debug mode
00202         CHECK_PARAM(PARAM_UARTx(UARTx));
00203         CHECK_PARAM(PARAM_UART_DATABIT(UART_ConfigStruct->Databits));
00204         CHECK_PARAM(PARAM_UART_STOPBIT(UART_ConfigStruct->Stopbits));
00205         CHECK_PARAM(PARAM_UART_PARITY(UART_ConfigStruct->Parity));
00206
00207 #ifdef _UART0
00208         if(UARTx == LPC_UART0)
00209         {
00210                 /* Set up clock and power for UART module */
00211                 CLKPWR_ConfigPPWR (CLKPWR_PCONP_PCUART0, ENABLE);
00212         }
00213 #endif
00214
00215 #ifdef _UART1
00216         if(((LPC_UART1_TypeDef *)UARTx) == LPC_UART1)
00217         {
00218                 /* Set up clock and power for UART module */
00219                 CLKPWR_ConfigPPWR (CLKPWR_PCONP_PCUART1, ENABLE);
00220         }
00221 #endif
00222
00223 #ifdef _UART2
00224         if(UARTx == LPC_UART2)
00225         {
00226                 /* Set up clock and power for UART module */
00227                 CLKPWR_ConfigPPWR (CLKPWR_PCONP_PCUART2, ENABLE);
00228         }
00229 #endif
00230
00231 #ifdef _UART3
00232         if(UARTx == LPC_UART3)
00233         {
00234                 /* Set up clock and power for UART module */
00235                 CLKPWR_ConfigPPWR (CLKPWR_PCONP_PCUART3, ENABLE);
00236         }
00237 #endif
00238
00239         if (((LPC_UART1_TypeDef *)UARTx) == LPC_UART1)
00240         {
00241                 /* FIFOs are empty */
00242                 ((LPC_UART1_TypeDef *)UARTx)->/*IIFCR.*/FCR = ( UART_FCR_FIFO_EN \
00243                                 | UART_FCR_RX_RS | UART_FCR_TX_RS);
00244                 // Disable FIFO
00245                 ((LPC_UART1_TypeDef *)UARTx)->/*IIFCR.*/FCR = 0;
00246
00247                 // Dummy reading
00248                 while (((LPC_UART1_TypeDef *)UARTx)->LSR & UART_LSR_RDR)
00249                 {
00250                         tmp = ((LPC_UART1_TypeDef *)UARTx)->/*RBTHDLR.*/RBR;
00251                 }
00252
00253                 ((LPC_UART1_TypeDef *)UARTx)->TER = UART_TER_TXEN;
00254                 // Wait for current transmit complete
00255                 while (!(((LPC_UART1_TypeDef *)UARTx)->LSR & UART_LSR_THRE));
00256                 // Disable Tx
00257                 ((LPC_UART1_TypeDef *)UARTx)->TER = 0;
00258
00259                 // Disable interrupt
00260                 ((LPC_UART1_TypeDef *)UARTx)->/*DLIER.*/IER = 0;
00261                 // Set LCR to default state
00262                 ((LPC_UART1_TypeDef *)UARTx)->LCR = 0;
00263                 // Set ACR to default state
00264                 ((LPC_UART1_TypeDef *)UARTx)->ACR = 0;
00265                 // Set Modem Control to default state
00266                 ((LPC_UART1_TypeDef *)UARTx)->MCR = 0;
00267                 // Set RS485 control to default state
00268                 ((LPC_UART1_TypeDef *)UARTx)->RS485CTRL = 0;
00269                 // Set RS485 delay timer to default state
00270                 ((LPC_UART1_TypeDef *)UARTx)->RS485DLY = 0;
00271                 // Set RS485 addr match to default state
00272                 ((LPC_UART1_TypeDef *)UARTx)->ADRMATCH = 0;
00273                 //Dummy Reading to Clear Status
00274                 tmp = ((LPC_UART1_TypeDef *)UARTx)->MSR;
00275                 tmp = ((LPC_UART1_TypeDef *)UARTx)->LSR;
00276         }
00277         else
00278         {
00279                 /* FIFOs are empty */
00280                 UARTx->/*IIFCR.*/FCR = ( UART_FCR_FIFO_EN | UART_FCR_RX_RS | UART_FCR_TX_RS);
00281                 // Disable FIFO
00282                 UARTx->/*IIFCR.*/FCR = 0;
00283
00284                 // Dummy reading
00285                 while (UARTx->LSR & UART_LSR_RDR)
00286                 {
00287                         tmp = UARTx->/*RBTHDLR.*/RBR;
00288                 }
00289
00290                 UARTx->TER = UART_TER_TXEN;
00291                 // Wait for current transmit complete
00292                 while (!(UARTx->LSR & UART_LSR_THRE));
00293                 // Disable Tx
00294                 UARTx->TER = 0;
00295
00296                 // Disable interrupt
00297                 UARTx->/*DLIER.*/IER = 0;
00298                 // Set LCR to default state
00299                 UARTx->LCR = 0;
00300                 // Set ACR to default state
00301                 UARTx->ACR = 0;
00302                 // Dummy reading
00303                 tmp = UARTx->LSR;
00304         }
00305
00306         if (UARTx == LPC_UART3)
00307         {
00308                 // Set IrDA to default state
00309                 UARTx->ICR = 0;
00310         }
00311
00312         // Set Line Control register ----------------------------
00313
00314         uart_set_divisors(UARTx, (UART_ConfigStruct->Baud_rate));
00315
00316         if (((LPC_UART1_TypeDef *)UARTx) == LPC_UART1)
00317         {
00318                 tmp = (((LPC_UART1_TypeDef *)UARTx)->LCR & (UART_LCR_DLAB_EN | UART_LCR_BREAK_EN)) \
00319                                 & UART_LCR_BITMASK;
00320         }
00321         else
00322         {
00323                 tmp = (UARTx->LCR & (UART_LCR_DLAB_EN | UART_LCR_BREAK_EN)) & UART_LCR_BITMASK;
00324         }
00325
00326         switch (UART_ConfigStruct->Databits){
00327         case UART_DATABIT_5:
00328                 tmp |= UART_LCR_WLEN5;
00329                 break;
00330         case UART_DATABIT_6:
00331                 tmp |= UART_LCR_WLEN6;
00332                 break;
00333         case UART_DATABIT_7:
00334                 tmp |= UART_LCR_WLEN7;
00335                 break;
00336         case UART_DATABIT_8:
00337         default:
00338                 tmp |= UART_LCR_WLEN8;
00339                 break;
00340         }
00341
00342         if (UART_ConfigStruct->Parity == UART_PARITY_NONE)
00343         {
00344                 // Do nothing...
00345         }
00346         else
00347         {
00348                 tmp |= UART_LCR_PARITY_EN;
00349                 switch (UART_ConfigStruct->Parity)
00350                 {
00351                 case UART_PARITY_ODD:
00352                         tmp |= UART_LCR_PARITY_ODD;
00353                         break;
00354
00355                 case UART_PARITY_EVEN:
00356                         tmp |= UART_LCR_PARITY_EVEN;
00357                         break;
00358
00359                 case UART_PARITY_SP_1:
00360                         tmp |= UART_LCR_PARITY_F_1;
00361                         break;
00362
00363                 case UART_PARITY_SP_0:
00364                         tmp |= UART_LCR_PARITY_F_0;
00365                         break;
00366                 default:
00367                         break;
00368                 }
00369         }
00370
00371         switch (UART_ConfigStruct->Stopbits){
00372         case UART_STOPBIT_2:
00373                 tmp |= UART_LCR_STOPBIT_SEL;
00374                 break;
00375         case UART_STOPBIT_1:
00376         default:
00377                 // Do no thing
00378                 break;
00379         }
00380
00381
00382         // Write back to LCR, configure FIFO and Disable Tx
00383         if (((LPC_UART1_TypeDef *)UARTx) ==  LPC_UART1)
00384         {
00385                 ((LPC_UART1_TypeDef *)UARTx)->LCR = (uint8_t)(tmp & UART_LCR_BITMASK);
00386         }
00387         else
00388         {
00389                 UARTx->LCR = (uint8_t)(tmp & UART_LCR_BITMASK);
00390         }
00391 }
00392
00393 /*********************************************************************/
00403 void UART_DeInit(LPC_UART_TypeDef* UARTx)
00404 {
00405         // For debug mode
00406         CHECK_PARAM(PARAM_UARTx(UARTx));
00407
00408         UART_TxCmd(UARTx, DISABLE);
00409
00410 #ifdef _UART0
00411         if (UARTx == LPC_UART0)
00412         {
00413                 /* Set up clock and power for UART module */
00414                 CLKPWR_ConfigPPWR (CLKPWR_PCONP_PCUART0, DISABLE);
00415         }
00416 #endif
00417
00418 #ifdef _UART1
00419         if (((LPC_UART1_TypeDef *)UARTx) == LPC_UART1)
00420         {
00421                 /* Set up clock and power for UART module */
00422                 CLKPWR_ConfigPPWR (CLKPWR_PCONP_PCUART1, DISABLE);
00423         }
00424 #endif
00425
00426 #ifdef _UART2
00427         if (UARTx == LPC_UART2)
00428         {
00429                 /* Set up clock and power for UART module */
00430                 CLKPWR_ConfigPPWR (CLKPWR_PCONP_PCUART2, DISABLE);
00431         }
00432 #endif
00433
00434 #ifdef _UART3
00435         if (UARTx == LPC_UART3)
00436         {
00437                 /* Set up clock and power for UART module */
00438                 CLKPWR_ConfigPPWR (CLKPWR_PCONP_PCUART3, DISABLE);
00439         }
00440 #endif
00441 }
00442
00443 /*****************************************************************************/
00453 void UART_ConfigStructInit(UART_CFG_Type *UART_InitStruct)
00454 {
00455         UART_InitStruct->Baud_rate = 9600;
00456         UART_InitStruct->Databits = UART_DATABIT_8;
00457         UART_InitStruct->Parity = UART_PARITY_NONE;
00458         UART_InitStruct->Stopbits = UART_STOPBIT_1;
00459 }
00460
00461 /* UART Send/Recieve functions -------------------------------------------------*/
00462 /*********************************************************************/
00472 void UART_SendByte(LPC_UART_TypeDef* UARTx, uint8_t Data)
00473 {
00474         CHECK_PARAM(PARAM_UARTx(UARTx));
00475
00476         if (((LPC_UART1_TypeDef *)UARTx) == LPC_UART1)
00477         {
00478                 ((LPC_UART1_TypeDef *)UARTx)->/*RBTHDLR.*/THR = Data & UART_THR_MASKBIT;
00479         }
00480         else
00481         {
00482                 UARTx->/*RBTHDLR.*/THR = Data & UART_THR_MASKBIT;
00483         }
00484
00485 }
00486
00487
00488 /*********************************************************************/
00497 uint8_t UART_ReceiveByte(LPC_UART_TypeDef* UARTx)
00498 {
00499         CHECK_PARAM(PARAM_UARTx(UARTx));
00500
00501         if (((LPC_UART1_TypeDef *)UARTx) == LPC_UART1)
00502         {
00503                 return (((LPC_UART1_TypeDef *)UARTx)->/*RBTHDLR.*/RBR & UART_RBR_MASKBIT);
00504         }
00505         else
00506         {
00507                 return (UARTx->/*RBTHDLR.*/RBR & UART_RBR_MASKBIT);
00508         }
00509 }
00510
00511 /*********************************************************************/
00527 uint32_t UART_Send(LPC_UART_TypeDef *UARTx, uint8_t *txbuf,
00528                 uint32_t buflen, TRANSFER_BLOCK_Type flag)
00529 {
00530         uint32_t bToSend, bSent, timeOut, fifo_cnt;
00531         uint8_t *pChar = txbuf;
00532
00533         bToSend = buflen;
00534
00535         // blocking mode
00536         if (flag == BLOCKING) {
00537                 bSent = 0;
00538                 while (bToSend){
00539                         timeOut = UART_BLOCKING_TIMEOUT;
00540                         // Wait for THR empty with timeout
00541                         while (!(UARTx->LSR & UART_LSR_THRE)) {
00542                                 if (timeOut == 0) break;
00543                                 timeOut--;
00544                         }
00545                         // Time out!
00546                         if(timeOut == 0) break;
00547                         fifo_cnt = UART_TX_FIFO_SIZE;
00548                         while (fifo_cnt && bToSend){
00549                                 UART_SendByte(UARTx, (*pChar++));
00550                                 fifo_cnt--;
00551                                 bToSend--;
00552                                 bSent++;
00553                         }
00554                 }
00555         }
00556         // None blocking mode
00557         else {
00558                 bSent = 0;
00559                 while (bToSend) {
00560                         if (!(UARTx->LSR & UART_LSR_THRE)){
00561                                 break;
00562                         }
00563                         fifo_cnt = UART_TX_FIFO_SIZE;
00564                         while (fifo_cnt && bToSend) {
00565                                 UART_SendByte(UARTx, (*pChar++));
00566                                 bToSend--;
00567                                 fifo_cnt--;
00568                                 bSent++;
00569                         }
00570                 }
00571         }
00572         return bSent;
00573 }
00574
00575 /*********************************************************************/
00592 uint32_t UART_Receive(LPC_UART_TypeDef *UARTx, uint8_t *rxbuf, \
00593                 uint32_t buflen, TRANSFER_BLOCK_Type flag)
00594 {
00595         uint32_t bToRecv, bRecv, timeOut;
00596         uint8_t *pChar = rxbuf;
00597
00598         bToRecv = buflen;
00599
00600         // Blocking mode
00601         if (flag == BLOCKING) {
00602                 bRecv = 0;
00603                 while (bToRecv){
00604                         timeOut = UART_BLOCKING_TIMEOUT;
00605                         while (!(UARTx->LSR & UART_LSR_RDR)){
00606                                 if (timeOut == 0) break;
00607                                 timeOut--;
00608                         }
00609                         // Time out!
00610                         if(timeOut == 0) break;
00611                         // Get data from the buffer
00612                         (*pChar++) = UART_ReceiveByte(UARTx);
00613                         bToRecv--;
00614                         bRecv++;
00615                 }
00616         }
00617         // None blocking mode
00618         else {
00619                 bRecv = 0;
00620                 while (bToRecv) {
00621                         if (!(UARTx->LSR & UART_LSR_RDR)) {
00622                                 break;
00623                         } else {
00624                                 (*pChar++) = UART_ReceiveByte(UARTx);
00625                                 bRecv++;
00626                                 bToRecv--;
00627                         }
00628                 }
00629         }
00630         return bRecv;
00631 }
00632
00633 /*********************************************************************/
00643 void UART_ForceBreak(LPC_UART_TypeDef* UARTx)
00644 {
00645         CHECK_PARAM(PARAM_UARTx(UARTx));
00646
00647         if (((LPC_UART1_TypeDef *)UARTx) == LPC_UART1)
00648         {
00649                 ((LPC_UART1_TypeDef *)UARTx)->LCR |= UART_LCR_BREAK_EN;
00650         }
00651         else
00652         {
00653                 UARTx->LCR |= UART_LCR_BREAK_EN;
00654         }
00655 }
00656
00657
00658 /********************************************************************/
00680 void UART_IntConfig(LPC_UART_TypeDef *UARTx, UART_INT_Type UARTIntCfg, FunctionalState NewState)
00681 {
00682         uint32_t tmp;
00683
00684         CHECK_PARAM(PARAM_UARTx(UARTx));
00685         CHECK_PARAM(PARAM_FUNCTIONALSTATE(NewState));
00686
00687         switch(UARTIntCfg){
00688                 case UART_INTCFG_RBR:
00689                         tmp = UART_IER_RBRINT_EN;
00690                         break;
00691                 case UART_INTCFG_THRE:
00692                         tmp = UART_IER_THREINT_EN;
00693                         break;
00694                 case UART_INTCFG_RLS:
00695                         tmp = UART_IER_RLSINT_EN;
00696                         break;
00697                 case UART1_INTCFG_MS:
00698                         tmp = UART1_IER_MSINT_EN;
00699                         break;
00700                 case UART1_INTCFG_CTS:
00701                         tmp = UART1_IER_CTSINT_EN;
00702                         break;
00703                 case UART_INTCFG_ABEO:
00704                         tmp = UART_IER_ABEOINT_EN;
00705                         break;
00706                 case UART_INTCFG_ABTO:
00707                         tmp = UART_IER_ABTOINT_EN;
00708                         break;
00709         }
00710
00711         if ((LPC_UART1_TypeDef *) UARTx == LPC_UART1)
00712         {
00713                 CHECK_PARAM((PARAM_UART_INTCFG(UARTIntCfg)) || (PARAM_UART1_INTCFG(UARTIntCfg)));
00714         }
00715         else
00716         {
00717                 CHECK_PARAM(PARAM_UART_INTCFG(UARTIntCfg));
00718         }
00719
00720         if (NewState == ENABLE)
00721         {
00722                 if ((LPC_UART1_TypeDef *) UARTx == LPC_UART1)
00723                 {
00724                         ((LPC_UART1_TypeDef *)UARTx)->/*DLIER.*/IER |= tmp;
00725                 }
00726                 else
00727                 {
00728                         UARTx->/*DLIER.*/IER |= tmp;
00729                 }
00730         }
00731         else
00732         {
00733                 if ((LPC_UART1_TypeDef *) UARTx == LPC_UART1)
00734                 {
00735                         ((LPC_UART1_TypeDef *)UARTx)->/*DLIER.*/IER &= (~tmp) & UART1_IER_BITMASK;
00736                 }
00737                 else
00738                 {
00739                         UARTx->/*DLIER.*/IER &= (~tmp) & UART_IER_BITMASK;
00740                 }
00741         }
00742 }
00743
00744
00745 /********************************************************************/
00761 uint8_t UART_GetLineStatus(LPC_UART_TypeDef* UARTx)
00762 {
00763         CHECK_PARAM(PARAM_UARTx(UARTx));
00764
00765         if (((LPC_UART1_TypeDef *)UARTx) == LPC_UART1)
00766         {
00767                 return ((((LPC_UART1_TypeDef *)LPC_UART1)->LSR) & UART_LSR_BITMASK);
00768         }
00769         else
00770         {
00771                 return ((UARTx->LSR) & UART_LSR_BITMASK);
00772         }
00773 }
00774
00775 /********************************************************************/
00784 uint32_t UART_GetIntId(LPC_UART_TypeDef* UARTx)
00785 {
00786         CHECK_PARAM(PARAM_UARTx(UARTx));
00787         return (UARTx->IIR & 0x03CF);
00788 }
00789
00790 /*********************************************************************/
00799 FlagStatus UART_CheckBusy(LPC_UART_TypeDef *UARTx)
00800 {
00801         if (UARTx->LSR & UART_LSR_TEMT){
00802                 return RESET;
00803         } else {
00804                 return SET;
00805         }
00806 }
00807
00808
00809 /*********************************************************************/
00820 void UART_FIFOConfig(LPC_UART_TypeDef *UARTx, UART_FIFO_CFG_Type *FIFOCfg)
00821 {
00822         uint8_t tmp = 0;
00823
00824         CHECK_PARAM(PARAM_UARTx(UARTx));
00825         CHECK_PARAM(PARAM_UART_FIFO_LEVEL(FIFOCfg->FIFO_Level));
00826         CHECK_PARAM(PARAM_FUNCTIONALSTATE(FIFOCfg->FIFO_DMAMode));
00827         CHECK_PARAM(PARAM_FUNCTIONALSTATE(FIFOCfg->FIFO_ResetRxBuf));
00828         CHECK_PARAM(PARAM_FUNCTIONALSTATE(FIFOCfg->FIFO_ResetTxBuf));
00829
00830         tmp |= UART_FCR_FIFO_EN;
00831         switch (FIFOCfg->FIFO_Level){
00832         case UART_FIFO_TRGLEV0:
00833                 tmp |= UART_FCR_TRG_LEV0;
00834                 break;
00835         case UART_FIFO_TRGLEV1:
00836                 tmp |= UART_FCR_TRG_LEV1;
00837                 break;
00838         case UART_FIFO_TRGLEV2:
00839                 tmp |= UART_FCR_TRG_LEV2;
00840                 break;
00841         case UART_FIFO_TRGLEV3:
00842         default:
00843                 tmp |= UART_FCR_TRG_LEV3;
00844                 break;
00845         }
00846
00847         if (FIFOCfg->FIFO_ResetTxBuf == ENABLE)
00848         {
00849                 tmp |= UART_FCR_TX_RS;
00850         }
00851         if (FIFOCfg->FIFO_ResetRxBuf == ENABLE)
00852         {
00853                 tmp |= UART_FCR_RX_RS;
00854         }
00855         if (FIFOCfg->FIFO_DMAMode == ENABLE)
00856         {
00857                 tmp |= UART_FCR_DMAMODE_SEL;
00858         }
00859
00860
00861         //write to FIFO control register
00862         if (((LPC_UART1_TypeDef *)UARTx) == LPC_UART1)
00863         {
00864                 ((LPC_UART1_TypeDef *)UARTx)->/*IIFCR.*/FCR = tmp & UART_FCR_BITMASK;
00865         }
00866         else
00867         {
00868                 UARTx->/*IIFCR.*/FCR = tmp & UART_FCR_BITMASK;
00869         }
00870 }
00871
00872 /*****************************************************************************/
00884 void UART_FIFOConfigStructInit(UART_FIFO_CFG_Type *UART_FIFOInitStruct)
00885 {
00886         UART_FIFOInitStruct->FIFO_DMAMode = DISABLE;
00887         UART_FIFOInitStruct->FIFO_Level = UART_FIFO_TRGLEV0;
00888         UART_FIFOInitStruct->FIFO_ResetRxBuf = ENABLE;
00889         UART_FIFOInitStruct->FIFO_ResetTxBuf = ENABLE;
00890 }
00891
00892
00893 /*********************************************************************/
00910 void UART_ABCmd(LPC_UART_TypeDef *UARTx, UART_AB_CFG_Type *ABConfigStruct, \
00911                                 FunctionalState NewState)
00912 {
00913         uint32_t tmp;
00914
00915         CHECK_PARAM(PARAM_UARTx(UARTx));
00916         CHECK_PARAM(PARAM_FUNCTIONALSTATE(NewState));
00917
00918         tmp = 0;
00919         if (NewState == ENABLE) {
00920                 if (ABConfigStruct->ABMode == UART_AUTOBAUD_MODE1){
00921                         tmp |= UART_ACR_MODE;
00922                 }
00923                 if (ABConfigStruct->AutoRestart == ENABLE){
00924                         tmp |= UART_ACR_AUTO_RESTART;
00925                 }
00926         }
00927
00928         if (((LPC_UART1_TypeDef *)UARTx) == LPC_UART1)
00929         {
00930                 if (NewState == ENABLE)
00931                 {
00932                         // Clear DLL and DLM value
00933                         ((LPC_UART1_TypeDef *)UARTx)->LCR |= UART_LCR_DLAB_EN;
00934                         ((LPC_UART1_TypeDef *)UARTx)->DLL = 0;
00935                         ((LPC_UART1_TypeDef *)UARTx)->DLM = 0;
00936                         ((LPC_UART1_TypeDef *)UARTx)->LCR &= ~UART_LCR_DLAB_EN;
00937                         // FDR value must be reset to default value
00938                         ((LPC_UART1_TypeDef *)UARTx)->FDR = 0x10;
00939                         ((LPC_UART1_TypeDef *)UARTx)->ACR = UART_ACR_START | tmp;
00940                 }
00941                 else
00942                 {
00943                         ((LPC_UART1_TypeDef *)UARTx)->ACR = 0;
00944                 }
00945         }
00946         else
00947         {
00948                 if (NewState == ENABLE)
00949                 {
00950                         // Clear DLL and DLM value
00951                         UARTx->LCR |= UART_LCR_DLAB_EN;
00952                         UARTx->DLL = 0;
00953                         UARTx->DLM = 0;
00954                         UARTx->LCR &= ~UART_LCR_DLAB_EN;
00955                         // FDR value must be reset to default value
00956                         UARTx->FDR = 0x10;
00957                         UARTx->ACR = UART_ACR_START | tmp;
00958                 }
00959                 else
00960                 {
00961                         UARTx->ACR = 0;
00962                 }
00963         }
00964 }
00965
00966 /*********************************************************************/
00978 void UART_ABClearIntPending(LPC_UART_TypeDef *UARTx, UART_ABEO_Type ABIntType)
00979 {
00980         CHECK_PARAM(PARAM_UARTx(UARTx));
00981         if (((LPC_UART1_TypeDef *)UARTx) == LPC_UART1)
00982         {
00983                 UARTx->ACR |= ABIntType;
00984         }
00985         else
00986                 UARTx->ACR |= ABIntType;
00987 }
00988
00989 /*********************************************************************/
01001 void UART_TxCmd(LPC_UART_TypeDef *UARTx, FunctionalState NewState)
01002 {
01003         CHECK_PARAM(PARAM_UARTx(UARTx));
01004         CHECK_PARAM(PARAM_FUNCTIONALSTATE(NewState));
01005
01006         if (NewState == ENABLE)
01007         {
01008                 if (((LPC_UART1_TypeDef *)UARTx) == LPC_UART1)
01009                 {
01010                         ((LPC_UART1_TypeDef *)UARTx)->TER |= UART_TER_TXEN;
01011                 }
01012                 else
01013                 {
01014                         UARTx->TER |= UART_TER_TXEN;
01015                 }
01016         }
01017         else
01018         {
01019                 if (((LPC_UART1_TypeDef *)UARTx) == LPC_UART1)
01020                 {
01021                         ((LPC_UART1_TypeDef *)UARTx)->TER &= (~UART_TER_TXEN) & UART_TER_BITMASK;
01022                 }
01023                 else
01024                 {
01025                         UARTx->TER &= (~UART_TER_TXEN) & UART_TER_BITMASK;
01026                 }
01027         }
01028 }
01029
01030 /* UART IrDA functions ---------------------------------------------------*/
01031
01032 #ifdef _UART3
01033
01034 /*********************************************************************/
01043 void UART_IrDAInvtInputCmd(LPC_UART_TypeDef* UARTx, FunctionalState NewState)
01044 {
01045         CHECK_PARAM(PARAM_UART_IrDA(UARTx));
01046         CHECK_PARAM(PARAM_FUNCTIONALSTATE(NewState));
01047
01048         if (NewState == ENABLE)
01049         {
01050                 UARTx->ICR |= UART_ICR_IRDAINV;
01051         }
01052         else if (NewState == DISABLE)
01053         {
01054                 UARTx->ICR &= (~UART_ICR_IRDAINV) & UART_ICR_BITMASK;
01055         }
01056 }
01057
01058
01059 /*********************************************************************/
01067 void UART_IrDACmd(LPC_UART_TypeDef* UARTx, FunctionalState NewState)
01068 {
01069         CHECK_PARAM(PARAM_UART_IrDA(UARTx));
01070         CHECK_PARAM(PARAM_FUNCTIONALSTATE(NewState));
01071
01072         if (NewState == ENABLE)
01073         {
01074                 UARTx->ICR |= UART_ICR_IRDAEN;
01075         }
01076         else
01077         {
01078                 UARTx->ICR &= (~UART_ICR_IRDAEN) & UART_ICR_BITMASK;
01079         }
01080 }
01081
01082
01083 /*********************************************************************/
01099 void UART_IrDAPulseDivConfig(LPC_UART_TypeDef *UARTx, UART_IrDA_PULSE_Type PulseDiv)
01100 {
01101         uint32_t tmp, tmp1;
01102         CHECK_PARAM(PARAM_UART_IrDA(UARTx));
01103         CHECK_PARAM(PARAM_UART_IrDA_PULSEDIV(PulseDiv));
01104
01105         tmp1 = UART_ICR_PULSEDIV(PulseDiv);
01106         tmp = UARTx->ICR & (~UART_ICR_PULSEDIV(7));
01107         tmp |= tmp1 | UART_ICR_FIXPULSE_EN;
01108         UARTx->ICR = tmp & UART_ICR_BITMASK;
01109 }
01110
01111 #endif
01112
01113
01114 /* UART1 FullModem function ---------------------------------------------*/
01115
01116 #ifdef _UART1
01117
01118 /*********************************************************************/
01129 void UART_FullModemForcePinState(LPC_UART1_TypeDef *UARTx, UART_MODEM_PIN_Type Pin, \
01130                                                         UART1_SignalState NewState)
01131 {
01132         uint8_t tmp = 0;
01133
01134         CHECK_PARAM(PARAM_UART1_MODEM(UARTx));
01135         CHECK_PARAM(PARAM_UART1_MODEM_PIN(Pin));
01136         CHECK_PARAM(PARAM_UART1_SIGNALSTATE(NewState));
01137
01138         switch (Pin){
01139         case UART1_MODEM_PIN_DTR:
01140                 tmp = UART1_MCR_DTR_CTRL;
01141                 break;
01142         case UART1_MODEM_PIN_RTS:
01143                 tmp = UART1_MCR_RTS_CTRL;
01144                 break;
01145         default:
01146                 break;
01147         }
01148
01149         if (NewState == ACTIVE){
01150                 UARTx->MCR |= tmp;
01151         } else {
01152                 UARTx->MCR &= (~tmp) & UART1_MCR_BITMASK;
01153         }
01154 }
01155
01156
01157 /*********************************************************************/
01169 void UART_FullModemConfigMode(LPC_UART1_TypeDef *UARTx, UART_MODEM_MODE_Type Mode, \
01170                                                         FunctionalState NewState)
01171 {
01172         uint8_t tmp;
01173
01174         CHECK_PARAM(PARAM_UART1_MODEM(UARTx));
01175         CHECK_PARAM(PARAM_UART1_MODEM_MODE(Mode));
01176         CHECK_PARAM(PARAM_FUNCTIONALSTATE(NewState));
01177
01178         switch(Mode){
01179         case UART1_MODEM_MODE_LOOPBACK:
01180                 tmp = UART1_MCR_LOOPB_EN;
01181                 break;
01182         case UART1_MODEM_MODE_AUTO_RTS:
01183                 tmp = UART1_MCR_AUTO_RTS_EN;
01184                 break;
01185         case UART1_MODEM_MODE_AUTO_CTS:
01186                 tmp = UART1_MCR_AUTO_CTS_EN;
01187                 break;
01188         default:
01189                 break;
01190         }
01191
01192         if (NewState == ENABLE)
01193         {
01194                 UARTx->MCR |= tmp;
01195         }
01196         else
01197         {
01198                 UARTx->MCR &= (~tmp) & UART1_MCR_BITMASK;
01199         }
01200 }
01201
01202
01203 /*********************************************************************/
01215 uint8_t UART_FullModemGetStatus(LPC_UART1_TypeDef *UARTx)
01216 {
01217         CHECK_PARAM(PARAM_UART1_MODEM(UARTx));
01218         return ((UARTx->MSR) & UART1_MSR_BITMASK);
01219 }
01220
01221
01222 /* UART RS485 functions --------------------------------------------------------------*/
01223
01224 /*********************************************************************/
01233 void UART_RS485Config(LPC_UART1_TypeDef *UARTx, UART1_RS485_CTRLCFG_Type *RS485ConfigStruct)
01234 {
01235         uint32_t tmp;
01236
01237         CHECK_PARAM(PARAM_UART1_MODEM(UARTx));
01238         CHECK_PARAM(PARAM_FUNCTIONALSTATE(RS485ConfigStruct->AutoAddrDetect_State));
01239         CHECK_PARAM(PARAM_FUNCTIONALSTATE(RS485ConfigStruct->AutoDirCtrl_State));
01240         CHECK_PARAM(PARAM_UART1_RS485_CFG_DELAYVALUE(RS485ConfigStruct->DelayValue));
01241         CHECK_PARAM(PARAM_SETSTATE(RS485ConfigStruct->DirCtrlPol_Level));
01242         CHECK_PARAM(PARAM_UART_RS485_DIRCTRL_PIN(RS485ConfigStruct->DirCtrlPin));
01243         CHECK_PARAM(PARAM_UART1_RS485_CFG_MATCHADDRVALUE(RS485ConfigStruct->MatchAddrValue));
01244         CHECK_PARAM(PARAM_FUNCTIONALSTATE(RS485ConfigStruct->NormalMultiDropMode_State));
01245         CHECK_PARAM(PARAM_FUNCTIONALSTATE(RS485ConfigStruct->Rx_State));
01246
01247         tmp = 0;
01248         // If Auto Direction Control is enabled -  This function is used in Master mode
01249         if (RS485ConfigStruct->AutoDirCtrl_State == ENABLE)
01250         {
01251                 tmp |= UART1_RS485CTRL_DCTRL_EN;
01252
01253                 // Set polar
01254                 if (RS485ConfigStruct->DirCtrlPol_Level == SET)
01255                 {
01256                         tmp |= UART1_RS485CTRL_OINV_1;
01257                 }
01258
01259                 // Set pin according to
01260                 if (RS485ConfigStruct->DirCtrlPin == UART1_RS485_DIRCTRL_DTR)
01261                 {
01262                         tmp |= UART1_RS485CTRL_SEL_DTR;
01263                 }
01264
01265                 // Fill delay time
01266                 UARTx->RS485DLY = RS485ConfigStruct->DelayValue & UART1_RS485DLY_BITMASK;
01267         }
01268
01269         // MultiDrop mode is enable
01270         if (RS485ConfigStruct->NormalMultiDropMode_State == ENABLE)
01271         {
01272                 tmp |= UART1_RS485CTRL_NMM_EN;
01273         }
01274
01275         // Auto Address Detect function
01276         if (RS485ConfigStruct->AutoAddrDetect_State == ENABLE)
01277         {
01278                 tmp |= UART1_RS485CTRL_AADEN;
01279                 // Fill Match Address
01280                 UARTx->ADRMATCH = RS485ConfigStruct->MatchAddrValue & UART1_RS485ADRMATCH_BITMASK;
01281         }
01282
01283
01284         // Receiver is disable
01285         if (RS485ConfigStruct->Rx_State == DISABLE)
01286         {
01287                 tmp |= UART1_RS485CTRL_RX_DIS;
01288         }
01289
01290         // write back to RS485 control register
01291         UARTx->RS485CTRL = tmp & UART1_RS485CTRL_BITMASK;
01292
01293         // Enable Parity function and leave parity in stick '0' parity as default
01294         UARTx->LCR |= (UART_LCR_PARITY_F_0 | UART_LCR_PARITY_EN);
01295 }
01296
01297 /*********************************************************************/
01305 void UART_RS485ReceiverCmd(LPC_UART1_TypeDef *UARTx, FunctionalState NewState)
01306 {
01307         if (NewState == ENABLE){
01308                 UARTx->RS485CTRL &= ~UART1_RS485CTRL_RX_DIS;
01309         } else {
01310                 UARTx->RS485CTRL |= UART1_RS485CTRL_RX_DIS;
01311         }
01312 }
01313
01314 /*********************************************************************/
01322 uint32_t UART_RS485Send(LPC_UART1_TypeDef *UARTx, uint8_t *pDatFrm, \
01323                                         uint32_t size, uint8_t ParityStick)
01324 {
01325         uint8_t tmp, save;
01326         uint32_t cnt;
01327
01328         if (ParityStick){
01329                 save = tmp = UARTx->LCR & UART_LCR_BITMASK;
01330                 tmp &= ~(UART_LCR_PARITY_EVEN);
01331                 UARTx->LCR = tmp;
01332                 cnt = UART_Send((LPC_UART_TypeDef *)UARTx, pDatFrm, size, BLOCKING);
01333                 while (!(UARTx->LSR & UART_LSR_TEMT));
01334                 UARTx->LCR = save;
01335         } else {
01336                 cnt = UART_Send((LPC_UART_TypeDef *)UARTx, pDatFrm, size, BLOCKING);
01337                 while (!(UARTx->LSR & UART_LSR_TEMT));
01338         }
01339         return cnt;
01340 }
01341
01342 /*********************************************************************/
01348 void UART_RS485SendSlvAddr(LPC_UART1_TypeDef *UARTx, uint8_t SlvAddr)
01349 {
01350         UART_RS485Send(UARTx, &SlvAddr, 1, 1);
01351 }
01352
01353 /*********************************************************************/
01360 uint32_t UART_RS485SendData(LPC_UART1_TypeDef *UARTx, uint8_t *pData, uint32_t size)
01361 {
01362         return (UART_RS485Send(UARTx, pData, size, 0));
01363 }
01364
01365 #endif /* _UART1 */
01366
01367 #endif /* _UART */
01368
01376 /* --------------------------------- End Of File ------------------------------ */
01377
Generated on Tue Jun 7 14:58:56 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_uart.h Source File

C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_uart.h

Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          lpc17xx_uart.h                          2010-06-18
00003 */
00027 /* Peripheral group ----------------------------------------------------------- */
00033 #ifndef __LPC17XX_UART_H
00034 #define __LPC17XX_UART_H
00035
00036 /* Includes ------------------------------------------------------------------- */
00037 #include "LPC17xx.h"
00038 #include "lpc_types.h"
00039
00040
00041 #ifdef __cplusplus
00042 extern "C"
00043 {
00044 #endif
00045
00046 /* Public Macros -------------------------------------------------------------- */
00054 #define UART_BLOCKING_TIMEOUT                   (0xFFFFFFFFUL)
00055
00060 /* Private Macros ------------------------------------------------------------- */
00065 /* Accepted Error baud rate value (in percent unit) */
00066 #define UART_ACCEPTED_BAUDRATE_ERROR    (3)
00069 /* --------------------- BIT DEFINITIONS -------------------------------------- */
00070 /*********************************************************************/
00073 #define UART_RBR_MASKBIT        ((uint8_t)0xFF)
00075 /*********************************************************************/
00078 #define UART_THR_MASKBIT        ((uint8_t)0xFF)
00080 /*********************************************************************/
00083 #define UART_LOAD_DLL(div)      ((div) & 0xFF)
00084 #define UART_DLL_MASKBIT        ((uint8_t)0xFF)
00086 /*********************************************************************/
00089 #define UART_DLM_MASKBIT        ((uint8_t)0xFF)
00090 #define UART_LOAD_DLM(div)  (((div) >> 8) & 0xFF)
00092 /*********************************************************************/
00095 #define UART_IER_RBRINT_EN              ((uint32_t)(1<<0))
00096 #define UART_IER_THREINT_EN             ((uint32_t)(1<<1))
00097 #define UART_IER_RLSINT_EN              ((uint32_t)(1<<2))
00098 #define UART1_IER_MSINT_EN              ((uint32_t)(1<<3))
00099 #define UART1_IER_CTSINT_EN             ((uint32_t)(1<<7))
00100 #define UART_IER_ABEOINT_EN             ((uint32_t)(1<<8))
00101 #define UART_IER_ABTOINT_EN             ((uint32_t)(1<<9))
00102 #define UART_IER_BITMASK                ((uint32_t)(0x307))
00103 #define UART1_IER_BITMASK               ((uint32_t)(0x38F))
00105 /*********************************************************************/
00108 #define UART_IIR_INTSTAT_PEND   ((uint32_t)(1<<0))
00109 #define UART_IIR_INTID_RLS              ((uint32_t)(3<<1))
00110 #define UART_IIR_INTID_RDA              ((uint32_t)(2<<1))
00111 #define UART_IIR_INTID_CTI              ((uint32_t)(6<<1))
00112 #define UART_IIR_INTID_THRE             ((uint32_t)(1<<1))
00113 #define UART1_IIR_INTID_MODEM   ((uint32_t)(0<<1))
00114 #define UART_IIR_INTID_MASK             ((uint32_t)(7<<1))
00115 #define UART_IIR_FIFO_EN                ((uint32_t)(3<<6))
00116 #define UART_IIR_ABEO_INT               ((uint32_t)(1<<8))
00117 #define UART_IIR_ABTO_INT               ((uint32_t)(1<<9))
00118 #define UART_IIR_BITMASK                ((uint32_t)(0x3CF))
00120 /*********************************************************************/
00123 #define UART_FCR_FIFO_EN                ((uint8_t)(1<<0))
00124 #define UART_FCR_RX_RS                  ((uint8_t)(1<<1))
00125 #define UART_FCR_TX_RS                  ((uint8_t)(1<<2))
00126 #define UART_FCR_DMAMODE_SEL    ((uint8_t)(1<<3))
00127 #define UART_FCR_TRG_LEV0               ((uint8_t)(0))
00128 #define UART_FCR_TRG_LEV1               ((uint8_t)(1<<6))
00129 #define UART_FCR_TRG_LEV2               ((uint8_t)(2<<6))
00130 #define UART_FCR_TRG_LEV3               ((uint8_t)(3<<6))
00131 #define UART_FCR_BITMASK                ((uint8_t)(0xCF))
00132 #define UART_TX_FIFO_SIZE               (16)
00133
00134 /*********************************************************************/
00137 #define UART_LCR_WLEN5                  ((uint8_t)(0))
00138 #define UART_LCR_WLEN6                  ((uint8_t)(1<<0))
00139 #define UART_LCR_WLEN7                  ((uint8_t)(2<<0))
00140 #define UART_LCR_WLEN8                  ((uint8_t)(3<<0))
00141 #define UART_LCR_STOPBIT_SEL    ((uint8_t)(1<<2))
00142 #define UART_LCR_PARITY_EN              ((uint8_t)(1<<3))
00143 #define UART_LCR_PARITY_ODD             ((uint8_t)(0))
00144 #define UART_LCR_PARITY_EVEN    ((uint8_t)(1<<4))
00145 #define UART_LCR_PARITY_F_1             ((uint8_t)(2<<4))
00146 #define UART_LCR_PARITY_F_0             ((uint8_t)(3<<4))
00147 #define UART_LCR_BREAK_EN               ((uint8_t)(1<<6))
00148 #define UART_LCR_DLAB_EN                ((uint8_t)(1<<7))
00149 #define UART_LCR_BITMASK                ((uint8_t)(0xFF))
00151 /*********************************************************************/
00154 #define UART1_MCR_DTR_CTRL              ((uint8_t)(1<<0))
00155 #define UART1_MCR_RTS_CTRL              ((uint8_t)(1<<1))
00156 #define UART1_MCR_LOOPB_EN              ((uint8_t)(1<<4))
00157 #define UART1_MCR_AUTO_RTS_EN   ((uint8_t)(1<<6))
00158 #define UART1_MCR_AUTO_CTS_EN   ((uint8_t)(1<<7))
00159 #define UART1_MCR_BITMASK               ((uint8_t)(0x0F3))
00161 /*********************************************************************/
00164 #define UART_LSR_RDR            ((uint8_t)(1<<0))
00165 #define UART_LSR_OE                     ((uint8_t)(1<<1))
00166 #define UART_LSR_PE                     ((uint8_t)(1<<2))
00167 #define UART_LSR_FE                     ((uint8_t)(1<<3))
00168 #define UART_LSR_BI                     ((uint8_t)(1<<4))
00169 #define UART_LSR_THRE           ((uint8_t)(1<<5))
00170 #define UART_LSR_TEMT           ((uint8_t)(1<<6))
00171 #define UART_LSR_RXFE           ((uint8_t)(1<<7))
00172 #define UART_LSR_BITMASK        ((uint8_t)(0xFF))
00174 /*********************************************************************/
00177 #define UART1_MSR_DELTA_CTS             ((uint8_t)(1<<0))
00178 #define UART1_MSR_DELTA_DSR             ((uint8_t)(1<<1))
00179 #define UART1_MSR_LO2HI_RI              ((uint8_t)(1<<2))
00180 #define UART1_MSR_DELTA_DCD             ((uint8_t)(1<<3))
00181 #define UART1_MSR_CTS                   ((uint8_t)(1<<4))
00182 #define UART1_MSR_DSR                   ((uint8_t)(1<<5))
00183 #define UART1_MSR_RI                    ((uint8_t)(1<<6))
00184 #define UART1_MSR_DCD                   ((uint8_t)(1<<7))
00185 #define UART1_MSR_BITMASK               ((uint8_t)(0xFF))
00187 /*********************************************************************/
00190 #define UART_SCR_BIMASK         ((uint8_t)(0xFF))
00192 /*********************************************************************/
00195 #define UART_ACR_START                          ((uint32_t)(1<<0))
00196 #define UART_ACR_MODE                           ((uint32_t)(1<<1))
00197 #define UART_ACR_AUTO_RESTART           ((uint32_t)(1<<2))
00198 #define UART_ACR_ABEOINT_CLR            ((uint32_t)(1<<8))
00199 #define UART_ACR_ABTOINT_CLR            ((uint32_t)(1<<9))
00200 #define UART_ACR_BITMASK                        ((uint32_t)(0x307))
00202 /*********************************************************************/
00205 #define UART_ICR_IRDAEN                 ((uint32_t)(1<<0))
00206 #define UART_ICR_IRDAINV                ((uint32_t)(1<<1))
00207 #define UART_ICR_FIXPULSE_EN    ((uint32_t)(1<<2))
00208 #define UART_ICR_PULSEDIV(n)    ((uint32_t)((n&0x07)<<3))
00209 #define UART_ICR_BITMASK                ((uint32_t)(0x3F))
00211 /*********************************************************************/
00214 #define UART_FDR_DIVADDVAL(n)   ((uint32_t)(n&0x0F))
00215 #define UART_FDR_MULVAL(n)              ((uint32_t)((n<<4)&0xF0))
00216 #define UART_FDR_BITMASK                ((uint32_t)(0xFF))
00218 /*********************************************************************/
00221 #define UART_TER_TXEN                   ((uint8_t)(1<<7))
00222 #define UART_TER_BITMASK                ((uint8_t)(0x80))
00224 /*********************************************************************/
00227 #define UART1_RS485CTRL_NMM_EN          ((uint32_t)(1<<0))
00229 #define UART1_RS485CTRL_RX_DIS          ((uint32_t)(1<<1))
00230 #define UART1_RS485CTRL_AADEN           ((uint32_t)(1<<2))
00231 #define UART1_RS485CTRL_SEL_DTR         ((uint32_t)(1<<3))
00233 #define UART1_RS485CTRL_DCTRL_EN        ((uint32_t)(1<<4))
00234 #define UART1_RS485CTRL_OINV_1          ((uint32_t)(1<<5))
00237 #define UART1_RS485CTRL_BITMASK         ((uint32_t)(0x3F))
00239 /*********************************************************************/
00242 #define UART1_RS485ADRMATCH_BITMASK ((uint8_t)(0xFF))
00244 /*********************************************************************/
00247 /* Macro defines for UART1 RS-485 Delay value register */
00248 #define UART1_RS485DLY_BITMASK          ((uint8_t)(0xFF))
00250 /*********************************************************************/
00253 #define UART_FIFOLVL_RXFIFOLVL(n)       ((uint32_t)(n&0x0F))
00254 #define UART_FIFOLVL_TXFIFOLVL(n)       ((uint32_t)((n>>8)&0x0F))
00255 #define UART_FIFOLVL_BITMASK            ((uint32_t)(0x0F0F))
00258 /* ---------------- CHECK PARAMETER DEFINITIONS ---------------------------- */
00259
00261 #define PARAM_UART_DATABIT(databit)     ((databit==UART_DATABIT_5) || (databit==UART_DATABIT_6)\
00262 || (databit==UART_DATABIT_7) || (databit==UART_DATABIT_8))
00263
00265 #define PARAM_UART_STOPBIT(stopbit)     ((stopbit==UART_STOPBIT_1) || (stopbit==UART_STOPBIT_2))
00266
00268 #define PARAM_UART_PARITY(parity)       ((parity==UART_PARITY_NONE) || (parity==UART_PARITY_ODD) \
00269 || (parity==UART_PARITY_EVEN) || (parity==UART_PARITY_SP_1) \
00270 || (parity==UART_PARITY_SP_0))
00271
00273 #define PARAM_UART_FIFO_LEVEL(fifo)     ((fifo==UART_FIFO_TRGLEV0) \
00274 || (fifo==UART_FIFO_TRGLEV1) || (fifo==UART_FIFO_TRGLEV2) \
00275 || (fifo==UART_FIFO_TRGLEV3))
00276
00278 #define PARAM_UART_INTCFG(IntCfg)       ((IntCfg==UART_INTCFG_RBR) || (IntCfg==UART_INTCFG_THRE) \
00279 || (IntCfg==UART_INTCFG_RLS) || (IntCfg==UART_INTCFG_ABEO) \
00280 || (IntCfg==UART_INTCFG_ABTO))
00281
00283 #define PARAM_UART1_INTCFG(IntCfg)      ((IntCfg==UART1_INTCFG_MS) || (IntCfg==UART1_INTCFG_CTS))
00284
00286 #define PARAM_UART_AUTOBAUD_MODE(ABmode)        ((ABmode==UART_AUTOBAUD_MODE0) || (ABmode==UART_AUTOBAUD_MODE1))
00287
00289 #define PARAM_UART_AUTOBAUD_INTSTAT(ABIntStat)  ((ABIntStat==UART_AUTOBAUD_INTSTAT_ABEO) || \
00290                 (ABIntStat==UART_AUTOBAUD_INTSTAT_ABTO))
00291
00293 #define PARAM_UART_IrDA_PULSEDIV(PulseDiv)      ((PulseDiv==UART_IrDA_PULSEDIV2) || (PulseDiv==UART_IrDA_PULSEDIV4) \
00294 || (PulseDiv==UART_IrDA_PULSEDIV8) || (PulseDiv==UART_IrDA_PULSEDIV16) \
00295 || (PulseDiv==UART_IrDA_PULSEDIV32) || (PulseDiv==UART_IrDA_PULSEDIV64) \
00296 || (PulseDiv==UART_IrDA_PULSEDIV128) || (PulseDiv==UART_IrDA_PULSEDIV256))
00297
00298 /* Macro to check the input UART1_SignalState parameters */
00299 #define PARAM_UART1_SIGNALSTATE(x) ((x==INACTIVE) || (x==ACTIVE))
00300
00302 #define PARAM_UART1_MODEM_PIN(x) ((x==UART1_MODEM_PIN_DTR) || (x==UART1_MODEM_PIN_RTS))
00303
00305 #define PARAM_UART1_MODEM_MODE(x) ((x==UART1_MODEM_MODE_LOOPBACK) || (x==UART1_MODEM_MODE_AUTO_RTS) \
00306 || (x==UART1_MODEM_MODE_AUTO_CTS))
00307
00309 #define PARAM_UART_RS485_DIRCTRL_PIN(x) ((x==UART1_RS485_DIRCTRL_RTS) || (x==UART1_RS485_DIRCTRL_DTR))
00310
00311 /* Macro to determine if it is valid UART port number */
00312 #define PARAM_UARTx(x)  ((((uint32_t *)x)==((uint32_t *)LPC_UART0)) \
00313 || (((uint32_t *)x)==((uint32_t *)LPC_UART1)) \
00314 || (((uint32_t *)x)==((uint32_t *)LPC_UART2)) \
00315 || (((uint32_t *)x)==((uint32_t *)LPC_UART3)))
00316 #define PARAM_UART_IrDA(x) (((uint32_t *)x)==((uint32_t *)LPC_UART3))
00317 #define PARAM_UART1_MODEM(x) (((uint32_t *)x)==((uint32_t *)LPC_UART1))
00318
00320 #define PARAM_UART1_RS485_CFG_MATCHADDRVALUE(x) ((x<0xFF))
00321
00323 #define PARAM_UART1_RS485_CFG_DELAYVALUE(x) ((x<0xFF))
00324
00330 /* Public Types --------------------------------------------------------------- */
00338 typedef enum {
00339         UART_DATABIT_5          = 0,
00340         UART_DATABIT_6,
00341         UART_DATABIT_7,
00342         UART_DATABIT_8
00343 } UART_DATABIT_Type;
00344
00348 typedef enum {
00349         UART_STOPBIT_1          = (0),
00350         UART_STOPBIT_2
00351 } UART_STOPBIT_Type;
00352
00356 typedef enum {
00357         UART_PARITY_NONE        = 0,
00358         UART_PARITY_ODD,
00359         UART_PARITY_EVEN,
00360         UART_PARITY_SP_1,
00361         UART_PARITY_SP_0
00362 } UART_PARITY_Type;
00363
00367 typedef enum {
00368         UART_FIFO_TRGLEV0 = 0,
00369         UART_FIFO_TRGLEV1,
00370         UART_FIFO_TRGLEV2,
00371         UART_FIFO_TRGLEV3
00372 } UART_FITO_LEVEL_Type;
00373
00374 /********************************************************************/
00377 typedef enum {
00378         UART_INTCFG_RBR = 0,
00379         UART_INTCFG_THRE,
00380         UART_INTCFG_RLS,
00381         UART1_INTCFG_MS,
00382         UART1_INTCFG_CTS,
00383         UART_INTCFG_ABEO,
00384         UART_INTCFG_ABTO
00385 } UART_INT_Type;
00386
00390 typedef enum {
00391         UART_LINESTAT_RDR       = UART_LSR_RDR,
00392         UART_LINESTAT_OE        = UART_LSR_OE,
00393         UART_LINESTAT_PE        = UART_LSR_PE,
00394         UART_LINESTAT_FE        = UART_LSR_FE,
00395         UART_LINESTAT_BI        = UART_LSR_BI,
00396         UART_LINESTAT_THRE      = UART_LSR_THRE,
00397         UART_LINESTAT_TEMT      = UART_LSR_TEMT,
00398         UART_LINESTAT_RXFE      = UART_LSR_RXFE
00399 } UART_LS_Type;
00400
00404 typedef enum {
00405         UART_AUTOBAUD_MODE0                             = 0,
00406         UART_AUTOBAUD_MODE1
00407 } UART_AB_MODE_Type;
00408
00412 typedef struct {
00413         UART_AB_MODE_Type       ABMode;
00414         FunctionalState         AutoRestart;
00415 } UART_AB_CFG_Type;
00416
00420 typedef enum {
00421         UART_AUTOBAUD_INTSTAT_ABEO              = UART_IIR_ABEO_INT,
00422         UART_AUTOBAUD_INTSTAT_ABTO              = UART_IIR_ABTO_INT
00423 }UART_ABEO_Type;
00424
00428 typedef enum {
00429         UART_IrDA_PULSEDIV2             = 0,
00431         UART_IrDA_PULSEDIV4,
00433         UART_IrDA_PULSEDIV8,
00435         UART_IrDA_PULSEDIV16,
00437         UART_IrDA_PULSEDIV32,
00439         UART_IrDA_PULSEDIV64,
00441         UART_IrDA_PULSEDIV128,
00443         UART_IrDA_PULSEDIV256
00445 } UART_IrDA_PULSE_Type;
00446
00447 /********************************************************************/
00450 typedef enum {
00451         INACTIVE = 0,                   /* In-active state */
00452         ACTIVE = !INACTIVE              /* Active state */
00453 }UART1_SignalState;
00454
00458 typedef enum {
00459         UART1_MODEM_STAT_DELTA_CTS      = UART1_MSR_DELTA_CTS,
00460         UART1_MODEM_STAT_DELTA_DSR      = UART1_MSR_DELTA_DSR,
00461         UART1_MODEM_STAT_LO2HI_RI       = UART1_MSR_LO2HI_RI,
00462         UART1_MODEM_STAT_DELTA_DCD      = UART1_MSR_DELTA_DCD,
00463         UART1_MODEM_STAT_CTS            = UART1_MSR_CTS,
00464         UART1_MODEM_STAT_DSR            = UART1_MSR_DSR,
00465         UART1_MODEM_STAT_RI                     = UART1_MSR_RI,
00466         UART1_MODEM_STAT_DCD            = UART1_MSR_DCD
00467 } UART_MODEM_STAT_type;
00468
00472 typedef enum {
00473         UART1_MODEM_PIN_DTR                     = 0,
00474         UART1_MODEM_PIN_RTS
00475 } UART_MODEM_PIN_Type;
00476
00480 typedef enum {
00481         UART1_MODEM_MODE_LOOPBACK       = 0,
00482         UART1_MODEM_MODE_AUTO_RTS,
00483         UART1_MODEM_MODE_AUTO_CTS
00484 } UART_MODEM_MODE_Type;
00485
00489 typedef enum {
00490         UART1_RS485_DIRCTRL_RTS = 0,
00491         UART1_RS485_DIRCTRL_DTR
00492 } UART_RS485_DIRCTRL_PIN_Type;
00493
00494 /********************************************************************/
00497 typedef struct {
00498   uint32_t Baud_rate;
00499   UART_PARITY_Type Parity;
00506   UART_DATABIT_Type Databits;
00512   UART_STOPBIT_Type Stopbits;
00516 } UART_CFG_Type;
00517
00518 /********************************************************************/
00522 typedef struct {
00523         FunctionalState FIFO_ResetRxBuf;
00527         FunctionalState FIFO_ResetTxBuf;
00531         FunctionalState FIFO_DMAMode;
00535         UART_FITO_LEVEL_Type FIFO_Level;
00541 } UART_FIFO_CFG_Type;
00542
00543 /********************************************************************/
00546 typedef struct {
00547         FunctionalState NormalMultiDropMode_State;
00550         FunctionalState Rx_State;
00553         FunctionalState AutoAddrDetect_State;
00556         FunctionalState AutoDirCtrl_State;
00559         UART_RS485_DIRCTRL_PIN_Type DirCtrlPin;
00564          SetState DirCtrlPol_Level;
00570         uint8_t MatchAddrValue;
00571         uint8_t DelayValue;
00572 } UART1_RS485_CTRLCFG_Type;
00573
00579 /* Public Functions ----------------------------------------------------------- */
00583 /* UART Init/DeInit functions --------------------------------------------------*/
00584 void UART_Init(LPC_UART_TypeDef *UARTx, UART_CFG_Type *UART_ConfigStruct);
00585 void UART_DeInit(LPC_UART_TypeDef* UARTx);
00586 void UART_ConfigStructInit(UART_CFG_Type *UART_InitStruct);
00587
00588 /* UART Send/Receive functions -------------------------------------------------*/
00589 void UART_SendByte(LPC_UART_TypeDef* UARTx, uint8_t Data);
00590 uint8_t UART_ReceiveByte(LPC_UART_TypeDef* UARTx);
00591 uint32_t UART_Send(LPC_UART_TypeDef *UARTx, uint8_t *txbuf,
00592                 uint32_t buflen, TRANSFER_BLOCK_Type flag);
00593 uint32_t UART_Receive(LPC_UART_TypeDef *UARTx, uint8_t *rxbuf, \
00594                 uint32_t buflen, TRANSFER_BLOCK_Type flag);
00595
00596 /* UART FIFO functions ----------------------------------------------------------*/
00597 void UART_FIFOConfig(LPC_UART_TypeDef *UARTx, UART_FIFO_CFG_Type *FIFOCfg);
00598 void UART_FIFOConfigStructInit(UART_FIFO_CFG_Type *UART_FIFOInitStruct);
00599
00600 /* UART get information functions -----------------------------------------------*/
00601 uint32_t UART_GetIntId(LPC_UART_TypeDef* UARTx);
00602 uint8_t UART_GetLineStatus(LPC_UART_TypeDef* UARTx);
00603
00604 /* UART operate functions -------------------------------------------------------*/
00605 void UART_IntConfig(LPC_UART_TypeDef *UARTx, UART_INT_Type UARTIntCfg, \
00606                                 FunctionalState NewState);
00607 void UART_TxCmd(LPC_UART_TypeDef *UARTx, FunctionalState NewState);
00608 FlagStatus UART_CheckBusy(LPC_UART_TypeDef *UARTx);
00609 void UART_ForceBreak(LPC_UART_TypeDef* UARTx);
00610
00611 /* UART Auto-baud functions -----------------------------------------------------*/
00612 void UART_ABClearIntPending(LPC_UART_TypeDef *UARTx, UART_ABEO_Type ABIntType);
00613 void UART_ABCmd(LPC_UART_TypeDef *UARTx, UART_AB_CFG_Type *ABConfigStruct, \
00614                                 FunctionalState NewState);
00615
00616 /* UART1 FullModem functions ----------------------------------------------------*/
00617 void UART_FullModemForcePinState(LPC_UART1_TypeDef *UARTx, UART_MODEM_PIN_Type Pin, \
00618                                                         UART1_SignalState NewState);
00619 void UART_FullModemConfigMode(LPC_UART1_TypeDef *UARTx, UART_MODEM_MODE_Type Mode, \
00620                                                         FunctionalState NewState);
00621 uint8_t UART_FullModemGetStatus(LPC_UART1_TypeDef *UARTx);
00622
00623 /* UART RS485 functions ----------------------------------------------------------*/
00624 void UART_RS485Config(LPC_UART1_TypeDef *UARTx, \
00625                 UART1_RS485_CTRLCFG_Type *RS485ConfigStruct);
00626 void UART_RS485ReceiverCmd(LPC_UART1_TypeDef *UARTx, FunctionalState NewState);
00627 void UART_RS485SendSlvAddr(LPC_UART1_TypeDef *UARTx, uint8_t SlvAddr);
00628 uint32_t UART_RS485SendData(LPC_UART1_TypeDef *UARTx, uint8_t *pData, uint32_t size);
00629
00630 /* UART IrDA functions-------------------------------------------------------------*/
00631 void UART_IrDAInvtInputCmd(LPC_UART_TypeDef* UARTx, FunctionalState NewState);
00632 void UART_IrDACmd(LPC_UART_TypeDef* UARTx, FunctionalState NewState);
00633 void UART_IrDAPulseDivConfig(LPC_UART_TypeDef *UARTx, UART_IrDA_PULSE_Type PulseDiv);
00639 #ifdef __cplusplus
00640 }
00641 #endif
00642
00643
00644 #endif /* __LPC17XX_UART_H */
00645
00650 /* --------------------------------- End Of File ------------------------------ */
Generated on Tue Jun 7 14:58:55 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Drivers/source/lpc17xx_wdt.c Source File

C:/nxpdrv/LPC1700CMSIS/Drivers/source/lpc17xx_wdt.c

Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          lpc17xx_wdt.c                   2010-05-21
00003 */
00027 /* Peripheral group ----------------------------------------------------------- */
00032 /* Includes ------------------------------------------------------------------- */
00033 #include "lpc17xx_wdt.h"
00034 #include "lpc17xx_clkpwr.h"
00035 #include "lpc17xx_pinsel.h"
00036
00037
00038 /* If this source file built with example, the LPC17xx FW library configuration
00039  * file in each example directory ("lpc17xx_libcfg.h") must be included,
00040  * otherwise the default FW library configuration file must be included instead
00041  */
00042 #ifdef __BUILD_WITH_EXAMPLE__
00043 #include "lpc17xx_libcfg.h"
00044 #else
00045 #include "lpc17xx_libcfg_default.h"
00046 #endif /* __BUILD_WITH_EXAMPLE__ */
00047
00048
00049 #ifdef _WDT
00050
00051 /* Private Functions ---------------------------------------------------------- */
00052
00053 static uint8_t WDT_SetTimeOut (uint8_t clk_source, uint32_t timeout);
00054
00055 /********************************************************************/
00061 static uint8_t WDT_SetTimeOut (uint8_t clk_source, uint32_t timeout)
00062 {
00063
00064         uint32_t pclk_wdt = 0;
00065         uint32_t tempval = 0;
00066
00067         switch ((WDT_CLK_OPT) clk_source)
00068     {
00069     case WDT_CLKSRC_IRC:
00070         pclk_wdt = 4000000;
00071         // Calculate TC in WDT
00072         tempval  = (((pclk_wdt) / WDT_US_INDEX) * (timeout / 4));
00073         // Check if it valid
00074         if ((tempval >= WDT_TIMEOUT_MIN) && (tempval <= WDT_TIMEOUT_MAX))
00075         {
00076                 LPC_WDT->WDTC = tempval;
00077                 return  SUCCESS;
00078         }
00079
00080         break;
00081
00082     case WDT_CLKSRC_PCLK:
00083
00084         // Get WDT clock with CCLK divider = 4
00085                 pclk_wdt = SystemCoreClock / 4;
00086                 // Calculate TC in WDT
00087                 tempval  = (((pclk_wdt) / WDT_US_INDEX) * (timeout / 4));
00088
00089                 if ((tempval >= WDT_TIMEOUT_MIN) && (tempval <= WDT_TIMEOUT_MAX))
00090                 {
00091                         CLKPWR_SetPCLKDiv (CLKPWR_PCLKSEL_WDT, CLKPWR_PCLKSEL_CCLK_DIV_4);
00092                         LPC_WDT->WDTC = (uint32_t) tempval;
00093                         return SUCCESS;
00094                 }
00095
00096                 // Get WDT clock with CCLK divider = 2
00097                 pclk_wdt = SystemCoreClock / 2;
00098                 // Calculate TC in WDT
00099                 tempval  = (((pclk_wdt) / WDT_US_INDEX) * (timeout / 4));
00100
00101                 if ((tempval >= WDT_TIMEOUT_MIN) && (tempval <= WDT_TIMEOUT_MAX))
00102                 {
00103                         CLKPWR_SetPCLKDiv (CLKPWR_PCLKSEL_WDT, CLKPWR_PCLKSEL_CCLK_DIV_2);
00104                         LPC_WDT->WDTC = (uint32_t) tempval;
00105                         return  SUCCESS;
00106                 }
00107
00108                 // Get WDT clock with CCLK divider = 1
00109                 pclk_wdt = SystemCoreClock;
00110                 // Calculate TC in WDT
00111                 tempval  = (((pclk_wdt) / WDT_US_INDEX) * (timeout / 4));
00112
00113                 if ((tempval >= WDT_TIMEOUT_MIN) && (tempval <= WDT_TIMEOUT_MAX))
00114                 {
00115                         CLKPWR_SetPCLKDiv (CLKPWR_PCLKSEL_WDT, CLKPWR_PCLKSEL_CCLK_DIV_1);
00116                         LPC_WDT->WDTC = (uint32_t) tempval;
00117                         return  SUCCESS;
00118                 }
00119                 break ;
00120
00121
00122     case WDT_CLKSRC_RTC:
00123                 pclk_wdt = 32768;
00124                 // Calculate TC in WDT
00125                 tempval  = (((pclk_wdt) / WDT_US_INDEX) * (timeout / 4));
00126                 // Check if it valid
00127                 if ((tempval >= WDT_TIMEOUT_MIN) && (tempval <= WDT_TIMEOUT_MAX))
00128                 {
00129                         LPC_WDT->WDTC = (uint32_t) tempval;
00130                         return  SUCCESS;
00131                 }
00132
00133                 break;
00134
00135 // Error parameter
00136                 default:
00137                         break;
00138 }
00139
00140         return ERROR;
00141 }
00142
00143 /* End of Private Functions --------------------------------------------------- */
00144
00145
00146 /* Public Functions ----------------------------------------------------------- */
00152 /*********************************************************************/
00164 void WDT_Init (WDT_CLK_OPT ClkSrc, WDT_MODE_OPT WDTMode)
00165 {
00166         CHECK_PARAM(PARAM_WDT_CLK_OPT(ClkSrc));
00167         CHECK_PARAM(PARAM_WDT_MODE_OPT(WDTMode));
00168         CLKPWR_SetPCLKDiv (CLKPWR_PCLKSEL_WDT, CLKPWR_PCLKSEL_CCLK_DIV_4);
00169
00170         //Set clock source
00171         LPC_WDT->WDCLKSEL &= ~WDT_WDCLKSEL_MASK;
00172         LPC_WDT->WDCLKSEL |= ClkSrc;
00173         //Set WDT mode
00174         if (WDTMode == WDT_MODE_RESET){
00175                 LPC_WDT->WDMOD |= WDT_WDMOD(WDTMode);
00176         }
00177 }
00178
00179 /*********************************************************************/
00184 void WDT_Start(uint32_t TimeOut)
00185 {
00186         uint32_t ClkSrc;
00187
00188         ClkSrc = LPC_WDT->WDCLKSEL;
00189         ClkSrc &=WDT_WDCLKSEL_MASK;
00190         WDT_SetTimeOut(ClkSrc,TimeOut);
00191         //enable watchdog
00192         LPC_WDT->WDMOD |= WDT_WDMOD_WDEN;
00193         WDT_Feed();
00194 }
00195
00196 /********************************************************************/
00201 FlagStatus WDT_ReadTimeOutFlag (void)
00202 {
00203         return ((FlagStatus)((LPC_WDT->WDMOD & WDT_WDMOD_WDTOF) >>2));
00204 }
00205
00206 /********************************************************************/
00211 void WDT_ClrTimeOutFlag (void)
00212 {
00213         LPC_WDT->WDMOD &=~WDT_WDMOD_WDTOF;
00214 }
00215
00216 /********************************************************************/
00221 void WDT_UpdateTimeOut ( uint32_t TimeOut)
00222 {
00223         uint32_t ClkSrc;
00224         ClkSrc = LPC_WDT->WDCLKSEL;
00225         ClkSrc &=WDT_WDCLKSEL_MASK;
00226         WDT_SetTimeOut(ClkSrc,TimeOut);
00227         WDT_Feed();
00228 }
00229
00230
00231 /********************************************************************/
00238 void WDT_Feed (void)
00239 {
00240         // Disable irq interrupt
00241         __disable_irq();
00242         LPC_WDT->WDFEED = 0xAA;
00243         LPC_WDT->WDFEED = 0x55;
00244         // Then enable irq interrupt
00245         __enable_irq();
00246 }
00247
00248 /********************************************************************/
00253 uint32_t WDT_GetCurrentCount(void)
00254 {
00255         return LPC_WDT->WDTV;
00256 }
00257
00262 #endif /* _WDT */
00263
00268 /* --------------------------------- End Of File ------------------------------ */
Generated on Tue Jun 7 14:58:56 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_wdt.h Source File

C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_wdt.h

Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          lpc17xx_wdt.h                           2010-05-21
00003 */
00027 /* Peripheral group ----------------------------------------------------------- */
00033 #ifndef LPC17XX_WDT_H_
00034 #define LPC17XX_WDT_H_
00035
00036 /* Includes ------------------------------------------------------------------- */
00037 #include "LPC17xx.h"
00038 #include "lpc_types.h"
00039
00040
00041 #ifdef __cplusplus
00042 extern "C"
00043 {
00044 #endif
00045
00046
00047 /* Private Macros ------------------------------------------------------------- */
00052 /* --------------------- BIT DEFINITIONS -------------------------------------- */
00054 #define WDT_WDMOD_WDEN                      ((uint32_t)(1<<0))
00055
00056 #define WDT_WDMOD_WDRESET                       ((uint32_t)(1<<1))
00057
00058 #define WDT_WDMOD_WDTOF                         ((uint32_t)(1<<2))
00059
00060 #define WDT_WDMOD_WDINT                         ((uint32_t)(1<<3))
00061
00062 #define WDT_WDMOD(n)                            ((uint32_t)(1<<1))
00063
00065 #define WDT_US_INDEX    ((uint32_t)(1000000))
00066
00067 #define WDT_TIMEOUT_MIN ((uint32_t)(0xFF))
00068
00069 #define WDT_TIMEOUT_MAX ((uint32_t)(0xFFFFFFFF))
00070
00072 #define WDT_WDMOD_MASK                  (uint8_t)(0x02)
00073
00074 #define WDT_WDTC_MASK                   (uint8_t)(0xFFFFFFFF)
00075
00076 #define WDT_WDFEED_MASK                 (uint8_t)(0x000000FF)
00077
00078 #define WDT_WDCLKSEL_MASK               (uint8_t)(0x03)
00079
00080 #define WDT_WDCLKSEL_RC                 (uint8_t)(0x00)
00081
00082 #define WDT_WDCLKSEL_PCLK               (uint8_t)(0x01)
00083
00084 #define WDT_WDCLKSEL_RTC                (uint8_t)(0x02)
00085
00086 /* ---------------- CHECK PARAMETER DEFINITIONS ---------------------------- */
00087 /* Macro check clock source selection  */
00088 #define PARAM_WDT_CLK_OPT(OPTION)  ((OPTION ==WDT_CLKSRC_IRC)||(OPTION ==WDT_CLKSRC_IRC)\
00089 ||(OPTION ==WDT_CLKSRC_IRC))
00090
00091 /* Macro check WDT mode */
00092 #define PARAM_WDT_MODE_OPT(OPTION)  ((OPTION ==WDT_MODE_INT_ONLY)||(OPTION ==WDT_MODE_RESET))
00093
00098 /* Public Types --------------------------------------------------------------- */
00104 typedef enum {
00105         WDT_CLKSRC_IRC = 0,
00106         WDT_CLKSRC_PCLK = 1,
00107         WDT_CLKSRC_RTC = 2
00108 } WDT_CLK_OPT;
00109
00111 typedef enum {
00112         WDT_MODE_INT_ONLY = 0,
00113         WDT_MODE_RESET = 1
00114 } WDT_MODE_OPT;
00115
00121 /* Public Functions ----------------------------------------------------------- */
00126 void WDT_Init (WDT_CLK_OPT ClkSrc, WDT_MODE_OPT WDTMode);
00127 void WDT_Start(uint32_t TimeOut);
00128 void WDT_Feed (void);
00129 void WDT_UpdateTimeOut ( uint32_t TimeOut);
00130 FlagStatus WDT_ReadTimeOutFlag (void);
00131 void WDT_ClrTimeOutFlag (void);
00132 uint32_t WDT_GetCurrentCount(void);
00133
00138 #ifdef __cplusplus
00139 }
00140 #endif
00141
00142 #endif /* LPC17XX_WDT_H_ */
00143
00148 /* --------------------------------- End Of File ------------------------------ */
Generated on Tue Jun 7 14:58:55 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc_types.h Source File

C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc_types.h

Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          lpc_types.h             2008-07-27
00003 */
00029 /* Type group ----------------------------------------------------------- */
00035 #ifndef LPC_TYPES_H
00036 #define LPC_TYPES_H
00037
00038 /* Includes ------------------------------------------------------------------- */
00039 #include <stdint.h>
00040
00041
00042 /* Public Types --------------------------------------------------------------- */
00050 typedef enum {FALSE = 0, TRUE = !FALSE} Bool;
00051
00055 typedef enum {RESET = 0, SET = !RESET} FlagStatus, IntStatus, SetState;
00056 #define PARAM_SETSTATE(State) ((State==RESET) || (State==SET))
00057
00061 typedef enum {DISABLE = 0, ENABLE = !DISABLE} FunctionalState;
00062 #define PARAM_FUNCTIONALSTATE(State) ((State==DISABLE) || (State==ENABLE))
00063
00067 typedef enum {ERROR = 0, SUCCESS = !ERROR} Status;
00068
00069
00073 typedef enum
00074 {
00075         NONE_BLOCKING = 0,
00076         BLOCKING
00077 } TRANSFER_BLOCK_Type;
00078
00079
00081 typedef void (*PFV)();
00082
00084 typedef int32_t(*PFI)();
00085
00091 /* Public Macros -------------------------------------------------------------- */
00096 /* _BIT(n) sets the bit at position "n"
00097  * _BIT(n) is intended to be used in "OR" and "AND" expressions:
00098  * e.g., "(_BIT(3) | _BIT(7))".
00099  */
00100 #undef _BIT
00101 /* Set bit macro */
00102 #define _BIT(n) (1<<n)
00103
00104 /* _SBF(f,v) sets the bit field starting at position "f" to value "v".
00105  * _SBF(f,v) is intended to be used in "OR" and "AND" expressions:
00106  * e.g., "((_SBF(5,7) | _SBF(12,0xF)) & 0xFFFF)"
00107  */
00108 #undef _SBF
00109 /* Set bit field macro */
00110 #define _SBF(f,v) (v<<f)
00111
00112 /* _BITMASK constructs a symbol with 'field_width' least significant
00113  * bits set.
00114  * e.g., _BITMASK(5) constructs '0x1F', _BITMASK(16) == 0xFFFF
00115  * The symbol is intended to be used to limit the bit field width
00116  * thusly:
00117  * <a_register> = (any_expression) & _BITMASK(x), where 0 < x <= 32.
00118  * If "any_expression" results in a value that is larger than can be
00119  * contained in 'x' bits, the bits above 'x - 1' are masked off.  When
00120  * used with the _SBF example above, the example would be written:
00121  * a_reg = ((_SBF(5,7) | _SBF(12,0xF)) & _BITMASK(16))
00122  * This ensures that the value written to a_reg is no wider than
00123  * 16 bits, and makes the code easier to read and understand.
00124  */
00125 #undef _BITMASK
00126 /* Bitmask creation macro */
00127 #define _BITMASK(field_width) ( _BIT(field_width) - 1)
00128
00129 /* NULL pointer */
00130 #ifndef NULL
00131 #define NULL ((void*) 0)
00132 #endif
00133
00134 /* Number of elements in an array */
00135 #define NELEMENTS(array)  (sizeof (array) / sizeof (array[0]))
00136
00137 /* Static data/function define */
00138 #define STATIC static
00139 /* External data/function define */
00140 #define EXTERN extern
00141
00142 #define MAX(a, b) (((a) > (b)) ? (a) : (b))
00143 #define MIN(a, b) (((a) < (b)) ? (a) : (b))
00144
00150 /* Old Type Definition compatibility ------------------------------------------ */
00156 typedef char CHAR;
00157
00159 typedef uint8_t UNS_8;
00160
00162 typedef int8_t INT_8;
00163
00165 typedef uint16_t UNS_16;
00166
00168 typedef int16_t INT_16;
00169
00171 typedef uint32_t UNS_32;
00172
00174 typedef int32_t INT_32;
00175
00177 typedef int64_t INT_64;
00178
00180 typedef uint64_t UNS_64;
00181
00183 typedef Bool BOOL_32;
00184
00186 typedef Bool BOOL_16;
00187
00189 typedef Bool BOOL_8;
00190
00196 #endif /* LPC_TYPES_H */
00197
00202 /* --------------------------------- End Of File ------------------------------ */
Generated on Tue Jun 7 14:58:55 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/lpc17xx_port/main.c Source File

C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/lpc17xx_port/main.c

Go to the documentation of this file.
00001 #include <stdio.h>
00002 #include <string.h>
00003
00004 #include "debug_frmwrk.h"
00005 #include "clock-arch.h"
00006 #include "timer.h"
00007 #include "uip-conf.h"
00008 #include "uipopt.h"
00009 #include "uip_arp.h"
00010 #include "uip.h"
00011 #include "emac.h"
00012 #include "lpc_types.h"
00013 #include "lpc17xx_libcfg.h"
00014 #include "lpc17xx_pinsel.h"
00015 #include "lpc17xx_gpio.h"
00016
00017
00018 #define BUF ((struct uip_eth_hdr *)&uip_buf[0])
00019
00020 #define LED_PIN         (1<<6)
00021 #define LED2_MASK       ((1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6))
00022 #define LED1_MASK       ((1<<28) | (1<<29) | (1<<31))
00023
00024
00025 /* For debugging... */
00026 #include <stdio.h>
00027 #define DB      _DBG((uint8_t *)_db)
00028 char _db[64];
00029
00030 void LED_Init (void)
00031 {
00032         PINSEL_CFG_Type PinCfg;
00033
00034         uint8_t temp;
00035
00036         PinCfg.Funcnum = 0;
00037         PinCfg.OpenDrain = 0;
00038         PinCfg.Pinmode = 0;
00039         PinCfg.Portnum = 2;
00040         for (temp = 2; temp <= 6; temp++){
00041                 PinCfg.Pinnum = temp;
00042                 PINSEL_ConfigPin(&PinCfg);
00043         }
00044
00045         PinCfg.Funcnum = 0;
00046         PinCfg.OpenDrain = 0;
00047         PinCfg.Pinmode = 0;
00048         PinCfg.Portnum = 1;
00049         PinCfg.Pinnum = 28;
00050         PINSEL_ConfigPin(&PinCfg);
00051         PinCfg.Pinnum = 29;
00052         PINSEL_ConfigPin(&PinCfg);
00053         PinCfg.Pinnum = 31;
00054         PINSEL_ConfigPin(&PinCfg);
00055
00056         // Set direction to output
00057         GPIO_SetDir(2, LED2_MASK, 1);
00058         GPIO_SetDir(1, LED1_MASK, 1);
00059
00060         /* Turn off all LEDs */
00061         GPIO_ClearValue(2, LED2_MASK);
00062         GPIO_ClearValue(1, LED1_MASK);
00063 }
00064
00065 /*************************************************************************
00066  * Function Name: uip_log
00067  * Parameters: none
00068  *
00069  * Return: none
00070  *
00071  * Description: Events logging
00072  *
00073  *************************************************************************/
00074 void uip_log (char *m)
00075 {
00076         _DBG("uIP log message: ");
00077         _DBG(m);
00078         _DBG_("");
00079 }
00080
00081 /*************************************************************************
00082  * Function Name: main
00083  * Parameters: none
00084  *
00085  * Return: none
00086  *
00087  * Description: main
00088  *
00089  *************************************************************************/
00090 int c_entry(void)
00091 {
00092         UNS_32 i, delay;
00093         uip_ipaddr_t ipaddr;
00094         struct timer periodic_timer, arp_timer;
00095
00096         /* Initialize debug via UART0
00097          * – 115200bps
00098          * – 8 data bit
00099          * – No parity
00100          * – 1 stop bit
00101          * – No flow control
00102          */
00103         debug_frmwrk_init();
00104
00105         _DBG_("Hello NXP Semiconductors");
00106         _DBG_("uIP porting on LPC17xx");
00107
00108
00109         // Initialize LED for system tick timer
00110         LED_Init();
00111
00112         _DBG_("Init Clock");
00113         // Sys timer init 1/100 sec tick
00114         clock_init();
00115
00116         timer_set(&periodic_timer, CLOCK_SECOND / 2); /*0.5s */
00117         timer_set(&arp_timer, CLOCK_SECOND * 10);       /*10s */
00118
00119         _DBG_("Init EMAC");
00120         // Initialize the ethernet device driver
00121         while(!tapdev_init()){
00122                 // Delay for a while then continue initializing EMAC module
00123                 _DBG_("Error during initializing EMAC, restart after a while");
00124                 for (delay = 0x100000; delay; delay--);
00125         }
00126
00127
00128 #if 1
00129
00130         _DBG_("Init uIP");
00131         // Initialize the uIP TCP/IP stack.
00132         uip_init();
00133
00134         // init MAC address
00135         uip_ethaddr.addr[0] = EMAC_ADDR0;
00136         uip_ethaddr.addr[1] = EMAC_ADDR1;
00137         uip_ethaddr.addr[2] = EMAC_ADDR2;
00138         uip_ethaddr.addr[3] = EMAC_ADDR3;
00139         uip_ethaddr.addr[4] = EMAC_ADDR4;
00140         uip_ethaddr.addr[5] = EMAC_ADDR5;
00141         uip_setethaddr(uip_ethaddr);
00142
00143
00144         uip_ipaddr(ipaddr, 192,168,0,100);
00145         sprintf(_db, "Set own IP address: %d.%d.%d.%d \n\r", \
00146                         ((uint8_t *)ipaddr)[0], ((uint8_t *)ipaddr)[1], \
00147                         ((uint8_t *)ipaddr)[2], ((uint8_t *)ipaddr)[3]);
00148         DB;
00149         uip_sethostaddr(ipaddr);
00150
00151         uip_ipaddr(ipaddr, 192,168,0,1);
00152         sprintf(_db, "Set Router IP address: %d.%d.%d.%d \n\r", \
00153                         ((uint8_t *)ipaddr)[0], ((uint8_t *)ipaddr)[1], \
00154                         ((uint8_t *)ipaddr)[2], ((uint8_t *)ipaddr)[3]);
00155         DB;
00156         uip_setdraddr(ipaddr);
00157
00158         uip_ipaddr(ipaddr, 255,255,255,0);
00159         sprintf(_db, "Set Subnet mask: %d.%d.%d.%d \n\r", \
00160                         ((uint8_t *)ipaddr)[0], ((uint8_t *)ipaddr)[1], \
00161                         ((uint8_t *)ipaddr)[2], ((uint8_t *)ipaddr)[3]);
00162         DB;
00163         uip_setnetmask(ipaddr);
00164
00165         // Initialize the HTTP server ----------------------------
00166         _DBG_("Init HTTP");
00167         httpd_init();
00168         _DBG_("Init complete!");
00169
00170   while(1)
00171   {
00172     uip_len = tapdev_read(uip_buf);
00173     if(uip_len > 0)
00174     {
00175       if(BUF->type == htons(UIP_ETHTYPE_IP))
00176       {
00177               uip_arp_ipin();
00178               uip_input();
00179               /* If the above function invocation resulted in data that
00180                  should be sent out on the network, the global variable
00181                  uip_len is set to a value > 0. */
00182
00183               if(uip_len > 0)
00184         {
00185                 uip_arp_out();
00186                 tapdev_send(uip_buf,uip_len);
00187               }
00188       }
00189       else if(BUF->type == htons(UIP_ETHTYPE_ARP))
00190       {
00191         uip_arp_arpin();
00192               /* If the above function invocation resulted in data that
00193                  should be sent out on the network, the global variable
00194                  uip_len is set to a value > 0. */
00195               if(uip_len > 0)
00196         {
00197                 tapdev_send(uip_buf,uip_len);
00198               }
00199       }
00200     }
00201     else if(timer_expired(&periodic_timer))
00202     {
00203       timer_reset(&periodic_timer);
00204       for(i = 0; i < UIP_CONNS; i++)
00205       {
00206         uip_periodic(i);
00207         /* If the above function invocation resulted in data that
00208            should be sent out on the network, the global variable
00209            uip_len is set to a value > 0. */
00210         if(uip_len > 0)
00211         {
00212           uip_arp_out();
00213           tapdev_send(uip_buf,uip_len);
00214         }
00215       }
00216 #if UIP_UDP
00217       for(i = 0; i < UIP_UDP_CONNS; i++) {
00218         uip_udp_periodic(i);
00219         /* If the above function invocation resulted in data that
00220            should be sent out on the network, the global variable
00221            uip_len is set to a value > 0. */
00222         if(uip_len > 0) {
00223           uip_arp_out();
00224           tapdev_send();
00225         }
00226       }
00227 #endif /* UIP_UDP */
00228       /* Call the ARP timer function every 10 seconds. */
00229       if(timer_expired(&arp_timer))
00230       {
00231         timer_reset(&arp_timer);
00232         uip_arp_timer();
00233       }
00234     }
00235   }
00236 #endif
00237
00238   while (1);
00239 }
00240
00241 int main(void)
00242 {
00243         return c_entry();
00244 }
00245
00246 #ifdef  DEBUG
00247 /*******************************************************************************
00248 * @brief                Reports the name of the source file and the source line number
00249 *                               where the CHECK_PARAM error has occurred.
00250 * @param[in]    file Pointer to the source file name
00251 * @param[in]    line assert_param error line source number
00252 * @return               None
00253 *******************************************************************************/
00254 void check_failed(uint8_t *file, uint32_t line)
00255 {
00256         /* User can add his own implementation to report the file name and line number,
00257          ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
00258
00259         /* Infinite loop */
00260         while(1);
00261 }
00262 #endif
Generated on Tue Jun 7 14:59:00 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/I2C/master/master.c Source File

C:/nxpdrv/LPC1700CMSIS/Examples/I2C/master/master.c

Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          master.c                                2010-05-21
00003 */
00025 #include "lpc17xx_i2c.h"
00026 #include "lpc17xx_libcfg.h"
00027 #include "lpc17xx_pinsel.h"
00028 #include "debug_frmwrk.h"
00029
00030 /* Example group ----------------------------------------------------------- */
00036 /************************** PRIVATE DEFINITIONS *************************/
00038 #define USEDI2CDEV_M            0
00039
00040 #define I2CDEV_S_ADDR   (0x90>>1)
00041
00043 #define BUFFER_SIZE                     0x10
00044
00045 #if (USEDI2CDEV_M == 0)
00046 #define I2CDEV_M LPC_I2C0
00047 #elif (USEDI2CDEV_M == 2)
00048 #define I2CDEV_M LPC_I2C2
00049 #else
00050 #error "Master I2C device not defined!"
00051 #endif
00052
00053 /************************** PRIVATE VARIABLES *************************/
00054 uint8_t menu1[] =
00055 "********************************************************************************\n\r"
00056 "Hello NXP Semiconductors \n\r"
00057 "I2C demo \n\r"
00058 "\t - MCU: LPC17xx \n\r"
00059 "\t - Core: ARM Cortex-M3 \n\r"
00060 "\t - This example uses two I2C peripheral, one set as master and \n\r"
00061 "\t the other set as slave \n\r"
00062 "\t Test Master mode as alone device \n\r"
00063 "********************************************************************************\n\r";
00064
00066 uint8_t Master_Buf[BUFFER_SIZE];
00067 uint8_t master_test[2];
00068
00069 /************************** PRIVATE FUNCTIONS *************************/
00070 void print_menu(void);
00071 void Buffer_Init(uint8_t type);
00072
00073 /*-------------------------PRIVATE FUNCTIONS-----------------------------*/
00074 /*********************************************************************/
00079 void print_menu(void)
00080 {
00081         _DBG_(menu1);
00082 }
00083
00084 /*********************************************************************/
00093 void Buffer_Init(uint8_t type)
00094 {
00095         uint8_t i;
00096
00097         if (type)
00098         {
00099                 for (i = 0; i < BUFFER_SIZE; i++) {
00100                         Master_Buf[i] = i;
00101                 }
00102         }
00103         else
00104         {
00105                 for (i = 0; i < BUFFER_SIZE; i++) {
00106                         Master_Buf[i] = 0;
00107                 }
00108         }
00109 }
00110
00111
00112 /*-------------------------MAIN FUNCTION------------------------------*/
00113 /*********************************************************************/
00118 int c_entry(void)
00119 {
00120         PINSEL_CFG_Type PinCfg;
00121         I2C_M_SETUP_Type transferMCfg;
00122         uint32_t tempp;
00123         uint8_t *pdat;
00124
00125         /* Initialize debug via UART0
00126          * – 115200bps
00127          * – 8 data bit
00128          * – No parity
00129          * – 1 stop bit
00130          * – No flow control
00131          */
00132         debug_frmwrk_init();
00133
00134         print_menu();
00135
00136
00137         /* I2C block ------------------------------------------------------------------- */
00138
00139         /*
00140          * Init I2C pin connect
00141          */
00142         PinCfg.OpenDrain = 0;
00143         PinCfg.Pinmode = 0;
00144 #if ((USEDI2CDEV_M == 0))
00145         PinCfg.Funcnum = 1;
00146         PinCfg.Pinnum = 27;
00147         PinCfg.Portnum = 0;
00148         PINSEL_ConfigPin(&PinCfg);
00149         PinCfg.Pinnum = 28;
00150         PINSEL_ConfigPin(&PinCfg);
00151 #endif
00152 #if ((USEDI2CDEV_M == 2))
00153         PinCfg.Funcnum = 2;
00154         PinCfg.Pinnum = 10;
00155         PinCfg.Portnum = 0;
00156         PINSEL_ConfigPin(&PinCfg);
00157         PinCfg.Pinnum = 11;
00158         PINSEL_ConfigPin(&PinCfg);
00159 #endif
00160
00161         // Initialize Slave I2C peripheral
00162         I2C_Init(I2CDEV_M, 100000);
00163
00164         /* Enable Slave I2C operation */
00165         I2C_Cmd(I2CDEV_M, ENABLE);
00166
00167         /* Transmit -------------------------------------------------------- */
00168         _DBG_("Press '1' to transmit");
00169         while (_DG != '1');
00170         _DBG_("Start Transmit...");
00171
00172         /* Initialize buffer */
00173         Buffer_Init(1);
00174
00175         /* Start I2C slave device first */
00176         transferMCfg.sl_addr7bit = I2CDEV_S_ADDR;
00177         transferMCfg.tx_data = Master_Buf;
00178         transferMCfg.tx_length = sizeof(Master_Buf);
00179         transferMCfg.rx_data = NULL;
00180         transferMCfg.rx_length = 0;
00181         transferMCfg.retransmissions_max = 3;
00182         I2C_MasterTransferData(I2CDEV_M, &transferMCfg, I2C_TRANSFER_POLLING);
00183
00184
00185         /* Receive -------------------------------------------------------- */
00186         _DBG_("Press '2' to receive");
00187         while(_DG != '2');
00188         _DBG_("Receive...");
00189
00190         /* Initialize buffer */
00191         Buffer_Init(0);
00192
00193         /* Start I2C slave device first */
00194         transferMCfg.sl_addr7bit = I2CDEV_S_ADDR;
00195         transferMCfg.tx_data = NULL ;
00196         transferMCfg.tx_length = 0;
00197         transferMCfg.rx_data = Master_Buf;
00198         transferMCfg.rx_length = sizeof(Master_Buf);
00199         transferMCfg.retransmissions_max = 3;
00200         I2C_MasterTransferData(I2CDEV_M, &transferMCfg, I2C_TRANSFER_POLLING);
00201
00202         pdat = Master_Buf;
00203         // Verify
00204         for (tempp = 0; tempp < sizeof(Master_Buf); tempp++){
00205                 if (*pdat++ != tempp){
00206                         _DBG_("Verify error");
00207                         break;
00208                 }
00209         }
00210         if (tempp == sizeof(Master_Buf)){
00211                 _DBG_("Verify successfully");
00212         }
00213
00214 #if 1
00215         /* Transmit and receive -------------------------------------------------------- */
00216         _DBG_("Press '3' to Transmit, then repeat start and receive...");
00217         while (_DG != '3');
00218
00219         /* Initialize buffer */
00220         Buffer_Init(0);
00221         master_test[0] = 0xAA;
00222         master_test[1] = 0x55;
00223
00224         /* Start I2C slave device first */
00225         transferMCfg.sl_addr7bit = I2CDEV_S_ADDR;
00226         transferMCfg.tx_data = master_test ;
00227         transferMCfg.tx_length = sizeof(master_test);
00228         transferMCfg.rx_data = Master_Buf;
00229         transferMCfg.rx_length = sizeof(Master_Buf);
00230         transferMCfg.retransmissions_max = 3;
00231         I2C_MasterTransferData(I2CDEV_M, &transferMCfg, I2C_TRANSFER_POLLING);
00232 #endif
00233
00234         pdat = Master_Buf;
00235         // Verify
00236         for (tempp = 0; tempp < sizeof(Master_Buf); tempp++){
00237                 if (*pdat++ != tempp){
00238                         _DBG_("Verify error");
00239                         break;
00240                 }
00241         }
00242         if (tempp == sizeof(Master_Buf)){
00243                 _DBG_("Verify successfully");
00244         }
00245         I2C_DeInit(I2CDEV_M);
00246     /* Loop forever */
00247     while(1);
00248     return 1;
00249 }
00250
00251 /* With ARM and GHS toolsets, the entry point is main() - this will
00252    allow the linker to generate wrapper code to setup stacks, allocate
00253    heap area, and initialize and copy code and data segments. For GNU
00254    toolsets, the entry point is through __start() in the crt0_gnu.asm
00255    file, and that startup code will setup stacks and data */
00256 int main(void)
00257 {
00258     return c_entry();
00259 }
00260
00261
00262 #ifdef  DEBUG
00263 /*******************************************************************************
00264 * @brief                Reports the name of the source file and the source line number
00265 *                               where the CHECK_PARAM error has occurred.
00266 * @param[in]    file Pointer to the source file name
00267 * @param[in]    line assert_param error line source number
00268 * @return               None
00269 *******************************************************************************/
00270 void check_failed(uint8_t *file, uint32_t line)
00271 {
00272         /* User can add his own implementation to report the file name and line number,
00273          ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
00274
00275         /* Infinite loop */
00276         while(1);
00277 }
00278 #endif
00279
00280 /*
00281  * @}
00282  */
Generated on Tue Jun 7 14:59:01 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/MCPWM/MCPWMSimple/mcpwm_simple.c Source File

C:/nxpdrv/LPC1700CMSIS/Examples/MCPWM/MCPWMSimple/mcpwm_simple.c

Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          mcpwm_simple.c                          2010-05-21
00003 */
00025 #include "lpc17xx_mcpwm.h"
00026 #include "lpc17xx_pinsel.h"
00027 #include "lpc17xx_libcfg.h"
00028 #include "lpc17xx_clkpwr.h"
00029 #include "debug_frmwrk.h"
00030
00031
00032 /* Example group ----------------------------------------------------------- */
00038 /************************** PRIVATE DEFINITIONS **********************/
00040 #define DC_MODE_TEST                    1
00041
00042 #define AC_MODE_TEST                    0
00043
00044 #define CAPTURE_MODE_TEST               0
00045
00046
00047 /************************** PRIVATE VARIABLES *************************/
00048 #if CAPTURE_MODE_TEST
00049
00050 MCPWM_CAPTURE_CFG_Type captureCfg;
00052 __IO FlagStatus CapFlag;
00054 __IO uint32_t CapVal;
00055 #endif
00056 /************************** PRIVATE FUNCTIONS *************************/
00057 void MCPWM_IRQHandler(void);
00058
00059 /*----------------- INTERRUPT SERVICE ROUTINES --------------------------*/
00060 /*********************************************************************/
00065 void MCPWM_IRQHandler(void)
00066 {
00067 #if CAPTURE_MODE_TEST
00068         // Check whether if capture event interrupt is set
00069         if (MCPWM_GetIntStatus(LPC_MCPWM, MCPWM_INTFLAG_CAP0)) {
00070                 if (CapFlag == RESET) {
00071                         // Store capture value
00072                         CapVal = MCPWM_GetCapture(LPC_MCPWM, 0);
00073                         // toggle capture flag
00074                         CapFlag = SET;
00075                         // Disable interrupt for capture event
00076                         MCPWM_IntConfig(LPC_MCPWM, MCPWM_INTFLAG_CAP0, DISABLE);
00077                 }
00078                 // Clear pending interrupt
00079                 MCPWM_IntClear(LPC_MCPWM, MCPWM_INTFLAG_CAP0);
00080         }
00081 #endif
00082 }
00083
00084
00085 /*-------------------------MAIN FUNCTION------------------------------*/
00086 /*********************************************************************/
00091 int c_entry(void)
00092 {
00093         // MCPWM Channel configuration data
00094         MCPWM_CHANNEL_CFG_Type channelsetup[3];
00095         uint32_t i;
00096         PINSEL_CFG_Type PinCfg;
00097
00098         /* Initialize debug via UART0
00099          * – 115200bps
00100          * – 8 data bit
00101          * – No parity
00102          * – 1 stop bit
00103          * – No flow control
00104          */
00105         debug_frmwrk_init();
00106         _DBG_("Hello MCPWM ...");
00107
00108         /* Pin configuration for MCPWM function:
00109          * Assign:      - P1.19 as MCOA0 - Motor Control Channel 0 Output A
00110          *                      - P1.22 as MCOB0 - Motor Control Channel 0 Output B
00111          *                      - P1.25 as MCOA1 - Motor Control Channel 1 Output A
00112          *                      - P1.26 as MCOB1 - Motor Control Channel 1 Output B
00113          *                      - P1.28 as MCOA2 - Motor Control Channel 2 Output A
00114          *                      - P1.29 as MCOB2 - Motor Control Channel 2 Output B
00115          *                      - P1.20 as MCI0  - Motor Control Feed Back Channel 0
00116          * Warning: According to Errata.lpc1768-18.March.2010: Input pin (MIC0-2)
00117          * on the Motor Control PWM peripheral are not functional
00118          */
00119         PinCfg.Funcnum = 1;
00120         PinCfg.OpenDrain = 0;
00121         PinCfg.Pinmode = 0;
00122         PinCfg.Portnum = 1;
00123         PinCfg.Pinnum = 19;
00124         PINSEL_ConfigPin(&PinCfg);
00125         PinCfg.Pinnum = 22;
00126         PINSEL_ConfigPin(&PinCfg);
00127         PinCfg.Pinnum = 25;
00128         PINSEL_ConfigPin(&PinCfg);
00129         PinCfg.Pinnum = 26;
00130         PINSEL_ConfigPin(&PinCfg);
00131         PinCfg.Pinnum = 28;
00132         PINSEL_ConfigPin(&PinCfg);
00133         PinCfg.Pinnum = 29;
00134         PINSEL_ConfigPin(&PinCfg);
00135         PinCfg.Pinnum = 20;
00136         PINSEL_ConfigPin(&PinCfg);
00137
00138         /* Disable interrupt for MCPWM  */
00139         NVIC_DisableIRQ(MCPWM_IRQn);
00140         /* preemption = 1, sub-priority = 1 */
00141         NVIC_SetPriority(MCPWM_IRQn, ((0x01<<3)|0x01));
00142
00143         /* Init MCPWM peripheral */
00144         MCPWM_Init(LPC_MCPWM);
00145
00146         channelsetup[0].channelType = MCPWM_CHANNEL_EDGE_MODE;
00147         channelsetup[0].channelPolarity = MCPWM_CHANNEL_PASSIVE_LO;
00148         channelsetup[0].channelDeadtimeEnable = DISABLE;
00149         channelsetup[0].channelDeadtimeValue = 0;
00150         channelsetup[0].channelUpdateEnable = ENABLE;
00151         channelsetup[0].channelTimercounterValue = 0;
00152         channelsetup[0].channelPeriodValue = 300;
00153         channelsetup[0].channelPulsewidthValue = 0;
00154
00155         channelsetup[1].channelType = MCPWM_CHANNEL_EDGE_MODE;
00156         channelsetup[1].channelPolarity = MCPWM_CHANNEL_PASSIVE_LO;
00157         channelsetup[1].channelDeadtimeEnable = DISABLE;
00158         channelsetup[1].channelDeadtimeValue = 0;
00159         channelsetup[1].channelUpdateEnable = ENABLE;
00160         channelsetup[1].channelTimercounterValue = 0;
00161         channelsetup[1].channelPeriodValue = 300;
00162         channelsetup[1].channelPulsewidthValue = 100;
00163
00164         channelsetup[2].channelType = MCPWM_CHANNEL_EDGE_MODE;
00165         channelsetup[2].channelPolarity = MCPWM_CHANNEL_PASSIVE_LO;
00166         channelsetup[2].channelDeadtimeEnable = DISABLE;
00167         channelsetup[2].channelDeadtimeValue = 0;
00168         channelsetup[2].channelUpdateEnable = ENABLE;
00169         channelsetup[2].channelTimercounterValue = 0;
00170         channelsetup[2].channelPeriodValue = 300;
00171         channelsetup[2].channelPulsewidthValue = 200;
00172
00173         MCPWM_ConfigChannel(LPC_MCPWM, 0, &channelsetup[0]);
00174         MCPWM_ConfigChannel(LPC_MCPWM, 1, &channelsetup[1]);
00175         MCPWM_ConfigChannel(LPC_MCPWM, 2, &channelsetup[2]);
00176
00177 #if DC_MODE_TEST
00178         /*
00179          * - DC mode enabled.
00180          * - Invert Output enabled
00181          * - A0 and A1 output pin is internally routed to A0 signal
00182          */
00183         MCPWM_DCMode(LPC_MCPWM, ENABLE, ENABLE, (MCPWM_PATENT_A0|MCPWM_PATENT_A1));
00184 #endif
00185
00186 #if AC_MODE_TEST
00187         /*
00188          * - AC mode is enabled.
00189          */
00190         MCPWM_ACMode(LPC_MCPWM, ENABLE);
00191 #endif
00192
00193 #if CAPTURE_MODE_TEST
00194         /*
00195          * Capture mode in this case is used to detect the falling edge on MCO0B output pin.
00196          * The MCFB0 input pin therefore must be connected to MCO0B. (P1.20 - P1.22)
00197          * - Capture Channel 0.
00198          * - Capture falling edge on MCFB0 input pin.
00199          * - Interrupt enabled on capture event.
00200          */
00201         captureCfg.captureChannel = 0;
00202         captureCfg.captureFalling = ENABLE;
00203         captureCfg.captureRising = DISABLE;
00204         captureCfg.hnfEnable = DISABLE;
00205         captureCfg.timerReset = DISABLE;
00206         MCPWM_ConfigCapture(LPC_MCPWM, 0, &captureCfg);
00207
00208         // Reset flag for the first time
00209         CapFlag = RESET;
00210
00211         // Enable interrupt for capture event on MCI0 (MCFB0)
00212         MCPWM_IntConfig(LPC_MCPWM, MCPWM_INTFLAG_CAP0, ENABLE);
00213
00214         /* Enable interrupt for MCPWM  */
00215         NVIC_EnableIRQ(MCPWM_IRQn);
00216 #endif
00217
00218         MCPWM_Start(LPC_MCPWM, ENABLE, ENABLE, ENABLE);
00219
00220         // Main loop
00221         while (1) {
00222 //              Timer_Wait(LPC_TIM0, 1000);
00223                 //delay
00224                 for(i=0;i<100000;i++);
00225
00226                 channelsetup[0].channelPulsewidthValue = (channelsetup[0].channelPulsewidthValue >= 300) ?
00227                                                                                                 0 : channelsetup[0].channelPulsewidthValue + 20;
00228                 channelsetup[1].channelPulsewidthValue = (channelsetup[1].channelPulsewidthValue >= 300) ?
00229                                                                                                 0 : channelsetup[1].channelPulsewidthValue + 20;
00230                 channelsetup[2].channelPulsewidthValue = (channelsetup[2].channelPulsewidthValue >= 300) ?
00231                                                                                                 0 : channelsetup[2].channelPulsewidthValue + 20;
00232                 _DBG_("Update!");
00233                 MCPWM_WriteToShadow(LPC_MCPWM, 0, &channelsetup[0]);
00234                 MCPWM_WriteToShadow(LPC_MCPWM, 1, &channelsetup[1]);
00235                 MCPWM_WriteToShadow(LPC_MCPWM, 2, &channelsetup[2]);
00236 #if CAPTURE_MODE_TEST
00237                 // Check capture flag is set or not
00238                 if (CapFlag) {
00239                         // Print out the value
00240                         _DBG("Capture Value: ");
00241                         _DBD32(CapVal); _DBG_("");
00242
00243                         // Setup a new capture event
00244                         MCPWM_ConfigCapture(LPC_MCPWM, 0, &captureCfg);
00245
00246                         // Re-Enable interrupt for capture event on MCI0 (MCFB0)
00247                         MCPWM_IntConfig(LPC_MCPWM, MCPWM_INTFLAG_CAP0, ENABLE);
00248
00249                         // Reset flag
00250                         CapFlag = RESET;
00251                 }
00252 #endif
00253         }
00254 }
00255
00256 /* With ARM and GHS toolsets, the entry point is main() - this will
00257    allow the linker to generate wrapper code to setup stacks, allocate
00258    heap area, and initialize and copy code and data segments. For GNU
00259    toolsets, the entry point is through __start() in the crt0_gnu.asm
00260    file, and that startup code will setup stacks and data */
00261 int main(void)
00262 {
00263     return c_entry();
00264 }
00265
00266
00267 #ifdef  DEBUG
00268 /*******************************************************************************
00269 * @brief                Reports the name of the source file and the source line number
00270 *                               where the CHECK_PARAM error has occurred.
00271 * @param[in]    file Pointer to the source file name
00272 * @param[in]    line assert_param error line source number
00273 * @return               None
00274 *******************************************************************************/
00275 void check_failed(uint8_t *file, uint32_t line)
00276 {
00277         /* User can add his own implementation to report the file name and line number,
00278          ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
00279
00280         /* Infinite loop */
00281         while(1);
00282 }
00283 #endif
00284
00285 /*
00286  * @}
00287  */
Generated on Tue Jun 7 14:59:02 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBMassStorage/memory.c Source File

C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBMassStorage/memory.c

Go to the documentation of this file.
00001 /*----------------------------------------------------------------------------
00002  *      Name:    MEMORY.C
00003  *      Purpose: USB Mass Storage Demo
00004  *      Version: V1.10
00005  *----------------------------------------------------------------------------
00006  *      This software is supplied "AS IS" without any warranties, express,
00007  *      implied or statutory, including but not limited to the implied
00008  *      warranties of fitness for purpose, satisfactory quality and
00009  *      noninfringement. Keil extends you a royalty-free right to reproduce
00010  *      and distribute executable files created using this software for use
00011  *      on NXP Semiconductors LPC family microcontroller devices only. Nothing
00012  *      else gives you the right to use this software.
00013  *
00014  *      Copyright (c) 2005-2009 Keil Software.
00015  *---------------------------------------------------------------------------*/
00016
00017 #include "LPC17xx.h"
00018
00019 #include "lpc_types.h"
00020
00021 #include "usb.h"
00022 #include "usbcfg.h"
00023 #include "usbhw.h"
00024 #include "usbcore.h"
00025 #include "mscuser.h"
00026
00027 #include "memory.h"
00028
00029 #include "lpc17xx_libcfg.h"
00030 #include "lpc17xx_nvic.h"
00031
00032 /* Example group ----------------------------------------------------------- */
00038 extern uint8_t Memory[MSC_MemorySize];         /* MSC Memory in RAM */
00039
00040
00041 /* Main Program */
00042
00043 int main (void) {
00044         uint32_t n;
00045
00046         for (n = 0; n < MSC_ImageSize; n++) {     /* Copy Initial Disk Image */
00047                 Memory[n] = DiskImage[n];               /*   from Flash to RAM     */
00048         }
00049
00050         USB_Init();                               /* USB Initialization */
00051         USB_Connect(TRUE);                        /* USB Connect */
00052
00053         while (1);                                /* Loop forever */
00054 }
00055
00056 #ifdef  DEBUG
00057 /*******************************************************************************
00058 * @brief                Reports the name of the source file and the source line number
00059 *                               where the CHECK_PARAM error has occurred.
00060 * @param[in]    file Pointer to the source file name
00061 * @param[in]    line assert_param error line source number
00062 * @return               None
00063 *******************************************************************************/
00064 void check_failed(uint8_t *file, uint32_t line)
00065 {
00066         /* User can add his own implementation to report the file name and line number,
00067          ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
00068
00069         /* Infinite loop */
00070         while(1);
00071 }
00072 #endif
00073
00074 /*
00075  * @}
00076  */
Generated on Tue Jun 7 14:59:05 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBMassStorage/memory.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBMassStorage/memory.h

Go to the documentation of this file.
00001 /*----------------------------------------------------------------------------
00002  *      Name:    MEMORY.H
00003  *      Purpose: USB Memory Storage Demo Definitions
00004  *      Version: V1.10
00005  *----------------------------------------------------------------------------
00006  *      This file is part of the uVision/ARM development tools.
00007  *      This software may only be used under the terms of a valid, current,
00008  *      end user licence from KEIL for a compatible version of KEIL software
00009  *      development tools. Nothing else gives you the right to use it.
00010  *
00011  *      Copyright (c) 2005-2007 Keil Software.
00012  *---------------------------------------------------------------------------*/
00013
00014 #define CCLK            60000000    /* CPU Clock */
00015
00016 /* LED Definitions */
00017 #define LED_MSK         0x00FF0000  /* P1.16..23 */
00018 #define LED_RD          0x00010000  /* P1.16 */
00019 #define LED_WR          0x00020000  /* P1.17 */
00020 #define LED_CFG         0x00400000  /* P1.22 */
00021 #define LED_SUSP        0x00800000  /* P1.23 */
00022
00023 /* MSC Disk Image Definitions */
00024 #define MSC_ImageSize   0x00001000
00025
00026 extern const unsigned char DiskImage[MSC_ImageSize];   /* Disk Image */
Generated on Tue Jun 7 14:59:05 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/SSP/MicroWire/microwire_test.c Source File

C:/nxpdrv/LPC1700CMSIS/Examples/SSP/MicroWire/microwire_test.c

Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          microwire_test.c                                        2010-05-21
00003 */
00026 #include "lpc17xx_ssp.h"
00027 #include "lpc17xx_libcfg.h"
00028 #include "lpc17xx_pinsel.h"
00029 #include "debug_frmwrk.h"
00030 #include "lpc17xx_pinsel.h"
00031
00032 /* Example group ----------------------------------------------------------- */
00038 /************************** PRIVATE DEFINTIONS *************************/
00039 /* Idle char */
00040 #define IDLE_CHAR       0xFF
00041
00043 #define USEDSSPDEV_M            0
00044
00046 #define USEDSSPDEV_S            1
00047
00049 #define BUFFER_SIZE                     0x40
00050
00051 /* These macro below is used in MiroWire Frame Format.
00052  * Since master in MicroWire Frame Format must send a Operation Command
00053  * to slave before each transmission between master and slave
00054  */
00055 /* Write command */
00056 #define MicroWire_WR_CMD        ((uint8_t)(0x00))
00057 /* Read command */
00058 #define MicroWire_RD_CMD        ((uint8_t)(0x01))
00059
00060
00061 #if (USEDSSPDEV_M == USEDSSPDEV_S)
00062 #error "Master and Slave SSP device are duplicated!"
00063 #endif
00064
00065 #if (USEDSSPDEV_M == 0)
00066 #define SSPDEV_M LPC_SSP0
00067 #elif (USEDSSPDEV_M == 1)
00068 #define SSPDEV_M LPC_SSP1
00069 #elif
00070 #error "Master SSP device not defined!"
00071 #endif
00072
00073 #if (USEDSSPDEV_S == 0)
00074 #define SSPDEV_S LPC_SSP0
00075 #elif (USEDSSPDEV_S == 1)
00076 #define SSPDEV_S LPC_SSP1
00077 #elif
00078 #error "Slave SSP device not defined!"
00079 #endif
00080
00081 /* These variable below are used in Master SSP -------------------- */
00082 /* Read data pointer */
00083 uint8_t *pRdBuf_M;
00084 /* Index of read data mode */
00085 uint32_t RdIdx_M;
00086 /* Length of data */
00087 uint32_t DatLen_M;
00088 /* Master Rx Buffer */
00089 uint8_t Master_Rx_Buf[BUFFER_SIZE];
00090
00091
00092 /* These variable below are used in Slave SSP -------------------- */
00093 /* Write data pointer */
00094 uint8_t *pWrBuf_S;
00095 /* Index of write data mode */
00096 uint32_t WrIdx_S;
00097 /* Length of data */
00098 uint32_t DatLen_S;
00099 /* Slave Tx Buffer */
00100 uint8_t Slave_Tx_Buf[BUFFER_SIZE];
00101 /* Last command */
00102 uint8_t Last_cmd;
00103
00104 /************************** PRIVATE VARIABLES *************************/
00105 uint8_t menu1[] =
00106 "********************************************************************************\n\r"
00107 "Hello NXP Semiconductors \n\r"
00108 "SSP demo \n\r"
00109 "\t - MCU: LPC17xx \n\r"
00110 "\t - Core: ARM Cortex-M3 \n\r"
00111 "\t - Communicate via: UART0 - 115200 bps \n\r"
00112 " This example uses two SSP peripherals in MicroWire frame format \n\r"
00113 " \t one is set as master mode and the other is set as slave mode. \n\r"
00114 "\t The master and slave transfer a number of data bytes together \n\r"
00115 "\t in polling mode \n\r"
00116 "********************************************************************************\n\r";
00117
00118 // SSP Configuration structure variable
00119 SSP_CFG_Type SSP_ConfigStruct;
00120
00121 /************************** PRIVATE FUNCTIONS *************************/
00122 void ssp_MW_SendCMD(LPC_SSP_TypeDef *SSPx, uint8_t cmd);
00123 uint16_t ssp_MW_GetRSP(LPC_SSP_TypeDef *SSPx);
00124 uint8_t ssp_MW_GetCMD(LPC_SSP_TypeDef *SSPx);
00125 void ssp_MW_SendRSP(LPC_SSP_TypeDef *SSPx, uint16_t Rsp);
00126 void print_menu(void);
00127 void Buffer_Init(void);
00128 void Buffer_Verify(void);
00129 void Error_Loop(void);
00130
00131 /*-------------------------PRIVATE FUNCTIONS------------------------------*/
00132 /*********************************************************************/
00137 void ssp_MW_SendCMD(LPC_SSP_TypeDef *SSPx, uint8_t cmd)
00138 {
00139         // wait for current SSP activity complete
00140         while (SSP_GetStatus(SSPx, SSP_STAT_BUSY) ==  SET);
00141
00142         SSP_SendData(SSPx, (uint16_t) cmd);
00143 }
00144
00145 /*********************************************************************/
00150 uint16_t ssp_MW_GetRSP(LPC_SSP_TypeDef *SSPx)
00151 {
00152         while (SSP_GetStatus(SSPx, SSP_STAT_RXFIFO_NOTEMPTY) == RESET);
00153         return (SSP_ReceiveData(SSPx));
00154 }
00155
00156 /*********************************************************************/
00161 uint8_t ssp_MW_GetCMD(LPC_SSP_TypeDef *SSPx)
00162 {
00163         // Wait for coming CMD
00164         while (SSP_GetStatus(SSPx, SSP_STAT_RXFIFO_NOTEMPTY) == RESET);
00165
00166         return ((uint8_t)(SSP_ReceiveData(SSPx)));
00167 }
00168
00169 /*********************************************************************/
00174 void ssp_MW_SendRSP(LPC_SSP_TypeDef *SSPx, uint16_t Rsp)
00175 {
00176         // wait for current SSP activity complete
00177         while (SSP_GetStatus(SSPx, SSP_STAT_BUSY) ==  SET);
00178
00179         SSP_SendData(SSPx, Rsp);
00180 }
00181
00182 /*********************************************************************/
00187 void Buffer_Init(void)
00188 {
00189         uint8_t i;
00190
00191         for (i = 0; i < BUFFER_SIZE; i++) {
00192                 Slave_Tx_Buf[i] = i;
00193                 Master_Rx_Buf[i] = 0;
00194         }
00195
00196 }
00197
00198 /*********************************************************************/
00203 void Buffer_Verify(void)
00204 {
00205         uint8_t i;
00206         uint8_t *pSTx = (uint8_t *) &Slave_Tx_Buf[0];
00207         uint8_t *pMRx = (uint8_t *) &Master_Rx_Buf[0];
00208
00209         for ( i = 0; i < BUFFER_SIZE; i++ )
00210         {
00211                 if (*pMRx++ != *pSTx++)
00212                 {
00213                         /* Call Error Loop */
00214                         Error_Loop();
00215                 }
00216         }
00217 }
00218
00219 /*********************************************************************/
00224 void Error_Loop(void)
00225 {
00226         /* Loop forever */
00227         _DBG_("Verify fail!\n\r");
00228         while (1);
00229 }
00230
00231 /*********************************************************************/
00236 void print_menu(void)
00237 {
00238         _DBG(menu1);
00239 }
00240
00241
00242 /*-------------------------MAIN FUNCTION------------------------------*/
00243 /*********************************************************************/
00248 int c_entry(void)
00249 {
00250         uint32_t cnt;
00251         PINSEL_CFG_Type PinCfg;
00252
00253         /* Initialize debug via UART0
00254          * – 115200bps
00255          * – 8 data bit
00256          * – No parity
00257          * – 1 stop bit
00258          * – No flow control
00259          */
00260         debug_frmwrk_init();
00261
00262         // print welcome screen
00263         print_menu();
00264
00265         /*
00266          * Initialize SSP pin connect
00267          * P0.6 - SSEL1
00268          * P0.7 - SCK1
00269          * P0.8 - MISO1
00270          * P0.9 - MOSI1
00271          */
00272         PinCfg.Funcnum = 2;
00273         PinCfg.OpenDrain = 0;
00274         PinCfg.Pinmode = 0;
00275         PinCfg.Portnum = 0;
00276         PinCfg.Pinnum = 6;
00277         PINSEL_ConfigPin(&PinCfg);
00278         PinCfg.Pinnum = 7;
00279         PINSEL_ConfigPin(&PinCfg);
00280         PinCfg.Pinnum = 8;
00281         PINSEL_ConfigPin(&PinCfg);
00282         PinCfg.Pinnum = 9;
00283         PINSEL_ConfigPin(&PinCfg);
00284
00285
00286         /*
00287          * Initialize SSP pin connect
00288          * P0.15 - SCK
00289          * P0.16 - SSEL
00290          * P0.17 - MISO
00291          * P0.18 - MOSI
00292          */
00293         PinCfg.Funcnum = 2;
00294         PinCfg.OpenDrain = 0;
00295         PinCfg.Pinmode = 0;
00296         PinCfg.Portnum = 0;
00297         PinCfg.Pinnum = 15;
00298         PINSEL_ConfigPin(&PinCfg);
00299         PinCfg.Pinnum = 17;
00300         PINSEL_ConfigPin(&PinCfg);
00301         PinCfg.Pinnum = 18;
00302         PINSEL_ConfigPin(&PinCfg);
00303         PinCfg.Pinnum = 16;
00304         PINSEL_ConfigPin(&PinCfg);
00305
00306
00307         /* Initializing Master SSP device section ------------------------------------------- */
00308         // initialize SSP configuration structure to default
00309         SSP_ConfigStructInit(&SSP_ConfigStruct);
00310         // Re-configure SSP to MicroWire frame format
00311         SSP_ConfigStruct.FrameFormat = SSP_FRAME_MICROWIRE;
00312         // Initialize SSP peripheral with parameter given in structure above
00313         SSP_Init(SSPDEV_M, &SSP_ConfigStruct);
00314
00315         // Enable SSP peripheral
00316         SSP_Cmd(SSPDEV_M, ENABLE);
00317
00318
00319     /* Initializing Slave SSP device section ------------------------------------------- */
00320         // initialize SSP configuration structure to default
00321         SSP_ConfigStructInit(&SSP_ConfigStruct);
00322         /* Re-configure mode for SSP device */
00323         SSP_ConfigStruct.Mode = SSP_SLAVE_MODE;
00324         // Re-configure SSP to MicroWire frame format
00325         SSP_ConfigStruct.FrameFormat = SSP_FRAME_MICROWIRE;
00326         // Initialize SSP peripheral with parameter given in structure above
00327         SSP_Init(SSPDEV_S, &SSP_ConfigStruct);
00328
00329         // Enable SSP peripheral
00330         SSP_Cmd(SSPDEV_S, ENABLE);
00331
00332
00333         /* Initializing Buffer section ------------------------------------------------- */
00334         Buffer_Init();
00335
00336         /* Start Transmit/Receive between Master and Slave ----------------------------- */
00337         pRdBuf_M = (uint8_t *)&Master_Rx_Buf[0];
00338         RdIdx_M = 0;
00339         DatLen_M = BUFFER_SIZE;
00340         pWrBuf_S = (uint8_t *)&Slave_Tx_Buf[0];
00341         WrIdx_S = 0;
00342         DatLen_S = BUFFER_SIZE;
00343         /* Force Last command to Read command as default */
00344         Last_cmd = MicroWire_RD_CMD;
00345
00346         /* Clear all remaining data in RX FIFO */
00347         while (SSP_GetStatus(SSPDEV_M, SSP_STAT_RXFIFO_NOTEMPTY))
00348         {
00349                 SSP_ReceiveData(SSPDEV_M);
00350         }
00351         while (SSP_GetStatus(SSPDEV_S, SSP_STAT_RXFIFO_NOTEMPTY))
00352         {
00353                 SSP_ReceiveData(SSPDEV_S);
00354         }
00355
00356         for (cnt = 0; cnt < BUFFER_SIZE; cnt++)
00357         {
00358                 /* The slave must initialize data in FIFO for immediately transfer from master
00359                  * due to last received command
00360                  */
00361                 if (Last_cmd == MicroWire_RD_CMD)
00362                 {
00363                         // Then send the respond to master, this contains data
00364                         ssp_MW_SendRSP(SSPDEV_S, (uint16_t) *(pWrBuf_S + WrIdx_S++));
00365                 }
00366                 else
00367                 {
00368                         // Then send the respond to master, this contains data
00369                         ssp_MW_SendRSP(SSPDEV_S, 0xFF);
00370                 }
00371                 /* Master must send a read command to slave,
00372                  * the slave then respond with its data in FIFO
00373                  */
00374                 ssp_MW_SendCMD(SSPDEV_M, MicroWire_RD_CMD);
00375
00376                 // Master receive respond
00377                 *(pRdBuf_M + RdIdx_M++) = (uint8_t) ssp_MW_GetRSP(SSPDEV_M);
00378
00379                 // Re-assign Last command
00380                 Last_cmd = ssp_MW_GetCMD(SSPDEV_S);
00381         }
00382
00383         /* Verify buffer */
00384         Buffer_Verify();
00385
00386         _DBG_("Verify success!\n\r");
00387
00388     /* Loop forever */
00389     while(1);
00390     return 1;
00391 }
00392
00393 /* With ARM and GHS toolsets, the entry point is main() - this will
00394    allow the linker to generate wrapper code to setup stacks, allocate
00395    heap area, and initialize and copy code and data segments. For GNU
00396    toolsets, the entry point is through __start() in the crt0_gnu.asm
00397    file, and that startup code will setup stacks and data */
00398 int main(void)
00399 {
00400     return c_entry();
00401 }
00402
00403
00404 #ifdef  DEBUG
00405 /*******************************************************************************
00406 * @brief                Reports the name of the source file and the source line number
00407 *                               where the CHECK_PARAM error has occurred.
00408 * @param[in]    file Pointer to the source file name
00409 * @param[in]    line assert_param error line source number
00410 * @return               None
00411 *******************************************************************************/
00412 void check_failed(uint8_t *file, uint32_t line)
00413 {
00414         /* User can add his own implementation to report the file name and line number,
00415          ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
00416
00417         /* Infinite loop */
00418         while(1);
00419 }
00420 #endif
00421
00422 /*
00423  * @}
00424  */
Generated on Tue Jun 7 14:59:02 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/Cortex-M3/MPU/mpu_test.c Source File

C:/nxpdrv/LPC1700CMSIS/Examples/Cortex-M3/MPU/mpu_test.c

Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          dac_speaker.c                           2010-07-16
00003 */
00025 #include "lpc17xx_libcfg.h"
00026 #include "lpc17xx_pinsel.h"
00027 #include "debug_frmwrk.h"
00028 #include "lpc17xx_gpio.h"
00029
00030 /************************** PUBLIC DEFINITIONS *************************/
00031 /* Region size definitions */
00032 #define MPU_REGION_SIZE_32B             0x04
00033 #define MPU_REGION_SIZE_64B             0x05
00034 #define MPU_REGION_SIZE_128B    0x06
00035 #define MPU_REGION_SIZE_256B    0x07
00036 #define MPU_REGION_SIZE_512B    0x08
00037 #define MPU_REGION_SIZE_1KB             0x09
00038 #define MPU_REGION_SIZE_2KB             0x0A
00039 #define MPU_REGION_SIZE_4KB             0x0B
00040 #define MPU_REGION_SIZE_8KB             0x0C
00041 #define MPU_REGION_SIZE_16KB    0x0D
00042 #define MPU_REGION_SIZE_32KB    0x0E
00043 #define MPU_REGION_SIZE_64KB    0x0F
00044 #define MPU_REGION_SIZE_128KB   0x10
00045 #define MPU_REGION_SIZE_256KB   0x11
00046 #define MPU_REGION_SIZE_512KB   0x12
00047 #define MPU_REGION_SIZE_1MB             0x13
00048 #define MPU_REGION_SIZE_2MB             0x14
00049 #define MPU_REGION_SIZE_4MB             0x15
00050 #define MPU_REGION_SIZE_8MB             0x16
00051 #define MPU_REGION_SIZE_16MB    0x17
00052 #define MPU_REGION_SIZE_32MB    0x18
00053 #define MPU_REGION_SIZE_64MB    0x19
00054 #define MPU_REGION_SIZE_128MB   0x1A
00055 #define MPU_REGION_SIZE_256MB   0x1B
00056 #define MPU_REGION_SIZE_512MB   0x1C
00057 #define MPU_REGION_SIZE_1GB             0x1D
00058 #define MPU_REGION_SIZE_2GB             0x1E
00059 #define MPU_REGION_SIZE_4GB             0x1F
00060
00061 /* Access permission definitions */
00062 #define MPU_NO_ACCESS                                                   0x00
00063 #define MPU_PRIVILEGED_ACESS_USER_NO_ACCESS             0x01
00064 #define MPU_PRIVILEGED_RW_USER_READ_ONLY                0x02
00065 #define MPU_FULL_ACCESS                                                 0x03
00066 #define MPU_UNPREDICTABLE                                               0x04
00067 #define MPU_PRIVILEGED_READ_ONLY_USER_NO_ACCESS 0x05
00068 #define MPU_READ_ONLY                                                   0x06
00069
00070 /* RASR bit definitions */
00071 #define MPU_RASR_REGION_SIZE(n)                 ((uint32_t)(n<<1))
00072 #define MPU_RASR_ACCESS_PERMISSION(n)   ((uint32_t)(n<<24))
00073 #define MPU_REGION_ENABLE                               ((uint32_t)(1<<0))
00074
00075 /* Example group ----------------------------------------------------------- */
00080 /************************** PRIVATE VARIABLES *************************/
00081 uint8_t menu[]=
00082         "********************************************************************************\n\r"
00083         "Hello NXP Semiconductors \n\r"
00084         "MPU demo \n\r"
00085         "\t - MCU: LPC17xx \n\r"
00086         "\t - Core: ARM CORTEX-M3 \n\r"
00087         "\t - Communicate via: UART0 - 115200 bps \n\r"
00088         "Set up 6 region memory and try to access memory that don't allow to invoke\n\r"
00089         "Memory Management Handler\n\r"
00090         "********************************************************************************\n\r";
00091 Bool Led_State = FALSE;
00092
00093 /************************** PRIVATE FUNCTIONS *************************/
00094 void MemManage_Handler(void);
00095
00096 /*----------------- INTERRUPT SERVICE ROUTINES --------------------------*/
00097 /*********************************************************************/
00102 void MemManage_Handler(void)
00103 {
00104         uint32_t i;
00105         //Blink LED P1.28
00106         if(Led_State == FALSE)
00107         {
00108                 GPIO_SetValue(1,(1<<28));
00109                 Led_State = TRUE;
00110                 for(i = 0;i<0x70000;i++);//delay
00111         }
00112         else
00113         {
00114                 GPIO_ClearValue(1,(1<<28));
00115                 Led_State = FALSE;
00116                 for(i = 0;i<0x70000;i++);//delay
00117         }
00118 }
00119
00120 /*-------------------------MAIN FUNCTION------------------------------*/
00121 /*********************************************************************/
00126 int c_entry(void)
00127 {
00128         uint32_t test;
00129         /* Initialize debug via UART0
00130          * – 115200bps
00131          * – 8 data bit
00132          * – No parity
00133          * – 1 stop bit
00134          * – No flow control
00135          */
00136         debug_frmwrk_init();
00137         _DBG(menu);
00138
00139         //Turn off all LEDs
00140         GPIO_SetDir(1,(1<<28)|(1<<29)|(1<<31),1);
00141         GPIO_SetDir(2,(1<<2)|(1<<3)|(1<<4)|(1<<5)|(1<<6),1);
00142
00143
00144         /* - Region 0: 0x00000000 - 0x0007FFFF --- on-chip non-volatile memory
00145          *              + Size: 512kB
00146          *              + Acess permission: full access
00147          */
00148         MPU->RNR = 0;//indicate MPU region 0
00149         MPU->RBAR = 0x00000000; // update the base address for the region 0
00150         MPU->RASR = MPU_RASR_ACCESS_PERMISSION(MPU_FULL_ACCESS)         //full access
00151                                 |MPU_RASR_REGION_SIZE(MPU_REGION_SIZE_512KB)    //512Kb size
00152                                 |MPU_REGION_ENABLE;                                                             //region enable
00153
00154         /* - Region 1: 0x10000000 - 0x10007FFF --- on-chip SRAM
00155          *              + Size: 32kB
00156          *              + Access permission: full access
00157          */
00158         MPU->RNR = 1;
00159         MPU->RBAR = 0x10000000; // update the base address for the region 1
00160         MPU->RASR = MPU_RASR_ACCESS_PERMISSION(MPU_FULL_ACCESS)
00161                                 |MPU_RASR_REGION_SIZE(MPU_REGION_SIZE_32KB)
00162                                 |MPU_REGION_ENABLE;
00163
00164          /* - Region 2: 0x40000000 - 0x400FFFFF --- APB peripheral
00165          *              + Size: 1MB
00166          *              + Access permission: full access
00167          */
00168         MPU->RNR = 2;
00169         MPU->RBAR = 0x40000000; // update the base address for the region 2
00170         MPU->RASR = MPU_RASR_ACCESS_PERMISSION(MPU_FULL_ACCESS)
00171                                 |MPU_RASR_REGION_SIZE(MPU_REGION_SIZE_1MB)
00172                                 |MPU_REGION_ENABLE;
00173
00174          /* - Region 3: 0x50000000 - 0x501FFFFF --- AHB peripheral
00175          *              + Size: 2MB
00176          *              + AP=b011: full access
00177          */
00178         MPU->RNR = 3;
00179         MPU->RBAR = 0x50000000; // update the base address for the region 3
00180         MPU->RASR = MPU_RASR_ACCESS_PERMISSION(MPU_FULL_ACCESS)
00181                                 |MPU_RASR_REGION_SIZE(MPU_REGION_SIZE_2MB)
00182                                 |MPU_REGION_ENABLE;
00183
00184          /* - Region 4: 0xE0000000 - 0xE00FFFFF --- System control
00185          *              + Size: 1MB
00186          *              + Access permission: full access
00187          */
00188         MPU->RNR = 4;
00189         MPU->RBAR = 0xE0000000; // update the base address for the region 4
00190         MPU->RASR = MPU_RASR_ACCESS_PERMISSION(MPU_FULL_ACCESS)
00191                                 |MPU_RASR_REGION_SIZE(MPU_REGION_SIZE_1MB)
00192                                 |MPU_REGION_ENABLE;
00193
00194          /* - Region 5:0x2007C000 - 0x2007FFFF --- on chip SRAM
00195          *              + Size: 16kB
00196          *              + Access permission: full access
00197          */
00198         MPU->RNR = 5;
00199         MPU->RBAR = 0x2007C000; // update the base address for the region 5
00200         MPU->RASR = MPU_RASR_ACCESS_PERMISSION(MPU_FULL_ACCESS)
00201                                 |MPU_RASR_REGION_SIZE(MPU_REGION_SIZE_16KB)
00202                                 |MPU_REGION_ENABLE;
00203
00204          /* - Region 6: 0x20080000 - 0x20083FFF --- on chip SRAM
00205          *              + Size: 16kB
00206          *              + Access permission: no access
00207          */
00208         MPU->RNR = 6;
00209         MPU->RBAR = 0x20080000; // update the base address for the region 6
00210         MPU->RASR = MPU_RASR_ACCESS_PERMISSION(MPU_NO_ACCESS)
00211                                 |MPU_RASR_REGION_SIZE(MPU_REGION_SIZE_16KB)
00212                                 |MPU_REGION_ENABLE;
00213
00214          /* - Region 5:0x2009C000 - 0x2009FFFF --- GPIO peripheral
00215          *              + Size: 16kB
00216          *              + Access permission: full access
00217          */
00218         MPU->RNR = 7;
00219         MPU->RBAR = 0x2009C000; // update the base address for the region 6
00220         MPU->RASR = MPU_RASR_ACCESS_PERMISSION(MPU_FULL_ACCESS)
00221                                 |MPU_RASR_REGION_SIZE(MPU_REGION_SIZE_16KB)
00222                                 |MPU_REGION_ENABLE;
00223
00224
00225         _DBG_("Setup MPU: \n\r"
00226                   "This provide 8 regions: \n\r"
00227                   "Region 0 - Privileged code: 0x00000000 - 0x0007FFFF(512kB)\n\r"
00228                   "Region 1 - Privileged data: 0x10000000 - 0x10007FFF(32kB)\n\r"
00229                   "Region 2 - APB Peripheral:  0x40000000 - 0x400FFFFF(1MB)\n\r"
00230                   "Region 3 - AHB peripheral:  0x50000000 - 0x501FFFFF(2MB)\n\r"
00231                   "Region 4 - System control:  0xE0000000 - 0xE00FFFFF(1MB)\n\r"
00232                   "Region 5 - On-chip SRAM:    0x2007C000 - 0x2007FFFF(16kB)\n\r"
00233                   "Region 6 - Private SRAM:    0x20080000 - 0x20083FFF(16kB)\n\r"
00234                   "Region 7 - GPIO peripheral: 0x2009C000 - 0x2009FFFF(16Kb)\n\r"
00235                   "Region 6 can not access (just used for testing)");
00236
00237         SCB->SHCSR |=(1<<16); //Enable Memory management fault
00238         MPU->CTRL =(1<<0); //Enable the MPU
00239         _DBG_("Enable MPU!");
00240
00241         //try to access to this memory range
00242         _DBG_("Press '1' to try to read memory from region 1");
00243         while(_DG !='1');
00244         test = (*(unsigned int *)0x10000000);
00245         _DBG_("Read successful!!!");
00246
00247         _DBG_("Press '2' to try to read memory from region 6\n\r"
00248                   "Read memory at this region is not allow, LED p1.28 will blink...");
00249         while(_DG !='2');
00250         test = (*(unsigned int *)0x20080004);
00251         test++;
00252
00253         while(test);
00254         return 1;
00255 }
00256
00257 /* With ARM and GHS toolsets, the entry point is main() - this will
00258    allow the linker to generate wrapper code to setup stacks, allocate
00259    heap area, and initialize and copy code and data segments. For GNU
00260    toolsets, the entry point is through __start() in the crt0_gnu.asm
00261    file, and that startup code will setup stacks and data */
00262 int main(void)
00263 {
00264     return c_entry();
00265 }
00266
00267 #ifdef  DEBUG
00268 /*******************************************************************************
00269 * @brief                Reports the name of the source file and the source line number
00270 *                               where the CHECK_PARAM error has occurred.
00271 * @param[in]    file Pointer to the source file name
00272 * @param[in]    line assert_param error line source number
00273 * @return               None
00274 *******************************************************************************/
00275 void check_failed(uint8_t *file, uint32_t line)
00276 {
00277         /* User can add his own implementation to report the file name and line number,
00278          ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
00279
00280         /* Infinite loop */
00281         while(1);
00282 }
00283 #endif
00284
00285 /*
00286  * @}
00287  */
Generated on Tue Jun 7 14:58:59 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBMassStorage/msc.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBMassStorage/msc.h

Go to the documentation of this file.
00001 /*----------------------------------------------------------------------------
00002  *      U S B  -  K e r n e l
00003  *----------------------------------------------------------------------------
00004  *      Name:    MSC.H
00005  *      Purpose: USB Mass Storage Class Definitions
00006  *      Version: V1.10
00007  *----------------------------------------------------------------------------
00008  *      This software is supplied "AS IS" without any warranties, express,
00009  *      implied or statutory, including but not limited to the implied
00010  *      warranties of fitness for purpose, satisfactory quality and
00011  *      noninfringement. Keil extends you a royalty-free right to reproduce
00012  *      and distribute executable files created using this software for use
00013  *      on NXP Semiconductors LPC family microcontroller devices only. Nothing
00014  *      else gives you the right to use this software.
00015  *
00016  *      Copyright (c) 2005-2009 Keil Software.
00017  *---------------------------------------------------------------------------*/
00018
00019 #ifndef __MSC_H__
00020 #define __MSC_H__
00021
00022
00023 #if defined   (  __GNUC__  )
00024 #define __packed __attribute__((__packed__))
00025 #endif
00026
00027
00028 /* MSC Subclass Codes */
00029 #define MSC_SUBCLASS_RBC                0x01
00030 #define MSC_SUBCLASS_SFF8020I_MMC2      0x02
00031 #define MSC_SUBCLASS_QIC157             0x03
00032 #define MSC_SUBCLASS_UFI                0x04
00033 #define MSC_SUBCLASS_SFF8070I           0x05
00034 #define MSC_SUBCLASS_SCSI               0x06
00035
00036 /* MSC Protocol Codes */
00037 #define MSC_PROTOCOL_CBI_INT            0x00
00038 #define MSC_PROTOCOL_CBI_NOINT          0x01
00039 #define MSC_PROTOCOL_BULK_ONLY          0x50
00040
00041
00042 /* MSC Request Codes */
00043 #define MSC_REQUEST_RESET               0xFF
00044 #define MSC_REQUEST_GET_MAX_LUN         0xFE
00045
00046
00047 /* MSC Bulk-only Stage */
00048 #define MSC_BS_CBW                      0       /* Command Block Wrapper */
00049 #define MSC_BS_DATA_OUT                 1       /* Data Out Phase */
00050 #define MSC_BS_DATA_IN                  2       /* Data In Phase */
00051 #define MSC_BS_DATA_IN_LAST             3       /* Data In Last Phase */
00052 #define MSC_BS_DATA_IN_LAST_STALL       4       /* Data In Last Phase with Stall */
00053 #define MSC_BS_CSW                      5       /* Command Status Wrapper */
00054 #define MSC_BS_ERROR                    6       /* Error */
00055
00056
00057 /* Bulk-only Command Block Wrapper */
00058 #if defined     (  __CC_ARM  )
00059 typedef __packed struct _MSC_CBW {
00060 #elif defined   (  __GNUC__  )
00061 typedef struct __packed _MSC_CBW {
00062 #elif defined   (  __IAR_SYSTEMS_ICC__  )
00063 typedef __packed struct _MSC_CBW {
00064 #endif
00065   uint32_t dSignature;
00066   uint32_t dTag;
00067   uint32_t dDataLength;
00068   uint8_t  bmFlags;
00069   uint8_t  bLUN;
00070   uint8_t  bCBLength;
00071   uint8_t  CB[16];
00072 } MSC_CBW;
00073
00074 /* Bulk-only Command Status Wrapper */
00075 #if defined     (  __CC_ARM  )
00076 typedef __packed struct _MSC_CSW {
00077 #elif defined   (  __GNUC__  )
00078 typedef struct __packed _MSC_CSW {
00079 #elif defined   (  __IAR_SYSTEMS_ICC__  )
00080 typedef __packed struct _MSC_CSW {
00081 #endif
00082   uint32_t dSignature;
00083   uint32_t dTag;
00084   uint32_t dDataResidue;
00085   uint8_t  bStatus;
00086 } MSC_CSW;
00087
00088 #define MSC_CBW_Signature               0x43425355
00089 #define MSC_CSW_Signature               0x53425355
00090
00091
00092 /* CSW Status Definitions */
00093 #define CSW_CMD_PASSED                  0x00
00094 #define CSW_CMD_FAILED                  0x01
00095 #define CSW_PHASE_ERROR                 0x02
00096
00097
00098 /* SCSI Commands */
00099 #define SCSI_TEST_UNIT_READY            0x00
00100 #define SCSI_REQUEST_SENSE              0x03
00101 #define SCSI_FORMAT_UNIT                0x04
00102 #define SCSI_INQUIRY                    0x12
00103 #define SCSI_MODE_SELECT6               0x15
00104 #define SCSI_MODE_SENSE6                0x1A
00105 #define SCSI_START_STOP_UNIT            0x1B
00106 #define SCSI_MEDIA_REMOVAL              0x1E
00107 #define SCSI_READ_FORMAT_CAPACITIES     0x23
00108 #define SCSI_READ_CAPACITY              0x25
00109 #define SCSI_READ10                     0x28
00110 #define SCSI_WRITE10                    0x2A
00111 #define SCSI_VERIFY10                   0x2F
00112 #define SCSI_MODE_SELECT10              0x55
00113 #define SCSI_MODE_SENSE10               0x5A
00114
00115
00116 #endif  /* __MSC_H__ */
Generated on Tue Jun 7 14:59:05 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBMassStorage/mscuser.c Source File

C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBMassStorage/mscuser.c

Go to the documentation of this file.
00001 /*----------------------------------------------------------------------------
00002  *      U S B  -  K e r n e l
00003  *----------------------------------------------------------------------------
00004  *      Name:    MSCUSER.C
00005  *      Purpose: Mass Storage Class Custom User Module
00006  *      Version: V1.10
00007  *----------------------------------------------------------------------------
00008  *      This software is supplied "AS IS" without any warranties, express,
00009  *      implied or statutory, including but not limited to the implied
00010  *      warranties of fitness for purpose, satisfactory quality and
00011  *      noninfringement. Keil extends you a royalty-free right to reproduce
00012  *      and distribute executable files created using this software for use
00013  *      on NXP Semiconductors LPC family microcontroller devices only. Nothing
00014  *      else gives you the right to use this software.
00015  *
00016  *      Copyright (c) 2005-2009 Keil Software.
00017  *---------------------------------------------------------------------------*/
00018
00019 #include "LPC17xx.h"
00020
00021 #include "lpc_types.h"
00022
00023 #include "usb.h"
00024 #include "msc.h"
00025 #include "usbcfg.h"
00026 #include "usbhw.h"
00027 #include "usbcore.h"
00028 #include "mscuser.h"
00029
00030 #include "memory.h"
00031
00032
00033 uint8_t  Memory[MSC_MemorySize];  /* MSC RAM */
00034
00035 uint32_t  MemOK;                   /* Memory OK */
00036
00037 uint32_t Offset;                  /* R/W Offset */
00038 uint32_t Length;                  /* R/W Length */
00039
00040 uint8_t  BulkStage;               /* Bulk Stage */
00041
00042 uint8_t  BulkBuf[MSC_MAX_PACKET]; /* Bulk In/Out Buffer */
00043 uint8_t  BulkLen;                 /* Bulk In/Out Length */
00044
00045 MSC_CBW CBW;                   /* Command Block Wrapper */
00046 MSC_CSW CSW;                   /* Command Status Wrapper */
00047
00048
00049 /*
00050  *  MSC Mass Storage Reset Request Callback
00051  *   Called automatically on Mass Storage Reset Request
00052  *    Parameters:      None (global SetupPacket and EP0Buf)
00053  *    Return Value:    TRUE - Success, FALSE - Error
00054  */
00055
00056 uint32_t MSC_Reset (void) {
00057
00058   BulkStage = MSC_BS_CBW;
00059   return (TRUE);
00060 }
00061
00062
00063 /*
00064  *  MSC Get Max LUN Request Callback
00065  *   Called automatically on Get Max LUN Request
00066  *    Parameters:      None (global SetupPacket and EP0Buf)
00067  *    Return Value:    TRUE - Success, FALSE - Error
00068  */
00069
00070 uint32_t MSC_GetMaxLUN (void) {
00071
00072   EP0Buf[0] = 0;               /* No LUN associated with this device */
00073   return (TRUE);
00074 }
00075
00076
00077 /*
00078  *  MSC Memory Read Callback
00079  *   Called automatically on Memory Read Event
00080  *    Parameters:      None (global variables)
00081  *    Return Value:    None
00082  */
00083
00084 void MSC_MemoryRead (void) {
00085   uint32_t n;
00086
00087   if (Length > MSC_MAX_PACKET) {
00088     n = MSC_MAX_PACKET;
00089   } else {
00090     n = Length;
00091   }
00092
00093   if ((Offset + n) > MSC_MemorySize) {
00094     n = MSC_MemorySize - Offset;
00095     BulkStage = MSC_BS_DATA_IN_LAST_STALL;
00096   }
00097
00098   USB_WriteEP(MSC_EP_IN, &Memory[Offset], n);
00099   Offset += n;
00100   Length -= n;
00101
00102   CSW.dDataResidue -= n;
00103
00104   if (Length == 0) {
00105     BulkStage = MSC_BS_DATA_IN_LAST;
00106   }
00107
00108   if (BulkStage != MSC_BS_DATA_IN) {
00109     CSW.bStatus = CSW_CMD_PASSED;
00110   }
00111 }
00112
00113
00114 /*
00115  *  MSC Memory Write Callback
00116  *   Called automatically on Memory Write Event
00117  *    Parameters:      None (global variables)
00118  *    Return Value:    None
00119  */
00120
00121 void MSC_MemoryWrite (void) {
00122   uint32_t n;
00123
00124   if ((Offset + BulkLen) > MSC_MemorySize) {
00125     BulkLen = MSC_MemorySize - Offset;
00126     BulkStage = MSC_BS_CSW;
00127     USB_SetStallEP(MSC_EP_OUT);
00128   }
00129
00130   for (n = 0; n < BulkLen; n++) {
00131     Memory[Offset + n] = BulkBuf[n];
00132   }
00133
00134   Offset += BulkLen;
00135   Length -= BulkLen;
00136
00137   CSW.dDataResidue -= BulkLen;
00138
00139   if ((Length == 0) || (BulkStage == MSC_BS_CSW)) {
00140     CSW.bStatus = CSW_CMD_PASSED;
00141     MSC_SetCSW();
00142   }
00143 }
00144
00145
00146 /*
00147  *  MSC Memory Verify Callback
00148  *   Called automatically on Memory Verify Event
00149  *    Parameters:      None (global variables)
00150  *    Return Value:    None
00151  */
00152
00153 void MSC_MemoryVerify (void) {
00154   uint32_t n;
00155
00156   if ((Offset + BulkLen) > MSC_MemorySize) {
00157     BulkLen = MSC_MemorySize - Offset;
00158     BulkStage = MSC_BS_CSW;
00159     USB_SetStallEP(MSC_EP_OUT);
00160   }
00161
00162   for (n = 0; n < BulkLen; n++) {
00163     if (Memory[Offset + n] != BulkBuf[n]) {
00164       MemOK = FALSE;
00165       break;
00166     }
00167   }
00168
00169   Offset += BulkLen;
00170   Length -= BulkLen;
00171
00172   CSW.dDataResidue -= BulkLen;
00173
00174   if ((Length == 0) || (BulkStage == MSC_BS_CSW)) {
00175     CSW.bStatus = (MemOK) ? CSW_CMD_PASSED : CSW_CMD_FAILED;
00176     MSC_SetCSW();
00177   }
00178 }
00179
00180
00181 /*
00182  *  MSC SCSI Read/Write Setup Callback
00183  *    Parameters:      None (global variables)
00184  *    Return Value:    TRUE - Success, FALSE - Error
00185  */
00186
00187 uint32_t MSC_RWSetup (void) {
00188   uint32_t n;
00189
00190   /* Logical Block Address of First Block */
00191   n = (CBW.CB[2] << 24) |
00192       (CBW.CB[3] << 16) |
00193       (CBW.CB[4] <<  8) |
00194       (CBW.CB[5] <<  0);
00195
00196   Offset = n * MSC_BlockSize;
00197
00198   /* Number of Blocks to transfer */
00199   n = (CBW.CB[7] <<  8) |
00200       (CBW.CB[8] <<  0);
00201
00202   Length = n * MSC_BlockSize;
00203
00204   if (CBW.dDataLength != Length) {
00205     USB_SetStallEP(MSC_EP_IN);
00206     USB_SetStallEP(MSC_EP_OUT);
00207     CSW.bStatus = CSW_PHASE_ERROR;
00208     MSC_SetCSW();
00209     return (FALSE);
00210   }
00211
00212   return (TRUE);
00213 }
00214
00215
00216 /*
00217  *  Check Data IN Format
00218  *    Parameters:      None (global variables)
00219  *    Return Value:    TRUE - Success, FALSE - Error
00220  */
00221
00222 uint32_t DataInFormat (void) {
00223
00224   if (CBW.dDataLength == 0) {
00225     CSW.bStatus = CSW_PHASE_ERROR;
00226     MSC_SetCSW();
00227     return (FALSE);
00228   }
00229   if ((CBW.bmFlags & 0x80) == 0) {
00230     USB_SetStallEP(MSC_EP_OUT);
00231     CSW.bStatus = CSW_PHASE_ERROR;
00232     MSC_SetCSW();
00233     return (FALSE);
00234   }
00235   return (TRUE);
00236 }
00237
00238
00239 /*
00240  *  Perform Data IN Transfer
00241  *    Parameters:      None (global variables)
00242  *    Return Value:    TRUE - Success, FALSE - Error
00243  */
00244
00245 void DataInTransfer (void) {
00246
00247   if (BulkLen > CBW.dDataLength) {
00248     BulkLen = CBW.dDataLength;
00249   }
00250
00251   USB_WriteEP(MSC_EP_IN, BulkBuf, BulkLen);
00252   BulkStage = MSC_BS_DATA_IN_LAST;
00253
00254   CSW.dDataResidue -= BulkLen;
00255   CSW.bStatus = CSW_CMD_PASSED;
00256 }
00257
00258
00259 /*
00260  *  MSC SCSI Test Unit Ready Callback
00261  *    Parameters:      None (global variables)
00262  *    Return Value:    None
00263  */
00264
00265 void MSC_TestUnitReady (void) {
00266
00267   if (CBW.dDataLength != 0) {
00268     if ((CBW.bmFlags & 0x80) != 0) {
00269       USB_SetStallEP(MSC_EP_IN);
00270     } else {
00271       USB_SetStallEP(MSC_EP_OUT);
00272     }
00273   }
00274
00275   CSW.bStatus = CSW_CMD_PASSED;
00276   MSC_SetCSW();
00277 }
00278
00279
00280 /*
00281  *  MSC SCSI Request Sense Callback
00282  *    Parameters:      None (global variables)
00283  *    Return Value:    None
00284  */
00285
00286 void MSC_RequestSense (void) {
00287
00288   if (!DataInFormat()) return;
00289
00290   BulkBuf[ 0] = 0x70;          /* Response Code */
00291   BulkBuf[ 1] = 0x00;
00292   BulkBuf[ 2] = 0x02;          /* Sense Key */
00293   BulkBuf[ 3] = 0x00;
00294   BulkBuf[ 4] = 0x00;
00295   BulkBuf[ 5] = 0x00;
00296   BulkBuf[ 6] = 0x00;
00297   BulkBuf[ 7] = 0x0A;          /* Additional Length */
00298   BulkBuf[ 8] = 0x00;
00299   BulkBuf[ 9] = 0x00;
00300   BulkBuf[10] = 0x00;
00301   BulkBuf[11] = 0x00;
00302   BulkBuf[12] = 0x30;          /* ASC */
00303   BulkBuf[13] = 0x01;          /* ASCQ */
00304   BulkBuf[14] = 0x00;
00305   BulkBuf[15] = 0x00;
00306   BulkBuf[16] = 0x00;
00307   BulkBuf[17] = 0x00;
00308
00309   BulkLen = 18;
00310   DataInTransfer();
00311 }
00312
00313
00314 /*
00315  *  MSC SCSI Inquiry Callback
00316  *    Parameters:      None (global variables)
00317  *    Return Value:    None
00318  */
00319
00320 void MSC_Inquiry (void) {
00321
00322   if (!DataInFormat()) return;
00323
00324   BulkBuf[ 0] = 0x00;          /* Direct Access Device */
00325   BulkBuf[ 1] = 0x80;          /* RMB = 1: Removable Medium */
00326   BulkBuf[ 2] = 0x00;          /* Version: No conformance claim to standard */
00327   BulkBuf[ 3] = 0x01;
00328
00329   BulkBuf[ 4] = 36-4;          /* Additional Length */
00330   BulkBuf[ 5] = 0x80;          /* SCCS = 1: Storage Controller Component */
00331   BulkBuf[ 6] = 0x00;
00332   BulkBuf[ 7] = 0x00;
00333
00334   BulkBuf[ 8] = 'K';           /* Vendor Identification */
00335   BulkBuf[ 9] = 'e';
00336   BulkBuf[10] = 'i';
00337   BulkBuf[11] = 'l';
00338   BulkBuf[12] = ' ';
00339   BulkBuf[13] = ' ';
00340   BulkBuf[14] = ' ';
00341   BulkBuf[15] = ' ';
00342
00343   BulkBuf[16] = 'L';           /* Product Identification */
00344   BulkBuf[17] = 'P';
00345   BulkBuf[18] = 'C';
00346   BulkBuf[19] = '1';
00347   BulkBuf[20] = '7';
00348   BulkBuf[21] = 'x';
00349   BulkBuf[22] = 'x';
00350   BulkBuf[23] = ' ';
00351   BulkBuf[24] = 'D';
00352   BulkBuf[25] = 'i';
00353   BulkBuf[26] = 's';
00354   BulkBuf[27] = 'k';
00355   BulkBuf[28] = ' ';
00356   BulkBuf[29] = ' ';
00357   BulkBuf[30] = ' ';
00358   BulkBuf[31] = ' ';
00359
00360   BulkBuf[32] = '1';           /* Product Revision Level */
00361   BulkBuf[33] = '.';
00362   BulkBuf[34] = '0';
00363   BulkBuf[35] = ' ';
00364
00365   BulkLen = 36;
00366   DataInTransfer();
00367 }
00368
00369
00370 /*
00371  *  MSC SCSI Mode Sense (6-Byte) Callback
00372  *    Parameters:      None (global variables)
00373  *    Return Value:    None
00374  */
00375
00376 void MSC_ModeSense6 (void) {
00377
00378   if (!DataInFormat()) return;
00379
00380   BulkBuf[ 0] = 0x03;
00381   BulkBuf[ 1] = 0x00;
00382   BulkBuf[ 2] = 0x00;
00383   BulkBuf[ 3] = 0x00;
00384
00385   BulkLen = 4;
00386   DataInTransfer();
00387 }
00388
00389
00390 /*
00391  *  MSC SCSI Mode Sense (10-Byte) Callback
00392  *    Parameters:      None (global variables)
00393  *    Return Value:    None
00394  */
00395
00396 void MSC_ModeSense10 (void) {
00397
00398   if (!DataInFormat()) return;
00399
00400   BulkBuf[ 0] = 0x00;
00401   BulkBuf[ 1] = 0x06;
00402   BulkBuf[ 2] = 0x00;
00403   BulkBuf[ 3] = 0x00;
00404   BulkBuf[ 4] = 0x00;
00405   BulkBuf[ 5] = 0x00;
00406   BulkBuf[ 6] = 0x00;
00407   BulkBuf[ 7] = 0x00;
00408
00409   BulkLen = 8;
00410   DataInTransfer();
00411 }
00412
00413
00414 /*
00415  *  MSC SCSI Read Capacity Callback
00416  *    Parameters:      None (global variables)
00417  *    Return Value:    None
00418  */
00419
00420 void MSC_ReadCapacity (void) {
00421
00422   if (!DataInFormat()) return;
00423
00424   /* Last Logical Block */
00425   BulkBuf[ 0] = ((MSC_BlockCount - 1) >> 24) & 0xFF;
00426   BulkBuf[ 1] = ((MSC_BlockCount - 1) >> 16) & 0xFF;
00427   BulkBuf[ 2] = ((MSC_BlockCount - 1) >>  8) & 0xFF;
00428   BulkBuf[ 3] = ((MSC_BlockCount - 1) >>  0) & 0xFF;
00429
00430   /* Block Length */
00431   BulkBuf[ 4] = (MSC_BlockSize >> 24) & 0xFF;
00432   BulkBuf[ 5] = (MSC_BlockSize >> 16) & 0xFF;
00433   BulkBuf[ 6] = (MSC_BlockSize >>  8) & 0xFF;
00434   BulkBuf[ 7] = (MSC_BlockSize >>  0) & 0xFF;
00435
00436   BulkLen = 8;
00437   DataInTransfer();
00438 }
00439
00440
00441 /*
00442  *  MSC SCSI Read Format Capacity Callback
00443  *    Parameters:      None (global variables)
00444  *    Return Value:    None
00445  */
00446
00447 void MSC_ReadFormatCapacity (void) {
00448
00449   if (!DataInFormat()) return;
00450
00451   BulkBuf[ 0] = 0x00;
00452   BulkBuf[ 1] = 0x00;
00453   BulkBuf[ 2] = 0x00;
00454   BulkBuf[ 3] = 0x08;          /* Capacity List Length */
00455
00456   /* Block Count */
00457   BulkBuf[ 4] = (MSC_BlockCount >> 24) & 0xFF;
00458   BulkBuf[ 5] = (MSC_BlockCount >> 16) & 0xFF;
00459   BulkBuf[ 6] = (MSC_BlockCount >>  8) & 0xFF;
00460   BulkBuf[ 7] = (MSC_BlockCount >>  0) & 0xFF;
00461
00462   /* Block Length */
00463   BulkBuf[ 8] = 0x02;          /* Descriptor Code: Formatted Media */
00464   BulkBuf[ 9] = (MSC_BlockSize >> 16) & 0xFF;
00465   BulkBuf[10] = (MSC_BlockSize >>  8) & 0xFF;
00466   BulkBuf[11] = (MSC_BlockSize >>  0) & 0xFF;
00467
00468   BulkLen = 12;
00469   DataInTransfer();
00470 }
00471
00472
00473 /*
00474  *  MSC Get Command Block Wrapper Callback
00475  *    Parameters:      None (global variables)
00476  *    Return Value:    None
00477  */
00478
00479 void MSC_GetCBW (void) {
00480   uint32_t n;
00481
00482   for (n = 0; n < BulkLen; n++) {
00483     *((uint8_t *)&CBW + n) = BulkBuf[n];
00484   }
00485   if ((BulkLen == sizeof(CBW)) && (CBW.dSignature == MSC_CBW_Signature)) {
00486     /* Valid CBW */
00487     CSW.dTag = CBW.dTag;
00488     CSW.dDataResidue = CBW.dDataLength;
00489     if ((CBW.bLUN != 0) || (CBW.bCBLength < 1) || CBW.bCBLength > 16) {
00490 fail: CSW.bStatus = CSW_CMD_FAILED;
00491       MSC_SetCSW();
00492     } else {
00493       switch (CBW.CB[0]) {
00494         case SCSI_TEST_UNIT_READY:
00495           MSC_TestUnitReady();
00496           break;
00497         case SCSI_REQUEST_SENSE:
00498           MSC_RequestSense();
00499           break;
00500         case SCSI_FORMAT_UNIT:
00501           goto fail;
00502         case SCSI_INQUIRY:
00503           MSC_Inquiry();
00504           break;
00505         case SCSI_START_STOP_UNIT:
00506           goto fail;
00507         case SCSI_MEDIA_REMOVAL:
00508           goto fail;
00509         case SCSI_MODE_SELECT6:
00510           goto fail;
00511         case SCSI_MODE_SENSE6:
00512           MSC_ModeSense6();
00513           break;
00514         case SCSI_MODE_SELECT10:
00515           goto fail;
00516         case SCSI_MODE_SENSE10:
00517           MSC_ModeSense10();
00518           break;
00519         case SCSI_READ_FORMAT_CAPACITIES:
00520           MSC_ReadFormatCapacity();
00521           break;
00522         case SCSI_READ_CAPACITY:
00523           MSC_ReadCapacity();
00524           break;
00525         case SCSI_READ10:
00526           if (MSC_RWSetup()) {
00527             if ((CBW.bmFlags & 0x80) != 0) {
00528               BulkStage = MSC_BS_DATA_IN;
00529               MSC_MemoryRead();
00530             } else {
00531               USB_SetStallEP(MSC_EP_OUT);
00532               CSW.bStatus = CSW_PHASE_ERROR;
00533               MSC_SetCSW();
00534             }
00535           }
00536           break;
00537         case SCSI_WRITE10:
00538           if (MSC_RWSetup()) {
00539             if ((CBW.bmFlags & 0x80) == 0) {
00540               BulkStage = MSC_BS_DATA_OUT;
00541             } else {
00542               USB_SetStallEP(MSC_EP_IN);
00543               CSW.bStatus = CSW_PHASE_ERROR;
00544               MSC_SetCSW();
00545             }
00546           }
00547           break;
00548         case SCSI_VERIFY10:
00549           if (MSC_RWSetup()) {
00550             if ((CBW.bmFlags & 0x80) == 0) {
00551               BulkStage = MSC_BS_DATA_OUT;
00552               MemOK = TRUE;
00553             } else {
00554               USB_SetStallEP(MSC_EP_IN);
00555               CSW.bStatus = CSW_PHASE_ERROR;
00556               MSC_SetCSW();
00557             }
00558           }
00559           break;
00560         default:
00561           goto fail;
00562       }
00563     }
00564   } else {
00565     /* Invalid CBW */
00566     USB_SetStallEP(MSC_EP_IN);
00567     USB_SetStallEP(MSC_EP_OUT);
00568     BulkStage = MSC_BS_ERROR;
00569   }
00570 }
00571
00572
00573 /*
00574  *  MSC Set Command Status Wrapper Callback
00575  *    Parameters:      None (global variables)
00576  *    Return Value:    None
00577  */
00578
00579 void MSC_SetCSW (void) {
00580
00581   CSW.dSignature = MSC_CSW_Signature;
00582   USB_WriteEP(MSC_EP_IN, (uint8_t *)&CSW, sizeof(CSW));
00583   BulkStage = MSC_BS_CSW;
00584 }
00585
00586
00587 /*
00588  *  MSC Bulk In Callback
00589  *    Parameters:      None (global variables)
00590  *    Return Value:    None
00591  */
00592
00593 void MSC_BulkIn (void) {
00594
00595   switch (BulkStage) {
00596     case MSC_BS_DATA_IN:
00597       switch (CBW.CB[0]) {
00598         case SCSI_READ10:
00599           MSC_MemoryRead();
00600           break;
00601       }
00602       break;
00603     case MSC_BS_DATA_IN_LAST:
00604       MSC_SetCSW();
00605       break;
00606     case MSC_BS_DATA_IN_LAST_STALL:
00607       USB_SetStallEP(MSC_EP_IN);
00608       MSC_SetCSW();
00609       break;
00610     case MSC_BS_CSW:
00611       BulkStage = MSC_BS_CBW;
00612       break;
00613   }
00614 }
00615
00616
00617 /*
00618  *  MSC Bulk Out Callback
00619  *    Parameters:      None (global variables)
00620  *    Return Value:    None
00621  */
00622
00623 void MSC_BulkOut (void) {
00624
00625   BulkLen = USB_ReadEP(MSC_EP_OUT, BulkBuf);
00626   switch (BulkStage) {
00627     case MSC_BS_CBW:
00628       MSC_GetCBW();
00629       break;
00630     case MSC_BS_DATA_OUT:
00631       switch (CBW.CB[0]) {
00632         case SCSI_WRITE10:
00633           MSC_MemoryWrite();
00634           break;
00635         case SCSI_VERIFY10:
00636           MSC_MemoryVerify();
00637           break;
00638       }
00639       break;
00640     default:
00641       USB_SetStallEP(MSC_EP_OUT);
00642       CSW.bStatus = CSW_PHASE_ERROR;
00643       MSC_SetCSW();
00644       break;
00645   }
00646 }
Generated on Tue Jun 7 14:59:05 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBMassStorage/mscuser.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBMassStorage/mscuser.h

Go to the documentation of this file.
00001 /*----------------------------------------------------------------------------
00002  *      U S B  -  K e r n e l
00003  *----------------------------------------------------------------------------
00004  *      Name:    MSCUSER.H
00005  *      Purpose: Mass Storage Class Custom User Definitions
00006  *      Version: V1.10
00007  *----------------------------------------------------------------------------
00008  *      This software is supplied "AS IS" without any warranties, express,
00009  *      implied or statutory, including but not limited to the implied
00010  *      warranties of fitness for purpose, satisfactory quality and
00011  *      noninfringement. Keil extends you a royalty-free right to reproduce
00012  *      and distribute executable files created using this software for use
00013  *      on NXP Semiconductors LPC family microcontroller devices only. Nothing
00014  *      else gives you the right to use this software.
00015  *
00016  *      Copyright (c) 2005-2009 Keil Software.
00017  *---------------------------------------------------------------------------*/
00018
00019 #ifndef __MSCUSER_H__
00020 #define __MSCUSER_H__
00021
00022
00023 /* Mass Storage Memory Layout */
00024 #if 0
00025 #define MSC_MemorySize  16384
00026 #endif
00027 #if 1
00028 #define MSC_MemorySize  8192
00029 #endif
00030 #define MSC_BlockSize   512
00031 #define MSC_BlockCount  (MSC_MemorySize / MSC_BlockSize)
00032
00033
00034 /* Max In/Out Packet Size */
00035 #define MSC_MAX_PACKET  64
00036
00037 /* MSC In/Out Endpoint Address */
00038 #define MSC_EP_IN       0x82
00039 #define MSC_EP_OUT      0x02
00040
00041 /* MSC Requests Callback Functions */
00042 extern uint32_t MSC_Reset     (void);
00043 extern uint32_t MSC_GetMaxLUN (void);
00044
00045 /* MSC Bulk Callback Functions */
00046 extern void MSC_GetCBW (void);
00047 extern void MSC_SetCSW (void);
00048 extern void MSC_BulkIn (void);
00049 extern void MSC_BulkOut(void);
00050
00051
00052 #endif  /* __MSCUSER_H__ */
Generated on Tue Jun 7 14:59:05 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/PWR/NMI_PowerDown/nmi_powerdown.c Source File

C:/nxpdrv/LPC1700CMSIS/Examples/PWR/NMI_PowerDown/nmi_powerdown.c

Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          nmi_powerdown.c                                 2010-06-18
00003 */
00026 #include "LPC17xx.h"
00027 #include "lpc17xx_clkpwr.h"
00028 #include "lpc17xx_libcfg.h"
00029 #include "debug_frmwrk.h"
00030 #include "lpc17xx_gpio.h"
00031 #include "lpc17xx_pinsel.h"
00032
00033 /* Example group ----------------------------------------------------------- */
00039 /************************** PRIVATE VARIABLES *************************/
00040 uint8_t menu[]=
00041         "********************************************************************************\n\r"
00042         "Hello NXP Semiconductors \n\r"
00043         "Power control demo \n\r"
00044         "\t - MCU: LPC17xx \n\r"
00045         "\t - Core: ARM CORTEX-M3 \n\r"
00046         "\t - Communicate via: UART0 - 115200 bps \n\r"
00047         "This example used to enter system in PowerDown mode and wake up it by using \n\r "
00048         "NMI (Non-Maskable Interrupt) \n\r"
00049         "********************************************************************************\n\r";
00050 void print_menu(void);
00051 void NMI_Handler(void);
00052
00053
00054 /*----------------- INTERRUPT SERVICE ROUTINES --------------------------*/
00055 /*********************************************************************/
00060 void NMI_Handler(void)
00061 {
00062         //do nothing
00063 }
00064
00065 /*-------------------------PRIVATE FUNCTIONS------------------------------*/
00066 /*********************************************************************/
00071 void print_menu(void)
00072 {
00073         _DBG(menu);
00074 }
00075
00076 /*-------------------------MAIN FUNCTION------------------------------*/
00077 /*********************************************************************/
00082 int c_entry (void)
00083 {
00084         PINSEL_CFG_Type PinCfg;
00085         /* Initialize debug via UART0
00086          * – 115200bps
00087          * – 8 data bit
00088          * – No parity
00089          * – 1 stop bit
00090          * – No flow control
00091          */
00092         debug_frmwrk_init();
00093
00094         // print welcome screen
00095         print_menu();
00096
00097         /* Pin selection:
00098          * P2.10 as NMI
00099          */
00100         PinCfg.Funcnum = 2;
00101         PinCfg.OpenDrain = 0;
00102         PinCfg.Pinmode = 0;
00103         PinCfg.Portnum = 2;
00104         PinCfg.Pinnum = 10;
00105         PINSEL_ConfigPin(&PinCfg);
00106
00107         SCB->ICSR |=(1<<31);    //changes NMI exception state to pending
00108
00109         _DBG_("Press '1' to enter system in PowerDown mode");
00110         while(_DG !='1');
00111
00112         _DBG_("Enter PowerDown mode...");
00113         _DBG_("Press INT0 button to wake-up system");
00114
00115         // Enter target power down mode
00116
00117         /*---------- Disable and disconnect the main PLL0 before enter into Deep-Sleep
00118          * or Power-Down mode <according to errata.lpc1768-16.March.2010> ------------
00119          */
00120         LPC_SC->PLL0CON &= ~(1<<1); /* Disconnect the main PLL (PLL0) */
00121         LPC_SC->PLL0FEED = 0xAA; /* Feed */
00122         LPC_SC->PLL0FEED = 0x55; /* Feed */
00123         while ((LPC_SC->PLL0STAT & (1<<25)) != 0x00); /* Wait for main PLL (PLL0) to disconnect */
00124         LPC_SC->PLL0CON &= ~(1<<0); /* Turn off the main PLL (PLL0) */
00125         LPC_SC->PLL0FEED = 0xAA; /* Feed */
00126         LPC_SC->PLL0FEED = 0x55; /* Feed */
00127         while ((LPC_SC->PLL0STAT & (1<<24)) != 0x00); /* Wait for main PLL (PLL0) to shut down */
00128         /*------------Then enter into PowerDown mode ----------------------------------*/
00129
00130         CLKPWR_PowerDown();
00131         SystemInit();
00132         debug_frmwrk_init();
00133         _DBG_("\n\rSystem waked-up!");
00134         while(1);
00135         return 1;
00136 }
00137
00138
00139 /* With ARM and GHS toolsets, the entry point is main() - this will
00140    allow the linker to generate wrapper code to setup stacks, allocate
00141    heap area, and initialize and copy code and data segments. For GNU
00142    toolsets, the entry point is through __start() in the crt0_gnu.asm
00143    file, and that startup code will setup stacks and data */
00144 int main(void)
00145 {
00146     return c_entry();
00147 }
00148
00149 #ifdef  DEBUG
00150 /*******************************************************************************
00151 * @brief                Reports the name of the source file and the source line number
00152 *                               where the CHECK_PARAM error has occurred.
00153 * @param[in]    file Pointer to the source file name
00154 * @param[in]    line assert_param error line source number
00155 * @return               None
00156 *******************************************************************************/
00157 void check_failed(uint8_t *file, uint32_t line)
00158 {
00159         /* User can add his own implementation to report the file name and line number,
00160          ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
00161
00162         /* Infinite loop */
00163         while(1);
00164 }
00165 #endif
00166
00167 /*
00168  * @}
00169  */
Generated on Tue Jun 7 14:59:02 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/NVIC/Priority/nvic_priority.c Source File

C:/nxpdrv/LPC1700CMSIS/Examples/NVIC/Priority/nvic_priority.c

Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          nvic_priority.c                                 2010-06-18
00003 */
00025 #include "lpc17xx_libcfg.h"
00026 #include "lpc17xx_gpio.h"
00027 #include "lpc17xx_nvic.h"
00028 #include "lpc17xx_systick.h"
00029 #include "lpc17xx_exti.h"
00030 #include "lpc17xx_pinsel.h"
00031
00032 /* Example group ----------------------------------------------------------- */
00038 /************************** PRIVATE DEFINTIONS*************************/
00039 /* Interrupt mode
00040  * - 0: Tail-chaining interrupt
00041  * - 1: Late-arriving interrupt
00042  */
00043 #define INT_MODE        1
00044
00045 /************************** PRIVATE FUNCTIONS *************************/
00046 void EINT0_IRQHandler(void);
00047 void EINT3_IRQHandler(void);
00048
00049 void print_menu(void);
00050 void delay (void);
00051
00052 /*----------------- INTERRUPT SERVICE ROUTINES --------------------------*/
00053 /*********************************************************************/
00059 void EINT0_IRQHandler(void)
00060 {
00061         uint8_t i;
00062         EXTI_ClearEXTIFlag(EXTI_EINT0);
00063         for (i= 0; i<10; i++)
00064         {
00065                 GPIO_SetValue(1,(1<<29));
00066                 delay();
00067                 GPIO_ClearValue(1,(1<<29));
00068                 delay();
00069         }
00070 }
00071
00072 /*********************************************************************/
00078 void EINT3_IRQHandler(void)
00079 {
00080         uint8_t j;
00081         if (GPIO_GetIntStatus(0, 25, 1))
00082         {
00083                  GPIO_ClearInt(0,(1<<25));
00084                 for (j= 0; j<10; j++)
00085                 {
00086                         GPIO_SetValue(1,(1<<28));
00087                         delay();
00088                         GPIO_ClearValue(1,(1<<28));
00089                         delay();
00090                 }
00091         }
00092 }
00093 /*-------------------------PRIVATE FUNCTIONS------------------------------*/
00094 /*********************************************************************/
00099 void delay (void) {
00100   unsigned int i;
00101
00102   for (i = 0; i < 0x400000; i++) {
00103   }
00104 }
00105
00106 /*-------------------------MAIN FUNCTION------------------------------*/
00107 /*********************************************************************/
00112 int c_entry (void)
00113 {
00114         EXTI_InitTypeDef EXTICfg;
00115         PINSEL_CFG_Type PinCfg;
00116
00117         /* Configure:
00118          *              + LED1: P1.28
00119          *              + LED2: P1.29
00120          */
00121         GPIO_SetDir(1, (1<<28)|(1<<29), 1);
00122
00123         /* Setting P2.10 as EINT0 */
00124         PinCfg.Funcnum = 1;
00125         PinCfg.OpenDrain = 0;
00126         PinCfg.Pinmode = 0;
00127         PinCfg.Pinnum = 10;
00128         PinCfg.Portnum = 2;
00129         PINSEL_ConfigPin(&PinCfg);
00130
00131         /* Initialize External 0 interrupt */
00132         EXTI_Init();
00133         EXTICfg.EXTI_Line = EXTI_EINT0;
00134         /* edge sensitive */
00135         EXTICfg.EXTI_Mode = EXTI_MODE_EDGE_SENSITIVE;
00136         EXTICfg.EXTI_polarity = EXTI_POLARITY_LOW_ACTIVE_OR_FALLING_EDGE;
00137         EXTI_Config(&EXTICfg);
00138
00139
00140 #if (INT_MODE == 0) //same group, different sub-levels (Tail-chaining example)
00141         NVIC_SetPriorityGrouping(4); //sets group priorities: 8 - subpriorities: 3
00142         NVIC_SetPriority(EINT0_IRQn, 2);  //000:10 (bit 7:3)  assign eint0 to group 0, sub-priority 2 within group 0
00143         NVIC_SetPriority(EINT3_IRQn, 1);  //000:01 (bit 7:3)  assign gpioint to group 0, sub-priority 1 within group 0
00144 #else //different group - (Late-arriving example)
00145         NVIC_SetPriorityGrouping(4);  //sets group priorities: 8 - subpriorities: 3
00146         NVIC_SetPriority(EINT0_IRQn, 0);   //000:00 (bit 7:3) assign eint0 to group 0, sub-priority 0 within group 0
00147         NVIC_SetPriority(EINT3_IRQn, 4);   //001:00 (bit 7:3) assign GPIO int to group 1, sub-priority 0 within group 1
00148 #endif
00149
00150         NVIC_EnableIRQ(EINT0_IRQn);
00151         NVIC_EnableIRQ(EINT3_IRQn);
00152
00153         //Enable GPIO interrupt  P0.25/AD0.2
00154         GPIO_IntCmd(0,(1<<25),1);
00155
00156         while(1);
00157 }
00158
00159 /* With ARM and GHS toolsets, the entry point is main() - this will
00160  allow the linker to generate wrapper code to setup stacks, allocate
00161  heap area, and initialize and copy code and data segments. For GNU
00162  toolsets, the entry point is through __start() in the crt0_gnu.asm
00163  file, and that startup code will setup stacks and data */
00164 int main(void) {
00165         return c_entry();
00166 }
00167
00168 #ifdef  DEBUG
00169 /*******************************************************************************
00170  * @brief               Reports the name of the source file and the source line number
00171  *                              where the CHECK_PARAM error has occurred.
00172  * @param[in]   file Pointer to the source file name
00173  * @param[in]    line assert_param error line source number
00174  * @return              None
00175  *******************************************************************************/
00176 void check_failed(uint8_t *file, uint32_t line) {
00177         /* User can add his own implementation to report the file name and line number,
00178          ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
00179
00180         /* Infinite loop */
00181         while (1)
00182                 ;
00183 }
00184 #endif
00185
00186 /*
00187  * @}
00188  */
Generated on Tue Jun 7 14:59:02 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/I2C/pca8581_polling/pca8581_test.c Source File

C:/nxpdrv/LPC1700CMSIS/Examples/I2C/pca8581_polling/pca8581_test.c

Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          pca8581_test.c                                  2010-05-21
00003 */
00026 #include "lpc17xx_i2c.h"
00027 #include "lpc17xx_libcfg.h"
00028 #include "lpc17xx_pinsel.h"
00029 #include "debug_frmwrk.h"
00030
00031 /* Example group ----------------------------------------------------------- */
00037 /************************** PRIVATE DEFINITIONS *************************/
00039 #define USEDI2CDEV      0
00040
00041 /* Definition of internal register of EEPROM PCA8581 */
00042 /* 7 bit address */
00043 #define PCA8581_SLVADDR         (0xA0>>1)
00044
00045 #if (USEDI2CDEV == 0)
00046 #define I2CDEV LPC_I2C0
00047 #elif (USEDI2CDEV == 2)
00048 #define I2CDEV LPC_I2C2
00049 #else
00050 #error "I2C device not defined!"
00051 #endif
00052
00053
00054 /************************** PRIVATE VARIABLES *************************/
00055 uint8_t menu1[] =
00056 "********************************************************************************\n\r"
00057 "Hello NXP Semiconductors \n\r"
00058 "I2C demo \n\r"
00059 "\t - MCU: LPC17xx \n\r"
00060 "\t - Core: ARM Cortex-M3 \n\r"
00061 "\t - Communicate via: UART0 - 115.2 kbps \n\r"
00062 " An example of I2C using polling mode to test the I2C driver \n\r"
00063 " EEPROM PCA8581 to transfer a number of data byte \n\r"
00064 "********************************************************************************\n\r";
00065 uint8_t menu2[] = "Demo terminated! \n\r";
00066
00067 /* Data using for transferring to PCA8581 */
00068 uint8_t pca8581_wrdat[] = {
00069                 (0x01<<3),      // Memory Address, data will be written at this address
00070                                         // This internal memory address should be 8-byte alignment
00071                 0x00,   // Data 0
00072                 0x11,   // Data 1
00073                 0x22,   // Data 2
00074                 0x33,   // Data 3
00075                 0x44,   // Data 4
00076                 0x55,   // Data 5
00077                 0x66,   // Data 6
00078                 0x77,   // Data 7
00079 };
00080
00081 uint8_t pca8581_rddat[] = {
00082                 // Don't use Memory address here, the Memory address to read
00083                 // is the same as Memory Address to write.
00084                 0x00,   // Data 0
00085                 0x00,   // Data 1
00086                 0x00,   // Data 2
00087                 0x00,   // Data 3
00088                 0x00,   // Data 4
00089                 0x00,   // Data 5
00090                 0x00,   // Data 6
00091                 0x00,   // Data 7
00092 };
00093
00094 /* Transmit setup */
00095 I2C_M_SETUP_Type txsetup;
00096 /* Receive setup */
00097 I2C_M_SETUP_Type rxsetup;
00098
00099 /************************** PRIVATE FUNCTIONS *************************/
00100 int32_t PCA8581_Write(void);
00101 int32_t PCA8581_Read(void);
00102 void print_menu(void);
00103 void Error_Loop(uint32_t ErrorCode);
00104
00105 /*-------------------------PRIVATE FUNCTIONS------------------------------*/
00106 /*********************************************************************/
00111 int32_t PCA8581_Write(void)
00112 {
00113         txsetup.sl_addr7bit = PCA8581_SLVADDR;
00114         txsetup.tx_data = pca8581_wrdat;
00115         txsetup.tx_length = sizeof(pca8581_wrdat);
00116         txsetup.rx_data = NULL;
00117         txsetup.rx_length = 0;
00118         txsetup.retransmissions_max = 3;
00119
00120         if (I2C_MasterTransferData(I2CDEV, &txsetup, I2C_TRANSFER_POLLING) == SUCCESS){
00121                 return (0);
00122         } else {
00123                 return (-1);
00124         }
00125 }
00126
00127 /*********************************************************************/
00132 int32_t PCA8581_Read(void)
00133 {
00134
00135         rxsetup.sl_addr7bit = PCA8581_SLVADDR;
00136         rxsetup.tx_data = pca8581_wrdat;        // Get address to read at writing address
00137         rxsetup.tx_length = 1;
00138         rxsetup.rx_data = pca8581_rddat;
00139         rxsetup.rx_length = sizeof(pca8581_rddat);
00140         rxsetup.retransmissions_max = 3;
00141
00142         if (I2C_MasterTransferData(I2CDEV, &rxsetup, I2C_TRANSFER_POLLING) == SUCCESS){
00143                 return (0);
00144         } else {
00145                 return (-1);
00146         }
00147 }
00148
00149 /*********************************************************************/
00154 void print_menu(void)
00155 {
00156         _DBG_(menu1);
00157 }
00158
00159 /*********************************************************************/
00165 void Error_Loop(uint32_t ErrorCode)
00166 {
00167         uint32_t test;
00168         // for testing purpose
00169         test = ErrorCode;
00170         /*
00171          * Insert your code here...
00172          */
00173         while(1);
00174 }
00175
00176
00177 /*-------------------------MAIN FUNCTION------------------------------*/
00178 /*********************************************************************/
00183 int c_entry(void)
00184 {
00185         PINSEL_CFG_Type PinCfg;
00186         uint32_t tmp;
00187         uint8_t *dp, *sp;
00188
00189         /* Initialize debug via UART0
00190          * – 115200bps
00191          * – 8 data bit
00192          * – No parity
00193          * – 1 stop bit
00194          * – No flow control
00195          */
00196         debug_frmwrk_init();
00197
00198         // print welcome screen
00199         print_menu();
00200
00201         /*
00202          * Init I2C pin connect
00203          */
00204         PinCfg.OpenDrain = 0;
00205         PinCfg.Pinmode = 0;
00206 #if (USEDI2CDEV == 0)
00207         PinCfg.Funcnum = 1;
00208         PinCfg.Pinnum = 27;
00209         PinCfg.Portnum = 0;
00210         PINSEL_ConfigPin(&PinCfg);
00211         PinCfg.Pinnum = 28;
00212         PINSEL_ConfigPin(&PinCfg);
00213 #elif (USEDI2CDEV == 2)
00214         PinCfg.Funcnum = 2;
00215         PinCfg.Pinnum = 10;
00216         PinCfg.Portnum = 0;
00217         PINSEL_ConfigPin(&PinCfg);
00218         PinCfg.Pinnum = 11;
00219         PINSEL_ConfigPin(&PinCfg);
00220 #endif
00221
00222         /* I2C block ------------------------------------------------------------------- */
00223         // Initialize I2C peripheral
00224         I2C_Init(I2CDEV, 200000);
00225
00226         /* Enable I2C1 operation */
00227         I2C_Cmd(I2CDEV, ENABLE);
00228
00229         /* Transmit data ---------------------------------------------------------- */
00230         _DBG_("Sending...");
00231         if (PCA8581_Write() == (-1)){
00232                 _DBG_("Error while sending data");
00233                 Error_Loop(txsetup.status);
00234         }
00235         _DBG_("Complete!");
00236
00237         // wait for a while
00238         for (tmp = 0x100000; tmp; tmp--);
00239
00240         /* Receive data ---------------------------------------------------------- */
00241         _DBG_("Reading...");
00242         if (PCA8581_Read() == (-1)){
00243                 _DBG_("Error while reading data");
00244                 Error_Loop(rxsetup.status);
00245         }
00246         _DBG_("Complete!");
00247
00248         // Verify data
00249         dp = pca8581_rddat;
00250         sp = pca8581_wrdat;
00251         sp += 1;  // Offset +1
00252         for (tmp = sizeof(pca8581_rddat); tmp; tmp--){
00253                 if (*dp++ != *sp++){
00254                         _DBG_("Verify Data error!");
00255                         break;
00256                 }
00257         }
00258
00259         tmp++;
00260
00261     /* Loop forever */
00262     while(1);
00263     return 1;
00264 }
00265
00266 /* With ARM and GHS toolsets, the entry point is main() - this will
00267    allow the linker to generate wrapper code to setup stacks, allocate
00268    heap area, and initialize and copy code and data segments. For GNU
00269    toolsets, the entry point is through __start() in the crt0_gnu.asm
00270    file, and that startup code will setup stacks and data */
00271 int main(void)
00272 {
00273     return c_entry();
00274 }
00275
00276
00277 #ifdef  DEBUG
00278 /*******************************************************************************
00279 * @brief                Reports the name of the source file and the source line number
00280 *                               where the CHECK_PARAM error has occurred.
00281 * @param[in]    file Pointer to the source file name
00282 * @param[in]    line assert_param error line source number
00283 * @return               None
00284 *******************************************************************************/
00285 void check_failed(uint8_t *file, uint32_t line)
00286 {
00287         /* User can add his own implementation to report the file name and line number,
00288          ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
00289
00290         /* Infinite loop */
00291         while(1);
00292 }
00293 #endif
00294
00295 /*
00296  * @}
00297  */
Generated on Tue Jun 7 14:59:01 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/common/printf-stdarg.c Source File

C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/common/printf-stdarg.c

Go to the documentation of this file.
00001 /*
00002         Copyright 2001, 2002 Georges Menie (www.menie.org)
00003         stdarg version contributed by Christian Ettinger
00004
00005     This program is free software; you can redistribute it and/or modify
00006     it under the terms of the GNU Lesser General Public License as published by
00007     the Free Software Foundation; either version 2 of the License, or
00008     (at your option) any later version.
00009
00010     This program is distributed in the hope that it will be useful,
00011     but WITHOUT ANY WARRANTY; without even the implied warranty of
00012     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
00013     GNU Lesser General Public License for more details.
00014
00015     You should have received a copy of the GNU Lesser General Public License
00016     along with this program; if not, write to the Free Software
00017     Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
00018 */
00019
00020 /*
00021         putchar is the only external dependency for this file,
00022         if you have a working putchar, leave it commented out.
00023         If not, uncomment the define below and
00024         replace outbyte(c) by your own function call.
00025
00026 */
00027
00028
00029 //#define putchar(c) c
00030 extern int sendchar (int ch);
00031 #define putchar(c)      sendchar(c)
00032
00033 #include <stdarg.h>
00034
00035 static void printchar(char **str, int c)
00036 {
00037         //extern int putchar(int c);
00038
00039         if (str) {
00040                 **str = (char)c;
00041                 ++(*str);
00042         }
00043         else
00044         {
00045                 (void)putchar(c);
00046         }
00047 }
00048
00049 #define PAD_RIGHT 1
00050 #define PAD_ZERO 2
00051
00052 static int prints(char **out, const char *string, int width, int pad)
00053 {
00054         register int pc = 0, padchar = ' ';
00055
00056         if (width > 0) {
00057                 register int len = 0;
00058                 register const char *ptr;
00059                 for (ptr = string; *ptr; ++ptr) ++len;
00060                 if (len >= width) width = 0;
00061                 else width -= len;
00062                 if (pad & PAD_ZERO) padchar = '0';
00063         }
00064         if (!(pad & PAD_RIGHT)) {
00065                 for ( ; width > 0; --width) {
00066                         printchar (out, padchar);
00067                         ++pc;
00068                 }
00069         }
00070         for ( ; *string ; ++string) {
00071                 printchar (out, *string);
00072                 ++pc;
00073         }
00074         for ( ; width > 0; --width) {
00075                 printchar (out, padchar);
00076                 ++pc;
00077         }
00078
00079         return pc;
00080 }
00081
00082 /* the following should be enough for 32 bit int */
00083 #define PRINT_BUF_LEN 12
00084
00085 static int printi(char **out, int i, int b, int sg, int width, int pad, int letbase)
00086 {
00087         char print_buf[PRINT_BUF_LEN];
00088         register char *s;
00089         register int t, neg = 0, pc = 0;
00090         register unsigned int u = (unsigned int)i;
00091
00092         if (i == 0) {
00093                 print_buf[0] = '0';
00094                 print_buf[1] = '\0';
00095                 return prints (out, print_buf, width, pad);
00096         }
00097
00098         if (sg && b == 10 && i < 0) {
00099                 neg = 1;
00100                 u = (unsigned int)-i;
00101         }
00102
00103         s = print_buf + PRINT_BUF_LEN-1;
00104         *s = '\0';
00105
00106         while (u) {
00107                 t = (int)u % b;
00108                 if( t >= 10 )
00109                         t += letbase - '0' - 10;
00110                 *--s = (char)(t + '0');
00111                 u /= b;
00112         }
00113
00114         if (neg) {
00115                 if( width && (pad & PAD_ZERO) ) {
00116                         printchar (out, '-');
00117                         ++pc;
00118                         --width;
00119                 }
00120                 else {
00121                         *--s = '-';
00122                 }
00123         }
00124
00125         return pc + prints (out, s, width, pad);
00126 }
00127
00128 static int print( char **out, const char *format, va_list args )
00129 {
00130         register int width, pad;
00131         register int pc = 0;
00132         char scr[2];
00133
00134         for (; *format != 0; ++format) {
00135                 if (*format == '%') {
00136                         ++format;
00137                         width = pad = 0;
00138                         if (*format == '\0') break;
00139                         if (*format == '%') goto out;
00140                         if (*format == '-') {
00141                                 ++format;
00142                                 pad = PAD_RIGHT;
00143                         }
00144                         while (*format == '0') {
00145                                 ++format;
00146                                 pad |= PAD_ZERO;
00147                         }
00148                         for ( ; *format >= '0' && *format <= '9'; ++format) {
00149                                 width *= 10;
00150                                 width += *format - '0';
00151                         }
00152                         if( *format == 's' ) {
00153                                 register char *s = (char *)va_arg( args, int );
00154                                 pc += prints (out, s?s:"(null)", width, pad);
00155                                 continue;
00156                         }
00157                         if( *format == 'd' ) {
00158                                 pc += printi (out, va_arg( args, int ), 10, 1, width, pad, 'a');
00159                                 continue;
00160                         }
00161                         if( *format == 'x' ) {
00162                                 pc += printi (out, va_arg( args, int ), 16, 0, width, pad, 'a');
00163                                 continue;
00164                         }
00165                         if( *format == 'X' ) {
00166                                 pc += printi (out, va_arg( args, int ), 16, 0, width, pad, 'A');
00167                                 continue;
00168                         }
00169                         if( *format == 'u' ) {
00170                                 pc += printi (out, va_arg( args, int ), 10, 0, width, pad, 'a');
00171                                 continue;
00172                         }
00173                         if( *format == 'c' ) {
00174                                 /* char are converted to int then pushed on the stack */
00175                                 scr[0] = (char)va_arg( args, int );
00176                                 scr[1] = '\0';
00177                                 pc += prints (out, scr, width, pad);
00178                                 continue;
00179                         }
00180                 }
00181                 else {
00182                 out:
00183                         printchar (out, *format);
00184                         ++pc;
00185                 }
00186         }
00187         if (out) **out = '\0';
00188         va_end( args );
00189         return pc;
00190 }
00191
00192 int printf(const char *format, ...)
00193 {
00194         va_list args;
00195
00196         va_start( args, format );
00197         return print( 0, format, args );
00198 }
00199
00200 int sprintf(char *out, const char *format, ...)
00201 {
00202         va_list args;
00203
00204         va_start( args, format );
00205         return print( &out, format, args );
00206 }
00207
00208
00209 int snprintf( char *buf, unsigned int count, const char *format, ... )
00210 {
00211         va_list args;
00212
00213         ( void ) count;
00214
00215         va_start( args, format );
00216         return print( &buf, format, args );
00217 }
00218
00219
00220 #ifdef TEST_PRINTF
00221 int main(void)
00222 {
00223         char *ptr = "Hello world!";
00224         char *np = 0;
00225         int i = 5;
00226         unsigned int bs = sizeof(int)*8;
00227         int mi;
00228         char buf[80];
00229
00230         mi = (1 << (bs-1)) + 1;
00231         printf("%s\n", ptr);
00232         printf("printf test\n");
00233         printf("%s is null pointer\n", np);
00234         printf("%d = 5\n", i);
00235         printf("%d = - max int\n", mi);
00236         printf("char %c = 'a'\n", 'a');
00237         printf("hex %x = ff\n", 0xff);
00238         printf("hex %02x = 00\n", 0);
00239         printf("signed %d = unsigned %u = hex %x\n", -3, -3, -3);
00240         printf("%d %s(s)%", 0, "message");
00241         printf("\n");
00242         printf("%d %s(s) with %%\n", 0, "message");
00243         sprintf(buf, "justif: \"%-10s\"\n", "left"); printf("%s", buf);
00244         sprintf(buf, "justif: \"%10s\"\n", "right"); printf("%s", buf);
00245         sprintf(buf, " 3: %04d zero padded\n", 3); printf("%s", buf);
00246         sprintf(buf, " 3: %-4d left justif.\n", 3); printf("%s", buf);
00247         sprintf(buf, " 3: %4d right justif.\n", 3); printf("%s", buf);
00248         sprintf(buf, "-3: %04d zero padded\n", -3); printf("%s", buf);
00249         sprintf(buf, "-3: %-4d left justif.\n", -3); printf("%s", buf);
00250         sprintf(buf, "-3: %4d right justif.\n", -3); printf("%s", buf);
00251
00252         return 0;
00253 }
00254
00255 /*
00256  * if you compile this file with
00257  *   gcc -Wall $(YOUR_C_OPTIONS) -DTEST_PRINTF -c printf.c
00258  * you will get a normal warning:
00259  *   printf.c:214: warning: spurious trailing `%' in format
00260  * this line is testing an invalid % at the end of the format string.
00261  *
00262  * this should display (on 32bit int machine) :
00263  *
00264  * Hello world!
00265  * printf test
00266  * (null) is null pointer
00267  * 5 = 5
00268  * -2147483647 = - max int
00269  * char a = 'a'
00270  * hex ff = ff
00271  * hex 00 = 00
00272  * signed -3 = unsigned 4294967293 = hex fffffffd
00273  * 0 message(s)
00274  * 0 message(s) with %
00275  * justif: "left      "
00276  * justif: "     right"
00277  *  3: 0003 zero padded
00278  *  3: 3    left justif.
00279  *  3:    3 right justif.
00280  * -3: -003 zero padded
00281  * -3: -3   left justif.
00282  * -3:   -3 right justif.
00283  */
00284
00285 #endif
00286
00287
00288 /* To keep linker happy. */
00289 int     write( int i, char* c, int n)
00290 {
00291         (void)i;
00292         (void)n;
00293         (void)c;
00294         return 0;
00295 }
00296
Generated on Tue Jun 7 14:59:00 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/Cortex-M3/Privilege_mode/privilege.c Source File

C:/nxpdrv/LPC1700CMSIS/Examples/Cortex-M3/Privilege_mode/privilege.c

Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          privilege.c                             2010-07-18
00003 */
00026 #include "lpc17xx_libcfg.h"
00027 #include "debug_frmwrk.h"
00028 #include "lpc17xx_gpio.h"
00029
00030
00031 /* Example group ----------------------------------------------------------- */
00037 /************************** PRIVATE DEFINTIONS*************************/
00038 /* Uncomment to chose current using eval board */
00039 //#define MCB_LPC_1768
00040 #define IAR_LPC_1768
00041
00042 /* CONTROL register controls the privileged level for software execution
00043  * when the processor is in Thread mode
00044  */
00045 #define THREAD_PRIVILEGED                       0
00046 #define THREAD_UNPRIVILEGED                     1
00047 #define THREAD_PRIVILEDGED_MASK         0xFFFFFFFE
00048
00049 /* Used LED */
00050 #ifdef MCB_LPC_1768
00051 #define PRIVILEGE_LED                           28 //LED P1.28
00052 #define PRIVILEGE_LEDPORT                       1
00053 #define UNPRIVILEGE_LED                         29 //LED P1.29
00054 #define UNPRIVILEGE_LEDPORT                     1
00055 #elif defined(IAR_LPC_1768)
00056 #define PRIVILEGE_LED                           25 //LED1: P1.25
00057 #define PRIVILEGE_LEDPORT                       1
00058 #define UNPRIVILEGE_LED                         4       //LED2: P0.4
00059 #define UNPRIVILEGE_LEDPORT                     0
00060 #endif
00061
00062 /************************** PRIVATE VARIABLES *************************/
00063 uint8_t menu[]=
00064         "********************************************************************************\n\r"
00065         "Hello NXP Semiconductors \n\r"
00066         "Privileged demo \n\r"
00067         "\t - MCU: LPC17xx \n\r"
00068         "\t - Core: ARM CORTEX-M3 \n\r"
00069         "\t - Communicate via: UART0 - 115200 bps \n\r"
00070         "This example used to test Privileged feature of Cortex-M3 processor\n\r"
00071         "********************************************************************************\n\r";
00072 #ifdef MCB_LPC_1768
00073 uint8_t menu2[]=
00074         "LED1 (P1.28) will be turned on in privilege mode \n\r"
00075         "LED2 (P1.29) will be turned on in un-privilege mode\n\r";
00076 #elif defined (IAR_LPC_1768)
00077 uint8_t menu2[]=
00078         "LED1 (P1.25) will be turned on in privilege mode \n\r"
00079         "LED2 (P0.4) will blink in un-privilege mode\n\r";
00080 #endif
00081
00082 /************************** SYSTEM CALL EXCEPTION *********************/
00083 #if defined ( __CC_ARM   )
00084 __ASM void __SVC(void)
00085 {
00086   SVC 0x01
00087   BX R14
00088 }
00089 #elif defined ( __ICCARM__ )
00090 static __INLINE  void __SVC()                     { __ASM ("svc 0x01");}
00091 #elif defined   (  __GNUC__  )
00092 static __INLINE void __SVC()                      { __ASM volatile ("svc 0x01");}
00093 #endif
00094 /************************** PRIVATE FUNCTIONS *************************/
00095 /*********************************************************************/
00100 void SVC_Handler(void)
00101 {
00102   /* Change Thread mode to privileged */
00103   __set_CONTROL(2);
00104 }
00105
00106 /************************** PRIVATE FUNCTIONS *************************/
00107 void LED_Init(void);
00108 void Turn_on_LED(uint8_t Led_num);
00109 void Turn_off_LED(uint8_t Led_num);
00110
00111 /*-------------------------PRIVATE FUNCTIONS------------------------------*/
00112 /*********************************************************************/
00117 void LED_Init(void)
00118 {
00119         //setting two LEDs as output and turn off all
00120         GPIO_SetDir(PRIVILEGE_LEDPORT,(1<<PRIVILEGE_LED),1);
00121         GPIO_SetDir(UNPRIVILEGE_LEDPORT,(1<<UNPRIVILEGE_LED),1);
00122 #ifdef MCB_LPC_1768
00123         GPIO_ClearValue(1,(1<<PRIVILEGE_LED)|(1<<UNPRIVILEGE_LED));
00124         GPIO_ClearValue(2,(1<<2)|(1<<3)|(1<<4)|(1<<5)|(1<<6));
00125 #elif defined(IAR_LPC_1768)
00126         GPIO_SetValue(PRIVILEGE_LEDPORT,(1<<PRIVILEGE_LED));
00127         GPIO_SetValue(UNPRIVILEGE_LEDPORT,(1<<UNPRIVILEGE_LED));
00128 #endif
00129 }
00130
00131 /*********************************************************************/
00138 void Turn_on_LED(uint8_t Led_num)
00139 {
00140 #ifdef MCB_LPC_1768
00141         if(Led_num == PRIVILEGE_LED){
00142                 GPIO_SetValue(PRIVILEGE_LEDPORT,(1<<PRIVILEGE_LED));}
00143         else{
00144                 GPIO_SetValue(UNPRIVILEGE_LEDPORT,(1<<UNPRIVILEGE_LED));
00145         }
00146 #elif defined(IAR_LPC_1768)
00147         if(Led_num == PRIVILEGE_LED){
00148                 GPIO_ClearValue(PRIVILEGE_LEDPORT,(1<<PRIVILEGE_LED));}
00149         else{
00150                 GPIO_ClearValue(UNPRIVILEGE_LEDPORT,(1<<UNPRIVILEGE_LED));
00151         }
00152 #endif
00153 }
00154
00155 /*********************************************************************/
00162 void Turn_off_LED(uint8_t Led_num)
00163 {
00164 #ifdef MCB_LPC_1768
00165         if(Led_num == PRIVILEGE_LED){
00166                 GPIO_ClearValue(PRIVILEGE_LEDPORT,(1<<PRIVILEGE_LED));}
00167         else{
00168                 GPIO_ClearValue(UNPRIVILEGE_LEDPORT,(1<<UNPRIVILEGE_LED));
00169         }
00170 #elif defined(IAR_LPC_1768)
00171         if(Led_num == PRIVILEGE_LED){
00172                 GPIO_SetValue(PRIVILEGE_LEDPORT,(1<<PRIVILEGE_LED));}
00173         else{
00174                 GPIO_SetValue(UNPRIVILEGE_LEDPORT,(1<<UNPRIVILEGE_LED));
00175         }
00176 #endif
00177 }
00178
00179 /*-------------------------MAIN FUNCTION------------------------------*/
00180 /*********************************************************************/
00185 int c_entry(void)                       /* Main Program */
00186 {
00187         uint32_t priviledge_status;
00188         /* Initialize debug via UART0
00189          * – 115200bps
00190          * – 8 data bit
00191          * – No parity
00192          * – 1 stop bit
00193          * – No flow control
00194          */
00195         debug_frmwrk_init();
00196         LED_Init();
00197         //print menu
00198         _DBG(menu);
00199         _DBG_(menu2);
00200
00201         /* Thread mode is privilege out of reset */
00202         /* First checking Thread mode is privilege or un-privilege */
00203         priviledge_status = __get_CONTROL();
00204         if((priviledge_status & (~THREAD_PRIVILEDGED_MASK))==THREAD_PRIVILEGED)
00205         {
00206                 _DBG_("Thread mode is privileged!");
00207                 Turn_on_LED(PRIVILEGE_LED);
00208         }
00209         else
00210         {
00211                 _DBG_("Theard mode is unprivileged! It's not compliant with Cortex-M3 Technical");
00212                 while(1); //Error loop
00213         }
00214         /* Wait user press '1' character to change to un-privilege mode */
00215         _DBG_("Press '1' to change to unprivilege mode ...\n\r");
00216         while(_DG !='1');
00217
00218         /* Changing to un-privilege mode */
00219         __set_CONTROL((priviledge_status & THREAD_PRIVILEDGED_MASK)|THREAD_UNPRIVILEGED);
00220         _DBG_("Changed to unprivilege mode!");
00221
00222         /* Check */
00223         priviledge_status = __get_CONTROL();
00224         if((priviledge_status & ~THREAD_PRIVILEDGED_MASK)==THREAD_UNPRIVILEGED)
00225         {
00226                 _DBG_("Check: Thread mode change to unprivilege successful!");
00227                 Turn_off_LED(PRIVILEGE_LED);
00228                 Turn_on_LED(UNPRIVILEGE_LED);
00229         }
00230         else
00231         {
00232                 _DBG_("Check: Thread mode is still privileged! ERROR...");
00233                 while(1); //Error loop
00234         }
00235         /* Wait user press '1' character to change to un-privilege mode */
00236         _DBG_("Press '2' to change to privilege mode by calling system call exception...\n\r");
00237         while(_DG !='2');
00238         /* Call system call exception to re-change Thread mode into privilege */
00239         __SVC();
00240         _DBG_("Called system call exception!");
00241
00242         /* Check */
00243         priviledge_status = __get_CONTROL();
00244         if((priviledge_status & ~THREAD_PRIVILEDGED_MASK)==THREAD_PRIVILEGED)
00245         {
00246                 _DBG_("Check: Thread mode change to privilege successful!");
00247                 Turn_off_LED(UNPRIVILEGE_LED);
00248                 Turn_on_LED(PRIVILEGE_LED);
00249         }
00250         else
00251         {
00252                 _DBG_("Check: Theard mode is still unprivileged! ERROR...");
00253                 while(1); //Error loop
00254         }
00255         _DBG_("Demo terminate!");
00256         while (1);
00257         return 0;
00258 }
00259
00260 /* With ARM and GHS toolsets, the entry point is main() - this will
00261  allow the linker to generate wrapper code to setup stacks, allocate
00262  heap area, and initialize and copy code and data segments. For GNU
00263  toolsets, the entry point is through __start() in the crt0_gnu.asm
00264  file, and that startup code will setup stacks and data */
00265 int main(void) {
00266         return c_entry();
00267 }
00268
00269 #ifdef  DEBUG
00270 /*******************************************************************************
00271  * @brief               Reports the name of the source file and the source line number
00272  *                              where the CHECK_PARAM error has occurred.
00273  * @param[in]   file Pointer to the source file name
00274  * @param[in]    line assert_param error line source number
00275  * @return              None
00276  *******************************************************************************/
00277 void check_failed(uint8_t *file, uint32_t line) {
00278         /* User can add his own implementation to report the file name and line number,
00279          ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
00280
00281         /* Infinite loop */
00282         while (1)
00283                 ;
00284 }
00285 #endif
00286
00287 /*
00288  * @}
00289  */
Generated on Tue Jun 7 14:58:59 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/uip/psock.c Source File

C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/uip/psock.c

Go to the documentation of this file.
00001 /*
00002  * Copyright (c) 2004, Swedish Institute of Computer Science.
00003  * All rights reserved.
00004  *
00005  * Redistribution and use in source and binary forms, with or without
00006  * modification, are permitted provided that the following conditions
00007  * are met:
00008  * 1. Redistributions of source code must retain the above copyright
00009  *    notice, this list of conditions and the following disclaimer.
00010  * 2. Redistributions in binary form must reproduce the above copyright
00011  *    notice, this list of conditions and the following disclaimer in the
00012  *    documentation and/or other materials provided with the distribution.
00013  * 3. Neither the name of the Institute nor the names of its contributors
00014  *    may be used to endorse or promote products derived from this software
00015  *    without specific prior written permission.
00016  *
00017  * THIS SOFTWARE IS PROVIDED BY THE INSTITUTE AND CONTRIBUTORS ``AS IS'' AND
00018  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
00019  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
00020  * ARE DISCLAIMED.  IN NO EVENT SHALL THE INSTITUTE OR CONTRIBUTORS BE LIABLE
00021  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
00022  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
00023  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
00024  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
00025  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
00026  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
00027  * SUCH DAMAGE.
00028  *
00029  * This file is part of the uIP TCP/IP stack
00030  *
00031  * Author: Adam Dunkels <adam@sics.se>
00032  *
00033  * $Id: psock.c,v 1.2 2006/06/12 08:00:30 adam Exp $
00034  */
00035
00036 #include <stdio.h>
00037 #include <string.h>
00038
00039 #include "uipopt.h"
00040 #include "psock.h"
00041 #include "uip.h"
00042
00043 #define STATE_NONE 0
00044 #define STATE_ACKED 1
00045 #define STATE_READ 2
00046 #define STATE_BLOCKED_NEWDATA 3
00047 #define STATE_BLOCKED_CLOSE 4
00048 #define STATE_BLOCKED_SEND 5
00049 #define STATE_DATA_SENT 6
00050
00051 /*
00052  * Return value of the buffering functions that indicates that a
00053  * buffer was not filled by incoming data.
00054  *
00055  */
00056 #define BUF_NOT_FULL 0
00057 #define BUF_NOT_FOUND 0
00058
00059 /*
00060  * Return value of the buffering functions that indicates that a
00061  * buffer was completely filled by incoming data.
00062  *
00063  */
00064 #define BUF_FULL 1
00065
00066 /*
00067  * Return value of the buffering functions that indicates that an
00068  * end-marker byte was found.
00069  *
00070  */
00071 #define BUF_FOUND 2
00072
00073 /*---------------------------------------------------------------------------*/
00074 static void
00075 buf_setup(struct psock_buf *buf,
00076           u8_t *bufptr, u16_t bufsize)
00077 {
00078   buf->ptr = bufptr;
00079   buf->left = bufsize;
00080 }
00081 /*---------------------------------------------------------------------------*/
00082 static u8_t
00083 buf_bufdata(struct psock_buf *buf, u16_t len,
00084             u8_t **dataptr, u16_t *datalen)
00085 {
00086   ( void ) len;
00087   if(*datalen < buf->left) {
00088     memcpy(buf->ptr, *dataptr, *datalen);
00089     buf->ptr += *datalen;
00090     buf->left -= *datalen;
00091     *dataptr += *datalen;
00092     *datalen = 0;
00093     return BUF_NOT_FULL;
00094   } else if(*datalen == buf->left) {
00095     memcpy(buf->ptr, *dataptr, *datalen);
00096     buf->ptr += *datalen;
00097     buf->left = 0;
00098     *dataptr += *datalen;
00099     *datalen = 0;
00100     return BUF_FULL;
00101   } else {
00102     memcpy(buf->ptr, *dataptr, buf->left);
00103     buf->ptr += buf->left;
00104     *datalen -= buf->left;
00105     *dataptr += buf->left;
00106     buf->left = 0;
00107     return BUF_FULL;
00108   }
00109 }
00110 /*---------------------------------------------------------------------------*/
00111 static u8_t
00112 buf_bufto(register struct psock_buf *buf, u8_t endmarker,
00113           register u8_t **dataptr, register u16_t *datalen)
00114 {
00115   u8_t c;
00116   while(buf->left > 0 && *datalen > 0) {
00117     c = *buf->ptr = **dataptr;
00118     ++*dataptr;
00119     ++buf->ptr;
00120     --*datalen;
00121     --buf->left;
00122
00123     if(c == endmarker) {
00124       return BUF_FOUND;
00125     }
00126   }
00127
00128   if(*datalen == 0) {
00129     return BUF_NOT_FOUND;
00130   }
00131
00132   while(*datalen > 0) {
00133     c = **dataptr;
00134     --*datalen;
00135     ++*dataptr;
00136
00137     if(c == endmarker) {
00138       return BUF_FOUND | BUF_FULL;
00139     }
00140   }
00141
00142   return BUF_FULL;
00143 }
00144 /*---------------------------------------------------------------------------*/
00145 static char
00146 send_data(register struct psock *s)
00147 {
00148   if(s->state != STATE_DATA_SENT || uip_rexmit()) {
00149     if(s->sendlen > uip_mss()) {
00150       uip_send(s->sendptr, uip_mss());
00151     } else {
00152       uip_send(s->sendptr, s->sendlen);
00153     }
00154     s->state = STATE_DATA_SENT;
00155     return 1;
00156   }
00157   return 0;
00158 }
00159 /*---------------------------------------------------------------------------*/
00160 static char
00161 data_acked(register struct psock *s)
00162 {
00163   if(s->state == STATE_DATA_SENT && uip_acked()) {
00164     if(s->sendlen > uip_mss()) {
00165       s->sendlen -= uip_mss();
00166       s->sendptr += uip_mss();
00167     } else {
00168       s->sendptr += s->sendlen;
00169       s->sendlen = 0;
00170     }
00171     s->state = STATE_ACKED;
00172     return 1;
00173   }
00174   return 0;
00175 }
00176 /*---------------------------------------------------------------------------*/
00177 PT_THREAD(psock_send(register struct psock *s, const char *buf,
00178                      unsigned int len))
00179 {
00180   PT_BEGIN(&s->psockpt);
00181
00182   /* If there is no data to send, we exit immediately. */
00183   if(len == 0) {
00184     PT_EXIT(&s->psockpt);
00185   }
00186
00187   /* Save the length of and a pointer to the data that is to be
00188      sent. */
00189   s->sendptr = (unsigned char*)buf;
00190   s->sendlen = len;
00191
00192   s->state = STATE_NONE;
00193
00194   /* We loop here until all data is sent. The s->sendlen variable is
00195      updated by the data_sent() function. */
00196   while(s->sendlen > 0) {
00197
00198     /*
00199      * The condition for this PT_WAIT_UNTIL is a little tricky: the
00200      * protothread will wait here until all data has been acknowledged
00201      * (data_acked() returns true) and until all data has been sent
00202      * (send_data() returns true). The two functions data_acked() and
00203      * send_data() must be called in succession to ensure that all
00204      * data is sent. Therefore the & operator is used instead of the
00205      * && operator, which would cause only the data_acked() function
00206      * to be called when it returns false.
00207      */
00208     PT_WAIT_UNTIL(&s->psockpt, data_acked(s) & send_data(s));
00209   }
00210
00211   s->state = STATE_NONE;
00212
00213   PT_END(&s->psockpt);
00214 }
00215 /*---------------------------------------------------------------------------*/
00216 PT_THREAD(psock_generator_send(register struct psock *s,
00217                                unsigned short (*generate)(void *), void *arg))
00218 {
00219   PT_BEGIN(&s->psockpt);
00220
00221   /* Ensure that there is a generator function to call. */
00222   if(generate == NULL) {
00223     PT_EXIT(&s->psockpt);
00224   }
00225
00226   /* Call the generator function to generate the data in the
00227      uip_appdata buffer. */
00228   s->sendlen = generate(arg);
00229   s->sendptr = uip_appdata;
00230
00231   s->state = STATE_NONE;
00232   do {
00233     /* Call the generator function again if we are called to perform a
00234        retransmission. */
00235     if(uip_rexmit()) {
00236       generate(arg);
00237     }
00238     /* Wait until all data is sent and acknowledged. */
00239     PT_WAIT_UNTIL(&s->psockpt, data_acked(s) & send_data(s));
00240   } while(s->sendlen > 0);
00241
00242   s->state = STATE_NONE;
00243
00244   PT_END(&s->psockpt);
00245 }
00246 /*---------------------------------------------------------------------------*/
00247 u16_t
00248 psock_datalen(struct psock *psock)
00249 {
00250   return psock->bufsize - psock->buf.left;
00251 }
00252 /*---------------------------------------------------------------------------*/
00253 char
00254 psock_newdata(struct psock *s)
00255 {
00256   if(s->readlen > 0) {
00257     /* There is data in the uip_appdata buffer that has not yet been
00258        read with the PSOCK_READ functions. */
00259     return 1;
00260   } else if(s->state == STATE_READ) {
00261     /* All data in uip_appdata buffer already consumed. */
00262     s->state = STATE_BLOCKED_NEWDATA;
00263     return 0;
00264   } else if(uip_newdata()) {
00265     /* There is new data that has not been consumed. */
00266     return 1;
00267   } else {
00268     /* There is no new data. */
00269     return 0;
00270   }
00271 }
00272 /*---------------------------------------------------------------------------*/
00273 PT_THREAD(psock_readto(register struct psock *psock, unsigned char c))
00274 {
00275   PT_BEGIN(&psock->psockpt);
00276
00277   buf_setup(&psock->buf, (unsigned char*)psock->bufptr, psock->bufsize);
00278
00279   /* XXX: Should add buf_checkmarker() before do{} loop, if
00280      incoming data has been handled while waiting for a write. */
00281
00282   do {
00283     if(psock->readlen == 0) {
00284       PT_WAIT_UNTIL(&psock->psockpt, psock_newdata(psock));
00285       psock->state = STATE_READ;
00286       psock->readptr = (u8_t *)uip_appdata;
00287       psock->readlen = uip_datalen();
00288     }
00289   } while((buf_bufto(&psock->buf, c,
00290                      &psock->readptr,
00291                      &psock->readlen) & BUF_FOUND) == 0);
00292
00293   if(psock_datalen(psock) == 0) {
00294     psock->state = STATE_NONE;
00295     PT_RESTART(&psock->psockpt);
00296   }
00297   PT_END(&psock->psockpt);
00298 }
00299 /*---------------------------------------------------------------------------*/
00300 PT_THREAD(psock_readbuf(register struct psock *psock))
00301 {
00302   PT_BEGIN(&psock->psockpt);
00303
00304   buf_setup(&psock->buf, (unsigned char * ) psock->bufptr, psock->bufsize);
00305
00306   /* XXX: Should add buf_checkmarker() before do{} loop, if
00307      incoming data has been handled while waiting for a write. */
00308
00309   do {
00310     if(psock->readlen == 0) {
00311       PT_WAIT_UNTIL(&psock->psockpt, psock_newdata(psock));
00312       printf("Waited for newdata\n");
00313       psock->state = STATE_READ;
00314       psock->readptr = (u8_t *)uip_appdata;
00315       psock->readlen = uip_datalen();
00316     }
00317   } while(buf_bufdata(&psock->buf, psock->bufsize,
00318                          &psock->readptr,
00319                          &psock->readlen) != BUF_FULL);
00320
00321   if(psock_datalen(psock) == 0) {
00322     psock->state = STATE_NONE;
00323     PT_RESTART(&psock->psockpt);
00324   }
00325   PT_END(&psock->psockpt);
00326 }
00327 /*---------------------------------------------------------------------------*/
00328 void
00329 psock_init(register struct psock *psock, char *buffer, unsigned int buffersize)
00330 {
00331   psock->state = STATE_NONE;
00332   psock->readlen = 0;
00333   psock->bufptr = buffer;
00334   psock->bufsize = buffersize;
00335   buf_setup(&psock->buf, (unsigned char*) buffer, buffersize);
00336   PT_INIT(&psock->pt);
00337   PT_INIT(&psock->psockpt);
00338 }
00339 /*---------------------------------------------------------------------------*/
Generated on Tue Jun 7 14:59:00 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/uip/psock.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/uip/psock.h

Go to the documentation of this file.
00001 /*
00002  * Copyright (c) 2004, Swedish Institute of Computer Science.
00003  * All rights reserved.
00004  *
00005  * Redistribution and use in source and binary forms, with or without
00006  * modification, are permitted provided that the following conditions
00007  * are met:
00008  * 1. Redistributions of source code must retain the above copyright
00009  *    notice, this list of conditions and the following disclaimer.
00010  * 2. Redistributions in binary form must reproduce the above copyright
00011  *    notice, this list of conditions and the following disclaimer in the
00012  *    documentation and/or other materials provided with the distribution.
00013  * 3. Neither the name of the Institute nor the names of its contributors
00014  *    may be used to endorse or promote products derived from this software
00015  *    without specific prior written permission.
00016  *
00017  * THIS SOFTWARE IS PROVIDED BY THE INSTITUTE AND CONTRIBUTORS ``AS IS'' AND
00018  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
00019  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
00020  * ARE DISCLAIMED.  IN NO EVENT SHALL THE INSTITUTE OR CONTRIBUTORS BE LIABLE
00021  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
00022  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
00023  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
00024  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
00025  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
00026  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
00027  * SUCH DAMAGE.
00028  *
00029  * This file is part of the uIP TCP/IP stack
00030  *
00031  * Author: Adam Dunkels <adam@sics.se>
00032  *
00033  * $Id: psock.h,v 1.3 2006/06/12 08:00:30 adam Exp $
00034  */
00035
00085 #ifndef __PSOCK_H__
00086 #define __PSOCK_H__
00087
00088 #include "uipopt.h"
00089 #include "pt.h"
00090
00091  /*
00092  * The structure that holds the state of a buffer.
00093  *
00094  * This structure holds the state of a uIP buffer. The structure has
00095  * no user-visible elements, but is used through the functions
00096  * provided by the library.
00097  *
00098  */
00099 struct psock_buf {
00100   u8_t *ptr;
00101   unsigned short left;
00102 };
00103
00110 struct psock {
00111   struct pt pt, psockpt; /* Protothreads - one that's using the psock
00112                             functions, and one that runs inside the
00113                             psock functions. */
00114   const u8_t *sendptr;   /* Pointer to the next data to be sent. */
00115   u8_t *readptr;         /* Pointer to the next data to be read. */
00116
00117   char *bufptr;          /* Pointer to the buffer used for buffering
00118                             incoming data. */
00119
00120   u16_t sendlen;         /* The number of bytes left to be sent. */
00121   u16_t readlen;         /* The number of bytes left to be read. */
00122
00123   struct psock_buf buf;  /* The structure holding the state of the
00124                             input buffer. */
00125   unsigned int bufsize;  /* The size of the input buffer. */
00126
00127   unsigned char state;   /* The state of the protosocket. */
00128 };
00129
00130 void psock_init(struct psock *psock, char *buffer, unsigned int buffersize);
00148 #define PSOCK_INIT(psock, buffer, buffersize) \
00149   psock_init(psock, buffer, buffersize)
00150
00162 #define PSOCK_BEGIN(psock) PT_BEGIN(&((psock)->pt))
00163
00164 PT_THREAD(psock_send(struct psock *psock, const char *buf, unsigned int len));
00182 #define PSOCK_SEND(psock, data, datalen)                \
00183     PT_WAIT_THREAD(&((psock)->pt), psock_send(psock, data, datalen))
00184
00195 #define PSOCK_SEND_STR(psock, str)                      \
00196     PT_WAIT_THREAD(&((psock)->pt), psock_send(psock, str, strlen(str)))
00197
00198 PT_THREAD(psock_generator_send(struct psock *psock,
00199                                 unsigned short (*f)(void *), void *arg));
00200
00223 #define PSOCK_GENERATOR_SEND(psock, generator, arg)     \
00224     PT_WAIT_THREAD(&((psock)->pt),                                      \
00225                    psock_generator_send(psock, generator, arg))
00226
00227
00239 #define PSOCK_CLOSE(psock) uip_close()
00240
00241 PT_THREAD(psock_readbuf(struct psock *psock));
00254 #define PSOCK_READBUF(psock)                            \
00255   PT_WAIT_THREAD(&((psock)->pt), psock_readbuf(psock))
00256
00257 PT_THREAD(psock_readto(struct psock *psock, unsigned char c));
00272 #define PSOCK_READTO(psock, c)                          \
00273   PT_WAIT_THREAD(&((psock)->pt), psock_readto(psock, c))
00274
00285 #define PSOCK_DATALEN(psock) psock_datalen(psock)
00286
00287 u16_t psock_datalen(struct psock *psock);
00288
00301 #define PSOCK_EXIT(psock) PT_EXIT(&((psock)->pt))
00302
00312 #define PSOCK_CLOSE_EXIT(psock)         \
00313   do {                                          \
00314     PSOCK_CLOSE(psock);                 \
00315     PSOCK_EXIT(psock);                  \
00316   } while(0)
00317
00329 #define PSOCK_END(psock) PT_END(&((psock)->pt))
00330
00331 char psock_newdata(struct psock *s);
00332
00343 #define PSOCK_NEWDATA(psock) psock_newdata(psock)
00344
00376 #define PSOCK_WAIT_UNTIL(psock, condition)    \
00377   PT_WAIT_UNTIL(&((psock)->pt), (condition));
00378
00379 #define PSOCK_WAIT_THREAD(psock, condition)   \
00380   PT_WAIT_THREAD(&((psock)->pt), (condition))
00381
00382 #endif /* __PSOCK_H__ */
00383
Generated on Tue Jun 7 14:59:00 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/uip/pt.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/uip/pt.h

Go to the documentation of this file.
00001 /*
00002  * Copyright (c) 2004-2005, Swedish Institute of Computer Science.
00003  * All rights reserved.
00004  *
00005  * Redistribution and use in source and binary forms, with or without
00006  * modification, are permitted provided that the following conditions
00007  * are met:
00008  * 1. Redistributions of source code must retain the above copyright
00009  *    notice, this list of conditions and the following disclaimer.
00010  * 2. Redistributions in binary form must reproduce the above copyright
00011  *    notice, this list of conditions and the following disclaimer in the
00012  *    documentation and/or other materials provided with the distribution.
00013  * 3. Neither the name of the Institute nor the names of its contributors
00014  *    may be used to endorse or promote products derived from this software
00015  *    without specific prior written permission.
00016  *
00017  * THIS SOFTWARE IS PROVIDED BY THE INSTITUTE AND CONTRIBUTORS ``AS IS'' AND
00018  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
00019  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
00020  * ARE DISCLAIMED.  IN NO EVENT SHALL THE INSTITUTE OR CONTRIBUTORS BE LIABLE
00021  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
00022  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
00023  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
00024  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
00025  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
00026  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
00027  * SUCH DAMAGE.
00028  *
00029  * This file is part of the uIP TCP/IP stack
00030  *
00031  * Author: Adam Dunkels <adam@sics.se>
00032  *
00033  * $Id: pt.h,v 1.2 2006/06/12 08:00:30 adam Exp $
00034  */
00035
00049 #ifndef __PT_H__
00050 #define __PT_H__
00051
00052 #include "lc.h"
00053
00054 struct pt {
00055   lc_t lc;
00056 };
00057
00058 #define PT_WAITING 0
00059 #define PT_EXITED  1
00060 #define PT_ENDED   2
00061 #define PT_YIELDED 3
00062
00080 #define PT_INIT(pt)   LC_INIT((pt)->lc)
00081
00100 #define PT_THREAD(name_args) char name_args
00101
00115 #define PT_BEGIN(pt) { char PT_YIELD_FLAG = 1; LC_RESUME((pt)->lc)
00116
00127 #define PT_END(pt) LC_END((pt)->lc); PT_YIELD_FLAG = 0; \
00128                    PT_INIT(pt); return PT_ENDED; }
00129
00148 #define PT_WAIT_UNTIL(pt, condition)            \
00149   do {                                          \
00150     LC_SET((pt)->lc);                           \
00151     if(!(condition)) {                          \
00152       return PT_WAITING;                        \
00153     }                                           \
00154   } while(0)
00155
00167 #define PT_WAIT_WHILE(pt, cond)  PT_WAIT_UNTIL((pt), !(cond))
00168
00192 #define PT_WAIT_THREAD(pt, thread) PT_WAIT_WHILE((pt), PT_SCHEDULE(thread))
00193
00206 #define PT_SPAWN(pt, child, thread)             \
00207   do {                                          \
00208     PT_INIT((child));                           \
00209     PT_WAIT_THREAD((pt), (thread));             \
00210   } while(0)
00211
00229 #define PT_RESTART(pt)                          \
00230   do {                                          \
00231     PT_INIT(pt);                                \
00232     return PT_WAITING;                  \
00233   } while(0)
00234
00246 #define PT_EXIT(pt)                             \
00247   do {                                          \
00248     PT_INIT(pt);                                \
00249     return PT_EXITED;                   \
00250   } while(0)
00251
00271 #define PT_SCHEDULE(f) ((f) == PT_WAITING)
00272
00290 #define PT_YIELD(pt)                            \
00291   do {                                          \
00292     PT_YIELD_FLAG = 0;                          \
00293     LC_SET((pt)->lc);                           \
00294     if(PT_YIELD_FLAG == 0) {                    \
00295       return PT_YIELDED;                        \
00296     }                                           \
00297   } while(0)
00298
00310 #define PT_YIELD_UNTIL(pt, cond)                \
00311   do {                                          \
00312     PT_YIELD_FLAG = 0;                          \
00313     LC_SET((pt)->lc);                           \
00314     if((PT_YIELD_FLAG == 0) || !(cond)) {       \
00315       return PT_YIELDED;                        \
00316     }                                           \
00317   } while(0)
00318
00321 #endif /* __PT_H__ */
00322
Generated on Tue Jun 7 14:59:00 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/PWM/Dual_Edge/pwm_dual_edge.c Source File

C:/nxpdrv/LPC1700CMSIS/Examples/PWM/Dual_Edge/pwm_dual_edge.c

Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          pwm_dual_edge.c                                 2010-05-21
00003 */
00026 #include "lpc17xx_pwm.h"
00027 #include "lpc17xx_libcfg.h"
00028 #include "lpc17xx_pinsel.h"
00029
00030 /* Example group ----------------------------------------------------------- */
00036 /*-------------------------MAIN FUNCTION------------------------------*/
00037 /*********************************************************************/
00042 int c_entry(void)
00043 {
00044         uint8_t temp;
00045         PWM_TIMERCFG_Type PWMCfgDat;
00046         PWM_MATCHCFG_Type PWMMatchCfgDat;
00047         PINSEL_CFG_Type PinCfg;
00048
00049         /* PWM block section -------------------------------------------- */
00050         /* Initialize PWM peripheral, timer mode
00051          * PWM prescale value = 1 (absolute value - tick value) */
00052         PWMCfgDat.PrescaleOption = PWM_TIMER_PRESCALE_TICKVAL;
00053         PWMCfgDat.PrescaleValue = 1;
00054         PWM_Init(LPC_PWM1, PWM_MODE_TIMER, (void *) &PWMCfgDat);
00055
00056         /*
00057          * Initialize PWM pin connect
00058          *
00059          */
00060         PinCfg.Funcnum = 1;
00061         PinCfg.OpenDrain = 0;
00062         PinCfg.Pinmode = 0;
00063         PinCfg.Portnum = 2;
00064         for (temp = 0; temp <= 6; temp++){
00065                 PinCfg.Pinnum = temp;
00066                 PINSEL_ConfigPin(&PinCfg);
00067         }
00068
00069
00070         /* Set match value for PWM match channel 0 = 100, update immediately */
00071         PWM_MatchUpdate(LPC_PWM1, 0, 100, PWM_MATCH_UPDATE_NOW);
00072         /* PWM Timer/Counter will be reset when channel 0 matching
00073          * no interrupt when match
00074          * no stop when match */
00075         PWMMatchCfgDat.IntOnMatch = DISABLE;
00076         PWMMatchCfgDat.MatchChannel = 0;
00077         PWMMatchCfgDat.ResetOnMatch = ENABLE;
00078         PWMMatchCfgDat.StopOnMatch = DISABLE;
00079         PWM_ConfigMatch(LPC_PWM1, &PWMMatchCfgDat);
00080
00081         /* Configure each PWM channel: --------------------------------------------- */
00082         /* - Channel 2: Double Edge
00083          * - Channel 4: Double Edge
00084          * - Channel 5: Single Edge
00085          * The Match register values are as follows:
00086          * - MR0 = 100 (PWM rate)
00087          * - MR1 = 41, MR2 = 78 (PWM2 output)
00088          * - MR3 = 53, MR4 = 27 (PWM4 output)
00089          * - MR5 = 65 (PWM5 output)
00090          * PWM Duty on each PWM channel:
00091          * - Channel 2: Set by match 1, Reset by match 2.
00092          * - Channel 4: Set by match 3, Reset by match 4.
00093          * - Channel 5: Set by match 0, Reset by match 5.
00094          */
00095
00096         /* Edge setting ------------------------------------ */
00097         PWM_ChannelConfig(LPC_PWM1, 2, PWM_CHANNEL_DUAL_EDGE);
00098         PWM_ChannelConfig(LPC_PWM1, 4, PWM_CHANNEL_DUAL_EDGE);
00099         PWM_ChannelConfig(LPC_PWM1, 5, PWM_CHANNEL_SINGLE_EDGE);
00100
00101         /* Match value setting ------------------------------------ */
00102         PWM_MatchUpdate(LPC_PWM1, 1, 41, PWM_MATCH_UPDATE_NOW);
00103         PWM_MatchUpdate(LPC_PWM1, 2, 78, PWM_MATCH_UPDATE_NOW);
00104         PWM_MatchUpdate(LPC_PWM1, 3, 53, PWM_MATCH_UPDATE_NOW);
00105         PWM_MatchUpdate(LPC_PWM1, 4, 27, PWM_MATCH_UPDATE_NOW);
00106         PWM_MatchUpdate(LPC_PWM1, 5, 65, PWM_MATCH_UPDATE_NOW);
00107
00108
00109         /* Match option setting ------------------------------------ */
00110         for (temp = 1; temp < 6; temp++)
00111         {
00112                 /* Configure match option */
00113                 PWMMatchCfgDat.IntOnMatch = DISABLE;
00114                 PWMMatchCfgDat.MatchChannel = temp;
00115                 PWMMatchCfgDat.ResetOnMatch = DISABLE;
00116                 PWMMatchCfgDat.StopOnMatch = DISABLE;
00117                 PWM_ConfigMatch(LPC_PWM1, &PWMMatchCfgDat);
00118         }
00119
00120         /* Enable PWM Channel Output ------------------------------------ */
00121         /* Channel 2 */
00122         PWM_ChannelCmd(LPC_PWM1, 2, ENABLE);
00123         /* Channel 4 */
00124         PWM_ChannelCmd(LPC_PWM1, 4, ENABLE);
00125         /* Channel 5 */
00126         PWM_ChannelCmd(LPC_PWM1, 5, ENABLE);
00127
00128         /* Reset and Start counter */
00129         PWM_ResetCounter(LPC_PWM1);
00130         PWM_CounterCmd(LPC_PWM1, ENABLE);
00131
00132         /* Start PWM now */
00133         PWM_Cmd(LPC_PWM1, ENABLE);
00134
00135     /* Loop forever */
00136     while(1);
00137     return 1;
00138 }
00139
00140 /* With ARM and GHS toolsets, the entry point is main() - this will
00141    allow the linker to generate wrapper code to setup stacks, allocate
00142    heap area, and initialize and copy code and data segments. For GNU
00143    toolsets, the entry point is through __start() in the crt0_gnu.asm
00144    file, and that startup code will setup stacks and data */
00145 int main(void)
00146 {
00147     return c_entry();
00148 }
00149
00150
00151 #ifdef  DEBUG
00152 /*******************************************************************************
00153 * @brief                Reports the name of the source file and the source line number
00154 *                               where the CHECK_PARAM error has occurred.
00155 * @param[in]    file Pointer to the source file name
00156 * @param[in]    line assert_param error line source number
00157 * @return               None
00158 *******************************************************************************/
00159 void check_failed(uint8_t *file, uint32_t line)
00160 {
00161         /* User can add his own implementation to report the file name and line number,
00162          ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
00163
00164         /* Infinite loop */
00165         while(1);
00166 }
00167 #endif
00168
00169 /*
00170  * @}
00171  */
Generated on Tue Jun 7 14:59:02 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/PWM/Match_Interrupt/pwm_match_int.c Source File

C:/nxpdrv/LPC1700CMSIS/Examples/PWM/Match_Interrupt/pwm_match_int.c

Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          pwm_match_int.c                                 2010-05-21
00003 */
00025 #include "lpc17xx_pwm.h"
00026 #include "lpc17xx_libcfg.h"
00027 #include "lpc17xx_pinsel.h"
00028
00029 /* Example group ----------------------------------------------------------- */
00035 /************************** PRIVATE DEFINITIONS *************************/
00036 // Time out definition - used in blocking mode in read/write function
00037 #define TIME_OUT        10000
00038
00039
00040 /************************** PRIVATE VARIABLES *************************/
00041 __IO uint32_t match_cnt = 0;
00042 __IO uint32_t long_duty = 0;
00043
00044 /************************** PRIVATE FUNCTIONS *************************/
00045 /* Interrupt service routine */
00046 void PWM1_IRQHandler(void);
00047
00048 /*----------------- INTERRUPT SERVICE ROUTINES --------------------------*/
00049 /*********************************************************************/
00054 void PWM1_IRQHandler(void)
00055 {
00056         /* Check whether if match flag for channel 0 is set or not */
00057         if (PWM_GetIntStatus(LPC_PWM1, PWM_INTSTAT_MR0))
00058         {
00059                 match_cnt++;
00060                 /* Clear the interrupt flag */
00061                 PWM_ClearIntPending(LPC_PWM1, PWM_INTSTAT_MR0);
00062         }
00063 }
00064
00065
00066 /*-------------------------MAIN FUNCTION------------------------------*/
00067 /*********************************************************************/
00072 int c_entry(void)
00073 {
00074         uint8_t temp, temp2;
00075         PWM_TIMERCFG_Type PWMCfgDat;
00076         PWM_MATCHCFG_Type PWMMatchCfgDat;
00077         PINSEL_CFG_Type PinCfg;
00078
00079         /* PWM block section -------------------------------------------- */
00080         /* Initialize PWM peripheral, timer mode
00081          * PWM prescale value = 1 (absolute value - tick value) */
00082         PWMCfgDat.PrescaleOption = PWM_TIMER_PRESCALE_TICKVAL;
00083         PWMCfgDat.PrescaleValue = 1;
00084         PWM_Init(LPC_PWM1, PWM_MODE_TIMER, (void *) &PWMCfgDat);
00085
00086         /*
00087          * Initialize PWM pin connect
00088          */
00089         PinCfg.Funcnum = 1;
00090         PinCfg.OpenDrain = 0;
00091         PinCfg.Pinmode = 0;
00092         PinCfg.Portnum = 2;
00093         for (temp = 0; temp <= 6; temp++){
00094                 PinCfg.Pinnum = temp;
00095                 PINSEL_ConfigPin(&PinCfg);
00096         }
00097
00098
00099         /* Set match value for PWM match channel 0 = 256, update immediately */
00100         PWM_MatchUpdate(LPC_PWM1, 0, 256, PWM_MATCH_UPDATE_NOW);
00101         /* PWM Timer/Counter will be reset when channel 0 matching
00102          * Enable interrupt when match
00103          * no stop when match */
00104         PWMMatchCfgDat.IntOnMatch = ENABLE;
00105         PWMMatchCfgDat.MatchChannel = 0;
00106         PWMMatchCfgDat.ResetOnMatch = ENABLE;
00107         PWMMatchCfgDat.StopOnMatch = DISABLE;
00108         PWM_ConfigMatch(LPC_PWM1, &PWMMatchCfgDat);
00109
00110         /* Configure each PWM channel: --------------------------------------------- */
00111         /* - Single edge
00112          * - PWM Duty on each PWM channel determined by
00113          * the match on channel 0 to the match of that match channel.
00114          * Example: PWM Duty on PWM channel 1 determined by
00115          * the match on channel 0 to the match of match channel 1.
00116          */
00117
00118         /* Configure PWM channel edge option
00119          * Note: PWM Channel 1 is in single mode as default state and
00120          * can not be changed to double edge mode */
00121         for (temp = 2; temp < 7; temp++)
00122         {
00123                 PWM_ChannelConfig(LPC_PWM1, temp, PWM_CHANNEL_SINGLE_EDGE);
00124         }
00125
00126         /* Setting interrupt for PWM ---------------------------------------------- */
00127     /* Disable PWM interrupt */
00128     NVIC_DisableIRQ(PWM1_IRQn);
00129     /* preemption = 1, sub-priority = 1 */
00130     NVIC_SetPriority(PWM1_IRQn, ((0x01<<3)|0x01));
00131
00132         /* Configure match value for each match channel */
00133         temp2 = 10;
00134         for (temp = 1; temp < 7; temp++)
00135         {
00136                 /* Set up match value */
00137                 PWM_MatchUpdate(LPC_PWM1, temp, temp2, PWM_MATCH_UPDATE_NOW);
00138                 /* Configure match option */
00139                 PWMMatchCfgDat.IntOnMatch = DISABLE;
00140                 PWMMatchCfgDat.MatchChannel = temp;
00141                 PWMMatchCfgDat.ResetOnMatch = DISABLE;
00142                 PWMMatchCfgDat.StopOnMatch = DISABLE;
00143                 PWM_ConfigMatch(LPC_PWM1, &PWMMatchCfgDat);
00144                 /* Enable PWM Channel Output */
00145                 PWM_ChannelCmd(LPC_PWM1, temp, ENABLE);
00146                 /* Increase match value by 10 */
00147                 temp2 += 10;
00148         }
00149
00150     /* Enable PWM interrupt */
00151     NVIC_EnableIRQ(PWM1_IRQn);
00152
00153         /* Reset and Start counter */
00154         PWM_ResetCounter(LPC_PWM1);
00155         PWM_CounterCmd(LPC_PWM1, ENABLE);
00156
00157         /* Start PWM now */
00158         PWM_Cmd(LPC_PWM1, ENABLE);
00159
00160         // Update PWM1.1 every 0x1000 match interrupt
00161         while (1)
00162         {
00163                 if (match_cnt >= 0x1000) {
00164                         match_cnt = 0;
00165                         long_duty++;
00166                         if (long_duty >= 256) {
00167                                 // Reset duty
00168                                 long_duty = 0;
00169                                 // Print info
00170                                 //UART_Puts_(uartdev, "PWM1.1 is reset!");
00171                         }
00172
00173                         // Update PWM1.1 duty
00174                         PWM_MatchUpdate(LPC_PWM1, 1, long_duty, PWM_MATCH_UPDATE_NOW);
00175                 }
00176         }
00177     return 1;
00178 }
00179
00180 /* With ARM and GHS toolsets, the entry point is main() - this will
00181    allow the linker to generate wrapper code to setup stacks, allocate
00182    heap area, and initialize and copy code and data segments. For GNU
00183    toolsets, the entry point is through __start() in the crt0_gnu.asm
00184    file, and that startup code will setup stacks and data */
00185 int main(void)
00186 {
00187     return c_entry();
00188 }
00189
00190
00191 #ifdef  DEBUG
00192 /*******************************************************************************
00193 * @brief                Reports the name of the source file and the source line number
00194 *                               where the CHECK_PARAM error has occurred.
00195 * @param[in]    file Pointer to the source file name
00196 * @param[in]    line assert_param error line source number
00197 * @return               None
00198 *******************************************************************************/
00199 void check_failed(uint8_t *file, uint32_t line)
00200 {
00201         /* User can add his own implementation to report the file name and line number,
00202          ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
00203
00204         /* Infinite loop */
00205         while(1);
00206 }
00207 #endif
00208
00209 /*
00210  * @}
00211  */
Generated on Tue Jun 7 14:59:02 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/TIMER/PWMSignal/pwm_signal.c Source File

C:/nxpdrv/LPC1700CMSIS/Examples/TIMER/PWMSignal/pwm_signal.c

Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          pwm_signal.c                            2010-05-21
00003 */
00026 #include "lpc17xx_libcfg.h"
00027 #include "debug_frmwrk.h"
00028 #include "lpc17xx_gpio.h"
00029 #include "lpc17xx_pinsel.h"
00030 #include "lpc17xx_timer.h"
00031
00032 /* Example group ----------------------------------------------------------- */
00038 /************************** PRIVATE VARIABLES *************************/
00039 uint8_t menu[]=
00040         "********************************************************************************\n\r"
00041         "Hello NXP Semiconductors \n\r"
00042         "System Tick demo \n\r"
00043         "\t - MCU: LPC17xx \n\r"
00044         "\t - Core: ARM CORTEX-M3 \n\r"
00045         "\t - Communicate via: UART0 - 115200 bps \n\r"
00046         "This example used TIMERs to generate 4 PWM signals with different duty cycles \n\r"
00047         "********************************************************************************\n\r";
00048 FunctionalState PWM0_State = ENABLE;
00049 FunctionalState PWM1_State = ENABLE;
00050 FunctionalState PWM2_State = ENABLE;
00051 FunctionalState PWM3_State = ENABLE;
00052
00053 TIM_TIMERCFG_Type TIM_ConfigStruct;
00054 TIM_MATCHCFG_Type TIM_MatchConfigStruct;
00055
00056 /************************** PRIVATE FUNCTIONS *************************/
00057 void TIMER0_IRQHandler(void);
00058 void TIMER1_IRQHandler(void);
00059 void TIMER2_IRQHandler(void);
00060 void TIMER3_IRQHandler(void);
00061
00062 void print_menu(void);
00063
00064 /*----------------- INTERRUPT SERVICE ROUTINES --------------------------*/
00065 /*********************************************************************/
00070 void TIMER0_IRQHandler(void)
00071 {
00072         //duty cycle = 12.5%
00073         TIM_Cmd(LPC_TIM0,DISABLE);
00074         TIM_ClearIntPending(LPC_TIM0, TIM_MR0_INT);
00075         TIM_ResetCounter(LPC_TIM0);
00076         if((PWM0_State == ENABLE))
00077         {
00078                 TIM_UpdateMatchValue(LPC_TIM0, 0, 100);
00079                 PWM0_State = DISABLE;
00080         }
00081         else
00082         {
00083                 TIM_UpdateMatchValue(LPC_TIM0, 0, 700);
00084                 PWM0_State = ENABLE;
00085         }
00086         TIM_Cmd(LPC_TIM0,ENABLE);
00087 }
00088
00089 /*********************************************************************/
00094 void TIMER1_IRQHandler(void)
00095 {
00096         //duty cycle = 25%
00097         TIM_Cmd(LPC_TIM1,DISABLE);
00098         TIM_ClearIntPending(LPC_TIM1, TIM_MR0_INT);
00099         TIM_ResetCounter(LPC_TIM1);
00100         if((PWM1_State == ENABLE))
00101         {
00102                 TIM_UpdateMatchValue(LPC_TIM1,0, 200);
00103                 PWM1_State = DISABLE;
00104         }
00105         else
00106         {
00107                 TIM_UpdateMatchValue(LPC_TIM1,0, 600);
00108                 PWM1_State = ENABLE;
00109         }
00110         TIM_Cmd(LPC_TIM1,ENABLE);
00111 }
00112
00113 /*********************************************************************/
00118 void TIMER2_IRQHandler(void)
00119 {
00120         //duty cycle = 37,5%
00121         TIM_Cmd(LPC_TIM2,DISABLE);
00122         TIM_ClearIntPending(LPC_TIM2, TIM_MR0_INT);
00123         TIM_ResetCounter(LPC_TIM2);
00124         if((PWM2_State == ENABLE))
00125         {
00126                 TIM_UpdateMatchValue(LPC_TIM2,0, 300);
00127                 PWM2_State = DISABLE;
00128         }
00129         else
00130         {
00131                 TIM_UpdateMatchValue(LPC_TIM2,0, 500);
00132                 PWM2_State = ENABLE;
00133         }
00134         TIM_Cmd(LPC_TIM2,ENABLE);
00135 }
00136
00137 /*********************************************************************/
00142 void TIMER3_IRQHandler(void)
00143 {
00144         //duty cycle = 50%
00145         TIM_Cmd(LPC_TIM3,DISABLE);
00146         TIM_ClearIntPending(LPC_TIM3, TIM_MR0_INT);
00147         TIM_ResetCounter(LPC_TIM3);
00148         TIM_Cmd(LPC_TIM3,ENABLE);
00149 }
00150
00151
00152 /*-------------------------PRIVATE FUNCTIONS------------------------------*/
00153 /*********************************************************************/
00158 void print_menu(void)
00159 {
00160         _DBG(menu);
00161 }
00162
00163
00164 /*-------------------------MAIN FUNCTION------------------------------*/
00165 /*********************************************************************/
00170 int c_entry (void)
00171 {
00172         PINSEL_CFG_Type PinCfg;
00173
00174         /* Initialize debug via UART0
00175          * – 115200bps
00176          * – 8 data bit
00177          * – No parity
00178          * – 1 stop bit
00179          * – No flow control
00180          */
00181         debug_frmwrk_init();
00182
00183         // print welcome screen
00184         print_menu();
00185
00186         /* Select pin:
00187          * P1.28: MAT0.0
00188          * P1.22: MAT1.0
00189          * P0.6:  MAT2.0
00190          * P0.10: MAT3.0
00191          */
00192         PinCfg.Funcnum = 3;
00193         PinCfg.OpenDrain = 0;
00194         PinCfg.Pinmode = 0;
00195         PinCfg.Portnum = 1;
00196         PinCfg.Pinnum = 28;
00197         PINSEL_ConfigPin(&PinCfg);
00198         PinCfg.Pinnum = 22;
00199         PINSEL_ConfigPin(&PinCfg);
00200         PinCfg.Portnum = 0;
00201         PinCfg.Pinnum = 6;
00202         PINSEL_ConfigPin(&PinCfg);
00203         PinCfg.Pinnum = 10;
00204         PINSEL_ConfigPin(&PinCfg);
00205
00206         // Initialize 4 timers, prescale count time of 100uS
00207         TIM_ConfigStruct.PrescaleOption = TIM_PRESCALE_USVAL;
00208         TIM_ConfigStruct.PrescaleValue  = 100;
00209
00210         TIM_Init(LPC_TIM0, TIM_TIMER_MODE,&TIM_ConfigStruct);
00211         TIM_Init(LPC_TIM1, TIM_TIMER_MODE,&TIM_ConfigStruct);
00212         TIM_Init(LPC_TIM2, TIM_TIMER_MODE,&TIM_ConfigStruct);
00213         TIM_Init(LPC_TIM3, TIM_TIMER_MODE,&TIM_ConfigStruct);
00214
00215         // Configure 4 match channels
00216         // use channel 0, MR0
00217         TIM_MatchConfigStruct.MatchChannel = 0;
00218         // Enable interrupt when MR0 matches the value in TC register
00219         TIM_MatchConfigStruct.IntOnMatch   = TRUE;
00220         //Enable reset on MR0: TIMER will reset if MR0 matches it
00221         TIM_MatchConfigStruct.ResetOnMatch = TRUE;
00222         //Stop on MR0 if MR0 matches it
00223         TIM_MatchConfigStruct.StopOnMatch  = FALSE;
00224         //Toggle MR0 pin if MR0 matches it
00225         TIM_MatchConfigStruct.ExtMatchOutputType = TIM_EXTMATCH_TOGGLE;
00226         // Set Match value
00227         TIM_MatchConfigStruct.MatchValue   = 700;
00228         // Set configuration for Tim_MatchConfig
00229         TIM_ConfigMatch(LPC_TIM0,&TIM_MatchConfigStruct);
00230         TIM_MatchConfigStruct.MatchValue   = 600;
00231         TIM_ConfigMatch(LPC_TIM1,&TIM_MatchConfigStruct);
00232         TIM_MatchConfigStruct.MatchValue   = 500;
00233         TIM_ConfigMatch(LPC_TIM2,&TIM_MatchConfigStruct);
00234         TIM_MatchConfigStruct.MatchValue   = 800;
00235         TIM_ConfigMatch(LPC_TIM3,&TIM_MatchConfigStruct);
00236
00237         /* preemption = 1, sub-priority = 1 */
00238         NVIC_SetPriority(TIMER0_IRQn, ((0x01<<3)|0x01));
00239         /* Enable interrupt for timer 0 */
00240         NVIC_EnableIRQ(TIMER0_IRQn);
00241         // To start timer 0
00242         TIM_Cmd(LPC_TIM0,ENABLE);
00243
00244         /* preemption = 1, sub-priority = 1 */
00245         NVIC_SetPriority(TIMER1_IRQn, ((0x01<<3)|0x02));
00246         /* Enable interrupt for timer 1 */
00247         NVIC_EnableIRQ(TIMER1_IRQn);
00248         // To start timer 1
00249         TIM_Cmd(LPC_TIM1,ENABLE);
00250
00251         /* preemption = 1, sub-priority = 1 */
00252         NVIC_SetPriority(TIMER2_IRQn, ((0x01<<3)|0x03));
00253         /* Enable interrupt for timer 1 */
00254         NVIC_EnableIRQ(TIMER2_IRQn);
00255         // To start timer 1
00256         TIM_Cmd(LPC_TIM2,ENABLE);
00257
00258         /* preemption = 1, sub-priority = 1 */
00259         NVIC_SetPriority(TIMER3_IRQn, ((0x01<<3)|0x04));
00260         /* Enable interrupt for timer 1 */
00261         NVIC_EnableIRQ(TIMER3_IRQn);
00262         // To start timer 1
00263         TIM_Cmd(LPC_TIM3,ENABLE);
00264
00265         while(1);
00266         return (1);
00267 }
00268
00269
00270 /* With ARM and GHS toolsets, the entry point is main() - this will
00271    allow the linker to generate wrapper code to setup stacks, allocate
00272    heap area, and initialize and copy code and data segments. For GNU
00273    toolsets, the entry point is through __start() in the crt0_gnu.asm
00274    file, and that startup code will setup stacks and data */
00275 int main(void)
00276 {
00277     return c_entry();
00278 }
00279
00280 #ifdef  DEBUG
00281 /*******************************************************************************
00282 * @brief                Reports the name of the source file and the source line number
00283 *                               where the CHECK_PARAM error has occurred.
00284 * @param[in]    file Pointer to the source file name
00285 * @param[in]    line assert_param error line source number
00286 * @return               None
00287 *******************************************************************************/
00288 void check_failed(uint8_t *file, uint32_t line)
00289 {
00290         /* User can add his own implementation to report the file name and line number,
00291          ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
00292
00293         /* Infinite loop */
00294         while(1);
00295 }
00296 #endif
00297
00298 /*
00299  * @}
00300  */
Generated on Tue Jun 7 14:59:03 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/PWM/Single_Edge/pwm_single_edge.c Source File

C:/nxpdrv/LPC1700CMSIS/Examples/PWM/Single_Edge/pwm_single_edge.c

Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          pwm_single_edge.c                               2010-05-21
00003 */
00026 #include "lpc17xx_pwm.h"
00027 #include "lpc17xx_libcfg.h"
00028 #include "lpc17xx_pinsel.h"
00029
00030 /* Example group ----------------------------------------------------------- */
00036 /*-------------------------MAIN FUNCTION------------------------------*/
00037 /*********************************************************************/
00042 int c_entry(void)
00043 {
00044         uint8_t temp, temp2;
00045         PWM_TIMERCFG_Type PWMCfgDat;
00046         PWM_MATCHCFG_Type PWMMatchCfgDat;
00047         PINSEL_CFG_Type PinCfg;
00048
00049         /* PWM block section -------------------------------------------- */
00050         /* Initialize PWM peripheral, timer mode
00051          * PWM prescale value = 1 (absolute value - tick value) */
00052         PWMCfgDat.PrescaleOption = PWM_TIMER_PRESCALE_TICKVAL;
00053         PWMCfgDat.PrescaleValue = 1;
00054         PWM_Init(LPC_PWM1, PWM_MODE_TIMER, (void *) &PWMCfgDat);
00055
00056         /*
00057          * Initialize PWM pin connect
00058          */
00059         PinCfg.Funcnum = 1;
00060         PinCfg.OpenDrain = 0;
00061         PinCfg.Pinmode = 0;
00062         PinCfg.Portnum = 2;
00063         for (temp = 0; temp <= 6; temp++){
00064                 PinCfg.Pinnum = temp;
00065                 PINSEL_ConfigPin(&PinCfg);
00066         }
00067
00068
00069         /* Set match value for PWM match channel 0 = 256, update immediately */
00070         PWM_MatchUpdate(LPC_PWM1, 0, 256, PWM_MATCH_UPDATE_NOW);
00071         /* PWM Timer/Counter will be reset when channel 0 matching
00072          * no interrupt when match
00073          * no stop when match */
00074         PWMMatchCfgDat.IntOnMatch = DISABLE;
00075         PWMMatchCfgDat.MatchChannel = 0;
00076         PWMMatchCfgDat.ResetOnMatch = ENABLE;
00077         PWMMatchCfgDat.StopOnMatch = DISABLE;
00078         PWM_ConfigMatch(LPC_PWM1, &PWMMatchCfgDat);
00079
00080         /* Configure each PWM channel: --------------------------------------------- */
00081         /* - Single edge
00082          * - PWM Duty on each PWM channel determined by
00083          * the match on channel 0 to the match of that match channel.
00084          * Example: PWM Duty on PWM channel 1 determined by
00085          * the match on channel 0 to the match of match channel 1.
00086          */
00087
00088         /* Configure PWM channel edge option
00089          * Note: PWM Channel 1 is in single mode as default state and
00090          * can not be changed to double edge mode */
00091         for (temp = 2; temp < 7; temp++)
00092         {
00093                 PWM_ChannelConfig(LPC_PWM1, temp, PWM_CHANNEL_SINGLE_EDGE);
00094         }
00095
00096
00097         /* Configure match value for each match channel */
00098         temp2 = 10;
00099         for (temp = 1; temp < 7; temp++)
00100         {
00101                 /* Set up match value */
00102                 PWM_MatchUpdate(LPC_PWM1, temp, temp2, PWM_MATCH_UPDATE_NOW);
00103                 /* Configure match option */
00104                 PWMMatchCfgDat.IntOnMatch = DISABLE;
00105                 PWMMatchCfgDat.MatchChannel = temp;
00106                 PWMMatchCfgDat.ResetOnMatch = DISABLE;
00107                 PWMMatchCfgDat.StopOnMatch = DISABLE;
00108                 PWM_ConfigMatch(LPC_PWM1, &PWMMatchCfgDat);
00109                 /* Enable PWM Channel Output */
00110                 PWM_ChannelCmd(LPC_PWM1, temp, ENABLE);
00111                 /* Increase match value by 10 */
00112                 temp2 += 10;
00113         }
00114
00115         /* Reset and Start counter */
00116         PWM_ResetCounter(LPC_PWM1);
00117         PWM_CounterCmd(LPC_PWM1, ENABLE);
00118
00119         /* Start PWM now */
00120         PWM_Cmd(LPC_PWM1, ENABLE);
00121
00122     /* Loop forever */
00123     while(1);
00124     return 1;
00125 }
00126
00127 /* With ARM and GHS toolsets, the entry point is main() - this will
00128    allow the linker to generate wrapper code to setup stacks, allocate
00129    heap area, and initialize and copy code and data segments. For GNU
00130    toolsets, the entry point is through __start() in the crt0_gnu.asm
00131    file, and that startup code will setup stacks and data */
00132 int main(void)
00133 {
00134     return c_entry();
00135 }
00136
00137
00138 #ifdef  DEBUG
00139 /*******************************************************************************
00140 * @brief                Reports the name of the source file and the source line number
00141 *                               where the CHECK_PARAM error has occurred.
00142 * @param[in]    file Pointer to the source file name
00143 * @param[in]    line assert_param error line source number
00144 * @return               None
00145 *******************************************************************************/
00146 void check_failed(uint8_t *file, uint32_t line)
00147 {
00148         /* User can add his own implementation to report the file name and line number,
00149          ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
00150
00151         /* Infinite loop */
00152         while(1);
00153 }
00154 #endif
00155
00156 /*
00157  * @}
00158  */
Generated on Tue Jun 7 14:59:02 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/QEI/QEI_Velo/qei_test_velo.c Source File

C:/nxpdrv/LPC1700CMSIS/Examples/QEI/QEI_Velo/qei_test_velo.c

Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          qei_test.c                                              2010-05-21
00003 */
00026 #include "lpc17xx_qei.h"
00027 #include "lpc17xx_libcfg.h"
00028 #include "lpc17xx_timer.h"
00029 #include "lpc17xx_clkpwr.h"
00030 #include "debug_frmwrk.h"
00031 #include "lpc17xx_pinsel.h"
00032 #include "lpc17xx_gpio.h"
00033
00034
00035 /* Example group ----------------------------------------------------------- */
00041 /************************** PRIVATE DEFINITIONS *************************/
00043 #define VIRTUAL_QEI_SIGNAL      1
00044
00050 #define SIGNAL_MODE             0
00051
00057 #define CAP_MODE                        1
00058
00060 #define CAP_PERIOD                      250000UL
00061
00063 #define DISP_TIME                       3000000UL
00064
00065 #define MAX_CAP_TIMES           (DISP_TIME/CAP_PERIOD)
00066
00067 #define ENC_RES                         2048UL
00070 /* In case of using Virtual QEI signal, these following macros must be defined */
00071 #ifdef VIRTUAL_QEI_SIGNAL
00072 /* Max velocity */
00073 #define MAX_VEL                         600UL
00074 #if CAP_MODE
00075 #define COUNT_MODE                      4
00076 #else
00077 #define COUNT_MODE                      2
00078 #endif
00079 #endif
00080
00081 /* Pin on Port 0 assigned to Phase A */
00082 #define PHASE_A_PIN                     (1<<19)
00083 /* Pin on Port 0 assigned to Phase B */
00084 #define PHASE_B_PIN                     (1<<21)
00085
00086 /************************** PRIVATE VARIABLES *************************/
00087 #ifdef VIRTUAL_QEI_SIGNAL
00088
00094 __IO uint8_t PhaseCnt;
00095 #endif /* VIRTUAL_QEI_SIGNAL */
00096
00098 __IO uint64_t VeloAcc;
00100 __IO uint32_t VeloCapCnt;
00102 __IO FlagStatus VeloAccFlag;
00103
00104
00105 /* Pin Configuration selection must be defined in structure following:
00106  * - Port Number,
00107  * - Pin Number,
00108  * - Function Number,
00109  * - Pin Mode,
00110  * - Open Drain
00111  */
00112
00114 const PINSEL_CFG_Type qei_phaA_pin[1] = {{1, 20, 1, 0, 0}};
00116 const PINSEL_CFG_Type qei_phaB_pin[1] = {{1, 23, 1, 0, 0}};
00118 const PINSEL_CFG_Type qei_idx_pin[1] = {{1, 24, 1, 0, 0}};
00119
00120
00121 /************************** PRIVATE FUNCTIONS *************************/
00122 #ifdef VIRTUAL_QEI_SIGNAL
00123 void VirtualQEISignal_Init(void);
00124 void TIMER0_IRQHandler(void);
00125 #endif
00126 void QEI_IRQHandler(void);
00127
00128
00129 /*----------------- INTERRUPT SERVICE ROUTINES --------------------------*/
00130 #ifdef VIRTUAL_QEI_SIGNAL
00131 /*********************************************************************/
00137 void TIMER0_IRQHandler(void)
00138 {
00139         if (TIM_GetIntStatus(LPC_TIM0,TIM_MR0_INT)) {
00140
00141                 // Set/Clear phase A/B pin corresponding to their state
00142                 switch (PhaseCnt) {
00143                 case 0:
00144                         GPIO_SetValue(0,PHASE_A_PIN);
00145                         GPIO_ClearValue(0,PHASE_B_PIN);
00146                         break;
00147                 case 1:
00148                         GPIO_SetValue(0, PHASE_A_PIN | PHASE_B_PIN);
00149                         break;
00150                 case 2:
00151                         GPIO_SetValue(0, PHASE_B_PIN);
00152                         GPIO_ClearValue(0, PHASE_A_PIN);
00153                         break;
00154                 case 3:
00155                         GPIO_ClearValue(0, PHASE_A_PIN | PHASE_B_PIN);
00156                         break;
00157
00158                 default:
00159                         break;
00160                 }
00161
00162                 // update PhaseCnt
00163                 PhaseCnt = (PhaseCnt + 1) & 0x03;
00164
00165                 // Clear Timer 0 match interrupt pending
00166                 TIM_ClearIntPending(LPC_TIM0,TIM_MR0_INT);
00167         }
00168 }
00169 #endif
00170 /*********************************************************************/
00176 void QEI_IRQHandler(void)
00177 {
00178         // Check whether if velocity timer overflow
00179         if (QEI_GetIntStatus(LPC_QEI, QEI_INTFLAG_TIM_Int) == SET) {
00180                 if (VeloAccFlag == RESET) {
00181
00182                         // Get current velocity captured and update to accumulate
00183                         VeloAcc += QEI_GetVelocityCap(LPC_QEI);
00184
00185                         // Update Velocity capture times
00186                         VeloAccFlag = ((VeloCapCnt++) >= MAX_CAP_TIMES) ? SET : RESET;
00187                 }
00188                 // Reset Interrupt flag pending
00189                 QEI_IntClear(LPC_QEI, QEI_INTFLAG_TIM_Int);
00190         }
00191
00192         // Check whether if direction change occurred
00193         if (QEI_GetIntStatus(LPC_QEI, QEI_INTFLAG_DIR_Int) == SET) {
00194                 // Print direction status
00195                 _DBG("Direction has changed: ");
00196                 _DBG_((QEI_GetStatus(LPC_QEI, QEI_STATUS_DIR) == SET) ? "1" : "0");
00197                 // Reset Interrupt flag pending
00198                 QEI_IntClear(LPC_QEI, QEI_INTFLAG_DIR_Int);
00199         }
00200 }
00201
00202 /*-------------------------PRIVATE FUNCTIONS------------------------------*/
00203 #ifdef VIRTUAL_QEI_SIGNAL
00204 /*********************************************************************/
00226 void VirtualQEISignal_Init(void)
00227 {
00228         uint32_t pclk;
00229         TIM_TIMERCFG_Type TimerConfig;
00230         TIM_MATCHCFG_Type TimerMatchConfig;
00231
00232         _DBG_("Initializing Virtual QEI signal...");
00233
00234         // Initialize timer 0, Prescale value in tick value option with tick value = 1
00235         TimerConfig.PrescaleOption = TIM_PRESCALE_TICKVAL;
00236         TimerConfig.PrescaleValue       = 1;
00237         TIM_Init(LPC_TIM0, TIM_TIMER_MODE,&TimerConfig);
00238
00239         // Get actual peripheral clock of timer 0
00240         pclk = CLKPWR_GetPCLK(CLKPWR_PCLKSEL_TIMER0);
00241         pclk = pclk / ((MAX_VEL * ENC_RES * COUNT_MODE) / 60 );
00242         // Set match for match channel 0
00243         TimerMatchConfig.MatchChannel = 0;
00244         TimerMatchConfig.MatchValue = pclk;
00245         TimerMatchConfig.IntOnMatch = ENABLE;
00246         TimerMatchConfig.ExtMatchOutputType = 3;
00247         TimerMatchConfig.ResetOnMatch = ENABLE;
00248         TimerMatchConfig.StopOnMatch = DISABLE;
00249         TIM_ConfigMatch(LPC_TIM0, &TimerMatchConfig);
00250
00251         // Reconfigures GPIO for pin used as Phase A and Phase B output
00252         GPIO_SetDir(0, PHASE_A_PIN | PHASE_B_PIN, 1);
00253         // Set default State after initializing
00254         GPIO_ClearValue(0, PHASE_A_PIN | PHASE_B_PIN);
00255         // Reset Phase Counter
00256         PhaseCnt = 0;
00257
00258         /* preemption = 1, sub-priority = 2 */
00259         NVIC_SetPriority(TIMER0_IRQn, ((0x02<<3)|0x01));
00260         /* Enable interrupt for timer 0 */
00261         NVIC_EnableIRQ(TIMER0_IRQn);
00262         // To start timer 0
00263         TIM_Cmd(LPC_TIM0,ENABLE);
00264 }
00265 #endif /* VIRTUAL_QEI_SIGNAL */
00266
00267 /*-------------------------MAIN FUNCTION------------------------------*/
00268 /*********************************************************************/
00273 int c_entry(void)
00274 {
00275         PINSEL_CFG_Type PinCfg;
00276         QEI_CFG_Type QEIConfig;
00277         QEI_RELOADCFG_Type ReloadConfig;
00278         uint32_t rpm, averageVelo;
00279
00280         /* Initialize debug via UART0
00281          * – 115200bps
00282          * – 8 data bit
00283          * – No parity
00284          * – 1 stop bit
00285          * – No flow control
00286          */
00287         debug_frmwrk_init();
00288         _DBG_("Hello QEI ...");
00289         _DBG("Speed will be sampled every each ");
00290         _DBD32(CAP_PERIOD);
00291         _DBG_(" us");
00292         _DBG_("This value will be accumulated to display as RPM after every each");
00293         _DBD32(DISP_TIME);
00294         _DBG_(" us");
00295
00296         /* Initialize QEI configuration structure to default value */
00297 #if CAP_MODE
00298         QEIConfig.CaptureMode = QEI_CAPMODE_4X;
00299 #else
00300         QEIConfig.CaptureMode = QEI_CAPMODE_2X;
00301 #endif
00302         QEIConfig.DirectionInvert = QEI_DIRINV_NONE;
00303         QEIConfig.InvertIndex = QEI_INVINX_NONE;
00304 #if SIGNAL_MODE
00305         QEIConfig.SignalMode = QEI_SIGNALMODE_CLKDIR;
00306 #else
00307         QEIConfig.SignalMode = QEI_SIGNALMODE_QUAD;
00308 #endif
00309
00310         /* Set QEI function pin
00311          * P1.20: MCI0
00312          * P1.23: MCI1
00313          * P1.24: MCI2
00314          */
00315         PinCfg.Funcnum = 1;
00316         PinCfg.OpenDrain = 0;
00317         PinCfg.Pinmode = 0;
00318         PinCfg.Portnum = 1;
00319         PinCfg.Pinnum = 20;
00320         PINSEL_ConfigPin(&PinCfg);
00321         PinCfg.Pinnum = 23;
00322         PINSEL_ConfigPin(&PinCfg);
00323         PinCfg.Pinnum = 24;
00324         PINSEL_ConfigPin(&PinCfg);
00325
00326         /* Initialize QEI peripheral with given configuration structure */
00327         QEI_Init(LPC_QEI, &QEIConfig);
00328
00329         // Set timer reload value for  QEI that used to set velocity capture period
00330         ReloadConfig.ReloadOption = QEI_TIMERRELOAD_USVAL;
00331         ReloadConfig.ReloadValue = CAP_PERIOD;
00332         QEI_SetTimerReload(LPC_QEI, &ReloadConfig);
00333
00334         /* preemption = 1, sub-priority = 1 */
00335         NVIC_SetPriority(QEI_IRQn, ((0x01<<3)|0x01));
00336         /* Enable interrupt for QEI  */
00337         NVIC_EnableIRQ(QEI_IRQn);
00338
00339         // Reset VeloAccFlag
00340         VeloAccFlag = RESET;
00341         // Reset value of Acc and Acc count to default
00342         VeloAcc = 0;
00343         VeloCapCnt = 0;
00344
00345         // Enable interrupt for velocity Timer overflow for capture velocity into Acc */
00346         QEI_IntCmd(LPC_QEI, QEI_INTFLAG_TIM_Int, ENABLE);
00347         // Enable interrupt for direction change */
00348         QEI_IntCmd(LPC_QEI, QEI_INTFLAG_DIR_Int, ENABLE);
00349
00350 #ifdef VIRTUAL_QEI_SIGNAL
00351         // This used for generating virtual QEI signal
00352         VirtualQEISignal_Init();
00353 #endif
00354
00355         // Main loop
00356         while (1) {
00357
00358                 // Check VeloAccFlag continuously
00359                 if (VeloAccFlag == SET) {
00360                         // Get Acc
00361                         averageVelo = (uint32_t)(VeloAcc / VeloCapCnt);
00362                         rpm = QEI_CalculateRPM(LPC_QEI, averageVelo, ENC_RES);
00363                         // Disp the result
00364                         _DBG("Sampling Speed: ");
00365                         _DBD32(rpm);
00366                         _DBG_("RPM");
00367                         // Reset VeloAccFlag
00368                         VeloAccFlag = RESET;
00369                         // Reset value of Acc and Acc count to default
00370                         VeloAcc = 0;
00371                         VeloCapCnt = 0;
00372                 }
00373         }
00374     return 1;
00375 }
00376
00377 /* With ARM and GHS toolsets, the entry point is main() - this will
00378    allow the linker to generate wrapper code to setup stacks, allocate
00379    heap area, and initialize and copy code and data segments. For GNU
00380    toolsets, the entry point is through __start() in the crt0_gnu.asm
00381    file, and that startup code will setup stacks and data */
00382 int main(void)
00383 {
00384     return c_entry();
00385 }
00386
00387
00388 #ifdef  DEBUG
00389 /*******************************************************************************
00390 * @brief                Reports the name of the source file and the source line number
00391 *                               where the CHECK_PARAM error has occurred.
00392 * @param[in]    file Pointer to the source file name
00393 * @param[in]    line assert_param error line source number
00394 * @return               None
00395 *******************************************************************************/
00396 void check_failed(uint8_t *file, uint32_t line)
00397 {
00398         /* User can add his own implementation to report the file name and line number,
00399          ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
00400
00401         /* Infinite loop */
00402         while(1);
00403 }
00404 #endif
00405
00406 /*
00407  * @}
00408  */
Generated on Tue Jun 7 14:59:02 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/resolv/resolv.c Source File

C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/resolv/resolv.c

Go to the documentation of this file.
00001
00033 /*
00034  * Copyright (c) 2002-2003, Adam Dunkels.
00035  * All rights reserved.
00036  *
00037  * Redistribution and use in source and binary forms, with or without
00038  * modification, are permitted provided that the following conditions
00039  * are met:
00040  * 1. Redistributions of source code must retain the above copyright
00041  *    notice, this list of conditions and the following disclaimer.
00042  * 2. Redistributions in binary form must reproduce the above copyright
00043  *    notice, this list of conditions and the following disclaimer in the
00044  *    documentation and/or other materials provided with the distribution.
00045  * 3. The name of the author may not be used to endorse or promote
00046  *    products derived from this software without specific prior
00047  *    written permission.
00048  *
00049  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS
00050  * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
00051  * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
00052  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
00053  * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
00054  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
00055  * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
00056  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
00057  * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
00058  * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
00059  * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
00060  *
00061  * This file is part of the uIP TCP/IP stack.
00062  *
00063  * $Id: resolv.c,v 1.5 2006/06/11 21:46:37 adam Exp $
00064  *
00065  */
00066
00067 #include "resolv.h"
00068 #include "uip.h"
00069
00070 #include <string.h>
00071
00072 #ifndef NULL
00073 #define NULL (void *)0
00074 #endif /* NULL */
00075
00077 #define MAX_RETRIES 8
00078
00080 struct dns_hdr {
00081   u16_t id;
00082   u8_t flags1, flags2;
00083 #define DNS_FLAG1_RESPONSE        0x80
00084 #define DNS_FLAG1_OPCODE_STATUS   0x10
00085 #define DNS_FLAG1_OPCODE_INVERSE  0x08
00086 #define DNS_FLAG1_OPCODE_STANDARD 0x00
00087 #define DNS_FLAG1_AUTHORATIVE     0x04
00088 #define DNS_FLAG1_TRUNC           0x02
00089 #define DNS_FLAG1_RD              0x01
00090 #define DNS_FLAG2_RA              0x80
00091 #define DNS_FLAG2_ERR_MASK        0x0f
00092 #define DNS_FLAG2_ERR_NONE        0x00
00093 #define DNS_FLAG2_ERR_NAME        0x03
00094   u16_t numquestions;
00095   u16_t numanswers;
00096   u16_t numauthrr;
00097   u16_t numextrarr;
00098 };
00099
00101 struct dns_answer {
00102   /* DNS answer record starts with either a domain name or a pointer
00103      to a name already present somewhere in the packet. */
00104   u16_t type;
00105   u16_t class;
00106   u16_t ttl[2];
00107   u16_t len;
00108   uip_ipaddr_t ipaddr;
00109 };
00110
00111 struct namemap {
00112 #define STATE_UNUSED 0
00113 #define STATE_NEW    1
00114 #define STATE_ASKING 2
00115 #define STATE_DONE   3
00116 #define STATE_ERROR  4
00117   u8_t state;
00118   u8_t tmr;
00119   u8_t retries;
00120   u8_t seqno;
00121   u8_t err;
00122   char name[32];
00123   uip_ipaddr_t ipaddr;
00124 };
00125
00126 #ifndef UIP_CONF_RESOLV_ENTRIES
00127 #define RESOLV_ENTRIES 4
00128 #else /* UIP_CONF_RESOLV_ENTRIES */
00129 #define RESOLV_ENTRIES UIP_CONF_RESOLV_ENTRIES
00130 #endif /* UIP_CONF_RESOLV_ENTRIES */
00131
00132
00133 static struct namemap names[RESOLV_ENTRIES];
00134
00135 static u8_t seqno;
00136
00137 static struct uip_udp_conn *resolv_conn = NULL;
00138
00139
00140 /*---------------------------------------------------------------------------*/
00146 /*---------------------------------------------------------------------------*/
00147 static unsigned char *
00148 parse_name(unsigned char *query)
00149 {
00150   unsigned char n;
00151
00152   do {
00153     n = *query++;
00154
00155     while(n > 0) {
00156       /*      printf("%c", *query);*/
00157       ++query;
00158       --n;
00159     };
00160     /*    printf(".");*/
00161   } while(*query != 0);
00162   /*  printf("\n");*/
00163   return query + 1;
00164 }
00165 /*---------------------------------------------------------------------------*/
00170 /*---------------------------------------------------------------------------*/
00171 static void
00172 check_entries(void)
00173 {
00174   register struct dns_hdr *hdr;
00175   char *query, *nptr, *nameptr;
00176   static u8_t i;
00177   static u8_t n;
00178   register struct namemap *namemapptr;
00179
00180   for(i = 0; i < RESOLV_ENTRIES; ++i) {
00181     namemapptr = &names[i];
00182     if(namemapptr->state == STATE_NEW ||
00183        namemapptr->state == STATE_ASKING) {
00184       if(namemapptr->state == STATE_ASKING) {
00185         if(--namemapptr->tmr == 0) {
00186           if(++namemapptr->retries == MAX_RETRIES) {
00187             namemapptr->state = STATE_ERROR;
00188             resolv_found(namemapptr->name, NULL);
00189             continue;
00190           }
00191           namemapptr->tmr = namemapptr->retries;
00192         } else {
00193           /*      printf("Timer %d\n", namemapptr->tmr);*/
00194           /* Its timer has not run out, so we move on to next
00195              entry. */
00196           continue;
00197         }
00198       } else {
00199         namemapptr->state = STATE_ASKING;
00200         namemapptr->tmr = 1;
00201         namemapptr->retries = 0;
00202       }
00203       hdr = (struct dns_hdr *)uip_appdata;
00204       memset(hdr, 0, sizeof(struct dns_hdr));
00205       hdr->id = htons(i);
00206       hdr->flags1 = DNS_FLAG1_RD;
00207       hdr->numquestions = HTONS(1);
00208       query = (char *)uip_appdata + 12;
00209       nameptr = namemapptr->name;
00210       --nameptr;
00211       /* Convert hostname into suitable query format. */
00212       do {
00213         ++nameptr;
00214         nptr = query;
00215         ++query;
00216         for(n = 0; *nameptr != '.' && *nameptr != 0; ++nameptr) {
00217           *query = *nameptr;
00218           ++query;
00219           ++n;
00220         }
00221         *nptr = n;
00222       } while(*nameptr != 0);
00223       {
00224         static unsigned char endquery[] =
00225           {0,0,1,0,1};
00226         memcpy(query, endquery, 5);
00227       }
00228       uip_udp_send((unsigned char)(query + 5 - (char *)uip_appdata));
00229       break;
00230     }
00231   }
00232 }
00233 /*---------------------------------------------------------------------------*/
00237 /*---------------------------------------------------------------------------*/
00238 static void
00239 newdata(void)
00240 {
00241   char *nameptr;
00242   struct dns_answer *ans;
00243   struct dns_hdr *hdr;
00244   static u8_t nquestions, nanswers;
00245   static u8_t i;
00246   register struct namemap *namemapptr;
00247
00248   hdr = (struct dns_hdr *)uip_appdata;
00249   /*  printf("ID %d\n", htons(hdr->id));
00250       printf("Query %d\n", hdr->flags1 & DNS_FLAG1_RESPONSE);
00251       printf("Error %d\n", hdr->flags2 & DNS_FLAG2_ERR_MASK);
00252       printf("Num questions %d, answers %d, authrr %d, extrarr %d\n",
00253       htons(hdr->numquestions),
00254       htons(hdr->numanswers),
00255       htons(hdr->numauthrr),
00256       htons(hdr->numextrarr));
00257   */
00258
00259   /* The ID in the DNS header should be our entry into the name
00260      table. */
00261   i = htons(hdr->id);
00262   namemapptr = &names[i];
00263   if(i < RESOLV_ENTRIES &&
00264      namemapptr->state == STATE_ASKING) {
00265
00266     /* This entry is now finished. */
00267     namemapptr->state = STATE_DONE;
00268     namemapptr->err = hdr->flags2 & DNS_FLAG2_ERR_MASK;
00269
00270     /* Check for error. If so, call callback to inform. */
00271     if(namemapptr->err != 0) {
00272       namemapptr->state = STATE_ERROR;
00273       resolv_found(namemapptr->name, NULL);
00274       return;
00275     }
00276
00277     /* We only care about the question(s) and the answers. The authrr
00278        and the extrarr are simply discarded. */
00279     nquestions = htons(hdr->numquestions);
00280     nanswers = htons(hdr->numanswers);
00281
00282     /* Skip the name in the question. XXX: This should really be
00283        checked agains the name in the question, to be sure that they
00284        match. */
00285     nameptr = parse_name((char *)uip_appdata + 12) + 4;
00286
00287     while(nanswers > 0) {
00288       /* The first byte in the answer resource record determines if it
00289          is a compressed record or a normal one. */
00290       if(*nameptr & 0xc0) {
00291         /* Compressed name. */
00292         nameptr +=2;
00293         /*      printf("Compressed anwser\n");*/
00294       } else {
00295         /* Not compressed name. */
00296         nameptr = parse_name((char *)nameptr);
00297       }
00298
00299       ans = (struct dns_answer *)nameptr;
00300       /*      printf("Answer: type %x, class %x, ttl %x, length %x\n",
00301              htons(ans->type), htons(ans->class), (htons(ans->ttl[0])
00302              << 16) | htons(ans->ttl[1]), htons(ans->len));*/
00303
00304       /* Check for IP address type and Internet class. Others are
00305          discarded. */
00306       if(ans->type == HTONS(1) &&
00307          ans->class == HTONS(1) &&
00308          ans->len == HTONS(4)) {
00309         /*      printf("IP address %d.%d.%d.%d\n",
00310                htons(ans->ipaddr[0]) >> 8,
00311                htons(ans->ipaddr[0]) & 0xff,
00312                htons(ans->ipaddr[1]) >> 8,
00313                htons(ans->ipaddr[1]) & 0xff);*/
00314         /* XXX: we should really check that this IP address is the one
00315            we want. */
00316         namemapptr->ipaddr[0] = ans->ipaddr[0];
00317         namemapptr->ipaddr[1] = ans->ipaddr[1];
00318
00319         resolv_found(namemapptr->name, namemapptr->ipaddr);
00320         return;
00321       } else {
00322         nameptr = nameptr + 10 + htons(ans->len);
00323       }
00324       --nanswers;
00325     }
00326   }
00327
00328 }
00329 /*---------------------------------------------------------------------------*/
00333 /*---------------------------------------------------------------------------*/
00334 void
00335 resolv_appcall(void)
00336 {
00337   if(uip_udp_conn->rport == HTONS(53)) {
00338     if(uip_poll()) {
00339       check_entries();
00340     }
00341     if(uip_newdata()) {
00342       newdata();
00343     }
00344   }
00345 }
00346 /*---------------------------------------------------------------------------*/
00352 /*---------------------------------------------------------------------------*/
00353 void
00354 resolv_query(char *name)
00355 {
00356   static u8_t i;
00357   static u8_t lseq, lseqi;
00358   register struct namemap *nameptr;
00359
00360   lseq = lseqi = 0;
00361
00362   for(i = 0; i < RESOLV_ENTRIES; ++i) {
00363     nameptr = &names[i];
00364     if(nameptr->state == STATE_UNUSED) {
00365       break;
00366     }
00367     if(seqno - nameptr->seqno > lseq) {
00368       lseq = seqno - nameptr->seqno;
00369       lseqi = i;
00370     }
00371   }
00372
00373   if(i == RESOLV_ENTRIES) {
00374     i = lseqi;
00375     nameptr = &names[i];
00376   }
00377
00378   /*  printf("Using entry %d\n", i);*/
00379
00380   strcpy(nameptr->name, name);
00381   nameptr->state = STATE_NEW;
00382   nameptr->seqno = seqno;
00383   ++seqno;
00384 }
00385 /*---------------------------------------------------------------------------*/
00398 /*---------------------------------------------------------------------------*/
00399 u16_t *
00400 resolv_lookup(char *name)
00401 {
00402   static u8_t i;
00403   struct namemap *nameptr;
00404
00405   /* Walk through the list to see if the name is in there. If it is
00406      not, we return NULL. */
00407   for(i = 0; i < RESOLV_ENTRIES; ++i) {
00408     nameptr = &names[i];
00409     if(nameptr->state == STATE_DONE &&
00410        strcmp(name, nameptr->name) == 0) {
00411       return nameptr->ipaddr;
00412     }
00413   }
00414   return NULL;
00415 }
00416 /*---------------------------------------------------------------------------*/
00424 /*---------------------------------------------------------------------------*/
00425 u16_t *
00426 resolv_getserver(void)
00427 {
00428   if(resolv_conn == NULL) {
00429     return NULL;
00430   }
00431   return resolv_conn->ripaddr;
00432 }
00433 /*---------------------------------------------------------------------------*/
00440 /*---------------------------------------------------------------------------*/
00441 void
00442 resolv_conf(u16_t *dnsserver)
00443 {
00444   if(resolv_conn != NULL) {
00445     uip_udp_remove(resolv_conn);
00446   }
00447
00448   resolv_conn = uip_udp_new(dnsserver, HTONS(53));
00449 }
00450 /*---------------------------------------------------------------------------*/
00454 /*---------------------------------------------------------------------------*/
00455 void
00456 resolv_init(void)
00457 {
00458   static u8_t i;
00459
00460   for(i = 0; i < RESOLV_ENTRIES; ++i) {
00461     names[i].state = STATE_DONE;
00462   }
00463
00464 }
00465 /*---------------------------------------------------------------------------*/
00466
Generated on Tue Jun 7 14:58:59 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/resolv/resolv.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/resolv/resolv.h

Go to the documentation of this file.
00001
00011 /*
00012  * Copyright (c) 2002-2003, Adam Dunkels.
00013  * All rights reserved.
00014  *
00015  * Redistribution and use in source and binary forms, with or without
00016  * modification, are permitted provided that the following conditions
00017  * are met:
00018  * 1. Redistributions of source code must retain the above copyright
00019  *    notice, this list of conditions and the following disclaimer.
00020  * 2. Redistributions in binary form must reproduce the above copyright
00021  *    notice, this list of conditions and the following disclaimer in the
00022  *    documentation and/or other materials provided with the distribution.
00023  * 3. The name of the author may not be used to endorse or promote
00024  *    products derived from this software without specific prior
00025  *    written permission.
00026  *
00027  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS
00028  * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
00029  * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
00030  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
00031  * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
00032  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
00033  * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
00034  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
00035  * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
00036  * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
00037  * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
00038  *
00039  * This file is part of the uIP TCP/IP stack.
00040  *
00041  * $Id: resolv.h,v 1.4 2006/06/11 21:46:37 adam Exp $
00042  *
00043  */
00044 #ifndef __RESOLV_H__
00045 #define __RESOLV_H__
00046
00047 typedef int uip_udp_appstate_t;
00048 void resolv_appcall(void);
00049 #define UIP_UDP_APPCALL resolv_appcall
00050
00051 #include "uipopt.h"
00052
00064 void resolv_found(char *name, u16_t *ipaddr);
00065
00066 /* Functions. */
00067 void resolv_conf(u16_t *dnsserver);
00068 u16_t *resolv_getserver(void);
00069 void resolv_init(void);
00070 u16_t *resolv_lookup(char *name);
00071 void resolv_query(char *name);
00072
00073 #endif /* __RESOLV_H__ */
00074
Generated on Tue Jun 7 14:58:59 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/RIT/Interrupt/rit_interrupt.c Source File

C:/nxpdrv/LPC1700CMSIS/Examples/RIT/Interrupt/rit_interrupt.c

Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          rit_interrupt.c                                         2010-05-21
00003 */
00025 #include "lpc17xx_rit.h"
00026 #include "lpc17xx_libcfg.h"
00027 #include "debug_frmwrk.h"
00028 #include "lpc17xx_gpio.h"
00029
00030 /* Example group ----------------------------------------------------------- */
00036 /************************** PRIVATE DEFINITIONS ***********************/
00037 #define MCB_LPC_1768
00038 //#define IAR_LPC_1768
00039
00040 #define TIME_INTERVAL   1000
00041
00042 /************************** PRIVATE VARIABLE ***********************/
00043 uint8_t menu[]=
00044         "********************************************************************************\n\r"
00045         "Hello NXP Semiconductors \n\r"
00046         " RIT demo \n\r"
00047         "\t - MCU: LPC17xx \n\r"
00048         "\t - Core: ARM CORTEX-M3 \n\r"
00049         "\t - Communicate via: UART0 - 115200 bps \n\r"
00050         " Use RIT as a timer to generate interrupt to turn on/off LED each 1s \n\r"
00051         "********************************************************************************\n\r";
00052 FunctionalState LEDStatus = ENABLE;
00053
00054 /************************** PRIVATE FUNCTION *************************/
00055 void RIT_IRQHandler(void);
00056
00057 /*----------------- INTERRUPT SERVICE ROUTINES --------------------------*/
00058 /*********************************************************************/
00063 void RIT_IRQHandler(void)
00064 {
00065         RIT_GetIntStatus(LPC_RIT); //call this to clear interrupt flag
00066         if(LEDStatus == ENABLE)
00067         {
00068                 LEDStatus = DISABLE;
00069 #ifdef MCB_LPC_1768
00070                 //turn off LED
00071                 GPIO_ClearValue(2,(1<<2));
00072 #elif defined(IAR_LPC_1768)
00073                 GPIO_SetValue(1,(1<<25));
00074 #endif
00075         }
00076         else
00077         {
00078                 LEDStatus = ENABLE;
00079 #ifdef MCB_LPC_1768
00080                 //turn off LED
00081                 GPIO_SetValue(2,(1<<2));
00082 #elif defined(IAR_LPC_1768)
00083                 GPIO_ClearValue(1,(1<<25));
00084 #endif
00085         }
00086 }
00087
00088 /*-------------------------MAIN FUNCTION------------------------------*/
00089 /*********************************************************************/
00094 int c_entry (void) {
00095
00096         /* Initialize debug via UART0
00097          * – 115200bps
00098          * – 8 data bit
00099          * – No parity
00100          * – 1 stop bit
00101          * – No flow control
00102          */
00103         debug_frmwrk_init();
00104          _DBG(menu);
00105
00106         RIT_Init(LPC_RIT);
00107         /* Configure time_interval for RIT
00108          * In this case: time_interval = 1000 ms = 1s
00109          * So, RIT will generate interrupt each 1s
00110          */
00111         RIT_TimerConfig(LPC_RIT,TIME_INTERVAL);
00112
00113         _DBG("The time interval is: ");
00114         _DBD32(TIME_INTERVAL); _DBG_(" millisecond..");
00115
00116 #ifdef MCB_LPC_1768 /* Using LED2.2 for testing */
00117         //turn on LED2.2
00118         FIO_SetDir(2,(1<<2),1);
00119         FIO_SetValue(2,(1<<2));
00120 #elif defined(IAR_LPC_1768) /* Using LED1 (P1.25 for testing */
00121         FIO_SetDir(1,(1<<25),1);
00122         FIO_ClearValue(1,(1<<25));
00123 #endif
00124         NVIC_EnableIRQ(RIT_IRQn);
00125
00126         while(1);
00127         return 1;
00128 }
00129
00130 /* With ARM and GHS toolsets, the entry point is main() - this will
00131    allow the linker to generate wrapper code to setup stacks, allocate
00132    heap area, and initialize and copy code and data segments. For GNU
00133    toolsets, the entry point is through __start() in the crt0_gnu.asm
00134    file, and that startup code will setup stacks and data */
00135 int main(void)
00136 {
00137     return c_entry();
00138 }
00139
00140 #ifdef  DEBUG
00141 /*******************************************************************************
00142 * @brief                Reports the name of the source file and the source line number
00143 *                               where the CHECK_PARAM error has occurred.
00144 * @param[in]    file Pointer to the source file name
00145 * @param[in]    line assert_param error line source number
00146 * @return               None
00147 *******************************************************************************/
00148 void check_failed(uint8_t *file, uint32_t line)
00149 {
00150         /* User can add his own implementation to report the file name and line number,
00151          ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
00152
00153         /* Infinite loop */
00154         while(1);
00155 }
00156 #endif
00157
00158 /*
00159  * @}
00160  */
Generated on Tue Jun 7 14:59:02 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/UART/RS485_Master/rs485_master.c Source File

C:/nxpdrv/LPC1700CMSIS/Examples/UART/RS485_Master/rs485_master.c

Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          rs485_master.c                  2010-05-21
00003 */
00027 #include "lpc17xx_uart.h"
00028 #include "lpc17xx_libcfg.h"
00029 #include "lpc17xx_pinsel.h"
00030
00031 /* Example group ----------------------------------------------------------- */
00037 /************************** PRIVATE DEFINITIONS *************************/
00038 // Slave Address
00039 #define SLAVE_ADDR_A 'A'
00040 #define SLAVE_ADDR_B 'B'
00041
00042 /* buffer size definition */
00043 #define UART_RING_BUFSIZE 256
00044
00045 /* Buf mask */
00046 #define __BUF_MASK (UART_RING_BUFSIZE-1)
00047 /* Check buf is full or not */
00048 #define __BUF_IS_FULL(head, tail) ((tail&__BUF_MASK)==((head+1)&__BUF_MASK))
00049 /* Check buf will be full in next receiving or not */
00050 #define __BUF_WILL_FULL(head, tail) ((tail&__BUF_MASK)==((head+2)&__BUF_MASK))
00051 /* Check buf is empty */
00052 #define __BUF_IS_EMPTY(head, tail) ((head&__BUF_MASK)==(tail&__BUF_MASK))
00053 /* Reset buf */
00054 #define __BUF_RESET(bufidx)     (bufidx=0)
00055 #define __BUF_INCR(bufidx)      (bufidx=(bufidx+1)&__BUF_MASK)
00056
00057 /************************** PRIVATE VARIABLES *************************/
00058 uint8_t menu1[] = "Hello NXP Semiconductors \n\r";
00059 uint8_t menu2[] = "RS485 demo in Master mode \n\r";
00060 uint8_t send_menu[] = "Sending... \n\r";
00061 uint8_t recv_menu[] = "Receive: ";
00062 uint8_t p_err_menu[] = "Parity error \n\r";
00063 uint8_t f_err_menu[] = "Frame error \n\r";
00064 uint8_t nextline[] = "\n\r";
00065
00066 uint8_t slaveA_msg[] = "Msg A: Hello NXP";
00067 uint8_t slaveB_msg[] = "Msg B: Hello NXP";
00068 uint8_t terminator = 13;
00069
00070 /************************** PRIVATE TYPES *************************/
00072 typedef struct
00073 {
00074     __IO uint32_t tx_head;
00075     __IO uint32_t tx_tail;
00076     __IO uint32_t rx_head;
00077     __IO uint32_t rx_tail;
00078     __IO uint8_t  tx[UART_RING_BUFSIZE];
00079     __IO uint8_t  rx[UART_RING_BUFSIZE];
00080 } UART_RING_BUFFER_T;
00081
00082 /************************** PRIVATE VARIABLES *************************/
00083 // UART Ring buffer
00084 UART_RING_BUFFER_T rb;
00085
00086 /************************** PRIVATE FUNCTIONS *************************/
00087 void UART1_IRQHandler(void);
00088 void UART_IntReceive(void);
00089 void UART_IntErr(uint8_t bLSErrType);
00090
00091 uint32_t UARTReceive(LPC_UART_TypeDef *UARTPort, uint8_t *rxbuf, uint8_t buflen);
00092 void print_menu(void);
00093
00094
00095
00096 /*----------------- INTERRUPT SERVICE ROUTINES --------------------------*/
00097 /*********************************************************************/
00102 void UART1_IRQHandler(void)
00103 {
00104         uint32_t intsrc, tmp, tmp1;
00105
00106         /* Determine the interrupt source */
00107         intsrc = UART_GetIntId(LPC_UART0);
00108         tmp = intsrc & UART_IIR_INTID_MASK;
00109
00110         // Receive Line Status
00111         if (tmp == UART_IIR_INTID_RLS){
00112                 // Check line status
00113                 tmp1 = UART_GetLineStatus(LPC_UART0);
00114                 // Mask out the Receive Ready and Transmit Holding empty status
00115                 tmp1 &= (UART_LSR_OE | UART_LSR_PE | UART_LSR_FE \
00116                                 | UART_LSR_BI | UART_LSR_RXFE);
00117                 // If any error exist
00118                 if (tmp1) {
00119                         UART_IntErr(tmp1);
00120                 }
00121         }
00122
00123         // Receive Data Available or Character time-out
00124         if ((tmp == UART_IIR_INTID_RDA) || (tmp == UART_IIR_INTID_CTI)){
00125                 UART_IntReceive();
00126         }
00127
00128 }
00129
00130 /********************************************************************/
00135 void UART_IntReceive(void)
00136 {
00137         uint8_t tmpc;
00138         uint32_t rLen;
00139
00140         while(1){
00141                 // Call UART read function in UART driver
00142                 rLen = UART_Receive((LPC_UART_TypeDef *)LPC_UART1, &tmpc, 1, NONE_BLOCKING);
00143                 // If data received
00144                 if (rLen){
00145                         /* Check if buffer is more space
00146                          * If no more space, remaining character will be trimmed out
00147                          */
00148                         if (!__BUF_IS_FULL(rb.rx_head,rb.rx_tail)){
00149                                 rb.rx[rb.rx_head] = tmpc;
00150                                 __BUF_INCR(rb.rx_head);
00151                         }
00152                 }
00153                 // no more data
00154                 else {
00155                         break;
00156                 }
00157         }
00158 }
00159
00160
00161 /*********************************************************************/
00166 void UART_IntErr(uint8_t bLSErrType)
00167 {
00168         if (bLSErrType & UART_LSR_PE){
00169                 UART_Send(LPC_UART0, p_err_menu, sizeof(p_err_menu), BLOCKING);
00170         }
00171
00172         if (bLSErrType & UART_LSR_FE){
00173                 UART_Send(LPC_UART0, f_err_menu, sizeof(f_err_menu), BLOCKING);
00174         }
00175 }
00176
00177 /*-------------------------PRIVATE FUNCTIONS------------------------------*/
00178 /*********************************************************************/
00186 uint32_t UARTReceive(LPC_UART_TypeDef *UARTPort, uint8_t *rxbuf, uint8_t buflen)
00187 {
00188     uint8_t *data = (uint8_t *) rxbuf;
00189     uint32_t bytes = 0;
00190
00191         /* Temporarily lock out UART receive interrupts during this
00192            read so the UART receive interrupt won't cause problems
00193            with the index values */
00194         UART_IntConfig(UARTPort, UART_INTCFG_RBR, DISABLE);
00195
00196         /* Loop until receive buffer ring is empty or
00197                 until max_bytes expires */
00198         while ((buflen > 0) && (!(__BUF_IS_EMPTY(rb.rx_head, rb.rx_tail))))
00199         {
00200                 /* Read data from ring buffer into user buffer */
00201                 *data = rb.rx[rb.rx_tail];
00202                 data++;
00203
00204                 /* Update tail pointer */
00205                 __BUF_INCR(rb.rx_tail);
00206
00207                 /* Increment data count and decrement buffer size count */
00208                 bytes++;
00209                 buflen--;
00210         }
00211
00212         /* Re-enable UART interrupts */
00213         UART_IntConfig(UARTPort, UART_INTCFG_RBR, ENABLE);
00214
00215     return bytes;
00216 }
00217
00218 /*********************************************************************/
00223 void print_menu(void)
00224 {
00225         UART_Send(LPC_UART0, menu1, sizeof(menu1), BLOCKING);
00226         UART_Send(LPC_UART0, menu2, sizeof(menu2), BLOCKING);
00227 }
00228
00229
00230
00231 /*-------------------------MAIN FUNCTION------------------------------*/
00232 /*********************************************************************/
00237 int c_entry(void)
00238 {
00239         // UART Configuration structure variable
00240         UART_CFG_Type UARTConfigStruct;
00241         // UART FIFO configuration Struct variable
00242         UART_FIFO_CFG_Type UARTFIFOConfigStruct;
00243         // Pin configuration
00244         PINSEL_CFG_Type PinCfg;
00245         // RS485 configuration
00246         UART1_RS485_CTRLCFG_Type rs485cfg;
00247         // Temp. data
00248         uint32_t idx, len;
00249         uint8_t buffer[10];
00250         int32_t exit_flag, addr_toggle;
00251
00252         // UART0 section ----------------------------------------------------
00253         /*
00254          * Initialize UART0 pin connect
00255          */
00256         PinCfg.Funcnum = 1;
00257         PinCfg.OpenDrain = 0;
00258         PinCfg.Pinmode = 0;
00259         PinCfg.Pinnum = 2;
00260         PinCfg.Portnum = 0;
00261         PINSEL_ConfigPin(&PinCfg);
00262         PinCfg.Pinnum = 3;
00263         PINSEL_ConfigPin(&PinCfg);
00264
00265         /* Initialize UART Configuration parameter structure to default state:
00266          * Baudrate = 115200 bps
00267          * 8 data bit
00268          * 1 Stop bit
00269          * None parity
00270          */
00271         UART_ConfigStructInit(&UARTConfigStruct);
00272         UARTConfigStruct.Baud_rate = 115200;
00273
00274         // Initialize UART0 peripheral with given to corresponding parameter
00275         UART_Init(LPC_UART0, &UARTConfigStruct);
00276
00277         /* Initialize FIFOConfigStruct to default state:
00278          *                              - FIFO_DMAMode = DISABLE
00279          *                              - FIFO_Level = UART_FIFO_TRGLEV0
00280          *                              - FIFO_ResetRxBuf = ENABLE
00281          *                              - FIFO_ResetTxBuf = ENABLE
00282          *                              - FIFO_State = ENABLE
00283          */
00284         UART_FIFOConfigStructInit(&UARTFIFOConfigStruct);
00285
00286         // Initialize FIFO for UART0 peripheral
00287         UART_FIFOConfig(LPC_UART0, &UARTFIFOConfigStruct);
00288
00289         // Enable UART Transmit
00290         UART_TxCmd(LPC_UART0, ENABLE);
00291
00292         // print welcome screen
00293         print_menu();
00294
00295
00296         // UART1 - RS485 section -------------------------------------------------
00297         /*
00298          * Initialize UART1 pin connect
00299          */
00300         PinCfg.Funcnum = 2;
00301         PinCfg.OpenDrain = 0;
00302         PinCfg.Pinmode = 0;
00303         // TXD1 - P2.0
00304         PinCfg.Pinnum = 0;
00305         PinCfg.Portnum = 2;
00306         PINSEL_ConfigPin(&PinCfg);
00307         // RXD1 - P2.1
00308         PinCfg.Pinnum = 1;
00309         PINSEL_ConfigPin(&PinCfg);
00310         // DTR1 - P2.5
00311         PinCfg.Pinnum = 5;
00312         PINSEL_ConfigPin(&PinCfg);
00313
00314
00315
00316         /* Initialize UART Configuration parameter structure to default state:
00317          * Baudrate = 9600 bps
00318          * 8 data bit
00319          * 1 Stop bit
00320          * Parity: None
00321          * Note: Parity will be enabled later in UART_RS485Config() function.
00322          */
00323         UART_ConfigStructInit(&UARTConfigStruct);
00324
00325         // Initialize UART0 peripheral with given to corresponding parameter
00326         UART_Init((LPC_UART_TypeDef *)LPC_UART1, &UARTConfigStruct);
00327
00328         /* Initialize FIFOConfigStruct to default state:
00329          *                              - FIFO_DMAMode = DISABLE
00330          *                              - FIFO_Level = UART_FIFO_TRGLEV0
00331          *                              - FIFO_ResetRxBuf = ENABLE
00332          *                              - FIFO_ResetTxBuf = ENABLE
00333          *                              - FIFO_State = ENABLE
00334          */
00335         UART_FIFOConfigStructInit(&UARTFIFOConfigStruct);
00336
00337         // Initialize FIFO for UART0 peripheral
00338         UART_FIFOConfig((LPC_UART_TypeDef *)LPC_UART1, &UARTFIFOConfigStruct);
00339
00340         // Configure RS485
00341         /*
00342          * - Auto Direction in Tx/Rx driving is enabled
00343          * - Direction control pin is set to DTR1
00344          * - Direction control pole is set to "1" that means direction pin
00345          * will drive to high state before transmit data.
00346          * - Multidrop mode is disable
00347          * - Auto detect address is disabled
00348          * - Receive state is enable
00349          */
00350         rs485cfg.AutoDirCtrl_State = ENABLE;
00351         rs485cfg.DirCtrlPin = UART1_RS485_DIRCTRL_DTR;
00352         rs485cfg.DirCtrlPol_Level = SET;
00353         rs485cfg.DelayValue = 50;
00354         rs485cfg.NormalMultiDropMode_State = DISABLE;
00355         rs485cfg.AutoAddrDetect_State = DISABLE;
00356         rs485cfg.MatchAddrValue = 0;
00357         rs485cfg.Rx_State = ENABLE;
00358         UART_RS485Config(LPC_UART1, &rs485cfg);
00359
00360         /* Enable UART Rx interrupt */
00361         UART_IntConfig((LPC_UART_TypeDef *)LPC_UART1, UART_INTCFG_RBR, ENABLE);
00362         /* Enable UART line status interrupt */
00363         UART_IntConfig((LPC_UART_TypeDef *)LPC_UART1, UART_INTCFG_RLS, ENABLE);
00364
00365         /* preemption = 1, sub-priority = 1 */
00366         NVIC_SetPriority(UART1_IRQn, ((0x01<<3)|0x01));
00367         /* Enable Interrupt for UART0 channel */
00368         NVIC_EnableIRQ(UART1_IRQn);
00369
00370         // Enable UART Transmit
00371         UART_TxCmd((LPC_UART_TypeDef *)LPC_UART1, ENABLE);
00372
00373         addr_toggle = 1;
00374         // for testing...
00375         while (1){
00376
00377                 // Send slave addr -----------------------------------------
00378                 UART_Send(LPC_UART0, send_menu, sizeof(send_menu), BLOCKING);
00379                 // Send slave addr on RS485 bus
00380                 if (addr_toggle){
00381                         UART_RS485SendSlvAddr(LPC_UART1, SLAVE_ADDR_A);
00382                 } else {
00383                         UART_RS485SendSlvAddr(LPC_UART1, SLAVE_ADDR_B);
00384                 }
00385                 // delay for a while
00386                 for (len = 0; len < 1000; len++);
00387
00388                 // Send data -----------------------------------------------
00389                 if (addr_toggle){
00390                         UART_RS485SendData(LPC_UART1, slaveA_msg, sizeof(slaveA_msg));
00391                 } else {
00392                         UART_RS485SendData(LPC_UART1, slaveB_msg, sizeof(slaveB_msg));
00393                 }
00394                 // Send terminator
00395                 UART_RS485SendData(LPC_UART1, &terminator, 1);
00396                 // delay for a while
00397                  for (len = 0; len < 1000; len++);
00398
00399                  // Receive data from slave --------------------------------
00400                 UART_Send(LPC_UART0, recv_menu, sizeof(recv_menu), BLOCKING);
00401                 // If address 'A' required response...
00402                 if (addr_toggle){
00403                         exit_flag = 0;
00404                         while (!exit_flag){
00405                                 len = UARTReceive((LPC_UART_TypeDef *)LPC_UART1, buffer, sizeof(buffer));
00406                                 /* Got some data */
00407                                 idx = 0;
00408                                 while (idx < len)
00409                                 {
00410                                         if (buffer[idx] == 13){
00411                                                 exit_flag = 1;
00412                                         } else {
00413                                                 /* Echo it back */
00414                                                 UART_Send(LPC_UART0, &buffer[idx], 1, BLOCKING);
00415                                         }
00416                                         idx++;
00417                                 }
00418                         }
00419                 }
00420
00421                 UART_Send(LPC_UART0, nextline, sizeof(nextline), BLOCKING);
00422                 addr_toggle = (addr_toggle ? 0 : 1);
00423                 // long delay here
00424                 for (len = 0; len < 10000000; len++);
00425         }
00426
00427     return 1;
00428 }
00429
00430 /* With ARM and GHS toolsets, the entry point is main() - this will
00431    allow the linker to generate wrapper code to setup stacks, allocate
00432    heap area, and initialize and copy code and data segments. For GNU
00433    toolsets, the entry point is through __start() in the crt0_gnu.asm
00434    file, and that startup code will setup stacks and data */
00435 int main(void)
00436 {
00437     return c_entry();
00438 }
00439
00440
00441 #ifdef  DEBUG
00442 /*******************************************************************************
00443 * @brief                Reports the name of the source file and the source line number
00444 *                               where the CHECK_PARAM error has occurred.
00445 * @param[in]    file Pointer to the source file name
00446 * @param[in]    line assert_param error line source number
00447 * @return               None
00448 *******************************************************************************/
00449 void check_failed(uint8_t *file, uint32_t line)
00450 {
00451         /* User can add his own implementation to report the file name and line number,
00452          ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
00453
00454         /* Infinite loop */
00455         while(1);
00456 }
00457 #endif
00458
00459 /*
00460  * @}
00461  */
Generated on Tue Jun 7 14:59:03 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/UART/RS485_Slave/rs485_slave.c Source File

C:/nxpdrv/LPC1700CMSIS/Examples/UART/RS485_Slave/rs485_slave.c

Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          rs485_slave.c                   2010-05-21
00003 */
00027 #include "lpc17xx_uart.h"
00028 #include "lpc17xx_libcfg.h"
00029 #include "lpc17xx_pinsel.h"
00030
00031 /* Example group ----------------------------------------------------------- */
00037 /************************** PRIVATE DEFINITIONS *************************/
00038 /*
00039  * These following defines can be modified:
00040  * - RECEIVER_ALWAYS_EN (0/1)
00041  * - AUTO_SLVADDR_DETECT (0/1) in case RECEIVER_ALWAYS_EN is set to 0
00042  */
00043
00044 /* Receiver always be enabled to receive any data frame on RS485 bus,
00045  * regardless that frame is data frame or slave address frame (9-bit).
00046  * - When receiving a data frame, slave will display that data frame content
00047  * via UART0.
00048  * - When receiving a slave address frame (9bit mode), line error interrupt
00049  * - 0: Receiver is not always enabled, only slave address frame can trigger
00050  * an interrupt event to allow slave handle.
00051  * - 1: Receiver always be enabled */
00052 #define RECEIVER_ALWAYS_EN      0
00053
00054
00055 #if (RECEIVER_ALWAYS_EN == 0)
00056 /* Enable/Disable Auto Slave Address Detection
00057  * - In case of '0': any received data bytes will be ignored and will not
00058  * be stored in the RXFIFO. When an address byte is detected (parity bit
00059  * = '1') it will be placed into the RXFIFO and an Rx Data Ready Interrupt
00060  * will be generated. The interrupt handler can then read the address byte
00061  * and decide whether or not to enable the receiver to accept the following data.
00062  * - In case of '1': any received byte will be discarded if it is either a
00063  * data byte OR an address byte which fails to match the slave address configured
00064  * when initializing RS485. When a matching address character is detected it will
00065  * be pushed onto the RXFIFO along with the parity bit, and the receiver will
00066  * be automatically enabled (RS485CTRL bit 1 will be cleared by hardware).
00067  * The receiver will also generate an Rx Data Ready Interrupt */
00068 #define AUTO_SLVADDR_DETECT 1
00069 #define SLAVE_ADDR 'A'
00070 #endif
00071
00072 /* buffer size definition */
00073 #define UART_RING_BUFSIZE 256
00074
00075 /* Buf mask */
00076 #define __BUF_MASK (UART_RING_BUFSIZE-1)
00077 /* Check buf is full or not */
00078 #define __BUF_IS_FULL(head, tail) ((tail&__BUF_MASK)==((head+1)&__BUF_MASK))
00079 /* Check buf will be full in next receiving or not */
00080 #define __BUF_WILL_FULL(head, tail) ((tail&__BUF_MASK)==((head+2)&__BUF_MASK))
00081 /* Check buf is empty */
00082 #define __BUF_IS_EMPTY(head, tail) ((head&__BUF_MASK)==(tail&__BUF_MASK))
00083 /* Reset buf */
00084 #define __BUF_RESET(bufidx)     (bufidx=0)
00085 #define __BUF_INCR(bufidx)      (bufidx=(bufidx+1)&__BUF_MASK)
00086
00087 /************************** PRIVATE TYPES *************************/
00089 typedef struct
00090 {
00091     __IO uint32_t tx_head;
00092     __IO uint32_t tx_tail;
00093     __IO uint32_t rx_head;
00094     __IO uint32_t rx_tail;
00095     __IO uint8_t  tx[UART_RING_BUFSIZE];
00096     __IO uint8_t  rx[UART_RING_BUFSIZE];
00097 } UART_RING_BUFFER_T;
00098
00099 /************************** PRIVATE VARIABLES *************************/
00100 #if (RECEIVER_ALWAYS_EN)
00101 uint8_t menu1[] =
00102 "Hello NXP Semiconductors \n\r" \
00103 "RS485 demo in Slave mode \n\r" \
00104 "Slave's Receiver always enabled \n\r";
00105 #else
00106 #if (AUTO_SLVADDR_DETECT == 0)
00107 uint8_t menu1[] =
00108 "Hello NXP Semiconductors \n\r" \
00109 "RS485 demo in Slave mode \n\r" \
00110 "Slave's Receiver is not always enabled - Auto Address Detection is disabled\n\r";
00111 #else
00112 uint8_t menu1[] =
00113 "Hello NXP Semiconductors \n\r" \
00114 "RS485 demo in Slave mode \n\r" \
00115 "Slave's Receiver is not always enabled - Auto Address Detection is enabled\n\r";
00116 #endif
00117 #endif
00118
00119 uint8_t send_msg[] = "Sending... \n\r";
00120 uint8_t recv_msg[] = "Receive: ";
00121 uint8_t p_err_menu[] = "Parity error";
00122 uint8_t addr_menu[] = " - Slv Addr Frm received\n\r";
00123 uint8_t addr_acc[] = " - Slave Addr accepted\n\r";
00124 uint8_t addr_una[] = " - Slave Addr unaccepted\n\r";
00125 uint8_t addr_auto[] = "Slave Addr detected!\n\r";
00126 uint8_t f_err_menu[] = "Frame error \n\r";
00127 uint8_t nextline[] = "\n\r";
00128
00129 uint8_t ack_msg[] = "ACK";
00130 uint8_t terminator = 13;
00131
00132 // UART Ring buffer
00133 UART_RING_BUFFER_T rb;
00134
00135 /************************** PRIVATE FUNCTIONS *************************/
00136 void UART1_IRQHandler(void);
00137 void UART_IntReceive(void);
00138 void UART_IntErr(uint8_t bLSErrType);
00139
00140 uint32_t UARTReceive(LPC_UART_TypeDef *UARTPort, uint8_t *rxbuf, uint8_t buflen);
00141 void print_menu(void);
00142
00143 /*----------------- INTERRUPT SERVICE ROUTINES --------------------------*/
00144 /*********************************************************************/
00149 void UART1_IRQHandler(void)
00150 {
00151         // Call Standard UART 0 interrupt handler
00152         uint32_t intsrc, tmp, tmp1;
00153
00154         /* Determine the interrupt source */
00155         intsrc = UART_GetIntId(LPC_UART0);
00156         tmp = intsrc & UART_IIR_INTID_MASK;
00157
00158         // Receive Line Status
00159         if (tmp == UART_IIR_INTID_RLS){
00160                 // Check line status
00161                 tmp1 = UART_GetLineStatus(LPC_UART0);
00162                 // Mask out the Receive Ready and Transmit Holding empty status
00163                 tmp1 &= (UART_LSR_OE | UART_LSR_PE | UART_LSR_FE \
00164                                 | UART_LSR_BI | UART_LSR_RXFE);
00165                 // If any error exist
00166                 if (tmp1) {
00167                         UART_IntErr(tmp1);
00168                 }
00169         }
00170
00171         // Receive Data Available or Character time-out
00172         if ((tmp == UART_IIR_INTID_RDA) || (tmp == UART_IIR_INTID_CTI)){
00173                 UART_IntReceive();
00174         }
00175 }
00176
00177
00178 /********************************************************************/
00183 void UART_IntReceive(void)
00184 {
00185
00186 #if (RECEIVER_ALWAYS_EN)
00187         uint8_t tmpc;
00188         uint32_t rLen;
00189
00190         while(1){
00191                 // Call UART read function in UART driver
00192                 rLen = UART_Receive((LPC_UART_TypeDef *)LPC_UART1, &tmpc, 1, NONE_BLOCKING);
00193                 // If data received
00194                 if (rLen){
00195                         /* Check if buffer is more space
00196                          * If no more space, remaining character will be trimmed out
00197                          */
00198                         if (!__BUF_IS_FULL(rb.rx_head,rb.rx_tail)){
00199                                 rb.rx[rb.rx_head] = tmpc;
00200                                 __BUF_INCR(rb.rx_head);
00201                         }
00202                 }
00203                 // no more data
00204                 else {
00205                         break;
00206                 }
00207         }
00208 #else
00209 #if (AUTO_SLVADDR_DETECT == 0)
00210
00211         uint8_t tmpc;
00212         uint32_t rLen;
00213
00214         while(1){
00215                 // Call UART read function in UART driver
00216                 rLen = UART_Receive((UART_TypeDef *)UART1, &tmpc, 1, NONE_BLOCKING);
00217                 // If data received
00218                 if (rLen){
00219                         /* Check if buffer is more space
00220                          * If no more space, remaining character will be trimmed out
00221                          */
00222                         if (!__BUF_IS_FULL(rb.rx_head,rb.rx_tail)){
00223                                 rb.rx[rb.rx_head] = tmpc;
00224                                 __BUF_INCR(rb.rx_head);
00225                         }
00226                 }
00227                 // no more data
00228                 else {
00229                         break;
00230                 }
00231         }
00232 #else
00233
00234         uint8_t tmpc;
00235         uint32_t rLen;
00236
00237         while(1){
00238                 // Call UART read function in UART driver
00239                 rLen = UART_Receive((LPC_UART_TypeDef *)LPC_UART1, &tmpc, 1, NONE_BLOCKING);
00240                 // If data received
00241                 if (rLen){
00242                         /* Check if buffer is more space
00243                          * If no more space, remaining character will be trimmed out
00244                          */
00245                         if (!__BUF_IS_FULL(rb.rx_head,rb.rx_tail)){
00246                                 rb.rx[rb.rx_head] = tmpc;
00247                                 __BUF_INCR(rb.rx_head);
00248                         }
00249                 }
00250                 // no more data
00251                 else {
00252                         break;
00253                 }
00254         }
00255 #endif
00256 #endif
00257 }
00258
00259
00260 /*********************************************************************/
00265 void UART_IntErr(uint8_t bLSErrType)
00266 {
00267         uint8_t tmp;
00268 #if (RECEIVER_ALWAYS_EN)
00269         uint8_t tmpc;
00270
00271         if (bLSErrType & UART_LSR_PE){
00272                 // Parity error means the latest frame receive is slave address frame,
00273                 // Value of slave address is read and trimmed out.
00274                 UART_Send(LPC_UART0, p_err_menu, sizeof(p_err_menu), BLOCKING);
00275                 UART_Send(LPC_UART0, addr_menu, sizeof(addr_menu), BLOCKING);
00276                 UART_Receive((LPC_UART_TypeDef *)LPC_UART1, &tmpc, 1, NONE_BLOCKING);
00277         }
00278
00279         if (bLSErrType & UART_LSR_FE){
00280                 UART_Send(LPC_UART0, f_err_menu, sizeof(f_err_menu), BLOCKING);
00281         }
00282 #else
00283 #if (AUTO_SLVADDR_DETECT == 0)
00284         uint8_t tmp;
00285         // Check if this interrupt caused by parity error,
00286         // that means the last received frame is address frame,
00287         // if this address is matched with its own address,
00288         // continue to receive following data frame.
00289         if (bLSErrType & UART_LSR_PE){
00290                 UART_Receive((UART_TypeDef *)UART1, &tmp, 1, NONE_BLOCKING);
00291                 UART_Send(UART0, p_err_menu, sizeof(p_err_menu), BLOCKING);
00292                 if (tmp == SLAVE_ADDR){
00293                         UART_RS485ReceiverCmd(UART1, ENABLE);
00294                         UART_Send(UART0, addr_acc, sizeof(addr_acc), BLOCKING);
00295                 } else {
00296                         // Disable receiver
00297                         UART_RS485ReceiverCmd(UART1, DISABLE);
00298                         UART_Send(UART0, addr_una, sizeof(addr_una), BLOCKING);
00299                 }
00300         }
00301 #else
00302
00303         // Check if this interrupt caused by parity error,
00304         // that means the last received frame is address frame,
00305         // if this address is matched with its own address,
00306         // continue to receive following data frame.
00307         if (bLSErrType & UART_LSR_PE){
00308                 UART_Receive((LPC_UART_TypeDef *)LPC_UART1, &tmp, 1, NONE_BLOCKING);
00309                 UART_Send(LPC_UART0, addr_auto, sizeof(addr_auto), BLOCKING);
00310         }
00311 #endif
00312 #endif
00313 }
00314
00315 /*-------------------------PRIVATE FUNCTIONS------------------------------*/
00316 /*********************************************************************/
00324 uint32_t UARTReceive(LPC_UART_TypeDef *UARTPort, uint8_t *rxbuf, uint8_t buflen)
00325 {
00326     uint8_t *data = (uint8_t *) rxbuf;
00327     uint32_t bytes = 0;
00328
00329         /* Temporarily lock out UART receive interrupts during this
00330            read so the UART receive interrupt won't cause problems
00331            with the index values */
00332         UART_IntConfig(UARTPort, UART_INTCFG_RBR, DISABLE);
00333
00334         /* Loop until receive buffer ring is empty or
00335                 until max_bytes expires */
00336         while ((buflen > 0) && (!(__BUF_IS_EMPTY(rb.rx_head, rb.rx_tail))))
00337         {
00338                 /* Read data from ring buffer into user buffer */
00339                 *data = rb.rx[rb.rx_tail];
00340                 data++;
00341
00342                 /* Update tail pointer */
00343                 __BUF_INCR(rb.rx_tail);
00344
00345                 /* Increment data count and decrement buffer size count */
00346                 bytes++;
00347                 buflen--;
00348         }
00349
00350         /* Re-enable UART interrupts */
00351         UART_IntConfig(UARTPort, UART_INTCFG_RBR, ENABLE);
00352
00353     return bytes;
00354 }
00355
00356 /*********************************************************************/
00361 void print_menu(void)
00362 {
00363         UART_Send(LPC_UART0, menu1, sizeof(menu1), BLOCKING);
00364 }
00365
00366
00367 /*-------------------------MAIN FUNCTION------------------------------*/
00368 /*********************************************************************/
00373 int c_entry(void)
00374 {
00375         // UART Configuration structure variable
00376         UART_CFG_Type UARTConfigStruct;
00377         // UART FIFO configuration Struct variable
00378         UART_FIFO_CFG_Type UARTFIFOConfigStruct;
00379         // Pin configuration
00380         PINSEL_CFG_Type PinCfg;
00381         // RS485 configuration
00382         UART1_RS485_CTRLCFG_Type rs485cfg;
00383         uint32_t idx, len;
00384         uint8_t buffer[10];
00385         uint32_t tmp;
00386
00387         // UART0 section ----------------------------------------------------
00388         /*
00389          * Initialize UART0 pin connect
00390          */
00391         PinCfg.Funcnum = 1;
00392         PinCfg.OpenDrain = 0;
00393         PinCfg.Pinmode = 0;
00394         PinCfg.Pinnum = 2;
00395         PinCfg.Portnum = 0;
00396         PINSEL_ConfigPin(&PinCfg);
00397         PinCfg.Pinnum = 3;
00398         PINSEL_ConfigPin(&PinCfg);
00399
00400         /* Initialize UART Configuration parameter structure to default state:
00401          * Baudrate = 115200 bps
00402          * 8 data bit
00403          * 1 Stop bit
00404          * None parity
00405          */
00406         UART_ConfigStructInit(&UARTConfigStruct);
00407         UARTConfigStruct.Baud_rate = 115200;
00408
00409         // Initialize UART0 peripheral with given to corresponding parameter
00410         UART_Init(LPC_UART0, &UARTConfigStruct);
00411
00412         /* Initialize FIFOConfigStruct to default state:
00413          *                              - FIFO_DMAMode = DISABLE
00414          *                              - FIFO_Level = UART_FIFO_TRGLEV0
00415          *                              - FIFO_ResetRxBuf = ENABLE
00416          *                              - FIFO_ResetTxBuf = ENABLE
00417          *                              - FIFO_State = ENABLE
00418          */
00419         UART_FIFOConfigStructInit(&UARTFIFOConfigStruct);
00420
00421         // Initialize FIFO for UART0 peripheral
00422         UART_FIFOConfig(LPC_UART0, &UARTFIFOConfigStruct);
00423
00424         // Enable UART Transmit
00425         UART_TxCmd(LPC_UART0, ENABLE);
00426
00427         // print welcome screen
00428         print_menu();
00429
00430
00431         // UART1 - RS485 section -------------------------------------------------
00432         /*
00433          * Initialize UART1 pin connect
00434          */
00435         PinCfg.Funcnum = 2;
00436         PinCfg.OpenDrain = 0;
00437         PinCfg.Pinmode = 0;
00438         // TXD1 - P2.0
00439         PinCfg.Pinnum = 0;
00440         PinCfg.Portnum = 2;
00441         PINSEL_ConfigPin(&PinCfg);
00442         // RXD1 - P2.1
00443         PinCfg.Pinnum = 1;
00444         PINSEL_ConfigPin(&PinCfg);
00445         // DTR1 - P2.5
00446         PinCfg.Pinnum = 5;
00447         PINSEL_ConfigPin(&PinCfg);
00448
00449
00450         /* Initialize UART Configuration parameter structure to default state:
00451          * Baudrate = 9600 bps
00452          * 8 data bit
00453          * 1 Stop bit
00454          * Parity: None
00455          * Note: Parity will be enabled later in UART_RS485Config() function.
00456          */
00457         UART_ConfigStructInit(&UARTConfigStruct);
00458
00459         // Initialize UART0 peripheral with given to corresponding parameter
00460         UART_Init((LPC_UART_TypeDef *)LPC_UART1, &UARTConfigStruct);
00461
00462         /* Initialize FIFOConfigStruct to default state:
00463          *                              - FIFO_DMAMode = DISABLE
00464          *                              - FIFO_Level = UART_FIFO_TRGLEV0
00465          *                              - FIFO_ResetRxBuf = ENABLE
00466          *                              - FIFO_ResetTxBuf = ENABLE
00467          *                              - FIFO_State = ENABLE
00468          */
00469         UART_FIFOConfigStructInit(&UARTFIFOConfigStruct);
00470
00471         // Initialize FIFO for UART0 peripheral
00472         UART_FIFOConfig((LPC_UART_TypeDef *)LPC_UART1, &UARTFIFOConfigStruct);
00473
00474         // Configure RS485
00475         /*
00476          * - Auto Direction in Tx/Rx driving is enabled
00477          * - Direction control pin is set to DTR1
00478          * - Direction control pole is set to "1" that means direction pin
00479          * will drive to high state before transmit data.
00480          * - Multidrop mode is enable
00481          * - Auto detect address is disabled
00482          * - Receive state is enable
00483          */
00484         rs485cfg.AutoDirCtrl_State = ENABLE;
00485         rs485cfg.DirCtrlPin = UART1_RS485_DIRCTRL_DTR;
00486         rs485cfg.DirCtrlPol_Level = SET;
00487         rs485cfg.DelayValue = 50;
00488         rs485cfg.NormalMultiDropMode_State = ENABLE;
00489 #if AUTO_SLVADDR_DETECT
00490         rs485cfg.AutoAddrDetect_State = ENABLE;
00491         rs485cfg.MatchAddrValue = SLAVE_ADDR;
00492 #else
00493         rs485cfg.AutoAddrDetect_State = DISABLE;
00494 #endif
00495 #if RECEIVER_ALWAYS_EN
00496         rs485cfg.Rx_State = ENABLE;
00497 #else
00498         rs485cfg.Rx_State = DISABLE;
00499 #endif
00500         UART_RS485Config(LPC_UART1, &rs485cfg);
00501
00502     /* Enable UART Rx interrupt */
00503         UART_IntConfig((LPC_UART_TypeDef *)LPC_UART1, UART_INTCFG_RBR, ENABLE);
00504         /* Enable UART line status interrupt */
00505         UART_IntConfig((LPC_UART_TypeDef *)LPC_UART1, UART_INTCFG_RLS, ENABLE);
00506
00507     /* preemption = 1, sub-priority = 1 */
00508     NVIC_SetPriority(UART1_IRQn, ((0x01<<3)|0x01));
00509         /* Enable Interrupt for UART0 channel */
00510     NVIC_EnableIRQ(UART1_IRQn);
00511
00512         // Enable UART Transmit
00513         UART_TxCmd((LPC_UART_TypeDef *)LPC_UART1, ENABLE);
00514
00515         // for testing...
00516         while (1){
00517                 len = 0;
00518                 while (len == 0)
00519                 {
00520                         len = UARTReceive((LPC_UART_TypeDef *)LPC_UART1, buffer, sizeof(buffer));
00521                 }
00522
00523                 /* Got some data */
00524                 idx = 0;
00525                 while (idx < len)
00526                 {
00527                         if (buffer[idx] == 13){
00528                                 for (tmp = 0; tmp < 1000000; tmp++);
00529                                 UART_RS485SendData(LPC_UART1, ack_msg, sizeof(ack_msg));
00530                                 UART_Send(LPC_UART0, nextline, sizeof(nextline), BLOCKING);
00531                                 UART_RS485SendData(LPC_UART1, &terminator, 1);
00532                         } else {
00533                                 /* Echo it back */
00534                                 UART_Send(LPC_UART0, &buffer[idx], 1, BLOCKING);
00535                         }
00536                         idx++;
00537                 }
00538         }
00539
00540     return 1;
00541 }
00542
00543 /* With ARM and GHS toolsets, the entry point is main() - this will
00544    allow the linker to generate wrapper code to setup stacks, allocate
00545    heap area, and initialize and copy code and data segments. For GNU
00546    toolsets, the entry point is through __start() in the crt0_gnu.asm
00547    file, and that startup code will setup stacks and data */
00548 int main(void)
00549 {
00550     return c_entry();
00551 }
00552
00553
00554 #ifdef  DEBUG
00555 /*******************************************************************************
00556 * @brief                Reports the name of the source file and the source line number
00557 *                               where the CHECK_PARAM error has occurred.
00558 * @param[in]    file Pointer to the source file name
00559 * @param[in]    line assert_param error line source number
00560 * @return               None
00561 *******************************************************************************/
00562 void check_failed(uint8_t *file, uint32_t line)
00563 {
00564         /* User can add his own implementation to report the file name and line number,
00565          ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
00566
00567         /* Infinite loop */
00568         while(1);
00569 }
00570 #endif
00571
00572 /*
00573  * @}
00574  */
Generated on Tue Jun 7 14:59:04 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/RTC/AlarmCntIncrInterrupt/rtc_alarm_cntincr_int.c Source File

C:/nxpdrv/LPC1700CMSIS/Examples/RTC/AlarmCntIncrInterrupt/rtc_alarm_cntincr_int.c

Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          rtc_alarm_cntincr_int.c                                         2010-05-21
00003 */
00027 #include "lpc17xx_rtc.h"
00028 #include "lpc17xx_libcfg.h"
00029 #include "debug_frmwrk.h"
00030
00031 /* Example group ----------------------------------------------------------- */
00038 /************************** PRIVATE VARIABLES *************************/
00039 uint8_t menu1[] =
00040 "********************************************************************************\n\r"
00041 "Hello NXP Semiconductors \n\r"
00042 " RTC demo \n\r"
00043 "\t - MCU: LPC17xx \n\r"
00044 "\t - Core: ARM CORTEX-M3 \n\r"
00045 "\t - Communicate via: UART0 - 115200 bps \n\r"
00046 " A simple RTC example. \n\r"
00047 " To generate interrupt in Second Counter Increment Interrupt (1s) \n\r"
00048 " and generate Alarm interrupt at 10s \n\r"
00049 "********************************************************************************\n\r";
00050
00051 /************************** PRIVATE FUNCTION *************************/
00052 void RTC_IRQHandler(void);
00053
00054 void print_menu(void);
00055
00056 /*----------------- INTERRUPT SERVICE ROUTINES --------------------------*/
00057 /*********************************************************************/
00062 void RTC_IRQHandler(void)
00063 {
00064         uint32_t secval;
00065
00066         /* This is increment counter interrupt*/
00067         if (RTC_GetIntPending(LPC_RTC, RTC_INT_COUNTER_INCREASE))
00068         {
00069                 secval = RTC_GetTime (LPC_RTC, RTC_TIMETYPE_SECOND);
00070
00071                 /* Send debug information */
00072                 _DBG ("Second: "); _DBD(secval);
00073                 _DBG_("");
00074
00075                 // Clear pending interrupt
00076                 RTC_ClearIntPending(LPC_RTC, RTC_INT_COUNTER_INCREASE);
00077         }
00078
00079         /* Continue to check the Alarm match*/
00080         if (RTC_GetIntPending(LPC_RTC, RTC_INT_ALARM))
00081         {
00082                 /* Send debug information */
00083                 _DBG_ ("ALARM 10s matched!");
00084
00085                 // Clear pending interrupt
00086                 RTC_ClearIntPending(LPC_RTC, RTC_INT_ALARM);
00087         }
00088 }
00089
00090 /*-------------------------PRIVATE FUNCTIONS------------------------------*/
00091 /*********************************************************************/
00096 void print_menu(void)
00097 {
00098         _DBG(menu1);
00099 }
00100
00101
00102 /*-------------------------MAIN FUNCTION------------------------------*/
00103 /*********************************************************************/
00108 int c_entry(void)
00109 {
00110         RTC_TIME_Type RTCFullTime;
00111
00112         /* Initialize debug via UART0
00113          * – 115200bps
00114          * – 8 data bit
00115          * – No parity
00116          * – 1 stop bit
00117          * – No flow control
00118          */
00119         debug_frmwrk_init();
00120
00121         // print welcome screen
00122         print_menu();
00123
00124         /* RTC Block section ------------------------------------------------------ */
00125         // Init RTC module
00126         RTC_Init(LPC_RTC);
00127
00128     /* Disable RTC interrupt */
00129     NVIC_DisableIRQ(RTC_IRQn);
00130     /* preemption = 1, sub-priority = 1 */
00131     NVIC_SetPriority(RTC_IRQn, ((0x01<<3)|0x01));
00132
00133         /* Enable rtc (starts increase the tick counter and second counter register) */
00134         RTC_ResetClockTickCounter(LPC_RTC);
00135         RTC_Cmd(LPC_RTC, ENABLE);
00136         RTC_CalibCounterCmd(LPC_RTC, DISABLE);
00137
00138         /* Set current time for RTC */
00139         // Current time is 8:00:00PM, 2009-04-24
00140         RTC_SetTime (LPC_RTC, RTC_TIMETYPE_SECOND, 0);
00141         RTC_SetTime (LPC_RTC, RTC_TIMETYPE_MINUTE, 0);
00142         RTC_SetTime (LPC_RTC, RTC_TIMETYPE_HOUR, 20);
00143         RTC_SetTime (LPC_RTC, RTC_TIMETYPE_MONTH, 4);
00144         RTC_SetTime (LPC_RTC, RTC_TIMETYPE_YEAR, 2009);
00145         RTC_SetTime (LPC_RTC, RTC_TIMETYPE_DAYOFMONTH, 24);
00146
00147         /* Set ALARM time for second */
00148         RTC_SetAlarmTime (LPC_RTC, RTC_TIMETYPE_SECOND, 10);
00149
00150         // Get and print current time
00151         RTC_GetFullTime (LPC_RTC, &RTCFullTime);
00152         _DBG( "Current time set to: ");
00153         _DBD((RTCFullTime.HOUR)); _DBG (":");
00154         _DBD ((RTCFullTime.MIN)); _DBG (":");
00155         _DBD ((RTCFullTime.SEC)); _DBG("  ");
00156         _DBD ((RTCFullTime.DOM)); _DBG("/");
00157         _DBD ((RTCFullTime.MONTH)); _DBG("/");
00158         _DBD16 ((RTCFullTime.YEAR)); _DBG_("");
00159
00160         _DBG("Second ALARM set to ");
00161         _DBD (RTC_GetAlarmTime (LPC_RTC, RTC_TIMETYPE_SECOND));
00162         _DBG_("s");
00163
00164         /* Set the CIIR for second counter interrupt*/
00165         RTC_CntIncrIntConfig (LPC_RTC, RTC_TIMETYPE_SECOND, ENABLE);
00166         /* Set the AMR for 10s match alarm interrupt */
00167         RTC_AlarmIntConfig (LPC_RTC, RTC_TIMETYPE_SECOND, ENABLE);
00168
00169     /* Enable RTC interrupt */
00170     NVIC_EnableIRQ(RTC_IRQn);
00171
00172     /* Loop forever */
00173     while(1);
00174     return 1;
00175 }
00176
00177
00178
00179 /* With ARM and GHS toolsets, the entry point is main() - this will
00180    allow the linker to generate wrapper code to setup stacks, allocate
00181    heap area, and initialize and copy code and data segments. For GNU
00182    toolsets, the entry point is through __start() in the crt0_gnu.asm
00183    file, and that startup code will setup stacks and data */
00184 int main(void)
00185 {
00186     return c_entry();
00187 }
00188
00189
00190 #ifdef  DEBUG
00191 /*******************************************************************************
00192 * @brief                Reports the name of the source file and the source line number
00193 *                               where the CHECK_PARAM error has occurred.
00194 * @param[in]    file Pointer to the source file name
00195 * @param[in]    line assert_param error line source number
00196 * @return               None
00197 *******************************************************************************/
00198 void check_failed(uint8_t *file, uint32_t line)
00199 {
00200         /* User can add his own implementation to report the file name and line number,
00201          ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
00202
00203         /* Infinite loop */
00204         while(1);
00205 }
00206 #endif
00207
00208 /*
00209  * @}
00210  */
Generated on Tue Jun 7 14:59:02 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/RTC/Calibration/rtc_calib.c Source File

C:/nxpdrv/LPC1700CMSIS/Examples/RTC/Calibration/rtc_calib.c

Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          rtc_calib.c                                             2010-06-18
00003 */
00025 #include "LPC17xx.h"
00026 #include "lpc17xx_clkpwr.h"
00027 #include "lpc17xx_libcfg.h"
00028 #include "debug_frmwrk.h"
00029 #include "lpc17xx_rtc.h"
00030
00031 /* Example group ----------------------------------------------------------- */
00038 /************************** PRIVATE VARIABLES *************************/
00039 uint8_t menu[]=
00040         "********************************************************************************\n\r"
00041         "Hello NXP Semiconductors \n\r"
00042         "RTC Calibration demo \n\r"
00043         "\t - MCU: LPC17xx \n\r"
00044         "\t - Core: ARM CORTEX-M3 \n\r"
00045         "\t - Communicate via: UART0 - 115200 bps \n\r"
00046         "This example describes how to calibrate RTC \n\r"
00047         "********************************************************************************\n\r";
00048
00049 /************************** PRIVATE FUNCTIONS *************************/
00050 void print_menu(void);
00051 void RTC_IRQHandle(void);
00052
00053 /*----------------- INTERRUPT SERVICE ROUTINES --------------------------*/
00054 /*********************************************************************/
00059 void RTC_IRQHandler(void)
00060 {
00061         uint32_t secval;
00062
00063         /* This is increment counter interrupt*/
00064         if (RTC_GetIntPending(LPC_RTC, RTC_INT_COUNTER_INCREASE))
00065         {
00066                 secval = RTC_GetTime (LPC_RTC, RTC_TIMETYPE_SECOND);
00067
00068                 /* Send debug information */
00069                 _DBG ("Second: "); _DBD(secval);
00070                 _DBG_("");
00071
00072                 // Clear pending interrupt
00073                 RTC_ClearIntPending(LPC_RTC, RTC_INT_COUNTER_INCREASE);
00074         }
00075 }
00076
00077 /*-------------------------PRIVATE FUNCTIONS------------------------------*/
00078 /*********************************************************************/
00083 void print_menu(void)
00084 {
00085         _DBG(menu);
00086 }
00087
00088 /*-------------------------MAIN FUNCTION------------------------------*/
00089 /*********************************************************************/
00094 int c_entry (void)
00095 {
00096         /* Initialize debug via UART0
00097          * – 115200bps
00098          * – 8 data bit
00099          * – No parity
00100          * – 1 stop bit
00101          * – No flow control
00102          */
00103         debug_frmwrk_init();
00104
00105         // print welcome screen
00106         print_menu();
00107
00108         /* In this example:
00109          * Suppose that the RTC need periodically adjust after each 5 second.
00110          * And the time counter need by incrementing the counter by 2 instead of 1
00111          * We will observe timer counter after calibration via serial display
00112          */
00113         // Init RTC module
00114         RTC_Init(LPC_RTC);
00115
00116         /* Enable rtc (starts increase the tick counter and second counter register) */
00117         RTC_ResetClockTickCounter(LPC_RTC);
00118         RTC_Cmd(LPC_RTC, ENABLE);
00119
00120         //Set current time = 0
00121         RTC_SetTime (LPC_RTC, RTC_TIMETYPE_SECOND, 0);
00122
00123         /* Setting Timer calibration
00124          * Calibration value =  5s;
00125          * Direction = Forward calibration
00126          * So after each 5s, calibration logic can periodically adjust the time counter by
00127          * incrementing the counter by 2 instead of 1
00128          */
00129         RTC_CalibConfig(LPC_RTC, 5, RTC_CALIB_DIR_FORWARD);
00130         RTC_CalibCounterCmd(LPC_RTC, ENABLE);
00131
00132         /* Set the CIIR for second counter interrupt*/
00133         RTC_CntIncrIntConfig (LPC_RTC, RTC_TIMETYPE_SECOND, ENABLE);
00134
00135     /* Enable RTC interrupt */
00136     NVIC_EnableIRQ(RTC_IRQn);
00137
00138     /* Loop forever */
00139     while(1);
00140     return 1;
00141 }
00142
00143
00144 /* With ARM and GHS toolsets, the entry point is main() - this will
00145    allow the linker to generate wrapper code to setup stacks, allocate
00146    heap area, and initialize and copy code and data segments. For GNU
00147    toolsets, the entry point is through __start() in the crt0_gnu.asm
00148    file, and that startup code will setup stacks and data */
00149 int main(void)
00150 {
00151     return c_entry();
00152 }
00153
00154 #ifdef  DEBUG
00155 /*******************************************************************************
00156 * @brief                Reports the name of the source file and the source line number
00157 *                               where the CHECK_PARAM error has occurred.
00158 * @param[in]    file Pointer to the source file name
00159 * @param[in]    line assert_param error line source number
00160 * @return               None
00161 *******************************************************************************/
00162 void check_failed(uint8_t *file, uint32_t line)
00163 {
00164         /* User can add his own implementation to report the file name and line number,
00165          ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
00166
00167         /* Infinite loop */
00168         while(1);
00169 }
00170 #endif
00171
00172 /*
00173  * @}
00174  */
Generated on Tue Jun 7 14:59:02 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/PWR/RTC_DeepPWD/rtc_deeppwd.c Source File

C:/nxpdrv/LPC1700CMSIS/Examples/PWR/RTC_DeepPWD/rtc_deeppwd.c

Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          rtc_deeppwd.c                           2010-06-18
00003 */
00026 #include "LPC17xx.h"
00027 #include "lpc17xx_clkpwr.h"
00028 #include "lpc17xx_libcfg.h"
00029 #include "debug_frmwrk.h"
00030 #include "lpc17xx_gpio.h"
00031 #include "lpc17xx_rtc.h"
00032
00033 /* Example group ----------------------------------------------------------- */
00039 /************************** PRIVATE VARIABLES *************************/
00040 uint8_t menu[]=
00041         "********************************************************************************\n\r"
00042         "Hello NXP Semiconductors \n\r"
00043         "Power control demo \n\r"
00044         "\t - MCU: LPC17xx \n\r"
00045         "\t - Core: ARM CORTEX-M3 \n\r"
00046         "\t - Communicate via: UART0 - 115200 bps \n\r"
00047         "This example used to enter system in Deep PowerDown mode and wake up it by\n\r "
00048         "using RTC Interrupt \n\r"
00049         "********************************************************************************\n\r";
00050
00051 /************************** PRIVATE FUNCTIONS *************************/
00052 void print_menu(void);
00053 void RTC_IRQHandler(void);
00054
00055 /*----------------- INTERRUPT SERVICE ROUTINES --------------------------*/
00056 /*********************************************************************/
00061 void RTC_IRQHandler(void)
00062 {
00063         if(RTC_GetIntPending(LPC_RTC, RTC_INT_ALARM))
00064         {
00065                 RTC_ClearIntPending(LPC_RTC, RTC_INT_ALARM);
00066                 RTC_Cmd(LPC_RTC, DISABLE);
00067                 NVIC_DisableIRQ(RTC_IRQn);
00068         }
00069 }
00070
00071 /*-------------------------PRIVATE FUNCTIONS------------------------------*/
00072 /*********************************************************************/
00077 void print_menu(void)
00078 {
00079         _DBG(menu);
00080 }
00081
00082 /*-------------------------MAIN FUNCTION------------------------------*/
00083 /*********************************************************************/
00088 int c_entry (void)
00089 {
00090
00091         /* Initialize debug via UART0
00092          * – 115200bps
00093          * – 8 data bit
00094          * – No parity
00095          * – 1 stop bit
00096          * – No flow control
00097          */
00098         debug_frmwrk_init();
00099
00100         // print welcome screen
00101         print_menu();
00102
00103         /* Initialize and configure RTC */
00104         RTC_Init(LPC_RTC);
00105
00106         RTC_ResetClockTickCounter(LPC_RTC);
00107         RTC_SetTime (LPC_RTC, RTC_TIMETYPE_SECOND, 0);
00108
00109         /* Set alarm time = 5s.
00110          * So, after each 5s, RTC will generate and wake-up system
00111          * out of Deep PowerDown mode.
00112          */
00113         RTC_SetAlarmTime (LPC_RTC, RTC_TIMETYPE_SECOND, 5);
00114
00115         RTC_CntIncrIntConfig (LPC_RTC, RTC_TIMETYPE_SECOND, DISABLE);
00116         /* Set the AMR for 5s match alarm interrupt */
00117         RTC_AlarmIntConfig (LPC_RTC, RTC_TIMETYPE_SECOND, ENABLE);
00118         RTC_ClearIntPending(LPC_RTC, RTC_INT_ALARM);
00119
00120         _DBG_("Press '1' to enter system in Deep PowerDown mode");
00121         while(_DG !='1');
00122
00123         RTC_Cmd(LPC_RTC, ENABLE);
00124         NVIC_EnableIRQ(RTC_IRQn);
00125
00126         _DBG_("Enter Deep PowerDown mode...");
00127         _DBG_("Wait 5s, RTC will wake-up system...\n\r");
00128
00129         // Enter target power down mode
00130         CLKPWR_DeepPowerDown();
00131
00132         while(1);
00133         return 1;
00134 }
00135
00136
00137 /* With ARM and GHS toolsets, the entry point is main() - this will
00138    allow the linker to generate wrapper code to setup stacks, allocate
00139    heap area, and initialize and copy code and data segments. For GNU
00140    toolsets, the entry point is through __start() in the crt0_gnu.asm
00141    file, and that startup code will setup stacks and data */
00142 int main(void)
00143 {
00144     return c_entry();
00145 }
00146
00147 #ifdef  DEBUG
00148 /*******************************************************************************
00149 * @brief                Reports the name of the source file and the source line number
00150 *                               where the CHECK_PARAM error has occurred.
00151 * @param[in]    file Pointer to the source file name
00152 * @param[in]    line assert_param error line source number
00153 * @return               None
00154 *******************************************************************************/
00155 void check_failed(uint8_t *file, uint32_t line)
00156 {
00157         /* User can add his own implementation to report the file name and line number,
00158          ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
00159
00160         /* Infinite loop */
00161         while(1);
00162 }
00163 #endif
00164
00165 /*
00166  * @}
00167  */
Generated on Tue Jun 7 14:59:02 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/SSP/sc16is750_int/sc16is750_int.c Source File

C:/nxpdrv/LPC1700CMSIS/Examples/SSP/sc16is750_int/sc16is750_int.c

Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          sc16is750_int.c                                 2010-05-21
00003 */
00026 #include "lpc17xx_ssp.h"
00027 #include "lpc17xx_libcfg.h"
00028 #include "lpc17xx_pinsel.h"
00029 #include "debug_frmwrk.h"
00030 #include "lpc17xx_gpio.h"
00031
00032 /* Example group ----------------------------------------------------------- */
00038 /************************** PRIVATE DEFINTIONS ***********************/
00039 // PORT number that /CS pin assigned on
00040 #define CS_PORT_NUM             0
00041 // PIN number that  /CS pin assigned on
00042 #define CS_PIN_NUM              16
00043
00044 /* Idle char */
00045 #define IDLE_CHAR       0xFF
00046
00047 // Define macro used in command when using SSP with SC16IS740
00048 #define SC16IS740_WR_CMD(x)             ((uint8_t) (x << 3))
00049 #define SC16IS740_RD_CMD(x)             ((uint8_t) ((x << 3) | 0x80))
00050
00051 // Define register address of SC16IS740
00052 #define SC16IS740_IODIR_REG             0x0A
00053 #define SC16IS740_IOSTATE_REG   0x0B
00054 #define SC16IS740_IOCON_REG             0x0E
00055
00056 /************************** PRIVATE VARIABLES *************************/
00057 uint8_t menu1[] =
00058 "********************************************************************************\n\r"
00059 "Hello NXP Semiconductors \n\r"
00060 "SSP demo \n\r"
00061 "\t - MCU: LPC17xx \n\r"
00062 "\t - Core: ARM Cortex-M3 \n\r"
00063 "\t - Communicate via: UART0 - 9.6 kbps \n\r"
00064 " An example of SSP using interrupt mode - SPI frame format \n\r"
00065 "to test SSP driver \n\r"
00066 " Using SSP at mode SSP master/8bit on LPC1768 to communicate with \n\r"
00067 " SC16IS750/760 Demo Board \n\r"
00068 " Press '1' to turn on LEDs, '2' to turn off LEDs \n\r"
00069 "********************************************************************************\n\r";
00070 uint8_t menu2[] = "Demo terminated! \n\r";
00071
00072 uint8_t iocon_cfg[2] = {SC16IS740_WR_CMD(SC16IS740_IOCON_REG), 0x00};
00073 uint8_t iodir_cfg[2] = {SC16IS740_WR_CMD(SC16IS740_IODIR_REG), 0xFF};
00074 uint8_t iostate_on[2] = {SC16IS740_WR_CMD(SC16IS740_IOSTATE_REG), 0x00};
00075 uint8_t iostate_off[2] = {SC16IS740_WR_CMD(SC16IS740_IOSTATE_REG), 0xFF};
00076 uint8_t sspreadbuf[2];
00077
00078 /* Status Flag indicates current SSP transmission complete or not */
00079 __IO FlagStatus complete;
00080
00081 // SSP Configuration structure variable
00082 SSP_CFG_Type SSP_ConfigStruct;
00083 SSP_DATA_SETUP_Type xferConfig;
00084
00085 /************************** PRIVATE FUNCTIONS *************************/
00086 void SSP0_IRQHandler(void);
00087
00088 void CS_Init(void);
00089 void CS_Force(int32_t state);
00090 void print_menu(void);
00091
00092
00093 /*----------------- INTERRUPT SERVICE ROUTINES --------------------------*/
00094 /*********************************************************************/
00099 void SSP0_IRQHandler(void)
00100 {
00101         SSP_DATA_SETUP_Type *xf_setup;
00102         uint16_t tmp;
00103         uint8_t dataword;
00104
00105         // Disable all SSP interrupts
00106         SSP_IntConfig(LPC_SSP0, SSP_INTCFG_ROR|SSP_INTCFG_RT|SSP_INTCFG_RX|SSP_INTCFG_TX, DISABLE);
00107
00108         if(SSP_GetDataSize(LPC_SSP0)>8)
00109                 dataword = 1;
00110         else
00111                 dataword = 0;
00112         xf_setup = &xferConfig;
00113         // save status
00114         tmp = SSP_GetRawIntStatusReg(LPC_SSP0);
00115         xf_setup->status = tmp;
00116
00117         // Check overrun error
00118         if (tmp & SSP_RIS_ROR){
00119                 // Clear interrupt
00120                 SSP_ClearIntPending(LPC_SSP0, SSP_INTCLR_ROR);
00121                 // update status
00122                 xf_setup->status |= SSP_STAT_ERROR;
00123                 // Set Complete Flag
00124                 complete = SET;
00125                 return;
00126         }
00127
00128         if ((xf_setup->tx_cnt != xf_setup->length) || (xf_setup->rx_cnt != xf_setup->length)){
00129                 /* check if RX FIFO contains data */
00130                 while ((SSP_GetStatus(LPC_SSP0, SSP_STAT_RXFIFO_NOTEMPTY)) && (xf_setup->rx_cnt != xf_setup->length)){
00131                         // Read data from SSP data
00132                         tmp = SSP_ReceiveData(LPC_SSP0);
00133
00134                         // Store data to destination
00135                         if (xf_setup->rx_data != NULL)
00136                         {
00137                                 if (dataword == 0){
00138                                         *(uint8_t *)((uint32_t)xf_setup->rx_data + xf_setup->rx_cnt) = (uint8_t) tmp;
00139                                 } else {
00140                                         *(uint16_t *)((uint32_t)xf_setup->rx_data + xf_setup->rx_cnt) = (uint16_t) tmp;
00141                                 }
00142                         }
00143                         // Increase counter
00144                         if (dataword == 0){
00145                                 xf_setup->rx_cnt++;
00146                         } else {
00147                                 xf_setup->rx_cnt += 2;
00148                         }
00149                 }
00150
00151                 while ((SSP_GetStatus(LPC_SSP0, SSP_STAT_TXFIFO_NOTFULL)) && (xf_setup->tx_cnt != xf_setup->length)){
00152                         // Write data to buffer
00153                         if(xf_setup->tx_data == NULL){
00154                                 if (dataword == 0){
00155                                         SSP_SendData(LPC_SSP0, 0xFF);
00156                                         xf_setup->tx_cnt++;
00157                                 } else {
00158                                         SSP_SendData(LPC_SSP0, 0xFFFF);
00159                                         xf_setup->tx_cnt += 2;
00160                                 }
00161                         } else {
00162                                 if (dataword == 0){
00163                                         SSP_SendData(LPC_SSP0, (*(uint8_t *)((uint32_t)xf_setup->tx_data + xf_setup->tx_cnt)));
00164                                         xf_setup->tx_cnt++;
00165                                 } else {
00166                                         SSP_SendData(LPC_SSP0, (*(uint16_t *)((uint32_t)xf_setup->tx_data + xf_setup->tx_cnt)));
00167                                         xf_setup->tx_cnt += 2;
00168                                 }
00169                         }
00170
00171                         // Check overrun error
00172                         if (SSP_GetRawIntStatus(LPC_SSP0, SSP_INTSTAT_RAW_ROR)){
00173                                 // update status
00174                                 xf_setup->status |= SSP_STAT_ERROR;
00175                                 // Set Complete Flag
00176                                 complete = SET;
00177                                 return;
00178                         }
00179
00180                         // Check for any data available in RX FIFO
00181                         while ((SSP_GetStatus(LPC_SSP0, SSP_STAT_RXFIFO_NOTEMPTY)) && (xf_setup->rx_cnt != xf_setup->length)){
00182                                 // Read data from SSP data
00183                                 tmp = SSP_ReceiveData(LPC_SSP0);
00184
00185                                 // Store data to destination
00186                                 if (xf_setup->rx_data != NULL)
00187                                 {
00188                                         if (dataword == 0){
00189                                                 *(uint8_t *)((uint32_t)xf_setup->rx_data + xf_setup->rx_cnt) = (uint8_t) tmp;
00190                                         } else {
00191                                                 *(uint16_t *)((uint32_t)xf_setup->rx_data + xf_setup->rx_cnt) = (uint16_t) tmp;
00192                                         }
00193                                 }
00194                                 // Increase counter
00195                                 if (dataword == 0){
00196                                         xf_setup->rx_cnt++;
00197                                 } else {
00198                                         xf_setup->rx_cnt += 2;
00199                                 }
00200                         }
00201                 }
00202         }
00203
00204         // If there more data to sent or receive
00205         if ((xf_setup->rx_cnt != xf_setup->length) || (xf_setup->tx_cnt != xf_setup->length)){
00206                 // Enable all interrupt
00207                 SSP_IntConfig(LPC_SSP0, SSP_INTCFG_ROR|SSP_INTCFG_RT|SSP_INTCFG_RX|SSP_INTCFG_TX, ENABLE);
00208         } else {
00209                 // Save status
00210                 xf_setup->status = SSP_STAT_DONE;
00211                 // Set Complete Flag
00212                 complete = SET;
00213         }
00214 }
00215
00216 /*-------------------------PRIVATE FUNCTIONS------------------------------*/
00217 /*********************************************************************/
00223 void CS_Init(void)
00224 {
00225         GPIO_SetDir(CS_PORT_NUM, (1<<CS_PIN_NUM), 1);
00226         GPIO_SetValue(CS_PORT_NUM, (1<<CS_PIN_NUM));
00227 }
00228
00229
00230 /*********************************************************************/
00238 void CS_Force(int32_t state)
00239 {
00240         if (state){
00241                 GPIO_SetValue(CS_PORT_NUM, (1<<CS_PIN_NUM));
00242         }else{
00243                 GPIO_ClearValue(CS_PORT_NUM, (1<<CS_PIN_NUM));
00244         }
00245 }
00246
00247 /*********************************************************************/
00252 void print_menu(void)
00253 {
00254         _DBG(menu1);
00255 }
00256
00257 /*-------------------------MAIN FUNCTION------------------------------*/
00258 /*********************************************************************/
00263 int c_entry(void)
00264 {
00265         uint8_t tmpchar[2] = {0, 0};
00266         PINSEL_CFG_Type PinCfg;
00267         __IO FlagStatus exitflag;
00268
00269         /*
00270          * Initialize SPI pin connect
00271          * P0.15 - SCK
00272          * P0.16 - SSEL - used as GPIO
00273          * P0.17 - MISO
00274          * P0.18 - MOSI
00275          */
00276         PinCfg.Funcnum = 2;
00277         PinCfg.OpenDrain = 0;
00278         PinCfg.Pinmode = 0;
00279         PinCfg.Portnum = 0;
00280         PinCfg.Pinnum = 15;
00281         PINSEL_ConfigPin(&PinCfg);
00282         PinCfg.Pinnum = 17;
00283         PINSEL_ConfigPin(&PinCfg);
00284         PinCfg.Pinnum = 18;
00285         PINSEL_ConfigPin(&PinCfg);
00286         PinCfg.Pinnum = 16;
00287         PinCfg.Funcnum = 0;
00288         PINSEL_ConfigPin(&PinCfg);
00289
00290         /* Initialize debug via UART0
00291          * – 115200bps
00292          * – 8 data bit
00293          * – No parity
00294          * – 1 stop bit
00295          * – No flow control
00296          */
00297         debug_frmwrk_init();
00298
00299         // print welcome screen
00300         print_menu();
00301
00302         // initialize SSP configuration structure to default
00303         SSP_ConfigStructInit(&SSP_ConfigStruct);
00304         // Initialize SSP peripheral with parameter given in structure above
00305         SSP_Init(LPC_SSP0, &SSP_ConfigStruct);
00306
00307         // Initialize /CS pin to GPIO function
00308         CS_Init();
00309
00310         // Enable SSP peripheral
00311         SSP_Cmd(LPC_SSP0, ENABLE);
00312
00313     /* preemption = 1, sub-priority = 1 */
00314     NVIC_SetPriority(SSP0_IRQn, ((0x01<<3)|0x01));
00315     /* Enable SSP0 interrupt */
00316     NVIC_EnableIRQ(SSP0_IRQn);
00317
00318         /* First, send some command to reset SC16IS740 chip via SSP bus interface
00319          * note driver /CS pin to low state before transferring by CS_Enable() function
00320          */
00321     complete = RESET;
00322         CS_Force(0);
00323         xferConfig.tx_data = iocon_cfg;
00324         xferConfig.rx_data = sspreadbuf;
00325         xferConfig.length = sizeof (iocon_cfg);
00326         SSP_ReadWrite(LPC_SSP0, &xferConfig, SSP_TRANSFER_INTERRUPT);
00327         while (complete == RESET);
00328         CS_Force(1);
00329
00330         complete = RESET;
00331         CS_Force(0);
00332         xferConfig.tx_data = iodir_cfg;
00333         xferConfig.rx_data = sspreadbuf;
00334         xferConfig.length = sizeof (iodir_cfg);
00335         SSP_ReadWrite(LPC_SSP0, &xferConfig, SSP_TRANSFER_INTERRUPT);
00336         while (complete == RESET);
00337         CS_Force(1);
00338
00339         // Reset exit flag
00340         exitflag = RESET;
00341
00342         /* Read some data from the buffer */
00343         while (exitflag == RESET)
00344         {
00345                 while((tmpchar[0] = _DG) == 0);
00346
00347                 if (tmpchar[0] == 27){
00348                         /* ESC key, set exit flag */
00349                         _DBG_(menu2);
00350                         exitflag = SET;
00351                 }
00352                 else if (tmpchar[0] == 'r'){
00353                         print_menu();
00354                 } else {
00355                         if (tmpchar[0] == '1')
00356                         {
00357                                 // LEDs are ON now...
00358                                 CS_Force(0);
00359                                 xferConfig.tx_data = iostate_on;
00360                                 xferConfig.rx_data = sspreadbuf;
00361                                 xferConfig.length = sizeof (iostate_on);
00362                                 SSP_ReadWrite(LPC_SSP0, &xferConfig, SSP_TRANSFER_POLLING);
00363                                 CS_Force(1);
00364                         }
00365                         else if (tmpchar[0] == '2')
00366                         {
00367                                 // LEDs are OFF now...
00368                                 CS_Force(0);
00369                                 xferConfig.tx_data = iostate_off;
00370                                 xferConfig.rx_data = sspreadbuf;
00371                                 xferConfig.length = sizeof (iostate_off);
00372                                 SSP_ReadWrite(LPC_SSP0, &xferConfig, SSP_TRANSFER_POLLING);
00373                                 CS_Force(1);
00374                         }
00375                         /* Then Echo it back */
00376                         _DBG_(tmpchar);
00377                 }
00378         }
00379
00380     // wait for current transmission complete - THR must be empty
00381     while (UART_CheckBusy(LPC_UART0) == SET );
00382
00383     // DeInitialize UART0 peripheral
00384     UART_DeInit(LPC_UART0);
00385
00386     /* Loop forever */
00387     while(1);
00388     return 1;
00389 }
00390
00391 /* With ARM and GHS toolsets, the entry point is main() - this will
00392    allow the linker to generate wrapper code to setup stacks, allocate
00393    heap area, and initialize and copy code and data segments. For GNU
00394    toolsets, the entry point is through __start() in the crt0_gnu.asm
00395    file, and that startup code will setup stacks and data */
00396 int main(void)
00397 {
00398     return c_entry();
00399 }
00400
00401
00402 #ifdef  DEBUG
00403 /*******************************************************************************
00404 * @brief                Reports the name of the source file and the source line number
00405 *                               where the CHECK_PARAM error has occurred.
00406 * @param[in]    file Pointer to the source file name
00407 * @param[in]    line assert_param error line source number
00408 * @return               None
00409 *******************************************************************************/
00410 void check_failed(uint8_t *file, uint32_t line)
00411 {
00412         /* User can add his own implementation to report the file name and line number,
00413          ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
00414
00415         /* Infinite loop */
00416         while(1);
00417 }
00418 #endif
00419
00420 /*
00421  * @}
00422  */
Generated on Tue Jun 7 14:59:02 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/SSP/sc16is750_polling/sc16is750_polling.c Source File

C:/nxpdrv/LPC1700CMSIS/Examples/SSP/sc16is750_polling/sc16is750_polling.c

Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          sc16is750_polling.c                             2010-05-21
00003 */
00026 #include "lpc17xx_ssp.h"
00027 #include "lpc17xx_libcfg.h"
00028 #include "lpc17xx_pinsel.h"
00029 #include "debug_frmwrk.h"
00030 #include "lpc17xx_gpio.h"
00031
00032 /* Example group ----------------------------------------------------------- */
00039 /************************** PRIVATE DEFINITIONS ***********************/
00040 // PORT number that /CS pin assigned on
00041 #define CS_PORT_NUM             0
00042 // PIN number that  /CS pin assigned on
00043 #define CS_PIN_NUM              16
00044
00045 // Define macro used in command when using SSP with SC16IS740
00046 #define SC16IS740_WR_CMD(x)             ((uint8_t) (x << 3))
00047 #define SC16IS740_RD_CMD(x)             ((uint8_t) ((x << 3) | 0x80))
00048
00049 // Define register address of SC16IS740
00050 #define SC16IS740_IODIR_REG             0x0A
00051 #define SC16IS740_IOSTATE_REG   0x0B
00052 #define SC16IS740_IOCON_REG             0x0E
00053
00054
00055 /************************** PRIVATE VARIABLES *************************/
00056 uint8_t menu1[] =
00057 "********************************************************************************\n\r"
00058 "Hello NXP Semiconductors \n\r"
00059 "SSP demo \n\r"
00060 "\t - MCU: LPC17xx \n\r"
00061 "\t - Core: ARM Cortex-M3 \n\r"
00062 "\t - Communicate via: UART0 - 9.6 kbps \n\r"
00063 " Communicate with SSP0 function on SC16IS750/760 Demo Board\n\r"
00064 " in polling mode\n\r"
00065 " Use IO function on SC16IS740/750/760 chip to turn ON/OFF LEDs\n\r"
00066 " Press '1' to turn ON LEDs, '2' to turn OFF LEDs \n\r"
00067 "********************************************************************************\n\r";
00068 uint8_t menu2[] = "Demo terminated! \n\r";
00069
00070 // SSP Configuration structure variable
00071 SSP_CFG_Type SSP_ConfigStruct;
00072
00073 uint8_t iocon_cfg[2] = {SC16IS740_WR_CMD(SC16IS740_IOCON_REG), 0x00};
00074 uint8_t iodir_cfg[2] = {SC16IS740_WR_CMD(SC16IS740_IODIR_REG), 0xFF};
00075 uint8_t iostate_on[2] = {SC16IS740_WR_CMD(SC16IS740_IOSTATE_REG), 0x00};
00076 uint8_t iostate_off[2] = {SC16IS740_WR_CMD(SC16IS740_IOSTATE_REG), 0xFF};
00077 uint8_t sspreadbuf[2];
00078
00079 /************************** PRIVATE FUNCTIONS *************************/
00080 void CS_Init(void);
00081 void CS_Force(int32_t state);
00082 void print_menu(void);
00083
00084 /*-------------------------PRIVATE FUNCTIONS------------------------------*/
00085 /*********************************************************************/
00091 void CS_Init(void)
00092 {
00093         GPIO_SetDir(CS_PORT_NUM, (1<<CS_PIN_NUM), 1);
00094         GPIO_SetValue(CS_PORT_NUM, (1<<CS_PIN_NUM));
00095 }
00096
00097
00098 /*********************************************************************/
00106 void CS_Force(int32_t state)
00107 {
00108         if (state){
00109                 GPIO_SetValue(CS_PORT_NUM, (1<<CS_PIN_NUM));
00110         }else{
00111                 GPIO_ClearValue(CS_PORT_NUM, (1<<CS_PIN_NUM));
00112         }
00113 }
00114
00115
00116 /*********************************************************************/
00121 void print_menu(void)
00122 {
00123         _DBG(menu1);
00124 }
00125
00126 /*-------------------------MAIN FUNCTION------------------------------*/
00127 /*********************************************************************/
00132 int c_entry(void)
00133 {
00134         uint8_t tmpchar[2] = {0, 0};
00135         PINSEL_CFG_Type PinCfg;
00136         __IO FlagStatus exitflag;
00137         SSP_DATA_SETUP_Type xferConfig;
00138
00139         /*
00140          * Initialize SPI pin connect
00141          * P0.15 - SCK
00142          * P0.16 - SSEL - used as GPIO
00143          * P0.17 - MISO
00144          * P0.18 - MOSI
00145          */
00146         PinCfg.Funcnum = 2;
00147         PinCfg.OpenDrain = 0;
00148         PinCfg.Pinmode = 0;
00149         PinCfg.Portnum = 0;
00150         PinCfg.Pinnum = 15;
00151         PINSEL_ConfigPin(&PinCfg);
00152         PinCfg.Pinnum = 17;
00153         PINSEL_ConfigPin(&PinCfg);
00154         PinCfg.Pinnum = 18;
00155         PINSEL_ConfigPin(&PinCfg);
00156         PinCfg.Pinnum = 16;
00157         PinCfg.Funcnum = 0;
00158         PINSEL_ConfigPin(&PinCfg);
00159
00160         /* Initialize debug via UART0
00161          * – 115200bps
00162          * – 8 data bit
00163          * – No parity
00164          * – 1 stop bit
00165          * – No flow control
00166          */
00167         debug_frmwrk_init();
00168
00169         // print welcome screen
00170         print_menu();
00171
00172         // initialize SSP configuration structure to default
00173         SSP_ConfigStructInit(&SSP_ConfigStruct);
00174         // Initialize SSP peripheral with parameter given in structure above
00175         SSP_Init(LPC_SSP0, &SSP_ConfigStruct);
00176
00177         // Initialize /CS pin to GPIO function
00178         CS_Init();
00179
00180         // Enable SSP peripheral
00181         SSP_Cmd(LPC_SSP0, ENABLE);
00182
00183         /* First, send some command to reset SC16IS740 chip via SSP bus interface
00184          * note driver /CS pin to low state before transferring by CS_Enable() function
00185          */
00186         CS_Force(0);
00187         xferConfig.tx_data = iocon_cfg;
00188         xferConfig.rx_data = sspreadbuf;
00189         xferConfig.length = sizeof (iocon_cfg);
00190         SSP_ReadWrite(LPC_SSP0, &xferConfig, SSP_TRANSFER_POLLING);
00191         CS_Force(1);
00192
00193         CS_Force(0);
00194         xferConfig.tx_data = iodir_cfg;
00195         xferConfig.rx_data = sspreadbuf;
00196         xferConfig.length = sizeof (iodir_cfg);
00197         SSP_ReadWrite(LPC_SSP0, &xferConfig, SSP_TRANSFER_POLLING);
00198         CS_Force(1);
00199
00200         // Reset exit flag
00201         exitflag = RESET;
00202
00203         /* Read some data from the buffer */
00204         while (exitflag == RESET)
00205         {
00206                 while((tmpchar[0] = _DG) == 0);
00207
00208                 if (tmpchar[0] == 27){
00209                         /* ESC key, set exit flag */
00210                         _DBG_(menu2);
00211                         exitflag = SET;
00212                 }
00213                 else if (tmpchar[0] == 'r'){
00214                         print_menu();
00215                 } else {
00216                         if (tmpchar[0] == '1')
00217                         {
00218                                 // LEDs are ON now...
00219                                 CS_Force(0);
00220                                 xferConfig.tx_data = iostate_on;
00221                                 xferConfig.rx_data = sspreadbuf;
00222                                 xferConfig.length = sizeof (iostate_on);
00223                                 SSP_ReadWrite(LPC_SSP0, &xferConfig, SSP_TRANSFER_POLLING);
00224                                 CS_Force(1);
00225                         }
00226                         else if (tmpchar[0] == '2')
00227                         {
00228                                 // LEDs are OFF now...
00229                                 CS_Force(0);
00230                                 xferConfig.tx_data = iostate_off;
00231                                 xferConfig.rx_data = sspreadbuf;
00232                                 xferConfig.length = sizeof (iostate_off);
00233                                 SSP_ReadWrite(LPC_SSP0, &xferConfig, SSP_TRANSFER_POLLING);
00234                                 CS_Force(1);
00235                         }
00236                         /* Then Echo it back */
00237                         _DBG_(tmpchar);
00238                 }
00239         }
00240
00241     // wait for current transmission complete - THR must be empty
00242     while (UART_CheckBusy(LPC_UART0) == SET);
00243
00244     // DeInitialize UART0 peripheral
00245     UART_DeInit(LPC_UART0);
00246
00247     /* Loop forever */
00248     while(1);
00249     return 1;
00250 }
00251
00252 /* With ARM and GHS toolsets, the entry point is main() - this will
00253    allow the linker to generate wrapper code to setup stacks, allocate
00254    heap area, and initialize and copy code and data segments. For GNU
00255    toolsets, the entry point is through __start() in the crt0_gnu.asm
00256    file, and that startup code will setup stacks and data */
00257 int main(void)
00258 {
00259     return c_entry();
00260 }
00261
00262
00263 #ifdef  DEBUG
00264 /*******************************************************************************
00265 * @brief                Reports the name of the source file and the source line number
00266 *                               where the CHECK_PARAM error has occurred.
00267 * @param[in]    file Pointer to the source file name
00268 * @param[in]    line assert_param error line source number
00269 * @return               None
00270 *******************************************************************************/
00271 void check_failed(uint8_t *file, uint32_t line)
00272 {
00273         /* User can add his own implementation to report the file name and line number,
00274          ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
00275
00276         /* Infinite loop */
00277         while(1);
00278 }
00279 #endif
00280
00281 /*
00282  * @}
00283  */
Generated on Tue Jun 7 14:59:02 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBCDC/serial.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBCDC/serial.h

Go to the documentation of this file.
00001 /*----------------------------------------------------------------------------
00002  *      Name:    serial.h
00003  *      Purpose: serial port handling
00004  *      Version: V1.10
00005  *----------------------------------------------------------------------------
00006  *      This software is supplied "AS IS" without any warranties, express,
00007  *      implied or statutory, including but not limited to the implied
00008  *      warranties of fitness for purpose, satisfactory quality and
00009  *      noninfringement. Keil extends you a royalty-free right to reproduce
00010  *      and distribute executable files created using this software for use
00011  *      on NXP Semiconductors LPC microcontroller devices only. Nothing else
00012  *      gives you the right to use this software.
00013  *
00014  * Copyright (c) 2009 Keil - An ARM Company. All rights reserved.
00015  *---------------------------------------------------------------------------*/
00016
00017 #define PORT_NUM        1
00018
00019 /*----------------------------------------------------------------------------
00020  Serial interface related prototypes
00021  *---------------------------------------------------------------------------*/
00022 extern void  ser_OpenPort  (char portNum);
00023 extern void  ser_ClosePort (char portNum);
00024 extern void  ser_InitPort0  (unsigned long baudrate, unsigned int databits, unsigned int parity, unsigned int stopbits);
00025 extern void  ser_InitPort1  (unsigned long baudrate, unsigned int databits, unsigned int parity, unsigned int stopbits);
00026 extern void  ser_AvailChar (int *availChar);
00027 extern int   ser_Write     (char portNum, const char *buffer, int *length);
00028 extern int   ser_Read      (char *buffer, const int *length);
00029 extern void  ser_LineState (unsigned short *lineState);
00030
Generated on Tue Jun 7 14:59:05 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/telnetd/shell.c Source File

C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/telnetd/shell.c

Go to the documentation of this file.
00001  /*
00002  * Copyright (c) 2003, Adam Dunkels.
00003  * All rights reserved.
00004  *
00005  * Redistribution and use in source and binary forms, with or without
00006  * modification, are permitted provided that the following conditions
00007  * are met:
00008  * 1. Redistributions of source code must retain the above copyright
00009  *    notice, this list of conditions and the following disclaimer.
00010  * 2. Redistributions in binary form must reproduce the above copyright
00011  *    notice, this list of conditions and the following disclaimer in the
00012  *    documentation and/or other materials provided with the distribution.
00013  * 3. The name of the author may not be used to endorse or promote
00014  *    products derived from this software without specific prior
00015  *    written permission.
00016  *
00017  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS
00018  * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
00019  * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
00020  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
00021  * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
00022  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
00023  * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
00024  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
00025  * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
00026  * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
00027  * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
00028  *
00029  * This file is part of the uIP TCP/IP stack.
00030  *
00031  * $Id: shell.c,v 1.1 2006/06/07 09:43:54 adam Exp $
00032  *
00033  */
00034
00035 #include "shell.h"
00036
00037 #include <string.h>
00038
00039 struct ptentry {
00040   char *commandstr;
00041   void (* pfunc)(char *str);
00042 };
00043
00044 #define SHELL_PROMPT "uIP 1.0> "
00045
00046 /*---------------------------------------------------------------------------*/
00047 static void
00048 parse(register char *str, struct ptentry *t)
00049 {
00050   struct ptentry *p;
00051   for(p = t; p->commandstr != NULL; ++p) {
00052     if(strncmp(p->commandstr, str, strlen(p->commandstr)) == 0) {
00053       break;
00054     }
00055   }
00056
00057   p->pfunc(str);
00058 }
00059 /*---------------------------------------------------------------------------*/
00060 static void
00061 inttostr(register char *str, unsigned int i)
00062 {
00063   str[0] = '0' + i / 100;
00064   if(str[0] == '0') {
00065     str[0] = ' ';
00066   }
00067   str[1] = '0' + (i / 10) % 10;
00068   if(str[0] == ' ' && str[1] == '0') {
00069     str[1] = ' ';
00070   }
00071   str[2] = '0' + i % 10;
00072   str[3] = ' ';
00073   str[4] = 0;
00074 }
00075 /*---------------------------------------------------------------------------*/
00076 static void
00077 help(char *str)
00078 {
00079   shell_output("Available commands:", "");
00080   shell_output("stats   - show network statistics", "");
00081   shell_output("conn    - show TCP connections", "");
00082   shell_output("help, ? - show help", "");
00083   shell_output("exit    - exit shell", "");
00084 }
00085 /*---------------------------------------------------------------------------*/
00086 static void
00087 unknown(char *str)
00088 {
00089   if(strlen(str) > 0) {
00090     shell_output("Unknown command: ", str);
00091   }
00092 }
00093 /*---------------------------------------------------------------------------*/
00094 static struct ptentry parsetab[] =
00095   {{"stats", help},
00096    {"conn", help},
00097    {"help", help},
00098    {"exit", shell_quit},
00099    {"?", help},
00100
00101    /* Default action */
00102    {NULL, unknown}};
00103 /*---------------------------------------------------------------------------*/
00104 void
00105 shell_init(void)
00106 {
00107 }
00108 /*---------------------------------------------------------------------------*/
00109 void
00110 shell_start(void)
00111 {
00112   shell_output("uIP command shell", "");
00113   shell_output("Type '?' and return for help", "");
00114   shell_prompt(SHELL_PROMPT);
00115 }
00116 /*---------------------------------------------------------------------------*/
00117 void
00118 shell_input(char *cmd)
00119 {
00120   parse(cmd, parsetab);
00121   shell_prompt(SHELL_PROMPT);
00122 }
00123 /*---------------------------------------------------------------------------*/
Generated on Tue Jun 7 14:58:59 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/telnetd/shell.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/telnetd/shell.h

Go to the documentation of this file.
00001
00012 /*
00013  * Copyright (c) 2003, Adam Dunkels.
00014  * All rights reserved.
00015  *
00016  * Redistribution and use in source and binary forms, with or without
00017  * modification, are permitted provided that the following conditions
00018  * are met:
00019  * 1. Redistributions of source code must retain the above copyright
00020  *    notice, this list of conditions and the following disclaimer.
00021  * 2. Redistributions in binary form must reproduce the above copyright
00022  *    notice, this list of conditions and the following disclaimer in the
00023  *    documentation and/or other materials provided with the distribution.
00024  * 3. The name of the author may not be used to endorse or promote
00025  *    products derived from this software without specific prior
00026  *    written permission.
00027  *
00028  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS
00029  * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
00030  * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
00031  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
00032  * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
00033  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
00034  * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
00035  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
00036  * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
00037  * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
00038  * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
00039  *
00040  * This file is part of the Contiki desktop OS.
00041  *
00042  * $Id: shell.h,v 1.1 2006/06/07 09:43:54 adam Exp $
00043  *
00044  */
00045 #ifndef __SHELL_H__
00046 #define __SHELL_H__
00047
00054 void shell_init(void);
00055
00061 void shell_start(void);
00062
00072 void shell_input(char *command);
00073
00078 void shell_quit(char *);
00079
00080
00091 void shell_output(char *str1, char *str2);
00092
00102 void shell_prompt(char *prompt);
00103
00104 #endif /* __SHELL_H__ */
Generated on Tue Jun 7 14:58:59 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/I2C/slave/slave.c Source File

C:/nxpdrv/LPC1700CMSIS/Examples/I2C/slave/slave.c

Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          slave.c                                 2010-05-21
00003 */
00025 #include "lpc17xx_i2c.h"
00026 #include "lpc17xx_libcfg.h"
00027 #include "lpc17xx_pinsel.h"
00028 #include "debug_frmwrk.h"
00029
00030 /* Example group ----------------------------------------------------------- */
00036 /************************** PRIVATE DEFINITIONS *************************/
00038 #define USEDI2CDEV_S            0
00039
00040 #define I2CDEV_S_OWN_ADDR       (0x90>>1)
00041
00043 #define BUFFER_SIZE                     0x10
00044
00045 #if (USEDI2CDEV_S == 0)
00046 #define I2CDEV_S LPC_I2C0
00047 #elif (USEDI2CDEV_S == 2)
00048 #define I2CDEV_S LPC_I2C2
00049 #else
00050 #error "Slave I2C device not defined!"
00051 #endif
00052
00053 /************************** PRIVATE VARIABLES *************************/
00054 uint8_t menu1[] =
00055 "********************************************************************************\n\r"
00056 "Hello NXP Semiconductors \n\r"
00057 "I2C demo \n\r"
00058 "\t - MCU: LPC17xx \n\r"
00059 "\t - Core: ARM Cortex-M3 \n\r"
00060 "\t - This example uses I2C as slave device to transfer data \n\r"
00061 " to/from I2C master device \n\r"
00062 "********************************************************************************\n\r";
00063
00065 uint8_t Slave_Buf[BUFFER_SIZE];
00066 uint8_t slave_test[2];
00067
00068 /************************** PRIVATE FUNCTIONS *************************/
00069 void print_menu(void);
00070 void Buffer_Init(uint8_t type);
00071
00072 /*-------------------------PRIVATE FUNCTIONS------------------------------*/
00073 /*********************************************************************/
00078 void print_menu(void)
00079 {
00080         _DBG_(menu1);
00081 }
00082
00083 /*********************************************************************/
00093 void Buffer_Init(uint8_t type)
00094 {
00095         uint8_t i;
00096
00097         if (type)
00098         {
00099                 for (i = 0; i < BUFFER_SIZE; i++) {
00100                         Slave_Buf[i] = i;
00101                 }
00102         }
00103         else
00104         {
00105                 for (i = 0; i < BUFFER_SIZE; i++) {
00106                         Slave_Buf[i] = 0;
00107                 }
00108         }
00109 }
00110
00111
00112 /*-------------------------MAIN FUNCTION------------------------------*/
00113 /*********************************************************************/
00118 int c_entry(void)
00119 {
00120         PINSEL_CFG_Type PinCfg;
00121         I2C_OWNSLAVEADDR_CFG_Type OwnSlavAdr;
00122         I2C_S_SETUP_Type transferSCfg;
00123         uint32_t tempp;
00124         uint8_t *pdat;
00125
00126         /* Initialize debug via UART0
00127          * – 115200bps
00128          * – 8 data bit
00129          * – No parity
00130          * – 1 stop bit
00131          * – No flow control
00132          */
00133         debug_frmwrk_init();
00134
00135         print_menu();
00136
00137         /* I2C block ------------------------------------------------------------------- */
00138
00139         /*
00140          * Init I2C pin connect
00141          */
00142         PinCfg.OpenDrain = 0;
00143         PinCfg.Pinmode = 0;
00144 #if ((USEDI2CDEV_S == 0))
00145         PinCfg.Funcnum = 1;
00146         PinCfg.Pinnum = 27;
00147         PinCfg.Portnum = 0;
00148         PINSEL_ConfigPin(&PinCfg);
00149         PinCfg.Pinnum = 28;
00150         PINSEL_ConfigPin(&PinCfg);
00151 #endif
00152 #if ((USEDI2CDEV_S == 2))
00153         PinCfg.Funcnum = 2;
00154         PinCfg.Pinnum = 10;
00155         PinCfg.Portnum = 0;
00156         PINSEL_ConfigPin(&PinCfg);
00157         PinCfg.Pinnum = 11;
00158         PINSEL_ConfigPin(&PinCfg);
00159 #endif
00160
00161         // Initialize Slave I2C peripheral
00162         I2C_Init(I2CDEV_S, 100000);
00163
00164         /* Set  Own slave address for I2C device */
00165         OwnSlavAdr.GeneralCallState = ENABLE;
00166         OwnSlavAdr.SlaveAddrChannel= 0;
00167         OwnSlavAdr.SlaveAddrMaskValue = 0xFF;
00168         OwnSlavAdr.SlaveAddr_7bit = I2CDEV_S_OWN_ADDR;
00169         I2C_SetOwnSlaveAddr(I2CDEV_S, &OwnSlavAdr);
00170
00171         /* Enable Slave I2C operation */
00172         I2C_Cmd(I2CDEV_S, ENABLE);
00173
00174         _DBG_("Press '1' to start");
00175         while (_DG != '1');
00176
00177
00178         /* Reading -------------------------------------------------------- */
00179         _DBG_("Start Reading...");
00180
00181         /* Initialize buffer */
00182         Buffer_Init(0);
00183
00184         /* Start I2C slave device first */
00185         transferSCfg.tx_data = NULL;
00186         transferSCfg.tx_length = 0;
00187         transferSCfg.rx_data = Slave_Buf;
00188         transferSCfg.rx_length = sizeof(Slave_Buf);
00189         I2C_SlaveTransferData(I2CDEV_S, &transferSCfg, I2C_TRANSFER_POLLING);
00190
00191         pdat = Slave_Buf;
00192         // Verify
00193         for (tempp = 0; tempp < sizeof(Slave_Buf); tempp++){
00194                 if (*pdat++ != tempp){
00195                         _DBG_("Verify error");
00196                         break;
00197                 }
00198         }
00199         if (tempp == sizeof(Slave_Buf)){
00200                 _DBG_("Verify successfully");
00201         }
00202
00203         /* Transmit -------------------------------------------------------- */
00204         _DBG_("Start Transmit...");
00205
00206         /* Initialize buffer */
00207         Buffer_Init(1);
00208
00209         /* Start I2C slave device first */
00210         transferSCfg.tx_data = Slave_Buf;
00211         transferSCfg.tx_length = sizeof(Slave_Buf);
00212         transferSCfg.rx_data = NULL;
00213         transferSCfg.rx_length = 0;
00214         I2C_SlaveTransferData(I2CDEV_S, &transferSCfg, I2C_TRANSFER_POLLING);
00215
00216         _DBG_("Complete!");
00217
00218 #if 1
00219         /* Receive and transmit -------------------------------------------------------- */
00220         _DBG_("Start Receive, wait for repeat start and transmit...");
00221
00222         /* Initialize buffer */
00223         Buffer_Init(1);
00224         slave_test[0] = 0xAA;
00225         slave_test[1] = 0x55;
00226
00227         /* Start I2C slave device first */
00228         transferSCfg.tx_data = Slave_Buf;
00229         transferSCfg.tx_length = sizeof(Slave_Buf);
00230         transferSCfg.rx_data = slave_test;
00231         transferSCfg.rx_length = sizeof(slave_test);
00232         I2C_SlaveTransferData(I2CDEV_S, &transferSCfg, I2C_TRANSFER_POLLING);
00233         _DBG_("Receive Data:");
00234         _DBH(slave_test[0]); _DBG_("");
00235         _DBH(slave_test[1]); _DBG_("");
00236         _DBG_("Complete!");
00237 #endif
00238
00239
00240     /* Loop forever */
00241     while(1);
00242     return 1;
00243 }
00244
00245 /* With ARM and GHS toolsets, the entry point is main() - this will
00246    allow the linker to generate wrapper code to setup stacks, allocate
00247    heap area, and initialize and copy code and data segments. For GNU
00248    toolsets, the entry point is through __start() in the crt0_gnu.asm
00249    file, and that startup code will setup stacks and data */
00250 int main(void)
00251 {
00252     return c_entry();
00253 }
00254
00255
00256 #ifdef  DEBUG
00257 /*******************************************************************************
00258 * @brief                Reports the name of the source file and the source line number
00259 *                               where the CHECK_PARAM error has occurred.
00260 * @param[in]    file Pointer to the source file name
00261 * @param[in]    line assert_param error line source number
00262 * @return               None
00263 *******************************************************************************/
00264 void check_failed(uint8_t *file, uint32_t line)
00265 {
00266         /* User can add his own implementation to report the file name and line number,
00267          ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
00268
00269         /* Infinite loop */
00270         while(1);
00271 }
00272 #endif
00273
00274 /*
00275  * @}
00276  */
Generated on Tue Jun 7 14:59:01 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/smtp/smtp-strings.c Source File

C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/smtp/smtp-strings.c

Go to the documentation of this file.
00001 /*
00002  * Copyright (c) 2004, Adam Dunkels.
00003  * All rights reserved.
00004  *
00005  * Redistribution and use in source and binary forms, with or without
00006  * modification, are permitted provided that the following conditions
00007  * are met:
00008  * 1. Redistributions of source code must retain the above copyright
00009  *    notice, this list of conditions and the following disclaimer.
00010  * 2. Redistributions in binary form must reproduce the above copyright
00011  *    notice, this list of conditions and the following disclaimer in the
00012  *    documentation and/or other materials provided with the distribution.
00013  * 3. Neither the name of the Institute nor the names of its contributors
00014  *    may be used to endorse or promote products derived from this software
00015  *    without specific prior written permission.
00016  *
00017  * THIS SOFTWARE IS PROVIDED BY THE INSTITUTE AND CONTRIBUTORS ``AS IS'' AND
00018  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
00019  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
00020  * ARE DISCLAIMED.  IN NO EVENT SHALL THE INSTITUTE OR CONTRIBUTORS BE LIABLE
00021  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
00022  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
00023  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
00024  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
00025  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
00026  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
00027  * SUCH DAMAGE.
00028  *
00029  * This file is part of the uIP TCP/IP stack
00030  *
00031  * Author: Adam Dunkels <adam@sics.se>
00032  *
00033  * $Id: smtp-strings.c,v 1.3 2006/06/11 21:46:37 adam Exp $
00034  */
00035 const char smtp_220[4] =
00036 /* "220" */
00037 {0x32, 0x32, 0x30, };
00038 const char smtp_helo[6] =
00039 /* "HELO " */
00040 {0x48, 0x45, 0x4c, 0x4f, 0x20, };
00041 const char smtp_mail_from[12] =
00042 /* "MAIL FROM: " */
00043 {0x4d, 0x41, 0x49, 0x4c, 0x20, 0x46, 0x52, 0x4f, 0x4d, 0x3a, 0x20, };
00044 const char smtp_rcpt_to[10] =
00045 /* "RCPT TO: " */
00046 {0x52, 0x43, 0x50, 0x54, 0x20, 0x54, 0x4f, 0x3a, 0x20, };
00047 const char smtp_data[7] =
00048 /* "DATA\r\n" */
00049 {0x44, 0x41, 0x54, 0x41, 0xd, 0xa, };
00050 const char smtp_to[5] =
00051 /* "To: " */
00052 {0x54, 0x6f, 0x3a, 0x20, };
00053 const char smtp_cc[5] =
00054 /* "Cc: " */
00055 {0x43, 0x63, 0x3a, 0x20, };
00056 const char smtp_from[7] =
00057 /* "From: " */
00058 {0x46, 0x72, 0x6f, 0x6d, 0x3a, 0x20, };
00059 const char smtp_subject[10] =
00060 /* "Subject: " */
00061 {0x53, 0x75, 0x62, 0x6a, 0x65, 0x63, 0x74, 0x3a, 0x20, };
00062 const char smtp_quit[7] =
00063 /* "QUIT\r\n" */
00064 {0x51, 0x55, 0x49, 0x54, 0xd, 0xa, };
00065 const char smtp_crnl[3] =
00066 /* "\r\n" */
00067 {0xd, 0xa, };
00068 const char smtp_crnlperiodcrnl[6] =
00069 /* "\r\n.\r\n" */
00070 {0xd, 0xa, 0x2e, 0xd, 0xa, };
Generated on Tue Jun 7 14:58:59 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/smtp/smtp-strings.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/smtp/smtp-strings.h

Go to the documentation of this file.
00001 /*
00002  * Copyright (c) 2004, Adam Dunkels.
00003  * All rights reserved.
00004  *
00005  * Redistribution and use in source and binary forms, with or without
00006  * modification, are permitted provided that the following conditions
00007  * are met:
00008  * 1. Redistributions of source code must retain the above copyright
00009  *    notice, this list of conditions and the following disclaimer.
00010  * 2. Redistributions in binary form must reproduce the above copyright
00011  *    notice, this list of conditions and the following disclaimer in the
00012  *    documentation and/or other materials provided with the distribution.
00013  * 3. Neither the name of the Institute nor the names of its contributors
00014  *    may be used to endorse or promote products derived from this software
00015  *    without specific prior written permission.
00016  *
00017  * THIS SOFTWARE IS PROVIDED BY THE INSTITUTE AND CONTRIBUTORS ``AS IS'' AND
00018  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
00019  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
00020  * ARE DISCLAIMED.  IN NO EVENT SHALL THE INSTITUTE OR CONTRIBUTORS BE LIABLE
00021  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
00022  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
00023  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
00024  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
00025  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
00026  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
00027  * SUCH DAMAGE.
00028  *
00029  * This file is part of the uIP TCP/IP stack
00030  *
00031  * Author: Adam Dunkels <adam@sics.se>
00032  *
00033  * $Id: smtp-strings.h,v 1.3 2006/06/11 21:46:37 adam Exp $
00034  */
00035 extern const char smtp_220[4];
00036 extern const char smtp_helo[6];
00037 extern const char smtp_mail_from[12];
00038 extern const char smtp_rcpt_to[10];
00039 extern const char smtp_data[7];
00040 extern const char smtp_to[5];
00041 extern const char smtp_cc[5];
00042 extern const char smtp_from[7];
00043 extern const char smtp_subject[10];
00044 extern const char smtp_quit[7];
00045 extern const char smtp_crnl[3];
00046 extern const char smtp_crnlperiodcrnl[6];
Generated on Tue Jun 7 14:58:59 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/smtp/smtp.c Source File

C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/smtp/smtp.c

Go to the documentation of this file.
00001
00026 /*
00027  * Copyright (c) 2004, Adam Dunkels.
00028  * All rights reserved.
00029  *
00030  * Redistribution and use in source and binary forms, with or without
00031  * modification, are permitted provided that the following conditions
00032  * are met:
00033  * 1. Redistributions of source code must retain the above copyright
00034  *    notice, this list of conditions and the following disclaimer.
00035  * 2. Redistributions in binary form must reproduce the above copyright
00036  *    notice, this list of conditions and the following disclaimer in the
00037  *    documentation and/or other materials provided with the distribution.
00038  * 3. Neither the name of the Institute nor the names of its contributors
00039  *    may be used to endorse or promote products derived from this software
00040  *    without specific prior written permission.
00041  *
00042  * THIS SOFTWARE IS PROVIDED BY THE INSTITUTE AND CONTRIBUTORS ``AS IS'' AND
00043  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
00044  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
00045  * ARE DISCLAIMED.  IN NO EVENT SHALL THE INSTITUTE OR CONTRIBUTORS BE LIABLE
00046  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
00047  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
00048  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
00049  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
00050  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
00051  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
00052  * SUCH DAMAGE.
00053  *
00054  * This file is part of the uIP TCP/IP stack.
00055  *
00056  * Author: Adam Dunkels <adam@sics.se>
00057  *
00058  * $Id: smtp.c,v 1.4 2006/06/11 21:46:37 adam Exp $
00059  */
00060 #include "smtp.h"
00061
00062 #include "smtp-strings.h"
00063 #include "psock.h"
00064 #include "uip.h"
00065
00066 #include <string.h>
00067
00068 static struct smtp_state s;
00069
00070 static char *localhostname;
00071 static uip_ipaddr_t smtpserver;
00072
00073 #define ISO_nl 0x0a
00074 #define ISO_cr 0x0d
00075
00076 #define ISO_period 0x2e
00077
00078 #define ISO_2  0x32
00079 #define ISO_3  0x33
00080 #define ISO_4  0x34
00081 #define ISO_5  0x35
00082
00083
00084 /*---------------------------------------------------------------------------*/
00085 static
00086 PT_THREAD(smtp_thread(void))
00087 {
00088   PSOCK_BEGIN(&s.psock);
00089
00090   PSOCK_READTO(&s.psock, ISO_nl);
00091
00092   if(strncmp(s.inputbuffer, smtp_220, 3) != 0) {
00093     PSOCK_CLOSE(&s.psock);
00094     smtp_done(2);
00095     PSOCK_EXIT(&s.psock);
00096   }
00097
00098   PSOCK_SEND_STR(&s.psock, (char *)smtp_helo);
00099   PSOCK_SEND_STR(&s.psock, localhostname);
00100   PSOCK_SEND_STR(&s.psock, (char *)smtp_crnl);
00101
00102   PSOCK_READTO(&s.psock, ISO_nl);
00103
00104   if(s.inputbuffer[0] != ISO_2) {
00105     PSOCK_CLOSE(&s.psock);
00106     smtp_done(3);
00107     PSOCK_EXIT(&s.psock);
00108   }
00109
00110   PSOCK_SEND_STR(&s.psock, (char *)smtp_mail_from);
00111   PSOCK_SEND_STR(&s.psock, s.from);
00112   PSOCK_SEND_STR(&s.psock, (char *)smtp_crnl);
00113
00114   PSOCK_READTO(&s.psock, ISO_nl);
00115
00116   if(s.inputbuffer[0] != ISO_2) {
00117     PSOCK_CLOSE(&s.psock);
00118     smtp_done(4);
00119     PSOCK_EXIT(&s.psock);
00120   }
00121
00122   PSOCK_SEND_STR(&s.psock, (char *)smtp_rcpt_to);
00123   PSOCK_SEND_STR(&s.psock, s.to);
00124   PSOCK_SEND_STR(&s.psock, (char *)smtp_crnl);
00125
00126   PSOCK_READTO(&s.psock, ISO_nl);
00127
00128   if(s.inputbuffer[0] != ISO_2) {
00129     PSOCK_CLOSE(&s.psock);
00130     smtp_done(5);
00131     PSOCK_EXIT(&s.psock);
00132   }
00133
00134   if(s.cc != 0) {
00135     PSOCK_SEND_STR(&s.psock, (char *)smtp_rcpt_to);
00136     PSOCK_SEND_STR(&s.psock, s.cc);
00137     PSOCK_SEND_STR(&s.psock, (char *)smtp_crnl);
00138
00139     PSOCK_READTO(&s.psock, ISO_nl);
00140
00141     if(s.inputbuffer[0] != ISO_2) {
00142       PSOCK_CLOSE(&s.psock);
00143       smtp_done(6);
00144       PSOCK_EXIT(&s.psock);
00145     }
00146   }
00147
00148   PSOCK_SEND_STR(&s.psock, (char *)smtp_data);
00149
00150   PSOCK_READTO(&s.psock, ISO_nl);
00151
00152   if(s.inputbuffer[0] != ISO_3) {
00153     PSOCK_CLOSE(&s.psock);
00154     smtp_done(7);
00155     PSOCK_EXIT(&s.psock);
00156   }
00157
00158   PSOCK_SEND_STR(&s.psock, (char *)smtp_to);
00159   PSOCK_SEND_STR(&s.psock, s.to);
00160   PSOCK_SEND_STR(&s.psock, (char *)smtp_crnl);
00161
00162   if(s.cc != 0) {
00163     PSOCK_SEND_STR(&s.psock, (char *)smtp_cc);
00164     PSOCK_SEND_STR(&s.psock, s.cc);
00165     PSOCK_SEND_STR(&s.psock, (char *)smtp_crnl);
00166   }
00167
00168   PSOCK_SEND_STR(&s.psock, (char *)smtp_from);
00169   PSOCK_SEND_STR(&s.psock, s.from);
00170   PSOCK_SEND_STR(&s.psock, (char *)smtp_crnl);
00171
00172   PSOCK_SEND_STR(&s.psock, (char *)smtp_subject);
00173   PSOCK_SEND_STR(&s.psock, s.subject);
00174   PSOCK_SEND_STR(&s.psock, (char *)smtp_crnl);
00175
00176   PSOCK_SEND(&s.psock, s.msg, s.msglen);
00177
00178   PSOCK_SEND_STR(&s.psock, (char *)smtp_crnlperiodcrnl);
00179
00180   PSOCK_READTO(&s.psock, ISO_nl);
00181   if(s.inputbuffer[0] != ISO_2) {
00182     PSOCK_CLOSE(&s.psock);
00183     smtp_done(8);
00184     PSOCK_EXIT(&s.psock);
00185   }
00186
00187   PSOCK_SEND_STR(&s.psock, (char *)smtp_quit);
00188   smtp_done(SMTP_ERR_OK);
00189   PSOCK_END(&s.psock);
00190 }
00191 /*---------------------------------------------------------------------------*/
00192 void
00193 smtp_appcall(void)
00194 {
00195   if(uip_closed()) {
00196     s.connected = 0;
00197     return;
00198   }
00199   if(uip_aborted() || uip_timedout()) {
00200     s.connected = 0;
00201     smtp_done(1);
00202     return;
00203   }
00204   smtp_thread();
00205 }
00206 /*---------------------------------------------------------------------------*/
00218 void
00219 smtp_configure(char *lhostname, void *server)
00220 {
00221   localhostname = lhostname;
00222   uip_ipaddr_copy(smtpserver, server);
00223 }
00224 /*---------------------------------------------------------------------------*/
00235 unsigned char
00236 smtp_send(char *to, char *cc, char *from,
00237           char *subject, char *msg, u16_t msglen)
00238 {
00239   struct uip_conn *conn;
00240
00241   conn = uip_connect(smtpserver, HTONS(25));
00242   if(conn == NULL) {
00243     return 0;
00244   }
00245   s.connected = 1;
00246   s.to = to;
00247   s.cc = cc;
00248   s.from = from;
00249   s.subject = subject;
00250   s.msg = msg;
00251   s.msglen = msglen;
00252
00253   PSOCK_INIT(&s.psock, s.inputbuffer, sizeof(s.inputbuffer));
00254
00255   return 1;
00256 }
00257 /*---------------------------------------------------------------------------*/
00258 void
00259 smtp_init(void)
00260 {
00261   s.connected = 0;
00262 }
00263 /*---------------------------------------------------------------------------*/
Generated on Tue Jun 7 14:58:59 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/smtp/smtp.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/smtp/smtp.h

Go to the documentation of this file.
00001
00014 /*
00015  * Copyright (c) 2002, Adam Dunkels.
00016  * All rights reserved.
00017  *
00018  * Redistribution and use in source and binary forms, with or without
00019  * modification, are permitted provided that the following conditions
00020  * are met:
00021  * 1. Redistributions of source code must retain the above copyright
00022  *    notice, this list of conditions and the following disclaimer.
00023  * 2. Redistributions in binary form must reproduce the above copyright
00024  *    notice, this list of conditions and the following disclaimer in the
00025  *    documentation and/or other materials provided with the distribution.
00026  * 3. The name of the author may not be used to endorse or promote
00027  *    products derived from this software without specific prior
00028  *    written permission.
00029  *
00030  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS
00031  * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
00032  * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
00033  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
00034  * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
00035  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
00036  * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
00037  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
00038  * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
00039  * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
00040  * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
00041  *
00042  * This file is part of the uIP TCP/IP stack.
00043  *
00044  * $Id: smtp.h,v 1.4 2006/06/11 21:46:37 adam Exp $
00045  *
00046  */
00047 #ifndef __SMTP_H__
00048 #define __SMTP_H__
00049
00050 #include "uipopt.h"
00051
00055 #define SMTP_ERR_OK 0
00056
00067 void smtp_done(unsigned char error);
00068
00069 void smtp_init(void);
00070
00071 /* Functions. */
00072 void smtp_configure(char *localhostname, u16_t *smtpserver);
00073 unsigned char smtp_send(char *to, char *from,
00074                         char *subject, char *msg,
00075                         u16_t msglen);
00076 #define SMTP_SEND(to, cc, from, subject, msg) \
00077         smtp_send(to, cc, from, subject, msg, strlen(msg))
00078
00079 void smtp_appcall(void);
00080
00081 struct smtp_state {
00082   u8_t state;
00083   char *to;
00084   char *from;
00085   char *subject;
00086   char *msg;
00087   u16_t msglen;
00088
00089   u16_t sentlen, textlen;
00090   u16_t sendptr;
00091
00092 };
00093
00094
00095 #ifndef UIP_APPCALL
00096 #define UIP_APPCALL     smtp_appcall
00097 #endif
00098 typedef struct smtp_state uip_tcp_appstate_t;
00099
00100
00101 #endif /* __SMTP_H__ */
00102
Generated on Tue Jun 7 14:58:59 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/SPI/sc16is750_int/spi_interrupt_test.c Source File

C:/nxpdrv/LPC1700CMSIS/Examples/SPI/sc16is750_int/spi_interrupt_test.c

Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          spi_interrupt_test.c                                    2010-05-21
00003 */
00027 #include "lpc17xx_spi.h"
00028 #include "lpc17xx_libcfg.h"
00029 #include "lpc17xx_pinsel.h"
00030 #include "debug_frmwrk.h"
00031 #include "lpc17xx_gpio.h"
00032
00033 /* Example group ----------------------------------------------------------- */
00039 /************************** PRIVATE DEFINTIONS *********************/
00040 // PORT number that /CS pin assigned on
00041 #define CS_PORT_NUM             0
00042 // PIN number that  /CS pin assigned on
00043 #define CS_PIN_NUM              16
00044
00045 /* Idle char */
00046 #define IDLE_CHAR       0xFF
00047
00048 // Define macro used in command when using SPI with SC16IS740
00049 #define SC16IS740_WR_CMD(x)             ((uint8_t) (x << 3))
00050 #define SC16IS740_RD_CMD(x)             ((uint8_t) ((x << 3) | 0x80))
00051
00052 // Define register address of SC16IS740
00053 #define SC16IS740_IODIR_REG             0x0A
00054 #define SC16IS740_IOSTATE_REG   0x0B
00055 #define SC16IS740_IOCON_REG             0x0E
00056
00057 /************************** PRIVATE VARIABLES *************************/
00058 uint8_t menu1[] =
00059 "********************************************************************************\n\r"
00060 "Hello NXP Semiconductors \n\r"
00061 "SPI demo \n\r"
00062 "\t - MCU: LPC17xx \n\r"
00063 "\t - Core: ARM Cortex-M3 \n\r"
00064 "\t - Communicate via: UART0 - 115200bps \n\r"
00065 " Communicate with SPI function on SC16IS750/760 Demo Board\n\r"
00066 " Use IO function on SC16IS740/750/760 chip to turn ON/OFF LEDs\n\r"
00067 "Press '1' to turn ON LEDs, '2' to turn OFF LEDs \n\r"
00068 "********************************************************************************\n\r";
00069 uint8_t menu2[] = "Demo terminated! \n\r";
00070
00071 uint8_t iocon_cfg[2] = {SC16IS740_WR_CMD(SC16IS740_IOCON_REG), 0x00};
00072 uint8_t iodir_cfg[2] = {SC16IS740_WR_CMD(SC16IS740_IODIR_REG), 0xFF};
00073 uint8_t iostate_on[2] = {SC16IS740_WR_CMD(SC16IS740_IOSTATE_REG), 0x00};
00074 uint8_t iostate_off[2] = {SC16IS740_WR_CMD(SC16IS740_IOSTATE_REG), 0xFF};
00075 uint8_t spireadbuf[2];
00076
00077 /* Status Flag indicates current SPI transmission complete or not */
00078 __IO FlagStatus complete;
00079
00080 // SPI Configuration structure variable
00081 SPI_CFG_Type SPI_ConfigStruct;
00082 // SPI Data Setup structure variable
00083 SPI_DATA_SETUP_Type xferConfig;
00084
00085
00086 /************************** PRIVATE FUNCTIONS *************************/
00087 void SPI_IRQHandler(void);
00088
00089 void CS_Init(void);
00090 void CS_Force(int32_t state);
00091 void print_menu(void);
00092
00093 /*----------------- INTERRUPT SERVICE ROUTINES --------------------------*/
00094 /*********************************************************************/
00099 void SPI_IRQHandler(void)
00100 {
00101         SPI_DATA_SETUP_Type *xf_setup;
00102         uint16_t tmp;
00103         uint8_t dataword;
00104
00105         xf_setup = &xferConfig;
00106
00107         if(SPI_GetDataSize(LPC_SPI) == 8)
00108                 dataword = 0;
00109         else dataword = 1;
00110
00111         /* Dummy read to clear SPI interrupt flag */
00112         SPI_ClearIntPending(LPC_SPI);
00113
00114         // save status
00115         tmp = SPI_GetStatus(LPC_SPI);
00116         xf_setup->status = tmp;
00117         // Check for error
00118         if (tmp & (SPI_SPSR_ABRT | SPI_SPSR_MODF | SPI_SPSR_ROVR | SPI_SPSR_WCOL)){
00119                 xf_setup->status |= SPI_STAT_ERROR;
00120                 // Disable Interrupt and call call-back
00121                 SPI_IntCmd(LPC_SPI, DISABLE);
00122                 // Set Complete Flag
00123                 complete = SET;
00124                 return;
00125         }
00126
00127         /* Check SPI complete flag */
00128         if (tmp & SPI_SPSR_SPIF){
00129            // Read data from SPI data
00130                 tmp = SPI_ReceiveData(LPC_SPI);
00131                 if (xf_setup->rx_data != NULL)
00132                 {
00133                         if (dataword == 0){
00134                                 *(uint8_t *)((uint8_t *)(xf_setup->rx_data) + xf_setup->counter) = (uint8_t) tmp;
00135                         } else {
00136                                 *(uint16_t *)((uint8_t *)(xf_setup->rx_data) + xf_setup->counter) = (uint8_t) tmp;
00137                         }
00138                 }
00139                 // Increase counter
00140                 if (dataword == 0){
00141                         xf_setup->counter++;
00142                 } else {
00143                         xf_setup->counter += 2;
00144                 }
00145         }
00146
00147         if (xf_setup->counter < xf_setup->length){
00148                 // Write data to buffer
00149                 if(xf_setup->tx_data == NULL){
00150                         if (dataword == 0){
00151                                 SPI_SendData(LPC_SPI, 0xFF);
00152                         } else {
00153                                 SPI_SendData(LPC_SPI, 0xFFFF);
00154                         }
00155                 } else {
00156                         if (dataword == 0){
00157                                 SPI_SendData(LPC_SPI, (*(uint8_t *)((uint8_t *)(xf_setup->tx_data) + xf_setup->counter)));
00158                         } else {
00159                                 SPI_SendData(LPC_SPI, (*(uint16_t *)((uint8_t *)(xf_setup->tx_data) + xf_setup->counter)));
00160                         }
00161                 }
00162         }
00163         // No more data to send
00164         else {
00165                 xf_setup->status |= SPI_STAT_DONE;
00166                 // Disable Interrupt and call call-back
00167                 SPI_IntCmd(LPC_SPI, DISABLE);
00168                 // Set Complete Flag
00169                 complete = SET;
00170         }
00171 }
00172
00173 /*-------------------------PRIVATE FUNCTIONS------------------------------*/
00174 /*********************************************************************/
00180 void CS_Init(void)
00181 {
00182         GPIO_SetDir(CS_PORT_NUM, (1<<CS_PIN_NUM), 1);
00183         GPIO_SetValue(CS_PORT_NUM, (1<<CS_PIN_NUM));
00184 }
00185
00186
00187 /*********************************************************************/
00195 void CS_Force(int32_t state)
00196 {
00197         if (state){
00198                 GPIO_SetValue(CS_PORT_NUM, (1<<CS_PIN_NUM));
00199         }else{
00200                 GPIO_ClearValue(CS_PORT_NUM, (1<<CS_PIN_NUM));
00201         }
00202 }
00203
00204
00205 /*********************************************************************/
00210 void print_menu(void)
00211 {
00212         _DBG(menu1);
00213 }
00214
00215 /*-------------------------MAIN FUNCTION------------------------------*/
00216 /*********************************************************************/
00221 int c_entry(void)
00222 {
00223         uint8_t tmpchar[2] = {0, 0};
00224         PINSEL_CFG_Type PinCfg;
00225         __IO FlagStatus exitflag;
00226
00227         /*
00228          * Initialize SPI pin connect
00229          * P0.15 - SCK;
00230          * P0.16 - SSEL - used as GPIO
00231          * P0.17 - MISO
00232          * P0.18 - MOSI
00233          */
00234         PinCfg.Funcnum = 3;
00235         PinCfg.OpenDrain = 0;
00236         PinCfg.Pinmode = 0;
00237         PinCfg.Portnum = 0;
00238         PinCfg.Pinnum = 15;
00239         PINSEL_ConfigPin(&PinCfg);
00240         PinCfg.Pinnum = 17;
00241         PINSEL_ConfigPin(&PinCfg);
00242         PinCfg.Pinnum = 18;
00243         PINSEL_ConfigPin(&PinCfg);
00244         PinCfg.Pinnum = 16;
00245         PinCfg.Funcnum = 0;
00246         PINSEL_ConfigPin(&PinCfg);
00247
00248         /* Initialize debug via UART0
00249          * – 115200bps
00250          * – 8 data bit
00251          * – No parity
00252          * – 1 stop bit
00253          * – No flow control
00254          */
00255         debug_frmwrk_init();
00256
00257         // print welcome screen
00258         print_menu();
00259
00260         // initialize SPI configuration structure to default
00261         SPI_ConfigStructInit(&SPI_ConfigStruct);
00262         // Initialize SPI peripheral with parameter given in structure above
00263         SPI_Init(LPC_SPI, &SPI_ConfigStruct);
00264
00265         // Initialize /CS pin to GPIO function
00266         CS_Init();
00267
00268     /* preemption = 1, sub-priority = 1 */
00269     NVIC_SetPriority(SPI_IRQn, ((0x01<<3)|0x01));
00270     /* Enable SSP0 interrupt */
00271     NVIC_EnableIRQ(SPI_IRQn);
00272
00273         /* First, send some command to reset SC16IS740 chip via SPI bus interface
00274          * note driver /CS pin to low state before transferring by CS_Enable() function
00275          */
00276         complete = RESET;
00277         CS_Force(0);
00278         xferConfig.tx_data = iocon_cfg;
00279         xferConfig.rx_data = spireadbuf;
00280         xferConfig.length = sizeof (iocon_cfg);
00281         SPI_ReadWrite(LPC_SPI, &xferConfig, SPI_TRANSFER_INTERRUPT);
00282         while (complete == RESET);
00283         CS_Force(1);
00284
00285         complete = RESET;
00286         CS_Force(0);
00287         xferConfig.tx_data = iodir_cfg;
00288         xferConfig.rx_data = spireadbuf;
00289         xferConfig.length = sizeof (iodir_cfg);
00290         SPI_ReadWrite(LPC_SPI, &xferConfig, SPI_TRANSFER_INTERRUPT);
00291         while (complete == RESET);
00292         CS_Force(1);
00293
00294         // Reset exit flag
00295         exitflag = RESET;
00296
00297         // Start to use SPI polling mode
00298         /* Read some data from the buffer */
00299         while (exitflag == RESET)
00300         {
00301                 while((tmpchar[0] = _DG) == 0);
00302
00303                 if (tmpchar[0] == 27){
00304                         /* ESC key, set exit flag */
00305                         _DBG_(menu2);
00306                         exitflag = SET;
00307                 }
00308                 else if (tmpchar[0] == 'r'){
00309                         print_menu();
00310                 } else {
00311                         if (tmpchar[0] == '1')
00312                         {
00313                                 // LEDs are ON now...
00314                                 CS_Force(0);
00315                                 xferConfig.tx_data = iostate_on;
00316                                 xferConfig.rx_data = spireadbuf;
00317                                 xferConfig.length = sizeof (iostate_on);
00318                                 SPI_ReadWrite(LPC_SPI, &xferConfig, SPI_TRANSFER_POLLING);
00319                                 CS_Force(1);
00320                         }
00321                         else if (tmpchar[0] == '2')
00322                         {
00323                                 // LEDs are OFF now...
00324                                 CS_Force(0);
00325                                 xferConfig.tx_data = iostate_off;
00326                                 xferConfig.rx_data = spireadbuf;
00327                                 xferConfig.length = sizeof (iostate_off);
00328                                 SPI_ReadWrite(LPC_SPI, &xferConfig, SPI_TRANSFER_POLLING);
00329                                 CS_Force(1);
00330                         }
00331                         /* Then Echo it back */
00332                         _DBG_(tmpchar);
00333                 }
00334         }
00335     // DeInitialize UART0 peripheral
00336     SPI_DeInit(LPC_SPI);
00337     /* Loop forever */
00338     while(1);
00339     return 1;
00340 }
00341
00342 /* With ARM and GHS toolsets, the entry point is main() - this will
00343    allow the linker to generate wrapper code to setup stacks, allocate
00344    heap area, and initialize and copy code and data segments. For GNU
00345    toolsets, the entry point is through __start() in the crt0_gnu.asm
00346    file, and that startup code will setup stacks and data */
00347 int main(void)
00348 {
00349     return c_entry();
00350 }
00351
00352
00353 #ifdef  DEBUG
00354 /*******************************************************************************
00355 * @brief                Reports the name of the source file and the source line number
00356 *                               where the CHECK_PARAM error has occurred.
00357 * @param[in]    file Pointer to the source file name
00358 * @param[in]    line assert_param error line source number
00359 * @return               None
00360 *******************************************************************************/
00361 void check_failed(uint8_t *file, uint32_t line)
00362 {
00363         /* User can add his own implementation to report the file name and line number,
00364          ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
00365
00366         /* Infinite loop */
00367         while(1);
00368 }
00369 #endif
00370
00371 /*
00372  * @}
00373  */
Generated on Tue Jun 7 14:59:02 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/SPI/LoopBack/spi_loopback_test.c Source File

C:/nxpdrv/LPC1700CMSIS/Examples/SPI/LoopBack/spi_loopback_test.c

Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          spi_loopback_test.c                                     2010-05-21
00003 */
00026 #include "lpc17xx_spi.h"
00027 #include "lpc17xx_libcfg.h"
00028 #include "lpc17xx_pinsel.h"
00029 #include "debug_frmwrk.h"
00030 #include "lpc17xx_gpio.h"
00031
00032 /* Example group ----------------------------------------------------------- */
00039 /************************** PRIVATE DEFINITIONS *********************/
00040 // PORT number that /CS pin assigned on
00041 #define CS_PORT_NUM             0
00042 // PIN number that  /CS pin assigned on
00043 #define CS_PIN_NUM              16
00044 #define SPI_DATABIT_SIZE                10
00045
00046 #define BUFFER_SIZE                     0x40
00047
00048 /************************** PRIVATE VARIABLES *************************/
00049 uint8_t menu1[] =
00050 "********************************************************************************\n\r"
00051 "Hello NXP Semiconductors \n\r"
00052 "SPI demo \n\r"
00053 "\t - MCU: LPC17xx \n\r"
00054 "\t - Core: ARM Cortex-M3 \n\r"
00055 "\t - Communicate via: UART0 - 115200bps \n\r"
00056 "\t An example of SPI using polling mode with loop-back (MISO <-> MOSI) \n\r"
00057 "\t connection to test SPI driver \n\r"
00058 "********************************************************************************\n\r";
00059 uint8_t menu2[] = "Demo terminated! \n\r";
00060
00061 // SPI Configuration structure variable
00062 SPI_CFG_Type SPI_ConfigStruct;
00063
00064 #if (SPI_DATABIT_SIZE == 8)
00065 uint8_t Tx_Buf[BUFFER_SIZE];
00066 uint8_t Rx_Buf[BUFFER_SIZE];
00067 #else
00068 uint16_t Tx_Buf[BUFFER_SIZE];
00069 uint16_t Rx_Buf[BUFFER_SIZE];
00070 #endif
00071
00072 /************************** PRIVATE FUNCTIONS *************************/
00073 void print_menu(void);
00074 void Buffer_Init(void);
00075 void Error_Loop(void);
00076 void Buffer_Verify(void);
00077
00078 /*-------------------------PRIVATE FUNCTIONS------------------------------*/
00079 /*********************************************************************/
00084 void Buffer_Init(void)
00085 {
00086         uint8_t i;
00087 #if (SPI_DATABIT_SIZE == 8)
00088         for (i = 0; i < BUFFER_SIZE; i++) {
00089                 Tx_Buf[i] = i;
00090                 Rx_Buf[i] = 0;
00091         }
00092 #else
00093         for (i = 0; i < BUFFER_SIZE/2; i++) {
00094                 Tx_Buf[i] = i;
00095                 Rx_Buf[i] = 0;
00096         }
00097 #endif
00098 }
00099
00100 /*********************************************************************/
00105 void Error_Loop(void)
00106 {
00107         /* Loop forever */
00108         while (1);
00109 }
00110
00111 /*********************************************************************/
00116 void Buffer_Verify(void)
00117 {
00118         uint8_t i;
00119 #if (SPI_DATABIT_SIZE==8)
00120         uint8_t *src_addr = (uint8_t *) &Tx_Buf[0];
00121         uint8_t *dest_addr = (uint8_t *) &Rx_Buf[0];
00122         for ( i = 0; i < SPI_DATABIT_SIZE; i++ )
00123         {
00124                 if ( *src_addr++ != *dest_addr++ )
00125                 {
00126                         /* Call Error Loop */
00127                         _DBG_("Verify error");
00128                         Error_Loop();
00129                 }
00130         }
00131 #else
00132         uint16_t *src_addr = (uint16_t *) &Tx_Buf[0];
00133         uint16_t *dest_addr = (uint16_t *) &Rx_Buf[0];
00134         for ( i = 0; i < SPI_DATABIT_SIZE/2; i++ )
00135         {
00136                 if ( *src_addr++ != *dest_addr++ )
00137                 {
00138                         /* Call Error Loop */
00139                         _DBG_("Verify error");
00140                         Error_Loop();
00141                 }
00142         }
00143 #endif
00144
00145 }
00146
00147 /*********************************************************************/
00152 void print_menu(void)
00153 {
00154         _DBG(menu1);
00155 }
00156
00157 /*-------------------------MAIN FUNCTION------------------------------*/
00158 /*********************************************************************/
00163 int c_entry(void)
00164 {
00165         PINSEL_CFG_Type PinCfg;
00166         SPI_DATA_SETUP_Type xferConfig;
00167
00168         /*
00169          * Initialize SPI pin connect
00170          * P0.15 - SCK;
00171          * P0.16 - SSEL - used as GPIO
00172          * P0.17 - MISO
00173          * P0.18 - MOSI
00174          */
00175         PinCfg.Funcnum = 3;
00176         PinCfg.OpenDrain = 0;
00177         PinCfg.Pinmode = 0;
00178         PinCfg.Portnum = 0;
00179         PinCfg.Pinnum = 15;
00180         PINSEL_ConfigPin(&PinCfg);
00181         PinCfg.Pinnum = 17;
00182         PINSEL_ConfigPin(&PinCfg);
00183         PinCfg.Pinnum = 18;
00184         PINSEL_ConfigPin(&PinCfg);
00185         PinCfg.Pinnum = 16;
00186         PinCfg.Funcnum = 0;
00187         PINSEL_ConfigPin(&PinCfg);
00188
00189         /* Initialize debug via UART0
00190          * – 115200bps
00191          * – 8 data bit
00192          * – No parity
00193          * – 1 stop bit
00194          * – No flow control
00195          */
00196         debug_frmwrk_init();
00197
00198         // print welcome screen
00199         print_menu();
00200
00201         SPI_ConfigStruct.CPHA = SPI_CPHA_SECOND;
00202         SPI_ConfigStruct.CPOL = SPI_CPOL_LO;
00203         SPI_ConfigStruct.ClockRate = 2000000;
00204         SPI_ConfigStruct.DataOrder = SPI_DATA_MSB_FIRST;
00205         SPI_ConfigStruct.Databit = SPI_DATABIT_SIZE;
00206         SPI_ConfigStruct.Mode = SPI_MASTER_MODE;
00207         // Initialize SPI peripheral with parameter given in structure above
00208         SPI_Init(LPC_SPI, &SPI_ConfigStruct);
00209
00210         /* Initialize Buffer */
00211         Buffer_Init();
00212
00213         xferConfig.tx_data = Tx_Buf;
00214         xferConfig.rx_data = Rx_Buf;
00215         xferConfig.length = BUFFER_SIZE;
00216         SPI_ReadWrite(LPC_SPI, &xferConfig, SPI_TRANSFER_POLLING);
00217
00218         // Verify buffer after transferring
00219         Buffer_Verify();
00220
00221         _DBG_("Verify complete");
00222
00223         SPI_DeInit(LPC_SPI);
00224     /* Loop forever */
00225     while(1);
00226     return 1;
00227 }
00228
00229 /* With ARM and GHS toolsets, the entry point is main() - this will
00230    allow the linker to generate wrapper code to setup stacks, allocate
00231    heap area, and initialize and copy code and data segments. For GNU
00232    toolsets, the entry point is through __start() in the crt0_gnu.asm
00233    file, and that startup code will setup stacks and data */
00234 int main(void)
00235 {
00236     return c_entry();
00237 }
00238
00239
00240 #ifdef  DEBUG
00241 /*******************************************************************************
00242 * @brief                Reports the name of the source file and the source line number
00243 *                               where the CHECK_PARAM error has occurred.
00244 * @param[in]    file Pointer to the source file name
00245 * @param[in]    line assert_param error line source number
00246 * @return               None
00247 *******************************************************************************/
00248 void check_failed(uint8_t *file, uint32_t line)
00249 {
00250         /* User can add his own implementation to report the file name and line number,
00251          ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
00252
00253         /* Infinite loop */
00254         while(1);
00255 }
00256 #endif
00257
00258 /*
00259  * @}
00260  */
Generated on Tue Jun 7 14:59:02 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/SPI/Master/spi_master.c Source File

C:/nxpdrv/LPC1700CMSIS/Examples/SPI/Master/spi_master.c

Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          spi_master.c                                    2010-05-21
00003 */
00025 #include "lpc17xx_spi.h"
00026 #include "lpc17xx_libcfg.h"
00027 #include "lpc17xx_pinsel.h"
00028 #include "debug_frmwrk.h"
00029 #include "lpc17xx_gpio.h"
00030
00031 /* Example group ----------------------------------------------------------- */
00037 /************************** PRIVATE DEFINITIONS *********************/
00038 // PORT number that /CS pin assigned on
00039 #define CS_PORT_NUM             0
00040 // PIN number that  /CS pin assigned on
00041 #define CS_PIN_NUM              16
00042 #define SPI_DATABIT_SIZE                10
00043
00045 #define BUFFER_SIZE                     0x40
00046
00047 /************************** PRIVATE VARIABLES *************************/
00048 uint8_t menu1[] =
00049 "********************************************************************************\n\r"
00050 "Hello NXP Semiconductors \n\r"
00051 "SPI demo \n\r"
00052 "\t - MCU: LPC17xx \n\r"
00053 "\t - Core: ARM Cortex-M3 \n\r"
00054 "\t - Communicate via: UART0 - 115200bps \n\r"
00055 "\t An example of SPI using interrupt mode to test the SPI driver \n\r"
00056 " This example uses SPI in master mode to communicate with SPI slave device \n\r"
00057 " The master and slave transfer together a number of data byte \n\r"
00058 "********************************************************************************\n\r";
00059 uint8_t menu2[] = "Demo terminated! \n\r";
00060
00061 // SPI Configuration structure variable
00062 SPI_CFG_Type SPI_ConfigStruct;
00063
00064 #if (SPI_DATABIT_SIZE == 8)
00065 uint8_t Tx_Buf[BUFFER_SIZE];
00066 uint8_t Rx_Buf[BUFFER_SIZE];
00067 #else
00068 uint16_t Tx_Buf[BUFFER_SIZE];
00069 uint16_t Rx_Buf[BUFFER_SIZE];
00070 #endif
00071
00072 /************************** PRIVATE FUNCTIONS *************************/
00073 void CS_Init(void);
00074 void CS_Force(int32_t state);
00075 void print_menu(void);
00076 void Buffer_Init(void);
00077 void Error_Loop(void);
00078 void Buffer_Verify(void);
00079
00080 /*-------------------------PRIVATE FUNCTIONS------------------------------*/
00081 /*********************************************************************/
00087 void CS_Init(void)
00088 {
00089         GPIO_SetDir(CS_PORT_NUM, (1<<CS_PIN_NUM), 1);
00090         GPIO_SetValue(CS_PORT_NUM, (1<<CS_PIN_NUM));
00091 }
00092
00093
00094 /*********************************************************************/
00102 void CS_Force(int32_t state)
00103 {
00104         if (state){
00105                 GPIO_SetValue(CS_PORT_NUM, (1<<CS_PIN_NUM));
00106         }else{
00107                 GPIO_ClearValue(CS_PORT_NUM, (1<<CS_PIN_NUM));
00108         }
00109 }
00110
00111 /*********************************************************************/
00116 void Buffer_Init(void)
00117 {
00118         uint8_t i;
00119 #if (SPI_DATABIT_SIZE == 8)
00120         for (i = 0; i < BUFFER_SIZE; i++) {
00121                 Tx_Buf[i] = i;
00122                 Rx_Buf[i] = 0;
00123         }
00124 #else
00125         for (i = 0; i < BUFFER_SIZE/2; i++) {
00126                 Tx_Buf[i] = i;
00127                 Rx_Buf[i] = 0;
00128         }
00129 #endif
00130 }
00131
00132 /*********************************************************************/
00137 void Error_Loop(void)
00138 {
00139         /* Loop forever */
00140         while (1);
00141 }
00142
00143 /*********************************************************************/
00148 void Buffer_Verify(void)
00149 {
00150         uint8_t i;
00151 #if (DATA_SIZE==8)
00152         uint8_t *src_addr = (uint8_t *) &Tx_Buf[0];
00153         uint8_t *dest_addr = (uint8_t *) &Rx_Buf[0];
00154         for ( i = 0; i < SPI_DATABIT_SIZE; i++ )
00155         {
00156                 if ( *src_addr++ != *dest_addr++ )
00157                 {
00158                         /* Call Error Loop */
00159                         _DBG_("Verify error");
00160                         Error_Loop();
00161                 }
00162         }
00163 #else
00164         uint16_t *src_addr = (uint16_t *) &Tx_Buf[0];
00165         uint16_t *dest_addr = (uint16_t *) &Rx_Buf[0];
00166         for ( i = 0; i < SPI_DATABIT_SIZE/2; i++ )
00167         {
00168                 if ( *src_addr++ != *dest_addr++ )
00169                 {
00170                         /* Call Error Loop */
00171                         _DBG_("Verify error");
00172                         Error_Loop();
00173                 }
00174         }
00175 #endif
00176 }
00177
00178 /*********************************************************************/
00183 void print_menu(void)
00184 {
00185         _DBG(menu1);
00186 }
00187
00188 /*-------------------------MAIN FUNCTION------------------------------*/
00189 /*********************************************************************/
00194 int c_entry(void)
00195 {
00196         PINSEL_CFG_Type PinCfg;
00197         SPI_DATA_SETUP_Type xferConfig;
00198         uint32_t tmp;
00199
00200         /*
00201          * Initialize SPI pin connect
00202          * P0.15 - SCK;
00203          * P0.16 - SSEL - used as GPIO
00204          * P0.17 - MISO
00205          * P0.18 - MOSI
00206          */
00207         PinCfg.Funcnum = 3;
00208         PinCfg.OpenDrain = 0;
00209         PinCfg.Pinmode = 0;
00210         PinCfg.Portnum = 0;
00211         PinCfg.Pinnum = 15;
00212         PINSEL_ConfigPin(&PinCfg);
00213         PinCfg.Pinnum = 17;
00214         PINSEL_ConfigPin(&PinCfg);
00215         PinCfg.Pinnum = 18;
00216         PINSEL_ConfigPin(&PinCfg);
00217         PinCfg.Pinnum = 16;
00218         PinCfg.Funcnum = 0;
00219         PINSEL_ConfigPin(&PinCfg);
00220
00221         /* Initialize debug via UART0
00222          * – 115200bps
00223          * – 8 data bit
00224          * – No parity
00225          * – 1 stop bit
00226          * – No flow control
00227          */
00228         debug_frmwrk_init();
00229
00230         // print welcome screen
00231         print_menu();
00232
00233         SPI_ConfigStruct.CPHA = SPI_CPHA_SECOND;
00234         SPI_ConfigStruct.CPOL = SPI_CPOL_LO;
00235         SPI_ConfigStruct.ClockRate = 2000000;
00236         SPI_ConfigStruct.DataOrder = SPI_DATA_MSB_FIRST;
00237         SPI_ConfigStruct.Databit = SPI_DATABIT_SIZE;
00238         SPI_ConfigStruct.Mode = SPI_MASTER_MODE;
00239         // Initialize SPI peripheral with parameter given in structure above
00240         SPI_Init(LPC_SPI, &SPI_ConfigStruct);
00241
00242         _DBG_("Press '1' to start transfer...");
00243
00244         while (_DG != '1');
00245
00246         _DBG_("Init buffer");
00247         /* Initialize Buffer */
00248         Buffer_Init();
00249
00250         CS_Init();
00251
00252         _DBG_("Start transfer...");
00253         CS_Force(0);
00254         // delay for a while
00255         for (tmp = 10000; tmp; tmp--);
00256         xferConfig.tx_data = Tx_Buf;
00257         xferConfig.rx_data = Rx_Buf;
00258         xferConfig.length = BUFFER_SIZE;
00259         SPI_ReadWrite(LPC_SPI, &xferConfig, SPI_TRANSFER_POLLING);
00260         // delay for a while
00261         for (tmp = 10000; tmp; tmp--);
00262         CS_Force(1);
00263         _DBG_("Complete!");
00264
00265         // Verify buffer after transferring
00266         Buffer_Verify();
00267         _DBG_("Verify complete!");
00268         SPI_DeInit(LPC_SPI);
00269     /* Loop forever */
00270     while(1);
00271     return 1;
00272 }
00273
00274 /* With ARM and GHS toolsets, the entry point is main() - this will
00275    allow the linker to generate wrapper code to setup stacks, allocate
00276    heap area, and initialize and copy code and data segments. For GNU
00277    toolsets, the entry point is through __start() in the crt0_gnu.asm
00278    file, and that startup code will setup stacks and data */
00279 int main(void)
00280 {
00281     return c_entry();
00282 }
00283
00284
00285 #ifdef  DEBUG
00286 /*******************************************************************************
00287 * @brief                Reports the name of the source file and the source line number
00288 *                               where the CHECK_PARAM error has occurred.
00289 * @param[in]    file Pointer to the source file name
00290 * @param[in]    line assert_param error line source number
00291 * @return               None
00292 *******************************************************************************/
00293 void check_failed(uint8_t *file, uint32_t line)
00294 {
00295         /* User can add his own implementation to report the file name and line number,
00296          ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
00297
00298         /* Infinite loop */
00299         while(1);
00300 }
00301 #endif
00302
00303 /*
00304  * @}
00305  */
Generated on Tue Jun 7 14:59:02 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/SPI/sc16is750_polling/spi_polling_test.c Source File

C:/nxpdrv/LPC1700CMSIS/Examples/SPI/sc16is750_polling/spi_polling_test.c

Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          spi_polling_test.c                                      2010-05-21
00003 */
00027 #include "lpc17xx_spi.h"
00028 #include "lpc17xx_libcfg.h"
00029 #include "lpc17xx_pinsel.h"
00030 #include "debug_frmwrk.h"
00031 #include "lpc17xx_gpio.h"
00032
00033 /* Example group ----------------------------------------------------------- */
00040 /************************** PRIVATE DEFINITONS **********************/
00041 // PORT number that /CS pin assigned on
00042 #define CS_PORT_NUM             0
00043 // PIN number that  /CS pin assigned on
00044 #define CS_PIN_NUM              16
00045
00046 // Define macro used in command when using SPI with SC16IS740
00047 #define SC16IS740_WR_CMD(x)             ((uint8_t) (x << 3))
00048 #define SC16IS740_RD_CMD(x)             ((uint8_t) ((x << 3) | 0x80))
00049
00050 // Define register address of SC16IS740
00051 #define SC16IS740_IODIR_REG             0x0A
00052 #define SC16IS740_IOSTATE_REG   0x0B
00053 #define SC16IS740_IOCON_REG             0x0E
00054
00055
00056 /************************** PRIVATE VARIABLES *************************/
00057 uint8_t menu1[] =
00058 "********************************************************************************\n\r"
00059 "Hello NXP Semiconductors \n\r"
00060 "SPI demo \n\r"
00061 "\t - MCU: LPC17xx \n\r"
00062 "\t - Core: ARM Cortex-M3 \n\r"
00063 "\t - Communicate via: UART0 - 115200 kbps \n\r"
00064 " Communicate with SPI function on SC16IS750/760 Demo Board\n\r"
00065 " Use IO function on SC16IS740/750/760 chip to turn ON/OFF LEDs\n\r"
00066 "Press '1' to turn ON LEDs, '2' to turn OFF LEDs \n\r"
00067 "********************************************************************************\n\r";
00068 uint8_t menu2[] = "Demo terminated! \n\r";
00069
00070 // SPI Configuration structure variable
00071 SPI_CFG_Type SPI_ConfigStruct;
00072
00073 uint8_t iocon_cfg[2] = {SC16IS740_WR_CMD(SC16IS740_IOCON_REG), 0x00};
00074 uint8_t iodir_cfg[2] = {SC16IS740_WR_CMD(SC16IS740_IODIR_REG), 0xFF};
00075 uint8_t iostate_on[2] = {SC16IS740_WR_CMD(SC16IS740_IOSTATE_REG), 0x00};
00076 uint8_t iostate_off[2] = {SC16IS740_WR_CMD(SC16IS740_IOSTATE_REG), 0xFF};
00077 uint8_t spireadbuf[2];
00078
00079
00080 /************************** PRIVATE FUNCTIONS *************************/
00081 void CS_Init(void);
00082 void CS_Force(int32_t state);
00083 void print_menu(void);
00084
00085 /*-------------------------PRIVATE FUNCTIONS------------------------------*/
00086 /*********************************************************************/
00092 void CS_Init(void)
00093 {
00094         GPIO_SetDir(CS_PORT_NUM, (1<<CS_PIN_NUM), 1);
00095         GPIO_SetValue(CS_PORT_NUM, (1<<CS_PIN_NUM));
00096 }
00097
00098
00099 /*********************************************************************/
00107 void CS_Force(int32_t state)
00108 {
00109         if (state){
00110                 GPIO_SetValue(CS_PORT_NUM, (1<<CS_PIN_NUM));
00111         }else{
00112                 GPIO_ClearValue(CS_PORT_NUM, (1<<CS_PIN_NUM));
00113         }
00114 }
00115
00116
00117 /*********************************************************************/
00122 void print_menu(void)
00123 {
00124         _DBG(menu1);
00125 }
00126
00127
00128 /*-------------------------MAIN FUNCTION------------------------------*/
00129 /*********************************************************************/
00134 int c_entry(void)
00135 {
00136         uint8_t tmpchar[2] = {0, 0};
00137         PINSEL_CFG_Type PinCfg;
00138         __IO FlagStatus exitflag;
00139         SPI_DATA_SETUP_Type xferConfig;
00140
00141         /*
00142          * Initialize SPI pin connect
00143          * P0.15 - SCK;
00144          * P0.16 - SSEL - used as GPIO
00145          * P0.17 - MISO
00146          * P0.18 - MOSI
00147          */
00148         PinCfg.Funcnum = 3;
00149         PinCfg.OpenDrain = 0;
00150         PinCfg.Pinmode = 0;
00151         PinCfg.Portnum = 0;
00152         PinCfg.Pinnum = 15;
00153         PINSEL_ConfigPin(&PinCfg);
00154         PinCfg.Pinnum = 17;
00155         PINSEL_ConfigPin(&PinCfg);
00156         PinCfg.Pinnum = 18;
00157         PINSEL_ConfigPin(&PinCfg);
00158         PinCfg.Pinnum = 16;
00159         PinCfg.Funcnum = 0;
00160         PINSEL_ConfigPin(&PinCfg);
00161
00162         /* Initialize debug via UART0
00163          * – 115200bps
00164          * – 8 data bit
00165          * – No parity
00166          * – 1 stop bit
00167          * – No flow control
00168          */
00169         debug_frmwrk_init();
00170
00171         // print welcome screen
00172         print_menu();
00173
00174         // initialize SPI configuration structure to default
00175         SPI_ConfigStructInit(&SPI_ConfigStruct);
00176         // Initialize SPI peripheral with parameter given in structure above
00177         SPI_Init(LPC_SPI, &SPI_ConfigStruct);
00178
00179         // Initialize /CS pin to GPIO function
00180         CS_Init();
00181
00182         /* First, send some command to reset SC16IS740 chip via SPI bus interface
00183          * note driver /CS pin to low state before transferring by CS_Enable() function
00184          */
00185         CS_Force(0);
00186         xferConfig.tx_data = iocon_cfg;
00187         xferConfig.rx_data = spireadbuf;
00188         xferConfig.length = sizeof (iocon_cfg);
00189         SPI_ReadWrite(LPC_SPI, &xferConfig, SPI_TRANSFER_POLLING);
00190         CS_Force(1);
00191         CS_Force(0);
00192         xferConfig.tx_data = iodir_cfg;
00193         xferConfig.rx_data = spireadbuf;
00194         xferConfig.length = sizeof (iodir_cfg);
00195         SPI_ReadWrite(LPC_SPI, &xferConfig, SPI_TRANSFER_POLLING);
00196         CS_Force(1);
00197
00198         // Reset exit flag
00199         exitflag = RESET;
00200
00201     /* Read some data from the buffer */
00202     while (exitflag == RESET)
00203     {
00204         while((tmpchar[0] = _DG) == 0);
00205
00206         if (tmpchar[0] == 27){
00207                         /* ESC key, set exit flag */
00208                         _DBG_(menu2);
00209                         exitflag = SET;
00210                 }
00211                 else if (tmpchar[0] == 'r'){
00212                         print_menu();
00213                 } else {
00214                         if (tmpchar[0] == '1')
00215                         {
00216                                 // LEDs are ON now...
00217                                 CS_Force(0);
00218                                 xferConfig.tx_data = iostate_on;
00219                                 xferConfig.rx_data = spireadbuf;
00220                                 xferConfig.length = sizeof (iostate_on);
00221                                 SPI_ReadWrite(LPC_SPI, &xferConfig, SPI_TRANSFER_POLLING);
00222                                 CS_Force(1);
00223                         }
00224                         else if (tmpchar[0] == '2')
00225                         {
00226                                 // LEDs are OFF now...
00227                                 CS_Force(0);
00228                                 xferConfig.tx_data = iostate_off;
00229                                 xferConfig.rx_data = spireadbuf;
00230                                 xferConfig.length = sizeof (iostate_off);
00231                                 SPI_ReadWrite(LPC_SPI, &xferConfig, SPI_TRANSFER_POLLING);
00232                                 CS_Force(1);
00233                         }
00234                         /* Then Echo it back */
00235                         _DBG_(tmpchar);
00236                 }
00237     }
00238     SPI_DeInit(LPC_SPI);
00239     /* Loop forever */
00240     while(1);
00241     return 1;
00242 }
00243
00244 /* With ARM and GHS toolsets, the entry point is main() - this will
00245    allow the linker to generate wrapper code to setup stacks, allocate
00246    heap area, and initialize and copy code and data segments. For GNU
00247    toolsets, the entry point is through __start() in the crt0_gnu.asm
00248    file, and that startup code will setup stacks and data */
00249 int main(void)
00250 {
00251     return c_entry();
00252 }
00253
00254
00255 #ifdef  DEBUG
00256 /*******************************************************************************
00257 * @brief                Reports the name of the source file and the source line number
00258 *                               where the CHECK_PARAM error has occurred.
00259 * @param[in]    file Pointer to the source file name
00260 * @param[in]    line assert_param error line source number
00261 * @return               None
00262 *******************************************************************************/
00263 void check_failed(uint8_t *file, uint32_t line)
00264 {
00265         /* User can add his own implementation to report the file name and line number,
00266          ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
00267
00268         /* Infinite loop */
00269         while(1);
00270 }
00271 #endif
00272
00273 /*
00274  * @}
00275  */
Generated on Tue Jun 7 14:59:02 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/SPI/SDCard/spi_sdcard.c Source File

C:/nxpdrv/LPC1700CMSIS/Examples/SPI/SDCard/spi_sdcard.c

Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          spi_sdcard.c                                    2010-07-16
00003 */
00025 #include "lpc17xx_spi.h"
00026 #include "lpc17xx_libcfg.h"
00027 #include "lpc17xx_pinsel.h"
00028 #include "debug_frmwrk.h"
00029 #include "lpc17xx_gpio.h"
00030
00031 /* Example group ----------------------------------------------------------- */
00037 /************************** PRIVATE DEFINTIONS *********************/
00038 // PORT number that /CS pin assigned on
00039 #define CS_PORT_NUM             0
00040 // PIN number that  /CS pin assigned on
00041 #define CS_PIN_NUM              16
00042
00043 #define SD_DETECT_PORTNUM       4
00044 #define SD_DETECT_PINNUM        29
00045 typedef enum _sd_connect_status
00046 {
00047         SD_CONNECTED,
00048         SD_DISCONNECTED
00049 }sd_connect_status;
00050 typedef enum _sd_error
00051 {
00052         SD_OK,
00053         SD_NG,
00054         SD_CMD_BAD_PARAMETER,
00055         SD_ERROR_TOKEN,
00056         SD_ERROR_TIMEOUT,
00057         SD_ERROR_BUS_NOT_IDLE,
00058         SD_ERROR_CMD0,
00059         SD_ERROR_CMD55,
00060         SD_ERROR_ACMD41,
00061         SD_ERROR_CMD59
00062 }sd_error;
00063
00064 //SD command code
00065 #define         CMD0_GO_IDLE_STATE            0x00
00066 #define         CMD1_SEND_OPCOND              0x01
00067 #define         CMD9_SEND_CSD                 0x09
00068 #define         CMD10_SEND_CID                0x0a
00069 #define         CMD12_STOP_TRANSMISSION       0x0b
00070 #define         CMD13_SEND_STATUS             0x0c
00071 #define         CMD16_SET_BLOCKLEN            0x10
00072 #define         CMD17_READ_SINGLE_BLOCK       0x11
00073 #define         CMD18_READ_MULTIPLE_BLOCK     0x12
00074 #define         CMD24_WRITE_BLOCK             0x18
00075 #define         CMD25_WRITE_MULTIPLE_BLOCK    0x19
00076 #define         CMD27_PROGRAM_CSD             0x1b
00077 #define         CMD28_SET_WRITE_PROT          0x1c
00078 #define         CMD29_CLR_WRITE_PROT          0x1d
00079 #define         CMD30_SEND_WRITE_PROT         0x1e
00080 #define         CMD32_ERASE_WR_BLK_START_ADDR 0x20
00081 #define         CMD33_ERASE_WR_BLK_END_ADDR   0x21
00082 #define         CMD38_ERASE                   0x26
00083 #define         CMD55_APP_CMD                 0x37
00084 #define         CMD56_GEN_CMD                 0x38
00085 #define         CMD58_READ_OCR                0x3a
00086 #define         CMD59_CRC_ON_OFF              0x3b
00087 /* Application-specific commands (always prefixed with CMD55_APP_CMD) */
00088 #define         ACMD13_SD_STATUS              0x0d
00089 #define         ACMD22_SEND_NUM_WR_BLOCKS     0x16
00090 #define         ACMD23_SET_WR_BLK_ERASE_COUNT 0x17
00091 #define         ACMD41_SEND_OP_COND           0x29
00092 #define         ACMD42_SET_CLR_CARD_DETECT    0x2a
00093 #define         ACMD51_SEND_SCR               0x33
00094 /* R1 format responses (ORed together as a bit-field) */
00095 #define         R1_NOERROR                                0x00
00096 #define         R1_IDLE                                   0x01
00097 #define         R1_ERASE                                  0x02
00098 #define         R1_ILLEGAL                                0x04
00099 #define         R1_CRC_ERR                                0x08
00100 #define         R1_ERASE_SEQ                              0x10
00101 #define         R1_ADDR_ERR                               0x20
00102 #define         R1_PARAM_ERR                              0x40
00103 /* R2 format responses - second byte only, first is identical to R1 */
00104 #define         R2_LOCKED                                 0x01
00105 #define         R2_WP_FAILED                              0x02
00106 #define         R2_ERROR                                  0x04
00107 #define         R2_CTRL_ERR                               0x08
00108 #define         R2_ECC_FAIL                               0x10
00109 #define         R2_WP_VIOL                                0x20
00110 #define         R2_ERASE_PARAM                            0x40
00111 #define         R2_RANGE_ERR                              0x80
00112
00113 #define GETBIT(in, bit) ((in & (1<<bit)) >> bit)
00114 #define SD_CMD_BLOCK_LENGTH             6
00115 #define SD_DATA_BLOCK_LENGTH    515
00116 #define SD_WAIT_R1_TIMEOUT              100000
00117 /************************** PRIVATE VARIABLES *************************/
00118 uint8_t menu1[] =
00119 "********************************************************************************\n\r"
00120 "Hello NXP Semiconductors \n\r"
00121 "SPI communicate with SD card demo \n\r"
00122 "\t - MCU: LPC17xx \n\r"
00123 "\t - Core: ARM Cortex-M3 \n\r"
00124 "\t - Communicate via: UART0 - 115200bps \n\r"
00125 " Demo SPI module, read SD card's CID register and display via UART0\n\r"
00126 "********************************************************************************\n\r";
00127 // SPI Configuration structure variable
00128 SPI_CFG_Type SPI_ConfigStruct;
00129 // SPI Data Setup structure variable
00130 SPI_DATA_SETUP_Type xferConfig;
00131
00132 uint8_t sd_cmd_buf[SD_CMD_BLOCK_LENGTH];
00133 uint8_t sd_data_buf[SD_DATA_BLOCK_LENGTH];
00134 /************************** PRIVATE FUNCTIONS *************************/
00135 void CS_Init(void);
00136 void CS_Force(int32_t state);
00137 void print_menu(void);
00138 sd_connect_status SD_GetCardConnectStatus(void);
00139 uint8_t crc_7(uint8_t old_crc, uint8_t data);
00140 uint8_t crc_7final(uint8_t old_crc);
00141 uint32_t SD_SendReceiveData_Polling(void* tx_buf, void* rx_buf, uint32_t length);
00142 void SD_SendCommand(uint8_t cmd, uint8_t *arg);
00143 sd_error SD_WaitR1(uint8_t *buffer, uint32_t length, uint32_t timeout);
00144 sd_error SD_WaitDeviceIdle(uint32_t num_char);
00145 sd_error SD_Init(uint8_t retries);
00146 sd_error SD_GetCID(void);
00147 /*----------------- INTERRUPT SERVICE ROUTINES --------------------------*/
00148
00149 /*-------------------------PRIVATE FUNCTIONS------------------------------*/
00150
00151 /*********************************************************************/
00157 void CS_Init(void)
00158 {
00159         GPIO_SetDir(CS_PORT_NUM, (1<<CS_PIN_NUM), 1);
00160         GPIO_SetValue(CS_PORT_NUM, (1<<CS_PIN_NUM));
00161 }
00162 /*********************************************************************/
00170 void CS_Force(int32_t state)
00171 {
00172         if (state){
00173                 GPIO_SetValue(CS_PORT_NUM, (1<<CS_PIN_NUM));
00174         }else{
00175                 GPIO_ClearValue(CS_PORT_NUM, (1<<CS_PIN_NUM));
00176         }
00177 }
00178 /*********************************************************************/
00183 void print_menu(void)
00184 {
00185         _DBG(menu1);
00186 }
00187 /*********************************************************************/
00192 sd_connect_status SD_GetCardConnectStatus(void)
00193 {
00194         sd_connect_status ret=SD_DISCONNECTED;
00195
00196         if((GPIO_ReadValue(SD_DETECT_PORTNUM)&(1<<SD_DETECT_PINNUM))== 0)
00197                 ret = SD_CONNECTED;
00198
00199         return ret;
00200 }
00201 /*********************************************************************/
00208 uint8_t crc_7(uint8_t old_crc, uint8_t data)
00209 {
00210   uint8_t new_crc,x;
00211
00212   new_crc = old_crc;
00213   for (x = 7; x >= 0; x--) {
00214     new_crc <<= 1;
00215     new_crc |= GETBIT(data,x);
00216     if (GETBIT(new_crc, 7) == 1) {
00217       new_crc ^= 0x89; /*CRC-7's polynomial is x^7 + x^3 + 1*/
00218     }
00219     if(x==0) break;
00220   }
00221   return new_crc;
00222 }
00223 /*********************************************************************/
00228 uint8_t crc_7final(uint8_t old_crc)
00229 {
00230   uint8_t new_crc,x;
00231
00232   new_crc = old_crc;
00233   for (x = 0; x < 7; x++) {
00234     new_crc <<= 1;
00235     if (GETBIT(new_crc, 7) == 1) {
00236       new_crc ^= 0x89; /*CRC-7's polynomial is x^7 + x^3 + 1*/
00237     }
00238   }
00239   return new_crc;
00240 }
00241 /*********************************************************************/
00250 uint32_t SD_SendReceiveData_Polling(void* tx_buf, void* rx_buf, uint32_t length)
00251 {
00252         //uint16_t i;
00253
00254         CS_Force(0);
00255         //for(i=0;i<1000;i++);
00256
00257         xferConfig.tx_data = tx_buf;
00258         xferConfig.rx_data = rx_buf;
00259         xferConfig.length = length;
00260         SPI_ReadWrite(LPC_SPI, &xferConfig, SPI_TRANSFER_POLLING);
00261
00262         //for(i=0;i<1000;i++);
00263         CS_Force(1);
00264         return xferConfig.counter;
00265 }
00266 /*********************************************************************/
00272 void SD_SendCommand(uint8_t cmd, uint8_t *arg)
00273 {
00274         uint8_t crc = 0x00;
00275
00276         /* First byte has framing bits and command */
00277         sd_cmd_buf[0] = 0x40 | (cmd & 0x3f);
00278         sd_cmd_buf[1] = arg[0];
00279         sd_cmd_buf[2] = arg[1];
00280         sd_cmd_buf[3] = arg[2];
00281         sd_cmd_buf[4] = arg[3];
00282         //calculate CRC
00283         crc = crc_7(crc, sd_cmd_buf[0]);//start new crc-7
00284         crc = crc_7(crc, sd_cmd_buf[1]);
00285         crc = crc_7(crc, sd_cmd_buf[2]);
00286         crc = crc_7(crc, sd_cmd_buf[3]);
00287         crc = crc_7(crc, sd_cmd_buf[4]);
00288         crc = crc_7final(crc);
00289         sd_cmd_buf[5] = (crc << 1) | 0x01;//stop bit
00290
00291         SD_SendReceiveData_Polling(sd_cmd_buf,NULL,SD_CMD_BLOCK_LENGTH);
00292 }
00293 /*********************************************************************/
00301 sd_error SD_WaitR1(uint8_t *buffer, uint32_t length, uint32_t timeout)
00302 {
00303     uint32_t j;
00304         uint8_t dummy[2];
00305         uint8_t wait_idle;
00306
00307         /* No null pointers allowed */
00308         if (buffer == NULL)     return SD_CMD_BAD_PARAMETER;
00309
00310         /* Wait for start bit on R1 */
00311         j=0;dummy[0]=0xFF;
00312         while (GETBIT(dummy[0],7) == 1)
00313         {
00314                 if (j>timeout)return SD_ERROR_TIMEOUT;
00315                 dummy[0]=0x00;
00316                 SD_SendReceiveData_Polling(NULL,dummy,1);
00317                 j++;
00318         }
00319         *buffer=dummy[0];//store R1
00320         if (length > 0)//read followed data
00321         {
00322                 /* Wait for start token on data portion, if any */
00323                 dummy[0] = 0xff;j = 0;
00324                 while (dummy[0] != 0xfe)
00325                 {
00326                         if (j > timeout)return SD_ERROR_TIMEOUT;
00327                         dummy[0]=0x00;
00328                         SD_SendReceiveData_Polling(NULL,dummy,1);
00329                         if ((dummy[0] != 0xff) && (dummy[0] != 0xfe)) // not idle or start token?
00330                         {
00331                                 return SD_ERROR_TOKEN;
00332                         }
00333                         j++;
00334                 }
00335                 /* Read all bytes */
00336                 SD_SendReceiveData_Polling(NULL,(buffer+1),(length - 1));
00337         }
00338         /* Some more bit clocks to finish internal SD operations */
00339         dummy[0]=0x00;wait_idle=0;
00340         while((dummy[0]!=0xff)&&(wait_idle<20))
00341         {
00342                 dummy[0]=0x00;
00343                 SD_SendReceiveData_Polling(NULL,dummy,1);
00344                 for(j=0;j<1000;j++);
00345                 wait_idle++;
00346         }
00347         if(wait_idle>=20) return SD_ERROR_BUS_NOT_IDLE;
00348         return SD_OK;
00349 }
00350 /*********************************************************************/
00355 sd_error SD_WaitDeviceIdle(uint32_t num_char)
00356 {
00357         uint8_t dummy[2]={0,0};
00358         uint32_t i=0;
00359
00360         while ((i < num_char) && (dummy[0] != 0xff))
00361         {
00362                 dummy[0]=0x00;
00363                 SD_SendReceiveData_Polling(NULL,dummy,1);
00364                 if (dummy[0] == 0xff)
00365                 {
00366                         dummy[0]= 0x00;
00367                         SD_SendReceiveData_Polling(NULL,dummy,1);
00368                         if (dummy[0] == 0xff)
00369                         {
00370                                 dummy[0]= 0x00;
00371                                 SD_SendReceiveData_Polling(NULL,dummy,1);
00372                         }
00373                 }
00374                 i++;
00375         }
00376         if (dummy[0] != 0xff)return SD_ERROR_TIMEOUT;
00377
00378         return SD_OK;
00379 }
00380 /*********************************************************************/
00385 sd_error SD_Init(uint8_t retries)
00386 {
00387         uint8_t rxdata,errors;
00388         uint8_t SD_arg[4]={0,0,0,0};
00389         uint16_t i;
00390
00391         // initialize SPI configuration structure to default
00392         SPI_ConfigStructInit(&SPI_ConfigStruct);
00393         // Initialize SPI peripheral with parameter given in structure above
00394         SPI_Init(LPC_SPI, &SPI_ConfigStruct);
00395         // Initialize /CS pin to GPIO function
00396         CS_Init();
00397         // check for SD card insertion
00398         _DBG("\n\rPlease plug-in SD card!");
00399         while(SD_GetCardConnectStatus()==SD_DISCONNECTED);
00400         _DBG("...Connected!\n\r");
00401         // Wait for bus idle
00402         if(SD_WaitDeviceIdle(160) != SD_OK) return SD_ERROR_BUS_NOT_IDLE;
00403         _DBG("Initialize SD card in SPI mode...");
00404
00405         errors = 0;
00406         /* Send the CMD0_GO_IDLE_STATE while CS is asserted */
00407         /* This signals the SD card to fall back to SPI mode */
00408         while(errors < retries)
00409         {
00410                 SD_SendCommand(CMD0_GO_IDLE_STATE, SD_arg);
00411                 if(SD_WaitR1(&rxdata,0,1000)!= SD_OK)
00412                 {
00413                         errors++;
00414                         continue;
00415                 }
00416                 if(rxdata != R1_IDLE)
00417                 {
00418                         errors++;
00419                         continue;
00420                 }
00421                 else break;
00422         }
00423         if(errors >= retries)return SD_ERROR_CMD0;
00424
00425         /* Check if the card is not MMC */
00426         /* Start its internal initialization process */
00427         while(1)
00428         {
00429                 SD_SendCommand(CMD55_APP_CMD, SD_arg);
00430                 if(SD_WaitR1(&rxdata,0,1000)!= SD_OK) return SD_ERROR_CMD55;
00431
00432                 SD_SendCommand(ACMD41_SEND_OP_COND, SD_arg);
00433                 SD_WaitR1(&rxdata,0,1000);
00434                 if (rxdata & R1_IDLE) //in_idle_state = 1
00435                         for (i = 0; i < 1000; i++); /* wait for a while */
00436                 else break; //in_idle_state=0 --> ready
00437         }
00438         /* Enable CRC */
00439         SD_arg[3] = 0x01;
00440         SD_SendCommand(CMD59_CRC_ON_OFF, SD_arg);
00441         if(SD_WaitR1(&rxdata,0,1000)!= SD_OK) return SD_ERROR_CMD59;
00442         if(rxdata != R1_NOERROR) return SD_ERROR_CMD59;
00443
00444         return SD_OK;
00445 }
00446 /*********************************************************************/
00452 sd_error SD_GetCID(void)
00453 {
00454         uint8_t SD_arg[4]={0,0,0,0};
00455
00456         SD_SendCommand(CMD10_SEND_CID, SD_arg);
00457         if(SD_WaitR1(sd_data_buf,18,1000)!= SD_OK) return SD_NG;
00458         if(sd_data_buf[0]!= R1_NOERROR) return SD_NG;
00459         return SD_OK;
00460 }
00461 /*-------------------------MAIN FUNCTION------------------------------*/
00462 /*********************************************************************/
00467 int c_entry(void)
00468 {
00469         PINSEL_CFG_Type PinCfg;
00470         sd_error sd_status;
00471         uint8_t i;
00472         uint8_t tem8;
00473         uint32_t tem32;
00474         /*
00475          * Initialize SPI pin connect
00476          * P0.15 - SCK;
00477          * P0.16 - SSEL - used as GPIO
00478          * P0.17 - MISO
00479          * P0.18 - MOSI
00480          */
00481         PinCfg.Funcnum = 3;
00482         PinCfg.OpenDrain = 0;
00483         PinCfg.Pinmode = 0;
00484         PinCfg.Portnum = 0;
00485         PinCfg.Pinnum = 15;
00486         PINSEL_ConfigPin(&PinCfg);
00487         PinCfg.Pinnum = 17;
00488         PINSEL_ConfigPin(&PinCfg);
00489         PinCfg.Pinnum = 18;
00490         PINSEL_ConfigPin(&PinCfg);
00491         PinCfg.Pinnum = 16;
00492         PinCfg.Funcnum = 0;
00493         PINSEL_ConfigPin(&PinCfg);
00494         //Initialize SD card detection pin P4.29
00495         PinCfg.Portnum = 4;
00496         PinCfg.Pinnum = 29;
00497         PinCfg.Funcnum = 0;//GPIO function
00498         PINSEL_ConfigPin(&PinCfg);
00499         GPIO_SetDir(SD_DETECT_PORTNUM, (1<<SD_DETECT_PINNUM), 0);//input
00500
00501         /* Initialize debug via UART0
00502          * – 115200bps
00503          * – 8 data bit
00504          * – No parity
00505          * – 1 stop bit
00506          * – No flow control
00507          */
00508         debug_frmwrk_init();
00509
00510         // print welcome screen
00511         print_menu();
00512
00513         //initialize SD card
00514         sd_status = SD_Init(10);
00515         switch(sd_status)
00516         {
00517         case SD_ERROR_CMD0:
00518                 _DBG("Fail CMD0\n\r");
00519                 break;
00520         case SD_ERROR_CMD55:
00521                 _DBG("Fail CMD55\n\r");
00522                 break;
00523         case SD_ERROR_ACMD41:
00524                 _DBG("Fail ACMD41\n\r");
00525                 break;
00526         case SD_ERROR_CMD59:
00527                 _DBG("Fail CMD59\n\r");
00528                 break;
00529         case SD_ERROR_BUS_NOT_IDLE:
00530                 _DBG("Fail...Device is not in idle state.\n\r");
00531                 break;
00532         case SD_OK:
00533                 _DBG("Done!\n\r");
00534                 break;
00535         default:
00536                 _DBG("Fail\n\r");
00537                 break;
00538         }
00539         if(sd_status == SD_OK)
00540         {
00541                 //Clear receive buffer
00542                 for(i=1;i<18;i++)sd_data_buf[i]=0;
00543
00544                 _DBG("Reading SD card's CID register...");
00545                 if(SD_GetCID()!= SD_OK)
00546                 {
00547                         _DBG("Fail\n\r");
00548                         SPI_DeInit(LPC_SPI);
00549                 }
00550                 else
00551                 {
00552                         _DBG("Done!");
00553                         _DBG("\n\rManufacture ID: ");_DBH(sd_data_buf[1]);
00554                         _DBG("\n\rApplication ID: ");_DBC(sd_data_buf[2]);_DBC(sd_data_buf[3]);
00555                         _DBG("\n\rProduct name: ");
00556                                 for(i=4;i<9;i++) _DBC(sd_data_buf[i]);
00557                         _DBG("\n\rProduct revision: ");
00558                                 tem8 = (sd_data_buf[9]&0xF0)>>4;_DBD(tem8);
00559                                 _DBG(".");
00560                                 tem8 = (sd_data_buf[9]&0x0F);_DBD(tem8);
00561                         _DBG("\n\rProduct serial number: ");
00562                                 tem32= (sd_data_buf[13]<<24)|(sd_data_buf[12]<<16)|
00563                                                 (sd_data_buf[11]<<8)|(sd_data_buf[10]<<0);
00564                                 _DBH32(tem32);
00565                         _DBG("\n\rManufacturing date: ");
00566                                 tem8 = (sd_data_buf[15]&0x0F);_DBD(tem8);
00567                                 _DBG("/");
00568                                 tem8 = ((sd_data_buf[14]&0x0F)<<4) | ((sd_data_buf[15]&0xF0)>>4);
00569                                 _DBG("2");_DBD(tem8);
00570                 }
00571         }
00572         else
00573     // DeInitialize SPI peripheral
00574                 SPI_DeInit(LPC_SPI);
00575     /* Loop forever */
00576     while(1);
00577     return 1;
00578 }
00579
00580 /* With ARM and GHS toolsets, the entry point is main() - this will
00581    allow the linker to generate wrapper code to setup stacks, allocate
00582    heap area, and initialize and copy code and data segments. For GNU
00583    toolsets, the entry point is through __start() in the crt0_gnu.asm
00584    file, and that startup code will setup stacks and data */
00585 int main(void)
00586 {
00587     return c_entry();
00588 }
00589
00590
00591 #ifdef  DEBUG
00592 /*******************************************************************************
00593 * @brief                Reports the name of the source file and the source line number
00594 *                               where the CHECK_PARAM error has occurred.
00595 * @param[in]    file Pointer to the source file name
00596 * @param[in]    line assert_param error line source number
00597 * @return               None
00598 *******************************************************************************/
00599 void check_failed(uint8_t *file, uint32_t line)
00600 {
00601         /* User can add his own implementation to report the file name and line number,
00602          ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
00603
00604         /* Infinite loop */
00605         while(1);
00606 }
00607 #endif
00608 /*
00609  * @}
00610  */
Generated on Tue Jun 7 14:59:02 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/SPI/Slave/spi_slave.c Source File

C:/nxpdrv/LPC1700CMSIS/Examples/SPI/Slave/spi_slave.c

Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          spi_slave.c                                     2010-05-21
00003 */
00025 #include "lpc17xx_spi.h"
00026 #include "lpc17xx_libcfg.h"
00027 #include "lpc17xx_pinsel.h"
00028 #include "debug_frmwrk.h"
00029 #include "lpc17xx_gpio.h"
00030
00031 /* Example group ----------------------------------------------------------- */
00037 /************************** PRIVATE DEFINITIONS ***********************/
00039 #define BUFFER_SIZE                             0x40
00040 #define SPI_DATABIT_SIZE                10
00041
00042 /************************** PRIVATE VARIABLES *************************/
00043 uint8_t menu1[] =
00044 "********************************************************************************\n\r"
00045 "Hello NXP Semiconductors \n\r"
00046 "SPI demo \n\r"
00047 "\t - MCU: LPC17xx \n\r"
00048 "\t - Core: ARM Cortex-M3 \n\r"
00049 "\t - Communicate via: UART0 - 115200bps \n\r"
00050 "\t An example of SPI using interrupt mode to test the SPI driver \n\r"
00051 " This example uses SPI in slave mode to communicate with SPI slave device \n\r"
00052 " The master and slave transfer together a number of data byte \n\r"
00053 "********************************************************************************\n\r";
00054 uint8_t menu2[] = "Demo terminated! \n\r";
00055
00056 // SPI Configuration structure variable
00057 SPI_CFG_Type SPI_ConfigStruct;
00058
00059 #if (SPI_DATABIT_SIZE == 8)
00060 uint8_t Tx_Buf[BUFFER_SIZE];
00061 uint8_t Rx_Buf[BUFFER_SIZE];
00062 #else
00063 uint16_t Tx_Buf[BUFFER_SIZE];
00064 uint16_t Rx_Buf[BUFFER_SIZE];
00065 #endif
00066
00067
00068 /************************** PRIVATE FUNCTIONS *************************/
00069 void print_menu(void);
00070 void Buffer_Init(void);
00071 void Error_Loop(void);
00072 void Buffer_Verify(void);
00073
00074 /*-------------------------PRIVATE FUNCTIONS------------------------------*/
00075 /*********************************************************************/
00080 void Buffer_Init(void)
00081 {
00082         uint8_t i;
00083 #if (SPI_DATABIT_SIZE == 8)
00084         for (i = 0; i < BUFFER_SIZE; i++) {
00085                 Tx_Buf[i] = i;
00086                 Rx_Buf[i] = 0;
00087         }
00088 #else
00089         for (i = 0; i < BUFFER_SIZE/2; i++) {
00090                 Tx_Buf[i] = i;
00091                 Rx_Buf[i] = 0;
00092         }
00093 #endif
00094 }
00095
00096 /*********************************************************************/
00101 void Error_Loop(void)
00102 {
00103         /* Loop forever */
00104         while (1);
00105 }
00106
00107
00108 /*********************************************************************/
00113 void Buffer_Verify(void)
00114 {
00115         uint8_t i;
00116 #if (DATA_SIZE==8)
00117         uint8_t *src_addr = (uint8_t *) &Tx_Buf[0];
00118         uint8_t *dest_addr = (uint8_t *) &Rx_Buf[0];
00119         for ( i = 0; i < SPI_DATABIT_SIZE; i++ )
00120         {
00121                 if ( *src_addr++ != *dest_addr++ )
00122                 {
00123                         /* Call Error Loop */
00124                         _DBG_("Verify error");
00125                         Error_Loop();
00126                 }
00127         }
00128 #else
00129         uint16_t *src_addr = (uint16_t *) &Tx_Buf[0];
00130         uint16_t *dest_addr = (uint16_t *) &Rx_Buf[0];
00131         for ( i = 0; i < SPI_DATABIT_SIZE/2; i++ )
00132         {
00133                 if ( *src_addr++ != *dest_addr++ )
00134                 {
00135                         /* Call Error Loop */
00136                         _DBG_("Verify error");
00137                         Error_Loop();
00138                 }
00139         }
00140 #endif
00141 }
00142
00143
00144 /*********************************************************************/
00149 void print_menu(void)
00150 {
00151         _DBG(menu1);
00152 }
00153
00154
00155
00156 /*-------------------------MAIN FUNCTION------------------------------*/
00157 /*********************************************************************/
00162 int c_entry(void)
00163 {
00164         PINSEL_CFG_Type PinCfg;
00165         SPI_DATA_SETUP_Type xferConfig;
00166
00167         /*
00168          * Initialize SPI pin connect
00169          * P0.15 - SCK;
00170          * P0.16 - SSEL
00171          * P0.17 - MISO
00172          * P0.18 - MOSI
00173          */
00174         PinCfg.Funcnum = 3;
00175         PinCfg.OpenDrain = 0;
00176         PinCfg.Pinmode = 0;
00177         PinCfg.Portnum = 0;
00178         PinCfg.Pinnum = 15;
00179         PINSEL_ConfigPin(&PinCfg);
00180         PinCfg.Pinnum = 17;
00181         PINSEL_ConfigPin(&PinCfg);
00182         PinCfg.Pinnum = 18;
00183         PINSEL_ConfigPin(&PinCfg);
00184         PinCfg.Pinnum = 16;
00185         PINSEL_ConfigPin(&PinCfg);
00186
00187         /* Initialize debug via UART0
00188          * – 115200bps
00189          * – 8 data bit
00190          * – No parity
00191          * – 1 stop bit
00192          * – No flow control
00193          */
00194         debug_frmwrk_init();
00195
00196         // print welcome screen
00197         print_menu();
00198
00199         SPI_ConfigStruct.CPHA = SPI_CPHA_SECOND;
00200         SPI_ConfigStruct.CPOL = SPI_CPOL_LO;
00201         SPI_ConfigStruct.ClockRate = 2000000;
00202         SPI_ConfigStruct.DataOrder = SPI_DATA_MSB_FIRST;
00203         SPI_ConfigStruct.Databit = SPI_DATABIT_SIZE;
00204         SPI_ConfigStruct.Mode = SPI_SLAVE_MODE;
00205         // Initialize SPI peripheral with parameter given in structure above
00206         SPI_Init(LPC_SPI, &SPI_ConfigStruct);
00207
00208
00209         /* Initialize Buffer */
00210         _DBG("Init buffer...");
00211         Buffer_Init();
00212         _DBG_("Complete!"); _DBG_("Wait for master transfer data...");
00213         xferConfig.tx_data = Tx_Buf;
00214         xferConfig.rx_data = Rx_Buf;
00215         xferConfig.length = BUFFER_SIZE;
00216         SPI_ReadWrite(LPC_SPI, &xferConfig, SPI_TRANSFER_POLLING);
00217         _DBG_("Transfer complete!");
00218
00219         // Verify buffer after transferring
00220         Buffer_Verify();
00221         _DBG_("Verify complete!");
00222
00223     /* Loop forever */
00224         SPI_DeInit(LPC_SPI);
00225     while(1);
00226     return 1;
00227 }
00228
00229 /* With ARM and GHS toolsets, the entry point is main() - this will
00230    allow the linker to generate wrapper code to setup stacks, allocate
00231    heap area, and initialize and copy code and data segments. For GNU
00232    toolsets, the entry point is through __start() in the crt0_gnu.asm
00233    file, and that startup code will setup stacks and data */
00234 int main(void)
00235 {
00236     return c_entry();
00237 }
00238
00239
00240 #ifdef  DEBUG
00241 /*******************************************************************************
00242 * @brief                Reports the name of the source file and the source line number
00243 *                               where the CHECK_PARAM error has occurred.
00244 * @param[in]    file Pointer to the source file name
00245 * @param[in]    line assert_param error line source number
00246 * @return               None
00247 *******************************************************************************/
00248 void check_failed(uint8_t *file, uint32_t line)
00249 {
00250         /* User can add his own implementation to report the file name and line number,
00251          ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
00252
00253         /* Infinite loop */
00254         while(1);
00255 }
00256 #endif
00257
00258 /*
00259  * @}
00260  */
Generated on Tue Jun 7 14:59:02 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/SSP/dma/ssp_dma.c Source File

C:/nxpdrv/LPC1700CMSIS/Examples/SSP/dma/ssp_dma.c

Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          ssp_dma.c                                       2010-05-21
00003 */
00027 #include "lpc17xx_ssp.h"
00028 #include "lpc17xx_libcfg.h"
00029 #include "lpc17xx_pinsel.h"
00030 #include "lpc17xx_gpdma.h"
00031 #include "debug_frmwrk.h"
00032
00033 /* Example group ----------------------------------------------------------- */
00039 /************************** PRIVATE DEFINITIONS ***********************/
00040 /* For DMA controller */
00041 #define DMA_DATA_SIZE   65
00042
00043 /************************** PRIVATE VARIABLES *************************/
00044 uint8_t menu1[] =
00045 "********************************************************************************\n\r"
00046 "Hello NXP Semiconductors \n\r"
00047 "SSP demo \n\r"
00048 "\t - MCU: LPC17xx \n\r"
00049 "\t - Core: ARM Cortex-M3 \n\r"
00050 "\t - Communicate via: UART0 - 115200bps \n\r"
00051 " This example uses SSP function in MASTER mode \n\r"
00052 " with Loop-back mode (MOSI <-> MISO) \n\r"
00053 " Transfer 64 bytes of data (in DMA mode for both Tx and Rx \n\r"
00054 " channel) \n\r"
00055 "********************************************************************************\n\r";
00056 uint8_t menu2[] = "Demo terminated! \n\r";
00057
00058 // SSP Configuration structure variable
00059 SSP_CFG_Type SSP_ConfigStruct;
00060
00061 // Terminal Counter flag for Channel 0
00062 __IO uint32_t Channel0_TC;
00063
00064 // Error Counter flag for Channel 0
00065 __IO uint32_t Channel0_Err;
00066
00067 // Terminal Counter flag for Channel 1
00068 __IO uint32_t Channel1_TC;
00069
00070 // Error Counter flag for Channel 1
00071 __IO uint32_t Channel1_Err;
00072
00073 // DMA source variable
00074 uint8_t dma_src[DMA_DATA_SIZE];
00075
00076 // DMA source variable
00077 uint8_t dma_dst[DMA_DATA_SIZE];
00078
00079
00080 /************************** PRIVATE FUNCTIONS *************************/
00081 void DMA_IRQHandler (void);
00082
00083 void print_menu(void);
00084 void Buffer_Init(void);
00085 void Buffer_Verify(void);
00086 void Error_Loop(void);
00087
00088 /*----------------- INTERRUPT SERVICE ROUTINES --------------------------*/
00089 /*********************************************************************/
00094 void DMA_IRQHandler (void)
00095 {
00096         // check GPDMA interrupt on channel 0
00097         if (GPDMA_IntGetStatus(GPDMA_STAT_INT, 0)){
00098                 // Check counter terminal status
00099                 if(GPDMA_IntGetStatus(GPDMA_STAT_INTTC, 0)){
00100                         // Clear terminate counter Interrupt pending
00101                         GPDMA_ClearIntPending (GPDMA_STATCLR_INTTC, 0);
00102                                 Channel0_TC++;
00103                 }
00104                 // Check error terminal status
00105                 if (GPDMA_IntGetStatus(GPDMA_STAT_INTERR, 0)){
00106                         // Clear error counter Interrupt pending
00107                         GPDMA_ClearIntPending (GPDMA_STATCLR_INTERR, 0);
00108                         Channel0_Err++;
00109                 }
00110         }
00111         // check GPDMA interrupt on channel 1
00112         if (GPDMA_IntGetStatus(GPDMA_STAT_INT, 1)){
00113                 // Check counter terminal status
00114                 if(GPDMA_IntGetStatus(GPDMA_STAT_INTTC, 1)){
00115                         // Clear terminate counter Interrupt pending
00116                         GPDMA_ClearIntPending (GPDMA_STATCLR_INTTC, 1);
00117                                 Channel1_TC++;
00118                 }
00119                 // Check error terminal status
00120                 if (GPDMA_IntGetStatus(GPDMA_STAT_INTERR, 1)){
00121                         // Clear error counter Interrupt pending
00122                         GPDMA_ClearIntPending (GPDMA_STATCLR_INTERR, 1);
00123                         Channel1_Err++;
00124                 }
00125         }
00126 }
00127
00128 /*-------------------------PRIVATE FUNCTIONS------------------------------*/
00129 /*********************************************************************/
00134 void Buffer_Init(void)
00135 {
00136         uint32_t i;
00137         uint8_t *src_addr = (uint8_t *)dma_src;
00138         uint8_t *dest_addr = (uint8_t *)dma_dst;
00139
00140          for ( i = 0; i < DMA_DATA_SIZE; i++ )
00141         {
00142                 *src_addr++ = i;
00143                 *dest_addr++ = 0;
00144         }
00145 }
00146
00147 /*********************************************************************/
00152 void Buffer_Verify(void)
00153 {
00154         uint32_t i;
00155         uint8_t *src_addr = (uint8_t *)dma_src;
00156         uint8_t *dest_addr = (uint8_t *)dma_dst;
00157
00158         for ( i = 0; i < DMA_DATA_SIZE; i++ )
00159         {
00160                 if ( *src_addr++ != *dest_addr++ )
00161                 {
00162                         /* Call Error Loop */
00163                         _DBG_("Verify error");
00164                         Error_Loop();
00165                 }
00166         }
00167 }
00168
00169 /*********************************************************************/
00174 void Error_Loop(void)
00175 {
00176         /* Loop forever */
00177         while (1);
00178 }
00179
00180 /*********************************************************************/
00185 void print_menu(void)
00186 {
00187         _DBG(menu1);
00188 }
00189
00190 /*-------------------------MAIN FUNCTION------------------------------*/
00191 /*********************************************************************/
00196 int c_entry(void)
00197 {
00198         GPDMA_Channel_CFG_Type GPDMACfg;
00199         PINSEL_CFG_Type PinCfg;
00200
00201         /*
00202          * Initialize SSP pin connect
00203          * P0.15 - SCK;
00204          * P0.16 - SSEL
00205          * P0.17 - MISO
00206          * P0.18 - MOSI
00207          */
00208         PinCfg.Funcnum = 2;
00209         PinCfg.OpenDrain = 0;
00210         PinCfg.Pinmode = 0;
00211         PinCfg.Portnum = 0;
00212         PinCfg.Pinnum = 15;
00213         PINSEL_ConfigPin(&PinCfg);
00214         PinCfg.Pinnum = 16;
00215         PINSEL_ConfigPin(&PinCfg);
00216         PinCfg.Pinnum = 17;
00217         PINSEL_ConfigPin(&PinCfg);
00218         PinCfg.Pinnum = 18;
00219         PINSEL_ConfigPin(&PinCfg);
00220
00221         /* Initialize debug via UART0
00222          * – 115200bps
00223          * – 8 data bit
00224          * – No parity
00225          * – 1 stop bit
00226          * – No flow control
00227          */
00228         debug_frmwrk_init();
00229
00230         // print welcome screen
00231         print_menu();
00232
00233         /* Initializing SSP device section ------------------------------------------------------ */
00234         // initialize SSP configuration structure to default
00235         SSP_ConfigStructInit(&SSP_ConfigStruct);
00236         // Initialize SSP peripheral with parameter given in structure above
00237         SSP_Init(LPC_SSP0, &SSP_ConfigStruct);
00238
00239         // Enable SSP peripheral
00240         SSP_Cmd(LPC_SSP0, ENABLE);
00241
00242
00243         /* GPDMA Interrupt configuration section ------------------------------------------------- */
00244         /* preemption = 1, sub-priority = 1 */
00245         NVIC_SetPriority(DMA_IRQn, ((0x01<<3)|0x01));
00246         /* Enable SSP0 interrupt */
00247         NVIC_EnableIRQ(DMA_IRQn);
00248
00249
00250         /* Initializing Buffer section ----------------------------------------------------------- */
00251         Buffer_Init();
00252
00253     /* Initialize GPDMA controller */
00254         GPDMA_Init();
00255
00256
00257         /* Setting GPDMA interrupt */
00258     // Disable interrupt for DMA
00259     NVIC_DisableIRQ (DMA_IRQn);
00260     /* preemption = 1, sub-priority = 1 */
00261     NVIC_SetPriority(DMA_IRQn, ((0x01<<3)|0x01));
00262
00263
00264     /* Configure GPDMA channel 0 -------------------------------------------------------------*/
00265     /* DMA Channel 0 */
00266     GPDMACfg.ChannelNum = 0;
00267         // Source memory
00268         GPDMACfg.SrcMemAddr = (uint32_t) &dma_src;
00269         // Destination memory - Not used
00270         GPDMACfg.DstMemAddr = 0;
00271         // Transfer size
00272         GPDMACfg.TransferSize = sizeof(dma_src);
00273         // Transfer width - not used
00274         GPDMACfg.TransferWidth = 0;
00275         // Transfer type
00276         GPDMACfg.TransferType = GPDMA_TRANSFERTYPE_M2P;
00277         // Source connection - unused
00278         GPDMACfg.SrcConn = 0;
00279         // Destination connection
00280         GPDMACfg.DstConn = GPDMA_CONN_SSP0_Tx;
00281         // Linker List Item - unused
00282         GPDMACfg.DMALLI = 0;
00283         // Setup channel with given parameter
00284         GPDMA_Setup(&GPDMACfg);
00285
00286         /* Reset terminal counter */
00287         Channel0_TC = 0;
00288         /* Reset Error counter */
00289         Channel0_Err = 0;
00290
00291
00292     /* Configure GPDMA channel 1 -------------------------------------------------------------*/
00293     /* DMA Channel 1 */
00294         GPDMACfg.ChannelNum = 1;
00295         // Source memory - not used
00296         GPDMACfg.SrcMemAddr = 0;
00297         // Destination memory - Not used
00298         GPDMACfg.DstMemAddr = (uint32_t) &dma_dst;
00299         // Transfer size
00300         GPDMACfg.TransferSize = sizeof(dma_dst);
00301         // Transfer width - not used
00302         GPDMACfg.TransferWidth = 0;
00303         // Transfer type
00304         GPDMACfg.TransferType = GPDMA_TRANSFERTYPE_P2M;
00305         // Source connection
00306         GPDMACfg.SrcConn = GPDMA_CONN_SSP0_Rx;
00307         // Destination connection - not used
00308         GPDMACfg.DstConn = 0;
00309         // Linker List Item - unused
00310         GPDMACfg.DMALLI = 0;
00311         // Setup channel with given parameter
00312         GPDMA_Setup(&GPDMACfg);
00313
00314         /* Reset terminal counter */
00315         Channel1_TC = 0;
00316         /* Reset Error counter */
00317         Channel1_Err = 0;
00318
00319         _DBG_("Start transfer...");
00320
00321     // Enable Tx and Rx DMA on SSP0
00322         SSP_DMACmd (LPC_SSP0, SSP_DMA_RX, ENABLE);
00323         SSP_DMACmd (LPC_SSP0, SSP_DMA_TX, ENABLE);
00324
00325         // Enable GPDMA channel 0
00326         GPDMA_ChannelCmd(0, ENABLE);
00327         // Enable GPDMA channel 0
00328         GPDMA_ChannelCmd(1, ENABLE);
00329
00330     // Enable interrupt for DMA
00331     NVIC_EnableIRQ (DMA_IRQn);
00332
00333         /* Wait for GPDMA processing complete */
00334         while (((Channel0_TC == 0) && (Channel0_Err == 0)) \
00335                         || ((Channel1_TC == 0) && (Channel1_Err ==0)));
00336
00337         /* Verify buffer */
00338         Buffer_Verify();
00339
00340         _DBG_("Verify complete!");
00341
00342     /* Loop forever */
00343     while(1);
00344     return 1;
00345 }
00346
00347 /* With ARM and GHS toolsets, the entry point is main() - this will
00348    allow the linker to generate wrapper code to setup stacks, allocate
00349    heap area, and initialize and copy code and data segments. For GNU
00350    toolsets, the entry point is through __start() in the crt0_gnu.asm
00351    file, and that startup code will setup stacks and data */
00352 int main(void)
00353 {
00354     return c_entry();
00355 }
00356
00357
00358 #ifdef  DEBUG
00359 /*******************************************************************************
00360 * @brief                Reports the name of the source file and the source line number
00361 *                               where the CHECK_PARAM error has occurred.
00362 * @param[in]    file Pointer to the source file name
00363 * @param[in]    line assert_param error line source number
00364 * @return               None
00365 *******************************************************************************/
00366 void check_failed(uint8_t *file, uint32_t line)
00367 {
00368         /* User can add his own implementation to report the file name and line number,
00369          ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
00370
00371         /* Infinite loop */
00372         while(1);
00373 }
00374 #endif
00375
00376 /*
00377  * @}
00378  */
Generated on Tue Jun 7 14:59:02 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/SSP/Master/ssp_master.c Source File

C:/nxpdrv/LPC1700CMSIS/Examples/SSP/Master/ssp_master.c

Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          ssp_master.c                                    2010-05-21
00003 */
00025 #include "lpc17xx_ssp.h"
00026 #include "lpc17xx_libcfg.h"
00027 #include "lpc17xx_pinsel.h"
00028 #include "debug_frmwrk.h"
00029 #include "lpc17xx_gpio.h"
00030
00031 /* Example group ----------------------------------------------------------- */
00037 /************************** PRIVATE DEFINTIONS ************************/
00039 #define BUFFER_SIZE                     0x40
00040
00041
00042 /************************** PRIVATE VARIABLES *************************/
00043 uint8_t menu1[] =
00044 "********************************************************************************\n\r"
00045 "Hello NXP Semiconductors \n\r"
00046 "SSP demo \n\r"
00047 "\t - MCU: LPC17xx \n\r"
00048 "\t - Core: ARM Cortex-M3 \n\r"
00049 "\t - Communicate via: UART0 - 115200bps \n\r"
00050 "\t An example of SSP using polling mode to test the SSP driver \n\r"
00051 " This example uses SSP in SPI mode as master to communicate with an SSP slave device \n\r"
00052 " The master and slave transfer together a number of data byte \n\r"
00053 "********************************************************************************\n\r";
00054 uint8_t menu2[] = "Demo terminated! \n\r";
00055
00056 // SSP Configuration structure variable
00057 SSP_CFG_Type SSP_ConfigStruct;
00058
00059 // Tx buffer
00060 uint8_t Tx_Buf[BUFFER_SIZE];
00061
00062 // Rx buffer
00063 uint8_t Rx_Buf[BUFFER_SIZE];
00064
00065 /************************** PRIVATE FUNCTIONS *************************/
00066 void print_menu(void);
00067 void Buffer_Init(void);
00068 void Error_Loop(void);
00069 void Buffer_Verify(void);
00070
00071 /*-------------------------PRIVATE FUNCTIONS------------------------------*/
00072 /*********************************************************************/
00077 void Buffer_Init(void)
00078 {
00079         uint8_t i;
00080
00081         for (i = 0; i < BUFFER_SIZE; i++) {
00082                 Tx_Buf[i] = i;
00083                 Rx_Buf[i] = 0;
00084         }
00085 }
00086
00087 /*********************************************************************/
00092 void Error_Loop(void)
00093 {
00094         /* Loop forever */
00095         while (1);
00096 }
00097
00098
00099 /*********************************************************************/
00104 void Buffer_Verify(void)
00105 {
00106         uint8_t i;
00107         uint8_t *src_addr = (uint8_t *) &Tx_Buf[0];
00108         uint8_t *dest_addr = (uint8_t *) &Rx_Buf[0];
00109
00110         for ( i = 0; i < BUFFER_SIZE; i++ )
00111         {
00112                 if ( *src_addr++ != *dest_addr++ )
00113                 {
00114                         _DBG_("Verify error");
00115                         /* Call Error Loop */
00116                         Error_Loop();
00117                 }
00118         }
00119 }
00120
00121
00122 /*********************************************************************/
00127 void print_menu(void)
00128 {
00129         _DBG(menu1);
00130 }
00131
00132 /*-------------------------MAIN FUNCTION------------------------------*/
00133 /*********************************************************************/
00138 int c_entry(void)
00139 {
00140         PINSEL_CFG_Type PinCfg;
00141         SSP_DATA_SETUP_Type xferConfig;
00142
00143         /*
00144          * Initialize SPI pin connect
00145          * P0.15 - SCK;
00146          * P0.16 - SSEL
00147          * P0.17 - MISO
00148          * P0.18 - MOSI
00149          */
00150         PinCfg.Funcnum = 2;
00151         PinCfg.OpenDrain = 0;
00152         PinCfg.Pinmode = 0;
00153         PinCfg.Portnum = 0;
00154         PinCfg.Pinnum = 15;
00155         PINSEL_ConfigPin(&PinCfg);
00156         PinCfg.Pinnum = 17;
00157         PINSEL_ConfigPin(&PinCfg);
00158         PinCfg.Pinnum = 18;
00159         PINSEL_ConfigPin(&PinCfg);
00160         PinCfg.Pinnum = 16;
00161         PINSEL_ConfigPin(&PinCfg);
00162
00163         /* Initialize debug via UART0
00164          * – 115200bps
00165          * – 8 data bit
00166          * – No parity
00167          * – 1 stop bit
00168          * – No flow control
00169          */
00170         debug_frmwrk_init();
00171
00172         // print welcome screen
00173         print_menu();
00174
00175         // initialize SSP configuration structure to default
00176         SSP_ConfigStructInit(&SSP_ConfigStruct);
00177         // Initialize SSP peripheral with parameter given in structure above
00178         SSP_Init(LPC_SSP0, &SSP_ConfigStruct);
00179
00180         // Enable SSP peripheral
00181         SSP_Cmd(LPC_SSP0, ENABLE);
00182
00183         _DBG_("Press '1' to start transfer...");
00184         while (_DG != '1');
00185
00186         /* Initialize Buffer */
00187         _DBG_("Init buffer");
00188         Buffer_Init();
00189
00190         _DBG_("Start transfer...");
00191
00192         xferConfig.tx_data = Tx_Buf;
00193         xferConfig.rx_data = Rx_Buf;
00194         xferConfig.length = BUFFER_SIZE;
00195         SSP_ReadWrite(LPC_SSP0, &xferConfig, SSP_TRANSFER_POLLING);
00196
00197         // Verify buffer after transferring
00198         Buffer_Verify();
00199         _DBG_("Verify complete!");
00200
00201     /* Loop forever */
00202     while(1);
00203     return 1;
00204 }
00205
00206 /* With ARM and GHS toolsets, the entry point is main() - this will
00207    allow the linker to generate wrapper code to setup stacks, allocate
00208    heap area, and initialize and copy code and data segments. For GNU
00209    toolsets, the entry point is through __start() in the crt0_gnu.asm
00210    file, and that startup code will setup stacks and data */
00211 int main(void)
00212 {
00213     return c_entry();
00214 }
00215
00216
00217 #ifdef  DEBUG
00218 /*******************************************************************************
00219 * @brief                Reports the name of the source file and the source line number
00220 *                               where the CHECK_PARAM error has occurred.
00221 * @param[in]    file Pointer to the source file name
00222 * @param[in]    line assert_param error line source number
00223 * @return               None
00224 *******************************************************************************/
00225 void check_failed(uint8_t *file, uint32_t line)
00226 {
00227         /* User can add his own implementation to report the file name and line number,
00228          ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
00229
00230         /* Infinite loop */
00231         while(1);
00232 }
00233 #endif
Generated on Tue Jun 7 14:59:02 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/SSP/Slave/ssp_slave.c Source File

C:/nxpdrv/LPC1700CMSIS/Examples/SSP/Slave/ssp_slave.c

Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          ssp_slave.c                             2010-05-21
00003 */
00025 #include "lpc17xx_ssp.h"
00026 #include "lpc17xx_libcfg.h"
00027 #include "lpc17xx_pinsel.h"
00028 #include "debug_frmwrk.h"
00029 #include "lpc17xx_gpio.h"
00030
00031 /* Example group ----------------------------------------------------------- */
00038 /************************** PRIVATE DEFINTIONS *************************/
00040 #define BUFFER_SIZE                     0x40
00041
00042
00043 /************************** PRIVATE VARIABLES *************************/
00044 uint8_t menu1[] =
00045 "********************************************************************************\n\r"
00046 "Hello NXP Semiconductors \n\r"
00047 "SSP demo \n\r"
00048 "\t - MCU: LPC17xx \n\r"
00049 "\t - Core: ARM Cortex-M3 \n\r"
00050 "\t - Communicate via: UART0 - 115200bps \n\r"
00051 "\t An example of SSP using interrupt mode to test the SSP driver \n\r"
00052 " This example uses SSP in SPI mode as slave to communicate with an SSP master device \n\r"
00053 " The master and slave transfer together a number of data byte \n\r"
00054 "********************************************************************************\n\r";
00055 uint8_t menu2[] = "Demo terminated! \n\r";
00056
00057 // SSP Configuration structure variable
00058 SSP_CFG_Type SSP_ConfigStruct;
00059 //SSP Data setup structure variable
00060 SSP_DATA_SETUP_Type xferConfig;
00061
00062 // Tx buffer
00063 uint8_t Tx_Buf[BUFFER_SIZE];
00064 // Rx buffer
00065 uint8_t Rx_Buf[BUFFER_SIZE];
00066
00067 /* Status Flag indicates current SSP transmission complete or not */
00068 __IO FlagStatus complete;
00069
00070 /************************** PRIVATE FUNCTIONS *************************/
00071 void SSP0_IRQHandler(void);
00072
00073 void print_menu(void);
00074 void Buffer_Init(void);
00075 void Error_Loop(void);
00076 void Buffer_Verify(void);
00077
00078 /*----------------- INTERRUPT SERVICE ROUTINES --------------------------*/
00079 /*********************************************************************/
00084 void SSP0_IRQHandler(void)
00085 {
00086         SSP_DATA_SETUP_Type *xf_setup;
00087         uint16_t tmp;
00088         uint8_t dataword;
00089
00090         // Disable interrupt
00091         SSP_IntConfig(LPC_SSP0, SSP_INTCFG_ROR|SSP_INTCFG_RT|SSP_INTCFG_RX|SSP_INTCFG_TX, DISABLE);
00092
00093         if(SSP_GetDataSize(LPC_SSP0)>8)
00094                 dataword = 1;
00095         else
00096                 dataword = 0;
00097         xf_setup = &xferConfig;
00098         // save status
00099         tmp = SSP_GetRawIntStatusReg(LPC_SSP0);
00100         xf_setup->status = tmp;
00101
00102         // Check overrun error
00103         if (tmp & SSP_RIS_ROR){
00104                 // Clear interrupt
00105                 SSP_ClearIntPending(LPC_SSP0, SSP_INTCLR_ROR);
00106                 // update status
00107                 xf_setup->status |= SSP_STAT_ERROR;
00108                 // Set Complete Flag
00109                 complete = SET;
00110                 return;
00111         }
00112
00113         if ((xf_setup->tx_cnt != xf_setup->length) || (xf_setup->rx_cnt != xf_setup->length)){
00114                 /* check if RX FIFO contains data */
00115                 while ((SSP_GetStatus(LPC_SSP0, SSP_STAT_RXFIFO_NOTEMPTY)) && (xf_setup->rx_cnt != xf_setup->length)){
00116                         // Read data from SSP data
00117                         tmp = SSP_ReceiveData(LPC_SSP0);
00118
00119                         // Store data to destination
00120                         if (xf_setup->rx_data != NULL)
00121                         {
00122                                 if (dataword == 0){
00123                                         *(uint8_t *)((uint32_t)xf_setup->rx_data + xf_setup->rx_cnt) = (uint8_t) tmp;
00124                                 } else {
00125                                         *(uint16_t *)((uint32_t)xf_setup->rx_data + xf_setup->rx_cnt) = (uint16_t) tmp;
00126                                 }
00127                         }
00128                         // Increase counter
00129                         if (dataword == 0){
00130                                 xf_setup->rx_cnt++;
00131                         } else {
00132                                 xf_setup->rx_cnt += 2;
00133                         }
00134                 }
00135
00136                 while ((SSP_GetStatus(LPC_SSP0, SSP_STAT_TXFIFO_NOTFULL)) && (xf_setup->tx_cnt != xf_setup->length)){
00137                         // Write data to buffer
00138                         if(xf_setup->tx_data == NULL){
00139                                 if (dataword == 0){
00140                                         SSP_SendData(LPC_SSP0, 0xFF);
00141                                         xf_setup->tx_cnt++;
00142                                 } else {
00143                                         SSP_SendData(LPC_SSP0, 0xFFFF);
00144                                         xf_setup->tx_cnt += 2;
00145                                 }
00146                         } else {
00147                                 if (dataword == 0){
00148                                         SSP_SendData(LPC_SSP0, (*(uint8_t *)((uint32_t)xf_setup->tx_data + xf_setup->tx_cnt)));
00149                                         xf_setup->tx_cnt++;
00150                                 } else {
00151                                         SSP_SendData(LPC_SSP0, (*(uint16_t *)((uint32_t)xf_setup->tx_data + xf_setup->tx_cnt)));
00152                                         xf_setup->tx_cnt += 2;
00153                                 }
00154                         }
00155
00156                         // Check overrun error
00157                         if (SSP_GetRawIntStatus(LPC_SSP0, SSP_INTSTAT_RAW_ROR)){
00158                                 // update status
00159                                 xf_setup->status |= SSP_STAT_ERROR;
00160                                 // Set Complete Flag
00161                                 complete = SET;
00162                                 return;
00163                         }
00164
00165                         // Check for any data available in RX FIFO
00166                         while ((SSP_GetStatus(LPC_SSP0, SSP_STAT_RXFIFO_NOTEMPTY)) && (xf_setup->rx_cnt != xf_setup->length)){
00167                                 // Read data from SSP data
00168                                 tmp = SSP_ReceiveData(LPC_SSP0);
00169
00170                                 // Store data to destination
00171                                 if (xf_setup->rx_data != NULL)
00172                                 {
00173                                         if (dataword == 0){
00174                                                 *(uint8_t *)((uint32_t)xf_setup->rx_data + xf_setup->rx_cnt) = (uint8_t) tmp;
00175                                         } else {
00176                                                 *(uint16_t *)((uint32_t)xf_setup->rx_data + xf_setup->rx_cnt) = (uint16_t) tmp;
00177                                         }
00178                                 }
00179                                 // Increase counter
00180                                 if (dataword == 0){
00181                                         xf_setup->rx_cnt++;
00182                                 } else {
00183                                         xf_setup->rx_cnt += 2;
00184                                 }
00185                         }
00186                 }
00187         }
00188
00189         // If there more data to sent or receive
00190         if ((xf_setup->rx_cnt != xf_setup->length) || (xf_setup->tx_cnt != xf_setup->length)){
00191                 // Enable all interrupt
00192                 SSP_IntConfig(LPC_SSP0, SSP_INTCFG_ROR|SSP_INTCFG_RT|SSP_INTCFG_RX|SSP_INTCFG_TX, ENABLE);
00193         } else {
00194                 // Save status
00195                 xf_setup->status = SSP_STAT_DONE;
00196                 // Set Complete Flag
00197                 complete = SET;
00198         }
00199 }
00200
00201 /*-------------------------PRIVATE FUNCTIONS------------------------------*/
00202 /*********************************************************************/
00207 void Buffer_Init(void)
00208 {
00209         uint8_t i;
00210
00211         for (i = 0; i < BUFFER_SIZE; i++) {
00212                 Tx_Buf[i] = i;
00213                 Rx_Buf[i] = 0;
00214         }
00215 }
00216
00217 /*********************************************************************/
00222 void Error_Loop(void)
00223 {
00224         /* Loop forever */
00225         while (1);
00226 }
00227
00228 /*********************************************************************/
00233 void Buffer_Verify(void)
00234 {
00235         uint8_t i;
00236         uint8_t *src_addr = (uint8_t *) &Tx_Buf[0];
00237         uint8_t *dest_addr = (uint8_t *) &Rx_Buf[0];
00238
00239         for ( i = 0; i < BUFFER_SIZE; i++ )
00240         {
00241                 if ( *src_addr++ != *dest_addr++ )
00242                 {
00243                         _DBG_("Verify error");
00244                         /* Call Error Loop */
00245                         Error_Loop();
00246                 }
00247         }
00248 }
00249
00250 /*********************************************************************/
00255 void print_menu(void)
00256 {
00257         _DBG(menu1);
00258 }
00259
00260 /*-------------------------MAIN FUNCTION------------------------------*/
00261 /*********************************************************************/
00266 int c_entry(void)
00267 {
00268         PINSEL_CFG_Type PinCfg;
00269
00270         /*
00271          * Initialize SPI pin connect
00272          * P0.15 - SCK;
00273          * P0.16 - SSEL
00274          * P0.17 - MISO
00275          * P0.18 - MOSI
00276          */
00277         PinCfg.Funcnum = 2;
00278         PinCfg.OpenDrain = 0;
00279         PinCfg.Pinmode = 0;
00280         PinCfg.Portnum = 0;
00281         PinCfg.Pinnum = 15;
00282         PINSEL_ConfigPin(&PinCfg);
00283         PinCfg.Pinnum = 17;
00284         PINSEL_ConfigPin(&PinCfg);
00285         PinCfg.Pinnum = 18;
00286         PINSEL_ConfigPin(&PinCfg);
00287         PinCfg.Pinnum = 16;
00288         PINSEL_ConfigPin(&PinCfg);
00289
00290         /* Initialize debug via UART0
00291          * – 115200bps
00292          * – 8 data bit
00293          * – No parity
00294          * – 1 stop bit
00295          * – No flow control
00296          */
00297         debug_frmwrk_init();
00298
00299         // print welcome screen
00300         print_menu();
00301
00302         // initialize SSP configuration structure to default
00303         SSP_ConfigStructInit(&SSP_ConfigStruct);
00304         SSP_ConfigStruct.Mode = SSP_SLAVE_MODE;
00305         // Initialize SSP peripheral with parameter given in structure above
00306         SSP_Init(LPC_SSP0, &SSP_ConfigStruct);
00307
00308     /* preemption = 1, sub-priority = 1 */
00309     NVIC_SetPriority(SSP0_IRQn, ((0x01<<3)|0x01));
00310     /* Enable SSP0 interrupt */
00311     NVIC_EnableIRQ(SSP0_IRQn);
00312
00313         // Enable SSP peripheral
00314         SSP_Cmd(LPC_SSP0, ENABLE);
00315
00316         _DBG_("Init buffer");
00317         /* Initialize Buffer */
00318         Buffer_Init();
00319
00320         _DBG_("Wait for master transfer...");
00321         complete = RESET;
00322         xferConfig.tx_data = Tx_Buf;
00323         xferConfig.rx_data = Rx_Buf;
00324         xferConfig.length = BUFFER_SIZE;
00325         SSP_ReadWrite(LPC_SSP0, &xferConfig, SSP_TRANSFER_INTERRUPT);
00326         while(complete == RESET);
00327
00328         // Verify buffer after transferring
00329         Buffer_Verify();
00330         _DBG_("Verify complete!");
00331
00332     /* Loop forever */
00333     while(1);
00334     return 1;
00335 }
00336
00337 /* With ARM and GHS toolsets, the entry point is main() - this will
00338    allow the linker to generate wrapper code to setup stacks, allocate
00339    heap area, and initialize and copy code and data segments. For GNU
00340    toolsets, the entry point is through __start() in the crt0_gnu.asm
00341    file, and that startup code will setup stacks and data */
00342 int main(void)
00343 {
00344     return c_entry();
00345 }
00346
00347
00348 #ifdef  DEBUG
00349 /*******************************************************************************
00350 * @brief                Reports the name of the source file and the source line number
00351 *                               where the CHECK_PARAM error has occurred.
00352 * @param[in]    file Pointer to the source file name
00353 * @param[in]    line assert_param error line source number
00354 * @return               None
00355 *******************************************************************************/
00356 void check_failed(uint8_t *file, uint32_t line)
00357 {
00358         /* User can add his own implementation to report the file name and line number,
00359          ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
00360
00361         /* Infinite loop */
00362         while(1);
00363 }
00364 #endif
00365
00366 /*
00367  * @}
00368  */
Generated on Tue Jun 7 14:59:02 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/common/syscalls.c Source File

C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/common/syscalls.c

Go to the documentation of this file.
00001 /* Don't need anything here. */
00002 /* Used with GNU compiler only! */
00003
00004 #include <stdlib.h>
00005 #ifndef __IAR_SYSTEMS_ICC__
00006 #include <sys/stat.h>
00007 #endif
00008
00009 int _read_r (struct _reent *r, int file, char * ptr, int len)
00010 {
00011         ( void ) r;
00012         ( void ) file;
00013         ( void ) ptr;
00014         ( void ) len;
00015         return -1;
00016 }
00017
00018 /***************************************************************************/
00019
00020 int _lseek_r (struct _reent *r, int file, int ptr, int dir)
00021 {
00022         ( void ) r;
00023         ( void ) file;
00024         ( void ) ptr;
00025         ( void ) dir;
00026
00027         return 0;
00028 }
00029
00030 /***************************************************************************/
00031
00032 int _write_r (struct _reent *r, int file, char * ptr, int len)
00033 {
00034         ( void ) r;
00035         ( void ) file;
00036         ( void ) ptr;
00037         ( void ) len;
00038
00039         return 0;
00040 }
00041
00042 /***************************************************************************/
00043
00044 int _close_r (struct _reent *r, int file)
00045 {
00046         ( void ) r;
00047         ( void ) file;
00048
00049         return 0;
00050 }
00051
00052 /***************************************************************************/
00053
00054 caddr_t _sbrk_r (struct _reent *r, int incr)
00055 {
00056         ( void ) r;
00057         ( void ) incr;
00058
00059         return 0;
00060 }
00061
00062 /***************************************************************************/
00063
00064 int _fstat_r (struct _reent *r, int file, struct stat * st)
00065 {
00066         ( void ) r;
00067         ( void ) file;
00068         ( void ) st;
00069
00070         return 0;
00071 }
00072
00073 /***************************************************************************/
00074
00075 int _isatty_r(struct _reent *r, int fd)
00076 {
00077         ( void ) r;
00078         ( void ) fd;
00079
00080         return 0;
00081 }
00082
00083
00084
00085
Generated on Tue Jun 7 14:59:00 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CM3/DeviceSupport/NXP/LPC17xx/system_LPC17xx.c Source File

C:/nxpdrv/LPC1700CMSIS/Core/CM3/DeviceSupport/NXP/LPC17xx/system_LPC17xx.c

Go to the documentation of this file.
00001 /**************************************************************************/
00026 #include <stdint.h>
00027 #include "LPC17xx.h"
00028
00029
00034 /*
00035 //-------- <<< Use Configuration Wizard in Context Menu >>> ------------------
00036 */
00037
00038 /*--------------------- Clock Configuration ----------------------------------
00039 //
00040 // <e> Clock Configuration
00041 //   <h> System Controls and Status Register (SCS)
00042 //     <o1.4>    OSCRANGE: Main Oscillator Range Select
00043 //                     <0=>  1 MHz to 20 MHz
00044 //                     <1=> 15 MHz to 24 MHz
00045 //     <e1.5>       OSCEN: Main Oscillator Enable
00046 //     </e>
00047 //   </h>
00048 //
00049 //   <h> Clock Source Select Register (CLKSRCSEL)
00050 //     <o2.0..1>   CLKSRC: PLL Clock Source Selection
00051 //                     <0=> Internal RC oscillator
00052 //                     <1=> Main oscillator
00053 //                     <2=> RTC oscillator
00054 //   </h>
00055 //
00056 //   <e3> PLL0 Configuration (Main PLL)
00057 //     <h> PLL0 Configuration Register (PLL0CFG)
00058 //                     <i> F_cco0 = (2 * M * F_in) / N
00059 //                     <i> F_in must be in the range of 32 kHz to 50 MHz
00060 //                     <i> F_cco0 must be in the range of 275 MHz to 550 MHz
00061 //       <o4.0..14>  MSEL: PLL Multiplier Selection
00062 //                     <6-32768><#-1>
00063 //                     <i> M Value
00064 //       <o4.16..23> NSEL: PLL Divider Selection
00065 //                     <1-256><#-1>
00066 //                     <i> N Value
00067 //     </h>
00068 //   </e>
00069 //
00070 //   <e5> PLL1 Configuration (USB PLL)
00071 //     <h> PLL1 Configuration Register (PLL1CFG)
00072 //                     <i> F_usb = M * F_osc or F_usb = F_cco1 / (2 * P)
00073 //                     <i> F_cco1 = F_osc * M * 2 * P
00074 //                     <i> F_cco1 must be in the range of 156 MHz to 320 MHz
00075 //       <o6.0..4>   MSEL: PLL Multiplier Selection
00076 //                     <1-32><#-1>
00077 //                     <i> M Value (for USB maximum value is 4)
00078 //       <o6.5..6>   PSEL: PLL Divider Selection
00079 //                     <0=> 1
00080 //                     <1=> 2
00081 //                     <2=> 4
00082 //                     <3=> 8
00083 //                     <i> P Value
00084 //     </h>
00085 //   </e>
00086 //
00087 //   <h> CPU Clock Configuration Register (CCLKCFG)
00088 //     <o7.0..7>  CCLKSEL: Divide Value for CPU Clock from PLL0
00089 //                     <3-256><#-1>
00090 //   </h>
00091 //
00092 //   <h> USB Clock Configuration Register (USBCLKCFG)
00093 //     <o8.0..3>   USBSEL: Divide Value for USB Clock from PLL0
00094 //                     <0-15>
00095 //                     <i> Divide is USBSEL + 1
00096 //   </h>
00097 //
00098 //   <h> Peripheral Clock Selection Register 0 (PCLKSEL0)
00099 //     <o9.0..1>    PCLK_WDT: Peripheral Clock Selection for WDT
00100 //                     <0=> Pclk = Cclk / 4
00101 //                     <1=> Pclk = Cclk
00102 //                     <2=> Pclk = Cclk / 2
00103 //                     <3=> Pclk = Hclk / 8
00104 //     <o9.2..3>    PCLK_TIMER0: Peripheral Clock Selection for TIMER0
00105 //                     <0=> Pclk = Cclk / 4
00106 //                     <1=> Pclk = Cclk
00107 //                     <2=> Pclk = Cclk / 2
00108 //                     <3=> Pclk = Hclk / 8
00109 //     <o9.4..5>    PCLK_TIMER1: Peripheral Clock Selection for TIMER1
00110 //                     <0=> Pclk = Cclk / 4
00111 //                     <1=> Pclk = Cclk
00112 //                     <2=> Pclk = Cclk / 2
00113 //                     <3=> Pclk = Hclk / 8
00114 //     <o9.6..7>    PCLK_UART0: Peripheral Clock Selection for UART0
00115 //                     <0=> Pclk = Cclk / 4
00116 //                     <1=> Pclk = Cclk
00117 //                     <2=> Pclk = Cclk / 2
00118 //                     <3=> Pclk = Hclk / 8
00119 //     <o9.8..9>    PCLK_UART1: Peripheral Clock Selection for UART1
00120 //                     <0=> Pclk = Cclk / 4
00121 //                     <1=> Pclk = Cclk
00122 //                     <2=> Pclk = Cclk / 2
00123 //                     <3=> Pclk = Hclk / 8
00124 //     <o9.12..13>  PCLK_PWM1: Peripheral Clock Selection for PWM1
00125 //                     <0=> Pclk = Cclk / 4
00126 //                     <1=> Pclk = Cclk
00127 //                     <2=> Pclk = Cclk / 2
00128 //                     <3=> Pclk = Hclk / 8
00129 //     <o9.14..15>  PCLK_I2C0: Peripheral Clock Selection for I2C0
00130 //                     <0=> Pclk = Cclk / 4
00131 //                     <1=> Pclk = Cclk
00132 //                     <2=> Pclk = Cclk / 2
00133 //                     <3=> Pclk = Hclk / 8
00134 //     <o9.16..17>  PCLK_SPI: Peripheral Clock Selection for SPI
00135 //                     <0=> Pclk = Cclk / 4
00136 //                     <1=> Pclk = Cclk
00137 //                     <2=> Pclk = Cclk / 2
00138 //                     <3=> Pclk = Hclk / 8
00139 //     <o9.20..21>  PCLK_SSP1: Peripheral Clock Selection for SSP1
00140 //                     <0=> Pclk = Cclk / 4
00141 //                     <1=> Pclk = Cclk
00142 //                     <2=> Pclk = Cclk / 2
00143 //                     <3=> Pclk = Hclk / 8
00144 //     <o9.22..23>  PCLK_DAC: Peripheral Clock Selection for DAC
00145 //                     <0=> Pclk = Cclk / 4
00146 //                     <1=> Pclk = Cclk
00147 //                     <2=> Pclk = Cclk / 2
00148 //                     <3=> Pclk = Hclk / 8
00149 //     <o9.24..25>  PCLK_ADC: Peripheral Clock Selection for ADC
00150 //                     <0=> Pclk = Cclk / 4
00151 //                     <1=> Pclk = Cclk
00152 //                     <2=> Pclk = Cclk / 2
00153 //                     <3=> Pclk = Hclk / 8
00154 //     <o9.26..27>  PCLK_CAN1: Peripheral Clock Selection for CAN1
00155 //                     <0=> Pclk = Cclk / 4
00156 //                     <1=> Pclk = Cclk
00157 //                     <2=> Pclk = Cclk / 2
00158 //                     <3=> Pclk = Hclk / 6
00159 //     <o9.28..29>  PCLK_CAN2: Peripheral Clock Selection for CAN2
00160 //                     <0=> Pclk = Cclk / 4
00161 //                     <1=> Pclk = Cclk
00162 //                     <2=> Pclk = Cclk / 2
00163 //                     <3=> Pclk = Hclk / 6
00164 //     <o9.30..31>  PCLK_ACF: Peripheral Clock Selection for ACF
00165 //                     <0=> Pclk = Cclk / 4
00166 //                     <1=> Pclk = Cclk
00167 //                     <2=> Pclk = Cclk / 2
00168 //                     <3=> Pclk = Hclk / 6
00169 //   </h>
00170 //
00171 //   <h> Peripheral Clock Selection Register 1 (PCLKSEL1)
00172 //     <o10.0..1>   PCLK_QEI: Peripheral Clock Selection for the Quadrature Encoder Interface
00173 //                     <0=> Pclk = Cclk / 4
00174 //                     <1=> Pclk = Cclk
00175 //                     <2=> Pclk = Cclk / 2
00176 //                     <3=> Pclk = Hclk / 8
00177 //     <o10.2..3>   PCLK_GPIO: Peripheral Clock Selection for GPIOs
00178 //                     <0=> Pclk = Cclk / 4
00179 //                     <1=> Pclk = Cclk
00180 //                     <2=> Pclk = Cclk / 2
00181 //                     <3=> Pclk = Hclk / 8
00182 //     <o10.4..5>   PCLK_PCB: Peripheral Clock Selection for the Pin Connect Block
00183 //                     <0=> Pclk = Cclk / 4
00184 //                     <1=> Pclk = Cclk
00185 //                     <2=> Pclk = Cclk / 2
00186 //                     <3=> Pclk = Hclk / 8
00187 //     <o10.6..7>   PCLK_I2C1: Peripheral Clock Selection for I2C1
00188 //                     <0=> Pclk = Cclk / 4
00189 //                     <1=> Pclk = Cclk
00190 //                     <2=> Pclk = Cclk / 2
00191 //                     <3=> Pclk = Hclk / 8
00192 //     <o10.10..11> PCLK_SSP0: Peripheral Clock Selection for SSP0
00193 //                     <0=> Pclk = Cclk / 4
00194 //                     <1=> Pclk = Cclk
00195 //                     <2=> Pclk = Cclk / 2
00196 //                     <3=> Pclk = Hclk / 8
00197 //     <o10.12..13> PCLK_TIMER2: Peripheral Clock Selection for TIMER2
00198 //                     <0=> Pclk = Cclk / 4
00199 //                     <1=> Pclk = Cclk
00200 //                     <2=> Pclk = Cclk / 2
00201 //                     <3=> Pclk = Hclk / 8
00202 //     <o10.14..15> PCLK_TIMER3: Peripheral Clock Selection for TIMER3
00203 //                     <0=> Pclk = Cclk / 4
00204 //                     <1=> Pclk = Cclk
00205 //                     <2=> Pclk = Cclk / 2
00206 //                     <3=> Pclk = Hclk / 8
00207 //     <o10.16..17> PCLK_UART2: Peripheral Clock Selection for UART2
00208 //                     <0=> Pclk = Cclk / 4
00209 //                     <1=> Pclk = Cclk
00210 //                     <2=> Pclk = Cclk / 2
00211 //                     <3=> Pclk = Hclk / 8
00212 //     <o10.18..19> PCLK_UART3: Peripheral Clock Selection for UART3
00213 //                     <0=> Pclk = Cclk / 4
00214 //                     <1=> Pclk = Cclk
00215 //                     <2=> Pclk = Cclk / 2
00216 //                     <3=> Pclk = Hclk / 8
00217 //     <o10.20..21> PCLK_I2C2: Peripheral Clock Selection for I2C2
00218 //                     <0=> Pclk = Cclk / 4
00219 //                     <1=> Pclk = Cclk
00220 //                     <2=> Pclk = Cclk / 2
00221 //                     <3=> Pclk = Hclk / 8
00222 //     <o10.22..23> PCLK_I2S: Peripheral Clock Selection for I2S
00223 //                     <0=> Pclk = Cclk / 4
00224 //                     <1=> Pclk = Cclk
00225 //                     <2=> Pclk = Cclk / 2
00226 //                     <3=> Pclk = Hclk / 8
00227 //     <o10.26..27> PCLK_RIT: Peripheral Clock Selection for the Repetitive Interrupt Timer
00228 //                     <0=> Pclk = Cclk / 4
00229 //                     <1=> Pclk = Cclk
00230 //                     <2=> Pclk = Cclk / 2
00231 //                     <3=> Pclk = Hclk / 8
00232 //     <o10.28..29> PCLK_SYSCON: Peripheral Clock Selection for the System Control Block
00233 //                     <0=> Pclk = Cclk / 4
00234 //                     <1=> Pclk = Cclk
00235 //                     <2=> Pclk = Cclk / 2
00236 //                     <3=> Pclk = Hclk / 8
00237 //     <o10.30..31> PCLK_MC: Peripheral Clock Selection for the Motor Control PWM
00238 //                     <0=> Pclk = Cclk / 4
00239 //                     <1=> Pclk = Cclk
00240 //                     <2=> Pclk = Cclk / 2
00241 //                     <3=> Pclk = Hclk / 8
00242 //   </h>
00243 //
00244 //   <h> Power Control for Peripherals Register (PCONP)
00245 //     <o11.1>      PCTIM0: Timer/Counter 0 power/clock enable
00246 //     <o11.2>      PCTIM1: Timer/Counter 1 power/clock enable
00247 //     <o11.3>      PCUART0: UART 0 power/clock enable
00248 //     <o11.4>      PCUART1: UART 1 power/clock enable
00249 //     <o11.6>      PCPWM1: PWM 1 power/clock enable
00250 //     <o11.7>      PCI2C0: I2C interface 0 power/clock enable
00251 //     <o11.8>      PCSPI: SPI interface power/clock enable
00252 //     <o11.9>      PCRTC: RTC power/clock enable
00253 //     <o11.10>     PCSSP1: SSP interface 1 power/clock enable
00254 //     <o11.12>     PCAD: A/D converter power/clock enable
00255 //     <o11.13>     PCCAN1: CAN controller 1 power/clock enable
00256 //     <o11.14>     PCCAN2: CAN controller 2 power/clock enable
00257 //     <o11.15>     PCGPIO: GPIOs power/clock enable
00258 //     <o11.16>     PCRIT: Repetitive interrupt timer power/clock enable
00259 //     <o11.17>     PCMC: Motor control PWM power/clock enable
00260 //     <o11.18>     PCQEI: Quadrature encoder interface power/clock enable
00261 //     <o11.19>     PCI2C1: I2C interface 1 power/clock enable
00262 //     <o11.21>     PCSSP0: SSP interface 0 power/clock enable
00263 //     <o11.22>     PCTIM2: Timer 2 power/clock enable
00264 //     <o11.23>     PCTIM3: Timer 3 power/clock enable
00265 //     <o11.24>     PCUART2: UART 2 power/clock enable
00266 //     <o11.25>     PCUART3: UART 3 power/clock enable
00267 //     <o11.26>     PCI2C2: I2C interface 2 power/clock enable
00268 //     <o11.27>     PCI2S: I2S interface power/clock enable
00269 //     <o11.29>     PCGPDMA: GP DMA function power/clock enable
00270 //     <o11.30>     PCENET: Ethernet block power/clock enable
00271 //     <o11.31>     PCUSB: USB interface power/clock enable
00272 //   </h>
00273 //
00274 //   <h> Clock Output Configuration Register (CLKOUTCFG)
00275 //     <o12.0..3>   CLKOUTSEL: Selects clock source for CLKOUT
00276 //                     <0=> CPU clock
00277 //                     <1=> Main oscillator
00278 //                     <2=> Internal RC oscillator
00279 //                     <3=> USB clock
00280 //                     <4=> RTC oscillator
00281 //     <o12.4..7>   CLKOUTDIV: Selects clock divider for CLKOUT
00282 //                     <1-16><#-1>
00283 //     <o12.8>      CLKOUT_EN: CLKOUT enable control
00284 //   </h>
00285 //
00286 // </e>
00287 */
00288
00289
00290
00295 #define CLOCK_SETUP           1
00296 #define SCS_Val               0x00000020
00297 #define CLKSRCSEL_Val         0x00000001
00298 #define PLL0_SETUP            1
00299 #define PLL0CFG_Val           0x00050063
00300 #define PLL1_SETUP            1
00301 #define PLL1CFG_Val           0x00000023
00302 #define CCLKCFG_Val           0x00000003
00303 #define USBCLKCFG_Val         0x00000000
00304 #define PCLKSEL0_Val          0x00000000
00305 #define PCLKSEL1_Val          0x00000000
00306 #define PCONP_Val             0x042887DE
00307 #define CLKOUTCFG_Val         0x00000000
00308
00309
00310 /*--------------------- Flash Accelerator Configuration ----------------------
00311 //
00312 // <e> Flash Accelerator Configuration
00313 //   <o1.0..11>  Reserved
00314 //   <o1.12..15> FLASHTIM: Flash Access Time
00315 //               <0=> 1 CPU clock (for CPU clock up to 20 MHz)
00316 //               <1=> 2 CPU clocks (for CPU clock up to 40 MHz)
00317 //               <2=> 3 CPU clocks (for CPU clock up to 60 MHz)
00318 //               <3=> 4 CPU clocks (for CPU clock up to 80 MHz)
00319 //               <4=> 5 CPU clocks (for CPU clock up to 100 MHz)
00320 //               <5=> 6 CPU clocks (for any CPU clock)
00321 // </e>
00322 */
00323 #define FLASH_SETUP           1
00324 #define FLASHCFG_Val          0x0000303A
00325
00326 /*
00327 //-------- <<< end of configuration section >>> ------------------------------
00328 */
00329
00330 /*----------------------------------------------------------------------------
00331   Check the register settings
00332  *----------------------------------------------------------------------------*/
00333 #define CHECK_RANGE(val, min, max)                ((val < min) || (val > max))
00334 #define CHECK_RSVD(val, mask)                     (val & mask)
00335
00336 /* Clock Configuration -------------------------------------------------------*/
00337 #if (CHECK_RSVD((SCS_Val),       ~0x00000030))
00338    #error "SCS: Invalid values of reserved bits!"
00339 #endif
00340
00341 #if (CHECK_RANGE((CLKSRCSEL_Val), 0, 2))
00342    #error "CLKSRCSEL: Value out of range!"
00343 #endif
00344
00345 #if (CHECK_RSVD((PLL0CFG_Val),   ~0x00FF7FFF))
00346    #error "PLL0CFG: Invalid values of reserved bits!"
00347 #endif
00348
00349 #if (CHECK_RSVD((PLL1CFG_Val),   ~0x0000007F))
00350    #error "PLL1CFG: Invalid values of reserved bits!"
00351 #endif
00352
00353 #if ((CCLKCFG_Val != 0) && (((CCLKCFG_Val - 1) % 2)))
00354    #error "CCLKCFG: CCLKSEL field does not contain only odd values or 0!"
00355 #endif
00356
00357 #if (CHECK_RSVD((USBCLKCFG_Val), ~0x0000000F))
00358    #error "USBCLKCFG: Invalid values of reserved bits!"
00359 #endif
00360
00361 #if (CHECK_RSVD((PCLKSEL0_Val),   0x000C0C00))
00362    #error "PCLKSEL0: Invalid values of reserved bits!"
00363 #endif
00364
00365 #if (CHECK_RSVD((PCLKSEL1_Val),   0x03000300))
00366    #error "PCLKSEL1: Invalid values of reserved bits!"
00367 #endif
00368
00369 #if (CHECK_RSVD((PCONP_Val),      0x10100821))
00370    #error "PCONP: Invalid values of reserved bits!"
00371 #endif
00372
00373 #if (CHECK_RSVD((CLKOUTCFG_Val), ~0x000001FF))
00374    #error "CLKOUTCFG: Invalid values of reserved bits!"
00375 #endif
00376
00377 /* Flash Accelerator Configuration -------------------------------------------*/
00378 #if (CHECK_RSVD((FLASHCFG_Val), ~0x0000F07F))
00379    #error "FLASHCFG: Invalid values of reserved bits!"
00380 #endif
00381
00382
00383 /*----------------------------------------------------------------------------
00384   DEFINES
00385  *----------------------------------------------------------------------------*/
00386
00387 /*----------------------------------------------------------------------------
00388   Define clocks
00389  *----------------------------------------------------------------------------*/
00390 #define XTAL        (12000000UL)        /* Oscillator frequency               */
00391 #define OSC_CLK     (      XTAL)        /* Main oscillator frequency          */
00392 #define RTC_CLK     (   32768UL)        /* RTC oscillator frequency           */
00393 #define IRC_OSC     ( 4000000UL)        /* Internal RC oscillator frequency   */
00394
00395
00396 /* F_cco0 = (2 * M * F_in) / N  */
00397 #define __M               (((PLL0CFG_Val      ) & 0x7FFF) + 1)
00398 #define __N               (((PLL0CFG_Val >> 16) & 0x00FF) + 1)
00399 #define __FCCO(__F_IN)    ((2 * __M * __F_IN) / __N)
00400 #define __CCLK_DIV        (((CCLKCFG_Val      ) & 0x00FF) + 1)
00401
00402 /* Determine core clock frequency according to settings */
00403  #if (PLL0_SETUP)
00404     #if   ((CLKSRCSEL_Val & 0x03) == 1)
00405         #define __CORE_CLK (__FCCO(OSC_CLK) / __CCLK_DIV)
00406     #elif ((CLKSRCSEL_Val & 0x03) == 2)
00407         #define __CORE_CLK (__FCCO(RTC_CLK) / __CCLK_DIV)
00408     #else
00409         #define __CORE_CLK (__FCCO(IRC_OSC) / __CCLK_DIV)
00410     #endif
00411  #else
00412     #if   ((CLKSRCSEL_Val & 0x03) == 1)
00413         #define __CORE_CLK (OSC_CLK         / __CCLK_DIV)
00414     #elif ((CLKSRCSEL_Val & 0x03) == 2)
00415         #define __CORE_CLK (RTC_CLK         / __CCLK_DIV)
00416     #else
00417         #define __CORE_CLK (IRC_OSC         / __CCLK_DIV)
00418     #endif
00419  #endif
00420
00429 /*----------------------------------------------------------------------------
00430   Clock Variable definitions
00431  *----------------------------------------------------------------------------*/
00432 uint32_t SystemCoreClock = __CORE_CLK;
00443 /*----------------------------------------------------------------------------
00444   Clock functions
00445  *----------------------------------------------------------------------------*/
00446
00447
00448 void SystemCoreClockUpdate (void)            /* Get Core Clock Frequency      */
00449 {
00450   /* Determine clock frequency according to clock register values             */
00451   if (((LPC_SC->PLL0STAT >> 24) & 3) == 3) { /* If PLL0 enabled and connected */
00452     switch (LPC_SC->CLKSRCSEL & 0x03) {
00453       case 0:                                /* Int. RC oscillator => PLL0    */
00454       case 3:                                /* Reserved, default to Int. RC  */
00455         SystemCoreClock = (IRC_OSC *
00456                           ((2 * ((LPC_SC->PLL0STAT & 0x7FFF) + 1)))  /
00457                           (((LPC_SC->PLL0STAT >> 16) & 0xFF) + 1)    /
00458                           ((LPC_SC->CCLKCFG & 0xFF)+ 1));
00459         break;
00460       case 1:                                /* Main oscillator => PLL0       */
00461         SystemCoreClock = (OSC_CLK *
00462                           ((2 * ((LPC_SC->PLL0STAT & 0x7FFF) + 1)))  /
00463                           (((LPC_SC->PLL0STAT >> 16) & 0xFF) + 1)    /
00464                           ((LPC_SC->CCLKCFG & 0xFF)+ 1));
00465         break;
00466       case 2:                                /* RTC oscillator => PLL0        */
00467         SystemCoreClock = (RTC_CLK *
00468                           ((2 * ((LPC_SC->PLL0STAT & 0x7FFF) + 1)))  /
00469                           (((LPC_SC->PLL0STAT >> 16) & 0xFF) + 1)    /
00470                           ((LPC_SC->CCLKCFG & 0xFF)+ 1));
00471         break;
00472     }
00473   } else {
00474     switch (LPC_SC->CLKSRCSEL & 0x03) {
00475       case 0:                                /* Int. RC oscillator => PLL0    */
00476       case 3:                                /* Reserved, default to Int. RC  */
00477         SystemCoreClock = IRC_OSC / ((LPC_SC->CCLKCFG & 0xFF)+ 1);
00478         break;
00479       case 1:                                /* Main oscillator => PLL0       */
00480         SystemCoreClock = OSC_CLK / ((LPC_SC->CCLKCFG & 0xFF)+ 1);
00481         break;
00482       case 2:                                /* RTC oscillator => PLL0        */
00483         SystemCoreClock = RTC_CLK / ((LPC_SC->CCLKCFG & 0xFF)+ 1);
00484         break;
00485     }
00486   }
00487
00488 }
00489
00499 void SystemInit (void)
00500 {
00501 #if (CLOCK_SETUP)                       /* Clock Setup                        */
00502   LPC_SC->SCS       = SCS_Val;
00503   if (LPC_SC->SCS & (1 << 5)) {             /* If Main Oscillator is enabled  */
00504     while ((LPC_SC->SCS & (1<<6)) == 0);/* Wait for Oscillator to be ready    */
00505   }
00506
00507   LPC_SC->CCLKCFG   = CCLKCFG_Val;      /* Setup Clock Divider                */
00508   /* Periphral clock must be selected before PLL0 enabling and connecting
00509    * - according errata.lpc1768-16.March.2010 -
00510    */
00511   LPC_SC->PCLKSEL0  = PCLKSEL0_Val;     /* Peripheral Clock Selection         */
00512   LPC_SC->PCLKSEL1  = PCLKSEL1_Val;
00513
00514 #if (PLL0_SETUP)
00515   LPC_SC->CLKSRCSEL = CLKSRCSEL_Val;    /* Select Clock Source for PLL0       */
00516
00517   LPC_SC->PLL0CFG   = PLL0CFG_Val;      /* configure PLL0                     */
00518   LPC_SC->PLL0FEED  = 0xAA;
00519   LPC_SC->PLL0FEED  = 0x55;
00520
00521   LPC_SC->PLL0CON   = 0x01;             /* PLL0 Enable                        */
00522   LPC_SC->PLL0FEED  = 0xAA;
00523   LPC_SC->PLL0FEED  = 0x55;
00524   while (!(LPC_SC->PLL0STAT & (1<<26)));/* Wait for PLOCK0                    */
00525
00526   LPC_SC->PLL0CON   = 0x03;             /* PLL0 Enable & Connect              */
00527   LPC_SC->PLL0FEED  = 0xAA;
00528   LPC_SC->PLL0FEED  = 0x55;
00529   while (!(LPC_SC->PLL0STAT & ((1<<25) | (1<<24))));/* Wait for PLLC0_STAT & PLLE0_STAT */
00530 #endif
00531
00532 #if (PLL1_SETUP)
00533   LPC_SC->PLL1CFG   = PLL1CFG_Val;
00534   LPC_SC->PLL1FEED  = 0xAA;
00535   LPC_SC->PLL1FEED  = 0x55;
00536
00537   LPC_SC->PLL1CON   = 0x01;             /* PLL1 Enable                        */
00538   LPC_SC->PLL1FEED  = 0xAA;
00539   LPC_SC->PLL1FEED  = 0x55;
00540   while (!(LPC_SC->PLL1STAT & (1<<10)));/* Wait for PLOCK1                    */
00541
00542   LPC_SC->PLL1CON   = 0x03;             /* PLL1 Enable & Connect              */
00543   LPC_SC->PLL1FEED  = 0xAA;
00544   LPC_SC->PLL1FEED  = 0x55;
00545   while (!(LPC_SC->PLL1STAT & ((1<< 9) | (1<< 8))));/* Wait for PLLC1_STAT & PLLE1_STAT */
00546 #else
00547   LPC_SC->USBCLKCFG = USBCLKCFG_Val;    /* Setup USB Clock Divider            */
00548 #endif
00549   LPC_SC->PCONP     = PCONP_Val;        /* Power Control for Peripherals      */
00550
00551   LPC_SC->CLKOUTCFG = CLKOUTCFG_Val;    /* Clock Output Configuration         */
00552 #endif
00553
00554 #if (FLASH_SETUP == 1)                  /* Flash Accelerator Setup            */
00555   LPC_SC->FLASHCFG  = FLASHCFG_Val;
00556 #endif
00557
00558 //  Set Vector table offset value
00559 #if (__RAM_MODE__==1)
00560   SCB->VTOR  = 0x10000000 & 0x3FFFFF80;
00561 #else
00562   SCB->VTOR  = 0x00000000 & 0x3FFFFF80;
00563 #endif
00564 }
00565
Generated on Tue Jun 7 14:58:55 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CM3/DeviceSupport/NXP/LPC17xx/system_LPC17xx.h Source File

C:/nxpdrv/LPC1700CMSIS/Core/CM3/DeviceSupport/NXP/LPC17xx/system_LPC17xx.h

Go to the documentation of this file.
00001 /**************************************************************************/
00026 #ifndef __SYSTEM_LPC17xx_H
00027 #define __SYSTEM_LPC17xx_H
00028
00029 #ifdef __cplusplus
00030 extern "C" {
00031 #endif
00032
00033 #include <stdint.h>
00034
00040 extern uint32_t SystemCoreClock;
00052 extern void SystemInit (void);
00053
00063 extern void SystemCoreClockUpdate (void);
00064 #ifdef __cplusplus
00065 }
00066 #endif
00067
00072 #endif /* __SYSTEM_LPC17xx_H */
Generated on Tue Jun 7 14:58:55 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/SysTick/STCLK/systick_stclk.c Source File

C:/nxpdrv/LPC1700CMSIS/Examples/SysTick/STCLK/systick_stclk.c

Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          systick_stclk.c                         2010-05-21
00003 */
00026 #include "lpc17xx_libcfg.h"
00027 #include "lpc17xx_gpio.h"
00028 #include "lpc17xx_systick.h"
00029 #include "lpc17xx_pinsel.h"
00030 #include "lpc17xx_timer.h"
00031
00032 /* Example group ----------------------------------------------------------- */
00038 /************************** PRIVATE VARIABLES *************************/
00039 FunctionalState Cur_State = ENABLE;
00040 Bool IO_State = FALSE;
00041
00042 /************************** PRIVATE FUNCTIONS *************************/
00043 void SysTick_Handler(void);
00044
00045 /*----------------- INTERRUPT SERVICE ROUTINES --------------------------*/
00046 /*********************************************************************/
00051 void SysTick_Handler(void)
00052 {
00053         //Clear System Tick counter flag
00054         SYSTICK_ClearCounterFlag();
00055         //toggle P0.0
00056         if (Cur_State == ENABLE)
00057         {
00058                 //pull-down pin
00059                 GPIO_ClearValue(0, (1<<0));
00060                 Cur_State = DISABLE;
00061         }
00062         else
00063         {
00064                 GPIO_SetValue(0, (1<<0));
00065                 Cur_State = ENABLE;
00066         }
00067 }
00068
00069
00070 /*-------------------------MAIN FUNCTION------------------------------*/
00071 /*********************************************************************/
00076 int c_entry (void)
00077 {
00078         PINSEL_CFG_Type PinCfg;
00079         TIM_TIMERCFG_Type TIM_ConfigStruct;
00080         TIM_MATCHCFG_Type TIM_MatchConfigStruct;
00081
00082         // Conifg P1.28 as MAT0.0
00083         PinCfg.Funcnum = 3;
00084         PinCfg.OpenDrain = 0;
00085         PinCfg.Pinmode = 0;
00086         PinCfg.Portnum = 1;
00087         PinCfg.Pinnum = 28;
00088         PINSEL_ConfigPin(&PinCfg);
00089
00090         /* P3.26 as STCLK */
00091         PinCfg.Funcnum = 1;
00092         PinCfg.OpenDrain = 0;
00093         PinCfg.Pinmode = 0;
00094         PinCfg.Portnum = 3;
00095         PinCfg.Pinnum = 26;
00096         PINSEL_ConfigPin(&PinCfg);
00097
00098         // Initialize timer 0, prescale count time of 10uS
00099         TIM_ConfigStruct.PrescaleOption = TIM_PRESCALE_USVAL;
00100         TIM_ConfigStruct.PrescaleValue  = 10;
00101
00102         // use channel 0, MR0
00103         TIM_MatchConfigStruct.MatchChannel = 0;
00104         // Disable interrupt when MR0 matches the value in TC register
00105         TIM_MatchConfigStruct.IntOnMatch   = TRUE;
00106         //Enable reset on MR0: TIMER will reset if MR0 matches it
00107         TIM_MatchConfigStruct.ResetOnMatch = TRUE;
00108         //Stop on MR0 if MR0 matches it
00109         TIM_MatchConfigStruct.StopOnMatch  = FALSE;
00110         //Toggle MR0.0 pin if MR0 matches it
00111         TIM_MatchConfigStruct.ExtMatchOutputType =TIM_EXTMATCH_TOGGLE;
00112         // Set Match value, count value of 10 (10 * 10uS = 100uS --> 10KHz)
00113         TIM_MatchConfigStruct.MatchValue   = 10;
00114
00115         TIM_Init(LPC_TIM0, TIM_TIMER_MODE,&TIM_ConfigStruct);
00116         TIM_ConfigMatch(LPC_TIM0,&TIM_MatchConfigStruct);
00117         TIM_Cmd(LPC_TIM0,ENABLE);
00118
00119         GPIO_SetDir(0, (1<<0), 1); //Set P0.0 as output
00120
00121         //Use P0.0 to test System Tick interrupt
00122         /* Initialize System Tick with 10ms time interval
00123          * Frequency input = 10kHz /2 = 5kHz
00124          * Time input = 10ms
00125          */
00126         SYSTICK_ExternalInit(5000, 10);
00127         //Enable System Tick interrupt
00128         SYSTICK_IntCmd(ENABLE);
00129         //Enable System Tick Counter
00130         SYSTICK_Cmd(ENABLE);
00131
00132         while(1);
00133         return 1;
00134 }
00135
00136
00137 /* With ARM and GHS toolsets, the entry point is main() - this will
00138    allow the linker to generate wrapper code to setup stacks, allocate
00139    heap area, and initialize and copy code and data segments. For GNU
00140    toolsets, the entry point is through __start() in the crt0_gnu.asm
00141    file, and that startup code will setup stacks and data */
00142 int main(void)
00143 {
00144     return c_entry();
00145 }
00146
00147 #ifdef  DEBUG
00148 /*******************************************************************************
00149 * @brief                Reports the name of the source file and the source line number
00150 *                               where the CHECK_PARAM error has occurred.
00151 * @param[in]    file Pointer to the source file name
00152 * @param[in]    line assert_param error line source number
00153 * @return               None
00154 *******************************************************************************/
00155 void check_failed(uint8_t *file, uint32_t line)
00156 {
00157         /* User can add his own implementation to report the file name and line number,
00158          ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
00159
00160         /* Infinite loop */
00161         while(1);
00162 }
00163 #endif
00164
00165 /*
00166  * @}
00167  */
Generated on Tue Jun 7 14:59:03 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/Easy_Web/tcpip.c Source File

C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/Easy_Web/tcpip.c

Go to the documentation of this file.
00001 /******************************************************************
00002  *****                                                        *****
00003  *****  Name: tcpip.c                                         *****
00004  *****  Ver.: 1.0                                             *****
00005  *****  Date: 07/05/2001                                      *****
00006  *****  Auth: Andreas Dannenberg                              *****
00007  *****        HTWK Leipzig                                    *****
00008  *****        university of applied sciences                  *****
00009  *****        Germany                                         *****
00010  *****  Func: implements the TCP/IP-stack and provides a      *****
00011  *****        simple API to the user                          *****
00012  *****                                                        *****
00013  ******************************************************************/
00014
00015 #include "tcpip.h"
00016 #include "EMAC.h"         // Keil: Line added
00017 #include <string.h>       // Keil: Line added
00018
00019 // NXP: Include some header files that diifers from the origin
00020 #include "lpc17xx_libcfg.h"
00021 #include "lpc17xx_pinsel.h"
00022 //#include "lpc17xx_emac.h"
00023 #include "adc.h"
00024
00025 /* For debugging... */
00026 #include "debug_frmwrk.h"
00027 #include <stdio.h>
00028 #define DB      _DBG((uint8_t *)db_)
00029 char db_[64];
00030 uint16_t _tickVal;
00031
00032 #ifdef MCB_LPC_1768
00033 #define LED_PIN (1<<6) // P2.6
00034 #define LED2_MASK       ((1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6))
00035 #define LED1_MASK       ((1<<28) | (1<<29) | (1<<31))
00036 #elif defined(IAR_LPC_1768)
00037 #define LED_PIN (1<<25)  //P1.25
00038 #define LED2_MASK ((1<<4))
00039 #define LED1_MASK ((1<<25))
00040 #endif
00041
00042 const unsigned char MyMAC[6] =   // "M1-M2-M3-M4-M5-M6"
00043 {
00044   MYMAC_1, MYMAC_2, MYMAC_3,
00045   MYMAC_4, MYMAC_5, MYMAC_6
00046 };
00047
00048 // NXP LowLevel initializing implementation
00049 // System tick period definition (in microsecond)
00050 #define SYSTICK_PERIOD 210000UL
00051
00052 // System tick interrupt handler prototype
00053 void SysTick_Handler (void);
00054
00055 void LED_Init (void)
00056 {
00057         PINSEL_CFG_Type PinCfg;
00058
00059         uint8_t temp;
00060 #ifdef MCB_LPC_1768
00061         PinCfg.Funcnum = 0;
00062         PinCfg.OpenDrain = 0;
00063         PinCfg.Pinmode = 0;
00064         PinCfg.Portnum = 2;
00065         for (temp = 2; temp <= 6; temp++){
00066                 PinCfg.Pinnum = temp;
00067                 PINSEL_ConfigPin(&PinCfg);
00068         }
00069
00070         PinCfg.Funcnum = 0;
00071         PinCfg.OpenDrain = 0;
00072         PinCfg.Pinmode = 0;
00073         PinCfg.Portnum = 1;
00074         PinCfg.Pinnum = 28;
00075         PINSEL_ConfigPin(&PinCfg);
00076         PinCfg.Pinnum = 29;
00077         PINSEL_ConfigPin(&PinCfg);
00078         PinCfg.Pinnum = 31;
00079         PINSEL_ConfigPin(&PinCfg);
00080
00081         // Set direction to output
00082         LPC_GPIO2->FIODIR |= LED2_MASK;
00083         LPC_GPIO1->FIODIR |= LED1_MASK;
00084
00085         /* Turn off all LEDs */
00086         LPC_GPIO2->FIOCLR = LED2_MASK;
00087         LPC_GPIO1->FIOCLR = LED1_MASK;
00088 #elif defined(IAR_LPC_1768)
00089         LPC_GPIO0->FIODIR |= LED2_MASK;
00090         LPC_GPIO1->FIODIR |= LED1_MASK;
00091
00092         /* Turn off all LEDs */
00093         LPC_GPIO0->FIOSET = LED2_MASK;
00094         LPC_GPIO1->FIOSET = LED1_MASK;
00095 #endif
00096 }
00097 // easyWEB-API function
00098 // initalizes the LAN-controller, reset flags, starts timer-ISR
00099
00100 void TCPLowLevelInit(void)
00101 {
00102         // ADC initializing
00103         ADC_init();
00104
00105         // Initialize LED for system tick timer
00106         LED_Init();
00107
00108         /* Initialize debug via UART0
00109          * – 115200bps
00110          * – 8 data bit
00111          * – No parity
00112          * – 1 stop bit
00113          * – No flow control
00114          */
00115         debug_frmwrk_init();
00116         _DBG_("Hello NXP EMAC");
00117
00118         Init_EMAC();
00119         TransmitControl = 0;
00120         TCPFlags = 0;
00121         TCPStateMachine = CLOSED;
00122         SocketStatus = 0;
00123
00124         // NXP: Initialize System tick timer
00125         // Generate interrupt each SYSTICK_PERIOD microsecond
00126         if (SysTick_Config((4000000/1000000)*SYSTICK_PERIOD)){
00127                 // Capture error
00128                 while (1);
00129         }
00130         _DBG_("Init LowLevelTCP complete!");
00131         sprintf(db_, "IP Address: %d.%d.%d.%d \n\r", MYIP_1, MYIP_2, MYIP_3, MYIP_4);
00132         DB;
00133 }
00134
00135 // easyWEB-API function
00136 // does a passive open (listen on 'MyIP:TCPLocalPort' for an incoming
00137 // connection)
00138
00139 void TCPPassiveOpen(void)
00140 {
00141   if (TCPStateMachine == CLOSED)
00142   {
00143     TCPFlags &= ~TCP_ACTIVE_OPEN;                // let's do a passive open!
00144     TCPStateMachine = LISTENING;
00145     SocketStatus = SOCK_ACTIVE;                  // reset, socket now active
00146   }
00147 }
00148
00149 // easyWEB-API function
00150 // does an active open (tries to establish a connection between
00151 // 'MyIP:TCPLocalPort' and 'RemoteIP:TCPRemotePort')
00152
00153 void TCPActiveOpen(void)
00154 {
00155   if ((TCPStateMachine == CLOSED) || (TCPStateMachine == LISTENING))
00156   {
00157     TCPFlags |= TCP_ACTIVE_OPEN;                 // let's do an active open!
00158     TCPFlags &= ~IP_ADDR_RESOLVED;               // we haven't opponents MAC yet
00159
00160     PrepareARP_REQUEST();                        // ask for MAC by sending a broadcast
00161     LastFrameSent = ARP_REQUEST;
00162     TCPStartRetryTimer();
00163     SocketStatus = SOCK_ACTIVE;                  // reset, socket now active
00164   }
00165 }
00166
00167 // easyWEB-API function
00168 // closes an open connection
00169
00170 void TCPClose(void)
00171 {
00172   switch (TCPStateMachine)
00173   {
00174     case LISTENING :
00175     case SYN_SENT :
00176     {
00177       TCPStateMachine = CLOSED;
00178       TCPFlags = 0;
00179       SocketStatus = 0;
00180       break;
00181     }
00182     case SYN_RECD :
00183     case ESTABLISHED :
00184     {
00185       TCPFlags |= TCP_CLOSE_REQUESTED;
00186       break;
00187     }
00188   }
00189 }
00190
00191 // easyWEB-API function
00192 // releases the receive-buffer and allows easyWEB to store new data
00193 // NOTE: rx-buffer MUST be released periodically, else the other TCP
00194 //       get no ACKs for the data it sent
00195
00196 void TCPReleaseRxBuffer(void)
00197 {
00198   SocketStatus &= ~SOCK_DATA_AVAILABLE;
00199 }
00200
00201 // easyWEB-API function
00202 // transmitts data stored in 'TCP_TX_BUF'
00203 // NOTE: * number of bytes to transmit must have been written to 'TCPTxDataCount'
00204 //       * data-count MUST NOT exceed 'MAX_TCP_TX_DATA_SIZE'
00205
00206 void TCPTransmitTxBuffer(void)
00207 {
00208   if ((TCPStateMachine == ESTABLISHED) || (TCPStateMachine == CLOSE_WAIT))
00209     if (SocketStatus & SOCK_TX_BUF_RELEASED)
00210     {
00211       SocketStatus &= ~SOCK_TX_BUF_RELEASED;               // occupy tx-buffer
00212       TCPUNASeqNr += TCPTxDataCount;                       // advance UNA
00213
00214       TxFrame1Size = ETH_HEADER_SIZE + IP_HEADER_SIZE + TCP_HEADER_SIZE + TCPTxDataCount;
00215       TransmitControl |= SEND_FRAME1;
00216
00217       LastFrameSent = TCP_DATA_FRAME;
00218       TCPStartRetryTimer();
00219     }
00220 }
00221
00222 // Reads the length of the received ethernet frame and checks if the
00223 // destination address is a broadcast message or not
00224 unsigned int IsBroadcast(void) {
00225   unsigned short RecdDestMAC[3];         // 48 bit MAC
00226
00227   RecdFrameLength = StartReadFrame();
00228
00229   CopyFromFrame_EMAC(&RecdDestMAC,  6);           // receive DA to see if it was a broadcast
00230   CopyFromFrame_EMAC(&RecdFrameMAC, 6);           // store SA (for our answer)
00231
00232   if ((RecdDestMAC[0] == 0xFFFF) &&
00233       (RecdDestMAC[1] == 0xFFFF) &&
00234       (RecdDestMAC[2] == 0xFFFF)) {
00235     return(1);
00236   } else {
00237     return (0);
00238   }
00239 }
00240
00241
00242 // easyWEB's 'main()'-function
00243 // must be called from user program periodically (the often - the better)
00244 // handles network, TCP/IP-stack and user events
00245
00246 void DoNetworkStuff(void)
00247 {
00248   if (CheckFrameReceived())                      // Packet received
00249   {
00250     if (IsBroadcast()) {
00251       ProcessEthBroadcastFrame();
00252     } else {
00253       ProcessEthIAFrame();
00254     }
00255     EndReadFrame();                              // release buffer in ethernet controller
00256   }
00257
00258   if (TCPFlags & TCP_TIMER_RUNNING)
00259     if (TCPFlags & TIMER_TYPE_RETRY)
00260     {
00261       if (TCPTimer > RETRY_TIMEOUT)
00262       {
00263         TCPRestartTimer();                       // set a new timeout
00264
00265         if (RetryCounter)
00266         {
00267           TCPHandleRetransmission();             // resend last frame
00268           RetryCounter--;
00269         }
00270         else
00271         {
00272           TCPStopTimer();
00273           TCPHandleTimeout();
00274         }
00275       }
00276     }
00277     else if (TCPTimer > FIN_TIMEOUT)
00278     {
00279       TCPStateMachine = CLOSED;
00280       TCPFlags = 0;                              // reset all flags, stop retransmission...
00281       SocketStatus &= SOCK_DATA_AVAILABLE;       // clear all flags but data available
00282     }
00283
00284   switch (TCPStateMachine)
00285   {
00286     case CLOSED :
00287     case LISTENING :
00288     {
00289       if (TCPFlags & TCP_ACTIVE_OPEN)            // stack has to open a connection?
00290         if (TCPFlags & IP_ADDR_RESOLVED)         // IP resolved?
00291           if (!(TransmitControl & SEND_FRAME2))  // buffer free?
00292           {
00293             TCPSeqNr = ((unsigned long)ISNGenHigh << 16) | (SysTick->VAL & 0xFFFF);  // NXP: changed from T0TC to SysTick->VAL;
00294                                                                 // set local ISN
00295             TCPUNASeqNr = TCPSeqNr;
00296             TCPAckNr = 0;                                       // we don't know what to ACK!
00297             TCPUNASeqNr++;                                      // count SYN as a byte
00298             PrepareTCP_FRAME(TCP_CODE_SYN);                     // send SYN frame
00299             LastFrameSent = TCP_SYN_FRAME;
00300             TCPStartRetryTimer();                               // we NEED a retry-timeout
00301             TCPStateMachine = SYN_SENT;
00302           }
00303       break;
00304     }
00305     case SYN_RECD :
00306     case ESTABLISHED :
00307     {
00308       if (TCPFlags & TCP_CLOSE_REQUESTED)                  // user has user initated a close?
00309         if (!(TransmitControl & (SEND_FRAME2 | SEND_FRAME1)))   // buffers free?
00310           if (TCPSeqNr == TCPUNASeqNr)                          // all data ACKed?
00311           {
00312             TCPUNASeqNr++;
00313             PrepareTCP_FRAME(TCP_CODE_FIN | TCP_CODE_ACK);
00314             LastFrameSent = TCP_FIN_FRAME;
00315             TCPStartRetryTimer();
00316             TCPStateMachine = FIN_WAIT_1;
00317           }
00318       break;
00319     }
00320     case CLOSE_WAIT :
00321     {
00322       if (!(TransmitControl & (SEND_FRAME2 | SEND_FRAME1)))     // buffers free?
00323         if (TCPSeqNr == TCPUNASeqNr)                            // all data ACKed?
00324         {
00325           TCPUNASeqNr++;                                        // count FIN as a byte
00326           PrepareTCP_FRAME(TCP_CODE_FIN | TCP_CODE_ACK);        // we NEED a retry-timeout
00327           LastFrameSent = TCP_FIN_FRAME;                        // time to say goodbye...
00328           TCPStartRetryTimer();
00329           TCPStateMachine = LAST_ACK;
00330         }
00331       break;
00332     }
00333   }
00334
00335   if (TransmitControl & SEND_FRAME2)
00336   {
00337     RequestSend(TxFrame2Size);
00338
00339     if (Rdy4Tx()) {                               // NOTE: when using a very fast MCU, maybe
00340         _DBG_("Send Frm2");
00341         SendFrame2();                              // the EMAC isn't ready yet, include
00342     } else {                                       // a kind of timer or counter here
00343       TCPStateMachine = CLOSED;
00344       SocketStatus = SOCK_ERR_ETHERNET;          // indicate an error to user
00345       TCPFlags = 0;                              // clear all flags, stop timers etc.
00346     }
00347
00348     TransmitControl &= ~SEND_FRAME2;             // clear tx-flag
00349   }
00350
00351   if (TransmitControl & SEND_FRAME1)
00352   {
00353     PrepareTCP_DATA_FRAME();                     // build frame w/ actual SEQ, ACK....
00354     RequestSend(TxFrame1Size);
00355
00356     if (Rdy4Tx()){                                // EMAC ready to accept our frame?
00357         _DBG_("Send Frm1");
00358         SendFrame1();                              // (see note above)
00359     } else {
00360       TCPStateMachine = CLOSED;
00361       SocketStatus = SOCK_ERR_ETHERNET;          // indicate an error to user
00362       TCPFlags = 0;                              // clear all flags, stop timers etc.
00363     }
00364
00365     TransmitControl &= ~SEND_FRAME1;             // clear tx-flag
00366   }
00367 }
00368
00369 // easyWEB internal function
00370 // handles an incoming broadcast frame
00371
00372 void ProcessEthBroadcastFrame(void)
00373 {
00374   unsigned short TargetIP[2];
00375
00376   if (ReadFrameBE_EMAC() == FRAME_ARP)           // get frame type, check for ARP
00377     if (ReadFrameBE_EMAC() == HARDW_ETH10)       // Ethernet frame
00378       if (ReadFrameBE_EMAC() == FRAME_IP)        // check protocol
00379         if (ReadFrameBE_EMAC() == IP_HLEN_PLEN)  // check HLEN, PLEN
00380           if (ReadFrameBE_EMAC() == OP_ARP_REQUEST)
00381           {
00382             DummyReadFrame_EMAC(6);              // ignore sender's hardware address
00383             CopyFromFrame_EMAC(&RecdFrameIP, 4); // read sender's protocol address
00384             DummyReadFrame_EMAC(6);              // ignore target's hardware address
00385             CopyFromFrame_EMAC(&TargetIP, 4);    // read target's protocol address
00386             if (!memcmp(&MyIP, &TargetIP, 4))    // is it for us?
00387               PrepareARP_ANSWER();               // yes->create ARP_ANSWER frame
00388           }
00389 }
00390
00391 // easyWEB internal function
00392 // handles an incoming frame that passed EMAC's address filter
00393 // (individual addressed = IA)
00394
00395 void ProcessEthIAFrame(void)
00396 {
00397   unsigned short TargetIP[2];
00398   unsigned char ProtocolType;
00399
00400   switch (ReadFrameBE_EMAC())                     // get frame type
00401   {
00402     case FRAME_ARP :                             // check for ARP
00403     {
00404       if ((TCPFlags & (TCP_ACTIVE_OPEN | IP_ADDR_RESOLVED)) == TCP_ACTIVE_OPEN)
00405         if (ReadFrameBE_EMAC() == HARDW_ETH10)         // check for the right prot. etc.
00406           if (ReadFrameBE_EMAC() == FRAME_IP)
00407             if (ReadFrameBE_EMAC() == IP_HLEN_PLEN)
00408               if (ReadFrameBE_EMAC() == OP_ARP_ANSWER)
00409               {
00410                 TCPStopTimer();                       // OK, now we've the MAC we wanted ;-)
00411                 CopyFromFrame_EMAC(&RemoteMAC, 6);    // extract opponents MAC
00412                 TCPFlags |= IP_ADDR_RESOLVED;
00413               }
00414       break;
00415     }
00416     case FRAME_IP :                                        // check for IP-type
00417     {
00418       if ((ReadFrameBE_EMAC() & 0xFF00 ) == IP_VER_IHL)     // IPv4, IHL=5 (20 Bytes Header)
00419       {                                                    // ignore Type Of Service
00420         RecdIPFrameLength = ReadFrameBE_EMAC();             // get IP frame's length
00421         ReadFrameBE_EMAC();                                 // ignore identification
00422
00423         if (!(ReadFrameBE_EMAC() & (IP_FLAG_MOREFRAG | IP_FRAGOFS_MASK)))  // only unfragm. frames
00424         {
00425           ProtocolType = ReadFrameBE_EMAC() & 0xFF;         // get protocol, ignore TTL
00426           ReadFrameBE_EMAC();                               // ignore checksum
00427           CopyFromFrame_EMAC(&RecdFrameIP, 4);              // get source IP
00428           CopyFromFrame_EMAC(&TargetIP, 4);                 // get destination IP
00429
00430           if (!memcmp(&MyIP, &TargetIP, 4))                // is it for us?
00431             switch (ProtocolType) {
00432               case PROT_ICMP : { _DBG_("ICMP"); ProcessICMPFrame(); break; }
00433               case PROT_TCP  : { ProcessTCPFrame(); break; }
00434               case PROT_UDP  : break;                      // not implemented!
00435             }
00436         }
00437       }
00438       break;
00439     }
00440   }
00441 }
00442
00443 // easyWEB internal function
00444 // we've just rec'd an ICMP-frame (Internet Control Message Protocol)
00445 // check what to do and branch to the appropriate sub-function
00446
00447 void ProcessICMPFrame(void)
00448 {
00449   unsigned short ICMPTypeAndCode;
00450
00451   ICMPTypeAndCode = ReadFrameBE_EMAC();           // get Message Type and Code
00452   ReadFrameBE_EMAC();                             // ignore ICMP checksum
00453
00454   switch (ICMPTypeAndCode >> 8) {                // check type
00455     case ICMP_ECHO :                             // is echo request?
00456     {
00457       PrepareICMP_ECHO_REPLY();                  // echo as much as we can...
00458       break;
00459     }
00460   }
00461 }
00462
00463 // easyWEB internal function
00464 // we've just rec'd an TCP-frame (Transmission Control Protocol)
00465 // this function mainly implements the TCP state machine according to RFC793
00466
00467 void ProcessTCPFrame(void)
00468 {
00469   unsigned short TCPSegSourcePort;               // segment's source port
00470   unsigned short TCPSegDestPort;                 // segment's destination port
00471   unsigned long TCPSegSeq;                       // segment's sequence number
00472   unsigned long TCPSegAck;                       // segment's acknowledge number
00473   unsigned short TCPCode;                        // TCP code and header length
00474   unsigned char TCPHeaderSize;                   // real TCP header length
00475   unsigned short NrOfDataBytes;                  // real number of data
00476
00477   TCPSegSourcePort = ReadFrameBE_EMAC();                    // get ports
00478   TCPSegDestPort = ReadFrameBE_EMAC();
00479
00480   if (TCPSegDestPort != TCPLocalPort) return;              // drop segment if port doesn't match
00481
00482   TCPSegSeq = (unsigned long)ReadFrameBE_EMAC() << 16;      // get segment sequence nr.
00483   TCPSegSeq |= ReadFrameBE_EMAC();
00484
00485   TCPSegAck = (unsigned long)ReadFrameBE_EMAC() << 16;      // get segment acknowledge nr.
00486   TCPSegAck |= ReadFrameBE_EMAC();
00487
00488   TCPCode = ReadFrameBE_EMAC();                             // get control bits, header length...
00489
00490   TCPHeaderSize = (TCPCode & DATA_OFS_MASK) >> 10;         // header length in bytes
00491   NrOfDataBytes = RecdIPFrameLength - IP_HEADER_SIZE - TCPHeaderSize;     // seg. text length
00492
00493   if (NrOfDataBytes > MAX_TCP_RX_DATA_SIZE) return;        // packet too large for us :...-(
00494
00495   if (TCPHeaderSize > TCP_HEADER_SIZE)                     // ignore options if any
00496     DummyReadFrame_EMAC(TCPHeaderSize - TCP_HEADER_SIZE);
00497
00498   switch (TCPStateMachine)                                 // implement the TCP state machine
00499   {
00500     case CLOSED :
00501     {
00502       if (!(TCPCode & TCP_CODE_RST))
00503       {
00504         TCPRemotePort = TCPSegSourcePort;
00505         memcpy(&RemoteMAC, &RecdFrameMAC, 6);              // save opponents MAC and IP
00506         memcpy(&RemoteIP, &RecdFrameIP, 4);                // for later use
00507
00508         if (TCPCode & TCP_CODE_ACK)                        // make the reset sequence
00509         {                                                  // acceptable to the other
00510           TCPSeqNr = TCPSegAck;                            // TCP
00511           PrepareTCP_FRAME(TCP_CODE_RST);
00512         }
00513         else
00514         {
00515           TCPSeqNr = 0;
00516           TCPAckNr = TCPSegSeq + NrOfDataBytes;
00517           if (TCPCode & (TCP_CODE_SYN | TCP_CODE_FIN)) TCPAckNr++;
00518           PrepareTCP_FRAME(TCP_CODE_RST | TCP_CODE_ACK);
00519         }
00520       }
00521       break;
00522     }
00523     case LISTENING :
00524     {
00525       if (!(TCPCode & TCP_CODE_RST))                       // ignore segment containing RST
00526       {
00527         TCPRemotePort = TCPSegSourcePort;
00528         memcpy(&RemoteMAC, &RecdFrameMAC, 6);              // save opponents MAC and IP
00529         memcpy(&RemoteIP, &RecdFrameIP, 4);                // for later use
00530
00531         if (TCPCode & TCP_CODE_ACK)                        // reset a bad
00532         {                                                  // acknowledgement
00533           TCPSeqNr = TCPSegAck;
00534           PrepareTCP_FRAME(TCP_CODE_RST);
00535         }
00536         else if (TCPCode & TCP_CODE_SYN)
00537         {
00538           TCPAckNr = TCPSegSeq + 1;                           // get remote ISN, next byte we expect
00539             TCPSeqNr = ((unsigned long)ISNGenHigh << 16) | (SysTick->VAL & 0xFFFF);  // Keil: changed from TAR to T0TC;
00540                                                               // set local ISN
00541           TCPUNASeqNr = TCPSeqNr + 1;                         // one byte out -> increase by one
00542           PrepareTCP_FRAME(TCP_CODE_SYN | TCP_CODE_ACK);
00543           LastFrameSent = TCP_SYN_ACK_FRAME;
00544           TCPStartRetryTimer();
00545           TCPStateMachine = SYN_RECD;
00546         }
00547       }
00548       break;
00549     }
00550     case SYN_SENT :
00551     {
00552       if (memcmp(&RemoteIP, &RecdFrameIP, 4)) break;  // drop segment if its IP doesn't belong
00553                                                       // to current session
00554
00555       if (TCPSegSourcePort != TCPRemotePort) break;   // drop segment if port doesn't match
00556
00557       if (TCPCode & TCP_CODE_ACK)                // ACK field significant?
00558         if (TCPSegAck != TCPUNASeqNr)            // is our ISN ACKed?
00559         {
00560           if (!(TCPCode & TCP_CODE_RST))
00561           {
00562             TCPSeqNr = TCPSegAck;
00563             PrepareTCP_FRAME(TCP_CODE_RST);
00564           }
00565           break;                                 // drop segment
00566         }
00567
00568       if (TCPCode & TCP_CODE_RST)                // RST??
00569       {
00570         if (TCPCode & TCP_CODE_ACK)              // if ACK was acceptable, reset
00571         {                                        // connection
00572           TCPStateMachine = CLOSED;
00573           TCPFlags = 0;                          // reset all flags, stop retransmission...
00574           SocketStatus = SOCK_ERR_CONN_RESET;
00575         }
00576         break;                                   // drop segment
00577       }
00578
00579       if (TCPCode & TCP_CODE_SYN)                // SYN??
00580       {
00581         TCPAckNr = TCPSegSeq;                    // get opponents ISN
00582         TCPAckNr++;                              // inc. by one...
00583
00584         if (TCPCode & TCP_CODE_ACK)
00585         {
00586           TCPStopTimer();                        // stop retransmission, other TCP got our SYN
00587           TCPSeqNr = TCPUNASeqNr;                // advance our sequence number
00588
00589           PrepareTCP_FRAME(TCP_CODE_ACK);        // ACK this ISN
00590           TCPStateMachine = ESTABLISHED;
00591           SocketStatus |= SOCK_CONNECTED;
00592           SocketStatus |= SOCK_TX_BUF_RELEASED;  // user may send data now :-)
00593         }
00594         else
00595         {
00596           TCPStopTimer();
00597           PrepareTCP_FRAME(TCP_CODE_SYN | TCP_CODE_ACK);   // our SYN isn't ACKed yet,
00598           LastFrameSent = TCP_SYN_ACK_FRAME;               // now continue with sending
00599           TCPStartRetryTimer();                            // SYN_ACK frames
00600           TCPStateMachine = SYN_RECD;
00601         }
00602       }
00603       break;
00604     }
00605     default :
00606     {
00607       if (memcmp(&RemoteIP, &RecdFrameIP, 4)) break;  // drop segment if IP doesn't belong
00608                                                       // to current session
00609
00610       if (TCPSegSourcePort != TCPRemotePort) break;   // drop segment if port doesn't match
00611
00612       if (TCPSegSeq != TCPAckNr) break;               // drop if it's not the segment we expect
00613
00614       if (TCPCode & TCP_CODE_RST)                // RST??
00615       {
00616         TCPStateMachine = CLOSED;                // close the state machine
00617         TCPFlags = 0;                            // reset all flags, stop retransmission...
00618         SocketStatus = SOCK_ERR_CONN_RESET;      // indicate an error to user
00619         break;
00620       }
00621
00622       if (TCPCode & TCP_CODE_SYN)                // SYN??
00623       {
00624         PrepareTCP_FRAME(TCP_CODE_RST);          // is NOT allowed here! send a reset,
00625         TCPStateMachine = CLOSED;                // close connection...
00626         TCPFlags = 0;                            // reset all flags, stop retransmission...
00627         SocketStatus = SOCK_ERR_REMOTE;          // fatal error!
00628         break;                                   // ...and drop the frame
00629       }
00630
00631       if (!(TCPCode & TCP_CODE_ACK)) break;      // drop segment if the ACK bit is off
00632
00633       if (TCPSegAck == TCPUNASeqNr)              // is our last data sent ACKed?
00634       {
00635         TCPStopTimer();                          // stop retransmission
00636         TCPSeqNr = TCPUNASeqNr;                  // advance our sequence number
00637
00638         switch (TCPStateMachine)                 // change state if necessary
00639         {
00640           case SYN_RECD :                        // ACK of our SYN?
00641           {
00642             TCPStateMachine = ESTABLISHED;       // user may send data now :-)
00643             SocketStatus |= SOCK_CONNECTED;
00644             break;
00645           }
00646           case FIN_WAIT_1 : { TCPStateMachine = FIN_WAIT_2; break; } // ACK of our FIN?
00647           case CLOSING :    { TCPStateMachine = TIME_WAIT; break; }  // ACK of our FIN?
00648           case LAST_ACK :                                            // ACK of our FIN?
00649           {
00650             TCPStateMachine = CLOSED;
00651             TCPFlags = 0;                        // reset all flags, stop retransmission...
00652             SocketStatus &= SOCK_DATA_AVAILABLE; // clear all flags but data available
00653             break;
00654           }
00655           case TIME_WAIT :
00656           {
00657             PrepareTCP_FRAME(TCP_CODE_ACK);      // ACK a retransmission of remote FIN
00658             TCPRestartTimer();                   // restart TIME_WAIT timeout
00659             break;
00660           }
00661         }
00662
00663         if (TCPStateMachine == ESTABLISHED)      // if true, give the frame buffer back
00664           SocketStatus |= SOCK_TX_BUF_RELEASED;  // to user
00665       }
00666
00667       if ((TCPStateMachine == ESTABLISHED) || (TCPStateMachine == FIN_WAIT_1) || (TCPStateMachine == FIN_WAIT_2))
00668         if (NrOfDataBytes)                                 // data available?
00669           if (!(SocketStatus & SOCK_DATA_AVAILABLE))       // rx data-buffer empty?
00670           {
00671             DummyReadFrame_EMAC(6);                        // ignore window, checksum, urgent pointer
00672             CopyFromFrame_EMAC(RxTCPBuffer, NrOfDataBytes);// fetch data and
00673             TCPRxDataCount = NrOfDataBytes;                // ...tell the user...
00674             SocketStatus |= SOCK_DATA_AVAILABLE;           // indicate the new data to user
00675             TCPAckNr += NrOfDataBytes;
00676             PrepareTCP_FRAME(TCP_CODE_ACK);                // ACK rec'd data
00677           }
00678
00679       if (TCPCode & TCP_CODE_FIN)                // FIN??
00680       {
00681         switch (TCPStateMachine)
00682         {
00683           case SYN_RECD :
00684           case ESTABLISHED :
00685           {
00686             TCPStateMachine = CLOSE_WAIT;
00687             break;
00688           }
00689           case FIN_WAIT_1 :
00690           {                                      // if our FIN was ACKed, we automatically
00691             TCPStateMachine = CLOSING;           // enter FIN_WAIT_2 (look above) and therefore
00692             SocketStatus &= ~SOCK_CONNECTED;     // TIME_WAIT
00693             break;
00694           }
00695           case FIN_WAIT_2 :
00696           {
00697             TCPStartTimeWaitTimer();
00698             TCPStateMachine = TIME_WAIT;
00699             SocketStatus &= ~SOCK_CONNECTED;
00700             break;
00701           }
00702           case TIME_WAIT :
00703           {
00704             TCPRestartTimer();
00705             break;
00706           }
00707         }
00708         TCPAckNr++;                              // ACK remote's FIN flag
00709         PrepareTCP_FRAME(TCP_CODE_ACK);
00710       }
00711     }
00712   }
00713 }
00714
00715 // easyWEB internal function
00716 // prepares the TxFrame2-buffer to send an ARP-request
00717
00718 void PrepareARP_REQUEST(void)
00719 {
00720   // Ethernet
00721   memset(&TxFrame2[ETH_DA_OFS], (char)0xFF, 6);                  // we don't know opposites MAC!
00722   memcpy(&TxFrame2[ETH_SA_OFS], &MyMAC, 6);
00723   *(unsigned short *)&TxFrame2[ETH_TYPE_OFS] = SWAPB(FRAME_ARP);
00724
00725   // ARP
00726   *(unsigned short *)&TxFrame2[ARP_HARDW_OFS] = SWAPB(HARDW_ETH10);
00727   *(unsigned short *)&TxFrame2[ARP_PROT_OFS] = SWAPB(FRAME_IP);
00728   *(unsigned short *)&TxFrame2[ARP_HLEN_PLEN_OFS] = SWAPB(IP_HLEN_PLEN);
00729   *(unsigned short *)&TxFrame2[ARP_OPCODE_OFS] = SWAPB(OP_ARP_REQUEST);
00730   memcpy(&TxFrame2[ARP_SENDER_HA_OFS], &MyMAC, 6);
00731   memcpy(&TxFrame2[ARP_SENDER_IP_OFS], &MyIP, 4);
00732   memset(&TxFrame2[ARP_TARGET_HA_OFS], 0x00, 6);           // we don't know opposites MAC!
00733
00734   if (((RemoteIP[0] ^ MyIP[0]) & SubnetMask[0]) || ((RemoteIP[1] ^ MyIP[1]) & SubnetMask[1]))
00735     memcpy(&TxFrame2[ARP_TARGET_IP_OFS], &GatewayIP, 4);   // IP not in subnet, use gateway
00736   else
00737     memcpy(&TxFrame2[ARP_TARGET_IP_OFS], &RemoteIP, 4);    // other IP is next to us...
00738
00739   TxFrame2Size = ETH_HEADER_SIZE + ARP_FRAME_SIZE;
00740   TransmitControl |= SEND_FRAME2;
00741 }
00742
00743 // easyWEB internal function
00744 // prepares the TxFrame2-buffer to send an ARP-answer (reply)
00745
00746 void PrepareARP_ANSWER(void)
00747 {
00748   // Ethernet
00749   memcpy(&TxFrame2[ETH_DA_OFS], &RecdFrameMAC, 6);
00750   memcpy(&TxFrame2[ETH_SA_OFS], &MyMAC, 6);
00751   *(unsigned short *)&TxFrame2[ETH_TYPE_OFS] = SWAPB(FRAME_ARP);
00752
00753   // ARP
00754   *(unsigned short *)&TxFrame2[ARP_HARDW_OFS] = SWAPB(HARDW_ETH10);
00755   *(unsigned short *)&TxFrame2[ARP_PROT_OFS] = SWAPB(FRAME_IP);
00756   *(unsigned short *)&TxFrame2[ARP_HLEN_PLEN_OFS] = SWAPB(IP_HLEN_PLEN);
00757   *(unsigned short *)&TxFrame2[ARP_OPCODE_OFS] = SWAPB(OP_ARP_ANSWER);
00758   memcpy(&TxFrame2[ARP_SENDER_HA_OFS], &MyMAC, 6);
00759   memcpy(&TxFrame2[ARP_SENDER_IP_OFS], &MyIP, 4);
00760   memcpy(&TxFrame2[ARP_TARGET_HA_OFS], &RecdFrameMAC, 6);
00761   memcpy(&TxFrame2[ARP_TARGET_IP_OFS], &RecdFrameIP, 4);
00762
00763   TxFrame2Size = ETH_HEADER_SIZE + ARP_FRAME_SIZE;
00764   TransmitControl |= SEND_FRAME2;
00765 }
00766
00767 // easyWEB internal function
00768 // prepares the TxFrame2-buffer to send an ICMP-echo-reply
00769
00770 void PrepareICMP_ECHO_REPLY(void)
00771 {
00772   unsigned short ICMPDataCount;
00773
00774   if (RecdIPFrameLength > MAX_ETH_TX_DATA_SIZE)                      // don't overload TX-buffer
00775     ICMPDataCount = MAX_ETH_TX_DATA_SIZE - IP_HEADER_SIZE - ICMP_HEADER_SIZE;
00776   else
00777     ICMPDataCount = RecdIPFrameLength - IP_HEADER_SIZE - ICMP_HEADER_SIZE;
00778
00779   // Ethernet
00780   memcpy(&TxFrame2[ETH_DA_OFS], &RecdFrameMAC, 6);
00781   memcpy(&TxFrame2[ETH_SA_OFS], &MyMAC, 6);
00782   *(unsigned short *)&TxFrame2[ETH_TYPE_OFS] = SWAPB(FRAME_IP);
00783
00784   // IP
00785   *(unsigned short *)&TxFrame2[IP_VER_IHL_TOS_OFS] = SWAPB(IP_VER_IHL);
00786   WriteWBE(&TxFrame2[IP_TOTAL_LENGTH_OFS], IP_HEADER_SIZE + ICMP_HEADER_SIZE + ICMPDataCount);
00787   *(unsigned short *)&TxFrame2[IP_IDENT_OFS] = 0;
00788   *(unsigned short *)&TxFrame2[IP_FLAGS_FRAG_OFS] = 0;
00789   *(unsigned short *)&TxFrame2[IP_TTL_PROT_OFS] = SWAPB((DEFAULT_TTL << 8) | PROT_ICMP);
00790   *(unsigned short *)&TxFrame2[IP_HEAD_CHKSUM_OFS] = 0;
00791   memcpy(&TxFrame2[IP_SOURCE_OFS], &MyIP, 4);
00792   memcpy(&TxFrame2[IP_DESTINATION_OFS], &RecdFrameIP, 4);
00793   *(unsigned short *)&TxFrame2[IP_HEAD_CHKSUM_OFS] = CalcChecksum(&TxFrame2[IP_VER_IHL_TOS_OFS], IP_HEADER_SIZE, 0);
00794
00795   // ICMP
00796   *(unsigned short *)&TxFrame2[ICMP_TYPE_CODE_OFS] = SWAPB(ICMP_ECHO_REPLY << 8);
00797   *(unsigned short *)&TxFrame2[ICMP_CHKSUM_OFS] = 0;                   // initialize checksum field
00798
00799   CopyFromFrame_EMAC(&TxFrame2[ICMP_DATA_OFS], ICMPDataCount);        // get data to echo...
00800   *(unsigned short *)&TxFrame2[ICMP_CHKSUM_OFS] = CalcChecksum(&TxFrame2[IP_DATA_OFS], ICMPDataCount + ICMP_HEADER_SIZE, 0);
00801
00802   TxFrame2Size = ETH_HEADER_SIZE + IP_HEADER_SIZE + ICMP_HEADER_SIZE + ICMPDataCount;
00803   TransmitControl |= SEND_FRAME2;
00804 }
00805
00806 // easyWEB internal function
00807 // prepares the TxFrame2-buffer to send a general TCP frame
00808 // the TCPCode-field is passed as an argument
00809
00810 void PrepareTCP_FRAME(unsigned short TCPCode)
00811 {
00812   // Ethernet
00813   memcpy(&TxFrame2[ETH_DA_OFS], &RemoteMAC, 6);
00814   memcpy(&TxFrame2[ETH_SA_OFS], &MyMAC, 6);
00815   *(unsigned short *)&TxFrame2[ETH_TYPE_OFS] = SWAPB(FRAME_IP);
00816
00817   // IP
00818   *(unsigned short *)&TxFrame2[IP_VER_IHL_TOS_OFS] = SWAPB(IP_VER_IHL | IP_TOS_D);
00819
00820   if (TCPCode & TCP_CODE_SYN)                    // if SYN, we want to use the MSS option
00821     *(unsigned short *)&TxFrame2[IP_TOTAL_LENGTH_OFS] = SWAPB(IP_HEADER_SIZE + TCP_HEADER_SIZE + TCP_OPT_MSS_SIZE);
00822   else
00823     *(unsigned short *)&TxFrame2[IP_TOTAL_LENGTH_OFS] = SWAPB(IP_HEADER_SIZE + TCP_HEADER_SIZE);
00824
00825   *(unsigned short *)&TxFrame2[IP_IDENT_OFS] = 0;
00826   *(unsigned short *)&TxFrame2[IP_FLAGS_FRAG_OFS] = 0;
00827   *(unsigned short *)&TxFrame2[IP_TTL_PROT_OFS] = SWAPB((DEFAULT_TTL << 8) | PROT_TCP);
00828   *(unsigned short *)&TxFrame2[IP_HEAD_CHKSUM_OFS] = 0;
00829   memcpy(&TxFrame2[IP_SOURCE_OFS], &MyIP, 4);
00830   memcpy(&TxFrame2[IP_DESTINATION_OFS], &RemoteIP, 4);
00831   *(unsigned short *)&TxFrame2[IP_HEAD_CHKSUM_OFS] = CalcChecksum(&TxFrame2[IP_VER_IHL_TOS_OFS], IP_HEADER_SIZE, 0);
00832
00833   // TCP
00834   WriteWBE(&TxFrame2[TCP_SRCPORT_OFS], TCPLocalPort);
00835   WriteWBE(&TxFrame2[TCP_DESTPORT_OFS], TCPRemotePort);
00836
00837   WriteDWBE(&TxFrame2[TCP_SEQNR_OFS], TCPSeqNr);
00838   WriteDWBE(&TxFrame2[TCP_ACKNR_OFS], TCPAckNr);
00839
00840   *(unsigned short *)&TxFrame2[TCP_WINDOW_OFS] = SWAPB(MAX_TCP_RX_DATA_SIZE);    // data bytes to accept
00841   *(unsigned short *)&TxFrame2[TCP_CHKSUM_OFS] = 0;             // initalize checksum
00842   *(unsigned short *)&TxFrame2[TCP_URGENT_OFS] = 0;
00843
00844   if (TCPCode & TCP_CODE_SYN)                    // if SYN, we want to use the MSS option
00845   {
00846     *(unsigned short *)&TxFrame2[TCP_DATA_CODE_OFS] = SWAPB(0x6000 | TCPCode);   // TCP header length = 24
00847     *(unsigned short *)&TxFrame2[TCP_DATA_OFS] = SWAPB(TCP_OPT_MSS);             // MSS option
00848     *(unsigned short *)&TxFrame2[TCP_DATA_OFS + 2] = SWAPB(MAX_TCP_RX_DATA_SIZE);// max. length of TCP-data we accept
00849     *(unsigned short *)&TxFrame2[TCP_CHKSUM_OFS] = CalcChecksum(&TxFrame2[TCP_SRCPORT_OFS], TCP_HEADER_SIZE + TCP_OPT_MSS_SIZE, 1);
00850     TxFrame2Size = ETH_HEADER_SIZE + IP_HEADER_SIZE + TCP_HEADER_SIZE + TCP_OPT_MSS_SIZE;
00851   }
00852   else
00853   {
00854     *(unsigned short *)&TxFrame2[TCP_DATA_CODE_OFS] = SWAPB(0x5000 | TCPCode);   // TCP header length = 20
00855     *(unsigned short *)&TxFrame2[TCP_CHKSUM_OFS] = CalcChecksum(&TxFrame2[TCP_SRCPORT_OFS], TCP_HEADER_SIZE, 1);
00856     TxFrame2Size = ETH_HEADER_SIZE + IP_HEADER_SIZE + TCP_HEADER_SIZE;
00857   }
00858
00859   TransmitControl |= SEND_FRAME2;
00860 }
00861
00862 // easyWEB internal function
00863 // prepares the TxFrame1-buffer to send a payload-packet
00864
00865 void PrepareTCP_DATA_FRAME(void)
00866 {
00867   // Ethernet
00868   memcpy(&TxFrame1[ETH_DA_OFS], &RemoteMAC, 6);
00869   memcpy(&TxFrame1[ETH_SA_OFS], &MyMAC, 6);
00870   *(unsigned short *)&TxFrame1[ETH_TYPE_OFS] = SWAPB(FRAME_IP);
00871
00872   // IP
00873   *(unsigned short *)&TxFrame1[IP_VER_IHL_TOS_OFS] = SWAPB(IP_VER_IHL | IP_TOS_D);
00874   WriteWBE(&TxFrame1[IP_TOTAL_LENGTH_OFS], IP_HEADER_SIZE + TCP_HEADER_SIZE + TCPTxDataCount);
00875   *(unsigned short *)&TxFrame1[IP_IDENT_OFS] = 0;
00876   *(unsigned short *)&TxFrame1[IP_FLAGS_FRAG_OFS] = 0;
00877   *(unsigned short *)&TxFrame1[IP_TTL_PROT_OFS] = SWAPB((DEFAULT_TTL << 8) | PROT_TCP);
00878   *(unsigned short *)&TxFrame1[IP_HEAD_CHKSUM_OFS] = 0;
00879   memcpy(&TxFrame1[IP_SOURCE_OFS], &MyIP, 4);
00880   memcpy(&TxFrame1[IP_DESTINATION_OFS], &RemoteIP, 4);
00881   *(unsigned short *)&TxFrame1[IP_HEAD_CHKSUM_OFS] = CalcChecksum(&TxFrame1[IP_VER_IHL_TOS_OFS], IP_HEADER_SIZE, 0);
00882
00883   // TCP
00884   WriteWBE(&TxFrame1[TCP_SRCPORT_OFS], TCPLocalPort);
00885   WriteWBE(&TxFrame1[TCP_DESTPORT_OFS], TCPRemotePort);
00886
00887   WriteDWBE(&TxFrame1[TCP_SEQNR_OFS], TCPSeqNr);
00888   WriteDWBE(&TxFrame1[TCP_ACKNR_OFS], TCPAckNr);
00889   *(unsigned short *)&TxFrame1[TCP_DATA_CODE_OFS] = SWAPB(0x5000 | TCP_CODE_ACK);   // TCP header length = 20
00890   *(unsigned short *)&TxFrame1[TCP_WINDOW_OFS] = SWAPB(MAX_TCP_RX_DATA_SIZE);       // data bytes to accept
00891   *(unsigned short *)&TxFrame1[TCP_CHKSUM_OFS] = 0;
00892   *(unsigned short *)&TxFrame1[TCP_URGENT_OFS] = 0;
00893   *(unsigned short *)&TxFrame1[TCP_CHKSUM_OFS] = CalcChecksum(&TxFrame1[TCP_SRCPORT_OFS], TCP_HEADER_SIZE + TCPTxDataCount, 1);
00894 }
00895
00896 // easyWEB internal function
00897 // calculates the TCP/IP checksum. if 'IsTCP != 0', the TCP pseudo-header
00898 // will be included.
00899
00900 unsigned short CalcChecksum(void *Start, unsigned short Count, unsigned char IsTCP)
00901 {
00902   unsigned long Sum = 0;
00903   unsigned short * piStart;                        // Keil: Pointer added to correct expression
00904
00905   if (IsTCP) {                                   // if we've a TCP frame...
00906     Sum += MyIP[0];                              // ...include TCP pseudo-header
00907     Sum += MyIP[1];
00908     Sum += RemoteIP[0];
00909     Sum += RemoteIP[1];
00910     Sum += SwapBytes(Count);                     // TCP header length plus data length
00911     Sum += SWAPB(PROT_TCP);
00912   }
00913
00914   piStart = Start;                               // Keil: Line added
00915   while (Count > 1) {                            // sum words
00916 //  Sum += *((unsigned short *)Start)++;                     // Keil: Line replaced with following line
00917     Sum += *piStart++;
00918     Count -= 2;
00919   }
00920
00921   if (Count)                                     // add left-over byte, if any
00922 //  Sum += *(unsigned char *)Start;              // Keil: Line replaced with following line
00923     Sum += *(unsigned char *)piStart;
00924
00925   while (Sum >> 16)                              // fold 32-bit sum to 16 bits
00926     Sum = (Sum & 0xFFFF) + (Sum >> 16);
00927
00928   return ~Sum;
00929 }
00930
00931 // easyWEB internal function
00932 // starts the timer as a retry-timer (used for retransmission-timeout)
00933
00934 void TCPStartRetryTimer(void)
00935 {
00936   TCPTimer = 0;
00937   RetryCounter = MAX_RETRYS;
00938   TCPFlags |= TCP_TIMER_RUNNING;
00939   TCPFlags |= TIMER_TYPE_RETRY;
00940 }
00941
00942 // easyWEB internal function
00943 // starts the timer as a 'TIME_WAIT'-timer (used to finish a TCP-session)
00944
00945 void TCPStartTimeWaitTimer(void)
00946 {
00947   TCPTimer = 0;
00948   TCPFlags |= TCP_TIMER_RUNNING;
00949   TCPFlags &= ~TIMER_TYPE_RETRY;
00950 }
00951
00952 // easyWEB internal function
00953 // restarts the timer
00954
00955 void TCPRestartTimer(void)
00956 {
00957   TCPTimer = 0;
00958 }
00959
00960 // easyWEB internal function
00961 // stopps the timer
00962
00963 void TCPStopTimer(void)
00964 {
00965   TCPFlags &= ~TCP_TIMER_RUNNING;
00966 }
00967
00968 // easyWEB internal function
00969 // if a retransmission-timeout occured, check which packet
00970 // to resend.
00971
00972 void TCPHandleRetransmission(void)
00973 {
00974   switch (LastFrameSent)
00975   {
00976     case ARP_REQUEST :       { PrepareARP_REQUEST(); break; }
00977     case TCP_SYN_FRAME :     { PrepareTCP_FRAME(TCP_CODE_SYN); break; }
00978     case TCP_SYN_ACK_FRAME : { PrepareTCP_FRAME(TCP_CODE_SYN | TCP_CODE_ACK); break; }
00979     case TCP_FIN_FRAME :     { PrepareTCP_FRAME(TCP_CODE_FIN | TCP_CODE_ACK); break; }
00980     case TCP_DATA_FRAME :    { TransmitControl |= SEND_FRAME1; break; }
00981   }
00982 }
00983
00984 // easyWEB internal function
00985 // if all retransmissions failed, close connection and indicate an error
00986
00987 void TCPHandleTimeout(void)
00988 {
00989   TCPStateMachine = CLOSED;
00990
00991   if ((TCPFlags & (TCP_ACTIVE_OPEN | IP_ADDR_RESOLVED)) == TCP_ACTIVE_OPEN)
00992     SocketStatus = SOCK_ERR_ARP_TIMEOUT;         // indicate an error to user
00993   else
00994     SocketStatus = SOCK_ERR_TCP_TIMEOUT;
00995
00996   TCPFlags = 0;                                  // clear all flags
00997 }
00998
00999
01000 /*
01001  * NXP: old TCPClockHandler() function is replaced with this function
01002  */
01003 // easyWEB internal function
01004 // function executed every 0.210s by the CPU. used for the
01005 // inital sequence number generator (ISN) and the TCP-timer
01006 void SysTick_Handler (void) {           /* SysTick Interrupt Handler (1ms)    */
01007         ISNGenHigh++;                                  // upper 16 bits of initial sequence number
01008         TCPTimer++;                                    // timer for retransmissions
01009         _tickVal = (++_tickVal) & 0x03;
01010         if (!_tickVal){
01011 #ifdef MCB_LPC_1768
01012                 LPC_GPIO2->FIOPIN ^= LED_PIN;
01013 #elif defined(IAR_LPC_1768)
01014                 LPC_GPIO1->FIOPIN ^= LED_PIN;
01015 #endif
01016         }
01017 }
01018
01019
01020 // easyWEB internal function
01021 // transfers the contents of 'TxFrame1'-Buffer to the EMAC
01022
01023 void SendFrame1(void)
01024 {
01025   CopyToFrame_EMAC(TxFrame1, TxFrame1Size);
01026 }
01027
01028 // easyWEB internal function
01029 // transfers the contents of 'TxFrame2'-Buffer to the EMAC
01030
01031 void SendFrame2(void)
01032 {
01033   CopyToFrame_EMAC(TxFrame2, TxFrame2Size);
01034 }
01035
01036 // easyWEB internal function
01037 // help function to write a WORD in big-endian byte-order
01038 // to MCU-memory
01039
01040 void WriteWBE(unsigned char *Add, unsigned short Data)
01041 {
01042   *Add++ = Data >> 8;
01043   *Add = (char)Data;
01044 }
01045
01046 // easyWEB internal function
01047 // help function to write a DWORD in big-endian byte-order
01048 // to MCU-memory
01049
01050 void WriteDWBE(unsigned char *Add, unsigned long Data)
01051 {
01052   *Add++ = Data >> 24;
01053   *Add++ = Data >> 16;
01054   *Add++ = Data >> 8;
01055   *Add = (char)Data;
01056 }
01057
01058 // easyWEB internal function
01059 // help function to swap the byte order of a WORD
01060
01061 unsigned short SwapBytes(unsigned short Data)
01062 {
01063   return (Data >> 8) | (Data << 8);
01064 }
01065
Generated on Tue Jun 7 14:58:59 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/Easy_Web/tcpip.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/Easy_Web/tcpip.h

Go to the documentation of this file.
00001 /******************************************************************
00002  *****                                                        *****
00003  *****  Name: tcpip.h                                         *****
00004  *****  Ver.: 1.0                                             *****
00005  *****  Date: 07/05/2001                                      *****
00006  *****  Auth: Andreas Dannenberg                              *****
00007  *****        HTWK Leipzig                                    *****
00008  *****        university of applied sciences                  *****
00009  *****        Germany                                         *****
00010  *****  Func: header-file for tcpip.c                         *****
00011  *****                                                        *****
00012  ******************************************************************/
00013
00014 #ifndef __TCPIP_H
00015 #define __TCPIP_H
00016
00017 // easyWEB-stack definitions
00018 #define MYIP_1               192                 // our internet protocol (IP) address
00019 #define MYIP_2               168
00020 #define MYIP_3               0
00021 #define MYIP_4               100
00022
00023 #define SUBMASK_1            255                 // subnet mask
00024 #define SUBMASK_2            255
00025 #define SUBMASK_3            255
00026 #define SUBMASK_4            0
00027
00028 #define GWIP_1               192                 // standard gateway (used if remote
00029 #define GWIP_2               168                 // IP is no part of our subnet)
00030 #define GWIP_3               0
00031 #define GWIP_4               254
00032
00033 #define RETRY_TIMEOUT        8                   // wait max. 8 x 262ms for an ACK (about 2 sec.)
00034 #define FIN_TIMEOUT          2                   // max. time to wait for an ACK of a FIN
00035                                                  // before closing TCP state-machine (about 0.5 s)
00036 #define MAX_RETRYS           4                   // nr. of resendings before reset conn.
00037                                                  // total nr. of transmissions = MAX_RETRYS + 1
00038
00039 #define MAX_TCP_TX_DATA_SIZE 512                 // max. outgoing TCP data size (even!)
00040 #define MAX_TCP_RX_DATA_SIZE 256                 // max. incoming TCP data size (even!)
00041                                                  // (increasing the buffer-size dramatically
00042                                                  // increases the transfer-speed!)
00043
00044 #define MAX_ETH_TX_DATA_SIZE 60                  // 2nd buffer, used for ARP, ICMP, TCP (even!)
00045                                                  // enough to echo 32 byte via ICMP
00046
00047 #define DEFAULT_TTL          64                  // Time To Live sent with packets
00048
00049 // Ethernet network layer definitions
00050 #define ETH_DA_OFS           0                   // Destination MAC address (48 Bit)
00051 #define ETH_SA_OFS           6                   // Source MAC address (48 Bit)
00052 #define ETH_TYPE_OFS         12                  // Type field (16 Bit)
00053 #define ETH_DATA_OFS         14                  // Frame Data
00054 #define ETH_HEADER_SIZE      14
00055
00056 #define FRAME_ARP            0x0806              // frame types (stored in Type/Length field)
00057 #define FRAME_IP             0x0800
00058
00059 // IPv4 layer definitions
00060 #define IP_VER_IHL_TOS_OFS   ETH_DATA_OFS + 0    // Version, Header Length, Type of Service
00061 #define IP_TOTAL_LENGTH_OFS  ETH_DATA_OFS + 2    // IP Frame's Total Length
00062 #define IP_IDENT_OFS         ETH_DATA_OFS + 4    // Identifying Value
00063 #define IP_FLAGS_FRAG_OFS    ETH_DATA_OFS + 6    // Flags and Fragment Offset
00064 #define IP_TTL_PROT_OFS      ETH_DATA_OFS + 8    // Frame's Time to Live, Protocol
00065 #define IP_HEAD_CHKSUM_OFS   ETH_DATA_OFS + 10   // IP Frame's Header Checksum
00066 #define IP_SOURCE_OFS        ETH_DATA_OFS + 12   // Source Address (32 Bit)
00067 #define IP_DESTINATION_OFS   ETH_DATA_OFS + 16   // Destination Address (32 Bit)
00068 #define IP_DATA_OFS          ETH_DATA_OFS + 20   // Frame Data (if no options)
00069 #define IP_HEADER_SIZE       20                  // w/o options
00070
00071 #define IP_VER_IHL           0x4500              // IPv4, Header Length = 5x32 bit
00072 #define IP_TOS_D             0x0010              // TOS low delay
00073 #define IP_TOS_T             0x0008              // TOS high throughput
00074 #define IP_TOS_R             0x0004              // TOS high reliability
00075
00076 #define IP_FLAG_DONTFRAG     0x4000              // don't fragment IP frame
00077 #define IP_FLAG_MOREFRAG     0x2000              // more fragments available
00078 #define IP_FRAGOFS_MASK      0x1FFF              // indicates where this fragment belongs
00079
00080 #define PROT_ICMP            1                   // Internet Control Message Protocol
00081 #define PROT_TCP             6                   // Transmission Control Protocol
00082 #define PROT_UDP             17                  // User Datagram Protocol
00083
00084 // ARP definitions
00085 #define ARP_HARDW_OFS        ETH_DATA_OFS + 0    // Hardware address type
00086 #define ARP_PROT_OFS         ETH_DATA_OFS + 2    // Protocol
00087 #define ARP_HLEN_PLEN_OFS    ETH_DATA_OFS + 4    // byte length of each hardw. / prot. address
00088 #define ARP_OPCODE_OFS       ETH_DATA_OFS + 6    // Opcode
00089 #define ARP_SENDER_HA_OFS    ETH_DATA_OFS + 8    // Hardw. address of sender of this packet
00090 #define ARP_SENDER_IP_OFS    ETH_DATA_OFS + 14   // IP address of sender
00091 #define ARP_TARGET_HA_OFS    ETH_DATA_OFS + 18   // Hardw. address of target of this packet
00092 #define ARP_TARGET_IP_OFS    ETH_DATA_OFS + 24   // IP address of target
00093 #define ARP_FRAME_SIZE       28
00094
00095 #define HARDW_ETH10          1                   // hardware-type 10Mbps Ethernet
00096 #define IP_HLEN_PLEN         0x0604              // MAC = 6 byte long, IP = 4 byte long
00097 #define OP_ARP_REQUEST       1                   // operations for ARP-frames
00098 #define OP_ARP_ANSWER        2
00099
00100 // ICMP definitions
00101 #define ICMP_TYPE_CODE_OFS   IP_DATA_OFS + 0     // type of message
00102 #define ICMP_CHKSUM_OFS      IP_DATA_OFS + 2     // checksum of ICMP-message (16 bit)
00103 #define ICMP_DATA_OFS        IP_DATA_OFS + 4
00104 #define ICMP_HEADER_SIZE     4
00105
00106 #define ICMP_ECHO            8                   // message is an echo request
00107 #define ICMP_ECHO_REPLY      0                   // message is an echo reply
00108
00109 // TCP layer definitions
00110 #define TCP_SRCPORT_OFS      IP_DATA_OFS + 0     // Source Port (16 bit)
00111 #define TCP_DESTPORT_OFS     IP_DATA_OFS + 2     // Destination Port (16 bit)
00112 #define TCP_SEQNR_OFS        IP_DATA_OFS + 4     // Sequence Number (32 bit)
00113 #define TCP_ACKNR_OFS        IP_DATA_OFS + 8     // Acknowledge Number (32 bit)
00114 #define TCP_DATA_CODE_OFS    IP_DATA_OFS + 12    // Data Offset and Control Bits (16 bit)
00115 #define TCP_WINDOW_OFS       IP_DATA_OFS + 14    // Window Size (16 bit)
00116 #define TCP_CHKSUM_OFS       IP_DATA_OFS + 16    // Checksum Field (16 bit)
00117 #define TCP_URGENT_OFS       IP_DATA_OFS + 18    // Urgent Pointer (16 bit)
00118 #define TCP_DATA_OFS         IP_DATA_OFS + 20    // Frame Data (if no options)
00119 #define TCP_HEADER_SIZE      20                  // size w/o options
00120
00121 #define DATA_OFS_MASK        0xF000              // number of 32 bit words in the TCP Header
00122
00123 #define TCP_CODE_FIN         0x0001
00124 #define TCP_CODE_SYN         0x0002
00125 #define TCP_CODE_RST         0x0004
00126 #define TCP_CODE_PSH         0x0008
00127 #define TCP_CODE_ACK         0x0010
00128 #define TCP_CODE_URG         0x0020
00129
00130 #define TCP_OPT_MSS          0x0204              // Type 2, Option Length 4 (Max. Segment Size)
00131 #define TCP_OPT_MSS_SIZE     4
00132
00133 // define some TCP standard-ports, useful for testing...
00134 #define TCP_PORT_ECHO        7                   // echo
00135 #define TCP_PORT_DISCARD     9                   // discard
00136 #define TCP_PORT_DAYTIME     13                  // daytime
00137 #define TCP_PORT_QOTD        17                  // quote of the day
00138 #define TCP_PORT_CHARGEN     19                  // character generator
00139 #define TCP_PORT_HTTP        80                  // word wide web HTTP
00140
00141 // macros
00142 #define SWAPB(Word)          ((unsigned short)((Word) << 8) | ((Word) >> 8))
00143                                                  // convert little <-> big endian
00144
00145 // typedefs
00146 typedef enum {                                   // states of the TCP-state machine
00147   CLOSED,                                        // according to RFC793
00148   LISTENING,
00149   SYN_SENT,
00150   SYN_RECD,
00151   ESTABLISHED,
00152   FIN_WAIT_1,
00153   FIN_WAIT_2,
00154   CLOSE_WAIT,
00155   CLOSING,
00156   LAST_ACK,
00157   TIME_WAIT
00158 } TTCPStateMachine;
00159
00160 typedef enum {                                   // type of last frame sent. used
00161   ARP_REQUEST,                                   // for retransmissions
00162   TCP_SYN_FRAME,
00163   TCP_SYN_ACK_FRAME,
00164   TCP_FIN_FRAME,
00165   TCP_DATA_FRAME
00166 } TLastFrameSent;
00167
00168 // constants
00169 #ifdef extern                                    // Keil: declarations for modular programming
00170 const unsigned short MyIP[] =                    // "MYIP1.MYIP2.MYIP3.MYIP4"
00171 {
00172   MYIP_1 + (MYIP_2 << 8),                        // use 'unsigned int' to
00173   MYIP_3 + (MYIP_4 << 8)                         // achieve word alignment
00174 };
00175
00176 const unsigned short SubnetMask[] =              // "SUBMASK1.SUBMASK2.SUBMASK3.SUBMASK4"
00177 {
00178   SUBMASK_1 + (SUBMASK_2 << 8),                  // use 'unsigned int' to
00179   SUBMASK_3 + (SUBMASK_4 << 8)                   // achieve word alignment
00180 };
00181
00182 const unsigned short GatewayIP[] =               // "GWIP1.GWIP2.GWIP3.GWIP4"
00183 {
00184   GWIP_1 + (GWIP_2 << 8),                        // use 'unsigned int' to
00185   GWIP_3 + (GWIP_4 << 8)                         // achieve word alignment
00186 };
00187 #else
00188 extern const unsigned short MyIP[2];             // "MYIP1.MYIP2.MYIP3.MYIP4"
00189 extern const unsigned short SubnetMask[2];       // "SUBMASK1.SUBMASK2.SUBMASK3.SUBMASK4"
00190 extern const unsigned short GatewayIP[2];        // "GWIP1.GWIP2.GWIP3.GWIP4"
00191 extern const unsigned char MyMAC[6];             // "M1-M2-M3-M4-M5-M6"
00192 #endif
00193
00194 // easyWEB's internal variables
00195 extern TTCPStateMachine TCPStateMachine;         // perhaps the most important var at all ;-)
00196 extern TLastFrameSent LastFrameSent;             // retransmission type
00197
00198 extern unsigned short ISNGenHigh;                // upper word of our Initial Sequence Number
00199 extern unsigned long TCPSeqNr;                   // next sequence number to send
00200 extern unsigned long TCPUNASeqNr;                // last unaknowledged sequence number
00201                                                  // incremented AFTER sending data
00202 extern unsigned long TCPAckNr;                   // next seq to receive and ack to send
00203                                                  // incremented AFTER receiving data
00204 extern unsigned char TCPTimer;                   // inc'd each 262ms
00205 extern unsigned char RetryCounter;               // nr. of retransmissions
00206
00207 // properties of the just received frame
00208 extern unsigned short RecdFrameLength;           // EMAC reported frame length
00209 extern unsigned short RecdFrameMAC[3];           // 48 bit MAC
00210 extern unsigned short RecdFrameIP[2];            // 32 bit IP
00211 extern unsigned short RecdIPFrameLength;         // 16 bit IP packet length
00212
00213 // the next 3 buffers must be word-aligned!
00214 // (here the 'RecdIPFrameLength' above does that)
00215 #if defined ( __CC_ARM   )
00216 extern unsigned short __align(4) _TxFrame1[(ETH_HEADER_SIZE + IP_HEADER_SIZE + TCP_HEADER_SIZE + MAX_TCP_TX_DATA_SIZE)/2];
00217 extern unsigned short __align(4) _TxFrame2[(ETH_HEADER_SIZE + MAX_ETH_TX_DATA_SIZE)/2];
00218 extern unsigned short __align(4) _RxTCPBuffer[MAX_TCP_RX_DATA_SIZE/2]; // space for incoming TCP-data
00219 #elif defined ( __ICCARM__ )
00220 #pragma data_alignment=4
00221 extern unsigned short _TxFrame1[(ETH_HEADER_SIZE + IP_HEADER_SIZE + TCP_HEADER_SIZE + MAX_TCP_TX_DATA_SIZE)/2];
00222 #pragma data_alignment=4
00223 extern unsigned short _TxFrame2[(ETH_HEADER_SIZE + MAX_ETH_TX_DATA_SIZE)/2];
00224 #pragma data_alignment=4
00225 extern unsigned short _RxTCPBuffer[MAX_TCP_RX_DATA_SIZE/2]; // space for incoming TCP-data
00226 #elif defined   (  __GNUC__  )
00227 extern unsigned short __attribute__ ((aligned (4))) _TxFrame1[(ETH_HEADER_SIZE + IP_HEADER_SIZE + TCP_HEADER_SIZE + MAX_TCP_TX_DATA_SIZE)/2];
00228 extern unsigned short __attribute__ ((aligned (4))) _TxFrame2[(ETH_HEADER_SIZE + MAX_ETH_TX_DATA_SIZE)/2];
00229 extern unsigned short __attribute__ ((aligned (4))) _RxTCPBuffer[MAX_TCP_RX_DATA_SIZE/2]; // space for incoming TCP-data
00230 #endif
00231 #define TxFrame1      ((unsigned char *)_TxFrame1)
00232 #define TxFrame2      ((unsigned char *)_TxFrame2)
00233 #define RxTCPBuffer   ((unsigned char *)_RxTCPBuffer)
00234
00235 extern unsigned short TxFrame1Size;              // bytes to send in TxFrame1
00236 extern unsigned char TxFrame2Size;               // bytes to send in TxFrame2
00237
00238 extern unsigned char TransmitControl;
00239 #define SEND_FRAME1                    0x01
00240 #define SEND_FRAME2                    0x02
00241
00242 extern unsigned char TCPFlags;
00243 #define TCP_ACTIVE_OPEN                0x01      // easyWEB shall initiate a connection
00244 #define IP_ADDR_RESOLVED               0x02      // IP sucessfully resolved to MAC
00245 #define TCP_TIMER_RUNNING              0x04
00246 #define TIMER_TYPE_RETRY               0x08
00247 #define TCP_CLOSE_REQUESTED            0x10
00248
00249 // prototypes
00250 void DoNetworkStuff(void);
00251
00252 // Handlers for incoming frames
00253 void ProcessEthBroadcastFrame(void);
00254 void ProcessEthIAFrame(void);
00255 void ProcessICMPFrame(void);
00256 void ProcessTCPFrame(void);
00257
00258 // fill TX-buffers
00259 void PrepareARP_REQUEST(void);
00260 void PrepareARP_ANSWER(void);
00261 void PrepareICMP_ECHO_REPLY(void);
00262 void PrepareTCP_FRAME(unsigned short TCPCode);
00263 void PrepareTCP_DATA_FRAME(void);
00264
00265 // general help functions
00266 void SendFrame1(void);
00267 void SendFrame2(void);
00268 void TCPStartRetryTimer(void);
00269 void TCPStartTimeWaitTimer(void);
00270 void TCPRestartTimer(void);
00271 void TCPStopTimer(void);
00272 void TCPHandleRetransmission(void);
00273 void TCPHandleTimeout(void);
00274 unsigned short CalcChecksum(void *Start, unsigned short Count, unsigned char IsTCP);
00275
00276 // functions to work with big-endian numbers
00277 unsigned short SwapBytes(unsigned short Data);
00278 void WriteWBE(unsigned char *Add, unsigned short Data);
00279 void WriteDWBE(unsigned char *Add, unsigned long Data);
00280
00281 // easyWEB-API functions
00282 void TCPLowLevelInit(void);                      // setup timer, LAN-controller, flags...
00283 void TCPPassiveOpen(void);                       // listen for a connection
00284 void TCPActiveOpen(void);                        // open connection
00285 void TCPClose(void);                             // close connection
00286 void TCPReleaseRxBuffer(void);                   // indicate to discard rec'd packet
00287 void TCPTransmitTxBuffer(void);                  // initiate transfer after TxBuffer is filled
00288 //void TCPClockHandler(void) __irq;                // Keil: interrupt service routine for timer 0
00289 void SysTick_Handler (void);                                            // NXP: System tick timer is replaced for TCPClockHandler()
00290
00291
00292 // easyWEB-API global vars and flags
00293 extern unsigned short TCPRxDataCount;            // nr. of bytes rec'd
00294 extern unsigned short TCPTxDataCount;            // nr. of bytes to send
00295
00296 extern unsigned short TCPLocalPort;              // TCP ports
00297 extern unsigned short TCPRemotePort;
00298
00299 extern unsigned short RemoteMAC[3];              // MAC and IP of current TCP-session
00300 extern unsigned short RemoteIP[2];
00301
00302 extern unsigned char SocketStatus;
00303 #define SOCK_ACTIVE                    0x01      // state machine NOT closed
00304 #define SOCK_CONNECTED                 0x02      // user may send & receive data
00305 #define SOCK_DATA_AVAILABLE            0x04      // new data available
00306 #define SOCK_TX_BUF_RELEASED           0x08      // user may fill buffer
00307
00308 #define SOCK_ERROR_MASK                0xF0      // bit-mask to check for errors
00309 #define SOCK_ERR_OK                    0x00      // no error
00310 #define SOCK_ERR_ARP_TIMEOUT           0x10      // timeout waiting for an ARP-REPLY
00311 #define SOCK_ERR_TCP_TIMEOUT           0x20      // timeout waiting for an ACK
00312 #define SOCK_ERR_CONN_RESET            0x30      // connection was reset by the other TCP
00313 #define SOCK_ERR_REMOTE                0x40      // remote TCP caused fatal error
00314 #define SOCK_ERR_ETHERNET              0x50      // network interface error (timeout)
00315
00316 // easyWEB-API buffer-pointers
00317 #define TCP_TX_BUF      ((unsigned char *)TxFrame1 + ETH_HEADER_SIZE + IP_HEADER_SIZE + TCP_HEADER_SIZE)
00318 #define TCP_RX_BUF      ((unsigned char *)RxTCPBuffer)
00319
00320 #endif
00321
Generated on Tue Jun 7 14:58:59 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/telnetd/telnetd.c Source File

C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/telnetd/telnetd.c

Go to the documentation of this file.
00001 /*
00002  * Copyright (c) 2003, Adam Dunkels.
00003  * All rights reserved.
00004  *
00005  * Redistribution and use in source and binary forms, with or without
00006  * modification, are permitted provided that the following conditions
00007  * are met:
00008  * 1. Redistributions of source code must retain the above copyright
00009  *    notice, this list of conditions and the following disclaimer.
00010  * 2. Redistributions in binary form must reproduce the above copyright
00011  *    notice, this list of conditions and the following disclaimer in the
00012  *    documentation and/or other materials provided with the distribution.
00013  * 3. The name of the author may not be used to endorse or promote
00014  *    products derived from this software without specific prior
00015  *    written permission.
00016  *
00017  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS
00018  * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
00019  * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
00020  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
00021  * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
00022  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
00023  * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
00024  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
00025  * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
00026  * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
00027  * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
00028  *
00029  * This file is part of the uIP TCP/IP stack
00030  *
00031  * $Id: telnetd.c,v 1.2 2006/06/07 09:43:54 adam Exp $
00032  *
00033  */
00034
00035 #include "uip.h"
00036 #include "telnetd.h"
00037 #include "memb.h"
00038 #include "shell.h"
00039
00040 #include <string.h>
00041
00042 #define ISO_nl       0x0a
00043 #define ISO_cr       0x0d
00044
00045 struct telnetd_line {
00046   char line[TELNETD_CONF_LINELEN];
00047 };
00048 MEMB(linemem, struct telnetd_line, TELNETD_CONF_NUMLINES);
00049
00050 #define STATE_NORMAL 0
00051 #define STATE_IAC    1
00052 #define STATE_WILL   2
00053 #define STATE_WONT   3
00054 #define STATE_DO     4
00055 #define STATE_DONT   5
00056 #define STATE_CLOSE  6
00057
00058 static struct telnetd_state s;
00059
00060 #define TELNET_IAC   255
00061 #define TELNET_WILL  251
00062 #define TELNET_WONT  252
00063 #define TELNET_DO    253
00064 #define TELNET_DONT  254
00065 /*---------------------------------------------------------------------------*/
00066 static char *
00067 alloc_line(void)
00068 {
00069   return memb_alloc(&linemem);
00070 }
00071 /*---------------------------------------------------------------------------*/
00072 static void
00073 dealloc_line(char *line)
00074 {
00075   memb_free(&linemem, line);
00076 }
00077 /*---------------------------------------------------------------------------*/
00078 void
00079 shell_quit(char *str)
00080 {
00081   s.state = STATE_CLOSE;
00082 }
00083 /*---------------------------------------------------------------------------*/
00084 static void
00085 sendline(char *line)
00086 {
00087   static unsigned int i;
00088
00089   for(i = 0; i < TELNETD_CONF_NUMLINES; ++i) {
00090     if(s.lines[i] == NULL) {
00091       s.lines[i] = line;
00092       break;
00093     }
00094   }
00095   if(i == TELNETD_CONF_NUMLINES) {
00096     dealloc_line(line);
00097   }
00098 }
00099 /*---------------------------------------------------------------------------*/
00100 void
00101 shell_prompt(char *str)
00102 {
00103   char *line;
00104   line = alloc_line();
00105   if(line != NULL) {
00106     strncpy(line, str, TELNETD_CONF_LINELEN);
00107     /*    petsciiconv_toascii(line, TELNETD_CONF_LINELEN);*/
00108     sendline(line);
00109   }
00110 }
00111 /*---------------------------------------------------------------------------*/
00112 void
00113 shell_output(char *str1, char *str2)
00114 {
00115   static unsigned len;
00116   char *line;
00117
00118   line = alloc_line();
00119   if(line != NULL) {
00120     len = strlen(str1);
00121     strncpy(line, str1, TELNETD_CONF_LINELEN);
00122     if(len < TELNETD_CONF_LINELEN) {
00123       strncpy(line + len, str2, TELNETD_CONF_LINELEN - len);
00124     }
00125     len = strlen(line);
00126     if(len < TELNETD_CONF_LINELEN - 2) {
00127       line[len] = ISO_cr;
00128       line[len+1] = ISO_nl;
00129       line[len+2] = 0;
00130     }
00131     /*    petsciiconv_toascii(line, TELNETD_CONF_LINELEN);*/
00132     sendline(line);
00133   }
00134 }
00135 /*---------------------------------------------------------------------------*/
00136 void
00137 telnetd_init(void)
00138 {
00139   uip_listen(HTONS(23));
00140   memb_init(&linemem);
00141   shell_init();
00142 }
00143 /*---------------------------------------------------------------------------*/
00144 static void
00145 acked(void)
00146 {
00147   static unsigned int i;
00148
00149   while(s.numsent > 0) {
00150     dealloc_line(s.lines[0]);
00151     for(i = 1; i < TELNETD_CONF_NUMLINES; ++i) {
00152       s.lines[i - 1] = s.lines[i];
00153     }
00154     s.lines[TELNETD_CONF_NUMLINES - 1] = NULL;
00155     --s.numsent;
00156   }
00157 }
00158 /*---------------------------------------------------------------------------*/
00159 static void
00160 senddata(void)
00161 {
00162   static char *bufptr, *lineptr;
00163   static int buflen, linelen;
00164
00165   bufptr = uip_appdata;
00166   buflen = 0;
00167   for(s.numsent = 0; s.numsent < TELNETD_CONF_NUMLINES &&
00168         s.lines[s.numsent] != NULL ; ++s.numsent) {
00169     lineptr = s.lines[s.numsent];
00170     linelen = strlen(lineptr);
00171     if(linelen > TELNETD_CONF_LINELEN) {
00172       linelen = TELNETD_CONF_LINELEN;
00173     }
00174     if(buflen + linelen < uip_mss()) {
00175       memcpy(bufptr, lineptr, linelen);
00176       bufptr += linelen;
00177       buflen += linelen;
00178     } else {
00179       break;
00180     }
00181   }
00182   uip_send(uip_appdata, buflen);
00183 }
00184 /*---------------------------------------------------------------------------*/
00185 static void
00186 closed(void)
00187 {
00188   static unsigned int i;
00189
00190   for(i = 0; i < TELNETD_CONF_NUMLINES; ++i) {
00191     if(s.lines[i] != NULL) {
00192       dealloc_line(s.lines[i]);
00193     }
00194   }
00195 }
00196 /*---------------------------------------------------------------------------*/
00197 static void
00198 get_char(u8_t c)
00199 {
00200   if(c == ISO_cr) {
00201     return;
00202   }
00203
00204   s.buf[(int)s.bufptr] = c;
00205   if(s.buf[(int)s.bufptr] == ISO_nl ||
00206      s.bufptr == sizeof(s.buf) - 1) {
00207     if(s.bufptr > 0) {
00208       s.buf[(int)s.bufptr] = 0;
00209       /*      petsciiconv_topetscii(s.buf, TELNETD_CONF_LINELEN);*/
00210     }
00211     shell_input(s.buf);
00212     s.bufptr = 0;
00213   } else {
00214     ++s.bufptr;
00215   }
00216 }
00217 /*---------------------------------------------------------------------------*/
00218 static void
00219 sendopt(u8_t option, u8_t value)
00220 {
00221   char *line;
00222   line = alloc_line();
00223   if(line != NULL) {
00224     line[0] = TELNET_IAC;
00225     line[1] = option;
00226     line[2] = value;
00227     line[3] = 0;
00228     sendline(line);
00229   }
00230 }
00231 /*---------------------------------------------------------------------------*/
00232 static void
00233 newdata(void)
00234 {
00235   u16_t len;
00236   u8_t c;
00237   char *dataptr;
00238
00239
00240   len = uip_datalen();
00241   dataptr = (char *)uip_appdata;
00242
00243   while(len > 0 && s.bufptr < sizeof(s.buf)) {
00244     c = *dataptr;
00245     ++dataptr;
00246     --len;
00247     switch(s.state) {
00248     case STATE_IAC:
00249       if(c == TELNET_IAC) {
00250         get_char(c);
00251         s.state = STATE_NORMAL;
00252       } else {
00253         switch(c) {
00254         case TELNET_WILL:
00255           s.state = STATE_WILL;
00256           break;
00257         case TELNET_WONT:
00258           s.state = STATE_WONT;
00259           break;
00260         case TELNET_DO:
00261           s.state = STATE_DO;
00262           break;
00263         case TELNET_DONT:
00264           s.state = STATE_DONT;
00265           break;
00266         default:
00267           s.state = STATE_NORMAL;
00268           break;
00269         }
00270       }
00271       break;
00272     case STATE_WILL:
00273       /* Reply with a DONT */
00274       sendopt(TELNET_DONT, c);
00275       s.state = STATE_NORMAL;
00276       break;
00277
00278     case STATE_WONT:
00279       /* Reply with a DONT */
00280       sendopt(TELNET_DONT, c);
00281       s.state = STATE_NORMAL;
00282       break;
00283     case STATE_DO:
00284       /* Reply with a WONT */
00285       sendopt(TELNET_WONT, c);
00286       s.state = STATE_NORMAL;
00287       break;
00288     case STATE_DONT:
00289       /* Reply with a WONT */
00290       sendopt(TELNET_WONT, c);
00291       s.state = STATE_NORMAL;
00292       break;
00293     case STATE_NORMAL:
00294       if(c == TELNET_IAC) {
00295         s.state = STATE_IAC;
00296       } else {
00297         get_char(c);
00298       }
00299       break;
00300     }
00301
00302
00303   }
00304
00305 }
00306 /*---------------------------------------------------------------------------*/
00307 void
00308 telnetd_appcall(void)
00309 {
00310   static unsigned int i;
00311   if(uip_connected()) {
00312     /*    tcp_markconn(uip_conn, &s);*/
00313     for(i = 0; i < TELNETD_CONF_NUMLINES; ++i) {
00314       s.lines[i] = NULL;
00315     }
00316     s.bufptr = 0;
00317     s.state = STATE_NORMAL;
00318
00319     shell_start();
00320   }
00321
00322   if(s.state == STATE_CLOSE) {
00323     s.state = STATE_NORMAL;
00324     uip_close();
00325     return;
00326   }
00327
00328   if(uip_closed() ||
00329      uip_aborted() ||
00330      uip_timedout()) {
00331     closed();
00332   }
00333
00334   if(uip_acked()) {
00335     acked();
00336   }
00337
00338   if(uip_newdata()) {
00339     newdata();
00340   }
00341
00342   if(uip_rexmit() ||
00343      uip_newdata() ||
00344      uip_acked() ||
00345      uip_connected() ||
00346      uip_poll()) {
00347     senddata();
00348   }
00349 }
00350 /*---------------------------------------------------------------------------*/
Generated on Tue Jun 7 14:58:59 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/telnetd/telnetd.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/telnetd/telnetd.h

Go to the documentation of this file.
00001 /*
00002  * Copyright (c) 2003, Adam Dunkels.
00003  * All rights reserved.
00004  *
00005  * Redistribution and use in source and binary forms, with or without
00006  * modification, are permitted provided that the following conditions
00007  * are met:
00008  * 1. Redistributions of source code must retain the above copyright
00009  *    notice, this list of conditions and the following disclaimer.
00010  * 2. Redistributions in binary form must reproduce the above
00011  *    copyright notice, this list of conditions and the following
00012  *    disclaimer in the documentation and/or other materials provided
00013  *    with the distribution.
00014  * 3. The name of the author may not be used to endorse or promote
00015  *    products derived from this software without specific prior
00016  *    written permission.
00017  *
00018  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS
00019  * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
00020  * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
00021  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
00022  * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
00023  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
00024  * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
00025  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
00026  * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
00027  * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
00028  * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
00029  *
00030  * This file is part of the uIP TCP/IP stack
00031  *
00032  * $Id: telnetd.h,v 1.2 2006/06/07 09:43:54 adam Exp $
00033  *
00034  */
00035 #ifndef __TELNETD_H__
00036 #define __TELNETD_H__
00037
00038 #include "uipopt.h"
00039
00040 void telnetd_appcall(void);
00041
00042 #ifndef TELNETD_CONF_LINELEN
00043 #define TELNETD_CONF_LINELEN 40
00044 #endif
00045 #ifndef TELNETD_CONF_NUMLINES
00046 #define TELNETD_CONF_NUMLINES 16
00047 #endif
00048
00049 struct telnetd_state {
00050   char *lines[TELNETD_CONF_NUMLINES];
00051   char buf[TELNETD_CONF_LINELEN];
00052   char bufptr;
00053   u8_t numsent;
00054   u8_t state;
00055 };
00056
00057 typedef struct telnetd_state uip_tcp_appstate_t;
00058
00059 #ifndef UIP_APPCALL
00060 #define UIP_APPCALL     telnetd_appcall
00061 #endif
00062
00063 #endif /* __TELNETD_H__ */
Generated on Tue Jun 7 14:58:59 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/Project_Template/Eclipse_GNU/template.c Source File

C:/nxpdrv/LPC1700CMSIS/Examples/Project_Template/Eclipse_GNU/template.c

Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          template.c                              yyyy-mm-dd
00003 */
00025 /* Include files */
00026 /* <<add include files here>> */
00027 #include "lpc17xx_libcfg.h"
00028
00029 /* Add Private Types */
00030 /* <<add private type here >> */
00031
00032 /* Add Private Variables */
00033 /* <<add private variables here >> */
00034
00035 /* Add Private Functions */
00036 /* <<add private functions here >> */
00037
00041 int c_entry(void)
00042 {
00043         /* <<add code here >> */
00044         while(1);
00045         return 1;
00046 }
00047
00048 /* Support required entry point for other toolchain */
00049 int main (void)
00050 {
00051         return c_entry();
00052 }
00053
00054 #ifdef  DEBUG
00055 /*******************************************************************************
00056 * @brief                Reports the name of the source file and the source line number
00057 *                               where the CHECK_PARAM error has occurred.
00058 * @param[in]    file Pointer to the source file name
00059 * @param[in]    line assert_param error line source number
00060 * @return               None
00061 *******************************************************************************/
00062 void check_failed(uint8_t *file, uint32_t line)
00063 {
00064         /* User can add his own implementation to report the file name and line number,
00065          ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
00066
00067         /* Infinite loop */
00068         while(1);
00069 }
00070 #endif
00071
Generated on Tue Jun 7 14:59:02 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/SSP/TI/ti_test.c Source File

C:/nxpdrv/LPC1700CMSIS/Examples/SSP/TI/ti_test.c

Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          ti_test.c                               2010-05-21
00003 */
00026 #include "lpc17xx_ssp.h"
00027 #include "lpc17xx_libcfg.h"
00028 #include "lpc17xx_pinsel.h"
00029 #include "debug_frmwrk.h"
00030
00031 /* Example group ----------------------------------------------------------- */
00037 /************************** PRIVATE DEFINITIONS ***********************/
00038 /* Idle char */
00039 #define IDLE_CHAR       0xFF
00040
00042 #define USEDSSPDEV_M            0
00043
00045 #define USEDSSPDEV_S            1
00046
00048 #define BUFFER_SIZE                     0x40
00049
00050 #if (USEDSSPDEV_M == USEDSSPDEV_S)
00051 #error "Master and Slave SSP device are duplicated!"
00052 #endif
00053
00054 #if (USEDSSPDEV_M == 0)
00055 #define SSPDEV_M LPC_SSP0
00056 #elif (USEDSSPDEV_M == 1)
00057 #define SSPDEV_M LPC_SSP1
00058 #elif
00059 #error "Master SSP device not defined!"
00060 #endif
00061
00062 #if (USEDSSPDEV_S == 0)
00063 #define SSPDEV_S LPC_SSP0
00064 #elif (USEDSSPDEV_S == 1)
00065 #define SSPDEV_S LPC_SSP1
00066 #elif
00067 #error "Slave SSP device not defined!"
00068 #endif
00069
00070 /************************** PRIVATE VARIABLES *************************/
00071 uint8_t menu1[] =
00072 "********************************************************************************\n\r"
00073 "Hello NXP Semiconductors \n\r"
00074 "SSP demo \n\r"
00075 "\t - MCU: LPC17xx \n\r"
00076 "\t - Core: ARM Cortex-M3 \n\r"
00077 "\t - Communicate via: UART0 - 115.200 kbps \n\r"
00078 " This example uses two SSP peripherals in TI frame format \n\r"
00079 " \t one is set as master mode and the other is set as slave mode. \n\r"
00080 "\t The master and slave transfer a number of data bytes together \n\r"
00081 "\t in interrupt mode \n\r"
00082 "********************************************************************************\n\r";
00083 uint8_t menu2[] = "Demo terminated! \n\r";
00084
00085 // SSP Configuration structure variable
00086 SSP_CFG_Type SSP_ConfigStruct;
00087
00088 /* These variable below are used in Master SSP interrupt mode -------------------- */
00089 /* Read data pointer */
00090 uint8_t *pRdBuf_M;
00091 /* Write data pointer */
00092 uint8_t *pWrBuf_M;
00093 /* Index of read data mode */
00094 uint32_t RdIdx_M;
00095 /* Index of write data mode */
00096 uint32_t WrIdx_M;
00097 /* Length of data */
00098 uint32_t DatLen_M;
00099 /* Status Flag indicates current SSP transmission complete or not */
00100 __IO Bool complete_M;
00101 /* Master Tx Buffer */
00102 uint8_t Master_Tx_Buf[BUFFER_SIZE];
00103 /* Master Rx Buffer */
00104 uint8_t Master_Rx_Buf[BUFFER_SIZE];
00105
00106
00107 /* These variable below are used in Slave SSP interrupt mode -------------------- */
00108 /* Read data pointer */
00109 uint8_t *pRdBuf_S;
00110 /* Write data pointer */
00111 uint8_t *pWrBuf_S;
00112 /* Index of read data mode */
00113 uint32_t RdIdx_S;
00114 /* Index of write data mode */
00115 uint32_t WrIdx_S;
00116 /* Length of data */
00117 uint32_t DatLen_S;
00118 /* Status Flag indicates current SSP transmission complete or not */
00119 __IO Bool complete_S;
00120 /* Slave Tx Buffer */
00121 uint8_t Slave_Tx_Buf[BUFFER_SIZE];
00122 /* Slave Rx Buffer */
00123 uint8_t Slave_Rx_Buf[BUFFER_SIZE];
00124
00125
00126 /************************** PRIVATE FUNCTIONS *************************/
00127 void SSP0_IRQHandler(void);
00128 void SSP1_IRQHandler(void);
00129 void ssp_Master_IntHandler(void);
00130 void ssp_Slave_IntHandler(void);
00131
00132 int32_t ssp_MasterReadWrite (LPC_SSP_TypeDef *SSPx,
00133                          void *rbuffer,
00134                          void *wbuffer,
00135                          uint32_t length);
00136 int32_t ssp_SlaveReadWrite (LPC_SSP_TypeDef *SSPx,
00137                          void *rbuffer,
00138                          void *wbuffer,
00139                          uint32_t length);
00140 void print_menu(void);
00141 void Buffer_Init(void);
00142 void Buffer_Verify(void);
00143 void Error_Loop(void);
00144
00145 /*----------------- INTERRUPT SERVICE ROUTINES --------------------------*/
00146 /*********************************************************************/
00152 void ssp_Master_IntHandler(void)
00153 {
00154         uint16_t tmp;
00155
00156         /* Clear all interrupt */
00157         SSP_ClearIntPending(SSPDEV_M, SSP_INTCLR_ROR);
00158         SSP_ClearIntPending(SSPDEV_M, SSP_INTCLR_RT);
00159
00160         /* check if RX FIFO contains data */
00161         while (SSP_GetStatus(SSPDEV_M, SSP_STAT_RXFIFO_NOTEMPTY) == SET)
00162         {
00163                 tmp = SSP_ReceiveData(SSPDEV_M);
00164                 if ((pRdBuf_M!= NULL) && (RdIdx_M < DatLen_M))
00165                 {
00166                         *(pRdBuf_M + RdIdx_M) = (uint8_t) tmp;
00167                 }
00168                 RdIdx_M++;
00169         }
00170
00171         /* Check if TX FIFO is not full */
00172         while ((SSP_GetStatus(SSPDEV_M, SSP_STAT_TXFIFO_NOTFULL) == SET)
00173                         && (WrIdx_M < DatLen_M))
00174         {
00175                 /* check if RX FIFO contains data */
00176                 while (SSP_GetStatus(SSPDEV_M, SSP_STAT_RXFIFO_NOTEMPTY) == SET)
00177                 {
00178                         tmp = SSP_ReceiveData(SSPDEV_M);
00179                         if ((pRdBuf_M!= NULL) && (RdIdx_M < DatLen_M))
00180                         {
00181                                 *(pRdBuf_M + RdIdx_M) = (uint8_t) tmp;
00182                         }
00183                         RdIdx_M++;
00184                 }
00185
00186                 if (pWrBuf_M != NULL)
00187                 {
00188                         SSP_SendData(SSPDEV_M, (uint16_t)(*(pWrBuf_M + WrIdx_M)));
00189                 }
00190                 else
00191                 {
00192                         SSP_SendData(SSPDEV_M, IDLE_CHAR);
00193                 }
00194                 WrIdx_M++;
00195         }
00196
00197         /* There're more data to send */
00198         if (WrIdx_M < DatLen_M)
00199         {
00200                 SSP_IntConfig(SSPDEV_M, SSP_INTCFG_TX, ENABLE);
00201         }
00202         /* Otherwise */
00203         else
00204         {
00205                 SSP_IntConfig(SSPDEV_M, SSP_INTCFG_TX, DISABLE);
00206         }
00207
00208         /* There're more data to receive */
00209         if (RdIdx_M < DatLen_M)
00210         {
00211                 SSP_IntConfig(SSPDEV_M, SSP_INTCFG_ROR, ENABLE);
00212                 SSP_IntConfig(SSPDEV_M, SSP_INTCFG_RT, ENABLE);
00213                 SSP_IntConfig(SSPDEV_M, SSP_INTCFG_RX, ENABLE);
00214         }
00215         /* Otherwise */
00216         else
00217         {
00218                 SSP_IntConfig(SSPDEV_M, SSP_INTCFG_ROR, DISABLE);
00219                 SSP_IntConfig(SSPDEV_M, SSP_INTCFG_RT, DISABLE);
00220                 SSP_IntConfig(SSPDEV_M, SSP_INTCFG_RX, DISABLE);
00221         }
00222
00223         /* Set Flag if both Read and Write completed */
00224         if ((WrIdx_M == DatLen_M) && (RdIdx_M == DatLen_M))
00225         {
00226                 complete_M = TRUE;
00227         }
00228 }
00229
00230
00231
00232 /*********************************************************************/
00238 void ssp_Slave_IntHandler(void)
00239 {
00240         uint16_t tmp;
00241
00242         /* Clear all interrupt */
00243         SSP_ClearIntPending(SSPDEV_S, SSP_INTCLR_ROR);
00244         SSP_ClearIntPending(SSPDEV_S, SSP_INTCLR_RT);
00245
00246         /* check if RX FIFO contains data */
00247         while (SSP_GetStatus(SSPDEV_S, SSP_STAT_RXFIFO_NOTEMPTY) == SET)
00248         {
00249                 tmp = SSP_ReceiveData(SSPDEV_S);
00250                 if ((pRdBuf_S!= NULL) && (RdIdx_S < DatLen_S))
00251                 {
00252                         *(pRdBuf_S + RdIdx_S) = (uint8_t) tmp;
00253                 }
00254                 RdIdx_S++;
00255         }
00256
00257         /* Check if TX FIFO is not full */
00258         while ((SSP_GetStatus(SSPDEV_S, SSP_STAT_TXFIFO_NOTFULL) == SET)
00259                         && (WrIdx_S < DatLen_S))
00260         {
00261                 /* check if RX FIFO contains data */
00262                 while (SSP_GetStatus(SSPDEV_S, SSP_STAT_RXFIFO_NOTEMPTY) == SET)
00263                 {
00264                         tmp = SSP_ReceiveData(SSPDEV_S);
00265                         if ((pRdBuf_S!= NULL) && (RdIdx_S < DatLen_S))
00266                         {
00267                                 *(pRdBuf_S + RdIdx_S) = (uint8_t) tmp;
00268                         }
00269                         RdIdx_S++;
00270                 }
00271
00272                 if (pWrBuf_S != NULL)
00273                 {
00274                         SSP_SendData(SSPDEV_S, (uint16_t)(*(pWrBuf_S + WrIdx_S)));
00275                 }
00276                 else
00277                 {
00278                         SSP_SendData(SSPDEV_S, IDLE_CHAR);
00279                 }
00280                 WrIdx_S++;
00281         }
00282
00283         /* There're more data to send */
00284         if (WrIdx_S < DatLen_S)
00285         {
00286                 SSP_IntConfig(SSPDEV_S, SSP_INTCFG_TX, ENABLE);
00287         }
00288         /* Otherwise */
00289         else
00290         {
00291                 SSP_IntConfig(SSPDEV_S, SSP_INTCFG_TX, DISABLE);
00292         }
00293
00294         /* There're more data to receive */
00295         if (RdIdx_S < DatLen_S)
00296         {
00297                 SSP_IntConfig(SSPDEV_S, SSP_INTCFG_ROR, ENABLE);
00298                 SSP_IntConfig(SSPDEV_S, SSP_INTCFG_RT, ENABLE);
00299                 SSP_IntConfig(SSPDEV_S, SSP_INTCFG_RX, ENABLE);
00300         }
00301         /* Otherwise */
00302         else
00303         {
00304                 SSP_IntConfig(SSPDEV_S, SSP_INTCFG_ROR, DISABLE);
00305                 SSP_IntConfig(SSPDEV_S, SSP_INTCFG_RT, DISABLE);
00306                 SSP_IntConfig(SSPDEV_S, SSP_INTCFG_RX, DISABLE);
00307         }
00308
00309         /* Set Flag if both Read and Write completed */
00310         if ((WrIdx_S == DatLen_S) && (RdIdx_S == DatLen_S))
00311         {
00312                 complete_S = TRUE;
00313         }
00314 }
00315
00316
00317 /*********************************************************************/
00322 void SSP0_IRQHandler(void)
00323 {
00324 #if (USEDSSPDEV_M == 0)
00325         ssp_Master_IntHandler();
00326 #endif
00327
00328 #if (USEDSSPDEV_S == 0)
00329         ssp_Slave_IntHandler();
00330 #endif
00331 }
00332
00333 /*********************************************************************/
00338 void SSP1_IRQHandler(void)
00339 {
00340 #if (USEDSSPDEV_M == 1)
00341         ssp_Master_IntHandler();
00342 #endif
00343
00344 #if (USEDSSPDEV_S == 1)
00345         ssp_Slave_IntHandler();
00346 #endif
00347 }
00348
00349
00350 /*-------------------------PRIVATE FUNCTIONS------------------------------*/
00351 /*********************************************************************/
00359 int32_t ssp_MasterReadWrite (LPC_SSP_TypeDef *SSPx,
00360                          void *rbuffer,
00361                          void *wbuffer,
00362                          uint32_t length)
00363 {
00364         uint16_t tmp;
00365         pRdBuf_M = (uint8_t *) rbuffer;
00366     pWrBuf_M = (uint8_t *) wbuffer;
00367     DatLen_M = length;
00368     RdIdx_M = 0;
00369     WrIdx_M = 0;
00370
00371     // wait for current SSP activity complete
00372     while (SSP_GetStatus(SSPx, SSP_STAT_BUSY));
00373
00374         /* Clear all remaining data in RX FIFO */
00375         while (SSP_GetStatus(SSPx, SSP_STAT_RXFIFO_NOTEMPTY))
00376         {
00377                 tmp = SSP_ReceiveData(SSPx);
00378         }
00379
00380 #if (USEDSSPDEV_M == 0)
00381         if (length != 0)
00382         {
00383                 SSP0_IRQHandler();
00384         }
00385 #endif
00386 #if (USEDSSPDEV_M == 1)
00387         if (length != 0)
00388         {
00389                 SSP1_IRQHandler();
00390         }
00391 #endif
00392
00393         // Return 0
00394         return 0;
00395 }
00396
00397 /*********************************************************************/
00405 int32_t ssp_SlaveReadWrite (LPC_SSP_TypeDef *SSPx,
00406                          void *rbuffer,
00407                          void *wbuffer,
00408                          uint32_t length)
00409 {
00410         uint16_t tmp;
00411         pRdBuf_S = (uint8_t *) rbuffer;
00412     pWrBuf_S = (uint8_t *) wbuffer;
00413     DatLen_S = length;
00414     RdIdx_S = 0;
00415     WrIdx_S = 0;
00416
00417     // wait for current SSP activity complete
00418     while (SSP_GetStatus(SSPx, SSP_STAT_BUSY))
00419     {
00420         tmp = SSP_ReceiveData(SSPx);
00421     }
00422
00423         /* Clear all remaining data in RX FIFO */
00424         while (SSP_GetStatus(SSPx, SSP_STAT_RXFIFO_NOTEMPTY))
00425         {
00426                 tmp = SSP_ReceiveData(SSPx);
00427         }
00428 #if (USEDSSPDEV_S == 0)
00429         if (length != 0)
00430         {
00431                 SSP0_IRQHandler();
00432         }
00433 #endif
00434 #if (USEDSSPDEV_S == 1)
00435         if (length != 0)
00436         {
00437                 SSP1_IRQHandler();
00438         }
00439 #endif
00440
00441         // Return 0
00442         return 0;
00443 }
00444
00445
00446 /*********************************************************************/
00451 void Buffer_Init(void)
00452 {
00453         uint8_t i;
00454
00455         for (i = 0; i < BUFFER_SIZE; i++) {
00456                 Master_Tx_Buf[i] = i;
00457                 Slave_Tx_Buf[i] = i;
00458                 Master_Rx_Buf[i] = 0;
00459                 Slave_Rx_Buf[i] = 0;
00460         }
00461
00462 }
00463
00464 /*********************************************************************/
00469 void Buffer_Verify(void)
00470 {
00471         uint8_t i;
00472         uint8_t *pMTx = (uint8_t *) &Master_Tx_Buf[0];
00473         uint8_t *pSTx = (uint8_t *) &Slave_Tx_Buf[0];
00474         uint8_t *pMRx = (uint8_t *) &Master_Rx_Buf[0];
00475         uint8_t *pSRx = (uint8_t *) &Slave_Rx_Buf[0];
00476
00477         for ( i = 0; i < BUFFER_SIZE; i++ )
00478         {
00479                 if ((*pSRx++ != *pMTx++) || (*pMRx++ != *pSTx++))
00480                 {
00481                         /* Call Error Loop */
00482                         Error_Loop();
00483                 }
00484         }
00485 }
00486
00487 /*********************************************************************/
00492 void Error_Loop(void)
00493 {
00494         /* Loop forever */
00495         _DBG_("Verify fail!\n\r");
00496         while (1);
00497 }
00498
00499
00500 /*********************************************************************/
00505 void print_menu(void)
00506 {
00507         _DBG(menu1);
00508 }
00509
00510
00511 /*-------------------------MAIN FUNCTION------------------------------*/
00512 /*********************************************************************/
00517 int c_entry(void)
00518 {
00519         PINSEL_CFG_Type PinCfg;
00520
00521         /* Initialize debug via UART0
00522          * – 115200bps
00523          * – 8 data bit
00524          * – No parity
00525          * – 1 stop bit
00526          * – No flow control
00527          */
00528         debug_frmwrk_init();
00529
00530         // print welcome screen
00531         print_menu();
00532
00533         /*
00534          * Initialize SSP pin connect
00535          * P0.6 - SSEL1
00536          * P0.7 - SCK1
00537          * P0.8 - MISO1
00538          * P0.9 - MOSI1
00539          */
00540         PinCfg.Funcnum = 2;
00541         PinCfg.OpenDrain = 0;
00542         PinCfg.Pinmode = 0;
00543         PinCfg.Portnum = 0;
00544         PinCfg.Pinnum = 6;
00545         PINSEL_ConfigPin(&PinCfg);
00546         PinCfg.Pinnum = 7;
00547         PINSEL_ConfigPin(&PinCfg);
00548         PinCfg.Pinnum = 8;
00549         PINSEL_ConfigPin(&PinCfg);
00550         PinCfg.Pinnum = 9;
00551         PINSEL_ConfigPin(&PinCfg);
00552
00553
00554         /*
00555          * Initialize SSP pin connect
00556          * P0.15 - SCK
00557          * P0.16 - SSEL
00558          * P0.17 - MISO
00559          * P0.18 - MOSI
00560          */
00561         PinCfg.Funcnum = 2;
00562         PinCfg.OpenDrain = 0;
00563         PinCfg.Pinmode = 0;
00564         PinCfg.Portnum = 0;
00565         PinCfg.Pinnum = 15;
00566         PINSEL_ConfigPin(&PinCfg);
00567         PinCfg.Pinnum = 17;
00568         PINSEL_ConfigPin(&PinCfg);
00569         PinCfg.Pinnum = 18;
00570         PINSEL_ConfigPin(&PinCfg);
00571         PinCfg.Pinnum = 16;
00572         PINSEL_ConfigPin(&PinCfg);
00573
00574         /* Initializing Master SSP device section ------------------------------------------- */
00575         // initialize SSP configuration structure to default
00576         SSP_ConfigStructInit(&SSP_ConfigStruct);
00577         // Re-configure SSP to TI frame format
00578         SSP_ConfigStruct.FrameFormat = SSP_FRAME_TI;
00579         // Initialize SSP peripheral with parameter given in structure above
00580         SSP_Init(SSPDEV_M, &SSP_ConfigStruct);
00581
00582         // Enable SSP peripheral
00583         SSP_Cmd(SSPDEV_M, ENABLE);
00584
00585
00586     /* Initializing Slave SSP device section ------------------------------------------- */
00587         // initialize SSP configuration structure to default
00588         SSP_ConfigStructInit(&SSP_ConfigStruct);
00589         /* Re-configure mode for SSP device */
00590         SSP_ConfigStruct.Mode = SSP_SLAVE_MODE;
00591         // Re-configure SSP to TI frame format
00592         SSP_ConfigStruct.FrameFormat = SSP_FRAME_TI;
00593         // Initialize SSP peripheral with parameter given in structure above
00594         SSP_Init(SSPDEV_S, &SSP_ConfigStruct);
00595
00596         // Enable SSP peripheral
00597         SSP_Cmd(SSPDEV_S, ENABLE);
00598
00599         /* Interrupt configuration section ------------------------------------------------- */
00600 #if ((USEDSSPDEV_S == 0) || (USEDSSPDEV_M == 0))
00601         /* preemption = 1, sub-priority = 1 */
00602         NVIC_SetPriority(SSP0_IRQn, ((0x01<<3)|0x01));
00603         /* Enable SSP0 interrupt */
00604         NVIC_EnableIRQ(SSP0_IRQn);
00605 #endif
00606 #if ((USEDSSPDEV_S == 1) || (USEDSSPDEV_M == 1))
00607         /* preemption = 1, sub-priority = 1 */
00608         NVIC_SetPriority(SSP1_IRQn, ((0x01<<3)|0x01));
00609         /* Enable SSP0 interrupt */
00610         NVIC_EnableIRQ(SSP1_IRQn);
00611 #endif
00612
00613         /* Initializing Buffer section ------------------------------------------------- */
00614         Buffer_Init();
00615
00616         /* Start Transmit/Receive between Master and Slave ----------------------------- */
00617         complete_S = FALSE;
00618         complete_M = FALSE;
00619
00620         /* Slave must be ready first */
00621         ssp_SlaveReadWrite(SSPDEV_S, Slave_Rx_Buf, Slave_Tx_Buf, BUFFER_SIZE);
00622         /* Then Master can start its transferring */
00623         ssp_MasterReadWrite(SSPDEV_M, Master_Rx_Buf, Master_Tx_Buf, BUFFER_SIZE);
00624
00625         /* Wait for complete */
00626         while ((complete_S == FALSE) || (complete_M == FALSE));
00627
00628         /* Verify buffer */
00629         Buffer_Verify();
00630
00631         _DBG_("Verify success!\n\r");
00632     /* Loop forever */
00633     while(1);
00634     return 1;
00635 }
00636
00637 /* With ARM and GHS toolsets, the entry point is main() - this will
00638    allow the linker to generate wrapper code to setup stacks, allocate
00639    heap area, and initialize and copy code and data segments. For GNU
00640    toolsets, the entry point is through __start() in the crt0_gnu.asm
00641    file, and that startup code will setup stacks and data */
00642 int main(void)
00643 {
00644     return c_entry();
00645 }
00646
00647
00648 #ifdef  DEBUG
00649 /*******************************************************************************
00650 * @brief                Reports the name of the source file and the source line number
00651 *                               where the CHECK_PARAM error has occurred.
00652 * @param[in]    file Pointer to the source file name
00653 * @param[in]    line assert_param error line source number
00654 * @return               None
00655 *******************************************************************************/
00656 void check_failed(uint8_t *file, uint32_t line)
00657 {
00658         /* User can add his own implementation to report the file name and line number,
00659          ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
00660
00661         /* Infinite loop */
00662         while(1);
00663 }
00664 #endif
00665
00666 /*
00667  * @}
00668  */
Generated on Tue Jun 7 14:59:02 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/uip/timer.c Source File

C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/uip/timer.c

Go to the documentation of this file.
00001
00013 /*
00014  * Copyright (c) 2004, Swedish Institute of Computer Science.
00015  * All rights reserved.
00016  *
00017  * Redistribution and use in source and binary forms, with or without
00018  * modification, are permitted provided that the following conditions
00019  * are met:
00020  * 1. Redistributions of source code must retain the above copyright
00021  *    notice, this list of conditions and the following disclaimer.
00022  * 2. Redistributions in binary form must reproduce the above copyright
00023  *    notice, this list of conditions and the following disclaimer in the
00024  *    documentation and/or other materials provided with the distribution.
00025  * 3. Neither the name of the Institute nor the names of its contributors
00026  *    may be used to endorse or promote products derived from this software
00027  *    without specific prior written permission.
00028  *
00029  * THIS SOFTWARE IS PROVIDED BY THE INSTITUTE AND CONTRIBUTORS ``AS IS'' AND
00030  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
00031  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
00032  * ARE DISCLAIMED.  IN NO EVENT SHALL THE INSTITUTE OR CONTRIBUTORS BE LIABLE
00033  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
00034  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
00035  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
00036  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
00037  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
00038  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
00039  * SUCH DAMAGE.
00040  *
00041  * This file is part of the uIP TCP/IP stack
00042  *
00043  * Author: Adam Dunkels <adam@sics.se>
00044  *
00045  * $Id: timer.c,v 1.2 2006/06/12 08:00:30 adam Exp $
00046  */
00047
00048 #include "clock.h"
00049 #include "timer.h"
00050
00051 /*---------------------------------------------------------------------------*/
00063 void
00064 timer_set(struct timer *t, clock_time_t interval)
00065 {
00066   t->interval = interval;
00067   t->start = clock_time();
00068 }
00069 /*---------------------------------------------------------------------------*/
00083 void
00084 timer_reset(struct timer *t)
00085 {
00086   t->start += t->interval;
00087 }
00088 /*---------------------------------------------------------------------------*/
00103 void
00104 timer_restart(struct timer *t)
00105 {
00106   t->start = clock_time();
00107 }
00108 /*---------------------------------------------------------------------------*/
00120 int
00121 timer_expired(struct timer *t)
00122 {
00123   return (clock_time_t)(clock_time() - t->start) >= (clock_time_t)t->interval;
00124 }
00125 /*---------------------------------------------------------------------------*/
00126
Generated on Tue Jun 7 14:59:00 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/uip/timer.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/uip/timer.h

Go to the documentation of this file.
00001
00031 /*
00032  * Copyright (c) 2004, Swedish Institute of Computer Science.
00033  * All rights reserved.
00034  *
00035  * Redistribution and use in source and binary forms, with or without
00036  * modification, are permitted provided that the following conditions
00037  * are met:
00038  * 1. Redistributions of source code must retain the above copyright
00039  *    notice, this list of conditions and the following disclaimer.
00040  * 2. Redistributions in binary form must reproduce the above copyright
00041  *    notice, this list of conditions and the following disclaimer in the
00042  *    documentation and/or other materials provided with the distribution.
00043  * 3. Neither the name of the Institute nor the names of its contributors
00044  *    may be used to endorse or promote products derived from this software
00045  *    without specific prior written permission.
00046  *
00047  * THIS SOFTWARE IS PROVIDED BY THE INSTITUTE AND CONTRIBUTORS ``AS IS'' AND
00048  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
00049  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
00050  * ARE DISCLAIMED.  IN NO EVENT SHALL THE INSTITUTE OR CONTRIBUTORS BE LIABLE
00051  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
00052  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
00053  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
00054  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
00055  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
00056  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
00057  * SUCH DAMAGE.
00058  *
00059  * This file is part of the uIP TCP/IP stack
00060  *
00061  * Author: Adam Dunkels <adam@sics.se>
00062  *
00063  * $Id: timer.h,v 1.3 2006/06/11 21:46:39 adam Exp $
00064  */
00065 #ifndef __TIMER_H__
00066 #define __TIMER_H__
00067
00068 #include "clock.h"
00069
00078 struct timer {
00079   clock_time_t start;
00080   clock_time_t interval;
00081 };
00082
00083 void timer_set(struct timer *t, clock_time_t interval);
00084 void timer_reset(struct timer *t);
00085 void timer_restart(struct timer *t);
00086 int timer_expired(struct timer *t);
00087
00088 #endif /* __TIMER_H__ */
00089
Generated on Tue Jun 7 14:59:00 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/TIMER/Capture/timer_capture.c Source File

C:/nxpdrv/LPC1700CMSIS/Examples/TIMER/Capture/timer_capture.c

Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          timer_capture.c                         2010-05-21
00003 */
00025 #include "lpc17xx_timer.h"
00026 #include "lpc17xx_libcfg.h"
00027 #include "lpc17xx_pinsel.h"
00028 #include "debug_frmwrk.h"
00029 #include "lpc17xx_gpio.h"
00030
00031 /* Example group ----------------------------------------------------------- */
00037 /************************** PRIVATE VARIABLES *************************/
00038 uint8_t menu1[] =
00039 "********************************************************************************\n\r"
00040 "Hello NXP Semiconductors \n\r"
00041 "Timer Match interrupt demo \n\r"
00042 "\t - MCU: LPC17xx \n\r"
00043 "\t - Core: ARM Cortex-M3 \n\r"
00044 "\t - Communicate via: UART0 -  115200 bps \n\r"
00045 " Use timer 0 to take a snapshot of the timer value when an input signal \n\r"
00046 " on CAP0.0 transitions \n\r"
00047 "********************************************************************************\n\r";
00048
00049 // UART Configuration structure variable
00050 UART_CFG_Type UARTConfigStruct;
00051 uint32_t MatchCount;
00052
00053 //timer init
00054 TIM_TIMERCFG_Type TIM_ConfigStruct;
00055 TIM_MATCHCFG_Type TIM_MatchConfigStruct ;
00056 TIM_CAPTURECFG_Type TIM_CaptureConfigStruct;
00057 uint8_t volatile timer0_flag = FALSE, timer1_flag = FALSE;
00058
00059 /************************** PRIVATE FUNCTIONS *************************/
00060 /* Interrupt service routines */
00061 void TIMER0_IRQHandler(void);
00062 void TIMER1_IRQHandler(void);
00063
00064 void print_menu(void);
00065 /*----------------- INTERRUPT SERVICE ROUTINES --------------------------*/
00066 /*********************************************************************/
00071 void TIMER0_IRQHandler(void)
00072 {
00073         if (TIM_GetIntCaptureStatus(LPC_TIM0,0))
00074         {
00075                 TIM_ClearIntCapturePending(LPC_TIM0,0);
00076                 _DBG("Time capture: ");
00077                 _DBH32(TIM_GetCaptureValue(LPC_TIM0,0));_DBG_("");
00078         }
00079 }
00080
00081 /*********************************************************************/
00086 void TIMER1_IRQHandler(void)
00087 {
00088         if (TIM_GetIntCaptureStatus(LPC_TIM1,0))
00089         {
00090                 TIM_ClearIntCapturePending(LPC_TIM1,0);
00091                 _DBG("Time capture: ");
00092                 _DBH32(TIM_GetCaptureValue(LPC_TIM1,0));_DBG_("");
00093         }
00094 }
00095
00096 /*-------------------------PRIVATE FUNCTIONS------------------------------*/
00097 /*********************************************************************/
00102 void print_menu(void)
00103 {
00104         _DBG(menu1);
00105 }
00106
00107
00108 /*-------------------------MAIN FUNCTION------------------------------*/
00109 /*********************************************************************/
00114 int c_entry(void)
00115 {
00116         PINSEL_CFG_Type PinCfg;
00117
00118         /* Initialize debug via UART0
00119          * – 115200bps
00120          * – 8 data bit
00121          * – No parity
00122          * – 1 stop bit
00123          * – No flow control
00124          */
00125         debug_frmwrk_init();
00126
00127         // print welcome screen
00128         print_menu();
00129
00130         //Config P1.26 as CAP0.0
00131         PinCfg.Funcnum = 3;
00132         PinCfg.OpenDrain = 0;
00133         PinCfg.Pinmode = 0;
00134         PinCfg.Portnum = 1;
00135         PinCfg.Pinnum = 26;
00136         PINSEL_ConfigPin(&PinCfg);
00137
00138         // Initialize timer 0, prescale count time of 1000000uS = 1S
00139         TIM_ConfigStruct.PrescaleOption = TIM_PRESCALE_USVAL;
00140         TIM_ConfigStruct.PrescaleValue  = 1000000;
00141
00142         // use channel 0, CAPn.0
00143         TIM_CaptureConfigStruct.CaptureChannel = 0;
00144         // Enable capture on CAPn.0 rising edge
00145         TIM_CaptureConfigStruct.RisingEdge = ENABLE;
00146         // Enable capture on CAPn.0 falling edge
00147         TIM_CaptureConfigStruct.FallingEdge = ENABLE;
00148         // Generate capture interrupt
00149         TIM_CaptureConfigStruct.IntOnCaption = ENABLE;
00150
00151
00152         // Set configuration for Tim_config and Tim_MatchConfig
00153         TIM_Init(LPC_TIM0, TIM_TIMER_MODE,&TIM_ConfigStruct);
00154         TIM_ConfigCapture(LPC_TIM0, &TIM_CaptureConfigStruct);
00155         TIM_ResetCounter(LPC_TIM0);
00156
00157
00158         /* preemption = 1, sub-priority = 1 */
00159         NVIC_SetPriority(TIMER0_IRQn, ((0x01<<3)|0x01));
00160         /* Enable interrupt for timer 0 */
00161         NVIC_EnableIRQ(TIMER0_IRQn);
00162         // To start timer 0
00163         TIM_Cmd(LPC_TIM0,ENABLE);
00164
00165         while (1);
00166         return 1;
00167 }
00168
00169 /* Support required entry point for other toolchain */
00170 int main (void)
00171 {
00172         return c_entry();
00173 }
00174 #ifdef  DEBUG
00175 /*******************************************************************************
00176 * @brief                Reports the name of the source file and the source line number
00177 *                               where the CHECK_PARAM error has occurred.
00178 * @param[in]    file Pointer to the source file name
00179 * @param[in]    line assert_param error line source number
00180 * @return               None
00181 *******************************************************************************/
00182 void check_failed(uint8_t *file, uint32_t line)
00183 {
00184         /* User can add his own implementation to report the file name and line number,
00185          ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
00186
00187         /* Infinite loop */
00188         while(1);
00189 }
00190 #endif
00191
00192 /*
00193  * @}
00194  */
Generated on Tue Jun 7 14:59:03 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/TIMER/Interrupt_Match/timer_int_match.c Source File

C:/nxpdrv/LPC1700CMSIS/Examples/TIMER/Interrupt_Match/timer_int_match.c

Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          timer_interrupt_test.c                          2010-05-21
00003 */
00025 #include "lpc17xx_timer.h"
00026 #include "lpc17xx_libcfg.h"
00027 #include "lpc17xx_pinsel.h"
00028 #include "lpc17xx_gpio.h"
00029 #include "debug_frmwrk.h"
00030
00031 /* Example group ----------------------------------------------------------- */
00037 /************************** PRIVATE VARIABLES *************************/
00038 uint8_t menu1[] =
00039 "********************************************************************************\n\r"
00040 "Hello NXP Semiconductors \n\r"
00041 "Timer Match interrupt demo \n\r"
00042 "\t - MCU: LPC17xx \n\r"
00043 "\t - Core: ARM Cortex-M3 \n\r"
00044 "\t - Communicate via: UART0 -  115200 bps \n\r"
00045 " Use timer 0 toggle MAT0.0, pin P1.28 at frequency 1Hz\n\r"
00046 "********************************************************************************\n\r";
00047
00048 //timer init
00049 TIM_TIMERCFG_Type TIM_ConfigStruct;
00050 TIM_MATCHCFG_Type TIM_MatchConfigStruct ;
00051 uint8_t volatile timer0_flag = FALSE, timer1_flag = FALSE;
00052 FunctionalState LEDStatus = ENABLE;
00053
00054 /************************** PRIVATE FUNCTION *************************/
00055 /* Interrupt service routine */
00056 void TIMER0_IRQHandler(void);
00057
00058 void print_menu(void);
00059
00060 /*----------------- INTERRUPT SERVICE ROUTINES --------------------------*/
00061 /*********************************************************************/
00066 void TIMER0_IRQHandler(void)
00067 {
00068         if (TIM_GetIntStatus(LPC_TIM0, TIM_MR0_INT)== SET)
00069         {
00070                 _DBG_("Match interrupt occur...");
00071         }
00072         TIM_ClearIntPending(LPC_TIM0, TIM_MR0_INT);
00073 }
00074
00075
00076 /*-------------------------PRIVATE FUNCTIONS------------------------------*/
00077 /*********************************************************************/
00082 void print_menu(void)
00083 {
00084         _DBG(menu1);
00085 }
00086
00087 /*-------------------------MAIN FUNCTION------------------------------*/
00088 /*********************************************************************/
00093 int c_entry(void)
00094 {
00095         PINSEL_CFG_Type PinCfg;
00096
00097         /* Initialize debug via UART0
00098          * – 115200bps
00099          * – 8 data bit
00100          * – No parity
00101          * – 1 stop bit
00102          * – No flow control
00103          */
00104         debug_frmwrk_init();
00105
00106         // print welcome screen
00107         print_menu();
00108
00109         // Conifg P1.28 as MAT0.0
00110         PinCfg.Funcnum = 3;
00111         PinCfg.OpenDrain = 0;
00112         PinCfg.Pinmode = 0;
00113         PinCfg.Portnum = 1;
00114         PinCfg.Pinnum = 28;
00115         PINSEL_ConfigPin(&PinCfg);
00116
00117         // Initialize timer 0, prescale count time of 100uS
00118         TIM_ConfigStruct.PrescaleOption = TIM_PRESCALE_USVAL;
00119         TIM_ConfigStruct.PrescaleValue  = 100;
00120
00121         // use channel 0, MR0
00122         TIM_MatchConfigStruct.MatchChannel = 0;
00123         // Enable interrupt when MR0 matches the value in TC register
00124         TIM_MatchConfigStruct.IntOnMatch   = TRUE;
00125         //Enable reset on MR0: TIMER will reset if MR0 matches it
00126         TIM_MatchConfigStruct.ResetOnMatch = TRUE;
00127         //Stop on MR0 if MR0 matches it
00128         TIM_MatchConfigStruct.StopOnMatch  = FALSE;
00129         //Toggle MR0.0 pin if MR0 matches it
00130         TIM_MatchConfigStruct.ExtMatchOutputType =TIM_EXTMATCH_TOGGLE;
00131         // Set Match value, count value of 10000 (10000 * 100uS = 1000000us = 1s --> 1 Hz)
00132         TIM_MatchConfigStruct.MatchValue   = 10000;
00133
00134         // Set configuration for Tim_config and Tim_MatchConfig
00135         TIM_Init(LPC_TIM0, TIM_TIMER_MODE,&TIM_ConfigStruct);
00136         TIM_ConfigMatch(LPC_TIM0,&TIM_MatchConfigStruct);
00137
00138         /* preemption = 1, sub-priority = 1 */
00139         NVIC_SetPriority(TIMER0_IRQn, ((0x01<<3)|0x01));
00140         /* Enable interrupt for timer 0 */
00141         NVIC_EnableIRQ(TIMER0_IRQn);
00142         // To start timer 0
00143         TIM_Cmd(LPC_TIM0,ENABLE);
00144
00145         while (1);
00146         return 1;
00147
00148 }
00149
00150 /* Support required entry point for other toolchain */
00151 int main (void)
00152 {
00153         return c_entry();
00154 }
00155 #ifdef  DEBUG
00156 /*******************************************************************************
00157 * @brief                Reports the name of the source file and the source line number
00158 *                               where the CHECK_PARAM error has occurred.
00159 * @param[in]    file Pointer to the source file name
00160 * @param[in]    line assert_param error line source number
00161 * @return               None
00162 *******************************************************************************/
00163 void check_failed(uint8_t *file, uint32_t line)
00164 {
00165         /* User can add his own implementation to report the file name and line number,
00166          ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
00167
00168         /* Infinite loop */
00169         while(1);
00170 }
00171 #endif
00172
00173 /*
00174  * @}
00175  */
Generated on Tue Jun 7 14:59:03 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/TIMER/Polling_Match/timer_poll_match.c Source File

C:/nxpdrv/LPC1700CMSIS/Examples/TIMER/Polling_Match/timer_poll_match.c

Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          timer_delay_test.c                              2010-05-21
00003 */
00025 #include "lpc17xx_timer.h"
00026 #include "lpc17xx_libcfg.h"
00027 #include "lpc17xx_pinsel.h"
00028 #include "debug_frmwrk.h"
00029
00030 /* Example group ----------------------------------------------------------- */
00037 /************************** PRIVATE VARIABLES *************************/
00038 uint8_t menu1[] =
00039 "********************************************************************************\n\r"
00040 "Hello NXP Semiconductors \n\r"
00041 "Timer delay demo \n\r"
00042 "\t - MCU: LPC17xx \n\r"
00043 "\t - Core: ARM Cortex-M3 \n\r"
00044 "\t - Communicate via: UART0 - 115200 bps \n\r"
00045 " Use timer 0 in polling mode \n\r"
00046 " Toggle MAT0.0 at frequency 10Hz \n\r"
00047 "********************************************************************************\n\r";
00048 //timer init
00049 TIM_TIMERCFG_Type TIM_ConfigStruct;
00050 TIM_MATCHCFG_Type TIM_MatchConfigStruct;
00051
00052 /************************** PRIVATE FUNCTIONS *************************/
00053 void print_menu(void);
00054
00055
00056 /*-------------------------PRIVATE FUNCTIONS------------------------------*/
00057 /*********************************************************************/
00062 void print_menu(void)
00063 {
00064         _DBG(menu1);
00065 }
00066
00067
00068 /*-------------------------MAIN FUNCTION------------------------------*/
00069 /*********************************************************************/
00074 int c_entry(void)
00075 {
00076         PINSEL_CFG_Type PinCfg;
00077
00078         /* Initialize debug via UART0
00079          * – 115200bps
00080          * – 8 data bit
00081          * – No parity
00082          * – 1 stop bit
00083          * – No flow control
00084          */
00085         debug_frmwrk_init();
00086
00087         // print welcome screen
00088         print_menu();
00089
00090         // Conifg P1.28 as MAT0.0
00091         PinCfg.Funcnum = 3;
00092         PinCfg.OpenDrain = 0;
00093         PinCfg.Pinmode = 0;
00094         PinCfg.Portnum = 1;
00095         PinCfg.Pinnum = 28;
00096         PINSEL_ConfigPin(&PinCfg);
00097
00098         // Initialize timer 0, prescale count time of 100uS
00099         TIM_ConfigStruct.PrescaleOption = TIM_PRESCALE_USVAL;
00100         TIM_ConfigStruct.PrescaleValue  = 100;
00101
00102         // use channel 0, MR0
00103         TIM_MatchConfigStruct.MatchChannel = 0;
00104         // Disable interrupt when MR0 matches the value in TC register
00105         TIM_MatchConfigStruct.IntOnMatch   = TRUE;
00106         //Enable reset on MR0: TIMER will reset if MR0 matches it
00107         TIM_MatchConfigStruct.ResetOnMatch = TRUE;
00108         //Stop on MR0 if MR0 matches it
00109         TIM_MatchConfigStruct.StopOnMatch  = FALSE;
00110         //Toggle MR0.0 pin if MR0 matches it
00111         TIM_MatchConfigStruct.ExtMatchOutputType =TIM_EXTMATCH_TOGGLE;
00112         // Set Match value, count value of 1000 (1000 * 100uS = 100mS --> 10Hz)
00113         TIM_MatchConfigStruct.MatchValue   = 1000;
00114
00115         // Set configuration for Tim_config and Tim_MatchConfig
00116         TIM_Init(LPC_TIM0, TIM_TIMER_MODE,&TIM_ConfigStruct);
00117         TIM_ConfigMatch(LPC_TIM0,&TIM_MatchConfigStruct);
00118         TIM_Cmd(LPC_TIM0,ENABLE);
00119         while (1)
00120         {
00121                 // Wait for 1000 millisecond
00122                 while ( !(TIM_GetIntStatus(LPC_TIM0,TIM_MR0_INT)));
00123                 TIM_ClearIntPending(LPC_TIM0,0);
00124                 _DBG_("Match interrupt occur..");
00125         }
00126         TIM_DeInit(LPC_TIM0);
00127         return (1);
00128 }
00129
00130 /* Support required entry point for other toolchain */
00131 int main (void)
00132 {
00133         return c_entry();
00134 }
00135
00136 #ifdef  DEBUG
00137 /*******************************************************************************
00138 * @brief                Reports the name of the source file and the source line number
00139 *                               where the CHECK_PARAM error has occurred.
00140 * @param[in]    file Pointer to the source file name
00141 * @param[in]    line assert_param error line source number
00142 * @return               None
00143 *******************************************************************************/
00144 void check_failed(uint8_t *file, uint32_t line)
00145 {
00146         /* User can add his own implementation to report the file name and line number,
00147          ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
00148
00149         /* Infinite loop */
00150         while(1);
00151 }
00152 #endif
00153
00154 /*
00155  * @}
00156  */
Generated on Tue Jun 7 14:59:03 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/common/Retarget.c Source File

C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/common/Retarget.c

Go to the documentation of this file.
00001 /******************************************************************************/
00002 /* RETARGET.C: 'Retarget' layer for target-dependent low level functions      */
00003 /******************************************************************************/
00004 /* This file is part of the uVision/ARM development tools.                    */
00005 /* Copyright (c) 2005-2007 Keil Software. All rights reserved.                */
00006 /* This software may only be used under the terms of a valid, current,        */
00007 /* end user licence from KEIL for a compatible version of KEIL software       */
00008 /* development tools. Nothing else gives you the right to use this software.  */
00009 /******************************************************************************/
00010
00011 #include <stdio.h>
00012 #include <rt_misc.h>
00013
00014 #pragma import(__use_no_semihosting_swi)
00015
00016 // implementation depends on the microcontroller hardware
00017 extern unsigned char  sendchar(unsigned char ch);  /* in serial.c */
00018 extern unsigned char  getkey(void);
00019
00020
00021 struct __FILE { int handle; /* Add whatever you need here */ };
00022 FILE __stdout;
00023 FILE __stdin;
00024
00025 int fputc(int ch, FILE *f) {
00026   return (sendchar(ch));
00027 }
00028
00029 // simplified fgetc version that only redirects STDIN
00030 #if 1
00031 int fgetc(FILE * fp)
00032 {
00033 // redirect STDIN
00034  return(getkey());
00035 }
00036 #else  // echo a char
00037 int fgetc(FILE * fp)
00038 {
00039  return(sendchar(getkey()));
00040 }
00041 #endif
00042
00043
00044 int ferror(FILE *f) {
00045   /* Your implementation of ferror */
00046   return EOF;
00047 }
00048
00049
00050 void _ttywrch(int ch) {
00051   sendchar(ch);
00052 }
00053
00054
00055 void _sys_exit(int return_code) {
00056 label:  goto label;  /* endless loop */
00057 }
Generated on Tue Jun 7 14:58:59 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/lpc17xx_port/emac.c Source File

C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/lpc17xx_port/emac.c

Go to the documentation of this file.
00001 #include "emac.h"
00002 #include "lpc17xx_emac.h"
00003 #include "lpc17xx_pinsel.h"
00004 #include <string.h>
00005 #include <stdio.h>
00006
00007
00008 /* For debugging... */
00009 #include "debug_frmwrk.h"
00010 #include <stdio.h>
00011
00012 /* Example group ----------------------------------------------------------- */
00018 #define DB      _DBG((uint8_t *)db)
00019 char db[64];
00020
00021 /* Init the LPC17xx ethernet */
00022 BOOL_8 tapdev_init(void)
00023 {
00024         /* EMAC configuration type */
00025         EMAC_CFG_Type Emac_Config;
00026         /* pin configuration */
00027         PINSEL_CFG_Type PinCfg;
00028         /* EMAC address */
00029         uint8_t EMACAddr[] = {EMAC_ADDR0, EMAC_ADDR1, EMAC_ADDR2, \
00030                                                 EMAC_ADDR3, EMAC_ADDR4, EMAC_ADDR5};
00031
00032 #if AUTO_NEGOTIATION_ENA != 0
00033         Emac_Config.Mode = EMAC_MODE_AUTO;
00034 #else
00035         #if (FIX_SPEED == SPEED_100)
00036                 #if (FIX_DUPLEX == FULL_DUPLEX)
00037                         Emac_Config.Mode = EMAC_MODE_100M_FULL;
00038                 #elif (FIX_DUPLEX == HALF_DUPLEX)
00039                         Emac_Config.Mode = EMAC_MODE_100M_HALF;
00040                 #else
00041                         #error Does not support this duplex option
00042                 #endif
00043         #elif (FIX_SPEED == SPEED_10)
00044                 #if (FIX_DUPLEX == FULL_DUPLEX)
00045                                 Emac_Config.Mode = EMAC_MODE_10M_FULL;
00046                 #elif (FIX_DUPLEX == HALF_DUPLEX)
00047                                 Emac_Config.Mode = EMAC_MODE_10M_HALF;
00048                 #else
00049                         #error Does not support this duplex option
00050                 #endif
00051         #else
00052                 #error Does not support this speed option
00053         #endif
00054 #endif
00055
00056         /*
00057          * Enable P1 Ethernet Pins:
00058          * P1.0 - ENET_TXD0
00059          * P1.1 - ENET_TXD1
00060          * P1.4 - ENET_TX_EN
00061          * P1.8 - ENET_CRS
00062          * P1.9 - ENET_RXD0
00063          * P1.10 - ENET_RXD1
00064          * P1.14 - ENET_RX_ER
00065          * P1.15 - ENET_REF_CLK
00066          * P1.16 - ENET_MDC
00067          * P1.17 - ENET_MDIO
00068          */
00069         PinCfg.Funcnum = 1;
00070         PinCfg.OpenDrain = 0;
00071         PinCfg.Pinmode = 0;
00072         PinCfg.Portnum = 1;
00073
00074         PinCfg.Pinnum = 0;
00075         PINSEL_ConfigPin(&PinCfg);
00076         PinCfg.Pinnum = 1;
00077         PINSEL_ConfigPin(&PinCfg);
00078         PinCfg.Pinnum = 4;
00079         PINSEL_ConfigPin(&PinCfg);
00080         PinCfg.Pinnum = 8;
00081         PINSEL_ConfigPin(&PinCfg);
00082         PinCfg.Pinnum = 9;
00083         PINSEL_ConfigPin(&PinCfg);
00084         PinCfg.Pinnum = 10;
00085         PINSEL_ConfigPin(&PinCfg);
00086         PinCfg.Pinnum = 14;
00087         PINSEL_ConfigPin(&PinCfg);
00088         PinCfg.Pinnum = 15;
00089         PINSEL_ConfigPin(&PinCfg);
00090         PinCfg.Pinnum = 16;
00091         PINSEL_ConfigPin(&PinCfg);
00092         PinCfg.Pinnum = 17;
00093         PINSEL_ConfigPin(&PinCfg);
00094
00095         _DBG_("Init EMAC module");
00096         sprintf(db,"MAC addr: %X-%X-%X-%X-%X-%X \n\r", \
00097                          EMACAddr[0],  EMACAddr[1],  EMACAddr[2], \
00098                           EMACAddr[3],  EMACAddr[4],  EMACAddr[5]);
00099         DB;
00100
00101         Emac_Config.Mode = EMAC_MODE_AUTO;
00102         Emac_Config.pbEMAC_Addr = EMACAddr;
00103         // Initialize EMAC module with given parameter
00104         if (EMAC_Init(&Emac_Config) == ERROR){
00105                 return (FALSE);
00106         }
00107
00108         _DBG_("Init EMAC complete");
00109
00110         return (TRUE);
00111 }
00112
00113 /* receive an Ethernet frame from MAC/DMA controller */
00114 UNS_32 tapdev_read(void * pPacket)
00115 {
00116         UNS_32 Size = EMAC_MAX_PACKET_SIZE;
00117         UNS_32 in_size;
00118         EMAC_PACKETBUF_Type RxPack;
00119
00120         // Check Receive status
00121         if (EMAC_CheckReceiveIndex() == FALSE){
00122                 return (0);
00123         }
00124
00125         // Get size of receive data
00126         in_size = EMAC_GetReceiveDataSize() + 1;
00127
00128         Size = MIN(Size,in_size);
00129
00130         // Setup Rx packet
00131         RxPack.pbDataBuf = (uint32_t *)pPacket;
00132         RxPack.ulDataLen = Size;
00133         EMAC_ReadPacketBuffer(&RxPack);
00134
00135         // update receive status
00136         EMAC_UpdateRxConsumeIndex();
00137         return(Size);
00138 }
00139
00140 /* transmit an Ethernet frame to MAC/DMA controller */
00141 BOOL_8 tapdev_send(void *pPacket, UNS_32 size)
00142 {
00143         EMAC_PACKETBUF_Type TxPack;
00144
00145         // Check size
00146         if(size == 0){
00147                 return(TRUE);
00148         }
00149
00150         // check Tx Slot is available
00151         if (EMAC_CheckTransmitIndex() == FALSE){
00152                 return (FALSE);
00153         }
00154
00155         size = MIN(size,EMAC_MAX_PACKET_SIZE);
00156
00157         // Setup Tx Packet buffer
00158         TxPack.ulDataLen = size;
00159         TxPack.pbDataBuf = (uint32_t *)pPacket;
00160         EMAC_WritePacketBuffer(&TxPack);
00161         EMAC_UpdateTxProduceIndex();
00162
00163         return(TRUE);
00164 }
00165
00166 /*
00167  * @}
00168  */
Generated on Tue Jun 7 14:58:59 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/lpc17xx_port/emac.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/lpc17xx_port/emac.h

Go to the documentation of this file.
00001 #ifndef __EMAC_H
00002 #define __EMAC_H
00003
00004 #include "lpc_types.h"
00005 #include "uip-conf.h"
00006 #include "uipopt.h"
00007 #include "lpc17xx_emac.h"
00008
00009 #define EMAC_MAX_PACKET_SIZE (UIP_CONF_BUFFER_SIZE + 16)        // 1536 bytes
00010
00011 #define ENET_DMA_DESC_NUMB      3
00012 #define AUTO_NEGOTIATION_ENA    1               // Enable PHY Auto-negotiation
00013 #define PHY_TO                  200000  // ~10sec
00014 #define RMII                                    1               // If zero, it's a MII interface
00015
00016 /* This is the MAC address of LPC17xx */
00017 /* 0C 1D 12 E0 1F 10*/
00018 #ifdef MCB_LPC_1768
00019 #define EMAC_ADDR0              0x10
00020 #define EMAC_ADDR1              0x1F
00021 #define EMAC_ADDR2              0xE0
00022 #define EMAC_ADDR3              0x12
00023 #define EMAC_ADDR4              0x1D
00024 #define EMAC_ADDR5              0x0C
00025 #elif defined(IAR_LPC_1768)
00026 #define EMAC_ADDR0              0x00
00027 #define EMAC_ADDR1              0xFF
00028 #define EMAC_ADDR2              0xFF
00029 #define EMAC_ADDR3              0xFF
00030 #define EMAC_ADDR4              0xFF
00031 #define EMAC_ADDR5              0xFF
00032 #endif
00033
00034
00035 /* Configurable macro ---------------------- */
00036 #define SPEED_100               1
00037 #define SPEED_10                0
00038 #define FULL_DUPLEX             1
00039 #define HALF_DUPLEX             0
00040
00041 #define FIX_SPEED               SPEED_100
00042 #define FIX_DUPLEX              FULL_DUPLEX
00043
00044
00045 BOOL_8 tapdev_init(void);
00046 UNS_32 tapdev_read(void * pPacket);
00047 BOOL_8 tapdev_send (void *pPacket, UNS_32 size);
00048
00049 #endif
Generated on Tue Jun 7 14:58:59 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/UART/AutoBaud/uart_autobaud_test.c Source File

C:/nxpdrv/LPC1700CMSIS/Examples/UART/AutoBaud/uart_autobaud_test.c

Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          uart_autobaud_test.c                            2010-05-21
00003 */
00026 #include "lpc17xx_uart.h"
00027 #include "lpc17xx_libcfg.h"
00028 #include "lpc17xx_pinsel.h"
00029
00030 /* Example group ----------------------------------------------------------- */
00036 /************************** PRIVATE VARIABLES *************************/
00037 uint8_t syncmenu[] = "AutoBaudrate Status: Synchronous! \n\r";
00038 uint8_t menu1[] = "Hello NXP Semiconductors \n\r";
00039 uint8_t menu2[] =
00040 "UART Auto Baudrate demo\n\r\t "
00041 "MCU LPC17xx - ARM Cortex-M3 \n\r\t "
00042 "UART0 - Auto Baud rate mode used \n\r";
00043 uint8_t menu3[] = "UART demo terminated!\n";
00044
00045 /* Synchronous Flag */
00046 __IO FlagStatus Synchronous;
00047
00048 /************************** PRIVATE FUNCTIONS *************************/
00049 void UART0_IRQHandler(void);
00050
00051 void print_menu(void);
00052
00053 /*----------------- INTERRUPT SERVICE ROUTINES --------------------------*/
00054 /*********************************************************************/
00059 void UART0_IRQHandler(void)
00060 {
00061         // Call Standard UART 0 interrupt handler
00062         uint32_t intsrc, tmp, tmp1;
00063
00064         /* Determine the interrupt source */
00065         intsrc = UART_GetIntId(LPC_UART0);
00066         tmp = intsrc & UART_IIR_INTID_MASK;
00067
00068         // Receive Line Status
00069         if (tmp == UART_IIR_INTID_RLS){
00070                 // Check line status
00071                 tmp1 = UART_GetLineStatus(LPC_UART0);
00072                 // Mask out the Receive Ready and Transmit Holding empty status
00073                 tmp1 &= (UART_LSR_OE | UART_LSR_PE | UART_LSR_FE \
00074                                 | UART_LSR_BI | UART_LSR_RXFE);
00075                 // If any error exist
00076                 if (tmp1) {
00077
00078                         while(tmp1){
00079                                 ; //implement error handling here
00080                         }
00081                 }
00082         }
00083
00084
00085         intsrc &= (UART_IIR_ABEO_INT | UART_IIR_ABTO_INT);
00086         // Check if End of auto-baudrate interrupt or Auto baudrate time out
00087         if (intsrc){
00088                 // Clear interrupt pending
00089                 if(intsrc & UART_IIR_ABEO_INT)
00090                         UART_ABClearIntPending(LPC_UART0, UART_AUTOBAUD_INTSTAT_ABEO);
00091                 if (intsrc & UART_IIR_ABTO_INT)
00092                         UART_ABClearIntPending(LPC_UART0, UART_AUTOBAUD_INTSTAT_ABTO);
00093                         if (Synchronous == RESET)
00094                         {
00095                                 /* Interrupt caused by End of auto-baud */
00096                                 if (intsrc & UART_AUTOBAUD_INTSTAT_ABEO){
00097                                         // Disable AB interrupt
00098                                         UART_IntConfig(LPC_UART0, UART_INTCFG_ABEO, DISABLE);
00099                                         // Set Sync flag
00100                                         Synchronous = SET;
00101                                 }
00102
00103                                 /* Auto-Baudrate Time-Out interrupt (not implemented) */
00104                                 if (intsrc & UART_AUTOBAUD_INTSTAT_ABTO) {
00105                                         /* Just clear this bit - Add your code here */
00106                                         UART_ABClearIntPending(LPC_UART0, UART_AUTOBAUD_INTSTAT_ABTO);
00107                                 }
00108                         }
00109         }
00110 }
00111
00112
00113 /*-------------------------PRIVATE FUNCTIONS------------------------------*/
00114 /*********************************************************************/
00119 void print_menu(void)
00120 {
00121         UART_Send(LPC_UART0, menu1, sizeof(menu1), BLOCKING);
00122         UART_Send(LPC_UART0, menu2, sizeof(menu2), BLOCKING);
00123 }
00124
00125
00126 /*-------------------------MAIN FUNCTION------------------------------*/
00127 /*********************************************************************/
00132 int c_entry(void)
00133 {
00134         // UART Configuration structure variable
00135         UART_CFG_Type UARTConfigStruct;
00136         // UART FIFO configuration Struct variable
00137         UART_FIFO_CFG_Type UARTFIFOConfigStruct;
00138         // Pin configuration for UART0
00139         PINSEL_CFG_Type PinCfg;
00140         // Auto baudrate configuration structure
00141         UART_AB_CFG_Type ABConfig;
00142
00143         uint32_t idx, len;
00144         __IO FlagStatus exitflag;
00145         uint8_t buffer[10];
00146
00147         /*
00148          * Initialize UART0 pin connect
00149          */
00150         PinCfg.Funcnum = 1;
00151         PinCfg.OpenDrain = 0;
00152         PinCfg.Pinmode = 0;
00153         PinCfg.Pinnum = 2;
00154         PinCfg.Portnum = 0;
00155         PINSEL_ConfigPin(&PinCfg);
00156         PinCfg.Pinnum = 3;
00157         PINSEL_ConfigPin(&PinCfg);
00158
00159         /* Initialize UART Configuration parameter structure to default state:
00160          * Baudrate = 9600bps
00161          * 8 data bit
00162          * 1 Stop bit
00163          * None parity
00164          */
00165         UART_ConfigStructInit(&UARTConfigStruct);
00166
00167         /* Initialize UART0 peripheral with given to corresponding parameter
00168          * in this case, don't care the baudrate value UART initialized
00169          * since this will be determine when running auto baudrate
00170          */
00171         UART_Init(LPC_UART0, &UARTConfigStruct);
00172
00173         /* Initialize FIFOConfigStruct to default state:
00174          *                              - FIFO_DMAMode = DISABLE
00175          *                              - FIFO_Level = UART_FIFO_TRGLEV0
00176          *                              - FIFO_ResetRxBuf = ENABLE
00177          *                              - FIFO_ResetTxBuf = ENABLE
00178          *                              - FIFO_State = ENABLE
00179          */
00180         UART_FIFOConfigStructInit(&UARTFIFOConfigStruct);
00181
00182         // Initialize FIFO for UART0 peripheral
00183         UART_FIFOConfig(LPC_UART0, &UARTFIFOConfigStruct);
00184
00185
00186         // Enable UART Transmit
00187         UART_TxCmd(LPC_UART0, ENABLE);
00188
00189
00190     /* Enable UART End of Auto baudrate interrupt */
00191         UART_IntConfig(LPC_UART0, UART_INTCFG_ABEO, ENABLE);
00192         /* Enable UART Auto baudrate timeout interrupt */
00193         UART_IntConfig(LPC_UART0, UART_INTCFG_ABTO, ENABLE);
00194
00195     /* preemption = 1, sub-priority = 1 */
00196     NVIC_SetPriority(UART0_IRQn, ((0x01<<3)|0x01));
00197         /* Enable Interrupt for UART0 channel */
00198     NVIC_EnableIRQ(UART0_IRQn);
00199
00200
00201 /* ---------------------- Auto baud rate section ----------------------- */
00202         // Reset Synchronous flag for auto-baudrate mode
00203         Synchronous = RESET;
00204
00205         // Configure Auto baud rate mode
00206     ABConfig.ABMode = UART_AUTOBAUD_MODE0;
00207     ABConfig.AutoRestart = ENABLE;
00208
00209     // Start auto baudrate mode
00210     UART_ABCmd(LPC_UART0, &ABConfig, ENABLE);
00211     print_menu();
00212
00213     /* Loop until auto baudrate mode complete */
00214     while (Synchronous == RESET);
00215
00216
00217     // Print status of auto baudrate
00218     UART_Send(LPC_UART0, syncmenu, sizeof(syncmenu), BLOCKING);
00219 /* ---------------------- End of Auto baud rate section ----------------------- */
00220
00221         // print welcome screen
00222         print_menu();
00223
00224         // reset exit flag
00225         exitflag = RESET;
00226
00227     /* Read some data from the buffer */
00228     while (exitflag == RESET)
00229     {
00230        len = 0;
00231         while (len == 0)
00232         {
00233             len = UART_Receive(LPC_UART0, buffer, sizeof(buffer), NONE_BLOCKING);
00234         }
00235
00236         /* Got some data */
00237         idx = 0;
00238         while (idx < len)
00239         {
00240             if (buffer[idx] == 27)
00241             {
00242                 /* ESC key, set exit flag */
00243                 UART_Send(LPC_UART0, menu3, sizeof(menu3), BLOCKING);
00244                 exitflag = SET;
00245             }
00246             else if (buffer[idx] == 'r')
00247             {
00248                 print_menu();
00249             }
00250             else
00251             {
00252                 /* Echo it back */
00253                 UART_Send(LPC_UART0, &buffer[idx], 1, BLOCKING);
00254             }
00255             idx++;
00256         }
00257     }
00258
00259     // wait for current transmission complete - THR must be empty
00260     while (UART_CheckBusy(LPC_UART0) == SET);
00261
00262     // DeInitialize UART0 peripheral
00263     UART_DeInit(LPC_UART0);
00264
00265     /* Loop forever */
00266     while(1);
00267     return 1;
00268 }
00269
00270 /* With ARM and GHS toolsets, the entry point is main() - this will
00271    allow the linker to generate wrapper code to setup stacks, allocate
00272    heap area, and initialize and copy code and data segments. For GNU
00273    toolsets, the entry point is through __start() in the crt0_gnu.asm
00274    file, and that startup code will setup stacks and data */
00275 int main(void)
00276 {
00277     return c_entry();
00278 }
00279
00280
00281 #ifdef  DEBUG
00282 /*******************************************************************************
00283 * @brief                Reports the name of the source file and the source line number
00284 *                               where the CHECK_PARAM error has occurred.
00285 * @param[in]    file Pointer to the source file name
00286 * @param[in]    line assert_param error line source number
00287 * @return               None
00288 *******************************************************************************/
00289 void check_failed(uint8_t *file, uint32_t line)
00290 {
00291         /* User can add his own implementation to report the file name and line number,
00292          ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
00293
00294         /* Infinite loop */
00295         while(1);
00296 }
00297 #endif
Generated on Tue Jun 7 14:59:03 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/UART/DMA/uart_dma_test.c Source File

C:/nxpdrv/LPC1700CMSIS/Examples/UART/DMA/uart_dma_test.c

Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          uart_dma_test.c                         2010-05-21
00003 */
00025 #include "lpc17xx_uart.h"
00026 #include "lpc17xx_libcfg.h"
00027 #include "lpc17xx_gpdma.h"
00028 #include "lpc17xx_pinsel.h"
00029
00030 /* Example group ----------------------------------------------------------- */
00036 /************************** PRIVATE DEFINITIONS *************************/
00037 /* Receive buffer size */
00038 #define RX_BUF_SIZE     0x10
00039
00040 /************************** PRIVATE VARIABLES *************************/
00041 uint8_t menu1[] =
00042 "Hello NXP Semiconductors \n\r"
00043 "UART interrupt mode demo using ring buffer \n\r\t "
00044 "MCU LPC17xx - ARM Cortex-M3 \n\r\t "
00045 "UART0 - 9600bps \n\r"
00046 " This is a long string. It transferred in to DMA memory and transmit through Tx line \n\r"
00047 " on UART0 peripheral. To use UART with DMA mode, FIFO function must be enabled \n\r";
00048
00049 uint8_t menu3[] = "UART demo terminated!\n";
00050
00051 // Receive buffer
00052 __IO uint8_t rx_buf[RX_BUF_SIZE];
00053
00054 // Terminal Counter flag for Channel 0
00055 __IO uint32_t Channel0_TC;
00056
00057 // Error Counter flag for Channel 0
00058 __IO uint32_t Channel0_Err;
00059
00060 // Terminal Counter flag for Channel 1
00061 __IO uint32_t Channel1_TC;
00062
00063 // Error Counter flag for Channel 1
00064 __IO uint32_t Channel1_Err;
00065
00066
00067 /************************** PRIVATE FUNCTIONS *************************/
00068 void DMA_IRQHandler (void);
00069
00070 void print_menu(void);
00071
00072 /*----------------- INTERRUPT SERVICE ROUTINES --------------------------*/
00073 /*********************************************************************/
00078 void DMA_IRQHandler (void)
00079 {
00080         uint32_t tmp;
00081                 // Scan interrupt pending
00082         for (tmp = 0; tmp <= 7; tmp++) {
00083                 if (GPDMA_IntGetStatus(GPDMA_STAT_INT, tmp)){
00084                         // Check counter terminal status
00085                         if(GPDMA_IntGetStatus(GPDMA_STAT_INTTC, tmp)){
00086                                 // Clear terminate counter Interrupt pending
00087                                 GPDMA_ClearIntPending (GPDMA_STATCLR_INTTC, tmp);
00088
00089                                 switch (tmp){
00090                                         case 0:
00091                                                 Channel0_TC++;
00092                                                 GPDMA_ChannelCmd(0, DISABLE);
00093                                                 break;
00094                                         case 1:
00095                                                 Channel1_TC++;
00096                                                 GPDMA_ChannelCmd(1, DISABLE);
00097                                                 break;
00098                                         default:
00099                                                 break;
00100                                 }
00101
00102                         }
00103                                 // Check error terminal status
00104                         if (GPDMA_IntGetStatus(GPDMA_STAT_INTERR, tmp)){
00105                                 // Clear error counter Interrupt pending
00106                                 GPDMA_ClearIntPending (GPDMA_STATCLR_INTERR, tmp);
00107                                 switch (tmp){
00108                                         case 0:
00109                                                 Channel0_Err++;
00110                                                 GPDMA_ChannelCmd(0, DISABLE);
00111                                                 break;
00112                                         case 1:
00113                                                 Channel1_Err++;
00114                                                 GPDMA_ChannelCmd(1, DISABLE);
00115                                                 break;
00116                                         default:
00117                                                 break;
00118                                 }
00119                         }
00120                 }
00121         }
00122 }
00123
00124 /*-------------------------MAIN FUNCTION------------------------------*/
00125 /*********************************************************************/
00130 int c_entry(void)
00131 {
00132         uint8_t *rx_char;
00133         uint32_t idx;
00134         // UART Configuration structure variable
00135         UART_CFG_Type UARTConfigStruct;
00136         // UART FIFO configuration Struct variable
00137         UART_FIFO_CFG_Type UARTFIFOConfigStruct;
00138         GPDMA_Channel_CFG_Type GPDMACfg;
00139         // Pin configuration for UART0
00140         PINSEL_CFG_Type PinCfg;
00141
00142         /*
00143          * Initialize UART0 pin connect
00144          */
00145         PinCfg.Funcnum = 1;
00146         PinCfg.OpenDrain = 0;
00147         PinCfg.Pinmode = 0;
00148         PinCfg.Pinnum = 2;
00149         PinCfg.Portnum = 0;
00150         PINSEL_ConfigPin(&PinCfg);
00151         PinCfg.Pinnum = 3;
00152         PINSEL_ConfigPin(&PinCfg);
00153
00154         /* Initialize UART Configuration parameter structure to default state:
00155          * Baudrate = 9600bps
00156          * 8 data bit
00157          * 1 Stop bit
00158          * None parity
00159          */
00160         UART_ConfigStructInit(&UARTConfigStruct);
00161
00162         // Initialize UART0 peripheral with given to corresponding parameter
00163         UART_Init(LPC_UART0, &UARTConfigStruct);
00164
00165
00166         /* Initialize FIFOConfigStruct to default state:
00167          *                              - FIFO_DMAMode = DISABLE
00168          *                              - FIFO_Level = UART_FIFO_TRGLEV0
00169          *                              - FIFO_ResetRxBuf = ENABLE
00170          *                              - FIFO_ResetTxBuf = ENABLE
00171          *                              - FIFO_State = ENABLE
00172          */
00173         UART_FIFOConfigStructInit(&UARTFIFOConfigStruct);
00174
00175         // Enable DMA mode in UART
00176         UARTFIFOConfigStruct.FIFO_DMAMode = ENABLE;
00177
00178         // Initialize FIFO for UART0 peripheral
00179         UART_FIFOConfig(LPC_UART0, &UARTFIFOConfigStruct);
00180
00181         // Enable UART Transmit
00182         UART_TxCmd(LPC_UART0, ENABLE);
00183
00184
00185         /* GPDMA Interrupt configuration section ------------------------------------------------- */
00186
00187     /* Initialize GPDMA controller */
00188         GPDMA_Init();
00189
00190
00191         /* Setting GPDMA interrupt */
00192     // Disable interrupt for DMA
00193     NVIC_DisableIRQ (DMA_IRQn);
00194     /* preemption = 1, sub-priority = 1 */
00195     NVIC_SetPriority(DMA_IRQn, ((0x01<<3)|0x01));
00196
00197
00198         // Setup GPDMA channel --------------------------------
00199         // channel 0
00200         GPDMACfg.ChannelNum = 0;
00201         // Source memory
00202         GPDMACfg.SrcMemAddr = (uint32_t) &menu1;
00203         // Destination memory - don't care
00204         GPDMACfg.DstMemAddr = 0;
00205         // Transfer size
00206         GPDMACfg.TransferSize = sizeof(menu1);
00207         // Transfer width - don't care
00208         GPDMACfg.TransferWidth = 0;
00209         // Transfer type
00210         GPDMACfg.TransferType = GPDMA_TRANSFERTYPE_M2P;
00211         // Source connection - don't care
00212         GPDMACfg.SrcConn = 0;
00213         // Destination connection
00214         GPDMACfg.DstConn = GPDMA_CONN_UART0_Tx;
00215         // Linker List Item - unused
00216         GPDMACfg.DMALLI = 0;
00217         // Setup channel with given parameter
00218         GPDMA_Setup(&GPDMACfg);
00219
00220         // Setup GPDMA channel --------------------------------
00221         // channel 1
00222         GPDMACfg.ChannelNum = 1;
00223         // Source memory - don't care
00224         GPDMACfg.SrcMemAddr = 0;
00225         // Destination memory
00226         GPDMACfg.DstMemAddr = (uint32_t) &rx_buf;
00227         // Transfer size
00228         GPDMACfg.TransferSize = sizeof(rx_buf);
00229         // Transfer width - don't care
00230         GPDMACfg.TransferWidth = 0;
00231         // Transfer type
00232         GPDMACfg.TransferType = GPDMA_TRANSFERTYPE_P2M;
00233         // Source connection
00234         GPDMACfg.SrcConn = GPDMA_CONN_UART0_Rx;
00235         // Destination connection - don't care
00236         GPDMACfg.DstConn = 0;
00237         // Linker List Item - unused
00238         GPDMACfg.DMALLI = 0;
00239         GPDMA_Setup(&GPDMACfg);
00240
00241         /* Reset terminal counter */
00242         Channel0_TC = 0;
00243         /* Reset Error counter */
00244         Channel0_Err = 0;
00245
00246     // Enable interrupt for DMA
00247     NVIC_EnableIRQ (DMA_IRQn);
00248
00249         // Enable GPDMA channel 0
00250         GPDMA_ChannelCmd(0, ENABLE);
00251         // Make sure GPDMA channel 1 is disabled
00252         GPDMA_ChannelCmd(1, DISABLE);
00253
00254         /* Wait for GPDMA on UART0 Tx processing complete */
00255     while ((Channel0_TC == 0) && (Channel0_Err == 0));
00256
00257     // Main loop - echos back to the terminal
00258     while (1)
00259     {
00260         /* Reset terminal counter */
00261         Channel1_TC = 0;
00262         /* Reset Error counter */
00263         Channel1_Err = 0;
00264
00265         // Setup channel with given parameter
00266         GPDMA_Setup(&GPDMACfg);
00267
00268         // Enable GPDMA channel 1
00269         GPDMA_ChannelCmd(1, ENABLE);
00270
00271         // Clear Rx buffer using DMA
00272         for (idx = 0; idx < RX_BUF_SIZE; idx++){
00273                 rx_buf[idx] = 0;
00274         }
00275
00276         // now, start receive character using GPDMA
00277         rx_char = (uint8_t *) &rx_buf;
00278         while ((Channel1_TC == 0) && (Channel1_Err == 0)){
00279                         // Check whether if there's any character received, then print it back
00280                         if (*rx_char != 0)
00281                         {
00282                                 UART_Send(LPC_UART0, rx_char, 1, BLOCKING);
00283                                 rx_char++;
00284                         }
00285         }
00286     }
00287
00288     // DeInitialize UART0 peripheral
00289     UART_DeInit(LPC_UART0);
00290
00291     /* Loop forever */
00292     while(1);
00293     return 1;
00294 }
00295
00296 /* With ARM and GHS toolsets, the entry point is main() - this will
00297    allow the linker to generate wrapper code to setup stacks, allocate
00298    heap area, and initialize and copy code and data segments. For GNU
00299    toolsets, the entry point is through __start() in the crt0_gnu.asm
00300    file, and that startup code will setup stacks and data */
00301 int main(void)
00302 {
00303     return c_entry();
00304 }
00305
00306
00307 #ifdef  DEBUG
00308 /*******************************************************************************
00309 * @brief                Reports the name of the source file and the source line number
00310 *                               where the CHECK_PARAM error has occurred.
00311 * @param[in]    file Pointer to the source file name
00312 * @param[in]    line assert_param error line source number
00313 * @return               None
00314 *******************************************************************************/
00315 void check_failed(uint8_t *file, uint32_t line)
00316 {
00317         /* User can add his own implementation to report the file name and line number,
00318          ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
00319
00320         /* Infinite loop */
00321         while(1);
00322 }
00323 #endif
00324
00325 /*
00326  * @}
00327  */
Generated on Tue Jun 7 14:59:03 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/UART/UART1_FullModem/uart_fullmodem_test.c Source File

C:/nxpdrv/LPC1700CMSIS/Examples/UART/UART1_FullModem/uart_fullmodem_test.c

Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          uart_fullmodem_test.c                   2010-05-21
00003 */
00025 #include "lpc17xx_uart.h"
00026 #include "lpc17xx_libcfg.h"
00027 #include "lpc17xx_pinsel.h"
00028
00029 /* Example group ----------------------------------------------------------- */
00036 /************************** PRIVATE DEFINITIONS *************************/
00037 #define MCB_LPC_1768
00038 //#define IAR_LPC_1768
00039
00040 // buffer size definition
00041 #define UART_RING_BUFSIZE 256
00042 /* Auto RTS and Auto CTS definition:
00043  * - 1: Enable Auto RTS and CTS function
00044  * - 0: Disable this function, in this case, handle manually
00045  * modem functionality */
00046 #define AUTO_RTS_CTS_USE        0
00047
00048 /* Buf mask */
00049 #define __BUF_MASK (UART_RING_BUFSIZE-1)
00050 /* Check buf is full or not */
00051 #define __BUF_IS_FULL(head, tail) ((tail&__BUF_MASK)==((head+1)&__BUF_MASK))
00052 /* Check buf will be full in next receiving or not */
00053 #define __BUF_WILL_FULL(head, tail) ((tail&__BUF_MASK)==((head+2)&__BUF_MASK))
00054 /* Check buf is empty */
00055 #define __BUF_IS_EMPTY(head, tail) ((head&__BUF_MASK)==(tail&__BUF_MASK))
00056 /* Reset buf */
00057 #define __BUF_RESET(bufidx)     (bufidx=0)
00058 #define __BUF_INCR(bufidx)      (bufidx=(bufidx+1)&__BUF_MASK)
00059
00060
00061 /************************** PRIVATE TYPES *************************/
00063 typedef struct
00064 {
00065     __IO uint32_t tx_head;
00066     __IO uint32_t tx_tail;
00067     __IO uint32_t rx_head;
00068     __IO uint32_t rx_tail;
00069     __IO uint8_t  tx[UART_RING_BUFSIZE];
00070     __IO uint8_t  rx[UART_RING_BUFSIZE];
00071 } UART_RING_BUFFER_T;
00072
00073
00074 /************************** PRIVATE VARIABLES *************************/
00075 uint8_t menu1[] = "Hello NXP Semiconductors \n\r";
00076 uint8_t menu2[] =
00077 "UART1 Full Modem \n\r\t "
00078 "MCU LPC17xx - ARM Cortex-M3 \n\r\t "
00079 "UART1 - 9600bps \n\r";
00080 uint8_t menu3[] = "UART demo terminated!\n";
00081
00082 // UART Ring buffer
00083 UART_RING_BUFFER_T rb;
00084
00085 // RTS State
00086 __IO int32_t RTS_State;
00087
00088 // Current Tx Interrupt enable state
00089 __IO FlagStatus TxIntStat;
00090
00091
00092 /************************** PRIVATE FUNCTIONS *************************/
00093 /* Interrupt service routines */
00094 void UART1_IRQHandler(void);
00095 void UART1_IntTransmit(void);
00096 void UART1_IntReceive(void);
00097 void UART1_IntErr(uint8_t bLSErrType);
00098
00099 uint32_t UARTReceive(LPC_UART_TypeDef *UARTPort, uint8_t *rxbuf, uint8_t buflen);
00100 uint32_t UARTSend(LPC_UART_TypeDef *UARTPort, uint8_t *txbuf, uint8_t buflen);
00101 void print_menu(void);
00102
00103
00104 /*----------------- INTERRUPT SERVICE ROUTINES --------------------------*/
00105 /*********************************************************************/
00110 void UART1_IRQHandler(void)
00111 {
00112         uint8_t modemsts;
00113         uint32_t intsrc, tmp, tmp1;
00114
00115         /* Determine the interrupt source */
00116         intsrc = UART_GetIntId((LPC_UART_TypeDef *)LPC_UART1);
00117         tmp = intsrc & UART_IIR_INTID_MASK;
00118
00119         /*
00120          * In case of using UART1 with full modem,
00121          * interrupt ID = 0 that means modem status interrupt has been detected
00122          */
00123
00124         if (tmp == 0){
00125                 // Check Modem status
00126                 modemsts = UART_FullModemGetStatus(LPC_UART1);
00127                 #if (AUTO_RTS_CTS_USE == 0)
00128                         // Check CTS status change flag
00129                         if (modemsts & UART1_MODEM_STAT_DELTA_CTS) {
00130                                 // if CTS status is active, continue to send data
00131                                 if (modemsts & UART1_MODEM_STAT_CTS) {
00132                                         // Re-Enable Tx
00133                                         UART_TxCmd((LPC_UART_TypeDef *)LPC_UART1, ENABLE);
00134                                 }
00135                                 // Otherwise, Stop current transmission immediately
00136                                 else{
00137                                         // Disable Tx
00138                                         UART_TxCmd((LPC_UART_TypeDef *)LPC_UART1, DISABLE);
00139                                 }
00140                         }
00141                 #endif
00142         }
00143
00144         // Receive Line Status
00145         if (tmp == UART_IIR_INTID_RLS){
00146                 // Check line status
00147                 tmp1 = UART_GetLineStatus((LPC_UART_TypeDef *)LPC_UART1);
00148                 // Mask out the Receive Ready and Transmit Holding empty status
00149                 tmp1 &= (UART_LSR_OE | UART_LSR_PE | UART_LSR_FE \
00150                                 | UART_LSR_BI | UART_LSR_RXFE);
00151                 // If any error exist
00152                 if (tmp1) {
00153                         UART1_IntErr(tmp1);
00154                 }
00155         }
00156
00157         // Receive Data Available or Character time-out
00158         if ((tmp == UART_IIR_INTID_RDA) || (tmp == UART_IIR_INTID_CTI)){
00159                 UART1_IntReceive();
00160         }
00161
00162         // Transmit Holding Empty
00163         if (tmp == UART_IIR_INTID_THRE){
00164                 UART1_IntTransmit();
00165         }
00166 }
00167
00168 /********************************************************************/
00173 void UART1_IntReceive(void)
00174 {
00175         uint8_t tmpc;
00176         uint32_t rLen;
00177
00178         while (1){
00179                 // Call UART read function in UART driver
00180                 rLen = UART_Receive((LPC_UART_TypeDef *)LPC_UART1, &tmpc, 1, NONE_BLOCKING);
00181                 // If data received
00182                 if (rLen){
00183
00184                         /* If buffer will be full and RTS is driven manually,
00185                          * RTS pin should be forced into INACTIVE state
00186                          */
00187 #if (AUTO_RTS_CTS_USE == 0)
00188                         if (__BUF_WILL_FULL(rb.rx_head, rb.rx_tail))
00189                         {
00190                                 if (RTS_State == ACTIVE)
00191                                 {
00192                                         // Disable request to send through RTS line
00193                                         UART_FullModemForcePinState(LPC_UART1, UART1_MODEM_PIN_RTS, \
00194                                                         INACTIVE);
00195                                         RTS_State = INACTIVE;
00196                                 }
00197                         }
00198 #endif
00199
00200                         /* Check if buffer is more space
00201                          * If no more space, remaining character will be trimmed out
00202                          */
00203                         if (!__BUF_IS_FULL(rb.rx_head,rb.rx_tail)){
00204                                 rb.rx[rb.rx_head] = tmpc;
00205                                 __BUF_INCR(rb.rx_head);
00206                         }
00207                 }
00208                 // no more data
00209                 else {
00210                         break;
00211                 }
00212         }
00213 }
00214
00215
00216 /********************************************************************/
00221 void UART1_IntTransmit(void)
00222 {
00223     // Disable THRE interrupt
00224     UART_IntConfig((LPC_UART_TypeDef *)LPC_UART1, UART_INTCFG_THRE, DISABLE);
00225
00226         /* Wait for FIFO buffer empty, transfer UART_TX_FIFO_SIZE bytes
00227          * of data or break whenever ring buffers are empty */
00228         /* Wait until THR empty */
00229     while (UART_CheckBusy((LPC_UART_TypeDef *)LPC_UART1) == SET);
00230
00231         while (!__BUF_IS_EMPTY(rb.tx_head,rb.tx_tail))
00232     {
00233         /* Move a piece of data into the transmit FIFO */
00234         if (UART_Send((LPC_UART_TypeDef *)LPC_UART1, (uint8_t *)&rb.tx[rb.tx_tail], \
00235                         1, NONE_BLOCKING)){
00236         /* Update transmit ring FIFO tail pointer */
00237         __BUF_INCR(rb.tx_tail);
00238         } else {
00239                 break;
00240         }
00241     }
00242
00243     /* If there is no more data to send, disable the transmit
00244        interrupt - else enable it or keep it enabled */
00245         if (__BUF_IS_EMPTY(rb.tx_head, rb.tx_tail)) {
00246         UART_IntConfig((LPC_UART_TypeDef *)LPC_UART1, UART_INTCFG_THRE, DISABLE);
00247         // Reset Tx Interrupt state
00248         TxIntStat = RESET;
00249     }
00250     else{
00251         // Set Tx Interrupt state
00252                 TxIntStat = SET;
00253         UART_IntConfig((LPC_UART_TypeDef *)LPC_UART1, UART_INTCFG_THRE, ENABLE);
00254     }
00255 }
00256
00257
00258 /*********************************************************************/
00263 void UART1_IntErr(uint8_t bLSErrType)
00264 {
00265         uint8_t test;
00266         // Loop forever
00267         while (1){
00268                 // For testing purpose
00269                 test = bLSErrType;
00270         }
00271 }
00272
00273 /*-------------------------PRIVATE FUNCTIONS------------------------------*/
00274 /*********************************************************************/
00282 uint32_t UARTSend(LPC_UART_TypeDef *UARTPort, uint8_t *txbuf, uint8_t buflen)
00283 {
00284     uint8_t *data = (uint8_t *) txbuf;
00285     uint32_t bytes = 0;
00286
00287
00288         /* Temporarily lock out UART transmit interrupts during this
00289            read so the UART transmit interrupt won't cause problems
00290            with the index values */
00291         UART_IntConfig(UARTPort, UART_INTCFG_THRE, DISABLE);
00292
00293         /* Loop until transmit run buffer is full or until n_bytes
00294            expires */
00295         while ((buflen > 0) && (!__BUF_IS_FULL(rb.tx_head, rb.tx_tail)))
00296         {
00297                 /* Write data from buffer into ring buffer */
00298                 rb.tx[rb.tx_head] = *data;
00299                 data++;
00300
00301                 /* Increment head pointer */
00302                 __BUF_INCR(rb.tx_head);
00303
00304                 /* Increment data count and decrement buffer size count */
00305                 bytes++;
00306                 buflen--;
00307         }
00308
00309         /*
00310          * Check if current Tx interrupt enable is reset,
00311          * that means the Tx interrupt must be re-enabled
00312          * due to call UART_IntTransmit() function to trigger
00313          * this interrupt type
00314          */
00315         if (TxIntStat == RESET) {
00316                 UART1_IntTransmit();
00317         }
00318         /*
00319          * Otherwise, re-enables Tx Interrupt
00320          */
00321         else {
00322                 UART_IntConfig(UARTPort, UART_INTCFG_THRE, ENABLE);
00323         }
00324
00325     return bytes;
00326 }
00327
00328 /*********************************************************************/
00336 uint32_t UARTReceive(LPC_UART_TypeDef *UARTPort, uint8_t *rxbuf, uint8_t buflen)
00337 {
00338     uint8_t *data = (uint8_t *) rxbuf;
00339     uint32_t bytes = 0;
00340
00341         /* Temporarily lock out UART receive interrupts during this
00342            read so the UART receive interrupt won't cause problems
00343            with the index values */
00344         UART_IntConfig(UARTPort, UART_INTCFG_RBR, DISABLE);
00345
00346         /* Loop until receive buffer ring is empty or
00347                 until max_bytes expires */
00348         while ((buflen > 0) && (!(__BUF_IS_EMPTY(rb.rx_head, rb.rx_tail))))
00349         {
00350                 /* Read data from ring buffer into user buffer */
00351                 *data = rb.rx[rb.rx_tail];
00352                 data++;
00353
00354                 /* Update tail pointer */
00355                 __BUF_INCR(rb.rx_tail);
00356
00357                 /* Increment data count and decrement buffer size count */
00358                 bytes++;
00359                 buflen--;
00360
00361 #if (AUTO_RTS_CTS_USE == 0)
00362                 /* In case of driving RTS manually, this pin should be
00363                  * release into ACTIVE state if buffer is free
00364                  */
00365                 if (RTS_State == INACTIVE)
00366                 {
00367                         if (!__BUF_WILL_FULL(rb.rx_head, rb.rx_tail))
00368                         {
00369                                 // Disable request to send through RTS line
00370                                 UART_FullModemForcePinState(LPC_UART1, UART1_MODEM_PIN_RTS, \
00371                                                 ACTIVE);
00372                                 RTS_State = ACTIVE;
00373                         }
00374                 }
00375 #endif
00376         }
00377
00378         /* Re-enable UART interrupts */
00379         UART_IntConfig(UARTPort, UART_INTCFG_RBR, ENABLE);
00380
00381     return bytes;
00382 }
00383
00384 /*********************************************************************/
00389 void print_menu(void)
00390 {
00391         uint32_t tmp, tmp2;
00392         uint8_t *pDat;
00393
00394         tmp = sizeof(menu1);
00395         tmp2 = 0;
00396         pDat = (uint8_t *)&menu1[0];
00397         while(tmp) {
00398                 tmp2 = UARTSend((LPC_UART_TypeDef *)LPC_UART1, pDat, tmp);
00399                 pDat += tmp2;
00400                 tmp -= tmp2;
00401         }
00402
00403         tmp = sizeof(menu2);
00404         tmp2 = 0;
00405         pDat = (uint8_t *)&menu2[0];
00406         while(tmp) {
00407                 tmp2 = UARTSend((LPC_UART_TypeDef *)LPC_UART1, pDat, tmp);
00408                 pDat += tmp2;
00409                 tmp -= tmp2;
00410         }
00411 }
00412
00413 /*-------------------------MAIN FUNCTION------------------------------*/
00414 /*********************************************************************/
00419 int c_entry(void)
00420 {
00421         // UART Configuration structure variable
00422         UART_CFG_Type UARTConfigStruct;
00423         // UART FIFO configuration Struct variable
00424         UART_FIFO_CFG_Type UARTFIFOConfigStruct;
00425         // Pin configuration for UART1
00426         PINSEL_CFG_Type PinCfg;
00427         uint32_t idx, len;
00428         __IO FlagStatus exitflag;
00429         uint8_t buffer[10];
00430
00431         /*
00432          * Initialize UART1 pin connect
00433          * If using MCB1700 eval board, assign pin P2.0 - P2.7
00434          * If using IAR 1768 KS board, assign pin P0.7 - P0.15
00435          */
00436 #ifdef MCB_LPC_1768
00437         PinCfg.Funcnum = 2;
00438         PinCfg.OpenDrain = 0;
00439         PinCfg.Pinmode = 0;
00440         PinCfg.Portnum = 2;
00441         for (idx = 0; idx <= 7; idx++){
00442                 PinCfg.Pinnum = idx;
00443                 PINSEL_ConfigPin(&PinCfg);
00444         }
00445 #elif defined(IAR_LPC_1768)
00446         PinCfg.Funcnum = 1;
00447         PinCfg.OpenDrain = 0;
00448         PinCfg.Pinmode = 0;
00449         PinCfg.Portnum = 0;
00450         for (idx = 15; idx <= 22; idx++){
00451                 PinCfg.Pinnum = idx;
00452                 PINSEL_ConfigPin(&PinCfg);
00453         }
00454 #endif
00455
00456         /* Initialize UART Configuration parameter structure to default state:
00457          * Baudrate = 9600bps
00458          * 8 data bit
00459          * 1 Stop bit
00460          * None parity
00461          */
00462         UART_ConfigStructInit(&UARTConfigStruct);
00463
00464         // Initialize UART1 peripheral with given to corresponding parameter
00465         UART_Init((LPC_UART_TypeDef *)LPC_UART1, &UARTConfigStruct);
00466
00467         /* Initialize FIFOConfigStruct to default state:
00468          *                              - FIFO_DMAMode = DISABLE
00469          *                              - FIFO_Level = UART_FIFO_TRGLEV0
00470          *                              - FIFO_ResetRxBuf = ENABLE
00471          *                              - FIFO_ResetTxBuf = ENABLE
00472          *                              - FIFO_State = ENABLE
00473          */
00474         UART_FIFOConfigStructInit(&UARTFIFOConfigStruct);
00475
00476         // Initialize FIFO for UART1 peripheral
00477         UART_FIFOConfig((LPC_UART_TypeDef *)LPC_UART1, &UARTFIFOConfigStruct);
00478
00479 #if (AUTO_RTS_CTS_USE==0)
00480         /*
00481          * Determine current state of CTS pin to enable Tx
00482          * activity
00483          */
00484         if (UART_FullModemGetStatus(LPC_UART1) & UART1_MODEM_STAT_CTS) {
00485                 // Enable UART Transmit
00486                 UART_TxCmd((LPC_UART_TypeDef *)LPC_UART1, ENABLE);
00487         }
00488 #else
00489         // Enable UART Transmit
00490         UART_TxCmd((LPC_UART_TypeDef *)LPC_UART1, ENABLE);
00491 #endif
00492
00493         // Reset ring buf head and tail idx
00494         __BUF_RESET(rb.rx_head);
00495         __BUF_RESET(rb.rx_tail);
00496         __BUF_RESET(rb.tx_head);
00497         __BUF_RESET(rb.tx_tail);
00498
00499 #if AUTO_RTS_CTS_USE
00500         UART_FullModemConfigMode(LPC_UART1, UART1_MODEM_MODE_AUTO_RTS, ENABLE);
00501         UART_FullModemConfigMode(LPC_UART1, UART1_MODEM_MODE_AUTO_CTS, ENABLE);
00502 #else
00503         // Enable Modem status interrupt
00504         UART_IntConfig((LPC_UART_TypeDef *)LPC_UART1, UART1_INTCFG_MS, ENABLE);
00505         // Enable CTS1 signal transition interrupt
00506         UART_IntConfig((LPC_UART_TypeDef *)LPC_UART1, UART1_INTCFG_CTS, ENABLE);
00507         // Force RTS pin state to ACTIVE
00508         UART_FullModemForcePinState(LPC_UART1, UART1_MODEM_PIN_RTS, ACTIVE);
00509         //RESET RTS State flag
00510         RTS_State = ACTIVE;
00511 #endif
00512
00513
00514     /* Enable UART Rx interrupt */
00515         UART_IntConfig((LPC_UART_TypeDef *)LPC_UART1, UART_INTCFG_RBR, ENABLE);
00516         /* Enable UART line status interrupt */
00517         UART_IntConfig((LPC_UART_TypeDef *)LPC_UART1, UART_INTCFG_RLS, ENABLE);
00518
00519         /*
00520          * Do not enable transmit interrupt here, since it is handled by
00521          * UART_Send() function, just to reset Tx Interrupt state for the
00522          * first time
00523          */
00524         TxIntStat = RESET;
00525
00526     /* preemption = 1, sub-priority = 1 */
00527     NVIC_SetPriority(UART1_IRQn, ((0x01<<3)|0x01));
00528         /* Enable Interrupt for UART1 channel */
00529     NVIC_EnableIRQ(UART1_IRQn);
00530
00531         // print welcome screen
00532         print_menu();
00533
00534         // reset exit flag
00535         exitflag = RESET;
00536
00537     /* Read some data from the buffer */
00538     while (exitflag == RESET)
00539     {
00540        len = 0;
00541         while (len == 0)
00542         {
00543             len = UARTReceive((LPC_UART_TypeDef *)LPC_UART1, buffer, sizeof(buffer));
00544         }
00545
00546         /* Got some data */
00547         idx = 0;
00548         while (idx < len)
00549         {
00550             if (buffer[idx] == 27)
00551             {
00552                 /* ESC key, set exit flag */
00553                 UARTSend((LPC_UART_TypeDef *)LPC_UART1, menu3, sizeof(menu3));
00554                 exitflag = SET;
00555             }
00556             else if (buffer[idx] == 'r')
00557             {
00558                 print_menu();
00559             }
00560             else
00561             {
00562                 /* Echo it back */
00563                 UARTSend((LPC_UART_TypeDef *)LPC_UART1, &buffer[idx], 1);
00564             }
00565             idx++;
00566         }
00567     }
00568
00569     // wait for current transmission complete - THR must be empty
00570     while (UART_CheckBusy((LPC_UART_TypeDef *)LPC_UART1) == SET);
00571
00572     // DeInitialize UART1 peripheral
00573     UART_DeInit((LPC_UART_TypeDef *)LPC_UART1);
00574
00575     /* Loop forever */
00576     while(1);
00577     return 1;
00578 }
00579
00580 /* With ARM and GHS toolsets, the entry point is main() - this will
00581    allow the linker to generate wrapper code to setup stacks, allocate
00582    heap area, and initialize and copy code and data segments. For GNU
00583    toolsets, the entry point is through __start() in the crt0_gnu.asm
00584    file, and that startup code will setup stacks and data */
00585 int main(void)
00586 {
00587     return c_entry();
00588 }
00589
00590
00591 #ifdef  DEBUG
00592 /*******************************************************************************
00593 * @brief                Reports the name of the source file and the source line number
00594 *                               where the CHECK_PARAM error has occurred.
00595 * @param[in]    file Pointer to the source file name
00596 * @param[in]    line assert_param error line source number
00597 * @return               None
00598 *******************************************************************************/
00599 void check_failed(uint8_t *file, uint32_t line)
00600 {
00601         /* User can add his own implementation to report the file name and line number,
00602          ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
00603
00604         /* Infinite loop */
00605         while(1);
00606 }
00607 #endif
00608
00609 /*
00610  * @}
00611  */
Generated on Tue Jun 7 14:59:04 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/UART/HWFlowControl/uart_hw_flow_control.c Source File

C:/nxpdrv/LPC1700CMSIS/Examples/UART/HWFlowControl/uart_hw_flow_control.c

Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          uart_hw_flow_control.c                          2010-06-10
00003 */
00026 #include "lpc17xx_uart.h"
00027 #include "lpc17xx_libcfg.h"
00028 #include "lpc17xx_pinsel.h"
00029
00030 /* Example group ----------------------------------------------------------- */
00036 /************************** PRIVATE DEFINITIONS *************************/
00037 #define TEST_UART (LPC_UART_TypeDef *)LPC_UART1
00038
00039 /************************** PRIVATE VARIABLES *************************/
00040 uint8_t menu1[] = "Hello NXP Semiconductors \n\r";
00041 uint8_t menu2[] = "UART hardware flow control mode demo \n\r\t MCU LPC17xx - ARM Cortex-M3 \n\r\t UART1 - 9600bps \n\r";
00042 uint8_t menu3[] = "UART demo terminated!";
00043
00044 /************************** PRIVATE FUNCTIONS *************************/
00045 void print_menu(void);
00046
00047 /*-------------------------PRIVATE FUNCTIONS------------------------------*/
00048 /*********************************************************************/
00053 void print_menu(void)
00054 {
00055         UART_Send(TEST_UART, menu1, sizeof(menu1), BLOCKING);
00056         UART_Send(TEST_UART, menu2, sizeof(menu2), BLOCKING);
00057 }
00058
00059 /*-------------------------MAIN FUNCTION------------------------------*/
00060 /*********************************************************************/
00065 int c_entry(void)
00066 {
00067         // UART Configuration structure variable
00068         UART_CFG_Type UARTConfigStruct;
00069         // UART FIFO configuration Struct variable
00070         UART_FIFO_CFG_Type UARTFIFOConfigStruct;
00071         // Pin configuration for UART0
00072         PINSEL_CFG_Type PinCfg;
00073
00074         uint32_t idx, len;
00075         __IO FlagStatus exitflag;
00076         uint8_t buffer[10];
00077
00078         /*
00079          * Initialize UART1 pin connect
00080          */
00081         PinCfg.Funcnum = 2;
00082         PinCfg.OpenDrain = 0;
00083         PinCfg.Pinmode = 0;
00084         PinCfg.Pinnum = 0;
00085         PinCfg.Portnum = 2;
00086         PINSEL_ConfigPin(&PinCfg);//P2.0 TXD1
00087         PinCfg.Pinnum = 1;
00088         PINSEL_ConfigPin(&PinCfg);//P2.1 RXD1
00089         PinCfg.Pinnum = 2;
00090         PINSEL_ConfigPin(&PinCfg);//P2.2 CTS1
00091         PinCfg.Pinnum = 7;
00092         PINSEL_ConfigPin(&PinCfg);//P2.7 RTS1
00093
00094         /* Initialize UART Configuration parameter structure to default state:
00095          * Baudrate = 9600bps
00096          * 8 data bit
00097          * 1 Stop bit
00098          * None parity
00099          */
00100         UART_ConfigStructInit(&UARTConfigStruct);
00101
00102         // Initialize UART0 peripheral with given to corresponding parameter
00103         UART_Init(TEST_UART, &UARTConfigStruct);
00104
00105         /* Initialize FIFOConfigStruct to default state:
00106          *                              - FIFO_DMAMode = DISABLE
00107          *                              - FIFO_Level = UART_FIFO_TRGLEV0
00108          *                              - FIFO_ResetRxBuf = ENABLE
00109          *                              - FIFO_ResetTxBuf = ENABLE
00110          *                              - FIFO_State = ENABLE
00111          */
00112         UART_FIFOConfigStructInit(&UARTFIFOConfigStruct);
00113
00114         // Initialize FIFO for UART0 peripheral
00115         UART_FIFOConfig(TEST_UART, &UARTFIFOConfigStruct);
00116
00117         // Configure UART1 hardware flow control RTS/CTS
00118         UART_FullModemForcePinState((LPC_UART1_TypeDef *)LPC_UART1,UART1_MODEM_PIN_RTS,ACTIVE);
00119
00120         // Enable UART Transmit
00121         UART_TxCmd(TEST_UART, ENABLE);
00122
00123         // print welcome screen
00124         print_menu();
00125
00126         // Reset exit flag
00127         exitflag = RESET;
00128
00129     /* Read some data from the buffer */
00130     while (exitflag == RESET)
00131     {
00132        len = 0;
00133         while (len == 0)
00134         {
00135             len = UART_Receive(TEST_UART, buffer, sizeof(buffer), NONE_BLOCKING);
00136         }
00137
00138         /* Got some data */
00139         idx = 0;
00140         while (idx < len)
00141         {
00142             if (buffer[idx] == 27)
00143             {
00144                 /* ESC key, set exit flag */
00145                 UART_Send(TEST_UART, menu3, sizeof(menu3), BLOCKING);
00146                 exitflag = SET;
00147             }
00148             else if (buffer[idx] == 'r')
00149             {
00150                 print_menu();
00151             }
00152             else
00153             {
00154                 /* Echo it back */
00155                 UART_Send(TEST_UART, &buffer[idx], 1, BLOCKING);
00156             }
00157             idx++;
00158         }
00159     }
00160
00161     // wait for current transmission complete - THR must be empty
00162     while (UART_CheckBusy(TEST_UART) == SET);
00163
00164     // DeInitialize UART0 peripheral
00165     UART_DeInit(TEST_UART);
00166
00167     /* Loop forever */
00168     while(1);
00169     return 1;
00170 }
00171
00172 /* With ARM and GHS toolsets, the entry point is main() - this will
00173    allow the linker to generate wrapper code to setup stacks, allocate
00174    heap area, and initialize and copy code and data segments. For GNU
00175    toolsets, the entry point is through __start() in the crt0_gnu.asm
00176    file, and that startup code will setup stacks and data */
00177 int main(void)
00178 {
00179     return c_entry();
00180 }
00181
00182
00183 #ifdef  DEBUG
00184 /*******************************************************************************
00185 * @brief                Reports the name of the source file and the source line number
00186 *                               where the CHECK_PARAM error has occurred.
00187 * @param[in]    file Pointer to the source file name
00188 * @param[in]    line assert_param error line source number
00189 * @return               None
00190 *******************************************************************************/
00191 void check_failed(uint8_t *file, uint32_t line)
00192 {
00193         /* User can add his own implementation to report the file name and line number,
00194          ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
00195
00196         /* Infinite loop */
00197         while(1);
00198 }
00199 #endif
00200 /*
00201  * @}
00202  */
Generated on Tue Jun 7 14:59:03 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/UART/Interrupt/uart_interrupt_test.c Source File

C:/nxpdrv/LPC1700CMSIS/Examples/UART/Interrupt/uart_interrupt_test.c

Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          uart_interrupt_test.c                           2010-05-21
00003 */
00025 #include "lpc17xx_uart.h"
00026 #include "lpc17xx_libcfg.h"
00027 #include "lpc17xx_pinsel.h"
00028
00029 /* Example group ----------------------------------------------------------- */
00035 /************************** PRIVATE DEFINTIONS *************************/
00036 /* buffer size definition */
00037 #define UART_RING_BUFSIZE 256
00038
00039 /* Buf mask */
00040 #define __BUF_MASK (UART_RING_BUFSIZE-1)
00041 /* Check buf is full or not */
00042 #define __BUF_IS_FULL(head, tail) ((tail&__BUF_MASK)==((head+1)&__BUF_MASK))
00043 /* Check buf will be full in next receiving or not */
00044 #define __BUF_WILL_FULL(head, tail) ((tail&__BUF_MASK)==((head+2)&__BUF_MASK))
00045 /* Check buf is empty */
00046 #define __BUF_IS_EMPTY(head, tail) ((head&__BUF_MASK)==(tail&__BUF_MASK))
00047 /* Reset buf */
00048 #define __BUF_RESET(bufidx)     (bufidx=0)
00049 #define __BUF_INCR(bufidx)      (bufidx=(bufidx+1)&__BUF_MASK)
00050
00051
00052 /************************** PRIVATE TYPES *************************/
00053
00055 typedef struct
00056 {
00057     __IO uint32_t tx_head;
00058     __IO uint32_t tx_tail;
00059     __IO uint32_t rx_head;
00060     __IO uint32_t rx_tail;
00061     __IO uint8_t  tx[UART_RING_BUFSIZE];
00062     __IO uint8_t  rx[UART_RING_BUFSIZE];
00063 } UART_RING_BUFFER_T;
00064
00065
00066 /************************** PRIVATE VARIABLES *************************/
00067 uint8_t menu1[] = "Hello NXP Semiconductors \n\r";
00068 uint8_t menu2[] =
00069 "UART interrupt mode demo using ring buffer \n\r\t "
00070 "MCU LPC17xx - ARM Cortex-M3 \n\r\t "
00071 "UART0 - 9600bps \n\r";
00072 uint8_t menu3[] = "UART demo terminated!\n";
00073
00074 // UART Ring buffer
00075 UART_RING_BUFFER_T rb;
00076
00077 // Current Tx Interrupt enable state
00078 __IO FlagStatus TxIntStat;
00079
00080
00081 /************************** PRIVATE FUNCTIONS *************************/
00082 /* Interrupt service routines */
00083 void UART0_IRQHandler(void);
00084 void UART_IntErr(uint8_t bLSErrType);
00085 void UART_IntTransmit(void);
00086 void UART_IntReceive(void);
00087
00088 uint32_t UARTReceive(LPC_UART_TypeDef *UARTPort, uint8_t *rxbuf, uint8_t buflen);
00089 uint32_t UARTSend(LPC_UART_TypeDef *UARTPort, uint8_t *txbuf, uint8_t buflen);
00090 void print_menu(void);
00091
00092 /*----------------- INTERRUPT SERVICE ROUTINES --------------------------*/
00093 /*********************************************************************/
00098 void UART0_IRQHandler(void)
00099 {
00100         uint32_t intsrc, tmp, tmp1;
00101
00102         /* Determine the interrupt source */
00103         intsrc = UART_GetIntId(LPC_UART0);
00104         tmp = intsrc & UART_IIR_INTID_MASK;
00105
00106         // Receive Line Status
00107         if (tmp == UART_IIR_INTID_RLS){
00108                 // Check line status
00109                 tmp1 = UART_GetLineStatus(LPC_UART0);
00110                 // Mask out the Receive Ready and Transmit Holding empty status
00111                 tmp1 &= (UART_LSR_OE | UART_LSR_PE | UART_LSR_FE \
00112                                 | UART_LSR_BI | UART_LSR_RXFE);
00113                 // If any error exist
00114                 if (tmp1) {
00115                                 UART_IntErr(tmp1);
00116                 }
00117         }
00118
00119         // Receive Data Available or Character time-out
00120         if ((tmp == UART_IIR_INTID_RDA) || (tmp == UART_IIR_INTID_CTI)){
00121                         UART_IntReceive();
00122         }
00123
00124         // Transmit Holding Empty
00125         if (tmp == UART_IIR_INTID_THRE){
00126                         UART_IntTransmit();
00127         }
00128
00129 }
00130
00131 /********************************************************************/
00136 void UART_IntReceive(void)
00137 {
00138         uint8_t tmpc;
00139         uint32_t rLen;
00140
00141         while(1){
00142                 // Call UART read function in UART driver
00143                 rLen = UART_Receive((LPC_UART_TypeDef *)LPC_UART0, &tmpc, 1, NONE_BLOCKING);
00144                 // If data received
00145                 if (rLen){
00146                         /* Check if buffer is more space
00147                          * If no more space, remaining character will be trimmed out
00148                          */
00149                         if (!__BUF_IS_FULL(rb.rx_head,rb.rx_tail)){
00150                                 rb.rx[rb.rx_head] = tmpc;
00151                                 __BUF_INCR(rb.rx_head);
00152                         }
00153                 }
00154                 // no more data
00155                 else {
00156                         break;
00157                 }
00158         }
00159 }
00160
00161 /********************************************************************/
00166 void UART_IntTransmit(void)
00167 {
00168     // Disable THRE interrupt
00169     UART_IntConfig((LPC_UART_TypeDef *)LPC_UART0, UART_INTCFG_THRE, DISABLE);
00170
00171         /* Wait for FIFO buffer empty, transfer UART_TX_FIFO_SIZE bytes
00172          * of data or break whenever ring buffers are empty */
00173         /* Wait until THR empty */
00174     while (UART_CheckBusy((LPC_UART_TypeDef *)LPC_UART0) == SET);
00175
00176         while (!__BUF_IS_EMPTY(rb.tx_head,rb.tx_tail))
00177     {
00178         /* Move a piece of data into the transmit FIFO */
00179         if (UART_Send((LPC_UART_TypeDef *)LPC_UART0, (uint8_t *)&rb.tx[rb.tx_tail], 1, NONE_BLOCKING)){
00180         /* Update transmit ring FIFO tail pointer */
00181         __BUF_INCR(rb.tx_tail);
00182         } else {
00183                 break;
00184         }
00185     }
00186
00187     /* If there is no more data to send, disable the transmit
00188        interrupt - else enable it or keep it enabled */
00189         if (__BUF_IS_EMPTY(rb.tx_head, rb.tx_tail)) {
00190         UART_IntConfig((LPC_UART_TypeDef *)LPC_UART0, UART_INTCFG_THRE, DISABLE);
00191         // Reset Tx Interrupt state
00192         TxIntStat = RESET;
00193     }
00194     else{
00195         // Set Tx Interrupt state
00196                 TxIntStat = SET;
00197         UART_IntConfig((LPC_UART_TypeDef *)LPC_UART0, UART_INTCFG_THRE, ENABLE);
00198     }
00199 }
00200
00201
00202 /*********************************************************************/
00207 void UART_IntErr(uint8_t bLSErrType)
00208 {
00209         uint8_t test;
00210         // Loop forever
00211         while (1){
00212                 // For testing purpose
00213                 test = bLSErrType;
00214         }
00215 }
00216
00217 /*-------------------------PRIVATE FUNCTIONS------------------------------*/
00218 /*********************************************************************/
00226 uint32_t UARTSend(LPC_UART_TypeDef *UARTPort, uint8_t *txbuf, uint8_t buflen)
00227 {
00228     uint8_t *data = (uint8_t *) txbuf;
00229     uint32_t bytes = 0;
00230
00231         /* Temporarily lock out UART transmit interrupts during this
00232            read so the UART transmit interrupt won't cause problems
00233            with the index values */
00234     UART_IntConfig(UARTPort, UART_INTCFG_THRE, DISABLE);
00235
00236         /* Loop until transmit run buffer is full or until n_bytes
00237            expires */
00238         while ((buflen > 0) && (!__BUF_IS_FULL(rb.tx_head, rb.tx_tail)))
00239         {
00240                 /* Write data from buffer into ring buffer */
00241                 rb.tx[rb.tx_head] = *data;
00242                 data++;
00243
00244                 /* Increment head pointer */
00245                 __BUF_INCR(rb.tx_head);
00246
00247                 /* Increment data count and decrement buffer size count */
00248                 bytes++;
00249                 buflen--;
00250         }
00251
00252         /*
00253          * Check if current Tx interrupt enable is reset,
00254          * that means the Tx interrupt must be re-enabled
00255          * due to call UART_IntTransmit() function to trigger
00256          * this interrupt type
00257          */
00258         if (TxIntStat == RESET) {
00259                 UART_IntTransmit();
00260         }
00261         /*
00262          * Otherwise, re-enables Tx Interrupt
00263          */
00264         else {
00265                 UART_IntConfig(UARTPort, UART_INTCFG_THRE, ENABLE);
00266         }
00267
00268     return bytes;
00269 }
00270
00271
00272 /*********************************************************************/
00280 uint32_t UARTReceive(LPC_UART_TypeDef *UARTPort, uint8_t *rxbuf, uint8_t buflen)
00281 {
00282     uint8_t *data = (uint8_t *) rxbuf;
00283     uint32_t bytes = 0;
00284
00285         /* Temporarily lock out UART receive interrupts during this
00286            read so the UART receive interrupt won't cause problems
00287            with the index values */
00288         UART_IntConfig(UARTPort, UART_INTCFG_RBR, DISABLE);
00289
00290         /* Loop until receive buffer ring is empty or
00291                 until max_bytes expires */
00292         while ((buflen > 0) && (!(__BUF_IS_EMPTY(rb.rx_head, rb.rx_tail))))
00293         {
00294                 /* Read data from ring buffer into user buffer */
00295                 *data = rb.rx[rb.rx_tail];
00296                 data++;
00297
00298                 /* Update tail pointer */
00299                 __BUF_INCR(rb.rx_tail);
00300
00301                 /* Increment data count and decrement buffer size count */
00302                 bytes++;
00303                 buflen--;
00304         }
00305
00306         /* Re-enable UART interrupts */
00307         UART_IntConfig(UARTPort, UART_INTCFG_RBR, ENABLE);
00308
00309     return bytes;
00310 }
00311
00312 /*********************************************************************/
00317 void print_menu(void)
00318 {
00319         uint32_t tmp, tmp2;
00320         uint8_t *pDat;
00321
00322         tmp = sizeof(menu1);
00323         tmp2 = 0;
00324         pDat = (uint8_t *)&menu1[0];
00325         while(tmp) {
00326                 tmp2 = UARTSend((LPC_UART_TypeDef *)LPC_UART0, pDat, tmp);
00327                 pDat += tmp2;
00328                 tmp -= tmp2;
00329         }
00330
00331         tmp = sizeof(menu2);
00332         tmp2 = 0;
00333         pDat = (uint8_t *)&menu2[0];
00334         while(tmp) {
00335                 tmp2 = UARTSend((LPC_UART_TypeDef *)LPC_UART0, pDat, tmp);
00336                 pDat += tmp2;
00337                 tmp -= tmp2;
00338         }
00339 }
00340
00341 /*-------------------------MAIN FUNCTION------------------------------*/
00342 /*********************************************************************/
00347 int c_entry(void)
00348 {
00349         // UART Configuration structure variable
00350         UART_CFG_Type UARTConfigStruct;
00351         // UART FIFO configuration Struct variable
00352         UART_FIFO_CFG_Type UARTFIFOConfigStruct;
00353         // Pin configuration for UART0
00354         PINSEL_CFG_Type PinCfg;
00355
00356         uint32_t idx, len;
00357         __IO FlagStatus exitflag;
00358         uint8_t buffer[10];
00359
00360         /*
00361          * Initialize UART0 pin connect
00362          */
00363         PinCfg.Funcnum = 1;
00364         PinCfg.OpenDrain = 0;
00365         PinCfg.Pinmode = 0;
00366         PinCfg.Pinnum = 2;
00367         PinCfg.Portnum = 0;
00368         PINSEL_ConfigPin(&PinCfg);
00369         PinCfg.Pinnum = 3;
00370         PINSEL_ConfigPin(&PinCfg);
00371
00372
00373         /* Initialize UART Configuration parameter structure to default state:
00374          * Baudrate = 9600bps
00375          * 8 data bit
00376          * 1 Stop bit
00377          * None parity
00378          */
00379         UART_ConfigStructInit(&UARTConfigStruct);
00380
00381         // Initialize UART0 peripheral with given to corresponding parameter
00382         UART_Init((LPC_UART_TypeDef *)LPC_UART0, &UARTConfigStruct);
00383
00384
00385         /* Initialize FIFOConfigStruct to default state:
00386          *                              - FIFO_DMAMode = DISABLE
00387          *                              - FIFO_Level = UART_FIFO_TRGLEV0
00388          *                              - FIFO_ResetRxBuf = ENABLE
00389          *                              - FIFO_ResetTxBuf = ENABLE
00390          *                              - FIFO_State = ENABLE
00391          */
00392         UART_FIFOConfigStructInit(&UARTFIFOConfigStruct);
00393
00394         // Initialize FIFO for UART0 peripheral
00395         UART_FIFOConfig((LPC_UART_TypeDef *)LPC_UART0, &UARTFIFOConfigStruct);
00396
00397
00398         // Enable UART Transmit
00399         UART_TxCmd((LPC_UART_TypeDef *)LPC_UART0, ENABLE);
00400
00401     /* Enable UART Rx interrupt */
00402         UART_IntConfig((LPC_UART_TypeDef *)LPC_UART0, UART_INTCFG_RBR, ENABLE);
00403         /* Enable UART line status interrupt */
00404         UART_IntConfig((LPC_UART_TypeDef *)LPC_UART0, UART_INTCFG_RLS, ENABLE);
00405         /*
00406          * Do not enable transmit interrupt here, since it is handled by
00407          * UART_Send() function, just to reset Tx Interrupt state for the
00408          * first time
00409          */
00410         TxIntStat = RESET;
00411
00412         // Reset ring buf head and tail idx
00413         __BUF_RESET(rb.rx_head);
00414         __BUF_RESET(rb.rx_tail);
00415         __BUF_RESET(rb.tx_head);
00416         __BUF_RESET(rb.tx_tail);
00417
00418     /* preemption = 1, sub-priority = 1 */
00419     NVIC_SetPriority(UART0_IRQn, ((0x01<<3)|0x01));
00420         /* Enable Interrupt for UART0 channel */
00421     NVIC_EnableIRQ(UART0_IRQn);
00422
00423
00424         // print welcome screen
00425         print_menu();
00426
00427         // reset exit flag
00428         exitflag = RESET;
00429
00430     /* Read some data from the buffer */
00431     while (exitflag == RESET)
00432     {
00433        len = 0;
00434         while (len == 0)
00435         {
00436             len = UARTReceive((LPC_UART_TypeDef *)LPC_UART0, buffer, sizeof(buffer));
00437         }
00438
00439         /* Got some data */
00440         idx = 0;
00441         while (idx < len)
00442         {
00443             if (buffer[idx] == 27)
00444             {
00445                 /* ESC key, set exit flag */
00446                 UARTSend((LPC_UART_TypeDef *)LPC_UART0, menu3, sizeof(menu3));
00447                 exitflag = SET;
00448             }
00449             else if (buffer[idx] == 'r')
00450             {
00451                 print_menu();
00452             }
00453             else
00454             {
00455                 /* Echo it back */
00456                 UARTSend((LPC_UART_TypeDef *)LPC_UART0, &buffer[idx], 1);
00457             }
00458             idx++;
00459         }
00460     }
00461
00462     // wait for current transmission complete - THR must be empty
00463     while (UART_CheckBusy((LPC_UART_TypeDef *)LPC_UART0));
00464
00465     // DeInitialize UART0 peripheral
00466     UART_DeInit((LPC_UART_TypeDef *)LPC_UART0);
00467
00468     /* Loop forever */
00469     while(1);
00470     return 1;
00471 }
00472
00473 /* With ARM and GHS toolsets, the entry point is main() - this will
00474    allow the linker to generate wrapper code to setup stacks, allocate
00475    heap area, and initialize and copy code and data segments. For GNU
00476    toolsets, the entry point is through __start() in the crt0_gnu.asm
00477    file, and that startup code will setup stacks and data */
00478 int main(void)
00479 {
00480     return c_entry();
00481 }
00482
00483 #ifdef  DEBUG
00484 /*******************************************************************************
00485 * @brief                Reports the name of the source file and the source line number
00486 *                               where the CHECK_PARAM error has occurred.
00487 * @param[in]    file Pointer to the source file name
00488 * @param[in]    line assert_param error line source number
00489 * @return               None
00490 *******************************************************************************/
00491 void check_failed(uint8_t *file, uint32_t line)
00492 {
00493         /* User can add his own implementation to report the file name and line number,
00494          ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
00495
00496         /* Infinite loop */
00497         while(1);
00498 }
00499 #endif
00500
00501 /*
00502  * @}
00503  */
Generated on Tue Jun 7 14:59:03 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/UART/IrDA/Receive/uart_irda_receive.c Source File

C:/nxpdrv/LPC1700CMSIS/Examples/UART/IrDA/Receive/uart_irda_receive.c

Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          uart_irda_receive.c                             2010-06-07
00003 */
00025 #include "lpc17xx_uart.h"
00026 #include "lpc17xx_libcfg.h"
00027 #include "lpc17xx_pinsel.h"
00028 #include "lpc17xx_gpio.h"
00029
00030 /* Example group ----------------------------------------------------------- */
00036 /************************** PRIVATE DEFINITIONS *************************/
00037 #define UART_PORT 0
00038
00039 #if (UART_PORT == 0)
00040 #define TEST_UART LPC_UART0
00041 #elif (UART_PORT == 1)
00042 #define TEST_UART (LPC_UART_TypeDef *)UART1
00043 #endif
00044 #define TEST_IRDA LPC_UART3
00045
00046 /************************** PRIVATE VARIABLES *************************/
00047 uint8_t menu1[] = "Hello NXP Semiconductors \n\r";
00048 uint8_t menu2[] = "UART IrDA mode demo \n\r\t MCU LPC17xx - ARM Cortex-M3 \n\r\t UART0 - 9600bps communicates with PC \n\r\t UART3 - 9600bps receives infrared signal\n\r";
00049 uint8_t menu3[] = "\t The demo keep reading input infrared signal and display through 8 led bank \n\r";
00050 /************************** PRIVATE FUNCTIONS *************************/
00051 void print_menu(void);
00052
00053 /*-------------------------PRIVATE FUNCTIONS------------------------------*/
00054 /*********************************************************************/
00059 void print_menu(void)
00060 {
00061         UART_Send(TEST_UART, menu1, sizeof(menu1), BLOCKING);
00062         UART_Send(TEST_UART, menu2, sizeof(menu2), BLOCKING);
00063         UART_Send(TEST_UART, menu3, sizeof(menu3), BLOCKING);
00064 }
00065
00066
00067
00068 /*-------------------------MAIN FUNCTION------------------------------*/
00069 /*********************************************************************/
00074 int c_entry(void)
00075 {
00076         // UART Configuration structure variable
00077         UART_CFG_Type UARTConfigStruct;
00078         // UART FIFO configuration Struct variable
00079         UART_FIFO_CFG_Type UARTFIFOConfigStruct;
00080         // Pin configuration for UART0
00081         PINSEL_CFG_Type PinCfg;
00082         uint32_t len;
00083         uint32_t led_mask[] = { 1<<28, 1<<29, 1UL<<31, 1<<2, 1<<3, 1<<4, 1<<5, 1<<6 };
00084         uint8_t buffer,i;
00085
00086         //Initialize for 8 led bank
00087         GPIO_SetDir(1, 0xB0000000, 1);           /* LEDs on PORT1 defined as Output    */
00088         GPIO_SetDir(2, 0x0000007C, 1);           /* LEDs on PORT2 defined as Output    */
00089
00090         GPIO_ClearValue(1, 0xB0000000);
00091         GPIO_ClearValue(2, 0x0000007C);
00092
00093 #if (UART_PORT == 0)
00094         /*
00095          * Initialize UART0 pin connect
00096          */
00097         PinCfg.Funcnum = 1;
00098         PinCfg.OpenDrain = 0;
00099         PinCfg.Pinmode = 0;
00100         PinCfg.Pinnum = 2;
00101         PinCfg.Portnum = 0;
00102         PINSEL_ConfigPin(&PinCfg);//P0.2 TXD0
00103 #endif
00104
00105 #if (UART_PORT == 1)
00106         /*
00107          * Initialize UART1 pin connect
00108          */
00109         PinCfg.Funcnum = 2;
00110         PinCfg.OpenDrain = 0;
00111         PinCfg.Pinmode = 0;
00112         PinCfg.Pinnum = 0;
00113         PinCfg.Portnum = 2;
00114         PINSEL_ConfigPin(&PinCfg);
00115         PinCfg.Pinnum = 1;
00116         PINSEL_ConfigPin(&PinCfg);
00117 #endif
00118         /*
00119          * Initialize UART3 pin connect
00120          */
00121         PinCfg.Funcnum = 3;
00122         PinCfg.OpenDrain = 0;
00123         PinCfg.Pinmode = 0;
00124         PinCfg.Pinnum = 26;
00125         PinCfg.Portnum = 0;
00126         PINSEL_ConfigPin(&PinCfg);//P0.26 RXD3
00127
00128         /* Initialize UART Configuration parameter structure to default state:
00129          * Baudrate = 9600bps
00130          * 8 data bit
00131          * 1 Stop bit
00132          * None parity
00133          */
00134         UART_ConfigStructInit(&UARTConfigStruct);
00135
00136         // Initialize UART0 & UART3 peripheral with given to corresponding parameter
00137         UART_Init(TEST_UART, &UARTConfigStruct);
00138         UART_Init(TEST_IRDA, &UARTConfigStruct);
00139         /* Initialize FIFOConfigStruct to default state:
00140          *                              - FIFO_DMAMode = DISABLE
00141          *                              - FIFO_Level = UART_FIFO_TRGLEV0
00142          *                              - FIFO_ResetRxBuf = ENABLE
00143          *                              - FIFO_ResetTxBuf = ENABLE
00144          *                              - FIFO_State = ENABLE
00145          */
00146         UART_FIFOConfigStructInit(&UARTFIFOConfigStruct);
00147
00148         // Initialize FIFO for UART0 & UART3 peripheral
00149         UART_FIFOConfig(TEST_UART, &UARTFIFOConfigStruct);
00150         UART_FIFOConfig(TEST_IRDA, &UARTFIFOConfigStruct);
00151         //Configure and enable IrDA mode on UART
00152         UART_IrDACmd(TEST_IRDA,ENABLE);
00153
00154         // Enable UART Transmit
00155         UART_TxCmd(TEST_UART, ENABLE);
00156
00157         // print welcome screen
00158         print_menu();
00159
00160     /* Read some data from the buffer */
00161     while (1)
00162     {
00163         len=0;
00164         while(len==0)
00165         {
00166                 len = UART_Receive(TEST_IRDA, &buffer, 1, NONE_BLOCKING);
00167         }
00168         if(buffer!=0)
00169         {
00170                 for(i=0;i<8;i++)
00171                 {
00172                 if((buffer>>i)&0x01){//set
00173                         if(i<3)
00174                                 GPIO_SetValue(1, led_mask[i]);
00175                         else
00176                                 GPIO_SetValue(2, led_mask[i]);
00177                 }
00178                 else {                                  //clear
00179                         if(i<3)
00180                                 GPIO_ClearValue(1, led_mask[i]);
00181                         else
00182                                 GPIO_ClearValue(2, led_mask[i]);
00183                 }
00184                 }
00185         }
00186         else //clear 8 led bank
00187         {
00188                 GPIO_ClearValue(1, 0xB0000000);
00189                 GPIO_ClearValue(2, 0x0000007C);
00190         }
00191     }
00192
00193     // wait for current transmission complete - THR must be empty
00194     //while (UART_CheckBusy(TEST_UART) == SET);
00195
00196     // DeInitialize UART0 peripheral
00197     //UART_DeInit(TEST_UART);
00198
00199     /* Loop forever */
00200     //while(1);
00201     return 1;
00202 }
00203
00204 /* With ARM and GHS toolsets, the entry point is main() - this will
00205    allow the linker to generate wrapper code to setup stacks, allocate
00206    heap area, and initialize and copy code and data segments. For GNU
00207    toolsets, the entry point is through __start() in the crt0_gnu.asm
00208    file, and that startup code will setup stacks and data */
00209 int main(void)
00210 {
00211     return c_entry();
00212 }
00213
00214
00215 #ifdef  DEBUG
00216 /*******************************************************************************
00217 * @brief                Reports the name of the source file and the source line number
00218 *                               where the CHECK_PARAM error has occurred.
00219 * @param[in]    file Pointer to the source file name
00220 * @param[in]    line assert_param error line source number
00221 * @return               None
00222 *******************************************************************************/
00223 void check_failed(uint8_t *file, uint32_t line)
00224 {
00225         /* User can add his own implementation to report the file name and line number,
00226          ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
00227
00228         /* Infinite loop */
00229         while(1);
00230 }
00231 #endif
00232 /*
00233  * @}
00234  */
Generated on Tue Jun 7 14:59:03 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/UART/IrDA/Transmit/uart_irda_transmit.c Source File

C:/nxpdrv/LPC1700CMSIS/Examples/UART/IrDA/Transmit/uart_irda_transmit.c

Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          uart_irda_transmit.c                            2010-06-07
00003 */
00025 #include "lpc17xx_uart.h"
00026 #include "lpc17xx_libcfg.h"
00027 #include "lpc17xx_pinsel.h"
00028
00029 /* Example group ----------------------------------------------------------- */
00035 /************************** PRIVATE DEFINITIONS *************************/
00036 #define UART_PORT 0
00037
00038 #if (UART_PORT == 0)
00039 #define TEST_UART LPC_UART0
00040 #elif (UART_PORT == 1)
00041 #define TEST_UART (LPC_UART_TypeDef *)UART1
00042 #endif
00043 #define TEST_IRDA LPC_UART3
00044
00045 /************************** PRIVATE VARIABLES *************************/
00046 uint8_t menu1[] = "Hello NXP Semiconductors \n\r";
00047 uint8_t menu2[] = "UART IrDA mode demo \n\r\t MCU LPC17xx - ARM Cortex-M3 \n\r\t UART0 - 9600bps communicates with PC \n\r\t UART3 - 9600bps transmits infrared signals\n\r";
00048 uint8_t menu3[] = "\t\t- Press Esc to terminate this demo \n\r\t\t- Press 'r' to re-print this menu \n\r";
00049 uint8_t menu4[] = "\n\rUART demo terminated!";
00050 uint8_t menu5[] = "\n\rEnter a hex byte value to transmit: 0x";
00051 /************************** PRIVATE FUNCTIONS *************************/
00052 void print_menu(void);
00053
00054 /*-------------------------PRIVATE FUNCTIONS------------------------------*/
00055 /*********************************************************************/
00060 void print_menu(void)
00061 {
00062         UART_Send(TEST_UART, menu1, sizeof(menu1), BLOCKING);
00063         UART_Send(TEST_UART, menu2, sizeof(menu2), BLOCKING);
00064         UART_Send(TEST_UART, menu3, sizeof(menu3), BLOCKING);
00065 }
00066
00067
00068
00069 /*-------------------------MAIN FUNCTION------------------------------*/
00070 /*********************************************************************/
00075 int c_entry(void)
00076 {
00077         // UART Configuration structure variable
00078         UART_CFG_Type UARTConfigStruct;
00079         // UART FIFO configuration Struct variable
00080         UART_FIFO_CFG_Type UARTFIFOConfigStruct;
00081         // Pin configuration for UART
00082         PINSEL_CFG_Type PinCfg;
00083         uint32_t idx,len;
00084         __IO FlagStatus exitflag;
00085         uint8_t buffer,temp;
00086
00087 #if (UART_PORT == 0)
00088         /*
00089          * Initialize UART0 pin connect
00090          */
00091         PinCfg.Funcnum = 1;
00092         PinCfg.OpenDrain = 0;
00093         PinCfg.Pinmode = 0;
00094         PinCfg.Pinnum = 2;
00095         PinCfg.Portnum = 0;
00096         PINSEL_ConfigPin(&PinCfg);//P0.2 TXD0
00097         PinCfg.Pinnum = 3;
00098         PINSEL_ConfigPin(&PinCfg);//P0.3 RXD0
00099 #endif
00100
00101 #if (UART_PORT == 1)
00102         /*
00103          * Initialize UART1 pin connect
00104          */
00105         PinCfg.Funcnum = 2;
00106         PinCfg.OpenDrain = 0;
00107         PinCfg.Pinmode = 0;
00108         PinCfg.Pinnum = 0;
00109         PinCfg.Portnum = 2;
00110         PINSEL_ConfigPin(&PinCfg);
00111         PinCfg.Pinnum = 1;
00112         PINSEL_ConfigPin(&PinCfg);
00113 #endif
00114         /*
00115          * Initialize UART3 pin connect
00116          */
00117         PinCfg.Funcnum = 3;
00118         PinCfg.OpenDrain = 0;
00119         PinCfg.Pinmode = 0;
00120         PinCfg.Pinnum = 25;
00121         PinCfg.Portnum = 0;
00122         PINSEL_ConfigPin(&PinCfg);//P0.25 TXD3
00123
00124         /* Initialize UART Configuration parameter structure to default state:
00125          * Baudrate = 9600bps
00126          * 8 data bit
00127          * 1 Stop bit
00128          * None parity
00129          */
00130         UART_ConfigStructInit(&UARTConfigStruct);
00131
00132         // Initialize UART0 & UART3 peripheral with given to corresponding parameter
00133         UART_Init(TEST_UART, &UARTConfigStruct);
00134         UART_Init(TEST_IRDA, &UARTConfigStruct);
00135         /* Initialize FIFOConfigStruct to default state:
00136          *                              - FIFO_DMAMode = DISABLE
00137          *                              - FIFO_Level = UART_FIFO_TRGLEV0
00138          *                              - FIFO_ResetRxBuf = ENABLE
00139          *                              - FIFO_ResetTxBuf = ENABLE
00140          *                              - FIFO_State = ENABLE
00141          */
00142         UART_FIFOConfigStructInit(&UARTFIFOConfigStruct);
00143
00144         // Initialize FIFO for UART0 & UART3 peripheral
00145         UART_FIFOConfig(TEST_UART, &UARTFIFOConfigStruct);
00146         UART_FIFOConfig(TEST_IRDA, &UARTFIFOConfigStruct);
00147
00148         //Configure and enable IrDA mode on UART
00149         UART_IrDACmd(TEST_IRDA,ENABLE);
00150         // Enable UART Transmit
00151         UART_TxCmd(TEST_UART, ENABLE);
00152         UART_TxCmd(TEST_IRDA, ENABLE);
00153         // print welcome screen
00154         print_menu();
00155
00156         // Reset exit flag
00157         exitflag = RESET;
00158         idx=0;buffer=0;
00159
00160     /* Read some data from the buffer */
00161     while (exitflag == RESET)
00162     {
00163         if(idx==0)
00164         {
00165                 UART_Send(TEST_UART, menu5, sizeof(menu5), BLOCKING);
00166         }
00167         len=0;
00168         while(len==0)
00169         {
00170                 len = UART_Receive(TEST_UART, &temp, 1, NONE_BLOCKING);
00171         }
00172         if(temp==27)
00173         {
00174                 UART_Send(TEST_UART, menu4, sizeof(menu4), BLOCKING);
00175                 exitflag=SET;
00176         }
00177         else if(temp=='r')
00178         {
00179                 idx=0;buffer=0;
00180                 print_menu();
00181                 UART_Send(TEST_IRDA, &buffer, 1, BLOCKING);
00182         }
00183         else
00184         {
00185                 idx++;
00186                 switch(temp)
00187                 {
00188                 case '0': buffer=(buffer<<4)|0x00;break;
00189                 case '1': buffer=(buffer<<4)|0x01;break;
00190                 case '2': buffer=(buffer<<4)|0x02;break;
00191                 case '3': buffer=(buffer<<4)|0x03;break;
00192                 case '4': buffer=(buffer<<4)|0x04;break;
00193                 case '5': buffer=(buffer<<4)|0x05;break;
00194                 case '6': buffer=(buffer<<4)|0x06;break;
00195                 case '7': buffer=(buffer<<4)|0x07;break;
00196                 case '8': buffer=(buffer<<4)|0x08;break;
00197                 case '9': buffer=(buffer<<4)|0x09;break;
00198                 case 'a': buffer=(buffer<<4)|0x0A;break;
00199                 case 'A': buffer=(buffer<<4)|0x0A;break;
00200                 case 'b': buffer=(buffer<<4)|0x0B;break;
00201                 case 'B': buffer=(buffer<<4)|0x0B;break;
00202                 case 'c': buffer=(buffer<<4)|0x0C;break;
00203                 case 'C': buffer=(buffer<<4)|0x0C;break;
00204                 case 'd': buffer=(buffer<<4)|0x0D;break;
00205                 case 'D': buffer=(buffer<<4)|0x0D;break;
00206                 case 'e': buffer=(buffer<<4)|0x0E;break;
00207                 case 'E': buffer=(buffer<<4)|0x0E;break;
00208                 case 'f': buffer=(buffer<<4)|0x0F;break;
00209                 case 'F': buffer=(buffer<<4)|0x0F;break;
00210                 default: idx=0;buffer=0;break;
00211                 }
00212                 if(idx==2)
00213                 {
00214                         temp=buffer>>4;
00215                         if(temp <= 9)temp=temp+ 0x30;
00216                         else temp=temp+0x37;
00217                         UART_Send(TEST_UART, &temp, 1, BLOCKING);
00218                         temp=(buffer&0x0F);
00219                         if(temp <= 9)temp=temp+ 0x30;
00220                         else temp=temp+0x37;
00221                         UART_Send(TEST_UART, &temp, 1, BLOCKING);
00222
00223                 UART_Send(TEST_IRDA, &buffer, 1, BLOCKING);
00224                 idx=0;buffer=0;
00225                 }
00226         }
00227     }
00228     // wait for current transmission complete - THR must be empty
00229     while (UART_CheckBusy(TEST_UART) == SET);
00230     while (UART_CheckBusy(TEST_IRDA) == SET);
00231     // DeInitialize UART0 & UART3 peripheral
00232     UART_DeInit(TEST_UART);
00233     UART_DeInit(TEST_IRDA);
00234     /* Loop forever */
00235     while(1);
00236     return 1;
00237 }
00238
00239 /* With ARM and GHS toolsets, the entry point is main() - this will
00240    allow the linker to generate wrapper code to setup stacks, allocate
00241    heap area, and initialize and copy code and data segments. For GNU
00242    toolsets, the entry point is through __start() in the crt0_gnu.asm
00243    file, and that startup code will setup stacks and data */
00244 int main(void)
00245 {
00246     return c_entry();
00247 }
00248
00249
00250 #ifdef  DEBUG
00251 /*******************************************************************************
00252 * @brief                Reports the name of the source file and the source line number
00253 *                               where the CHECK_PARAM error has occurred.
00254 * @param[in]    file Pointer to the source file name
00255 * @param[in]    line assert_param error line source number
00256 * @return               None
00257 *******************************************************************************/
00258 void check_failed(uint8_t *file, uint32_t line)
00259 {
00260         /* User can add his own implementation to report the file name and line number,
00261          ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
00262
00263         /* Infinite loop */
00264         while(1);
00265 }
00266 #endif
00267 /*
00268  * @}
00269  */
Generated on Tue Jun 7 14:59:03 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/UART/Polling/uart_polling_test.c Source File

C:/nxpdrv/LPC1700CMSIS/Examples/UART/Polling/uart_polling_test.c

Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          uart_polling_test.c                             2010-05-21
00003 */
00025 #include "lpc17xx_uart.h"
00026 #include "lpc17xx_libcfg.h"
00027 #include "lpc17xx_pinsel.h"
00028
00029 /* Example group ----------------------------------------------------------- */
00035 /************************** PRIVATE DEFINITIONS *************************/
00036 #define UART_PORT 0
00037
00038 #if (UART_PORT == 0)
00039 #define TEST_UART LPC_UART0
00040 #elif (UART_PORT == 1)
00041 #define TEST_UART (LPC_UART_TypeDef *)UART1
00042 #endif
00043
00044
00045 /************************** PRIVATE VARIABLES *************************/
00046 uint8_t menu1[] = "Hello NXP Semiconductors \n\r";
00047 uint8_t menu2[] = "UART polling mode demo \n\r\t MCU LPC17xx - ARM Cortex-M3 \n\r\t UART0 - 9600bps \n\r";
00048 uint8_t menu3[] = "UART demo terminated!";
00049
00050 /************************** PRIVATE FUNCTIONS *************************/
00051 void print_menu(void);
00052
00053 /*-------------------------PRIVATE FUNCTIONS------------------------------*/
00054 /*********************************************************************/
00059 void print_menu(void)
00060 {
00061         UART_Send(TEST_UART, menu1, sizeof(menu1), BLOCKING);
00062         UART_Send(TEST_UART, menu2, sizeof(menu2), BLOCKING);
00063 }
00064
00065
00066
00067 /*-------------------------MAIN FUNCTION------------------------------*/
00068 /*********************************************************************/
00073 int c_entry(void)
00074 {
00075         // UART Configuration structure variable
00076         UART_CFG_Type UARTConfigStruct;
00077         // UART FIFO configuration Struct variable
00078         UART_FIFO_CFG_Type UARTFIFOConfigStruct;
00079         // Pin configuration for UART0
00080         PINSEL_CFG_Type PinCfg;
00081
00082         uint32_t idx, len;
00083         __IO FlagStatus exitflag;
00084         uint8_t buffer[10];
00085
00086 #if (UART_PORT == 0)
00087         /*
00088          * Initialize UART0 pin connect
00089          */
00090         PinCfg.Funcnum = 1;
00091         PinCfg.OpenDrain = 0;
00092         PinCfg.Pinmode = 0;
00093         PinCfg.Pinnum = 2;
00094         PinCfg.Portnum = 0;
00095         PINSEL_ConfigPin(&PinCfg);
00096         PinCfg.Pinnum = 3;
00097         PINSEL_ConfigPin(&PinCfg);
00098 #endif
00099
00100 #if (UART_PORT == 1)
00101         /*
00102          * Initialize UART1 pin connect
00103          */
00104         PinCfg.Funcnum = 2;
00105         PinCfg.OpenDrain = 0;
00106         PinCfg.Pinmode = 0;
00107         PinCfg.Pinnum = 0;
00108         PinCfg.Portnum = 2;
00109         PINSEL_ConfigPin(&PinCfg);
00110         PinCfg.Pinnum = 1;
00111         PINSEL_ConfigPin(&PinCfg);
00112 #endif
00113
00114         /* Initialize UART Configuration parameter structure to default state:
00115          * Baudrate = 9600bps
00116          * 8 data bit
00117          * 1 Stop bit
00118          * None parity
00119          */
00120         UART_ConfigStructInit(&UARTConfigStruct);
00121
00122         // Initialize UART0 peripheral with given to corresponding parameter
00123         UART_Init(TEST_UART, &UARTConfigStruct);
00124
00125         /* Initialize FIFOConfigStruct to default state:
00126          *                              - FIFO_DMAMode = DISABLE
00127          *                              - FIFO_Level = UART_FIFO_TRGLEV0
00128          *                              - FIFO_ResetRxBuf = ENABLE
00129          *                              - FIFO_ResetTxBuf = ENABLE
00130          *                              - FIFO_State = ENABLE
00131          */
00132         UART_FIFOConfigStructInit(&UARTFIFOConfigStruct);
00133
00134         // Initialize FIFO for UART0 peripheral
00135         UART_FIFOConfig(TEST_UART, &UARTFIFOConfigStruct);
00136
00137
00138         // Enable UART Transmit
00139         UART_TxCmd(TEST_UART, ENABLE);
00140
00141         // print welcome screen
00142         print_menu();
00143
00144         // Reset exit flag
00145         exitflag = RESET;
00146
00147     /* Read some data from the buffer */
00148     while (exitflag == RESET)
00149     {
00150        len = 0;
00151         while (len == 0)
00152         {
00153             len = UART_Receive(TEST_UART, buffer, sizeof(buffer), NONE_BLOCKING);
00154         }
00155
00156         /* Got some data */
00157         idx = 0;
00158         while (idx < len)
00159         {
00160             if (buffer[idx] == 27)
00161             {
00162                 /* ESC key, set exit flag */
00163                 UART_Send(TEST_UART, menu3, sizeof(menu3), BLOCKING);
00164                 exitflag = SET;
00165             }
00166             else if (buffer[idx] == 'r')
00167             {
00168                 print_menu();
00169             }
00170             else
00171             {
00172                 /* Echo it back */
00173                 UART_Send(TEST_UART, &buffer[idx], 1, BLOCKING);
00174             }
00175             idx++;
00176         }
00177     }
00178
00179     // wait for current transmission complete - THR must be empty
00180     while (UART_CheckBusy(TEST_UART) == SET);
00181
00182     // DeInitialize UART0 peripheral
00183     UART_DeInit(TEST_UART);
00184
00185     /* Loop forever */
00186     while(1);
00187     return 1;
00188 }
00189
00190 /* With ARM and GHS toolsets, the entry point is main() - this will
00191    allow the linker to generate wrapper code to setup stacks, allocate
00192    heap area, and initialize and copy code and data segments. For GNU
00193    toolsets, the entry point is through __start() in the crt0_gnu.asm
00194    file, and that startup code will setup stacks and data */
00195 int main(void)
00196 {
00197     return c_entry();
00198 }
00199
00200
00201 #ifdef  DEBUG
00202 /*******************************************************************************
00203 * @brief                Reports the name of the source file and the source line number
00204 *                               where the CHECK_PARAM error has occurred.
00205 * @param[in]    file Pointer to the source file name
00206 * @param[in]    line assert_param error line source number
00207 * @return               None
00208 *******************************************************************************/
00209 void check_failed(uint8_t *file, uint32_t line)
00210 {
00211         /* User can add his own implementation to report the file name and line number,
00212          ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
00213
00214         /* Infinite loop */
00215         while(1);
00216 }
00217 #endif
00218
00219 /*
00220  * @}
00221  */
Generated on Tue Jun 7 14:59:03 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/lpc17xx_port/uip-conf.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/lpc17xx_port/uip-conf.h

Go to the documentation of this file.
00001
00015 /*
00016  * Copyright (c) 2006, Swedish Institute of Computer Science.
00017  * All rights reserved.
00018  *
00019  * Redistribution and use in source and binary forms, with or without
00020  * modification, are permitted provided that the following conditions
00021  * are met:
00022  * 1. Redistributions of source code must retain the above copyright
00023  *    notice, this list of conditions and the following disclaimer.
00024  * 2. Redistributions in binary form must reproduce the above copyright
00025  *    notice, this list of conditions and the following disclaimer in the
00026  *    documentation and/or other materials provided with the distribution.
00027  * 3. Neither the name of the Institute nor the names of its contributors
00028  *    may be used to endorse or promote products derived from this software
00029  *    without specific prior written permission.
00030  *
00031  * THIS SOFTWARE IS PROVIDED BY THE INSTITUTE AND CONTRIBUTORS ``AS IS'' AND
00032  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
00033  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
00034  * ARE DISCLAIMED.  IN NO EVENT SHALL THE INSTITUTE OR CONTRIBUTORS BE LIABLE
00035  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
00036  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
00037  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
00038  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
00039  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
00040  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
00041  * SUCH DAMAGE.
00042  *
00043  * This file is part of the uIP TCP/IP stack
00044  *
00045  * $Id: uip-conf.h 18137 2007-09-17 14:43:16Z anderslu $
00046  */
00047
00055 #ifndef __UIP_CONF_H__
00056 #define __UIP_CONF_H__
00057
00058 #include <inttypes.h>
00059
00067 typedef uint8_t u8_t;
00068
00076 typedef uint16_t u16_t;
00077
00086 typedef unsigned short uip_stats_t;
00087
00093 #define UIP_CONF_MAX_CONNECTIONS 40
00094
00100 #define UIP_CONF_MAX_LISTENPORTS 40
00101
00107 #define UIP_CONF_BUFFER_SIZE     1520
00108
00114 #define UIP_CONF_BYTE_ORDER      LITTLE_ENDIAN
00115
00121 #define UIP_CONF_LOGGING         1
00122
00128 #define UIP_CONF_UDP             0
00129
00135 #define UIP_CONF_UDP_CHECKSUMS   1
00136
00142 #define UIP_CONF_STATISTICS      1
00143
00144 /* Here we include the header file for the application(s) we use in
00145    our project. */
00146 /*#include "smtp.h"*/
00147 //#include "hello-world.h"
00148 /*#include "telnetd.h"*/
00149 #include "webserver.h"
00150 /*#include "dhcpc.h"*/
00151 /*#include "resolv.h"*/
00152 /*#include "webclient.h"*/
00153
00154 #endif /* __UIP_CONF_H__ */
00155
Generated on Tue Jun 7 14:59:00 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/uip/uip-fw.c Source File

C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/uip/uip-fw.c

Go to the documentation of this file.
00001 /*
00002  * Copyright (c) 2004, Swedish Institute of Computer Science.
00003  * All rights reserved.
00004  *
00005  * Redistribution and use in source and binary forms, with or without
00006  * modification, are permitted provided that the following conditions
00007  * are met:
00008  * 1. Redistributions of source code must retain the above copyright
00009  *    notice, this list of conditions and the following disclaimer.
00010  * 2. Redistributions in binary form must reproduce the above copyright
00011  *    notice, this list of conditions and the following disclaimer in the
00012  *    documentation and/or other materials provided with the distribution.
00013  * 3. Neither the name of the Institute nor the names of its contributors
00014  *    may be used to endorse or promote products derived from this software
00015  *    without specific prior written permission.
00016  *
00017  * THIS SOFTWARE IS PROVIDED BY THE INSTITUTE AND CONTRIBUTORS ``AS IS'' AND
00018  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
00019  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
00020  * ARE DISCLAIMED.  IN NO EVENT SHALL THE INSTITUTE OR CONTRIBUTORS BE LIABLE
00021  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
00022  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
00023  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
00024  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
00025  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
00026  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
00027  * SUCH DAMAGE.
00028  *
00029  * This file is part of the uIP TCP/IP stack
00030  *
00031  * Author: Adam Dunkels <adam@sics.se>
00032  *
00033  * $Id: uip-fw.c,v 1.2 2006/06/12 08:00:30 adam Exp $
00034  */
00056 #include "uip.h"
00057 #include "uip_arch.h"
00058 #include "uip-fw.h"
00059
00060 #include <string.h> /* for memcpy() */
00061
00062 /*
00063  * The list of registered network interfaces.
00064  */
00065 static struct uip_fw_netif *netifs = NULL;
00066
00067 /*
00068  * A pointer to the default network interface.
00069  */
00070 static struct uip_fw_netif *defaultnetif = NULL;
00071
00072 struct tcpip_hdr {
00073   /* IP header. */
00074   u8_t vhl,
00075     tos;
00076   u16_t len,
00077     ipid,
00078     ipoffset;
00079   u8_t ttl,
00080     proto;
00081   u16_t ipchksum;
00082   u16_t srcipaddr[2],
00083     destipaddr[2];
00084
00085   /* TCP header. */
00086   u16_t srcport,
00087     destport;
00088   u8_t seqno[4],
00089     ackno[4],
00090     tcpoffset,
00091     flags,
00092     wnd[2];
00093   u16_t tcpchksum;
00094   u8_t urgp[2];
00095   u8_t optdata[4];
00096 } /*PACK_STRUCT_END*/;
00097
00098 struct icmpip_hdr {
00099   /* IP header. */
00100   u8_t vhl,
00101     tos,
00102     len[2],
00103     ipid[2],
00104     ipoffset[2],
00105     ttl,
00106     proto;
00107   u16_t ipchksum;
00108   u16_t srcipaddr[2],
00109     destipaddr[2];
00110   /* ICMP (echo) header. */
00111   u8_t type, icode;
00112   u16_t icmpchksum;
00113   u16_t id, seqno;
00114   u8_t payload[1];
00115 } /*PACK_STRUCT_END*/;
00116
00117 /* ICMP ECHO. */
00118 #define ICMP_ECHO 8
00119
00120 /* ICMP TIME-EXCEEDED. */
00121 #define ICMP_TE 11
00122
00123 /*
00124  * Pointer to the TCP/IP headers of the packet in the uip_buf buffer.
00125  */
00126 #define BUF ((struct tcpip_hdr *)&uip_buf[UIP_LLH_LEN])
00127
00128 /*
00129  * Pointer to the ICMP/IP headers of the packet in the uip_buf buffer.
00130  */
00131 #define ICMPBUF ((struct icmpip_hdr *)&uip_buf[UIP_LLH_LEN])
00132
00133 /*
00134  * Certain fields of an IP packet that are used for identifying
00135  * duplicate packets.
00136  */
00137 struct fwcache_entry {
00138   u16_t timer;
00139
00140   u16_t srcipaddr[2];
00141   u16_t destipaddr[2];
00142   u16_t ipid;
00143   u8_t proto;
00144   u8_t unused;
00145
00146 #if notdef
00147   u16_t payload[2];
00148 #endif
00149
00150 #if UIP_REASSEMBLY > 0
00151   u16_t len, offset;
00152 #endif
00153 };
00154
00155 /*
00156  * The number of packets to remember when looking for duplicates.
00157  */
00158 #ifdef UIP_CONF_FWCACHE_SIZE
00159 #define FWCACHE_SIZE UIP_CONF_FWCACHE_SIZE
00160 #else
00161 #define FWCACHE_SIZE 2
00162 #endif
00163
00164
00165 /*
00166  * A cache of packet header fields which are used for
00167  * identifying duplicate packets.
00168  */
00169 static struct fwcache_entry fwcache[FWCACHE_SIZE];
00170
00175 #define FW_TIME 20
00176
00177 /*------------------------------------------------------------------------------*/
00181 /*------------------------------------------------------------------------------*/
00182 void
00183 uip_fw_init(void)
00184 {
00185   struct uip_fw_netif *t;
00186   defaultnetif = NULL;
00187   while(netifs != NULL) {
00188     t = netifs;
00189     netifs = netifs->next;
00190     t->next = NULL;
00191   }
00192 }
00193 /*------------------------------------------------------------------------------*/
00205 /*------------------------------------------------------------------------------*/
00206 static unsigned char
00207 ipaddr_maskcmp(u16_t *ipaddr, u16_t *netipaddr, u16_t *netmask)
00208 {
00209   return (ipaddr[0] & netmask [0]) == (netipaddr[0] & netmask[0]) &&
00210     (ipaddr[1] & netmask[1]) == (netipaddr[1] & netmask[1]);
00211 }
00212 /*------------------------------------------------------------------------------*/
00220 /*------------------------------------------------------------------------------*/
00221 static void
00222 time_exceeded(void)
00223 {
00224   u16_t tmp16;
00225
00226   /* We don't send out ICMP errors for ICMP messages. */
00227   if(ICMPBUF->proto == UIP_PROTO_ICMP) {
00228     uip_len = 0;
00229     return;
00230   }
00231   /* Copy fields from packet header into payload of this ICMP packet. */
00232   memcpy(&(ICMPBUF->payload[0]), ICMPBUF, 28);
00233
00234   /* Set the ICMP type and code. */
00235   ICMPBUF->type = ICMP_TE;
00236   ICMPBUF->icode = 0;
00237
00238   /* Calculate the ICMP checksum. */
00239   ICMPBUF->icmpchksum = 0;
00240   ICMPBUF->icmpchksum = ~uip_chksum((u16_t *)&(ICMPBUF->type), 36);
00241
00242   /* Set the IP destination address to be the source address of the
00243      original packet. */
00244   tmp16= BUF->destipaddr[0];
00245   BUF->destipaddr[0] = BUF->srcipaddr[0];
00246   BUF->srcipaddr[0] = tmp16;
00247   tmp16 = BUF->destipaddr[1];
00248   BUF->destipaddr[1] = BUF->srcipaddr[1];
00249   BUF->srcipaddr[1] = tmp16;
00250
00251   /* Set our IP address as the source address. */
00252   BUF->srcipaddr[0] = uip_hostaddr[0];
00253   BUF->srcipaddr[1] = uip_hostaddr[1];
00254
00255   /* The size of the ICMP time exceeded packet is 36 + the size of the
00256      IP header (20) = 56. */
00257   uip_len = 56;
00258   ICMPBUF->len[0] = 0;
00259   ICMPBUF->len[1] = uip_len;
00260
00261   /* Fill in the other fields in the IP header. */
00262   ICMPBUF->vhl = 0x45;
00263   ICMPBUF->tos = 0;
00264   ICMPBUF->ipoffset[0] = ICMPBUF->ipoffset[1] = 0;
00265   ICMPBUF->ttl  = UIP_TTL;
00266   ICMPBUF->proto = UIP_PROTO_ICMP;
00267
00268   /* Calculate IP checksum. */
00269   ICMPBUF->ipchksum = 0;
00270   ICMPBUF->ipchksum = ~(uip_ipchksum());
00271
00272
00273 }
00274 /*------------------------------------------------------------------------------*/
00280 /*------------------------------------------------------------------------------*/
00281 static void
00282 fwcache_register(void)
00283 {
00284   struct fwcache_entry *fw;
00285   int i, oldest;
00286
00287   oldest = FW_TIME;
00288   fw = NULL;
00289
00290   /* Find the oldest entry in the cache. */
00291   for(i = 0; i < FWCACHE_SIZE; ++i) {
00292     if(fwcache[i].timer == 0) {
00293       fw = &fwcache[i];
00294       break;
00295     } else if(fwcache[i].timer <= oldest) {
00296       fw = &fwcache[i];
00297       oldest = fwcache[i].timer;
00298     }
00299   }
00300
00301   fw->timer = FW_TIME;
00302   fw->ipid = BUF->ipid;
00303   fw->srcipaddr[0] = BUF->srcipaddr[0];
00304   fw->srcipaddr[1] = BUF->srcipaddr[1];
00305   fw->destipaddr[0] = BUF->destipaddr[0];
00306   fw->destipaddr[1] = BUF->destipaddr[1];
00307   fw->proto = BUF->proto;
00308 #if notdef
00309   fw->payload[0] = BUF->srcport;
00310   fw->payload[1] = BUF->destport;
00311 #endif
00312 #if UIP_REASSEMBLY > 0
00313   fw->len = BUF->len;
00314   fw->offset = BUF->ipoffset;
00315 #endif
00316 }
00317 /*------------------------------------------------------------------------------*/
00322 /*------------------------------------------------------------------------------*/
00323 static struct uip_fw_netif *
00324 find_netif(void)
00325 {
00326   struct uip_fw_netif *netif;
00327
00328   /* Walk through every network interface to check for a match. */
00329   for(netif = netifs; netif != NULL; netif = netif->next) {
00330     if(ipaddr_maskcmp(BUF->destipaddr, netif->ipaddr,
00331                       netif->netmask)) {
00332       /* If there was a match, we break the loop. */
00333       return netif;
00334     }
00335   }
00336
00337   /* If no matching netif was found, we use default netif. */
00338   return defaultnetif;
00339 }
00340 /*------------------------------------------------------------------------------*/
00356 /*------------------------------------------------------------------------------*/
00357 u8_t
00358 uip_fw_output(void)
00359 {
00360   struct uip_fw_netif *netif;
00361
00362   if(uip_len == 0) {
00363     return UIP_FW_ZEROLEN;
00364   }
00365
00366   fwcache_register();
00367
00368 #if UIP_BROADCAST
00369   /* Link local broadcasts go out on all interfaces. */
00370   if(/*BUF->proto == UIP_PROTO_UDP &&*/
00371      BUF->destipaddr[0] == 0xffff &&
00372      BUF->destipaddr[1] == 0xffff) {
00373     if(defaultnetif != NULL) {
00374       defaultnetif->output();
00375     }
00376     for(netif = netifs; netif != NULL; netif = netif->next) {
00377       netif->output();
00378     }
00379     return UIP_FW_OK;
00380   }
00381 #endif /* UIP_BROADCAST */
00382
00383   netif = find_netif();
00384   /*  printf("uip_fw_output: netif %p ->output %p len %d\n", netif,
00385          netif->output,
00386          uip_len);*/
00387
00388   if(netif == NULL) {
00389     return UIP_FW_NOROUTE;
00390   }
00391   /* If we now have found a suitable network interface, we call its
00392      output function to send out the packet. */
00393   return netif->output();
00394 }
00395 /*------------------------------------------------------------------------------*/
00404 /*------------------------------------------------------------------------------*/
00405 u8_t
00406 uip_fw_forward(void)
00407 {
00408   struct fwcache_entry *fw;
00409
00410   /* First check if the packet is destined for ourselves and return 0
00411      to indicate that the packet should be processed locally. */
00412   if(BUF->destipaddr[0] == uip_hostaddr[0] &&
00413      BUF->destipaddr[1] == uip_hostaddr[1]) {
00414     return UIP_FW_LOCAL;
00415   }
00416
00417   /* If we use ping IP address configuration, and our IP address is
00418      not yet configured, we should intercept all ICMP echo packets. */
00419 #if UIP_PINGADDRCONF
00420   if((uip_hostaddr[0] | uip_hostaddr[1]) == 0 &&
00421      BUF->proto == UIP_PROTO_ICMP &&
00422      ICMPBUF->type == ICMP_ECHO) {
00423     return UIP_FW_LOCAL;
00424   }
00425 #endif /* UIP_PINGADDRCONF */
00426
00427   /* Check if the packet is in the forwarding cache already, and if so
00428      we drop it. */
00429
00430   for(fw = fwcache; fw < &fwcache[FWCACHE_SIZE]; ++fw) {
00431     if(fw->timer != 0 &&
00432 #if UIP_REASSEMBLY > 0
00433        fw->len == BUF->len &&
00434        fw->offset == BUF->ipoffset &&
00435 #endif
00436        fw->ipid == BUF->ipid &&
00437        fw->srcipaddr[0] == BUF->srcipaddr[0] &&
00438        fw->srcipaddr[1] == BUF->srcipaddr[1] &&
00439        fw->destipaddr[0] == BUF->destipaddr[0] &&
00440        fw->destipaddr[1] == BUF->destipaddr[1] &&
00441 #if notdef
00442        fw->payload[0] == BUF->srcport &&
00443        fw->payload[1] == BUF->destport &&
00444 #endif
00445        fw->proto == BUF->proto) {
00446       /* Drop packet. */
00447       return UIP_FW_FORWARDED;
00448     }
00449   }
00450
00451   /* If the TTL reaches zero we produce an ICMP time exceeded message
00452      in the uip_buf buffer and forward that packet back to the sender
00453      of the packet. */
00454   if(BUF->ttl <= 1) {
00455     /* No time exceeded for broadcasts and multicasts! */
00456     if(BUF->destipaddr[0] == 0xffff && BUF->destipaddr[1] == 0xffff) {
00457       return UIP_FW_LOCAL;
00458     }
00459     time_exceeded();
00460   }
00461
00462   /* Decrement the TTL (time-to-live) value in the IP header */
00463   BUF->ttl = BUF->ttl - 1;
00464
00465   /* Update the IP checksum. */
00466   if(BUF->ipchksum >= HTONS(0xffff - 0x0100)) {
00467     BUF->ipchksum = BUF->ipchksum + HTONS(0x0100) + 1;
00468   } else {
00469     BUF->ipchksum = BUF->ipchksum + HTONS(0x0100);
00470   }
00471
00472   if(uip_len > 0) {
00473     uip_appdata = &uip_buf[UIP_LLH_LEN + UIP_TCPIP_HLEN];
00474     uip_fw_output();
00475   }
00476
00477 #if UIP_BROADCAST
00478   if(BUF->destipaddr[0] == 0xffff && BUF->destipaddr[1] == 0xffff) {
00479     return UIP_FW_LOCAL;
00480   }
00481 #endif /* UIP_BROADCAST */
00482
00483   /* Return non-zero to indicate that the packet was forwarded and that no
00484      other processing should be made. */
00485   return UIP_FW_FORWARDED;
00486 }
00487 /*------------------------------------------------------------------------------*/
00494 /*------------------------------------------------------------------------------*/
00495 void
00496 uip_fw_register(struct uip_fw_netif *netif)
00497 {
00498   netif->next = netifs;
00499   netifs = netif;
00500 }
00501 /*------------------------------------------------------------------------------*/
00511 /*------------------------------------------------------------------------------*/
00512 void
00513 uip_fw_default(struct uip_fw_netif *netif)
00514 {
00515   defaultnetif = netif;
00516 }
00517 /*------------------------------------------------------------------------------*/
00521 /*------------------------------------------------------------------------------*/
00522 void
00523 uip_fw_periodic(void)
00524 {
00525   struct fwcache_entry *fw;
00526   for(fw = fwcache; fw < &fwcache[FWCACHE_SIZE]; ++fw) {
00527     if(fw->timer > 0) {
00528       --fw->timer;
00529     }
00530   }
00531 }
00532 /*------------------------------------------------------------------------------*/
Generated on Tue Jun 7 14:59:00 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/uip/uip-fw.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/uip/uip-fw.h

Go to the documentation of this file.
00001
00012 /*
00013  * Copyright (c) 2004, Swedish Institute of Computer Science.
00014  * All rights reserved.
00015  *
00016  * Redistribution and use in source and binary forms, with or without
00017  * modification, are permitted provided that the following conditions
00018  * are met:
00019  * 1. Redistributions of source code must retain the above copyright
00020  *    notice, this list of conditions and the following disclaimer.
00021  * 2. Redistributions in binary form must reproduce the above copyright
00022  *    notice, this list of conditions and the following disclaimer in the
00023  *    documentation and/or other materials provided with the distribution.
00024  * 3. Neither the name of the Institute nor the names of its contributors
00025  *    may be used to endorse or promote products derived from this software
00026  *    without specific prior written permission.
00027  *
00028  * THIS SOFTWARE IS PROVIDED BY THE INSTITUTE AND CONTRIBUTORS ``AS IS'' AND
00029  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
00030  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
00031  * ARE DISCLAIMED.  IN NO EVENT SHALL THE INSTITUTE OR CONTRIBUTORS BE LIABLE
00032  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
00033  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
00034  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
00035  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
00036  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
00037  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
00038  * SUCH DAMAGE.
00039  *
00040  * This file is part of the uIP TCP/IP stack
00041  *
00042  * Author: Adam Dunkels <adam@sics.se>
00043  *
00044  * $Id: uip-fw.h,v 1.2 2006/06/12 08:00:30 adam Exp $
00045  */
00046 #ifndef __UIP_FW_H__
00047 #define __UIP_FW_H__
00048
00049 #include "uip.h"
00050
00054 struct uip_fw_netif {
00055   struct uip_fw_netif *next;
00057   u16_t ipaddr[2];
00058   u16_t netmask[2];
00059   u8_t (* output)(void);
00062 };
00063
00080 #define UIP_FW_NETIF(ip1,ip2,ip3,ip4, nm1,nm2,nm3,nm4, outputfunc) \
00081         NULL, \
00082         {HTONS((ip1 << 8) | ip2), HTONS((ip3 << 8) | ip4)}, \
00083         {HTONS((nm1 << 8) | nm2), HTONS((nm3 << 8) | nm4)}, \
00084         outputfunc
00085
00095 #define uip_fw_setipaddr(netif, addr) \
00096         do { (netif)->ipaddr[0] = ((u16_t *)(addr))[0]; \
00097              (netif)->ipaddr[1] = ((u16_t *)(addr))[1]; } while(0)
00098
00107 #define uip_fw_setnetmask(netif, addr) \
00108         do { (netif)->netmask[0] = ((u16_t *)(addr))[0]; \
00109              (netif)->netmask[1] = ((u16_t *)(addr))[1]; } while(0)
00110
00111 void uip_fw_init(void);
00112 u8_t uip_fw_forward(void);
00113 u8_t uip_fw_output(void);
00114 void uip_fw_register(struct uip_fw_netif *netif);
00115 void uip_fw_default(struct uip_fw_netif *netif);
00116 void uip_fw_periodic(void);
00117
00118
00125 #define UIP_FW_LOCAL     0
00126
00132 #define UIP_FW_OK        0
00133
00139 #define UIP_FW_FORWARDED 1
00140
00147 #define UIP_FW_ZEROLEN   2
00148
00155 #define UIP_FW_TOOLARGE  3
00156
00163 #define UIP_FW_NOROUTE   4
00164
00171 #define UIP_FW_DROPPED   5
00172
00173
00174 #endif /* __UIP_FW_H__ */
00175
Generated on Tue Jun 7 14:59:00 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/uip/uip-neighbor.c Source File

C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/uip/uip-neighbor.c

Go to the documentation of this file.
00001 /*
00002  * Copyright (c) 2006, Swedish Institute of Computer Science.
00003  * All rights reserved.
00004  *
00005  * Redistribution and use in source and binary forms, with or without
00006  * modification, are permitted provided that the following conditions
00007  * are met:
00008  * 1. Redistributions of source code must retain the above copyright
00009  *    notice, this list of conditions and the following disclaimer.
00010  * 2. Redistributions in binary form must reproduce the above copyright
00011  *    notice, this list of conditions and the following disclaimer in the
00012  *    documentation and/or other materials provided with the distribution.
00013  * 3. Neither the name of the Institute nor the names of its contributors
00014  *    may be used to endorse or promote products derived from this software
00015  *    without specific prior written permission.
00016  *
00017  * THIS SOFTWARE IS PROVIDED BY THE INSTITUTE AND CONTRIBUTORS ``AS IS'' AND
00018  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
00019  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
00020  * ARE DISCLAIMED.  IN NO EVENT SHALL THE INSTITUTE OR CONTRIBUTORS BE LIABLE
00021  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
00022  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
00023  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
00024  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
00025  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
00026  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
00027  * SUCH DAMAGE.
00028  *
00029  * This file is part of the uIP TCP/IP stack
00030  *
00031  * $Id: uip-neighbor.c,v 1.2 2006/06/12 08:00:30 adam Exp $
00032  */
00033
00042 #include "uip-neighbor.h"
00043
00044 #include <string.h>
00045 #include <stdio.h>
00046
00047 #define MAX_TIME 128
00048
00049 #ifdef UIP_NEIGHBOR_CONF_ENTRIES
00050 #define ENTRIES UIP_NEIGHBOR_CONF_ENTRIES
00051 #else /* UIP_NEIGHBOR_CONF_ENTRIES */
00052 #define ENTRIES 8
00053 #endif /* UIP_NEIGHBOR_CONF_ENTRIES */
00054
00055 struct neighbor_entry {
00056   uip_ipaddr_t ipaddr;
00057   struct uip_neighbor_addr addr;
00058   u8_t time;
00059 };
00060 static struct neighbor_entry entries[ENTRIES];
00061
00062 /*---------------------------------------------------------------------------*/
00063 void
00064 uip_neighbor_init(void)
00065 {
00066   int i;
00067
00068   for(i = 0; i < ENTRIES; ++i) {
00069     entries[i].time = MAX_TIME;
00070   }
00071 }
00072 /*---------------------------------------------------------------------------*/
00073 void
00074 uip_neighbor_periodic(void)
00075 {
00076   int i;
00077
00078   for(i = 0; i < ENTRIES; ++i) {
00079     if(entries[i].time < MAX_TIME) {
00080       entries[i].time++;
00081     }
00082   }
00083 }
00084 /*---------------------------------------------------------------------------*/
00085 void
00086 uip_neighbor_add(uip_ipaddr_t ipaddr, struct uip_neighbor_addr *addr)
00087 {
00088   int i, oldest;
00089   u8_t oldest_time;
00090
00091   printf("Adding neighbor with link address %02x:%02x:%02x:%02x:%02x:%02x\n",
00092          addr->addr.addr[0], addr->addr.addr[1], addr->addr.addr[2], addr->addr.addr[3],
00093          addr->addr.addr[4], addr->addr.addr[5]);
00094
00095   /* Find the first unused entry or the oldest used entry. */
00096   oldest_time = 0;
00097   oldest = 0;
00098   for(i = 0; i < ENTRIES; ++i) {
00099     if(entries[i].time == MAX_TIME) {
00100       oldest = i;
00101       break;
00102     }
00103     if(uip_ipaddr_cmp(entries[i].ipaddr, addr)) {
00104       oldest = i;
00105       break;
00106     }
00107     if(entries[i].time > oldest_time) {
00108       oldest = i;
00109       oldest_time = entries[i].time;
00110     }
00111   }
00112
00113   /* Use the oldest or first free entry (either pointed to by the
00114      "oldest" variable). */
00115   entries[oldest].time = 0;
00116   uip_ipaddr_copy(entries[oldest].ipaddr, ipaddr);
00117   memcpy(&entries[oldest].addr, addr, sizeof(struct uip_neighbor_addr));
00118 }
00119 /*---------------------------------------------------------------------------*/
00120 static struct neighbor_entry *
00121 find_entry(uip_ipaddr_t ipaddr)
00122 {
00123   int i;
00124
00125   for(i = 0; i < ENTRIES; ++i) {
00126     if(uip_ipaddr_cmp(entries[i].ipaddr, ipaddr)) {
00127       return &entries[i];
00128     }
00129   }
00130   return NULL;
00131 }
00132 /*---------------------------------------------------------------------------*/
00133 void
00134 uip_neighbor_update(uip_ipaddr_t ipaddr)
00135 {
00136   struct neighbor_entry *e;
00137
00138   e = find_entry(ipaddr);
00139   if(e != NULL) {
00140     e->time = 0;
00141   }
00142 }
00143 /*---------------------------------------------------------------------------*/
00144 struct uip_neighbor_addr *
00145 uip_neighbor_lookup(uip_ipaddr_t ipaddr)
00146 {
00147   struct neighbor_entry *e;
00148
00149   e = find_entry(ipaddr);
00150   if(e != NULL) {
00151     /*    printf("Lookup neighbor with link address %02x:%02x:%02x:%02x:%02x:%02x\n",
00152            e->addr.addr.addr[0], e->addr.addr.addr[1], e->addr.addr.addr[2], e->addr.addr.addr[3],
00153            e->addr.addr.addr[4], e->addr.addr.addr[5]);*/
00154
00155     return &e->addr;
00156   }
00157   return NULL;
00158 }
00159 /*---------------------------------------------------------------------------*/
Generated on Tue Jun 7 14:59:00 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/uip/uip-neighbor.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/uip/uip-neighbor.h

Go to the documentation of this file.
00001 /*
00002  * Copyright (c) 2006, Swedish Institute of Computer Science.
00003  * All rights reserved.
00004  *
00005  * Redistribution and use in source and binary forms, with or without
00006  * modification, are permitted provided that the following conditions
00007  * are met:
00008  * 1. Redistributions of source code must retain the above copyright
00009  *    notice, this list of conditions and the following disclaimer.
00010  * 2. Redistributions in binary form must reproduce the above copyright
00011  *    notice, this list of conditions and the following disclaimer in the
00012  *    documentation and/or other materials provided with the distribution.
00013  * 3. Neither the name of the Institute nor the names of its contributors
00014  *    may be used to endorse or promote products derived from this software
00015  *    without specific prior written permission.
00016  *
00017  * THIS SOFTWARE IS PROVIDED BY THE INSTITUTE AND CONTRIBUTORS ``AS IS'' AND
00018  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
00019  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
00020  * ARE DISCLAIMED.  IN NO EVENT SHALL THE INSTITUTE OR CONTRIBUTORS BE LIABLE
00021  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
00022  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
00023  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
00024  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
00025  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
00026  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
00027  * SUCH DAMAGE.
00028  *
00029  * This file is part of the uIP TCP/IP stack
00030  *
00031  * $Id: uip-neighbor.h,v 1.2 2006/06/12 08:00:30 adam Exp $
00032  */
00033
00042 #ifndef __UIP_NEIGHBOR_H__
00043 #define __UIP_NEIGHBOR_H__
00044
00045 #include "uip.h"
00046
00047 struct uip_neighbor_addr {
00048 #if UIP_NEIGHBOR_CONF_ADDRTYPE
00049   UIP_NEIGHBOR_CONF_ADDRTYPE addr;
00050 #else
00051   struct uip_eth_addr addr;
00052 #endif
00053 };
00054
00055 void uip_neighbor_init(void);
00056 void uip_neighbor_add(uip_ipaddr_t ipaddr, struct uip_neighbor_addr *addr);
00057 void uip_neighbor_update(uip_ipaddr_t ipaddr);
00058 struct uip_neighbor_addr *uip_neighbor_lookup(uip_ipaddr_t ipaddr);
00059 void uip_neighbor_periodic(void);
00060
00061 #endif /* __UIP-NEIGHBOR_H__ */
Generated on Tue Jun 7 14:59:00 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/uip/uip-split.c Source File

C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/uip/uip-split.c

Go to the documentation of this file.
00001 /*
00002  * Copyright (c) 2004, Swedish Institute of Computer Science.
00003  * All rights reserved.
00004  *
00005  * Redistribution and use in source and binary forms, with or without
00006  * modification, are permitted provided that the following conditions
00007  * are met:
00008  * 1. Redistributions of source code must retain the above copyright
00009  *    notice, this list of conditions and the following disclaimer.
00010  * 2. Redistributions in binary form must reproduce the above copyright
00011  *    notice, this list of conditions and the following disclaimer in the
00012  *    documentation and/or other materials provided with the distribution.
00013  * 3. Neither the name of the Institute nor the names of its contributors
00014  *    may be used to endorse or promote products derived from this software
00015  *    without specific prior written permission.
00016  *
00017  * THIS SOFTWARE IS PROVIDED BY THE INSTITUTE AND CONTRIBUTORS ``AS IS'' AND
00018  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
00019  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
00020  * ARE DISCLAIMED.  IN NO EVENT SHALL THE INSTITUTE OR CONTRIBUTORS BE LIABLE
00021  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
00022  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
00023  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
00024  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
00025  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
00026  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
00027  * SUCH DAMAGE.
00028  *
00029  * This file is part of the uIP TCP/IP stack
00030  *
00031  * Author: Adam Dunkels <adam@sics.se>
00032  *
00033  * $Id: uip-split.c,v 1.2 2006/06/12 08:00:30 adam Exp $
00034  */
00035
00036 #include <string.h>
00037
00038 #include "uip-split.h"
00039 #include "uip.h"
00040 #include "uip-fw.h"
00041 #include "uip_arch.h"
00042
00043
00044
00045 #define BUF ((struct uip_tcpip_hdr *)&uip_buf[UIP_LLH_LEN])
00046
00047 /*-----------------------------------------------------------------------------*/
00048 void
00049 uip_split_output(void)
00050 {
00051   u16_t tcplen, len1, len2;
00052
00053   /* We only try to split maximum sized TCP segments. */
00054   if(BUF->proto == UIP_PROTO_TCP &&
00055      uip_len == UIP_BUFSIZE - UIP_LLH_LEN) {
00056
00057     tcplen = uip_len - UIP_TCPIP_HLEN;
00058     /* Split the segment in two. If the original packet length was
00059        odd, we make the second packet one byte larger. */
00060     len1 = len2 = tcplen / 2;
00061     if(len1 + len2 < tcplen) {
00062       ++len2;
00063     }
00064
00065     /* Create the first packet. This is done by altering the length
00066        field of the IP header and updating the checksums. */
00067     uip_len = len1 + UIP_TCPIP_HLEN;
00068 #if UIP_CONF_IPV6
00069     /* For IPv6, the IP length field does not include the IPv6 IP header
00070        length. */
00071     BUF->len[0] = ((uip_len - UIP_IPH_LEN) >> 8);
00072     BUF->len[1] = ((uip_len - UIP_IPH_LEN) & 0xff);
00073 #else /* UIP_CONF_IPV6 */
00074     BUF->len[0] = uip_len >> 8;
00075     BUF->len[1] = uip_len & 0xff;
00076 #endif /* UIP_CONF_IPV6 */
00077
00078     /* Recalculate the TCP checksum. */
00079     BUF->tcpchksum = 0;
00080     BUF->tcpchksum = ~(uip_tcpchksum());
00081
00082 #if !UIP_CONF_IPV6
00083     /* Recalculate the IP checksum. */
00084     BUF->ipchksum = 0;
00085     BUF->ipchksum = ~(uip_ipchksum());
00086 #endif /* UIP_CONF_IPV6 */
00087
00088     /* Transmit the first packet. */
00089     /*    uip_fw_output();*/
00090     tcpip_output();
00091
00092     /* Now, create the second packet. To do this, it is not enough to
00093        just alter the length field, but we must also update the TCP
00094        sequence number and point the uip_appdata to a new place in
00095        memory. This place is detemined by the length of the first
00096        packet (len1). */
00097     uip_len = len2 + UIP_TCPIP_HLEN;
00098 #if UIP_CONF_IPV6
00099     /* For IPv6, the IP length field does not include the IPv6 IP header
00100        length. */
00101     BUF->len[0] = ((uip_len - UIP_IPH_LEN) >> 8);
00102     BUF->len[1] = ((uip_len - UIP_IPH_LEN) & 0xff);
00103 #else /* UIP_CONF_IPV6 */
00104     BUF->len[0] = uip_len >> 8;
00105     BUF->len[1] = uip_len & 0xff;
00106 #endif /* UIP_CONF_IPV6 */
00107
00108     /*    uip_appdata += len1;*/
00109     memcpy(uip_appdata, (u8_t *)uip_appdata + len1, len2);
00110
00111     uip_add32(BUF->seqno, len1);
00112     BUF->seqno[0] = uip_acc32[0];
00113     BUF->seqno[1] = uip_acc32[1];
00114     BUF->seqno[2] = uip_acc32[2];
00115     BUF->seqno[3] = uip_acc32[3];
00116
00117     /* Recalculate the TCP checksum. */
00118     BUF->tcpchksum = 0;
00119     BUF->tcpchksum = ~(uip_tcpchksum());
00120
00121 #if !UIP_CONF_IPV6
00122     /* Recalculate the IP checksum. */
00123     BUF->ipchksum = 0;
00124     BUF->ipchksum = ~(uip_ipchksum());
00125 #endif /* UIP_CONF_IPV6 */
00126
00127     /* Transmit the second packet. */
00128     /*    uip_fw_output();*/
00129     tcpip_output();
00130   } else {
00131     /*    uip_fw_output();*/
00132     tcpip_output();
00133   }
00134
00135 }
00136 /*-----------------------------------------------------------------------------*/
Generated on Tue Jun 7 14:59:00 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/uip/uip-split.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/uip/uip-split.h

Go to the documentation of this file.
00001 /*
00002  * Copyright (c) 2004, Swedish Institute of Computer Science.
00003  * All rights reserved.
00004  *
00005  * Redistribution and use in source and binary forms, with or without
00006  * modification, are permitted provided that the following conditions
00007  * are met:
00008  * 1. Redistributions of source code must retain the above copyright
00009  *    notice, this list of conditions and the following disclaimer.
00010  * 2. Redistributions in binary form must reproduce the above copyright
00011  *    notice, this list of conditions and the following disclaimer in the
00012  *    documentation and/or other materials provided with the distribution.
00013  * 3. Neither the name of the Institute nor the names of its contributors
00014  *    may be used to endorse or promote products derived from this software
00015  *    without specific prior written permission.
00016  *
00017  * THIS SOFTWARE IS PROVIDED BY THE INSTITUTE AND CONTRIBUTORS ``AS IS'' AND
00018  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
00019  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
00020  * ARE DISCLAIMED.  IN NO EVENT SHALL THE INSTITUTE OR CONTRIBUTORS BE LIABLE
00021  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
00022  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
00023  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
00024  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
00025  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
00026  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
00027  * SUCH DAMAGE.
00028  *
00029  * This file is part of the uIP TCP/IP stack
00030  *
00031  * Author: Adam Dunkels <adam@sics.se>
00032  *
00033  * $Id: uip-split.h,v 1.2 2006/06/12 08:00:30 adam Exp $
00034  */
00072 #ifndef __UIP_SPLIT_H__
00073 #define __UIP_SPLIT_H__
00074
00091 void uip_split_output(void);
00092
00093 #endif /* __UIP_SPLIT_H__ */
00094
Generated on Tue Jun 7 14:59:00 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/uip/uip.c Source File

C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/uip/uip.c

Go to the documentation of this file.
00001 #define DEBUG_PRINTF(...) /*printf(__VA_ARGS__)*/
00002
00029 /*
00030  * Copyright (c) 2001-2003, Adam Dunkels.
00031  * All rights reserved.
00032  *
00033  * Redistribution and use in source and binary forms, with or without
00034  * modification, are permitted provided that the following conditions
00035  * are met:
00036  * 1. Redistributions of source code must retain the above copyright
00037  *    notice, this list of conditions and the following disclaimer.
00038  * 2. Redistributions in binary form must reproduce the above copyright
00039  *    notice, this list of conditions and the following disclaimer in the
00040  *    documentation and/or other materials provided with the distribution.
00041  * 3. The name of the author may not be used to endorse or promote
00042  *    products derived from this software without specific prior
00043  *    written permission.
00044  *
00045  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS
00046  * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
00047  * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
00048  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
00049  * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
00050  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
00051  * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
00052  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
00053  * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
00054  * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
00055  * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
00056  *
00057  * This file is part of the uIP TCP/IP stack.
00058  *
00059  * $Id: uip.c,v 1.65 2006/06/11 21:46:39 adam Exp $
00060  *
00061  */
00062
00063 /*
00064  * uIP is a small implementation of the IP, UDP and TCP protocols (as
00065  * well as some basic ICMP stuff). The implementation couples the IP,
00066  * UDP, TCP and the application layers very tightly. To keep the size
00067  * of the compiled code down, this code frequently uses the goto
00068  * statement. While it would be possible to break the uip_process()
00069  * function into many smaller functions, this would increase the code
00070  * size because of the overhead of parameter passing and the fact that
00071  * the optimier would not be as efficient.
00072  *
00073  * The principle is that we have a small buffer, called the uip_buf,
00074  * in which the device driver puts an incoming packet. The TCP/IP
00075  * stack parses the headers in the packet, and calls the
00076  * application. If the remote host has sent data to the application,
00077  * this data is present in the uip_buf and the application read the
00078  * data from there. It is up to the application to put this data into
00079  * a byte stream if needed. The application will not be fed with data
00080  * that is out of sequence.
00081  *
00082  * If the application whishes to send data to the peer, it should put
00083  * its data into the uip_buf. The uip_appdata pointer points to the
00084  * first available byte. The TCP/IP stack will calculate the
00085  * checksums, and fill in the necessary header fields and finally send
00086  * the packet back to the peer.
00087 */
00088
00089 #include "uip.h"
00090 #include "uipopt.h"
00091 #include "uip_arch.h"
00092
00093 #if UIP_CONF_IPV6
00094 #include "uip-neighbor.h"
00095 #endif /* UIP_CONF_IPV6 */
00096
00097 #include <string.h>
00098
00099 /*---------------------------------------------------------------------------*/
00100 /* Variable definitions. */
00101
00102
00103 /* The IP address of this host. If it is defined to be fixed (by
00104    setting UIP_FIXEDADDR to 1 in uipopt.h), the address is set
00105    here. Otherwise, the address */
00106 #if UIP_FIXEDADDR > 0
00107 const uip_ipaddr_t uip_hostaddr =
00108   {HTONS((UIP_IPADDR0 << 8) | UIP_IPADDR1),
00109    HTONS((UIP_IPADDR2 << 8) | UIP_IPADDR3)};
00110 const uip_ipaddr_t uip_draddr =
00111   {HTONS((UIP_DRIPADDR0 << 8) | UIP_DRIPADDR1),
00112    HTONS((UIP_DRIPADDR2 << 8) | UIP_DRIPADDR3)};
00113 const uip_ipaddr_t uip_netmask =
00114   {HTONS((UIP_NETMASK0 << 8) | UIP_NETMASK1),
00115    HTONS((UIP_NETMASK2 << 8) | UIP_NETMASK3)};
00116 #else
00117 uip_ipaddr_t uip_hostaddr, uip_draddr, uip_netmask;
00118 #endif /* UIP_FIXEDADDR */
00119
00120 static const uip_ipaddr_t all_ones_addr =
00121 #if UIP_CONF_IPV6
00122   {0xffff,0xffff,0xffff,0xffff,0xffff,0xffff,0xffff,0xffff};
00123 #else /* UIP_CONF_IPV6 */
00124   {0xffff,0xffff};
00125 #endif /* UIP_CONF_IPV6 */
00126 static const uip_ipaddr_t all_zeroes_addr =
00127 #if UIP_CONF_IPV6
00128   {0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000};
00129 #else /* UIP_CONF_IPV6 */
00130   {0x0000,0x0000};
00131 #endif /* UIP_CONF_IPV6 */
00132
00133 #if UIP_FIXEDETHADDR
00134 const struct uip_eth_addr uip_ethaddr = {{UIP_ETHADDR0,
00135                                           UIP_ETHADDR1,
00136                                           UIP_ETHADDR2,
00137                                           UIP_ETHADDR3,
00138                                           UIP_ETHADDR4,
00139                                           UIP_ETHADDR5}};
00140 #else
00141 struct uip_eth_addr uip_ethaddr = {{0,0,0,0,0,0}};
00142 #endif
00143
00144 #ifndef UIP_CONF_EXTERNAL_BUFFER
00145
00146 #if defined ( __CC_ARM   )
00147         u8_t __align(4) uip_buf[UIP_BUFSIZE + 2]; /* The packet buffer that contains incoming packets. */
00148 #elif defined ( __ICCARM__ )
00149         #pragma data_alignment=4
00150         u8_t uip_buf[UIP_BUFSIZE + 2]; /* The packet buffer that contains incoming packets. */
00151 #elif defined   (  __GNUC__  )
00152         u8_t __attribute__ ((aligned (4))) uip_buf[UIP_BUFSIZE + 2]; /* The packet buffer that contains incoming packets. */
00153 #endif
00154
00155 /*ALIGN_STRUCT_END*/
00156
00157 #endif /* UIP_CONF_EXTERNAL_BUFFER */
00158
00159 void *uip_appdata;               /* The uip_appdata pointer points to
00160                                     application data. */
00161 void *uip_sappdata;              /* The uip_appdata pointer points to
00162                                     the application data which is to
00163                                     be sent. */
00164 #if UIP_URGDATA > 0
00165 void *uip_urgdata;               /* The uip_urgdata pointer points to
00166                                     urgent data (out-of-band data), if
00167                                     present. */
00168 u16_t uip_urglen, uip_surglen;
00169 #endif /* UIP_URGDATA > 0 */
00170
00171 u16_t uip_len, uip_slen;
00172                              /* The uip_len is either 8 or 16 bits,
00173                                 depending on the maximum packet
00174                                 size. */
00175
00176 u8_t uip_flags;     /* The uip_flags variable is used for
00177                                 communication between the TCP/IP stack
00178                                 and the application program. */
00179 struct uip_conn *uip_conn;   /* uip_conn always points to the current
00180                                 connection. */
00181
00182 struct uip_conn uip_conns[UIP_CONNS];
00183                              /* The uip_conns array holds all TCP
00184                                 connections. */
00185 u16_t uip_listenports[UIP_LISTENPORTS];
00186                              /* The uip_listenports list all currently
00187                                 listning ports. */
00188 #if UIP_UDP
00189 struct uip_udp_conn *uip_udp_conn;
00190 struct uip_udp_conn uip_udp_conns[UIP_UDP_CONNS];
00191 #endif /* UIP_UDP */
00192
00193 static u16_t ipid;           /* Ths ipid variable is an increasing
00194                                 number that is used for the IP ID
00195                                 field. */
00196
00197 void uip_setipid(u16_t id) { ipid = id; }
00198
00199 static u8_t iss[4];          /* The iss variable is used for the TCP
00200                                 initial sequence number. */
00201
00202 #if UIP_ACTIVE_OPEN
00203 static u16_t lastport;       /* Keeps track of the last port used for
00204                                 a new connection. */
00205 #endif /* UIP_ACTIVE_OPEN */
00206
00207 /* Temporary variables. */
00208 u8_t uip_acc32[4];
00209 static u8_t c, opt;
00210 static u16_t tmp16;
00211
00212 /* Structures and definitions. */
00213 #define TCP_FIN 0x01
00214 #define TCP_SYN 0x02
00215 #define TCP_RST 0x04
00216 #define TCP_PSH 0x08
00217 #define TCP_ACK 0x10
00218 #define TCP_URG 0x20
00219 #define TCP_CTL 0x3f
00220
00221 #define TCP_OPT_END     0   /* End of TCP options list */
00222 #define TCP_OPT_NOOP    1   /* "No-operation" TCP option */
00223 #define TCP_OPT_MSS     2   /* Maximum segment size TCP option */
00224
00225 #define TCP_OPT_MSS_LEN 4   /* Length of TCP MSS option. */
00226
00227 #define ICMP_ECHO_REPLY 0
00228 #define ICMP_ECHO       8
00229
00230 #define ICMP6_ECHO_REPLY             129
00231 #define ICMP6_ECHO                   128
00232 #define ICMP6_NEIGHBOR_SOLICITATION  135
00233 #define ICMP6_NEIGHBOR_ADVERTISEMENT 136
00234
00235 #define ICMP6_FLAG_S (1 << 6)
00236
00237 #define ICMP6_OPTION_SOURCE_LINK_ADDRESS 1
00238 #define ICMP6_OPTION_TARGET_LINK_ADDRESS 2
00239
00240
00241 /* Macros. */
00242 #define BUF ((struct uip_tcpip_hdr *)&uip_buf[UIP_LLH_LEN])
00243 #define FBUF ((struct uip_tcpip_hdr *)&uip_reassbuf[0])
00244 #define ICMPBUF ((struct uip_icmpip_hdr *)&uip_buf[UIP_LLH_LEN])
00245 #define UDPBUF ((struct uip_udpip_hdr *)&uip_buf[UIP_LLH_LEN])
00246
00247
00248 #if UIP_STATISTICS == 1
00249 struct uip_stats uip_stat;
00250 #define UIP_STAT(s) s
00251 #else
00252 #define UIP_STAT(s)
00253 #endif /* UIP_STATISTICS == 1 */
00254
00255 #if UIP_LOGGING == 1
00256 #include <stdio.h>
00257 void uip_log(char *msg);
00258 #define UIP_LOG(m) uip_log(m)
00259 #else
00260 #define UIP_LOG(m)
00261 #endif /* UIP_LOGGING == 1 */
00262
00263 #if ! UIP_ARCH_ADD32
00264 void
00265 uip_add32(u8_t *op32, u16_t op16)
00266 {
00267   uip_acc32[3] = op32[3] + (op16 & 0xff);
00268   uip_acc32[2] = op32[2] + (op16 >> 8);
00269   uip_acc32[1] = op32[1];
00270   uip_acc32[0] = op32[0];
00271
00272   if(uip_acc32[2] < (op16 >> 8)) {
00273     ++uip_acc32[1];
00274     if(uip_acc32[1] == 0) {
00275       ++uip_acc32[0];
00276     }
00277   }
00278
00279
00280   if(uip_acc32[3] < (op16 & 0xff)) {
00281     ++uip_acc32[2];
00282     if(uip_acc32[2] == 0) {
00283       ++uip_acc32[1];
00284       if(uip_acc32[1] == 0) {
00285         ++uip_acc32[0];
00286       }
00287     }
00288   }
00289 }
00290
00291 #endif /* UIP_ARCH_ADD32 */
00292
00293 #if ! UIP_ARCH_CHKSUM
00294 /*---------------------------------------------------------------------------*/
00295 static u16_t
00296 chksum(u16_t sum, const u8_t *data, u16_t len)
00297 {
00298   u16_t t;
00299   const u8_t *dataptr;
00300   const u8_t *last_byte;
00301
00302   dataptr = data;
00303   last_byte = data + len - 1;
00304
00305   while(dataptr < last_byte) {  /* At least two more bytes */
00306     t = (dataptr[0] << 8) + dataptr[1];
00307     sum += t;
00308     if(sum < t) {
00309       sum++;            /* carry */
00310     }
00311     dataptr += 2;
00312   }
00313
00314   if(dataptr == last_byte) {
00315     t = (dataptr[0] << 8) + 0;
00316     sum += t;
00317     if(sum < t) {
00318       sum++;            /* carry */
00319     }
00320   }
00321
00322   /* Return sum in host byte order. */
00323   return sum;
00324 }
00325 /*---------------------------------------------------------------------------*/
00326 u16_t
00327 uip_chksum(u16_t *data, u16_t len)
00328 {
00329   return htons(chksum(0, (u8_t *)data, len));
00330 }
00331 /*---------------------------------------------------------------------------*/
00332 #ifndef UIP_ARCH_IPCHKSUM
00333 u16_t
00334 uip_ipchksum(void)
00335 {
00336   u16_t sum;
00337
00338   sum = chksum(0, &uip_buf[UIP_LLH_LEN], UIP_IPH_LEN);
00339   DEBUG_PRINTF("uip_ipchksum: sum 0x%04x\n", sum);
00340   return (sum == 0) ? 0xffff : htons(sum);
00341 }
00342 #endif
00343 /*---------------------------------------------------------------------------*/
00344 static u16_t
00345 upper_layer_chksum(u8_t proto)
00346 {
00347   u16_t upper_layer_len;
00348   u16_t sum;
00349
00350 #if UIP_CONF_IPV6
00351   upper_layer_len = (((u16_t)(BUF->len[0]) << 8) + BUF->len[1]);
00352 #else /* UIP_CONF_IPV6 */
00353   upper_layer_len = (((u16_t)(BUF->len[0]) << 8) + BUF->len[1]) - UIP_IPH_LEN;
00354 #endif /* UIP_CONF_IPV6 */
00355
00356   /* First sum pseudoheader. */
00357
00358   /* IP protocol and length fields. This addition cannot carry. */
00359   sum = upper_layer_len + proto;
00360   /* Sum IP source and destination addresses. */
00361   sum = chksum(sum, (u8_t *)&BUF->srcipaddr[0], 2 * sizeof(uip_ipaddr_t));
00362
00363   /* Sum TCP header and data. */
00364   sum = chksum(sum, &uip_buf[UIP_IPH_LEN + UIP_LLH_LEN],
00365                upper_layer_len);
00366
00367   return (sum == 0) ? 0xffff : htons(sum);
00368 }
00369 /*---------------------------------------------------------------------------*/
00370 #if UIP_CONF_IPV6
00371 u16_t
00372 uip_icmp6chksum(void)
00373 {
00374   return upper_layer_chksum(UIP_PROTO_ICMP6);
00375
00376 }
00377 #endif /* UIP_CONF_IPV6 */
00378 /*---------------------------------------------------------------------------*/
00379 u16_t
00380 uip_tcpchksum(void)
00381 {
00382   return upper_layer_chksum(UIP_PROTO_TCP);
00383 }
00384 /*---------------------------------------------------------------------------*/
00385 #if UIP_UDP_CHECKSUMS
00386 u16_t
00387 uip_udpchksum(void)
00388 {
00389   return upper_layer_chksum(UIP_PROTO_UDP);
00390 }
00391 #endif /* UIP_UDP_CHECKSUMS */
00392 #endif /* UIP_ARCH_CHKSUM */
00393 /*---------------------------------------------------------------------------*/
00394 void
00395 uip_init(void)
00396 {
00397   for(c = 0; c < UIP_LISTENPORTS; ++c) {
00398     uip_listenports[c] = 0;
00399   }
00400   for(c = 0; c < UIP_CONNS; ++c) {
00401     uip_conns[c].tcpstateflags = UIP_CLOSED;
00402   }
00403 #if UIP_ACTIVE_OPEN
00404   lastport = 1024;
00405 #endif /* UIP_ACTIVE_OPEN */
00406
00407 #if UIP_UDP
00408   for(c = 0; c < UIP_UDP_CONNS; ++c) {
00409     uip_udp_conns[c].lport = 0;
00410   }
00411 #endif /* UIP_UDP */
00412
00413
00414   /* IPv4 initialization. */
00415 #if UIP_FIXEDADDR == 0
00416   /*  uip_hostaddr[0] = uip_hostaddr[1] = 0;*/
00417 #endif /* UIP_FIXEDADDR */
00418
00419 }
00420 /*---------------------------------------------------------------------------*/
00421 #if UIP_ACTIVE_OPEN
00422 struct uip_conn *
00423 uip_connect(uip_ipaddr_t *ripaddr, u16_t rport)
00424 {
00425   register struct uip_conn *conn, *cconn;
00426
00427   /* Find an unused local port. */
00428  again:
00429   ++lastport;
00430
00431   if(lastport >= 32000) {
00432     lastport = 4096;
00433   }
00434
00435   /* Check if this port is already in use, and if so try to find
00436      another one. */
00437   for(c = 0; c < UIP_CONNS; ++c) {
00438     conn = &uip_conns[c];
00439     if(conn->tcpstateflags != UIP_CLOSED &&
00440        conn->lport == htons(lastport)) {
00441       goto again;
00442     }
00443   }
00444
00445   conn = 0;
00446   for(c = 0; c < UIP_CONNS; ++c) {
00447     cconn = &uip_conns[c];
00448     if(cconn->tcpstateflags == UIP_CLOSED) {
00449       conn = cconn;
00450       break;
00451     }
00452     if(cconn->tcpstateflags == UIP_TIME_WAIT) {
00453       if(conn == 0 ||
00454          cconn->timer > conn->timer) {
00455         conn = cconn;
00456       }
00457     }
00458   }
00459
00460   if(conn == 0) {
00461     return 0;
00462   }
00463
00464   conn->tcpstateflags = UIP_SYN_SENT;
00465
00466   conn->snd_nxt[0] = iss[0];
00467   conn->snd_nxt[1] = iss[1];
00468   conn->snd_nxt[2] = iss[2];
00469   conn->snd_nxt[3] = iss[3];
00470
00471   conn->initialmss = conn->mss = UIP_TCP_MSS;
00472
00473   conn->len = 1;   /* TCP length of the SYN is one. */
00474   conn->nrtx = 0;
00475   conn->timer = 1; /* Send the SYN next time around. */
00476   conn->rto = UIP_RTO;
00477   conn->sa = 0;
00478   conn->sv = 16;   /* Initial value of the RTT variance. */
00479   conn->lport = htons(lastport);
00480   conn->rport = rport;
00481   uip_ipaddr_copy(&conn->ripaddr, ripaddr);
00482
00483   return conn;
00484 }
00485 #endif /* UIP_ACTIVE_OPEN */
00486 /*---------------------------------------------------------------------------*/
00487 #if UIP_UDP
00488 struct uip_udp_conn *
00489 uip_udp_new(uip_ipaddr_t *ripaddr, u16_t rport)
00490 {
00491   register struct uip_udp_conn *conn;
00492
00493   /* Find an unused local port. */
00494  again:
00495   ++lastport;
00496
00497   if(lastport >= 32000) {
00498     lastport = 4096;
00499   }
00500
00501   for(c = 0; c < UIP_UDP_CONNS; ++c) {
00502     if(uip_udp_conns[c].lport == htons(lastport)) {
00503       goto again;
00504     }
00505   }
00506
00507
00508   conn = 0;
00509   for(c = 0; c < UIP_UDP_CONNS; ++c) {
00510     if(uip_udp_conns[c].lport == 0) {
00511       conn = &uip_udp_conns[c];
00512       break;
00513     }
00514   }
00515
00516   if(conn == 0) {
00517     return 0;
00518   }
00519
00520   conn->lport = HTONS(lastport);
00521   conn->rport = rport;
00522   if(ripaddr == NULL) {
00523     memset(conn->ripaddr, 0, sizeof(uip_ipaddr_t));
00524   } else {
00525     uip_ipaddr_copy(&conn->ripaddr, ripaddr);
00526   }
00527   conn->ttl = UIP_TTL;
00528
00529   return conn;
00530 }
00531 #endif /* UIP_UDP */
00532 /*---------------------------------------------------------------------------*/
00533 void
00534 uip_unlisten(u16_t port)
00535 {
00536   for(c = 0; c < UIP_LISTENPORTS; ++c) {
00537     if(uip_listenports[c] == port) {
00538       uip_listenports[c] = 0;
00539       return;
00540     }
00541   }
00542 }
00543 /*---------------------------------------------------------------------------*/
00544 void
00545 uip_listen(u16_t port)
00546 {
00547   for(c = 0; c < UIP_LISTENPORTS; ++c) {
00548     if(uip_listenports[c] == 0) {
00549       uip_listenports[c] = port;
00550       return;
00551     }
00552   }
00553 }
00554 /*---------------------------------------------------------------------------*/
00555 /* XXX: IP fragment reassembly: not well-tested. */
00556
00557 #if UIP_REASSEMBLY && !UIP_CONF_IPV6
00558 #define UIP_REASS_BUFSIZE (UIP_BUFSIZE - UIP_LLH_LEN)
00559 static u8_t uip_reassbuf[UIP_REASS_BUFSIZE];
00560 static u8_t uip_reassbitmap[UIP_REASS_BUFSIZE / (8 * 8)];
00561 static const u8_t bitmap_bits[8] = {0xff, 0x7f, 0x3f, 0x1f,
00562                                     0x0f, 0x07, 0x03, 0x01};
00563 static u16_t uip_reasslen;
00564 static u8_t uip_reassflags;
00565 #define UIP_REASS_FLAG_LASTFRAG 0x01
00566 static u8_t uip_reasstmr;
00567
00568 #define IP_MF   0x20
00569
00570 static u8_t
00571 uip_reass(void)
00572 {
00573   u16_t offset, len;
00574   u16_t i;
00575
00576   /* If ip_reasstmr is zero, no packet is present in the buffer, so we
00577      write the IP header of the fragment into the reassembly
00578      buffer. The timer is updated with the maximum age. */
00579   if(uip_reasstmr == 0) {
00580     memcpy(uip_reassbuf, &BUF->vhl, UIP_IPH_LEN);
00581     uip_reasstmr = UIP_REASS_MAXAGE;
00582     uip_reassflags = 0;
00583     /* Clear the bitmap. */
00584     memset(uip_reassbitmap, 0, sizeof(uip_reassbitmap));
00585   }
00586
00587   /* Check if the incoming fragment matches the one currently present
00588      in the reasembly buffer. If so, we proceed with copying the
00589      fragment into the buffer. */
00590   if(BUF->srcipaddr[0] == FBUF->srcipaddr[0] &&
00591      BUF->srcipaddr[1] == FBUF->srcipaddr[1] &&
00592      BUF->destipaddr[0] == FBUF->destipaddr[0] &&
00593      BUF->destipaddr[1] == FBUF->destipaddr[1] &&
00594      BUF->ipid[0] == FBUF->ipid[0] &&
00595      BUF->ipid[1] == FBUF->ipid[1]) {
00596
00597     len = (BUF->len[0] << 8) + BUF->len[1] - (BUF->vhl & 0x0f) * 4;
00598     offset = (((BUF->ipoffset[0] & 0x3f) << 8) + BUF->ipoffset[1]) * 8;
00599
00600     /* If the offset or the offset + fragment length overflows the
00601        reassembly buffer, we discard the entire packet. */
00602     if(offset > UIP_REASS_BUFSIZE ||
00603        offset + len > UIP_REASS_BUFSIZE) {
00604       uip_reasstmr = 0;
00605       goto nullreturn;
00606     }
00607
00608     /* Copy the fragment into the reassembly buffer, at the right
00609        offset. */
00610     memcpy(&uip_reassbuf[UIP_IPH_LEN + offset],
00611            (char *)BUF + (int)((BUF->vhl & 0x0f) * 4),
00612            len);
00613
00614     /* Update the bitmap. */
00615     if(offset / (8 * 8) == (offset + len) / (8 * 8)) {
00616       /* If the two endpoints are in the same byte, we only update
00617          that byte. */
00618
00619       uip_reassbitmap[offset / (8 * 8)] |=
00620              bitmap_bits[(offset / 8 ) & 7] &
00621              ~bitmap_bits[((offset + len) / 8 ) & 7];
00622     } else {
00623       /* If the two endpoints are in different bytes, we update the
00624          bytes in the endpoints and fill the stuff inbetween with
00625          0xff. */
00626       uip_reassbitmap[offset / (8 * 8)] |=
00627         bitmap_bits[(offset / 8 ) & 7];
00628       for(i = 1 + offset / (8 * 8); i < (offset + len) / (8 * 8); ++i) {
00629         uip_reassbitmap[i] = 0xff;
00630       }
00631       uip_reassbitmap[(offset + len) / (8 * 8)] |=
00632         ~bitmap_bits[((offset + len) / 8 ) & 7];
00633     }
00634
00635     /* If this fragment has the More Fragments flag set to zero, we
00636        know that this is the last fragment, so we can calculate the
00637        size of the entire packet. We also set the
00638        IP_REASS_FLAG_LASTFRAG flag to indicate that we have received
00639        the final fragment. */
00640
00641     if((BUF->ipoffset[0] & IP_MF) == 0) {
00642       uip_reassflags |= UIP_REASS_FLAG_LASTFRAG;
00643       uip_reasslen = offset + len;
00644     }
00645
00646     /* Finally, we check if we have a full packet in the buffer. We do
00647        this by checking if we have the last fragment and if all bits
00648        in the bitmap are set. */
00649     if(uip_reassflags & UIP_REASS_FLAG_LASTFRAG) {
00650       /* Check all bytes up to and including all but the last byte in
00651          the bitmap. */
00652       for(i = 0; i < uip_reasslen / (8 * 8) - 1; ++i) {
00653         if(uip_reassbitmap[i] != 0xff) {
00654           goto nullreturn;
00655         }
00656       }
00657       /* Check the last byte in the bitmap. It should contain just the
00658          right amount of bits. */
00659       if(uip_reassbitmap[uip_reasslen / (8 * 8)] !=
00660          (u8_t)~bitmap_bits[uip_reasslen / 8 & 7]) {
00661         goto nullreturn;
00662       }
00663
00664       /* If we have come this far, we have a full packet in the
00665          buffer, so we allocate a pbuf and copy the packet into it. We
00666          also reset the timer. */
00667       uip_reasstmr = 0;
00668       memcpy(BUF, FBUF, uip_reasslen);
00669
00670       /* Pretend to be a "normal" (i.e., not fragmented) IP packet
00671          from now on. */
00672       BUF->ipoffset[0] = BUF->ipoffset[1] = 0;
00673       BUF->len[0] = uip_reasslen >> 8;
00674       BUF->len[1] = uip_reasslen & 0xff;
00675       BUF->ipchksum = 0;
00676       BUF->ipchksum = ~(uip_ipchksum());
00677
00678       return uip_reasslen;
00679     }
00680   }
00681
00682  nullreturn:
00683   return 0;
00684 }
00685 #endif /* UIP_REASSEMBLY */
00686 /*---------------------------------------------------------------------------*/
00687 static void
00688 uip_add_rcv_nxt(u16_t n)
00689 {
00690   uip_add32(uip_conn->rcv_nxt, n);
00691   uip_conn->rcv_nxt[0] = uip_acc32[0];
00692   uip_conn->rcv_nxt[1] = uip_acc32[1];
00693   uip_conn->rcv_nxt[2] = uip_acc32[2];
00694   uip_conn->rcv_nxt[3] = uip_acc32[3];
00695 }
00696 /*---------------------------------------------------------------------------*/
00697 void
00698 uip_process(u8_t flag)
00699 {
00700   register struct uip_conn *uip_connr = uip_conn;
00701
00702 #if UIP_UDP
00703   if(flag == UIP_UDP_SEND_CONN) {
00704     goto udp_send;
00705   }
00706 #endif /* UIP_UDP */
00707
00708   uip_sappdata = uip_appdata = &uip_buf[UIP_IPTCPH_LEN + UIP_LLH_LEN];
00709
00710   /* Check if we were invoked because of a poll request for a
00711      particular connection. */
00712   if(flag == UIP_POLL_REQUEST) {
00713     if((uip_connr->tcpstateflags & UIP_TS_MASK) == UIP_ESTABLISHED &&
00714        !uip_outstanding(uip_connr)) {
00715         uip_flags = UIP_POLL;
00716         UIP_APPCALL();
00717         goto appsend;
00718     }
00719     goto drop;
00720
00721     /* Check if we were invoked because of the perodic timer fireing. */
00722   } else if(flag == UIP_TIMER) {
00723 #if UIP_REASSEMBLY
00724     if(uip_reasstmr != 0) {
00725       --uip_reasstmr;
00726     }
00727 #endif /* UIP_REASSEMBLY */
00728     /* Increase the initial sequence number. */
00729     if(++iss[3] == 0) {
00730       if(++iss[2] == 0) {
00731         if(++iss[1] == 0) {
00732           ++iss[0];
00733         }
00734       }
00735     }
00736
00737     /* Reset the length variables. */
00738     uip_len = 0;
00739     uip_slen = 0;
00740
00741     /* Check if the connection is in a state in which we simply wait
00742        for the connection to time out. If so, we increase the
00743        connection's timer and remove the connection if it times
00744        out. */
00745     if(uip_connr->tcpstateflags == UIP_TIME_WAIT ||
00746        uip_connr->tcpstateflags == UIP_FIN_WAIT_2) {
00747       ++(uip_connr->timer);
00748       if(uip_connr->timer == UIP_TIME_WAIT_TIMEOUT) {
00749         uip_connr->tcpstateflags = UIP_CLOSED;
00750       }
00751     } else if(uip_connr->tcpstateflags != UIP_CLOSED) {
00752       /* If the connection has outstanding data, we increase the
00753          connection's timer and see if it has reached the RTO value
00754          in which case we retransmit. */
00755       if(uip_outstanding(uip_connr)) {
00756           uip_connr->timer = uip_connr->timer - 1;
00757         if(uip_connr->timer == 0) {
00758           if(uip_connr->nrtx == UIP_MAXRTX ||
00759              ((uip_connr->tcpstateflags == UIP_SYN_SENT ||
00760                uip_connr->tcpstateflags == UIP_SYN_RCVD) &&
00761               uip_connr->nrtx == UIP_MAXSYNRTX)) {
00762             uip_connr->tcpstateflags = UIP_CLOSED;
00763
00764             /* We call UIP_APPCALL() with uip_flags set to
00765                UIP_TIMEDOUT to inform the application that the
00766                connection has timed out. */
00767             uip_flags = UIP_TIMEDOUT;
00768             UIP_APPCALL();
00769
00770             /* We also send a reset packet to the remote host. */
00771             BUF->flags = TCP_RST | TCP_ACK;
00772             goto tcp_send_nodata;
00773           }
00774
00775           /* Exponential backoff. */
00776           uip_connr->timer = UIP_RTO << (uip_connr->nrtx > 4?
00777                                          4:
00778                                          uip_connr->nrtx);
00779           ++(uip_connr->nrtx);
00780
00781           /* Ok, so we need to retransmit. We do this differently
00782              depending on which state we are in. In ESTABLISHED, we
00783              call upon the application so that it may prepare the
00784              data for the retransmit. In SYN_RCVD, we resend the
00785              SYNACK that we sent earlier and in LAST_ACK we have to
00786              retransmit our FINACK. */
00787           UIP_STAT(++uip_stat.tcp.rexmit);
00788           switch(uip_connr->tcpstateflags & UIP_TS_MASK) {
00789           case UIP_SYN_RCVD:
00790             /* In the SYN_RCVD state, we should retransmit our
00791                SYNACK. */
00792             goto tcp_send_synack;
00793
00794 #if UIP_ACTIVE_OPEN
00795           case UIP_SYN_SENT:
00796             /* In the SYN_SENT state, we retransmit out SYN. */
00797             BUF->flags = 0;
00798             goto tcp_send_syn;
00799 #endif /* UIP_ACTIVE_OPEN */
00800
00801           case UIP_ESTABLISHED:
00802             /* In the ESTABLISHED state, we call upon the application
00803                to do the actual retransmit after which we jump into
00804                the code for sending out the packet (the apprexmit
00805                label). */
00806             uip_flags = UIP_REXMIT;
00807             UIP_APPCALL();
00808             goto apprexmit;
00809
00810           case UIP_FIN_WAIT_1:
00811           case UIP_CLOSING:
00812           case UIP_LAST_ACK:
00813             /* In all these states we should retransmit a FINACK. */
00814             goto tcp_send_finack;
00815
00816           }
00817         }
00818       } else if((uip_connr->tcpstateflags & UIP_TS_MASK) == UIP_ESTABLISHED) {
00819         /* If there was no need for a retransmission, we poll the
00820            application for new data. */
00821         uip_flags = UIP_POLL;
00822         UIP_APPCALL();
00823         goto appsend;
00824       }
00825     }
00826     goto drop;
00827   }
00828 #if UIP_UDP
00829   if(flag == UIP_UDP_TIMER) {
00830     if(uip_udp_conn->lport != 0) {
00831       uip_conn = NULL;
00832       uip_sappdata = uip_appdata = &uip_buf[UIP_LLH_LEN + UIP_IPUDPH_LEN];
00833       uip_len = uip_slen = 0;
00834       uip_flags = UIP_POLL;
00835       UIP_UDP_APPCALL();
00836       goto udp_send;
00837     } else {
00838       goto drop;
00839     }
00840   }
00841 #endif
00842
00843   /* This is where the input processing starts. */
00844   UIP_STAT(++uip_stat.ip.recv);
00845
00846   /* Start of IP input header processing code. */
00847
00848 #if UIP_CONF_IPV6
00849   /* Check validity of the IP header. */
00850   if((BUF->vtc & 0xf0) != 0x60)  { /* IP version and header length. */
00851     UIP_STAT(++uip_stat.ip.drop);
00852     UIP_STAT(++uip_stat.ip.vhlerr);
00853     UIP_LOG("ipv6: invalid version.");
00854     goto drop;
00855   }
00856 #else /* UIP_CONF_IPV6 */
00857   /* Check validity of the IP header. */
00858   if(BUF->vhl != 0x45)  { /* IP version and header length. */
00859     UIP_STAT(++uip_stat.ip.drop);
00860     UIP_STAT(++uip_stat.ip.vhlerr);
00861     UIP_LOG("ip: invalid version or header length.");
00862     goto drop;
00863   }
00864 #endif /* UIP_CONF_IPV6 */
00865
00866   /* Check the size of the packet. If the size reported to us in
00867      uip_len is smaller the size reported in the IP header, we assume
00868      that the packet has been corrupted in transit. If the size of
00869      uip_len is larger than the size reported in the IP packet header,
00870      the packet has been padded and we set uip_len to the correct
00871      value.. */
00872
00873   if((BUF->len[0] << 8) + BUF->len[1] <= uip_len) {
00874     uip_len = (BUF->len[0] << 8) + BUF->len[1];
00875 #if UIP_CONF_IPV6
00876     uip_len += 40; /* The length reported in the IPv6 header is the
00877                       length of the payload that follows the
00878                       header. However, uIP uses the uip_len variable
00879                       for holding the size of the entire packet,
00880                       including the IP header. For IPv4 this is not a
00881                       problem as the length field in the IPv4 header
00882                       contains the length of the entire packet. But
00883                       for IPv6 we need to add the size of the IPv6
00884                       header (40 bytes). */
00885 #endif /* UIP_CONF_IPV6 */
00886   } else {
00887     UIP_LOG("ip: packet shorter than reported in IP header.");
00888     goto drop;
00889   }
00890
00891 #if !UIP_CONF_IPV6
00892   /* Check the fragment flag. */
00893   if((BUF->ipoffset[0] & 0x3f) != 0 ||
00894      BUF->ipoffset[1] != 0) {
00895 #if UIP_REASSEMBLY
00896     uip_len = uip_reass();
00897     if(uip_len == 0) {
00898       goto drop;
00899     }
00900 #else /* UIP_REASSEMBLY */
00901     UIP_STAT(++uip_stat.ip.drop);
00902     UIP_STAT(++uip_stat.ip.fragerr);
00903     UIP_LOG("ip: fragment dropped.");
00904     goto drop;
00905 #endif /* UIP_REASSEMBLY */
00906   }
00907 #endif /* UIP_CONF_IPV6 */
00908
00909   if(uip_ipaddr_cmp(uip_hostaddr, all_zeroes_addr)) {
00910     /* If we are configured to use ping IP address configuration and
00911        hasn't been assigned an IP address yet, we accept all ICMP
00912        packets. */
00913 #if UIP_PINGADDRCONF && !UIP_CONF_IPV6
00914     if(BUF->proto == UIP_PROTO_ICMP) {
00915       UIP_LOG("ip: possible ping config packet received.");
00916       goto icmp_input;
00917     } else {
00918       UIP_LOG("ip: packet dropped since no address assigned.");
00919       goto drop;
00920     }
00921 #endif /* UIP_PINGADDRCONF */
00922
00923   } else {
00924     /* If IP broadcast support is configured, we check for a broadcast
00925        UDP packet, which may be destined to us. */
00926 #if UIP_BROADCAST
00927     DEBUG_PRINTF("UDP IP checksum 0x%04x\n", uip_ipchksum());
00928     if(BUF->proto == UIP_PROTO_UDP &&
00929        uip_ipaddr_cmp(BUF->destipaddr, all_ones_addr)
00930        /*&&
00931          uip_ipchksum() == 0xffff*/) {
00932       goto udp_input;
00933     }
00934 #endif /* UIP_BROADCAST */
00935
00936     /* Check if the packet is destined for our IP address. */
00937 #if !UIP_CONF_IPV6
00938     if(!uip_ipaddr_cmp(BUF->destipaddr, uip_hostaddr)) {
00939       UIP_STAT(++uip_stat.ip.drop);
00940       goto drop;
00941     }
00942 #else /* UIP_CONF_IPV6 */
00943     /* For IPv6, packet reception is a little trickier as we need to
00944        make sure that we listen to certain multicast addresses (all
00945        hosts multicast address, and the solicited-node multicast
00946        address) as well. However, we will cheat here and accept all
00947        multicast packets that are sent to the ff02::/16 addresses. */
00948     if(!uip_ipaddr_cmp(BUF->destipaddr, uip_hostaddr) &&
00949        BUF->destipaddr[0] != HTONS(0xff02)) {
00950       UIP_STAT(++uip_stat.ip.drop);
00951       goto drop;
00952     }
00953 #endif /* UIP_CONF_IPV6 */
00954   }
00955
00956 #if !UIP_CONF_IPV6
00957   if(uip_ipchksum() != 0xffff) { /* Compute and check the IP header
00958                                     checksum. */
00959     UIP_STAT(++uip_stat.ip.drop);
00960     UIP_STAT(++uip_stat.ip.chkerr);
00961     UIP_LOG("ip: bad checksum.");
00962     goto drop;
00963   }
00964 #endif /* UIP_CONF_IPV6 */
00965
00966   if(BUF->proto == UIP_PROTO_TCP) { /* Check for TCP packet. If so,
00967                                        proceed with TCP input
00968                                        processing. */
00969     goto tcp_input;
00970   }
00971
00972 #if UIP_UDP
00973   if(BUF->proto == UIP_PROTO_UDP) {
00974     goto udp_input;
00975   }
00976 #endif /* UIP_UDP */
00977
00978 #if !UIP_CONF_IPV6
00979   /* ICMPv4 processing code follows. */
00980   if(BUF->proto != UIP_PROTO_ICMP) { /* We only allow ICMP packets from
00981                                         here. */
00982     UIP_STAT(++uip_stat.ip.drop);
00983     UIP_STAT(++uip_stat.ip.protoerr);
00984     UIP_LOG("ip: neither tcp nor icmp.");
00985     goto drop;
00986   }
00987
00988 #if UIP_PINGADDRCONF
00989  icmp_input:
00990 #endif /* UIP_PINGADDRCONF */
00991   UIP_STAT(++uip_stat.icmp.recv);
00992
00993   /* ICMP echo (i.e., ping) processing. This is simple, we only change
00994      the ICMP type from ECHO to ECHO_REPLY and adjust the ICMP
00995      checksum before we return the packet. */
00996   if(ICMPBUF->type != ICMP_ECHO) {
00997     UIP_STAT(++uip_stat.icmp.drop);
00998     UIP_STAT(++uip_stat.icmp.typeerr);
00999     UIP_LOG("icmp: not icmp echo.");
01000     goto drop;
01001   }
01002
01003   /* If we are configured to use ping IP address assignment, we use
01004      the destination IP address of this ping packet and assign it to
01005      ourself. */
01006 #if UIP_PINGADDRCONF
01007   if((uip_hostaddr[0] | uip_hostaddr[1]) == 0) {
01008     uip_hostaddr[0] = BUF->destipaddr[0];
01009     uip_hostaddr[1] = BUF->destipaddr[1];
01010   }
01011 #endif /* UIP_PINGADDRCONF */
01012
01013   ICMPBUF->type = ICMP_ECHO_REPLY;
01014
01015   if(ICMPBUF->icmpchksum >= HTONS(0xffff - (ICMP_ECHO << 8))) {
01016     ICMPBUF->icmpchksum += HTONS(ICMP_ECHO << 8) + 1;
01017   } else {
01018     ICMPBUF->icmpchksum += HTONS(ICMP_ECHO << 8);
01019   }
01020
01021   /* Swap IP addresses. */
01022   uip_ipaddr_copy(BUF->destipaddr, BUF->srcipaddr);
01023   uip_ipaddr_copy(BUF->srcipaddr, uip_hostaddr);
01024
01025   UIP_STAT(++uip_stat.icmp.sent);
01026   goto send;
01027
01028   /* End of IPv4 input header processing code. */
01029 #else /* !UIP_CONF_IPV6 */
01030
01031   /* This is IPv6 ICMPv6 processing code. */
01032   DEBUG_PRINTF("icmp6_input: length %d\n", uip_len);
01033
01034   if(BUF->proto != UIP_PROTO_ICMP6) { /* We only allow ICMPv6 packets from
01035                                          here. */
01036     UIP_STAT(++uip_stat.ip.drop);
01037     UIP_STAT(++uip_stat.ip.protoerr);
01038     UIP_LOG("ip: neither tcp nor icmp6.");
01039     goto drop;
01040   }
01041
01042   UIP_STAT(++uip_stat.icmp.recv);
01043
01044   /* If we get a neighbor solicitation for our address we should send
01045      a neighbor advertisement message back. */
01046   if(ICMPBUF->type == ICMP6_NEIGHBOR_SOLICITATION) {
01047     if(uip_ipaddr_cmp(ICMPBUF->icmp6data, uip_hostaddr)) {
01048
01049       if(ICMPBUF->options[0] == ICMP6_OPTION_SOURCE_LINK_ADDRESS) {
01050         /* Save the sender's address in our neighbor list. */
01051         uip_neighbor_add(ICMPBUF->srcipaddr, &(ICMPBUF->options[2]));
01052       }
01053
01054       /* We should now send a neighbor advertisement back to where the
01055          neighbor solicication came from. */
01056       ICMPBUF->type = ICMP6_NEIGHBOR_ADVERTISEMENT;
01057       ICMPBUF->flags = ICMP6_FLAG_S; /* Solicited flag. */
01058
01059       ICMPBUF->reserved1 = ICMPBUF->reserved2 = ICMPBUF->reserved3 = 0;
01060
01061       uip_ipaddr_copy(ICMPBUF->destipaddr, ICMPBUF->srcipaddr);
01062       uip_ipaddr_copy(ICMPBUF->srcipaddr, uip_hostaddr);
01063       ICMPBUF->options[0] = ICMP6_OPTION_TARGET_LINK_ADDRESS;
01064       ICMPBUF->options[1] = 1;  /* Options length, 1 = 8 bytes. */
01065       memcpy(&(ICMPBUF->options[2]), &uip_ethaddr, sizeof(uip_ethaddr));
01066       ICMPBUF->icmpchksum = 0;
01067       ICMPBUF->icmpchksum = ~uip_icmp6chksum();
01068       goto send;
01069
01070     }
01071     goto drop;
01072   } else if(ICMPBUF->type == ICMP6_ECHO) {
01073     /* ICMP echo (i.e., ping) processing. This is simple, we only
01074        change the ICMP type from ECHO to ECHO_REPLY and update the
01075        ICMP checksum before we return the packet. */
01076
01077     ICMPBUF->type = ICMP6_ECHO_REPLY;
01078
01079     uip_ipaddr_copy(BUF->destipaddr, BUF->srcipaddr);
01080     uip_ipaddr_copy(BUF->srcipaddr, uip_hostaddr);
01081     ICMPBUF->icmpchksum = 0;
01082     ICMPBUF->icmpchksum = ~uip_icmp6chksum();
01083
01084     UIP_STAT(++uip_stat.icmp.sent);
01085     goto send;
01086   } else {
01087     DEBUG_PRINTF("Unknown icmp6 message type %d\n", ICMPBUF->type);
01088     UIP_STAT(++uip_stat.icmp.drop);
01089     UIP_STAT(++uip_stat.icmp.typeerr);
01090     UIP_LOG("icmp: unknown ICMP message.");
01091     goto drop;
01092   }
01093
01094   /* End of IPv6 ICMP processing. */
01095
01096 #endif /* !UIP_CONF_IPV6 */
01097
01098 #if UIP_UDP
01099   /* UDP input processing. */
01100  udp_input:
01101   /* UDP processing is really just a hack. We don't do anything to the
01102      UDP/IP headers, but let the UDP application do all the hard
01103      work. If the application sets uip_slen, it has a packet to
01104      send. */
01105 #if UIP_UDP_CHECKSUMS
01106   uip_len = uip_len - UIP_IPUDPH_LEN;
01107   uip_appdata = &uip_buf[UIP_LLH_LEN + UIP_IPUDPH_LEN];
01108   if(UDPBUF->udpchksum != 0 && uip_udpchksum() != 0xffff) {
01109     UIP_STAT(++uip_stat.udp.drop);
01110     UIP_STAT(++uip_stat.udp.chkerr);
01111     UIP_LOG("udp: bad checksum.");
01112     goto drop;
01113   }
01114 #else /* UIP_UDP_CHECKSUMS */
01115   uip_len = uip_len - UIP_IPUDPH_LEN;
01116 #endif /* UIP_UDP_CHECKSUMS */
01117
01118   /* Demultiplex this UDP packet between the UDP "connections". */
01119   for(uip_udp_conn = &uip_udp_conns[0];
01120       uip_udp_conn < &uip_udp_conns[UIP_UDP_CONNS];
01121       ++uip_udp_conn) {
01122     /* If the local UDP port is non-zero, the connection is considered
01123        to be used. If so, the local port number is checked against the
01124        destination port number in the received packet. If the two port
01125        numbers match, the remote port number is checked if the
01126        connection is bound to a remote port. Finally, if the
01127        connection is bound to a remote IP address, the source IP
01128        address of the packet is checked. */
01129     if(uip_udp_conn->lport != 0 &&
01130        UDPBUF->destport == uip_udp_conn->lport &&
01131        (uip_udp_conn->rport == 0 ||
01132         UDPBUF->srcport == uip_udp_conn->rport) &&
01133        (uip_ipaddr_cmp(uip_udp_conn->ripaddr, all_zeroes_addr) ||
01134         uip_ipaddr_cmp(uip_udp_conn->ripaddr, all_ones_addr) ||
01135         uip_ipaddr_cmp(BUF->srcipaddr, uip_udp_conn->ripaddr))) {
01136       goto udp_found;
01137     }
01138   }
01139   UIP_LOG("udp: no matching connection found");
01140   goto drop;
01141
01142  udp_found:
01143   UIP_STAT(++uip_stat.udp.recv);
01144   uip_conn = NULL;
01145   uip_flags = UIP_NEWDATA;
01146   uip_sappdata = uip_appdata = &uip_buf[UIP_LLH_LEN + UIP_IPUDPH_LEN];
01147   uip_slen = 0;
01148   UIP_UDP_APPCALL();
01149  udp_send:
01150   if(uip_slen == 0) {
01151     goto drop;
01152   }
01153   uip_len = uip_slen + UIP_IPUDPH_LEN;
01154
01155 #if UIP_CONF_IPV6
01156   /* For IPv6, the IP length field does not include the IPv6 IP header
01157      length. */
01158   BUF->len[0] = ((uip_len - UIP_IPH_LEN) >> 8);
01159   BUF->len[1] = ((uip_len - UIP_IPH_LEN) & 0xff);
01160 #else /* UIP_CONF_IPV6 */
01161   BUF->len[0] = (uip_len >> 8);
01162   BUF->len[1] = (uip_len & 0xff);
01163 #endif /* UIP_CONF_IPV6 */
01164
01165   BUF->ttl = uip_udp_conn->ttl;
01166   BUF->proto = UIP_PROTO_UDP;
01167
01168   UDPBUF->udplen = HTONS(uip_slen + UIP_UDPH_LEN);
01169   UDPBUF->udpchksum = 0;
01170
01171   BUF->srcport  = uip_udp_conn->lport;
01172   BUF->destport = uip_udp_conn->rport;
01173
01174   uip_ipaddr_copy(BUF->srcipaddr, uip_hostaddr);
01175   uip_ipaddr_copy(BUF->destipaddr, uip_udp_conn->ripaddr);
01176
01177   uip_appdata = &uip_buf[UIP_LLH_LEN + UIP_IPTCPH_LEN];
01178
01179 #if UIP_UDP_CHECKSUMS
01180   /* Calculate UDP checksum. */
01181   UDPBUF->udpchksum = ~(uip_udpchksum());
01182   if(UDPBUF->udpchksum == 0) {
01183     UDPBUF->udpchksum = 0xffff;
01184   }
01185 #endif /* UIP_UDP_CHECKSUMS */
01186   UIP_STAT(++uip_stat.udp.sent);
01187   goto ip_send_nolen;
01188 #endif /* UIP_UDP */
01189
01190   /* TCP input processing. */
01191  tcp_input:
01192   UIP_STAT(++uip_stat.tcp.recv);
01193
01194   /* Start of TCP input header processing code. */
01195
01196   if(uip_tcpchksum() != 0xffff) {   /* Compute and check the TCP
01197                                        checksum. */
01198     UIP_STAT(++uip_stat.tcp.drop);
01199     UIP_STAT(++uip_stat.tcp.chkerr);
01200     UIP_LOG("tcp: bad checksum.");
01201     goto drop;
01202   }
01203
01204
01205   /* Demultiplex this segment. */
01206   /* First check any active connections. */
01207   for(uip_connr = &uip_conns[0]; uip_connr <= &uip_conns[UIP_CONNS - 1];
01208       ++uip_connr) {
01209     if(uip_connr->tcpstateflags != UIP_CLOSED &&
01210        BUF->destport == uip_connr->lport &&
01211        BUF->srcport == uip_connr->rport &&
01212        uip_ipaddr_cmp(BUF->srcipaddr, uip_connr->ripaddr)) {
01213       goto found;
01214     }
01215   }
01216
01217   /* If we didn't find and active connection that expected the packet,
01218      either this packet is an old duplicate, or this is a SYN packet
01219      destined for a connection in LISTEN. If the SYN flag isn't set,
01220      it is an old packet and we send a RST. */
01221   if((BUF->flags & TCP_CTL) != TCP_SYN) {
01222     goto reset;
01223   }
01224
01225   tmp16 = BUF->destport;
01226   /* Next, check listening connections. */
01227   for(c = 0; c < UIP_LISTENPORTS; ++c) {
01228     if(tmp16 == uip_listenports[c])
01229       goto found_listen;
01230   }
01231
01232   /* No matching connection found, so we send a RST packet. */
01233   UIP_STAT(++uip_stat.tcp.synrst);
01234  reset:
01235
01236   /* We do not send resets in response to resets. */
01237   if(BUF->flags & TCP_RST) {
01238     goto drop;
01239   }
01240
01241   UIP_STAT(++uip_stat.tcp.rst);
01242
01243   BUF->flags = TCP_RST | TCP_ACK;
01244   uip_len = UIP_IPTCPH_LEN;
01245   BUF->tcpoffset = 5 << 4;
01246
01247   /* Flip the seqno and ackno fields in the TCP header. */
01248   c = BUF->seqno[3];
01249   BUF->seqno[3] = BUF->ackno[3];
01250   BUF->ackno[3] = c;
01251
01252   c = BUF->seqno[2];
01253   BUF->seqno[2] = BUF->ackno[2];
01254   BUF->ackno[2] = c;
01255
01256   c = BUF->seqno[1];
01257   BUF->seqno[1] = BUF->ackno[1];
01258   BUF->ackno[1] = c;
01259
01260   c = BUF->seqno[0];
01261   BUF->seqno[0] = BUF->ackno[0];
01262   BUF->ackno[0] = c;
01263
01264   /* We also have to increase the sequence number we are
01265      acknowledging. If the least significant byte overflowed, we need
01266      to propagate the carry to the other bytes as well. */
01267   if(++BUF->ackno[3] == 0) {
01268     if(++BUF->ackno[2] == 0) {
01269       if(++BUF->ackno[1] == 0) {
01270         ++BUF->ackno[0];
01271       }
01272     }
01273   }
01274
01275   /* Swap port numbers. */
01276   tmp16 = BUF->srcport;
01277   BUF->srcport = BUF->destport;
01278   BUF->destport = tmp16;
01279
01280   /* Swap IP addresses. */
01281   uip_ipaddr_copy(BUF->destipaddr, BUF->srcipaddr);
01282   uip_ipaddr_copy(BUF->srcipaddr, uip_hostaddr);
01283
01284   /* And send out the RST packet! */
01285   goto tcp_send_noconn;
01286
01287   /* This label will be jumped to if we matched the incoming packet
01288      with a connection in LISTEN. In that case, we should create a new
01289      connection and send a SYNACK in return. */
01290  found_listen:
01291   /* First we check if there are any connections avaliable. Unused
01292      connections are kept in the same table as used connections, but
01293      unused ones have the tcpstate set to CLOSED. Also, connections in
01294      TIME_WAIT are kept track of and we'll use the oldest one if no
01295      CLOSED connections are found. Thanks to Eddie C. Dost for a very
01296      nice algorithm for the TIME_WAIT search. */
01297   uip_connr = 0;
01298   for(c = 0; c < UIP_CONNS; ++c) {
01299     if(uip_conns[c].tcpstateflags == UIP_CLOSED) {
01300       uip_connr = &uip_conns[c];
01301       break;
01302     }
01303     if(uip_conns[c].tcpstateflags == UIP_TIME_WAIT) {
01304       if(uip_connr == 0 ||
01305          uip_conns[c].timer > uip_connr->timer) {
01306         uip_connr = &uip_conns[c];
01307       }
01308     }
01309   }
01310
01311   if(uip_connr == 0) {
01312     /* All connections are used already, we drop packet and hope that
01313        the remote end will retransmit the packet at a time when we
01314        have more spare connections. */
01315     UIP_STAT(++uip_stat.tcp.syndrop);
01316     UIP_LOG("tcp: found no unused connections.");
01317     goto drop;
01318   }
01319   uip_conn = uip_connr;
01320
01321   /* Fill in the necessary fields for the new connection. */
01322   uip_connr->rto = uip_connr->timer = UIP_RTO;
01323   uip_connr->sa = 0;
01324   uip_connr->sv = 4;
01325   uip_connr->nrtx = 0;
01326   uip_connr->lport = BUF->destport;
01327   uip_connr->rport = BUF->srcport;
01328   uip_ipaddr_copy(uip_connr->ripaddr, BUF->srcipaddr);
01329   uip_connr->tcpstateflags = UIP_SYN_RCVD;
01330
01331   uip_connr->snd_nxt[0] = iss[0];
01332   uip_connr->snd_nxt[1] = iss[1];
01333   uip_connr->snd_nxt[2] = iss[2];
01334   uip_connr->snd_nxt[3] = iss[3];
01335   uip_connr->len = 1;
01336
01337   /* rcv_nxt should be the seqno from the incoming packet + 1. */
01338   uip_connr->rcv_nxt[3] = BUF->seqno[3];
01339   uip_connr->rcv_nxt[2] = BUF->seqno[2];
01340   uip_connr->rcv_nxt[1] = BUF->seqno[1];
01341   uip_connr->rcv_nxt[0] = BUF->seqno[0];
01342   uip_add_rcv_nxt(1);
01343
01344   /* Parse the TCP MSS option, if present. */
01345   if((BUF->tcpoffset & 0xf0) > 0x50) {
01346     for(c = 0; c < ((BUF->tcpoffset >> 4) - 5) << 2 ;) {
01347       opt = uip_buf[UIP_TCPIP_HLEN + UIP_LLH_LEN + c];
01348       if(opt == TCP_OPT_END) {
01349         /* End of options. */
01350         break;
01351       } else if(opt == TCP_OPT_NOOP) {
01352         ++c;
01353         /* NOP option. */
01354       } else if(opt == TCP_OPT_MSS &&
01355                 uip_buf[UIP_TCPIP_HLEN + UIP_LLH_LEN + 1 + c] == TCP_OPT_MSS_LEN) {
01356         /* An MSS option with the right option length. */
01357         tmp16 = ((u16_t)uip_buf[UIP_TCPIP_HLEN + UIP_LLH_LEN + 2 + c] << 8) |
01358           (u16_t)uip_buf[UIP_IPTCPH_LEN + UIP_LLH_LEN + 3 + c];
01359         uip_connr->initialmss = uip_connr->mss =
01360           tmp16 > UIP_TCP_MSS? UIP_TCP_MSS: tmp16;
01361
01362         /* And we are done processing options. */
01363         break;
01364       } else {
01365         /* All other options have a length field, so that we easily
01366            can skip past them. */
01367         if(uip_buf[UIP_TCPIP_HLEN + UIP_LLH_LEN + 1 + c] == 0) {
01368           /* If the length field is zero, the options are malformed
01369              and we don't process them further. */
01370           break;
01371         }
01372         c += uip_buf[UIP_TCPIP_HLEN + UIP_LLH_LEN + 1 + c];
01373       }
01374     }
01375   }
01376
01377   /* Our response will be a SYNACK. */
01378 #if UIP_ACTIVE_OPEN
01379  tcp_send_synack:
01380   BUF->flags = TCP_ACK;
01381
01382  tcp_send_syn:
01383   BUF->flags |= TCP_SYN;
01384 #else /* UIP_ACTIVE_OPEN */
01385  tcp_send_synack:
01386   BUF->flags = TCP_SYN | TCP_ACK;
01387 #endif /* UIP_ACTIVE_OPEN */
01388
01389   /* We send out the TCP Maximum Segment Size option with our
01390      SYNACK. */
01391   BUF->optdata[0] = TCP_OPT_MSS;
01392   BUF->optdata[1] = TCP_OPT_MSS_LEN;
01393   BUF->optdata[2] = (UIP_TCP_MSS) / 256;
01394   BUF->optdata[3] = (UIP_TCP_MSS) & 255;
01395   uip_len = UIP_IPTCPH_LEN + TCP_OPT_MSS_LEN;
01396   BUF->tcpoffset = ((UIP_TCPH_LEN + TCP_OPT_MSS_LEN) / 4) << 4;
01397   goto tcp_send;
01398
01399   /* This label will be jumped to if we found an active connection. */
01400  found:
01401   uip_conn = uip_connr;
01402   uip_flags = 0;
01403   /* We do a very naive form of TCP reset processing; we just accept
01404      any RST and kill our connection. We should in fact check if the
01405      sequence number of this reset is wihtin our advertised window
01406      before we accept the reset. */
01407   if(BUF->flags & TCP_RST) {
01408     uip_connr->tcpstateflags = UIP_CLOSED;
01409     UIP_LOG("tcp: got reset, aborting connection.");
01410     uip_flags = UIP_ABORT;
01411     UIP_APPCALL();
01412     goto drop;
01413   }
01414   /* Calculated the length of the data, if the application has sent
01415      any data to us. */
01416   c = (BUF->tcpoffset >> 4) << 2;
01417   /* uip_len will contain the length of the actual TCP data. This is
01418      calculated by subtracing the length of the TCP header (in
01419      c) and the length of the IP header (20 bytes). */
01420   uip_len = uip_len - c - UIP_IPH_LEN;
01421
01422   /* First, check if the sequence number of the incoming packet is
01423      what we're expecting next. If not, we send out an ACK with the
01424      correct numbers in. */
01425   if(!(((uip_connr->tcpstateflags & UIP_TS_MASK) == UIP_SYN_SENT) &&
01426        ((BUF->flags & TCP_CTL) == (TCP_SYN | TCP_ACK)))) {
01427     if((uip_len > 0 || ((BUF->flags & (TCP_SYN | TCP_FIN)) != 0)) &&
01428        (BUF->seqno[0] != uip_connr->rcv_nxt[0] ||
01429         BUF->seqno[1] != uip_connr->rcv_nxt[1] ||
01430         BUF->seqno[2] != uip_connr->rcv_nxt[2] ||
01431         BUF->seqno[3] != uip_connr->rcv_nxt[3])) {
01432       goto tcp_send_ack;
01433     }
01434   }
01435
01436   /* Next, check if the incoming segment acknowledges any outstanding
01437      data. If so, we update the sequence number, reset the length of
01438      the outstanding data, calculate RTT estimations, and reset the
01439      retransmission timer. */
01440   if((BUF->flags & TCP_ACK) && uip_outstanding(uip_connr)) {
01441     uip_add32(uip_connr->snd_nxt, uip_connr->len);
01442
01443     if(BUF->ackno[0] == uip_acc32[0] &&
01444        BUF->ackno[1] == uip_acc32[1] &&
01445        BUF->ackno[2] == uip_acc32[2] &&
01446        BUF->ackno[3] == uip_acc32[3]) {
01447       /* Update sequence number. */
01448       uip_connr->snd_nxt[0] = uip_acc32[0];
01449       uip_connr->snd_nxt[1] = uip_acc32[1];
01450       uip_connr->snd_nxt[2] = uip_acc32[2];
01451       uip_connr->snd_nxt[3] = uip_acc32[3];
01452
01453
01454       /* Do RTT estimation, unless we have done retransmissions. */
01455       if(uip_connr->nrtx == 0) {
01456         signed char m;
01457         m = uip_connr->rto - uip_connr->timer;
01458         /* This is taken directly from VJs original code in his paper */
01459         m = m - (uip_connr->sa >> 3);
01460         uip_connr->sa += m;
01461         if(m < 0) {
01462           m = -m;
01463         }
01464         m = m - (uip_connr->sv >> 2);
01465         uip_connr->sv += m;
01466         uip_connr->rto = (uip_connr->sa >> 3) + uip_connr->sv;
01467
01468       }
01469       /* Set the acknowledged flag. */
01470       uip_flags = UIP_ACKDATA;
01471       /* Reset the retransmission timer. */
01472       uip_connr->timer = uip_connr->rto;
01473
01474       /* Reset length of outstanding data. */
01475       uip_connr->len = 0;
01476     }
01477
01478   }
01479
01480   /* Do different things depending on in what state the connection is. */
01481   switch(uip_connr->tcpstateflags & UIP_TS_MASK) {
01482     /* CLOSED and LISTEN are not handled here. CLOSE_WAIT is not
01483         implemented, since we force the application to close when the
01484         peer sends a FIN (hence the application goes directly from
01485         ESTABLISHED to LAST_ACK). */
01486   case UIP_SYN_RCVD:
01487     /* In SYN_RCVD we have sent out a SYNACK in response to a SYN, and
01488        we are waiting for an ACK that acknowledges the data we sent
01489        out the last time. Therefore, we want to have the UIP_ACKDATA
01490        flag set. If so, we enter the ESTABLISHED state. */
01491     if(uip_flags & UIP_ACKDATA) {
01492       uip_connr->tcpstateflags = UIP_ESTABLISHED;
01493       uip_flags = UIP_CONNECTED;
01494       uip_connr->len = 0;
01495       if(uip_len > 0) {
01496         uip_flags |= UIP_NEWDATA;
01497         uip_add_rcv_nxt(uip_len);
01498       }
01499       uip_slen = 0;
01500       UIP_APPCALL();
01501       goto appsend;
01502     }
01503     goto drop;
01504 #if UIP_ACTIVE_OPEN
01505   case UIP_SYN_SENT:
01506     /* In SYN_SENT, we wait for a SYNACK that is sent in response to
01507        our SYN. The rcv_nxt is set to sequence number in the SYNACK
01508        plus one, and we send an ACK. We move into the ESTABLISHED
01509        state. */
01510     if((uip_flags & UIP_ACKDATA) &&
01511        (BUF->flags & TCP_CTL) == (TCP_SYN | TCP_ACK)) {
01512
01513       /* Parse the TCP MSS option, if present. */
01514       if((BUF->tcpoffset & 0xf0) > 0x50) {
01515         for(c = 0; c < ((BUF->tcpoffset >> 4) - 5) << 2 ;) {
01516           opt = uip_buf[UIP_IPTCPH_LEN + UIP_LLH_LEN + c];
01517           if(opt == TCP_OPT_END) {
01518             /* End of options. */
01519             break;
01520           } else if(opt == TCP_OPT_NOOP) {
01521             ++c;
01522             /* NOP option. */
01523           } else if(opt == TCP_OPT_MSS &&
01524                     uip_buf[UIP_TCPIP_HLEN + UIP_LLH_LEN + 1 + c] == TCP_OPT_MSS_LEN) {
01525             /* An MSS option with the right option length. */
01526             tmp16 = (uip_buf[UIP_TCPIP_HLEN + UIP_LLH_LEN + 2 + c] << 8) |
01527               uip_buf[UIP_TCPIP_HLEN + UIP_LLH_LEN + 3 + c];
01528             uip_connr->initialmss =
01529               uip_connr->mss = tmp16 > UIP_TCP_MSS? UIP_TCP_MSS: tmp16;
01530
01531             /* And we are done processing options. */
01532             break;
01533           } else {
01534             /* All other options have a length field, so that we easily
01535                can skip past them. */
01536             if(uip_buf[UIP_TCPIP_HLEN + UIP_LLH_LEN + 1 + c] == 0) {
01537               /* If the length field is zero, the options are malformed
01538                  and we don't process them further. */
01539               break;
01540             }
01541             c += uip_buf[UIP_TCPIP_HLEN + UIP_LLH_LEN + 1 + c];
01542           }
01543         }
01544       }
01545       uip_connr->tcpstateflags = UIP_ESTABLISHED;
01546       uip_connr->rcv_nxt[0] = BUF->seqno[0];
01547       uip_connr->rcv_nxt[1] = BUF->seqno[1];
01548       uip_connr->rcv_nxt[2] = BUF->seqno[2];
01549       uip_connr->rcv_nxt[3] = BUF->seqno[3];
01550       uip_add_rcv_nxt(1);
01551       uip_flags = UIP_CONNECTED | UIP_NEWDATA;
01552       uip_connr->len = 0;
01553       uip_len = 0;
01554       uip_slen = 0;
01555       UIP_APPCALL();
01556       goto appsend;
01557     }
01558     /* Inform the application that the connection failed */
01559     uip_flags = UIP_ABORT;
01560     UIP_APPCALL();
01561     /* The connection is closed after we send the RST */
01562     uip_conn->tcpstateflags = UIP_CLOSED;
01563     goto reset;
01564 #endif /* UIP_ACTIVE_OPEN */
01565
01566   case UIP_ESTABLISHED:
01567     /* In the ESTABLISHED state, we call upon the application to feed
01568     data into the uip_buf. If the UIP_ACKDATA flag is set, the
01569     application should put new data into the buffer, otherwise we are
01570     retransmitting an old segment, and the application should put that
01571     data into the buffer.
01572
01573     If the incoming packet is a FIN, we should close the connection on
01574     this side as well, and we send out a FIN and enter the LAST_ACK
01575     state. We require that there is no outstanding data; otherwise the
01576     sequence numbers will be screwed up. */
01577
01578     if(BUF->flags & TCP_FIN && !(uip_connr->tcpstateflags & UIP_STOPPED)) {
01579       if(uip_outstanding(uip_connr)) {
01580         goto drop;
01581       }
01582       uip_add_rcv_nxt(1 + uip_len);
01583       uip_flags |= UIP_CLOSE;
01584       if(uip_len > 0) {
01585         uip_flags |= UIP_NEWDATA;
01586       }
01587       UIP_APPCALL();
01588       uip_connr->len = 1;
01589       uip_connr->tcpstateflags = UIP_LAST_ACK;
01590       uip_connr->nrtx = 0;
01591     tcp_send_finack:
01592       BUF->flags = TCP_FIN | TCP_ACK;
01593       goto tcp_send_nodata;
01594     }
01595
01596     /* Check the URG flag. If this is set, the segment carries urgent
01597        data that we must pass to the application. */
01598     if((BUF->flags & TCP_URG) != 0) {
01599 #if UIP_URGDATA > 0
01600       uip_urglen = (BUF->urgp[0] << 8) | BUF->urgp[1];
01601       if(uip_urglen > uip_len) {
01602         /* There is more urgent data in the next segment to come. */
01603         uip_urglen = uip_len;
01604       }
01605       uip_add_rcv_nxt(uip_urglen);
01606       uip_len -= uip_urglen;
01607       uip_urgdata = uip_appdata;
01608       uip_appdata += uip_urglen;
01609     } else {
01610       uip_urglen = 0;
01611 #else /* UIP_URGDATA > 0 */
01612       uip_appdata = ((char *)uip_appdata) + ((BUF->urgp[0] << 8) | BUF->urgp[1]);
01613       uip_len -= (BUF->urgp[0] << 8) | BUF->urgp[1];
01614 #endif /* UIP_URGDATA > 0 */
01615     }
01616
01617     /* If uip_len > 0 we have TCP data in the packet, and we flag this
01618        by setting the UIP_NEWDATA flag and update the sequence number
01619        we acknowledge. If the application has stopped the dataflow
01620        using uip_stop(), we must not accept any data packets from the
01621        remote host. */
01622     if(uip_len > 0 && !(uip_connr->tcpstateflags & UIP_STOPPED)) {
01623       uip_flags |= UIP_NEWDATA;
01624       uip_add_rcv_nxt(uip_len);
01625     }
01626
01627     /* Check if the available buffer space advertised by the other end
01628        is smaller than the initial MSS for this connection. If so, we
01629        set the current MSS to the window size to ensure that the
01630        application does not send more data than the other end can
01631        handle.
01632
01633        If the remote host advertises a zero window, we set the MSS to
01634        the initial MSS so that the application will send an entire MSS
01635        of data. This data will not be acknowledged by the receiver,
01636        and the application will retransmit it. This is called the
01637        "persistent timer" and uses the retransmission mechanim.
01638     */
01639     tmp16 = ((u16_t)BUF->wnd[0] << 8) + (u16_t)BUF->wnd[1];
01640     if(tmp16 > uip_connr->initialmss ||
01641        tmp16 == 0) {
01642       tmp16 = uip_connr->initialmss;
01643     }
01644     uip_connr->mss = tmp16;
01645
01646     /* If this packet constitutes an ACK for outstanding data (flagged
01647        by the UIP_ACKDATA flag, we should call the application since it
01648        might want to send more data. If the incoming packet had data
01649        from the peer (as flagged by the UIP_NEWDATA flag), the
01650        application must also be notified.
01651
01652        When the application is called, the global variable uip_len
01653        contains the length of the incoming data. The application can
01654        access the incoming data through the global pointer
01655        uip_appdata, which usually points UIP_IPTCPH_LEN + UIP_LLH_LEN
01656        bytes into the uip_buf array.
01657
01658        If the application wishes to send any data, this data should be
01659        put into the uip_appdata and the length of the data should be
01660        put into uip_len. If the application don't have any data to
01661        send, uip_len must be set to 0. */
01662     if(uip_flags & (UIP_NEWDATA | UIP_ACKDATA)) {
01663       uip_slen = 0;
01664       UIP_APPCALL();
01665
01666     appsend:
01667
01668       if(uip_flags & UIP_ABORT) {
01669         uip_slen = 0;
01670         uip_connr->tcpstateflags = UIP_CLOSED;
01671         BUF->flags = TCP_RST | TCP_ACK;
01672         goto tcp_send_nodata;
01673       }
01674
01675       if(uip_flags & UIP_CLOSE) {
01676         uip_slen = 0;
01677         uip_connr->len = 1;
01678         uip_connr->tcpstateflags = UIP_FIN_WAIT_1;
01679         uip_connr->nrtx = 0;
01680         BUF->flags = TCP_FIN | TCP_ACK;
01681         goto tcp_send_nodata;
01682       }
01683
01684       /* If uip_slen > 0, the application has data to be sent. */
01685       if(uip_slen > 0) {
01686
01687         /* If the connection has acknowledged data, the contents of
01688            the ->len variable should be discarded. */
01689         if((uip_flags & UIP_ACKDATA) != 0) {
01690           uip_connr->len = 0;
01691         }
01692
01693         /* If the ->len variable is non-zero the connection has
01694            already data in transit and cannot send anymore right
01695            now. */
01696         if(uip_connr->len == 0) {
01697
01698           /* The application cannot send more than what is allowed by
01699              the mss (the minumum of the MSS and the available
01700              window). */
01701           if(uip_slen > uip_connr->mss) {
01702             uip_slen = uip_connr->mss;
01703           }
01704
01705           /* Remember how much data we send out now so that we know
01706              when everything has been acknowledged. */
01707           uip_connr->len = uip_slen;
01708         } else {
01709
01710           /* If the application already had unacknowledged data, we
01711              make sure that the application does not send (i.e.,
01712              retransmit) out more than it previously sent out. */
01713           uip_slen = uip_connr->len;
01714         }
01715       }
01716       uip_connr->nrtx = 0;
01717     apprexmit:
01718       uip_appdata = uip_sappdata;
01719
01720       /* If the application has data to be sent, or if the incoming
01721          packet had new data in it, we must send out a packet. */
01722       if(uip_slen > 0 && uip_connr->len > 0) {
01723         /* Add the length of the IP and TCP headers. */
01724         uip_len = uip_connr->len + UIP_TCPIP_HLEN;
01725         /* We always set the ACK flag in response packets. */
01726         BUF->flags = TCP_ACK | TCP_PSH;
01727         /* Send the packet. */
01728         goto tcp_send_noopts;
01729       }
01730       /* If there is no data to send, just send out a pure ACK if
01731          there is newdata. */
01732       if(uip_flags & UIP_NEWDATA) {
01733         uip_len = UIP_TCPIP_HLEN;
01734         BUF->flags = TCP_ACK;
01735         goto tcp_send_noopts;
01736       }
01737     }
01738     goto drop;
01739   case UIP_LAST_ACK:
01740     /* We can close this connection if the peer has acknowledged our
01741        FIN. This is indicated by the UIP_ACKDATA flag. */
01742     if(uip_flags & UIP_ACKDATA) {
01743       uip_connr->tcpstateflags = UIP_CLOSED;
01744       uip_flags = UIP_CLOSE;
01745       UIP_APPCALL();
01746     }
01747     break;
01748
01749   case UIP_FIN_WAIT_1:
01750     /* The application has closed the connection, but the remote host
01751        hasn't closed its end yet. Thus we do nothing but wait for a
01752        FIN from the other side. */
01753     if(uip_len > 0) {
01754       uip_add_rcv_nxt(uip_len);
01755     }
01756     if(BUF->flags & TCP_FIN) {
01757       if(uip_flags & UIP_ACKDATA) {
01758         uip_connr->tcpstateflags = UIP_TIME_WAIT;
01759         uip_connr->timer = 0;
01760         uip_connr->len = 0;
01761       } else {
01762         uip_connr->tcpstateflags = UIP_CLOSING;
01763       }
01764       uip_add_rcv_nxt(1);
01765       uip_flags = UIP_CLOSE;
01766       UIP_APPCALL();
01767       goto tcp_send_ack;
01768     } else if(uip_flags & UIP_ACKDATA) {
01769       uip_connr->tcpstateflags = UIP_FIN_WAIT_2;
01770       uip_connr->len = 0;
01771       goto drop;
01772     }
01773     if(uip_len > 0) {
01774       goto tcp_send_ack;
01775     }
01776     goto drop;
01777
01778   case UIP_FIN_WAIT_2:
01779     if(uip_len > 0) {
01780       uip_add_rcv_nxt(uip_len);
01781     }
01782     if(BUF->flags & TCP_FIN) {
01783       uip_connr->tcpstateflags = UIP_TIME_WAIT;
01784       uip_connr->timer = 0;
01785       uip_add_rcv_nxt(1);
01786       uip_flags = UIP_CLOSE;
01787       UIP_APPCALL();
01788       goto tcp_send_ack;
01789     }
01790     if(uip_len > 0) {
01791       goto tcp_send_ack;
01792     }
01793     goto drop;
01794
01795   case UIP_TIME_WAIT:
01796     goto tcp_send_ack;
01797
01798   case UIP_CLOSING:
01799     if(uip_flags & UIP_ACKDATA) {
01800       uip_connr->tcpstateflags = UIP_TIME_WAIT;
01801       uip_connr->timer = 0;
01802     }
01803   }
01804   goto drop;
01805
01806
01807   /* We jump here when we are ready to send the packet, and just want
01808      to set the appropriate TCP sequence numbers in the TCP header. */
01809  tcp_send_ack:
01810   BUF->flags = TCP_ACK;
01811  tcp_send_nodata:
01812   uip_len = UIP_IPTCPH_LEN;
01813  tcp_send_noopts:
01814   BUF->tcpoffset = (UIP_TCPH_LEN / 4) << 4;
01815  tcp_send:
01816   /* We're done with the input processing. We are now ready to send a
01817      reply. Our job is to fill in all the fields of the TCP and IP
01818      headers before calculating the checksum and finally send the
01819      packet. */
01820   BUF->ackno[0] = uip_connr->rcv_nxt[0];
01821   BUF->ackno[1] = uip_connr->rcv_nxt[1];
01822   BUF->ackno[2] = uip_connr->rcv_nxt[2];
01823   BUF->ackno[3] = uip_connr->rcv_nxt[3];
01824
01825   BUF->seqno[0] = uip_connr->snd_nxt[0];
01826   BUF->seqno[1] = uip_connr->snd_nxt[1];
01827   BUF->seqno[2] = uip_connr->snd_nxt[2];
01828   BUF->seqno[3] = uip_connr->snd_nxt[3];
01829
01830   BUF->proto = UIP_PROTO_TCP;
01831
01832   BUF->srcport  = uip_connr->lport;
01833   BUF->destport = uip_connr->rport;
01834
01835   uip_ipaddr_copy(BUF->srcipaddr, uip_hostaddr);
01836   uip_ipaddr_copy(BUF->destipaddr, uip_connr->ripaddr);
01837
01838   if(uip_connr->tcpstateflags & UIP_STOPPED) {
01839     /* If the connection has issued uip_stop(), we advertise a zero
01840        window so that the remote host will stop sending data. */
01841     BUF->wnd[0] = BUF->wnd[1] = 0;
01842   } else {
01843     BUF->wnd[0] = ((UIP_RECEIVE_WINDOW) >> 8);
01844     BUF->wnd[1] = ((UIP_RECEIVE_WINDOW) & 0xff);
01845   }
01846
01847  tcp_send_noconn:
01848   BUF->ttl = UIP_TTL;
01849 #if UIP_CONF_IPV6
01850   /* For IPv6, the IP length field does not include the IPv6 IP header
01851      length. */
01852   BUF->len[0] = ((uip_len - UIP_IPH_LEN) >> 8);
01853   BUF->len[1] = ((uip_len - UIP_IPH_LEN) & 0xff);
01854 #else /* UIP_CONF_IPV6 */
01855   BUF->len[0] = (uip_len >> 8);
01856   BUF->len[1] = (uip_len & 0xff);
01857 #endif /* UIP_CONF_IPV6 */
01858
01859   BUF->urgp[0] = BUF->urgp[1] = 0;
01860
01861   /* Calculate TCP checksum. */
01862   BUF->tcpchksum = 0;
01863   BUF->tcpchksum = ~(uip_tcpchksum());
01864
01865 #if UIP_UDP
01866  ip_send_nolen:
01867 #endif /* UIP_UDP */
01868
01869 #if UIP_CONF_IPV6
01870   BUF->vtc = 0x60;
01871   BUF->tcflow = 0x00;
01872   BUF->flow = 0x00;
01873 #else /* UIP_CONF_IPV6 */
01874   BUF->vhl = 0x45;
01875   BUF->tos = 0;
01876   BUF->ipoffset[0] = BUF->ipoffset[1] = 0;
01877   ++ipid;
01878   BUF->ipid[0] = ipid >> 8;
01879   BUF->ipid[1] = ipid & 0xff;
01880   /* Calculate IP checksum. */
01881   BUF->ipchksum = 0;
01882   BUF->ipchksum = ~(uip_ipchksum());
01883   DEBUG_PRINTF("uip ip_send_nolen: chkecum 0x%04x\n", uip_ipchksum());
01884 #endif /* UIP_CONF_IPV6 */
01885
01886   UIP_STAT(++uip_stat.tcp.sent);
01887  send:
01888   DEBUG_PRINTF("Sending packet with length %d (%d)\n", uip_len,
01889                (BUF->len[0] << 8) | BUF->len[1]);
01890
01891   UIP_STAT(++uip_stat.ip.sent);
01892   /* Return and let the caller do the actual transmission. */
01893   uip_flags = 0;
01894   return;
01895  drop:
01896   uip_len = 0;
01897   uip_flags = 0;
01898   return;
01899 }
01900 /*---------------------------------------------------------------------------*/
01901 u16_t
01902 htons(u16_t val)
01903 {
01904   return HTONS(val);
01905 }
01906 /*---------------------------------------------------------------------------*/
01907 void
01908 uip_send(const void *data, int len)
01909 {
01910   if(len > 0) {
01911     uip_slen = len;
01912     if(data != uip_sappdata) {
01913       memcpy(uip_sappdata, (data), uip_slen);
01914     }
01915   }
01916 }
Generated on Tue Jun 7 14:59:00 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/uip/uip.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/uip/uip.h

Go to the documentation of this file.
00001
00019 /*
00020  * Copyright (c) 2001-2003, Adam Dunkels.
00021  * All rights reserved.
00022  *
00023  * Redistribution and use in source and binary forms, with or without
00024  * modification, are permitted provided that the following conditions
00025  * are met:
00026  * 1. Redistributions of source code must retain the above copyright
00027  *    notice, this list of conditions and the following disclaimer.
00028  * 2. Redistributions in binary form must reproduce the above copyright
00029  *    notice, this list of conditions and the following disclaimer in the
00030  *    documentation and/or other materials provided with the distribution.
00031  * 3. The name of the author may not be used to endorse or promote
00032  *    products derived from this software without specific prior
00033  *    written permission.
00034  *
00035  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS
00036  * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
00037  * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
00038  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
00039  * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
00040  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
00041  * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
00042  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
00043  * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
00044  * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
00045  * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
00046  *
00047  * This file is part of the uIP TCP/IP stack.
00048  *
00049  * $Id: uip.h,v 1.40 2006/06/08 07:12:07 adam Exp $
00050  *
00051  */
00052
00053 #ifndef __UIP_H__
00054 #define __UIP_H__
00055
00056 #include "uipopt.h"
00057
00062 typedef u16_t uip_ip4addr_t[2];
00063 typedef u16_t uip_ip6addr_t[8];
00064 #if UIP_CONF_IPV6
00065 typedef uip_ip6addr_t uip_ipaddr_t;
00066 #else /* UIP_CONF_IPV6 */
00067 typedef uip_ip4addr_t uip_ipaddr_t;
00068 #endif /* UIP_CONF_IPV6 */
00069
00070 /*---------------------------------------------------------------------------*/
00071 /* First, the functions that should be called from the
00072  * system. Initialization, the periodic timer and incoming packets are
00073  * handled by the following three functions.
00074  */
00075
00106 #define uip_sethostaddr(addr) uip_ipaddr_copy(uip_hostaddr, (addr))
00107
00126 #define uip_gethostaddr(addr) uip_ipaddr_copy((addr), uip_hostaddr)
00127
00138 #define uip_setdraddr(addr) uip_ipaddr_copy(uip_draddr, (addr))
00139
00150 #define uip_setnetmask(addr) uip_ipaddr_copy(uip_netmask, (addr))
00151
00152
00161 #define uip_getdraddr(addr) uip_ipaddr_copy((addr), uip_draddr)
00162
00171 #define uip_getnetmask(addr) uip_ipaddr_copy((addr), uip_netmask)
00172
00188 void uip_init(void);
00189
00195 void uip_setipid(u16_t id);
00196
00257 #define uip_input()        uip_process(UIP_DATA)
00258
00301 #define uip_periodic(conn) do { uip_conn = &uip_conns[conn]; \
00302                                 uip_process(UIP_TIMER); } while (0)
00303
00308 #define uip_conn_active(conn) (uip_conns[conn].tcpstateflags != UIP_CLOSED)
00309
00323 #define uip_periodic_conn(conn) do { uip_conn = conn; \
00324                                      uip_process(UIP_TIMER); } while (0)
00325
00337 #define uip_poll_conn(conn) do { uip_conn = conn; \
00338                                  uip_process(UIP_POLL_REQUEST); } while (0)
00339
00340
00341 #if UIP_UDP
00342
00373 #define uip_udp_periodic(conn) do { uip_udp_conn = &uip_udp_conns[conn]; \
00374                                 uip_process(UIP_UDP_TIMER); } while (0)
00375
00390 #define uip_udp_periodic_conn(conn) do { uip_udp_conn = conn; \
00391                                          uip_process(UIP_UDP_TIMER); } while (0)
00392
00393
00394 #endif /* UIP_UDP */
00395
00422 #ifndef UIP_CONF_EXTERNAL_BUFFER
00423         extern u8_t uip_buf[UIP_BUFSIZE+2];
00424 #else
00425         extern unsigned char *uip_buf;
00426 #endif
00427
00430 /*---------------------------------------------------------------------------*/
00431 /* Functions that are used by the uIP application program. Opening and
00432  * closing connections, sending and receiving data, etc. is all
00433  * handled by the functions below.
00434 */
00454 void uip_listen(u16_t port);
00455
00468 void uip_unlisten(u16_t port);
00469
00502 struct uip_conn *uip_connect(uip_ipaddr_t *ripaddr, u16_t port);
00503
00504
00505
00515 #define uip_outstanding(conn) ((conn)->len)
00516
00542 void uip_send(const void *data, int len);
00543
00553 /*void uip_datalen(void);*/
00554 #define uip_datalen()       uip_len
00555
00565 #define uip_urgdatalen()    uip_urglen
00566
00574 #define uip_close()         (uip_flags = UIP_CLOSE)
00575
00585 #define uip_abort()         (uip_flags = UIP_ABORT)
00586
00595 #define uip_stop()          (uip_conn->tcpstateflags |= UIP_STOPPED)
00596
00603 #define uip_stopped(conn)   ((conn)->tcpstateflags & UIP_STOPPED)
00604
00614 #define uip_restart()         do { uip_flags |= UIP_NEWDATA; \
00615                                    uip_conn->tcpstateflags &= ~UIP_STOPPED; \
00616                               } while(0)
00617
00618
00619 /* uIP tests that can be made to determine in what state the current
00620    connection is, and what the application function should do. */
00621
00630 #define uip_udpconnection() (uip_conn == NULL)
00631
00641 #define uip_newdata()   (uip_flags & UIP_NEWDATA)
00642
00652 #define uip_acked()   (uip_flags & UIP_ACKDATA)
00653
00664 #define uip_connected() (uip_flags & UIP_CONNECTED)
00665
00674 #define uip_closed()    (uip_flags & UIP_CLOSE)
00675
00684 #define uip_aborted()    (uip_flags & UIP_ABORT)
00685
00694 #define uip_timedout()    (uip_flags & UIP_TIMEDOUT)
00695
00706 #define uip_rexmit()     (uip_flags & UIP_REXMIT)
00707
00720 #define uip_poll()       (uip_flags & UIP_POLL)
00721
00728 #define uip_initialmss()             (uip_conn->initialmss)
00729
00741 #define uip_mss()             (uip_conn->mss)
00742
00770 struct uip_udp_conn *uip_udp_new(uip_ipaddr_t *ripaddr, u16_t rport);
00771
00779 #define uip_udp_remove(conn) (conn)->lport = 0
00780
00791 #define uip_udp_bind(conn, port) (conn)->lport = port
00792
00804 #define uip_udp_send(len) uip_send((char *)uip_appdata, len)
00805
00808 /* uIP convenience and converting functions. */
00809
00844 #define uip_ipaddr(addr, addr0,addr1,addr2,addr3) do { \
00845                      ((u16_t *)(addr))[0] = HTONS(((addr0) << 8) | (addr1)); \
00846                      ((u16_t *)(addr))[1] = HTONS(((addr2) << 8) | (addr3)); \
00847                   } while(0)
00848
00856 #define uip_ip6addr(addr, addr0,addr1,addr2,addr3,addr4,addr5,addr6,addr7) do { \
00857                      ((u16_t *)(addr))[0] = HTONS((addr0)); \
00858                      ((u16_t *)(addr))[1] = HTONS((addr1)); \
00859                      ((u16_t *)(addr))[2] = HTONS((addr2)); \
00860                      ((u16_t *)(addr))[3] = HTONS((addr3)); \
00861                      ((u16_t *)(addr))[4] = HTONS((addr4)); \
00862                      ((u16_t *)(addr))[5] = HTONS((addr5)); \
00863                      ((u16_t *)(addr))[6] = HTONS((addr6)); \
00864                      ((u16_t *)(addr))[7] = HTONS((addr7)); \
00865                   } while(0)
00866
00885 #if !UIP_CONF_IPV6
00886 #define uip_ipaddr_copy(dest, src) do { \
00887                      ((u16_t *)dest)[0] = ((u16_t *)src)[0]; \
00888                      ((u16_t *)dest)[1] = ((u16_t *)src)[1]; \
00889                   } while(0)
00890 #else /* !UIP_CONF_IPV6 */
00891 #define uip_ipaddr_copy(dest, src) memcpy(dest, src, sizeof(uip_ip6addr_t))
00892 #endif /* !UIP_CONF_IPV6 */
00893
00914 #if !UIP_CONF_IPV6
00915 #define uip_ipaddr_cmp(addr1, addr2) (((u16_t *)addr1)[0] == ((u16_t *)addr2)[0] && \
00916                                       ((u16_t *)addr1)[1] == ((u16_t *)addr2)[1])
00917 #else /* !UIP_CONF_IPV6 */
00918 #define uip_ipaddr_cmp(addr1, addr2) (memcmp(addr1, addr2, sizeof(uip_ip6addr_t)) == 0)
00919 #endif /* !UIP_CONF_IPV6 */
00920
00945 #define uip_ipaddr_maskcmp(addr1, addr2, mask) \
00946                           (((((u16_t *)addr1)[0] & ((u16_t *)mask)[0]) == \
00947                             (((u16_t *)addr2)[0] & ((u16_t *)mask)[0])) && \
00948                            ((((u16_t *)addr1)[1] & ((u16_t *)mask)[1]) == \
00949                             (((u16_t *)addr2)[1] & ((u16_t *)mask)[1])))
00950
00951
00976 #define uip_ipaddr_mask(dest, src, mask) do { \
00977                      ((u16_t *)dest)[0] = ((u16_t *)src)[0] & ((u16_t *)mask)[0]; \
00978                      ((u16_t *)dest)[1] = ((u16_t *)src)[1] & ((u16_t *)mask)[1]; \
00979                   } while(0)
00980
00999 #define uip_ipaddr1(addr) (htons(((u16_t *)(addr))[0]) >> 8)
01000
01019 #define uip_ipaddr2(addr) (htons(((u16_t *)(addr))[0]) & 0xff)
01020
01039 #define uip_ipaddr3(addr) (htons(((u16_t *)(addr))[1]) >> 8)
01040
01059 #define uip_ipaddr4(addr) (htons(((u16_t *)(addr))[1]) & 0xff)
01060
01070 #ifndef HTONS
01071 #   if UIP_BYTE_ORDER == UIP_BIG_ENDIAN
01072 #      define HTONS(n) (n)
01073 #   else /* UIP_BYTE_ORDER == UIP_BIG_ENDIAN */
01074 #      define HTONS(n) (u16_t)((((u16_t) (n)) << 8) | (((u16_t) (n)) >> 8))
01075 #   endif /* UIP_BYTE_ORDER == UIP_BIG_ENDIAN */
01076 #else
01077 #error "HTONS already defined!"
01078 #endif /* HTONS */
01079
01087 #ifndef htons
01088 u16_t htons(u16_t val);
01089 #endif /* htons */
01090 #ifndef ntohs
01091 #define ntohs htons
01092 #endif
01093
01103 extern void *uip_appdata;
01104
01105 #if UIP_URGDATA > 0
01106 /* u8_t *uip_urgdata:
01107  *
01108  * This pointer points to any urgent data that has been received. Only
01109  * present if compiled with support for urgent data (UIP_URGDATA).
01110  */
01111 extern void *uip_urgdata;
01112 #endif /* UIP_URGDATA > 0 */
01113
01114
01138 extern u16_t uip_len;
01139
01142 #if UIP_URGDATA > 0
01143 extern u16_t uip_urglen, uip_surglen;
01144 #endif /* UIP_URGDATA > 0 */
01145
01146
01157 struct uip_conn {
01158   uip_ipaddr_t ripaddr;
01160   u16_t lport;
01161   u16_t rport;
01164   u8_t rcv_nxt[4];
01166   u8_t snd_nxt[4];
01168   u16_t len;
01169   u16_t mss;
01171   u16_t initialmss;
01173   u8_t sa;
01175   u8_t sv;
01177   u8_t rto;
01178   u8_t tcpstateflags;
01179   u8_t timer;
01180   u8_t nrtx;
01184   uip_tcp_appstate_t appstate;
01185 };
01186
01187
01194 extern struct uip_conn *uip_conn;
01195 /* The array containing all uIP connections. */
01196 extern struct uip_conn uip_conns[UIP_CONNS];
01205 extern u8_t uip_acc32[4];
01206
01210 #if UIP_UDP
01211
01214 struct uip_udp_conn {
01215   uip_ipaddr_t ripaddr;
01216   u16_t lport;
01217   u16_t rport;
01218   u8_t  ttl;
01221   uip_udp_appstate_t appstate;
01222 };
01223
01227 extern struct uip_udp_conn *uip_udp_conn;
01228 extern struct uip_udp_conn uip_udp_conns[UIP_UDP_CONNS];
01229 #endif /* UIP_UDP */
01230
01236 struct uip_stats {
01237   struct {
01238     uip_stats_t drop;
01240     uip_stats_t recv;
01242     uip_stats_t sent;
01244     uip_stats_t vhlerr;
01246     uip_stats_t hblenerr;
01248     uip_stats_t lblenerr;
01250     uip_stats_t fragerr;
01252     uip_stats_t chkerr;
01254     uip_stats_t protoerr;
01256   } ip;
01257   struct {
01258     uip_stats_t drop;
01259     uip_stats_t recv;
01260     uip_stats_t sent;
01261     uip_stats_t typeerr;
01263   } icmp;
01264   struct {
01265     uip_stats_t drop;
01266     uip_stats_t recv;
01267     uip_stats_t sent;
01268     uip_stats_t chkerr;
01270     uip_stats_t ackerr;
01272     uip_stats_t rst;
01273     uip_stats_t rexmit;
01274     uip_stats_t syndrop;
01276     uip_stats_t synrst;
01278   } tcp;
01279 #if UIP_UDP
01280   struct {
01281     uip_stats_t drop;
01282     uip_stats_t recv;
01283     uip_stats_t sent;
01284     uip_stats_t chkerr;
01286   } udp;
01287 #endif /* UIP_UDP */
01288 };
01289
01295 extern struct uip_stats uip_stat;
01296
01297
01298 /*---------------------------------------------------------------------------*/
01299 /* All the stuff below this point is internal to uIP and should not be
01300  * used directly by an application or by a device driver.
01301  */
01302 /*---------------------------------------------------------------------------*/
01303 /* u8_t uip_flags:
01304  *
01305  * When the application is called, uip_flags will contain the flags
01306  * that are defined in this file. Please read below for more
01307  * infomation.
01308  */
01309 extern u8_t uip_flags;
01310
01311 /* The following flags may be set in the global variable uip_flags
01312    before calling the application callback. The UIP_ACKDATA,
01313    UIP_NEWDATA, and UIP_CLOSE flags may both be set at the same time,
01314    whereas the others are mutualy exclusive. Note that these flags
01315    should *NOT* be accessed directly, but only through the uIP
01316    functions/macros. */
01317
01318 #define UIP_ACKDATA   1     /* Signifies that the outstanding data was
01319                                acked and the application should send
01320                                out new data instead of retransmitting
01321                                the last data. */
01322 #define UIP_NEWDATA   2     /* Flags the fact that the peer has sent
01323                                us new data. */
01324 #define UIP_REXMIT    4     /* Tells the application to retransmit the
01325                                data that was last sent. */
01326 #define UIP_POLL      8     /* Used for polling the application, to
01327                                check if the application has data that
01328                                it wants to send. */
01329 #define UIP_CLOSE     16    /* The remote host has closed the
01330                                connection, thus the connection has
01331                                gone away. Or the application signals
01332                                that it wants to close the
01333                                connection. */
01334 #define UIP_ABORT     32    /* The remote host has aborted the
01335                                connection, thus the connection has
01336                                gone away. Or the application signals
01337                                that it wants to abort the
01338                                connection. */
01339 #define UIP_CONNECTED 64    /* We have got a connection from a remote
01340                                host and have set up a new connection
01341                                for it, or an active connection has
01342                                been successfully established. */
01343
01344 #define UIP_TIMEDOUT  128   /* The connection has been aborted due to
01345                                too many retransmissions. */
01346
01347 /* uip_process(flag):
01348  *
01349  * The actual uIP function which does all the work.
01350  */
01351 void uip_process(u8_t flag);
01352
01353 /* The following flags are passed as an argument to the uip_process()
01354    function. They are used to distinguish between the two cases where
01355    uip_process() is called. It can be called either because we have
01356    incoming data that should be processed, or because the periodic
01357    timer has fired. These values are never used directly, but only in
01358    the macrose defined in this file. */
01359
01360 #define UIP_DATA          1     /* Tells uIP that there is incoming
01361                                    data in the uip_buf buffer. The
01362                                    length of the data is stored in the
01363                                    global variable uip_len. */
01364 #define UIP_TIMER         2     /* Tells uIP that the periodic timer
01365                                    has fired. */
01366 #define UIP_POLL_REQUEST  3     /* Tells uIP that a connection should
01367                                    be polled. */
01368 #define UIP_UDP_SEND_CONN 4     /* Tells uIP that a UDP datagram
01369                                    should be constructed in the
01370                                    uip_buf buffer. */
01371 #if UIP_UDP
01372 #define UIP_UDP_TIMER     5
01373 #endif /* UIP_UDP */
01374
01375 /* The TCP states used in the uip_conn->tcpstateflags. */
01376 #define UIP_CLOSED      0
01377 #define UIP_SYN_RCVD    1
01378 #define UIP_SYN_SENT    2
01379 #define UIP_ESTABLISHED 3
01380 #define UIP_FIN_WAIT_1  4
01381 #define UIP_FIN_WAIT_2  5
01382 #define UIP_CLOSING     6
01383 #define UIP_TIME_WAIT   7
01384 #define UIP_LAST_ACK    8
01385 #define UIP_TS_MASK     15
01386
01387 #define UIP_STOPPED      16
01388
01389 /* The TCP and IP headers. */
01390
01391 #ifdef __ICCARM__
01392         #pragma pack(1)
01393 #endif
01394
01395
01396 #if defined ( __CC_ARM   )
01397 __packed
01398 #elif defined   (  __GNUC__  )
01399 __attribute__ ((__packed__))
01400 #endif
01401 struct uip_tcpip_hdr {
01402 #if UIP_CONF_IPV6
01403   /* IPv6 header. */
01404   u8_t vtc,
01405     tcflow;
01406   u16_t flow;
01407   u8_t len[2];
01408   u8_t proto, ttl;
01409   uip_ip6addr_t srcipaddr, destipaddr;
01410 #else /* UIP_CONF_IPV6 */
01411   /* IPv4 header. */
01412   u8_t vhl,
01413     tos,
01414     len[2],
01415     ipid[2],
01416     ipoffset[2],
01417     ttl,
01418     proto;
01419   u16_t ipchksum;
01420   u16_t srcipaddr[2],
01421     destipaddr[2];
01422 #endif /* UIP_CONF_IPV6 */
01423
01424   /* TCP header. */
01425   u16_t srcport,
01426     destport;
01427   u8_t seqno[4],
01428     ackno[4],
01429     tcpoffset,
01430     flags,
01431     wnd[2];
01432   u16_t tcpchksum;
01433   u8_t urgp[2];
01434   u8_t optdata[4];
01435 } /*PACK_STRUCT_END*/;
01436
01437 #ifdef __ICCARM__
01438         #pragma pack()
01439 #endif
01440
01441 /* The ICMP and IP headers. */
01442 #ifdef __ICCARM__
01443         #pragma pack(1)
01444 #endif
01445
01446
01447 #if defined ( __CC_ARM   )
01448 __packed
01449 #elif defined   (  __GNUC__  )
01450 __attribute__ ((__packed__))
01451 #endif
01452 struct uip_icmpip_hdr {
01453 #if UIP_CONF_IPV6
01454   /* IPv6 header. */
01455   u8_t vtc,
01456     tcf;
01457   u16_t flow;
01458   u8_t len[2];
01459   u8_t proto, ttl;
01460   uip_ip6addr_t srcipaddr, destipaddr;
01461 #else /* UIP_CONF_IPV6 */
01462   /* IPv4 header. */
01463   u8_t vhl,
01464     tos,
01465     len[2],
01466     ipid[2],
01467     ipoffset[2],
01468     ttl,
01469     proto;
01470   u16_t ipchksum;
01471   u16_t srcipaddr[2],
01472     destipaddr[2];
01473 #endif /* UIP_CONF_IPV6 */
01474
01475   /* ICMP (echo) header. */
01476   u8_t type, icode;
01477   u16_t icmpchksum;
01478 #if !UIP_CONF_IPV6
01479   u16_t id, seqno;
01480 #else /* !UIP_CONF_IPV6 */
01481   u8_t flags, reserved1, reserved2, reserved3;
01482   u8_t icmp6data[16];
01483   u8_t options[1];
01484 #endif /* !UIP_CONF_IPV6 */
01485 } /*PACK_STRUCT_END*/;
01486
01487 #ifdef __ICCARM__
01488         #pragma pack()
01489 #endif
01490
01491
01492 /* The UDP and IP headers. */
01493 #ifdef __ICCARM__
01494         #pragma pack(1)
01495 #endif
01496
01497
01498 #if defined ( __CC_ARM   )
01499 __packed
01500 #elif defined   (  __GNUC__  )
01501 __attribute__ ((__packed__))
01502 #endif
01503 struct uip_udpip_hdr {
01504 #if UIP_CONF_IPV6
01505   /* IPv6 header. */
01506   u8_t vtc,
01507     tcf;
01508   u16_t flow;
01509   u8_t len[2];
01510   u8_t proto, ttl;
01511   uip_ip6addr_t srcipaddr, destipaddr;
01512 #else /* UIP_CONF_IPV6 */
01513   /* IP header. */
01514   u8_t vhl,
01515     tos,
01516     len[2],
01517     ipid[2],
01518     ipoffset[2],
01519     ttl,
01520     proto;
01521   u16_t ipchksum;
01522   u16_t srcipaddr[2],
01523     destipaddr[2];
01524 #endif /* UIP_CONF_IPV6 */
01525
01526   /* UDP header. */
01527   u16_t srcport,
01528     destport;
01529   u16_t udplen;
01530   u16_t udpchksum;
01531 } /*PACK_STRUCT_END*/;
01532
01533 #ifdef __ICCARM__
01534         #pragma pack()
01535 #endif
01536
01537
01538
01553 #define UIP_APPDATA_SIZE (UIP_BUFSIZE - UIP_LLH_LEN - UIP_TCPIP_HLEN)
01554
01555
01556 #define UIP_PROTO_ICMP  1
01557 #define UIP_PROTO_TCP   6
01558 #define UIP_PROTO_UDP   17
01559 #define UIP_PROTO_ICMP6 58
01560
01561 /* Header sizes. */
01562 #if UIP_CONF_IPV6
01563 #define UIP_IPH_LEN    40
01564 #else /* UIP_CONF_IPV6 */
01565 #define UIP_IPH_LEN    20    /* Size of IP header */
01566 #endif /* UIP_CONF_IPV6 */
01567 #define UIP_UDPH_LEN    8    /* Size of UDP header */
01568 #define UIP_TCPH_LEN   20    /* Size of TCP header */
01569 #define UIP_IPUDPH_LEN (UIP_UDPH_LEN + UIP_IPH_LEN)    /* Size of IP +
01570                                                           UDP
01571                                                           header */
01572 #define UIP_IPTCPH_LEN (UIP_TCPH_LEN + UIP_IPH_LEN)    /* Size of IP +
01573                                                           TCP
01574                                                           header */
01575 #define UIP_TCPIP_HLEN UIP_IPTCPH_LEN
01576
01577
01578 #if UIP_FIXEDADDR
01579 extern const uip_ipaddr_t uip_hostaddr, uip_netmask, uip_draddr;
01580 #else /* UIP_FIXEDADDR */
01581 extern uip_ipaddr_t uip_hostaddr, uip_netmask, uip_draddr;
01582 #endif /* UIP_FIXEDADDR */
01583
01584
01585
01589 #ifdef __ICCARM__
01590         #pragma pack(1)
01591 #endif
01592
01593
01594 #if defined ( __CC_ARM   )
01595 __packed
01596 #elif defined   (  __GNUC__  )
01597 __attribute__ ((__packed__))
01598 #endif
01599 struct uip_eth_addr {
01600   u8_t addr[6];
01601 } /*PACK_STRUCT_END*/;
01602
01603 #ifdef __ICCARM__
01604         #pragma pack()
01605 #endif
01606
01623 u16_t uip_chksum(u16_t *buf, u16_t len);
01624
01634 u16_t uip_ipchksum(void);
01635
01645 u16_t uip_tcpchksum(void);
01646
01656 u16_t uip_udpchksum(void);
01657
01658
01659 #endif /* __UIP_H__ */
01660
01661
Generated on Tue Jun 7 14:59:00 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/uip/uip_arch.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/uip/uip_arch.h

Go to the documentation of this file.
00001
00027 /*
00028  * Copyright (c) 2001, Adam Dunkels.
00029  * All rights reserved.
00030  *
00031  * Redistribution and use in source and binary forms, with or without
00032  * modification, are permitted provided that the following conditions
00033  * are met:
00034  * 1. Redistributions of source code must retain the above copyright
00035  *    notice, this list of conditions and the following disclaimer.
00036  * 2. Redistributions in binary form must reproduce the above copyright
00037  *    notice, this list of conditions and the following disclaimer in the
00038  *    documentation and/or other materials provided with the distribution.
00039  * 3. The name of the author may not be used to endorse or promote
00040  *    products derived from this software without specific prior
00041  *    written permission.
00042  *
00043  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS
00044  * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
00045  * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
00046  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
00047  * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
00048  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
00049  * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
00050  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
00051  * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
00052  * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
00053  * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
00054  *
00055  * This file is part of the uIP TCP/IP stack.
00056  *
00057  * $Id: uip_arch.h,v 1.2 2006/06/07 09:15:19 adam Exp $
00058  *
00059  */
00060
00061 #ifndef __UIP_ARCH_H__
00062 #define __UIP_ARCH_H__
00063
00064 #include "uip.h"
00065
00084 void uip_add32(u8_t *op32, u16_t op16);
00085
00105 u16_t uip_chksum(u16_t *buf, u16_t len);
00106
00116 u16_t uip_ipchksum(void);
00117
00131 u16_t uip_tcpchksum(void);
00132
00133 u16_t uip_udpchksum(void);
00134
00138 #endif /* __UIP_ARCH_H__ */
Generated on Tue Jun 7 14:59:00 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/uip/uip_arp.c Source File

C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/uip/uip_arp.c

Go to the documentation of this file.
00001
00027 /*
00028  * Copyright (c) 2001-2003, Adam Dunkels.
00029  * All rights reserved.
00030  *
00031  * Redistribution and use in source and binary forms, with or without
00032  * modification, are permitted provided that the following conditions
00033  * are met:
00034  * 1. Redistributions of source code must retain the above copyright
00035  *    notice, this list of conditions and the following disclaimer.
00036  * 2. Redistributions in binary form must reproduce the above copyright
00037  *    notice, this list of conditions and the following disclaimer in the
00038  *    documentation and/or other materials provided with the distribution.
00039  * 3. The name of the author may not be used to endorse or promote
00040  *    products derived from this software without specific prior
00041  *    written permission.
00042  *
00043  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS
00044  * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
00045  * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
00046  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
00047  * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
00048  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
00049  * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
00050  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
00051  * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
00052  * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
00053  * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
00054  *
00055  * This file is part of the uIP TCP/IP stack.
00056  *
00057  * $Id: uip_arp.c,v 1.8 2006/06/02 23:36:21 adam Exp $
00058  *
00059  */
00060
00061
00062 #include "uip_arp.h"
00063
00064 #include <string.h>
00065
00066 #ifdef __ICCARM__
00067         #pragma pack(1)
00068 #endif
00069
00070 //#if defined ( __CC_ARM   )
00071 //__packed
00072 //#elif defined   (  __GNUC__  )
00073 //__attribute__ ((__packed__))
00074 //#endif
00075 struct arp_hdr {
00076   struct uip_eth_hdr ethhdr;
00077   u16_t hwtype;
00078   u16_t protocol;
00079   u8_t hwlen;
00080   u8_t protolen;
00081   u16_t opcode;
00082   struct uip_eth_addr shwaddr;
00083   u16_t sipaddr[2];
00084   struct uip_eth_addr dhwaddr;
00085   u16_t dipaddr[2];
00086 } /*PACK_STRUCT_END*/;
00087
00088 #ifdef __ICCARM__
00089         #pragma pack()
00090 #endif
00091
00092 #ifdef __ICCARM__
00093         #pragma pack(1)
00094 #endif
00095
00096 //#if defined ( __CC_ARM   )
00097 //__packed
00098 //#elif defined   (  __GNUC__  )
00099 //__attribute__ ((__packed__))
00100 //#endif
00101 struct ethip_hdr {
00102   struct uip_eth_hdr ethhdr;
00103   /* IP header. */
00104   u8_t vhl,
00105     tos,
00106     len[2],
00107     ipid[2],
00108     ipoffset[2],
00109     ttl,
00110     proto;
00111   u16_t ipchksum;
00112   u16_t srcipaddr[2],
00113     destipaddr[2];
00114 } /*PACK_STRUCT_END*/;
00115
00116 #ifdef __ICCARM__
00117         #pragma pack()
00118 #endif
00119
00120 #define ARP_REQUEST 1
00121 #define ARP_REPLY   2
00122
00123 #define ARP_HWTYPE_ETH 1
00124
00125 struct arp_entry {
00126   u16_t ipaddr[2];
00127   struct uip_eth_addr ethaddr;
00128   u8_t time;
00129 };
00130
00131 static const struct uip_eth_addr broadcast_ethaddr =
00132   {{0xff,0xff,0xff,0xff,0xff,0xff}};
00133 static const u16_t broadcast_ipaddr[2] = {0xffff,0xffff};
00134
00135 static struct arp_entry arp_table[UIP_ARPTAB_SIZE];
00136 static u16_t ipaddr[2];
00137 static u8_t i, c;
00138
00139 static u8_t arptime;
00140 static u8_t tmpage;
00141
00142 #define BUF   ((struct arp_hdr *)&uip_buf[0])
00143 #define IPBUF ((struct ethip_hdr *)&uip_buf[0])
00144 /*-----------------------------------------------------------------------------------*/
00149 /*-----------------------------------------------------------------------------------*/
00150 void
00151 uip_arp_init(void)
00152 {
00153   for(i = 0; i < UIP_ARPTAB_SIZE; ++i) {
00154     memset(arp_table[i].ipaddr, 0, 4);
00155   }
00156 }
00157 /*-----------------------------------------------------------------------------------*/
00166 /*-----------------------------------------------------------------------------------*/
00167 void
00168 uip_arp_timer(void)
00169 {
00170   struct arp_entry *tabptr;
00171
00172   ++arptime;
00173   for(i = 0; i < UIP_ARPTAB_SIZE; ++i) {
00174     tabptr = &arp_table[i];
00175     if((tabptr->ipaddr[0] | tabptr->ipaddr[1]) != 0 &&
00176        arptime - tabptr->time >= UIP_ARP_MAXAGE) {
00177       memset(tabptr->ipaddr, 0, 4);
00178     }
00179   }
00180
00181 }
00182 /*-----------------------------------------------------------------------------------*/
00183 static void
00184 uip_arp_update(u16_t *ipaddr, struct uip_eth_addr *ethaddr)
00185 {
00186   register struct arp_entry *tabptr;
00187   /* Walk through the ARP mapping table and try to find an entry to
00188      update. If none is found, the IP -> MAC address mapping is
00189      inserted in the ARP table. */
00190   for(i = 0; i < UIP_ARPTAB_SIZE; ++i) {
00191
00192     tabptr = &arp_table[i];
00193     /* Only check those entries that are actually in use. */
00194     if(tabptr->ipaddr[0] != 0 &&
00195        tabptr->ipaddr[1] != 0) {
00196
00197       /* Check if the source IP address of the incoming packet matches
00198          the IP address in this ARP table entry. */
00199       if(ipaddr[0] == tabptr->ipaddr[0] &&
00200          ipaddr[1] == tabptr->ipaddr[1]) {
00201
00202         /* An old entry found, update this and return. */
00203         memcpy(tabptr->ethaddr.addr, ethaddr->addr, 6);
00204         tabptr->time = arptime;
00205
00206         return;
00207       }
00208     }
00209   }
00210
00211   /* If we get here, no existing ARP table entry was found, so we
00212      create one. */
00213
00214   /* First, we try to find an unused entry in the ARP table. */
00215   for(i = 0; i < UIP_ARPTAB_SIZE; ++i) {
00216     tabptr = &arp_table[i];
00217     if(tabptr->ipaddr[0] == 0 &&
00218        tabptr->ipaddr[1] == 0) {
00219       break;
00220     }
00221   }
00222
00223   /* If no unused entry is found, we try to find the oldest entry and
00224      throw it away. */
00225   if(i == UIP_ARPTAB_SIZE) {
00226     tmpage = 0;
00227     c = 0;
00228     for(i = 0; i < UIP_ARPTAB_SIZE; ++i) {
00229       tabptr = &arp_table[i];
00230       if(arptime - tabptr->time > tmpage) {
00231         tmpage = arptime - tabptr->time;
00232         c = i;
00233       }
00234     }
00235     i = c;
00236     tabptr = &arp_table[i];
00237   }
00238
00239   /* Now, i is the ARP table entry which we will fill with the new
00240      information. */
00241   memcpy(tabptr->ipaddr, ipaddr, 4);
00242   memcpy(tabptr->ethaddr.addr, ethaddr->addr, 6);
00243   tabptr->time = arptime;
00244 }
00245 /*-----------------------------------------------------------------------------------*/
00258 /*-----------------------------------------------------------------------------------*/
00259 #if 1
00260 void
00261 uip_arp_ipin(void)
00262 {
00263   uip_len -= sizeof(struct uip_eth_hdr);
00264
00265   /* Only insert/update an entry if the source IP address of the
00266      incoming IP packet comes from a host on the local network. */
00267   if((IPBUF->srcipaddr[0] & uip_netmask[0]) !=
00268      (uip_hostaddr[0] & uip_netmask[0])) {
00269     return;
00270   }
00271   if((IPBUF->srcipaddr[1] & uip_netmask[1]) !=
00272      (uip_hostaddr[1] & uip_netmask[1])) {
00273     return;
00274   }
00275   uip_arp_update(IPBUF->srcipaddr, &(IPBUF->ethhdr.src));
00276
00277   return;
00278 }
00279 #endif /* 0 */
00280 /*-----------------------------------------------------------------------------------*/
00302 /*-----------------------------------------------------------------------------------*/
00303 void
00304 uip_arp_arpin(void)
00305 {
00306
00307   if(uip_len < sizeof(struct arp_hdr)) {
00308     uip_len = 0;
00309     return;
00310   }
00311   uip_len = 0;
00312
00313   switch(BUF->opcode) {
00314   case HTONS(ARP_REQUEST):
00315     /* ARP request. If it asked for our address, we send out a
00316        reply. */
00317     if(uip_ipaddr_cmp(BUF->dipaddr, uip_hostaddr)) {
00318       /* First, we register the one who made the request in our ARP
00319          table, since it is likely that we will do more communication
00320          with this host in the future. */
00321       uip_arp_update(BUF->sipaddr, &BUF->shwaddr);
00322
00323       /* The reply opcode is 2. */
00324       BUF->opcode = HTONS(2);
00325
00326       memcpy(BUF->dhwaddr.addr, BUF->shwaddr.addr, 6);
00327       memcpy(BUF->shwaddr.addr, uip_ethaddr.addr, 6);
00328       memcpy(BUF->ethhdr.src.addr, uip_ethaddr.addr, 6);
00329       memcpy(BUF->ethhdr.dest.addr, BUF->dhwaddr.addr, 6);
00330
00331       BUF->dipaddr[0] = BUF->sipaddr[0];
00332       BUF->dipaddr[1] = BUF->sipaddr[1];
00333       BUF->sipaddr[0] = uip_hostaddr[0];
00334       BUF->sipaddr[1] = uip_hostaddr[1];
00335
00336       BUF->ethhdr.type = HTONS(UIP_ETHTYPE_ARP);
00337       uip_len = sizeof(struct arp_hdr);
00338     }
00339     break;
00340   case HTONS(ARP_REPLY):
00341     /* ARP reply. We insert or update the ARP table if it was meant
00342        for us. */
00343     if(uip_ipaddr_cmp(BUF->dipaddr, uip_hostaddr)) {
00344       uip_arp_update(BUF->sipaddr, &BUF->shwaddr);
00345     }
00346     break;
00347   }
00348
00349   return;
00350 }
00351 /*-----------------------------------------------------------------------------------*/
00378 /*-----------------------------------------------------------------------------------*/
00379 void
00380 uip_arp_out(void)
00381 {
00382   struct arp_entry *tabptr;
00383
00384   /* Find the destination IP address in the ARP table and construct
00385      the Ethernet header. If the destination IP addres isn't on the
00386      local network, we use the default router's IP address instead.
00387
00388      If not ARP table entry is found, we overwrite the original IP
00389      packet with an ARP request for the IP address. */
00390
00391   /* First check if destination is a local broadcast. */
00392   if(uip_ipaddr_cmp(IPBUF->destipaddr, broadcast_ipaddr)) {
00393     memcpy(IPBUF->ethhdr.dest.addr, broadcast_ethaddr.addr, 6);
00394   } else {
00395     /* Check if the destination address is on the local network. */
00396     if(!uip_ipaddr_maskcmp(IPBUF->destipaddr, uip_hostaddr, uip_netmask)) {
00397       /* Destination address was not on the local network, so we need to
00398          use the default router's IP address instead of the destination
00399          address when determining the MAC address. */
00400       uip_ipaddr_copy(ipaddr, uip_draddr);
00401     } else {
00402       /* Else, we use the destination IP address. */
00403       uip_ipaddr_copy(ipaddr, IPBUF->destipaddr);
00404     }
00405
00406     for(i = 0; i < UIP_ARPTAB_SIZE; ++i) {
00407       tabptr = &arp_table[i];
00408       if(uip_ipaddr_cmp(ipaddr, tabptr->ipaddr)) {
00409         break;
00410       }
00411     }
00412
00413     if(i == UIP_ARPTAB_SIZE) {
00414       /* The destination address was not in our ARP table, so we
00415          overwrite the IP packet with an ARP request. */
00416
00417       memset(BUF->ethhdr.dest.addr, 0xff, 6);
00418       memset(BUF->dhwaddr.addr, 0x00, 6);
00419       memcpy(BUF->ethhdr.src.addr, uip_ethaddr.addr, 6);
00420       memcpy(BUF->shwaddr.addr, uip_ethaddr.addr, 6);
00421
00422       uip_ipaddr_copy(BUF->dipaddr, ipaddr);
00423       uip_ipaddr_copy(BUF->sipaddr, uip_hostaddr);
00424       BUF->opcode = HTONS(ARP_REQUEST); /* ARP request. */
00425       BUF->hwtype = HTONS(ARP_HWTYPE_ETH);
00426       BUF->protocol = HTONS(UIP_ETHTYPE_IP);
00427       BUF->hwlen = 6;
00428       BUF->protolen = 4;
00429       BUF->ethhdr.type = HTONS(UIP_ETHTYPE_ARP);
00430
00431       uip_appdata = &uip_buf[UIP_TCPIP_HLEN + UIP_LLH_LEN];
00432
00433       uip_len = sizeof(struct arp_hdr);
00434       return;
00435     }
00436
00437     /* Build an ethernet header. */
00438     memcpy(IPBUF->ethhdr.dest.addr, tabptr->ethaddr.addr, 6);
00439   }
00440   memcpy(IPBUF->ethhdr.src.addr, uip_ethaddr.addr, 6);
00441
00442   IPBUF->ethhdr.type = HTONS(UIP_ETHTYPE_IP);
00443
00444   uip_len += sizeof(struct uip_eth_hdr);
00445 }
00446 /*-----------------------------------------------------------------------------------*/
00447
Generated on Tue Jun 7 14:59:01 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/uip/uip_arp.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/uip/uip_arp.h

Go to the documentation of this file.
00001
00018 /*
00019  * Copyright (c) 2001-2003, Adam Dunkels.
00020  * All rights reserved.
00021  *
00022  * Redistribution and use in source and binary forms, with or without
00023  * modification, are permitted provided that the following conditions
00024  * are met:
00025  * 1. Redistributions of source code must retain the above copyright
00026  *    notice, this list of conditions and the following disclaimer.
00027  * 2. Redistributions in binary form must reproduce the above copyright
00028  *    notice, this list of conditions and the following disclaimer in the
00029  *    documentation and/or other materials provided with the distribution.
00030  * 3. The name of the author may not be used to endorse or promote
00031  *    products derived from this software without specific prior
00032  *    written permission.
00033  *
00034  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS
00035  * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
00036  * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
00037  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
00038  * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
00039  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
00040  * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
00041  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
00042  * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
00043  * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
00044  * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
00045  *
00046  * This file is part of the uIP TCP/IP stack.
00047  *
00048  * $Id: uip_arp.h,v 1.5 2006/06/11 21:46:39 adam Exp $
00049  *
00050  */
00051
00052 #ifndef __UIP_ARP_H__
00053 #define __UIP_ARP_H__
00054
00055 #include "uip.h"
00056
00057
00058 extern struct uip_eth_addr uip_ethaddr;
00059
00063 #ifdef __ICCARM__
00064         #pragma pack(1)
00065 #endif
00066
00067 #if defined ( __CC_ARM   )
00068 __packed
00069 #elif defined   (  __GNUC__  )
00070 __attribute__ ((__packed__))
00071 #endif
00072 struct uip_eth_hdr {
00073   struct uip_eth_addr dest;
00074   struct uip_eth_addr src;
00075   u16_t type;
00076 }/*PACK_STRUCT_END*/;
00077
00078 #ifdef __ICCARM__
00079         #pragma pack()
00080 #endif
00081
00082 #define UIP_ETHTYPE_ARP 0x0806
00083 #define UIP_ETHTYPE_IP  0x0800
00084 #define UIP_ETHTYPE_IP6 0x86dd
00085
00086
00087 /* The uip_arp_init() function must be called before any of the other
00088    ARP functions. */
00089 void uip_arp_init(void);
00090
00091 /* The uip_arp_ipin() function should be called whenever an IP packet
00092    arrives from the Ethernet. This function refreshes the ARP table or
00093    inserts a new mapping if none exists. The function assumes that an
00094    IP packet with an Ethernet header is present in the uip_buf buffer
00095    and that the length of the packet is in the uip_len variable. */
00096 void uip_arp_ipin(void);
00097 //#define uip_arp_ipin()
00098
00099 /* The uip_arp_arpin() should be called when an ARP packet is received
00100    by the Ethernet driver. This function also assumes that the
00101    Ethernet frame is present in the uip_buf buffer. When the
00102    uip_arp_arpin() function returns, the contents of the uip_buf
00103    buffer should be sent out on the Ethernet if the uip_len variable
00104    is > 0. */
00105 void uip_arp_arpin(void);
00106
00107 /* The uip_arp_out() function should be called when an IP packet
00108    should be sent out on the Ethernet. This function creates an
00109    Ethernet header before the IP header in the uip_buf buffer. The
00110    Ethernet header will have the correct Ethernet MAC destination
00111    address filled in if an ARP table entry for the destination IP
00112    address (or the IP address of the default router) is present. If no
00113    such table entry is found, the IP packet is overwritten with an ARP
00114    request and we rely on TCP to retransmit the packet that was
00115    overwritten. In any case, the uip_len variable holds the length of
00116    the Ethernet frame that should be transmitted. */
00117 void uip_arp_out(void);
00118
00119 /* The uip_arp_timer() function should be called every ten seconds. It
00120    is responsible for flushing old entries in the ARP table. */
00121 void uip_arp_timer(void);
00122
00147 #define uip_setethaddr(eaddr) do {uip_ethaddr.addr[0] = eaddr.addr[0]; \
00148                               uip_ethaddr.addr[1] = eaddr.addr[1];\
00149                               uip_ethaddr.addr[2] = eaddr.addr[2];\
00150                               uip_ethaddr.addr[3] = eaddr.addr[3];\
00151                               uip_ethaddr.addr[4] = eaddr.addr[4];\
00152                               uip_ethaddr.addr[5] = eaddr.addr[5];} while(0)
00153
00157 #endif /* __UIP_ARP_H__ */
Generated on Tue Jun 7 14:59:01 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/uip/uiplib.c Source File

C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/uip/uiplib.c

Go to the documentation of this file.
00001 /*
00002  * Copyright (c) 2004, Adam Dunkels and the Swedish Institute of
00003  * Computer Science.
00004  * All rights reserved.
00005  *
00006  * Redistribution and use in source and binary forms, with or without
00007  * modification, are permitted provided that the following conditions
00008  * are met:
00009  * 1. Redistributions of source code must retain the above copyright
00010  *    notice, this list of conditions and the following disclaimer.
00011  * 2. Redistributions in binary form must reproduce the above copyright
00012  *    notice, this list of conditions and the following disclaimer in the
00013  *    documentation and/or other materials provided with the distribution.
00014  * 3. The name of the author may not be used to endorse or promote
00015  *    products derived from this software without specific prior
00016  *    written permission.
00017  *
00018  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS
00019  * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
00020  * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
00021  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
00022  * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
00023  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
00024  * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
00025  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
00026  * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
00027  * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
00028  * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
00029  *
00030  * This file is part of the uIP TCP/IP stack
00031  *
00032  * $Id: uiplib.c,v 1.2 2006/06/12 08:00:31 adam Exp $
00033  *
00034  */
00035
00036
00037 #include "uip.h"
00038 #include "uiplib.h"
00039
00040
00041 /*-----------------------------------------------------------------------------------*/
00042 unsigned char
00043 uiplib_ipaddrconv(char *addrstr, unsigned char *ipaddr)
00044 {
00045   unsigned char tmp;
00046   char c;
00047   unsigned char i, j;
00048
00049   tmp = 0;
00050
00051   for(i = 0; i < 4; ++i) {
00052     j = 0;
00053     do {
00054       c = *addrstr;
00055       ++j;
00056       if(j > 4) {
00057         return 0;
00058       }
00059       if(c == '.' || c == 0) {
00060         *ipaddr = tmp;
00061         ++ipaddr;
00062         tmp = 0;
00063       } else if(c >= '0' && c <= '9') {
00064         tmp = (tmp * 10) + (c - '0');
00065       } else {
00066         return 0;
00067       }
00068       ++addrstr;
00069     } while(c != '.' && c != 0);
00070   }
00071   return 1;
00072 }
00073
00074 /*-----------------------------------------------------------------------------------*/
Generated on Tue Jun 7 14:59:01 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/uip/uiplib.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/uip/uiplib.h

Go to the documentation of this file.
00001
00009 /*
00010  * Copyright (c) 2002, Adam Dunkels.
00011  * All rights reserved.
00012  *
00013  * Redistribution and use in source and binary forms, with or without
00014  * modification, are permitted provided that the following conditions
00015  * are met:
00016  * 1. Redistributions of source code must retain the above copyright
00017  *    notice, this list of conditions and the following disclaimer.
00018  * 2. Redistributions in binary form must reproduce the above
00019  *    copyright notice, this list of conditions and the following
00020  *    disclaimer in the documentation and/or other materials provided
00021  *    with the distribution.
00022  * 3. The name of the author may not be used to endorse or promote
00023  *    products derived from this software without specific prior
00024  *    written permission.
00025  *
00026  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS
00027  * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
00028  * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
00029  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
00030  * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
00031  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
00032  * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
00033  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
00034  * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
00035  * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
00036  * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
00037  *
00038  * This file is part of the uIP TCP/IP stack
00039  *
00040  * $Id: uiplib.h,v 1.1 2006/06/07 09:15:19 adam Exp $
00041  *
00042  */
00043 #ifndef __UIPLIB_H__
00044 #define __UIPLIB_H__
00045
00067 unsigned char uiplib_ipaddrconv(char *addrstr, unsigned char *addr);
00068
00071 #endif /* __UIPLIB_H__ */
Generated on Tue Jun 7 14:59:01 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/uip/uipopt.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/uip/uipopt.h

Go to the documentation of this file.
00001
00030 /*
00031  * Copyright (c) 2001-2003, Adam Dunkels.
00032  * All rights reserved.
00033  *
00034  * Redistribution and use in source and binary forms, with or without
00035  * modification, are permitted provided that the following conditions
00036  * are met:
00037  * 1. Redistributions of source code must retain the above copyright
00038  *    notice, this list of conditions and the following disclaimer.
00039  * 2. Redistributions in binary form must reproduce the above copyright
00040  *    notice, this list of conditions and the following disclaimer in the
00041  *    documentation and/or other materials provided with the distribution.
00042  * 3. The name of the author may not be used to endorse or promote
00043  *    products derived from this software without specific prior
00044  *    written permission.
00045  *
00046  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS
00047  * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
00048  * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
00049  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
00050  * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
00051  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
00052  * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
00053  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
00054  * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
00055  * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
00056  * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
00057  *
00058  * This file is part of the uIP TCP/IP stack.
00059  *
00060  * $Id: uipopt.h,v 1.4 2006/06/12 08:00:31 adam Exp $
00061  *
00062  */
00063
00064 #ifndef __UIPOPT_H__
00065 #define __UIPOPT_H__
00066
00067 #ifndef UIP_LITTLE_ENDIAN
00068 #define UIP_LITTLE_ENDIAN  3412
00069 #endif /* UIP_LITTLE_ENDIAN */
00070 #ifndef UIP_BIG_ENDIAN
00071 #define UIP_BIG_ENDIAN     1234
00072 #endif /* UIP_BIG_ENDIAN */
00073
00074 #include "uip-conf.h"
00075
00076 /*------------------------------------------------------------------------------*/
00077
00101 #define UIP_FIXEDADDR    0
00102
00115 #ifdef UIP_CONF_PINGADDRCONF
00116 #define UIP_PINGADDRCONF UIP_CONF_PINGADDRCONF
00117 #else /* UIP_CONF_PINGADDRCONF */
00118 #define UIP_PINGADDRCONF 0
00119 #endif /* UIP_CONF_PINGADDRCONF */
00120
00121
00131 #define UIP_FIXEDETHADDR 0
00132
00134 /*------------------------------------------------------------------------------*/
00145 #define UIP_TTL         64
00146
00160 #define UIP_REASSEMBLY 0
00161
00167 #define UIP_REASS_MAXAGE 40
00168
00171 /*------------------------------------------------------------------------------*/
00182 #ifdef UIP_CONF_UDP
00183 #define UIP_UDP UIP_CONF_UDP
00184 #else /* UIP_CONF_UDP */
00185 #define UIP_UDP           0
00186 #endif /* UIP_CONF_UDP */
00187
00196 #ifdef UIP_CONF_UDP_CHECKSUMS
00197 #define UIP_UDP_CHECKSUMS UIP_CONF_UDP_CHECKSUMS
00198 #else
00199 #define UIP_UDP_CHECKSUMS 0
00200 #endif
00201
00207 #ifdef UIP_CONF_UDP_CONNS
00208 #define UIP_UDP_CONNS UIP_CONF_UDP_CONNS
00209 #else /* UIP_CONF_UDP_CONNS */
00210 #define UIP_UDP_CONNS    10
00211 #endif /* UIP_CONF_UDP_CONNS */
00212
00221 /*------------------------------------------------------------------------------*/
00237 #define UIP_ACTIVE_OPEN 1
00238
00248 #ifndef UIP_CONF_MAX_CONNECTIONS
00249 #define UIP_CONNS       10
00250 #else /* UIP_CONF_MAX_CONNECTIONS */
00251 #define UIP_CONNS UIP_CONF_MAX_CONNECTIONS
00252 #endif /* UIP_CONF_MAX_CONNECTIONS */
00253
00254
00262 #ifndef UIP_CONF_MAX_LISTENPORTS
00263 #define UIP_LISTENPORTS 20
00264 #else /* UIP_CONF_MAX_LISTENPORTS */
00265 #define UIP_LISTENPORTS UIP_CONF_MAX_LISTENPORTS
00266 #endif /* UIP_CONF_MAX_LISTENPORTS */
00267
00277 #define UIP_URGDATA      0
00278
00284 #define UIP_RTO         3
00285
00292 #define UIP_MAXRTX      8
00293
00301 #define UIP_MAXSYNRTX      5
00302
00309 #define UIP_TCP_MSS     (UIP_BUFSIZE - UIP_LLH_LEN - UIP_TCPIP_HLEN)
00310
00320 #ifndef UIP_CONF_RECEIVE_WINDOW
00321 #define UIP_RECEIVE_WINDOW UIP_TCP_MSS
00322 #else
00323 #define UIP_RECEIVE_WINDOW UIP_CONF_RECEIVE_WINDOW
00324 #endif
00325
00332 #define UIP_TIME_WAIT_TIMEOUT 120
00333
00334
00336 /*------------------------------------------------------------------------------*/
00350 #ifdef UIP_CONF_ARPTAB_SIZE
00351 #define UIP_ARPTAB_SIZE UIP_CONF_ARPTAB_SIZE
00352 #else
00353 #define UIP_ARPTAB_SIZE 8
00354 #endif
00355
00362 #define UIP_ARP_MAXAGE 120
00363
00366 /*------------------------------------------------------------------------------*/
00367
00382 #ifndef UIP_CONF_BUFFER_SIZE
00383 #define UIP_BUFSIZE     1500
00384 #else /* UIP_CONF_BUFFER_SIZE */
00385 #define UIP_BUFSIZE UIP_CONF_BUFFER_SIZE
00386 #endif /* UIP_CONF_BUFFER_SIZE */
00387
00388
00396 #ifndef UIP_CONF_STATISTICS
00397 #define UIP_STATISTICS  0
00398 #else /* UIP_CONF_STATISTICS */
00399 #define UIP_STATISTICS UIP_CONF_STATISTICS
00400 #endif /* UIP_CONF_STATISTICS */
00401
00411 #ifndef UIP_CONF_LOGGING
00412 #define UIP_LOGGING     0
00413 #else /* UIP_CONF_LOGGING */
00414 #define UIP_LOGGING     UIP_CONF_LOGGING
00415 #endif /* UIP_CONF_LOGGING */
00416
00426 #ifndef UIP_CONF_BROADCAST
00427 #define UIP_BROADCAST 0
00428 #else /* UIP_CONF_BROADCAST */
00429 #define UIP_BROADCAST UIP_CONF_BROADCAST
00430 #endif /* UIP_CONF_BROADCAST */
00431
00438 void uip_log(char *msg);
00439
00449 #ifdef UIP_CONF_LLH_LEN
00450 #define UIP_LLH_LEN UIP_CONF_LLH_LEN
00451 #else /* UIP_CONF_LLH_LEN */
00452 #define UIP_LLH_LEN     14
00453 #endif /* UIP_CONF_LLH_LEN */
00454
00456 /*------------------------------------------------------------------------------*/
00476 #ifdef UIP_CONF_BYTE_ORDER
00477 #define UIP_BYTE_ORDER     UIP_CONF_BYTE_ORDER
00478 #else /* UIP_CONF_BYTE_ORDER */
00479 #define UIP_BYTE_ORDER     UIP_LITTLE_ENDIAN
00480 #endif /* UIP_CONF_BYTE_ORDER */
00481
00483 /*------------------------------------------------------------------------------*/
00484
00543 #endif /* __UIPOPT_H__ */
Generated on Tue Jun 7 14:59:01 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/_htmlsrc/ummainpage.h Source File

C:/nxpdrv/LPC1700CMSIS/_htmlsrc/ummainpage.h

Go to the documentation of this file.
00001
00008 /* Main page ------------------------------------------------------------------ */
00059 /* Main-group definitions ----------------------------------------------------- */
00060
00061 /* CMSIS group definitions ---------------------------------------------------- */
00073 /* ------------------------------------ */
00115 /* LPC1700CMSIS_FwLib_Drivers group definition -------------------------------- */
00125 /* LPC1700CMSIS_Examples group definition -------------------------------- */
00334 /* End Of File ---------------------------------------------------------------- */
00335
Generated on Tue Jun 7 14:58:54 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBAudio/usbaudio.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBAudio/usbaudio.h

Go to the documentation of this file.
00001 /*----------------------------------------------------------------------------
00002  *      Name:    usbaudio.h
00003  *      Purpose: USB Audio Demo Definitions
00004  *      Version: V1.10
00005  *----------------------------------------------------------------------------
00006  *      This software is supplied "AS IS" without any warranties, express,
00007  *      implied or statutory, including but not limited to the implied
00008  *      warranties of fitness for purpose, satisfactory quality and
00009  *      noninfringement. Keil extends you a royalty-free right to reproduce
00010  *      and distribute executable files created using this software for use
00011  *      on NXP Semiconductors LPC family microcontroller devices only. Nothing
00012  *      else gives you the right to use this software.
00013  *
00014  * Copyright (c) 2009 Keil - An ARM Company. All rights reserved.
00015  *---------------------------------------------------------------------------*/
00016
00017 /* Audio Definitions */
00018 #define DATA_FREQ 32000                 /* Audio Data Frequency */
00019 #define P_S       32                    /* Packet Size */
00020 #if USB_DMA
00021 #define P_C       4                     /* Packet Count */
00022 #else
00023 #define P_C       1                     /* Packet Count */
00024 #endif
00025 #define B_S       (8*P_C*P_S)           /* Buffer Size */
00026
00027 /* Push Button Definitions */
00028 // #define PBINT     0x00004000            /* P0.14 */
00029
00030 /* LED Definitions */
00031 #define LEDMSK    0x000000FF            /* P2.0..7 */
00032
00033 /* Audio Demo Variables */
00034 extern uint8_t  Mute;                      /* Mute State */
00035 extern uint32_t Volume;                    /* Volume Level */
00036 extern uint16_t  VolCur;                    /* Volume Current Value */
00037 #if !USB_DMA
00038 extern uint32_t InfoBuf[P_C];              /* Packet Info Buffer */
00039 extern short DataBuf[B_S];              /* Data Buffer */
00040 #else
00041 extern uint32_t *InfoBuf;
00042 extern short *DataBuf;
00043 #endif
00044 extern uint16_t  DataOut;                   /* Data Out Index */
00045 extern uint16_t  DataIn;                    /* Data In Index */
00046 extern uint8_t   DataRun;                   /* Data Stream Run State */
Generated on Tue Jun 7 14:59:04 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBAudio/usbdmain.c Source File

C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBAudio/usbdmain.c

Go to the documentation of this file.
00001 /*----------------------------------------------------------------------------
00002  * Name:    usbmain.c
00003  * Purpose: USB Audio Class Demo
00004  * Version: V1.20
00005  *----------------------------------------------------------------------------
00006  *      This software is supplied "AS IS" without any warranties, express,
00007  *      implied or statutory, including but not limited to the implied
00008  *      warranties of fitness for purpose, satisfactory quality and
00009  *      noninfringement. Keil extends you a royalty-free right to reproduce
00010  *      and distribute executable files created using this software for use
00011  *      on NXP Semiconductors LPC microcontroller devices only. Nothing else
00012  *      gives you the right to use this software.
00013  *
00014  * Copyright (c) 2009 Keil - An ARM Company. All rights reserved.
00015  *---------------------------------------------------------------------------*/
00016
00017 #include "LPC17xx.h"                        /* LPC17xx definitions */
00018 #include "lpc_types.h"
00019
00020 #include "usb.h"
00021 #include "usbcfg.h"
00022 #include "usbhw.h"
00023 #include "usbcore.h"
00024 #include "usbaudio.h"
00025
00026 /* Example group ----------------------------------------------------------- */
00031 uint8_t  Mute;                                 /* Mute State */
00032 uint32_t Volume;                               /* Volume Level */
00033
00034 #if USB_DMA
00035 uint32_t *InfoBuf = (uint32_t *)(DMA_BUF_ADR);
00036 short *DataBuf = (short *)(DMA_BUF_ADR + 4*P_C);
00037 #else
00038 uint32_t InfoBuf[P_C];
00039 short DataBuf[B_S];                         /* Data Buffer */
00040 #endif
00041
00042 uint16_t  DataOut;                              /* Data Out Index */
00043 uint16_t  DataIn;                               /* Data In Index */
00044
00045 uint8_t   DataRun;                              /* Data Stream Run State */
00046 uint16_t  PotVal;                               /* Potenciometer Value */
00047 uint32_t  VUM;                                  /* VU Meter */
00048 uint32_t  Tick;                                 /* Time Tick */
00049
00050
00051 /*
00052  * Get Potenciometer Value
00053  */
00054
00055 void get_potval (void) {
00056   uint32_t val;
00057
00058   LPC_ADC->ADCR |= 0x01000000;              /* Start A/D Conversion */
00059   do {
00060     val = LPC_ADC->ADGDR;                   /* Read A/D Data Register */
00061   } while ((val & 0x80000000) == 0);        /* Wait for end of A/D Conversion */
00062   LPC_ADC->ADCR &= ~0x01000000;             /* Stop A/D Conversion */
00063   PotVal = ((val >> 8) & 0xF8) +            /* Extract Potenciometer Value */
00064            ((val >> 7) & 0x08);
00065 }
00066
00067
00068 /*
00069  * Timer Counter 0 Interrupt Service Routine
00070  *   executed each 31.25us (32kHz frequency)
00071  */
00072
00073 void TIMER0_IRQHandler(void)
00074 {
00075   long  val;
00076   uint32_t cnt;
00077
00078   if (DataRun) {                            /* Data Stream is running */
00079     val = DataBuf[DataOut];                 /* Get Audio Sample */
00080     cnt = (DataIn - DataOut) & (B_S - 1);   /* Buffer Data Count */
00081     if (cnt == (B_S - P_C*P_S)) {           /* Too much Data in Buffer */
00082       DataOut++;                            /* Skip one Sample */
00083     }
00084     if (cnt > (P_C*P_S)) {                  /* Still enough Data in Buffer */
00085       DataOut++;                            /* Update Data Out Index */
00086     }
00087     DataOut &= B_S - 1;                     /* Adjust Buffer Out Index */
00088     if (val < 0) VUM -= val;                /* Accumulate Neg Value */
00089     else         VUM += val;                /* Accumulate Pos Value */
00090     val  *= Volume;                         /* Apply Volume Level */
00091     val >>= 16;                             /* Adjust Value */
00092     val  += 0x8000;                         /* Add Bias */
00093     val  &= 0xFFFF;                         /* Mask Value */
00094   } else {
00095     val = 0x8000;                           /* DAC Middle Point */
00096   }
00097
00098   if (Mute) {
00099     val = 0x8000;                           /* DAC Middle Point */
00100   }
00101
00102   LPC_DAC->DACR = val & 0xFFC0;             /* Set Speaker Output */
00103
00104   if ((Tick++ & 0x03FF) == 0) {             /* On every 1024th Tick */
00105     get_potval();                           /* Get Potenciometer Value */
00106     if (VolCur == 0x8000) {                 /* Check for Minimum Level */
00107       Volume = 0;                           /* No Sound */
00108     } else {
00109       Volume = VolCur * PotVal;             /* Chained Volume Level */
00110     }
00111     val = VUM >> 20;                        /* Scale Accumulated Value */
00112     VUM = 0;                                /* Clear VUM */
00113     if (val > 7) val = 7;                   /* Limit Value */
00114   }
00115
00116   LPC_TIM0->IR = 1;                         /* Clear Interrupt Flag */
00117 }
00118
00119
00120
00121 /*****************************************************************************
00122 **   Main Function  main()
00123 ******************************************************************************/
00124 int main (void)
00125 {
00126   volatile uint32_t pclkdiv, pclk;
00127
00128 //  SystemInit();
00129
00130   LPC_PINCON->PINSEL1 &=~((0x03<<18)|(0x03<<20));
00131   /* P0.25, A0.0, function 01, P0.26 AOUT, function 10 */
00132   LPC_PINCON->PINSEL1 |= ((0x01<<18)|(0x02<<20));
00133
00134   /* Enable CLOCK into ADC controller */
00135   LPC_SC->PCONP |= (1 << 12);
00136
00137   LPC_ADC->ADCR = 0x00200E04;           /* ADC: 10-bit AIN2 @ 4MHz */
00138   LPC_DAC->DACR = 0x00008000;           /* DAC Output set to Middle Point */
00139
00140   /* By default, the PCLKSELx value is zero, thus, the PCLK for
00141   all the peripherals is 1/4 of the SystemFrequency. */
00142   /* Bit 2~3 is for TIMER0 */
00143   pclkdiv = (LPC_SC->PCLKSEL0 >> 2) & 0x03;
00144   switch ( pclkdiv )
00145   {
00146         case 0x00:
00147         default:
00148           pclk = SystemCoreClock/4;
00149         break;
00150         case 0x01:
00151           pclk = SystemCoreClock;
00152         break;
00153         case 0x02:
00154           pclk = SystemCoreClock/2;
00155         break;
00156         case 0x03:
00157           pclk = SystemCoreClock/8;
00158         break;
00159   }
00160
00161   LPC_TIM0->MR0 = pclk/DATA_FREQ - 1;   /* TC0 Match Value 0 */
00162   LPC_TIM0->MCR = 3;                                    /* TCO Interrupt and Reset on MR0 */
00163   LPC_TIM0->TCR = 1;                                    /* TC0 Enable */
00164   NVIC_EnableIRQ(TIMER0_IRQn);
00165
00166   USB_Init();                           /* USB Initialization */
00167   USB_Connect(TRUE);            /* USB Connect */
00168
00169   /********* The main Function is an endless loop ***********/
00170   while( 1 );
00171 }
00172
00173 /******************************************************************************
00174 **                            End Of File
00175 ******************************************************************************/
00176 /*
00177  * @}
00178  */
Generated on Tue Jun 7 14:59:04 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBCDC/vcomdemo.c Source File

C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBCDC/vcomdemo.c

Go to the documentation of this file.
00001 /*----------------------------------------------------------------------------
00002  *      Name:    vcomdemo.c
00003  *      Purpose: USB virtual COM port Demo
00004  *      Version: V1.20
00005  *----------------------------------------------------------------------------
00006  *      This software is supplied "AS IS" without any warranties, express,
00007  *      implied or statutory, including but not limited to the implied
00008  *      warranties of fitness for purpose, satisfactory quality and
00009  *      noninfringement. Keil extends you a royalty-free right to reproduce
00010  *      and distribute executable files created using this software for use
00011  *      on NXP Semiconductors LPC microcontroller devices only. Nothing else
00012  *      gives you the right to use this software.
00013  *
00014  * Copyright (c) 2009 Keil - An ARM Company. All rights reserved.
00015  *---------------------------------------------------------------------------*/
00016
00017 #include "LPC17xx.h"
00018 #include "lpc_types.h"
00019
00020 #include "usb.h"
00021 #include "usbcfg.h"
00022 #include "usbhw.h"
00023 #include "usbcore.h"
00024 #include "cdc.h"
00025 #include "cdcuser.h"
00026 #include "serial.h"
00027 #include "vcomdemo.h"
00028
00029 /* Example group ----------------------------------------------------------- */
00035 /*----------------------------------------------------------------------------
00036  Initialises the VCOM port.
00037  Call this function before using VCOM_putchar or VCOM_getchar
00038  *---------------------------------------------------------------------------*/
00039 void VCOM_Init(void) {
00040 #if PORT_NUM
00041   CDC_Init (1);
00042 #else
00043   CDC_Init (0);
00044 #endif
00045 }
00046
00047
00048 /*----------------------------------------------------------------------------
00049   Reads character from serial port buffer and writes to USB buffer
00050  *---------------------------------------------------------------------------*/
00051 void VCOM_Serial2Usb(void) {
00052   static char serBuf [USB_CDC_BUFSIZE];
00053          int  numBytesRead, numAvailByte;
00054
00055   ser_AvailChar (&numAvailByte);
00056   if (numAvailByte > 0) {
00057     if (CDC_DepInEmpty) {
00058       numBytesRead = ser_Read (&serBuf[0], &numAvailByte);
00059
00060       CDC_DepInEmpty = 0;
00061           USB_WriteEP (CDC_DEP_IN, (unsigned char *)&serBuf[0], numBytesRead);
00062     }
00063   }
00064
00065 }
00066
00067 /*----------------------------------------------------------------------------
00068   Reads character from USB buffer and writes to serial port buffer
00069  *---------------------------------------------------------------------------*/
00070 void VCOM_Usb2Serial(void) {
00071   static char serBuf [32];
00072          int  numBytesToRead, numBytesRead, numAvailByte;
00073
00074   CDC_OutBufAvailChar (&numAvailByte);
00075   if (numAvailByte > 0) {
00076       numBytesToRead = numAvailByte > 32 ? 32 : numAvailByte;
00077       numBytesRead = CDC_RdOutBuf (&serBuf[0], &numBytesToRead);
00078 #if PORT_NUM
00079       ser_Write (1, &serBuf[0], &numBytesRead);
00080 #else
00081       ser_Write (0, &serBuf[0], &numBytesRead);
00082 #endif
00083   }
00084
00085 }
00086
00087
00088 /*----------------------------------------------------------------------------
00089   checks the serial state and initiates notification
00090  *---------------------------------------------------------------------------*/
00091 void VCOM_CheckSerialState (void) {
00092          unsigned short temp;
00093   static unsigned short serialState;
00094
00095   temp = CDC_GetSerialState();
00096   if (serialState != temp) {
00097      serialState = temp;
00098      CDC_NotificationIn();                  // send SERIAL_STATE notification
00099   }
00100 }
00101
00102 /*----------------------------------------------------------------------------
00103   Main Program
00104  *---------------------------------------------------------------------------*/
00105 int main (void) {
00106
00107   VCOM_Init();                              // VCOM Initialization
00108
00109   USB_Init();                               // USB Initialization
00110   USB_Connect(TRUE);                        // USB Connect
00111
00112   while (!USB_Configuration) ;              // wait until USB is configured
00113
00114   while (1) {                               // Loop forever
00115     VCOM_Serial2Usb();                      // read serial port and initiate USB event
00116     VCOM_CheckSerialState();
00117         VCOM_Usb2Serial();
00118   } // end while
00119 } // end main ()
00120
00121 /*
00122  * @}
00123  */
Generated on Tue Jun 7 14:59:05 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBCDC/vcomdemo.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBCDC/vcomdemo.h

Go to the documentation of this file.
00001 /*----------------------------------------------------------------------------
00002  *      Name:    vcomdemo.h
00003  *      Purpose: USB virtual COM port Demo Definitions
00004  *      Version: V1.02
00005  *----------------------------------------------------------------------------
00006  *      This software is supplied "AS IS" without any warranties, express,
00007  *      implied or statutory, including but not limited to the implied
00008  *      warranties of fitness for purpose, satisfactory quality and
00009  *      noninfringement. Keil extends you a royalty-free right to reproduce
00010  *      and distribute executable files created using this software for use
00011  *      on NXP Semiconductors LPC microcontroller devices only. Nothing else
00012  *      gives you the right to use this software.
00013  *
00014  * Copyright (c) 2009 Keil - An ARM Company. All rights reserved.
00015  *---------------------------------------------------------------------------*/
00016
00017 /* Push Button Definitions */
00018 #define S2     0x00000400  /* P2.10 */
00019
00020 /* LED Definitions */
00021 #define LED1   0x00000001  /* P2.00 */
00022 #define LED2   0x00000002  /* P2.01 */
00023 #define LED3   0x00000004  /* P2.02 */
00024 #define LED4   0x00000008  /* P2.03 */
00025 #define LED5   0x00000010  /* P2.04 */
00026 #define LED6   0x00000020  /* P2.05 */
00027 #define LED7   0x00000040  /* P2.06 */
00028 #define LED8   0x00000080  /* P2.07 */
00029
00030 #define LEDMSK 0x000000FF  /* P2.0..7 */
00031
Generated on Tue Jun 7 14:59:05 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/NVIC/VecTable_Relocation/vt_relocation.c Source File

C:/nxpdrv/LPC1700CMSIS/Examples/NVIC/VecTable_Relocation/vt_relocation.c

Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          vt_relocation.c                                 2010-06-18
00003 */
00026 #include <stdio.h>
00027
00028 #include "lpc17xx_libcfg.h"
00029 #include "debug_frmwrk.h"
00030 #include "lpc17xx_gpio.h"
00031 #include "lpc17xx_nvic.h"
00032 #include "lpc17xx_systick.h"
00033
00034
00035 /* Example group ----------------------------------------------------------- */
00041 /************************** PRIVATE DEFINITIONS ***********************/
00042 /* Vector Table Offset */
00043 #define VTOR_OFFSET             0x20080000
00044
00045 /************************** PRIVATE VARIABLES *************************/
00046 uint8_t menu[]=
00047         "********************************************************************************\n\r"
00048         "Hello NXP Semiconductors \n\r"
00049         "Privileged demo \n\r"
00050         "\t - MCU: LPC17xx \n\r"
00051         "\t - Core: ARM CORTEX-M3 \n\r"
00052         "\t - Communicate via: UART0 - 115200 bps \n\r"
00053         "This example used to test NVIC Vector Table Relocation function\n\r"
00054         "********************************************************************************\n\r";
00055 FunctionalState Cur_State = DISABLE;
00056
00057 /************************** PRIVATE FUNCTIONS *************************/
00058
00059 void SysTick_Handler(void);
00060 void print_menu(void);
00061
00062 /*----------------- INTERRUPT SERVICE ROUTINES --------------------------*/
00063 /*********************************************************************/
00068 void SysTick_Handler(void)
00069 {
00070         //Clear System Tick counter flag
00071         SYSTICK_ClearCounterFlag();
00072         //toggle P0.0
00073         if (Cur_State == ENABLE)
00074         {
00075                 //pull-down pin
00076                 GPIO_ClearValue(1, (1<<28));
00077                 Cur_State = DISABLE;
00078         }
00079         else
00080         {
00081                 GPIO_SetValue(1, (1<<28));
00082                 Cur_State = ENABLE;
00083         }
00084 }
00085 /*-------------------------PRIVATE FUNCTIONS------------------------------*/
00086 /*********************************************************************/
00091 void print_menu(void)
00092 {
00093         _DBG(menu);
00094 }
00095
00096
00097 /*-------------------------MAIN FUNCTION------------------------------*/
00098 /*********************************************************************/
00103 int c_entry (void)
00104 {
00105         /* Initialize debug via UART0
00106          * – 115200bps
00107          * – 8 data bit
00108          * – No parity
00109          * – 1 stop bit
00110          * – No flow control
00111          */
00112         debug_frmwrk_init();
00113
00114         // print welcome screen
00115         print_menu();
00116
00117         //Use P0.0 to test System Tick interrupt
00118         GPIO_SetDir(1, (1<<28), 1); //Set P0.0 as output
00119
00120         _DBG("Remapping Vector Table at address: ");
00121         _DBH32(VTOR_OFFSET); _DBG_("");
00122         NVIC_SetVTOR(VTOR_OFFSET);
00123
00124         /* Copy Vector Table from 0x00000000 to new address
00125          * In ROM mode: Vector Interrupt Table is initialized at 0x00000000
00126          * In RAM mode: Vector Interrupt Table is initialized at 0x10000000
00127          * Aligned: 256 words
00128          */
00129
00130 #if(__RAM_MODE__==0)//Run in ROM mode
00131         memcpy(VTOR_OFFSET, 0x00000000, 256*4);
00132 #else
00133         memcpy(VTOR_OFFSET, 0x10000000, 256*4);
00134 #endif
00135
00136         _DBG_("If Vector Table remapping is successful, LED P1.28 will blink by using SysTick interrupt");
00137         //Initialize System Tick with 100ms time interval
00138         SYSTICK_InternalInit(100);
00139         //Enable System Tick interrupt
00140         SYSTICK_IntCmd(ENABLE);
00141         //Enable System Tick Counter
00142         SYSTICK_Cmd(ENABLE);
00143
00144         while(1);
00145         return 1;
00146 }
00147
00148 /* With ARM and GHS toolsets, the entry point is main() - this will
00149  allow the linker to generate wrapper code to setup stacks, allocate
00150  heap area, and initialize and copy code and data segments. For GNU
00151  toolsets, the entry point is through __start() in the crt0_gnu.asm
00152  file, and that startup code will setup stacks and data */
00153 int main(void) {
00154         return c_entry();
00155 }
00156
00157 #ifdef  DEBUG
00158 /*******************************************************************************
00159  * @brief               Reports the name of the source file and the source line number
00160  *                              where the CHECK_PARAM error has occurred.
00161  * @param[in]   file Pointer to the source file name
00162  * @param[in]    line assert_param error line source number
00163  * @return              None
00164  *******************************************************************************/
00165 void check_failed(uint8_t *file, uint32_t line) {
00166         /* User can add his own implementation to report the file name and line number,
00167          ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
00168
00169         /* Infinite loop */
00170         while (1)
00171                 ;
00172 }
00173 #endif
00174
00175 /*
00176  * @}
00177  */
Generated on Tue Jun 7 14:59:02 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/PWR/WDT_DeepSleep/wdt_deepsleep.c Source File

C:/nxpdrv/LPC1700CMSIS/Examples/PWR/WDT_DeepSleep/wdt_deepsleep.c

Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          exti_deepsleep.c                                2010-06-18
00003 */
00026 #include "LPC17xx.h"
00027 #include "lpc17xx_clkpwr.h"
00028 #include "lpc17xx_libcfg.h"
00029 #include "debug_frmwrk.h"
00030 #include "lpc17xx_wdt.h"
00031
00032 /* Example group ----------------------------------------------------------- */
00038 /************************** PRIVATE VARIABLES *************************/
00039 uint8_t menu[]=
00040         "********************************************************************************\n\r"
00041         "Hello NXP Semiconductors \n\r"
00042         "Power control demo \n\r"
00043         "\t - MCU: LPC17xx \n\r"
00044         "\t - Core: ARM CORTEX-M3 \n\r"
00045         "\t - Communicate via: UART0 - 115200 bps \n\r"
00046         "This example used to enter system in deep sleep mode and wake up it by using \n\r "
00047         "Watchdog timer interrupt \n\r"
00048         "********************************************************************************\n\r";
00049 //Watchodog time out in 2 seconds
00050 #define WDT_TIMEOUT     2000000
00051
00052 /************************** PRIVATE FUNCTIONS *************************/
00053 void print_menu(void);
00054 void WDT_IRQHandler(void);
00055
00056 /*----------------- INTERRUPT SERVICE ROUTINES --------------------------*/
00057 void WDT_IRQHandler(void)
00058 {
00059         // Disable WDT interrupt
00060         NVIC_DisableIRQ(WDT_IRQn);
00061         WDT_ClrTimeOutFlag();
00062 }
00063
00064 /*-------------------------PRIVATE FUNCTIONS------------------------------*/
00065 /*********************************************************************/
00070 void print_menu(void)
00071 {
00072         _DBG(menu);
00073 }
00074
00075 /*-------------------------MAIN FUNCTION------------------------------*/
00076 /*********************************************************************/
00081 int c_entry (void)
00082 {
00083         /* Initialize debug via UART0
00084          * – 115200bps
00085          * – 8 data bit
00086          * – No parity
00087          * – 1 stop bit
00088          * – No flow control
00089          */
00090         debug_frmwrk_init();
00091
00092         // print welcome screen
00093         print_menu();
00094
00095         // Init WDT, IRC OSC, interrupt mode, timeout = 2000000 us = 2s
00096         WDT_Init(WDT_CLKSRC_IRC, WDT_MODE_INT_ONLY);
00097
00098         _DBG_("Press '1' to enter system in Deep Sleep mode");
00099         while(_DG !='1');
00100
00101         NVIC_EnableIRQ(WDT_IRQn);
00102         WDT_Start(WDT_TIMEOUT);
00103
00104         _DBG_("Enter Deep Sleep mode!");
00105         _DBG_("Wait 2s for WDT wake-up system...");
00106
00107         /*---------- Disable and disconnect the main PLL0 before enter into Deep-Sleep
00108          * or Power-Down mode <according to errata.lpc1768-16.March.2010> ------------
00109          */
00110         LPC_SC->PLL0CON &= ~(1<<1); /* Disconnect the main PLL (PLL0) */
00111         LPC_SC->PLL0FEED = 0xAA; /* Feed */
00112         LPC_SC->PLL0FEED = 0x55; /* Feed */
00113         while ((LPC_SC->PLL0STAT & (1<<25)) != 0x00); /* Wait for main PLL (PLL0) to disconnect */
00114         LPC_SC->PLL0CON &= ~(1<<0); /* Turn off the main PLL (PLL0) */
00115         LPC_SC->PLL0FEED = 0xAA; /* Feed */
00116         LPC_SC->PLL0FEED = 0x55; /* Feed */
00117         while ((LPC_SC->PLL0STAT & (1<<24)) != 0x00); /* Wait for main PLL (PLL0) to shut down */
00118         /*------------Then enter into PowerDown mode ----------------------------------*/
00119
00120         // Enter target power down mode
00121         CLKPWR_DeepSleep();
00122         SystemInit();
00123         debug_frmwrk_init();
00124         _DBG_("\n\rSystem wake-up!\n\r");
00125         while(1);
00126         return 1;
00127 }
00128
00129
00130 /* With ARM and GHS toolsets, the entry point is main() - this will
00131    allow the linker to generate wrapper code to setup stacks, allocate
00132    heap area, and initialize and copy code and data segments. For GNU
00133    toolsets, the entry point is through __start() in the crt0_gnu.asm
00134    file, and that startup code will setup stacks and data */
00135 int main(void)
00136 {
00137     return c_entry();
00138 }
00139
00140 #ifdef  DEBUG
00141 /*******************************************************************************
00142 * @brief                Reports the name of the source file and the source line number
00143 *                               where the CHECK_PARAM error has occurred.
00144 * @param[in]    file Pointer to the source file name
00145 * @param[in]    line assert_param error line source number
00146 * @return               None
00147 *******************************************************************************/
00148 void check_failed(uint8_t *file, uint32_t line)
00149 {
00150         /* User can add his own implementation to report the file name and line number,
00151          ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
00152
00153         /* Infinite loop */
00154         while(1);
00155 }
00156 #endif
00157
00158 /*
00159  * @}
00160  */
Generated on Tue Jun 7 14:59:02 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/WDT/INTERRUPT/wdt_interrupt_test.c Source File

C:/nxpdrv/LPC1700CMSIS/Examples/WDT/INTERRUPT/wdt_interrupt_test.c

Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          wdt_interrupt_test.c                    2010-05-21
00003 */
00026 #include "lpc17xx_wdt.h"
00027 #include "lpc17xx_libcfg.h"
00028 #include "lpc17xx_pinsel.h"
00029 #include "debug_frmwrk.h"
00030 #include "lpc17xx_gpio.h"
00031
00032 /* Example group ----------------------------------------------------------- */
00038 /************************** PRIVATE DEFINITIONS *************************/
00039 #define MCB_LPC_1768
00040 //#define IAR_LPC_1768
00041
00042 //Watchodog time out in 5 seconds
00043 #define WDT_TIMEOUT     5000000
00044
00045
00046 /************************** PRIVATE VARIABLES *************************/
00047 uint8_t menu1[] =
00048 "********************************************************************************\n\r"
00049 "Hello NXP Semiconductors \n\r"
00050 " Watch dog timer interrupt (test or debug mode) demo \n\r"
00051 "\t - MCU: LPC17xx \n\r"
00052 "\t - Core: Cortex M3 \n\r"
00053 "\t - Communicate via: UART0 -  115200 bps \n\r"
00054 " Use WDT with Internal RC OSC, interrupt mode (test only), timeout = 1 seconds \n\r"
00055 " To generate an interrupt, after interrupt WDT interrupt is disabled immediately! \n\r"
00056 "********************************************************************************\n\r";
00057 uint8_t info1[] = "BEFORE WDT interrupt!\n\r";
00058 uint8_t info2[] = "AFTER WDT interrupt\n\r";
00059
00060 __IO Bool wdt_flag = FALSE;
00061 __IO Bool LED_toggle = FALSE;
00062
00063 /************************** PRIVATE FUNCTION *************************/
00064 void WDT_IRQHandler(void);
00065
00066 void print_menu(void);
00067 void LED_Init (void);
00068
00069 /*----------------- INTERRUPT SERVICE ROUTINES --------------------------*/
00070 /*********************************************************************/
00075 void WDT_IRQHandler(void)
00076 {
00077         // Disable WDT interrupt
00078         NVIC_DisableIRQ(WDT_IRQn);
00079         // Set WDT flag according
00080         if (wdt_flag == TRUE)
00081                 wdt_flag = FALSE;
00082         else
00083                 wdt_flag = TRUE;
00084         // Clear TimeOut flag
00085         WDT_ClrTimeOutFlag();
00086 }
00087
00088 /*-------------------------PRIVATE FUNCTIONS------------------------------*/
00089 /*********************************************************************/
00094 void print_menu(void)
00095 {
00096         _DBG(menu1);
00097 }
00098
00099 /*********************************************************************/
00104 void LED_Init (void)
00105 {
00106 #ifdef MCB_LPC_1768 /* Using LED2.2 for testing */
00107         //turn on LED2.2
00108         FIO_SetDir(2,(1<<2),1);
00109         FIO_SetValue(2,(1<<2));
00110 #elif defined(IAR_LPC_1768) /* Using LED1 (P1.25 for testing */
00111         FIO_SetDir(1,(1<<25),1);
00112         FIO_ClearValue(1,(1<<25));
00113 #endif
00114 }
00115
00116 /*-------------------------MAIN FUNCTION------------------------------*/
00117 /*********************************************************************/
00122 int c_entry(void)
00123 {
00124         uint32_t delay;
00125         // Init LED port
00126         LED_Init();
00127
00128         /* Initialize debug via UART0
00129          * – 115200bps
00130          * – 8 data bit
00131          * – No parity
00132          * – 1 stop bit
00133          * – No flow control
00134          */
00135         debug_frmwrk_init();
00136
00137         // print welcome screen
00138         print_menu();
00139
00140         /* Install interrupt for WDT interrupt */
00141         NVIC_SetPriority(WDT_IRQn, 0x10);
00142         // Set Watchdog use internal RC, just generate interrupt only in 5ms if Watchdog is not feed
00143
00144         // Init WDT, IRC OSC, interrupt mode, timeout = 5000000 us = 5s
00145         WDT_Init(WDT_CLKSRC_IRC, WDT_MODE_INT_ONLY);
00146
00147         /* Enable the Watch dog interrupt*/
00148         NVIC_EnableIRQ(WDT_IRQn);
00149
00150         while (1)
00151         {
00152                 if (wdt_flag == FALSE){ //before WDT interrupt
00153                         _DBG_(info1);
00154                         _DBG_("Press '1' to enable Watchdog timer...");
00155                         while(_DG !='1');
00156                         // Start watchdog with timeout given
00157                         WDT_Start(WDT_TIMEOUT);
00158                         while(wdt_flag == FALSE)
00159                         {
00160                                 _DBD32(WDT_GetCurrentCount()); _DBG_("");
00161                         }
00162                 } else { // after WDT interrupt
00163                         _DBG_(info2);
00164                         _DBG_("LED is blinking...");
00165                         while(wdt_flag == TRUE)
00166                         {
00167                                 if (LED_toggle == FALSE)
00168                                 {
00169 #ifdef MCB_LPC_1768
00170                                         //turn on LED
00171                                         GPIO_SetValue(2,(1<<2));
00172 #elif defined(IAR_LPC_1768)
00173                                         GPIO_ClearValue(1,(1<<25));
00174 #endif
00175                                         LED_toggle = TRUE;
00176                                 }
00177                                 else
00178                                 {
00179 #ifdef MCB_LPC_1768
00180                                         //turn off LED
00181                                         GPIO_ClearValue(2,(1<<2));
00182 #elif defined(IAR_LPC_1768)
00183                                         GPIO_SetValue(1,(1<<25));
00184 #endif
00185                                         LED_toggle = FALSE;
00186                                 }
00187                                 //delay
00188                                 for(delay = 0; delay<1000000; delay ++);
00189                         }
00190                 }
00191         }
00192         return 1;
00193 }
00194
00195 /* Support required entry point for other toolchain */
00196 int main (void)
00197 {
00198         return c_entry();
00199 }
00200 #ifdef  DEBUG
00201 /*******************************************************************************
00202 * @brief                Reports the name of the source file and the source line number
00203 *                               where the CHECK_PARAM error has occurred.
00204 * @param[in]    file Pointer to the source file name
00205 * @param[in]    line assert_param error line source number
00206 * @return               None
00207 *******************************************************************************/
00208 void check_failed(uint8_t *file, uint32_t line)
00209 {
00210         /* User can add his own implementation to report the file name and line number,
00211          ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
00212
00213         /* Infinite loop */
00214         while(1);
00215 }
00216 #endif
00217
00218 /*
00219  * @}
00220  */
Generated on Tue Jun 7 14:59:05 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/WDT/RESET/wdt_reset_test.c Source File

C:/nxpdrv/LPC1700CMSIS/Examples/WDT/RESET/wdt_reset_test.c

Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          wdt_reset_test.c                        2010-05-21
00003 */
00025 #include "lpc17xx_wdt.h"
00026 #include "lpc17xx_libcfg.h"
00027 #include "lpc17xx_pinsel.h"
00028 #include "debug_frmwrk.h"
00029 #include "lpc17xx_gpio.h"
00030
00031 /* Example group ----------------------------------------------------------- */
00037 /************************** PRIVATE DEFINITIONS *************************/
00038 //#define MCB_LPC_1768
00039 #define IAR_LPC_1768
00040
00041 //Watchodog time out in 5 seconds
00042 #define WDT_TIMEOUT     5000000
00043
00044
00045 /************************** PRIVATE VARIABLES *************************/
00046 uint8_t menu1[] =
00047 "********************************************************************************\n\r"
00048 "This Welcome Screen below will executive after reset event \n\r"
00049 "Hello NXP Semiconductors \n\r"
00050 " Watch dog timer reset when timeout demo \n\r"
00051 "\t - MCU: LPC17xx \n\r"
00052 "\t - Core: Cortex M3 \n\r"
00053 "\t - Communicate via: UART0 - 115200 bps \n\r"
00054 " Use WDT with Internal RC OSC, reset mode, timeout = 5 seconds \n\r"
00055 " To reset MCU when time out. After reset, program will determine what cause of "
00056 " last reset time (external reset or WDT time-out)\n\r"
00057 "********************************************************************************\n\r";
00058 uint8_t info1[] = "Last MCU reset caused by WDT TimeOut!\n\r";
00059 uint8_t info2[] = "Last MCU reset caused by External!\n\r";
00060
00061 /*-------------------------MAIN FUNCTION------------------------------*/
00062 /*********************************************************************/
00067 int c_entry(void)
00068 {
00069         /* Initialize debug via UART0
00070          * – 115200bps
00071          * – 8 data bit
00072          * – No parity
00073          * – 1 stop bit
00074          * – No flow control
00075          */
00076         debug_frmwrk_init();
00077
00078         // print welcome screen
00079         _DBG(menu1);
00080
00081         // Read back TimeOut flag to determine previous timeout reset
00082         if (WDT_ReadTimeOutFlag()){
00083                 _DBG_(info1);
00084                 // Clear WDT TimeOut
00085                 WDT_ClrTimeOutFlag();
00086         } else{
00087                 _DBG_(info2);
00088         }
00089
00090         // Initialize WDT, IRC OSC, interrupt mode, timeout = 5000000us = 5s
00091         WDT_Init(WDT_CLKSRC_IRC, WDT_MODE_RESET);
00092         // Start watchdog with timeout given
00093         WDT_Start(WDT_TIMEOUT);
00094
00095         //infinite loop to wait chip reset from WDT
00096         while(1);
00097
00098         return 0;
00099 }
00100
00101 /* Support required entry point for other toolchain */
00102 int main (void)
00103 {
00104         return c_entry();
00105 }
00106 #ifdef  DEBUG
00107 /*******************************************************************************
00108 * @brief                Reports the name of the source file and the source line number
00109 *                               where the CHECK_PARAM error has occurred.
00110 * @param[in]    file Pointer to the source file name
00111 * @param[in]    line assert_param error line source number
00112 * @return               None
00113 *******************************************************************************/
00114 void check_failed(uint8_t *file, uint32_t line)
00115 {
00116         /* User can add his own implementation to report the file name and line number,
00117          ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
00118
00119         /* Infinite loop */
00120         while(1);
00121 }
00122 #endif
00123
00124 /*
00125  * @}
00126  */
Generated on Tue Jun 7 14:59:05 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/webclient/webclient-strings.c Source File

C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/webclient/webclient-strings.c

Go to the documentation of this file.
00001 const char http_http[8] =
00002 /* "http://" */
00003 {0x68, 0x74, 0x74, 0x70, 0x3a, 0x2f, 0x2f, 0 };
00004 const char http_200[5] =
00005 /* "200 " */
00006 {0x32, 0x30, 0x30, 0x20, 0 };
00007 const char http_301[5] =
00008 /* "301 " */
00009 {0x33, 0x30, 0x31, 0x20, 0 };
00010 const char http_302[5] =
00011 /* "302 " */
00012 {0x33, 0x30, 0x32, 0x20, 0 };
00013 const char http_get[5] =
00014 /* "GET " */
00015 {0x47, 0x45, 0x54, 0x20, 0 };
00016 const char http_10[9] =
00017 /* "HTTP/1.0" */
00018 {0x48, 0x54, 0x54, 0x50, 0x2f, 0x31, 0x2e, 0x30, 0 };
00019 const char http_11[9] =
00020 /* "HTTP/1.1" */
00021 {0x48, 0x54, 0x54, 0x50, 0x2f, 0x31, 0x2e, 0x31, 0 };
00022 const char http_content_type[15] =
00023 /* "content-type: " */
00024 {0x63, 0x6f, 0x6e, 0x74, 0x65, 0x6e, 0x74, 0x2d, 0x74, 0x79, 0x70, 0x65, 0x3a, 0x20, 0 };
00025 const char http_texthtml[10] =
00026 /* "text/html" */
00027 {0x74, 0x65, 0x78, 0x74, 0x2f, 0x68, 0x74, 0x6d, 0x6c, 0 };
00028 const char http_location[11] =
00029 /* "location: " */
00030 {0x6c, 0x6f, 0x63, 0x61, 0x74, 0x69, 0x6f, 0x6e, 0x3a, 0x20, 0 };
00031 const char http_host[7] =
00032 /* "host: " */
00033 {0x68, 0x6f, 0x73, 0x74, 0x3a, 0x20, 0 };
00034 const char http_crnl[3] =
00035 /* "\r\n" */
00036 {0xd, 0xa, 0 };
00037 const char http_index_html[12] =
00038 /* "/index.html" */
00039 {0x2f, 0x69, 0x6e, 0x64, 0x65, 0x78, 0x2e, 0x68, 0x74, 0x6d, 0x6c, 0 };
00040 const char http_404_html[10] =
00041 /* "/404.html" */
00042 {0x2f, 0x34, 0x30, 0x34, 0x2e, 0x68, 0x74, 0x6d, 0x6c, 0 };
00043 const char http_content_type_html[28] =
00044 /* "Content-type: text/html\r\n\r\n" */
00045 {0x43, 0x6f, 0x6e, 0x74, 0x65, 0x6e, 0x74, 0x2d, 0x74, 0x79, 0x70, 0x65, 0x3a, 0x20, 0x74, 0x65, 0x78, 0x74, 0x2f, 0x68, 0x74, 0x6d, 0x6c, 0xd, 0xa, 0xd, 0xa, 0 };
00046 const char http_content_type_css [27] =
00047 /* "Content-type: text/css\r\n\r\n" */
00048 {0x43, 0x6f, 0x6e, 0x74, 0x65, 0x6e, 0x74, 0x2d, 0x74, 0x79, 0x70, 0x65, 0x3a, 0x20, 0x74, 0x65, 0x78, 0x74, 0x2f, 0x63, 0x73, 0x73, 0xd, 0xa, 0xd, 0xa, 0 };
00049 const char http_content_type_text[28] =
00050 /* "Content-type: text/text\r\n\r\n" */
00051 {0x43, 0x6f, 0x6e, 0x74, 0x65, 0x6e, 0x74, 0x2d, 0x74, 0x79, 0x70, 0x65, 0x3a, 0x20, 0x74, 0x65, 0x78, 0x74, 0x2f, 0x74, 0x65, 0x78, 0x74, 0xd, 0xa, 0xd, 0xa, 0 };
00052 const char http_content_type_png [28] =
00053 /* "Content-type: image/png\r\n\r\n" */
00054 {0x43, 0x6f, 0x6e, 0x74, 0x65, 0x6e, 0x74, 0x2d, 0x74, 0x79, 0x70, 0x65, 0x3a, 0x20, 0x69, 0x6d, 0x61, 0x67, 0x65, 0x2f, 0x70, 0x6e, 0x67, 0xd, 0xa, 0xd, 0xa, 0 };
00055 const char http_content_type_gif [28] =
00056 /* "Content-type: image/gif\r\n\r\n" */
00057 {0x43, 0x6f, 0x6e, 0x74, 0x65, 0x6e, 0x74, 0x2d, 0x74, 0x79, 0x70, 0x65, 0x3a, 0x20, 0x69, 0x6d, 0x61, 0x67, 0x65, 0x2f, 0x67, 0x69, 0x66, 0xd, 0xa, 0xd, 0xa, 0 };
00058 const char http_content_type_jpg [29] =
00059 /* "Content-type: image/jpeg\r\n\r\n" */
00060 {0x43, 0x6f, 0x6e, 0x74, 0x65, 0x6e, 0x74, 0x2d, 0x74, 0x79, 0x70, 0x65, 0x3a, 0x20, 0x69, 0x6d, 0x61, 0x67, 0x65, 0x2f, 0x6a, 0x70, 0x65, 0x67, 0xd, 0xa, 0xd, 0xa, 0 };
00061 const char http_content_type_binary[43] =
00062 /* "Content-type: application/octet-stream\r\n\r\n" */
00063 {0x43, 0x6f, 0x6e, 0x74, 0x65, 0x6e, 0x74, 0x2d, 0x74, 0x79, 0x70, 0x65, 0x3a, 0x20, 0x61, 0x70, 0x70, 0x6c, 0x69, 0x63, 0x61, 0x74, 0x69, 0x6f, 0x6e, 0x2f, 0x6f, 0x63, 0x74, 0x65, 0x74, 0x2d, 0x73, 0x74, 0x72, 0x65, 0x61, 0x6d, 0xd, 0xa, 0xd, 0xa, 0 };
00064 const char http_html[6] =
00065 /* ".html" */
00066 {0x2e, 0x68, 0x74, 0x6d, 0x6c, 0 };
00067 const char http_shtml[7] =
00068 /* ".shtml" */
00069 {0x2e, 0x73, 0x68, 0x74, 0x6d, 0x6c, 0 };
00070 const char http_htm[5] =
00071 /* ".htm" */
00072 {0x2e, 0x68, 0x74, 0x6d, 0 };
00073 const char http_css[5] =
00074 /* ".css" */
00075 {0x2e, 0x63, 0x73, 0x73, 0 };
00076 const char http_png[5] =
00077 /* ".png" */
00078 {0x2e, 0x70, 0x6e, 0x67, 0 };
00079 const char http_gif[5] =
00080 /* ".gif" */
00081 {0x2e, 0x67, 0x69, 0x66, 0 };
00082 const char http_jpg[5] =
00083 /* ".jpg" */
00084 {0x2e, 0x6a, 0x70, 0x67, 0 };
00085 const char http_text[6] =
00086 /* ".text" */
00087 {0x2e, 0x74, 0x65, 0x78, 0x74, 0 };
00088 const char http_txt[5] =
00089 /* ".txt" */
00090 {0x2e, 0x74, 0x78, 0x74, 0 };
00091 const char http_user_agent_fields[77] =
00092 /* "Connection: close\r\nUser-Agent: uIP/1.0 (; http://www.sics.se/~adam/uip/)\r\n\r\n" */
00093 {0x43, 0x6f, 0x6e, 0x6e, 0x65, 0x63, 0x74, 0x69, 0x6f, 0x6e, 0x3a, 0x20, 0x63, 0x6c, 0x6f, 0x73, 0x65, 0xd, 0xa, 0x55, 0x73, 0x65, 0x72, 0x2d, 0x41, 0x67, 0x65, 0x6e, 0x74, 0x3a, 0x20, 0x75, 0x49, 0x50, 0x2f, 0x31, 0x2e, 0x30, 0x20, 0x28, 0x3b, 0x20, 0x68, 0x74, 0x74, 0x70, 0x3a, 0x2f, 0x2f, 0x77, 0x77, 0x77, 0x2e, 0x73, 0x69, 0x63, 0x73, 0x2e, 0x73, 0x65, 0x2f, 0x7e, 0x61, 0x64, 0x61, 0x6d, 0x2f, 0x75, 0x69, 0x70, 0x2f, 0x29, 0xd, 0xa, 0xd, 0xa, 0 };
Generated on Tue Jun 7 14:58:59 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/webclient/webclient-strings.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/webclient/webclient-strings.h

Go to the documentation of this file.
00001 extern const char http_http[8];
00002 extern const char http_200[5];
00003 extern const char http_301[5];
00004 extern const char http_302[5];
00005 extern const char http_get[5];
00006 extern const char http_10[9];
00007 extern const char http_11[9];
00008 extern const char http_content_type[15];
00009 extern const char http_texthtml[10];
00010 extern const char http_location[11];
00011 extern const char http_host[7];
00012 extern const char http_crnl[3];
00013 extern const char http_index_html[12];
00014 extern const char http_404_html[10];
00015 extern const char http_content_type_html[28];
00016 extern const char http_content_type_css [27];
00017 extern const char http_content_type_text[28];
00018 extern const char http_content_type_png [28];
00019 extern const char http_content_type_gif [28];
00020 extern const char http_content_type_jpg [29];
00021 extern const char http_content_type_binary[43];
00022 extern const char http_html[6];
00023 extern const char http_shtml[7];
00024 extern const char http_htm[5];
00025 extern const char http_css[5];
00026 extern const char http_png[5];
00027 extern const char http_gif[5];
00028 extern const char http_jpg[5];
00029 extern const char http_text[6];
00030 extern const char http_txt[5];
00031 extern const char http_user_agent_fields[77];
Generated on Tue Jun 7 14:58:59 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/webclient/webclient.c Source File

C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/webclient/webclient.c

Go to the documentation of this file.
00001
00026 /*
00027  * Copyright (c) 2002, Adam Dunkels.
00028  * All rights reserved.
00029  *
00030  * Redistribution and use in source and binary forms, with or without
00031  * modification, are permitted provided that the following conditions
00032  * are met:
00033  * 1. Redistributions of source code must retain the above copyright
00034  *    notice, this list of conditions and the following disclaimer.
00035  * 2. Redistributions in binary form must reproduce the above
00036  *    copyright notice, this list of conditions and the following
00037  *    disclaimer in the documentation and/or other materials provided
00038  *    with the distribution.
00039  * 3. The name of the author may not be used to endorse or promote
00040  *    products derived from this software without specific prior
00041  *    written permission.
00042  *
00043  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS
00044  * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
00045  * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
00046  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
00047  * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
00048  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
00049  * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
00050  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
00051  * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
00052  * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
00053  * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
00054  *
00055  * This file is part of the uIP TCP/IP stack.
00056  *
00057  * $Id: webclient.c,v 1.2 2006/06/11 21:46:37 adam Exp $
00058  *
00059  */
00060
00061 #include "uip.h"
00062 #include "uiplib.h"
00063 #include "webclient.h"
00064 #include "resolv.h"
00065
00066 #include <string.h>
00067
00068 #define WEBCLIENT_TIMEOUT 100
00069
00070 #define WEBCLIENT_STATE_STATUSLINE 0
00071 #define WEBCLIENT_STATE_HEADERS    1
00072 #define WEBCLIENT_STATE_DATA       2
00073 #define WEBCLIENT_STATE_CLOSE      3
00074
00075 #define HTTPFLAG_NONE   0
00076 #define HTTPFLAG_OK     1
00077 #define HTTPFLAG_MOVED  2
00078 #define HTTPFLAG_ERROR  3
00079
00080
00081 #define ISO_nl       0x0a
00082 #define ISO_cr       0x0d
00083 #define ISO_space    0x20
00084
00085
00086 static struct webclient_state s;
00087
00088 /*-----------------------------------------------------------------------------------*/
00089 char *
00090 webclient_mimetype(void)
00091 {
00092   return s.mimetype;
00093 }
00094 /*-----------------------------------------------------------------------------------*/
00095 char *
00096 webclient_filename(void)
00097 {
00098   return s.file;
00099 }
00100 /*-----------------------------------------------------------------------------------*/
00101 char *
00102 webclient_hostname(void)
00103 {
00104   return s.host;
00105 }
00106 /*-----------------------------------------------------------------------------------*/
00107 unsigned short
00108 webclient_port(void)
00109 {
00110   return s.port;
00111 }
00112 /*-----------------------------------------------------------------------------------*/
00113 void
00114 webclient_init(void)
00115 {
00116
00117 }
00118 /*-----------------------------------------------------------------------------------*/
00119 static void
00120 init_connection(void)
00121 {
00122   s.state = WEBCLIENT_STATE_STATUSLINE;
00123
00124   s.getrequestleft = sizeof(http_get) - 1 + 1 +
00125     sizeof(http_10) - 1 +
00126     sizeof(http_crnl) - 1 +
00127     sizeof(http_host) - 1 +
00128     sizeof(http_crnl) - 1 +
00129     strlen(http_user_agent_fields) +
00130     strlen(s.file) + strlen(s.host);
00131   s.getrequestptr = 0;
00132
00133   s.httpheaderlineptr = 0;
00134 }
00135 /*-----------------------------------------------------------------------------------*/
00136 void
00137 webclient_close(void)
00138 {
00139   s.state = WEBCLIENT_STATE_CLOSE;
00140 }
00141 /*-----------------------------------------------------------------------------------*/
00142 unsigned char
00143 webclient_get(char *host, u16_t port, char *file)
00144 {
00145   struct uip_conn *conn;
00146   uip_ipaddr_t *ipaddr;
00147   static uip_ipaddr_t addr;
00148
00149   /* First check if the host is an IP address. */
00150   ipaddr = &addr;
00151   if(uiplib_ipaddrconv(host, (unsigned char *)addr) == 0) {
00152     ipaddr = (uip_ipaddr_t *)resolv_lookup(host);
00153
00154     if(ipaddr == NULL) {
00155       return 0;
00156     }
00157   }
00158
00159   conn = uip_connect(ipaddr, htons(port));
00160
00161   if(conn == NULL) {
00162     return 0;
00163   }
00164
00165   s.port = port;
00166   strncpy(s.file, file, sizeof(s.file));
00167   strncpy(s.host, host, sizeof(s.host));
00168
00169   init_connection();
00170   return 1;
00171 }
00172 /*-----------------------------------------------------------------------------------*/
00173 static unsigned char *
00174 copy_string(unsigned char *dest,
00175             const unsigned char *src, unsigned char len)
00176 {
00177   strncpy(dest, src, len);
00178   return dest + len;
00179 }
00180 /*-----------------------------------------------------------------------------------*/
00181 static void
00182 senddata(void)
00183 {
00184   u16_t len;
00185   char *getrequest;
00186   char *cptr;
00187
00188   if(s.getrequestleft > 0) {
00189     cptr = getrequest = (char *)uip_appdata;
00190
00191     cptr = copy_string(cptr, http_get, sizeof(http_get) - 1);
00192     cptr = copy_string(cptr, s.file, strlen(s.file));
00193     *cptr++ = ISO_space;
00194     cptr = copy_string(cptr, http_10, sizeof(http_10) - 1);
00195
00196     cptr = copy_string(cptr, http_crnl, sizeof(http_crnl) - 1);
00197
00198     cptr = copy_string(cptr, http_host, sizeof(http_host) - 1);
00199     cptr = copy_string(cptr, s.host, strlen(s.host));
00200     cptr = copy_string(cptr, http_crnl, sizeof(http_crnl) - 1);
00201
00202     cptr = copy_string(cptr, http_user_agent_fields,
00203                        strlen(http_user_agent_fields));
00204
00205     len = s.getrequestleft > uip_mss()?
00206       uip_mss():
00207       s.getrequestleft;
00208     uip_send(&(getrequest[s.getrequestptr]), len);
00209   }
00210 }
00211 /*-----------------------------------------------------------------------------------*/
00212 static void
00213 acked(void)
00214 {
00215   u16_t len;
00216
00217   if(s.getrequestleft > 0) {
00218     len = s.getrequestleft > uip_mss()?
00219       uip_mss():
00220       s.getrequestleft;
00221     s.getrequestleft -= len;
00222     s.getrequestptr += len;
00223   }
00224 }
00225 /*-----------------------------------------------------------------------------------*/
00226 static u16_t
00227 parse_statusline(u16_t len)
00228 {
00229   char *cptr;
00230
00231   while(len > 0 && s.httpheaderlineptr < sizeof(s.httpheaderline)) {
00232     s.httpheaderline[s.httpheaderlineptr] = *(char *)uip_appdata;
00233     ++((char *)uip_appdata);
00234     --len;
00235     if(s.httpheaderline[s.httpheaderlineptr] == ISO_nl) {
00236
00237       if((strncmp(s.httpheaderline, http_10,
00238                   sizeof(http_10) - 1) == 0) ||
00239          (strncmp(s.httpheaderline, http_11,
00240                   sizeof(http_11) - 1) == 0)) {
00241         cptr = &(s.httpheaderline[9]);
00242         s.httpflag = HTTPFLAG_NONE;
00243         if(strncmp(cptr, http_200, sizeof(http_200) - 1) == 0) {
00244           /* 200 OK */
00245           s.httpflag = HTTPFLAG_OK;
00246         } else if(strncmp(cptr, http_301, sizeof(http_301) - 1) == 0 ||
00247                   strncmp(cptr, http_302, sizeof(http_302) - 1) == 0) {
00248           /* 301 Moved permanently or 302 Found. Location: header line
00249              will contain thw new location. */
00250           s.httpflag = HTTPFLAG_MOVED;
00251         } else {
00252           s.httpheaderline[s.httpheaderlineptr - 1] = 0;
00253         }
00254       } else {
00255         uip_abort();
00256         webclient_aborted();
00257         return 0;
00258       }
00259
00260       /* We're done parsing the status line, so we reset the pointer
00261          and start parsing the HTTP headers.*/
00262       s.httpheaderlineptr = 0;
00263       s.state = WEBCLIENT_STATE_HEADERS;
00264       break;
00265     } else {
00266       ++s.httpheaderlineptr;
00267     }
00268   }
00269   return len;
00270 }
00271 /*-----------------------------------------------------------------------------------*/
00272 static char
00273 casecmp(char *str1, const char *str2, char len)
00274 {
00275   static char c;
00276
00277   while(len > 0) {
00278     c = *str1;
00279     /* Force lower-case characters. */
00280     if(c & 0x40) {
00281       c |= 0x20;
00282     }
00283     if(*str2 != c) {
00284       return 1;
00285     }
00286     ++str1;
00287     ++str2;
00288     --len;
00289   }
00290   return 0;
00291 }
00292 /*-----------------------------------------------------------------------------------*/
00293 static u16_t
00294 parse_headers(u16_t len)
00295 {
00296   char *cptr;
00297   static unsigned char i;
00298
00299   while(len > 0 && s.httpheaderlineptr < sizeof(s.httpheaderline)) {
00300     s.httpheaderline[s.httpheaderlineptr] = *(char *)uip_appdata;
00301     ++((char *)uip_appdata);
00302     --len;
00303     if(s.httpheaderline[s.httpheaderlineptr] == ISO_nl) {
00304       /* We have an entire HTTP header line in s.httpheaderline, so
00305          we parse it. */
00306       if(s.httpheaderline[0] == ISO_cr) {
00307         /* This was the last header line (i.e., and empty "\r\n"), so
00308            we are done with the headers and proceed with the actual
00309            data. */
00310         s.state = WEBCLIENT_STATE_DATA;
00311         return len;
00312       }
00313
00314       s.httpheaderline[s.httpheaderlineptr - 1] = 0;
00315       /* Check for specific HTTP header fields. */
00316       if(casecmp(s.httpheaderline, http_content_type,
00317                      sizeof(http_content_type) - 1) == 0) {
00318         /* Found Content-type field. */
00319         cptr = strchr(s.httpheaderline, ';');
00320         if(cptr != NULL) {
00321           *cptr = 0;
00322         }
00323         strncpy(s.mimetype, s.httpheaderline +
00324                 sizeof(http_content_type) - 1, sizeof(s.mimetype));
00325       } else if(casecmp(s.httpheaderline, http_location,
00326                             sizeof(http_location) - 1) == 0) {
00327         cptr = s.httpheaderline +
00328           sizeof(http_location) - 1;
00329
00330         if(strncmp(cptr, http_http, 7) == 0) {
00331           cptr += 7;
00332           for(i = 0; i < s.httpheaderlineptr - 7; ++i) {
00333             if(*cptr == 0 ||
00334                *cptr == '/' ||
00335                *cptr == ' ' ||
00336                *cptr == ':') {
00337               s.host[i] = 0;
00338               break;
00339             }
00340             s.host[i] = *cptr;
00341             ++cptr;
00342           }
00343         }
00344         strncpy(s.file, cptr, sizeof(s.file));
00345         /*      s.file[s.httpheaderlineptr - i] = 0;*/
00346       }
00347
00348
00349       /* We're done parsing, so we reset the pointer and start the
00350          next line. */
00351       s.httpheaderlineptr = 0;
00352     } else {
00353       ++s.httpheaderlineptr;
00354     }
00355   }
00356   return len;
00357 }
00358 /*-----------------------------------------------------------------------------------*/
00359 static void
00360 newdata(void)
00361 {
00362   u16_t len;
00363
00364   len = uip_datalen();
00365
00366   if(s.state == WEBCLIENT_STATE_STATUSLINE) {
00367     len = parse_statusline(len);
00368   }
00369
00370   if(s.state == WEBCLIENT_STATE_HEADERS && len > 0) {
00371     len = parse_headers(len);
00372   }
00373
00374   if(len > 0 && s.state == WEBCLIENT_STATE_DATA &&
00375      s.httpflag != HTTPFLAG_MOVED) {
00376     webclient_datahandler((char *)uip_appdata, len);
00377   }
00378 }
00379 /*-----------------------------------------------------------------------------------*/
00380 void
00381 webclient_appcall(void)
00382 {
00383   if(uip_connected()) {
00384     s.timer = 0;
00385     s.state = WEBCLIENT_STATE_STATUSLINE;
00386     senddata();
00387     webclient_connected();
00388     return;
00389   }
00390
00391   if(s.state == WEBCLIENT_STATE_CLOSE) {
00392     webclient_closed();
00393     uip_abort();
00394     return;
00395   }
00396
00397   if(uip_aborted()) {
00398     webclient_aborted();
00399   }
00400   if(uip_timedout()) {
00401     webclient_timedout();
00402   }
00403
00404
00405   if(uip_acked()) {
00406     s.timer = 0;
00407     acked();
00408   }
00409   if(uip_newdata()) {
00410     s.timer = 0;
00411     newdata();
00412   }
00413   if(uip_rexmit() ||
00414      uip_newdata() ||
00415      uip_acked()) {
00416     senddata();
00417   } else if(uip_poll()) {
00418     ++s.timer;
00419     if(s.timer == WEBCLIENT_TIMEOUT) {
00420       webclient_timedout();
00421       uip_abort();
00422       return;
00423     }
00424         /*    senddata();*/
00425   }
00426
00427   if(uip_closed()) {
00428     if(s.httpflag != HTTPFLAG_MOVED) {
00429       /* Send NULL data to signal EOF. */
00430       webclient_datahandler(NULL, 0);
00431     } else {
00432       if(resolv_lookup(s.host) == NULL) {
00433         resolv_query(s.host);
00434       }
00435       webclient_get(s.host, s.port, s.file);
00436     }
00437   }
00438 }
00439 /*-----------------------------------------------------------------------------------*/
00440
Generated on Tue Jun 7 14:59:00 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/webclient/webclient.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/webclient/webclient.h

Go to the documentation of this file.
00001
00012 /*
00013  * Copyright (c) 2002, Adam Dunkels.
00014  * All rights reserved.
00015  *
00016  * Redistribution and use in source and binary forms, with or without
00017  * modification, are permitted provided that the following conditions
00018  * are met:
00019  * 1. Redistributions of source code must retain the above copyright
00020  *    notice, this list of conditions and the following disclaimer.
00021  * 2. Redistributions in binary form must reproduce the above
00022  *    copyright notice, this list of conditions and the following
00023  *    disclaimer in the documentation and/or other materials provided
00024  *    with the distribution.
00025  * 3. The name of the author may not be used to endorse or promote
00026  *    products derived from this software without specific prior
00027  *    written permission.
00028  *
00029  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS
00030  * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
00031  * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
00032  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
00033  * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
00034  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
00035  * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
00036  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
00037  * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
00038  * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
00039  * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
00040  *
00041  * This file is part of the uIP TCP/IP stack.
00042  *
00043  * $Id: webclient.h,v 1.2 2006/06/11 21:46:37 adam Exp $
00044  *
00045  */
00046 #ifndef __WEBCLIENT_H__
00047 #define __WEBCLIENT_H__
00048
00049
00050 #include "webclient-strings.h"
00051 #include "uipopt.h"
00052
00053 #define WEBCLIENT_CONF_MAX_URLLEN 100
00054
00055 struct webclient_state {
00056   u8_t timer;
00057   u8_t state;
00058   u8_t httpflag;
00059
00060   u16_t port;
00061   char host[40];
00062   char file[WEBCLIENT_CONF_MAX_URLLEN];
00063   u16_t getrequestptr;
00064   u16_t getrequestleft;
00065
00066   char httpheaderline[200];
00067   u16_t httpheaderlineptr;
00068
00069   char mimetype[32];
00070 };
00071
00072 typedef struct webclient_state uip_tcp_appstate_t;
00073 #define UIP_APPCALL webclient_appcall
00074
00090 void webclient_datahandler(char *data, u16_t len);
00091
00099 void webclient_connected(void);
00100
00108 void webclient_timedout(void);
00109
00118 void webclient_aborted(void);
00119
00127 void webclient_closed(void);
00128
00129
00130
00134 void webclient_init(void);
00135
00172 unsigned char webclient_get(char *host, u16_t port, char *file);
00173
00177 void webclient_close(void);
00178 void webclient_appcall(void);
00179
00186 char *webclient_mimetype(void);
00187
00198 char *webclient_filename(void);
00199
00210 char *webclient_hostname(void);
00211
00222 unsigned short webclient_port(void);
00223
00224
00225
00226 #endif /* __WEBCLIENT_H__ */
00227
Generated on Tue Jun 7 14:59:00 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/Easy_Web/webpage.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/Easy_Web/webpage.h

Go to the documentation of this file.
00001 const unsigned char WebSide[] = {
00002 "<html>\r\n"
00003 "<head>\r\n"
00004 "<meta http-equiv=\"refresh\" content=\"5\">\r\n"
00005 "<title>easyWEB - dynamic Webside</title>\r\n"
00006 "</head>\r\n"
00007 "\r\n"
00008 "<body bgcolor=\"#3030A0\" text=\"#FFFF00\">\r\n"
00009 "<p><b><font color=\"#FFFFFF\" size=\"6\"><i>Hello World!</i></font></b></p>\r\n"
00010 "\r\n"
00011 "<p><b>This is a dynamic website hosted by the embedded Webserver</b> <b>easyWEB.</b></p>\r\n"
00012 "<p><b>Hardware:</b></p>\r\n"
00013 "<ul>\r\n"
00014 "<li><b>Keil MCB1700 board (with LPC1768 ARM Cortex-M3), 72MHz, 512KB Flash, 64KB SRAM</b></li>\r\n"
00015 "<li><b>Embedded EMAC Ethernet Controller</b></li>\r\n"
00016 "</ul>\r\n"
00017 "\r\n"
00018 "<p><b>A/D Converter Input 0 - POT1:</b></p>\r\n"
00019 "\r\n"
00020 "<table bgcolor=\"#ff0000\" border=\"5\" cellpadding=\"0\" cellspacing=\"0\" width=\"500\">\r\n"
00021 "<tr>\r\n"
00022 "<td>\r\n"
00023 "<table width=\"AD7%\" border=\"0\" cellpadding=\"0\" cellspacing=\"0\">\r\n"
00024 "<tr><td bgcolor=\"#00ff00\">&nbsp;</td></tr>\r\n"
00025 "</table>\r\n"
00026 "</td>\r\n"
00027 "</tr>\r\n"
00028 "</table>\r\n"
00029 "\r\n"
00030 "<table border=\"0\" width=\"540\">\r\n"
00031 "<tr>\r\n"
00032 "<td width=\"14%\">0V</td>\r\n"
00033 "<td width=\"14%\">0.5V</td>\r\n"
00034 "<td width=\"14%\">1V</td>\r\n"
00035 "<td width=\"14%\">1.5V</td>\r\n"
00036 "<td width=\"14%\">2V</td>\r\n"
00037 "<td width=\"14%\">2.5V</td>\r\n"
00038 "<td width=\"14%\">3V</td>\r\n"
00039 "</tr>\r\n"
00040 "</table>\r\n"
00041 "\r\n"
00042 "<p><b>A/D Converter Input 1:</b></p>\r\n"
00043 "\r\n"
00044 "<table bgcolor=\"#ff0000\" border=\"5\" cellpadding=\"0\" cellspacing=\"0\" width=\"500\">\r\n"
00045 "<tr>\r\n"
00046 "<td>\r\n"
00047 "<table width=\"ADA%\" border=\"0\" cellpadding=\"0\" cellspacing=\"0\">\r\n"
00048 "<tr><td bgcolor=\"#00ff00\">&nbsp;</td></tr> \r\n"
00049 "</table>\r\n"
00050 "</td>\r\n"
00051 "</tr>\r\n"
00052 "</table>\r\n"
00053 "\r\n"
00054 "<table border=\"0\" width=\"540\">\r\n"
00055 "<tr>\r\n"
00056 "<td width=\"12%\">0V</td>\r\n"
00057 "<td width=\"12%\">0.5V</td>\r\n"
00058 "<td width=\"12%\">1V</td>\r\n"
00059 "<td width=\"12%\">1.5V</td>\r\n"
00060 "<td width=\"12%\">2V</td>\r\n"
00061 "<td width=\"12%\">2.5V</td>\r\n"
00062 "<td width=\"12%\">3V</td>\r\n"
00063 "</tr>\r\n"
00064 "</table>\r\n"
00065 "</body>\r\n"
00066 "</html>\r\n"
00067 "\r\n"};
Generated on Tue Jun 7 14:58:59 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/webserver/webserver.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/webserver/webserver.h

Go to the documentation of this file.
00001 /*
00002  * Copyright (c) 2002, Adam Dunkels.
00003  * All rights reserved.
00004  *
00005  * Redistribution and use in source and binary forms, with or without
00006  * modification, are permitted provided that the following conditions
00007  * are met:
00008  * 1. Redistributions of source code must retain the above copyright
00009  *    notice, this list of conditions and the following disclaimer.
00010  * 2. Redistributions in binary form must reproduce the above
00011  *    copyright notice, this list of conditions and the following
00012  *    disclaimer in the documentation and/or other materials provided
00013  *    with the distribution.
00014  * 3. The name of the author may not be used to endorse or promote
00015  *    products derived from this software without specific prior
00016  *    written permission.
00017  *
00018  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS
00019  * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
00020  * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
00021  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
00022  * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
00023  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
00024  * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
00025  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
00026  * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
00027  * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
00028  * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
00029  *
00030  * This file is part of the uIP TCP/IP stack
00031  *
00032  * $Id: webserver.h,v 1.2 2006/06/11 21:46:38 adam Exp $
00033  *
00034  */
00035 #ifndef __WEBSERVER_H__
00036 #define __WEBSERVER_H__
00037
00038 #include "httpd.h"
00039
00040 typedef struct httpd_state uip_tcp_appstate_t;
00041 /* UIP_APPCALL: the name of the application function. This function
00042    must return void and take no arguments (i.e., C type "void
00043    appfunc(void)"). */
00044 #ifndef UIP_APPCALL
00045 #define UIP_APPCALL     httpd_appcall
00046 #endif
00047
00048
00049 #endif /* __WEBSERVER_H__ */
Generated on Tue Jun 7 14:59:00 2011 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.5.9


Application Note

ACRONYMS

24_Aug_2010

The table below describes the acronyms used in the firmware libray

Acronyms | Description
CMSIS | Cortex Microcontroller Software Interface Standard
DBFWK | Debug Framework
ADC | Analog to Digital converter
CAN | Controller Area Network
DAC | Digital to Analog converter
EMAC | Ethernet Media Access Control
EXTI | External Interrupt
DMA | Direct Memory Access
GPDMA | General Purpose DMA controller
GPIO | General Purpose Input/Output
FLASH | Flash Memory
I2C | Inter-integrated circuit
I2S | Inter-integrated sound
ITM | Instrumentation Trace Microcell
JTAG | Joint Test Action Group
LCD | Liquid Crystal Display
NVIC | Nested Vector Interrupt Controller
MCPWM | Motor Control Pulse Width Modulation
MPU | Memory Protection Unit
PWM | Pulse Width Modulation
QEI | Quadrature Encoder Interface
RIT | Repetitive Interrupt Timer
RTC | Real-Time Clock
SCB | System Control Block
SPI | Serial Peripheral Interface
SysTick | System Tick Timer
SW | Serial Wire
TIM | Timer Counter
UART | Universal Asynchronous Receiver/Transmitter
USB | Universal Serial Bus
HID | Human Interface Device
CDC | Communication Device Class
WDT | Watchdog Timer


Application Note

CORE

24_Aug_2010

1. Cortex-M3 processor

LPC17xx family chips is the new series chips that based on Cortex-M3 processor.

The Cortex-M3 processor is the first ARM processor based on the ARMv7-M architecture and has been specifically designed to achieve high system performance in power- and cost-sensitive embedded applications, such as microcontrollers, automotive body systems, industrial control systems and wireless networking, while significantly simplifying programmability to make the ARM architecture an option for even the simplest applications.

LPC1700CMSIS package used Core files delivered by CMSIS (ARM) version 1.3 (release date: 30 October 2009).

It is divided into two parts:

· Core Support

· Device Support

2. Core Support

ARM provides a Core Peripheral Access Layer: contains name definitions, address definitions and helper functions to access core register and peripherals.

· core_cm3.h: CMSIS Cortex-M3 Core Peripheral Access Layer Header file. It defines the core peripherals for the Cortex-M3 CPU and core peripherals.

It also defines Cortex-M3 Core Register structure:

o Nested Vectored Interrupt Controller (NVIC)

o System Control Block (SCB)

o System Tick Timer (SysTick)

o Instrumentation Trace Microcell (ITM)

o Interrupt Type

o Memory Protection Unit (MPU)

o Core Debug

And implements basic functions for:

o NVIC

o SysTick

o Reset

o Debug Input/Output

· core_cm3.c: CMSIS Cortex-M3 Core Peripheral Access Layer Source file. It provides helper function that access core registers.

It implements basic compiler specific intrinsics

And supports for:

· ARM compiler

· IAR compiler

· GNU compiler

3. Device Support

It provides LPC17xx device support files that allows user can access definition for all device peripherals. It also include startup file for ARM/GCC/IAR compiler.

3.1 Start-up files

It provides the Cortex-M startup code and the complete (device specific) Interrupt Vector Table

· For ARM compiler: “\Core\CM3\DeviceSupport\NXP\LPC17xx\startup\arm\startup_LPC17xx.s”

· For GCC compiler: “\Core\CM3\DeviceSupport\NXP\LPC17xx\startup\gcc\startup_LPC17xx.s”

· For IAR compiler: “\Core\CM3\DeviceSupport\NXP\LPC17xx\startup\iar\startup_LPC17xx.s”

3.2 LPC17xx header file

LPC17xx.h: CMSIS Cortex-M3 Core Peripheral Access Layer Header File for NXP LPC17xx Device Series

It defines the peripherals for the actual device.

3.3 System files

Provides a device specific configuration file for the device. It configures the device initializes typically the oscillator (PLL) that is part of the microcontroller device

system_LPC17xx.h: CMSIS Sytem header file for NXP LPC17xx Device Series

system_LPC17xx.c: CMSIS System source file for NXP LPC17xx Device Series


Application Note

DEBUGGER

24_Aug_2010

1. J-link Emulator

1.1 J-Link

J-Link is a USB powered JTAG hardware debug probe supporting a large number of CPU cores. Based on a 32-bit RISC CPU, it can communicate at high speed with the supported target CPUs. J-Link is used around the world in tens of thousand places for development and production (flash programming) purposes.

J-Link support is integrated in most professional IDEs such as IAR, Keil, Rowley and many others.

Reference http://www.segger.com/cms/jlink.html website for getting more information about SEGGER J-Link

Reference http://www.iar.com/website1/1.0.1.0/369/1/ website for more information about IAR J-Link

Picture 1 SEGGER J-Link

Picture 2 IAR J-Link

1.2 J-Link Debug in Eclipse enviroment

LPC1700CMSIS can be setup and debug via J-link in Eclipse environment.

Please see “LPC1000 Software Development Toolchain” > “Sofware update requirement” > “Segger J-link” to know how to install Segger J-link GDB server and driver.

See more “LPC1000 Software Development Toolchain” > “Creating and working with LPC1000CMSIS project” > “Debug the project” to know how to use Jlink Segger to debug.

You can use command line configuration options to start the J-Link GDB server with a configuration file or set the listening port of the J-Link GDB Server. The configuration file can be used as an alternative to the gdbinit file.

LPC1700CMSIS supported two GDB initialize configuration file for debugging on both RAM/ROM mode:

..\gdb_ram_init.jlink: JLink configuration file for RAM mode

..\gdb_rom_init.jlink: JLink configuration file for ROM mode

In LPC1700CMSIS package, J-Link used for debug on Eclipse/ IAR platform.

Expecially, SEGGER J-Link also can debug on Keil platform but need debug setting re-configuration.

2. KEIL ULINK

The Keil ULINK family of Debug Adapters connect your PC's USB port to your target system (via JTAG or similar debug interface) and allow you to debug embedded programs running on target hardware.

2010-07-14 4-14-22 PM.jpg

Picture 3 Keil ULINK family

2.1 ULINKpro

Is a new debug unit that allows real-time data and instruction trace streaming via USB. ULINKpro supports:

· ARM7, ARM9, and Cortex-M devices

· Data and Instruction Trace for Cortex-M systems

· Sophisticated application analysis including execution profiling and code coverage

· High-Speed Flash Download

2.2 ULINK2

Replaces the original ULINK adapter.

· Supports various ARM7, ARM9, Cortex-M, 8051, and C166 devices

2.3 ULINK-ME

Offers a subset of the ULINK2 features:

· Supports ARM7, ARM9, Cortex-M, and NXP LPC900 devices

· Delivered and supported only as part of Keil or OEM Starter Kits

· Standard 20-pin (0.1") JTAG and 10-pin (0.05") Cortex Debug connectors

In this package, ULINK used for debug in Keil platform


Application Note

DRIVERS

24_Aug_2010

LPC1700CMSIS package provides all needed driver for LPC17xx peripheral placed at “..\Driver” folder.

It divided into two parts:

· Include: provide header files that contains definition macros, structure, enumeration type used by driver.

· Source: provide source file that implement driver functions.

All driver’s information can be found in this Manual in “Contents” tab > “LPC1700CMSIS Firmware Library” section

1. Driver list

This table shows driver list that supported by LPC1700CMSIS package.

Driver | Header Files | Source Files
ADC | lpc17xx_adc.h | lpc17xx_adc.c
CAN | lpc17xx _can.h | lpc17xx _can.c
CLKPWR | lpc17xx_clkpwr.h | lpc17xx_clkpwr.c
DAC | lpc17xx_dac.h | lpc17xx_dac.c
EMAC | lpc17xx_emac.h | lpc17xx_emac.c
EXTI | lpc17xx_exti.h | lpc17xx_exti.c
GPDMA | lpc17xx_gpdma.h | lpc17xx_gpdma.c
GPIO | lpc17xx_gpio.h | lpc17xx_gpio.c
I2C | lpc17xx_i2c.h | lpc17xx_i2c.c
I2S | lpc17xx_i2s.h | lpc17xx_i2s.c
MCPWM | lpc17xx_mcpwm.h | lpc17xx_mcpwm.c
NVIC | lpc17xx_nvic.h | lpc17xx_nvic.c
PINSEL | lpc17xx_pinsel.h | lpc17xx_pinsel.c
PWM | lpc17xx_pwm.h | lpc17xx_pwm.c
QEI | lpc17xx_qei.h | lpc17xx_qei.c
RIT | lpc17xx_rit.h | lpc17xx_rit.c
RTC | lpc17xx_rtc.h | lpc17xx_rtc.c
SPI | lpc17xx_spi.h | lpc17xx_spi.c
SSP | lpc17xx_ssp.h | lpc17xx_ssp.c
SYSTICK | lpc17xx_systick.h | lpc17xx_systick.c
TIM | lpc17xx_timer.h | lpc17xx_timer.c
UART | lpc17xx_uart.h | lpc17xx_uart.c
WDT | lpc17xx_wdt.h | lpc17xx_wdt.c

Table 1 Driver list

2. Type definitions

LPC1700CMSIS defines C standard type in “lpc_types.h”.

It is intended to be used in ISO C conforming development environments and checks for this insofar as it is possible to do so.

3. Debug frame work

LPC1700CMSIS implements some utilities that used for debugging through UART port in:

· debug_frmwrk.h: debug frame work header file

· debug_frmwrk.c: debug frame work source file

This is the table list of supported functions for serial display

Function | Description
_DBG(x) | Display a string of character
_DBG_(x) | Display s string of characters and move to new line
_DBC(x) | Display a character
_DBD(x) | Display a 8-bit decimal number
_DBD16(x) | Display a 16-bit decimal number
_DBD32(x) | Display a 32-bit decimal number
_DBH(x) | Display a 8-bits hex number
_DBH16(x) | Display a 16-bits hex number
_DBH32(x) | Display a 32-bits hex number
_DG( ) | Get a charater from UART port

Table 2 Debug framework supported functions

Usually, examples required UART for displaying their data or information as follow configuration:

· UART0

· 115200 bps

· 8 databits

· None parity

· 1 stop bit

· No flow control

4. Driver flag definition

Each driver source file in LPC1700CMSIS defines a flag that used to add in “lpc17xx_libcfg.h”. When building example, just needed driver defined in “lpc17xx_libcfg.h” file are compiled to reduce code size.

Note that: These flags are useful when using GNU compiler. If you run them in Keil or IAR platform, unused sections will be discarded automatically.

This is the list of supported driver flag definition

Function | Description
DEBUG | Enable/Disable debugger
_DBGFRW | Enable/Disable debug framework
_GPIO | Enable/Disable General Purpose Intput/Output (GPIO) driver
_EXTI | Enable/Disable External Interrupt (EXTI) driver
_UART | Enable/Disable Universal Asynchronous Receiver/Transmitter (UART) driver
_UART0 | Enable/Disable UART0 driver
_UART1 | Enable/Disable UART1 driver
_UART2 | Enable/Disable UART2 driver
_UART3 | Enable/Disable UART3 driver
_SPI | Enable/Disable Serial Peripheral Interface (SPI) driver
_SYSTICK | Enable/Disable System Tick Timer (SYSTICK) driver
_SSP | Enable/Disable Synchronous Serial Port (SSP) driver
_SSP0 | Enable/Disable SSP0 driver
_SSP1 | Enable/Disable SSP1 driver
_I2C | Enable/Disable Inter-integrated circuit (I2C) driver
_I2C0 | Enable/Disable I2C0 driver
_I2C1 | Enable/Disable I2C1 driver
_I2C2 | Enable/Disable I2C2 driver
_TIM | Enable/Disable Timer Counter (TIM) driver
_WDT | Enable/Disable Watchdog Timer (WDT) driver
_GPDMA | Enable/Disable General Purpose Direct Memory Access (GPDMA) driver
_DAC | Enable/Disable Digital-Analog Converter (DAC) driver
_ADC | Enable/Disable Analog-Digital Converter (ADC) driver
_PWM | Enable/Disable Pulse Width Modulation (PWM) driver
_PWM1 | Enable/Disable _PWM1 driver
_RTC | Enable/Disable Real-time Clock (RTC) driver
_I2S | Enable/Disable Integrated Interchip Sound driver
_USBDEV | Enable/Disable Universal Serial Bus Device (USBDEV) driver
_CAN | Enable/Disable Controller Area Network (CAN) driver
_RIT | Enable/Disable Repetitive Interrupt Timer (RIT) driver
_EMAC | Enable/Disable Ethernet Media Access Controller (EMAC) driver

Table 3 Supported driver flag definition


Application Note

EVALUATION BOARDS

24_Aug_2010

LPC1700CMSIS was tested on:

1. Keil MCB1700 with LPC1768 version 1.0

See http://www.keil.com/mcb1700/ for more information about this kit

Reference:

MCB1700 datasheet

2. IAR LPC1768 KickStart vers.A

See http://www.iar.com/website1/1.0.1.0/658/1/?item=prod_prod-s1/487 for more information about this kit

Reference:

IAR-LPC1768KS datasheet


Application Note

EXAMPLE LIST

24_Aug_2010

This is the list of examples that supported in LPC1700CMSIS package

Peripheral | Example | Description
ADC | Burst | This example describes how to use ADC conversion in burst mode with single or multiple input updated
 | DMA | This example describes how to use ADC coversion and transfer converted data by using DMA
 | INTERRUPT | This example describes how to use ADC conversion in interrupt mode.
 | HardwareTrigger | This example describes how to use ADC conversion in hardware-triggered mode.
 | Polling | This example describes how to use ADC conversion in polling mode.
CAN | CAN_LedControl | This example describes how to use CAN frames to control LED display new
 | CAN_self_test | This example describes how to test CAN self-test mode
 | CAN_test_aflut | This example describes how to use CAN driver functions for setup and change AFLUT table dynamically
 | CAN_test_bypass_mode | This example describes how to test CAN operation by using bypass mode
 | CAN_test_two_kit | This example describes how to configure CAN operation in two boards seperately
Cortex-M3 | Bit-banding | This example describes how to test Bit-banding feature of Cortex-M3 processor
 | MPU | This example describes how to use MPU to protect memory region new
 | Privilege_mode | This example describes how to change privilege to unprivilege mode and vice vesa.
DAC | DMA | This example describes how to use DMA to transfer data to DAC peripheral
 | SineWave | This example describes how to use DMA to generate a sinewave signal
 | Speaker | This example describes how to test DAC through speaker
 | WaveGenerate | This example describes how to use DMA to generate multi signal forms new
EMAC | Easy_Web | This example describes how to implement an simple web application
 | EmacRaw | This example describes how to test EMAC driver with raw packet frame format that is not related with any upper-layer (i.e. TCP/IP...).
 | uIP | This example describes how to handle a single network interface and contains the IP,ICMP, UDP and TCP protocols.
GPDMA | Flash_2_Ram_Test | This example describes how to configure GPDMA to transfer data from Flash to Ram memory
 | Ram_2_Ram_Test | This example describes how to configure GPDMA to transfer data from internal RAM memory to internal RAM memory, using interrupt mode
 | GPDMA_Sleep | This example describes how to test GPDMA operation in sleep mode
 | Link_list | This example describes how to use GPDMA Link-list function new
GPIO | GPIO_Interrupt | This example describes how to use GPIO interrupt function.
 | LedBlinky | A simple program to test GPIO interrupt functionality to drive LED
I2C | master | This example describes how to use I2S as master device to communicate with I2S slave device in polling mode Note: this example will run combine with slave example at folder \slave.
 | Master_Slave_Interrupt | This example describes how uses I2C as master device to transfer data from/to I2Cslave device
 | pca8581_polling | This example describes how to use I2C to communicate with EEPROM PCA8581
 | Monitor | This example describes how to use I2C to monitor traffic on I2C bus new
 | sc16is750_int | This example describes how to use I2C to communicate with SC16IS750/760 Demo Board in interrupt mode.
 | sc16is759_polling | This example describes how to use I2C to communicate with SC16IS750/760 Demo Board in polling mode.
 | slave | This example describes how to use I2S as slave device to communicate with I2S master device in polling mode Note: this example will run combine with master example at folder \master.
I2S | I2S_DMA | This example describes how to use I2S in DMA mode
 | I2S_IRQ | This example describes how to use I2S to transfer data in interrupt mode
 | I2S_MCLK | This example describes how to use I2S master clock as I2S clock source
 | I2S_test_4_wire | This example describes how to configure I2S peripheral to run in 4 wire mode
 | I2S_two_kit | This example describes how to configure I2S peripheral to communication between two board.
 | Polling | This example describes how to use I2S to transfer data in polling mode
LCD | NOKIA6610_LCD | This example describes how to use LCD NOKIA6610 on IAR-LPC1768-KS board
 | QVGA_TFT_LCD | This example describes how to use QVGA_TFT on IAR-LPC1768-KS board
MCPWM | MCPWMSimple | This example describes how to test Motor Control PWM module in LPC17xx
NVIC | Priority | This example describes how to configure NVIC priority grouping for testing tail-chaining/Late-arriving interrupt mode
Project_Template | Eclipse_GNU | This is GNU project template
 | IAR_EWARM | This is IAR project template
 | Keil_RealView_MDK | This is Keil project template
PWM | Dual_Edge | This example describes how to generate PWM signal on 3 Channels in both edge mode and single mode.
 | Match_Interrupt | This example describes how to use PWM Match function in interrupt mode
 | Single_Edge | This example describes how to use PWM signal on 6 Channels in single edge mode
PWR | EXTINT_Sleep | This example describes how to enter system in sleep mode and wake-up by using external interrupt
 | NMI_PowerDown | This example describes how to enter system in PowerDown mode and wake-up it by using NMI (Non-Maskable Interrupt)
 | RTC_DeepPWD | This example describes how to enter system in Deep PowerDown mode and wake-up by using RTC (Real-time clock) interrupt
 | WDT_DeepSleep | This example describes how to enter system in DeepSleep mode and wake up it by using WDT Interrupt
QEI | QEI_Velo | This example describes how to use Quadrature Encoder Interface module to calculate velocity and detect direction changing
RIT | Interrupt | This example describes how to use RIT as a timer to generate interrupt to drive LED
RTC | AlarmCntIncrInterrupt | This example describes how to generate interrupt in Second Counter Increment Interrupt (1s) and generate Alarm interrupt at 10s
 | Calibration | This example describes how to calibrate real-time clock
SPI | Loopback | This example describes how to test SPI operation by using loop-back mode
 | Master | This example describes how to use SPI as master to connect with SPI slave Note: this example will run combine with slave example at folder \Slave.
 | sc16is750_int | This example describes how to use SPI in interrupt mode to communicate withSC16IS750/760 Demo Board.
 | sc16is750_polling | This example describes how to use SPI in polling mode to communicate withSC16IS750/760 Demo Board.
 | SDCard | This example describes how to use SPI to read SD card's CID register new
 | Slave | This example describes how to use SPI as slave to connect with SPI master Note: this example will run combinate with master example at folder \Master.
SSP | dma | This example describes how to use SSP peripheral with DMA support.
 | Master | This example describes how to use SSP peripheral as master to connect with SSP slave Note: this example will run combinate with slave example at folder \Slave.
 | Microwire | This example describes how to use SSP peripheral with MicroWire frame format.
 | sc16is750_int | This example describes how to use SSP in interrupt mode to communicate withSC16IS750/760 Demo Board.
 | sc16is750_polling | This example describes how to use SSP in polling mode to communicate withSC16IS750/760 Demo Board.
 | Slave | This example describes how to use SSP peripheral as slave to connect with SSP master Note: this example will run combinate with master example at folder \Master.
 | TI | This example describes how to use SSP peripheral with TI frame format.
SysTick | 10ms_base | This example describes how to configure System Tick timer to generate interrupt each 10ms
 | STCLK | This example describes how to configure System Tick timer use external clock source STCLK new
TIMER | Capture | This example describes how to use Capture Timer function.
 | FreqMeasure | This example describes how to use Timer to measure a signal's frequency new
 | Gen_Diff_Delay | This example describes how to use Timer Match to generate different delay signals new
 | Gen_Diff_Freqs | This example describes how to use Timer Match to generate 2 different frequency signals new
 | Interrupt_Match | This example describes how to use Timer Match to generate specific time in interrupt mode.
 | Polling_Match | This example describes how to use Timer Match to generate specific time in polling mode.
 | PWMSignal | This example describes how to use TIMERs to generate PWM signals with different duty cycles
UART | Autobaud | This is a simple UART example using auto baudrate mode
 | DMA | This example describes how to use UART in DMA mode
 | HWFlowControl | This example describes how to use UART in hardware flow control mode
 | Interrupt | This example describes how to use UART in interrupt mode
 | IrDA | Include transmit and receive example, describes how to use UART in IrDA mode
 | Polling | This example describes how to use UART in polling mode
 | RS485_Master | This example describes how to use RS485 functionality on UART1 of LPC1768 in master mode.
 | RS485_Slave | This example describes how to use RS485 functionality on UART1 of LPC1768 in slave mode.
 | UART1_FullModem | This is a simple UART example using UART1 will Full modem mode
USBDEV | USBAudio | This example describes how to use USBDEV on LPC1768 to demo the USB Audio Device - Speaker new
 | USBCDC | This example describes how to use USBDEV on LPC1768 to demo the virtual COM port new
 | USBHID | This example describes how to use USBDEV on LPC1768 to run a simple HID application.
 | USBMassStorage | This example describes how to write a simple USB Mass Storage application on LPC1768.
WDT | INTERRUPT | This example describes how to use WDT to generate interrupt after a specific time.
 | RESET | This example describes how to use WDT to generate chip reset after a specific time.

Table 1 Example list


Application Note

EXAMPLES

24_Aug_2010

Examples supported in LPC1700CMSIS are the simple examples that used to verify almost fully LPC17xx peripheral functions and some Cortex-M3 feature.

They provide customers an overview about how to initialize and configure peripherals for implement their applications. These examples are also useful for quick demo/testing peripheral functions without deep-knowledge about internal design.

Reference:

· Read “LPC1000 Software Development Toolchain” to know how to build an run examples in GNU-Eclipse/ Keil/ IAR platform.

· Read “Example list” to have list quick information of supported example in this package

· Read “LPC17xx Example Description” for detail descriptions about each of example in this package (hardware configuration, step to run…)


Application Note

LIB BUILDING

24_Aug_2010

Using:

· “libs” target to build driver lib.

· “distclean” target to clean object file and remove library file.

After run ‘libs’ target, LPC17xx library file was created and placed at “..\Driver\library\DriversLPC17xxgnu.a”


Application Note

MAKE SECTION

24_Aug_2010

Files placed at directory “..\makesection” are used for creating makefile purpose. They contains common makefile definitions, build rules, file types and linker files…

It’s divided into three parts:

· Makerule

· Tools

· Make configuration file

1. Makerule

It contains:

· Common: includes IAR linker files and common makefile rules

o ..\common\ldscript_iram_iar.ld: IAR linker file for RAM mode

o ..\common\ldscript_irom_iar.ld: IAR linker file for ROM mode

o ..\common\make.rules.build: default build rules used by all compiler chains

o ..\common\make.rules.enviroment: root level makefile that is used by all the lowlevel makefiles to resolve architecture specific and path dependencies

o ..\common\make.rules.ftypes: default file types used by all compiler chains

· Example: includes GNU linker files and example makefile

o ..\example\ldscript_ram_gnu.ld: GNU linker file for RAM mode

o ..\example\ldscript_ram_v00_gnu.ld: GNU linker file for RAM mode of LPC17xx chip revision V00 only

o ..\example\ldscript_rom_gnu.ld: GNU linker file for ROM mode

o ..\example\ldscript_rom_v00_gnu.ld: GNU linker file for ROM mode of LPC17xx chip revision V00 only

o ..\example\makefile.ex: example makefile

· LPC17xx:

o ..\LPC17xx\make.LPC17xx.gnu: defines make rules for the GNU toolset

Tip

When uncomment this line in make.LPC17xx.gnu file:

LK           += -Wl,--gc-sections -Wl,--print-gc-sections

GNU compiler will discard unused section when building example. So it causes reducing code size.

But this flag can affect debugger and cause it runs incorrectly,

So we just recommend using it in “run standalone” mode.

2. Tools

Contains a set of GNUARM toolchain to generate Makefile. It required by the LPC Software package build system to run Makefiles.

It includes:

Utility | Function
arm-elf-objcopy.exe | utility that convert ELF files into BIN files
astyle.cfg | a style configuration options for NXP releasable code
astyle.exe | utility to format the code
cp.exe | copy files and directories
cygwin1.dll | acts as a Linux API emulation layer providing substantial Linux API functionality
echo.exe | echoes characters from the command line to the standard output
ls.exe | lists information about files
make.exe | automatically building applications
makedepend.exe | generates the dependency rules for make
mkdir.exe | creates directories with the specified names
mv.exe | moves or renames files
rm.exe | remove files or directories
rmdir.exe | remove empty directories
sh.exe | shell command tool
touch.exe | change file timestamps

Table 1 Set of tools

3. Makeconfig

makeconfig: This is a configuration file for “make” section. Used to add path of “tools” directory.

Variable | Description | Default
PROJ_ROOT | The path that placed project | C:/nxpdrv/LPC1700CMSIS
CMCORE_TYPE | CM Core type | CM3
DEVICE | Device name | LPC17xx
MANUFACTURE | Manufacture name | NXP
TOOL | Compiler tool name | gnu
DEBUG_MODE | Debug mode | 1 (enable debug)
GNU_INSTALL_ROOT | The path that installed GNU tools | C:/Program Files/CodeSourcery/Sourcery G++ Lite
GNU_VERSION | GNU version | 4.3.3
IAR_INSTALL_ROOT | The path that installed IAR Workbench | C:/Program Files/IAR Systems/Embedded Workbench 5.0 Kickstart
KEIL_INSTALL_ROOT | The path that installed Keil | C:/Keil

Table 2 List of variable in makeconfig file


Application Note

RELEASE NOTE

24_Aug_2010

1. These following test cases have been verified

1.1 Cortex-M3

· Bit-banding

· MP3 new

· Privilege mode

1.2 ADC

· Interrupt mode (12bit, 200KHz, 'start conversion now' command)

· Polling mode (12bit, 200KHz, 'start conversion now' command)

· DMA mode (12bit, 200KHz, 'start conversion now' command)

· Burst mode

· Injected mode new

· Conversion triggered by hardware

1.3 PWR

· Set/Reset Power Supply for Peripheral (PCONP)

· Set Peripheral Clock divider value from CCLK clock (PCLKSEL)

· Get current Peripheral clock value

· Functions to enter System into various power modes that co-operated with instruction supported by ARM core (WFI and WFE)

· Wake up system from various power mode by using multi-interrupt source

o   WDT

o   NMI

o   GPIO

o   EXTI

o   RTC

1.4 CAN

· Bypass mode

· Acceptance filter mode

· FullCAN mode

· CAN transfer between two board separately

· Setup AFLUT, load/remove AFLUT entry dynamically

· Self-test mode

1.5 DAC

· Normal mode

· DMA mode

1.6 EMAC

· Tested with DP83848C, KSZ8721BL as PHY device

· Initializes with Auto Negotiation mode

· Tx and Rx with fixed Ethernet Tx, Rx Fragment number

· Interrupt mode for all interrupt cases with callback

· Filter mode with unicast, broadcast, WoL

1.7 GPDMA

· Interrupt mode

· Memory to Memory

· Flash to Ram

· Ram to Ram

· Memory to Peripheral

· DAC

· SSP

· UART

· I2S

· Peripheral to Memory

· SSP

· UART

· I2S

· GPIO

· Input/Output with Word, Halfword and Byte Accessing style

· Sleep mode

· Scatter and Gather DMA using Linked List Items new

1.8 I2C

· Standard mode (100KHz)

· Fast mode (400KHz)

· Fast mode plus (1MHz)

· Polling mode and interrupt mode

· Master mode and stack for handling in slave mode

· Monitor mode new

1.9 I2S

· Polling mode

· Interrupt mode

· DMA mode

· 4 wire mode

· Transfer between two board

· Master clock MCLK

1.10 MCPWM

· AC/DC mode (observed by oscilloscope)

· Input Capture function

1.11 NVIC

· Implement Setting Vector Table Offset, De-initializing the NVIC peripheral and De-initializing the SCB peripheral

· Grouping priority

o   Tail-chaining interrupt

o   Late-arriving interrupt

1.12 PINSEL

· Set Pin Function, Resistor Mode and Open-drain mode

· Set I2C Standard Mode or Fast Mode for I2C0 pin

1.13 PWM

· Single/Dual edge mode (observed by oscilloscope).

· Match function.

1.14 QEI

· Quadrature phase mode and clock/direction mode

· 2X and 4X capture mode

· Direction and direction state change detection

· Velocity capture and calculation

1.15 RIT

· Generate interrupt at specified time intervals (use standard timer)

1.16 RTC

· Set/Get full date-time

· Generate interrupt in Second Counter Increment Interrupt

· Counter Increment Alarm Interrupt

· Calibration

1.17 SPI

· Tested with 1MHz

· Polling mode /Interrupt mode

· Master and Slave mode

1.18 SSP

· Tested with 1MHz in SPI frame mode

· Polling mode /Interrupt mode

· Master and Slave mode

· Self Slave Select Output Pin and GPIO as Slave Select Output pin in master mode

· DMA mode

· MicroWire Frame mode

· TI Frame mode

1.19 SysTick

· Generate a fixed 10ms interrupt

· Use external STCLK clock as the source new

1.20 TIMER

· Match Polling mode

· Match Interrupt mode

· Match Ouput

· Capture event

· Use TIMER to generate PWM signals

· Use TIMER to generate difference signal with difference delays, frequencies and forms new

1.21 UART

· Polling/Interrupt mode (support baudrate: 110, 300, 600, 1200, 2400, 4800, 9600,14400, 19200, 38400, 57600, 115200)

· Auto baudrate with interrupt mode (support baudrate: 110, 300, 600, 1200, 2400, 4800, 9600,14400, 19200, 38400, 57600, 115200)

· DMA mode

· UART1 Full modem with Auto/manual CTS/RTS handshaking

· UART1 with RS485 function in Master and Slave mode

· IrDA

· Hardware flow control

1.22 WDT

· Interrupt mode

· Reset mode

2. These following functions have not been verified

These functions will be continue verified in next releases.

2.2 EMAC

· Initializes with fixed mode

· VLAN

· Filter mode with multicast, hash unicast, hash multicast, magic packet.

3. These following functions are not supported (still not be implemented)

3.1 EMAC

· Multi Tx, Rx fragment mode

3.2 GPDMA

· Auto allocate free DMA channel


Application Note

SUPPORTED MICROCONTROLLERS

24_Aug_2010

LPC1700CMSIS package was implemented and tested base on LPC1768 chip, but it’s also compatible with vary other Cortex-M3 LPC17xx family chips.

This is table list supported microcontrollers.

Type number | Max.CPU speed | Flash | Total SRAM | Ethernet | USB | CAN | I²S | DAC | Package
LPC1769FBD100 | 120MHz | 512kB | 64kB | Yes | Device/Host/OTG | 2 | Yes | Yes | 100 pin
LPC1768FBD100 | 100MHz | 512kB | 64kB | Yes | Device/Host/OTG | 2 | Yes | Yes | 100 pin
LPC1767FBD100 | 100MHz | 512kB | 64kB | Yes | No | no | Yes | Yes | 100 pin
LPC1766FBD100 | 100MHz | 256kB | 64kB | Yes | Device/Host/OTG | 2 | Yes | Yes | 100 pin
LPC1765FBD100 | 100MHz | 256kB | 64kB | No | Device/Host/OTG | 2 | Yes | Yes | 100 pin
LPC1764FBD100 | 100MHz | 128kB | 32kB | Yes | Device | 2 | No | No | 100 pin
LPC1759FBD80 | 120MHz | 512kB | 64kB | No | Device/Host/OTG | 2 | Yes | Yes | 80 pin
LPC1758FBD80 | 100MHz | 512kB | 64kB | Yes | Device/Host/OTG | 2 | Yes | Yes | 80 pin
LPC1756FBD80 | 100MHz | 256kB | 32kB | No | Device/Host/OTG | 2 | Yes | Yes | 80 pin
LPC1754FBD80 | 100MHz | 128kB | 32kB | No | Device/Host/OTG | 1 | No | Yes | 80 pin
LPC1752FBD80 | 100MHz | 64kB | 16kB | No | Device | 1 | No | No | 80 pin
LPC1751FBD80 | 100MHz | 32kB | 8kB | No | Device | 1 | No | No | 80 pin

Table 1 LPC17xx family chips

· About High speed versions (LPC1769 and LPC1759) operate at up to 120MHz CPU frequency, please modify “system_LPC17xx.c” file placed at “..\Core\CM3\DeviceSupport\NXP\LPC17xx” if you want to upgrade speed (This file just configures for speed at 100MHz CPU frequency).

· Depending on features (memory space and peripheral supported) of each chip, choose suitable examples for running.

More reference

LPC17xx User Manual: http://ics.nxp.com/support/documents/microcontrollers/pdf/user.manual.lpc17xx.pdf

LPC1768 Errata sheet: http://ics.nxp.com/support/documents/microcontrollers/pdf/errata.lpc1768.pdf


Application Note

SUPPORTED TOOLCHAINS

24_Aug_2010

LPC1700CMSIS package supports these toolchains:

1. CodeSourcery G++ Lite toolchain version 4.3.3 with C/C++ Eclipse IDE version 3.4.2

2. Keil - RealView Microcontroller Development Kit RVMDK version 4.0

3. IAR - Embedded Workbench for ARM EWARM version 5.4

1. CodeSourcery G++ Lite toolchain with Eclipse IDE

1.1 CodeSourcery G++ Lite toolchain version 4.3.3

CodeSourcery, in partnership with ARM, Ltd., develops improvements to the GNU Toolchain for ARM processors and provides regular, validated releases of the GNU Toolchain.

Sourcery G++ Lite Edition supports ARM, Thumb, and Thumb-2 compilation for all architectures in active use, including Version 7 of the ARM Architecture.

1.2 Eclipse IDE

Eclipse is a multi-language software development environment comprising an integrated development environment (IDE) and an extensible plug-in system.

Release under the term of the Eclipse Public License, Eclipse is free and open source software.

Because CodeSourcery toolchain and Eclipse IDE are free software, so configuration for them is more complicated.

This package also supports a GNU template project for customer develope their application on Eclipse environment with GNU compiler easier.

Please read “LPC1000 Software Development Toolchain” to get more information about installing and setting up environment for using LPC1700CMSIS package.

Reference “MAKE section” in Package Description chapter of Overview Manual to know the way for using makefile and supported GNU flag options to build examples.

Also reference “LPC1000 Software Development Toolchain” > chapter 3 “Creating and working with LPC1000CMSIS project” > part 4.12 “GNU-Project template” to know how using GNU project template for developing their application.

2. Keil - RealView Microcontroller Development Kit RVMDK version 4.0

The RealView Microcontroller Development Kit (MDK) supports ARM7, ARM9, and Cortex-M3 technology-based microcontrollers from Analog Devices, Atmel, Freescale, Luminary, NXP (founded by Philips), OKI, Samsung, Sharp, STMicroelectronics, and TI.

This kit is perfect for the developer who requires industry-standard compilation tools and sophisticated debugging support.

It includes:

· Integrated Development Enviroment: µVision IDE

· Debugger

· Simulator

LPC1700CMSIS supports project files that allow customers run example on Keil environment. It’s so easy for using, loading and debugging.

Project and all needed configure files for Keil placed at “\Keil” folder in each example.

It includes:

· *.uvopt: Option file

· *.uvproj: Project file

· RAM.ini: Ram initialize file

· Flash.ini: Flash initialize file (optional)

This library package also supports a template Keil project (placed at “..\Examples\Project_Template\Keil_RealView_MDK” for customers easier to implement their application on Keil by themselves.

Please reference “LPC1000 Sotfware Development Toolchain” > chapter 5 “Using LPC1000CMSIS driver package with extension tools” > part 1 “Keil RealView –MDK” for more information about running example or implement application in Keil environment with The µVision IDE

3. IAR - Embedded Workbench for ARM EWARM version 5.4

IAR Embedded Workbench is a set of development tools for building and debugging embedded system applications using assembler, C and C++. It provides a completely integrated development environment that includes a project manager, editor, build tools and the C-SPY debugger.

IAR C/C++ Compiler is well known for its efficient code generation, each compiler contains both generic global optimizations as well as low-level chip-specific optimizations that ensure a small code size while taking advantage of all the specific features of your selected device.

It includes:

· Intergrated Development Enviroment: IAR Embedded Workbend IDE

· Debugger

· Simulator

LPC1700CMSIS supports project files that allow customers run examples on IAR environment. It’s so easy for using, loading and debugging.

Project and all needed configure files for IAR placed at “\EWARM” folder in each example.

It includes:

· *.ewd: project setting file

· *.ewp: IAR Embedded Workbench project file

· *.eww: workspace file

· RAM.mac: RAM initialize file

This library package also supports a template Keil project for customers easy to implement their application on IAR themselves

Please reference “LPC1000 Sotfware Development Toolchain” > chapter 5 “Using LPC1000CMSIS driver package with extension tools” > part 1 “Keil RealView –MDK” for more information about running example/developing application in IAR environment.


CMSIS: Cortex Microcontroller Software Interface Standard

Cortex Microcontroller Software Interface Standard

This file describes the Cortex Microcontroller Software Interface Standard (CMSIS).

Version: 2.00 - 30. November 2010

Information in this file, the accompany manuals, and software is
Copyright © ARM Ltd.
All rights reserved.

Revision History

  • Version 1.00: initial release.
  • Version 1.01: added __LDREXx, __STREXx, and __CLREX.
  • Version 1.02: added Cortex-M0.
  • Version 1.10: second review.
  • Version 1.20: third review.
  • Version 1.30 PRE-RELEASE: reworked Startup Concept, additional Debug Functionality.
  • Version 1.30 2nd PRE-RELEASE: changed folder structure, added doxyGen comments, added Bit definitions.
  • Version 1.30: updated Device Support Packages.
  • Version 2.00: added Cortex-M4 support.

Contents

  1. About
  2. Coding Rules and Conventions
  3. CMSIS Files
  4. Core Peripheral Access Layer
  5. CMSIS Example

About

The Cortex Microcontroller Software Interface Standard (CMSIS) answers the challenges that are faced when software components are deployed to physical microcontroller devices based on a Cortex-M0 or Cortex-M3 processor. The CMSIS will be also expanded to future Cortex-M processor cores (the term Cortex-M is used to indicate that). The CMSIS is defined in close co-operation with various silicon and software vendors and provides a common approach to interface to peripherals, real-time operating systems, and middleware components.

ARM provides as part of the CMSIS the following software layers that are available for various compiler implementations:

  • Core Peripheral Access Layer: contains name definitions, address definitions and helper functions to access core registers and peripherals. It defines also a device independent interface for RTOS Kernels that includes debug channel definitions.

These software layers are expanded by Silicon partners with:

  • Device Peripheral Access Layer: provides definitions for all device peripherals
  • Access Functions for Peripherals (optional): provides additional helper functions for peripherals

CMSIS defines for a Cortex-M Microcontroller System:

  • A common way to access peripheral registers and a common way to define exception vectors.
  • The register names of the Core Peripherals and the names of the Core Exception Vectors.
  • An device independent interface for RTOS Kernels including a debug channel.

By using CMSIS compliant software components, the user can easier re-use template code. CMSIS is intended to enable the combination of software components from multiple middleware vendors.

Coding Rules and Conventions

The following section describes the coding rules and conventions used in the CMSIS implementation. It contains also information about data types and version number information.

Essentials

  • The CMSIS C code conforms to MISRA 2004 rules. In case of MISRA violations, there are disable and enable sequences for PC-LINT inserted.
  • ANSI standard data types defined in the ANSI C header file <stdint.h> are used.
  • #define constants that include expressions must be enclosed by parenthesis.
  • Variables and parameters have a complete data type.
  • All functions in the Core Peripheral Access Layer are re-entrant.
  • The Core Peripheral Access Layer has no blocking code (which means that wait/query loops are done at other software layers).
  • For each exception/interrupt there is definition for:
    • an exception/interrupt handler with the postfix _Handler (for exceptions) or _IRQHandler (for interrupts).
    • a default exception/interrupt handler (weak definition) that contains an endless loop.
    • a #define of the interrupt number with the postfix _IRQn.

Recommendations

The CMSIS recommends the following conventions for identifiers.

  • CAPITAL names to identify Core Registers, Peripheral Registers, and CPU Instructions.
  • CamelCase names to identify peripherals access functions and interrupts.
  • PERIPHERAL_ prefix to identify functions that belong to specify peripherals.
  • Doxygen comments for all functions are included as described under Function Comments below.
Comments
  • Comments use the ANSI C90 style (/* comment */) or C++ style (// comment). It is assumed that the programming tools support today consistently the C++ comment style.
  • Function Comments provide for each function the following information:
    • one-line brief function overview.
    • detailed parameter explanation.
    • detailed information about return values.
    • detailed description of the actual function.

    Doxygen Example:

    /**
 * @brief  Enable Interrupt in NVIC Interrupt Controller
 * @param  IRQn  interrupt number that specifies the interrupt
 * @return none.
 * Enable the specified interrupt in the NVIC Interrupt Controller.
 * Other settings of the interrupt such as priority are not affected.
 */

Data Types and IO Type Qualifiers

The Cortex-M HAL uses the standard types from the standard ANSI C header file <stdint.h>. IO Type Qualifiers are used to specify the access to peripheral variables. IO Type Qualifiers are indented to be used for automatic generation of debug information of peripheral registers.

IO Type Qualifier | #define | Description
__I | volatile const | Read access only
__O | volatile | Write access only
__IO | volatile | Read and write access

CMSIS Version Number

File core_cm4.h contains the version number of the CMSIS with the following define:

#define __CM4_CMSIS_VERSION_MAIN  (0x02)      /* [31:16] main version       */
#define __CM4_CMSIS_VERSION_SUB   (0x00)      /* [15:0]  sub version        */
#define __CM4_CMSIS_VERSION       ((__CM4_CMSIS_VERSION_MAIN << 16) | __CM4_CMSIS_VERSION_SUB)

File core_cm3.h contains the version number of the CMSIS with the following define:

#define __CM3_CMSIS_VERSION_MAIN  (0x02)      /* [31:16] main version       */
#define __CM3_CMSIS_VERSION_SUB   (0x00)      /* [15:0]  sub version        */
#define __CM3_CMSIS_VERSION       ((__CM3_CMSIS_VERSION_MAIN << 16) | __CM3_CMSIS_VERSION_SUB)

File core_cm0.h contains the version number of the CMSIS with the following define:

#define __CM0_CMSIS_VERSION_MAIN  (0x02)      /* [31:16] main version       */
#define __CM0_CMSIS_VERSION_SUB   (0x00)      /* [15:0]  sub version        */
#define __CM0_CMSIS_VERSION       ((__CM0_CMSIS_VERSION_MAIN << 16) | __CM0_CMSIS_VERSION_SUB)

CMSIS Cortex Core

File core_cm4.h contains the type of the CMSIS Cortex-M with the following define:

#define __CORTEX_M                (0x04)

File core_cm3.h contains the type of the CMSIS Cortex-M with the following define:

#define __CORTEX_M                (0x03)

File core_cm0.h contains the type of the CMSIS Cortex-M with the following define:

#define __CORTEX_M                (0x00)

CMSIS Files

This section describes the Files provided in context with the CMSIS to access the Cortex-M hardware and peripherals.

File | Provider | Description
device.h | Device specific (provided by silicon partner) | Defines the peripherals for the actual device. The file may use several other include files to define the peripherals of the actual device.
core_cm0.h | ARM (for RealView ARMCC, IAR, and GNU GCC) | Defines the core peripherals for the Cortex-M0 CPU and core peripherals.
core_cm3.h | ARM (for RealView ARMCC, IAR, and GNU GCC) | Defines the core peripherals for the Cortex-M3 CPU and core peripherals.
core_cm4.h | ARM (for RealView ARMCC, IAR, and GNU GCC) | Defines the core peripherals for the Cortex-M4 CPU and core peripherals.
core_cm4_simd.h | ARM (for RealView ARMCC, IAR, and GNU GCC) | Defines the Cortex-M4 Core SIMD functions.
core_cmFunc.h | ARM (for RealView ARMCC, IAR, and GNU GCC) | Defines the Cortex-M Core Register access functions.
core_cmInstr.h | ARM (for RealView ARMCC, IAR, and GNU GCC) | Defines the Cortex-M Core instructions.
core_cm0.c | ARM (for RealView ARMCC, IAR, and GNU GCC) | Provides helper functions that access core registers.
core_cm3.c | ARM (for RealView ARMCC, IAR, and GNU GCC) | Provides helper functions that access core registers.
core_cm4.c | ARM (for RealView ARMCC, IAR, and GNU GCC) | Provides helper functions that access core registers.
startup_device | ARM (adapted by compiler partner / silicon partner) | Provides the Cortex-M startup code and the complete (device specific) Interrupt Vector Table
system_device | ARM (adapted by silicon partner) | Provides a device specific configuration file for the device. It configures the device initializes typically the oscillator (PLL) that is part of the microcontroller device

device.h

The file device.h is provided by the silicon vendor and is the central include file that the application programmer is using in the C source code. This file contains:

  • Interrupt Number Definition: provides interrupt numbers (IRQn) for all core and device specific exceptions and interrupts.

  • Configuration for core_cm0.h / core_cm3.h / core_cm4.h: reflects the actual configuration of the Cortex-M processor that is part of the actual device. As such the file core_cm0.h / core_cm3.h / core_cm4.h is included that implements access to processor registers and core peripherals.

  • Device Peripheral Access Layer: provides definitions for all device peripherals. It contains all data structures and the address mapping for the device specific peripherals.

  • Access Functions for Peripherals (optional): provides additional helper functions for peripherals that are useful for programming of these peripherals. Access Functions may be provided as inline functions or can be extern references to a device specific library provided by the silicon vendor.

Interrupt Number Definition

To access the device specific interrupts the device.h file defines IRQn numbers for the complete device using a enum typedef as shown below:

typedef enum IRQn
{
/******  Cortex-M3 Processor Exceptions/Interrupt Numbers ************************************************/
  NonMaskableInt_IRQn             = -14,      /*!< 2 Non Maskable Interrupt                              */
  HardFault_IRQn                  = -13,      /*!< 3 Cortex-M3 Hard Fault Interrupt                      */
  MemoryManagement_IRQn           = -12,      /*!< 4 Cortex-M3 Memory Management Interrupt               */
  BusFault_IRQn                   = -11,      /*!< 5 Cortex-M3 Bus Fault Interrupt                       */
  UsageFault_IRQn                 = -10,      /*!< 6 Cortex-M3 Usage Fault Interrupt                     */
  SVCall_IRQn                     = -5,       /*!< 11 Cortex-M3 SV Call Interrupt                        */
  DebugMonitor_IRQn               = -4,       /*!< 12 Cortex-M3 Debug Monitor Interrupt                  */
  PendSV_IRQn                     = -2,       /*!< 14 Cortex-M3 Pend SV Interrupt                        */
  SysTick_IRQn                    = -1,       /*!< 15 Cortex-M3 System Tick Interrupt                    */
/******  STM32 specific Interrupt Numbers ****************************************************************/
  WWDG_STM_IRQn                   = 0,        /*!< Window WatchDog Interrupt                             */
  PVD_STM_IRQn                    = 1,        /*!< PVD through EXTI Line detection Interrupt             */
  :
  :
  } IRQn_Type;

Device Specific Defines

The following device implementation specific defines are set in the device header file and are used for the Cortex-M core configuration options. Some configuration options are reflected in the CMSIS layer using the #define settings described below.

Several features in core_cm#.h are configured by the following defines that must be defined before #include <core_cm#.h> preprocessor command. If the defines are missing the default values will be used.

#define | Core | Value | Default | Description
__CM0_REV | M0 | 0x0000 | 0x0000 | Core revision number ([15:8] revision number, [7:0] patch number)
__CM3_REV | M3 | 0x0101 | 0x0200 | 0x0200 | Core revision number ([15:8] revision number, [7:0] patch number)
__CM4_REV | M4 | 0x0000 | 0x0000 | Core revision number ([15:8] revision number, [7:0] patch number)
__NVIC_PRIO_BITS | M0, M3, M4 | 2 .. 8 | 2 (M0) 4 (CM3, CM4) | Number of priority bits implemented in the NVIC (device specific)
__MPU_PRESENT | M0, M3, M4 | 0 | 1 | 0 | Defines if a MPU is present or not
__FPU_PRESENT | M4 | 0 | 1 | 0 | Defines if a FPU is present or not
__Vendor_SysTickConfig | M0, M3, M4 | 0 | 1 | 0 | When this define is setup to 1, the SysTickConfig function in core_cm3.h is excluded. In this case the device.h file must contain a vendor specific implementation of this function.

Device Peripheral Access Layer

Each peripheral uses a prefix which consists of <device abbreviation>_ and <peripheral name>_ to identify peripheral registers that access this specific peripheral. The intention of this is to avoid name collisions caused due to short names. If more than one peripheral of the same type exists, identifiers have a postfix (digit or letter). For example:

  • <device abbreviation>_UART_Type: defines the generic register layout for all UART channels in a device.
    typedef struct
{
  union {
  __I  uint8_t  RBR;                     /*!< Offset: 0x000 (R/ )  Receiver Buffer Register    */
  __O  uint8_t  THR;                     /*!< Offset: 0x000 ( /W)  Transmit Holding Register   */
  __IO uint8_t  DLL;                     /*!< Offset: 0x000 (R/W)  Divisor Latch LSB           */
       uint32_t RESERVED0;
  };
  union {
  __IO uint8_t  DLM;                     /*!< Offset: 0x004 (R/W)  Divisor Latch MSB           */
  __IO uint32_t IER;                     /*!< Offset: 0x004 (R/W)  Interrupt Enable Register   */
  };
  union {
  __I  uint32_t IIR;                     /*!< Offset: 0x008 (R/ )  Interrupt ID Register       */
  __O  uint8_t  FCR;                     /*!< Offset: 0x008 ( /W)  FIFO Control Register       */
  };
  __IO uint8_t  LCR;                     /*!< Offset: 0x00C (R/W)  Line Control Register       */
       uint8_t  RESERVED1[7];
  __I  uint8_t  LSR;                     /*!< Offset: 0x014 (R/ )  Line Status Register        */
       uint8_t  RESERVED2[7];
  __IO uint8_t  SCR;                     /*!< Offset: 0x01C (R/W)  Scratch Pad Register        */
       uint8_t  RESERVED3[3];
  __IO uint32_t ACR;                     /*!< Offset: 0x020 (R/W)  Autobaud Control Register   */
  __IO uint8_t  ICR;                     /*!< Offset: 0x024 (R/W)  IrDA Control Register       */
       uint8_t  RESERVED4[3];
  __IO uint8_t  FDR;                     /*!< Offset: 0x028 (R/W)  Fractional Divider Register */
       uint8_t  RESERVED5[7];
  __IO uint8_t  TER;                     /*!< Offset: 0x030 (R/W)  Transmit Enable Register    */
       uint8_t  RESERVED6[39];
  __I  uint8_t  FIFOLVL;                 /*!< Offset: 0x058 (R/ )  FIFO Level Register         */
} LPC_UART_TypeDef;
  • <device abbreviation>_UART1: is a pointer to a register structure that refers to a specific UART. For example UART1->DR is the data register of UART1.
    #define LPC_UART2             ((LPC_UART_TypeDef      *) LPC_UART2_BASE    )
#define LPC_UART3             ((LPC_UART_TypeDef      *) LPC_UART3_BASE    )
Minimal Requiements

To access the peripheral registers and related function in a device the files device.h and core_cm0.h / core_cm3.h defines as a minimum:

  • The Register Layout Typedef for each peripheral that defines all register names. Names that start with RESERVE are used to introduce space into the structure to adjust the addresses of the peripheral registers. For example:
    typedef struct
{
  __IO uint32_t CTRL;                    /*!< Offset: 0x000 (R/W)  SysTick Control and Status Register */
  __IO uint32_t LOAD;                    /*!< Offset: 0x004 (R/W)  SysTick Reload Value Register       */
  __IO uint32_t VAL;                     /*!< Offset: 0x008 (R/W)  SysTick Current Value Register      */
  __I  uint32_t CALIB;                   /*!< Offset: 0x00C (R/ )  SysTick Calibration Register        */
} SysTick_Type;
  • Base Address for each peripheral (in case of multiple peripherals that use the same register layout typedef multiple base addresses are defined). For example:
    #define SysTick_BASE (SCS_BASE + 0x0010)            /* SysTick Base Address */
  • Access Definition for each peripheral (in case of multiple peripherals that use the same register layout typedef multiple access definitions exist, i.e. LPC_UART0, LPC_UART2). For Example:
    #define SysTick ((SysTick_Type *) SysTick_BASE)     /* SysTick access definition */

These definitions allow to access the peripheral registers from user code with simple assignments like:

SysTick->CTRL = 0;
Optional Features

In addition the device.h file may define:

  • #define constants that simplify access to the peripheral registers. These constant define bit-positions or other specific patterns are that required for the programming of the peripheral registers. The identifiers used start with <device abbreviation>_ and <peripheral name>_. It is recommended to use CAPITAL letters for such #define constants.
  • Functions that perform more complex functions with the peripheral (i.e. status query before a sending register is accessed). Again these function start with <device abbreviation>_ and <peripheral name>_.

core_cm0.h, core_cm0.c

File core_cm0.h describes the data structures for the Cortex-M0 core peripherals and does the address mapping of this structures. It also provides basic access to the Cortex-M0 core registers and core peripherals with efficient functions (defined as static inline).

File core_cm0.c defines several helper functions that access processor registers.

Together these files implement the Core Peripheral Access Layer for a Cortex-M0.

The define __CMSIS_GENERIC allows to use core_cm0.h in generic library projects that are device independent. Only core relevant types and defines are used.

core_cm3.h, core_cm3.c

File core_cm3.h describes the data structures for the Cortex-M3 core peripherals and does the address mapping of this structures. It also provides basic access to the Cortex-M3 core registers and core peripherals with efficient functions (defined as static inline).

File core_cm3.c defines several helper functions that access processor registers.

Together these files implement the Core Peripheral Access Layer for a Cortex-M3.

The define __CMSIS_GENERIC allows to use core_cm3.h in generic library projects that are device independent. Only core relevant types and defines are used.

core_cm4.h, core_cm4.c, core_cm4_simd.h

File core_cm4.h describes the data structures for the Cortex-M4 core peripherals and does the address mapping of this structures. It also provides basic access to the Cortex-M4 core registers and core peripherals with efficient functions (defined as static inline).

File core_cm4.c defines helper functions that access processor registers.

File core_cm4_simd.h defines Cortex-M4 SIMD instructions.

Together these files implement the Core Peripheral Access Layer for a Cortex-M4.

The define __CMSIS_GENERIC allows to use core_cm4.h in generic library projects that are device independent. Only core relevant types and defines are used.

core_cmFunc.h and core_cmInstr.h

File core_cmFunc.h defines the Cortex-M Core Register access functions (defined as static inline).

File core_cmInstr.h defines the Cortex-M Core instructions (defined as static inline).

These files are part of the Core Peripheral Access Layer for a Cortex-M.

startup_device

A template file for startup_device is provided by ARM for each supported compiler. It is adapted by the silicon vendor to include interrupt vectors for all device specific interrupt handlers. Each interrupt handler is defined as weak function to an dummy handler. Therefore the interrupt handler can be directly used in application software without any requirements to adapt the startup_device file.

The following exception names are fixed and define the start of the vector table for a Cortex-M0:

__Vectors       DCD     __initial_sp              ; Top of Stack
                DCD     Reset_Handler             ; Reset Handler
                DCD     NMI_Handler               ; NMI Handler
                DCD     HardFault_Handler         ; Hard Fault Handler
                DCD     0                         ; Reserved
                DCD     0                         ; Reserved
                DCD     0                         ; Reserved
                DCD     0                         ; Reserved
                DCD     0                         ; Reserved
                DCD     0                         ; Reserved
                DCD     0                         ; Reserved
                DCD     SVC_Handler               ; SVCall Handler
                DCD     0                         ; Reserved
                DCD     0                         ; Reserved
                DCD     PendSV_Handler            ; PendSV Handler
                DCD     SysTick_Handler           ; SysTick Handler

The following exception names are fixed and define the start of the vector table for a Cortex-M3:

__Vectors       DCD     __initial_sp              ; Top of Stack
                DCD     Reset_Handler             ; Reset Handler
                DCD     NMI_Handler               ; NMI Handler
                DCD     HardFault_Handler         ; Hard Fault Handler
                DCD     MemManage_Handler         ; MPU Fault Handler
                DCD     BusFault_Handler          ; Bus Fault Handler
                DCD     UsageFault_Handler        ; Usage Fault Handler
                DCD     0                         ; Reserved
                DCD     0                         ; Reserved
                DCD     0                         ; Reserved
                DCD     0                         ; Reserved
                DCD     SVC_Handler               ; SVCall Handler
                DCD     DebugMon_Handler          ; Debug Monitor Handler
                DCD     0                         ; Reserved
                DCD     PendSV_Handler            ; PendSV Handler
                DCD     SysTick_Handler           ; SysTick Handler

In the following examples for device specific interrupts are shown:

; External Interrupts
                DCD     WWDG_IRQHandler           ; Window Watchdog
                DCD     PVD_IRQHandler            ; PVD through EXTI Line detect
                DCD     TAMPER_IRQHandler         ; Tamper

Device specific interrupts must have a dummy function that can be overwritten in user code. Below is an example for this dummy function.

Default_Handler PROC
                EXPORT WWDG_IRQHandler   [WEAK]
                EXPORT PVD_IRQHandler    [WEAK]
                EXPORT TAMPER_IRQHandler [WEAK]
                :
                :
                WWDG_IRQHandler
                PVD_IRQHandler
                TAMPER_IRQHandler
                :
                :
                B .
                ENDP

The user application may simply define an interrupt handler function by using the handler name as shown below.

void WWDG_IRQHandler(void)
{
  :
  :
}

system_device.c

A template file for system_device.c is provided by ARM but adapted by the silicon vendor to match their actual device. As a minimum requirement this file must provide a device specific system configuration function and a global variable that contains the system frequency. It configures the device and initializes typically the oscillator (PLL) that is part of the microcontroller device.

The file system_device.c must provide as a minimum requirement the SystemInit function as shown below.

Function Definition | Description
void SystemInit (void) | Setup the microcontroller system. Typically this function configures the oscillator (PLL) that is part of the microcontroller device. For systems with variable clock speed it also updates the variable SystemCoreClock. SystemInit is called from startup_device file.
void SystemCoreClockUpdate (void) | Updates the variable SystemCoreClock and must be called whenever the core clock is changed during program execution. SystemCoreClockUpdate() evaluates the clock register settings and calculates the current core clock.

Also part of the file system_device.c is the variable SystemCoreClock which contains the current CPU clock speed shown below.

Variable Definition | Description
uint32_t SystemCoreClock | Contains the system core clock (which is the system clock frequency supplied to the SysTick timer and the processor core clock). This variable can be used by the user application to setup the SysTick timer or configure other parameters. It may also be used by debugger to query the frequency of the debug timer or configure the trace clock speed. SystemCoreClock is initialized with a correct predefined value. The compiler must be configured to avoid the removal of this variable in case that the application program is not using it. It is important for debug systems that the variable is physically present in memory so that it can be examined to configure the debugger.

Note

  • The above definitions are the minimum requirements for the file system_device.c. This file may export more functions or variables that provide a more flexible configuration of the microcontroller system.

Core Peripheral Access Layer

Cortex-M Core Register Access

The following functions are defined in core_cm0.h / core_cm3.h and provide access to Cortex-M core registers.

Function Definition | Core | Core Register | Description
void __enable_irq (void) | M0, M3, M4 | PRIMASK = 0 | Global Interrupt enable (using the instruction CPSIE i)
void __disable_irq (void) | M0, M3, M4 | PRIMASK = 1 | Global Interrupt disable (using the instruction CPSID i)
uint32_t __get_CONTROL (void) | M0, M3, M4 | return CONTROL | Return Control Register Value (using the instruction MRS)
void __set_CONTROL (uint32_t value) | M0, M3, M4 | CONTROL = value | Set CONTROL register value (using the instruction MSR)
uint32_t __get_IPSR (void) | M0, M3, M4 | return IPSR | Return IPSR Register Value (using the instruction MRS)
uint32_t __get_APSR (void) | M0, M3, M4 | return APSR | Return APSR Register Value (using the instruction MRS)
uint32_t __get_xPSR (void) | M0, M3, M4 | return xPSR | Return xPSR Register Value (using the instruction MRS)
uint32_t __get_PSP (void) | M0, M3, M4 | return PSP | Return Process Stack Pointer (using the instruction MRS)
void __set_PSP (uint32_t TopOfProcStack) | >M0, M3, M4 | PSP = TopOfProcStack | Set Process Stack Pointer value (using the instruction MSR)
uint32_t __get_MSP (void) | M0, M3, M4 | return MSP | Return Main Stack Pointer (using the instruction MRS)
void __set_MSP (uint32_t TopOfMainStack) | M0, M3, M4 | MSP = TopOfMainStack | Set Main Stack Pointer (using the instruction MSR)
uint32_t __get_PRIMASK (void) | M0, M3, M4 | return PRIMASK | Return Priority Mask Register (using the instruction MRS)
void __set_PRIMASK (uint32_t value) | M0, M3, M4 | PRIMASK = value | Assign value to Priority Mask Register (using the instruction MSR)
void __enable_fault_irq (void) | M3, M4 | FAULTMASK = 0 | Global Fault exception and Interrupt enable (using the instruction CPSIE f)
void __disable_fault_irq (void) | M3, M4 | FAULTMASK = 1 | Global Fault exception and Interrupt disable (using the instruction CPSID f)
uint32_t __get_BASEPRI (void) | M3, M4 | return BASEPRI | Return Base Priority (using the instruction MRS)
void __set_BASEPRI (uint32_t value) | M3, M4 | BASEPRI = value | Set Base Priority (using the instruction MSR)
uint32_t __get_FAULTMASK (void) | M3, M4 | return FAULTMASK | Return Fault Mask Register (using the instruction MRS)
void __set_FAULTMASK (uint32_t value) | M3, M4 | FAULTMASK = value | Assign value to Fault Mask Register (using the instruction MSR)
uint32_t __get_FPSCR (void) | M4 | return FPSCR | Return Floating Point Status / Control Register
void __set_FPSCR (uint32_t value) | M4 | FPSCR = value | Assign value to Floating Point Status / Control Register

Cortex-M Instruction Access

The following functions are defined in core_cm0.h / core_cm3.hand generate specific Cortex-M instructions. The functions are implemented in the file core_cm0.c / core_cm3.c.

Name | Core | Generated CPU Instruction | Description
void __NOP (void) | M0, M3, M4 | NOP | No Operation
void __WFI (void) | M0, M3, M4 | WFI | Wait for Interrupt
void __WFE (void) | M0, M3, M4 | WFE | Wait for Event
void __SEV (void) | M0, M3, M4 | SEV | Set Event
void __ISB (void) | M0, M3, M4 | ISB | Instruction Synchronization Barrier
void __DSB (void) | M0, M3, M4 | DSB | Data Synchronization Barrier
void __DMB (void) | M0, M3, M4 | DMB | Data Memory Barrier
uint32_t __REV (uint32_t value) | M0, M3, M4 | REV | Reverse byte order in integer value.
uint32_t __REV16 (uint16_t value) | M0, M3, M4 | REV16 | Reverse byte order in unsigned short value.
sint32_t __REVSH (sint16_t value) | M0, M3, M4 | REVSH | Reverse byte order in signed short value with sign extension to integer.
uint32_t __RBIT (uint32_t value) | M3, M4 | RBIT | Reverse bit order of value
uint8_t __LDREXB (uint8_t *addr) | M3, M4 | LDREXB | Load exclusive byte
uint16_t __LDREXH (uint16_t *addr) | M3, M4 | LDREXH | Load exclusive half-word
uint32_t __LDREXW (uint32_t *addr) | M3, M4 | LDREXW | Load exclusive word
uint8_t __STREXB (uint8_t value, uint8_t *addr) | M3, M4 | STREXB | Store exclusive byte
uint16_t __STREXH (uint16_t value, uint16_t *addr) | M3, M4 | STREXH | Store exclusive half-word
uint32_t __STREXW (uint32_t value, uint32_t *addr) | M3, M4 | STREXW | Store exclusive word
void __CLREX (void) | M3, M4 | CLREX | Remove the exclusive lock created by __LDREXB, __LDREXH, or __LDREXW
void __SSAT (void) | M3, M4 | SSAT | saturate a signed value
void __USAT (void) | M3, M4 | USAT | saturate an unsigned value

NVIC Access Functions

The CMSIS provides access to the NVIC via the register interface structure and several helper functions that simplify the setup of the NVIC. The CMSIS HAL uses IRQ numbers (IRQn) to identify the interrupts. The first device interrupt has the IRQn value 0. Therefore negative IRQn values are used for processor core exceptions.

For the IRQn values of core exceptions the file device.h provides the following enum names.

Core Exception enum Value | Core | IRQn | Description
NonMaskableInt_IRQn | M0, M3, M4 | -14 | Cortex-M Non Maskable Interrupt
HardFault_IRQn | M0, M3, M4 | -13 | Cortex-M Hard Fault Interrupt
MemoryManagement_IRQn | M3, M4 | -12 | Cortex-M Memory Management Interrupt
BusFault_IRQn | M3, M4 | -11 | Cortex-M Bus Fault Interrupt
UsageFault_IRQn | M3, M4 | -10 | Cortex-M Usage Fault Interrupt
SVCall_IRQn | M0, M3, M4 | -5 | Cortex-M SV Call Interrupt
DebugMonitor_IRQn | M3, M4 | -4 | Cortex-M Debug Monitor Interrupt
PendSV_IRQn | M0, M3, M4 | -2 | Cortex-M Pend SV Interrupt
SysTick_IRQn | M0, M3, M4 | -1 | Cortex-M System Tick Interrupt

The following functions simplify the setup of the NVIC. The functions are defined as static inline.

Name | Core | Parameter | Description
void NVIC_SetPriorityGrouping (uint32_t PriorityGroup) | M3, M4 | Priority Grouping Value | Set the Priority Grouping (Groups . Subgroups)
uint32_t NVIC_GetPriorityGrouping (void) | M3, M4 | (void) | Get the Priority Grouping (Groups . Subgroups)
void NVIC_EnableIRQ (IRQn_Type IRQn) | M0, M3, M4 | IRQ Number | Enable IRQn
void NVIC_DisableIRQ (IRQn_Type IRQn) | M0, M3, M4 | IRQ Number | Disable IRQn
uint32_t NVIC_GetPendingIRQ (IRQn_Type IRQn) | M0, M3, M4 | IRQ Number | Return 1 if IRQn is pending else 0
void NVIC_SetPendingIRQ (IRQn_Type IRQn) | M0, M3, M4 | IRQ Number | Set IRQn Pending
void NVIC_ClearPendingIRQ (IRQn_Type IRQn) | M0, M3, M4 | IRQ Number | Clear IRQn Pending Status
uint32_t NVIC_GetActive (IRQn_Type IRQn) | M3, M4 | IRQ Number | Return 1 if IRQn is active else 0
void NVIC_SetPriority ( IRQn_Type IRQn, uint32_t priority) | M0, M3, M4 | IRQ Number, Priority | Set Priority for IRQn (not threadsafe for Cortex-M0)
uint32_t NVIC_GetPriority (IRQn_Type IRQn) | M0, M3, M4 | IRQ Number | Get Priority for IRQn
uint32_t NVIC_EncodePriority ( uint32_t PriorityGroup, uint32_t PreemptPriority, uint32_t SubPriority) | M3, M4 | IRQ Number, Priority Group, Preemptive Priority, Sub Priority | Encode priority for given group, preemptive and sub priority
void NVIC_DecodePriority ( uint32_t Priority, uint32_t PriorityGroup, uint32_t* pPreemptPriority, uint32_t* pSubPriority) | M3, M4 | Priority, Priority Group, pointer to Preempt. Priority, pointer to Sub Priority | Decode given priority to group, preemptive and sub priority
void NVIC_SystemReset (void) | M0, M3, M4 | (void) | Resets the System

Note

  • The processor exceptions have negative enum values. Device specific interrupts have positive enum values and start with 0. The values are defined in device.h file.

  • The values for PreemptPriority and SubPriority used in functions NVIC_EncodePriority and NVIC_DecodePriority depend on the available __NVIC_PRIO_BITS implemented in the NVIC.

SysTick Configuration Function

The following function is used to configure the SysTick timer and start the SysTick interrupt.

Name | Parameter | Description
uint32_t SysTickConfig (uint32_t ticks) | ticks is SysTick counter reload value | Setup the SysTick timer and enable the SysTick interrupt. After this call the SysTick timer creates interrupts with the specified time interval. Return: 0 when successful, 1 on failure.

Cortex-M3 / Cortex-M4 ITM Debug Access

The Cortex-M3 / Cortex-M4 incorporates the Instrumented Trace Macrocell (ITM) that provides together with the Serial Viewer Output trace capabilities for the microcontroller system. The ITM has 32 communication channels; two ITM communication channels are used by CMSIS to output the following information:

  • ITM Channel 0: implements the ITM_SendChar function which can be used for printf-style output via the debug interface.
  • ITM Channel 31: is reserved for the RTOS kernel and can be used for kernel awareness debugging.

Note

  • The ITM channel 31 is selected for the RTOS kernel since some kernels may use the Privileged level for program execution. ITM channels have 4 groups with 8 channels each, whereby each group can be configured for access rights in the Unprivileged level. The ITM channel 0 may be therefore enabled for the user task whereas ITM channel 31 may be accessible only in Privileged level from the RTOS kernel itself.

The prototype of the ITM_SendChar routine is shown in the table below.

Name | Parameter | Description
void uint32_t ITM_SendChar(uint32_t chr) | character to output | The function outputs a character via the ITM channel 0. The function returns when no debugger is connected that has booked the output. It is blocking when a debugger is connected, but the previous character send is not transmitted. Return: the input character 'chr'.

Example for the usage of the ITM Channel 31 for RTOS Kernels:

  // check if debugger connected and ITM channel enabled for tracing
  if ((CoreDebug->DEMCR & CoreDebug_DEMCR_TRCENA) &&
  (ITM->TCR & ITM_TCR_ITMENA) &&
  (ITM->TER & (1UL << 31))) {
    // transmit trace data
    while (ITM->PORT31_U32 == 0);
    ITM->PORT[31].u8 = task_id;      // id of next task
    while (ITM->PORT[31].u32 == 0);
    ITM->PORT[31].u32 = task_status; // status information
  }

Cortex-M3 additional Debug Access

CMSIS provides additional debug functions to enlarge the Cortex-M3 Debug Access. Data can be transmitted via a certain global buffer variable towards the target system.

The buffer variable and the prototypes of the additional functions are shown in the table below.

Name | Parameter | Description
extern volatile int ITM_RxBuffer |  | Buffer to transmit data towards debug system. Value 0x5AA55AA5 indicates that buffer is empty.
int ITM_ReceiveChar (void) | none | The nonblocking functions returns the character stored in ITM_RxBuffer. Return: -1 indicates that no character was received.
int ITM_CheckChar (void) | none | The function checks if a character is available in ITM_RxBuffer. Return: 1 indicates that a character is available, 0 indicates that no character is available.

CMSIS Example

The following section shows a typical example for using the CMSIS layer in user applications. The example is based on a STM32F10x Device.

#include "stm32f10x.h"

volatile uint32_t msTicks;                       /* timeTicks counter */

void SysTick_Handler(void) {
  msTicks++;                                     /* increment timeTicks counter */
}

__INLINE static void Delay (uint32_t dlyTicks) {
  uint32_t curTicks = msTicks;

  while ((msTicks - curTicks) < dlyTicks);
}

__INLINE static void LED_Config(void) {
  ;                                              /* Configure the LEDs */
}

__INLINE static void LED_On (uint32_t led) {
  ;                                              /* Turn On  LED */
}

__INLINE static void LED_Off (uint32_t led) {
  ;                                              /* Turn Off LED */
}

int main (void) {
  if (SysTick_Config (SystemCoreClock / 1000)) { /* Setup SysTick for 1 msec interrupts */
    ;                                            /* Handle Error */
    while (1);
  }

  LED_Config();                                  /* configure the LEDs */

  while(1) {
    LED_On (0x100);                              /* Turn  on the LED   */
    Delay (100);                                 /* delay  100 Msec    */
    LED_Off (0x100);                             /* Turn off the LED   */
    Delay (100);                                 /* delay  100 Msec    */
  }
}