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LPCOpen Platform for NXP LPC Microcontrollers
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HAL_LPC17xx.h
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1 /*
2  * @brief HAL USB functions for the LPC17xx microcontrollers
3  *
4  * @note
5  * Copyright(C) NXP Semiconductors, 2012
6  * All rights reserved.
7  *
8  * @par
9  * Software that is described herein is for illustrative purposes only
10  * which provides customers with programming information regarding the
11  * LPC products. This software is supplied "AS IS" without any warranties of
12  * any kind, and NXP Semiconductors and its licensor disclaim any and
13  * all warranties, express or implied, including all implied warranties of
14  * merchantability, fitness for a particular purpose and non-infringement of
15  * intellectual property rights. NXP Semiconductors assumes no responsibility
16  * or liability for the use of the software, conveys no license or rights under any
17  * patent, copyright, mask work right, or any other intellectual property rights in
18  * or to any products. NXP Semiconductors reserves the right to make changes
19  * in the software without notification. NXP Semiconductors also makes no
20  * representation or warranty that such application will be suitable for the
21  * specified use without further testing or modification.
22  *
23  * @par
24  * Permission to use, copy, modify, and distribute this software and its
25  * documentation is hereby granted, under NXP Semiconductors' and its
26  * licensor's relevant copyrights in the software, without fee, provided that it
27  * is used in conjunction with NXP Semiconductors microcontrollers. This
28  * copyright, permission, and disclaimer notice must appear in all copies of
29  * this code.
30  */
31 
36 #ifndef __HAL_LPC17XX_H__
37 #define __HAL_LPC17XX_H__
38 
39 #include "chip.h"
40 
41 #define __INCLUDE_FROM_USB_DRIVER
42 #include "../../USBMode.h"
43 
44 #define USBRAM_SECTION RAM2
45 
46 #if defined(__LPC177X_8X__) || defined(__LPC407X_8X__)
47 
48 #if defined(__CC_ARM)
49  #define __BSS(x) __attribute__ ((section("usbram")))
50 #endif
51 #if defined(__ICCARM__)
52  #define __BSS(x) @ ".sram"
53 #endif
54 #else
55 #if defined(__CC_ARM) || defined(__ICCARM__)
56  #define __BSS(x)
57 #endif
58 #endif
59 
60 #define USB_REG(CoreID) LPC_USB
61 
69 extern void HcdIrqHandler(uint8_t HostID);
70 
71 #ifdef USB_CAN_BE_DEVICE
72 
73 /* Device Interrupt Bit Definitions */
74 #define FRAME_INT 0x00000001
75 #define EP_FAST_INT 0x00000002
76 #define EP_SLOW_INT 0x00000004
77 #define DEV_STAT_INT 0x00000008
78 #define CCEMTY_INT 0x00000010
79 #define CDFULL_INT 0x00000020
80 #define RxENDPKT_INT 0x00000040
81 #define TxENDPKT_INT 0x00000080
82 #define EP_RLZED_INT 0x00000100
83 #define ERR_INT 0x00000200
84 
85 /* Rx & Tx Packet Length Definitions */
86 #define PKT_LNGTH_MASK 0x000003FF
87 #define PKT_DV 0x00000400
88 #define PKT_RDY 0x00000800
89 
90 /* USB Control Definitions */
91 #define CTRL_RD_EN 0x00000001
92 #define CTRL_WR_EN 0x00000002
93 
94 /* Command Codes */
95 #define CMD_SET_ADDR 0x00D00500
96 #define CMD_CFG_DEV 0x00D80500
97 #define CMD_SET_MODE 0x00F30500
98 #define CMD_RD_FRAME 0x00F50500
99 #define DAT_RD_FRAME 0x00F50200
100 #define CMD_RD_TEST 0x00FD0500
101 #define DAT_RD_TEST 0x00FD0200
102 #define CMD_SET_DEV_STAT 0x00FE0500
103 #define CMD_GET_DEV_STAT 0x00FE0500
104 #define DAT_GET_DEV_STAT 0x00FE0200
105 #define CMD_GET_ERR_CODE 0x00FF0500
106 #define DAT_GET_ERR_CODE 0x00FF0200
107 #define CMD_RD_ERR_STAT 0x00FB0500
108 #define DAT_RD_ERR_STAT 0x00FB0200
109 #define DAT_WR_BYTE(x) (0x00000100 | ((x) << 16))
110 #define CMD_SEL_EP(x) (0x00000500 | ((x) << 16))
111 #define DAT_SEL_EP(x) (0x00000200 | ((x) << 16))
112 #define CMD_SEL_EP_CLRI(x) (0x00400500 | ((x) << 16))
113 #define DAT_SEL_EP_CLRI(x) (0x00400200 | ((x) << 16))
114 #define CMD_SET_EP_STAT(x) (0x00400500 | ((x) << 16))
115 #define CMD_CLR_BUF 0x00F20500
116 #define DAT_CLR_BUF 0x00F20200
117 #define CMD_VALID_BUF 0x00FA0500
118 
119 /* Device Address Register Definitions */
120 #define DEV_ADDR_MASK 0x7F
121 #define DEV_EN 0x80
122 
123 /* Device Configure Register Definitions */
124 #define CONF_DVICE 0x01
125 
126 /* Device Mode Register Definitions */
127 #define AP_CLK 0x01
128 #define INAK_CI 0x02
129 #define INAK_CO 0x04
130 #define INAK_II 0x08
131 #define INAK_IO 0x10
132 #define INAK_BI 0x20
133 #define INAK_BO 0x40
134 
135 /* Device Status Register Definitions */
136 #define DEV_CON 0x01
137 #define DEV_CON_CH 0x02
138 #define DEV_SUS 0x04
139 #define DEV_SUS_CH 0x08
140 #define DEV_RST 0x10
141 
142 /* Error Code Register Definitions */
143 #define ERR_EC_MASK 0x0F
144 #define ERR_EA 0x10
145 
146 /* Error Status Register Definitions */
147 #define ERR_PID 0x01
148 #define ERR_UEPKT 0x02
149 #define ERR_DCRC 0x04
150 #define ERR_TIMOUT 0x08
151 #define ERR_EOP 0x10
152 #define ERR_B_OVRN 0x20
153 #define ERR_BTSTF 0x40
154 #define ERR_TGL 0x80
155 
156 /* Endpoint Select Register Definitions */
157 #define EP_SEL_F 0x01
158 #define EP_SEL_ST 0x02
159 #define EP_SEL_STP 0x04
160 #define EP_SEL_PO 0x08
161 #define EP_SEL_EPN 0x10
162 #define EP_SEL_B_1_FULL 0x20
163 #define EP_SEL_B_2_FULL 0x40
164 
165 /* Endpoint Status Register Definitions */
166 #define EP_STAT_ST 0x01
167 #define EP_STAT_DA 0x20
168 #define EP_STAT_RF_MO 0x40
169 #define EP_STAT_CND_ST 0x80
170 
171 /* Clear Buffer Register Definitions */
172 #define CLR_BUF_PO 0x01
173 
174 /* DMA Interrupt Bit Definitions */
175 #define EOT_INT 0x01
176 #define NDD_REQ_INT 0x02
177 #define SYS_ERR_INT 0x04
178 
179 void HAL_Reset (uint8_t corenum);
180 
186 void HAL_SetDeviceAddress (uint8_t Address);
187 
193 void HAL17XX_USBConnect (uint32_t con);
194 
200 uint32_t SIE_ReadCommandData (uint32_t cmd);/* Device_LPC17xx */
201 
202 /*---------- DMA Descriptor ----------*/
203 typedef struct {
204  /*---------- Word 0 ----------*/
205  uint32_t NextDD;
206 
207  /*---------- Word 1 ----------*/
208  /* 1st half word */
209  uint16_t Mode : 2;
210  uint16_t NextDDValid : 1;
211  uint16_t : 1;
212  uint16_t Isochronous : 1;
213  uint16_t MaxPacketSize : 11;
214  /* 2nd half word */
215  __IO uint16_t BufferLength;
216 
217  /*---------- Word 2 ----------*/
218  __IO uint8_t *BufferStartAddr;
219 
220  /*---------- Word 3 ----------*/
221  /* 1st half word */
222  __IO uint16_t Retired : 1;
223  uint16_t Status : 4;
224  uint16_t IsoPacketValid : 1;
225  uint16_t LSByteExtracted : 1; /* ATLE mode */
226  uint16_t MSByteExtracted : 1; /* ATLE mode */
227  uint16_t MessageLengthPosition : 6;
228  uint16_t : 2;
229  /* 2st half word */
230  uint16_t PresentCount;
231 
232  /*---------- Word 4 ----------*/
233  uint32_t IsoBufferAddr; /* Iso transfer exclusive */
234 } DMADescriptor, *PDMADescriptor;
235 #endif
236 
237 #endif // __HAL_LPC17XX_H__
238