LPCOpen Platform  v1.03
LPCOpen Platform for NXP LPC Microcontrollers
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HAL_LPC18xx.h
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1 /*
2  * @brief HAL USB functions for the LPC18xx microcontrollers
3  *
4  * @note
5  * Copyright(C) NXP Semiconductors, 2012
6  * All rights reserved.
7  *
8  * @par
9  * Software that is described herein is for illustrative purposes only
10  * which provides customers with programming information regarding the
11  * LPC products. This software is supplied "AS IS" without any warranties of
12  * any kind, and NXP Semiconductors and its licensor disclaim any and
13  * all warranties, express or implied, including all implied warranties of
14  * merchantability, fitness for a particular purpose and non-infringement of
15  * intellectual property rights. NXP Semiconductors assumes no responsibility
16  * or liability for the use of the software, conveys no license or rights under any
17  * patent, copyright, mask work right, or any other intellectual property rights in
18  * or to any products. NXP Semiconductors reserves the right to make changes
19  * in the software without notification. NXP Semiconductors also makes no
20  * representation or warranty that such application will be suitable for the
21  * specified use without further testing or modification.
22  *
23  * @par
24  * Permission to use, copy, modify, and distribute this software and its
25  * documentation is hereby granted, under NXP Semiconductors' and its
26  * licensor's relevant copyrights in the software, without fee, provided that it
27  * is used in conjunction with NXP Semiconductors microcontrollers. This
28  * copyright, permission, and disclaimer notice must appear in all copies of
29  * this code.
30  */
31 
37 #ifndef __HAL_LPC18XX_H__
38 #define __HAL_LPC18XX_H__
39 
40 #include "chip.h"
41 
42 #define __INCLUDE_FROM_USB_DRIVER
43 #include "../../USBMode.h"
44 
45 #define USBRAM_SECTION RAM2
46 
47 #if defined(__ICCARM__)
48  #define __BSS(x) @ ".ahb_sram1"
49 #elif defined(__CC_ARM)
50  #define __BSS(x)
51 #endif
52 /* bit defines for DEVICEADDR register. */
53 #define USBDEV_ADDR_AD (1 << 24)
54 #define USBDEV_ADDR(n) (((n) & 0x7F) << 25)
55 
56 /* Max USB Core specially for LPC18xx/43xx series. */
57 #define LPC18_43_MAX_USB_CORE 2
58 
59 /* This macro is used to get proper USB Register base address
60  * from specified USB core ID.
61  */
62 #define USB_REG(CoreID) USB_REG_BASE_ADDR[CoreID]
63 
64 /* Terminated Link Mask of USB DMA. */
65 #define LINK_TERMINATE 0x01
66 
67 /* Constant table stores base addresses of USB Register Structures. */
68 extern IP_USBHS_001_T * const USB_REG_BASE_ADDR[];
69 
77 extern void HcdIrqHandler(uint8_t HostID);
78 
86 extern void DcdIrqHandler (uint8_t corenum);
87 
88 void HAL_Reset (uint8_t corenum);
89 
90 #endif // __HAL_LPC18XX_H__
91