LPCOpen Platform  v1.03
LPCOpen Platform for NXP LPC Microcontrollers
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adc_001.c
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1 /*
2  * @brief ADC Registers and control functions
3  *
4  * @note
5  * Copyright(C) NXP Semiconductors, 2012
6  * All rights reserved.
7  *
8  * @par
9  * Software that is described herein is for illustrative purposes only
10  * which provides customers with programming information regarding the
11  * LPC products. This software is supplied "AS IS" without any warranties of
12  * any kind, and NXP Semiconductors and its licensor disclaim any and
13  * all warranties, express or implied, including all implied warranties of
14  * merchantability, fitness for a particular purpose and non-infringement of
15  * intellectual property rights. NXP Semiconductors assumes no responsibility
16  * or liability for the use of the software, conveys no license or rights under any
17  * patent, copyright, mask work right, or any other intellectual property rights in
18  * or to any products. NXP Semiconductors reserves the right to make changes
19  * in the software without notification. NXP Semiconductors also makes no
20  * representation or warranty that such application will be suitable for the
21  * specified use without further testing or modification.
22  *
23  * @par
24  * Permission to use, copy, modify, and distribute this software and its
25  * documentation is hereby granted, under NXP Semiconductors' and its
26  * licensor's relevant copyrights in the software, without fee, provided that it
27  * is used in conjunction with NXP Semiconductors microcontrollers. This
28  * copyright, permission, and disclaimer notice must appear in all copies of
29  * this code.
30  */
31 
32 #include "adc_001.h"
33 
34 /*****************************************************************************
35  * Private types/enumerations/variables
36  ****************************************************************************/
37 
38 /*****************************************************************************
39  * Public types/enumerations/variables
40  ****************************************************************************/
41 
42 /*****************************************************************************
43  * Private functions
44  ****************************************************************************/
45 
46 /*****************************************************************************
47  * Public functions
48  ****************************************************************************/
49 
50 /* Initialize the ADC */
51 void IP_ADC_Init(IP_ADC_001_T *pADC, uint8_t div, uint8_t bitsAcc, uint32_t flag)
52 {
53  uint32_t cr;
54 #if defined(ADC_TRIM_SUPPORT)
55  pADC->ADTRM = 0xF00;
56 #endif
57  pADC->INTEN = 0; /* Disable all interrupts */
58 
59  cr = pADC->CR & (~ADC_CONFIG_MASK);
60 #if defined(ADC_ACC_12BITS)
61  cr |= ADC_CR_CLKDIV(div) | flag;
62 #else
63  cr |= ADC_CR_CLKDIV(div) | ADC_CR_BITACC(bitsAcc) | flag;
64 #endif /*defined(ADC_ACC_12BITS)*/
65 
66  pADC->CR = cr;
67 }
68 
69 /* Shutdown ADC */
70 void IP_ADC_DeInit(IP_ADC_001_T *pADC)
71 {
72  pADC->INTEN = 0x00000100;
73  pADC->CR = 0;
74 }
75 
76 /* Set burst mode for ADC */
77 void IP_ADC_SetBurstMode(IP_ADC_001_T *pADC, FunctionalState NewState)
78 {
79 #if defined(CHIP_LPC1347)
80  pADC->INTEN &= ~(1<<8);
81 #endif
82  if (NewState == DISABLE) {
83  pADC->CR &= ~ADC_CR_BURST;
84  }
85  else {
86  pADC->CR |= ADC_CR_BURST;
87  }
88 }
89 
90 /* Get the ADC value */
91 Status IP_ADC_Get_Val(IP_ADC_001_T *pADC, uint8_t channel, uint16_t *data)
92 {
93  uint32_t temp;
94  temp = pADC->DR[channel];
95  if (!ADC_DR_DONE(temp)) {
96  return ERROR;
97  }
98  /* if(ADC_DR_OVERRUN(temp) && (pADC->CR & ADC_CR_BURST)) */
99  /* return ERROR; */
100  *data = (uint16_t) ADC_DR_RESULT(temp);
101  return SUCCESS;
102 }
103 
104 /* Get ADC Channel status from ADC data register */
105 FlagStatus IP_ADC_GetStatus(IP_ADC_001_T *pADC, uint8_t channel, uint32_t StatusType)
106 {
107  switch (StatusType) {
108  case ADC_DR_DONE_STAT:
109  return (pADC->STAT & (1UL << channel)) ? SET : RESET;
110 
111  case ADC_DR_OVERRUN_STAT:
112  channel += 8;
113  return (pADC->STAT & (1UL << channel)) ? SET : RESET;
114 
115  case ADC_DR_ADINT_STAT:
116  return pADC->STAT >> 16 ? SET : RESET;
117 
118  default:
119  break;
120  }
121  return RESET;
122 }
123 
124 /* Set the edge start condition */
125 void IP_ADC_EdgeStartConfig(IP_ADC_001_T *pADC, uint8_t edge_mode)
126 {
127  if (edge_mode) {
128  pADC->CR |= ADC_CR_EDGE;
129  }
130  else {
131  pADC->CR &= ~ADC_CR_EDGE;
132  }
133 }
134 
135 /* Enable/Disable ADC channel number */
136 void IP_ADC_SetChannelNumber(IP_ADC_001_T *pADC, uint8_t channel, FunctionalState NewState)
137 {
138  if (NewState == ENABLE) {
139  pADC->CR |= ADC_CR_CH_SEL(channel);
140  }
141  else {
142  pADC->CR &= ~ADC_CR_START_MASK;
143  pADC->CR &= ~ADC_CR_CH_SEL(channel);
144  }
145 }
146 
147 /* Set start mode for ADC */
148 void IP_ADC_SetStartMode(IP_ADC_001_T *pADC, uint8_t start_mode)
149 {
150  uint32_t temp;
151  temp = pADC->CR & (~ADC_CR_START_MASK);
152  pADC->CR = temp | (ADC_CR_START_MODE_SEL((uint32_t) start_mode));
153 }
154 
155 /* Enable/Disable interrupt for ADC channel */
156 void IP_ADC_Int_Enable(IP_ADC_001_T *pADC, uint8_t channel, FunctionalState NewState)
157 {
158  if (NewState == ENABLE) {
159  pADC->INTEN |= (1UL << channel);
160  }
161  else {
162  pADC->INTEN &= (~(1UL << channel));
163  }
164 }