adc_17xx_40xx.h

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/*
 * @brief LPC17xx/40xx ADC conversion driver
 *
 * @note
 * Copyright(C) NXP Semiconductors, 2012
 * All rights reserved.
 *
 * @par
 * Software that is described herein is for illustrative purposes only
 * which provides customers with programming information regarding the
 * LPC products.  This software is supplied "AS IS" without any warranties of
 * any kind, and NXP Semiconductors and its licensor disclaim any and
 * all warranties, express or implied, including all implied warranties of
 * merchantability, fitness for a particular purpose and non-infringement of
 * intellectual property rights.  NXP Semiconductors assumes no responsibility
 * or liability for the use of the software, conveys no license or rights under any
 * patent, copyright, mask work right, or any other intellectual property rights in
 * or to any products. NXP Semiconductors reserves the right to make changes
 * in the software without notification. NXP Semiconductors also makes no
 * representation or warranty that such application will be suitable for the
 * specified use without further testing or modification.
 *
 * @par
 * Permission to use, copy, modify, and distribute this software and its
 * documentation is hereby granted, under NXP Semiconductors' and its
 * licensor's relevant copyrights in the software, without fee, provided that it
 * is used in conjunction with NXP Semiconductors microcontrollers.  This
 * copyright, permission, and disclaimer notice must appear in all copies of
 * this code.
 */

#ifndef __ADC_17XX_40XX_H_
#define __ADC_17XX_40XX_H_

#ifdef __cplusplus
extern "C" {
#endif

#if defined(CHIP_LPC175X_6X)
#define ADC_MAX_SAMPLE_RATE 200000
#else
#define ADC_MAX_SAMPLE_RATE 400000
#endif

typedef enum CHIP_ADC_CHANNEL {
 ADC_CH0 = 0, 
 ADC_CH1,  
 ADC_CH2,  
 ADC_CH3,  
 ADC_CH4,  
 ADC_CH5,  
 ADC_CH6,  
 ADC_CH7,  
} CHIP_ADC_CHANNEL_T;

typedef enum CHIP_ADC_EDGE_CFG {
 ADC_TRIGGERMODE_RISING = 0,  
 ADC_TRIGGERMODE_FALLING,  
} CHIP_ADC_EDGE_CFG_T;

typedef enum CHIP_ADC_START_MODE {
 ADC_NO_START = 0,
 ADC_START_NOW,   
 ADC_START_ON_CTOUT15, 
 ADC_START_ON_CTOUT8, 
 ADC_START_ON_ADCTRIG0, 
 ADC_START_ON_ADCTRIG1, 
 ADC_START_ON_MCOA2  
} CHIP_ADC_START_MODE_T;

typedef struct {
 uint32_t adcRate;  
 uint8_t  bitsAccuracy; 
 bool  burstMode;  
} ADC_Clock_Setup_T;

STATIC INLINE Status Chip_ADC_Read_Value(LPC_ADC_T *pADC, uint8_t channel, uint16_t *data)
{
 return IP_ADC_Get_Val(pADC, channel, data);
}

STATIC INLINE FlagStatus Chip_ADC_Read_Status(LPC_ADC_T *pADC, uint8_t channel, uint32_t StatusType)
{
 return IP_ADC_GetStatus(pADC, channel, StatusType);
}

STATIC INLINE void Chip_ADC_Channel_Int_Cmd(LPC_ADC_T *pADC, uint8_t channel, FunctionalState NewState)
{
 IP_ADC_Int_Enable(pADC, channel, NewState);
}

STATIC INLINE void Chip_ADC_Global_Int_Cmd(LPC_ADC_T *pADC, FunctionalState NewState)
{
 IP_ADC_Int_Enable(pADC, 8, NewState);
}

void Chip_ADC_DeInit(LPC_ADC_T *pADC);

void Chip_ADC_Init(LPC_ADC_T *pADC, ADC_Clock_Setup_T *ADCSetup);

void Chip_ADC_Set_StartMode(LPC_ADC_T *pADC, CHIP_ADC_START_MODE_T mode, CHIP_ADC_EDGE_CFG_T EdgeOption);

void Chip_ADC_Set_SampleRate(LPC_ADC_T *pADC, ADC_Clock_Setup_T *ADCSetup, uint32_t rate);

void Chip_ADC_Channel_Enable_Cmd(LPC_ADC_T *pADC, CHIP_ADC_CHANNEL_T channel, FunctionalState NewState);

void Chip_ADC_Burst_Cmd(LPC_ADC_T *pADC, FunctionalState NewState);

Status Chip_ADC_Read_Byte(LPC_ADC_T *pADC, CHIP_ADC_CHANNEL_T channel, uint8_t *data);

#ifdef __cplusplus
}
#endif

#endif /* __ADC_17XX_40XX_H_ */