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LPCOpen Platform
v1.03
LPCOpen Platform for NXP LPC Microcontrollers
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| Analog Comparator register block structure | |
| Clock setup structure for ADC controller passed to the initialize function | |
| CCU clock config/status register pair | |
| I2S Audio Format Structure | |
| SPI data setup structure | |
| DMA channel handle structure | |
| Transfer Descriptor structure typedef | |
| [Blank check sector(s)] command parameter table structure | |
| [Blank check sector(s)] command result table structure | |
| Command parameter table structure | |
| [Compare memory] command parameter table structure | |
| [Compare memory] command result table structure | |
| [Copy Ram to Flash] command parameter table structure | |
| [Copy Ram to Flash] command result table structure | |
| [Erase Sector(s)] command parameter table structure | |
| [Erase Sector(s)] command result table structure | |
| Command result table structure | |
| [Prepare sectors] command parameter table structure | |
| [Prepare sectors] command result table structure | |
| [Read Boot code version number] command parameter table structure | |
| [Read Boot code version number] command result table structure | |
| [Read Part Identification number] command parameter table structure | |
| [Read Part Identification number] command result table structure | |
| [ReadUID] command parameter table structure | |
| [ReadUID] command result table structure | |
| [Reinvoke ISP] command parameter table structure | |
| [Reinvoke ISP] command result table structure | |
| GPDMA structure using for DMA configuration | |
| HID Parser Report Item Collection Path Structure | |
| HID Parser Report Item Min/Max Structure | |
| HID Parser State Structure | |
| HID Parser Report Item Attributes Structure | |
| HID Parser Report Item Details Structure | |
| HID Parser Report Size Structure | |
| HID Parser Report Item Unit Structure | |
| HID Parser Report Item Usage Structure | |
| Master transfer data structure definitions | |
| 10 or 12-bit ADC register block structure | |
| Alarm Timer register block structure | |
| CAN acceptance filter RAM register block structure | |
| CAN acceptance filter register block structure | |
| Central CAN register block structure | |
| CAN Receive register block structure | |
| CAN register block structure | |
| CAN Transmit register block structure | |
| Acceptance Filter Section Table structure | |
| CAN Bus Timing Structure | |
| Extended ID Entry structure | |
| Extended ID Range structure | |
| CAN Message Object Structure | |
| Standard ID Entry structure | |
| Standard ID Range structure | |
| CCAN message interface register block structure | |
| CCAN Controller Area Network register block structure | |
| Comparator (CMP) register block structure | |
| CRC register block structure | |
| DAC register block structure | |
| EEPROM register block structure | |
| EEPROM register block structure | |
| External Memory Controller (EMC) register block structure | |
| EMC Dynamic Configure Struct | |
| EMC Dynamic Device Configuration structure used for IP drivers | |
| EMC Static Configure Structure | |
| Structure of a enhanced receive descriptor (with timestamp) | |
| Structure of a enhanced transmit descriptor (with timestamp) | |
| Structure of a receive descriptor (without timestamp) | |
| 10/100 MII & RMII Ethernet with timestamping register block structure | |
| Structure of a transmit descriptor (without timestamp) | |
| Ethernet Control register block structure | |
| Ethernet (002) MAC register block structure | |
| Ethernet Module Control register block structure | |
| RX Descriptor structure | |
| Ethernet Receive Filter register block structure | |
| RX Status structure | |
| Ethernet register block structure | |
| Ethernet Transfer register Block Structure | |
| TX Descriptor structure | |
| TX Status structure | |
| Global Input Multiplexer Array (GIMA) register block structure | |
| GPDMA Channel register block structure | |
| GPDMA register block | |
| GPIO port register block structure | |
| GPIO port (GPIO_PORT) for LPC175x_6x, LPC177x_8x and LPC407x_8x | |
| GPIO port register block structure | |
| GPIO grouped interrupt register block structure | |
| GPIO Interrupt register block structure | |
| GPIO pin interrupt register block structure | |
| I2C register block structure | |
| I2S register block structure | |
| LCD Controller register block structure | |
| Motor Control PWM register block structure | |
| MRT register block structure | |
| Power Management Controller register block structure | |
| Quadrature Encoder Interface register block structure | |
| Register File register block structure | |
| Repetitive Interrupt Timer register block structure | |
| Real Time Clock register block structure | |
| State Configurable Timer register block structure | |
| SDC Data Transfer Setup structure | |
| SDC Command Response structure | |
| SD/MMC card Interface (SDC) register block structure | |
| SD/MMC & SDIO register block structure | |
| Serial GPIO register block structure | |
| SPI register block structure | |
| SPI register block structure | |
| SPI Configure Struct | |
| SPI Delay Configure Struct | |
| SSP register block structure | |
| 32-bit Standard timer register block structure | |
| USART register block structure | |
| USART2 register block structure | |
| USB register block structure | |
| USB High-Speed register block structure | |
| Self wake-up timer register block structure | |
| Windowed Watchdog register block structure | |
| IPC Queue Structure used for sync between M0 and M4 | |
| A structure for LCD Configuration | |
| LCD Palette entry format | |
| CCU1 register block structure | |
| CCU2 register block structure | |
| LPC18XX/43XX CGU register block structure | |
| CREG Register Block | |
| Debug output formatter lock define When using FreeRTOS and with LWIP_DEBUG enabled, enabling this define will allow RX debug messages to not interleave with the TX messages (so they are actually readable). Not enabling this define when the system is under load will cause the output to be unreadable. There is a small tradeoff in performance for this so use it only for debug | |
| Event Router register structure | |
| FLASH Memory Controller Unit register block structure | |
| IOCON register block | |
| MRT register block structure | |
| NAND Flash Size structure | |
| OTP Register block | |
| LPC8xx Pin Interrupt and Pattern Match register block structure | |
| Power Management Unit register block structure | |
| RGU register structure | |
| System Control Unit register block | |
| LPC8XX Switch Matrix register block structure | |
| LPC11XX System Control block structure | |
| LPC11xx USB device register block structure | |
| Memory test address/size and result structure | |
| CAN message object structure | |
| PIMA Still Image Device Command/Response Container | |
| SDIO chained DMA descriptor | |
| LPC8XX Power ROM API structure | |
| Ring buffer structure | |
| LPC8XX High level ROM API structure | |
| SCSI Device LUN Capacity Structure | |
| SDIO device type | |
| SD/MMC Card specific setup data structure | |
| SDC Event structure | |
| Structure used to store information about a specific window | |
| LPC17XX/40XX Clock and Power PLL register block structure | |
| Auto Baudrate mode configuration type definition | |
| UART FIFO Configuration Structure definition | |
| UART Ring buffer structure | |
| Audio Class Device Mode Configuration and State Structure | |
| Audio Class Host Mode Configuration and State Structure | |
| CDC Class Device Mode Configuration and State Structure | |
| CDC Class Host Mode Configuration and State Structure | |
| HID Class Device Mode Configuration and State Structure | |
| HID Class Host Mode Configuration and State Structure | |
| MIDI Class Device Mode Configuration and State Structure | |
| MIDI Class Host Mode Configuration and State Structure | |
| Mass Storage Class Device Mode Configuration and State Structure | |
| Mass Storage Class Host Mode Configuration and State Structure | |
| Printer Class Host Mode Configuration and State Structure | |
| RNDIS Class Device Mode Configuration and State Structure | |
| RNDIS Class Host Mode Configuration and State Structure | |
| Still Image Class Host Mode Configuration and State Structure | |
| USB descriptors data structure | |
| Type define for the device configuration descriptor structure. This must be defined in the application code, as the configuration descriptor contains several sub-descriptors which vary between devices, and which describe the device's usage to the host | |
| HID report descriptor data structure | |
| USB device stack initilization parameter data structure | |
| Main USBD API functions structure.This structure contains pointer to various USB Device stack's sub-module function tables. This structure is used as main entry point to access various methods (grouped in sub-modules) exposed by ROM based USB device stack | |
| CDC class API functions structure.This module exposes functions which interact directly with USB device controller hardware | |
| Communication Device Class function driver initilization parameter data structure | |
| USBD stack Core API functions structure | |
| DFU class API functions structure.This module exposes functions which interact directly with USB device controller hardware | |
| USB descriptors data structure | |
| HID class API functions structure.This structure contains pointers to all the function exposed by HID function driver module | |
| USB descriptors data structure | |
| Hardware API functions structure.This module exposes functions which interact directly with USB device controller hardware | |
| MSC class API functions structure.This module exposes functions which interact directly with USB device controller hardware | |
| Mass Storage class function driver initilization parameter data structure | |