85 "********************************************************************************\n\r"
86 "Clock APIs demo \n\r"
87 "Demonstrates how to setup, enable, disable clocks, reading the clock frequencies\n\r"
88 "********************************************************************************\n\r";
110 #if defined(CHIP_LPC43XX)
111 {CLK_BASE_PERIPH,
"PERIPH", },
116 #if defined(CHIP_LPC43XX)
117 {CLK_BASE_SPI,
"SPI", },
124 #if defined(CHIP_LPC43XX)
125 {CLK_BASE_VADC,
"VADC", },
168 #if defined(CHIP_LPC43XX)
169 {CLK_M4_M0APP,
"M4 M0 APP", },
170 {CLK_MX_VADC,
"VADC", },
188 #if defined(CHIP_LPC43XX)
189 {CLK_PERIPH_BUS,
"PERI BUS", },
190 {CLK_PERIPH_CORE,
"PERI CORE", },
191 {CLK_PERIPH_SGPIO,
"SGPIO", },
195 #if defined(CHIP_LPC43XX)
230 uint32_t mainpll_freq, clkin_frq, dive_value, baseclk_frq, perclk_frq;
243 DEBUGOUT(
"=========================================== \r\n");
247 if (bool_status ==
true) {
257 if (mainpll_freq == 0) {
258 DEBUGOUT(
"Error in reading Main PLL frequency \r\n");
261 DEBUGOUT(
"Main PLL Frequency in Hz : %d \r\n", mainpll_freq);
262 DEBUGOUT(
"=========================================== \r\n");
264 DEBUGOUT(
"=========================================== \r\n");
265 DEBUGOUT(
"Clock Divider functions \r\n");
273 DEBUGOUT(
"Divider E source wrong %d \r\n", clk_in);
276 DEBUGOUT(
"Divider E source set to Main PLL \r\n");
284 if ( (dive_value < 3) && (dive_value > 5)) {
285 DEBUGOUT(
"Divider E divider wrong %d \r\n", dive_value);
289 DEBUGOUT(
"Divider E divider value: %d \r\n", dive_value);
290 DEBUGOUT(
"=========================================== \r\n");
296 DEBUGOUT(
"=========================================== \r\n");
297 DEBUGOUT(
"Input clock frequencies \r\n");
298 DEBUGOUT(
"=========================================== \r\n");
301 DEBUGOUT(
" %s Frequency : %d Hz \r\n", clkin_info[i].clkin_name, clkin_frq);
303 DEBUGOUT(
"=========================================== \r\n");
308 DEBUGOUT(
"=========================================== \r\n");
309 DEBUGOUT(
"Base Clock Setting Information \r\n");
310 DEBUGOUT(
"=========================================== \r\n");
314 if ( bool_status ==
true) {
316 &autoblocken, &powerdn);
321 DEBUGOUT(
"%s Input Clk: %d Base Clk Frq : %d Hz Auto block: %d Power down: %d \r\n",
322 baseclk_info[i].clock_name, base_input, baseclk_frq, autoblocken, powerdn);
325 DEBUGOUT(
"=========================================== \r\n");
330 DEBUGOUT(
"=========================================== \r\n");
331 DEBUGOUT(
"Peripheral Clock Rates \r\n");
332 DEBUGOUT(
"=========================================== \r\n");
339 DEBUGOUT(
"%s Per Frq : %d Hz \r\n", ccu_clk_info[i].clock_name,
343 DEBUGOUT(
"=========================================== \r\n");