cmsis.h

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/*
 * @brief Basic CMSIS include file
 *
 * @note
 * Copyright(C) NXP Semiconductors, 2012
 * All rights reserved.
 *
 * @par
 * Software that is described herein is for illustrative purposes only
 * which provides customers with programming information regarding the
 * LPC products.  This software is supplied "AS IS" without any warranties of
 * any kind, and NXP Semiconductors and its licensor disclaim any and
 * all warranties, express or implied, including all implied warranties of
 * merchantability, fitness for a particular purpose and non-infringement of
 * intellectual property rights.  NXP Semiconductors assumes no responsibility
 * or liability for the use of the software, conveys no license or rights under any
 * patent, copyright, mask work right, or any other intellectual property rights in
 * or to any products. NXP Semiconductors reserves the right to make changes
 * in the software without notification. NXP Semiconductors also makes no
 * representation or warranty that such application will be suitable for the
 * specified use without further testing or modification.
 *
 * @par
 * Permission to use, copy, modify, and distribute this software and its
 * documentation is hereby granted, under NXP Semiconductors' and its
 * licensor's relevant copyrights in the software, without fee, provided that it
 * is used in conjunction with NXP Semiconductors microcontrollers.  This
 * copyright, permission, and disclaimer notice must appear in all copies of
 * this code.
 */

#ifndef __CMSIS_H_
#define __CMSIS_H_

#include "lpc_types.h"
#include "sys_config.h"

#ifdef __cplusplus
extern "C" {
#endif

#if defined(__ARMCC_VERSION)
// Kill warning "#pragma push with no matching #pragma pop"
  #pragma diag_suppress 2525
  #pragma push
  #pragma anon_unions
#elif defined(__CWCC__)
  #pragma push
  #pragma cpp_extensions on
#elif defined(__GNUC__)
/* anonymous unions are enabled by default */
#elif defined(__IAR_SYSTEMS_ICC__)
//  #pragma push // FIXME not usable for IAR
  #pragma language=extended
#else
  #error Not supported compiler type
#endif

/*
 * ==========================================================================
 * ---------- Interrupt Number Definition -----------------------------------
 * ==========================================================================
 */
#if defined(CHIP_LPC110X)

typedef enum IRQn {
 NonMaskableInt_IRQn           = -14, 
 HardFault_IRQn                = -13, 
 SVCall_IRQn                   = -5,  
 PendSV_IRQn                   = -2,  
 SysTick_IRQn                  = -1,  
 PIO0_0_IRQn                   = 0,  
 RESERVED1_IRQn                = 1,
 RESERVED2_IRQn                = 2,
 RESERVED3_IRQn                = 3,
 RESERVED4_IRQn                = 4,
 RESERVED5_IRQn                = 5,
 RESERVED6_IRQn                = 6,
 RESERVED7_IRQn                = 7,
 PIO0_8_IRQn                   = 8,  
 PIO0_9_IRQn                   = 9,  
 PIO0_10_IRQn                  = 10,  
 PIO0_11_IRQn                  = 11,  
 PIO1_0_IRQn                   = 12,  
 RESERVED13_IRQn               = 13,
 RESERVED14_IRQn               = 14,
 RESERVED15_IRQn               = 15,
 TIMER_16_0_IRQn               = 16,  
 TIMER_16_1_IRQn               = 17,  
 TIMER_32_0_IRQn               = 18,  
 TIMER_32_1_IRQn               = 19,  
 SSP0_IRQn                     = 20,  
 UART0_IRQn                    = 21,  
 RESERVED22_IRQn               = 22,
 RESERVED23_IRQn               = 23,
 ADC_IRQn                      = 24,  
 WDT_IRQn                      = 25,  
 BOD_IRQn                      = 26,  
 RESERVED27_IRQn               = 27,
 RESERVED28_IRQn               = 28,
 RESERVED29_IRQn               = 29,
 PIO1_IRQn                     = 30,  
 PIO0_IRQn                     = 31,  
} IRQn_Type;

#elif defined(CHIP_LPC11XXLV)

typedef enum IRQn {
 NonMaskableInt_IRQn           = -14, 
 HardFault_IRQn                = -13, 
 SVCall_IRQn                   = -5,  
 PendSV_IRQn                   = -2,  
 SysTick_IRQn                  = -1,  
 PIO0_0_IRQn                   = 0,  
 PIO0_1_IRQn                   = 1,  
 PIO0_2_IRQn                   = 2,  
 PIO0_3_IRQn                   = 3,  
 PIO0_4_IRQn                   = 4,  
 PIO0_5_IRQn                   = 5,  
 PIO0_6_IRQn                   = 6,  
 PIO0_7_IRQn                   = 7,  
 PIO0_8_IRQn                   = 8,  
 PIO0_9_IRQn                   = 9,  
 PIO0_10_IRQn                  = 10,  
 PIO0_11_IRQn                  = 11,  
 PIO1_0_IRQn                   = 12,  
 RESERVED13_IRQn               = 13,
 RESERVED14_IRQn               = 14,
 I2C0_IRQn                     = 15,  
 TIMER_16_0_IRQn               = 16,  
 TIMER_16_1_IRQn               = 17,  
 TIMER_32_0_IRQn               = 18,  
 TIMER_32_1_IRQn               = 19,  
 SSP0_IRQn                     = 20,  
 UART0_IRQn                    = 21,  
 RESERVED22_IRQn               = 22,
 RESERVED23_IRQn               = 23,
 ADC_IRQn                      = 24,  
 WDT_IRQn                      = 25,  
 BOD_IRQn                      = 26,  
 FMC_IRQn                      = 27,  
 PIO3_IRQn                     = 28,  
 PIO2_IRQn                     = 29,  
 PIO1_IRQn                     = 30,  
 PIO0_IRQn                     = 31,  
} IRQn_Type;

#elif defined(CHIP_LPC11AXX)

typedef enum IRQn {
 NonMaskableInt_IRQn           = -14, 
 HardFault_IRQn                = -13, 
 SVCall_IRQn                   = -5,  
 PendSV_IRQn                   = -2,  
 SysTick_IRQn                  = -1,  
 PIN_INT0_IRQn                 = 0,  
 PIN_INT1_IRQn                 = 1,  
 PIN_INT2_IRQn                 = 2,  
 PIN_INT3_IRQn                 = 3,  
 PIN_INT4_IRQn                 = 4,  
 PIN_INT5_IRQn                 = 5,  
 PIN_INT6_IRQn                 = 6,  
 PIN_INT7_IRQn                 = 7,  
 GINT0_IRQn                    = 8,  
 GINT1_IRQn                    = 9,  
 ACMP_IRQn                     = 10,  
 DAC_IRQn                      = 11,  
 RESERVED12_IRQn               = 12,
 RESERVED13_IRQn               = 13,
 SSP1_IRQn                     = 14,  
 I2C0_IRQn                     = 15,  
 TIMER_16_0_IRQn               = 16,  
 TIMER_16_1_IRQn               = 17,  
 TIMER_32_0_IRQn               = 18,  
 TIMER_32_1_IRQn               = 19,  
 SSP0_IRQn                     = 20,  
 UART0_IRQn                    = 21,  
 RESERVED22_IRQn               = 22,
 RESERVED23_IRQn               = 23,
 ADC_IRQn                      = 24,  
 WDT_IRQn                      = 25,  
 BOD_IRQn                      = 26,  
 FMC_IRQn                      = 27,  
 RESERVED28_IRQn               = 28,
 RESERVED29_IRQn               = 29,
 RESERVED30_IRQn               = 30,
 RESERVED31_IRQn               = 31,
} IRQn_Type;

#elif defined(CHIP_LPC11CXX)

typedef enum IRQn {
 NonMaskableInt_IRQn           = -14, 
 HardFault_IRQn                = -13, 
 SVCall_IRQn                   = -5,  
 PendSV_IRQn                   = -2,  
 SysTick_IRQn                  = -1,  
 PIO0_0_IRQn                   = 0,  
 PIO0_1_IRQn                   = 1,  
 PIO0_2_IRQn                   = 2,  
 PIO0_3_IRQn                   = 3,  
 PIO0_4_IRQn                   = 4,  
 PIO0_5_IRQn                   = 5,  
 PIO0_6_IRQn                   = 6,  
 PIO0_7_IRQn                   = 7,  
 PIO0_8_IRQn                   = 8,  
 PIO0_9_IRQn                   = 9,  
 PIO0_10_IRQn                  = 10,  
 PIO0_11_IRQn                  = 11,  
 PIO1_0_IRQn                   = 12,  
 CAN_IRQn                      = 13,  
 SSP1_IRQn                     = 14,  
 I2C0_IRQn                     = 15,  
 TIMER_16_0_IRQn               = 16,  
 TIMER_16_1_IRQn               = 17,  
 TIMER_32_0_IRQn               = 18,  
 TIMER_32_1_IRQn               = 19,  
 SSP0_IRQn                     = 20,  
 UART0_IRQn                    = 21,  
 Reserved22_IRQn               = 22,
 Reserved23_IRQn               = 23,
 ADC_IRQn                      = 24,  
 WDT_IRQn                      = 25,  
 BOD_IRQn                      = 26,  
 Reserved27_IRQn               = 27,
 EINT3_IRQn                    = 28,  
 EINT2_IRQn                    = 29,  
 EINT1_IRQn                    = 30,  
 EINT0_IRQn                    = 31,  
} IRQn_Type;

#elif defined(CHIP_LPC11EXX)

typedef enum IRQn {
 NonMaskableInt_IRQn           = -14, 
 HardFault_IRQn                = -13, 
 SVCall_IRQn                   = -5,  
 PendSV_IRQn                   = -2,  
 SysTick_IRQn                  = -1,  
 PIN_INT0_IRQn                 = 0,  
 PIN_INT1_IRQn                 = 1,  
 PIN_INT2_IRQn                 = 2,  
 PIN_INT3_IRQn                 = 3,  
 PIN_INT4_IRQn                 = 4,  
 PIN_INT5_IRQn                 = 5,  
 PIN_INT6_IRQn                 = 6,  
 PIN_INT7_IRQn                 = 7,  
 GINT0_IRQn                    = 8,  
 GINT1_IRQn                    = 9,  
 Reserved10_IRQn               = 10,  
 Reserved11_IRQn               = 11,
 Reserved12_IRQn               = 12,
 Reserved13_IRQn               = 13,
 SSP1_IRQn                     = 14,  
 I2C0_IRQn                     = 15,  
 TIMER_16_0_IRQn               = 16,  
 TIMER_16_1_IRQn               = 17,  
 TIMER_32_0_IRQn               = 18,  
 TIMER_32_1_IRQn               = 19,  
 SSP0_IRQn                     = 20,  
 UART0_IRQn                    = 21,  
 Reserved22_IRQn               = 22,
 Reserved23_IRQn               = 23,
 ADC_IRQn                      = 24,  
 WDT_IRQn                      = 25,  
 BOD_IRQn                      = 26,  
 FMC_IRQn                      = 27,  
 RESERVED28_IRQn               = 28,
 RESERVED29_IRQn               = 29,
 RESERVED30_IRQn               = 30,
 RESERVED31_IRQn               = 31,
} IRQn_Type;

#elif defined(CHIP_LPC11UXX)

typedef enum IRQn {
 NonMaskableInt_IRQn           = -14, 
 HardFault_IRQn                = -13, 
 SVCall_IRQn                   = -5,  
 PendSV_IRQn                   = -2,  
 SysTick_IRQn                  = -1,  
 PIN_INT0_IRQn                 = 0,  
 PIN_INT1_IRQn                 = 1,  
 PIN_INT2_IRQn                 = 2,  
 PIN_INT3_IRQn                 = 3,  
 PIN_INT4_IRQn                 = 4,  
 PIN_INT5_IRQn                 = 5,  
 PIN_INT6_IRQn                 = 6,  
 PIN_INT7_IRQn                 = 7,  
 GINT0_IRQn                    = 8,  
 GINT1_IRQn                    = 9,  
 Reserved10_IRQn               = 10,  
 Reserved11_IRQn               = 11,
 Reserved12_IRQn               = 12,
 Reserved13_IRQn               = 13,
 SSP1_IRQn                     = 14,  
 I2C0_IRQn                     = 15,  
 TIMER_16_0_IRQn               = 16,  
 TIMER_16_1_IRQn               = 17,  
 TIMER_32_0_IRQn               = 18,  
 TIMER_32_1_IRQn               = 19,  
 SSP0_IRQn                     = 20,  
 UART0_IRQn                    = 21,  
 USB0_IRQn                     = 22,  
 USB0_FIQ_IRQn                 = 23,  
 ADC_IRQn                      = 24,  
 WDT_IRQn                      = 25,  
 BOD_IRQn                      = 26,  
 FMC_IRQn                      = 27,  
 RESERVED28_IRQn               = 28,
 RESERVED29_IRQn               = 29,
 USB_WAKEUP_IRQn               = 30,  
 RESERVED31_IRQn               = 31,
} IRQn_Type;

 #else
 #error Incorrect or missing device variant (CHIP_11*)
 #endif

/*
 * ==========================================================================
 * ----------- Processor and Core Peripheral Section ------------------------
 * ==========================================================================
 */

/* Configuration of the Cortex-M0 Processor and Core Peripherals */
#define __MPU_PRESENT             0   
#define __NVIC_PRIO_BITS          2   
#define __Vendor_SysTickConfig    0   
#include "core_cm0.h"      /* Cortex-M0 processor and core peripherals           */

#ifdef __cplusplus
}
#endif

#endif /* __CMSIS_H_ */