eeprom_001.h

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/*
 * @brief EEPROM registers and driver functions
 *
 * @note
 * Copyright(C) NXP Semiconductors, 2012
 * All rights reserved.
 *
 * @par
 * Software that is described herein is for illustrative purposes only
 * which provides customers with programming information regarding the
 * LPC products.  This software is supplied "AS IS" without any warranties of
 * any kind, and NXP Semiconductors and its licensor disclaim any and
 * all warranties, express or implied, including all implied warranties of
 * merchantability, fitness for a particular purpose and non-infringement of
 * intellectual property rights.  NXP Semiconductors assumes no responsibility
 * or liability for the use of the software, conveys no license or rights under any
 * patent, copyright, mask work right, or any other intellectual property rights in
 * or to any products. NXP Semiconductors reserves the right to make changes
 * in the software without notification. NXP Semiconductors also makes no
 * representation or warranty that such application will be suitable for the
 * specified use without further testing or modification.
 *
 * @par
 * Permission to use, copy, modify, and distribute this software and its
 * documentation is hereby granted, under NXP Semiconductors' and its
 * licensor's relevant copyrights in the software, without fee, provided that it
 * is used in conjunction with NXP Semiconductors microcontrollers.  This
 * copyright, permission, and disclaimer notice must appear in all copies of
 * this code.
 */

#ifndef __EEPROM_001_H_
#define __EEPROM_001_H_

#include "sys_config.h"
#include "cmsis.h"

#ifdef __cplusplus
extern "C" {
#endif

typedef struct {    /*  EEPROM Structure */
 __IO uint32_t CMD;   
 __IO uint32_t ADDR;   
 __O  uint32_t WDATA;  
 __I  uint32_t RDATA;  
 __IO uint32_t WSTATE;  
 __IO uint32_t CLKDIV;  
 __IO uint32_t PWRDWN;  
 uint32_t RESERVED0[975];
 __O  uint32_t INTENCLR;  
 __O  uint32_t INTENSET;  
 __I  uint32_t INTSTAT;  
 __I  uint32_t INTEN;  
 __O  uint32_t INTSTATCLR; 
 __O  uint32_t INTSTATSET; 
} IP_EEPROM_001_T;

#define EEPROM_PAGE_SIZE                64  
#define EEPROM_PAGE_NUM                 63  
/*
 * @brief Macro defines for EEPROM command register
 */
#define EEPROM_CMD_8BITS_READ           (0)  
#define EEPROM_CMD_16BITS_READ          (1)  
#define EEPROM_CMD_32BITS_READ          (2)  
#define EEPROM_CMD_8BITS_WRITE          (3)  
#define EEPROM_CMD_16BITS_WRITE         (4)  
#define EEPROM_CMD_32BITS_WRITE         (5)  
#define EEPROM_CMD_ERASE_PRG_PAGE       (6)  
#define EEPROM_CMD_RDPREFETCH           (1 << 3)
/*
 * @brief Macro defines for EEPROM power down register
 */
#define EEPROM_PWRDWN                   (1 << 0)

/*
 * @brief Macro defines for EEPROM interrupt related registers
 */
#define EEPROM_INT_ENDOFRW                 (1 << 26)
#define EEPROM_INT_ENDOFPROG               (1 << 28)

typedef enum IP_EEPROM_RWSIZE {
 EEPROM_RWSIZE_8BITS = 1,
 EEPROM_RWSIZE_16BITS = 2,
 EEPROM_RWSIZE_32BITS = 4
} IP_EEPROM_RWSIZE_T;

STATIC INLINE void IP_EEPROM_SetCmd(IP_EEPROM_001_T *pEEPROM, uint32_t cmd)
{
 pEEPROM->CMD = cmd;
}

STATIC INLINE void IP_EEPROM_SetAddr(IP_EEPROM_001_T *pEEPROM, uint32_t pageAddr, uint32_t pageOffset)
{
 pEEPROM->ADDR = (pageAddr << 6) | pageOffset;
}

STATIC INLINE void IP_EEPROM_WriteData(IP_EEPROM_001_T *pEEPROM, uint32_t data)
{
 pEEPROM->WDATA = data;
}

STATIC INLINE uint32_t IP_EEPROM_ReadData(IP_EEPROM_001_T *pEEPROM)
{
 return pEEPROM->RDATA;
}

STATIC INLINE void IP_EEPROM_SetWaitState(IP_EEPROM_001_T *pEEPROM, uint32_t ws)
{
 pEEPROM->WSTATE = ws;
}

STATIC INLINE void IP_EEPROM_EnablePowerDown(IP_EEPROM_001_T *pEEPROM)
{
 pEEPROM->PWRDWN = EEPROM_PWRDWN;
}

STATIC INLINE void IP_EEPROM_DisablePowerDown(IP_EEPROM_001_T *pEEPROM)
{
 pEEPROM->PWRDWN = 0;
}

STATIC INLINE void IP_EEPROM_EnableInt(IP_EEPROM_001_T *pEEPROM, uint32_t mask)
{
 pEEPROM->INTENSET =  mask;
}

STATIC INLINE void IP_EEPROM_DisableInt(IP_EEPROM_001_T *pEEPROM, uint32_t mask)
{
 pEEPROM->INTENCLR =  mask;
}

STATIC INLINE uint32_t IP_EEPROM_GetIntEnable(IP_EEPROM_001_T *pEEPROM)
{
 return pEEPROM->INTEN;
}

STATIC INLINE uint32_t IP_EEPROM_GetIntStatus(IP_EEPROM_001_T *pEEPROM)
{
 return pEEPROM->INTSTAT;
}

STATIC INLINE void IP_EEPROM_SetIntStatus(IP_EEPROM_001_T *pEEPROM, uint32_t mask)
{
 pEEPROM->INTSTATSET =  mask;
}

STATIC INLINE void IP_EEPROM_ClearIntStatus(IP_EEPROM_001_T *pEEPROM, uint32_t mask)
{
 pEEPROM->INTSTATCLR =  mask;
}

void IP_EEPROM_Init(IP_EEPROM_001_T *pEEPROM, uint32_t div);

STATIC INLINE void IP_EEPROM_DeInit(IP_EEPROM_001_T *pEEPROM)
{
 /* Enable EEPROM power down mode */
 IP_EEPROM_EnablePowerDown(pEEPROM);
}

void IP_EEPROM_ErasePageRegister(IP_EEPROM_001_T *pEEPROM);

uint32_t IP_EEPROM_WritePageRegister(IP_EEPROM_001_T *pEEPROM, uint16_t pageOffset,
          uint8_t *pData, uint8_t wsize, uint32_t byteNum);

uint32_t IP_EEPROM_ReadPage(IP_EEPROM_001_T *pEEPROM,
       uint16_t pageOffset,
       uint16_t pageAddr,
       uint8_t *pData,
       uint8_t rsize,
       uint32_t byteNum);

void IP_EEPROM_EraseProgramPage(IP_EEPROM_001_T *pEEPROM, uint16_t pageAddr);

void IP_EEPROM_WaitForIntStatus(IP_EEPROM_001_T *pEEPROM, uint32_t mask);

Status IP_EEPROM_Write(IP_EEPROM_001_T *pEEPROM,
        uint16_t pageOffset,
        uint16_t pageAddr,
        void *pData,
        IP_EEPROM_RWSIZE_T wsize,
        uint32_t byteNum);

Status IP_EEPROM_Read(IP_EEPROM_001_T *pEEPROM,
       uint16_t pageOffset,
       uint16_t pageAddr,
       void *pData,
       IP_EEPROM_RWSIZE_T rsize,
       uint32_t byteNum);

void IP_EEPROM_Erase(IP_EEPROM_001_T *pEEPROM, uint16_t pageAddr);

#ifdef __cplusplus
}
#endif

#endif /* __EEPROM_001_H_ */