evrt_18xx_43xx.h

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/*
 * @brief LPC18xx/43xx event router driver
 *
 * @note
 * Copyright(C) NXP Semiconductors, 2012
 * All rights reserved.
 *
 * @par
 * Software that is described herein is for illustrative purposes only
 * which provides customers with programming information regarding the
 * LPC products.  This software is supplied "AS IS" without any warranties of
 * any kind, and NXP Semiconductors and its licensor disclaim any and
 * all warranties, express or implied, including all implied warranties of
 * merchantability, fitness for a particular purpose and non-infringement of
 * intellectual property rights.  NXP Semiconductors assumes no responsibility
 * or liability for the use of the software, conveys no license or rights under any
 * patent, copyright, mask work right, or any other intellectual property rights in
 * or to any products. NXP Semiconductors reserves the right to make changes
 * in the software without notification. NXP Semiconductors also makes no
 * representation or warranty that such application will be suitable for the
 * specified use without further testing or modification.
 *
 * @par
 * Permission to use, copy, modify, and distribute this software and its
 * documentation is hereby granted, under NXP Semiconductors' and its
 * licensor's relevant copyrights in the software, without fee, provided that it
 * is used in conjunction with NXP Semiconductors microcontrollers.  This
 * copyright, permission, and disclaimer notice must appear in all copies of
 * this code.
 */

#ifndef __EVRT_18XX_43XX_H_
#define __EVRT_18XX_43XX_H_

#ifdef __cplusplus
extern "C" {
#endif

typedef struct {      
 __IO uint32_t HILO;     
 __IO uint32_t EDGE;     
 __I  uint32_t RESERVED0[1012];
 __O  uint32_t CLR_EN;    
 __O  uint32_t SET_EN;    
 __I  uint32_t STATUS;    
 __I  uint32_t ENABLE;    
 __O  uint32_t CLR_STAT;    
 __O  uint32_t SET_STAT;    
} LPC_EVRT_T;

typedef enum CHIP_EVRT_SRC {
 EVRT_SRC_WAKEUP0,   
 EVRT_SRC_WAKEUP1,   
 EVRT_SRC_WAKEUP2,   
 EVRT_SRC_WAKEUP3,   
 EVRT_SRC_ATIMER,   
 EVRT_SRC_RTC,    
 EVRT_SRC_BOD1,    
 EVRT_SRC_WWDT,    
 EVRT_SRC_ETHERNET,   
 EVRT_SRC_USB0,    
 EVRT_SRC_USB1,    
 EVRT_SRC_SDIO,    
 EVRT_SRC_CCAN,    
 EVRT_SRC_COMBINE_TIMER2, 
 EVRT_SRC_COMBINE_TIMER6, 
 EVRT_SRC_QEI,    
 EVRT_SRC_COMBINE_TIMER14, 
 EVRT_SRC_RESERVED1,   
 EVRT_SRC_RESERVED2,   
 EVRT_SRC_RESET    
} CHIP_EVRT_SRC_T;

#define PARAM_EVRT_SOURCE(n)    ((n == EVRT_SRC_WAKEUP0) || (n == EVRT_SRC_WAKEUP1) \
         || (n == EVRT_SRC_WAKEUP2) || (n == EVRT_SRC_WAKEUP3) \
         || (n == EVRT_SRC_ATIMER) || (n == EVRT_SRC_RTC) \
         || (n == EVRT_SRC_BOD1) || (n == EVRT_SRC_WWDT) \
         || (n == EVRT_SRC_ETHERNET) || (n == EVRT_SRC_USB0) \
         || (n == EVRT_SRC_USB1) || (n == EVRT_SRC_CCAN) || (n == EVRT_SRC_SDIO) \
         || (n == EVRT_SRC_COMBINE_TIMER2) || (n == EVRT_SRC_COMBINE_TIMER6) \
         || (n == EVRT_SRC_QEI) || (n == EVRT_SRC_COMBINE_TIMER14) \
         || (n == EVRT_SRC_RESET)) \


typedef enum CHIP_EVRT_SRC_ACTIVE {
 EVRT_SRC_ACTIVE_LOW_LEVEL,  
 EVRT_SRC_ACTIVE_HIGH_LEVEL,  
 EVRT_SRC_ACTIVE_FALLING_EDGE, 
 EVRT_SRC_ACTIVE_RISING_EDGE  
} CHIP_EVRT_SRC_ACTIVE_T;

#define PARAM_EVRT_SOURCE_ACTIVE_TYPE(n) ((n == EVRT_SRC_ACTIVE_LOW_LEVEL) || (n == EVRT_SRC_ACTIVE_HIGH_LEVEL) \
            || (n == EVRT_SRC_ACTIVE_FALLING_EDGE) || (n == EVRT_SRC_ACTIVE_RISING_EDGE))

void Chip_EVRT_Init (void);

void Chip_EVRT_ConfigIntSrcActiveType(CHIP_EVRT_SRC_T EVRT_Src, CHIP_EVRT_SRC_ACTIVE_T type);

IntStatus Chip_EVRT_IsSourceInterrupting(CHIP_EVRT_SRC_T EVRT_Src);

void Chip_EVRT_SetUpIntSrc(CHIP_EVRT_SRC_T EVRT_Src, FunctionalState state);

STATIC INLINE void Chip_EVRT_DeInit(void)
{
 LPC_EVRT->CLR_EN    = 0xFFFF;
 LPC_EVRT->CLR_STAT  = 0xFFFF;
}

STATIC INLINE void Chip_EVRT_ClrPendIntSrc(CHIP_EVRT_SRC_T EVRT_Src)
{
 LPC_EVRT->CLR_STAT = (1 << (uint8_t) EVRT_Src);
}

#ifdef __cplusplus
}
#endif

#endif /* __EVRT_18XX_43XX_H_ */