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LPCOpen Platform for NXP LPC Microcontrollers
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fmc_11xx.h
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1 /*
2  * @brief FLASH Memory Controller (FMC) registers and control functions
3  *
4  * @note
5  * Copyright(C) NXP Semiconductors, 2012
6  * All rights reserved.
7  *
8  * @par
9  * Software that is described herein is for illustrative purposes only
10  * which provides customers with programming information regarding the
11  * LPC products. This software is supplied "AS IS" without any warranties of
12  * any kind, and NXP Semiconductors and its licensor disclaim any and
13  * all warranties, express or implied, including all implied warranties of
14  * merchantability, fitness for a particular purpose and non-infringement of
15  * intellectual property rights. NXP Semiconductors assumes no responsibility
16  * or liability for the use of the software, conveys no license or rights under any
17  * patent, copyright, mask work right, or any other intellectual property rights in
18  * or to any products. NXP Semiconductors reserves the right to make changes
19  * in the software without notification. NXP Semiconductors also makes no
20  * representation or warranty that such application will be suitable for the
21  * specified use without further testing or modification.
22  *
23  * @par
24  * Permission to use, copy, modify, and distribute this software and its
25  * documentation is hereby granted, under NXP Semiconductors' and its
26  * licensor's relevant copyrights in the software, without fee, provided that it
27  * is used in conjunction with NXP Semiconductors microcontrollers. This
28  * copyright, permission, and disclaimer notice must appear in all copies of
29  * this code.
30  */
31 
32 #ifndef __FMC_11XX_H_
33 #define __FMC_11XX_H_
34 
35 #ifdef __cplusplus
36 extern "C" {
37 #endif
38 
47 typedef struct {
48  __I uint32_t RESERVED1[4];
49  __IO uint32_t FLASHTIM;
50  __I uint32_t RESERVED2[3];
51  __IO uint32_t FMSSTART;
52  __IO uint32_t FMSSTOP;
53  __I uint32_t RESERVED3;
54  __I uint32_t FMSW[4];
55  __I uint32_t RESERVED4[25];
56  __IO uint32_t EEMSSTART;
57  __IO uint32_t EEMSSTOP;
58  __I uint32_t EEMSSIG;
59  __I uint32_t RESERVED5[974];
60  __I uint32_t FMSTAT;
61  __I uint32_t RESERVED6;
62  __O uint32_t FMSTATCLR;
63 } LPC_FMC_T;
64 
68 typedef enum {
69  FLASHTIM_20MHZ_CPU = 0,
70  FLASHTIM_40MHZ_CPU = 1,
71  FLASHTIM_50MHZ_CPU = 2,
72 } FMC_FLASHTIM_T;
73 
81 STATIC INLINE void Chip_FMC_SetFLASHAccess(FMC_FLASHTIM_T clks)
82 {
83  uint32_t tmp = LPC_FMC->FLASHTIM & (~(0x3));
84 
85  /* Don't alter upper bits */
86  LPC_FMC->FLASHTIM = tmp | clks;
87 }
88 
93 #ifdef __cplusplus
94 }
95 #endif
96 
97 #endif /* __FMC_11XX_H_ */