Software/Lincoln60/lpcopen_docs_v1.03.zip

/*

 * @brief LPC17xx/40xx General Purpose DMA driver

 *

 * @note

 * Copyright(C) NXP Semiconductors, 2012

 * All rights reserved.

 *

 * @par

 * Software that is described herein is for illustrative purposes only

 * which provides customers with programming information regarding the

 * LPC products.  This software is supplied "AS IS" without any warranties of

 * any kind, and NXP Semiconductors and its licensor disclaim any and

 * all warranties, express or implied, including all implied warranties of

 * merchantability, fitness for a particular purpose and non-infringement of

 * intellectual property rights. NXP Semiconductors assumes no responsibility

 * or liability for the use of the software, conveys no license or rights under any

 * patent, copyright, mask work right, or any other intellectual property rights in

 * or to any products. NXP Semiconductors reserves the right to make changes

 * in the software without notification. NXP Semiconductors also makes no

 * representation or warranty that such application will be suitable for the

 * specified use without further testing or modification.

 *

 * @par

 * Permission to use, copy, modify, and distribute this software and its

 * documentation is hereby granted, under NXP Semiconductors' and its

 * licensor's relevant copyrights in the software, without fee, provided that it

 * is used in conjunction with NXP Semiconductors microcontrollers.  This

 * copyright, permission, and disclaimer notice must appear in all copies of

 * this code.

 */


#ifndef __GPDMA_17XX_40XX_H_

#define __GPDMA_17XX_40XX_H_


#ifdef __cplusplus

extern "C" {

#endif


#define GPDMA_NUMBER_CHANNELS 8

#if defined(CHIP_LPC177X_8X) || defined(CHIP_LPC407X_8X)


#define GPDMA_CONN_MEMORY           ((0UL))

#define GPDMA_CONN_SDC              ((1UL))

#define GPDMA_CONN_SSP0_Tx          ((2UL))

#define GPDMA_CONN_SSP0_Rx          ((3UL))

#define GPDMA_CONN_SSP1_Tx          ((4UL))

#define GPDMA_CONN_SSP1_Rx          ((5UL))

#define GPDMA_CONN_SSP2_Tx          ((6UL))

#define GPDMA_CONN_SSP2_Rx          ((7UL))

#define GPDMA_CONN_ADC              ((8UL))

#define GPDMA_CONN_DAC              ((9UL))

#define GPDMA_CONN_UART0_Tx         ((10UL))

#define GPDMA_CONN_UART0_Rx         ((11UL))

#define GPDMA_CONN_UART1_Tx         ((12UL))

#define GPDMA_CONN_UART1_Rx         ((13UL))

#define GPDMA_CONN_UART2_Tx         ((14UL))

#define GPDMA_CONN_UART2_Rx         ((15UL))

#define GPDMA_CONN_MAT0_0           ((16UL))

#define GPDMA_CONN_MAT0_1           ((17UL))

#define GPDMA_CONN_MAT1_0           ((18UL))

#define GPDMA_CONN_MAT1_1           ((19UL))

#define GPDMA_CONN_MAT2_0           ((20UL))

#define GPDMA_CONN_MAT2_1           ((21UL))

#define GPDMA_CONN_I2S_Channel_0    ((22UL))

#define GPDMA_CONN_I2S_Channel_1    ((23UL))

#define GPDMA_CONN_UART3_Tx         ((26UL))

#define GPDMA_CONN_UART3_Rx         ((27UL))

#define GPDMA_CONN_UART4_Tx         ((28UL))

#define GPDMA_CONN_UART4_Rx         ((29UL))

#define GPDMA_CONN_MAT3_0           ((30UL))

#define GPDMA_CONN_MAT3_1           ((31UL))

#elif defined(CHIP_LPC175X_6X)

#define GPDMA_CONN_SSP0_Tx    ((0UL))

#define GPDMA_CONN_SSP0_Rx    ((1UL))

#define GPDMA_CONN_SSP1_Tx    ((2UL))

#define GPDMA_CONN_SSP1_Rx    ((3UL))

#define GPDMA_CONN_ADC     ((4UL))

#define GPDMA_CONN_I2S_Channel_0  ((5UL))

#define GPDMA_CONN_I2S_Channel_1  ((6UL))

#define GPDMA_CONN_DAC     ((7UL))

#define GPDMA_CONN_UART0_Tx   ((8UL))

#define GPDMA_CONN_UART0_Rx   ((9UL))

#define GPDMA_CONN_UART1_Tx   ((10UL))

#define GPDMA_CONN_UART1_Rx   ((11UL))

#define GPDMA_CONN_UART2_Tx   ((12UL))

#define GPDMA_CONN_UART2_Rx   ((13UL))

#define GPDMA_CONN_UART3_Tx   ((14UL))

#define GPDMA_CONN_UART3_Rx   ((15UL))

#define GPDMA_CONN_MAT0_0    ((16UL))

#define GPDMA_CONN_MAT0_1    ((17UL))

#define GPDMA_CONN_MAT1_0    ((18UL))

#define GPDMA_CONN_MAT1_1     ((19UL))

#define GPDMA_CONN_MAT2_0     ((20UL))

#define GPDMA_CONN_MAT2_1     ((21UL))

#define GPDMA_CONN_MAT3_0    ((22UL))

#define GPDMA_CONN_MAT3_1     ((23UL))

#define GPDMA_CONN_MEMORY    ((24UL))

#endif


#define GPDMA_BSIZE_1   ((0UL))

#define GPDMA_BSIZE_4   ((1UL))

#define GPDMA_BSIZE_8   ((2UL))

#define GPDMA_BSIZE_16  ((3UL))

#define GPDMA_BSIZE_32  ((4UL))

#define GPDMA_BSIZE_64  ((5UL))

#define GPDMA_BSIZE_128 ((6UL))

#define GPDMA_BSIZE_256 ((7UL))

#define GPDMA_WIDTH_BYTE        ((0UL))

#define GPDMA_WIDTH_HALFWORD    ((1UL))

#define GPDMA_WIDTH_WORD        ((2UL))

#define DMA_CONTROLLER 0

#define SRC_PER_CONTROLLER 1

#define DST_PER_CONTROLLER 2

typedef struct {

 FunctionalState ChannelStatus;

} DMA_ChannelHandle_t;


typedef struct DMA_TransferDescriptor {

 uint32_t src;

 uint32_t dst;

 uint32_t lli;

 uint32_t ctrl;

} DMA_TransferDescriptor_t;


STATIC INLINE IntStatus Chip_GPDMA_IntGetStatus(LPC_GPDMA_T *pGPDMA, IP_GPDMA_STATUS_T type, uint8_t channel)

{

 return IP_GPDMA_IntGetStatus(pGPDMA, type, channel);

}


STATIC INLINE void Chip_GPDMA_ClearIntPending(LPC_GPDMA_T *pGPDMA, IP_GPDMA_STATECLEAR_T type, uint8_t channel)

{

 IP_GPDMA_ClearIntPending(pGPDMA, type, channel);

}


STATIC INLINE void Chip_GPDMA_ChannelCmd(LPC_GPDMA_T *pGPDMA, uint8_t channelNum, FunctionalState NewState)

{

 IP_GPDMA_ChannelCmd(pGPDMA, channelNum, NewState);

}


void Chip_GPDMA_Init(LPC_GPDMA_T *pGPDMA);


void Chip_GPDMA_DeInit(LPC_GPDMA_T *pGPDMA);


void Chip_DMA_Stop(LPC_GPDMA_T *pGPDMA, uint8_t ChannelNum);


Status Chip_DMA_Interrupt(LPC_GPDMA_T *pGPDMA, uint8_t ChannelNum);


uint8_t Chip_DMA_GetFreeChannel(LPC_GPDMA_T *pGPDMA,

        uint32_t PeripheralConnection_ID);


Status Chip_DMA_Transfer(LPC_GPDMA_T *pGPDMA,

       uint8_t ChannelNum,

       uint32_t src,

       uint32_t dst,

       IP_GPDMA_FLOW_CONTROL_T TransferType,

       uint32_t Size);


Status Chip_DMA_SGTransfer(LPC_GPDMA_T *pGPDMA,

         uint8_t ChannelNum,

         const DMA_TransferDescriptor_t *DMADescriptor,

         IP_GPDMA_FLOW_CONTROL_T TransferType);


Status Chip_DMA_PrepareDescriptor(LPC_GPDMA_T *pGPDMA,

          DMA_TransferDescriptor_t *DMADescriptor,

          uint32_t src,

          uint32_t dst,

          uint32_t Size,

          IP_GPDMA_FLOW_CONTROL_T TransferType,

          const DMA_TransferDescriptor_t *NextDescriptor);


int Chip_DMA_InitChannelCfg(LPC_GPDMA_T *pGPDMA,

       GPDMA_Channel_CFG_T *GPDMACfg,

       uint8_t  ChannelNum,

       uint32_t src,

       uint32_t dst,

       uint32_t Size,

       IP_GPDMA_FLOW_CONTROL_T TransferType);


#ifdef __cplusplus

}

#endif


#endif /* __GPDMA_17XX_40XX_H_ */