Example description
This example describes how to use SPI in POLLING or INTERRUPT mode.
The LOOPBACK_TEST macro is used to enable Loop-back mode of SPI peripheral. It allows a simple software testing. The transmit and receive data is connected together. No more connection is required in this case. If LOOPBACK_TEST macro is disabled, it is needed to connect 2 hardware boards, one for Master and one for Slave. Use SSP_MODE_TEST macro to select the SPI mode.
SPI configuration:
- CPHA = 0: Data is sampled on the first clock edge of SCK.
- CPOL = 0: The rest state of the clock (between frames) is low.
- Sample rate = 100KHz.
- DSS = 8: 8 bits per transfer.
After initialize transmit buffer, SPI master/slave will transfer a number of bytes to SPI slave/master and receive data concurrently.
When transferring completed, receive and transmit buffer will be compared. If they match, the led is ON. If not the led is OFF.
This example supports 2 transfer modes: POLLING mode and INTERRUPT mode.
Special connection requirements
Connects SPI pins of the master boards to the slave boards.
- LPCXpresso LPC1347:
- P1_29: SPI_SCK
- P0.2: SPI_SSEL
- P0.8: SPI_MISO
- P0.9: SPI_MOSI
- LPCXpresso LPC1343:
- P2_11: SPI_SCK
- P0.2: SPI_SSEL
- P0.8: SPI_MISO
- P0.9: SPI_MOSI
The SCK pin of master board is connected to SCK of slave board.
The SSEL pin of master board is connected to SSEL of slave board.
The MISO pin of master board is connected to MISO of slave board.
The MOSI pin of master board is connected to MOSI of slave board.
Common ground must be connected together between two boards.
Build procedures:
LPC13xx example quickstart for Code Red Xpresso
LPC13xx example quickstart for Keil uVision4
LPC13xx example quickstart for IAR EWARM
Supported boards and board setup:
NXP Xpresso LPC1347 board
Submitting LPCOpen issues:
Community support for LPCOpen
| #define BUFFER_SIZE (0x100) |
Definition at line 98 of file ssp.c.
Definition at line 96 of file ssp.c.
Definition at line 90 of file ssp.c.
Definition at line 92 of file ssp.c.
| #define SSP_DATA_BIT_NUM |
( |
|
databits | ) |
(databits + 1) |
Definition at line 99 of file ssp.c.
| #define SSP_DATA_BYTES |
( |
|
databits | ) |
(((databits) > SSP_BITS_8) ? 2 : 1) |
| #define SSP_HI_BYTE_MSK |
( |
|
databits | ) |
|
Value:
Definition at line 104 of file ssp.c.
| #define SSP_IRQ SSP0_IRQn |
| #define SSP_LO_BYTE_MSK |
( |
|
databits | ) |
|
Value:
Definition at line 102 of file ssp.c.
| #define SSP_MODE_TEST 1 /*1: Master, 0: Slave */ |
Definition at line 91 of file ssp.c.
| #define SSPIRQHANDLER SSP0_IRQHandler |
| static void Buffer_Init |
( |
void |
| ) |
|
|
static |
| static uint8_t Buffer_Verify |
( |
void |
| ) |
|
|
static |
Main routine for SSP example.
Main program body.
- Returns
- Nothing
defined(CHIP_LPC175X_6X)
Definition at line 201 of file ssp.c.
| void SSPIRQHANDLER |
( |
void |
| ) |
|
SSP interrupt handler sub-routine.
- Returns
- Nothing
Definition at line 177 of file ssp.c.
| volatile uint8_t isXferCompleted = 0 |
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static |