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LPCOpen Platform
v1.03
LPCOpen Platform for NXP LPC Microcontrollers
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Macros | |
| #define | USBRAM_SECTION RAM2 |
| #define | USBDEV_ADDR_AD (1 << 24) |
| #define | USBDEV_ADDR(n) (((n) & 0x7F) << 25) |
| #define | LPC18_43_MAX_USB_CORE 2 |
| #define | USB_REG(CoreID) USB_REG_BASE_ADDR[CoreID] |
| #define | LINK_TERMINATE 0x01 |
Functions | |
| void | HcdIrqHandler (uint8_t HostID) |
| Interrupt Handler (Host side). This handler is known as interrupt service routine of USB Host. | |
| void | DcdIrqHandler (uint8_t corenum) |
| Interrupt Handler (Device side). This handler is known as interrupt service routine of USB Device. | |
| void | HAL_Reset (uint8_t corenum) |
Variables | |
| IP_USBHS_001_T *const | USB_REG_BASE_ADDR [] |
| #define LINK_TERMINATE 0x01 |
Definition at line 65 of file HAL_LPC18xx.h.
| #define LPC18_43_MAX_USB_CORE 2 |
Definition at line 57 of file HAL_LPC18xx.h.
| #define USB_REG | ( | CoreID | ) | USB_REG_BASE_ADDR[CoreID] |
Definition at line 62 of file HAL_LPC18xx.h.
| #define USBDEV_ADDR | ( | n | ) | (((n) & 0x7F) << 25) |
Definition at line 54 of file HAL_LPC18xx.h.
| #define USBDEV_ADDR_AD (1 << 24) |
Definition at line 53 of file HAL_LPC18xx.h.
| #define USBRAM_SECTION RAM2 |
Definition at line 45 of file HAL_LPC18xx.h.
| void DcdIrqHandler | ( | uint8_t | corenum | ) |
Interrupt Handler (Device side). This handler is known as interrupt service routine of USB Device.
| corenum | : ID Number of USB Core to be processed. |
| void HAL_Reset | ( | uint8_t | corenum | ) |
| void HcdIrqHandler | ( | uint8_t | HostID | ) |
Interrupt Handler (Host side). This handler is known as interrupt service routine of USB Host.
| HostID | : Host ID |
| IP_USBHS_001_T* const USB_REG_BASE_ADDR[] |