Detailed Description

Data Structures
struct	IP_I2C_001_T
	I2C register block structure. More...

struct	I2C_XFER_T
	Master transfer data structure definitions. More...

Macros
#define	RET_SLAVE_TX 6
	Return values for SLAVE handler.

#define	RET_SLAVE_RX 5

#define	RET_SLAVE_IDLE 2

#define	RET_SLAVE_BUSY 0

#define	I2C_STA_STO_RECV 0x20
	I2C state handle return values.

#define	I2C_STA_STO_RECV 0x20
	I2C state handle return values.

#define	I2C_I2CONSET_AA ((0x04))

#define	I2C_I2CONSET_SI ((0x08))

#define	I2C_I2CONSET_STO ((0x10))

#define	I2C_I2CONSET_STA ((0x20))

#define	I2C_I2CONSET_I2EN ((0x40))

#define	I2C_I2CONCLR_AAC ((1 << 2))

#define	I2C_I2CONCLR_SIC ((1 << 3))

#define	I2C_I2CONCLR_STOC ((1 << 4))

#define	I2C_I2CONCLR_STAC ((1 << 5))

#define	I2C_I2CONCLR_I2ENC ((1 << 6))

#define	I2C_CON_AA (1UL << 2)

#define	I2C_CON_SI (1UL << 3)

#define	I2C_CON_STO (1UL << 4)

#define	I2C_CON_STA (1UL << 5)

#define	I2C_CON_I2EN (1UL << 6)

#define	I2C_STAT_CODE_BITMASK ((0xF8))

#define	I2C_STAT_CODE_ERROR ((0xFF))

#define	I2C_I2STAT_NO_INF ((0xF8))

#define	I2C_I2STAT_BUS_ERROR ((0x00))

#define	I2C_I2STAT_M_TX_START ((0x08))

#define	I2C_I2STAT_M_TX_RESTART ((0x10))

#define	I2C_I2STAT_M_TX_SLAW_ACK ((0x18))

#define	I2C_I2STAT_M_TX_SLAW_NACK ((0x20))

#define	I2C_I2STAT_M_TX_DAT_ACK ((0x28))

#define	I2C_I2STAT_M_TX_DAT_NACK ((0x30))

#define	I2C_I2STAT_M_TX_ARB_LOST ((0x38))

#define	I2C_I2STAT_M_RX_START ((0x08))

#define	I2C_I2STAT_M_RX_RESTART ((0x10))

#define	I2C_I2STAT_M_RX_ARB_LOST ((0x38))

#define	I2C_I2STAT_M_RX_SLAR_ACK ((0x40))

#define	I2C_I2STAT_M_RX_SLAR_NACK ((0x48))

#define	I2C_I2STAT_M_RX_DAT_ACK ((0x50))

#define	I2C_I2STAT_M_RX_DAT_NACK ((0x58))

#define	I2C_I2STAT_S_RX_SLAW_ACK ((0x60))

#define	I2C_I2STAT_S_RX_ARB_LOST_M_SLA ((0x68))

#define	I2C_I2STAT_S_RX_GENCALL_ACK ((0x70))

#define	I2C_I2STAT_S_RX_ARB_LOST_M_GENCALL ((0x78))

#define	I2C_I2STAT_S_RX_PRE_SLA_DAT_ACK ((0x80))

#define	I2C_I2STAT_S_RX_PRE_SLA_DAT_NACK ((0x88))

#define	I2C_I2STAT_S_RX_PRE_GENCALL_DAT_ACK ((0x90))

#define	I2C_I2STAT_S_RX_PRE_GENCALL_DAT_NACK ((0x98))

#define	I2C_I2STAT_S_RX_STA_STO_SLVREC_SLVTRX ((0xA0))

#define	I2C_I2STAT_S_TX_SLAR_ACK ((0xA8))

#define	I2C_I2STAT_S_TX_ARB_LOST_M_SLA ((0xB0))

#define	I2C_I2STAT_S_TX_DAT_ACK ((0xB8))

#define	I2C_I2STAT_S_TX_DAT_NACK ((0xC0))

#define	I2C_I2STAT_S_TX_LAST_DAT_ACK ((0xC8))

#define	I2C_SLAVE_TIME_OUT 0x10000000UL

#define	I2C_I2DAT_BITMASK ((0xFF))

#define	I2C_I2DAT_IDLE_CHAR (0xFF)

#define	I2C_I2MMCTRL_MM_ENA ((1 << 0))

#define	I2C_I2MMCTRL_ENA_SCL ((1 << 1))

#define	I2C_I2MMCTRL_MATCH_ALL ((1 << 2))

#define	I2C_I2MMCTRL_BITMASK ((0x07))

#define	I2DATA_BUFFER_BITMASK ((0xFF))

#define	I2C_I2ADR_GC ((1 << 0))

#define	I2C_I2ADR_BITMASK ((0xFF))

#define	I2C_I2MASK_MASK(n) ((n & 0xFE))

#define	I2C_I2SCLH_BITMASK ((0xFFFF))

#define	I2C_I2SCLL_BITMASK ((0xFFFF))

#define	I2C_SETUP_STATUS_ARBF (1 << 8)

#define	I2C_SETUP_STATUS_NOACKF (1 << 9)

#define	I2C_SETUP_STATUS_DONE (1 << 10)

#define	I2C_OK 0x00

#define	I2C_BYTE_SENT 0x01

#define	I2C_BYTE_RECV 0x02

#define	I2C_LAST_BYTE_RECV 0x04

#define	I2C_SEND_END 0x08

#define	I2C_RECV_END 0x10

#define	I2C_ERR (0x10000000)

#define	I2C_NAK_RECV (0x10000000 \| 0x01)

#define	I2C_CheckError(ErrorCode) (ErrorCode & 0x10000000)

#define	I2C_MONITOR_CFG_SCL_OUTPUT I2C_I2MMCTRL_ENA_SCL

#define	I2C_MONITOR_CFG_MATCHALL I2C_I2MMCTRL_MATCH_ALL

Enumerations
enum	I2C_SLAVE_ID { I2C_SLAVE_GENERAL, I2C_SLAVE_0, I2C_SLAVE_1, I2C_SLAVE_2, I2C_SLAVE_3, I2C_SLAVE_NUM_INTERFACE }
	I2C Slave Identifiers. More...

enum	I2C_STATUS_T { I2C_STATUS_DONE, I2C_STATUS_NAK, I2C_STATUS_ARBLOST, I2C_STATUS_BUSERR, I2C_STATUS_BUSY }
	I2C transfer status. More...

Functions
STATIC INLINE void	IP_I2C_Init (IP_I2C_001_T *pI2C)
	Initializes the pI2C peripheral.

STATIC INLINE void	IP_I2C_DeInit (IP_I2C_001_T *pI2C)
	De-initializes the I2C peripheral registers to their default reset values.

STATIC INLINE void	IP_I2C_SetClockRate (IP_I2C_001_T *pI2C, uint32_t SCLValue)
	Set up clock rate for I2Cx.

STATIC INLINE uint32_t	IP_I2C_GetClockDiv (IP_I2C_001_T *pI2C)
	Get current divisor clock value.

STATIC INLINE void	IP_I2C_Master_StartXfer (IP_I2C_001_T *pI2C)
	Enable I2C and start master transfer.

int	IP_I2C_MasterXfer_StateHandler (IP_I2C_001_T pI2C, I2C_XFER_T xfer)
	Master transfer state change handler.

STATIC INLINE int	IP_I2C_IsStateChanged (IP_I2C_001_T *pI2C)
	I2C State change checking.

STATIC INLINE void	IP_I2C_Disable (IP_I2C_001_T *pI2C)
	Disable I2C peripheral's operation.

STATIC INLINE void	IP_I2C_SetSlaveAddress (IP_I2C_001_T *pI2C, I2C_SLAVE_ID sid, uint8_t addr, uint8_t mask)
	Set OWN slave address for specific slave ID.

STATIC INLINE int	IP_I2C_GetCurrentState (IP_I2C_001_T *pI2C)
	Get current state of the I2C peripheral.

I2C_SLAVE_ID	IP_I2C_GetSlaveIndex (IP_I2C_001_T *pI2C)
	Get the slave ID of the active slave.

int	IP_I2C_SlaveXfer_StateHandler (IP_I2C_001_T pI2C, I2C_XFER_T xfer)
	Slave transfer state change handler.

STATIC INLINE void	IP_I2C_Slave_StartXfer (IP_I2C_001_T *pI2C)
	Enable I2C and enable slave transfers.

STATIC INLINE int	IP_I2C_BusFree (IP_I2C_001_T *pI2C)
	Check if I2C bus is free.

STATIC INLINE int	IP_I2C_IsMasterState (IP_I2C_001_T *pI2C)
	Check if the active state belongs to master mode.

Macro Definition Documentation

#define I2C_BYTE_RECV 0x02

Definition at line 222 of file i2c_001.h.

#define I2C_BYTE_SENT 0x01

Definition at line 221 of file i2c_001.h.

#define I2C_CheckError ( ErrorCode ) (ErrorCode & 0x10000000)

Definition at line 231 of file i2c_001.h.

#define I2C_CON_AA (1UL << 2)

Assert acknowledge bit

Definition at line 102 of file i2c_001.h.

#define I2C_CON_I2EN (1UL << 6)

I2C interface bit

Definition at line 106 of file i2c_001.h.

#define I2C_CON_SI (1UL << 3)

I2C interrupt bit

Definition at line 103 of file i2c_001.h.

#define I2C_CON_STA (1UL << 5)

START flag bit

Definition at line 105 of file i2c_001.h.

#define I2C_CON_STO (1UL << 4)

I2C STOP bit

Definition at line 104 of file i2c_001.h.

#define I2C_ERR (0x10000000)

Definition at line 228 of file i2c_001.h.

#define I2C_I2ADR_BITMASK ((0xFF))

I2C Slave Address registers bit mask

Definition at line 193 of file i2c_001.h.

#define I2C_I2ADR_GC ((1 << 0))

General Call enable bit

Definition at line 192 of file i2c_001.h.

#define I2C_I2CONCLR_AAC ((1 << 2))

Assert acknowledge Clear bit

Definition at line 93 of file i2c_001.h.

#define I2C_I2CONCLR_I2ENC ((1 << 6))

I2C interface Disable bit

Definition at line 97 of file i2c_001.h.

#define I2C_I2CONCLR_SIC ((1 << 3))

I2C interrupt Clear bit

Definition at line 94 of file i2c_001.h.

#define I2C_I2CONCLR_STAC ((1 << 5))

START flag Clear bit

Definition at line 96 of file i2c_001.h.

#define I2C_I2CONCLR_STOC ((1 << 4))

I2C STOP Clear bit

Definition at line 95 of file i2c_001.h.

#define I2C_I2CONSET_AA ((0x04))

Assert acknowledge flag

Definition at line 84 of file i2c_001.h.

#define I2C_I2CONSET_I2EN ((0x40))

I2C interface enable

Definition at line 88 of file i2c_001.h.

#define I2C_I2CONSET_SI ((0x08))

I2C interrupt flag

Definition at line 85 of file i2c_001.h.

#define I2C_I2CONSET_STA ((0x20))

START flag

Definition at line 87 of file i2c_001.h.

#define I2C_I2CONSET_STO ((0x10))

STOP flag

Definition at line 86 of file i2c_001.h.

#define I2C_I2DAT_BITMASK ((0xFF))

Mask for I2DAT register

Definition at line 172 of file i2c_001.h.

#define I2C_I2DAT_IDLE_CHAR (0xFF)

Idle data value will be send out in slave mode in case of the actual expecting data requested from the master is greater than its sending data length that can be supported

Definition at line 173 of file i2c_001.h.

#define I2C_I2MASK_MASK ( n ) ((n & 0xFE))

I2C Mask Register mask field

Definition at line 198 of file i2c_001.h.

#define I2C_I2MMCTRL_BITMASK ((0x07))

Mask for I2MMCTRL register

Definition at line 182 of file i2c_001.h.

#define I2C_I2MMCTRL_ENA_SCL ((1 << 1))

SCL output enable

Definition at line 180 of file i2c_001.h.

#define I2C_I2MMCTRL_MATCH_ALL ((1 << 2))

Select interrupt register match

Definition at line 181 of file i2c_001.h.

#define I2C_I2MMCTRL_MM_ENA ((1 << 0))

Monitor mode enable

Definition at line 179 of file i2c_001.h.

#define I2C_I2SCLH_BITMASK ((0xFFFF))

I2C SCL HIGH duty cycle Register bit mask

Definition at line 203 of file i2c_001.h.

#define I2C_I2SCLL_BITMASK ((0xFFFF))

I2C SCL LOW duty cycle Register bit mask

Definition at line 208 of file i2c_001.h.

#define I2C_I2STAT_BUS_ERROR ((0x00))

Bus Error

Definition at line 118 of file i2c_001.h.

#define I2C_I2STAT_M_RX_ARB_LOST ((0x38))

Arbitration lost

Definition at line 136 of file i2c_001.h.

#define I2C_I2STAT_M_RX_DAT_ACK ((0x50))

Data has been received, ACK has been returned

Definition at line 139 of file i2c_001.h.

#define I2C_I2STAT_M_RX_DAT_NACK ((0x58))

Data has been received, NACK has been returned

Definition at line 140 of file i2c_001.h.

#define I2C_I2STAT_M_RX_RESTART ((0x10))

A repeat start condition has been transmitted

Definition at line 135 of file i2c_001.h.

#define I2C_I2STAT_M_RX_SLAR_ACK ((0x40))

SLA+R has been transmitted, ACK has been received

Definition at line 137 of file i2c_001.h.

#define I2C_I2STAT_M_RX_SLAR_NACK ((0x48))

SLA+R has been transmitted, NACK has been received

Definition at line 138 of file i2c_001.h.

#define I2C_I2STAT_M_RX_START ((0x08))

A start condition has been transmitted

Definition at line 134 of file i2c_001.h.

#define I2C_I2STAT_M_TX_ARB_LOST ((0x38))

Arbitration lost in SLA+R/W or Data bytes

Definition at line 129 of file i2c_001.h.

#define I2C_I2STAT_M_TX_DAT_ACK ((0x28))

Data has been transmitted, ACK has been received

Definition at line 127 of file i2c_001.h.

#define I2C_I2STAT_M_TX_DAT_NACK ((0x30))

Data has been transmitted, NACK has been received

Definition at line 128 of file i2c_001.h.

#define I2C_I2STAT_M_TX_RESTART ((0x10))

A repeat start condition has been transmitted

Definition at line 124 of file i2c_001.h.

#define I2C_I2STAT_M_TX_SLAW_ACK ((0x18))

SLA+W has been transmitted, ACK has been received

Definition at line 125 of file i2c_001.h.

#define I2C_I2STAT_M_TX_SLAW_NACK ((0x20))

SLA+W has been transmitted, NACK has been received

Definition at line 126 of file i2c_001.h.

#define I2C_I2STAT_M_TX_START ((0x08))

A start condition has been transmitted

Definition at line 123 of file i2c_001.h.

#define I2C_I2STAT_NO_INF ((0xF8))

No relevant information

Definition at line 117 of file i2c_001.h.

#define I2C_I2STAT_S_RX_ARB_LOST_M_GENCALL ((0x78))

Arbitration lost in SLA+R/W (GENERAL CALL) as master

Definition at line 149 of file i2c_001.h.

#define I2C_I2STAT_S_RX_ARB_LOST_M_SLA ((0x68))

Arbitration lost in SLA+R/W as master

Definition at line 146 of file i2c_001.h.

#define I2C_I2STAT_S_RX_GENCALL_ACK ((0x70))

General call address has been received, ACK has been returned

Definition at line 148 of file i2c_001.h.

#define I2C_I2STAT_S_RX_PRE_GENCALL_DAT_ACK ((0x90))

Previously addressed with General Call; Data has been received and ACK has been returned

Definition at line 153 of file i2c_001.h.

#define I2C_I2STAT_S_RX_PRE_GENCALL_DAT_NACK ((0x98))

Previously addressed with General Call; Data has been received and NOT ACK has been returned

Definition at line 154 of file i2c_001.h.

#define I2C_I2STAT_S_RX_PRE_SLA_DAT_ACK ((0x80))

Previously addressed with own SLA; Data has been received, ACK has been returned

Definition at line 151 of file i2c_001.h.

#define I2C_I2STAT_S_RX_PRE_SLA_DAT_NACK ((0x88))

Previously addressed with own SLA;Data has been received and NOT ACK has been returned

Definition at line 152 of file i2c_001.h.

#define I2C_I2STAT_S_RX_SLAW_ACK ((0x60))

Own slave address has been received, ACK has been returned

Definition at line 145 of file i2c_001.h.

#define I2C_I2STAT_S_RX_STA_STO_SLVREC_SLVTRX ((0xA0))

A STOP condition or repeated START condition has been received while still addressed as SLV/REC (Slave Receive) or SLV/TRX (Slave Transmit)

Definition at line 155 of file i2c_001.h.

#define I2C_I2STAT_S_TX_ARB_LOST_M_SLA ((0xB0))

Arbitration lost in SLA+R/W as master

Definition at line 162 of file i2c_001.h.

#define I2C_I2STAT_S_TX_DAT_ACK ((0xB8))

Data has been transmitted, ACK has been received

Definition at line 164 of file i2c_001.h.

#define I2C_I2STAT_S_TX_DAT_NACK ((0xC0))

Data has been transmitted, NACK has been received

Definition at line 165 of file i2c_001.h.

#define I2C_I2STAT_S_TX_LAST_DAT_ACK ((0xC8))

Last data byte in I2DAT has been transmitted (AA = 0); ACK has been received

Definition at line 166 of file i2c_001.h.

#define I2C_I2STAT_S_TX_SLAR_ACK ((0xA8))

Own SLA+R has been received, ACK has been returned

Definition at line 161 of file i2c_001.h.

#define I2C_LAST_BYTE_RECV 0x04

Definition at line 223 of file i2c_001.h.

#define I2C_MONITOR_CFG_MATCHALL I2C_I2MMCTRL_MATCH_ALL

Select interrupt register match

Definition at line 237 of file i2c_001.h.

#define I2C_MONITOR_CFG_SCL_OUTPUT I2C_I2MMCTRL_ENA_SCL

SCL output enable

Definition at line 236 of file i2c_001.h.

#define I2C_NAK_RECV (0x10000000 | 0x01)

Definition at line 229 of file i2c_001.h.

#define I2C_OK 0x00

Definition at line 220 of file i2c_001.h.

#define I2C_RECV_END 0x10

Definition at line 225 of file i2c_001.h.

#define I2C_SEND_END 0x08

Definition at line 224 of file i2c_001.h.

#define I2C_SETUP_STATUS_ARBF (1 << 8)

Arbitration false

Definition at line 213 of file i2c_001.h.

#define I2C_SETUP_STATUS_DONE (1 << 10)

Status DONE

Definition at line 215 of file i2c_001.h.

#define I2C_SETUP_STATUS_NOACKF (1 << 9)

No ACK returned

Definition at line 214 of file i2c_001.h.

#define I2C_SLAVE_TIME_OUT 0x10000000UL

Time out in case of using I2C slave mode

Definition at line 167 of file i2c_001.h.

#define I2C_STA_STO_RECV 0x20

I2C state handle return values.

Definition at line 226 of file i2c_001.h.

#define I2C_STA_STO_RECV 0x20

I2C state handle return values.

Definition at line 226 of file i2c_001.h.

#define I2C_STAT_CODE_BITMASK ((0xF8))

Return Code mask in I2C status register

Definition at line 111 of file i2c_001.h.

#define I2C_STAT_CODE_ERROR ((0xFF))

Return Code error mask in I2C status register

Definition at line 112 of file i2c_001.h.

#define I2DATA_BUFFER_BITMASK ((0xFF))

I2C Data buffer register bit mask

Definition at line 187 of file i2c_001.h.

#define RET_SLAVE_BUSY 0

Return value, when slave is busy

Definition at line 74 of file i2c_001.h.

#define RET_SLAVE_IDLE 2

Return value, when slave enter idle mode

Definition at line 73 of file i2c_001.h.

#define RET_SLAVE_RX 5

Return value, when 1 byte RX'd successfully

Definition at line 72 of file i2c_001.h.

#define RET_SLAVE_TX 6

Return values for SLAVE handler.

Note: Chip drivers will usally be designed to match their events with this valueReturn value, when 1 byte TX'd successfully

Definition at line 71 of file i2c_001.h.

Enumeration Type Documentation

enum I2C_SLAVE_ID

I2C Slave Identifiers.

Enumerator:

I2C_SLAVE_GENERAL	Slave ID for general calls
I2C_SLAVE_0	Slave ID fo Slave Address 0
I2C_SLAVE_1	Slave ID fo Slave Address 1
I2C_SLAVE_2	Slave ID fo Slave Address 2
I2C_SLAVE_3	Slave ID fo Slave Address 3
I2C_SLAVE_NUM_INTERFACE	Number of slave interfaces

Definition at line 242 of file i2c_001.h.

enum I2C_STATUS_T

I2C transfer status.

Enumerator:

I2C_STATUS_DONE	Transfer done successfully
I2C_STATUS_NAK	NAK received during transfer
I2C_STATUS_ARBLOST	Aribitration lost during transfer
I2C_STATUS_BUSERR	Bus error in I2C transfer
I2C_STATUS_BUSY	I2C is busy doing transfer

Definition at line 254 of file i2c_001.h.

Function Documentation

STATIC INLINE int IP_I2C_BusFree ( IP_I2C_001_T * pI2C )

Check if I2C bus is free.

Parameters

pI2C	: Pointer to selected I2C peripheral

Returns: 1 if I2C bus is free, 0 if busy

Definition at line 441 of file i2c_001.h.

STATIC INLINE void IP_I2C_DeInit ( IP_I2C_001_T * pI2C )

De-initializes the I2C peripheral registers to their default reset values.

Parameters

pI2C	: Pointer to selected I2Cx peripheral

Returns: Nothing

Definition at line 292 of file i2c_001.h.

STATIC INLINE void IP_I2C_Disable ( IP_I2C_001_T * pI2C )

Disable I2C peripheral's operation.

Parameters

pI2C	: Pointer to selected I2C peripheral

Returns: Nothing

Definition at line 361 of file i2c_001.h.

STATIC INLINE uint32_t IP_I2C_GetClockDiv ( IP_I2C_001_T * pI2C )

Get current divisor clock value.

Parameters

pI2C	: Pointer to selected I2Cx peripheral

Returns: Clock value divider used by I2C peripheral

Definition at line 315 of file i2c_001.h.

STATIC INLINE int IP_I2C_GetCurrentState ( IP_I2C_001_T * pI2C )

Get current state of the I2C peripheral.

Parameters

pI2C	: Pointer to selected I2C peripheral

Returns: Current state code of I2C peripheral

Definition at line 393 of file i2c_001.h.

I2C_SLAVE_ID IP_I2C_GetSlaveIndex ( IP_I2C_001_T * pI2C )

Get the slave ID of the active slave.

Parameters

pI2C	: Pointer to selected I2C peripheral

Returns: Current active slave id

Definition at line 151 of file i2c_001.c.

STATIC INLINE void IP_I2C_Init ( IP_I2C_001_T * pI2C )

Initializes the pI2C peripheral.

Parameters

pI2C	: Pointer to selected I2Cx peripheral

Returns: Nothing

Definition at line 281 of file i2c_001.h.

STATIC INLINE int IP_I2C_IsMasterState ( IP_I2C_001_T * pI2C )

Check if the active state belongs to master mode.

Parameters

pI2C	: Pointer to selected I2C peripheral

Returns: 1 if the I2C is in master mode, 0 if I2C is in slave mode

Definition at line 451 of file i2c_001.h.

STATIC INLINE int IP_I2C_IsStateChanged ( IP_I2C_001_T * pI2C )

I2C State change checking.

Parameters

pI2C	: Pointer to selected I2C peripheral

Returns: 1 when there is a state change, else 0

Definition at line 351 of file i2c_001.h.

STATIC INLINE void IP_I2C_Master_StartXfer ( IP_I2C_001_T * pI2C )

Enable I2C and start master transfer.

Parameters

pI2C	: Pointer to selected I2C peripheral

Returns: Nothing

Definition at line 325 of file i2c_001.h.

int IP_I2C_MasterXfer_StateHandler	(	IP_I2C_001_T *	pI2C,
		I2C_XFER_T *	xfer
	)

Master transfer state change handler.

Parameters

pI2C	: Pointer to selected I2C peripheral
xfer	: Pointer to transfer structure

Returns: 0 when transfer is done, non-zero when transfer is still going on.

Note: Values pointed to by xfer will be changed based on the state that was handled.

Definition at line 82 of file i2c_001.c.

STATIC INLINE void IP_I2C_SetClockRate	(	IP_I2C_001_T *	pI2C,
		uint32_t	SCLValue
	)

Set up clock rate for I2Cx.

Parameters

pI2C	: Pointer to selected I2Cx peripheral
SCLValue	: Value of I2CSCL register

Returns: Nothing

Definition at line 304 of file i2c_001.h.

STATIC INLINE void IP_I2C_SetSlaveAddress	(	IP_I2C_001_T *	pI2C,
		I2C_SLAVE_ID	sid,
		uint8_t	addr,
		uint8_t	mask
	)

Set OWN slave address for specific slave ID.

Parameters

pI2C	: Pointer to selected I2C peripheral
sid	: Slave ID (see I2C_SLAVE_ID)
addr	: 7-bit slave address from bits (1 - 7) bit 0 having 1 to enable general call, 0 to disable it.
mask	: Address mask

Returns: Nothing

Definition at line 375 of file i2c_001.h.

STATIC INLINE void IP_I2C_Slave_StartXfer ( IP_I2C_001_T * pI2C )

Enable I2C and enable slave transfers.

Parameters

pI2C	: Pointer to selected I2C peripheral

Returns: Nothing

Definition at line 427 of file i2c_001.h.

int IP_I2C_SlaveXfer_StateHandler	(	IP_I2C_001_T *	pI2C,
		I2C_XFER_T *	xfer
	)

Slave transfer state change handler.

Parameters

pI2C	: Pointer to selected I2C peripheral
xfer	: Pointer to transfer structure

Returns: RET_SLAVE_BUSY when transfer is in progress, RET_SLAVE_IDLE when transfer done and slave enters idle mode, RET_SLAVE_RX when a byte is received from master, RET_SLAVE_TX when a byte is sent to master.

Note: Argument xfer must have txBuff and rxBuff pointing to a valid memory except for General call handler which can have txBuff as NULL as the slave will not transfer anything to master using General call address. Structure pointed by xfer will have its values changed based on the event that was handled.

Definition at line 168 of file i2c_001.c.

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