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LPCOpen Platform
v1.03
LPCOpen Platform for NXP LPC Microcontrollers
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Macros | |
| #define | LPC_FLASH_BASE (0x00000000UL) |
| #define | LPC_RAM_BASE (0x10000000UL) |
| #define | LPC_ROM_BASE (0x1FFF0000UL) |
| #define | LPC_APB0_BASE (0x40000000UL) |
| #define | LPC_AHB_BASE (0x50000000UL) |
| #define | LPC_WWDT_BASE (0x40000000UL) |
| #define | LPC_MRT_BASE (0x40004000UL) |
| #define | LPC_WKT_BASE (0x40008000UL) |
| #define | LPC_SWM_BASE (0x4000C000UL) |
| #define | LPC_PMU_BASE (0x40020000UL) |
| #define | LPC_CMP_BASE (0x40024000UL) |
| #define | LPC_FMC_BASE (0x40040000UL) |
| #define | LPC_IOCON_BASE (0x40044000UL) |
| #define | LPC_SYSCTL_BASE (0x40048000UL) |
| #define | LPC_I2C_BASE (0x40050000UL) |
| #define | LPC_SPI0_BASE (0x40058000UL) |
| #define | LPC_SPI1_BASE (0x4005C000UL) |
| #define | LPC_USART0_BASE (0x40064000UL) |
| #define | LPC_USART1_BASE (0x40068000UL) |
| #define | LPC_USART2_BASE (0x4006C000UL) |
| #define | LPC_CRC_BASE (0x50000000UL) |
| #define | LPC_SCT_BASE (0x50004000UL) |
| #define | LPC_GPIO_PORT_BASE (0xA0000000UL) |
| #define | LPC_PIN_INT_BASE (0xA0004000UL) |
| #define | LPC_WWDT ((LPC_WWDT_T *) LPC_WWDT_BASE) |
| #define | LPC_SPI0 ((LPC_SPI_T *) LPC_SPI0_BASE) |
| #define | LPC_SPI1 ((LPC_SPI_T *) LPC_SPI1_BASE) |
| #define | LPC_USART0 ((LPC_USART_T *) LPC_USART0_BASE) |
| #define | LPC_USART1 ((LPC_USART_T *) LPC_USART1_BASE) |
| #define | LPC_USART2 ((LPC_USART_T *) LPC_USART2_BASE) |
| #define | LPC_WKT ((LPC_WKT_T *) LPC_WKT_BASE) |
| #define | LPC_PMU ((LPC_PMU_T *) LPC_PMU_BASE) |
| #define | LPC_CRC ((LPC_CRC_T *) LPC_CRC_BASE) |
| #define | LPC_SCT ((LPC_SCT_T *) LPC_SCT_BASE) |
| #define | LPC_GPIO_PORT ((LPC_GPIO_T *) LPC_GPIO_PORT_BASE) |
| #define | LPC_IOCON ((LPC_IOCON_T *) LPC_IOCON_BASE) |
| #define | LPC_SWM ((LPC_SWM_T *) LPC_SWM_BASE) |
| #define | LPC_SYSCTL ((LPC_SYSCTL_T *) LPC_SYSCTL_BASE) |
| #define | LPC_CMP ((LPC_CMP_T *) LPC_CMP_BASE) |
| #define | LPC_FMC ((LPC_FMC_T *) LPC_FMC_BASE) |
| #define | LPC_MRT ((LPC_MRT_T *) LPC_MRT_BASE) |
Typedefs | |
| typedef IP_SPI_002_T | LPC_SPI_T |
| typedef IP_WWDT_001_T | LPC_WWDT_T |
| typedef IP_USART_002_T | LPC_USART_T |
| typedef IP_CRC_001_T | LPC_CRC_T |
| typedef IP_SCT_001_T | LPC_SCT_T |
| typedef ACMP_001_T | LPC_CMP_T |
| typedef IP_WKT_001_T | LPC_WKT_T |
| typedef IP_GPIO_001_T | LPC_GPIO_T |
| #define LPC_CMP ((LPC_CMP_T *) LPC_CMP_BASE) |
| #define LPC_CRC ((LPC_CRC_T *) LPC_CRC_BASE) |
| #define LPC_FMC ((LPC_FMC_T *) LPC_FMC_BASE) |
| #define LPC_GPIO_PORT ((LPC_GPIO_T *) LPC_GPIO_PORT_BASE) |
| #define LPC_IOCON ((LPC_IOCON_T *) LPC_IOCON_BASE) |
| #define LPC_MRT ((LPC_MRT_T *) LPC_MRT_BASE) |
| #define LPC_PMU ((LPC_PMU_T *) LPC_PMU_BASE) |
| #define LPC_SCT ((LPC_SCT_T *) LPC_SCT_BASE) |
| #define LPC_SPI0 ((LPC_SPI_T *) LPC_SPI0_BASE) |
| #define LPC_SPI1 ((LPC_SPI_T *) LPC_SPI1_BASE) |
| #define LPC_SWM ((LPC_SWM_T *) LPC_SWM_BASE) |
| #define LPC_SYSCTL ((LPC_SYSCTL_T *) LPC_SYSCTL_BASE) |
| #define LPC_USART0 ((LPC_USART_T *) LPC_USART0_BASE) |
| #define LPC_USART1 ((LPC_USART_T *) LPC_USART1_BASE) |
| #define LPC_USART2 ((LPC_USART_T *) LPC_USART2_BASE) |
| #define LPC_WKT ((LPC_WKT_T *) LPC_WKT_BASE) |
| #define LPC_WWDT ((LPC_WWDT_T *) LPC_WWDT_BASE) |
| typedef ACMP_001_T LPC_CMP_T |
| typedef IP_CRC_001_T LPC_CRC_T |
| typedef IP_GPIO_001_T LPC_GPIO_T |
| typedef IP_SCT_001_T LPC_SCT_T |
| typedef IP_SPI_002_T LPC_SPI_T |
| typedef IP_USART_002_T LPC_USART_T |
| typedef IP_WKT_001_T LPC_WKT_T |
| typedef IP_WWDT_001_T LPC_WWDT_T |