iocon_8xx.h

Go to the documentation of this file.

/*
 * @brief LPC8xx IOCON register block and driver
 *
 * @note
 * Copyright(C) NXP Semiconductors, 2012
 * All rights reserved.
 *
 * @par
 * Software that is described herein is for illustrative purposes only
 * which provides customers with programming information regarding the
 * LPC products.  This software is supplied "AS IS" without any warranties of
 * any kind, and NXP Semiconductors and its licenser disclaim any and
 * all warranties, express or implied, including all implied warranties of
 * merchantability, fitness for a particular purpose and non-infringement of
 * intellectual property rights.  NXP Semiconductors assumes no responsibility
 * or liability for the use of the software, conveys no license or rights under any
 * patent, copyright, mask work right, or any other intellectual property rights in
 * or to any products. NXP Semiconductors reserves the right to make changes
 * in the software without notification. NXP Semiconductors also makes no
 * representation or warranty that such application will be suitable for the
 * specified use without further testing or modification.
 *
 * @par
 * Permission to use, copy, modify, and distribute this software and its
 * documentation is hereby granted, under NXP Semiconductors' and its
 * licensor's relevant copyrights in the software, without fee, provided that it
 * is used in conjunction with NXP Semiconductors microcontrollers.  This
 * copyright, permission, and disclaimer notice must appear in all copies of
 * this code.
 */

#ifndef __IOCON_8XX_H_
#define __IOCON_8XX_H_

#ifdef __cplusplus
extern "C" {
#endif

typedef struct {       
 __IO uint32_t PIO0_17;     
 __IO uint32_t PIO0_13;     
 __IO uint32_t PIO0_12;     
 __IO uint32_t PIO0_5;     
 __IO uint32_t PIO0_4;     
 __IO uint32_t PIO0_3;     
 __IO uint32_t PIO0_2;     
 __IO uint32_t PIO0_11;     
 __IO uint32_t PIO0_10;     
 __IO uint32_t PIO0_16;     
 __IO uint32_t PIO0_15;     
 __IO uint32_t PIO0_1;     
 __IO uint32_t Reserved;     
 __IO uint32_t PIO0_9;     
 __IO uint32_t PIO0_8;     
 __IO uint32_t PIO0_7;     
 __IO uint32_t PIO0_6;     
 __IO uint32_t PIO0_0;     
 __IO uint32_t PIO0_14;     
} LPC_IOCON_T;

typedef enum CHIP_PINx {
 PIO0  =  0,  
 PIO1  =  1,  
 PIO2  =  2,  
 PIO3  =  3,  
 PIO4  =  4,  
 PIO5  =  5,  
 PIO6  =  6,  
 PIO7  =  7,  
 PIO8  =  8,  
 PIO9  =  9,  
 PIO10 = 10,  
 PIO11 = 11,  
 PIO12 = 12,  
 PIO13 = 13,  
 PIO14 = 14,  
 PIO15 = 15,  
 PIO16 = 16,  
 PIO17 = 17,  
 PIO_NUL = 0xFF 
} CHIP_PINx_T;

typedef enum CHIP_PIN_MODE {
 PIN_MODE_INACTIVE = 0, 
 PIN_MODE_PULLDN = 1, 
 PIN_MODE_PULLUP = 2, 
 PIN_MODE_REPEATER = 3 
} CHIP_PIN_MODE_T;

typedef enum CHIP_PIN_SMODE {
 PIN_SMODE_BYPASS = 0, 
 PIN_SMODE_CYC1 = 1,  
 PIN_SMODE_CYC2 = 2,  
 PIN_SMODE_CYC3 = 3  
} CHIP_PIN_SMODE_T;

typedef enum CHIP_PIN_CLKDIV {
 IOCONCLKDIV0 = 0, 
 IOCONCLKDIV1 = 1, 
 IOCONCLKDIV2 = 2, 
 IOCONCLKDIV3 = 3, 
 IOCONCLKDIV4 = 4, 
 IOCONCLKDIV5 = 5, 
 IOCONCLKDIV6 = 6 
} CHIP_PIN_CLKDIV_T;

typedef enum CHIP_PIN_I2CMODE {
 PIN_I2CMODE_STDFAST = 0, 
 PIN_I2CMODE_GPIO = 1,  
 PIN_I2CMODE_FASTPLUS = 2 
} CHIP_PIN_I2CMODE_T;

void Chip_IOCON_PinSetMode(LPC_IOCON_T *pIOCON, CHIP_PINx_T pin, CHIP_PIN_MODE_T mode);

void Chip_IOCON_PinSetHysteresis(LPC_IOCON_T *pIOCON, CHIP_PINx_T pin, bool enable);

void Chip_IOCON_PinSetInputInverted(LPC_IOCON_T *pIOCON, CHIP_PINx_T pin, bool invert);

void Chip_IOCON_PinSetOpenDrainMode(LPC_IOCON_T *pIOCON, CHIP_PINx_T pin, bool open_drain);

void Chip_IOCON_PinSetSampleMode(LPC_IOCON_T *pIOCON, CHIP_PINx_T pin, CHIP_PIN_SMODE_T smode);

void Chip_IOCON_PinSetClockDivisor(LPC_IOCON_T *pIOCON, CHIP_PINx_T pin, CHIP_PIN_CLKDIV_T clkdiv);

void Chip_IOCON_PinSetI2CMode(LPC_IOCON_T *pIOCON, CHIP_PINx_T pin, CHIP_PIN_I2CMODE_T mode);

#ifdef __cplusplus
}
#endif

#endif /* __IOCON_8XX_H_ */