ssp_13xx.h File Reference

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Data Structures
struct	SSP_ConfigFormat
struct	SPI_Address_t
struct	Chip_SSP_DATA_SETUP_T

Macros
#define	SSP_CPHA_FIRST   SSP_CR0_CPHA_FIRST
#define	SSP_CPHA_SECOND   SSP_CR0_CPHA_SECOND
#define	SSP_CPOL_HI   SSP_CR0_CPOL_LO
#define	SSP_CPOL_LO   SSP_CR0_CPOL_HI
#define	SSP_SLAVE_MODE   SSP_CR1_SLAVE_EN
#define	SSP_MASTER_MODE   SSP_CR1_MASTER_EN

Enumerations
enum	CHIP_SSP_CLOCK_MODE_T {   SSP_CLOCK_CPHA0_CPOL0 = (0 << 6), SSP_CLOCK_CPHA0_CPOL1 = (1u << 6), SSP_CLOCK_CPHA1_CPOL0 = (2u << 6), SSP_CLOCK_CPHA1_CPOL1 = (3u << 6),   SSP_CLOCK_MODE0 = SSP_CLOCK_CPHA0_CPOL0, SSP_CLOCK_MODE1 = SSP_CLOCK_CPHA1_CPOL0, SSP_CLOCK_MODE2 = SSP_CLOCK_CPHA0_CPOL1, SSP_CLOCK_MODE3 = SSP_CLOCK_CPHA1_CPOL1,   SSP_CLOCK_CPHA0_CPOL0 = (0 << 6), SSP_CLOCK_CPHA0_CPOL1 = (1u << 6), SSP_CLOCK_CPHA1_CPOL0 = (2u << 6), SSP_CLOCK_CPHA1_CPOL1 = (3u << 6),   SSP_CLOCK_MODE0 = SSP_CLOCK_CPHA0_CPOL0, SSP_CLOCK_MODE1 = SSP_CLOCK_CPHA1_CPOL0, SSP_CLOCK_MODE2 = SSP_CLOCK_CPHA0_CPOL1, SSP_CLOCK_MODE3 = SSP_CLOCK_CPHA1_CPOL1,   SSP_CLOCK_CPHA0_CPOL0 = (0 << 6), SSP_CLOCK_CPHA0_CPOL1 = (1u << 6), SSP_CLOCK_CPHA1_CPOL0 = (2u << 6), SSP_CLOCK_CPHA1_CPOL1 = (3u << 6),   SSP_CLOCK_MODE0 = SSP_CLOCK_CPHA0_CPOL0, SSP_CLOCK_MODE1 = SSP_CLOCK_CPHA1_CPOL0, SSP_CLOCK_MODE2 = SSP_CLOCK_CPHA0_CPOL1, SSP_CLOCK_MODE3 = SSP_CLOCK_CPHA1_CPOL1,   SSP_CLOCK_CPHA0_CPOL0 = (0 << 6), SSP_CLOCK_CPHA0_CPOL1 = (1u << 6), SSP_CLOCK_CPHA1_CPOL0 = (2u << 6), SSP_CLOCK_CPHA1_CPOL1 = (3u << 6),   SSP_CLOCK_MODE0 = SSP_CLOCK_CPHA0_CPOL0, SSP_CLOCK_MODE1 = SSP_CLOCK_CPHA1_CPOL0, SSP_CLOCK_MODE2 = SSP_CLOCK_CPHA0_CPOL1, SSP_CLOCK_MODE3 = SSP_CLOCK_CPHA1_CPOL1 }
enum	CHIP_SSP_FRAME_FORMAT_T {   SSP_FRAMEFORMAT_SPI = (0 << 4), CHIP_SSP_FRAME_FORMAT_TI = (1u << 4), SSP_FRAMEFORMAT_MICROWIRE = (2u << 4), SSP_FRAMEFORMAT_SPI = (0 << 4),   CHIP_SSP_FRAME_FORMAT_TI = (1u << 4), SSP_FRAMEFORMAT_MICROWIRE = (2u << 4), SSP_FRAMEFORMAT_SPI = (0 << 4), CHIP_SSP_FRAME_FORMAT_TI = (1u << 4),   SSP_FRAMEFORMAT_MICROWIRE = (2u << 4), SSP_FRAMEFORMAT_SPI = (0 << 4), CHIP_SSP_FRAME_FORMAT_TI = (1u << 4), SSP_FRAMEFORMAT_MICROWIRE = (2u << 4) }
enum	CHIP_SSP_BITS_T {   SSP_BITS_4 = (3u << 0), SSP_BITS_5 = (4u << 0), SSP_BITS_6 = (5u << 0), SSP_BITS_7 = (6u << 0),   SSP_BITS_8 = (7u << 0), SSP_BITS_9 = (8u << 0), SSP_BITS_10 = (9u << 0), SSP_BITS_11 = (10u << 0),   SSP_BITS_12 = (11u << 0), SSP_BITS_13 = (12u << 0), SSP_BITS_14 = (13u << 0), SSP_BITS_15 = (14u << 0),   SSP_BITS_16 = (15u << 0), SSP_BITS_4 = (3u << 0), SSP_BITS_5 = (4u << 0), SSP_BITS_6 = (5u << 0),   SSP_BITS_7 = (6u << 0), SSP_BITS_8 = (7u << 0), SSP_BITS_9 = (8u << 0), SSP_BITS_10 = (9u << 0),   SSP_BITS_11 = (10u << 0), SSP_BITS_12 = (11u << 0), SSP_BITS_13 = (12u << 0), SSP_BITS_14 = (13u << 0),   SSP_BITS_15 = (14u << 0), SSP_BITS_16 = (15u << 0), SSP_BITS_4 = (3u << 0), SSP_BITS_5 = (4u << 0),   SSP_BITS_6 = (5u << 0), SSP_BITS_7 = (6u << 0), SSP_BITS_8 = (7u << 0), SSP_BITS_9 = (8u << 0),   SSP_BITS_10 = (9u << 0), SSP_BITS_11 = (10u << 0), SSP_BITS_12 = (11u << 0), SSP_BITS_13 = (12u << 0),   SSP_BITS_14 = (13u << 0), SSP_BITS_15 = (14u << 0), SSP_BITS_16 = (15u << 0), SSP_BITS_4 = (3u << 0),   SSP_BITS_5 = (4u << 0), SSP_BITS_6 = (5u << 0), SSP_BITS_7 = (6u << 0), SSP_BITS_8 = (7u << 0),   SSP_BITS_9 = (8u << 0), SSP_BITS_10 = (9u << 0), SSP_BITS_11 = (10u << 0), SSP_BITS_12 = (11u << 0),   SSP_BITS_13 = (12u << 0), SSP_BITS_14 = (13u << 0), SSP_BITS_15 = (14u << 0), SSP_BITS_16 = (15u << 0) }
enum	CHIP_SSP_MODE_T {   SSP_MODE_MASTER = (0 << 2), SSP_MODE_SLAVE = (1u << 2), SSP_MODE_MASTER = (0 << 2), SSP_MODE_SLAVE = (1u << 2),   SSP_MODE_MASTER = (0 << 2), SSP_MODE_SLAVE = (1u << 2), SSP_MODE_MASTER = (0 << 2), SSP_MODE_SLAVE = (1u << 2) }

Functions
STATIC INLINE FlagStatus	Chip_SSP_GetStatus (LPC_SSP_T *pSSP, IP_SSP_STATUS_T Stat)
	Get the current status of SSP controller.
STATIC INLINE void	Chip_SSP_Enable (LPC_SSP_T *pSSP)
	Enable SSP operation.
STATIC INLINE void	Chip_SSP_Disable (LPC_SSP_T *pSSP)
	Disable SSP operation.
STATIC INLINE void	Chip_SSP_EnableLoopBack (LPC_SSP_T *pSSP)
	Enable loopback mode.
STATIC INLINE void	Chip_SSP_DisableLoopBack (LPC_SSP_T *pSSP)
	Disable loopback mode.
void	Chip_SSP_Int_FlushData (LPC_SSP_T *pSSP)
	Clean all data in RX FIFO of SSP.
Status	Chip_SSP_Int_RWFrames8Bits (LPC_SSP_T *pSSP, Chip_SSP_DATA_SETUP_T *xf_setup)
	SSP Interrupt Read/Write with 8-bit frame width.
Status	Chip_SSP_Int_RWFrames16Bits (LPC_SSP_T *pSSP, Chip_SSP_DATA_SETUP_T *xf_setup)
	SSP Interrupt Read/Write with 16-bit frame width.
uint32_t	Chip_SSP_RWFrames_Blocking (LPC_SSP_T *pSSP, Chip_SSP_DATA_SETUP_T *xf_setup)
	SSP Polling Read/Write in blocking mode.
uint32_t	Chip_SSP_WriteFrames_Blocking (LPC_SSP_T *pSSP, uint8_t *buffer, uint32_t buffer_len)
	SSP Polling Write in blocking mode.
uint32_t	Chip_SSP_ReadFrames_Blocking (LPC_SSP_T *pSSP, uint8_t *buffer, uint32_t buffer_len)
	Note here.
void	Chip_SSP_Init (LPC_SSP_T *pSSP)
	Initialize the SSP.
void	Chip_SSP_DeInit (LPC_SSP_T *pSSP)
	Shutdown the SSP.
void	Chip_SSP_SetMaster (LPC_SSP_T *pSSP, bool master)
	Set the SSP operating modes, master or slave.
void	Chip_SSP_SetBitRate (LPC_SSP_T *pSSP, uint32_t bitRate)
	Set the clock frequency for SSP interface.
STATIC INLINE void	Chip_SSP_SetFormat (LPC_SSP_T *pSSP, SSP_ConfigFormat *format)
	Set up the SSP frame format.
STATIC INLINE void	Chip_SSP_Int_Enable (LPC_SSP_T *pSSP)
	Enable SSP interrupt.
STATIC INLINE void	Chip_SSP_Int_Disable (LPC_SSP_T *pSSP)
	Disable SSP interrupt.