IP_QEI_001_T Struct Reference

Detailed Description

Quadrature Encoder Interface register block structure.

Definition at line 51 of file qei_001.h.

#include "qei_001.h"

Data Fields
__O uint32_t	CON
__I uint32_t	STAT
__IO uint32_t	CONF
__I uint32_t	POS
__IO uint32_t	MAXPOS
__IO uint32_t	CMPOS0
__IO uint32_t	CMPOS1
__IO uint32_t	CMPOS2
__I uint32_t	INXCNT
__IO uint32_t	INXCMP0
__IO uint32_t	LOAD
__I uint32_t	TIME
__I uint32_t	VEL
__I uint32_t	CAP
__IO uint32_t	VELCOMP
__IO uint32_t	FILTERPHA
__IO uint32_t	FILTERPHB
__IO uint32_t	FILTERINX
__IO uint32_t	WINDOW
__IO uint32_t	INXCMP1
__IO uint32_t	INXCMP2
__I uint32_t	RESERVED0 [993]
__O uint32_t	IEC
__O uint32_t	IES
__I uint32_t	INTSTAT
__I uint32_t	IE
__O uint32_t	CLR
__O uint32_t	SET

Field Documentation

__I uint32_t CAP

Velocity capture register

Definition at line 65 of file qei_001.h.

__O uint32_t CLR

Interrupt status clear register

Definition at line 78 of file qei_001.h.

__IO uint32_t CMPOS0

position compare register 0

Definition at line 57 of file qei_001.h.

__IO uint32_t CMPOS1

position compare register 1

Definition at line 58 of file qei_001.h.

__IO uint32_t CMPOS2

position compare register 2

Definition at line 59 of file qei_001.h.

__O uint32_t CON

< QEI Structure Control register

Definition at line 52 of file qei_001.h.

__IO uint32_t CONF

Configuration register

Definition at line 54 of file qei_001.h.

__IO uint32_t FILTERINX

Digital filter register on input index (QEI_IDX)

Definition at line 69 of file qei_001.h.

__IO uint32_t FILTERPHA

Digital filter register on input phase A (QEI_A)

Definition at line 67 of file qei_001.h.

__IO uint32_t FILTERPHB

Digital filter register on input phase B (QEI_B)

Definition at line 68 of file qei_001.h.

__I uint32_t IE

Interrupt enable register

Definition at line 77 of file qei_001.h.

__O uint32_t IEC

Interrupt enable clear register

Definition at line 74 of file qei_001.h.

__O uint32_t IES

Interrupt enable set register

Definition at line 75 of file qei_001.h.

__I uint32_t INTSTAT

Interrupt status register

Definition at line 76 of file qei_001.h.

__IO uint32_t INXCMP0

Index compare register 0

Definition at line 61 of file qei_001.h.

__IO uint32_t INXCMP1

Index compare register 1

Definition at line 71 of file qei_001.h.

__IO uint32_t INXCMP2

Index compare register 2

Definition at line 72 of file qei_001.h.

__I uint32_t INXCNT

Index count register

Definition at line 60 of file qei_001.h.

__IO uint32_t LOAD

Velocity timer reload register

Definition at line 62 of file qei_001.h.

__IO uint32_t MAXPOS

Maximum position register

Definition at line 56 of file qei_001.h.

__I uint32_t POS

Position register

Definition at line 55 of file qei_001.h.

__I uint32_t RESERVED0[993]

Definition at line 73 of file qei_001.h.

__O uint32_t SET

Interrupt status set register

Definition at line 79 of file qei_001.h.

__I uint32_t STAT

Encoder status register

Definition at line 53 of file qei_001.h.

__I uint32_t TIME

Velocity timer register

Definition at line 63 of file qei_001.h.

__I uint32_t VEL

Velocity counter register

Definition at line 64 of file qei_001.h.

__IO uint32_t VELCOMP

Velocity compare register

Definition at line 66 of file qei_001.h.

__IO uint32_t WINDOW

Index acceptance window register

Definition at line 70 of file qei_001.h.

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The documentation for this struct was generated from the following file:

• C:/nxp/v1.03/lpcopen_v1.03/lpcopen/software/lpc_core/lpc_ip/qei_001.h