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LPCOpen Platform for NXP LPC Microcontrollers
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swm_8xx.h
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1 /*
2  * @brief LPC8xx Switch Matrix driver
3  *
4  * @note
5  * Copyright(C) NXP Semiconductors, 2012
6  * All rights reserved.
7  *
8  * @par
9  * Software that is described herein is for illustrative purposes only
10  * which provides customers with programming information regarding the
11  * LPC products. This software is supplied "AS IS" without any warranties of
12  * any kind, and NXP Semiconductors and its licensor disclaim any and
13  * all warranties, express or implied, including all implied warranties of
14  * merchantability, fitness for a particular purpose and non-infringement of
15  * intellectual property rights. NXP Semiconductors assumes no responsibility
16  * or liability for the use of the software, conveys no license or rights under any
17  * patent, copyright, mask work right, or any other intellectual property rights in
18  * or to any products. NXP Semiconductors reserves the right to make changes
19  * in the software without notification. NXP Semiconductors also makes no
20  * representation or warranty that such application will be suitable for the
21  * specified use without further testing or modification.
22  *
23  * @par
24  * Permission to use, copy, modify, and distribute this software and its
25  * documentation is hereby granted, under NXP Semiconductors' and its
26  * licensor's relevant copyrights in the software, without fee, provided that it
27  * is used in conjunction with NXP Semiconductors microcontrollers. This
28  * copyright, permission, and disclaimer notice must appear in all copies of
29  * this code.
30  */
31 
32 #ifndef __SWM_8XX_H_
33 #define __SWM_8XX_H_
34 
35 #ifdef __cplusplus
36 extern "C" {
37 #endif
38 
47 typedef struct {
48  __IO uint32_t PINASSIGN[9];
49  __I uint32_t RESERVED0[103];
50  __IO uint32_t PINENABLE0;
51 } LPC_SWM_T;
52 
56 typedef enum CHIP_SWM_PIN_MOVABLE {
57  SWM_U0_TXD_O = 0x00,
58  SWM_U0_RXD_I = 0x01,
59  SWM_U0_RTS_O = 0x02,
60  SWM_U0_CTS_I = 0x03,
61  SWM_U0_SCLK_IO = 0x10,
62  SWM_U1_TXD_O = 0x11,
63  SWM_U1_RXD_I = 0x12,
64  SWM_U1_RTS_O = 0x13,
65  SWM_U1_CTS_I = 0x20,
66  SWM_U1_SCLK_IO = 0x21,
67  SWM_U2_TXD_O = 0x22,
68  SWM_U2_RXD_I = 0x23,
69  SWM_U2_RTS_O = 0x30,
70  SWM_U2_CTS_I = 0x31,
71  SWM_U2_SCLK_IO = 0x32,
72  SWM_SPI0_SCK_IO = 0x33,
73  SWM_SPI0_MOSI_IO = 0x40,
74  SWM_SPI0_MISO_IO = 0x41,
75  SWM_SPI0_SSEL_IO = 0x42,
76  SWM_SPI1_SCK_IO = 0x43,
77  SWM_SPI1_MOSI_IO = 0x50,
78  SWM_SPI1_MISO_IO = 0x51,
79  SWM_SPI1_SSEL_IO = 0x52,
80  SWM_CTIN_0_I = 0x53,
81  SWM_CTIN_1_I = 0x60,
82  SWM_CTIN_2_I = 0x61,
83  SWM_CTIN_3_I = 0x62,
84  SWM_CTOUT_0_O = 0x63,
85  SWM_CTOUT_1_O = 0x70,
86  SWM_CTOUT_2_O = 0x71,
87  SWM_CTOUT_3_O = 0x72,
88  SWM_I2C_SDA_IO = 0x73,
89  SWM_I2C_SCL_IO = 0x80,
90  SWM_ACMP_O_O = 0x81,
91  SWM_CLKOUT_O = 0x82,
92  SWM_GPIO_INT_BMAT_O = 0x83,
93 } CHIP_SWM_PIN_MOVABLE_T;
94 
98 typedef enum CHIP_SWM_PIN_FIXED {
99  ACMP_I1 = 0,
100  ACMP_I2 = 1,
101  SWCLK = 2,
102  SWDIO = 3,
103  XTALIN = 4,
104  XTALOUT = 5,
105  RST = 6,
106  CLKIN = 7,
107  VDDCMP = 8
108 } CHIP_SWM_PIN_FIXED_T;
109 
114 STATIC INLINE void Chip_SWM_Init(void)
115 {
116  Chip_Clock_EnablePeriphClock(SYSCTL_CLOCK_SWM);
117 }
118 
123 STATIC INLINE void Chip_SWM_Deinit(void)
124 {
125  Chip_Clock_DisablePeriphClock(SYSCTL_CLOCK_SWM);
126 }
127 
134 void Chip_SWM_MovablePinAssign(CHIP_SWM_PIN_MOVABLE_T movable, CHIP_PINx_T assign);
135 
142 void Chip_SWM_FixedPinEnable(CHIP_SWM_PIN_FIXED_T pin, bool enable);
143 
149 bool Chip_SWM_IsEnabled(CHIP_SWM_PIN_FIXED_T pin);
150 
155 #ifdef __cplusplus
156 }
157 #endif
158 
159 #endif /* __SWM_8XX_H_ */