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gpio_13xx.h
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1 /*
2 * @brief LPC13xx GPIO driver
3 *
4 * @note
5 * Copyright(C) NXP Semiconductors, 2012
6 * All rights reserved.
7 *
8 * @par
9 * Software that is described herein is for illustrative purposes only
10 * which provides customers with programming information regarding the
11 * LPC products. This software is supplied "AS IS" without any warranties of
12 * any kind, and NXP Semiconductors and its licensor disclaim any and
13 * all warranties, express or implied, including all implied warranties of
14 * merchantability, fitness for a particular purpose and non-infringement of
15 * intellectual property rights. NXP Semiconductors assumes no responsibility
16 * or liability for the use of the software, conveys no license or rights under any
17 * patent, copyright, mask work right, or any other intellectual property rights in
18 * or to any products. NXP Semiconductors reserves the right to make changes
19 * in the software without notification. NXP Semiconductors also makes no
20 * representation or warranty that such application will be suitable for the
21 * specified use without further testing or modification.
22 *
23 * @par
24 * Permission to use, copy, modify, and distribute this software and its
25 * documentation is hereby granted, under NXP Semiconductors' and its
26 * licensor's relevant copyrights in the software, without fee, provided that it
27 * is used in conjunction with NXP Semiconductors microcontrollers. This
28 * copyright, permission, and disclaimer notice must appear in all copies of
29 * this code.
30 */
31
32 #ifndef __GPIO_13XX_H_
33 #define __GPIO_13XX_H_
34
35 #ifdef __cplusplus
36 extern "C" {
37 #endif
38
43 #if defined(CHIP_LPC1343)
44 #define LPC_GPIO_PORTn_BASE(base, port) ((LPC_GPIO_T *) (((uint32_t) base) + (port * 0x10000)))
45 #endif
46
52 void Chip_GPIO_Init(LPC_GPIO_T *pGPIO);
53
62 STATIC INLINE void Chip_GPIO_WritePortBit(LPC_GPIO_T *pGPIO, uint32_t port, uint8_t bit, bool setting)
63 {
64 #if defined(CHIP_LPC1347)
65 IP_GPIO_WritePortBit(pGPIO, port, bit, setting);
66 #else
67 IP_GPIO_WritePortBit(LPC_GPIO_PORTn_BASE(pGPIO, port), bit, setting);
68 #endif
69 }
70
79 STATIC INLINE void Chip_GPIO_WriteDirBit(LPC_GPIO_T *pGPIO, uint32_t port, uint8_t bit, bool setting)
80 {
81 #if defined(CHIP_LPC1347)
82 IP_GPIO_WriteDirBit(pGPIO, port, bit, setting);
83 #else
84 IP_GPIO_WriteDirBit(LPC_GPIO_PORTn_BASE(pGPIO, port), bit, setting);
85 #endif
86 }
87
95 STATIC INLINE bool Chip_GPIO_ReadPortBit(LPC_GPIO_T *pGPIO, uint32_t port, uint8_t bit)
96 {
97 #if defined(CHIP_LPC1347)
98 return IP_GPIO_ReadPortBit(pGPIO, port, bit);
99 #else
100 return IP_GPIO_ReadPortBit(LPC_GPIO_PORTn_BASE(pGPIO, port), bit);
101 #endif
102 }
103
111 STATIC INLINE bool Chip_GPIO_ReadDirBit(LPC_GPIO_T *pGPIO, uint32_t port, uint8_t bit)
112 {
113 #if defined(CHIP_LPC1347)
114 return IP_GPIO_ReadDirBit(pGPIO, port, bit);
115 #else
116 return IP_GPIO_ReadDirBit(LPC_GPIO_PORTn_BASE(pGPIO, port), bit);
117 #endif
118 }
119
128 STATIC INLINE void Chip_GPIO_IntCmd(LPC_GPIO_T *pGPIO, uint8_t portNum, uint8_t bitValue, IP_GPIOPININT_MODE_T mode)
129 {
130 #if defined(CHIP_LPC1347)
131 IP_GPIOPININT_IntCmd(LPC_GPIO_PIN_INT, portNum, mode);
132 #else
133 IP_GPIO_IntCmd(LPC_GPIO_PORTn_BASE(pGPIO, portNum), bitValue, mode);
134 #endif
135 }
136
145 STATIC INLINE bool Chip_GPIO_IntGetStatus(LPC_GPIO_T *pGPIO, uint8_t portNum, uint8_t pinNum, uint8_t mode)
146 {
147 #if defined(CHIP_LPC1347)
148 return IP_GPIOPININT_IntGetStatus(LPC_GPIO_PIN_INT, portNum);
149 #else
150 return IP_GPIO_IntGetStatus(LPC_GPIO_PORTn_BASE(pGPIO, portNum), pinNum);
151 #endif
152 }
153
161 STATIC INLINE void Chip_GPIO_IntClear(LPC_GPIO_T *pGPIO, uint8_t portNum, uint8_t bitValue)
162 {
163 #if defined(CHIP_LPC1347)
164 IP_GPIOPININT_IntClear(LPC_GPIO_PIN_INT, portNum);
165 #else
166 IP_GPIO_IntClear(LPC_GPIO_PORTn_BASE(pGPIO, portNum), bitValue);
167 #endif
168 }
169
170 #if defined(CHIP_LPC1347)
171
178 STATIC INLINE void Chip_GPIOGP_IntInit(IP_GPIOGROUPINT_001_T *pGPIOGPINT, uint8_t portComb, uint8_t portTrigger)
179 {
180 IP_GPIOGP_IntInit(pGPIOGPINT, portComb, portTrigger);
181 }
182
191 STATIC INLINE void Chip_GPIOGP_IntPinAdd(IP_GPIOGROUPINT_001_T *pGPIOGPINT,
192 uint8_t portNum,
193 uint8_t pinNum,
194 bool activeMode)
195 {
196 IP_GPIOGP_IntPinAdd(pGPIOGPINT, portNum, pinNum, activeMode);
197 }
198
206 STATIC INLINE void Chip_GPIOGP_IntPinRemove(IP_GPIOGROUPINT_001_T *pGPIOGPINT, uint8_t portNum, uint8_t pinNum)
207 {
208 IP_GPIOGP_IntPinRemove(pGPIOGPINT, portNum, pinNum);
209 }
210
216 STATIC INLINE bool Chip_GPIOGP_IntGetStatus(IP_GPIOGROUPINT_001_T *pGPIOGPINT)
217 {
218 return IP_GPIOGP_IntGetStatus(pGPIOGPINT);
219 }
220
226 STATIC INLINE void Chip_GPIOGP_IntClear(IP_GPIOGROUPINT_001_T *pGPIOGPINT)
227 {
228 IP_GPIOGP_IntClear(pGPIOGPINT);
229 }
230
231 #endif /* defined(CHIP_LPC1347)*/
232
241 void Chip_GPIO_SetDir(LPC_GPIO_T *pGPIO, uint8_t portNum, uint32_t bitValue, uint8_t out);
242
243 #if defined(CHIP_LPC1347)
244
253 STATIC INLINE void Chip_FIO_SetDir(LPC_GPIO_T *pGPIO, uint8_t portNum, uint32_t bitValue, uint8_t out)
254 {
255 /* Same with Chip_GPIO_SetDir() */
256 Chip_GPIO_SetDir(pGPIO, portNum, bitValue, out);
257 }
258
268 STATIC INLINE void Chip_FIO_SetValue(LPC_GPIO_T *pGPIO, uint8_t portNum, uint32_t bitValue)
269 {
270 /* Same with GPIO_SetValue() */
271 pGPIO->SET[portNum] = bitValue;
272 }
273
283 STATIC INLINE void Chip_FIO_ClearValue(LPC_GPIO_T *pGPIO, uint8_t portNum, uint32_t bitValue)
284 {
285 /* Same with GPIO_ClearValue() */
286 pGPIO->CLR[portNum] = bitValue;
287 }
288
297 STATIC INLINE uint32_t Chip_FIO_ReadValue(LPC_GPIO_T *pGPIO, uint8_t portNum)
298 {
299 /* Same with GPIO_ReadValue() */
300 return pGPIO->PIN[portNum];
301 }
302
303 #endif /*defined(CHIP_LPC1347)*/
304
314 STATIC INLINE void Chip_GPIO_SetValue(LPC_GPIO_T *pGPIO, uint8_t portNum, uint32_t bitValue)
315 {
316 #if defined(CHIP_LPC1347)
317 pGPIO->SET[portNum] = bitValue;
318 #else
319 IP_GPIO_WritePort(LPC_GPIO_PORTn_BASE(pGPIO, portNum), bitValue, bitValue);
320 #endif
321 }
322
332 STATIC INLINE void Chip_GPIO_ClearValue(LPC_GPIO_T *pGPIO, uint8_t portNum, uint32_t bitValue)
333 {
334 #if defined(CHIP_LPC1347)
335 pGPIO->CLR[portNum] = bitValue;
336 #else
337 IP_GPIO_WritePort(LPC_GPIO_PORTn_BASE(pGPIO, portNum), bitValue, ~bitValue);
338 #endif
339 }
340
349 STATIC INLINE uint32_t Chip_GPIO_ReadValue(LPC_GPIO_T *pGPIO, uint8_t portNum)
350 {
351 #if defined(CHIP_LPC1347)
352 return pGPIO->PIN[portNum];
353 #else
354 return IP_GPIO_ReadPort(LPC_GPIO_PORTn_BASE(pGPIO, portNum));
355 #endif
356 }
357
362 #ifdef __cplusplus
363 }
364 #endif
365
366 #endif /* __GPIO_13XX_H_ */