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chip_lpc43xx.h
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1 /*
2 * @brief LPC43xx basic chip inclusion file
3 *
4 * Copyright(C) NXP Semiconductors, 2012
5 * All rights reserved.
6 *
7 * Software that is described herein is for illustrative purposes only
8 * which provides customers with programming information regarding the
9 * LPC products. This software is supplied "AS IS" without any warranties of
10 * any kind, and NXP Semiconductors and its licensor disclaim any and
11 * all warranties, express or implied, including all implied warranties of
12 * merchantability, fitness for a particular purpose and non-infringement of
13 * intellectual property rights. NXP Semiconductors assumes no responsibility
14 * or liability for the use of the software, conveys no license or rights under any
15 * patent, copyright, mask work right, or any other intellectual property rights in
16 * or to any products. NXP Semiconductors reserves the right to make changes
17 * in the software without notification. NXP Semiconductors also makes no
18 * representation or warranty that such application will be suitable for the
19 * specified use without further testing or modification.
20 *
21 * Permission to use, copy, modify, and distribute this software and its
22 * documentation is hereby granted, under NXP Semiconductors' and its
23 * licensor's relevant copyrights in the software, without fee, provided that it
24 * is used in conjunction with NXP Semiconductors microcontrollers. This
25 * copyright, permission, and disclaimer notice must appear in all copies of
26 * this code.
27 */
28
29 #ifndef __CHIP_LPC43XX_H_
30 #define __CHIP_LPC43XX_H_
31
32 #include "lpc_types.h"
33 #include "sys_config.h"
34
35 #ifdef __cplusplus
36 extern "C" {
37 #endif
38
39 #if !defined(CORE_M4) && !defined(CORE_M0)
40 #error CORE_M4 or CORE_M0 is not defined for the LPC43xx architecture
41 #error CORE_M4 or CORE_M0 should be defined as part of your compiler define list
42 #endif
43
44 #ifndef CHIP_LPC43XX
45 #error The LPC43XX Chip include path is used for this build, but
46 #error CHIP_LPC43XX is not defined!
47 #endif
48
90 #include "adc_001.h"
91 #include "atimer_001.h"
92 #include "ccan_001.h"
93 #include "dac_001.h"
94 #include "emc_001.h"
95 #include "enet_001.h"
96 #include "gima_001.h"
97 #include "gpdma_001.h"
98 #include "gpiogrpint_001.h"
99 #include "gpiopinint_001.h"
100 #include "gpio_001.h"
101 #include "i2c_001.h"
102 #include "i2s_001.h"
103 #include "lcd_001.h"
104 #include "mcpwm_001.h"
105 #include "pmc_001.h"
106 #include "qei_001.h"
107 #include "regfile_001.h"
108 #include "ritimer_001.h"
109 #include "rtc_001.h"
110 #include "sct_001.h"
111 #include "sdmmc_001.h"
112 #include "sgpio_001.h"
113 #include "spi_001.h"
114 #include "ssp_001.h"
115 #include "timer_001.h"
116 #include "usart_001.h"
117 #include "usbhs_001.h"
118 #include "wwdt_001.h"
119 #include "rgu_18xx_43xx.h"
120 #include "cguccu_18xx_43xx.h"
121 #include "eeprom_002.h"
122
128 #define LPC_SCT_BASE 0x40000000
129 #define LPC_GPDMA_BASE 0x40002000
130 #define LPC_SDMMC_BASE 0x40004000
131 #define LPC_EMC_BASE 0x40005000
132 #define LPC_USB0_BASE 0x40006000
133 #define LPC_USB1_BASE 0x40007000
134 #define LPC_LCD_BASE 0x40008000
135 #define LPC_ETHERNET_BASE 0x40010000
136 #define LPC_ATIMER_BASE 0x40040000
137 #define LPC_REGFILE_BASE 0x40041000
138 #define LPC_PMC_BASE 0x40042000
139 #define LPC_CREG_BASE 0x40043000
140 #define LPC_EVRT_BASE 0x40044000
141 #define LPC_RTC_BASE 0x40046000
142 #define LPC_CGU_BASE 0x40050000
143 #define LPC_CCU1_BASE 0x40051000
144 #define LPC_CCU2_BASE 0x40052000
145 #define LPC_RGU_BASE 0x40053000
146 #define LPC_WWDT_BASE 0x40080000
147 #define LPC_USART0_BASE 0x40081000
148 #define LPC_USART2_BASE 0x400C1000
149 #define LPC_USART3_BASE 0x400C2000
150 #define LPC_UART1_BASE 0x40082000
151 #define LPC_SSP0_BASE 0x40083000
152 #define LPC_SSP1_BASE 0x400C5000
153 #define LPC_TIMER0_BASE 0x40084000
154 #define LPC_TIMER1_BASE 0x40085000
155 #define LPC_TIMER2_BASE 0x400C3000
156 #define LPC_TIMER3_BASE 0x400C4000
157 #define LPC_SCU_BASE 0x40086000
158 #define LPC_GPIO_PIN_INT_BASE 0x40087000
159 #define LPC_GPIO_GROUP_INT0_BASE 0x40088000
160 #define LPC_GPIO_GROUP_INT1_BASE 0x40089000
161 #define LPC_MCPWM_BASE 0x400A0000
162 #define LPC_I2C0_BASE 0x400A1000
163 #define LPC_I2C1_BASE 0x400E0000
164 #define LPC_I2S0_BASE 0x400A2000
165 #define LPC_I2S1_BASE 0x400A3000
166 #define LPC_C_CAN1_BASE 0x400A4000
167 #define LPC_RITIMER_BASE 0x400C0000
168 #define LPC_QEI_BASE 0x400C6000
169 #define LPC_GIMA_BASE 0x400C7000
170 #define LPC_DAC_BASE 0x400E1000
171 #define LPC_C_CAN0_BASE 0x400E2000
172 #define LPC_ADC0_BASE 0x400E3000
173 #define LPC_ADC1_BASE 0x400E4000
174 #define LPC_GPIO_PORT_BASE 0x400F4000
175 #define LPC_SPI_BASE 0x40100000
176 #define LPC_SGPIO_BASE 0x40101000
177 #define LPC_EEPROM_BASE 0x4000E000
178
179 /* Normalize types */
180 typedef IP_SCT_001_T LPC_SCT_T;
181 typedef IP_GPDMA_001_T LPC_GPDMA_T;
182 typedef IP_SDMMC_001_T LPC_SDMMC_T;
183 typedef IP_EMC_001_T LPC_EMC_T;
184 typedef IP_USBHS_001_T LPC_USBHS_T;
185 typedef IP_ENET_001_T LPC_ENET_T;
186 typedef IP_ATIMER_001_T LPC_ATIMER_T;
187 typedef IP_REGFILE_001_T LPC_REGFILE_T;
188 typedef IP_PMC_001_T LPC_PMC_T;
189 typedef IP_RTC_001_T LPC_RTC_T;
190 typedef IP_WWDT_001_T LPC_WWDT_T;
191 typedef IP_USART_001_T LPC_USART_T;
192 typedef IP_SSP_001_T LPC_SSP_T;
193 typedef IP_TIMER_001_T LPC_TIMER_T;
194 typedef IP_GPIOPININT_001_T LPC_GPIOPININT_T;
195 typedef IP_MCPWM_001_T LPC_MCPWM_T;
196 typedef IP_I2C_001_T LPC_I2C_T;
197 typedef IP_I2S_001_T LPC_I2S_T;
198 typedef IP_CCAN_001_T LPC_CCAN_T;
199 typedef IP_RITIMER_001_T LPC_RITIMER_T;
200 typedef IP_QEI_001_T LPC_QEI_T;
201 typedef IP_GIMA_001_T LPC_GIMA_T;
202 typedef IP_DAC_001_T LPC_DAC_T;
203 typedef IP_ADC_001_T LPC_ADC_T;
204 typedef IP_GPIO_001_T LPC_GPIO_T;
205 typedef IP_SPI_001_T LPC_SPI_T;
206 typedef IP_SGPIO_001_T LPC_SGPIO_T;
207 typedef IP_LCD_001_T LPC_LCD_T;
208 typedef IP_EEPROM_002_T LPC_EEPROM_T;
209
210 #define LPC_SCT ((IP_SCT_001_T *) LPC_SCT_BASE)
211 #define LPC_GPDMA ((IP_GPDMA_001_T *) LPC_GPDMA_BASE)
212 #define LPC_SDMMC ((IP_SDMMC_001_T *) LPC_SDMMC_BASE)
213 #define LPC_EMC ((IP_EMC_001_T *) LPC_EMC_BASE)
214 #define LPC_USB0 ((IP_USBHS_001_T *) LPC_USB0_BASE)
215 #define LPC_USB1 ((IP_USBHS_001_T *) LPC_USB1_BASE)
216 #define LPC_LCD ((IP_LCD_001_T *) LPC_LCD_BASE)
217 #define LPC_ETHERNET ((IP_ENET_001_T *) LPC_ETHERNET_BASE)
218 #define LPC_ATIMER ((IP_ATIMER_001_T *) LPC_ATIMER_BASE)
219 #define LPC_REGFILE ((IP_REGFILE_001_T *) LPC_REGFILE_BASE)
220 #define LPC_PMC ((IP_PMC_001_T *) LPC_PMC_BASE)
221 #define LPC_EVRT ((LPC_EVRT_T *) LPC_EVRT_BASE)
222 #define LPC_RTC ((IP_RTC_001_T *) LPC_RTC_BASE)
223 #define LPC_CGU ((LPC_CGU_T *) LPC_CGU_BASE)
224 #define LPC_CCU1 ((LPC_CCU1_T *) LPC_CCU1_BASE)
225 #define LPC_CCU2 ((LPC_CCU2_T *) LPC_CCU2_BASE)
226 #define LPC_CREG ((LPC_CREG_T *) LPC_CREG_BASE)
227 #define LPC_RGU ((LPC_RGU_T *) LPC_RGU_BASE)
228 #define LPC_WWDT ((IP_WWDT_001_T *) LPC_WWDT_BASE)
229 #define LPC_USART0 ((IP_USART_001_T *) LPC_USART0_BASE)
230 #define LPC_USART2 ((IP_USART_001_T *) LPC_USART2_BASE)
231 #define LPC_USART3 ((IP_USART_001_T *) LPC_USART3_BASE)
232 #define LPC_UART1 ((IP_USART_001_T *) LPC_UART1_BASE)
233 #define LPC_SSP0 ((IP_SSP_001_T *) LPC_SSP0_BASE)
234 #define LPC_SSP1 ((IP_SSP_001_T *) LPC_SSP1_BASE)
235 #define LPC_TIMER0 ((IP_TIMER_001_T *) LPC_TIMER0_BASE)
236 #define LPC_TIMER1 ((IP_TIMER_001_T *) LPC_TIMER1_BASE)
237 #define LPC_TIMER2 ((IP_TIMER_001_T *) LPC_TIMER2_BASE)
238 #define LPC_TIMER3 ((IP_TIMER_001_T *) LPC_TIMER3_BASE)
239 #define LPC_SCU ((LPC_SCU_T *) LPC_SCU_BASE)
240 #define LPC_GPIO_PIN_INT ((IP_GPIOPININT_001_T *) LPC_GPIO_PIN_INT_BASE)
241 #define LPC_GPIO_GROUP_INT0 ((IP_GPIOGROUPINT_001_T *) LPC_GPIO_GROUP_INT0_BASE)
242 #define LPC_GPIO_GROUP_INT1 ((IP_GPIOGROUPINT_001_T *) LPC_GPIO_GROUP_INT1_BASE)
243 #define LPC_MCPWM ((IP_MCPWM_001_T *) LPC_MCPWM_BASE)
244 #define LPC_I2C0 ((IP_I2C_001_T *) LPC_I2C0_BASE)
245 #define LPC_I2C1 ((IP_I2C_001_T *) LPC_I2C1_BASE)
246 #define LPC_I2S0 ((IP_I2S_001_T *) LPC_I2S0_BASE)
247 #define LPC_I2S1 ((IP_I2S_001_T *) LPC_I2S1_BASE)
248 #define LPC_C_CAN1 ((IP_CCAN_001_T *) LPC_C_CAN1_BASE)
249 #define LPC_RITIMER ((IP_RITIMER_001_T *) LPC_RITIMER_BASE)
250 #define LPC_QEI ((IP_QEI_001_T *) LPC_QEI_BASE)
251 #define LPC_GIMA ((IP_GIMA_001_T *) LPC_GIMA_BASE)
252 #define LPC_DAC ((IP_DAC_001_T *) LPC_DAC_BASE)
253 #define LPC_C_CAN0 ((IP_CCAN_001_T *) LPC_C_CAN0_BASE)
254 #define LPC_ADC0 ((IP_ADC_001_T *) LPC_ADC0_BASE)
255 #define LPC_ADC1 ((IP_ADC_001_T *) LPC_ADC1_BASE)
256 #define LPC_GPIO_PORT ((IP_GPIO_001_T *) LPC_GPIO_PORT_BASE)
257 #define LPC_SPI ((IP_SPI_001_T *) LPC_SPI_BASE)
258 #define LPC_SGPIO ((IP_SGPIO_001_T *) LPC_SGPIO_BASE)
259 #define LPC_EEPROM ((IP_EEPROM_002_T *) LPC_EEPROM_BASE)
260
264 #include "clock_18xx_43xx.h"
265 #include "gpio_18xx_43xx.h"
266 #include "scu_18xx_43xx.h"
267 #include "sct_18xx_43xx.h"
268 #include "uart_18xx_43xx.h"
269 #include "gpdma_18xx_43xx.h"
270 #include "enet_18xx_43xx.h"
271 #include "rgu_18xx_43xx.h"
272 #include "i2c_18xx_43xx.h"
273 #include "i2s_18xx_43xx.h"
274 #include "ssp_18xx_43xx.h"
275 #include "rtc_18xx_43xx.h"
276 #include "evrt_18xx_43xx.h"
277 #include "atimer_18xx_43xx.h"
278 #include "wwdt_18xx_43xx.h"
279 #include "ritimer_18xx_43xx.h"
280 #include "emc_18xx_43xx.h"
281 #include "lcd_18xx_43xx.h"
282 #include "adc_18xx_43xx.h"
283 #include "dac_18xx_43xx.h"
284 #include "timer_18xx_43xx.h"
285 #include "sdif_18xx_43xx.h"
286 #include "sdmmc_18xx_43xx.h"
287 #include "fpu_init.h"
288 #include "creg_18xx_43xx.h"
289 #include "ccan_18xx_43xx.h"
290 #include "pmc_18xx_43xx.h"
291 #include "otp_18xx_43xx.h"
292 #include "aes_18xx_43xx.h"
293 #include "eeprom_18xx_43xx.h"
294
295 #ifdef __cplusplus
296 }
297 #endif
298
299 #endif /* __CHIP_LPC43XX_H_ */