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Data Structures | Macros | Enumerations | Functions
can_001.h File Reference
`#include "sys_config.h"`
`#include "cmsis.h"`

Go to the source code of this file.

## Data Structures
struct | IP_CAN_001_AF_RAM_T
| CAN acceptance filter RAM register block structure. More...
struct | IP_CAN_001_AF_T
| CAN acceptance filter register block structure. More...
struct | IP_CAN_001_CR_T
| Central CAN register block structure. More...
struct | IP_CAN_001_TX_T
| CAN Transmit register block structure. More...
struct | IP_CAN_001_RX_T
| CAN Receive register block structure. More...
struct | IP_CAN_001_T
| CAN register block structure. More...
struct | IP_CAN_MSG_T
| CAN Message Object Structure. More...
struct | IP_CAN_BUS_TIMING_T
| CAN Bus Timing Structure. More...
struct | IP_CAN_STD_ID_Entry_T
| Standard ID Entry structure. More...
struct | IP_CAN_STD_ID_RANGE_Entry_T
| Standard ID Range structure. More...
struct | IP_CAN_EXT_ID_Entry_T
| Extended ID Entry structure. More...
struct | IP_CAN_EXT_ID_RANGE_Entry_T
| Extended ID Range structure. More...
struct | IP_CAN_AF_LUT_T
| Acceptance Filter Section Table structure. More...

## Macros
#define | CANAF_RAM_ENTRY_NUM 512
#define | CAN_MOD_BITMASK (0xBF)
| CAN Mode register definitions.
#define | CAN_MOD_OPERATION ((uint32_t) 0)
#define | CAN_MOD_RM ((uint32_t) (1 << 0))
#define | CAN_MOD_LOM ((uint32_t) (1 << 1))
#define | CAN_MOD_STM ((uint32_t) (1 << 2))
#define | CAN_MOD_TPM ((uint32_t) (1 << 3))
#define | CAN_MOD_SM ((uint32_t) (1 << 4))
#define | CAN_MOD_RPM ((uint32_t) (1 << 5))
#define | CAN_MOD_TM ((uint32_t) (1 << 7))
#define | CAN_CMR_BITMASK (0xFF)
| CAN Command register definitions.
#define | CAN_CMR_TR ((uint32_t) (1))
#define | CAN_CMR_AT ((uint32_t) (1 << 1))
#define | CAN_CMR_RRB ((uint32_t) (1 << 2))
#define | CAN_CMR_CDO ((uint32_t) (1 << 3))
#define | CAN_CMR_SRR ((uint32_t) (1 << 4))
#define | CAN_CMR_STB(n) ((uint32_t) (1 << (n + 5)))
#define | CAN_GSR_BITMASK (0xFFFF00FF)
| CAN Global Status register definitions.
#define | CAN_GSR_RBS ((uint32_t) (1))
#define | CAN_GSR_DOS ((uint32_t) (1 << 1))
#define | CAN_GSR_TBS ((uint32_t) (1 << 2))
#define | CAN_GSR_TCS ((uint32_t) (1 << 3))
#define | CAN_GSR_RS ((uint32_t) (1 << 4))
#define | CAN_GSR_TS ((uint32_t) (1 << 5))
#define | CAN_GSR_ES ((uint32_t) (1 << 6))
#define | CAN_GSR_BS ((uint32_t) (1 << 7))
#define | CAN_GSR_RXERR(n) ((uint32_t) ((n >> 16) & 0xFF)
#define | CAN_GSR_TXERR(n) ((uint32_t) ((n >> 24) & 0xFF)
#define | CAN_ICR_BITMASK (0xFFFF07FF)
| CAN Interrupt and Capture register definitions.
#define | CAN_ICR_RI ((uint32_t) (1))
#define | CAN_ICR_TI1 ((uint32_t) (1 << 1))
#define | CAN_ICR_EI ((uint32_t) (1 << 2))
#define | CAN_ICR_DOI ((uint32_t) (1 << 3))
#define | CAN_ICR_WUI ((uint32_t) (1 << 4))
#define | CAN_ICR_EPI ((uint32_t) (1 << 5))
#define | CAN_ICR_ALI ((uint32_t) (1 << 6))
#define | CAN_ICR_BEI ((uint32_t) (1 << 7))
#define | CAN_ICR_IDI ((uint32_t) (1 << 8))
#define | CAN_ICR_TI2 ((uint32_t) (1 << 9))
#define | CAN_ICR_TI3 ((uint32_t) (1 << 10))
#define | CAN_ICR_ERRBIT_VAL(n) ((uint32_t) (((n) >> 16) & 0x1F))
#define | CAN_ICR_ERR_SOF (3)
#define | CAN_ICR_ERR_ID28_ID21 (2)
#define | CAN_ICR_ERR_ID20_ID18 (6)
#define | CAN_ICR_ERR_SRTR (4)
#define | CAN_ICR_ERR_IDE (5)
#define | CAN_ICR_ERR_ID17_ID13 (7)
#define | CAN_ICR_ERR_ID12_ID5 (0x0F)
#define | CAN_ICR_ERR_ID4_ID0 (0x0E)
#define | CAN_ICR_ERR_RTR (0x0C)
#define | CAN_ICR_ERR_ReservedBit_1 (0x0D)
#define | CAN_ICR_ERR_ReservedBit_0 (0x09)
#define | CAN_ICR_ERR_DLC (0x0B)
#define | CAN_ICR_ERR_DATA_FIELD (0x0A)
#define | CAN_ICR_ERR_CRC_SEQ (0x08)
#define | CAN_ICR_ERR_CRC_DELIMITER (0x18)
#define | CAN_ICR_ERR_ACK (0x19)
#define | CAN_ICR_ERR_ACK_DELIMITER (0x1B)
#define | CAN_ICR_ERR_EOF (0x1A)
#define | CAN_ICR_ERR_INTERMISSION (0x12)
#define | CAN_ICR_ERRDIR_RECEIVE ((uint32_t) (1 << 21))
#define | CAN_ICR_ERRC_VAL(n) ((uint32_t) (((n) >> 22) & 0x3))
#define | CAN_ICR_BIT_ERROR (0)
#define | CAN_ICR_FORM_ERROR (1)
#define | CAN_ICR_STUFF_ERROR (2)
#define | CAN_ICR_OTHER_ERROR (3)
#define | CAN_ICR_ALCBIT_VAL(n) ((uint32_t) (((n) >> 24) & 0xFF))
#define | CAN_IER_BITMASK (0x7FF)
| CAN Interrupt Enable register definitions.
#define | CAN_IER_RIE ((uint32_t) (1))
#define | CAN_IER_TIE1 ((uint32_t) (1 << 1))
#define | CAN_IER_EIE ((uint32_t) (1 << 2))
#define | CAN_IER_DOIE ((uint32_t) (1 << 3))
#define | CAN_IER_WUIE ((uint32_t) (1 << 4))
#define | CAN_IER_EPIE ((uint32_t) (1 << 5))
#define | CAN_IER_ALIE ((uint32_t) (1 << 6))
#define | CAN_IER_BEIE ((uint32_t) (1 << 7))
#define | CAN_IER_IDIE ((uint32_t) (1 << 8))
#define | CAN_IER_TIE2 ((uint32_t) (1 << 9))
#define | CAN_IER_TIE3 ((uint32_t) (1 << 10))
#define | CAN_BTR_BITMASK (0xFFC3FF)
| CAN Bus Timing register definitions.
#define | CAN_BTR_BRP(n) ((uint32_t) ((n) & 0x3FF))
#define | CAN_BTR_SJW(n) ((uint32_t) (((n) & 0x3) << 14))
#define | CAN_BTR_TESG1(n) ((uint32_t) (((n) & 0xF) << 16))
#define | CAN_BTR_TESG2(n) ((uint32_t) (((n) & 0xF) << 20))
#define | CAN_BTR_SAM ((uint32_t) (1 << 23))
#define | CAN_EWL_BITMASK (0xFF)
| CAN Error Warning Limit register definitions.
#define | CAN_EWL_VAL(n) ((uint32_t) ((n) & 0xFF))
#define | CAN_SR_BITMASK (0xFFFFFF)
| CAN Status Registe definitions.
#define | CAN_SR_RBS(n) ((uint32_t) (1 << ((n) * 8)))
#define | CAN_SR_DOS(n) ((uint32_t) (1 << (1 + (n) * 8)))
#define | CAN_SR_TBS(n) ((uint32_t) (1 << (2 + (n) * 8)))
#define | CAN_SR_TCS(n) ((uint32_t) (1 << (3 + (n) * 8)))
#define | CAN_SR_RS(n) ((uint32_t) (1 << (4 + (n) * 8)))
#define | CAN_SR_TS(n) ((uint32_t) (1 << (5 + (n) * 8)))
#define | CAN_SR_ES(n) ((uint32_t) (1 << (6 + (n) * 8)))
#define | CAN_SR_BS(n) ((uint32_t) (1 << (7 + (n) * 8)))
#define | CAN_RFS_BITMASK (0xC00F07FF)
| CAN Receive Frame Status register definitions.
#define | CAN_RFS_ID_INDEX(n) ((uint32_t) ((n) & 0x3FF))
#define | CAN_RFS_BP ((uint32_t) (1 << 10))
#define | CAN_RFS_DLC(n) ((uint32_t) ((n >> 16) & 0x0F))
#define | CAN_RFS_RTR ((uint32_t) (1 << 30))
#define | CAN_RFS_FF ((uint32_t) ((uint32_t) 1 << 31))
#define | CAN_RID_ID_11(n) ((uint32_t) ((n) & 0x7FF))
| CAN Receive Identifier Register definitions.
#define | CAN_RID_ID_29(n) ((uint32_t) ((n) & 0x1FFFFFFF))
#define | CAN_TFI_BITMASK (0xC00F00FF)
| CAN Transmit Frame Information register definitions.
#define | CAN_TFI_PRIO(n) ((uint32_t) ((n) & 0xFF))
#define | CAN_TFI_DLC(n) ((uint32_t) (((n) & 0xF) << 16))
#define | CAN_TFI_RTR ((uint32_t) (1 << 30))
#define | CAN_TFI_FF ((uint32_t) ((uint32_t) 1 << 31))
#define | CAN_TID_ID11(n) ((uint32_t) ((n) & 0x7FF))
| CAN Transfer Identifier register definitions.
#define | CAN_TID_ID29(n) ((uint32_t) ((n) & 0x1FFFFFFF))
#define | CAN_TSR_BITMASK (0x30303)
| CAN Central transmit Status register definitions.
#define | CAN_TSR_TS(n) ((uint32_t) (1 << (n + 0)))
#define | CAN_TSR_TBS(n) ((uint32_t) (1 << (n + 8)))
#define | CAN_TSR_TCS(n) ((uint32_t) (1 << (n + 16)))
#define | CAN_RSR_BITMASK (0x30303)
| CAN Central Receive Status register definitions.
#define | CAN_RSR_RS(n) ((uint32_t) (1 << (n + 0)))
#define | CAN_RSR_RBS(n) ((uint32_t) (1 << (n + 8)))
#define | CAN_RSR_DOS(n) ((uint32_t) (1 << (n + 16)))
#define | CAN_MSR_BITMASK (0x303)
| CAN Central Miscellaneous Status register definitions.
#define | CAN_MSR_E(n) ((uint32_t) (1 << (n + 0)))
#define | CAN_MSR_BS(n) ((uint32_t) (1 << (n + 8)))
#define | CANAF_AFMR_OPERATION ((uint32_t) (0))
| Acceptance Filter Mode register definitions.
#define | CANAF_AFMR_ACCOFF ((uint32_t) (1))
#define | CANAF_AFMR_ACCBP ((uint32_t) (1 << 1))
#define | CANAF_AFMR_EFCAN ((uint32_t) (1 << 2))
#define | CANAF_ENDADDR(n) ((uint32_t) (((n) & 0x3FF) << 2))
| Extended Frame Group Start Address register definitions.
#define | CANAF_ENDADDR_VAL(n) ((uint32_t) ((n >> 2) & 0x3FF))
#define | CANAF_LUTERRAD(n) ((uint32_t) (((n) & 0x1FF) << 2))
| LUT Error Address register definitions.
#define | CANAF_LUTERR ((uint32_t) (1))
| LUT Error register definitions.
#define | CANAF_FCANIE_BITMASK (0x01)
| Global FullCANInterrupt Enable register definitions.
#define | CANAF_FCANIE ((uint32_t) (1))
#define | CANAF_FULLCAN_MSG_FF_POS (31)
| FullCAN Message Layout definitions.
#define | CANAF_FULLCAN_MSG_RTR_POS (30)
#define | CANAF_FULLCAN_MSG_LOST_POS (26)
#define | CANAF_FULLCAN_MSG_SEM_POS (24)
#define | CANAF_FULLCAN_MSG_SEM_BITMASK (0x03)
#define | CANAF_FULLCAN_MSG_DLC_POS (16)
#define | CANAF_FULLCAN_MSG_DLC_BITMASK (0x0F)
#define | CANAF_FULLCAN_MSG_SCC_POS (13)
#define | CANAF_FULLCAN_MSG_SCC_BITMASK (0x07)
#define | CANAF_FULLCAN_MSG_ID11_POS (0)
#define | CANAF_FULLCAN_MSG_ID11_BITMASK (0x7FF)
#define | CANAF_FULCAN_MSG_AF_UPDATING (0x01)
| FullCAN Message Status.
#define | CANAF_FULCAN_MSG_AF_FINISHED (0x03)
#define | CANAF_FULCAN_MSG_CPU_READING (0x0)
#define | CANAF_FCAN_IC_INTPND(n) ((n >= 32) ? ((uint32_t) (1 << (n - 32))) : ((uint32_t) (1 << n)))
| FullCAN Interrupt and Capture register definitions.
#define | CAN_STD_ENTRY_CTRL_NO_POS (13 )
| Standard ID Entry definitions.
#define | CAN_STD_ENTRY_CTRL_NO_MASK (0x07)
#define | CAN_STD_ENTRY_DISABLE_POS (12 )
#define | CAN_STD_ENTRY_DISABLE_MASK (0x01)
#define | CAN_STD_ENTRY_IE_POS (11 )
#define | CAN_STD_ENTRY_IE_MASK (0x01)
#define | CAN_STD_ENTRY_ID_POS (0 )
#define | CAN_STD_ENTRY_ID_MASK (0x7FF)
#define | CAN_EXT_ENTRY_CTRL_NO_POS (29 )
| Extended ID Entry definitions.
#define | CAN_EXT_ENTRY_CTRL_NO_MASK (0x07)
#define | CAN_EXT_ENTRY_ID_POS (0 )
#define | CAN_EXT_ENTRY_ID_MASK (0x1FFFFFFF)
#define | CAN_REMOTE_MSG ((uint32_t) (1 << 0))
| CAN Message Type definitions.
#define | CAN_EXTEND_ID_USAGE ((uint32_t) (1 << 30))
#define | CAN_MSG_MAX_DATA_LEN (8)

## Enumerations
enum | IP_CAN_AF_RAM_SECTION_T { CANAF_RAM_FULLCAN_SEC, CANAF_RAM_SFF_SEC, CANAF_RAM_SFF_GRP_SEC, CANAF_RAM_EFF_SEC, CANAF_RAM_EFF_GRP_SEC, CANAF_RAM_SECTION_NUM }
| CAN AF RAM section definitions. More...
enum | IP_CAN_BUFFER_ID_T { CAN_BUFFER_1 = 0, CAN_BUFFER_2, CAN_BUFFER_3, CAN_BUFFER_LAST }
| CAN Buffer ID definition. More...

## Functions
STATIC INLINE void | IP_CAN_DeInit (IP_CAN_001_T *pCAN)
| De-initialize the CAN peripheral.
STATIC INLINE uint32_t | IP_CAN_GetMode (IP_CAN_001_T *pCAN)
| Get current mode register settings of the CAN controller.
STATIC INLINE void | IP_CAN_SetCmd (IP_CAN_001_T *pCAN, uint32_t command)
| Set the CAN command request.
STATIC INLINE void | IP_CAN_SetEWL (IP_CAN_001_T *pCAN, uint32_t ewl)
| Set Error Warning Limit for the CAN Controller.
STATIC INLINE uint8_t | IP_CAN_GetEWL (IP_CAN_001_T *pCAN)
| Get Error Warning Limit of the CAN Controller.
STATIC INLINE uint32_t | IP_CAN_GetGlobalStatus (IP_CAN_001_T *pCAN)
| Get global status register contents of the CAN Controller.
STATIC INLINE uint32_t | IP_CAN_GetStatus (IP_CAN_001_T *pCAN)
| Get the status of the CAN Controller.
STATIC INLINE void | IP_CAN_IntEnable (IP_CAN_001_T *pCAN, uint32_t IntMask)
| Enable the given interrupt of the CAN Controller.
STATIC INLINE void | IP_CAN_IntDisable (IP_CAN_001_T *pCAN, uint32_t IntMask)
| Disable the given interrupt of the CAN Controller.
STATIC INLINE uint32_t | IP_CAN_GetIntStatus (IP_CAN_001_T *pCAN)
| Get the interrupt status of the CAN Controller.
STATIC INLINE void | IP_CAN_AF_SetMode (IP_CAN_001_AF_T *pCanAF, uint32_t AFMode)
| Set CAN AF Mode.
STATIC INLINE uint32_t | IP_CAN_AF_GetMode (IP_CAN_001_AF_T *pCanAF)
| Get CAN AF Mode.
void | IP_CAN_Init (IP_CAN_001_T *pCAN)
| Initialize the CAN peripheral.
void | IP_CAN_SetMode (IP_CAN_001_T *pCAN, uint32_t Mode, FunctionalState NewState)
| Enable/Disable the specified mode in CAN controller.
void | IP_CAN_SetBusTiming (IP_CAN_001_T *pCAN, IP_CAN_BUS_TIMING_T *pBusTiming)
| Set Bus Timing for the CAN Controller.
Status | IP_CAN_Receive (IP_CAN_001_T *pCAN, IP_CAN_MSG_T *pMsg)
| Get message received by the CAN Controller.
Status | IP_CAN_Send (IP_CAN_001_T *pCAN, IP_CAN_BUFFER_ID_T TxBufID, IP_CAN_MSG_T *pMsg)
| Request the CAN Controller to send message.
void | IP_CAN_AF_Init (IP_CAN_001_AF_T *pCanAF, IP_CAN_001_AF_RAM_T *pCanAFRam)
| Initialize CAN Acceptance Filter.
void | IP_CAN_FullCANIntConfig (IP_CAN_001_AF_T *pCanAF, FunctionalState NewState)
| Enable/Disable the interrupts of the CAN Controller in FullCAN Mode.
uint32_t | IP_CAN_GetFullCANIntStatus (IP_CAN_001_AF_T *pCanAF, uint8_t ObjID)
| Get FullCAN interrupt status of the object.
Status | IP_CAN_FullCANReceive (IP_CAN_001_AF_T *pCanAF, IP_CAN_001_AF_RAM_T *pCanAFRam, uint8_t ObjID, IP_CAN_MSG_T *pMsg, uint8_t *pSCC)
| Get FULLCANmessage automatically received by the AF.
void | IP_CAN_ClearAFLUT (IP_CAN_001_AF_T *pCanAF, IP_CAN_001_AF_RAM_T *pCanAFRam)
| Clear CAN AF LUT.
Status | IP_CAN_SetAFLUT (IP_CAN_001_AF_T *pCanAF, IP_CAN_001_AF_RAM_T *pCanAFRam, IP_CAN_AF_LUT_T *pAFSections)
| Set CAN AF LUT.
Status | IP_CAN_InsertFullCANEntry (IP_CAN_001_AF_T *pCanAF, IP_CAN_001_AF_RAM_T *pCanAFRam, IP_CAN_STD_ID_Entry_T *pEntry)
| Insert a FullCAN Entry into the current LUT.
Status | IP_CAN_InsertIndividualSTDEntry (IP_CAN_001_AF_T *pCanAF, IP_CAN_001_AF_RAM_T *pCanAFRam, IP_CAN_STD_ID_Entry_T *pEntry)
| Insert an individual Standard Entry into the current LUT.
Status | IP_CAN_InsertGroupSTDEntry (IP_CAN_001_AF_T *pCanAF, IP_CAN_001_AF_RAM_T *pCanAFRam, IP_CAN_STD_ID_RANGE_Entry_T *pEntry)
| Insert an Group Standard Entry into the current LUT.
Status | IP_CAN_InsertIndividualEXTEntry (IP_CAN_001_AF_T *pCanAF, IP_CAN_001_AF_RAM_T *pCanAFRam, IP_CAN_EXT_ID_Entry_T *pEntry)
| Insert an individual Extended Entry into the current LUT.
Status | IP_CAN_InsertGroupEXTEntry (IP_CAN_001_AF_T *pCanAF, IP_CAN_001_AF_RAM_T *pCanAFRam, IP_CAN_EXT_ID_RANGE_Entry_T *pEntry)
| Insert an Group Extended Entry into the current LUT.
Status | IP_CAN_RemoveFullCANEntry (IP_CAN_001_AF_T *pCanAF, IP_CAN_001_AF_RAM_T *pCanAFRam, int16_t Position)
| Remove a FullCAN Entry from the current LUT.
Status | IP_CAN_RemoveIndividualSTDEntry (IP_CAN_001_AF_T *pCanAF, IP_CAN_001_AF_RAM_T *pCanAFRam, int16_t Position)
| Remove an individual Standard Entry from the current LUT.
Status | IP_CAN_RemoveGroupSTDEntry (IP_CAN_001_AF_T *pCanAF, IP_CAN_001_AF_RAM_T *pCanAFRam, int16_t Position)
| Remove an Group Standard Entry from the current LUT.
Status | IP_CAN_RemoveIndividualEXTEntry (IP_CAN_001_AF_T *pCanAF, IP_CAN_001_AF_RAM_T *pCanAFRam, int16_t Position)
| Remove an individual Extended Entry from the current LUT.
Status | IP_CAN_RemoveGroupEXTEntry (IP_CAN_001_AF_T *pCanAF, IP_CAN_001_AF_RAM_T *pCanAFRam, int16_t Position)
| Remove an Group Extended Entry from the current LUT.
uint16_t | IP_CAN_GetEntriesNum (IP_CAN_001_AF_T *pCanAF, IP_CAN_001_AF_RAM_T *pCanAFRam, IP_CAN_AF_RAM_SECTION_T SectionID)
| Get the number of entries of the given section.
Status | IP_CAN_ReadFullCANEntry (IP_CAN_001_AF_T *pCanAF, IP_CAN_001_AF_RAM_T *pCanAFRam, uint16_t Position, IP_CAN_STD_ID_Entry_T *pEntry)
| Read a FullCAN Entry into from current LUT.
Status | IP_CAN_ReadIndividualSTDEntry (IP_CAN_001_AF_T *pCanAF, IP_CAN_001_AF_RAM_T *pCanAFRam, uint16_t Position, IP_CAN_STD_ID_Entry_T *pEntry)
| Read an individual Standard Entry from the current LUT.
Status | IP_CAN_ReadGroupSTDEntry (IP_CAN_001_AF_T *pCanAF, IP_CAN_001_AF_RAM_T *pCanAFRam, uint16_t Position, IP_CAN_STD_ID_RANGE_Entry_T *pEntry)
| Read an Group Standard Entry from the current LUT.
Status | IP_CAN_ReadIndividualEXTEntry (IP_CAN_001_AF_T *pCanAF, IP_CAN_001_AF_RAM_T *pCanAFRam, uint16_t Position, IP_CAN_EXT_ID_Entry_T *pEntry)
| Read an individual Extended Entry from the current LUT.
Status | IP_CAN_ReadGroupEXTEntry (IP_CAN_001_AF_T *pCanAF, IP_CAN_001_AF_RAM_T *pCanAFRam, uint16_t Position, IP_CAN_EXT_ID_RANGE_Entry_T *pEntry)
| Read an Group Extended Entry from the current LUT.