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iocon_11xx.h
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1 /*
2 * @brief IOCON registers and control functions
3 *
4 * @note
5 * Copyright(C) NXP Semiconductors, 2012
6 * All rights reserved.
7 *
8 * @par
9 * Software that is described herein is for illustrative purposes only
10 * which provides customers with programming information regarding the
11 * LPC products. This software is supplied "AS IS" without any warranties of
12 * any kind, and NXP Semiconductors and its licensor disclaim any and
13 * all warranties, express or implied, including all implied warranties of
14 * merchantability, fitness for a particular purpose and non-infringement of
15 * intellectual property rights. NXP Semiconductors assumes no responsibility
16 * or liability for the use of the software, conveys no license or rights under any
17 * patent, copyright, mask work right, or any other intellectual property rights in
18 * or to any products. NXP Semiconductors reserves the right to make changes
19 * in the software without notification. NXP Semiconductors also makes no
20 * representation or warranty that such application will be suitable for the
21 * specified use without further testing or modification.
22 *
23 * @par
24 * Permission to use, copy, modify, and distribute this software and its
25 * documentation is hereby granted, under NXP Semiconductors' and its
26 * licensor's relevant copyrights in the software, without fee, provided that it
27 * is used in conjunction with NXP Semiconductors microcontrollers. This
28 * copyright, permission, and disclaimer notice must appear in all copies of
29 * this code.
30 */
31
32 #ifndef __IOCON_11XX_H_
33 #define __IOCON_11XX_H_
34
35 #ifdef __cplusplus
36 extern "C" {
37 #endif
38
47 #if defined(CHIP_LPC11UXX) || defined(CHIP_LPC11EXX) || defined(CHIP_LPC11AXX)
48 typedef struct {
49 __IO uint32_t PIO0[24];
50 __IO uint32_t PIO1[32];
51 } LPC_IOCON_T;
52
53 #else
54
57 typedef enum CHIP_IOCON_PIO {
58 IOCON_PIO0_0 = (0x00C >> 2),
59 IOCON_PIO0_1 = (0x010 >> 2),
60 IOCON_PIO0_2 = (0x01C >> 2),
61 IOCON_PIO0_3 = (0x02C >> 2),
62 IOCON_PIO0_4 = (0x030 >> 2),
63 IOCON_PIO0_5 = (0x034 >> 2),
64 IOCON_PIO0_6 = (0x04C >> 2),
65 IOCON_PIO0_7 = (0x050 >> 2),
66 IOCON_PIO0_8 = (0x060 >> 2),
67 IOCON_PIO0_9 = (0x064 >> 2),
68 IOCON_PIO0_11 = (0x074 >> 2),
69
70 IOCON_PIO1_0 = (0x078 >> 2),
71 IOCON_PIO1_1 = (0x07C >> 2),
72 IOCON_PIO1_2 = (0x080 >> 2),
73 IOCON_PIO1_3 = (0x090 >> 2),
74 IOCON_PIO1_4 = (0x094 >> 2),
75 IOCON_PIO1_5 = (0x0A0 >> 2),
76 IOCON_PIO1_6 = (0x0A4 >> 2),
77 IOCON_PIO1_7 = (0x0A8 >> 2),
78 IOCON_PIO1_8 = (0x014 >> 2),
79 IOCON_PIO1_9 = (0x038 >> 2),
80 IOCON_PIO1_10 = (0x06C >> 2),
81 IOCON_PIO1_11 = (0x098 >> 2),
82
83 IOCON_PIO2_0 = (0x008 >> 2),
84 IOCON_PIO2_1 = (0x028 >> 2),
85 IOCON_PIO2_2 = (0x05C >> 2),
86 IOCON_PIO2_3 = (0x08C >> 2),
87 IOCON_PIO2_4 = (0x040 >> 2),
88 IOCON_PIO2_5 = (0x044 >> 2),
89 IOCON_PIO2_6 = (0x000 >> 2),
90 IOCON_PIO2_7 = (0x020 >> 2),
91 IOCON_PIO2_8 = (0x024 >> 2),
92 IOCON_PIO2_9 = (0x054 >> 2),
93 IOCON_PIO2_10 = (0x058 >> 2),
94 IOCON_PIO2_11 = (0x070 >> 2),
95
96 IOCON_PIO3_0 = (0x084 >> 2),
97 IOCON_PIO3_1 = (0x088 >> 2),
98 IOCON_PIO3_2 = (0x09C >> 2),
99 IOCON_PIO3_3 = (0x0AC >> 2),
100 IOCON_PIO3_4 = (0x03C >> 2),
101 IOCON_PIO3_5 = (0x048 >> 2),
102 } CHIP_IOCON_PIO_T;
103
107 typedef enum CHIP_IOCON_PIN_LOC {
108 IOCON_SCKLOC_PIO0_10 = (0xB0),
109 IOCON_SCKLOC_PIO2_11 = (0xB0 | 1),
110 IOCON_SCKLOC_PIO0_6 = (0xB0 | 2),
111 IOCON_DSRLOC_PIO2_1 = (0xB4),
112 IOCON_DSRLOC_PIO3_1 = (0xB4 | 1),
113 IOCON_DCDLOC_PIO2_2 = (0xB8),
114 IOCON_DCDLOC_PIO3_2 = (0xB8 | 1),
115 IOCON_RILOC_PIO2_3 = (0xBC),
116 IOCON_RILOC_PIO3_3 = (0xBC | 1),
117 } CHIP_IOCON_PIN_LOC_T;
118
119 typedef struct {
120 __IO uint32_t REG[48];
121 } LPC_IOCON_T;
122 #endif
123
129 #define IOCON_FUNC0 0x0
130 #define IOCON_FUNC1 0x1
131 #define IOCON_FUNC2 0x2
132 #define IOCON_FUNC3 0x3
133 #define IOCON_FUNC4 0x4
134 #define IOCON_FUNC5 0x5
135 #define IOCON_FUNC6 0x6
136 #define IOCON_FUNC7 0x7
137 #define IOCON_MODE_INACT (0x0 << 3)
138 #define IOCON_MODE_PULLDOWN (0x1 << 3)
139 #define IOCON_MODE_PULLUP (0x2 << 3)
140 #define IOCON_MODE_REPEATER (0x3 << 3)
141 #define IOCON_HYS_EN (0x1 << 5)
142 #define IOCON_INV_EN (0x1 << 6)
143 #define IOCON_ADMODE_EN (0x0 << 7)
144 #define IOCON_DIGMODE_EN (0x1 << 7)
145 #define IOCON_SFI2C_EN (0x0 << 8)
146 #define IOCON_STDI2C_EN (0x1 << 8)
147 #define IOCON_FASTI2C_EN (0x2 << 8)
148 #define IOCON_FILT_DIS (0x1 << 8)
149 #define IOCON_OPENDRAIN_EN (0x1 << 10)
155 #define MD_PUP (0x0 << 3)
156 #define MD_BUK (0x1 << 3)
157 #define MD_PLN (0x2 << 3)
158 #define MD_PDN (0x3 << 3)
159 #define MD_HYS (0x1 << 5)
160 #define MD_INV (0x1 << 6)
161 #define MD_ADMODE (0x0 << 7)
162 #define MD_DIGMODE (0x1 << 7)
163 #define MD_DISFIL (0x0 << 8)
164 #define MD_ENFIL (0x1 << 8)
165 #define MD_SFI2C (0x0 << 8)
166 #define MD_STDI2C (0x1 << 8)
167 #define MD_FASTI2C (0x2 << 8)
168 #define MD_OPENDRAIN (0x1 << 10)
169 #define FUNC0 0x0
170 #define FUNC1 0x1
171 #define FUNC2 0x2
172 #define FUNC3 0x3
173 #define FUNC4 0x4
174 #define FUNC5 0x5
175 #define FUNC6 0x6
176 #define FUNC7 0x7
177
178 #if defined(CHIP_LPC11UXX) || defined(CHIP_LPC11EXX) || defined(CHIP_LPC11AXX)
179
187 void Chip_IOCON_PinMuxSet(LPC_IOCON_T *pIOCON, uint8_t port, uint8_t pin, uint32_t modefunc);
188
198 STATIC INLINE void Chip_IOCON_PinMux(LPC_IOCON_T *pIOCON, uint8_t port, uint8_t pin, uint16_t mode, uint8_t func)
199 {
200 Chip_IOCON_PinMuxSet(pIOCON, port, pin, (uint32_t) (mode | func));
201 }
202
203 #else
204
212 STATIC INLINE void Chip_IOCON_PinMuxSet(LPC_IOCON_T *pIOCON, CHIP_IOCON_PIO_T pin, uint32_t modefunc)
213 {
214 pIOCON->REG[pin] = modefunc;
215 }
216
225 STATIC INLINE void Chip_IOCON_PinMux(LPC_IOCON_T *pIOCON, CHIP_IOCON_PIO_T pin, uint16_t mode, uint8_t func)
226 {
227 Chip_IOCON_PinMuxSet(pIOCON, pin, (uint32_t) (mode | func));
228 }
229
236 STATIC INLINE void Chip_IOCON_PinLocSel(LPC_IOCON_T *pIOCON, CHIP_IOCON_PIN_LOC_T sel)
237 {
238 pIOCON->REG[sel >> 2] = sel & 0x03;
239 }
240
241 #endif /* defined(CHIP_LPC11UXX) || defined (CHIP_LPC11EXX) || defined (CHIP_LPC11AXX) */
242
247 #ifdef __cplusplus
248 }
249 #endif
250
251 #endif /* __IOCON_11XX_H_ */