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timer_18xx_43xx.h
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1 /*
2 * @brief 18xx/43xx Timer/PWM control functions
3 *
4 * @note
5 * Copyright(C) NXP Semiconductors, 2012
6 * All rights reserved.
7 *
8 * @par
9 * Software that is described herein is for illustrative purposes only
10 * which provides customers with programming information regarding the
11 * LPC products. This software is supplied "AS IS" without any warranties of
12 * any kind, and NXP Semiconductors and its licensor disclaim any and
13 * all warranties, express or implied, including all implied warranties of
14 * merchantability, fitness for a particular purpose and non-infringement of
15 * intellectual property rights. NXP Semiconductors assumes no responsibility
16 * or liability for the use of the software, conveys no license or rights under any
17 * patent, copyright, mask work right, or any other intellectual property rights in
18 * or to any products. NXP Semiconductors reserves the right to make changes
19 * in the software without notification. NXP Semiconductors also makes no
20 * representation or warranty that such application will be suitable for the
21 * specified use without further testing or modification.
22 *
23 * @par
24 * Permission to use, copy, modify, and distribute this software and its
25 * documentation is hereby granted, under NXP Semiconductors' and its
26 * licensor's relevant copyrights in the software, without fee, provided that it
27 * is used in conjunction with NXP Semiconductors microcontrollers. This
28 * copyright, permission, and disclaimer notice must appear in all copies of
29 * this code.
30 */
31
32 #ifndef __TIMER_18XX_43XX_H_
33 #define __TIMER_18XX_43XX_H_
34
35 #ifdef __cplusplus
36 extern "C" {
37 #endif
38
49 void Chip_TIMER_Init(LPC_TIMER_T *pTMR);
50
56 void Chip_TIMER_DeInit(LPC_TIMER_T *pTMR);
57
66 STATIC INLINE bool Chip_TIMER_MatchPending(LPC_TIMER_T *pTMR, int8_t matchnum)
67 {
68 return IP_TIMER_MatchPending(pTMR, matchnum);
69 }
70
79 STATIC INLINE bool Chip_TIMER_CapturePending(LPC_TIMER_T *pTMR, int8_t capnum)
80 {
81 return IP_TIMER_CapturePending(pTMR, capnum);
82 }
83
91 STATIC INLINE void Chip_TIMER_ClearMatch(LPC_TIMER_T *pTMR, int8_t matchnum)
92 {
93 IP_TIMER_ClearMatch(pTMR, matchnum);
94 }
95
103 STATIC INLINE void Chip_TIMER_ClearCapture(LPC_TIMER_T *pTMR, int8_t capnum)
104 {
105 IP_TIMER_ClearCapture(pTMR, capnum);
106 }
107
114 STATIC INLINE void Chip_TIMER_Enable(LPC_TIMER_T *pTMR)
115 {
116 IP_TIMER_Enable(pTMR);
117 }
118
125 STATIC INLINE void Chip_TIMER_Disable(LPC_TIMER_T *pTMR)
126 {
127 IP_TIMER_Disable(pTMR);
128 }
129
136 STATIC INLINE uint32_t Chip_TIMER_ReadCount(LPC_TIMER_T *pTMR)
137 {
138 return IP_TIMER_ReadCount(pTMR);
139 }
140
147 STATIC INLINE uint32_t Chip_TIMER_ReadPrescale(LPC_TIMER_T *pTMR)
148 {
149 return IP_TIMER_ReadPrescale(pTMR);
150 }
151
159 STATIC INLINE void Chip_TIMER_PrescaleSet(LPC_TIMER_T *pTMR, uint32_t prescale)
160 {
161 IP_TIMER_PrescaleSet(pTMR, prescale);
162 }
163
172 STATIC INLINE void Chip_TIMER_SetMatch(LPC_TIMER_T *pTMR, int8_t matchnum, uint32_t matchval)
173 {
174 IP_TIMER_SetMatch(pTMR, matchnum, matchval);
175 }
176
184 STATIC INLINE uint32_t Chip_TIMER_ReadCapture(LPC_TIMER_T *pTMR, int8_t capnum)
185 {
186 return IP_TIMER_ReadCapture(pTMR, capnum);
187 }
188
194 STATIC INLINE void Chip_TIMER_Reset(LPC_TIMER_T *pTMR)
195 {
196 IP_TIMER_Reset(pTMR);
197 }
198
206 STATIC INLINE void Chip_TIMER_MatchEnableInt(LPC_TIMER_T *pTMR, int8_t matchnum)
207 {
208 IP_TIMER_MatchEnableInt(pTMR, matchnum);
209 }
210
217 STATIC INLINE void Chip_TIMER_MatchDisableInt(LPC_TIMER_T *pTMR, int8_t matchnum)
218 {
219 IP_TIMER_MatchDisableInt(pTMR, matchnum);
220 }
221
228 STATIC INLINE void Chip_TIMER_ResetOnMatchEnable(LPC_TIMER_T *pTMR, int8_t matchnum)
229 {
230 IP_TIMER_ResetOnMatchEnable(pTMR, matchnum);
231 }
232
239 STATIC INLINE void Chip_TIMER_ResetOnMatchDisable(LPC_TIMER_T *pTMR, int8_t matchnum)
240 {
241 IP_TIMER_ResetOnMatchDisable(pTMR, matchnum);
242 }
243
251 STATIC INLINE void Chip_TIMER_StopOnMatchEnable(LPC_TIMER_T *pTMR, int8_t matchnum)
252 {
253 IP_TIMER_StopOnMatchEnable(pTMR, matchnum);
254 }
255
263 STATIC INLINE void Chip_TIMER_StopOnMatchDisable(LPC_TIMER_T *pTMR, int8_t matchnum)
264 {
265 IP_TIMER_StopOnMatchDisable(pTMR, matchnum);
266 }
267
276 STATIC INLINE void Chip_TIMER_CaptureRisingEdgeEnable(LPC_TIMER_T *pTMR, int8_t capnum)
277 {
278 IP_TIMER_CaptureRisingEdgeEnable(pTMR, capnum);
279 }
280
289 STATIC INLINE void Chip_TIMER_CaptureRisingEdgeDisable(LPC_TIMER_T *pTMR, int8_t capnum)
290 {
291 IP_TIMER_CaptureRisingEdgeDisable(pTMR, capnum);
292 }
293
302 STATIC INLINE void Chip_TIMER_CaptureFallingEdgeEnable(LPC_TIMER_T *pTMR, int8_t capnum)
303 {
304 IP_TIMER_CaptureFallingEdgeEnable(pTMR, capnum);
305 }
306
315 STATIC INLINE void Chip_TIMER_CaptureFallingEdgeDisable(LPC_TIMER_T *pTMR, int8_t capnum)
316 {
317 IP_TIMER_CaptureFallingEdgeDisable(pTMR, capnum);
318 }
319
328 STATIC INLINE void Chip_TIMER_CaptureEnableInt(LPC_TIMER_T *pTMR, int8_t capnum)
329 {
330 IP_TIMER_CaptureEnableInt(pTMR, capnum);
331 }
332
339 STATIC INLINE void Chip_TIMER_CaptureDisableInt(LPC_TIMER_T *pTMR, int8_t capnum)
340 {
341 IP_TIMER_CaptureDisableInt(pTMR, capnum);
342 }
343
354 STATIC INLINE void Chip_TIMER_ExtMatchControlSet(LPC_TIMER_T *pTMR, int8_t initial_state,
355 IP_TIMER_PIN_MATCH_STATE_T matchState, int8_t matchnum)
356 {
357 IP_TIMER_ExtMatchControlSet(pTMR, initial_state, matchState, matchnum);
358 }
359
368 STATIC INLINE void Chip_TIMER_TIMER_SetCountClockSrc(LPC_TIMER_T *pTMR,
369 IP_TIMER_CAP_SRC_STATE_T capSrc,
370 int8_t capnum)
371 {
372 IP_TIMER_SetCountClockSrc(pTMR, capSrc, capnum);
373 }
374
379 #ifdef __cplusplus
380 }
381 #endif
382
383 #endif /* __TIMER_18XX_43XX_H_ */