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chip.h
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1 /*
2 * @brief LPC13xx basic chip inclusion file
3 *
4 * Copyright(C) NXP Semiconductors, 2012
5 * All rights reserved.
6 *
7 * Software that is described herein is for illustrative purposes only
8 * which provides customers with programming information regarding the
9 * LPC products. This software is supplied "AS IS" without any warranties of
10 * any kind, and NXP Semiconductors and its licensor disclaim any and
11 * all warranties, express or implied, including all implied warranties of
12 * merchantability, fitness for a particular purpose and non-infringement of
13 * intellectual property rights. NXP Semiconductors assumes no responsibility
14 * or liability for the use of the software, conveys no license or rights under any
15 * patent, copyright, mask work right, or any other intellectual property rights in
16 * or to any products. NXP Semiconductors reserves the right to make changes
17 * in the software without notification. NXP Semiconductors also makes no
18 * representation or warranty that such application will be suitable for the
19 * specified use without further testing or modification.
20 *
21 * Permission to use, copy, modify, and distribute this software and its
22 * documentation is hereby granted, under NXP Semiconductors' and its
23 * licensor's relevant copyrights in the software, without fee, provided that it
24 * is used in conjunction with NXP Semiconductors microcontrollers. This
25 * copyright, permission, and disclaimer notice must appear in all copies of
26 * this code.
27 */
28
29 #ifndef __CHIP_H_
30 #define __CHIP_H_
31
32 #include "lpc_types.h"
33 #include "sys_config.h"
34 #include "cmsis.h"
35
36 #ifdef __cplusplus
37 extern "C" {
38 #endif
39
40 #ifndef CORE_M3
41 #error CORE_M3 is not defined for the LPC13xx architecture
42 #error CORE_M3 should be defined as part of your compiler define list
43 #endif
44
45 #if !defined(CHIP_LPC1343) && !defined(CHIP_LPC1347)
46 #error CHIP_LPC1343 or CHIP_LPC1347 is not defined!
47 #endif
48
49 #if !defined (ENABLE_UNTESTED_CODE)
50 #if defined(CHIP_LPC1343)
51 #error The LPC1343 code has not been tested with a platform. This code should \
52 build without errors but may not work correctly for the device. To disable this \
53 error message, define ENABLE_UNTESTED_CODE.
54 #endif
55 #endif
56
95 /* Peripheral mapping per device
96 Peripheral Device(s)
97 ---------------------------- ------------------------------------------------------------------------------
98 I2C(40000000) CHIP_LPC1343/CHIP_LPC1347
99 WDT(40004000) CHIP_LPC1343/CHIP_LPC1347
100 TIMER0_16(4000C000) CHIP_LPC1343/CHIP_LPC1347
101 TIMER1_16(40010000) CHIP_LPC1343/CHIP_LPC1347
102 TIMER0_32(40014000) CHIP_LPC1343/CHIP_LPC1347
103 TIMER1_32(40018000) CHIP_LPC1343/CHIP_LPC1347
104 PMU(40038000) CHIP_LPC1343/CHIP_LPC1347
105 FLASH_CTRL(4003C000) CHIP_LPC1343/CHIP_LPC1347
106 SSP0(40040000) CHIP_LPC1343/CHIP_LPC1347
107 IOCONF(40044000) CHIP_LPC1343/CHIP_LPC1347
108 SYSCTL(40048000) CHIP_LPC1343/CHIP_LPC1347
109 SSP1(40058000) CHIP_LPC1347
110 ADC(4001C000) CHIP_LPC1343/CHIP_LPC1347
111 UART(40008000) CHIP_LPC1343 only
112 USB(40020000) CHIP_LPC1343 only
113 GPIO_PORT(50000000) CHIP_LPC1343 only
114 GPIO_PIO0(50000000) CHIP_LPC1343 only
115 GPIO_PIO1(50010000) CHIP_LPC1343 only
116 GPIO_PIO2(50020000) CHIP_LPC1343 only
117 GPIO_PIO3(50030000) CHIP_LPC1343 only
118 USART/SMARTCARD(40008000) CHIP_LPC1347 only
119 FLASH_EEPROM(4003C000) CHIP_LPC1347 only
120 GPIO_INT(4004C000) CHIP_LPC1347 only
121 GPIO_GRP0_INT(4005C000) CHIP_LPC1347 only
122 GPIO_GRP1_INT(40060000) CHIP_LPC1347 only
123 RITIMER(40064000) CHIP_LPC1347 only
124 */
125
126 #include "adc_001.h"
127 #include "i2c_001.h"
128 #include "wwdt_001.h"
129 #include "timer_001.h"
130 #include "ssp_001.h"
131 #include "usart_004.h"
132 #if defined(CHIP_LPC1343)
133 #include "gpio_003.h"
134 #else
135 #include "gpio_001.h"
136 #include "gpiogrpint_001.h"
137 #include "gpiopinint_001.h"
138 #include "ritimer_001.h"
139 #include "flash_001.h"
140 #endif
141
147 #define LPC_I2C_BASE 0x40000000
148 #define LPC_WWDT_BASE 0x40004000
149 #define LPC_USART_BASE 0x40008000
150 #define LPC_TIMER16_0_BASE 0x4000C000
151 #define LPC_TIMER16_1_BASE 0x40010000
152 #define LPC_TIMER32_0_BASE 0x40014000
153 #define LPC_TIMER32_1_BASE 0x40018000
154 #define LPC_ADC_BASE 0x4001C000
155 #define LPC_PMU_BASE 0x40038000
156 #define LPC_FLASH_BASE 0x4003C000
157 #define LPC_SSP0_BASE 0x40040000
158 #define LPC_SSP1_BASE 0x40058000
159 #define LPC_IOCON_BASE 0x40044000
160 #define LPC_SYSCTL_BASE 0x40048000
161 #if defined(CHIP_LPC1347)
162 #define LPC_GPIO_PIN_INT_BASE 0x4004C000
163 #define LPC_GPIO_GROUP_INT0_BASE 0x4005C000
164 #define LPC_GPIO_GROUP_INT1_BASE 0x40060000
165 #define LPC_GPIO_PORT_BASE 0x50000000
166 #define LPC_USB0_BASE 0x40080000
167 #define LPC_RITIMER_BASE 0x40064000
168 #else /*CHIP_LPC1343*/
169 #define LPC_GPIO_PORT0_BASE 0x50000000
170 #define LPC_GPIO_PORT1_BASE 0x50010000
171 #define LPC_GPIO_PORT2_BASE 0x50020000
172 #define LPC_GPIO_PORT3_BASE 0x50030000
173 #define LPC_USB0_BASE 0x40020000
174 #endif
175
176 /* Normalize types */
177 typedef IP_WWDT_001_T LPC_WWDT_T;
178 typedef IP_USART_001_T LPC_USART_T;
179 typedef IP_SSP_001_T LPC_SSP_T;
180 typedef IP_TIMER_001_T LPC_TIMER_T;
181 typedef IP_I2C_001_T LPC_I2C_T;
182 typedef IP_ADC_001_T LPC_ADC_T;
183 #if defined(CHIP_LPC1347)
184 typedef IP_GPIO_001_T LPC_GPIO_T;
185 typedef IP_GPIOPININT_001_T LPC_GPIOPININT_T;
186 typedef IP_RITIMER_001_T LPC_RITIMER_T;
187 #else
188 typedef IP_GPIO_003_T LPC_GPIO_T;
189 #endif
190
191 #define LPC_ADC ((IP_ADC_001_T *) LPC_ADC_BASE)
192 #define LPC_I2C ((IP_I2C_001_T *) LPC_I2C_BASE)
193 #define LPC_WWDT ((IP_WWDT_001_T *) LPC_WWDT_BASE)
194 #define LPC_USART ((IP_USART_001_T *) LPC_USART_BASE)
195 #define LPC_TIMER16_0 ((IP_TIMER_001_T *) LPC_TIMER16_0_BASE)
196 #define LPC_TIMER16_1 ((IP_TIMER_001_T *) LPC_TIMER16_1_BASE)
197 #define LPC_TIMER32_0 ((IP_TIMER_001_T *) LPC_TIMER32_0_BASE)
198 #define LPC_TIMER32_1 ((IP_TIMER_001_T *) LPC_TIMER32_1_BASE)
199 #define LPC_PMU ((LPC_PMU_T *) LPC_PMU_BASE)
200 #define LPC_FMC ((LPC_FMC_T *) LPC_FLASH_BASE)
201 #define LPC_SSP0 ((IP_SSP_001_T *) LPC_SSP0_BASE)
202 #define LPC_SSP1 ((IP_SSP_001_T *) LPC_SSP1_BASE)
203 #define LPC_IOCON ((LPC_IOCON_T *) LPC_IOCON_BASE)
204 #define LPC_SYSCTL ((LPC_SYSCTL_T *) LPC_SYSCTL_BASE)
205 #if defined(CHIP_LPC1347)
206 #define LPC_GPIO_PIN_INT ((IP_GPIOPININT_001_T *) LPC_GPIO_PIN_INT_BASE)
207 #define LPC_GPIO_GROUP_INT0 ((IP_GPIOGROUPINT_001_T *) LPC_GPIO_GROUP_INT0_BASE)
208 #define LPC_GPIO_GROUP_INT1 ((IP_GPIOGROUPINT_001_T *) LPC_GPIO_GROUP_INT1_BASE)
209 #define LPC_GPIO_PORT ((IP_GPIO_001_T *) LPC_GPIO_PORT_BASE)
210 #define LPC_RITIMER ((IP_RITIMER_001_T *) LPC_RITIMER_BASE)
211 #define LPC_USB ((LPC_USB_T *) LPC_USB0_BASE)
212 #else
213 #define LPC_GPIO_PORT ((IP_GPIO_003_T *) LPC_GPIO_PORT0_BASE)
214 #endif
215
220 #include "ring_buffer.h"
221 #include "sysctl_13xx.h"
222 #include "clock_13xx.h"
223 #include "fmc_13xx.h"
224 #include "timer_13xx.h"
225 #include "wwdt_13xx.h"
226 #include "adc_13xx.h"
227 #if defined(CHIP_LPC1347)
228 #include "ritimer_13xx.h"
229 #include "usbd_1347.h"
230 #include "flash_13xx.h"
231 #endif
232 #include "iocon_13xx.h"
233 #include "gpio_13xx.h"
234 #include "uart_13xx.h"
235 #include "ssp_13xx.h"
236 #include "i2c_13xx.h"
237
238 // FIXME - missing PMU support
239
240 #ifdef __cplusplus
241 }
242 #endif
243
244 #endif /* __CHIP_H_ */