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cmsis.h
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1 /*
2 * @brief Basic CMSIS include file
3 *
4 * @note
5 * Copyright(C) NXP Semiconductors, 2012
6 * All rights reserved.
7 *
8 * @par
9 * Software that is described herein is for illustrative purposes only
10 * which provides customers with programming information regarding the
11 * LPC products. This software is supplied "AS IS" without any warranties of
12 * any kind, and NXP Semiconductors and its licensor disclaim any and
13 * all warranties, express or implied, including all implied warranties of
14 * merchantability, fitness for a particular purpose and non-infringement of
15 * intellectual property rights. NXP Semiconductors assumes no responsibility
16 * or liability for the use of the software, conveys no license or rights under any
17 * patent, copyright, mask work right, or any other intellectual property rights in
18 * or to any products. NXP Semiconductors reserves the right to make changes
19 * in the software without notification. NXP Semiconductors also makes no
20 * representation or warranty that such application will be suitable for the
21 * specified use without further testing or modification.
22 *
23 * @par
24 * Permission to use, copy, modify, and distribute this software and its
25 * documentation is hereby granted, under NXP Semiconductors' and its
26 * licensor's relevant copyrights in the software, without fee, provided that it
27 * is used in conjunction with NXP Semiconductors microcontrollers. This
28 * copyright, permission, and disclaimer notice must appear in all copies of
29 * this code.
30 */
31
32 #ifndef __CMSIS_H_
33 #define __CMSIS_H_
34
35 #include "lpc_types.h"
36
37 #ifdef __cplusplus
38 extern "C" {
39 #endif
40
46 #if defined(__ARMCC_VERSION)
47 // Kill warning "#pragma push with no matching #pragma pop"
48 #pragma diag_suppress 2525
49 #pragma push
50 #pragma anon_unions
51 #elif defined(__CWCC__)
52 #pragma push
53 #pragma cpp_extensions on
54 #elif defined(__GNUC__)
55 /* anonymous unions are enabled by default */
56 #elif defined(__IAR_SYSTEMS_ICC__)
57 // #pragma push // FIXME not usable for IAR
58 #pragma language=extended
59 #else
60 #error Not supported compiler type
61 #endif
62
63 #if defined(CORE_M0PLUS)
64
69 /* Configuration of the Cortex-M0+ Processor and Core Peripherals */
70 #define __MPU_PRESENT 0
71 #define __NVIC_PRIO_BITS 2
72 #define __Vendor_SysTickConfig 0
82 typedef enum {
83 /****** Cortex-M0 Processor Exceptions Numbers ***************************************************/
84 Reset_IRQn = -15,
85 NonMaskableInt_IRQn = -14,
86 HardFault_IRQn = -13,
87 SVCall_IRQn = -5,
88 PendSV_IRQn = -2,
89 SysTick_IRQn = -1,
91 /****** LPC8xx Specific Interrupt Numbers ********************************************************/
92 SPI0_IRQn = 0,
93 SPI1_IRQn = 1,
94 Reserved0_IRQn = 2,
95 UART0_IRQn = 3,
96 UART1_IRQn = 4,
97 UART2_IRQn = 5,
98 Reserved1_IRQn = 6,
99 Reserved2_IRQn = 7,
100 I2C_IRQn = 8,
101 SCT_IRQn = 9,
102 MRT_IRQn = 10,
103 CMP_IRQn = 11,
104 WDT_IRQn = 12,
105 BOD_IRQn = 13,
106 FLASH_IRQn = 14,
107 WKT_IRQn = 15,
108 Reserved4_IRQn = 16,
109 Reserved5_IRQn = 17,
110 Reserved6_IRQn = 18,
111 Reserved7_IRQn = 19,
112 Reserved8_IRQn = 20,
113 Reserved9_IRQn = 21,
114 Reserved10_IRQn = 22,
115 Reserved11_IRQn = 23,
116 PININT0_IRQn = 24,
117 PININT1_IRQn = 25,
118 PININT2_IRQn = 26,
119 PININT3_IRQn = 27,
120 PININT4_IRQn = 28,
121 PININT5_IRQn = 29,
122 PININT6_IRQn = 30,
123 PININT7_IRQn = 31,
124 } IRQn_Type;
125
130 #include "core_cm0plus.h"
131 #else
132 #error Please #define CORE_M0PLUS
133 #endif
134
139 #ifdef __cplusplus
140 }
141 #endif
142
143 #endif /* __CMSIS_H_ */