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cmsis.h
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1 /*
2 * @brief Basic CMSIS include file
3 *
4 * @note
5 * Copyright(C) NXP Semiconductors, 2012
6 * All rights reserved.
7 *
8 * @par
9 * Software that is described herein is for illustrative purposes only
10 * which provides customers with programming information regarding the
11 * LPC products. This software is supplied "AS IS" without any warranties of
12 * any kind, and NXP Semiconductors and its licensor disclaim any and
13 * all warranties, express or implied, including all implied warranties of
14 * merchantability, fitness for a particular purpose and non-infringement of
15 * intellectual property rights. NXP Semiconductors assumes no responsibility
16 * or liability for the use of the software, conveys no license or rights under any
17 * patent, copyright, mask work right, or any other intellectual property rights in
18 * or to any products. NXP Semiconductors reserves the right to make changes
19 * in the software without notification. NXP Semiconductors also makes no
20 * representation or warranty that such application will be suitable for the
21 * specified use without further testing or modification.
22 *
23 * @par
24 * Permission to use, copy, modify, and distribute this software and its
25 * documentation is hereby granted, under NXP Semiconductors' and its
26 * licensor's relevant copyrights in the software, without fee, provided that it
27 * is used in conjunction with NXP Semiconductors microcontrollers. This
28 * copyright, permission, and disclaimer notice must appear in all copies of
29 * this code.
30 */
31
32 #ifndef __CMSIS_H_
33 #define __CMSIS_H_
34
35 #include "lpc_types.h"
36 #include "sys_config.h"
37
38 #ifdef __cplusplus
39 extern "C" {
40 #endif
41
47 #if defined(__ARMCC_VERSION)
48 // Kill warning "#pragma push with no matching #pragma pop"
49 #pragma diag_suppress 2525
50 #pragma push
51 #pragma anon_unions
52 #elif defined(__CWCC__)
53 #pragma push
54 #pragma cpp_extensions on
55 #elif defined(__GNUC__)
56 /* anonymous unions are enabled by default */
57 #elif defined(__IAR_SYSTEMS_ICC__)
58 // #pragma push // FIXME not usable for IAR
59 #pragma language=extended
60 #else
61 #error Not supported compiler type
62 #endif
63
64 #if defined(CORE_M4)
65
69 #define __CM4_REV 0x0000
70 #define __MPU_PRESENT 1
71 #define __NVIC_PRIO_BITS 5
72 #define __Vendor_SysTickConfig 0
74 #ifndef __FPU_PRESENT
75 #define __FPU_PRESENT 1
76 #endif
77
86 typedef enum {
87 /* ------------------------- Cortex-M4 Processor Exceptions Numbers ----------------------------- */
88 Reset_IRQn = -15,
89 NonMaskableInt_IRQn = -14,
90 HardFault_IRQn = -13,
91 MemoryManagement_IRQn = -12,
92 BusFault_IRQn = -11,
93 UsageFault_IRQn = -10,
94 SVCall_IRQn = -5,
95 DebugMonitor_IRQn = -4,
96 PendSV_IRQn = -2,
97 SysTick_IRQn = -1,
99 /* --------------------------- LPC40xx Specific Interrupt Numbers ------------------------------- */
100 WDT_IRQn = 0,
101 TIMER0_IRQn = 1,
102 TIMER1_IRQn = 2,
103 TIMER2_IRQn = 3,
104 TIMER3_IRQn = 4,
105 UART0_IRQn = 5,
106 UART1_IRQn = 6,
107 UART2_IRQn = 7,
108 UART3_IRQn = 8,
109 PWM1_IRQn = 9,
110 I2C0_IRQn = 10,
111 I2C1_IRQn = 11,
112 I2C2_IRQn = 12,
113 SPI_IRQn = 13,
114 SSP0_IRQn = 14,
115 SSP1_IRQn = 15,
116 PLL0_IRQn = 16,
117 RTC_IRQn = 17,
118 EINT0_IRQn = 18,
119 EINT1_IRQn = 19,
120 EINT2_IRQn = 20,
121 EINT3_IRQn = 21,
122 ADC_IRQn = 22,
123 BOD_IRQn = 23,
124 USB_IRQn = 24,
125 CAN_IRQn = 25,
126 DMA_IRQn = 26,
127 I2S_IRQn = 27,
128 ETHERNET_IRQn = 28,
129 SDC_IRQn = 29,
130 MCPWM_IRQn = 30,
131 QEI_IRQn = 31,
132 PLL1_IRQn = 32,
133 USBActivity_IRQn = 33,
134 CANActivity_IRQn = 34,
135 UART4_IRQn = 35,
136 SSP2_IRQn = 36,
137 LCD_IRQn = 37,
138 GPIO_IRQn = 38,
139 PWM0_IRQn = 39,
140 EEPROM_IRQn = 40,
141 } IRQn_Type;
142
147 #include "core_cm4.h"
149 #elif defined(CORE_M3)
150
154 #define __MPU_PRESENT 1
155 #define __NVIC_PRIO_BITS 5
156 #define __Vendor_SysTickConfig 0
157 #define __FPU_PRESENT 0
167 typedef enum {
168 /* ------------------------- Cortex-M3 Processor Exceptions Numbers ----------------------------- */
169 Reset_IRQn = -15,
170 NonMaskableInt_IRQn = -14,
171 HardFault_IRQn = -13,
172 MemoryManagement_IRQn = -12,
173 BusFault_IRQn = -11,
174 UsageFault_IRQn = -10,
175 SVCall_IRQn = -5,
176 DebugMonitor_IRQn = -4,
177 PendSV_IRQn = -2,
178 SysTick_IRQn = -1,
180 /* --------------------------- LPC17xx Specific Interrupt Numbers ------------------------------- */
181 WDT_IRQn = 0,
182 TIMER0_IRQn = 1,
183 TIMER1_IRQn = 2,
184 TIMER2_IRQn = 3,
185 TIMER3_IRQn = 4,
186 UART0_IRQn = 5,
187 UART1_IRQn = 6,
188 UART2_IRQn = 7,
189 UART3_IRQn = 8,
190 PWM1_IRQn = 9,
191 I2C0_IRQn = 10,
192 I2C1_IRQn = 11,
193 I2C2_IRQn = 12,
194 #if defined(CHIP_LPC175X_6X)
195 SPI_IRQn = 13,
196 #else
197 Reserved0_IRQn = 13,
198 #endif
199 SSP0_IRQn = 14,
200 SSP1_IRQn = 15,
201 PLL0_IRQn = 16,
202 RTC_IRQn = 17,
203 EINT0_IRQn = 18,
204 EINT1_IRQn = 19,
205 EINT2_IRQn = 20,
206 EINT3_IRQn = 21,
207 ADC_IRQn = 22,
208 BOD_IRQn = 23,
209 USB_IRQn = 24,
210 CAN_IRQn = 25,
211 DMA_IRQn = 26,
212 I2S_IRQn = 27,
213 ETHERNET_IRQn = 28,
214 #if defined(CHIP_LPC175X_6X)
215 RITIMER_IRQn = 29,
216 #else
217 SDC_IRQn = 29,
218 #endif
219 MCPWM_IRQn = 30,
220 QEI_IRQn = 31,
221 PLL1_IRQn = 32,
222 USBActivity_IRQn = 33,
223 CANActivity_IRQn = 34,
224 #if defined(CHIP_LPC177X_8X)
225 UART4_IRQn = 35,
226 SSP2_IRQn = 36,
227 LCD_IRQn = 37,
228 GPIO_IRQn = 38,
229 PWM0_IRQn = 39,
230 EEPROM_IRQn = 40,
231 #endif
232 } IRQn_Type;
233
238 #include "core_cm3.h"
240 #else
241 #error Please #define CORE_M3 or CORE_M4
242 #endif
243
248 #ifdef __cplusplus
249 }
250 #endif
251
252 #endif /* __CMSIS_H_ */