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IP_GPDMA_001_CH_T Struct Reference
IP: GPDMA register block and driver

## Detailed Description

GPDMA Channel register block structure.

Definition at line 51 of file gpdma_001.h.

`#include "gpdma_001.h"`

## Data Fields
__IO uint32_t | SRCADDR
__IO uint32_t | DESTADDR
__IO uint32_t | LLI
__IO uint32_t | CONTROL
__IO uint32_t | CONFIG
__I uint32_t | RESERVED1 [3]

## Field Documentation

__IO uint32_t CONFIG

DMA Channel Configuration Register

Definition at line 56 of file gpdma_001.h.

__IO uint32_t CONTROL

DMA Channel Control Register

Definition at line 55 of file gpdma_001.h.

__IO uint32_t DESTADDR

DMA Channel Destination Address Register

Definition at line 53 of file gpdma_001.h.

__IO uint32_t LLI

DMA Channel Linked List Item Register

Definition at line 54 of file gpdma_001.h.

__I uint32_t RESERVED1[3]

Definition at line 57 of file gpdma_001.h.

__IO uint32_t SRCADDR

DMA Channel Source Address Register

Definition at line 52 of file gpdma_001.h.

The documentation for this struct was generated from the following file:

- C:/nxp/v1.03/lpcopen_v1.03/lpcopen/software/lpc_core/lpc_ip/gpdma_001.h