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cmp_001.h
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1 /*
2 * @brief CMP Registers and control functions
3 *
4 * @note
5 * Copyright(C) NXP Semiconductors, 2012
6 * All rights reserved.
7 *
8 * @par
9 * Software that is described herein is for illustrative purposes only
10 * which provides customers with programming information regarding the
11 * LPC products. This software is supplied "AS IS" without any warranties of
12 * any kind, and NXP Semiconductors and its licensor disclaim any and
13 * all warranties, express or implied, including all implied warranties of
14 * merchantability, fitness for a particular purpose and non-infringement of
15 * intellectual property rights. NXP Semiconductors assumes no responsibility
16 * or liability for the use of the software, conveys no license or rights under any
17 * patent, copyright, mask work right, or any other intellectual property rights in
18 * or to any products. NXP Semiconductors reserves the right to make changes
19 * in the software without notification. NXP Semiconductors also makes no
20 * representation or warranty that such application will be suitable for the
21 * specified use without further testing or modification.
22 *
23 * @par
24 * Permission to use, copy, modify, and distribute this software and its
25 * documentation is hereby granted, under NXP Semiconductors' and its
26 * licensor's relevant copyrights in the software, without fee, provided that it
27 * is used in conjunction with NXP Semiconductors microcontrollers. This
28 * copyright, permission, and disclaimer notice must appear in all copies of
29 * this code.
30 */
31
32 #ifndef __CMP_001_H_
33 #define __CMP_001_H_
34
35 #include "sys_config.h"
36 #include "cmsis.h"
37
38 #ifdef __cplusplus
39 extern "C" {
40 #endif
41
48 #define CMP_NUM 2
49
53 typedef struct {
54 __IO uint32_t CMP_CTRL;
55 __IO uint32_t CMP_CTRLx[CMP_NUM];
56 } IP_CMP_001_T;
57
61 typedef enum IP_CMP_ENCTRL {
62 CMP_ENCTRL_DISABLE,
63 CMP_ENCTRL_DIS_IN_DS_PWD,
64 CMP_ENCTRL_DIS_IN_PWD,
65 CMP_ENCTRL_ENABLE,
66 } IP_CMP_ENCTRL_T;
67
69 #define CMP_CTRL_BITMASK (0xF30F)
70
71 #define CMP_CTRL_PD_IREF_BITMASK (0x03)
72
73 #define CMP_CTRL_PD_IREF(n) ((((uint32_t) (n)) & 0x03))
74
75 #define CMP_CTRL_PD_VBG_BITMASK (((uint32_t) 0x03) << 2)
76
77 #define CMP_CTRL_PD_VBG(n) ((((uint32_t) (n)) & 0x03) << 2)
78
79 #define CMP_CTRL_ROSC_BITMASK ((uint32_t) 0x300)
80
81 #define CMP_CTRL_ROSCCTL_CMP1 (0x00)
82
83 #define CMP_CTRL_ROSCCTL_CMP0 (((uint32_t) 0x01) << 8)
84
85 #define CMP_CTRL_EXT_RESET_INTERNAL (0x00)
86
87 #define CMP_CTRL_EXT_RESET_CMPRESET (((uint32_t) 0x01) << 9)
88
89 #define CMP_CTRL_TIMERCAPTURE_BITMASK ((uint32_t) 0xF000)
90
91 #define CMP_CTRL_T0CAP2_0LEVEL (0x00)
92
93 #define CMP_CTRL_T0CAP2_1LEVEL (((uint32_t) 0x01) << 12)
94
95 #define CMP_CTRL_T0CAP3_0EDGE (0x00)
96
97 #define CMP_CTRL_T0CAP3_1EDGE (((uint32_t) 0x01) << 13)
98
99 #define CMP_CTRL_T1CAP2_1EDGE (0x00)
100
101 #define CMP_CTRL_T1CAP2_0LEVEL (((uint32_t) 0x01) << 14)
102
103 #define CMP_CTRL_T1CAP3_1LEVEL (0x00)
104
105 #define CMP_CTRL_T1CAP3_0EDGE (((uint32_t) 0x01) << 15)
106
108 #define CMP_CTRLx_BITMASK ((uint32_t) 0x1F7FF77F)
109
110 #define CMP_CTRLx_EN_BITMASK (0x03)
111
112 #define CMP_CTRLx_EN(n) ((((uint32_t) (n)) & 0x03))
113
114 #define CMP_CTRLx_OE (((uint32_t) 0x01) << 2)
115
116 #define CMP_CTRLx_STAT (((uint32_t) 0x01) << 3)
117
118 #define CMP_CTRLx_VM_BITMASK (((uint32_t) 0x07) << 4)
119
120 #define CMP_CTRLx_VM(n) ((((uint32_t) (n)) & 0x07) << 4)
121
122 #define CMP_CTRLx_VP_BITMASK (((uint32_t) 0x07) << 8)
123
124 #define CMP_CTRLx_VP(n) ((((uint32_t) (n)) & 0x07) << 8)
125
126 #define CMP_CTRLx_SYNC (((uint32_t) 0x01) << 12)
127
128 #define CMP_CTRLx_HYS_BITMASK (((uint32_t) 0x03) << 13)
129
130 #define CMP_CTRLx_HYS(n) ((((uint32_t) (n)) & 0x03) << 13)
131
132 #define CMP_CTRLx_INTCTRL_BITMASK ((uint32_t) 0x78000)
133
134 #define CMP_CTRLx_INTPOL_NORMAL (0x00)
135
136 #define CMP_CTRLx_INTPOL_INV (((uint32_t) 0x01) << 15)
137
138 #define CMP_CTRLx_INTTYPE_EDGE (0x00)
139
140 #define CMP_CTRLx_INTTYPE_LEVEL (((uint32_t) 0x01) << 16)
141
142 #define CMP_CTRLx_INTEDGE_BITMASK (((uint32_t) 0x03) << 17)
143
144 #define CMP_CTRLx_INTEDGE(n) ((((uint32_t) (n)) & 0x03) << 17)
145
146 #define CMP_CTRLx_INTFLAG (((uint32_t) 0x01) << 19)
147
148 #define CMP_CTRLx_VLADEN_BITMASK (((uint32_t) 0x03) << 20)
149
150 #define CMP_CTRLx_VLADEN(n) ((((uint32_t) (n)) & 0x03) << 20)
151
152 #define CMP_CTRLx_VLADREF_VREFCMP (0x00)
153
154 #define CMP_CTRLx_VLADREF_VDDA (((uint32_t) 0x01) << 22)
155
156 #define CMP_CTRLx_VSEL_BITMASK ((uint32_t) ((0x1F) << 24))
157
158 #define CMP_CTRLx_VSEL(n) ((((uint32_t) (n)) & 0x1F) << 24)
159
163 typedef enum IP_CMP_INPUT {
164 CMP_INPUT_VREF_DIV,
165 CMP_INPUT_CMPx_IN0,
166 CMP_INPUT_CMPx_IN1,
167 CMP_INPUT_CMPx_IN2,
168 CMP_INPUT_CMPx_IN3,
169 CMP_INPUT_CMP_OTHER_IN0,
170 CMP_INPUT_INTERNAL_09VBG,
171 } IP_CMP_INPUT_T;
172
176 typedef enum IP_CMP_HYS {
177 CMP_HYS_NONE = CMP_CTRLx_HYS(0),
178 CMP_HYS_5MV = CMP_CTRLx_HYS(1),
179 CMP_HYS_10MV = CMP_CTRLx_HYS(2),
180 CMP_HYS_15MV = CMP_CTRLx_HYS(3),
181 } IP_CMP_HYS_T;
182
186 typedef enum IP_CMP_INTEDGE {
187 CMP_INTEDGE_FALLING = CMP_CTRLx_INTEDGE(0),
188 CMP_INTEDGE_RISING = CMP_CTRLx_INTEDGE(1),
189 CMP_INTEDGE_BOTH = CMP_CTRLx_INTEDGE(2),
190 } IP_CMP_INTEDGE_T;
191
197 STATIC INLINE void IP_CMP_Init(IP_CMP_001_T *pCMP) {}
198
204 STATIC INLINE void IP_CMP_DeInit(IP_CMP_001_T *pCMP) {}
205
212 STATIC INLINE void IP_CMP_EnableCurrentSrc(IP_CMP_001_T *pCMP, IP_CMP_ENCTRL_T en)
213 {
214 pCMP->CMP_CTRL = (pCMP->CMP_CTRL & (~CMP_CTRL_PD_IREF_BITMASK)) | CMP_CTRL_PD_IREF(en);
215 }
216
223 STATIC INLINE void IP_CMP_EnableBandGap(IP_CMP_001_T *pCMP, IP_CMP_ENCTRL_T en)
224 {
225 pCMP->CMP_CTRL = (pCMP->CMP_CTRL & (~CMP_CTRL_PD_VBG_BITMASK)) | CMP_CTRL_PD_VBG(en);
226 }
227
234 STATIC INLINE void IP_CMP_ControlROSC(IP_CMP_001_T *pCMP, uint32_t flag)
235 {
236 pCMP->CMP_CTRL = (pCMP->CMP_CTRL & (~CMP_CTRL_ROSC_BITMASK)) | flag;
237 }
238
245 STATIC INLINE void IP_CMP_SetTimerCapInput(IP_CMP_001_T *pCMP, uint32_t flag)
246 {
247 pCMP->CMP_CTRL = (pCMP->CMP_CTRL & (~CMP_CTRL_TIMERCAPTURE_BITMASK)) | flag;
248 }
249
259 STATIC INLINE void IP_CMP_SetupVoltLadder(IP_CMP_001_T *pCMP, uint8_t id,
260 uint16_t ladSel, uint32_t flag)
261 {
262 pCMP->CMP_CTRLx[id] = (pCMP->CMP_CTRLx[id] & (~(CMP_CTRLx_VSEL_BITMASK | CMP_CTRLx_VLADREF_VDDA))) | CMP_CTRLx_VSEL(
263 ladSel) | flag;
264 }
265
273 STATIC INLINE void IP_CMP_EnableVoltLadder(IP_CMP_001_T *pCMP, uint8_t id, IP_CMP_ENCTRL_T en)
274 {
275 pCMP->CMP_CTRLx[id] = (pCMP->CMP_CTRLx[id] & (~CMP_CTRLx_VLADEN_BITMASK)) | CMP_CTRLx_VLADEN(en);
276 }
277
285 STATIC INLINE void IP_CMP_SetPosVoltRef(IP_CMP_001_T *pCMP, uint8_t id, IP_CMP_INPUT_T input)
286 {
287 pCMP->CMP_CTRLx[id] = (pCMP->CMP_CTRLx[id] & (~CMP_CTRLx_VP_BITMASK)) | CMP_CTRLx_VP(input);
288 }
289
297 STATIC INLINE void IP_CMP_SetNegVoltRef(IP_CMP_001_T *pCMP, uint8_t id, IP_CMP_INPUT_T input)
298 {
299 pCMP->CMP_CTRLx[id] = (pCMP->CMP_CTRLx[id] & (~CMP_CTRLx_VM_BITMASK)) | CMP_CTRLx_VM(input);
300 }
301
309 STATIC INLINE void IP_CMP_SetHysteresis(IP_CMP_001_T *pCMP, uint8_t id, IP_CMP_HYS_T hys)
310 {
311 pCMP->CMP_CTRLx[id] = (pCMP->CMP_CTRLx[id] & (~CMP_CTRLx_HYS_BITMASK)) | hys;
312 }
313
321 STATIC INLINE void IP_CMP_Enable(IP_CMP_001_T *pCMP, uint8_t id, IP_CMP_ENCTRL_T en)
322 {
323 pCMP->CMP_CTRLx[id] = (pCMP->CMP_CTRLx[id] & (~CMP_CTRLx_EN_BITMASK)) | CMP_CTRLx_EN(en);
324 }
325
332 STATIC INLINE FlagStatus IP_CMP_GetCmpStatus(IP_CMP_001_T *pCMP, uint8_t id)
333 {
334 return (pCMP->CMP_CTRLx[id] & CMP_CTRLx_STAT) ? SET : RESET;
335 }
336
343 STATIC INLINE void IP_CMP_EnableOuput(IP_CMP_001_T *pCMP, uint8_t id)
344 {
345 pCMP->CMP_CTRLx[id] |= CMP_CTRLx_OE;
346 }
347
354 STATIC INLINE void IP_CMP_DisableOutput(IP_CMP_001_T *pCMP, uint8_t id)
355 {
356 pCMP->CMP_CTRLx[id] &= ~CMP_CTRLx_OE;
357 }
358
365 STATIC INLINE void IP_CMP_EnableSyncCmpOut(IP_CMP_001_T *pCMP, uint8_t id)
366 {
367 pCMP->CMP_CTRLx[id] |= CMP_CTRLx_SYNC;
368 }
369
376 STATIC INLINE void IP_CMP_DisableSyncCmpOut(IP_CMP_001_T *pCMP, uint8_t id)
377 {
378 pCMP->CMP_CTRLx[id] &= ~CMP_CTRLx_SYNC;
379 }
380
389 STATIC INLINE void IP_CMP_ConfigInt(IP_CMP_001_T *pCMP, uint8_t id,
390 uint32_t intFlag,
391 IP_CMP_INTEDGE_T edgeSel)
392 {
393 pCMP->CMP_CTRLx[id] = (pCMP->CMP_CTRLx[id] & (~CMP_CTRLx_INTCTRL_BITMASK)) | intFlag | edgeSel;
394 }
395
402 STATIC INLINE FlagStatus IP_CMP_GetIntStatus(IP_CMP_001_T *pCMP, uint8_t id)
403 {
404 return (pCMP->CMP_CTRLx[id] & CMP_CTRLx_INTFLAG) ? SET : RESET;
405 }
406
413 STATIC INLINE void IP_CMP_CMP_ClearIntStatus(IP_CMP_001_T *pCMP, uint8_t id)
414 {
415 pCMP->CMP_CTRLx[id] |= CMP_CTRLx_INTFLAG;
416 }
417
422 #ifdef __cplusplus
423 }
424 #endif
425
426 #endif /* __CMP_001_H_ */