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adc_18xx_43xx.h
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1 /*
2 * @brief LPC18xx/43xx A/D conversion driver
3 *
4 * @note
5 * Copyright(C) NXP Semiconductors, 2012
6 * All rights reserved.
7 *
8 * @par
9 * Software that is described herein is for illustrative purposes only
10 * which provides customers with programming information regarding the
11 * LPC products. This software is supplied "AS IS" without any warranties of
12 * any kind, and NXP Semiconductors and its licensor disclaim any and
13 * all warranties, express or implied, including all implied warranties of
14 * merchantability, fitness for a particular purpose and non-infringement of
15 * intellectual property rights. NXP Semiconductors assumes no responsibility
16 * or liability for the use of the software, conveys no license or rights under any
17 * patent, copyright, mask work right, or any other intellectual property rights in
18 * or to any products. NXP Semiconductors reserves the right to make changes
19 * in the software without notification. NXP Semiconductors also makes no
20 * representation or warranty that such application will be suitable for the
21 * specified use without further testing or modification.
22 *
23 * @par
24 * Permission to use, copy, modify, and distribute this software and its
25 * documentation is hereby granted, under NXP Semiconductors' and its
26 * licensor's relevant copyrights in the software, without fee, provided that it
27 * is used in conjunction with NXP Semiconductors microcontrollers. This
28 * copyright, permission, and disclaimer notice must appear in all copies of
29 * this code.
30 */
31
32 #ifndef __ADC_18XX_43XX_H_
33 #define __ADC_18XX_43XX_H_
34
35 #ifdef __cplusplus
36 extern "C" {
37 #endif
38
45 typedef enum CHIP_ADC_CHANNEL {
46 ADC_CH0 = 0,
47 ADC_CH1,
48 ADC_CH2,
49 ADC_CH3,
50 ADC_CH4,
51 ADC_CH5,
52 ADC_CH6,
53 ADC_CH7,
54 } CHIP_ADC_CHANNEL_T;
55
57 typedef enum CHIP_ADC_RESOLUTION {
58 ADC_10BITS = 0,
59 ADC_9BITS,
60 ADC_8BITS,
61 ADC_7BITS,
62 ADC_6BITS,
63 ADC_5BITS,
64 ADC_4BITS,
65 ADC_3BITS,
66 } CHIP_ADC_RESOLUTION_T;
67
69 typedef enum CHIP_ADC_EDGE_CFG {
70 ADC_TRIGGERMODE_RISING = 0,
71 ADC_TRIGGERMODE_FALLING,
72 } CHIP_ADC_EDGE_CFG_T;
73
75 typedef enum CHIP_ADC_START_MODE {
76 ADC_NO_START = 0,
77 ADC_START_NOW,
78 ADC_START_ON_CTOUT15,
79 ADC_START_ON_CTOUT8,
80 ADC_START_ON_ADCTRIG0,
81 ADC_START_ON_ADCTRIG1,
82 ADC_START_ON_MCOA2
83 } CHIP_ADC_START_MODE_T;
84
86 typedef struct {
87 uint32_t adcRate;
88 uint8_t bitsAccuracy;
89 bool burstMode;
90 } ADC_Clock_Setup_T;
91
99 STATIC INLINE Status Chip_ADC_Read_Value(LPC_ADC_T *pADC, uint8_t channel, uint16_t *data)
100 {
101 return IP_ADC_Get_Val(pADC, channel, data);
102 }
103
111 STATIC INLINE FlagStatus Chip_ADC_Read_Status(LPC_ADC_T *pADC, uint8_t channel, uint32_t StatusType)
112 {
113 return IP_ADC_GetStatus(pADC, channel, StatusType);
114 }
115
123 STATIC INLINE void Chip_ADC_Channel_Int_Cmd(LPC_ADC_T *pADC, uint8_t channel, FunctionalState NewState)
124 {
125 IP_ADC_Int_Enable(pADC, channel, NewState);
126 }
127
134 STATIC INLINE void Chip_ADC_Global_Int_Cmd(LPC_ADC_T *pADC, FunctionalState NewState)
135 {
136 IP_ADC_Int_Enable(pADC, 8, NewState);
137 }
138
144 void Chip_ADC_DeInit(LPC_ADC_T *pADC);
145
153 void Chip_ADC_Init(LPC_ADC_T *pADC, ADC_Clock_Setup_T *ADCSetup);
154
171 void Chip_ADC_Set_StartMode(LPC_ADC_T *pADC, CHIP_ADC_START_MODE_T mode, CHIP_ADC_EDGE_CFG_T EdgeOption);
172
180 void Chip_ADC_Set_SampleRate(LPC_ADC_T *pADC, ADC_Clock_Setup_T *ADCSetup, uint32_t rate);
181
189 void Chip_ADC_Set_Resolution(LPC_ADC_T *pADC, ADC_Clock_Setup_T *ADCSetup, CHIP_ADC_RESOLUTION_T resolution);
190
200 void Chip_ADC_Channel_Enable_Cmd(LPC_ADC_T *pADC, CHIP_ADC_CHANNEL_T channel, FunctionalState NewState);
201
210 void Chip_ADC_Burst_Cmd(LPC_ADC_T *pADC, FunctionalState NewState);
211
219 Status Chip_ADC_Read_Byte(LPC_ADC_T *pADC, CHIP_ADC_CHANNEL_T channel, uint8_t *data);
220
225 #ifdef __cplusplus
226 }
227 #endif
228
229 #endif /* __ADC_18XX_43XX_H_ */