| LPCOpen Platform v1.03 LPCOpen Platform for NXP LPC Microcontrollers

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spi_001.h File Reference
`#include "sys_config.h"`
`#include "cmsis.h"`

Go to the source code of this file.

## Data Structures
struct | IP_SPI_001_T
| SPI register block structure. More...

## Macros
#define | SPI_CR_BITMASK ((uint32_t) 0xFFC)
#define | SPI_CR_BIT_EN ((uint32_t) (1 << 2))
#define | SPI_CR_BITS_MASK ((uint32_t) 0xF00)
#define | SPI_CR_BITS(n) ((uint32_t) ((n << 8) & 0xF00)) /* n is in range 8-16 */
#define | SPI_CR_CPHA_FIRST ((uint32_t) (0)) /*Capture data on the first edge, Change data on the following edge*/
#define | SPI_CR_CPHA_SECOND ((uint32_t) (1 << 3)) /*Change data on the first edge, Capture data on the following edge*/
#define | SPI_CR_CPOL_LO ((uint32_t) (0)) /* The rest state of the clock (between frames) is low.*/
#define | SPI_CR_CPOL_HI ((uint32_t) (1 << 4)) /* The rest state of the clock (between frames) is high.*/
#define | SPI_CR_SLAVE_EN ((uint32_t) 0)
#define | SPI_CR_MASTER_EN ((uint32_t) (1 << 5))
#define | SPI_CR_MSB_FIRST_EN ((uint32_t) 0) /*Data will be transmitted and received in standard order (MSB first).*/
#define | SPI_CR_LSB_FIRST_EN ((uint32_t) (1 << 6)) /*Data will be transmitted and received in reverse order (LSB first).*/
#define | SPI_CR_INT_EN ((uint32_t) (1 << 7))
#define | SPI_SR_BITMASK ((uint32_t) 0xF8)
#define | SPI_SR_ABRT ((uint32_t) (1 << 3)) /* When 1, this bit indicates that a slave abort has occurred. */
#define | SPI_SR_MODF ((uint32_t) (1 << 4)) /* when 1, this bit indicates that a Mode fault error has occurred. */
#define | SPI_SR_ROVR ((uint32_t) (1 << 5)) /* When 1, this bit indicates that a read overrun has occurred. */
#define | SPI_SR_WCOL ((uint32_t) (1 << 6)) /* When 1, this bit indicates that a write collision has occurred.. */
#define | SPI_SR_SPIF ((uint32_t) (1 << 7)) /* When 1, this bit indicates when a SPI data transfer is complete.. */
#define | SPI_SR_ERROR (SPI_SR_ABRT | SPI_SR_MODF | SPI_SR_ROVR | SPI_SR_WCOL)
#define | SPI_TCR_TEST(n) ((uint32_t) ((n & 0x3F) << 1))
#define | SPI_INT_SPIF ((uint32_t) (1 << 0))
#define | SPI_DR_DATA(n) ((uint32_t) ((n) & 0xFFFF))

## Enumerations
enum | IP_SPI_MODE_T { SPI_MODE_MASTER = SPI_CR_MASTER_EN, SPI_MODE_SLAVE = SPI_CR_SLAVE_EN, SPI_MODE_MASTER = SPI_CFG_MASTER_EN, SPI_MODE_SLAVE = SPI_CFG_SLAVE_EN }
| SPI Mode. More...
enum | IP_SPI_CLOCK_MODE_T { SPI_CLOCK_CPHA0_CPOL0 = SPI_CR_CPOL_LO | SPI_CR_CPHA_FIRST, SPI_CLOCK_CPHA0_CPOL1 = SPI_CR_CPOL_HI | SPI_CR_CPHA_FIRST, SPI_CLOCK_CPHA1_CPOL0 = SPI_CR_CPOL_LO | SPI_CR_CPHA_SECOND, SPI_CLOCK_CPHA1_CPOL1 = SPI_CR_CPOL_HI | SPI_CR_CPHA_SECOND, SPI_CLOCK_MODE0 = SPI_CLOCK_CPHA0_CPOL0, SPI_CLOCK_MODE1 = SPI_CLOCK_CPHA1_CPOL0, SPI_CLOCK_MODE2 = SPI_CLOCK_CPHA0_CPOL1, SPI_CLOCK_MODE3 = SPI_CLOCK_CPHA1_CPOL1, SPI_CLOCK_CPHA0_CPOL0 = SPI_CFG_CPOL_LO | SPI_CFG_CPHA_FIRST, SPI_CLOCK_CPHA0_CPOL1 = SPI_CFG_CPOL_HI | SPI_CFG_CPHA_FIRST, SPI_CLOCK_CPHA1_CPOL0 = SPI_CFG_CPOL_LO | SPI_CFG_CPHA_SECOND, SPI_CLOCK_CPHA1_CPOL1 = SPI_CFG_CPOL_HI | SPI_CFG_CPHA_SECOND, SPI_CLOCK_MODE0 = SPI_CLOCK_CPHA0_CPOL0, SPI_CLOCK_MODE1 = SPI_CLOCK_CPHA1_CPOL0, SPI_CLOCK_MODE2 = SPI_CLOCK_CPHA0_CPOL1, SPI_CLOCK_MODE3 = SPI_CLOCK_CPHA1_CPOL1 }
| SPI Clock Mode. More...
enum | IP_SPI_DATA_ORDER_T { SPI_DATA_MSB_FIRST = SPI_CR_MSB_FIRST_EN, SPI_DATA_LSB_FIRST = SPI_CR_LSB_FIRST_EN, SPI_DATA_MSB_FIRST = SPI_CFG_MSB_FIRST_EN, SPI_DATA_LSB_FIRST = SPI_CFG_LSB_FIRST_EN }
| SPI Data Order Mode. More...
enum | IP_SPI_BITS_T { SPI_BITS_8 = SPI_CR_BITS(8), SPI_BITS_9 = SPI_CR_BITS(9), SPI_BITS_10 = SPI_CR_BITS(10), SPI_BITS_11 = SPI_CR_BITS(11), SPI_BITS_12 = SPI_CR_BITS(12), SPI_BITS_13 = SPI_CR_BITS(13), SPI_BITS_14 = SPI_CR_BITS(14), SPI_BITS_15 = SPI_CR_BITS(15), SPI_BITS_16 = SPI_CR_BITS(16) }

## Functions
STATIC INLINE uint32_t | IP_SPI_GetStatus (IP_SPI_001_T *pSPI)
| Get the current status of SPI controller.
STATIC INLINE void | IP_SPI_IntEnable (IP_SPI_001_T *pSPI)
| Enable the interrupt for the SPI.
STATIC INLINE void | IP_SPI_IntDisable (IP_SPI_001_T *pSPI)
| Disable the interrupt for the SPI.
STATIC INLINE uint32_t | IP_SPI_GetIntStatus (IP_SPI_001_T *pSPI)
| Get the interrupt status.
STATIC INLINE void | IP_SPI_ClearIntStatus (IP_SPI_001_T *pSPI, uint32_t mask)
| Clear the interrupt status.
STATIC INLINE void | IP_SPI_SendFrame (IP_SPI_001_T *pSPI, uint16_t data)
| Send SPI 16-bit data.
STATIC INLINE uint16_t | IP_SPI_ReceiveFrame (IP_SPI_001_T *pSPI)
| Get received SPI data.
STATIC INLINE void | IP_SPI_SetClockCounter (IP_SPI_001_T *pSPI, uint32_t counter)
| Set up output clocks per bit for SPI bus.
STATIC INLINE void | IP_SPI_SetFormat (IP_SPI_001_T *pSPI, IP_SPI_BITS_T bits, IP_SPI_CLOCK_MODE_T clockMode, IP_SPI_DATA_ORDER_T order)
| Set up the SPI frame format.
STATIC INLINE IP_SPI_BITS_T | IP_SPI_GetDataSize (IP_SPI_001_T *pSPI)
| Get the number of bits transferred in each frame.
STATIC INLINE IP_SPI_CLOCK_MODE_T | IP_SPI_GetClockMode (IP_SPI_001_T *pSPI)
| Get the current CPHA & CPOL setting.
STATIC INLINE void | IP_SPI_SetMode (IP_SPI_001_T *pSPI, IP_SPI_MODE_T mode)
| Set the SPI working as master or slave mode.
STATIC INLINE IP_SPI_MODE_T | IP_SPI_GetMode (IP_SPI_001_T *pSPI)
| Set the SPI working as master or slave mode.