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sct_8xx.h
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1 /*
2 * @brief LPC8xx State Configurable Timer (SCT) Chip driver
3 *
4 * @note
5 * Copyright(C) NXP Semiconductors, 2012
6 * All rights reserved.
7 *
8 * @par
9 * Software that is described herein is for illustrative purposes only
10 * which provides customers with programming information regarding the
11 * LPC products. This software is supplied "AS IS" without any warranties of
12 * any kind, and NXP Semiconductors and its licenser disclaim any and
13 * all warranties, express or implied, including all implied warranties of
14 * merchantability, fitness for a particular purpose and non-infringement of
15 * intellectual property rights. NXP Semiconductors assumes no responsibility
16 * or liability for the use of the software, conveys no license or rights under any
17 * patent, copyright, mask work right, or any other intellectual property rights in
18 * or to any products. NXP Semiconductors reserves the right to make changes
19 * in the software without notification. NXP Semiconductors also makes no
20 * representation or warranty that such application will be suitable for the
21 * specified use without further testing or modification.
22 *
23 * @par
24 * Permission to use, copy, modify, and distribute this software and its
25 * documentation is hereby granted, under NXP Semiconductors' and its
26 * licensor's relevant copyrights in the software, without fee, provided that it
27 * is used in conjunction with NXP Semiconductors microcontrollers. This
28 * copyright, permission, and disclaimer notice must appear in all copies of
29 * this code.
30 */
31
32 #ifndef __SCT_8XX_H_
33 #define __SCT_8XX_H_
34
35 #ifdef __cplusplus
36 extern "C" {
37 #endif
38
50 typedef enum CHIP_SCT_MATCH_REG {
51 SCT_MATCH_0 = 0,
52 SCT_MATCH_1 = 1,
53 SCT_MATCH_2 = 2,
54 SCT_MATCH_3 = 3,
55 SCT_MATCH_4 = 4
56 } CHIP_SCT_MATCH_REG_T;
57
61 typedef enum CHIP_SCT_EVENT {
62 SCT_EVT_0 = (1 << 0),
63 SCT_EVT_1 = (1 << 1),
64 SCT_EVT_2 = (1 << 2),
65 SCT_EVT_3 = (1 << 3),
66 SCT_EVT_4 = (1 << 4)
67 } CHIP_SCT_EVENT_T;
68
75 STATIC INLINE void Chip_SCT_Config(LPC_SCT_T *pSCT, uint32_t value)
76 {
77 IP_SCT_Config(pSCT, value);
78 }
79
86 STATIC INLINE void Chip_SCT_SetCount(LPC_SCT_T *pSCT, uint32_t count)
87 {
88 IP_SCT_SetCount(pSCT, count);
89 }
90
97 STATIC INLINE void Chip_SCT_SetCountL(LPC_SCT_T *pSCT, uint16_t count)
98 {
99 IP_SCT_SetCountL(pSCT, count);
100 }
101
108 STATIC INLINE void Chip_SCT_SetCountH(LPC_SCT_T *pSCT, uint16_t count)
109 {
110 IP_SCT_SetCountH(pSCT, count);
111 }
112
120 STATIC INLINE void Chip_SCT_SetMatchCount(LPC_SCT_T *pSCT, CHIP_SCT_MATCH_REG_T n, uint32_t value)
121 {
122 IP_SCT_SetMatchCount(pSCT, (uint32_t) n, value);
123 }
124
132 STATIC INLINE void Chip_SCT_SetMatchReload(LPC_SCT_T *pSCT, CHIP_SCT_MATCH_REG_T n, uint32_t value)
133 {
134 IP_SCT_SetMatchReload(pSCT, (uint32_t) n, value);
135 }
136
143 STATIC INLINE void Chip_SCT_EventIntEnable(LPC_SCT_T *pSCT, CHIP_SCT_EVENT_T evt)
144 {
145 IP_SCT_EventIntEnable(pSCT, (uint32_t) evt);
146 }
147
154 STATIC INLINE void Chip_SCT_EventIntDisable(LPC_SCT_T *pSCT, CHIP_SCT_EVENT_T evt)
155 {
156 IP_SCT_EventIntDisable(pSCT, (uint32_t) evt);
157 }
158
165 STATIC INLINE void Chip_SCT_ClearEventFlag(LPC_SCT_T *pSCT, CHIP_SCT_EVENT_T evt)
166 {
167 IP_SCT_ClearEventFlag(pSCT, (uint32_t) evt);
168 }
169
175 void Chip_SCT_Init(LPC_SCT_T *pSCT);
176
182 void Chip_SCT_DeInit(LPC_SCT_T *pSCT);
183
188 #ifdef __cplusplus
189 }
190
191 #endif
192
193 #endif /* __SCT_8XX_H_ */