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Data Structures | Macros | Enumerations | Functions
IP: USART register block and driver
IP drivers: Common drivers used on multiple NXP devices

## Detailed Description

## Data Structures
struct | IP_USART_001_T
| USART register block structure. More...
struct | UART_RingBuffer_T
| UART Ring buffer structure. More...
struct | UART_AB_CFG_T
| Auto Baudrate mode configuration type definition. More...
struct | UART_FIFO_CFG_T
| UART FIFO Configuration Structure definition. More...

## Macros
#define | UART_BLOCKING_TIMEOUT (0xFFFFFFFFUL)
#define | UART_ACCEPTED_BAUDRATE_ERROR (3)
#define | UART_RBR_MASKBIT ((uint8_t) 0xFF)
| Macro defines for UARTn Receiver Buffer Register.
#define | UART_THR_MASKBIT ((uint8_t) 0xFF)
| Macro defines for UARTn Transmit Holding Register.
#define | UART_LOAD_DLL(div) ((div) & 0xFF)
| Macro defines for UARTn Divisor Latch LSB register.
#define | UART_DLL_MASKBIT ((uint8_t) 0xFF)
#define | UART_DLM_MASKBIT ((uint8_t) 0xFF)
| Macro defines for UARTn Divisor Latch MSB register.
#define | UART_LOAD_DLM(div) (((div) >> 8) & 0xFF)
#define | UART_IER_RBRINT_EN ((uint32_t) (1 << 0))
| Macro defines for UART interrupt enable register.
#define | UART_IER_THREINT_EN ((uint32_t) (1 << 1))
#define | UART_IER_RLSINT_EN ((uint32_t) (1 << 2))
#define | UART_IER_MSINT_EN ((uint32_t) (1 << 3))
#define | UART_IER_CTSINT_EN ((uint32_t) (1 << 7))
#define | UART_IER_ABEOINT_EN ((uint32_t) (1 << 8))
#define | UART_IER_ABTOINT_EN ((uint32_t) (1 << 9))
#define | UART_IER_BITMASK ((uint32_t) (0x307))
#define | UART1_IER_BITMASK ((uint32_t) (0x38F))
#define | UART_IIR_INTSTAT_PEND ((uint32_t) (1 << 0))
| Macro defines for UART interrupt identification register.
#define | UART_IIR_INTID_RLS ((uint32_t) (3 << 1))
#define | UART_IIR_INTID_RDA ((uint32_t) (2 << 1))
#define | UART_IIR_INTID_CTI ((uint32_t) (6 << 1))
#define | UART_IIR_INTID_THRE ((uint32_t) (1 << 1))
#define | UART_IIR_INTID_MODEM ((uint32_t) (0 << 1))
#define | UART_IIR_INTID_MASK ((uint32_t) (7 << 1))
#define | UART_IIR_FIFO_EN ((uint32_t) (3 << 6))
#define | UART_IIR_ABEO_INT ((uint32_t) (1 << 8))
#define | UART_IIR_ABTO_INT ((uint32_t) (1 << 9))
#define | UART_IIR_BITMASK ((uint32_t) (0x3CF))
#define | UART_FCR_FIFO_EN ((uint8_t) (1 << 0))
| Macro defines for UART FIFO control register.
#define | UART_FCR_RX_RS ((uint8_t) (1 << 1))
#define | UART_FCR_TX_RS ((uint8_t) (1 << 2))
#define | UART_FCR_DMAMODE_SEL ((uint8_t) (1 << 3))
#define | UART_FCR_TRG_LEV0 ((uint8_t) (0))
#define | UART_FCR_TRG_LEV1 ((uint8_t) (1 << 6))
#define | UART_FCR_TRG_LEV2 ((uint8_t) (2 << 6))
#define | UART_FCR_TRG_LEV3 ((uint8_t) (3 << 6))
#define | UART_FCR_BITMASK ((uint8_t) (0xCF))
#define | UART_TX_FIFO_SIZE (16)
#define | UART_LCR_WLEN5 ((uint8_t) (0))
| Macro defines for UART line control register.
#define | UART_LCR_WLEN6 ((uint8_t) (1 << 0))
#define | UART_LCR_WLEN7 ((uint8_t) (2 << 0))
#define | UART_LCR_WLEN8 ((uint8_t) (3 << 0))
#define | UART_LCR_SBS_1BIT ((uint8_t) (0 << 2))
#define | UART_LCR_SBS_2BIT ((uint8_t) (1 << 2))
#define | UART_LCR_PARITY_EN ((uint8_t) (1 << 3))
#define | UART_LCR_PARITY_DIS ((uint8_t) (0 << 3))
#define | UART_LCR_PARITY_ODD ((uint8_t) (0))
#define | UART_LCR_PARITY_EVEN ((uint8_t) (1 << 4))
#define | UART_LCR_PARITY_F_1 ((uint8_t) (2 << 4))
#define | UART_LCR_PARITY_F_0 ((uint8_t) (3 << 4))
#define | UART_LCR_BREAK_EN ((uint8_t) (1 << 6))
#define | UART_LCR_DLAB_EN ((uint8_t) (1 << 7))
#define | UART_LCR_BITMASK ((uint8_t) (0xFF))
#define | UART_MCR_DTR_CTRL ((uint8_t) (1 << 0))
| Macro defines for UART Modem control register.
#define | UART_MCR_RTS_CTRL ((uint8_t) (1 << 1))
#define | UART_MCR_LOOPB_EN ((uint8_t) (1 << 4))
#define | UART_MCR_AUTO_RTS_EN ((uint8_t) (1 << 6))
#define | UART_MCR_AUTO_CTS_EN ((uint8_t) (1 << 7))
#define | UART_MCR_BITMASK ((uint8_t) (0x0F3))
#define | UART_LSR_RDR ((uint8_t) (1 << 0))
| Macro defines for UART line status register.
#define | UART_LSR_OE ((uint8_t) (1 << 1))
#define | UART_LSR_PE ((uint8_t) (1 << 2))
#define | UART_LSR_FE ((uint8_t) (1 << 3))
#define | UART_LSR_BI ((uint8_t) (1 << 4))
#define | UART_LSR_THRE ((uint8_t) (1 << 5))
#define | UART_LSR_TEMT ((uint8_t) (1 << 6))
#define | UART_LSR_RXFE ((uint8_t) (1 << 7))
#define | UART_LSR_BITMASK ((uint8_t) (0xFF))
#define | UART_MSR_DELTA_CTS ((uint8_t) (1 << 0))
| Macro defines for UART Modem status register.
#define | UART_MSR_DELTA_DSR ((uint8_t) (1 << 1))
#define | UART_MSR_LO2HI_RI ((uint8_t) (1 << 2))
#define | UART_MSR_DELTA_DCD ((uint8_t) (1 << 3))
#define | UART_MSR_CTS ((uint8_t) (1 << 4))
#define | UART_MSR_DSR ((uint8_t) (1 << 5))
#define | UART_MSR_RI ((uint8_t) (1 << 6))
#define | UART_MSR_DCD ((uint8_t) (1 << 7))
#define | UART_MSR_BITMASK ((uint8_t) (0xFF))
#define | UART_SCR_BIMASK ((uint8_t) (0xFF))
| Macro defines for UART Scratch Pad register.
#define | UART_ACR_START ((uint32_t) (1 << 0))
| Macro defines for UART Auto baudrate control register.
#define | UART_ACR_MODE ((uint32_t) (1 << 1))
#define | UART_ACR_AUTO_RESTART ((uint32_t) (1 << 2))
#define | UART_ACR_ABEOINT_CLR ((uint32_t) (1 << 8))
#define | UART_ACR_ABTOINT_CLR ((uint32_t) (1 << 9))
#define | UART_ACR_BITMASK ((uint32_t) (0x307))
#define | UART_ICR_IRDAEN ((uint32_t) (1 << 0))
| Macro defines for UART IrDA control register.
#define | UART_ICR_IRDAINV ((uint32_t) (1 << 1))
#define | UART_ICR_FIXPULSE_EN ((uint32_t) (1 << 2))
#define | UART_ICR_PULSEDIV(n) ((uint32_t) ((n & 0x07) << 3))
#define | UART_ICR_BITMASK ((uint32_t) (0x3F))
#define | UART_HDEN_HDEN ((uint32_t) (1 << 0))
| Macro defines for UART half duplex register.
#define | UART_SCICTRL_SCIEN ((uint32_t) (1 << 0))
| Macro defines for UART smart card interface control register.
#define | UART_SCICTRL_NACKDIS ((uint32_t) (1 << 1))
#define | UART_SCICTRL_PROTSEL_T1 ((uint32_t) (1 << 2))
#define | UART_SCICTRL_TXRETRY(n) ((uint32_t) ((n & 0x07) << 5))
#define | UART_SCICTRL_GUARDTIME(n) ((uint32_t) ((n & 0xFF) << 8))
#define | UART_SYNCCTRL_SYNC ((uint32_t) (1 << 0))
| Macro defines for UART synchronous control register.
#define | UART_SYNCCTRL_CSRC_MASTER ((uint32_t) (1 << 1))
#define | UART_SYNCCTRL_FES ((uint32_t) (1 << 2))
#define | UART_SYNCCTRL_TSBYPASS ((uint32_t) (1 << 3))
#define | UART_SYNCCTRL_CSCEN ((uint32_t) (1 << 4))
#define | UART_SYNCCTRL_STARTSTOPDISABLE ((uint32_t) (1 << 5))
#define | UART_SYNCCTRL_CCCLR ((uint32_t) (1 << 6))
#define | UART_FDR_DIVADDVAL(n) ((uint32_t) (n & 0x0F))
| Macro defines for UART Fractional divider register.
#define | UART_FDR_MULVAL(n) ((uint32_t) ((n << 4) & 0xF0))
#define | UART_FDR_BITMASK ((uint32_t) (0xFF))
#define | UART_TER1_TXEN ((uint8_t) (1 << 7))
| Macro defines for UART Tx Enable register.
#define | UART_TER1_BITMASK ((uint8_t) (0x80))
#define | UART_TER2_TXEN ((uint8_t) (1 << 0))
#define | UART_TER2_BITMASK ((uint8_t) (0x01))
#define | UART_RS485CTRL_NMM_EN ((uint32_t) (1 << 0))
| Macro defines for UART1 RS485 Control register.
#define | UART_RS485CTRL_RX_DIS ((uint32_t) (1 << 1))
#define | UART_RS485CTRL_AADEN ((uint32_t) (1 << 2))
#define | UART_RS485CTRL_SEL_DTR ((uint32_t) (1 << 3))
#define | UART_RS485CTRL_DCTRL_EN ((uint32_t) (1 << 4))
#define | UART_RS485CTRL_OINV_1 ((uint32_t) (1 << 5))
#define | UART_RS485CTRL_BITMASK ((uint32_t) (0x3F))
#define | UART_RS485ADRMATCH_BITMASK ((uint8_t) (0xFF))
| Macro defines for UART1 RS-485 Address Match register.
#define | UART_RS485DLY_BITMASK ((uint8_t) (0xFF))
| Macro defines for UART1 RS-485 Delay value register.
#define | UART_FIFOLVL_RXFIFOLVL(n) ((uint32_t) (n & 0x0F))
| Macro defines for UART FIFO Level register.
#define | UART_FIFOLVL_TXFIFOLVL(n) ((uint32_t) ((n >> 8) & 0x0F))
#define | UART_FIFOLVL_BITMASK ((uint32_t) (0x0F0F))
#define | UART_RING_BUFSIZE 256
| Macro defines for Ring Buffer.

## Enumerations
enum | IP_UART_LS_T { UART_LINESTAT_RDR = UART_LSR_RDR, UART_LINESTAT_OE = UART_LSR_OE, UART_LINESTAT_PE = UART_LSR_PE, UART_LINESTAT_FE = UART_LSR_FE, UART_LINESTAT_BI = UART_LSR_BI, UART_LINESTAT_THRE = UART_LSR_THRE, UART_LINESTAT_TEMT = UART_LSR_TEMT, UART_LINESTAT_RXFE = UART_LSR_RXFE }
| UART Line Status Type definition. More...
enum | IP_UART_SIGNAL_STATE_T { INACTIVE = 0, ACTIVE = !INACTIVE }
| UART Full modem - Signal states definition. More...
enum | IP_UART_MODEM_STAT_T { UART_MODEM_STAT_DELTA_CTS = UART_MSR_DELTA_CTS, UART_MODEM_STAT_DELTA_DSR = UART_MSR_DELTA_DSR, UART_MODEM_STAT_LO2HI_RI = UART_MSR_LO2HI_RI, UART_MODEM_STAT_DELTA_DCD = UART_MSR_DELTA_DCD, UART_MODEM_STAT_CTS = UART_MSR_CTS, UART_MODEM_STAT_DSR = UART_MSR_DSR, UART_MODEM_STAT_RI = UART_MSR_RI, UART_MODEM_STAT_DCD = UART_MSR_DCD }
| UART modem status type definition. More...
enum | IP_UART_MODEM_PIN_T { UART_MODEM_PIN_DTR = 0, UART_MODEM_PIN_RTS }
| Modem output pin type definition. More...
enum | IP_UART_MODEM_MODE_T { UART_MODEM_MODE_LOOPBACK = 0, UART_MODEM_MODE_AUTO_RTS, UART_MODEM_MODE_AUTO_CTS }
| UART Modem mode type definition. More...
enum | IP_UART_INT_T { UART_INTCFG_RBR = 0, UART_INTCFG_THRE, UART_INTCFG_RLS, UART_INTCFG_MS, UART_INTCFG_CTS, UART_INTCFG_ABEO, UART_INTCFG_ABTO }
| UART Interrupt Type definitions. More...
enum | IP_UART_PARITY_T { UART_PARITY_NONE = 0, UART_PARITY_ODD = (4 << 3), UART_PARITY_EVEN = (5 << 3), UART_PARITY_SP_1 = (6 << 3), UART_PARITY_SP_0 = (7 << 3) }
| UART Parity type definitions. More...
enum | IP_UART_FITO_LEVEL_T { UART_FIFO_TRGLEV0 = 0, UART_FIFO_TRGLEV1, UART_FIFO_TRGLEV2, UART_FIFO_TRGLEV3 }
| FIFO Level type definitions. More...
enum | IP_UART_STOPBIT_T { UART_STOPBIT_1 = 0, UART_STOPBIT_2 = (1 << 2) }
| UART Stop bit type definitions. More...
enum | IP_UART_DATABIT_T { UART_DATABIT_5 = 0, UART_DATABIT_6, UART_DATABIT_7, UART_DATABIT_8 }
| UART Databit type definitions. More...
enum | IP_UART_ID_T { UART_0 = 0, UART_1, UART_2, UART_3, UART_4 }
| UART ID. More...
enum | IP_UART_INT_STATUS_T { UART_INTSTS_ERROR = 1 << 0, UART_INTSTS_RTS = 1 << 1, UART_INTSTS_RTR = 1 << 2, UART_INTSTS_ABEO = UART_IIR_ABEO_INT, UART_INTSTS_ABTO = UART_IIR_ABTO_INT }
| UART Interrupt Status. More...
enum | IP_UART_AB_MODE_T { UART_AUTOBAUD_MODE0 = 0, UART_AUTOBAUD_MODE1 }
| UART Auto-baudrate mode type definition. More...

## Functions
void | IP_UART_Init (IP_USART_001_T *pUART, IP_UART_ID_T UARTPort)
| Initializes the UARTx peripheral according to the specified parameters in the UART_ConfigStruct.
void | IP_UART_DeInit (IP_USART_001_T *pUART, IP_UART_ID_T UARTPort)
| De-initializes the UARTx peripheral registers to their default reset values.
Status | IP_UART_SetBaud (IP_USART_001_T *pUART, uint32_t baudrate, uint32_t uClk)
| Determines best dividers to get a target clock rate.
void | IP_UART_ConfigData (IP_USART_001_T *pUART, IP_UART_DATABIT_T Databits, IP_UART_PARITY_T Parity, IP_UART_STOPBIT_T Stopbits)
| Configure data width, parity mode and stop bits.
Status | IP_UART_SendByte (IP_USART_001_T *pUART, uint8_t data)
| Transmit a single data through UART peripheral.
Status | IP_UART_ReceiveByte (IP_USART_001_T *pUART, uint8_t *Data)
| Receive a single data from UART peripheral.
uint32_t | IP_UART_Send (IP_USART_001_T *pUART, uint8_t *txbuf, uint32_t buflen, TRANSFER_BLOCK_T flag)
| Send a block of data via UART peripheral.
uint32_t | IP_UART_Receive (IP_USART_001_T *pUART, uint8_t *rxbuf, uint32_t buflen, TRANSFER_BLOCK_T flag)
| Receive a block of data via UART peripheral.
void | IP_UART_IntConfig (IP_USART_001_T *pUART, IP_UART_INT_T UARTIntCfg, FunctionalState NewState)
| Enable or disable specified UART interrupt.
uint32_t | IP_UART_IntGetStatus (IP_USART_001_T *pUART)
| Get Source Interrupt.
void | IP_UART_ForceBreak (IP_USART_001_T *pUART)
| Force BREAK character on UART line, output pin UARTx TXD is forced to logic 0.
uint8_t | IP_UART_GetLineStatus (IP_USART_001_T *pUART)
| Get current value of Line Status register in UART peripheral.
FlagStatus | IP_UART_CheckBusy (IP_USART_001_T *pUART)
| Check whether if UART is busy or not.
void | IP_UART_TxCmd (IP_USART_001_T *pUART, IP_UART_ID_T UARTPort, FunctionalState NewState)
| Enable/Disable transmission on UART TxD pin.
void | IP_UART_FIFOConfig (IP_USART_001_T *pUART, UART_FIFO_CFG_T *FIFOCfg)
| Configure FIFO function on selected UART peripheral.
void | IP_UART_FIFOConfigStructInit (UART_FIFO_CFG_T *UART_FIFOInitStruct)
| Fills each UART_FIFOInitStruct member with its default value:
void | IP_UART_ABCmd (IP_USART_001_T *pUART, UART_AB_CFG_T *ABConfigStruct, FunctionalState NewState)
| Start/Stop Auto Baudrate activity.
void | IP_UART_ABClearIntPending (IP_USART_001_T *pUART, IP_UART_INT_STATUS_T ABIntType)
| Clear Autobaud Interrupt.

## Macro Definition Documentation

#define UART1_IER_BITMASK ((uint32_t) (0x38F))

UART1 interrupt enable register bit mask

Definition at line 133 of file usart_001.h.

#define UART_ACCEPTED_BAUDRATE_ERROR (3)

Acceptable UART baudrate error

Definition at line 97 of file usart_001.h.

#define UART_ACR_ABEOINT_CLR ((uint32_t) (1 << 8))

UART End of auto-baud interrupt clear

Definition at line 230 of file usart_001.h.

#define UART_ACR_ABTOINT_CLR ((uint32_t) (1 << 9))

UART Auto-baud time-out interrupt clear

Definition at line 231 of file usart_001.h.

#define UART_ACR_AUTO_RESTART ((uint32_t) (1 << 2))

UART Auto baudrate restart

Definition at line 229 of file usart_001.h.

#define UART_ACR_BITMASK ((uint32_t) (0x307))

UART Auto Baudrate register bit mask

Definition at line 232 of file usart_001.h.

#define UART_ACR_MODE ((uint32_t) (1 << 1))

UART Auto baudrate Mode 1

Definition at line 228 of file usart_001.h.

#define UART_ACR_START ((uint32_t) (1 << 0))

Macro defines for UART Auto baudrate control register.

UART Auto-baud start

Definition at line 227 of file usart_001.h.

#define UART_BLOCKING_TIMEOUT (0xFFFFFFFFUL)

UART time-out definitions in case of using Read/Write function with Blocking Flag mode

Definition at line 95 of file usart_001.h.

#define UART_DLL_MASKBIT ((uint8_t) 0xFF)

Divisor latch LSB bit mask

Definition at line 114 of file usart_001.h.

#define UART_DLM_MASKBIT ((uint8_t) 0xFF)

Macro defines for UARTn Divisor Latch MSB register.

Divisor latch MSB bit mask

Definition at line 119 of file usart_001.h.

#define UART_FCR_BITMASK ((uint8_t) (0xCF))

UART FIFO control bit mask

Definition at line 161 of file usart_001.h.

#define UART_FCR_DMAMODE_SEL ((uint8_t) (1 << 3))

UART DMA mode selection

Definition at line 156 of file usart_001.h.

#define UART_FCR_FIFO_EN ((uint8_t) (1 << 0))

Macro defines for UART FIFO control register.

UART FIFO enable

Definition at line 153 of file usart_001.h.

#define UART_FCR_RX_RS ((uint8_t) (1 << 1))

UART FIFO RX reset

Definition at line 154 of file usart_001.h.

#define UART_FCR_TRG_LEV0 ((uint8_t) (0))

UART FIFO trigger level 0: 1 character

Definition at line 157 of file usart_001.h.

#define UART_FCR_TRG_LEV1 ((uint8_t) (1 << 6))

UART FIFO trigger level 1: 4 character

Definition at line 158 of file usart_001.h.

#define UART_FCR_TRG_LEV2 ((uint8_t) (2 << 6))

UART FIFO trigger level 2: 8 character

Definition at line 159 of file usart_001.h.

#define UART_FCR_TRG_LEV3 ((uint8_t) (3 << 6))

UART FIFO trigger level 3: 14 character

Definition at line 160 of file usart_001.h.

#define UART_FCR_TX_RS ((uint8_t) (1 << 2))

UART FIFO TX reset

Definition at line 155 of file usart_001.h.

#define UART_FDR_BITMASK ((uint32_t) (0xFF))

UART Fractional Divider register bit mask

Definition at line 273 of file usart_001.h.

#define UART_FDR_DIVADDVAL | ( |  | n | ) | ((uint32_t) (n & 0x0F))

Macro defines for UART Fractional divider register.

Baud-rate generation pre-scaler divisor

Definition at line 271 of file usart_001.h.

#define UART_FDR_MULVAL | ( |  | n | ) | ((uint32_t) ((n << 4) & 0xF0))

Baud-rate pre-scaler multiplier value

Definition at line 272 of file usart_001.h.

#define UART_FIFOLVL_BITMASK ((uint32_t) (0x0F0F))

UART FIFO Level Register bit mask

Definition at line 312 of file usart_001.h.

#define UART_FIFOLVL_RXFIFOLVL | ( |  | n | ) | ((uint32_t) (n & 0x0F))

Macro defines for UART FIFO Level register.

Reflects the current level of the UART receiver FIFO

Definition at line 310 of file usart_001.h.

#define UART_FIFOLVL_TXFIFOLVL | ( |  | n | ) | ((uint32_t) ((n >> 8) & 0x0F))

Reflects the current level of the UART transmitter FIFO

Definition at line 311 of file usart_001.h.

#define UART_HDEN_HDEN ((uint32_t) (1 << 0))

Macro defines for UART half duplex register.

enable half-duplex mode

Definition at line 246 of file usart_001.h.

#define UART_ICR_BITMASK ((uint32_t) (0x3F))

UART IRDA bit mask

Definition at line 241 of file usart_001.h.

#define UART_ICR_FIXPULSE_EN ((uint32_t) (1 << 2))

IrDA fixed pulse width mode

Definition at line 239 of file usart_001.h.

#define UART_ICR_IRDAEN ((uint32_t) (1 << 0))

Macro defines for UART IrDA control register.

IrDA mode enable

Definition at line 237 of file usart_001.h.

#define UART_ICR_IRDAINV ((uint32_t) (1 << 1))

IrDA serial input inverted

Definition at line 238 of file usart_001.h.

#define UART_ICR_PULSEDIV | ( |  | n | ) | ((uint32_t) ((n & 0x07) << 3))

PulseDiv - Configures the pulse when FixPulseEn = 1

Definition at line 240 of file usart_001.h.

#define UART_IER_ABEOINT_EN ((uint32_t) (1 << 8))

Enables the end of auto-baud interrupt

Definition at line 130 of file usart_001.h.

#define UART_IER_ABTOINT_EN ((uint32_t) (1 << 9))

Enables the auto-baud time-out interrupt

Definition at line 131 of file usart_001.h.

#define UART_IER_BITMASK ((uint32_t) (0x307))

UART interrupt enable register bit mask

Definition at line 132 of file usart_001.h.

#define UART_IER_CTSINT_EN ((uint32_t) (1 << 7))

CTS1 signal transition interrupt enable

Definition at line 129 of file usart_001.h.

#define UART_IER_MSINT_EN ((uint32_t) (1 << 3))

Modem status interrupt enable

Definition at line 128 of file usart_001.h.

#define UART_IER_RBRINT_EN ((uint32_t) (1 << 0))

Macro defines for UART interrupt enable register.

RBR Interrupt enable

Definition at line 125 of file usart_001.h.

#define UART_IER_RLSINT_EN ((uint32_t) (1 << 2))

RX line status interrupt enable

Definition at line 127 of file usart_001.h.

#define UART_IER_THREINT_EN ((uint32_t) (1 << 1))

THR Interrupt enable

Definition at line 126 of file usart_001.h.

#define UART_IIR_ABEO_INT ((uint32_t) (1 << 8))

End of auto-baud interrupt

Definition at line 146 of file usart_001.h.

#define UART_IIR_ABTO_INT ((uint32_t) (1 << 9))

Auto-baud time-out interrupt

Definition at line 147 of file usart_001.h.

#define UART_IIR_BITMASK ((uint32_t) (0x3CF))

UART interrupt identification register bit mask

Definition at line 148 of file usart_001.h.

#define UART_IIR_FIFO_EN ((uint32_t) (3 << 6))

These bits are equivalent to UnFCR[0]

Definition at line 145 of file usart_001.h.

#define UART_IIR_INTID_CTI ((uint32_t) (6 << 1))

Interrupt identification: Character time-out indicator

Definition at line 141 of file usart_001.h.

#define UART_IIR_INTID_MASK ((uint32_t) (7 << 1))

Interrupt identification: Interrupt ID mask

Definition at line 144 of file usart_001.h.

#define UART_IIR_INTID_MODEM ((uint32_t) (0 << 1))

Interrupt identification: Modem interrupt

Definition at line 143 of file usart_001.h.

#define UART_IIR_INTID_RDA ((uint32_t) (2 << 1))

Interrupt identification: Receive data available

Definition at line 140 of file usart_001.h.

#define UART_IIR_INTID_RLS ((uint32_t) (3 << 1))

Interrupt identification: Receive line status

Definition at line 139 of file usart_001.h.

#define UART_IIR_INTID_THRE ((uint32_t) (1 << 1))

Interrupt identification: THRE interrupt

Definition at line 142 of file usart_001.h.

#define UART_IIR_INTSTAT_PEND ((uint32_t) (1 << 0))

Macro defines for UART interrupt identification register.

Interrupt Status - Active low

Definition at line 138 of file usart_001.h.

#define UART_LCR_BITMASK ((uint8_t) (0xFF))

UART line control bit mask

Definition at line 181 of file usart_001.h.

#define UART_LCR_BREAK_EN ((uint8_t) (1 << 6))

UART Transmission Break enable

Definition at line 179 of file usart_001.h.

#define UART_LCR_DLAB_EN ((uint8_t) (1 << 7))

UART Divisor Latches Access bit enable

Definition at line 180 of file usart_001.h.

#define UART_LCR_PARITY_DIS ((uint8_t) (0 << 3))

UART Parity Disable

Definition at line 174 of file usart_001.h.

#define UART_LCR_PARITY_EN ((uint8_t) (1 << 3))

UART Parity Enable

Definition at line 173 of file usart_001.h.

#define UART_LCR_PARITY_EVEN ((uint8_t) (1 << 4))

UART Even Parity Select

Definition at line 176 of file usart_001.h.

#define UART_LCR_PARITY_F_0 ((uint8_t) (3 << 4))

UART force 0 stick parity

Definition at line 178 of file usart_001.h.

#define UART_LCR_PARITY_F_1 ((uint8_t) (2 << 4))

UART force 1 stick parity

Definition at line 177 of file usart_001.h.

#define UART_LCR_PARITY_ODD ((uint8_t) (0))

UART Odd Parity Select

Definition at line 175 of file usart_001.h.

#define UART_LCR_SBS_1BIT ((uint8_t) (0 << 2))

UART One Stop Bit Select

Definition at line 171 of file usart_001.h.

#define UART_LCR_SBS_2BIT ((uint8_t) (1 << 2))

UART Two Stop Bits Select

Definition at line 172 of file usart_001.h.

#define UART_LCR_WLEN5 ((uint8_t) (0))

Macro defines for UART line control register.

UART 5 bit data mode

Definition at line 167 of file usart_001.h.

#define UART_LCR_WLEN6 ((uint8_t) (1 << 0))

UART 6 bit data mode

Definition at line 168 of file usart_001.h.

#define UART_LCR_WLEN7 ((uint8_t) (2 << 0))

UART 7 bit data mode

Definition at line 169 of file usart_001.h.

#define UART_LCR_WLEN8 ((uint8_t) (3 << 0))

UART 8 bit data mode

Definition at line 170 of file usart_001.h.

#define UART_LOAD_DLL | ( |  | div | ) | ((div) & 0xFF)

Macro defines for UARTn Divisor Latch LSB register.

Macro for loading least significant halfs of divisors

Definition at line 113 of file usart_001.h.

#define UART_LOAD_DLM | ( |  | div | ) | (((div) >> 8) & 0xFF)

Macro for loading most significant halfs of divisors

Definition at line 120 of file usart_001.h.

#define UART_LSR_BI ((uint8_t) (1 << 4))

Line status register: Break interrupt

Definition at line 200 of file usart_001.h.

#define UART_LSR_BITMASK ((uint8_t) (0xFF))

UART Line status bit mask

Definition at line 204 of file usart_001.h.

#define UART_LSR_FE ((uint8_t) (1 << 3))

Line status register: Framing error

Definition at line 199 of file usart_001.h.

#define UART_LSR_OE ((uint8_t) (1 << 1))

Line status register: Overrun error

Definition at line 197 of file usart_001.h.

#define UART_LSR_PE ((uint8_t) (1 << 2))

Line status register: Parity error

Definition at line 198 of file usart_001.h.

#define UART_LSR_RDR ((uint8_t) (1 << 0))

Macro defines for UART line status register.

Line status register: Receive data ready

Definition at line 196 of file usart_001.h.

#define UART_LSR_RXFE ((uint8_t) (1 << 7))

Error in RX FIFO

Definition at line 203 of file usart_001.h.

#define UART_LSR_TEMT ((uint8_t) (1 << 6))

Line status register: Transmitter empty

Definition at line 202 of file usart_001.h.

#define UART_LSR_THRE ((uint8_t) (1 << 5))

Line status register: Transmit holding register empty

Definition at line 201 of file usart_001.h.

#define UART_MCR_AUTO_CTS_EN ((uint8_t) (1 << 7))

Enable Auto CTS flow-control

Definition at line 190 of file usart_001.h.

#define UART_MCR_AUTO_RTS_EN ((uint8_t) (1 << 6))

Enable Auto RTS flow-control

Definition at line 189 of file usart_001.h.

#define UART_MCR_BITMASK ((uint8_t) (0x0F3))

UART1 bit mask value

Definition at line 191 of file usart_001.h.

#define UART_MCR_DTR_CTRL ((uint8_t) (1 << 0))

Macro defines for UART Modem control register.

Source for modem output pin DTR

Definition at line 186 of file usart_001.h.

#define UART_MCR_LOOPB_EN ((uint8_t) (1 << 4))

Loop back mode select

Definition at line 188 of file usart_001.h.

#define UART_MCR_RTS_CTRL ((uint8_t) (1 << 1))

Source for modem output pin RTS

Definition at line 187 of file usart_001.h.

#define UART_MSR_BITMASK ((uint8_t) (0xFF))

MSR register bit-mask value

Definition at line 217 of file usart_001.h.

#define UART_MSR_CTS ((uint8_t) (1 << 4))

Clear To Send State

Definition at line 213 of file usart_001.h.

#define UART_MSR_DCD ((uint8_t) (1 << 7))

Data Carrier Detect State

Definition at line 216 of file usart_001.h.

#define UART_MSR_DELTA_CTS ((uint8_t) (1 << 0))

Macro defines for UART Modem status register.

Set upon state change of input CTS

Definition at line 209 of file usart_001.h.

#define UART_MSR_DELTA_DCD ((uint8_t) (1 << 3))

Set upon state change of input DCD

Definition at line 212 of file usart_001.h.

#define UART_MSR_DELTA_DSR ((uint8_t) (1 << 1))

Set upon state change of input DSR

Definition at line 210 of file usart_001.h.

#define UART_MSR_DSR ((uint8_t) (1 << 5))

Data Set Ready State

Definition at line 214 of file usart_001.h.

#define UART_MSR_LO2HI_RI ((uint8_t) (1 << 2))

Set upon low to high transition of input RI

Definition at line 211 of file usart_001.h.

#define UART_MSR_RI ((uint8_t) (1 << 6))

Ring Indicator State

Definition at line 215 of file usart_001.h.

#define UART_RBR_MASKBIT ((uint8_t) 0xFF)

Macro defines for UARTn Receiver Buffer Register.

UART Received Buffer mask bit (8 bits)

Definition at line 103 of file usart_001.h.

#define UART_RING_BUFSIZE 256

Macro defines for Ring Buffer.

buffer size definition

Definition at line 317 of file usart_001.h.

#define UART_RS485ADRMATCH_BITMASK ((uint8_t) (0xFF))

Macro defines for UART1 RS-485 Address Match register.

Bit mask value

Definition at line 300 of file usart_001.h.

#define UART_RS485CTRL_AADEN ((uint32_t) (1 << 2))

Auto Address Detect (AAD) is enabled

Definition at line 288 of file usart_001.h.

#define UART_RS485CTRL_BITMASK ((uint32_t) (0x3F))

RS485 control bit-mask value

Definition at line 295 of file usart_001.h.

#define UART_RS485CTRL_DCTRL_EN ((uint32_t) (1 << 4))

Enable Auto Direction Control

Definition at line 291 of file usart_001.h.

#define UART_RS485CTRL_NMM_EN ((uint32_t) (1 << 0))

Macro defines for UART1 RS485 Control register.

RS-485/EIA-485 Normal Multi-drop Mode (NMM) is disabled

Definition at line 286 of file usart_001.h.

#define UART_RS485CTRL_OINV_1 ((uint32_t) (1 << 5))

This bit reverses the polarity of the direction control signal on the RTS (or DTR) pin. The direction control pin will be driven to logic "1" when the transmitter has data to be sent

Definition at line 292 of file usart_001.h.

#define UART_RS485CTRL_RX_DIS ((uint32_t) (1 << 1))

The receiver is disabled

Definition at line 287 of file usart_001.h.

#define UART_RS485CTRL_SEL_DTR ((uint32_t) (1 << 3))

If direction control is enabled (bit DCTRL = 1), pin DTR is used for direction control

Definition at line 289 of file usart_001.h.

#define UART_RS485DLY_BITMASK ((uint8_t) (0xFF))

Macro defines for UART1 RS-485 Delay value register.

Bit mask value

Definition at line 305 of file usart_001.h.

#define UART_SCICTRL_GUARDTIME | ( |  | n | ) | ((uint32_t) ((n & 0xFF) << 8))

Extra guard time

Definition at line 255 of file usart_001.h.

#define UART_SCICTRL_NACKDIS ((uint32_t) (1 << 1))

NACK response is inhibited

Definition at line 252 of file usart_001.h.

#define UART_SCICTRL_PROTSEL_T1 ((uint32_t) (1 << 2))

ISO7816-3 protocol T1 is selected

Definition at line 253 of file usart_001.h.

#define UART_SCICTRL_SCIEN ((uint32_t) (1 << 0))

Macro defines for UART smart card interface control register.

enable asynchronous half-duplex smart card interface

Definition at line 251 of file usart_001.h.

#define UART_SCICTRL_TXRETRY | ( |  | n | ) | ((uint32_t) ((n & 0x07) << 5))

number of retransmission

Definition at line 254 of file usart_001.h.

#define UART_SCR_BIMASK ((uint8_t) (0xFF))

Macro defines for UART Scratch Pad register.

UART Scratch Pad bit mask

Definition at line 222 of file usart_001.h.

#define UART_SYNCCTRL_CCCLR ((uint32_t) (1 << 6))

stop continuous clock

Definition at line 266 of file usart_001.h.

#define UART_SYNCCTRL_CSCEN ((uint32_t) (1 << 4))

continuous running clock enable (master mode only)

Definition at line 264 of file usart_001.h.

#define UART_SYNCCTRL_CSRC_MASTER ((uint32_t) (1 << 1))

synchronous master mode

Definition at line 261 of file usart_001.h.

#define UART_SYNCCTRL_FES ((uint32_t) (1 << 2))

sample on falling edge

Definition at line 262 of file usart_001.h.

#define UART_SYNCCTRL_STARTSTOPDISABLE ((uint32_t) (1 << 5))

do not send start/stop bit

Definition at line 265 of file usart_001.h.

#define UART_SYNCCTRL_SYNC ((uint32_t) (1 << 0))

Macro defines for UART synchronous control register.

enable synchronous mode

Definition at line 260 of file usart_001.h.

#define UART_SYNCCTRL_TSBYPASS ((uint32_t) (1 << 3))

to be defined

Definition at line 263 of file usart_001.h.

#define UART_TER1_BITMASK ((uint8_t) (0x80))

UART Transmit Enable Register bit mask

Definition at line 279 of file usart_001.h.

#define UART_TER1_TXEN ((uint8_t) (1 << 7))

Macro defines for UART Tx Enable register.

Transmit enable bit

Definition at line 278 of file usart_001.h.

#define UART_TER2_BITMASK ((uint8_t) (0x01))

UART Transmit Enable Register bit mask

Definition at line 281 of file usart_001.h.

#define UART_TER2_TXEN ((uint8_t) (1 << 0))

Transmit enable bit

Definition at line 280 of file usart_001.h.

#define UART_THR_MASKBIT ((uint8_t) 0xFF)

Macro defines for UARTn Transmit Holding Register.

UART Transmit Holding mask bit (8 bits)

Definition at line 108 of file usart_001.h.

#define UART_TX_FIFO_SIZE (16)

Definition at line 162 of file usart_001.h.

## Enumeration Type Documentation

enum IP_UART_AB_MODE_T

UART Auto-baudrate mode type definition.

Enumerator:

  UART_AUTOBAUD_MODE0 | UART Auto baudrate Mode 0
  UART_AUTOBAUD_MODE1 | UART Auto baudrate Mode 1

Definition at line 467 of file usart_001.h.

enum IP_UART_DATABIT_T

UART Databit type definitions.

Enumerator:

  UART_DATABIT_5 | UART 5 bit data mode
  UART_DATABIT_6 | UART 6 bit data mode
  UART_DATABIT_7 | UART 7 bit data mode
  UART_DATABIT_8 | UART 8 bit data mode

Definition at line 435 of file usart_001.h.

enum IP_UART_FITO_LEVEL_T

FIFO Level type definitions.

Enumerator:

  UART_FIFO_TRGLEV0 | UART FIFO trigger level 0: 1 character
  UART_FIFO_TRGLEV1 | UART FIFO trigger level 1: 4 character
  UART_FIFO_TRGLEV2 | UART FIFO trigger level 2: 8 character
  UART_FIFO_TRGLEV3 | UART FIFO trigger level 3: 14 character

Definition at line 417 of file usart_001.h.

enum IP_UART_ID_T

UART ID.

Enumerator:

  UART_0 |
  UART_1 |
  UART_2 |
  UART_3 |
  UART_4 |

Definition at line 445 of file usart_001.h.

enum IP_UART_INT_STATUS_T

UART Interrupt Status.

Enumerator:

  UART_INTSTS_ERROR | UART Interrupt Error
  UART_INTSTS_RTS | UART Interrupt status: Ready to Send
  UART_INTSTS_RTR | UART Interrupt status: Ready to Receive
  UART_INTSTS_ABEO | UART End of auto-baud interrupt
  UART_INTSTS_ABTO | UART Auto-baud time-out interrupt

Definition at line 456 of file usart_001.h.

enum IP_UART_INT_T

UART Interrupt Type definitions.

Enumerator:

  UART_INTCFG_RBR | RBR Interrupt enable
  UART_INTCFG_THRE | THR Interrupt enable
  UART_INTCFG_RLS | RX line status interrupt enable
  UART_INTCFG_MS | Modem status interrupt enable
  UART_INTCFG_CTS | CTS1 signal transition interrupt enable
  UART_INTCFG_ABEO | Enables the end of auto-baud interrupt
  UART_INTCFG_ABTO | Enables the auto-baud time-out interrupt

Definition at line 393 of file usart_001.h.

enum IP_UART_LS_T

UART Line Status Type definition.

Enumerator:

  UART_LINESTAT_RDR | Line status register: Receive data ready
  UART_LINESTAT_OE | Line status register: Overrun error
  UART_LINESTAT_PE | Line status register: Parity error
  UART_LINESTAT_FE | Line status register: Framing error
  UART_LINESTAT_BI | Line status register: Break interrupt
  UART_LINESTAT_THRE | Line status register: Transmit holding register empty
  UART_LINESTAT_TEMT | Line status register: Transmitter empty
  UART_LINESTAT_RXFE | Error in RX FIFO

Definition at line 340 of file usart_001.h.

enum IP_UART_MODEM_MODE_T

UART Modem mode type definition.

Enumerator:

  UART_MODEM_MODE_LOOPBACK | Loop back mode select
  UART_MODEM_MODE_AUTO_RTS | Enable Auto RTS flow-control
  UART_MODEM_MODE_AUTO_CTS | Enable Auto CTS flow-control

Definition at line 384 of file usart_001.h.

enum IP_UART_MODEM_PIN_T

Modem output pin type definition.

Enumerator:

  UART_MODEM_PIN_DTR | Source for modem output pin DTR
  UART_MODEM_PIN_RTS | Source for modem output pin RTS

Definition at line 376 of file usart_001.h.

enum IP_UART_MODEM_STAT_T

UART modem status type definition.

Enumerator:

  UART_MODEM_STAT_DELTA_CTS | Set upon state change of input CTS
  UART_MODEM_STAT_DELTA_DSR | Set upon state change of input DSR
  UART_MODEM_STAT_LO2HI_RI | Set upon low to high transition of input RI
  UART_MODEM_STAT_DELTA_DCD | Set upon state change of input DCD
  UART_MODEM_STAT_CTS | Clear To Send State
  UART_MODEM_STAT_DSR | Data Set Ready State
  UART_MODEM_STAT_RI | Ring Indicator State
  UART_MODEM_STAT_DCD | Data Carrier Detect State

Definition at line 362 of file usart_001.h.

enum IP_UART_PARITY_T

UART Parity type definitions.

Enumerator:

  UART_PARITY_NONE | No parity
  UART_PARITY_ODD | Odd parity
  UART_PARITY_EVEN | Even parity
  UART_PARITY_SP_1 | Forced "1" stick parity
  UART_PARITY_SP_0 | Forced "0" stick parity

Definition at line 406 of file usart_001.h.

enum IP_UART_SIGNAL_STATE_T

UART Full modem - Signal states definition.

Enumerator:

  INACTIVE | In-active state
  ACTIVE | Active state

Definition at line 354 of file usart_001.h.

enum IP_UART_STOPBIT_T

UART Stop bit type definitions.

Enumerator:

  UART_STOPBIT_1 | UART One Stop Bit Select
  UART_STOPBIT_2 | UART Two Stop Bits Select

Definition at line 427 of file usart_001.h.

## Function Documentation

void IP_UART_ABClearIntPending | ( | IP_USART_001_T * | pUART,
|  | IP_UART_INT_STATUS_T | ABIntType
| ) |  |

Clear Autobaud Interrupt.

Parameters

  pUART | : Pointer to selected UARTx peripheral
  ABIntType | : type of auto-baud interrupt, should be: UART_AUTOBAUD_INTSTAT_ABEO: End of Auto-baud interrupt UART_AUTOBAUD_INTSTAT_ABTO: Auto-baud time out interrupt

Returns
  Nothing

Definition at line 551 of file usart_001.c.

void IP_UART_ABCmd | ( | IP_USART_001_T * | pUART,
|  | UART_AB_CFG_T * | ABConfigStruct,
|  | FunctionalState | NewState
| ) |  |

Start/Stop Auto Baudrate activity.

Parameters

  pUART | : Pointer to selected UARTx peripheral
  ABConfigStruct | : A pointer to UART_AB_CFG_T structure that contains specified information about UAR auto baud configuration
  NewState | : New State of Auto baudrate activity, should be ENABLE or DISABLE

Returns
  Nothing

Note
  Auto-baudrate mode enable bit will be cleared once this mode completed.

Definition at line 525 of file usart_001.c.

FlagStatus IP_UART_CheckBusy | ( | IP_USART_001_T * | pUART | ) |

Check whether if UART is busy or not.

Parameters

  pUART | : Pointer to selected UARTx peripheral

Returns
  RESET if UART is not busy, otherwise return SET.

Definition at line 420 of file usart_001.c.

void IP_UART_ConfigData | ( | IP_USART_001_T * | pUART,
|  | IP_UART_DATABIT_T | Databits,
|  | IP_UART_PARITY_T | Parity,
|  | IP_UART_STOPBIT_T | Stopbits
| ) |  |

Configure data width, parity mode and stop bits.

Parameters

  pUART | : Pointer to selected UARTx peripheral
  Databits | : UART Data width, should be: UART_DATABIT_5: UART 5 bit data mode UART_DATABIT_6: UART 6 bit data mode UART_DATABIT_7: UART 7 bit data mode UART_DATABIT_8: UART 8 bit data mode
  Parity | : UART Parity mode, should be: UART_PARITY_NONE: No parity UART_PARITY_ODD: Odd parity UART_PARITY_EVEN: Even parity UART_PARITY_SP_1: Forced "1" stick parity UART_PARITY_SP_0: Forced "0" stick parity
  Stopbits | : Number of stop bits, should be: UART_STOPBIT_1: One Stop Bit Select UART_STOPBIT_2: Two Stop Bits Select

Returns
  Nothing

Definition at line 236 of file usart_001.c.

void IP_UART_DeInit | ( | IP_USART_001_T * | pUART,
|  | IP_UART_ID_T | UARTPort
| ) |  |

De-initializes the UARTx peripheral registers to their default reset values.

Parameters

  pUART | : Pointer to selected UARTx peripheral
  UARTPort | : UART ID type

Returns
  Nothing

Definition at line 139 of file usart_001.c.

void IP_UART_FIFOConfig | ( | IP_USART_001_T * | pUART,
|  | UART_FIFO_CFG_T * | FIFOCfg
| ) |  |

Configure FIFO function on selected UART peripheral.

Parameters

  pUART | : Pointer to selected UARTx peripheral
  FIFOCfg | : Pointer to a UART_FIFO_CFG_T Structure that contains specified information about FIFO configuration

Returns
  Nothing

Definition at line 477 of file usart_001.c.

void IP_UART_FIFOConfigStructInit | ( | UART_FIFO_CFG_T * | UART_FIFOInitStruct | ) |

Fills each UART_FIFOInitStruct member with its default value:

- FIFO_DMAMode = DISABLE
- FIFO_Level = UART_FIFO_TRGLEV0
- FIFO_ResetRxBuf = ENABLE
- FIFO_ResetTxBuf = ENABLE
- FIFO_State = ENABLE
  Parameters

    UART_FIFOInitStruct | : Pointer to a UART_FIFO_CFG_T structure which will be initialized.

  Returns
    Nothing

Definition at line 516 of file usart_001.c.

void IP_UART_ForceBreak | ( | IP_USART_001_T * | pUART | ) |

Force BREAK character on UART line, output pin UARTx TXD is forced to logic 0.

Parameters

  pUART | : Pointer to selected UARTx peripheral

Returns
  Nothing

Definition at line 408 of file usart_001.c.

uint8_t IP_UART_GetLineStatus | ( | IP_USART_001_T * | pUART | ) |

Get current value of Line Status register in UART peripheral.

Parameters

  pUART | : Pointer to selected UARTx peripheral

Returns
  Current value of Line Status register in UART peripheral

Note
  The return value of this function must be ANDed with each member in UART_LS_T enumeration to determine current flag status corresponding to each Line status type. Because some flags in Line Status register will be cleared after reading, the next reading Line Status register could not be correct. So this function used to read Line status register in one time only, then the return value used to check all flags.

Definition at line 414 of file usart_001.c.

void IP_UART_Init | ( | IP_USART_001_T * | pUART,
|  | IP_UART_ID_T | UARTPort
| ) |  |

Initializes the UARTx peripheral according to the specified parameters in the UART_ConfigStruct.

Parameters

  pUART | : Pointer to selected UARTx peripheral
  UARTPort | : UART ID type

Returns
  Nothing

Definition at line 52 of file usart_001.c.

void IP_UART_IntConfig | ( | IP_USART_001_T * | pUART,
|  | IP_UART_INT_T | UARTIntCfg,
|  | FunctionalState | NewState
| ) |  |

Enable or disable specified UART interrupt.

Parameters

  pUART | : Pointer to selected UARTx peripheral
  UARTIntCfg | : Specifies the interrupt flag, should be one of the following: UART_INTCFG_RBR : RBR Interrupt enable UART_INTCFG_THRE : THR Interrupt enable UART_INTCFG_RLS : RX line status interrupt enable UART1_INTCFG_MS : Modem status interrupt enable (UART1 only) UART1_INTCFG_CTS : CTS1 signal transition interrupt enable (UART1 only) UART_INTCFG_ABEO : Enables the end of auto-baud interrupt UART_INTCFG_ABTO : Enables the auto-baud time-out interrupt
  NewState | : New state of specified UART interrupt type, should be: ENALBE : Enable this UART interrupt type DISALBE : Disable this UART interrupt type

Returns
  Nothing

Definition at line 357 of file usart_001.c.

uint32_t IP_UART_IntGetStatus | ( | IP_USART_001_T * | pUART | ) |

Get Source Interrupt.

Parameters

  pUART | : Pointer to selected UARTx peripheral

Returns
  Return the value of IIR register

Definition at line 402 of file usart_001.c.

uint32_t IP_UART_Receive | ( | IP_USART_001_T * | pUART,
|  | uint8_t * | rxbuf,
|  | uint32_t | buflen,
|  | TRANSFER_BLOCK_T | flag
| ) |  |

Receive a block of data via UART peripheral.

Parameters

  pUART | : Pointer to selected UARTx peripheral
  rxbuf | : Pointer to Received buffer
  buflen | : Length of Received buffer
  flag | : Flag mode, should be NONE_BLOCKING or BLOCKING

Returns
  Number of bytes received

Note
  Note: when using UART in BLOCKING mode, a time-out condition is used via defined symbol UART_BLOCKING_TIMEOUT.

Definition at line 312 of file usart_001.c.

Status IP_UART_ReceiveByte | ( | IP_USART_001_T * | pUART,
|  | uint8_t * | Data
| ) |  |

Receive a single data from UART peripheral.

Parameters

  pUART | : Pointer to selected UARTx peripheral
  *Data | : Pointer to Data to receive (must be 8-bit long)

Returns
  Status, should be ERROR or (Receive data is ready) or SUCCESS (Receive data is not ready yet)

Definition at line 258 of file usart_001.c.

uint32_t IP_UART_Send | ( | IP_USART_001_T * | pUART,
|  | uint8_t * | txbuf,
|  | uint32_t | buflen,
|  | TRANSFER_BLOCK_T | flag
| ) |  |

Send a block of data via UART peripheral.

Parameters

  pUART | : Pointer to selected UARTx peripheral
  txbuf | : Pointer to Transmit buffer
  buflen | : Length of Transmit buffer
  flag | : Flag used in UART transfer, should be NONE_BLOCKING or BLOCKING

Returns
  Number of bytes sent

Note: when using UART in BLOCKING mode, a time-out condition is used via defined symbol UART_BLOCKING_TIMEOUT.

Definition at line 268 of file usart_001.c.

Status IP_UART_SendByte | ( | IP_USART_001_T * | pUART,
|  | const uint8_t | data
| ) |  |

Transmit a single data through UART peripheral.

Parameters

  pUART | : Pointer to selected UARTx peripheral
  data | : Data to transmit (must be 8-bit long)

Returns
  Status, should be ERROR (THR is empty, ready to send) or SUCCESS (THR is not empty)

Transmit a single data through UART peripheral.

Parameters

  pUART | : Pointer to selected UART peripheral
  data | : Byte to transmit

Returns
  Nothing

Note
  This function attempts to place a byte into the UART transmit FIFO or transmit hold register regard regardless of UART state.

Definition at line 248 of file usart_001.c.

Status IP_UART_SetBaud | ( | IP_USART_001_T * | pUART,
|  | uint32_t | baudrate,
|  | uint32_t | uClk
| ) |  |

Determines best dividers to get a target clock rate.

Parameters

  pUART | : Pointer to selected UARTx peripheral
  baudrate | : Desired UART baud rate.
  uClk | : Current Uart Block Clock.

Returns
  Error status, could be SUCCESS or ERROR

Definition at line 153 of file usart_001.c.

void IP_UART_TxCmd | ( | IP_USART_001_T * | pUART,
|  | IP_UART_ID_T | UARTPort,
|  | FunctionalState | NewState
| ) |  |

Enable/Disable transmission on UART TxD pin.

Parameters

  pUART | : Pointer to selected UARTx peripheral
  UARTPort | : UART ID type
  NewState | : New State of Tx transmission function, should be ENABLE or DISABLE

Returns
  Nothing

Definition at line 431 of file usart_001.c.