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UART_FIFO_CFG_T Struct Reference
IP: USART register block and driver

## Detailed Description

UART FIFO Configuration Structure definition.

Definition at line 483 of file usart_001.h.

`#include "usart_001.h"`

## Data Fields
FunctionalState | FIFO_ResetRxBuf
FunctionalState | FIFO_ResetTxBuf
FunctionalState | FIFO_DMAMode
IP_UART_FITO_LEVEL_T | FIFO_Level

## Field Documentation

FunctionalState FIFO_DMAMode

DMA mode, should be:

- ENABLE: Enable DMA mode in UART
- DISABLE: Disable DMA mode in UART

Definition at line 492 of file usart_001.h.

IP_UART_FITO_LEVEL_T FIFO_Level

Rx FIFO trigger level, should be:

- UART_FIFO_TRGLEV0: UART FIFO trigger level 0: 1 character
- UART_FIFO_TRGLEV1: UART FIFO trigger level 1: 4 character
- UART_FIFO_TRGLEV2: UART FIFO trigger level 2: 8 character
- UART_FIFO_TRGLEV3: UART FIFO trigger level 3: 14 character

Definition at line 496 of file usart_001.h.

FunctionalState FIFO_ResetRxBuf

Reset Rx FIFO command state , should be:

- ENABLE: Reset Rx FIFO in UART
- DISABLE: Do not reset Rx FIFO in UART

Definition at line 484 of file usart_001.h.

FunctionalState FIFO_ResetTxBuf

Reset Tx FIFO command state , should be:

- ENABLE: Reset Tx FIFO in UART
- DISABLE: Do not reset Tx FIFO in UART

Definition at line 488 of file usart_001.h.

The documentation for this struct was generated from the following file:

- C:/nxp/v1.03/lpcopen_v1.03/lpcopen/software/lpc_core/lpc_ip/usart_001.h