| LPCOpen Platform v1.03 LPCOpen Platform for NXP LPC Microcontrollers

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Data Structures | Macros | Typedefs | Functions
sdmmc_001.h File Reference
`#include "sys_config.h"`
`#include "cmsis.h"`

Go to the source code of this file.

## Data Structures
struct | IP_SDMMC_001_T
| SD/MMC & SDIO register block structure. More...
struct | pSDMMC_DMA_T
| SDIO chained DMA descriptor. More...
struct | sdif_device
| SDIO device type. More...

## Macros
#define | MCI_DMADES0_OWN (1UL << 31)
| SDIO DMA descriptor control (des0) register defines.
#define | MCI_DMADES0_CES (1 << 30)
#define | MCI_DMADES0_ER (1 << 5)
#define | MCI_DMADES0_CH (1 << 4)
#define | MCI_DMADES0_FS (1 << 3)
#define | MCI_DMADES0_LD (1 << 2)
#define | MCI_DMADES0_DIC (1 << 1)
#define | MCI_DMADES1_BS1(x) (x)
| SDIO DMA descriptor size (des1) register defines.
#define | MCI_DMADES1_BS2(x) ((x) << 13)
#define | MCI_DMADES1_MAXTR 4096
#define | MCI_CTRL_USE_INT_DMAC (1 << 25)
| SDIO control register defines.
#define | MCI_CTRL_CARDV_MASK (0x7 << 16)
#define | MCI_CTRL_CEATA_INT_EN (1 << 11)
#define | MCI_CTRL_SEND_AS_CCSD (1 << 10)
#define | MCI_CTRL_SEND_CCSD (1 << 9)
#define | MCI_CTRL_ABRT_READ_DATA (1 << 8)
#define | MCI_CTRL_SEND_IRQ_RESP (1 << 7)
#define | MCI_CTRL_READ_WAIT (1 << 6)
#define | MCI_CTRL_INT_ENABLE (1 << 4)
#define | MCI_CTRL_DMA_RESET (1 << 2)
#define | MCI_CTRL_FIFO_RESET (1 << 1)
#define | MCI_CTRL_RESET (1 << 0)
#define | MCI_POWER_ENABLE 0x1
| SDIO Power Enable register defines.
#define | MCI_CLOCK_DIVIDER(dn, d2) ((d2) << ((dn) * 8))
| SDIO Clock divider register defines.
#define | MCI_CLKSRC_CLKDIV0 0
| SDIO Clock source register defines.
#define | MCI_CLKSRC_CLKDIV1 1
#define | MCI_CLKSRC_CLKDIV2 2
#define | MCI_CLKSRC_CLKDIV3 3
#define | MCI_CLK_SOURCE(clksrc) (clksrc)
#define | MCI_CLKEN_LOW_PWR (1 << 16)
| SDIO Clock Enable register defines.
#define | MCI_CLKEN_ENABLE (1 << 0)
#define | MCI_TMOUT_DATA(clks) ((clks) << 8)
| SDIO time-out register defines.
#define | MCI_TMOUT_DATA_MSK 0xFFFFFF00
#define | MCI_TMOUT_RESP(clks) ((clks) & 0xFF)
#define | MCI_TMOUT_RESP_MSK 0xFF
#define | MCI_CTYPE_8BIT (1 << 16)
| SDIO card-type register defines.
#define | MCI_CTYPE_4BIT (1 << 0)
#define | MCI_INT_SDIO (1 << 16)
| SDIO Interrupt status & mask register defines.
#define | MCI_INT_EBE (1 << 15)
#define | MCI_INT_ACD (1 << 14)
#define | MCI_INT_SBE (1 << 13)
#define | MCI_INT_HLE (1 << 12)
#define | MCI_INT_FRUN (1 << 11)
#define | MCI_INT_HTO (1 << 10)
#define | MCI_INT_DTO (1 << 9)
#define | MCI_INT_RTO (1 << 8)
#define | MCI_INT_DCRC (1 << 7)
#define | MCI_INT_RCRC (1 << 6)
#define | MCI_INT_RXDR (1 << 5)
#define | MCI_INT_TXDR (1 << 4)
#define | MCI_INT_DATA_OVER (1 << 3)
#define | MCI_INT_CMD_DONE (1 << 2)
#define | MCI_INT_RESP_ERR (1 << 1)
#define | MCI_INT_CD (1 << 0)
#define | MCI_CMD_START (1UL << 31)
| SDIO Command register defines.
#define | MCI_CMD_VOLT_SWITCH (1 << 28)
#define | MCI_CMD_BOOT_MODE (1 << 27)
#define | MCI_CMD_DISABLE_BOOT (1 << 26)
#define | MCI_CMD_EXPECT_BOOT_ACK (1 << 25)
#define | MCI_CMD_ENABLE_BOOT (1 << 24)
#define | MCI_CMD_CCS_EXP (1 << 23)
#define | MCI_CMD_CEATA_RD (1 << 22)
#define | MCI_CMD_UPD_CLK (1 << 21)
#define | MCI_CMD_INIT (1 << 15)
#define | MCI_CMD_STOP (1 << 14)
#define | MCI_CMD_PRV_DAT_WAIT (1 << 13)
#define | MCI_CMD_SEND_STOP (1 << 12)
#define | MCI_CMD_STRM_MODE (1 << 11)
#define | MCI_CMD_DAT_WR (1 << 10)
#define | MCI_CMD_DAT_EXP (1 << 9)
#define | MCI_CMD_RESP_CRC (1 << 8)
#define | MCI_CMD_RESP_LONG (1 << 7)
#define | MCI_CMD_RESP_EXP (1 << 6)
#define | MCI_CMD_INDX(n) ((n) & 0x1F)
#define | MCI_STS_GET_FCNT(x) (((x) >> 17) & 0x1FF)
| SDIO status register definess.
#define | MCI_FIFOTH_TX_WM(x) ((x) & 0xFFF)
| SDIO FIFO threshold defines.
#define | MCI_FIFOTH_RX_WM(x) (((x) & 0xFFF) << 16)
#define | MCI_FIFOTH_DMA_MTS_1 (0UL << 28)
#define | MCI_FIFOTH_DMA_MTS_4 (1UL << 28)
#define | MCI_FIFOTH_DMA_MTS_8 (2UL << 28)
#define | MCI_FIFOTH_DMA_MTS_16 (3UL << 28)
#define | MCI_FIFOTH_DMA_MTS_32 (4UL << 28)
#define | MCI_FIFOTH_DMA_MTS_64 (5UL << 28)
#define | MCI_FIFOTH_DMA_MTS_128 (6UL << 28)
#define | MCI_FIFOTH_DMA_MTS_256 (7UL << 28)
#define | MCI_BMOD_PBL1 (0 << 8)
| Bus mode register defines.
#define | MCI_BMOD_PBL4 (1 << 8)
#define | MCI_BMOD_PBL8 (2 << 8)
#define | MCI_BMOD_PBL16 (3 << 8)
#define | MCI_BMOD_PBL32 (4 << 8)
#define | MCI_BMOD_PBL64 (5 << 8)
#define | MCI_BMOD_PBL128 (6 << 8)
#define | MCI_BMOD_PBL256 (7 << 8)
#define | MCI_BMOD_DE (1 << 7)
#define | MCI_BMOD_DSL(len) ((len) << 2)
#define | MCI_BMOD_FB (1 << 1)
#define | MCI_BMOD_SWR (1 << 0)
#define | SD_FIFO_SZ 32
| Commonly used definitions.

## Typedefs
typedef uint32_t(* | MCI_IRQ_CB_FUNC_T )(uint32_t)
typedef int32_t(* | PSCHECK_FUNC_T )(void)
typedef void(* | PS_POWER_FUNC_T )(int32_t enable)

## Functions
void | IP_SDMMC_Init (IP_SDMMC_001_T *pSDMMC)
| Initializes the MCI card controller.
void | IP_SDMMC_DeInit (IP_SDMMC_001_T *pSDMMC)
| Close the MCI.
void | IP_SDMMC_SetBlkSize (IP_SDMMC_001_T *pSDMMC, uint32_t bytes)
| Set block size for transfer.
void | IP_SDMMC_Reset (IP_SDMMC_001_T *pSDMMC, int32_t reset)
| Reset card in slot.
STATIC INLINE void | IP_SDMMC_PowerOn (IP_SDMMC_001_T *pSDMMC)
| Enable slot power.
STATIC INLINE void | IP_SDMMC_PowerOff (IP_SDMMC_001_T *pSDMMC)
| Disable slot power.
STATIC INLINE int32_t | IP_SDMMC_CardWpOn (IP_SDMMC_001_T *pSDMMC)
| Detect if write protect is enabled.
STATIC INLINE int32_t | IP_SDMMC_CardNDetect (IP_SDMMC_001_T *pSDMMC)
| Detect if an SD card is inserted.
int32_t | IP_SDMMC_SendCmd (IP_SDMMC_001_T *pSDMMC, uint32_t cmd, uint32_t arg)
| Function to send command to Card interface unit (CIU)
void | IP_SDMMC_GetResponse (IP_SDMMC_001_T *pSDMMC, uint32_t *resp)
| Read the response from the last command.
void | IP_SDMMC_SetClock (IP_SDMMC_001_T *pSDMMC, uint32_t clk_rate, uint32_t speed)
| Sets the SD bus clock speed.
void | IP_SDMMC_SetCardType (IP_SDMMC_001_T *pSDMMC, uint32_t ctype)
| Function to set card type.
void | IP_SDMMC_SetClearIntFifo (IP_SDMMC_001_T *pSDMMC)
| Function to clear interrupt & FIFOs.
uint32_t | IP_SDMMC_GetRawIntStatus (IP_SDMMC_001_T *pSDMMC)
| Returns the raw SD interface interrupt status.
void | IP_SDMMC_SetRawIntStatus (IP_SDMMC_001_T *pSDMMC, uint32_t iVal)
| Sets the raw SD interface interrupt status.
void | IP_SDMMC_SetIntMask (IP_SDMMC_001_T *pSDMMC, uint32_t iVal)
| Sets the SD interface interrupt mask.
void | IP_SDMMC_DmaSetup (IP_SDMMC_001_T *pSDMMC, sdif_device *psdif_dev, uint32_t addr, uint32_t size)
| Setup DMA descriptors.
void | IP_SDMMC_SetBlkSizeByteCnt (IP_SDMMC_001_T *pSDMMC, uint32_t blk_size)
| Set block size and byte count for transfer.
void | IP_SDMMC_SetByteCnt (IP_SDMMC_001_T *pSDMMC, uint32_t bytes)
| Set byte count for transfer.