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lwipopts.h
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1 /*
2 * @brief LWIP build option override file
3 *
4 * @note
5 * Copyright(C) NXP Semiconductors, 2012
6 * All rights reserved.
7 *
8 * @par
9 * Software that is described herein is for illustrative purposes only
10 * which provides customers with programming information regarding the
11 * LPC products. This software is supplied "AS IS" without any warranties of
12 * any kind, and NXP Semiconductors and its licensor disclaim any and
13 * all warranties, express or implied, including all implied warranties of
14 * merchantability, fitness for a particular purpose and non-infringement of
15 * intellectual property rights. NXP Semiconductors assumes no responsibility
16 * or liability for the use of the software, conveys no license or rights under any
17 * patent, copyright, mask work right, or any other intellectual property rights in
18 * or to any products. NXP Semiconductors reserves the right to make changes
19 * in the software without notification. NXP Semiconductors also makes no
20 * representation or warranty that such application will be suitable for the
21 * specified use without further testing or modification.
22 *
23 * @par
24 * Permission to use, copy, modify, and distribute this software and its
25 * documentation is hereby granted, under NXP Semiconductors' and its
26 * licensor's relevant copyrights in the software, without fee, provided that it
27 * is used in conjunction with NXP Semiconductors microcontrollers. This
28 * copyright, permission, and disclaimer notice must appear in all copies of
29 * this code.
30 */
31
32 #ifndef __LWIPOPTS_H_
33 #define __LWIPOPTS_H_
34
35 /* Standalone build */
36 #define NO_SYS 1
37
38 /* Use LWIP timers */
39 #define NO_SYS_NO_TIMERS 0
40
41 /* Need for memory protection */
42 #define SYS_LIGHTWEIGHT_PROT 0
43
44 /* 32-bit alignment */
45 #define MEM_ALIGNMENT 4
46
47 /* pbuf buffers in pool. In zero-copy mode, these buffers are
48 located in peripheral RAM. In copied mode, they are located in
49 internal IRAM */
50 #define PBUF_POOL_SIZE 7
51
52 /* No padding needed */
53 #define ETH_PAD_SIZE 0
54
55 #define IP_SOF_BROADCAST 1
56 #define IP_SOF_BROADCAST_RECV 1
57
58 /* The ethernet FCS is performed in hardware. The IP, TCP, and UDP
59 CRCs still need to be done in hardware. */
60 #define CHECKSUM_GEN_IP 1
61 #define CHECKSUM_GEN_UDP 1
62 #define CHECKSUM_GEN_TCP 1
63 #define CHECKSUM_CHECK_IP 1
64 #define CHECKSUM_CHECK_UDP 1
65 #define CHECKSUM_CHECK_TCP 1
66 #define LWIP_CHECKSUM_ON_COPY 1
67
68 /* Use LWIP version of htonx() to allow generic functionality across
69 all platforms. If you are using the Cortex Mx devices, you might
70 be able to use the Cortex __rev instruction instead. */
71 #define LWIP_PLATFORM_BYTESWAP 0
72
73 /* Non-static memory, used with DMA pool */
74 #define MEM_SIZE (12 * 1024)
75
76 /* Raw interface not needed */
77 #define LWIP_RAW 1
78
79 /* DHCP is ok, UDP is required with DHCP */
80 #define LWIP_DHCP 1
81 #define LWIP_UDP 1
82
83 /* Hostname can be used */
84 #define LWIP_NETIF_HOSTNAME 1
85
86 #define LWIP_BROADCAST_PING 1
87
88 /* MSS should match the hardware packet size */
89 #define TCP_MSS 1460
90 #define TCP_SND_BUF (2 * TCP_MSS)
91
92 #define LWIP_SOCKET 0
93 #define LWIP_NETCONN 0
94 #define MEMP_NUM_SYS_TIMEOUT 300
95
96 #define LWIP_STATS 0
97 #define LINK_STATS 0
98 #define LWIP_STATS_DISPLAY 0
99
100 /* There are more *_DEBUG options that can be selected.
101 See opts.h. Make sure that LWIP_DEBUG is defined when
102 building the code to use debug. */
103 #define TCP_DEBUG LWIP_DBG_OFF
104 #define ETHARP_DEBUG LWIP_DBG_OFF
105 #define PBUF_DEBUG LWIP_DBG_OFF
106 #define IP_DEBUG LWIP_DBG_OFF
107 #define TCPIP_DEBUG LWIP_DBG_OFF
108 #define DHCP_DEBUG LWIP_DBG_OFF
109 #define UDP_DEBUG LWIP_DBG_OFF
110
111 /* This define is custom for the LPC EMAC driver. Enabled it to
112 get debug messages for the driver. */
113 #define EMAC_DEBUG LWIP_DBG_OFF
114
115 #endif /* __LWIPOPTS_H_ */