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Data Structures | Macros | Enumerations | Functions
IP: SSP register block and driver
IP drivers: Common drivers used on multiple NXP devices

## Detailed Description

## Data Structures
struct | IP_SSP_001_T
| SSP register block structure. More...

## Macros
#define | SSP_CR0_DSS(n) ((uint32_t) ((n) & 0xF))
#define | SSP_CR0_FRF_SPI ((uint32_t) (0 << 4))
#define | SSP_CR0_FRF_TI ((uint32_t) (1 << 4))
#define | SSP_CR0_FRF_MICROWIRE ((uint32_t) (2 << 4))
#define | SSP_CR0_CPOL_LO ((uint32_t) (0))
#define | SSP_CR0_CPOL_HI ((uint32_t) (1 << 6))
#define | SSP_CR0_CPHA_FIRST ((uint32_t) (0))
#define | SSP_CR0_CPHA_SECOND ((uint32_t) (1 << 7))
#define | SSP_CR0_SCR(n) ((uint32_t) ((n & 0xFF) << 8))
#define | SSP_CR0_BITMASK ((uint32_t) (0xFFFF))
#define | SSP_CR1_LBM_EN ((uint32_t) (1 << 0))
#define | SSP_CR1_SSP_EN ((uint32_t) (1 << 1))
#define | SSP_CR1_SLAVE_EN ((uint32_t) (1 << 2))
#define | SSP_CR1_MASTER_EN ((uint32_t) (0))
#define | SSP_CR1_SO_DISABLE ((uint32_t) (1 << 3))
#define | SSP_CR1_BITMASK ((uint32_t) (0x0F))
#define | SSP_CPSR_BITMASK ((uint32_t) (0xFF))
#define | SSP_DR_BITMASK(n) ((n) & 0xFFFF)
#define | SSP_SR_BITMASK ((uint32_t) (0x1F))
#define | SSP_ICR_BITMASK ((uint32_t) (0x03))

## Enumerations
enum | IP_SSP_STATUS_T { SSP_STAT_TFE = ((uint32_t)(1 << 0)), SSP_STAT_TNF = ((uint32_t)(1 << 1)), SSP_STAT_RNE = ((uint32_t)(1 << 2)), SSP_STAT_RFF = ((uint32_t)(1 << 3)), SSP_STAT_BSY = ((uint32_t)(1 << 4)) }
| SSP Type of Status. More...
enum | IP_SSP_INTMASK_T { SSP_RORIM = ((uint32_t)(1 << 0)), SSP_RTIM = ((uint32_t)(1 << 1)), SSP_RXIM = ((uint32_t)(1 << 2)), SSP_TXIM = ((uint32_t)(1 << 3)), SSP_INT_MASK_BITMASK = ((uint32_t)(0xF)) }
| SSP Type of Interrupt Mask. More...
enum | IP_SSP_MASKINTSTATUS_T { SSP_RORMIS = ((uint32_t)(1 << 0)), SSP_RTMIS = ((uint32_t)(1 << 1)), SSP_RXMIS = ((uint32_t)(1 << 2)), SSP_TXMIS = ((uint32_t)(1 << 3)), SSP_MASK_INT_STAT_BITMASK = ((uint32_t)(0xF)) }
| SSP Type of Mask Interrupt Status. More...
enum | IP_SSP_RAWINTSTATUS_T { SSP_RORRIS = ((uint32_t)(1 << 0)), SSP_RTRIS = ((uint32_t)(1 << 1)), SSP_RXRIS = ((uint32_t)(1 << 2)), SSP_TXRIS = ((uint32_t)(1 << 3)), SSP_RAW_INT_STAT_BITMASK = ((uint32_t)(0xF)) }
| SSP Type of Raw Interrupt Status. More...
enum | IP_SSP_INTCLEAR_T { SSP_RORIC = 0x0, SSP_RTIC = 0x1, SSP_INT_CLEAR_BITMASK = 0x3 }
enum | IP_SSP_DMA_T { SSP_DMA_RX = (1u), SSP_DMA_TX = (1u << 1), SSP_DMA_BITMASK = ((uint32_t)(0x3)) }

## Functions
STATIC INLINE void | IP_SSP_DeInit (IP_SSP_001_T *pSSP)
| Disable SSP operation.
STATIC INLINE void | IP_SSP_Enable (IP_SSP_001_T *pSSP)
| Enable SSP operation.
STATIC INLINE void | IP_SSP_Disable (IP_SSP_001_T *pSSP)
| Disable SSP operation.
STATIC INLINE void | IP_SSP_EnableLoopBack (IP_SSP_001_T *pSSP)
| Enable loopback mode.
STATIC INLINE void | IP_SSP_DisableLoopBack (IP_SSP_001_T *pSSP)
| Disable loopback mode.
STATIC INLINE FlagStatus | IP_SSP_GetStatus (IP_SSP_001_T *pSSP, IP_SSP_STATUS_T Stat)
| Get the current status of SSP controller.
STATIC INLINE uint32_t | IP_SSP_GetIntStatus (IP_SSP_001_T *pSSP)
| Get the masked interrupt status.
STATIC INLINE IntStatus | IP_SSP_GetRawIntStatus (IP_SSP_001_T *pSSP, IP_SSP_RAWINTSTATUS_T RawInt)
| Get the raw interrupt status.
STATIC INLINE uint8_t | IP_SSP_GetDataSize (IP_SSP_001_T *pSSP)
| Get the number of bits transferred in each frame.
STATIC INLINE void | IP_SSP_ClearIntPending (IP_SSP_001_T *pSSP, IP_SSP_INTCLEAR_T IntClear)
| Clear the corresponding interrupt condition(s) in the SSP controller.
STATIC INLINE void | IP_SSP_Int_Enable (IP_SSP_001_T *pSSP, IP_SSP_INTMASK_T IntType)
| Enable interrupt for the SSP.
STATIC INLINE void | IP_SSP_Int_Disable (IP_SSP_001_T *pSSP, IP_SSP_INTMASK_T IntType)
| Disable interrupt for the SSP.
STATIC INLINE uint16_t | IP_SSP_ReceiveFrame (IP_SSP_001_T *pSSP)
| Get received SSP data.
STATIC INLINE void | IP_SSP_SendFrame (IP_SSP_001_T *pSSP, uint16_t tx_data)
| Send SSP 16-bit data.
void | IP_SSP_Set_ClockRate (IP_SSP_001_T *pSSP, uint32_t clk_rate, uint32_t prescale)
| Set up output clocks per bit for SSP bus.
STATIC INLINE void | IP_SSP_SetFormat (IP_SSP_001_T *pSSP, uint32_t bits, uint32_t frameFormat, uint32_t clockMode)
| Set up the SSP frame format.
STATIC INLINE void | IP_SSP_Set_Mode (IP_SSP_001_T *pSSP, uint32_t mode)
| Set the SSP working as master or slave mode.
STATIC INLINE void | IP_SSP_DMA_Enable (IP_SSP_001_T *pSSP, IP_SSP_DMA_T flag)
| Enable DMA for SSP.
STATIC INLINE void | IP_SSP_DMA_Disable (IP_SSP_001_T *pSSP, IP_SSP_DMA_T flag)
| Disable DMA for SSP.

## Macro Definition Documentation

#define SSP_CPSR_BITMASK ((uint32_t) (0xFF))

SSP CPSR bit mask

Definition at line 115 of file ssp_001.h.

#define SSP_CR0_BITMASK ((uint32_t) (0xFFFF))

SSP CR0 bit mask

Definition at line 92 of file ssp_001.h.

#define SSP_CR0_BITMASK ((uint32_t) (0xFFFF))

SSP CR0 bit mask

Definition at line 92 of file ssp_001.h.

#define SSP_CR0_CPHA_FIRST ((uint32_t) (0))

SPI clock out phase bit (used in SPI mode only), (1) = captures data on the second clock transition of the frame, (0) = first

Definition at line 84 of file ssp_001.h.

#define SSP_CR0_CPHA_SECOND ((uint32_t) (1 << 7))

Definition at line 85 of file ssp_001.h.

#define SSP_CR0_CPOL_HI ((uint32_t) (1 << 6))

Definition at line 81 of file ssp_001.h.

#define SSP_CR0_CPOL_LO ((uint32_t) (0))

SPI clock polarity bit (used in SPI mode only), (1) = maintains the bus clock high between frames, (0) = low

Definition at line 80 of file ssp_001.h.

#define SSP_CR0_DSS | ( |  | n | ) | ((uint32_t) ((n) & 0xF))

Macro defines for CR0 registerSSP data size select, must be 4 bits to 16 bits

Definition at line 71 of file ssp_001.h.

#define SSP_CR0_FRF_MICROWIRE ((uint32_t) (2 << 4))

SSP control 0 National Micro-wire mode

Definition at line 77 of file ssp_001.h.

#define SSP_CR0_FRF_SPI ((uint32_t) (0 << 4))

SSP control 0 Motorola SPI mode

Definition at line 73 of file ssp_001.h.

#define SSP_CR0_FRF_TI ((uint32_t) (1 << 4))

SSP control 0 TI synchronous serial mode

Definition at line 75 of file ssp_001.h.

#define SSP_CR0_SCR | ( |  | n | ) | ((uint32_t) ((n & 0xFF) << 8))

SSP serial clock rate value load macro, divider rate is PERIPH_CLK / (cpsr * (SCR + 1))

Definition at line 95 of file ssp_001.h.

#define SSP_CR0_SCR | ( |  | n | ) | ((uint32_t) ((n & 0xFF) << 8))

SSP serial clock rate value load macro, divider rate is PERIPH_CLK / (cpsr * (SCR + 1))

Definition at line 95 of file ssp_001.h.

#define SSP_CR1_BITMASK ((uint32_t) (0x0F))

SSP CR1 bit mask

Definition at line 112 of file ssp_001.h.

#define SSP_CR1_LBM_EN ((uint32_t) (1 << 0))

Macro defines for CR1 registerSSP control 1 loopback mode enable bit

Definition at line 102 of file ssp_001.h.

#define SSP_CR1_MASTER_EN ((uint32_t) (0))

Definition at line 107 of file ssp_001.h.

#define SSP_CR1_SLAVE_EN ((uint32_t) (1 << 2))

SSP control 1 slave enable

Definition at line 106 of file ssp_001.h.

#define SSP_CR1_SO_DISABLE ((uint32_t) (1 << 3))

SSP control 1 slave out disable bit, disables transmit line in slave mode

Definition at line 110 of file ssp_001.h.

#define SSP_CR1_SSP_EN ((uint32_t) (1 << 1))

SSP control 1 enable bit

Definition at line 104 of file ssp_001.h.

#define SSP_DR_BITMASK | ( |  | n | ) | ((n) & 0xFFFF)

Macro defines for DR registerSSP data bit mask

Definition at line 121 of file ssp_001.h.

#define SSP_ICR_BITMASK ((uint32_t) (0x03))

ICR bit mask

Definition at line 131 of file ssp_001.h.

#define SSP_SR_BITMASK ((uint32_t) (0x1F))

Macro defines for SR registerSSP SR bit mask

Definition at line 128 of file ssp_001.h.

## Enumeration Type Documentation

enum IP_SSP_DMA_T

Enumerator:

  SSP_DMA_RX | DMA RX Enable
  SSP_DMA_TX | DMA TX Enable
  SSP_DMA_BITMASK |

Definition at line 183 of file ssp_001.h.

enum IP_SSP_INTCLEAR_T

Enumerator:

  SSP_RORIC |
  SSP_RTIC |
  SSP_INT_CLEAR_BITMASK |

Definition at line 177 of file ssp_001.h.

enum IP_SSP_INTMASK_T

SSP Type of Interrupt Mask.

Enumerator:

  SSP_RORIM | Overun
  SSP_RTIM | TimeOut
  SSP_RXIM | Rx FIFO is at least half full
  SSP_TXIM | Tx FIFO is at least half empty
  SSP_INT_MASK_BITMASK |

Definition at line 147 of file ssp_001.h.

enum IP_SSP_MASKINTSTATUS_T

SSP Type of Mask Interrupt Status.

Enumerator:

  SSP_RORMIS | Overun
  SSP_RTMIS | TimeOut
  SSP_RXMIS | Rx FIFO is at least half full
  SSP_TXMIS | Tx FIFO is at least half empty
  SSP_MASK_INT_STAT_BITMASK |

Definition at line 158 of file ssp_001.h.

enum IP_SSP_RAWINTSTATUS_T

SSP Type of Raw Interrupt Status.

Enumerator:

  SSP_RORRIS | Overun
  SSP_RTRIS | TimeOut
  SSP_RXRIS | Rx FIFO is at least half full
  SSP_TXRIS | Tx FIFO is at least half empty
  SSP_RAW_INT_STAT_BITMASK |

Definition at line 169 of file ssp_001.h.

enum IP_SSP_STATUS_T

SSP Type of Status.

Enumerator:

  SSP_STAT_TFE | TX FIFO Empty
  SSP_STAT_TNF | TX FIFO not full
  SSP_STAT_RNE | RX FIFO not empty
  SSP_STAT_RFF | RX FIFO full
  SSP_STAT_BSY | SSP Busy

Definition at line 136 of file ssp_001.h.

## Function Documentation

STATIC INLINE void IP_SSP_ClearIntPending | ( | IP_SSP_001_T * | pSSP,
|  | IP_SSP_INTCLEAR_T | IntClear
| ) |  |

Clear the corresponding interrupt condition(s) in the SSP controller.

Parameters

  pSSP | : The base of SSP peripheral on the chip
  IntClear,: | Type of cleared interrupt, should be : SSP_RORIC SSP_RTIC

Returns
  Nothing

Note
  Software can clear one or more interrupt condition(s) in the SSP controller

Definition at line 307 of file ssp_001.h.

STATIC INLINE void IP_SSP_DeInit | ( | IP_SSP_001_T * | pSSP | ) |

Disable SSP operation.

Parameters

  pSSP | : The base of SSP peripheral on the chip

Returns
  Nothing

Note
  The SSP controller is disabled

Definition at line 195 of file ssp_001.h.

STATIC INLINE void IP_SSP_Disable | ( | IP_SSP_001_T * | pSSP | ) |

Disable SSP operation.

Parameters

  pSSP | : The base of SSP peripheral on the chip

Returns
  Nothing

Definition at line 215 of file ssp_001.h.

STATIC INLINE void IP_SSP_DisableLoopBack | ( | IP_SSP_001_T * | pSSP | ) |

Disable loopback mode.

Parameters

  pSSP | : The base of SSP peripheral on the chip

Returns
  Nothing

Note
  Serial input is taken from the serial output (MOSI or MISO) rather than the serial input pin

Definition at line 239 of file ssp_001.h.

STATIC INLINE void IP_SSP_DMA_Disable | ( | IP_SSP_001_T * | pSSP,
|  | IP_SSP_DMA_T | flag
| ) |  |

Disable DMA for SSP.

Parameters

  pSSP | : The base of SSP peripheral on the chip
  flag | : DMA flag for transmit/receive SSP, should be SSP_DMA_RX SSP_DMA_TX

Returns
  Nothing

Definition at line 430 of file ssp_001.h.

STATIC INLINE void IP_SSP_DMA_Enable | ( | IP_SSP_001_T * | pSSP,
|  | IP_SSP_DMA_T | flag
| ) |  |

Enable DMA for SSP.

Parameters

  pSSP | : The base of SSP peripheral on the chip
  flag | : DMA flag for transmit/receive SSP, should be SSP_DMA_RX SSP_DMA_TX

Returns
  Nothing

Definition at line 417 of file ssp_001.h.

STATIC INLINE void IP_SSP_Enable | ( | IP_SSP_001_T * | pSSP | ) |

Enable SSP operation.

Parameters

  pSSP | : The base of SSP peripheral on the chip

Returns
  Nothing

Definition at line 205 of file ssp_001.h.

STATIC INLINE void IP_SSP_EnableLoopBack | ( | IP_SSP_001_T * | pSSP | ) |

Enable loopback mode.

Parameters

  pSSP | : The base of SSP peripheral on the chip

Returns
  Nothing

Note
  Serial input is taken from the serial output (MOSI or MISO) rather than the serial input pin

Definition at line 227 of file ssp_001.h.

STATIC INLINE uint8_t IP_SSP_GetDataSize | ( | IP_SSP_001_T * | pSSP | ) |

Get the number of bits transferred in each frame.

Parameters

  pSSP | : The base of SSP peripheral on the chip

Returns
  the number of bits transferred in each frame minus one

Note
  The return value is 0x03 -> 0xF corresponding to 4bit -> 16bit transfer

Definition at line 293 of file ssp_001.h.

STATIC INLINE uint32_t IP_SSP_GetIntStatus | ( | IP_SSP_001_T * | pSSP | ) |

Get the masked interrupt status.

Parameters

  pSSP | : The base of SSP peripheral on the chip

Returns
  SSP Masked Interrupt Status Register value

Note
  The return value contains a 1 for each interrupt condition that is asserted and enabled (masked)

Definition at line 266 of file ssp_001.h.

STATIC INLINE IntStatus IP_SSP_GetRawIntStatus | ( | IP_SSP_001_T * | pSSP,
|  | IP_SSP_RAWINTSTATUS_T | RawInt
| ) |  |

Get the raw interrupt status.

Parameters

  pSSP | : The base of SSP peripheral on the chip
  RawInt | : Interrupt condition to be get status, shoud be : SSP_RORRIS SSP_RTRIS SSP_RXRIS SSP_TXRIS

Returns
  Raw interrupt status corresponding to interrupt condition , SET or RESET

Note
  Get the status of each interrupt condition ,regardless of whether or not the interrupt is enabled

Definition at line 282 of file ssp_001.h.

STATIC INLINE FlagStatus IP_SSP_GetStatus | ( | IP_SSP_001_T * | pSSP,
|  | IP_SSP_STATUS_T | Stat
| ) |  |

Get the current status of SSP controller.

Parameters

  pSSP | : The base of SSP peripheral on the chip
  Stat | : Type of status, should be : SSP_STAT_TFE SSP_STAT_TNF SSP_STAT_RNE SSP_STAT_RFF SSP_STAT_BSY

Returns
  SSP controller status, SET or RESET

Definition at line 255 of file ssp_001.h.

STATIC INLINE void IP_SSP_Int_Disable | ( | IP_SSP_001_T * | pSSP,
|  | IP_SSP_INTMASK_T | IntType
| ) |  |

Disable interrupt for the SSP.

Parameters

  pSSP | : The base of SSP peripheral on the chip
  IntType | : Type of interrupt condition to be enable/disable, should be : SSP_RORIM SSP_RTIM SSP_RXIM SSP_TXIM

Returns
  Nothing

Definition at line 337 of file ssp_001.h.

STATIC INLINE void IP_SSP_Int_Enable | ( | IP_SSP_001_T * | pSSP,
|  | IP_SSP_INTMASK_T | IntType
| ) |  |

Enable interrupt for the SSP.

Parameters

  pSSP | : The base of SSP peripheral on the chip
  IntType | : Type of interrupt condition to be enable/disable, should be : SSP_RORIM SSP_RTIM SSP_RXIM SSP_TXIM

Returns
  Nothing

Definition at line 322 of file ssp_001.h.

STATIC INLINE uint16_t IP_SSP_ReceiveFrame | ( | IP_SSP_001_T * | pSSP | ) |

Get received SSP data.

Parameters

  pSSP | : The base of SSP peripheral on the chip

Returns
  SSP 16-bit data received

Definition at line 347 of file ssp_001.h.

STATIC INLINE void IP_SSP_SendFrame | ( | IP_SSP_001_T * | pSSP,
|  | uint16_t | tx_data
| ) |  |

Send SSP 16-bit data.

Parameters

  pSSP | : The base of SSP peripheral on the chip
  tx_data | : SSP 16-bit data to be transmited

Returns
  Nothing

Definition at line 358 of file ssp_001.h.

void IP_SSP_Set_ClockRate | ( | IP_SSP_001_T * | pSSP,
|  | uint32_t | clk_rate,
|  | uint32_t | prescale
| ) |  |

Set up output clocks per bit for SSP bus.

Parameters

  pSSP | : The base of SSP peripheral on the chip
  clk_rate | fs: The number of prescaler-output clocks per bit on the bus, minus one
  prescale | : The factor by which the Prescaler divides the SSP peripheral clock PCLK

Returns
  Nothing

Note
  The bit frequency is PCLK / (prescale x[clk_rate+1])

Definition at line 51 of file ssp_001.c.

STATIC INLINE void IP_SSP_Set_Mode | ( | IP_SSP_001_T * | pSSP,
|  | uint32_t | mode
| ) |  |

Set the SSP working as master or slave mode.

Parameters

  pSSP | : The base of SSP peripheral on the chip
  mode | : Operating mode, should be SSP_MODE_MASTER SSP_MODE_SLAVE

Returns
  Nothing

Definition at line 402 of file ssp_001.h.

STATIC INLINE void IP_SSP_SetFormat | ( | IP_SSP_001_T * | pSSP,
|  | uint32_t | bits,
|  | uint32_t | frameFormat,
|  | uint32_t | clockMode
| ) |  |

Set up the SSP frame format.

Parameters

  pSSP | : The base of SSP peripheral on the chip
  bits | : The number of bits transferred in each frame, should be SSP_BITS_4 to SSP_BITS_16
  frameFormat | : Frame format, should be : SSP_FRAMEFORMAT_SPI SSP_FRAME_FORMAT_TI SSP_FRAMEFORMAT_MICROWIRE
  clockMode | : Select Clock polarity and Clock phase, should be : SSP_CLOCK_CPHA0_CPOL0 SSP_CLOCK_CPHA0_CPOL1 SSP_CLOCK_CPHA1_CPOL0 SSP_CLOCK_CPHA1_CPOL1

Returns
  Nothing

Note
  Note: The clockFormat is only used in SPI mode

Definition at line 389 of file ssp_001.h.