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Data Structures | Macros | Functions
clock_18xx_43xx.h File Reference

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## Data Structures
struct | CGU_USBAUDIO_PLL_SETUP_T

## Macros
#define | CGU_IRC_FREQ (12000000)
#define | MAX_CLOCK_FREQ (180000000)
#define | CGU_PLL_LOCKED (1 << 0) /* PLL locked status */
#define | CGU_PLL_FR (1 << 1) /* PLL free running indicator status */

## Functions
void | Chip_Clock_EnableCrystal (void)
| Enables the crystal oscillator.
void | Chip_Clock_DisableCrystal (void)
| Disables the crystal oscillator.
uint32_t | Chip_Clock_SetupMainPLLHz (CHIP_CGU_CLKIN_T Input, uint32_t MinHz, uint32_t DesiredHz, uint32_t MaxHz)
| Configures the main PLL.
uint32_t | Chip_Clock_SetupMainPLLMult (CHIP_CGU_CLKIN_T Input, uint32_t mult)
| Directly set the PLL multipler.
uint32_t | Chip_Clock_GetMainPLLHz (void)
| Returns the frequency of the main PLL.
void | Chip_Clock_DisableMainPLL (void)
| Disables the main PLL.
void | Chip_Clock_EnableMainPLL (void)
| Enbles the main PLL.
bool | Chip_Clock_MainPLLLocked (void)
| Returns the lock status of the main PLL.
void | Chip_Clock_SetDivider (CHIP_CGU_IDIV_T Divider, CHIP_CGU_CLKIN_T Input, uint32_t Divisor)
| Sets up a CGU clock divider and it's input clock.
CHIP_CGU_CLKIN_T | Chip_Clock_GetDividerSource (CHIP_CGU_IDIV_T Divider)
| Gets a CGU clock divider source.
uint32_t | Chip_Clock_GetDividerDivisor (CHIP_CGU_IDIV_T Divider)
| Gets a CGU clock divider divisor.
uint32_t | Chip_Clock_GetClockInputHz (CHIP_CGU_CLKIN_T input)
| Returns the frequency of the specified input clock source.
uint32_t | Chip_Clock_GetBaseClocktHz (CHIP_CGU_BASE_CLK_T clock)
| Returns the frequency of the specified base clock source.
void | Chip_Clock_SetBaseClock (CHIP_CGU_BASE_CLK_T BaseClock, CHIP_CGU_CLKIN_T Input, bool autoblocken, bool powerdn)
| Sets a CGU Base Clock clock source.
void | Chip_Clock_GetBaseClockOpts (CHIP_CGU_BASE_CLK_T BaseClock, CHIP_CGU_CLKIN_T *Input, bool *autoblocken, bool *powerdn)
| Get CGU Base Clock clock source information.
CHIP_CGU_CLKIN_T | Chip_Clock_GetBaseClock (CHIP_CGU_BASE_CLK_T BaseClock)
| Gets a CGU Base Clock clock source.
void | Chip_Clock_EnableBaseClock (CHIP_CGU_BASE_CLK_T BaseClock)
| Enables a base clock source.
void | Chip_Clock_DisableBaseClock (CHIP_CGU_BASE_CLK_T BaseClock)
| Disables a base clock source.
bool | Chip_Clock_IsBaseClockEnabled (CHIP_CGU_BASE_CLK_T BaseClock)
| Returns base clock enable state.
void | Chip_Clock_EnableOpts (CHIP_CCU_CLK_T clk, bool autoen, bool wakeupen, int div)
| Enables a peripheral clock and sets clock states.
void | Chip_Clock_Enable (CHIP_CCU_CLK_T clk)
| Enables a peripheral clock.
void | Chip_Clock_Disable (CHIP_CCU_CLK_T clk)
| Disables a peripheral clock.
uint32_t | Chip_Clock_GetRate (CHIP_CCU_CLK_T clk)
| Returns a peripheral clock rate.
void | Chip_Clock_StartPowerDown (void)
| Start the power down sequence by disabling the branch output clocks with wake up mechanism (Only the clocks which wake up mechanism bit enabled will be disabled)
void | Chip_Clock_ClearPowerDown (void)
| Clear the power down mode bit & proceed normal operation of branch output clocks (Only the clocks which wake up mechanism bit enabled will be enabled after the wake up event)
void | Chip_Clock_SetupPLL (CHIP_CGU_CLKIN_T Input, CHIP_CGU_USB_AUDIO_PLL_T pllnum, const CGU_USBAUDIO_PLL_SETUP_T *pPLLSetup)
| Sets up the audio or USB PLL.
void | Chip_Clock_EnablePLL (CHIP_CGU_USB_AUDIO_PLL_T pllnum)
| Enables the audio or USB PLL.
void | Chip_Clock_DisablePLL (CHIP_CGU_USB_AUDIO_PLL_T pllnum)
| Disables the audio or USB PLL.
uint32_t | Chip_Clock_GetPLLStatus (CHIP_CGU_USB_AUDIO_PLL_T pllnum)
| Returns the PLL status.