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sysinit_nxp_xpresso_1769.c
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1 /*
2 * @brief NXP LPC1769 Xpresso Sysinit file
3 *
4 * @note
5 * Copyright(C) NXP Semiconductors, 2012
6 * All rights reserved.
7 *
8 * @par
9 * Software that is described herein is for illustrative purposes only
10 * which provides customers with programming information regarding the
11 * LPC products. This software is supplied "AS IS" without any warranties of
12 * any kind, and NXP Semiconductors and its licensor disclaim any and
13 * all warranties, express or implied, including all implied warranties of
14 * merchantability, fitness for a particular purpose and non-infringement of
15 * intellectual property rights. NXP Semiconductors assumes no responsibility
16 * or liability for the use of the software, conveys no license or rights under any
17 * patent, copyright, mask work right, or any other intellectual property rights in
18 * or to any products. NXP Semiconductors reserves the right to make changes
19 * in the software without notification. NXP Semiconductors also makes no
20 * representation or warranty that such application will be suitable for the
21 * specified use without further testing or modification.
22 *
23 * @par
24 * Permission to use, copy, modify, and distribute this software and its
25 * documentation is hereby granted, under NXP Semiconductors' and its
26 * licensor's relevant copyrights in the software, without fee, provided that it
27 * is used in conjunction with NXP Semiconductors microcontrollers. This
28 * copyright, permission, and disclaimer notice must appear in all copies of
29 * this code.
30 */
31
32 #include "board.h"
33 #include "string.h"
34
54 /*****************************************************************************
55 * Private types/enumerations/variables
56 ****************************************************************************/
57
58 /* SCR pin definitions for pin muxing */
59 typedef struct {
60 uint8_t pingrp; /* Pin group */
61 uint8_t pinnum; /* Pin number */
62 uint8_t pincfg; /* Pin configuration for SCU */
63 uint8_t funcnum; /* Function number */
64 } PINMUX_GRP_T;
65
66 /* Pin muxing configuration */
67 STATIC const PINMUX_GRP_T pinmuxing[] = {
68 {0, 0, IOCON_MODE_INACT, IOCON_FUNC2}, /* TXD3 */
69 {0, 1, IOCON_MODE_INACT, IOCON_FUNC2}, /* RXD3 */
70 {0, 4, IOCON_MODE_INACT, IOCON_FUNC2}, /* CAN-RD2 */
71 {0, 5, IOCON_MODE_INACT, IOCON_FUNC2}, /* CAN-TD2 */
72 {0, 22, IOCON_MODE_INACT, IOCON_FUNC0}, /* Led 0 */
73 {0, 23, IOCON_MODE_INACT, IOCON_FUNC1}, /* ADC 0 */
74 {0, 26, IOCON_MODE_INACT, IOCON_FUNC2}, /* DAC */
75 /* ENET */
76 {0x1, 0, IOCON_MODE_INACT, IOCON_FUNC1}, /* ENET_TXD0 */
77 {0x1, 1, IOCON_MODE_INACT, IOCON_FUNC1}, /* ENET_TXD1 */
78 {0x1, 4, IOCON_MODE_INACT, IOCON_FUNC1}, /* ENET_TX_EN */
79 {0x1, 8, IOCON_MODE_INACT, IOCON_FUNC1}, /* ENET_CRS */
80 {0x1, 9, IOCON_MODE_INACT, IOCON_FUNC1}, /* ENET_RXD0 */
81 {0x1, 10, IOCON_MODE_INACT, IOCON_FUNC1}, /* ENET_RXD1 */
82 {0x1, 14, IOCON_MODE_INACT, IOCON_FUNC1}, /* ENET_RX_ER */
83 {0x1, 15, IOCON_MODE_INACT, IOCON_FUNC1}, /* ENET_REF_CLK */
84 {0x1, 16, IOCON_MODE_INACT, IOCON_FUNC1}, /* ENET_MDC */
85 {0x1, 17, IOCON_MODE_INACT, IOCON_FUNC1}, /* ENET_MDIO */
86 };
87
88 /*****************************************************************************
89 * Public types/enumerations/variables
90 ****************************************************************************/
91
92 /*****************************************************************************
93 * Private functions
94 ****************************************************************************/
95
96 /* Setup system clocking */
97 STATIC void SystemSetupClocking(void)
98 {
99 /* CPU clock source starts with IRC */
100 Chip_Clock_SetMainPllSource(SYSCTL_PLLCLKSRC_IRC);
101 Chip_Clock_SetCPUClockSource(SYSCTL_CCLKSRC_SYSCLK);
102
103 /* Enable main oscillator used for PLLs */
104 LPC_SYSCTL->SCS = SYSCTL_OSCEC;
105 while ((LPC_SYSCTL->SCS & SYSCTL_OSCSTAT) == 0) {}
106
107 /* PLL0 clock source is 12MHz oscillator, PLL1 can only be the
108 main oscillator */
109 Chip_Clock_SetMainPllSource(SYSCTL_PLLCLKSRC_MAINOSC);
110
111 /* Setup PLL0 for a 480MHz clock. It is divided by CPU Clock Divider to create CPU Clock.
112 Input clock rate (FIN) is main oscillator = 12MHz
113 FCCO is selected for PLL Output and it must be between 275 MHz to 550 MHz.
114 FCCO = (2 * M * FIN) / N = integer multiplier of CPU Clock (120MHz) = 480MHz
115 N = 1, M = 480 * 1/(2*12) = 20 */
116 Chip_Clock_SetupPLL(SYSCTL_MAIN_PLL, 19, 0);/* Multiply by 20, Divide by 1 */
117
118 /* Enable PLL0 */
119 Chip_Clock_EnablePLL(SYSCTL_MAIN_PLL, SYSCTL_PLL_ENABLE);
120
121 /* Change the CPU Clock Divider setting for the operation with PLL0.
122 Divide value = (480/120) = 4 */
123 Chip_Clock_SetCPUClockDiv(3); /* pre-minus 1 */
124
125 /* Change the USB Clock Divider setting for the operation with PLL0.
126 Divide value = (480/48) = 10 */
127 Chip_Clock_SetUSBClockDiv(9); /* pre-minus 1 */
128
129 /* Wait for PLL0 to lock */
130 while (!Chip_Clock_IsMainPLLLocked()) {}
131
132 /* Connect PLL0 */
133 Chip_Clock_EnablePLL(SYSCTL_MAIN_PLL, SYSCTL_PLL_ENABLE | SYSCTL_PLL_CONNECT);
134
135 /* Wait for PLL0 to be connected */
136 while (!Chip_Clock_IsMainPLLConnected()) {}
137
138 /* Setup USB PLL1 for a 48MHz clock
139 Input clock rate (FIN) is main oscillator = 12MHz
140 PLL1 Output = USBCLK = 48MHz = FIN * MSEL, so MSEL = 4.
141 FCCO = USBCLK = USBCLK * 2 * P. It must be between 156 MHz to 320 MHz.
142 so P = 2 and FCCO = 48MHz * 2 * 2 = 192MHz */
143 Chip_Clock_SetupPLL(SYSCTL_USB_PLL, 3, 1); /* Multiply by 4, Divide by 2 */
144
145 #if 0 /* Use PLL1 output as USB Clock Source */
146 /* Enable PLL1 */
147 Chip_Clock_EnablePLL(SYSCTL_USB_PLL, SYSCTL_PLL_ENABLE);
148
149 /* Wait for PLL1 to lock */
150 while (!Chip_Clock_IsUSBPLLLocked()) {}
151
152 /* Connect PLL1 */
153 Chip_Clock_EnablePLL(SYSCTL_USB_PLL, SYSCTL_PLL_ENABLE | SYSCTL_PLL_CONNECT);
154
155 /* Wait for PLL1 to be connected */
156 while (!Chip_Clock_IsUSBPLLConnected()) {}
157 #endif
158
159 /* Setup FLASH access to 5 clocks (120MHz clock) */
160 Chip_FMC_SetFLASHAccess(FLASHTIM_120MHZ_CPU);
161 }
162
163 /* Sets up system pin muxing */
164 STATIC void SystemSetupMuxing(void)
165 {
166 int i;
167
168 /* Setup system level pin muxing */
169 for (i = 0; i < (sizeof(pinmuxing) / sizeof(pinmuxing[0])); i++) {
170 Chip_IOCON_PinMux(LPC_IOCON, pinmuxing[i].pingrp, pinmuxing[i].pinnum,
171 pinmuxing[i].pincfg, pinmuxing[i].funcnum);
172 }
173 }
174
175 /*****************************************************************************
176 * Public functions
177 ****************************************************************************/
178
186 void SystemInit(void)
187 {
188 unsigned int *pSCB_VTOR = (unsigned int *) 0xE000ED08;
189
190 #if defined(__IAR_SYSTEMS_ICC__)
191 extern void *__vector_table;
192
193 *pSCB_VTOR = (unsigned int) &__vector_table;
194 #elif defined(__CODE_RED)
195 extern void *g_pfnVectors;
196
197 *pSCB_VTOR = (unsigned int) &g_pfnVectors;
198 #elif defined(__ARMCC_VERSION)
199 extern void *__Vectors;
200
201 *pSCB_VTOR = (unsigned int) &__Vectors;
202 #endif
203
204 /* Setup system clocking and memory. This is done early to allow the
205 application and tools to clear memory and use scatter loading to
206 external memory. */
207 SystemSetupClocking();
208 SystemSetupMuxing();
209 }
210