| LPCOpen Platform v1.03 LPCOpen Platform for NXP LPC Microcontrollers

- Main Page
- Modules
- Data Structures
- Files
- Related Pages

All Data Structures Files Functions Variables Typedefs Enumerations Enumerator Macros Groups Pages
Enumerations | Functions
CHIP: LPC17xx/40xx FLASH Memory Controller driver
LPC17xx/40xx chip specific drivers

## Detailed Description

## Enumerations
enum | FMC_FLASHTIM_T { FLASHTIM_20MHZ_CPU = 0, FLASHTIM_40MHZ_CPU = 1, FLASHTIM_50MHZ_CPU = 2, FLASHTIM_20MHZ_CPU = 0, FLASHTIM_40MHZ_CPU = 1, FLASHTIM_72MHZ_CPU = 2, FLASHTIM_20MHZ_CPU = 0, FLASHTIM_40MHZ_CPU = 1, FLASHTIM_60MHZ_CPU = 2, FLASHTIM_80MHZ_CPU = 3, FLASHTIM_100MHZ_CPU = 4, FLASHTIM_120MHZ_CPU = 4, FLASHTIM_SAFE_SETTING = 5, FLASHTIM_20MHZ_CPU = 0, FLASHTIM_30MHZ_CPU = 1 }
| FLASH Access time definitions. More...

## Functions
STATIC INLINE void | Chip_FMC_SetFLASHAccess (FMC_FLASHTIM_T clks)
| Set FLASH memory access time in clocks.

## Enumeration Type Documentation

enum FMC_FLASHTIM_T

FLASH Access time definitions.

Enumerator:

  FLASHTIM_20MHZ_CPU | Flash accesses use 1 CPU clocks. Use for up to 20 MHz CPU clock
  FLASHTIM_40MHZ_CPU | Flash accesses use 2 CPU clocks. Use for up to 40 MHz CPU clock
  FLASHTIM_50MHZ_CPU | Flash accesses use 3 CPU clocks. Use for up to 50 MHz CPU clock
  FLASHTIM_20MHZ_CPU | Flash accesses use 1 CPU clocks. Use for up to 20 MHz CPU clock
  FLASHTIM_40MHZ_CPU | Flash accesses use 2 CPU clocks. Use for up to 40 MHz CPU clock
  FLASHTIM_72MHZ_CPU | Flash accesses use 3 CPU clocks. Use for up to 72 MHz CPU clock
  FLASHTIM_20MHZ_CPU | Flash accesses use 1 CPU clocks. Use for up to 20 MHz CPU clock
  FLASHTIM_40MHZ_CPU | Flash accesses use 2 CPU clocks. Use for up to 40 MHz CPU clock
  FLASHTIM_60MHZ_CPU | Flash accesses use 3 CPU clocks. Use for up to 60 MHz CPU clock
  FLASHTIM_80MHZ_CPU | Flash accesses use 4 CPU clocks. Use for up to 80 MHz CPU clock
  FLASHTIM_100MHZ_CPU | Flash accesses use 5 CPU clocks. Use for up to 100 MHz CPU clock
  FLASHTIM_120MHZ_CPU | Flash accesses use 5 CPU clocks. Use for up to 120 Mhz for LPC1759 and LPC1769 only.
  FLASHTIM_SAFE_SETTING | Flash accesses use 6 CPU clocks. Safe setting for any allowed conditions
  FLASHTIM_20MHZ_CPU | Flash accesses use 1 CPU clocks. Use for up to 20 MHz CPU clock
  FLASHTIM_30MHZ_CPU | Flash accesses use 2 CPU clocks. Use for up to 30 MHz CPU clock

Definition at line 47 of file fmc_17xx_40xx.h.

## Function Documentation

STATIC INLINE void Chip_FMC_SetFLASHAccess | ( | FMC_FLASHTIM_T | clks | ) |

Set FLASH memory access time in clocks.

Parameters

  clks | : Clock cycles for FLASH access (minus 1)

Returns
  Nothing

Note
  See the user manual for valid settings for this register for when power boot is enabled or off.

Definition at line 68 of file fmc_17xx_40xx.h.