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Macros | Typedefs
CHIP: LPC407x/8x Peripheral addresses and register set declarations
LPC17xx/40xx chip specific drivers

## Detailed Description

## Macros
#define | LPC_EEPROM_BASE 0x00200080
#define | LPC_GPDMA_BASE 0x20080000
#define | LPC_ENET_BASE 0x20084000
#define | LPC_LCD_BASE 0x20088000
#define | LPC_USB_BASE 0x2008C000
#define | LPC_CRC_BASE 0x20090000
#define | LPC_SPIFI_BASE 0x20094000
#define | LPC_GPIO0_BASE 0x20098000
#define | LPC_GPIO1_BASE 0x20098020
#define | LPC_GPIO2_BASE 0x20098040
#define | LPC_GPIO3_BASE 0x20098060
#define | LPC_GPIO4_BASE 0x20098080
#define | LPC_GPIO5_BASE 0x200980A0
#define | LPC_EMC_BASE 0x2009C000
#define | LPC_RTC_BASE 0x40024000
#define | LPC_REGFILE_BASE 0x40024044
#define | LPC_WWDT_BASE 0x40000000
#define | LPC_UART0_BASE 0x4000C000
#define | LPC_UART1_BASE 0x40010000
#define | LPC_UART2_BASE 0x40098000
#define | LPC_UART3_BASE 0x4009C000
#define | LPC_UART4_BASE 0x400A4000
#define | LPC_SSP0_BASE 0x40088000
#define | LPC_SSP1_BASE 0x40030000
#define | LPC_SSP2_BASE 0x400AC000
#define | LPC_TIMER0_BASE 0x40004000
#define | LPC_TIMER1_BASE 0x40008000
#define | LPC_TIMER2_BASE 0x40090000
#define | LPC_TIMER3_BASE 0x40094000
#define | LPC_MCPWM_BASE 0x400B8000
#define | LPC_PWM0_BASE 0x40014000
#define | LPC_PWM1_BASE 0x40018000
#define | LPC_I2C0_BASE 0x4001C000
#define | LPC_I2C1_BASE 0x4005C000
#define | LPC_I2C2_BASE 0x400A0000
#define | LPC_I2S_BASE 0x400A8000
#define | LPC_CANAF_RAM_BASE 0x40038000
#define | LPC_CANAF_BASE 0x4003C000
#define | LPC_CANCR_BASE 0x40040000
#define | LPC_CAN1_BASE 0x40044000
#define | LPC_CAN2_BASE 0x40048000
#define | LPC_QEI_BASE 0x400BC000
#define | LPC_DAC_BASE 0x4008C000
#define | LPC_ADC_BASE 0x40034000
#define | LPC_GPIOINT_BASE 0x40028080
#define | LPC_IOCON_BASE 0x4002C000
#define | LPC_SDC_BASE 0x400C0000
#define | LPC_SYSCTL_BASE 0x400FC000
#define | LPC_CMP_BASE 0x40020000
#define | LPC_EEPROM ((IP_EEPROM_001_T *) LPC_EEPROM_BASE)
#define | LPC_GPDMA ((IP_GPDMA_001_T *) LPC_GPDMA_BASE)
#define | LPC_EMC ((IP_EMC_001_T *) LPC_EMC_BASE)
#define | LPC_USB ((IP_USB_001_T *) LPC_USB_BASE)
#define | LPC_LCD ((IP_LCD_001_T *) LPC_LCD_BASE)
#define | LPC_ETHERNET ((IP_ENET_002_T *) LPC_ENET_BASE)
#define | LPC_GPIO ((IP_GPIO_002_T *) LPC_GPIO0_BASE)
#define | LPC_GPIO1 ((IP_GPIO_002_T *) LPC_GPIO1_BASE)
#define | LPC_GPIO2 ((IP_GPIO_002_T *) LPC_GPIO2_BASE)
#define | LPC_GPIO3 ((IP_GPIO_002_T *) LPC_GPIO3_BASE)
#define | LPC_GPIO4 ((IP_GPIO_002_T *) LPC_GPIO4_BASE)
#define | LPC_GPIO5 ((IP_GPIO_002_T *) LPC_GPIO5_BASE)
#define | LPC_RTC ((IP_RTC_001_T *) LPC_RTC_BASE)
#define | LPC_REGFILE ((IP_REGFILE_001_T *) LPC_REGFILE_BASE)
#define | LPC_WWDT ((IP_WWDT_001_T *) LPC_WWDT_BASE)
#define | LPC_UART0 ((IP_USART_001_T *) LPC_UART0_BASE)
#define | LPC_UART1 ((IP_USART_001_T *) LPC_UART1_BASE)
#define | LPC_UART2 ((IP_USART_001_T *) LPC_UART2_BASE)
#define | LPC_UART3 ((IP_USART_001_T *) LPC_UART3_BASE)
#define | LPC_UART4 ((IP_USART_001_T *) LPC_UART4_BASE)
#define | LPC_SSP0 ((IP_SSP_001_T *) LPC_SSP0_BASE)
#define | LPC_SSP1 ((IP_SSP_001_T *) LPC_SSP1_BASE)
#define | LPC_SSP2 ((IP_SSP_001_T *) LPC_SSP2_BASE)
#define | LPC_TIMER0 ((IP_TIMER_001_T *) LPC_TIMER0_BASE)
#define | LPC_TIMER1 ((IP_TIMER_001_T *) LPC_TIMER1_BASE)
#define | LPC_TIMER2 ((IP_TIMER_001_T *) LPC_TIMER2_BASE)
#define | LPC_TIMER3 ((IP_TIMER_001_T *) LPC_TIMER3_BASE)
#define | LPC_MCPWM ((IP_MCPWM_001_T *) LPC_MCPWM_BASE)
#define | LPC_I2C0 ((IP_I2C_001_T *) LPC_I2C0_BASE)
#define | LPC_I2C1 ((IP_I2C_001_T *) LPC_I2C1_BASE)
#define | LPC_I2C2 ((IP_I2C_001_T *) LPC_I2C2_BASE)
#define | LPC_I2S ((IP_I2S_001_T *) LPC_I2S_BASE)
#define | LPC_QEI ((IP_QEI_001_T *) LPC_QEI_BASE)
#define | LPC_DAC ((IP_DAC_001_T *) LPC_DAC_BASE)
#define | LPC_ADC ((IP_ADC_001_T *) LPC_ADC_BASE)
#define | LPC_IOCON ((LPC_IOCON_T *) LPC_IOCON_BASE)
#define | LPC_SDC ((IP_SDC_001_T *) LPC_SDC_BASE)
#define | LPC_SYSCTL ((LPC_SYSCTL_T *) LPC_SYSCTL_BASE)
#define | LPC_CMP ((IP_CMP_001_T *) LPC_CMP_BASE)
#define | LPC_CANAF_RAM ((LPC_CANAF_RAM_T *) LPC_CANAF_RAM_BASE)
#define | LPC_CANAF ((LPC_CANAF_T *) LPC_CANAF_BASE)
#define | LPC_CANCR ((LPC_CANCR_T *) LPC_CANCR_BASE)
#define | LPC_CAN1 ((LPC_CAN_T *) LPC_CAN1_BASE)
#define | LPC_CAN2 ((LPC_CAN_T *) LPC_CAN2_BASE)
#define | LPC_CRC ((LPC_CRC_T *) LPC_CRC_BASE)

## Typedefs
typedef IP_EEPROM_001_T | LPC_EEPROM_T
typedef IP_GPDMA_001_T | LPC_GPDMA_T
typedef IP_SDC_001_T | LPC_SDC_T
typedef IP_EMC_001_T | LPC_EMC_T
typedef IP_USB_001_T | LPC_USB_T
typedef IP_ENET_002_T | LPC_ENET_T
typedef IP_REGFILE_001_T | LPC_REGFILE_T
typedef IP_RTC_001_T | LPC_RTC_T
typedef IP_WWDT_001_T | LPC_WWDT_T
typedef IP_USART_001_T | LPC_USART_T
typedef IP_SSP_001_T | LPC_SSP_T
typedef IP_TIMER_001_T | LPC_TIMER_T
typedef IP_MCPWM_001_T | LPC_MCPWM_T
typedef IP_I2C_001_T | LPC_I2C_T
typedef IP_I2S_001_T | LPC_I2S_T
typedef IP_QEI_001_T | LPC_QEI_T
typedef IP_DAC_001_T | LPC_DAC_T
typedef IP_ADC_001_T | LPC_ADC_T
typedef IP_GPIO_002_T | LPC_GPIO_T
typedef IP_LCD_001_T | LPC_LCD_T
typedef IP_CAN_001_AF_RAM_T | LPC_CANAF_RAM_T
typedef IP_CAN_001_AF_T | LPC_CANAF_T
typedef IP_CAN_001_CR_T | LPC_CANCR_T
typedef IP_CAN_001_T | LPC_CAN_T
typedef IP_CRC_001_T | LPC_CRC_T

## Macro Definition Documentation

#define LPC_ADC ((IP_ADC_001_T *) LPC_ADC_BASE)

Definition at line 226 of file chip_lpc407x_8x.h.

#define LPC_ADC_BASE 0x40034000

Definition at line 157 of file chip_lpc407x_8x.h.

#define LPC_CAN1 ((LPC_CAN_T *) LPC_CAN1_BASE)

Definition at line 234 of file chip_lpc407x_8x.h.

#define LPC_CAN1_BASE 0x40044000

Definition at line 153 of file chip_lpc407x_8x.h.

#define LPC_CAN2 ((LPC_CAN_T *) LPC_CAN2_BASE)

Definition at line 235 of file chip_lpc407x_8x.h.

#define LPC_CAN2_BASE 0x40048000

Definition at line 154 of file chip_lpc407x_8x.h.

#define LPC_CANAF ((LPC_CANAF_T *) LPC_CANAF_BASE)

Definition at line 232 of file chip_lpc407x_8x.h.

#define LPC_CANAF_BASE 0x4003C000

Definition at line 151 of file chip_lpc407x_8x.h.

#define LPC_CANAF_RAM ((LPC_CANAF_RAM_T *) LPC_CANAF_RAM_BASE)

Definition at line 231 of file chip_lpc407x_8x.h.

#define LPC_CANAF_RAM_BASE 0x40038000

Definition at line 150 of file chip_lpc407x_8x.h.

#define LPC_CANCR ((LPC_CANCR_T *) LPC_CANCR_BASE)

Definition at line 233 of file chip_lpc407x_8x.h.

#define LPC_CANCR_BASE 0x40040000

Definition at line 152 of file chip_lpc407x_8x.h.

#define LPC_CMP ((IP_CMP_001_T *) LPC_CMP_BASE)

Definition at line 230 of file chip_lpc407x_8x.h.

#define LPC_CMP_BASE 0x40020000

Definition at line 162 of file chip_lpc407x_8x.h.

#define LPC_CRC ((LPC_CRC_T *) LPC_CRC_BASE)

Definition at line 236 of file chip_lpc407x_8x.h.

#define LPC_CRC_BASE 0x20090000

Definition at line 119 of file chip_lpc407x_8x.h.

#define LPC_DAC ((IP_DAC_001_T *) LPC_DAC_BASE)

Definition at line 225 of file chip_lpc407x_8x.h.

#define LPC_DAC_BASE 0x4008C000

Definition at line 156 of file chip_lpc407x_8x.h.

#define LPC_EEPROM ((IP_EEPROM_001_T *) LPC_EEPROM_BASE)

Definition at line 192 of file chip_lpc407x_8x.h.

#define LPC_EEPROM_BASE 0x00200080

Definition at line 114 of file chip_lpc407x_8x.h.

#define LPC_EMC ((IP_EMC_001_T *) LPC_EMC_BASE)

Definition at line 194 of file chip_lpc407x_8x.h.

#define LPC_EMC_BASE 0x2009C000

Definition at line 127 of file chip_lpc407x_8x.h.

#define LPC_ENET_BASE 0x20084000

Definition at line 116 of file chip_lpc407x_8x.h.

#define LPC_ETHERNET ((IP_ENET_002_T *) LPC_ENET_BASE)

Definition at line 197 of file chip_lpc407x_8x.h.

#define LPC_GPDMA ((IP_GPDMA_001_T *) LPC_GPDMA_BASE)

Definition at line 193 of file chip_lpc407x_8x.h.

#define LPC_GPDMA_BASE 0x20080000

Definition at line 115 of file chip_lpc407x_8x.h.

#define LPC_GPIO ((IP_GPIO_002_T *) LPC_GPIO0_BASE)

Definition at line 198 of file chip_lpc407x_8x.h.

#define LPC_GPIO0_BASE 0x20098000

Definition at line 121 of file chip_lpc407x_8x.h.

#define LPC_GPIO1 ((IP_GPIO_002_T *) LPC_GPIO1_BASE)

Definition at line 199 of file chip_lpc407x_8x.h.

#define LPC_GPIO1_BASE 0x20098020

Definition at line 122 of file chip_lpc407x_8x.h.

#define LPC_GPIO2 ((IP_GPIO_002_T *) LPC_GPIO2_BASE)

Definition at line 200 of file chip_lpc407x_8x.h.

#define LPC_GPIO2_BASE 0x20098040

Definition at line 123 of file chip_lpc407x_8x.h.

#define LPC_GPIO3 ((IP_GPIO_002_T *) LPC_GPIO3_BASE)

Definition at line 201 of file chip_lpc407x_8x.h.

#define LPC_GPIO3_BASE 0x20098060

Definition at line 124 of file chip_lpc407x_8x.h.

#define LPC_GPIO4 ((IP_GPIO_002_T *) LPC_GPIO4_BASE)

Definition at line 202 of file chip_lpc407x_8x.h.

#define LPC_GPIO4_BASE 0x20098080

Definition at line 125 of file chip_lpc407x_8x.h.

#define LPC_GPIO5 ((IP_GPIO_002_T *) LPC_GPIO5_BASE)

Definition at line 203 of file chip_lpc407x_8x.h.

#define LPC_GPIO5_BASE 0x200980A0

Definition at line 126 of file chip_lpc407x_8x.h.

#define LPC_GPIOINT_BASE 0x40028080

Definition at line 158 of file chip_lpc407x_8x.h.

#define LPC_I2C0 ((IP_I2C_001_T *) LPC_I2C0_BASE)

Definition at line 220 of file chip_lpc407x_8x.h.

#define LPC_I2C0_BASE 0x4001C000

Definition at line 146 of file chip_lpc407x_8x.h.

#define LPC_I2C1 ((IP_I2C_001_T *) LPC_I2C1_BASE)

Definition at line 221 of file chip_lpc407x_8x.h.

#define LPC_I2C1_BASE 0x4005C000

Definition at line 147 of file chip_lpc407x_8x.h.

#define LPC_I2C2 ((IP_I2C_001_T *) LPC_I2C2_BASE)

Definition at line 222 of file chip_lpc407x_8x.h.

#define LPC_I2C2_BASE 0x400A0000

Definition at line 148 of file chip_lpc407x_8x.h.

#define LPC_I2S ((IP_I2S_001_T *) LPC_I2S_BASE)

Definition at line 223 of file chip_lpc407x_8x.h.

#define LPC_I2S_BASE 0x400A8000

Definition at line 149 of file chip_lpc407x_8x.h.

#define LPC_IOCON ((LPC_IOCON_T *) LPC_IOCON_BASE)

Definition at line 227 of file chip_lpc407x_8x.h.

#define LPC_IOCON_BASE 0x4002C000

Definition at line 159 of file chip_lpc407x_8x.h.

#define LPC_LCD ((IP_LCD_001_T *) LPC_LCD_BASE)

Definition at line 196 of file chip_lpc407x_8x.h.

#define LPC_LCD_BASE 0x20088000

Definition at line 117 of file chip_lpc407x_8x.h.

#define LPC_MCPWM ((IP_MCPWM_001_T *) LPC_MCPWM_BASE)

Definition at line 219 of file chip_lpc407x_8x.h.

#define LPC_MCPWM_BASE 0x400B8000

Definition at line 143 of file chip_lpc407x_8x.h.

#define LPC_PWM0_BASE 0x40014000

Definition at line 144 of file chip_lpc407x_8x.h.

#define LPC_PWM1_BASE 0x40018000

Definition at line 145 of file chip_lpc407x_8x.h.

#define LPC_QEI ((IP_QEI_001_T *) LPC_QEI_BASE)

Definition at line 224 of file chip_lpc407x_8x.h.

#define LPC_QEI_BASE 0x400BC000

Definition at line 155 of file chip_lpc407x_8x.h.

#define LPC_REGFILE ((IP_REGFILE_001_T *) LPC_REGFILE_BASE)

Definition at line 205 of file chip_lpc407x_8x.h.

#define LPC_REGFILE_BASE 0x40024044

Definition at line 129 of file chip_lpc407x_8x.h.

#define LPC_RTC ((IP_RTC_001_T *) LPC_RTC_BASE)

Definition at line 204 of file chip_lpc407x_8x.h.

#define LPC_RTC_BASE 0x40024000

Definition at line 128 of file chip_lpc407x_8x.h.

#define LPC_SDC ((IP_SDC_001_T *) LPC_SDC_BASE)

Definition at line 228 of file chip_lpc407x_8x.h.

#define LPC_SDC_BASE 0x400C0000

Definition at line 160 of file chip_lpc407x_8x.h.

#define LPC_SPIFI_BASE 0x20094000

Definition at line 120 of file chip_lpc407x_8x.h.

#define LPC_SSP0 ((IP_SSP_001_T *) LPC_SSP0_BASE)

Definition at line 212 of file chip_lpc407x_8x.h.

#define LPC_SSP0_BASE 0x40088000

Definition at line 136 of file chip_lpc407x_8x.h.

#define LPC_SSP1 ((IP_SSP_001_T *) LPC_SSP1_BASE)

Definition at line 213 of file chip_lpc407x_8x.h.

#define LPC_SSP1_BASE 0x40030000

Definition at line 137 of file chip_lpc407x_8x.h.

#define LPC_SSP2 ((IP_SSP_001_T *) LPC_SSP2_BASE)

Definition at line 214 of file chip_lpc407x_8x.h.

#define LPC_SSP2_BASE 0x400AC000

Definition at line 138 of file chip_lpc407x_8x.h.

#define LPC_SYSCTL ((LPC_SYSCTL_T *) LPC_SYSCTL_BASE)

Definition at line 229 of file chip_lpc407x_8x.h.

#define LPC_SYSCTL_BASE 0x400FC000

Definition at line 161 of file chip_lpc407x_8x.h.

#define LPC_TIMER0 ((IP_TIMER_001_T *) LPC_TIMER0_BASE)

Definition at line 215 of file chip_lpc407x_8x.h.

#define LPC_TIMER0_BASE 0x40004000

Definition at line 139 of file chip_lpc407x_8x.h.

#define LPC_TIMER1 ((IP_TIMER_001_T *) LPC_TIMER1_BASE)

Definition at line 216 of file chip_lpc407x_8x.h.

#define LPC_TIMER1_BASE 0x40008000

Definition at line 140 of file chip_lpc407x_8x.h.

#define LPC_TIMER2 ((IP_TIMER_001_T *) LPC_TIMER2_BASE)

Definition at line 217 of file chip_lpc407x_8x.h.

#define LPC_TIMER2_BASE 0x40090000

Definition at line 141 of file chip_lpc407x_8x.h.

#define LPC_TIMER3 ((IP_TIMER_001_T *) LPC_TIMER3_BASE)

Definition at line 218 of file chip_lpc407x_8x.h.

#define LPC_TIMER3_BASE 0x40094000

Definition at line 142 of file chip_lpc407x_8x.h.

#define LPC_UART0 ((IP_USART_001_T *) LPC_UART0_BASE)

Definition at line 207 of file chip_lpc407x_8x.h.

#define LPC_UART0_BASE 0x4000C000

Definition at line 131 of file chip_lpc407x_8x.h.

#define LPC_UART1 ((IP_USART_001_T *) LPC_UART1_BASE)

Definition at line 208 of file chip_lpc407x_8x.h.

#define LPC_UART1_BASE 0x40010000

Definition at line 132 of file chip_lpc407x_8x.h.

#define LPC_UART2 ((IP_USART_001_T *) LPC_UART2_BASE)

Definition at line 209 of file chip_lpc407x_8x.h.

#define LPC_UART2_BASE 0x40098000

Definition at line 133 of file chip_lpc407x_8x.h.

#define LPC_UART3 ((IP_USART_001_T *) LPC_UART3_BASE)

Definition at line 210 of file chip_lpc407x_8x.h.

#define LPC_UART3_BASE 0x4009C000

Definition at line 134 of file chip_lpc407x_8x.h.

#define LPC_UART4 ((IP_USART_001_T *) LPC_UART4_BASE)

Definition at line 211 of file chip_lpc407x_8x.h.

#define LPC_UART4_BASE 0x400A4000

Definition at line 135 of file chip_lpc407x_8x.h.

#define LPC_USB ((IP_USB_001_T *) LPC_USB_BASE)

Definition at line 195 of file chip_lpc407x_8x.h.

#define LPC_USB_BASE 0x2008C000

Definition at line 118 of file chip_lpc407x_8x.h.

#define LPC_WWDT ((IP_WWDT_001_T *) LPC_WWDT_BASE)

Definition at line 206 of file chip_lpc407x_8x.h.

#define LPC_WWDT_BASE 0x40000000

Definition at line 130 of file chip_lpc407x_8x.h.

## Typedef Documentation

typedef IP_ADC_001_T LPC_ADC_T

Definition at line 182 of file chip_lpc407x_8x.h.

typedef IP_CAN_001_T LPC_CAN_T

Definition at line 188 of file chip_lpc407x_8x.h.

typedef IP_CAN_001_AF_RAM_T LPC_CANAF_RAM_T

Definition at line 185 of file chip_lpc407x_8x.h.

typedef IP_CAN_001_AF_T LPC_CANAF_T

Definition at line 186 of file chip_lpc407x_8x.h.

typedef IP_CAN_001_CR_T LPC_CANCR_T

Definition at line 187 of file chip_lpc407x_8x.h.

typedef IP_CRC_001_T LPC_CRC_T

Definition at line 189 of file chip_lpc407x_8x.h.

typedef IP_DAC_001_T LPC_DAC_T

Definition at line 181 of file chip_lpc407x_8x.h.

typedef IP_EEPROM_001_T LPC_EEPROM_T

Definition at line 165 of file chip_lpc407x_8x.h.

typedef IP_EMC_001_T LPC_EMC_T

Definition at line 168 of file chip_lpc407x_8x.h.

typedef IP_ENET_002_T LPC_ENET_T

Definition at line 170 of file chip_lpc407x_8x.h.

typedef IP_GPDMA_001_T LPC_GPDMA_T

Definition at line 166 of file chip_lpc407x_8x.h.

typedef IP_GPIO_002_T LPC_GPIO_T

Definition at line 183 of file chip_lpc407x_8x.h.

typedef IP_I2C_001_T LPC_I2C_T

Definition at line 178 of file chip_lpc407x_8x.h.

typedef IP_I2S_001_T LPC_I2S_T

Definition at line 179 of file chip_lpc407x_8x.h.

typedef IP_LCD_001_T LPC_LCD_T

Definition at line 184 of file chip_lpc407x_8x.h.

typedef IP_MCPWM_001_T LPC_MCPWM_T

Definition at line 177 of file chip_lpc407x_8x.h.

typedef IP_QEI_001_T LPC_QEI_T

Definition at line 180 of file chip_lpc407x_8x.h.

typedef IP_REGFILE_001_T LPC_REGFILE_T

Definition at line 171 of file chip_lpc407x_8x.h.

typedef IP_RTC_001_T LPC_RTC_T

Definition at line 172 of file chip_lpc407x_8x.h.

typedef IP_SDC_001_T LPC_SDC_T

Definition at line 167 of file chip_lpc407x_8x.h.

typedef IP_SSP_001_T LPC_SSP_T

Definition at line 175 of file chip_lpc407x_8x.h.

typedef IP_TIMER_001_T LPC_TIMER_T

Definition at line 176 of file chip_lpc407x_8x.h.

typedef IP_USART_001_T LPC_USART_T

Definition at line 174 of file chip_lpc407x_8x.h.

typedef IP_USB_001_T LPC_USB_T

Definition at line 169 of file chip_lpc407x_8x.h.

typedef IP_WWDT_001_T LPC_WWDT_T

Definition at line 173 of file chip_lpc407x_8x.h.