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IP_ADC_001_T Struct Reference
IP: 10 or 12-bit ADC register block and driver

## Detailed Description

10 or 12-bit ADC register block structure

Definition at line 57 of file adc_001.h.

`#include "adc_001.h"`

## Data Fields
__IO uint32_t | CR
__I uint32_t | GDR
__I uint32_t | RESERVED0
__IO uint32_t | INTEN
__I uint32_t | DR [8]
__I uint32_t | STAT

## Field Documentation

__IO uint32_t CR

< ADCn Structure A/D Control Register. The AD0CR register must be written to select the operating mode before A/D conversion can occur.

Definition at line 58 of file adc_001.h.

__I uint32_t DR[8]

A/D Channel Data Register. This register contains the result of the most recent conversion completed on channel n.

Definition at line 62 of file adc_001.h.

__I uint32_t GDR

A/D Global Data Register. Contains the result of the most recent A/D conversion.

Definition at line 59 of file adc_001.h.

__IO uint32_t INTEN

A/D Interrupt Enable Register. This register contains enable bits that allow the DONE flag of each A/D channel to be included or excluded from contributing to the generation of an A/D interrupt.

Definition at line 61 of file adc_001.h.

__I uint32_t RESERVED0

Definition at line 60 of file adc_001.h.

__I uint32_t STAT

A/D Status Register. This register contains DONE and OVERRUN flags for all of the A/D channels, as well as the A/D interrupt flag.

Definition at line 63 of file adc_001.h.

The documentation for this struct was generated from the following file:

- C:/nxp/v1.03/lpcopen_v1.03/lpcopen/software/lpc_core/lpc_ip/adc_001.h