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iocon_8xx.h
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1 /*
2 * @brief LPC8xx IOCON register block and driver
3 *
4 * @note
5 * Copyright(C) NXP Semiconductors, 2012
6 * All rights reserved.
7 *
8 * @par
9 * Software that is described herein is for illustrative purposes only
10 * which provides customers with programming information regarding the
11 * LPC products. This software is supplied "AS IS" without any warranties of
12 * any kind, and NXP Semiconductors and its licenser disclaim any and
13 * all warranties, express or implied, including all implied warranties of
14 * merchantability, fitness for a particular purpose and non-infringement of
15 * intellectual property rights. NXP Semiconductors assumes no responsibility
16 * or liability for the use of the software, conveys no license or rights under any
17 * patent, copyright, mask work right, or any other intellectual property rights in
18 * or to any products. NXP Semiconductors reserves the right to make changes
19 * in the software without notification. NXP Semiconductors also makes no
20 * representation or warranty that such application will be suitable for the
21 * specified use without further testing or modification.
22 *
23 * @par
24 * Permission to use, copy, modify, and distribute this software and its
25 * documentation is hereby granted, under NXP Semiconductors' and its
26 * licensor's relevant copyrights in the software, without fee, provided that it
27 * is used in conjunction with NXP Semiconductors microcontrollers. This
28 * copyright, permission, and disclaimer notice must appear in all copies of
29 * this code.
30 */
31
32 #ifndef __IOCON_8XX_H_
33 #define __IOCON_8XX_H_
34
35 #ifdef __cplusplus
36 extern "C" {
37 #endif
38
47 typedef struct {
48 __IO uint32_t PIO0_17;
49 __IO uint32_t PIO0_13;
50 __IO uint32_t PIO0_12;
51 __IO uint32_t PIO0_5;
52 __IO uint32_t PIO0_4;
53 __IO uint32_t PIO0_3;
54 __IO uint32_t PIO0_2;
55 __IO uint32_t PIO0_11;
56 __IO uint32_t PIO0_10;
57 __IO uint32_t PIO0_16;
58 __IO uint32_t PIO0_15;
59 __IO uint32_t PIO0_1;
60 __IO uint32_t Reserved;
61 __IO uint32_t PIO0_9;
62 __IO uint32_t PIO0_8;
63 __IO uint32_t PIO0_7;
64 __IO uint32_t PIO0_6;
65 __IO uint32_t PIO0_0;
66 __IO uint32_t PIO0_14;
67 } LPC_IOCON_T;
68
72 typedef enum CHIP_PINx {
73 PIO0 = 0,
74 PIO1 = 1,
75 PIO2 = 2,
76 PIO3 = 3,
77 PIO4 = 4,
78 PIO5 = 5,
79 PIO6 = 6,
80 PIO7 = 7,
81 PIO8 = 8,
82 PIO9 = 9,
83 PIO10 = 10,
84 PIO11 = 11,
85 PIO12 = 12,
86 PIO13 = 13,
87 PIO14 = 14,
88 PIO15 = 15,
89 PIO16 = 16,
90 PIO17 = 17,
91 PIO_NUL = 0xFF
92 } CHIP_PINx_T;
93
97 typedef enum CHIP_PIN_MODE {
98 PIN_MODE_INACTIVE = 0,
99 PIN_MODE_PULLDN = 1,
100 PIN_MODE_PULLUP = 2,
101 PIN_MODE_REPEATER = 3
102 } CHIP_PIN_MODE_T;
103
107 typedef enum CHIP_PIN_SMODE {
108 PIN_SMODE_BYPASS = 0,
109 PIN_SMODE_CYC1 = 1,
110 PIN_SMODE_CYC2 = 2,
111 PIN_SMODE_CYC3 = 3
112 } CHIP_PIN_SMODE_T;
113
118 typedef enum CHIP_PIN_CLKDIV {
119 IOCONCLKDIV0 = 0,
120 IOCONCLKDIV1 = 1,
121 IOCONCLKDIV2 = 2,
122 IOCONCLKDIV3 = 3,
123 IOCONCLKDIV4 = 4,
124 IOCONCLKDIV5 = 5,
125 IOCONCLKDIV6 = 6
126 } CHIP_PIN_CLKDIV_T;
127
131 typedef enum CHIP_PIN_I2CMODE {
132 PIN_I2CMODE_STDFAST = 0,
133 PIN_I2CMODE_GPIO = 1,
134 PIN_I2CMODE_FASTPLUS = 2
135 } CHIP_PIN_I2CMODE_T;
136
144 void Chip_IOCON_PinSetMode(LPC_IOCON_T *pIOCON, CHIP_PINx_T pin, CHIP_PIN_MODE_T mode);
145
153 void Chip_IOCON_PinSetHysteresis(LPC_IOCON_T *pIOCON, CHIP_PINx_T pin, bool enable);
154
162 void Chip_IOCON_PinSetInputInverted(LPC_IOCON_T *pIOCON, CHIP_PINx_T pin, bool invert);
163
172 void Chip_IOCON_PinSetOpenDrainMode(LPC_IOCON_T *pIOCON, CHIP_PINx_T pin, bool open_drain);
173
181 void Chip_IOCON_PinSetSampleMode(LPC_IOCON_T *pIOCON, CHIP_PINx_T pin, CHIP_PIN_SMODE_T smode);
182
190 void Chip_IOCON_PinSetClockDivisor(LPC_IOCON_T *pIOCON, CHIP_PINx_T pin, CHIP_PIN_CLKDIV_T clkdiv);
191
200 void Chip_IOCON_PinSetI2CMode(LPC_IOCON_T *pIOCON, CHIP_PINx_T pin, CHIP_PIN_I2CMODE_T mode);
201
206 #ifdef __cplusplus
207 }
208 #endif
209
210 #endif /* __IOCON_8XX_H_ */