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IP_ENET_001_T Struct Reference
IP: Ethernet register block and driver

## Detailed Description

10/100 MII & RMII Ethernet with timestamping register block structure

Definition at line 50 of file enet_001.h.

`#include "enet_001.h"`

## Data Fields
__IO uint32_t | MAC_CONFIG
__IO uint32_t | MAC_FRAME_FILTER
__IO uint32_t | MAC_HASHTABLE_HIGH
__IO uint32_t | MAC_HASHTABLE_LOW
__IO uint32_t | MAC_MII_ADDR
__IO uint32_t | MAC_MII_DATA
__IO uint32_t | MAC_FLOW_CTRL
__IO uint32_t | MAC_VLAN_TAG
__I uint32_t | RESERVED0
__I uint32_t | MAC_DEBUG
__IO uint32_t | MAC_RWAKE_FRFLT
__IO uint32_t | MAC_PMT_CTRL_STAT
__I uint32_t | RESERVED1 [2]
__I uint32_t | MAC_INTR
__IO uint32_t | MAC_INTR_MASK
__IO uint32_t | MAC_ADDR0_HIGH
__IO uint32_t | MAC_ADDR0_LOW
__I uint32_t | RESERVED2 [430]
__IO uint32_t | MAC_TIMESTP_CTRL
__IO uint32_t | SUBSECOND_INCR
__I uint32_t | SECONDS
__I uint32_t | NANOSECONDS
__IO uint32_t | SECONDSUPDATE
__IO uint32_t | NANOSECONDSUPDATE
__IO uint32_t | ADDEND
__IO uint32_t | TARGETSECONDS
__IO uint32_t | TARGETNANOSECONDS
__IO uint32_t | HIGHWORD
__I uint32_t | TIMESTAMPSTAT
__IO uint32_t | PPSCTRL
__I uint32_t | AUXNANOSECONDS
__I uint32_t | AUXSECONDS
__I uint32_t | RESERVED3 [562]
__IO uint32_t | DMA_BUS_MODE
__IO uint32_t | DMA_TRANS_POLL_DEMAND
__IO uint32_t | DMA_REC_POLL_DEMAND
__IO uint32_t | DMA_REC_DES_ADDR
__IO uint32_t | DMA_TRANS_DES_ADDR
__IO uint32_t | DMA_STAT
__IO uint32_t | DMA_OP_MODE
__IO uint32_t | DMA_INT_EN
__I uint32_t | DMA_MFRM_BUFOF
__IO uint32_t | DMA_REC_INT_WDT
__I uint32_t | RESERVED4 [8]
__I uint32_t | DMA_CURHOST_TRANS_DES
__I uint32_t | DMA_CURHOST_REC_DES
__I uint32_t | DMA_CURHOST_TRANS_BUF
__I uint32_t | DMA_CURHOST_REC_BUF

## Field Documentation

__IO uint32_t ADDEND

Time stamp addend register

Definition at line 75 of file enet_001.h.

__I uint32_t AUXNANOSECONDS

Auxiliary time stamp nanoseconds register

Definition at line 81 of file enet_001.h.

__I uint32_t AUXSECONDS

Auxiliary time stamp seconds register

Definition at line 82 of file enet_001.h.

__IO uint32_t DMA_BUS_MODE

Bus Mode Register

Definition at line 84 of file enet_001.h.

__I uint32_t DMA_CURHOST_REC_BUF

Current host receive buffer address register

Definition at line 98 of file enet_001.h.

__I uint32_t DMA_CURHOST_REC_DES

Current host receive descriptor register

Definition at line 96 of file enet_001.h.

__I uint32_t DMA_CURHOST_TRANS_BUF

Current host transmit buffer address register

Definition at line 97 of file enet_001.h.

__I uint32_t DMA_CURHOST_TRANS_DES

Current host transmit descriptor register

Definition at line 95 of file enet_001.h.

__IO uint32_t DMA_INT_EN

Interrupt enable register

Definition at line 91 of file enet_001.h.

__I uint32_t DMA_MFRM_BUFOF

Missed frame and buffer overflow register

Definition at line 92 of file enet_001.h.

__IO uint32_t DMA_OP_MODE

Operation mode register

Definition at line 90 of file enet_001.h.

__IO uint32_t DMA_REC_DES_ADDR

Receive descriptor list address register

Definition at line 87 of file enet_001.h.

__IO uint32_t DMA_REC_INT_WDT

Receive interrupt watchdog timer register

Definition at line 93 of file enet_001.h.

__IO uint32_t DMA_REC_POLL_DEMAND

Receive poll demand register

Definition at line 86 of file enet_001.h.

__IO uint32_t DMA_STAT

Status register

Definition at line 89 of file enet_001.h.

__IO uint32_t DMA_TRANS_DES_ADDR

Transmit descriptor list address register

Definition at line 88 of file enet_001.h.

__IO uint32_t DMA_TRANS_POLL_DEMAND

Transmit poll demand register

Definition at line 85 of file enet_001.h.

__IO uint32_t HIGHWORD

System time higher word seconds register

Definition at line 78 of file enet_001.h.

__IO uint32_t MAC_ADDR0_HIGH

MAC address 0 high register

Definition at line 66 of file enet_001.h.

__IO uint32_t MAC_ADDR0_LOW

MAC address 0 low register

Definition at line 67 of file enet_001.h.

__IO uint32_t MAC_CONFIG

< ETHERNET Structure MAC configuration register

Definition at line 51 of file enet_001.h.

__I uint32_t MAC_DEBUG

Debug register

Definition at line 60 of file enet_001.h.

__IO uint32_t MAC_FLOW_CTRL

Flow control register

Definition at line 57 of file enet_001.h.

__IO uint32_t MAC_FRAME_FILTER

MAC frame filter

Definition at line 52 of file enet_001.h.

__IO uint32_t MAC_HASHTABLE_HIGH

Hash table high register

Definition at line 53 of file enet_001.h.

__IO uint32_t MAC_HASHTABLE_LOW

Hash table low register

Definition at line 54 of file enet_001.h.

__I uint32_t MAC_INTR

Interrupt status register

Definition at line 64 of file enet_001.h.

__IO uint32_t MAC_INTR_MASK

Interrupt mask register

Definition at line 65 of file enet_001.h.

__IO uint32_t MAC_MII_ADDR

MII address register

Definition at line 55 of file enet_001.h.

__IO uint32_t MAC_MII_DATA

MII data register

Definition at line 56 of file enet_001.h.

__IO uint32_t MAC_PMT_CTRL_STAT

PMT control and status

Definition at line 62 of file enet_001.h.

__IO uint32_t MAC_RWAKE_FRFLT

Remote wake-up frame filter

Definition at line 61 of file enet_001.h.

__IO uint32_t MAC_TIMESTP_CTRL

Time stamp control register

Definition at line 69 of file enet_001.h.

__IO uint32_t MAC_VLAN_TAG

VLAN tag register

Definition at line 58 of file enet_001.h.

__I uint32_t NANOSECONDS

System time nanoseconds register

Definition at line 72 of file enet_001.h.

__IO uint32_t NANOSECONDSUPDATE

System time nanoseconds update register

Definition at line 74 of file enet_001.h.

__IO uint32_t PPSCTRL

PPS control register

Definition at line 80 of file enet_001.h.

__I uint32_t RESERVED0

Definition at line 59 of file enet_001.h.

__I uint32_t RESERVED1[2]

Definition at line 63 of file enet_001.h.

__I uint32_t RESERVED2[430]

Definition at line 68 of file enet_001.h.

__I uint32_t RESERVED3[562]

Definition at line 83 of file enet_001.h.

__I uint32_t RESERVED4[8]

Definition at line 94 of file enet_001.h.

__I uint32_t SECONDS

System time seconds register

Definition at line 71 of file enet_001.h.

__IO uint32_t SECONDSUPDATE

System time seconds update register

Definition at line 73 of file enet_001.h.

__IO uint32_t SUBSECOND_INCR

Sub-second increment register

Definition at line 70 of file enet_001.h.

__IO uint32_t TARGETNANOSECONDS

Target time nanoseconds register

Definition at line 77 of file enet_001.h.

__IO uint32_t TARGETSECONDS

Target time seconds register

Definition at line 76 of file enet_001.h.

__I uint32_t TIMESTAMPSTAT

Time stamp status register

Definition at line 79 of file enet_001.h.

The documentation for this struct was generated from the following file:

- C:/nxp/v1.03/lpcopen_v1.03/lpcopen/software/lpc_core/lpc_ip/enet_001.h