35 #include "sys_config.h"
47 #if defined(CHIP_LPC177X_8X) || defined(CHIP_LPC407X_8X) || defined(CHIP_LPC1347) || defined(CHIP_LPC175X_6X)
48 #define ADC_ACC_12BITS
49 #define ADC_TRIM_SUPPORT
51 #define ADC_ACC_10BITS
64 #if defined(ADC_TRIM_SUPPORT)
72 #if defined(ADC_ACC_12BITS)
73 #define ADC_DR_RESULT(n) ((((n) >> 4) & 0xFFF))
75 #define ADC_DR_RESULT(n) ((((n) >> 6) & 0x3FF))
76 #define ADC_CR_BITACC(n) ((((n) & 0x7) << 17))
79 #define ADC_DR_DONE(n) (((n) >> 31))
80 #define ADC_DR_OVERRUN(n) ((((n) >> 30) & (1UL)))
81 #define ADC_CR_CH_SEL(n) ((1UL << (n)))
82 #define ADC_CR_CLKDIV(n) ((((n) & 0xFF) << 8))
83 #define ADC_CR_BURST ((1UL << 16))
84 #if defined(CHIP_LPC1347)
85 #define ADC_CR_LPWRMODE ((1UL << 22))
86 #define ADC_CR_MODE10BIT ((1UL << 23))
88 #define ADC_CR_PDN ((1UL << 21))
90 #define ADC_CR_START_MASK ((7UL << 24))
91 #define ADC_CR_START_MODE_SEL(SEL) ((SEL << 24))
92 #define ADC_CR_START_NOW ((1UL << 24))
93 #define ADC_CR_START_CTOUT15 ((2UL << 24))
94 #define ADC_CR_START_CTOUT8 ((3UL << 24))
95 #define ADC_CR_START_ADCTRIG0 ((4UL << 24))
96 #define ADC_CR_START_ADCTRIG1 ((5UL << 24))
97 #define ADC_CR_START_MCOA2 ((6UL << 24))
98 #define ADC_CR_EDGE ((1UL << 27))
99 #if defined(CHIP_LPC1347)
100 #define ADC_CONFIG_MASK (ADC_CR_CLKDIV(0xFF) | ADC_CR_LPWRMODE | ADC_CR_MODE10BIT)
101 #elif defined(CHIP_LPC1343)
102 #define ADC_CONFIG_MASK (ADC_CR_CLKDIV(0xFF) | ADC_CR_BITACC(0x07))
103 #elif defined(ADC_ACC_12BITS)
104 #define ADC_CONFIG_MASK (ADC_CR_CLKDIV(0xFF) | ADC_CR_PDN)
106 #define ADC_CONFIG_MASK (ADC_CR_CLKDIV(0xFF) | ADC_CR_BITACC(0x07) | ADC_CR_PDN)
112 typedef enum IP_ADC_STATUS {