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LPCOpen Platform for NXP LPC Microcontrollers
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chip.h
Go to the documentation of this file.
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/*
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* @brief LPC13xx basic chip inclusion file
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*
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* Copyright(C) NXP Semiconductors, 2012
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* All rights reserved.
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*
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* Software that is described herein is for illustrative purposes only
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* which provides customers with programming information regarding the
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* LPC products. This software is supplied "AS IS" without any warranties of
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* any kind, and NXP Semiconductors and its licensor disclaim any and
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* all warranties, express or implied, including all implied warranties of
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* merchantability, fitness for a particular purpose and non-infringement of
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* intellectual property rights. NXP Semiconductors assumes no responsibility
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* or liability for the use of the software, conveys no license or rights under any
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* patent, copyright, mask work right, or any other intellectual property rights in
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* or to any products. NXP Semiconductors reserves the right to make changes
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* in the software without notification. NXP Semiconductors also makes no
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* representation or warranty that such application will be suitable for the
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* specified use without further testing or modification.
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*
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* Permission to use, copy, modify, and distribute this software and its
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* documentation is hereby granted, under NXP Semiconductors' and its
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* licensor's relevant copyrights in the software, without fee, provided that it
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* is used in conjunction with NXP Semiconductors microcontrollers. This
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* copyright, permission, and disclaimer notice must appear in all copies of
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* this code.
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*/
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#ifndef __CHIP_H_
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#define __CHIP_H_
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#include "
lpc_types.h
"
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#include "sys_config.h"
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#include "
cmsis.h
"
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#ifdef __cplusplus
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extern
"C"
{
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#endif
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#ifndef CORE_M3
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#error CORE_M3 is not defined for the LPC13xx architecture
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#error CORE_M3 should be defined as part of your compiler define list
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#endif
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#if !defined(CHIP_LPC1343) && !defined(CHIP_LPC1347)
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#error CHIP_LPC1343 or CHIP_LPC1347 is not defined!
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#endif
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#if !defined (ENABLE_UNTESTED_CODE)
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#if defined(CHIP_LPC1343)
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#error The LPC1343 code has not been tested with a platform. This code should \
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build without errors but may not work correctly for the device. To disable this \
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error message, define ENABLE_UNTESTED_CODE.
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#endif
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#endif
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/* Peripheral mapping per device
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Peripheral Device(s)
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---------------------------- ------------------------------------------------------------------------------
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I2C(40000000) CHIP_LPC1343/CHIP_LPC1347
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WDT(40004000) CHIP_LPC1343/CHIP_LPC1347
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TIMER0_16(4000C000) CHIP_LPC1343/CHIP_LPC1347
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TIMER1_16(40010000) CHIP_LPC1343/CHIP_LPC1347
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TIMER0_32(40014000) CHIP_LPC1343/CHIP_LPC1347
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TIMER1_32(40018000) CHIP_LPC1343/CHIP_LPC1347
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PMU(40038000) CHIP_LPC1343/CHIP_LPC1347
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FLASH_CTRL(4003C000) CHIP_LPC1343/CHIP_LPC1347
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SSP0(40040000) CHIP_LPC1343/CHIP_LPC1347
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IOCONF(40044000) CHIP_LPC1343/CHIP_LPC1347
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SYSCTL(40048000) CHIP_LPC1343/CHIP_LPC1347
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SSP1(40058000) CHIP_LPC1347
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ADC(4001C000) CHIP_LPC1343/CHIP_LPC1347
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UART(40008000) CHIP_LPC1343 only
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USB(40020000) CHIP_LPC1343 only
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GPIO_PORT(50000000) CHIP_LPC1343 only
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GPIO_PIO0(50000000) CHIP_LPC1343 only
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GPIO_PIO1(50010000) CHIP_LPC1343 only
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GPIO_PIO2(50020000) CHIP_LPC1343 only
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GPIO_PIO3(50030000) CHIP_LPC1343 only
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USART/SMARTCARD(40008000) CHIP_LPC1347 only
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FLASH_EEPROM(4003C000) CHIP_LPC1347 only
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GPIO_INT(4004C000) CHIP_LPC1347 only
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GPIO_GRP0_INT(4005C000) CHIP_LPC1347 only
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GPIO_GRP1_INT(40060000) CHIP_LPC1347 only
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RITIMER(40064000) CHIP_LPC1347 only
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*/
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#include "
adc_001.h
"
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#include "
i2c_001.h
"
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#include "
wwdt_001.h
"
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#include "
timer_001.h
"
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#include "
ssp_001.h
"
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#include "
usart_004.h
"
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#if defined(CHIP_LPC1343)
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#include "
gpio_003.h
"
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#else
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#include "
gpio_001.h
"
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#include "
gpiogrpint_001.h
"
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#include "
gpiopinint_001.h
"
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#include "
ritimer_001.h
"
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#include "
flash_001.h
"
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#endif
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#define LPC_I2C_BASE 0x40000000
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#define LPC_WWDT_BASE 0x40004000
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#define LPC_USART_BASE 0x40008000
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#define LPC_TIMER16_0_BASE 0x4000C000
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#define LPC_TIMER16_1_BASE 0x40010000
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#define LPC_TIMER32_0_BASE 0x40014000
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#define LPC_TIMER32_1_BASE 0x40018000
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#define LPC_ADC_BASE 0x4001C000
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#define LPC_PMU_BASE 0x40038000
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#define LPC_FLASH_BASE 0x4003C000
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#define LPC_SSP0_BASE 0x40040000
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#define LPC_SSP1_BASE 0x40058000
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#define LPC_IOCON_BASE 0x40044000
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#define LPC_SYSCTL_BASE 0x40048000
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#if defined(CHIP_LPC1347)
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#define LPC_GPIO_PIN_INT_BASE 0x4004C000
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#define LPC_GPIO_GROUP_INT0_BASE 0x4005C000
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#define LPC_GPIO_GROUP_INT1_BASE 0x40060000
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#define LPC_GPIO_PORT_BASE 0x50000000
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#define LPC_USB0_BASE 0x40080000
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#define LPC_RITIMER_BASE 0x40064000
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#else
/*CHIP_LPC1343*/
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#define LPC_GPIO_PORT0_BASE 0x50000000
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#define LPC_GPIO_PORT1_BASE 0x50010000
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#define LPC_GPIO_PORT2_BASE 0x50020000
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#define LPC_GPIO_PORT3_BASE 0x50030000
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#define LPC_USB0_BASE 0x40020000
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#endif
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/* Normalize types */
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typedef
IP_WWDT_001_T
LPC_WWDT_T
;
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typedef
IP_USART_001_T
LPC_USART_T
;
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typedef
IP_SSP_001_T
LPC_SSP_T
;
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typedef
IP_TIMER_001_T
LPC_TIMER_T
;
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typedef
IP_I2C_001_T
LPC_I2C_T
;
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typedef
IP_ADC_001_T
LPC_ADC_T
;
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#if defined(CHIP_LPC1347)
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typedef
IP_GPIO_001_T
LPC_GPIO_T
;
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typedef
IP_GPIOPININT_001_T
LPC_GPIOPININT_T
;
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typedef
IP_RITIMER_001_T
LPC_RITIMER_T
;
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#else
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typedef
IP_GPIO_003_T
LPC_GPIO_T
;
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#endif
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#define LPC_ADC ((IP_ADC_001_T *) LPC_ADC_BASE)
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#define LPC_I2C ((IP_I2C_001_T *) LPC_I2C_BASE)
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#define LPC_WWDT ((IP_WWDT_001_T *) LPC_WWDT_BASE)
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#define LPC_USART ((IP_USART_001_T *) LPC_USART_BASE)
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#define LPC_TIMER16_0 ((IP_TIMER_001_T *) LPC_TIMER16_0_BASE)
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#define LPC_TIMER16_1 ((IP_TIMER_001_T *) LPC_TIMER16_1_BASE)
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#define LPC_TIMER32_0 ((IP_TIMER_001_T *) LPC_TIMER32_0_BASE)
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#define LPC_TIMER32_1 ((IP_TIMER_001_T *) LPC_TIMER32_1_BASE)
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#define LPC_PMU ((LPC_PMU_T *) LPC_PMU_BASE)
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#define LPC_FMC ((LPC_FMC_T *) LPC_FLASH_BASE)
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#define LPC_SSP0 ((IP_SSP_001_T *) LPC_SSP0_BASE)
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#define LPC_SSP1 ((IP_SSP_001_T *) LPC_SSP1_BASE)
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#define LPC_IOCON ((LPC_IOCON_T *) LPC_IOCON_BASE)
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#define LPC_SYSCTL ((LPC_SYSCTL_T *) LPC_SYSCTL_BASE)
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#if defined(CHIP_LPC1347)
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#define LPC_GPIO_PIN_INT ((IP_GPIOPININT_001_T *) LPC_GPIO_PIN_INT_BASE)
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#define LPC_GPIO_GROUP_INT0 ((IP_GPIOGROUPINT_001_T *) LPC_GPIO_GROUP_INT0_BASE)
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#define LPC_GPIO_GROUP_INT1 ((IP_GPIOGROUPINT_001_T *) LPC_GPIO_GROUP_INT1_BASE)
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#define LPC_GPIO_PORT ((IP_GPIO_001_T *) LPC_GPIO_PORT_BASE)
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#define LPC_RITIMER ((IP_RITIMER_001_T *) LPC_RITIMER_BASE)
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#define LPC_USB ((LPC_USB_T *) LPC_USB0_BASE)
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#else
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#define LPC_GPIO_PORT ((IP_GPIO_003_T *) LPC_GPIO_PORT0_BASE)
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#endif
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#include "
ring_buffer.h
"
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#include "
sysctl_13xx.h
"
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#include "
clock_13xx.h
"
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#include "
fmc_13xx.h
"
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#include "
timer_13xx.h
"
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#include "
wwdt_13xx.h
"
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#include "
adc_13xx.h
"
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#if defined(CHIP_LPC1347)
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#include "
ritimer_13xx.h
"
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#include "
usbd_1347.h
"
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#include "
flash_13xx.h
"
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#endif
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#include "
iocon_13xx.h
"
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#include "
gpio_13xx.h
"
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#include "
uart_13xx.h
"
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#include "
ssp_13xx.h
"
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#include "
i2c_13xx.h
"
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// FIXME - missing PMU support
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#ifdef __cplusplus
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}
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#endif
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#endif
/* __CHIP_H_ */
software
lpc_core
lpc_chip
chip_13xx
chip.h
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