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cmp_001.h
Go to the documentation of this file.
1
/*
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* @brief CMP Registers and control functions
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*
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* @note
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* Copyright(C) NXP Semiconductors, 2012
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* All rights reserved.
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*
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* @par
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* Software that is described herein is for illustrative purposes only
10
* which provides customers with programming information regarding the
11
* LPC products. This software is supplied "AS IS" without any warranties of
12
* any kind, and NXP Semiconductors and its licensor disclaim any and
13
* all warranties, express or implied, including all implied warranties of
14
* merchantability, fitness for a particular purpose and non-infringement of
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* intellectual property rights. NXP Semiconductors assumes no responsibility
16
* or liability for the use of the software, conveys no license or rights under any
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* patent, copyright, mask work right, or any other intellectual property rights in
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* or to any products. NXP Semiconductors reserves the right to make changes
19
* in the software without notification. NXP Semiconductors also makes no
20
* representation or warranty that such application will be suitable for the
21
* specified use without further testing or modification.
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*
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* @par
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* Permission to use, copy, modify, and distribute this software and its
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* documentation is hereby granted, under NXP Semiconductors' and its
26
* licensor's relevant copyrights in the software, without fee, provided that it
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* is used in conjunction with NXP Semiconductors microcontrollers. This
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* copyright, permission, and disclaimer notice must appear in all copies of
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* this code.
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*/
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32
#ifndef __CMP_001_H_
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#define __CMP_001_H_
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#include "sys_config.h"
36
#include "cmsis.h"
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38
#ifdef __cplusplus
39
extern
"C"
{
40
#endif
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48
#define CMP_NUM 2
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53
typedef
struct
{
54
__IO
uint32_t
CMP_CTRL
;
55
__IO
uint32_t
CMP_CTRLx[
CMP_NUM
];
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}
IP_CMP_001_T
;
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61
typedef
enum
IP_CMP_ENCTRL {
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CMP_ENCTRL_DISABLE
,
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CMP_ENCTRL_DIS_IN_DS_PWD
,
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CMP_ENCTRL_DIS_IN_PWD
,
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CMP_ENCTRL_ENABLE
,
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}
IP_CMP_ENCTRL_T
;
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#define CMP_CTRL_BITMASK (0xF30F)
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#define CMP_CTRL_PD_IREF_BITMASK (0x03)
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#define CMP_CTRL_PD_IREF(n) ((((uint32_t) (n)) & 0x03))
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#define CMP_CTRL_PD_VBG_BITMASK (((uint32_t) 0x03) << 2)
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#define CMP_CTRL_PD_VBG(n) ((((uint32_t) (n)) & 0x03) << 2)
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#define CMP_CTRL_ROSC_BITMASK ((uint32_t) 0x300)
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#define CMP_CTRL_ROSCCTL_CMP1 (0x00)
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#define CMP_CTRL_ROSCCTL_CMP0 (((uint32_t) 0x01) << 8)
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#define CMP_CTRL_EXT_RESET_INTERNAL (0x00)
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#define CMP_CTRL_EXT_RESET_CMPRESET (((uint32_t) 0x01) << 9)
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#define CMP_CTRL_TIMERCAPTURE_BITMASK ((uint32_t) 0xF000)
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#define CMP_CTRL_T0CAP2_0LEVEL (0x00)
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#define CMP_CTRL_T0CAP2_1LEVEL (((uint32_t) 0x01) << 12)
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#define CMP_CTRL_T0CAP3_0EDGE (0x00)
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#define CMP_CTRL_T0CAP3_1EDGE (((uint32_t) 0x01) << 13)
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#define CMP_CTRL_T1CAP2_1EDGE (0x00)
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#define CMP_CTRL_T1CAP2_0LEVEL (((uint32_t) 0x01) << 14)
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#define CMP_CTRL_T1CAP3_1LEVEL (0x00)
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#define CMP_CTRL_T1CAP3_0EDGE (((uint32_t) 0x01) << 15)
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#define CMP_CTRLx_BITMASK ((uint32_t) 0x1F7FF77F)
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#define CMP_CTRLx_EN_BITMASK (0x03)
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#define CMP_CTRLx_EN(n) ((((uint32_t) (n)) & 0x03))
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#define CMP_CTRLx_OE (((uint32_t) 0x01) << 2)
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#define CMP_CTRLx_STAT (((uint32_t) 0x01) << 3)
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#define CMP_CTRLx_VM_BITMASK (((uint32_t) 0x07) << 4)
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#define CMP_CTRLx_VM(n) ((((uint32_t) (n)) & 0x07) << 4)
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#define CMP_CTRLx_VP_BITMASK (((uint32_t) 0x07) << 8)
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#define CMP_CTRLx_VP(n) ((((uint32_t) (n)) & 0x07) << 8)
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#define CMP_CTRLx_SYNC (((uint32_t) 0x01) << 12)
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#define CMP_CTRLx_HYS_BITMASK (((uint32_t) 0x03) << 13)
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#define CMP_CTRLx_HYS(n) ((((uint32_t) (n)) & 0x03) << 13)
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#define CMP_CTRLx_INTCTRL_BITMASK ((uint32_t) 0x78000)
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#define CMP_CTRLx_INTPOL_NORMAL (0x00)
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#define CMP_CTRLx_INTPOL_INV (((uint32_t) 0x01) << 15)
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#define CMP_CTRLx_INTTYPE_EDGE (0x00)
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#define CMP_CTRLx_INTTYPE_LEVEL (((uint32_t) 0x01) << 16)
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#define CMP_CTRLx_INTEDGE_BITMASK (((uint32_t) 0x03) << 17)
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#define CMP_CTRLx_INTEDGE(n) ((((uint32_t) (n)) & 0x03) << 17)
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#define CMP_CTRLx_INTFLAG (((uint32_t) 0x01) << 19)
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#define CMP_CTRLx_VLADEN_BITMASK (((uint32_t) 0x03) << 20)
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#define CMP_CTRLx_VLADEN(n) ((((uint32_t) (n)) & 0x03) << 20)
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#define CMP_CTRLx_VLADREF_VREFCMP (0x00)
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#define CMP_CTRLx_VLADREF_VDDA (((uint32_t) 0x01) << 22)
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#define CMP_CTRLx_VSEL_BITMASK ((uint32_t) ((0x1F) << 24))
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#define CMP_CTRLx_VSEL(n) ((((uint32_t) (n)) & 0x1F) << 24)
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typedef
enum
IP_CMP_INPUT {
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CMP_INPUT_VREF_DIV
,
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CMP_INPUT_CMPx_IN0
,
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CMP_INPUT_CMPx_IN1
,
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CMP_INPUT_CMPx_IN2
,
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CMP_INPUT_CMPx_IN3
,
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CMP_INPUT_CMP_OTHER_IN0
,
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CMP_INPUT_INTERNAL_09VBG
,
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}
IP_CMP_INPUT_T
;
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typedef
enum
IP_CMP_HYS {
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CMP_HYS_NONE
=
CMP_CTRLx_HYS
(0),
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CMP_HYS_5MV
=
CMP_CTRLx_HYS
(1),
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CMP_HYS_10MV
=
CMP_CTRLx_HYS
(2),
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CMP_HYS_15MV
=
CMP_CTRLx_HYS
(3),
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}
IP_CMP_HYS_T
;
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typedef
enum
IP_CMP_INTEDGE {
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CMP_INTEDGE_FALLING
=
CMP_CTRLx_INTEDGE
(0),
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CMP_INTEDGE_RISING
=
CMP_CTRLx_INTEDGE
(1),
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CMP_INTEDGE_BOTH
=
CMP_CTRLx_INTEDGE
(2),
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}
IP_CMP_INTEDGE_T
;
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197
STATIC
INLINE
void
IP_CMP_Init
(
IP_CMP_001_T
*pCMP) {}
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204
STATIC
INLINE
void
IP_CMP_DeInit
(
IP_CMP_001_T
*pCMP) {}
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STATIC
INLINE
void
IP_CMP_EnableCurrentSrc
(
IP_CMP_001_T
*pCMP,
IP_CMP_ENCTRL_T
en)
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{
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pCMP->
CMP_CTRL
= (pCMP->
CMP_CTRL
& (~
CMP_CTRL_PD_IREF_BITMASK
)) |
CMP_CTRL_PD_IREF
(en);
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}
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STATIC
INLINE
void
IP_CMP_EnableBandGap
(
IP_CMP_001_T
*pCMP,
IP_CMP_ENCTRL_T
en)
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{
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pCMP->
CMP_CTRL
= (pCMP->
CMP_CTRL
& (~
CMP_CTRL_PD_VBG_BITMASK
)) |
CMP_CTRL_PD_VBG
(en);
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}
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STATIC
INLINE
void
IP_CMP_ControlROSC
(
IP_CMP_001_T
*pCMP,
uint32_t
flag)
235
{
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pCMP->
CMP_CTRL
= (pCMP->
CMP_CTRL
& (~
CMP_CTRL_ROSC_BITMASK
)) | flag;
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}
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STATIC
INLINE
void
IP_CMP_SetTimerCapInput
(
IP_CMP_001_T
*pCMP,
uint32_t
flag)
246
{
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pCMP->
CMP_CTRL
= (pCMP->
CMP_CTRL
& (~
CMP_CTRL_TIMERCAPTURE_BITMASK
)) | flag;
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}
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STATIC
INLINE
void
IP_CMP_SetupVoltLadder
(
IP_CMP_001_T
*pCMP, uint8_t
id
,
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uint16_t ladSel,
uint32_t
flag)
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{
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pCMP->
CMP_CTRLx
[id] = (pCMP->
CMP_CTRLx
[id] & (~(
CMP_CTRLx_VSEL_BITMASK
|
CMP_CTRLx_VLADREF_VDDA
))) |
CMP_CTRLx_VSEL
(
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ladSel) | flag;
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}
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STATIC
INLINE
void
IP_CMP_EnableVoltLadder
(
IP_CMP_001_T
*pCMP, uint8_t
id
,
IP_CMP_ENCTRL_T
en)
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{
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pCMP->
CMP_CTRLx
[id] = (pCMP->
CMP_CTRLx
[id] & (~
CMP_CTRLx_VLADEN_BITMASK
)) |
CMP_CTRLx_VLADEN
(en);
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}
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STATIC
INLINE
void
IP_CMP_SetPosVoltRef
(
IP_CMP_001_T
*pCMP, uint8_t
id
,
IP_CMP_INPUT_T
input)
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{
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pCMP->
CMP_CTRLx
[id] = (pCMP->
CMP_CTRLx
[id] & (~
CMP_CTRLx_VP_BITMASK
)) |
CMP_CTRLx_VP
(input);
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}
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STATIC
INLINE
void
IP_CMP_SetNegVoltRef
(
IP_CMP_001_T
*pCMP, uint8_t
id
,
IP_CMP_INPUT_T
input)
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{
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pCMP->
CMP_CTRLx
[id] = (pCMP->
CMP_CTRLx
[id] & (~
CMP_CTRLx_VM_BITMASK
)) |
CMP_CTRLx_VM
(input);
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}
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STATIC
INLINE
void
IP_CMP_SetHysteresis
(
IP_CMP_001_T
*pCMP, uint8_t
id
,
IP_CMP_HYS_T
hys)
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{
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pCMP->
CMP_CTRLx
[id] = (pCMP->
CMP_CTRLx
[id] & (~
CMP_CTRLx_HYS_BITMASK
)) | hys;
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}
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STATIC
INLINE
void
IP_CMP_Enable
(
IP_CMP_001_T
*pCMP, uint8_t
id
,
IP_CMP_ENCTRL_T
en)
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{
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pCMP->
CMP_CTRLx
[id] = (pCMP->
CMP_CTRLx
[id] & (~
CMP_CTRLx_EN_BITMASK
)) |
CMP_CTRLx_EN
(en);
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}
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STATIC
INLINE
FlagStatus
IP_CMP_GetCmpStatus
(
IP_CMP_001_T
*pCMP, uint8_t
id
)
333
{
334
return
(pCMP->
CMP_CTRLx
[
id
] &
CMP_CTRLx_STAT
) ?
SET
:
RESET
;
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}
336
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STATIC
INLINE
void
IP_CMP_EnableOuput
(
IP_CMP_001_T
*pCMP, uint8_t
id
)
344
{
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pCMP->
CMP_CTRLx
[id] |=
CMP_CTRLx_OE
;
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}
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STATIC
INLINE
void
IP_CMP_DisableOutput
(
IP_CMP_001_T
*pCMP, uint8_t
id
)
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{
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pCMP->
CMP_CTRLx
[id] &= ~
CMP_CTRLx_OE
;
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}
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STATIC
INLINE
void
IP_CMP_EnableSyncCmpOut
(
IP_CMP_001_T
*pCMP, uint8_t
id
)
366
{
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pCMP->
CMP_CTRLx
[id] |=
CMP_CTRLx_SYNC
;
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}
369
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STATIC
INLINE
void
IP_CMP_DisableSyncCmpOut
(
IP_CMP_001_T
*pCMP, uint8_t
id
)
377
{
378
pCMP->
CMP_CTRLx
[id] &= ~
CMP_CTRLx_SYNC
;
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}
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STATIC
INLINE
void
IP_CMP_ConfigInt
(
IP_CMP_001_T
*pCMP, uint8_t
id
,
390
uint32_t
intFlag,
391
IP_CMP_INTEDGE_T
edgeSel)
392
{
393
pCMP->
CMP_CTRLx
[id] = (pCMP->
CMP_CTRLx
[id] & (~
CMP_CTRLx_INTCTRL_BITMASK
)) | intFlag | edgeSel;
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}
395
402
STATIC
INLINE
FlagStatus
IP_CMP_GetIntStatus
(
IP_CMP_001_T
*pCMP, uint8_t
id
)
403
{
404
return
(pCMP->
CMP_CTRLx
[
id
] &
CMP_CTRLx_INTFLAG
) ?
SET
:
RESET
;
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}
406
413
STATIC
INLINE
void
IP_CMP_CMP_ClearIntStatus
(
IP_CMP_001_T
*pCMP, uint8_t
id
)
414
{
415
pCMP->
CMP_CTRLx
[id] |=
CMP_CTRLx_INTFLAG
;
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}
417
422
#ifdef __cplusplus
423
}
424
#endif
425
426
#endif
/* __CMP_001_H_ */
software
lpc_core
lpc_ip
cmp_001.h
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