enet_002.h

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/*
 * @brief Ethernet (002) control functions
 *
 * @note
 * Copyright(C) NXP Semiconductors, 2012
 * All rights reserved.
 *
 * @par
 * Software that is described herein is for illustrative purposes only
 * which provides customers with programming information regarding the
 * LPC products.  This software is supplied "AS IS" without any warranties of
 * any kind, and NXP Semiconductors and its licensor disclaim any and
 * all warranties, express or implied, including all implied warranties of
 * merchantability, fitness for a particular purpose and non-infringement of
 * intellectual property rights.  NXP Semiconductors assumes no responsibility
 * or liability for the use of the software, conveys no license or rights under any
 * patent, copyright, mask work right, or any other intellectual property rights in
 * or to any products. NXP Semiconductors reserves the right to make changes
 * in the software without notification. NXP Semiconductors also makes no
 * representation or warranty that such application will be suitable for the
 * specified use without further testing or modification.
 *
 * @par
 * Permission to use, copy, modify, and distribute this software and its
 * documentation is hereby granted, under NXP Semiconductors' and its
 * licensor's relevant copyrights in the software, without fee, provided that it
 * is used in conjunction with NXP Semiconductors microcontrollers.  This
 * copyright, permission, and disclaimer notice must appear in all copies of
 * this code.
 */

#ifndef __ENET_002_H_
#define __ENET_002_H_

#include "sys_config.h"
#include "cmsis.h"

#ifdef __cplusplus
extern "C" {
#endif

typedef struct {
 __IO uint32_t MAC1;   
 __IO uint32_t MAC2;   
 __IO uint32_t IPGT;   
 __IO uint32_t IPGR;   
 __IO uint32_t CLRT;   
 __IO uint32_t MAXF;   
 __IO uint32_t SUPP;   
 __IO uint32_t TEST;   
 __IO uint32_t MCFG;   
 __IO uint32_t MCMD;   
 __IO uint32_t MADR;   
 __O  uint32_t MWTD;   
 __I  uint32_t MRDD;   
 __I  uint32_t MIND;   
 uint32_t RESERVED0[2];
 __IO uint32_t SA[3];  
} IP_ENET_002_MAC_T;

typedef struct {
 __IO uint32_t DESCRIPTOR;  
 __IO uint32_t STATUS;   
 __IO uint32_t DESCRIPTORNUMBER; 
 __IO uint32_t PRODUCEINDEX;  
 __IO uint32_t CONSUMEINDEX;  
} IP_ENET_002_TRANSFER_INFO_T;

typedef struct {
 __IO uint32_t COMMAND;    
 __I  uint32_t STATUS;    
 IP_ENET_002_TRANSFER_INFO_T RX; 
 IP_ENET_002_TRANSFER_INFO_T TX; 
 uint32_t RESERVED0[10];
 __I  uint32_t TSV0;     
 __I  uint32_t TSV1;     
 __I  uint32_t RSV;     
 uint32_t RESERVED1[3];
 __IO uint32_t FLOWCONTROLCOUNTER; 
 __I  uint32_t FLOWCONTROLSTATUS; 
} IP_ENET_002_CONTROL_T;

typedef struct {
 __IO uint32_t CONTROL;   
 __I  uint32_t WOLSTATUS;  
 __O  uint32_t WOLCLEAR;   
 uint32_t RESERVED;
 __IO uint32_t HashFilterL;  
 __IO uint32_t HashFilterH;  
} IP_ENET_002_RXFILTER_T;

typedef struct {
 __I  uint32_t INTSTATUS;  
 __IO uint32_t INTENABLE;  
 __O  uint32_t INTCLEAR;   
 __O  uint32_t INTSET;   
 uint32_t RESERVED;
 __IO uint32_t POWERDOWN;  
} IP_ENET_002_MODULE_CTRL_T;

typedef struct {
 IP_ENET_002_MAC_T  MAC;    
 uint32_t RESERVED1[45];
 IP_ENET_002_CONTROL_T CONTROL;  
 uint32_t RESERVED4[34];
 IP_ENET_002_RXFILTER_T RXFILTER;  
 uint32_t RESERVED6[882];
 IP_ENET_002_MODULE_CTRL_T MODULE_CONTROL; 
} IP_ENET_002_T;

#define ENET_MAC1_MASK          0xcf1f  
#define ENET_MAC1_RXENABLE      0x00000001 
#define ENET_MAC1_PARF          0x00000002 
#define ENET_MAC1_RXFLOWCTRL    0x00000004 
#define ENET_MAC1_TXFLOWCTRL    0x00000008 
#define ENET_MAC1_LOOPBACK      0x00000010 
#define ENET_MAC1_RESETTX       0x00000100 
#define ENET_MAC1_RESETMCSTX    0x00000200 
#define ENET_MAC1_RESETRX       0x00000400 
#define ENET_MAC1_RESETMCSRX    0x00000800 
#define ENET_MAC1_SIMRESET      0x00004000 
#define ENET_MAC1_SOFTRESET     0x00008000 
#define ENET_MAC2_MASK          0x73ff  
#define ENET_MAC2_FULLDUPLEX    0x00000001 
#define ENET_MAC2_FLC           0x00000002 
#define ENET_MAC2_HFEN          0x00000004 
#define ENET_MAC2_DELAYEDCRC    0x00000008 
#define ENET_MAC2_CRCEN         0x00000010 
#define ENET_MAC2_PADCRCEN      0x00000020 
#define ENET_MAC2_VLANPADEN     0x00000040 
#define ENET_MAC2_AUTODETPADEN  0x00000080 
#define ENET_MAC2_PPENF         0x00000100 
#define ENET_MAC2_LPENF         0x00000200 
#define ENET_MAC2_NOBACKOFF     0x00001000 
#define ENET_MAC2_BP_NOBACKOFF  0x00002000 
#define ENET_MAC2_EXCESSDEFER   0x00004000 
#define ENET_IPGT_BTOBINTEGAP(n) ((n) & 0x7F)

#define ENET_IPGT_FULLDUPLEX (ENET_IPGT_BTOBINTEGAP(0x15))

#define ENET_IPGT_HALFDUPLEX (ENET_IPGT_BTOBINTEGAP(0x12))

#define ENET_IPGR_NBTOBINTEGAP2(n) ((n) & 0x7F)

#define ENET_IPGR_P2_DEF (ENET_IPGR_NBTOBINTEGAP2(0x12))

#define ENET_IPGR_NBTOBINTEGAP1(n) (((n) & 0x7F) << 8)

#define ENET_IPGR_P1_DEF ENET_IPGR_NBTOBINTEGAP1(0x0C)

#define ENET_CLRT_RETRANSMAX(n) ((n) & 0x0F)

#define ENET_CLRT_COLLWIN(n) (((n) & 0x3F) << 8)

#define ENET_CLRT_DEF ((ENET_CLRT_RETRANSMAX(0x0F)) | (ENET_CLRT_COLLWIN(0x37)))

#define ENET_MAXF_MAXFLEN(n) ((n) & 0xFFFF)
#define ENET_MAXF_MAXFLEN_DEF (0x600)

/* PHY Support Register */
#define ENET_SUPP_100Mbps_SPEED 0x00000100  
#define ENET_TEST_SCPQ          0x00000001  
#define ENET_TEST_TESTPAUSE     0x00000002  
#define ENET_TEST_TESTBP        0x00000004  
#define ENET_MCFG_SCANINC       0x00000001  
#define ENET_MCFG_SUPPPREAMBLE  0x00000002  
#define ENET_MCFG_CLOCKSEL(n)   (((n) & 0x0F) << 2) 
#define ENET_MCFG_RES_MII       0x00008000  
#define ENET_MCFG_RESETMIIMGMT  2500000UL  
#define ENET_MCMD_READ          0x00000001  
#define ENET_MCMD_SCAN          0x00000002  
#define ENET_MII_WR_TOUT        0x00050000  
#define ENET_MII_RD_TOUT        0x00050000  
#define ENET_MADR_REGADDR(n)    ((n) & 0x1F)  
#define ENET_MADR_PHYADDR(n)    (((n) & 0x1F) << 8) 
#define ENET_MWTD_DATA(n)       ((n) & 0xFFFF)  
#define ENET_MRDD_DATA(n)       ((n) & 0xFFFF)  
#define ENET_MIND_BUSY          0x00000001  
#define ENET_MIND_SCANNING      0x00000002  
#define ENET_MIND_NOTVALID      0x00000004  
#define ENET_MIND_MIILINKFAIL   0x00000008  
#define ENET_COMMAND_RXENABLE           0x00000001  
#define ENET_COMMAND_TXENABLE           0x00000002  
#define ENET_COMMAND_REGRESET           0x00000008  
#define ENET_COMMAND_TXRESET            0x00000010  
#define ENET_COMMAND_RXRESET            0x00000020  
#define ENET_COMMAND_PASSRUNTFRAME      0x00000040  
#define ENET_COMMAND_PASSRXFILTER       0x00000080  
#define ENET_COMMAND_TXFLOWCONTROL      0x00000100  
#define ENET_COMMAND_RMII               0x00000200  
#define ENET_COMMAND_FULLDUPLEX         0x00000400  
#define ENET_STATUS_RXSTATUS        0x00000001  
#define ENET_STATUS_TXSTATUS        0x00000002  
#define ENET_TSV0_CRCERR        0x00000001 
#define ENET_TSV0_LCE           0x00000002 
#define ENET_TSV0_LOR           0x00000004 
#define ENET_TSV0_DONE          0x00000008 
#define ENET_TSV0_MULTICAST     0x00000010 
#define ENET_TSV0_BROADCAST     0x00000020 
#define ENET_TSV0_PACKETDEFER   0x00000040 
#define ENET_TSV0_EXDF          0x00000080 
#define ENET_TSV0_EXCOL         0x00000100 
#define ENET_TSV0_LCOL          0x00000200 
#define ENET_TSV0_GIANT         0x00000400 
#define ENET_TSV0_UNDERRUN      0x00000800 
#define ENET_TSV0_TOTALBYTES    0x0FFFF000 
#define ENET_TSV0_CONTROLFRAME  0x10000000 
#define ENET_TSV0_PAUSE         0x20000000 
#define ENET_TSV0_BACKPRESSURE  0x40000000 
#define ENET_TSV0_VLAN          0x80000000 
#define ENET_TSV1_TBC       0x0000FFFF 
#define ENET_TSV1_TCC       0x000F0000 
#define ENET_RSV_RBC            0x0000FFFF 
#define ENET_RSV_PPI            0x00010000 
#define ENET_RSV_RXDVSEEN       0x00020000 
#define ENET_RSV_CESEEN         0x00040000 
#define ENET_RSV_RCV            0x00080000 
#define ENET_RSV_CRCERR         0x00100000 
#define ENET_RSV_LCERR          0x00200000 
#define ENET_RSV_LOR            0x00400000 
#define ENET_RSV_ROK            0x00800000 
#define ENET_RSV_MULTICAST      0x01000000 
#define ENET_RSV_BROADCAST      0x02000000 
#define ENET_RSV_DRIBBLENIBBLE  0x04000000 
#define ENET_RSV_CONTROLFRAME   0x08000000 
#define ENET_RSV_PAUSE          0x10000000 
#define ENET_RSV_UO             0x20000000 
#define ENET_RSV_VLAN           0x40000000 
#define ENET_FLOWCONTROLCOUNTER_MC(n)   ((n) & 0xFFFF)   
#define ENET_FLOWCONTROLCOUNTER_PT(n)   (((n) & 0xFFFF) << 16) 
#define ENET_FLOWCONTROLSTATUS_MCC(n) ((n) & 0xFFFF) 
#define ENET_RXFILTERCTRL_AUE       0x00000001 
#define ENET_RXFILTERCTRL_ABE       0x00000002 
#define ENET_RXFILTERCTRL_AME       0x00000004 
#define ENET_RXFILTERCTRL_AUHE      0x00000008 
#define ENET_RXFILTERCTRL_AMHE      0x00000010 
#define ENET_RXFILTERCTRL_APE       0x00000020 
#define ENET_RXFILTERCTRL_MPEW      0x00001000 
#define ENET_RXFILTERCTRL_RFEW      0x00002000 
#define ENET_RXFILTERWOLSTATUS_AUW          0x00000001 
#define ENET_RXFILTERWOLSTATUS_ABW          0x00000002 
#define ENET_RXFILTERWOLSTATUS_AMW          0x00000004 
#define ENET_RXFILTERWOLSTATUS_AUHW         0x00000008 
#define ENET_RXFILTERWOLSTATUS_AMHW         0x00000010 
#define ENET_RXFILTERWOLSTATUS_APW          0x00000020 
#define ENET_RXFILTERWOLSTATUS_RFW          0x00000080 
#define ENET_RXFILTERWOLSTATUS_MPW          0x00000100 
#define ENET_RXFILTERWOLSTATUS_BITMASK      0x01BF  
#define ENET_INT_RXOVERRUN      0x00000001 
#define ENET_INT_RXERROR        0x00000002 
#define ENET_INT_RXFINISHED     0x00000004 
#define ENET_INT_RXDONE         0x00000008 
#define ENET_INT_TXUNDERRUN     0x00000010 
#define ENET_INT_TXERROR        0x00000020 
#define ENET_INT_TXFINISHED     0x00000040 
#define ENET_INT_TXDONE         0x00000080 
#define ENET_INT_SOFT           0x00001000 
#define ENET_INT_WAKEUP         0x00002000 
#define ENET_POWERDOWN_PD 0x80000000 
typedef struct {
 uint32_t Packet;  
 uint32_t Control;  
} IP_ENET_002_RXDESC_T;

#define ENET_RCTRL_SIZE(n)       (((n) - 1) & 0x7FF) 
#define ENET_RCTRL_INT           0x80000000    
typedef struct {
 uint32_t StatusInfo;  
 uint32_t StatusHashCRC;  
} IP_ENET_002_RXSTAT_T;

#define ENET_RHASH_SA            0x000001FF    
#define ENET_RHASH_DA            0x001FF000    
/* RX Status Information Word */
#define ENET_RINFO_SIZE(n)       (((n) & 0x7FF) + 1) 
#define ENET_RINFO_CTRL_FRAME    0x00040000    
#define ENET_RINFO_VLAN          0x00080000    
#define ENET_RINFO_FAIL_FILT     0x00100000    
#define ENET_RINFO_MCAST         0x00200000    
#define ENET_RINFO_BCAST         0x00400000    
#define ENET_RINFO_CRC_ERR       0x00800000    
#define ENET_RINFO_SYM_ERR       0x01000000    
#define ENET_RINFO_LEN_ERR       0x02000000    
#define ENET_RINFO_RANGE_ERR     0x04000000    
#define ENET_RINFO_ALIGN_ERR     0x08000000    
#define ENET_RINFO_OVERRUN       0x10000000    
#define ENET_RINFO_NO_DESCR      0x20000000    
#define ENET_RINFO_LAST_FLAG     0x40000000    
#define ENET_RINFO_ERR           0x80000000    
#define ENET_RINFO_ERR_MASK     (ENET_RINFO_FAIL_FILT | ENET_RINFO_CRC_ERR   | ENET_RINFO_SYM_ERR | \
         ENET_RINFO_LEN_ERR   | ENET_RINFO_ALIGN_ERR | ENET_RINFO_OVERRUN)

typedef struct {
 uint32_t Packet; 
 uint32_t Control; 
} IP_ENET_002_TXDESC_T;

#define ENET_TCTRL_SIZE(n)       (((n) - 1) & 0x7FF) 
#define ENET_TCTRL_OVERRIDE      0x04000000    
#define ENET_TCTRL_HUGE          0x08000000    
#define ENET_TCTRL_PAD           0x10000000    
#define ENET_TCTRL_CRC           0x20000000    
#define ENET_TCTRL_LAST          0x40000000    
#define ENET_TCTRL_INT           0x80000000    
typedef struct {
 uint32_t StatusInfo; 
} IP_ENET_002_TXSTAT_T;

/* TX Status Information Word */
#define ENET_TINFO_COL_CNT       0x01E00000  
#define ENET_TINFO_DEFER         0x02000000  
#define ENET_TINFO_EXCESS_DEF    0x04000000  
#define ENET_TINFO_EXCESS_COL    0x08000000  
#define ENET_TINFO_LATE_COL      0x10000000  
#define ENET_TINFO_UNDERRUN      0x20000000  
#define ENET_TINFO_NO_DESCR      0x40000000  
#define ENET_TINFO_ERR           0x80000000  
#define ENET_ETH_MAX_FLEN (1536)

typedef enum IP_ENET_002_BUFF_STATUS {
 ENET_BUFF_EMPTY,   /* buffer is empty */
 ENET_BUFF_PARTIAL_FULL,  /* buffer contains some packets */
 ENET_BUFF_FULL,    /* buffer is full */
} IP_ENET_002_BUFF_STATUS_T;

STATIC INLINE void IP_ENET_TXEnable(IP_ENET_002_T *pENET)
{
 /* Descriptor list head pointers must be setup prior to enable */
 pENET->CONTROL.COMMAND |= ENET_COMMAND_TXENABLE;
}

STATIC INLINE void IP_ENET_TXDisable(IP_ENET_002_T *pENET)
{
 pENET->CONTROL.COMMAND &= ~ENET_COMMAND_TXENABLE;
}

STATIC INLINE void IP_ENET_RXEnable(IP_ENET_002_T *pENET)
{
 /* Descriptor list head pointers must be setup prior to enable */
 pENET->CONTROL.COMMAND |= ENET_COMMAND_RXENABLE;
 pENET->MAC.MAC1 |= ENET_MAC1_RXENABLE;
}

STATIC INLINE void IP_ENET_RXDisable(IP_ENET_002_T *pENET)
{
 pENET->CONTROL.COMMAND &= ~ENET_COMMAND_RXENABLE;
 pENET->MAC.MAC1 &= ~ENET_MAC1_RXENABLE;
}

STATIC INLINE void IP_ENET_ResetTXLogic(IP_ENET_002_T *pENET)
{
 pENET->MAC.MAC1 |= ENET_MAC1_RESETTX;
}

STATIC INLINE void IP_ENET_ResetRXLogic(IP_ENET_002_T *pENET)
{
 pENET->MAC.MAC1 |= ENET_MAC1_RESETRX;
}

STATIC INLINE void IP_ENET_EnableRXFilter(IP_ENET_002_T *pENET, uint32_t mask)
{
 pENET->CONTROL.COMMAND &= ~ENET_COMMAND_PASSRXFILTER;
 pENET->RXFILTER.CONTROL |=  mask;
}

STATIC INLINE void IP_ENET_DisableRXFilter(IP_ENET_002_T *pENET, uint32_t mask)
{
 pENET->RXFILTER.CONTROL &= ~mask;
}

STATIC INLINE void IP_ENET_SetFullDuplex(IP_ENET_002_T *pENET)
{
 pENET->MAC.MAC2 |= ENET_MAC2_FULLDUPLEX;
 pENET->CONTROL.COMMAND |= ENET_COMMAND_FULLDUPLEX;
 pENET->MAC.IPGT = ENET_IPGT_FULLDUPLEX;
}

STATIC INLINE void IP_ENET_SetHalfDuplex(IP_ENET_002_T *pENET)
{
 pENET->MAC.MAC2 &= ~ENET_MAC2_FULLDUPLEX;
 pENET->CONTROL.COMMAND &= ~ENET_COMMAND_FULLDUPLEX;
 pENET->MAC.IPGT = ENET_IPGT_HALFDUPLEX;
}

STATIC INLINE void IP_ENET_Set100Mbps(IP_ENET_002_T *pENET)
{
 pENET->MAC.SUPP = ENET_SUPP_100Mbps_SPEED;
}

STATIC INLINE void IP_ENET_Set10Mbps(IP_ENET_002_T *pENET)
{
 pENET->MAC.SUPP = 0;
}

STATIC INLINE uint16_t IP_ENET_GetTXProduceIndex(IP_ENET_002_T *pENET)
{
 return pENET->CONTROL.TX.PRODUCEINDEX;
}

STATIC INLINE uint16_t IP_ENET_GetTXConsumeIndex(IP_ENET_002_T *pENET)
{
 return pENET->CONTROL.TX.CONSUMEINDEX;
}

STATIC INLINE uint16_t IP_ENET_GetRXProduceIndex(IP_ENET_002_T *pENET)
{
 return pENET->CONTROL.RX.PRODUCEINDEX;
}

STATIC INLINE uint16_t IP_ENET_GetRXConsumeIndex(IP_ENET_002_T *pENET)
{
 return pENET->CONTROL.RX.CONSUMEINDEX;
}

STATIC INLINE void IP_ENET_EnableInt(IP_ENET_002_T *pENET, uint32_t mask)
{
 pENET->MODULE_CONTROL.INTENABLE |= mask;
}

STATIC INLINE void IP_ENET_DisableInt(IP_ENET_002_T *pENET, uint32_t mask)
{
 pENET->MODULE_CONTROL.INTENABLE &= ~mask;
}

STATIC INLINE uint32_t IP_ENET_GetIntStatus(IP_ENET_002_T *pENET)
{
 return pENET->MODULE_CONTROL.INTSTATUS;
}

STATIC INLINE void IP_ENET_ClearIntStatus(IP_ENET_002_T *pENET, uint32_t mask)
{
 pENET->MODULE_CONTROL.INTCLEAR = mask;
}

void IP_ENET_Reset(IP_ENET_002_T *pENET);

void IP_ENET_SetADDR(IP_ENET_002_T *pENET, const uint8_t *macAddr);

void IP_ENET_Init(IP_ENET_002_T *pENET);

void IP_ENET_SetupMII(IP_ENET_002_T *pENET, uint8_t div, uint8_t addr);

void IP_ENET_DeInit(IP_ENET_002_T *pENET);

void IP_ENET_StartMIIWrite(IP_ENET_002_T *pENET, uint8_t reg, uint16_t data);

void IP_ENET_StartMIIRead(IP_ENET_002_T *pENET, uint8_t reg);

bool IP_ENET_IsMIIBusy(IP_ENET_002_T *pENET);

uint16_t IP_ENET_ReadMIIData(IP_ENET_002_T *pENET);

void IP_ENET_InitTxDescriptors(IP_ENET_002_T *pENET,
          IP_ENET_002_TXDESC_T *pDescs,
          IP_ENET_002_TXSTAT_T *pStatus,
          uint32_t descNum);

void IP_ENET_InitRxDescriptors(IP_ENET_002_T *pENET,
          IP_ENET_002_RXDESC_T *pDescs,
          IP_ENET_002_RXSTAT_T *pStatus,
          uint32_t descNum);

IP_ENET_002_BUFF_STATUS_T IP_ENET_GetBufferStatus(uint16_t produceIndex, uint16_t consumeIndex, uint16_t buffSize);

uint32_t IP_ENET_GetFillDescNum(uint16_t produceIndex, uint16_t consumeIndex, uint16_t buffSize);

STATIC INLINE uint32_t IP_ENET_GetFreeDescNum(uint16_t produceIndex, uint16_t consumeIndex, uint16_t buffSize)
{
 return buffSize - 1 - IP_ENET_GetFillDescNum(produceIndex, consumeIndex, buffSize);
}

STATIC INLINE bool IP_ENET_IsTxFull(IP_ENET_002_T *pENET)
{
 return ((pENET->CONTROL.TX.CONSUMEINDEX == (pENET->CONTROL.TX.PRODUCEINDEX + 1)) ||
   ((pENET->CONTROL.TX.CONSUMEINDEX == 0) &&
    (pENET->CONTROL.TX.PRODUCEINDEX == pENET->CONTROL.TX.DESCRIPTORNUMBER))) ? true : false;
}

STATIC INLINE bool IP_ENET_IsRxEmpty(IP_ENET_002_T *pENET)
{
 uint32_t tem = pENET->CONTROL.RX.PRODUCEINDEX;
 return (pENET->CONTROL.RX.CONSUMEINDEX != tem) ? false : true;
}

uint16_t IP_ENET_IncTXProduceIndex(IP_ENET_002_T *pENET);

uint16_t IP_ENET_IncRXConsumeIndex(IP_ENET_002_T *pENET);

#ifdef __cplusplus
}
#endif

#endif /* __ENET_002_H_ */