69 #define TRANSFER_DST_ADDR 0x28500000
70 #define TRANSFER_SRC_ADDR 0x28100000
71 #define TRANSFER_SIZE 0x200000
73 #define TRANSFER_BLOCK_SZ (4 * 3 * 1024)
74 #define DMA_DESCRIPTOR_COUNT 256
89 for (i = 0; i < sz; i++) {
90 src[i] = i | (~i << (16 - (i & 15)));
103 desc = &desc_array[0];
105 DEBUGOUT(
"Transfer needs %d descriptors, but has "
110 for (i = 0; i < num_desc; i ++)
114 (
uint32_t) dst + (i * TRANSFER_BLOCK_SZ),
115 (
uint32_t) (sz < TRANSFER_BLOCK_SZ ? sz : TRANSFER_BLOCK_SZ),
117 (i + 1 == num_desc) ?
NULL: &desc[i + 1]);
128 invalid = memcmp(dst, src, sz);
129 DEBUGOUT(
"\r\nData transfer results [MODE: %s]\r\n"
130 "=========================================\r\n", mode);
131 DEBUGOUT(
"SOURCE ADDR: 0x%08X\r\n", src);
132 DEBUGOUT(
"DESTN ADDR: 0x%08X\r\n", dst);
133 DEBUGOUT(
"XFER SIZE: %lu (Bytes)\r\n", sz);
135 DEBUGOUT(
"START TIME: %lu (ticks)\r\n", stime);
136 DEBUGOUT(
"END TIME: %lu (ticks)\r\n", etime);
137 DEBUGOUT(
"TIME TAKEN: %lu (uSec(s))\r\n", (etime - stime) / clk);
138 DEBUGOUT(
"SRC/DST COMP: %s\r\n", invalid ?
"NOT MATCHING" :
"MATCHING");
172 DEBUGSTR(
"***** DATA TRANSFER TEST *******\r\n");
180 DEBUGSTR(
"Unable to create DMA Descriptors\r\n");
185 NVIC_EnableIRQ(DMA_IRQn);