Example description
This example describes how to use the on-chip SPI peripheral in POLLING and INTERRUPT mode. The on-chip SSP1 peripheral is also used as the SPI partner. When SPI peripheral is configured as mater, the SSP1 will be slave and vice versa.
SPI configuration:<br>
- CPHA = 0: data is sampled on the first clock edge of SCK.<br>
- CPOL = 0: SCK is active high.<br>
- Sample rate = 400kHz.<br>
- DSS = 8: 8 bits per transfer.<br>
After initialize transmit buffer, SPI master/slave will transfer a number of bytes to SPI slave/master and receive data concurrently.
After the transfer completed, receive and transmit buffer will be compared. If they are matching, the on-board LED is ON.
This example supports 2 transfer modes: POLLING mode and INTERRUPT mode . In case the SPI peripheral is configued as slave, only interrupt mode can be selected.
Special connection requirements
How to run: hardware configuration
-NXP LPC1769 Xpresso board
- SPI connection:
- P0.15: SPI_SCK (J6.13)
- P0.16 : SPI_SSEL (J6.14)
- P0.17: SPI_MISO (J6.12)
- P0.18: SPI_MOSI (J6.11)
- SSP1 connection:
- P0.7: SSP1_SCK (J6.7)
- P0.6: SSP1_SSEL (J6.8)
- P0.8: SSP1_MISO (J6.6)
- P0.9: SSP1_MOSI (J6.5)
The SCK pin of SPI is connected to SCK of SSP1.
The SSEL pin of SPI is connected to SSEL of SSP1.
The MISO pin of SPI is connected to MISO of SSP1.
The MOSI pin of SPI is connected to MOSI of SSP1.
Build procedures:
LPC17xx/40xx example quickstart for Keil uVision4
LPC17xx/40xx example quickstart for IAR EWARM
LPC17xx/40xx example quickstart for Code Red Xpresso
Supported boards and board setup:
NXP Xpresso LPC1769 board
Submitting LPCOpen issues:
Community support for LPCOpen
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| static void | bufferInit (uint8_t *tx_buf, uint8_t *rx_buf) |
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| static uint8_t | bufferVerify (uint8_t *tx_buf, uint8_t *rx_buf) |
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| void | DMA_IRQHandler (void) |
| | DMA interrupt handler sub-routine. Set the waiting flag when transfer is successful.
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| static void | appSSPRun (void) |
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| static void | appSPIRun (void) |
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| int | main (void) |
| | Main routine for SPI example.
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| #define BUFFER_SIZE (0x100) |
Definition at line 89 of file spi.c.
| #define SPI_INTERRUPT_SEL (0x32) |
Definition at line 96 of file spi.c.
| #define SPI_MASTER_MODE_SEL (0x31) |
Definition at line 91 of file spi.c.
Definition at line 93 of file spi.c.
| #define SPI_POLLING_SEL (0x31) |
Definition at line 95 of file spi.c.
| #define SPI_SLAVE_MODE_SEL (0x32) |
Definition at line 92 of file spi.c.
| static void appSPIRun |
( |
void |
| ) |
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static |
| static void appSSPRun |
( |
void |
| ) |
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static |
| static void bufferInit |
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uint8_t * |
tx_buf, |
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uint8_t * |
rx_buf |
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) |
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static |
| static uint8_t bufferVerify |
( |
uint8_t * |
tx_buf, |
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uint8_t * |
rx_buf |
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) |
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static |
| void DMA_IRQHandler |
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void |
| ) |
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DMA interrupt handler sub-routine. Set the waiting flag when transfer is successful.
- Returns
- Nothing
Definition at line 156 of file spi.c.
Main routine for SPI example.
Main program body.
- Returns
- Nothing
Definition at line 235 of file spi.c.
| volatile uint8_t spi_xfer_completed = 0 |
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static |
| volatile uint8_t ssp_dma_rxf_completed = 0 |
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static |
| volatile uint8_t ssp_dma_txf_completed = 0 |
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static |