Detailed Description

Controller Area Network

Data Structures
struct	IP_CAN_001_AF_RAM_T
	CAN acceptance filter RAM register block structure. More...

struct	IP_CAN_001_AF_T
	CAN acceptance filter register block structure. More...

struct	IP_CAN_001_CR_T
	Central CAN register block structure. More...

struct	IP_CAN_001_TX_T
	CAN Transmit register block structure. More...

struct	IP_CAN_001_RX_T
	CAN Receive register block structure. More...

struct	IP_CAN_001_T
	CAN register block structure. More...

struct	IP_CAN_MSG_T
	CAN Message Object Structure. More...

struct	IP_CAN_BUS_TIMING_T
	CAN Bus Timing Structure. More...

struct	IP_CAN_STD_ID_Entry_T
	Standard ID Entry structure. More...

struct	IP_CAN_STD_ID_RANGE_Entry_T
	Standard ID Range structure. More...

struct	IP_CAN_EXT_ID_Entry_T
	Extended ID Entry structure. More...

struct	IP_CAN_EXT_ID_RANGE_Entry_T
	Extended ID Range structure. More...

struct	IP_CAN_AF_LUT_T
	Acceptance Filter Section Table structure. More...

Macros
#define	CANAF_RAM_ENTRY_NUM 512

#define	CAN_MOD_BITMASK (0xBF)
	CAN Mode register definitions.

#define	CAN_MOD_OPERATION ((uint32_t) 0)

#define	CAN_MOD_RM ((uint32_t) (1 << 0))

#define	CAN_MOD_LOM ((uint32_t) (1 << 1))

#define	CAN_MOD_STM ((uint32_t) (1 << 2))

#define	CAN_MOD_TPM ((uint32_t) (1 << 3))

#define	CAN_MOD_SM ((uint32_t) (1 << 4))

#define	CAN_MOD_RPM ((uint32_t) (1 << 5))

#define	CAN_MOD_TM ((uint32_t) (1 << 7))

#define	CAN_CMR_BITMASK (0xFF)
	CAN Command register definitions.

#define	CAN_CMR_TR ((uint32_t) (1))

#define	CAN_CMR_AT ((uint32_t) (1 << 1))

#define	CAN_CMR_RRB ((uint32_t) (1 << 2))

#define	CAN_CMR_CDO ((uint32_t) (1 << 3))

#define	CAN_CMR_SRR ((uint32_t) (1 << 4))

#define	CAN_CMR_STB(n) ((uint32_t) (1 << (n + 5)))

#define	CAN_GSR_BITMASK (0xFFFF00FF)
	CAN Global Status register definitions.

#define	CAN_GSR_RBS ((uint32_t) (1))

#define	CAN_GSR_DOS ((uint32_t) (1 << 1))

#define	CAN_GSR_TBS ((uint32_t) (1 << 2))

#define	CAN_GSR_TCS ((uint32_t) (1 << 3))

#define	CAN_GSR_RS ((uint32_t) (1 << 4))

#define	CAN_GSR_TS ((uint32_t) (1 << 5))

#define	CAN_GSR_ES ((uint32_t) (1 << 6))

#define	CAN_GSR_BS ((uint32_t) (1 << 7))

#define	CAN_GSR_RXERR(n) ((uint32_t) ((n >> 16) & 0xFF)

#define	CAN_GSR_TXERR(n) ((uint32_t) ((n >> 24) & 0xFF)

#define	CAN_ICR_BITMASK (0xFFFF07FF)
	CAN Interrupt and Capture register definitions.

#define	CAN_ICR_RI ((uint32_t) (1))

#define	CAN_ICR_TI1 ((uint32_t) (1 << 1))

#define	CAN_ICR_EI ((uint32_t) (1 << 2))

#define	CAN_ICR_DOI ((uint32_t) (1 << 3))

#define	CAN_ICR_WUI ((uint32_t) (1 << 4))

#define	CAN_ICR_EPI ((uint32_t) (1 << 5))

#define	CAN_ICR_ALI ((uint32_t) (1 << 6))

#define	CAN_ICR_BEI ((uint32_t) (1 << 7))

#define	CAN_ICR_IDI ((uint32_t) (1 << 8))

#define	CAN_ICR_TI2 ((uint32_t) (1 << 9))

#define	CAN_ICR_TI3 ((uint32_t) (1 << 10))

#define	CAN_ICR_ERRBIT_VAL(n) ((uint32_t) (((n) >> 16) & 0x1F))

#define	CAN_ICR_ERR_SOF (3)

#define	CAN_ICR_ERR_ID28_ID21 (2)

#define	CAN_ICR_ERR_ID20_ID18 (6)

#define	CAN_ICR_ERR_SRTR (4)

#define	CAN_ICR_ERR_IDE (5)

#define	CAN_ICR_ERR_ID17_ID13 (7)

#define	CAN_ICR_ERR_ID12_ID5 (0x0F)

#define	CAN_ICR_ERR_ID4_ID0 (0x0E)

#define	CAN_ICR_ERR_RTR (0x0C)

#define	CAN_ICR_ERR_ReservedBit_1 (0x0D)

#define	CAN_ICR_ERR_ReservedBit_0 (0x09)

#define	CAN_ICR_ERR_DLC (0x0B)

#define	CAN_ICR_ERR_DATA_FIELD (0x0A)

#define	CAN_ICR_ERR_CRC_SEQ (0x08)

#define	CAN_ICR_ERR_CRC_DELIMITER (0x18)

#define	CAN_ICR_ERR_ACK (0x19)

#define	CAN_ICR_ERR_ACK_DELIMITER (0x1B)

#define	CAN_ICR_ERR_EOF (0x1A)

#define	CAN_ICR_ERR_INTERMISSION (0x12)

#define	CAN_ICR_ERRDIR_RECEIVE ((uint32_t) (1 << 21))

#define	CAN_ICR_ERRC_VAL(n) ((uint32_t) (((n) >> 22) & 0x3))

#define	CAN_ICR_BIT_ERROR (0)

#define	CAN_ICR_FORM_ERROR (1)

#define	CAN_ICR_STUFF_ERROR (2)

#define	CAN_ICR_OTHER_ERROR (3)

#define	CAN_ICR_ALCBIT_VAL(n) ((uint32_t) (((n) >> 24) & 0xFF))

#define	CAN_IER_BITMASK (0x7FF)
	CAN Interrupt Enable register definitions.

#define	CAN_IER_RIE ((uint32_t) (1))

#define	CAN_IER_TIE1 ((uint32_t) (1 << 1))

#define	CAN_IER_EIE ((uint32_t) (1 << 2))

#define	CAN_IER_DOIE ((uint32_t) (1 << 3))

#define	CAN_IER_WUIE ((uint32_t) (1 << 4))

#define	CAN_IER_EPIE ((uint32_t) (1 << 5))

#define	CAN_IER_ALIE ((uint32_t) (1 << 6))

#define	CAN_IER_BEIE ((uint32_t) (1 << 7))

#define	CAN_IER_IDIE ((uint32_t) (1 << 8))

#define	CAN_IER_TIE2 ((uint32_t) (1 << 9))

#define	CAN_IER_TIE3 ((uint32_t) (1 << 10))

#define	CAN_BTR_BITMASK (0xFFC3FF)
	CAN Bus Timing register definitions.

#define	CAN_BTR_BRP(n) ((uint32_t) ((n) & 0x3FF))

#define	CAN_BTR_SJW(n) ((uint32_t) (((n) & 0x3) << 14))

#define	CAN_BTR_TESG1(n) ((uint32_t) (((n) & 0xF) << 16))

#define	CAN_BTR_TESG2(n) ((uint32_t) (((n) & 0xF) << 20))

#define	CAN_BTR_SAM ((uint32_t) (1 << 23))

#define	CAN_EWL_BITMASK (0xFF)
	CAN Error Warning Limit register definitions.

#define	CAN_EWL_VAL(n) ((uint32_t) ((n) & 0xFF))

#define	CAN_SR_BITMASK (0xFFFFFF)
	CAN Status Registe definitions.

#define	CAN_SR_RBS(n) ((uint32_t) (1 << ((n) * 8)))

#define	CAN_SR_DOS(n) ((uint32_t) (1 << (1 + (n) * 8)))

#define	CAN_SR_TBS(n) ((uint32_t) (1 << (2 + (n) * 8)))

#define	CAN_SR_TCS(n) ((uint32_t) (1 << (3 + (n) * 8)))

#define	CAN_SR_RS(n) ((uint32_t) (1 << (4 + (n) * 8)))

#define	CAN_SR_TS(n) ((uint32_t) (1 << (5 + (n) * 8)))

#define	CAN_SR_ES(n) ((uint32_t) (1 << (6 + (n) * 8)))

#define	CAN_SR_BS(n) ((uint32_t) (1 << (7 + (n) * 8)))

#define	CAN_RFS_BITMASK (0xC00F07FF)
	CAN Receive Frame Status register definitions.

#define	CAN_RFS_ID_INDEX(n) ((uint32_t) ((n) & 0x3FF))

#define	CAN_RFS_BP ((uint32_t) (1 << 10))

#define	CAN_RFS_DLC(n) ((uint32_t) ((n >> 16) & 0x0F))

#define	CAN_RFS_RTR ((uint32_t) (1 << 30))

#define	CAN_RFS_FF ((uint32_t) ((uint32_t) 1 << 31))

#define	CAN_RID_ID_11(n) ((uint32_t) ((n) & 0x7FF))
	CAN Receive Identifier Register definitions.

#define	CAN_RID_ID_29(n) ((uint32_t) ((n) & 0x1FFFFFFF))

#define	CAN_TFI_BITMASK (0xC00F00FF)
	CAN Transmit Frame Information register definitions.

#define	CAN_TFI_PRIO(n) ((uint32_t) ((n) & 0xFF))

#define	CAN_TFI_DLC(n) ((uint32_t) (((n) & 0xF) << 16))

#define	CAN_TFI_RTR ((uint32_t) (1 << 30))

#define	CAN_TFI_FF ((uint32_t) ((uint32_t) 1 << 31))

#define	CAN_TID_ID11(n) ((uint32_t) ((n) & 0x7FF))
	CAN Transfer Identifier register definitions.

#define	CAN_TID_ID29(n) ((uint32_t) ((n) & 0x1FFFFFFF))

#define	CAN_TSR_BITMASK (0x30303)
	CAN Central transmit Status register definitions.

#define	CAN_TSR_TS(n) ((uint32_t) (1 << (n + 0)))

#define	CAN_TSR_TBS(n) ((uint32_t) (1 << (n + 8)))

#define	CAN_TSR_TCS(n) ((uint32_t) (1 << (n + 16)))

#define	CAN_RSR_BITMASK (0x30303)
	CAN Central Receive Status register definitions.

#define	CAN_RSR_RS(n) ((uint32_t) (1 << (n + 0)))

#define	CAN_RSR_RBS(n) ((uint32_t) (1 << (n + 8)))

#define	CAN_RSR_DOS(n) ((uint32_t) (1 << (n + 16)))

#define	CAN_MSR_BITMASK (0x303)
	CAN Central Miscellaneous Status register definitions.

#define	CAN_MSR_E(n) ((uint32_t) (1 << (n + 0)))

#define	CAN_MSR_BS(n) ((uint32_t) (1 << (n + 8)))

#define	CANAF_AFMR_OPERATION ((uint32_t) (0))
	Acceptance Filter Mode register definitions.

#define	CANAF_AFMR_ACCOFF ((uint32_t) (1))

#define	CANAF_AFMR_ACCBP ((uint32_t) (1 << 1))

#define	CANAF_AFMR_EFCAN ((uint32_t) (1 << 2))

#define	CANAF_ENDADDR(n) ((uint32_t) (((n) & 0x3FF) << 2))
	Extended Frame Group Start Address register definitions.

#define	CANAF_ENDADDR_VAL(n) ((uint32_t) ((n >> 2) & 0x3FF))

#define	CANAF_LUTERRAD(n) ((uint32_t) (((n) & 0x1FF) << 2))
	LUT Error Address register definitions.

#define	CANAF_LUTERR ((uint32_t) (1))
	LUT Error register definitions.

#define	CANAF_FCANIE_BITMASK (0x01)
	Global FullCANInterrupt Enable register definitions.

#define	CANAF_FCANIE ((uint32_t) (1))

#define	CANAF_FULLCAN_MSG_FF_POS (31)
	FullCAN Message Layout definitions.

#define	CANAF_FULLCAN_MSG_RTR_POS (30)

#define	CANAF_FULLCAN_MSG_LOST_POS (26)

#define	CANAF_FULLCAN_MSG_SEM_POS (24)

#define	CANAF_FULLCAN_MSG_SEM_BITMASK (0x03)

#define	CANAF_FULLCAN_MSG_DLC_POS (16)

#define	CANAF_FULLCAN_MSG_DLC_BITMASK (0x0F)

#define	CANAF_FULLCAN_MSG_SCC_POS (13)

#define	CANAF_FULLCAN_MSG_SCC_BITMASK (0x07)

#define	CANAF_FULLCAN_MSG_ID11_POS (0)

#define	CANAF_FULLCAN_MSG_ID11_BITMASK (0x7FF)

#define	CANAF_FULCAN_MSG_AF_UPDATING (0x01)
	FullCAN Message Status.

#define	CANAF_FULCAN_MSG_AF_FINISHED (0x03)

#define	CANAF_FULCAN_MSG_CPU_READING (0x0)

#define	CANAF_FCAN_IC_INTPND(n) ((n >= 32) ? ((uint32_t) (1 << (n - 32))) : ((uint32_t) (1 << n)))
	FullCAN Interrupt and Capture register definitions.

#define	CAN_STD_ENTRY_CTRL_NO_POS (13 )
	Standard ID Entry definitions.

#define	CAN_STD_ENTRY_CTRL_NO_MASK (0x07)

#define	CAN_STD_ENTRY_DISABLE_POS (12 )

#define	CAN_STD_ENTRY_DISABLE_MASK (0x01)

#define	CAN_STD_ENTRY_IE_POS (11 )

#define	CAN_STD_ENTRY_IE_MASK (0x01)

#define	CAN_STD_ENTRY_ID_POS (0 )

#define	CAN_STD_ENTRY_ID_MASK (0x7FF)

#define	CAN_EXT_ENTRY_CTRL_NO_POS (29 )
	Extended ID Entry definitions.

#define	CAN_EXT_ENTRY_CTRL_NO_MASK (0x07)

#define	CAN_EXT_ENTRY_ID_POS (0 )

#define	CAN_EXT_ENTRY_ID_MASK (0x1FFFFFFF)

#define	CAN_REMOTE_MSG ((uint32_t) (1 << 0))
	CAN Message Type definitions.

#define	CAN_EXTEND_ID_USAGE ((uint32_t) (1 << 30))

#define	CAN_MSG_MAX_DATA_LEN (8)

Enumerations
enum	IP_CAN_AF_RAM_SECTION_T { CANAF_RAM_FULLCAN_SEC, CANAF_RAM_SFF_SEC, CANAF_RAM_SFF_GRP_SEC, CANAF_RAM_EFF_SEC, CANAF_RAM_EFF_GRP_SEC, CANAF_RAM_SECTION_NUM }
	CAN AF RAM section definitions. More...

enum	IP_CAN_BUFFER_ID_T { CAN_BUFFER_1 = 0, CAN_BUFFER_2, CAN_BUFFER_3, CAN_BUFFER_LAST }
	CAN Buffer ID definition. More...

Functions
STATIC INLINE void	IP_CAN_DeInit (IP_CAN_001_T *pCAN)
	De-initialize the CAN peripheral.

STATIC INLINE uint32_t	IP_CAN_GetMode (IP_CAN_001_T *pCAN)
	Get current mode register settings of the CAN controller.

STATIC INLINE void	IP_CAN_SetCmd (IP_CAN_001_T *pCAN, uint32_t command)
	Set the CAN command request.

STATIC INLINE void	IP_CAN_SetEWL (IP_CAN_001_T *pCAN, uint32_t ewl)
	Set Error Warning Limit for the CAN Controller.

STATIC INLINE uint8_t	IP_CAN_GetEWL (IP_CAN_001_T *pCAN)
	Get Error Warning Limit of the CAN Controller.

STATIC INLINE uint32_t	IP_CAN_GetGlobalStatus (IP_CAN_001_T *pCAN)
	Get global status register contents of the CAN Controller.

STATIC INLINE uint32_t	IP_CAN_GetStatus (IP_CAN_001_T *pCAN)
	Get the status of the CAN Controller.

STATIC INLINE void	IP_CAN_IntEnable (IP_CAN_001_T *pCAN, uint32_t IntMask)
	Enable the given interrupt of the CAN Controller.

STATIC INLINE void	IP_CAN_IntDisable (IP_CAN_001_T *pCAN, uint32_t IntMask)
	Disable the given interrupt of the CAN Controller.

STATIC INLINE uint32_t	IP_CAN_GetIntStatus (IP_CAN_001_T *pCAN)
	Get the interrupt status of the CAN Controller.

STATIC INLINE void	IP_CAN_AF_SetMode (IP_CAN_001_AF_T *pCanAF, uint32_t AFMode)
	Set CAN AF Mode.

STATIC INLINE uint32_t	IP_CAN_AF_GetMode (IP_CAN_001_AF_T *pCanAF)
	Get CAN AF Mode.

void	IP_CAN_Init (IP_CAN_001_T *pCAN)
	Initialize the CAN peripheral.

void	IP_CAN_SetMode (IP_CAN_001_T *pCAN, uint32_t Mode, FunctionalState NewState)
	Enable/Disable the specified mode in CAN controller.

void	IP_CAN_SetBusTiming (IP_CAN_001_T pCAN, IP_CAN_BUS_TIMING_T pBusTiming)
	Set Bus Timing for the CAN Controller.

Status	IP_CAN_Receive (IP_CAN_001_T pCAN, IP_CAN_MSG_T pMsg)
	Get message received by the CAN Controller.

Status	IP_CAN_Send (IP_CAN_001_T pCAN, IP_CAN_BUFFER_ID_T TxBufID, IP_CAN_MSG_T pMsg)
	Request the CAN Controller to send message.

void	IP_CAN_AF_Init (IP_CAN_001_AF_T pCanAF, IP_CAN_001_AF_RAM_T pCanAFRam)
	Initialize CAN Acceptance Filter.

void	IP_CAN_FullCANIntConfig (IP_CAN_001_AF_T *pCanAF, FunctionalState NewState)
	Enable/Disable the interrupts of the CAN Controller in FullCAN Mode.

uint32_t	IP_CAN_GetFullCANIntStatus (IP_CAN_001_AF_T *pCanAF, uint8_t ObjID)
	Get FullCAN interrupt status of the object.

Status	IP_CAN_FullCANReceive (IP_CAN_001_AF_T pCanAF, IP_CAN_001_AF_RAM_T pCanAFRam, uint8_t ObjID, IP_CAN_MSG_T pMsg, uint8_t pSCC)
	Get FULLCANmessage automatically received by the AF.

void	IP_CAN_ClearAFLUT (IP_CAN_001_AF_T pCanAF, IP_CAN_001_AF_RAM_T pCanAFRam)
	Clear CAN AF LUT.

Status	IP_CAN_SetAFLUT (IP_CAN_001_AF_T pCanAF, IP_CAN_001_AF_RAM_T pCanAFRam, IP_CAN_AF_LUT_T *pAFSections)
	Set CAN AF LUT.

Status	IP_CAN_InsertFullCANEntry (IP_CAN_001_AF_T pCanAF, IP_CAN_001_AF_RAM_T pCanAFRam, IP_CAN_STD_ID_Entry_T *pEntry)
	Insert a FullCAN Entry into the current LUT.

Status	IP_CAN_InsertIndividualSTDEntry (IP_CAN_001_AF_T pCanAF, IP_CAN_001_AF_RAM_T pCanAFRam, IP_CAN_STD_ID_Entry_T *pEntry)
	Insert an individual Standard Entry into the current LUT.

Status	IP_CAN_InsertGroupSTDEntry (IP_CAN_001_AF_T pCanAF, IP_CAN_001_AF_RAM_T pCanAFRam, IP_CAN_STD_ID_RANGE_Entry_T *pEntry)
	Insert an Group Standard Entry into the current LUT.

Status	IP_CAN_InsertIndividualEXTEntry (IP_CAN_001_AF_T pCanAF, IP_CAN_001_AF_RAM_T pCanAFRam, IP_CAN_EXT_ID_Entry_T *pEntry)
	Insert an individual Extended Entry into the current LUT.

Status	IP_CAN_InsertGroupEXTEntry (IP_CAN_001_AF_T pCanAF, IP_CAN_001_AF_RAM_T pCanAFRam, IP_CAN_EXT_ID_RANGE_Entry_T *pEntry)
	Insert an Group Extended Entry into the current LUT.

Status	IP_CAN_RemoveFullCANEntry (IP_CAN_001_AF_T pCanAF, IP_CAN_001_AF_RAM_T pCanAFRam, int16_t Position)
	Remove a FullCAN Entry from the current LUT.

Status	IP_CAN_RemoveIndividualSTDEntry (IP_CAN_001_AF_T pCanAF, IP_CAN_001_AF_RAM_T pCanAFRam, int16_t Position)
	Remove an individual Standard Entry from the current LUT.

Status	IP_CAN_RemoveGroupSTDEntry (IP_CAN_001_AF_T pCanAF, IP_CAN_001_AF_RAM_T pCanAFRam, int16_t Position)
	Remove an Group Standard Entry from the current LUT.

Status	IP_CAN_RemoveIndividualEXTEntry (IP_CAN_001_AF_T pCanAF, IP_CAN_001_AF_RAM_T pCanAFRam, int16_t Position)
	Remove an individual Extended Entry from the current LUT.

Status	IP_CAN_RemoveGroupEXTEntry (IP_CAN_001_AF_T pCanAF, IP_CAN_001_AF_RAM_T pCanAFRam, int16_t Position)
	Remove an Group Extended Entry from the current LUT.

uint16_t	IP_CAN_GetEntriesNum (IP_CAN_001_AF_T pCanAF, IP_CAN_001_AF_RAM_T pCanAFRam, IP_CAN_AF_RAM_SECTION_T SectionID)
	Get the number of entries of the given section.

Status	IP_CAN_ReadFullCANEntry (IP_CAN_001_AF_T pCanAF, IP_CAN_001_AF_RAM_T pCanAFRam, uint16_t Position, IP_CAN_STD_ID_Entry_T *pEntry)
	Read a FullCAN Entry into from current LUT.

Status	IP_CAN_ReadIndividualSTDEntry (IP_CAN_001_AF_T pCanAF, IP_CAN_001_AF_RAM_T pCanAFRam, uint16_t Position, IP_CAN_STD_ID_Entry_T *pEntry)
	Read an individual Standard Entry from the current LUT.

Status	IP_CAN_ReadGroupSTDEntry (IP_CAN_001_AF_T pCanAF, IP_CAN_001_AF_RAM_T pCanAFRam, uint16_t Position, IP_CAN_STD_ID_RANGE_Entry_T *pEntry)
	Read an Group Standard Entry from the current LUT.

Status	IP_CAN_ReadIndividualEXTEntry (IP_CAN_001_AF_T pCanAF, IP_CAN_001_AF_RAM_T pCanAFRam, uint16_t Position, IP_CAN_EXT_ID_Entry_T *pEntry)
	Read an individual Extended Entry from the current LUT.

Status	IP_CAN_ReadGroupEXTEntry (IP_CAN_001_AF_T pCanAF, IP_CAN_001_AF_RAM_T pCanAFRam, uint16_t Position, IP_CAN_EXT_ID_RANGE_Entry_T *pEntry)
	Read an Group Extended Entry from the current LUT.

Macro Definition Documentation

#define CAN_BTR_BITMASK (0xFFC3FF)

CAN Bus Timing register definitions.

CAN Bus Timing Register Bitmask

Definition at line 363 of file can_001.h.

#define CAN_BTR_BRP ( n ) ((uint32_t) ((n) & 0x3FF))

CAN Baudrate Prescaler

Definition at line 366 of file can_001.h.

#define CAN_BTR_SAM ((uint32_t) (1 << 23))

CAN Sampling

Definition at line 378 of file can_001.h.

#define CAN_BTR_SJW ( n ) ((uint32_t) (((n) & 0x3) << 14))

CAN Synchronization Jump Width

Definition at line 369 of file can_001.h.

#define CAN_BTR_TESG1 ( n ) ((uint32_t) (((n) & 0xF) << 16))

CAN Time Segment 1

Definition at line 372 of file can_001.h.

#define CAN_BTR_TESG2 ( n ) ((uint32_t) (((n) & 0xF) << 20))

CAN Time Segment 2

Definition at line 375 of file can_001.h.

#define CAN_CMR_AT ((uint32_t) (1 << 1))

Cancel the current transmission or the pending transmission request

Definition at line 177 of file can_001.h.

#define CAN_CMR_BITMASK (0xFF)

CAN Command register definitions.

CAN Command Register Bitmask

Definition at line 171 of file can_001.h.

#define CAN_CMR_CDO ((uint32_t) (1 << 3))

Clear the Data Overrun bit in Status Register(s)

Definition at line 183 of file can_001.h.

#define CAN_CMR_RRB ((uint32_t) (1 << 2))

Release the information in Receive Buffer

Definition at line 180 of file can_001.h.

#define CAN_CMR_SRR ((uint32_t) (1 << 4))

Self Reception Request.The message sent is received simultaneously.

Definition at line 186 of file can_001.h.

#define CAN_CMR_STB ( n ) ((uint32_t) (1 << (n + 5)))

Select one or multi transmit buffer(s).( n = 0/1/2)

Definition at line 189 of file can_001.h.

#define CAN_CMR_TR ((uint32_t) (1))

Request to Send message which is available in selected Transmit Buffer

Definition at line 174 of file can_001.h.

#define CAN_EWL_BITMASK (0xFF)

CAN Error Warning Limit register definitions.

CAN Error Warning Limit Register Bitmask

Definition at line 384 of file can_001.h.

#define CAN_EWL_VAL ( n ) ((uint32_t) ((n) & 0xFF))

CAN Error Warning Limit

Definition at line 387 of file can_001.h.

#define CAN_EXT_ENTRY_CTRL_NO_MASK (0x07)

Mask of Controller Number Bits

Definition at line 631 of file can_001.h.

#define CAN_EXT_ENTRY_CTRL_NO_POS (29 )

Extended ID Entry definitions.

Start position of Controller Number Bits

Definition at line 629 of file can_001.h.

#define CAN_EXT_ENTRY_ID_MASK (0x1FFFFFFF)

Mask of ID Bit

Definition at line 635 of file can_001.h.

#define CAN_EXT_ENTRY_ID_POS (0 )

Start position of ID bit

Definition at line 633 of file can_001.h.

#define CAN_EXTEND_ID_USAGE ((uint32_t) (1 << 30))

Message use Extend ID

Definition at line 645 of file can_001.h.

#define CAN_GSR_BITMASK (0xFFFF00FF)

CAN Global Status register definitions.

CAN Global Status Register Bitmask

Definition at line 195 of file can_001.h.

#define CAN_GSR_BS ((uint32_t) (1 << 7))

CAN Bus Status (CAN Controller is involed in bus activity or not

Definition at line 219 of file can_001.h.

#define CAN_GSR_DOS ((uint32_t) (1 << 1))

CAN Data Overrun Status

Definition at line 201 of file can_001.h.

#define CAN_GSR_ES ((uint32_t) (1 << 6))

CAN Error Status

Definition at line 216 of file can_001.h.

#define CAN_GSR_RBS ((uint32_t) (1))

CAN Receive Buffer Status (At least one complete message is received)

Definition at line 198 of file can_001.h.

#define CAN_GSR_RS ((uint32_t) (1 << 4))

CAN Receive Status (The CAN controller is receiving a message)

Definition at line 210 of file can_001.h.

#define CAN_GSR_RXERR ( n ) ((uint32_t) ((n >> 16) & 0xFF)

CAN Current value of the Rx Error Counter

Definition at line 222 of file can_001.h.

#define CAN_GSR_TBS ((uint32_t) (1 << 2))

CAN Transmit Buffer Status (All 3 Transmit Buffers are available)

Definition at line 204 of file can_001.h.

#define CAN_GSR_TCS ((uint32_t) (1 << 3))

CAN Transmit Complete Status (All requested transmission(s) has (have) been successfully completed)

Definition at line 207 of file can_001.h.

#define CAN_GSR_TS ((uint32_t) (1 << 5))

CAN Transmit Status (The CAN controller is sending a message)

Definition at line 213 of file can_001.h.

#define CAN_GSR_TXERR ( n ) ((uint32_t) ((n >> 24) & 0xFF)

CAN Current value of the Tx Error Counter

Definition at line 225 of file can_001.h.

#define CAN_ICR_ALCBIT_VAL ( n ) ((uint32_t) (((n) >> 24) & 0xFF))

CAN Arbitration Lost Capture

Definition at line 318 of file can_001.h.

#define CAN_ICR_ALI ((uint32_t) (1 << 6))

CAN Arbitration Lost Interrupt

Definition at line 252 of file can_001.h.

#define CAN_ICR_BEI ((uint32_t) (1 << 7))

CAN Bus Error Interrupt

Definition at line 255 of file can_001.h.

#define CAN_ICR_BIT_ERROR (0)

Definition at line 312 of file can_001.h.

#define CAN_ICR_BITMASK (0xFFFF07FF)

CAN Interrupt and Capture register definitions.

CAN Interrupt and Capture Registe Bitmask

Definition at line 231 of file can_001.h.

#define CAN_ICR_DOI ((uint32_t) (1 << 3))

CAN Data Overrun Interrupt

Definition at line 243 of file can_001.h.

#define CAN_ICR_EI ((uint32_t) (1 << 2))

CAN Error Warning Interrupt

Definition at line 240 of file can_001.h.

#define CAN_ICR_EPI ((uint32_t) (1 << 5))

CAN Error Passive Interrupt

Definition at line 249 of file can_001.h.

#define CAN_ICR_ERR_ACK (0x19)

ACK Error value

Definition at line 299 of file can_001.h.

#define CAN_ICR_ERR_ACK_DELIMITER (0x1B)

ACK Delimiter Error value

Definition at line 301 of file can_001.h.

#define CAN_ICR_ERR_CRC_DELIMITER (0x18)

CRC Delimiter Error value

Definition at line 297 of file can_001.h.

#define CAN_ICR_ERR_CRC_SEQ (0x08)

CRC Sequence Error value

Definition at line 295 of file can_001.h.

#define CAN_ICR_ERR_DATA_FIELD (0x0A)

Data Field Error value

Definition at line 293 of file can_001.h.

#define CAN_ICR_ERR_DLC (0x0B)

DLC Error value

Definition at line 291 of file can_001.h.

#define CAN_ICR_ERR_EOF (0x1A)

EOF Error value

Definition at line 303 of file can_001.h.

#define CAN_ICR_ERR_ID12_ID5 (0x0F)

ID12...ID15 Error value

Definition at line 281 of file can_001.h.

#define CAN_ICR_ERR_ID17_ID13 (7)

ID17...ID13 Error value

Definition at line 279 of file can_001.h.

#define CAN_ICR_ERR_ID20_ID18 (6)

ID28...ID21 Error value

Definition at line 273 of file can_001.h.

#define CAN_ICR_ERR_ID28_ID21 (2)

ID28...ID21 Error value

Definition at line 271 of file can_001.h.

#define CAN_ICR_ERR_ID4_ID0 (0x0E)

ID4...ID0 Error value

Definition at line 283 of file can_001.h.

#define CAN_ICR_ERR_IDE (5)

IDE Bit Error value

Definition at line 277 of file can_001.h.

#define CAN_ICR_ERR_INTERMISSION (0x12)

Intermission Error value

Definition at line 305 of file can_001.h.

#define CAN_ICR_ERR_ReservedBit_0 (0x09)

Reserved Bit 0 Error value

Definition at line 289 of file can_001.h.

#define CAN_ICR_ERR_ReservedBit_1 (0x0D)

Reserved Bit 1 Error value

Definition at line 287 of file can_001.h.

#define CAN_ICR_ERR_RTR (0x0C)

RTR Bit Error value

Definition at line 285 of file can_001.h.

#define CAN_ICR_ERR_SOF (3)

Start of Frame error value

Definition at line 269 of file can_001.h.

#define CAN_ICR_ERR_SRTR (4)

SRTR Bit Error value

Definition at line 275 of file can_001.h.

#define CAN_ICR_ERRBIT_VAL ( n ) ((uint32_t) (((n) >> 16) & 0x1F))

CAN Error Code Capture (Error Location)

Definition at line 267 of file can_001.h.

#define CAN_ICR_ERRC_VAL ( n ) ((uint32_t) (((n) >> 22) & 0x3))

CAN Error Type Capture

Definition at line 311 of file can_001.h.

#define CAN_ICR_ERRDIR_RECEIVE ((uint32_t) (1 << 21))

CAN Error Direction

Definition at line 308 of file can_001.h.

#define CAN_ICR_FORM_ERROR (1)

Definition at line 313 of file can_001.h.

#define CAN_ICR_IDI ((uint32_t) (1 << 8))

CAN ID Ready Interrupt

Definition at line 258 of file can_001.h.

#define CAN_ICR_OTHER_ERROR (3)

Definition at line 315 of file can_001.h.

#define CAN_ICR_RI ((uint32_t) (1))

CAN Receive Interrupt (A new message was received)

Definition at line 234 of file can_001.h.

#define CAN_ICR_STUFF_ERROR (2)

Definition at line 314 of file can_001.h.

#define CAN_ICR_TI1 ((uint32_t) (1 << 1))

CAN Transmit Interrupt (Transmit buffer 1 is available)

Definition at line 237 of file can_001.h.

#define CAN_ICR_TI2 ((uint32_t) (1 << 9))

CAN Transmit Interrupt 2 (Transmit buffer 2 is available)

Definition at line 261 of file can_001.h.

#define CAN_ICR_TI3 ((uint32_t) (1 << 10))

CAN Transmit Interrupt 3 (Transmit buffer 3 is available)

Definition at line 264 of file can_001.h.

#define CAN_ICR_WUI ((uint32_t) (1 << 4))

CAN Wake-Up Interrupt

Definition at line 246 of file can_001.h.

#define CAN_IER_ALIE ((uint32_t) (1 << 6))

CAN Arbitration Lost Interrupt Enable

Definition at line 345 of file can_001.h.

#define CAN_IER_BEIE ((uint32_t) (1 << 7))

CAN Bus Error Interrupt Enable

Definition at line 348 of file can_001.h.

#define CAN_IER_BITMASK (0x7FF)

CAN Interrupt Enable register definitions.

CAN Interrupt Enable Register Bitmask

Definition at line 324 of file can_001.h.

#define CAN_IER_DOIE ((uint32_t) (1 << 3))

CAN Data Overrun Interrupt Enable

Definition at line 336 of file can_001.h.

#define CAN_IER_EIE ((uint32_t) (1 << 2))

CAN Error Warning Interrupt Enable

Definition at line 333 of file can_001.h.

#define CAN_IER_EPIE ((uint32_t) (1 << 5))

CAN Error Passive Interrupt Enable

Definition at line 342 of file can_001.h.

#define CAN_IER_IDIE ((uint32_t) (1 << 8))

CAN ID Ready Interrupt Enable

Definition at line 351 of file can_001.h.

#define CAN_IER_RIE ((uint32_t) (1))

CAN Receive Interrupt Enable

Definition at line 327 of file can_001.h.

#define CAN_IER_TIE1 ((uint32_t) (1 << 1))

CAN Transmit Interrupt Enable for buffer 1

Definition at line 330 of file can_001.h.

#define CAN_IER_TIE2 ((uint32_t) (1 << 9))

CAN Transmit Enable Interrupt for Buffer 2

Definition at line 354 of file can_001.h.

#define CAN_IER_TIE3 ((uint32_t) (1 << 10))

CAN Transmit Enable Interrupt for Buffer 3

Definition at line 357 of file can_001.h.

#define CAN_IER_WUIE ((uint32_t) (1 << 4))

CAN Wake-Up Interrupt Enable

Definition at line 339 of file can_001.h.

#define CAN_MOD_BITMASK (0xBF)

CAN Mode register definitions.

CAN Mode Register Bitmask

Definition at line 141 of file can_001.h.

#define CAN_MOD_LOM ((uint32_t) (1 << 1))

CAN Listen Only Mode (Don't send ACK/Message)

Definition at line 150 of file can_001.h.

#define CAN_MOD_OPERATION ((uint32_t) 0)

CAN Operationg Mode

Definition at line 144 of file can_001.h.

#define CAN_MOD_RM ((uint32_t) (1 << 0))

CAN Reset mode

Definition at line 147 of file can_001.h.

#define CAN_MOD_RPM ((uint32_t) (1 << 5))

CAN Receive Polarity mode (Determine RD is active Low or High).

Definition at line 162 of file can_001.h.

#define CAN_MOD_SM ((uint32_t) (1 << 4))

CAN Sleep mode

Definition at line 159 of file can_001.h.

#define CAN_MOD_STM ((uint32_t) (1 << 2))

CAN Self Test mode (Don't care ACK after sending message)

Definition at line 153 of file can_001.h.

#define CAN_MOD_TM ((uint32_t) (1 << 7))

CAN Test mode (TD pin will reflects the bit detected on RD pin)

Definition at line 165 of file can_001.h.

#define CAN_MOD_TPM ((uint32_t) (1 << 3))

CAN Transmit Priority mode (Determine the transmit priority basing on Tx Priority Register)

Definition at line 156 of file can_001.h.

#define CAN_MSG_MAX_DATA_LEN (8)

The maximum data length in CAN Message

Definition at line 648 of file can_001.h.

#define CAN_MSR_BITMASK (0x303)

CAN Central Miscellaneous Status register definitions.

CAN Central Receive Status Register Bitmask

Definition at line 511 of file can_001.h.

#define CAN_MSR_BS ( n ) ((uint32_t) (1 << (n + 8)))

Bit indicate CAN n (0/1) is currently involved in bus activities

Definition at line 517 of file can_001.h.

#define CAN_MSR_E ( n ) ((uint32_t) (1 << (n + 0)))

Bit indicate Tx/Rx Error Counter has reached the limit set in CAN n (0/1)

Definition at line 514 of file can_001.h.

#define CAN_REMOTE_MSG ((uint32_t) (1 << 0))

CAN Message Type definitions.

Remote Message

Definition at line 642 of file can_001.h.

#define CAN_RFS_BITMASK (0xC00F07FF)

CAN Receive Frame Status register definitions.

CAN Receive Frame Status Register Bitmask

Definition at line 423 of file can_001.h.

#define CAN_RFS_BP ((uint32_t) (1 << 10))

CAN Bypass

Definition at line 429 of file can_001.h.

#define CAN_RFS_DLC ( n ) ((uint32_t) ((n >> 16) & 0x0F))

CAN Data Length Code

Definition at line 432 of file can_001.h.

#define CAN_RFS_FF ((uint32_t) ((uint32_t) 1 << 31))

CAN control 11 bit or 29 bit Identifier

Definition at line 438 of file can_001.h.

#define CAN_RFS_ID_INDEX ( n ) ((uint32_t) ((n) & 0x3FF))

CAN ID Index

Definition at line 426 of file can_001.h.

#define CAN_RFS_RTR ((uint32_t) (1 << 30))

CAN Remote Transmission Request

Definition at line 435 of file can_001.h.

#define CAN_RID_ID_11 ( n ) ((uint32_t) ((n) & 0x7FF))

CAN Receive Identifier Register definitions.

CAN 11 bit Identifier

Definition at line 444 of file can_001.h.

#define CAN_RID_ID_29 ( n ) ((uint32_t) ((n) & 0x1FFFFFFF))

CAN 29 bit Identifier

Definition at line 447 of file can_001.h.

#define CAN_RSR_BITMASK (0x30303)

CAN Central Receive Status register definitions.

CAN Central Receive Status Register Bitmask

Definition at line 495 of file can_001.h.

#define CAN_RSR_DOS ( n ) ((uint32_t) (1 << (n + 16)))

Bit indicate a message was lost because the preceding message to CAN n(0/1) controller was not read out quickly enough

Definition at line 505 of file can_001.h.

#define CAN_RSR_RBS ( n ) ((uint32_t) (1 << (n + 8)))

Bit indicate a received message is available in CAN n (0/1)

Definition at line 501 of file can_001.h.

#define CAN_RSR_RS ( n ) ((uint32_t) (1 << (n + 0)))

Bit indicate CAN n (0/1) is receiving a message

Definition at line 498 of file can_001.h.

#define CAN_SR_BITMASK (0xFFFFFF)

CAN Status Registe definitions.

CAN Status Registe Bitmask

Definition at line 393 of file can_001.h.

#define CAN_SR_BS ( n ) ((uint32_t) (1 << (7 + (n) * 8)))

CAN Bus Status (Bit 7, 15, 23 are the same)

Definition at line 417 of file can_001.h.

#define CAN_SR_DOS ( n ) ((uint32_t) (1 << (1 + (n) * 8)))

CAN Data Overrun Status (Bit 1, 9, 17 are the same)

Definition at line 399 of file can_001.h.

#define CAN_SR_ES ( n ) ((uint32_t) (1 << (6 + (n) * 8)))

CAN Error Status (Bit 6, 14, 22 are the same)

Definition at line 414 of file can_001.h.

#define CAN_SR_RBS ( n ) ((uint32_t) (1 << ((n) * 8)))

CAN Receive Buffer Status (Bit 0, 8, 16 are the same)

Definition at line 396 of file can_001.h.

#define CAN_SR_RS ( n ) ((uint32_t) (1 << (4 + (n) * 8)))

CAN Receive Status (Bit 4, 12, 20 are the same)

Definition at line 408 of file can_001.h.

#define CAN_SR_TBS ( n ) ((uint32_t) (1 << (2 + (n) * 8)))

CAN Transmit Buffer Status (Tx Buffer n=0/1/2 is available)

Definition at line 402 of file can_001.h.

#define CAN_SR_TCS ( n ) ((uint32_t) (1 << (3 + (n) * 8)))

CAN Transmission Complete Status (The request on Tx Buffer n=0/1/2 has been completed)

Definition at line 405 of file can_001.h.

#define CAN_SR_TS ( n ) ((uint32_t) (1 << (5 + (n) * 8)))

CAN Transmit Status (The CAN controller is sending a message in Tx Buffer n=0/1/2)

Definition at line 411 of file can_001.h.

#define CAN_STD_ENTRY_CTRL_NO_MASK (0x07)

Mask of Controller Number Bits

Definition at line 611 of file can_001.h.

#define CAN_STD_ENTRY_CTRL_NO_POS (13 )

Standard ID Entry definitions.

Start position of Controller Number Bits

Definition at line 609 of file can_001.h.

#define CAN_STD_ENTRY_DISABLE_MASK (0x01)

Mask of Disable Bit

Definition at line 615 of file can_001.h.

#define CAN_STD_ENTRY_DISABLE_POS (12 )

Start position of Disable bit

Definition at line 613 of file can_001.h.

#define CAN_STD_ENTRY_ID_MASK (0x7FF)

Mask of ID Bit

Definition at line 623 of file can_001.h.

#define CAN_STD_ENTRY_ID_POS (0 )

Start position of ID bit

Definition at line 621 of file can_001.h.

#define CAN_STD_ENTRY_IE_MASK (0x01)

Mask of Interrupt Enable bit (FullCAN entry only)

Definition at line 619 of file can_001.h.

#define CAN_STD_ENTRY_IE_POS (11 )

Start position of Interrupt Enable bit (FullCAN entry only)

Definition at line 617 of file can_001.h.

#define CAN_TFI_BITMASK (0xC00F00FF)

CAN Transmit Frame Information register definitions.

CAN Transmit Frame Information Register Bitmask

Definition at line 453 of file can_001.h.

#define CAN_TFI_DLC ( n ) ((uint32_t) (((n) & 0xF) << 16))

CAN Data Length Code

Definition at line 459 of file can_001.h.

#define CAN_TFI_FF ((uint32_t) ((uint32_t) 1 << 31))

CAN control 11-bit or 29-bit Identifier

Definition at line 465 of file can_001.h.

#define CAN_TFI_PRIO ( n ) ((uint32_t) ((n) & 0xFF))

CAN Priority

Definition at line 456 of file can_001.h.

#define CAN_TFI_RTR ((uint32_t) (1 << 30))

CAN Remote Frame Transmission

Definition at line 462 of file can_001.h.

#define CAN_TID_ID11 ( n ) ((uint32_t) ((n) & 0x7FF))

CAN Transfer Identifier register definitions.

CAN 11-bit Identifier

Definition at line 471 of file can_001.h.

#define CAN_TID_ID29 ( n ) ((uint32_t) ((n) & 0x1FFFFFFF))

CAN 11-bit Identifier

Definition at line 474 of file can_001.h.

#define CAN_TSR_BITMASK (0x30303)

CAN Central transmit Status register definitions.

CAN Central transmit Status Register Bitmask

Definition at line 480 of file can_001.h.

#define CAN_TSR_TBS ( n ) ((uint32_t) (1 << (n + 8)))

Bit indicate all 3 Tx buffer of CAN n (0/1) are available

Definition at line 486 of file can_001.h.

#define CAN_TSR_TCS ( n ) ((uint32_t) (1 << (n + 16)))

Bit indicate all requested transmissions have been completed successfully by the CAN n(0/1)

Definition at line 489 of file can_001.h.

#define CAN_TSR_TS ( n ) ((uint32_t) (1 << (n + 0)))

Bit indicate CAN n (0/1) is sending a message

Definition at line 483 of file can_001.h.

#define CANAF_AFMR_ACCBP ((uint32_t) (1 << 1))

CAN Acceptance File Bypass mode

Definition at line 529 of file can_001.h.

#define CANAF_AFMR_ACCOFF ((uint32_t) (1))

CAN Acceptance Filter Off mode

Definition at line 526 of file can_001.h.

#define CANAF_AFMR_EFCAN ((uint32_t) (1 << 2))

FullCAN Mode Enhancements

Definition at line 532 of file can_001.h.

#define CANAF_AFMR_OPERATION ((uint32_t) (0))

Acceptance Filter Mode register definitions.

CAN Acceptance Filter Operation mode

Definition at line 523 of file can_001.h.

#define CANAF_ENDADDR ( n ) ((uint32_t) (((n) & 0x3FF) << 2))

Extended Frame Group Start Address register definitions.

The start address of the table of grouped Extended Identifier

Definition at line 538 of file can_001.h.

#define CANAF_ENDADDR_VAL ( n ) ((uint32_t) ((n >> 2) & 0x3FF))

Definition at line 539 of file can_001.h.

#define CANAF_FCAN_IC_INTPND ( n ) ((n >= 32) ? ((uint32_t) (1 << (n - 32))) : ((uint32_t) (1 << n)))

FullCAN Interrupt and Capture register definitions.

FullCAN Interrupt and Capture (0-31)

Definition at line 603 of file can_001.h.

#define CANAF_FCANIE ((uint32_t) (1))

Global FullCANInterrupt Enable

Definition at line 560 of file can_001.h.

#define CANAF_FCANIE_BITMASK (0x01)

Global FullCANInterrupt Enable register definitions.

Global FullCANInterrupt Enable Register Bitmask

Definition at line 557 of file can_001.h.

#define CANAF_FULCAN_MSG_AF_FINISHED (0x03)

AF has finished updating FullCAN Message

Definition at line 595 of file can_001.h.

#define CANAF_FULCAN_MSG_AF_UPDATING (0x01)

FullCAN Message Status.

AF is updating FullCAN Message

Definition at line 593 of file can_001.h.

#define CANAF_FULCAN_MSG_CPU_READING (0x0)

CPU is in process of reading FullCAN Message

Definition at line 597 of file can_001.h.

#define CANAF_FULLCAN_MSG_DLC_BITMASK (0x0F)

DLC Bit Mask

Definition at line 579 of file can_001.h.

#define CANAF_FULLCAN_MSG_DLC_POS (16)

DLC Bit Position

Definition at line 577 of file can_001.h.

#define CANAF_FULLCAN_MSG_FF_POS (31)

FullCAN Message Layout definitions.

FF Bit Position

Definition at line 567 of file can_001.h.

#define CANAF_FULLCAN_MSG_ID11_BITMASK (0x7FF)

11bit-ID Bit Mask

Definition at line 587 of file can_001.h.

#define CANAF_FULLCAN_MSG_ID11_POS (0)

11bit-ID Bit Position

Definition at line 585 of file can_001.h.

#define CANAF_FULLCAN_MSG_LOST_POS (26)

Message Lost Bit Position

Definition at line 571 of file can_001.h.

#define CANAF_FULLCAN_MSG_RTR_POS (30)

RTR Bit Position

Definition at line 569 of file can_001.h.

#define CANAF_FULLCAN_MSG_SCC_BITMASK (0x07)

SCC Bit Mask

Definition at line 583 of file can_001.h.

#define CANAF_FULLCAN_MSG_SCC_POS (13)

SCC Bit Position

Definition at line 581 of file can_001.h.

#define CANAF_FULLCAN_MSG_SEM_BITMASK (0x03)

SEM Bit Mask

Definition at line 575 of file can_001.h.

#define CANAF_FULLCAN_MSG_SEM_POS (24)

SEM Bit Position

Definition at line 573 of file can_001.h.

#define CANAF_LUTERR ((uint32_t) (1))

LUT Error register definitions.

CAN Look-Up Table Error

Definition at line 551 of file can_001.h.

#define CANAF_LUTERRAD ( n ) ((uint32_t) (((n) & 0x1FF) << 2))

LUT Error Address register definitions.

CAN Look-Up Table Error Address

Definition at line 545 of file can_001.h.

#define CANAF_RAM_ENTRY_NUM 512

The number of entry in AF RAM region

Definition at line 49 of file can_001.h.

Enumeration Type Documentation

enum IP_CAN_AF_RAM_SECTION_T

CAN AF RAM section definitions.

Enumerator:

CANAF_RAM_FULLCAN_SEC	FullCAN Section
CANAF_RAM_SFF_SEC	Standard ID Section
CANAF_RAM_SFF_GRP_SEC	Group Standard ID Section
CANAF_RAM_EFF_SEC	Extended ID Section
CANAF_RAM_EFF_GRP_SEC	Group Extended ID Section
CANAF_RAM_SECTION_NUM

Definition at line 54 of file can_001.h.

enum IP_CAN_BUFFER_ID_T

CAN Buffer ID definition.

Enumerator:

CAN_BUFFER_1	Buffer 1
CAN_BUFFER_2	Buffer 2
CAN_BUFFER_3	Buffer 3
CAN_BUFFER_LAST	Last Buffer

Definition at line 653 of file can_001.h.

Function Documentation

STATIC INLINE uint32_t IP_CAN_AF_GetMode ( IP_CAN_001_AF_T * pCanAF )

Get CAN AF Mode.

Parameters

pCanAF : Pointer to CAN AF Register block

Returns: Mode

Definition at line 848 of file can_001.h.

void IP_CAN_AF_Init	(	IP_CAN_001_AF_T *	pCanAF,
		IP_CAN_001_AF_RAM_T *	pCanAFRam
	)

Initialize CAN Acceptance Filter.

Parameters

pCanAF	: Pointer to CAN AF Register block
pCanAFRam	: Pointer to CAN AF RAM Register block

Returns: Nothing

Definition at line 547 of file can_001.c.

STATIC INLINE void IP_CAN_AF_SetMode	(	IP_CAN_001_AF_T *	pCanAF,
		uint32_t	AFMode
	)

Set CAN AF Mode.

Parameters

pCanAF	: Pointer to CAN AF Register block
AFMode	: Mode selected (Bit values of CANAF_AFMR_*)

Returns: None

Definition at line 838 of file can_001.h.

void IP_CAN_ClearAFLUT	(	IP_CAN_001_AF_T *	pCanAF,
		IP_CAN_001_AF_RAM_T *	pCanAFRam
	)

Clear CAN AF LUT.

Parameters

pCanAF	: Pointer to CAN AF Register block
pCanAFRam	: Pointer to CAN AF RAM Register block

Returns: None

Definition at line 554 of file can_001.c.

STATIC INLINE void IP_CAN_DeInit ( IP_CAN_001_T * pCAN )

De-initialize the CAN peripheral.

Parameters

pCAN	: Pointer to CAN peripheral block

Returns: None

Definition at line 737 of file can_001.h.

void IP_CAN_FullCANIntConfig	(	IP_CAN_001_AF_T *	pCanAF,
		FunctionalState	NewState
	)

Enable/Disable the interrupts of the CAN Controller in FullCAN Mode.

Parameters

pCanAF	: Pointer to CAN AF Register block
NewState	: ENABLE to enable/DISABLE to Disable

Returns: Nothing

Definition at line 481 of file can_001.c.

Status IP_CAN_FullCANReceive	(	IP_CAN_001_AF_T *	pCanAF,
		IP_CAN_001_AF_RAM_T *	pCanAFRam,
		uint8_t	ObjID,
		IP_CAN_MSG_T *	pMsg,
		uint8_t *	pSCC
	)

Get FULLCANmessage automatically received by the AF.

Parameters

pCanAF	: Pointer to CAN AF Register block
pCanAFRam	: Pointer to CAN AF RAM Register block
ObjID	: Object ID
pMsg	: Pointer to the buffer storing the received message
pSCC	: Pointer to the buffer storing the controller ID of the received message

Returns: SUCCESS (message information saved) or ERROR (no message received)

Definition at line 509 of file can_001.c.

uint16_t IP_CAN_GetEntriesNum	(	IP_CAN_001_AF_T *	pCanAF,
		IP_CAN_001_AF_RAM_T *	pCanAFRam,
		IP_CAN_AF_RAM_SECTION_T	SectionID
	)

Get the number of entries of the given section.

Parameters

pCanAF	: Pointer to CAN AF Register block
pCanAFRam	: Pointer to CAN AF RAM Register block
SectionID	: Section ID

Returns: Number of entries

Definition at line 666 of file can_001.c.

STATIC INLINE uint8_t IP_CAN_GetEWL ( IP_CAN_001_T * pCAN )

Get Error Warning Limit of the CAN Controller.

Parameters

pCAN	: Pointer to CAN peripheral block

Returns: Error warning limit value

Definition at line 777 of file can_001.h.

uint32_t IP_CAN_GetFullCANIntStatus	(	IP_CAN_001_AF_T *	pCanAF,
		uint8_t	ObjID
	)

Get FullCAN interrupt status of the object.

Parameters

pCanAF	: Pointer to CAN AF Register block
ObjID	: Object ID

Returns: Interrupt Status

Definition at line 500 of file can_001.c.

STATIC INLINE uint32_t IP_CAN_GetGlobalStatus ( IP_CAN_001_T * pCAN )

Get global status register contents of the CAN Controller.

Parameters

pCAN	: Pointer to CAN peripheral block

Returns: Gloabl Status register contents (Or'ed bit values of CAN_GSR_*)

Definition at line 787 of file can_001.h.

STATIC INLINE uint32_t IP_CAN_GetIntStatus ( IP_CAN_001_T * pCAN )

Get the interrupt status of the CAN Controller.

Parameters

pCAN	: Pointer to CAN peripheral block

Returns: Interrupt status (Or'ed bit values of CAN_ICR_* )

Definition at line 827 of file can_001.h.

STATIC INLINE uint32_t IP_CAN_GetMode ( IP_CAN_001_T * pCAN )

Get current mode register settings of the CAN controller.

Parameters

pCAN	: Pointer to CAN peripheral block

Returns: Current Mode register value of the CAN Controller (Bit values of CAN_MOD_*)

Definition at line 745 of file can_001.h.

STATIC INLINE uint32_t IP_CAN_GetStatus ( IP_CAN_001_T * pCAN )

Get the status of the CAN Controller.

Parameters

pCAN	: Pointer to CAN peripheral block

Returns: Status (Or'ed bit values of CAN_SR_*(n) with n = CAN_BUFFER_1/2/3).

Definition at line 797 of file can_001.h.

void IP_CAN_Init ( IP_CAN_001_T * pCAN )

Initialize the CAN peripheral.

Parameters

pCAN	: Pointer to CAN peripheral block

Returns: None

Definition at line 332 of file can_001.c.

Status IP_CAN_InsertFullCANEntry	(	IP_CAN_001_AF_T *	pCanAF,
		IP_CAN_001_AF_RAM_T *	pCanAFRam,
		IP_CAN_STD_ID_Entry_T *	pEntry
	)

Insert a FullCAN Entry into the current LUT.

Parameters

pCanAF	: Pointer to CAN AF Register block
pCanAFRam	: Pointer to CAN AF RAM Register block
pEntry	: Pointer to the entry which will be inserted

Returns: SUCCESS/ERROR

Definition at line 809 of file can_001.c.

Status IP_CAN_InsertGroupEXTEntry	(	IP_CAN_001_AF_T *	pCanAF,
		IP_CAN_001_AF_RAM_T *	pCanAFRam,
		IP_CAN_EXT_ID_RANGE_Entry_T *	pEntry
	)

Insert an Group Extended Entry into the current LUT.

Parameters

pCanAF	: Pointer to CAN AF Register block
pCanAFRam	: Pointer to CAN AF RAM Register block
pEntry	: Pointer to the entry which will be inserted

Returns: SUCCESS/ERROR

Definition at line 972 of file can_001.c.

Status IP_CAN_InsertGroupSTDEntry	(	IP_CAN_001_AF_T *	pCanAF,
		IP_CAN_001_AF_RAM_T *	pCanAFRam,
		IP_CAN_STD_ID_RANGE_Entry_T *	pEntry
	)

Insert an Group Standard Entry into the current LUT.

Parameters

pCanAF	: Pointer to CAN AF Register block
pCanAFRam	: Pointer to CAN AF RAM Register block
pEntry	: Pointer to the entry which will be inserted

Returns: SUCCESS/ERROR

Definition at line 880 of file can_001.c.

Status IP_CAN_InsertIndividualEXTEntry	(	IP_CAN_001_AF_T *	pCanAF,
		IP_CAN_001_AF_RAM_T *	pCanAFRam,
		IP_CAN_EXT_ID_Entry_T *	pEntry
	)

Insert an individual Extended Entry into the current LUT.

Parameters

pCanAF	: Pointer to CAN AF Register block
pCanAFRam	: Pointer to CAN AF RAM Register block
pEntry	: Pointer to the entry which will be inserted

Returns: SUCCESS/ERROR

Definition at line 824 of file can_001.c.

Status IP_CAN_InsertIndividualSTDEntry	(	IP_CAN_001_AF_T *	pCanAF,
		IP_CAN_001_AF_RAM_T *	pCanAFRam,
		IP_CAN_STD_ID_Entry_T *	pEntry
	)

Insert an individual Standard Entry into the current LUT.

Parameters

pCanAF	: Pointer to CAN AF Register block
pCanAFRam	: Pointer to CAN AF RAM Register block
pEntry	: Pointer to the entry which will be inserted

Returns: SUCCESS/ERROR

Definition at line 816 of file can_001.c.

STATIC INLINE void IP_CAN_IntDisable	(	IP_CAN_001_T *	pCAN,
		uint32_t	IntMask
	)

Disable the given interrupt of the CAN Controller.

Parameters

pCAN	: Pointer to CAN peripheral block
IntMask	: Interrupt Mask value (Or'ed bit values of CAN_IER_*).

Returns: Nothing

Definition at line 818 of file can_001.h.

STATIC INLINE void IP_CAN_IntEnable	(	IP_CAN_001_T *	pCAN,
		uint32_t	IntMask
	)

Enable the given interrupt of the CAN Controller.

Parameters

pCAN	: Pointer to CAN peripheral block
IntMask	: Interrupt Mask value (Or'ed bit values of CAN_IER_*).

Returns: Nothing

Definition at line 808 of file can_001.h.

Status IP_CAN_ReadFullCANEntry	(	IP_CAN_001_AF_T *	pCanAF,
		IP_CAN_001_AF_RAM_T *	pCanAFRam,
		uint16_t	Position,
		IP_CAN_STD_ID_Entry_T *	pEntry
	)

Read a FullCAN Entry into from current LUT.

Parameters

pCanAF	: Pointer to CAN AF Register block
pCanAFRam	: Pointer to CAN AF RAM Register block
Position	: Position of the entry in the given section (started from 0)
pEntry	: Pointer to the entry which will be inserted

Returns: SUCCESS/ERROR

Definition at line 1304 of file can_001.c.

Status IP_CAN_ReadGroupEXTEntry	(	IP_CAN_001_AF_T *	pCanAF,
		IP_CAN_001_AF_RAM_T *	pCanAFRam,
		uint16_t	Position,
		IP_CAN_EXT_ID_RANGE_Entry_T *	pEntry
	)

Read an Group Extended Entry from the current LUT.

Parameters

pCanAF	: Pointer to CAN AF Register block
pCanAFRam	: Pointer to CAN AF RAM Register block
Position	: Position of the entry in the given section (started from 0)
pEntry	: Pointer to the entry which will be inserted

Returns: SUCCESS/ERROR

Definition at line 1363 of file can_001.c.

Status IP_CAN_ReadGroupSTDEntry	(	IP_CAN_001_AF_T *	pCanAF,
		IP_CAN_001_AF_RAM_T *	pCanAFRam,
		uint16_t	Position,
		IP_CAN_STD_ID_RANGE_Entry_T *	pEntry
	)

Read an Group Standard Entry from the current LUT.

Parameters

pCanAF	: Pointer to CAN AF Register block
pCanAFRam	: Pointer to CAN AF RAM Register block
Position	: Position of the entry in the given section (started from 0)
pEntry	: Pointer to the entry which will be inserted

Returns: SUCCESS/ERROR

Definition at line 1320 of file can_001.c.

Status IP_CAN_ReadIndividualEXTEntry	(	IP_CAN_001_AF_T *	pCanAF,
		IP_CAN_001_AF_RAM_T *	pCanAFRam,
		uint16_t	Position,
		IP_CAN_EXT_ID_Entry_T *	pEntry
	)

Read an individual Extended Entry from the current LUT.

Parameters

pCanAF	: Pointer to CAN AF Register block
pCanAFRam	: Pointer to CAN AF RAM Register block
Position	: Position of the entry in the given section (started from 0)
pEntry	: Pointer to the entry which will be inserted

Returns: SUCCESS/ERROR

Definition at line 1342 of file can_001.c.

Status IP_CAN_ReadIndividualSTDEntry	(	IP_CAN_001_AF_T *	pCanAF,
		IP_CAN_001_AF_RAM_T *	pCanAFRam,
		uint16_t	Position,
		IP_CAN_STD_ID_Entry_T *	pEntry
	)

Read an individual Standard Entry from the current LUT.

Parameters

pCanAF	: Pointer to CAN AF Register block
pCanAFRam	: Pointer to CAN AF RAM Register block
Position	: Position of the entry in the given section (started from 0)
pEntry	: Pointer to the entry which will be inserted

Returns: SUCCESS/ERROR

Definition at line 1312 of file can_001.c.

Status IP_CAN_Receive	(	IP_CAN_001_T *	pCAN,
		IP_CAN_MSG_T *	pMsg
	)

Get message received by the CAN Controller.

Parameters

pCAN	: Pointer to CAN peripheral block
pMsg	: Pointer to the buffer to store the received message

Returns: SUCCESS (message information saved) or ERROR (no message received)

Definition at line 400 of file can_001.c.

Status IP_CAN_RemoveFullCANEntry	(	IP_CAN_001_AF_T *	pCanAF,
		IP_CAN_001_AF_RAM_T *	pCanAFRam,
		int16_t	Position
	)

Remove a FullCAN Entry from the current LUT.

Parameters

pCanAF	: Pointer to CAN AF Register block
pCanAFRam	: Pointer to CAN AF RAM Register block
Position	: Position of the entry in the Full CAN section (started from 0)

Returns: SUCCESS/ERROR

Definition at line 1225 of file can_001.c.

Status IP_CAN_RemoveGroupEXTEntry	(	IP_CAN_001_AF_T *	pCanAF,
		IP_CAN_001_AF_RAM_T *	pCanAFRam,
		int16_t	Position
	)

Remove an Group Extended Entry from the current LUT.

Parameters

pCanAF	: Pointer to CAN AF Register block
pCanAFRam	: Pointer to CAN AF RAM Register block
Position	: Position of the entry in the Group EXT section (started from 0)

Returns: SUCCESS/ERROR

Definition at line 1255 of file can_001.c.

Status IP_CAN_RemoveGroupSTDEntry	(	IP_CAN_001_AF_T *	pCanAF,
		IP_CAN_001_AF_RAM_T *	pCanAFRam,
		int16_t	Position
	)

Remove an Group Standard Entry from the current LUT.

Parameters

pCanAF	: Pointer to CAN AF Register block
pCanAFRam	: Pointer to CAN AF RAM Register block
Position	: Position of the entry in the Group STD section (started from 0)

Returns: SUCCESS/ERROR

Definition at line 1240 of file can_001.c.

Status IP_CAN_RemoveIndividualEXTEntry	(	IP_CAN_001_AF_T *	pCanAF,
		IP_CAN_001_AF_RAM_T *	pCanAFRam,
		int16_t	Position
	)

Remove an individual Extended Entry from the current LUT.

Parameters

pCanAF	: Pointer to CAN AF Register block
pCanAFRam	: Pointer to CAN AF RAM Register block
Position	: Position of the entry in the Individual EXT section (started from 0)

Returns: SUCCESS/ERROR

Definition at line 1248 of file can_001.c.

Status IP_CAN_RemoveIndividualSTDEntry	(	IP_CAN_001_AF_T *	pCanAF,
		IP_CAN_001_AF_RAM_T *	pCanAFRam,
		int16_t	Position
	)

Remove an individual Standard Entry from the current LUT.

Parameters

pCanAF	: Pointer to CAN AF Register block
pCanAFRam	: Pointer to CAN AF RAM Register block
Position	: Position of the entry in the Individual STD section (started from 0)

Returns: SUCCESS/ERROR

Definition at line 1232 of file can_001.c.

Status IP_CAN_Send	(	IP_CAN_001_T *	pCAN,
		IP_CAN_BUFFER_ID_T	TxBufID,
		IP_CAN_MSG_T *	pMsg
	)

Request the CAN Controller to send message.

Parameters

pCAN	: Pointer to CAN peripheral block
TxBufID	: ID of buffer which will be used for transmit
pMsg	: Pointer to the buffer of message which will be sent

Returns: SUCCESS (message information saved) or ERROR (no message received)

Definition at line 437 of file can_001.c.

Status IP_CAN_SetAFLUT	(	IP_CAN_001_AF_T *	pCanAF,
		IP_CAN_001_AF_RAM_T *	pCanAFRam,
		IP_CAN_AF_LUT_T *	pAFSections
	)

Set CAN AF LUT.

Parameters

pCanAF	: Pointer to CAN AF Register block
pCanAFRam	: Pointer to CAN AF RAM Register block
pAFSections	: Pointer to buffer storing AF Section Data

Returns: SUCCESS/ERROR

Definition at line 578 of file can_001.c.

void IP_CAN_SetBusTiming	(	IP_CAN_001_T *	pCAN,
		IP_CAN_BUS_TIMING_T *	pBusTiming
	)

Set Bus Timing for the CAN Controller.

Parameters

pCAN	: Pointer to CAN peripheral block
pBusTiming	: Bus Timing information

Returns: None

Definition at line 381 of file can_001.c.

STATIC INLINE void IP_CAN_SetCmd	(	IP_CAN_001_T *	pCAN,
		uint32_t	command
	)

Set the CAN command request.

Parameters

pCAN	: Pointer to CAN peripheral block
command	: Command request (Or'ed bit values of CAN_CMR_*).

Returns: None

Definition at line 756 of file can_001.h.

STATIC INLINE void IP_CAN_SetEWL	(	IP_CAN_001_T *	pCAN,
		uint32_t	ewl
	)

Set Error Warning Limit for the CAN Controller.

Parameters

pCAN	: Pointer to CAN peripheral block
ewl	: expected limit

Returns: None

Definition at line 767 of file can_001.h.

void IP_CAN_SetMode	(	IP_CAN_001_T *	pCAN,
		uint32_t	Mode,
		FunctionalState	NewState
	)

Enable/Disable the specified mode in CAN controller.

Parameters

pCAN	: Pointer to CAN peripheral block
Mode	: Mode selected (Bit values of CAN_MOD_*)
NewState	: ENABLE: Enable, DISABLE: Disable

Returns: None

Definition at line 352 of file can_001.c.

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