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LPCOpen Platform
v1.03
LPCOpen Platform for NXP LPC Microcontrollers
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Data Structures | |
| struct | LPC_PIN_INT_T |
| LPC8xx Pin Interrupt and Pattern Match register block structure. More... | |
Macros | |
| #define | PMODE_EDGE (0) |
| #define | PMODE_LEVEL (1) |
| #define | PMODE_SET(t, p, x) (x ? (t->ISEL |= (x << p)) : (t->ISEL &= ~(1 << p))) |
| #define | ENRL_DISABLE (0) |
| #define | ENRL_ENABLE (1) |
| #define | ENRL_SET(t, p, x) (x ? (t->IENR |= (x << p)) : (t->IENR &= ~(1 << p))) |
| #define | SETENRL(t, p) (t->SIENR |= (1 << p)) |
| #define | CENRL(t, p) (t->CIENR |= (1 << p)) |
| #define | ENAF_LOW (0) |
| #define | ENAF_HIGH (1) |
| #define | ENAF_SET(t, p, x) (x ? (t->IENF |= (x << p)) : (t->IENF &= ~(1 << p))) |
| #define | SETENAF(t, p) (t->SIENF |= (1 << p)) |
| #define | CENAF(t, p) (t->CIENF |= (1 << p)) |
| #define | RDET_CLR(t, p) (t->RISE |= (1 << p)) |
| #define | FDET_CLR(t, p) (t->FALL |= (1 << p)) |
| #define | PSTAT_CRL(t, p) (t->IST |= (1 << p)) |
Enumerations | |
| enum | CHIP_PMI_PIN_T { PMI0 = 0, PMI1 = 1, PMI2 = 2, PMI3 = 3, PMI4 = 4, PMI5 = 5, PMI6 = 6, PMI7 = 7 } |
| enum | CHIP_PINT_CFG_T { PINT_ACTIVE_LOW = 0, PINT_ACTIVE_HIGH = 1, PINT_EDGE_DET = 2, PINT_LEVEL_DET = 4, PINT_RISING = 8, PINT_FALLING = 16 } |
Functions | |
| void | Chip_PININT_Config (CHIP_PMI_PIN_T pin, CHIP_PINT_CFG_T cfg) |
| Configure the Pattern Matching pins. | |
| #define CENAF | ( | t, | |
| p | |||
| ) | (t->CIENF |= (1 << p)) |
Disable falling edge or active level low interrupt Clear Raising Edge detection
Definition at line 87 of file pinint_8xx.h.
| #define CENRL | ( | t, | |
| p | |||
| ) | (t->CIENR |= (1 << p)) |
Disable raising edge or level inetrrupt
Definition at line 79 of file pinint_8xx.h.
| #define ENAF_HIGH (1) |
Enable falling edge or active level low interrupt Enable or disable falling edge or active level low interrupt
Definition at line 82 of file pinint_8xx.h.
| #define ENAF_LOW (0) |
Disable falling edge or active level low interrupt
Definition at line 81 of file pinint_8xx.h.
| #define ENAF_SET | ( | t, | |
| p, | |||
| x | |||
| ) | (x ? (t->IENF |= (x << p)) : (t->IENF &= ~(1 << p))) |
Definition at line 84 of file pinint_8xx.h.
| #define ENRL_DISABLE (0) |
Disable raising edge or level interrupt
Definition at line 73 of file pinint_8xx.h.
| #define ENRL_ENABLE (1) |
Enable raising edge or level inetrrupt Enable or disable raising edge or level interrupt
Definition at line 74 of file pinint_8xx.h.
| #define ENRL_SET | ( | t, | |
| p, | |||
| x | |||
| ) | (x ? (t->IENR |= (x << p)) : (t->IENR &= ~(1 << p))) |
Definition at line 76 of file pinint_8xx.h.
| #define FDET_CLR | ( | t, | |
| p | |||
| ) | (t->FALL |= (1 << p)) |
Clear Interrupt status
Definition at line 93 of file pinint_8xx.h.
| #define PMODE_EDGE (0) |
LPC8xx Pin Interrupt and Pattern match engine register bit fields and macrosEdge sensitive interrupt
Definition at line 68 of file pinint_8xx.h.
| #define PMODE_LEVEL (1) |
Level sensitive interrupt Set Pin Interrupt mode
Definition at line 69 of file pinint_8xx.h.
| #define PMODE_SET | ( | t, | |
| p, | |||
| x | |||
| ) | (x ? (t->ISEL |= (x << p)) : (t->ISEL &= ~(1 << p))) |
Definition at line 71 of file pinint_8xx.h.
| #define PSTAT_CRL | ( | t, | |
| p | |||
| ) | (t->IST |= (1 << p)) |
Definition at line 96 of file pinint_8xx.h.
| #define RDET_CLR | ( | t, | |
| p | |||
| ) | (t->RISE |= (1 << p)) |
Clear Falling Edge detection
Definition at line 90 of file pinint_8xx.h.
| #define SETENAF | ( | t, | |
| p | |||
| ) | (t->SIENF |= (1 << p)) |
Enable falling edge or active level low interrupt
Definition at line 86 of file pinint_8xx.h.
| #define SETENRL | ( | t, | |
| p | |||
| ) | (t->SIENR |= (1 << p)) |
Enable raising edge or level inetrrupt
Definition at line 78 of file pinint_8xx.h.
| enum CHIP_PINT_CFG_T |
LPC8xx Pin Interrupt Configuration values enum
| PINT_ACTIVE_LOW |
Active Low |
| PINT_ACTIVE_HIGH |
Active High |
| PINT_EDGE_DET |
Edge Detect |
| PINT_LEVEL_DET |
Level detect |
| PINT_RISING |
Raising edge |
| PINT_FALLING |
Falling edge |
Definition at line 115 of file pinint_8xx.h.
| enum CHIP_PMI_PIN_T |
LPC8xx Pin Matching Interrupt pins enum
| PMI0 |
PMI PIN 0 |
| PMI1 |
PMI PIN 1 |
| PMI2 |
PMI PIN 2 |
| PMI3 |
PMI PIN 3 |
| PMI4 |
PMI PIN 4 |
| PMI5 |
PMI PIN 5 |
| PMI6 |
PMI PIN 6 |
| PMI7 |
PMI PIN 7 |
Definition at line 101 of file pinint_8xx.h.
| void Chip_PININT_Config | ( | CHIP_PMI_PIN_T | pin, |
| CHIP_PINT_CFG_T | cfg | ||
| ) |
Configure the Pattern Matching pins.
| pin | : Pin Number |
| cfg | : Pin configuration |
Definition at line 50 of file pinint_8xx.c.