Detailed Description

Data Structures
struct	SSP_ConfigFormat

struct	SPI_Address_t

struct	Chip_SSP_DATA_SETUP_T

Macros
#define	SSP_CPHA_FIRST SSP_CR0_CPHA_FIRST

#define	SSP_CPHA_SECOND SSP_CR0_CPHA_SECOND

#define	SSP_CPOL_HI SSP_CR0_CPOL_LO

#define	SSP_CPOL_LO SSP_CR0_CPOL_HI

#define	SSP_SLAVE_MODE SSP_CR1_SLAVE_EN

#define	SSP_MASTER_MODE SSP_CR1_MASTER_EN

Enumerations
enum	CHIP_SSP_CLOCK_MODE_T { SSP_CLOCK_CPHA0_CPOL0 = (0 << 6), SSP_CLOCK_CPHA0_CPOL1 = (1u << 6), SSP_CLOCK_CPHA1_CPOL0 = (2u << 6), SSP_CLOCK_CPHA1_CPOL1 = (3u << 6), SSP_CLOCK_MODE0 = SSP_CLOCK_CPHA0_CPOL0, SSP_CLOCK_MODE1 = SSP_CLOCK_CPHA1_CPOL0, SSP_CLOCK_MODE2 = SSP_CLOCK_CPHA0_CPOL1, SSP_CLOCK_MODE3 = SSP_CLOCK_CPHA1_CPOL1, SSP_CLOCK_CPHA0_CPOL0 = (0 << 6), SSP_CLOCK_CPHA0_CPOL1 = (1u << 6), SSP_CLOCK_CPHA1_CPOL0 = (2u << 6), SSP_CLOCK_CPHA1_CPOL1 = (3u << 6), SSP_CLOCK_MODE0 = SSP_CLOCK_CPHA0_CPOL0, SSP_CLOCK_MODE1 = SSP_CLOCK_CPHA1_CPOL0, SSP_CLOCK_MODE2 = SSP_CLOCK_CPHA0_CPOL1, SSP_CLOCK_MODE3 = SSP_CLOCK_CPHA1_CPOL1, SSP_CLOCK_CPHA0_CPOL0 = (0 << 6), SSP_CLOCK_CPHA0_CPOL1 = (1u << 6), SSP_CLOCK_CPHA1_CPOL0 = (2u << 6), SSP_CLOCK_CPHA1_CPOL1 = (3u << 6), SSP_CLOCK_MODE0 = SSP_CLOCK_CPHA0_CPOL0, SSP_CLOCK_MODE1 = SSP_CLOCK_CPHA1_CPOL0, SSP_CLOCK_MODE2 = SSP_CLOCK_CPHA0_CPOL1, SSP_CLOCK_MODE3 = SSP_CLOCK_CPHA1_CPOL1, SSP_CLOCK_CPHA0_CPOL0 = (0 << 6), SSP_CLOCK_CPHA0_CPOL1 = (1u << 6), SSP_CLOCK_CPHA1_CPOL0 = (2u << 6), SSP_CLOCK_CPHA1_CPOL1 = (3u << 6), SSP_CLOCK_MODE0 = SSP_CLOCK_CPHA0_CPOL0, SSP_CLOCK_MODE1 = SSP_CLOCK_CPHA1_CPOL0, SSP_CLOCK_MODE2 = SSP_CLOCK_CPHA0_CPOL1, SSP_CLOCK_MODE3 = SSP_CLOCK_CPHA1_CPOL1 }

enum	CHIP_SSP_FRAME_FORMAT_T { SSP_FRAMEFORMAT_SPI = (0 << 4), CHIP_SSP_FRAME_FORMAT_TI = (1u << 4), SSP_FRAMEFORMAT_MICROWIRE = (2u << 4), SSP_FRAMEFORMAT_SPI = (0 << 4), CHIP_SSP_FRAME_FORMAT_TI = (1u << 4), SSP_FRAMEFORMAT_MICROWIRE = (2u << 4), SSP_FRAMEFORMAT_SPI = (0 << 4), CHIP_SSP_FRAME_FORMAT_TI = (1u << 4), SSP_FRAMEFORMAT_MICROWIRE = (2u << 4), SSP_FRAMEFORMAT_SPI = (0 << 4), CHIP_SSP_FRAME_FORMAT_TI = (1u << 4), SSP_FRAMEFORMAT_MICROWIRE = (2u << 4) }

enum	CHIP_SSP_BITS_T { SSP_BITS_4 = (3u << 0), SSP_BITS_5 = (4u << 0), SSP_BITS_6 = (5u << 0), SSP_BITS_7 = (6u << 0), SSP_BITS_8 = (7u << 0), SSP_BITS_9 = (8u << 0), SSP_BITS_10 = (9u << 0), SSP_BITS_11 = (10u << 0), SSP_BITS_12 = (11u << 0), SSP_BITS_13 = (12u << 0), SSP_BITS_14 = (13u << 0), SSP_BITS_15 = (14u << 0), SSP_BITS_16 = (15u << 0), SSP_BITS_4 = (3u << 0), SSP_BITS_5 = (4u << 0), SSP_BITS_6 = (5u << 0), SSP_BITS_7 = (6u << 0), SSP_BITS_8 = (7u << 0), SSP_BITS_9 = (8u << 0), SSP_BITS_10 = (9u << 0), SSP_BITS_11 = (10u << 0), SSP_BITS_12 = (11u << 0), SSP_BITS_13 = (12u << 0), SSP_BITS_14 = (13u << 0), SSP_BITS_15 = (14u << 0), SSP_BITS_16 = (15u << 0), SSP_BITS_4 = (3u << 0), SSP_BITS_5 = (4u << 0), SSP_BITS_6 = (5u << 0), SSP_BITS_7 = (6u << 0), SSP_BITS_8 = (7u << 0), SSP_BITS_9 = (8u << 0), SSP_BITS_10 = (9u << 0), SSP_BITS_11 = (10u << 0), SSP_BITS_12 = (11u << 0), SSP_BITS_13 = (12u << 0), SSP_BITS_14 = (13u << 0), SSP_BITS_15 = (14u << 0), SSP_BITS_16 = (15u << 0), SSP_BITS_4 = (3u << 0), SSP_BITS_5 = (4u << 0), SSP_BITS_6 = (5u << 0), SSP_BITS_7 = (6u << 0), SSP_BITS_8 = (7u << 0), SSP_BITS_9 = (8u << 0), SSP_BITS_10 = (9u << 0), SSP_BITS_11 = (10u << 0), SSP_BITS_12 = (11u << 0), SSP_BITS_13 = (12u << 0), SSP_BITS_14 = (13u << 0), SSP_BITS_15 = (14u << 0), SSP_BITS_16 = (15u << 0) }

enum	CHIP_SSP_MODE_T { SSP_MODE_MASTER = (0 << 2), SSP_MODE_SLAVE = (1u << 2), SSP_MODE_MASTER = (0 << 2), SSP_MODE_SLAVE = (1u << 2), SSP_MODE_MASTER = (0 << 2), SSP_MODE_SLAVE = (1u << 2), SSP_MODE_MASTER = (0 << 2), SSP_MODE_SLAVE = (1u << 2) }

Functions
STATIC INLINE FlagStatus	Chip_SSP_GetStatus (LPC_SSP_T *pSSP, IP_SSP_STATUS_T Stat)
	Get the current status of SSP controller.

STATIC INLINE void	Chip_SSP_Enable (LPC_SSP_T *pSSP)
	Enable SSP operation.

STATIC INLINE void	Chip_SSP_Disable (LPC_SSP_T *pSSP)
	Disable SSP operation.

STATIC INLINE void	Chip_SSP_DMA_Enable (LPC_SSP_T *pSSP)
	Enable SSP DMA.

STATIC INLINE void	Chip_SSP_DMA_Disable (LPC_SSP_T *pSSP)
	Disable SSP DMA.

STATIC INLINE void	Chip_SSP_EnableLoopBack (LPC_SSP_T *pSSP)
	Enable loopback mode.

STATIC INLINE void	Chip_SSP_DisableLoopBack (LPC_SSP_T *pSSP)
	Disable loopback mode.

void	Chip_SSP_Int_FlushData (LPC_SSP_T *pSSP)
	Clean all data in RX FIFO of SSP.

Status	Chip_SSP_Int_RWFrames8Bits (LPC_SSP_T pSSP, Chip_SSP_DATA_SETUP_T xf_setup)
	SSP Interrupt Read/Write with 8-bit frame width.

Status	Chip_SSP_Int_RWFrames16Bits (LPC_SSP_T pSSP, Chip_SSP_DATA_SETUP_T xf_setup)
	SSP Interrupt Read/Write with 16-bit frame width.

uint32_t	Chip_SSP_RWFrames_Blocking (LPC_SSP_T pSSP, Chip_SSP_DATA_SETUP_T xf_setup)
	SSP Polling Read/Write in blocking mode.

uint32_t	Chip_SSP_WriteFrames_Blocking (LPC_SSP_T pSSP, uint8_t buffer, uint32_t buffer_len)
	SSP Polling Write in blocking mode.

uint32_t	Chip_SSP_ReadFrames_Blocking (LPC_SSP_T pSSP, uint8_t buffer, uint32_t buffer_len)
	Note here.

void	Chip_SSP_Init (LPC_SSP_T *pSSP)
	Initialize the SSP.

void	Chip_SSP_DeInit (LPC_SSP_T *pSSP)
	Shutdown the SSP.

void	Chip_SSP_SetMaster (LPC_SSP_T *pSSP, bool master)
	Set the SSP operating modes, master or slave.

void	Chip_SSP_SetBitRate (LPC_SSP_T *pSSP, uint32_t bitRate)
	Set the clock frequency for SSP interface.

STATIC INLINE void	Chip_SSP_SetFormat (LPC_SSP_T pSSP, SSP_ConfigFormat format)
	Set up the SSP frame format.

STATIC INLINE void	Chip_SSP_Int_Enable (LPC_SSP_T *pSSP)
	Enable SSP interrupt.

STATIC INLINE void	Chip_SSP_Int_Disable (LPC_SSP_T *pSSP)
	Disable SSP interrupt.

Macro Definition Documentation

#define SSP_CPHA_FIRST SSP_CR0_CPHA_FIRST

SSP configuration parameter defines Clock phase control bit

Definition at line 124 of file ssp_18xx_43xx.h.

#define SSP_CPHA_SECOND SSP_CR0_CPHA_SECOND

Definition at line 125 of file ssp_18xx_43xx.h.

#define SSP_CPOL_HI SSP_CR0_CPOL_LO

Clock polarity control bit

Definition at line 134 of file ssp_18xx_43xx.h.

#define SSP_CPOL_LO SSP_CR0_CPOL_HI

Definition at line 135 of file ssp_18xx_43xx.h.

#define SSP_MASTER_MODE SSP_CR1_MASTER_EN

Definition at line 139 of file ssp_18xx_43xx.h.

#define SSP_SLAVE_MODE SSP_CR1_SLAVE_EN

SSP master mode enable

Definition at line 138 of file ssp_18xx_43xx.h.

Enumeration Type Documentation

enum CHIP_SSP_BITS_T

Enumerator:

SSP_BITS_4	4 bits/frame
SSP_BITS_5	5 bits/frame
SSP_BITS_6	6 bits/frame
SSP_BITS_7	7 bits/frame
SSP_BITS_8	8 bits/frame
SSP_BITS_9	9 bits/frame
SSP_BITS_10	10 bits/frame
SSP_BITS_11	11 bits/frame
SSP_BITS_12	12 bits/frame
SSP_BITS_13	13 bits/frame
SSP_BITS_14	14 bits/frame
SSP_BITS_15	15 bits/frame
SSP_BITS_16	16 bits/frame
SSP_BITS_4	4 bits/frame
SSP_BITS_5	5 bits/frame
SSP_BITS_6	6 bits/frame
SSP_BITS_7	7 bits/frame
SSP_BITS_8	8 bits/frame
SSP_BITS_9	9 bits/frame
SSP_BITS_10	10 bits/frame
SSP_BITS_11	11 bits/frame
SSP_BITS_12	12 bits/frame
SSP_BITS_13	13 bits/frame
SSP_BITS_14	14 bits/frame
SSP_BITS_15	15 bits/frame
SSP_BITS_16	16 bits/frame
SSP_BITS_4	4 bits/frame
SSP_BITS_5	5 bits/frame
SSP_BITS_6	6 bits/frame
SSP_BITS_7	7 bits/frame
SSP_BITS_8	8 bits/frame
SSP_BITS_9	9 bits/frame
SSP_BITS_10	10 bits/frame
SSP_BITS_11	11 bits/frame
SSP_BITS_12	12 bits/frame
SSP_BITS_13	13 bits/frame
SSP_BITS_14	14 bits/frame
SSP_BITS_15	15 bits/frame
SSP_BITS_16	16 bits/frame
SSP_BITS_4	4 bits/frame
SSP_BITS_5	5 bits/frame
SSP_BITS_6	6 bits/frame
SSP_BITS_7	7 bits/frame
SSP_BITS_8	8 bits/frame
SSP_BITS_9	9 bits/frame
SSP_BITS_10	10 bits/frame
SSP_BITS_11	11 bits/frame
SSP_BITS_12	12 bits/frame
SSP_BITS_13	13 bits/frame
SSP_BITS_14	14 bits/frame
SSP_BITS_15	15 bits/frame
SSP_BITS_16	16 bits/frame

Definition at line 70 of file ssp_18xx_43xx.h.

enum CHIP_SSP_CLOCK_MODE_T

Enumerator:

SSP_CLOCK_CPHA0_CPOL0	CPHA = 0, CPOL = 0
SSP_CLOCK_CPHA0_CPOL1	CPHA = 0, CPOL = 1
SSP_CLOCK_CPHA1_CPOL0	CPHA = 1, CPOL = 0
SSP_CLOCK_CPHA1_CPOL1	CPHA = 1, CPOL = 1
SSP_CLOCK_MODE0	alias
SSP_CLOCK_MODE1	alias
SSP_CLOCK_MODE2	alias
SSP_CLOCK_MODE3	alias
SSP_CLOCK_CPHA0_CPOL0	CPHA = 0, CPOL = 0
SSP_CLOCK_CPHA0_CPOL1	CPHA = 0, CPOL = 1
SSP_CLOCK_CPHA1_CPOL0	CPHA = 1, CPOL = 0
SSP_CLOCK_CPHA1_CPOL1	CPHA = 1, CPOL = 1
SSP_CLOCK_MODE0	alias
SSP_CLOCK_MODE1	alias
SSP_CLOCK_MODE2	alias
SSP_CLOCK_MODE3	alias
SSP_CLOCK_CPHA0_CPOL0	CPHA = 0, CPOL = 0
SSP_CLOCK_CPHA0_CPOL1	CPHA = 0, CPOL = 1
SSP_CLOCK_CPHA1_CPOL0	CPHA = 1, CPOL = 0
SSP_CLOCK_CPHA1_CPOL1	CPHA = 1, CPOL = 1
SSP_CLOCK_MODE0	alias
SSP_CLOCK_MODE1	alias
SSP_CLOCK_MODE2	alias
SSP_CLOCK_MODE3	alias
SSP_CLOCK_CPHA0_CPOL0	CPHA = 0, CPOL = 0
SSP_CLOCK_CPHA0_CPOL1	CPHA = 0, CPOL = 1
SSP_CLOCK_CPHA1_CPOL0	CPHA = 1, CPOL = 0
SSP_CLOCK_CPHA1_CPOL1	CPHA = 1, CPOL = 1
SSP_CLOCK_MODE0	alias
SSP_CLOCK_MODE1	alias
SSP_CLOCK_MODE2	alias
SSP_CLOCK_MODE3	alias

Definition at line 47 of file ssp_18xx_43xx.h.

enum CHIP_SSP_FRAME_FORMAT_T

Enumerator:

SSP_FRAMEFORMAT_SPI	Frame format: SPI
CHIP_SSP_FRAME_FORMAT_TI	Frame format: TI SSI
SSP_FRAMEFORMAT_MICROWIRE	Frame format: Microwire
SSP_FRAMEFORMAT_SPI	Frame format: SPI
CHIP_SSP_FRAME_FORMAT_TI	Frame format: TI SSI
SSP_FRAMEFORMAT_MICROWIRE	Frame format: Microwire
SSP_FRAMEFORMAT_SPI	Frame format: SPI
CHIP_SSP_FRAME_FORMAT_TI	Frame format: TI SSI
SSP_FRAMEFORMAT_MICROWIRE	Frame format: Microwire
SSP_FRAMEFORMAT_SPI	Frame format: SPI
CHIP_SSP_FRAME_FORMAT_TI	Frame format: TI SSI
SSP_FRAMEFORMAT_MICROWIRE	Frame format: Microwire

Definition at line 61 of file ssp_18xx_43xx.h.

enum CHIP_SSP_MODE_T

Enumerator:

SSP_MODE_MASTER	Master mode
SSP_MODE_SLAVE	Slave mode
SSP_MODE_MASTER	Master mode
SSP_MODE_SLAVE	Slave mode
SSP_MODE_MASTER	Master mode
SSP_MODE_SLAVE	Slave mode
SSP_MODE_MASTER	Master mode
SSP_MODE_SLAVE	Slave mode

Definition at line 98 of file ssp_18xx_43xx.h.

Function Documentation

void Chip_SSP_DeInit ( LPC_SSP_T * pSSP )

Shutdown the SSP.

Parameters

pSSP	: The base SSP peripheral on the chip

Returns: Nothing

Deinitialise the SSP.

Parameters

pSSP	: The base SSP peripheral on the chip

Returns: Nothing

Definition at line 430 of file ssp_11xx.c.

STATIC INLINE void Chip_SSP_Disable ( LPC_SSP_T * pSSP )

Disable SSP operation.

Parameters

pSSP	: The base of SSP peripheral on the chip

Returns: Nothing

Definition at line 172 of file ssp_18xx_43xx.h.

STATIC INLINE void Chip_SSP_DisableLoopBack ( LPC_SSP_T * pSSP )

Disable loopback mode.

Parameters

pSSP	: The base of SSP peripheral on the chip

Returns: Nothing

Note: Serial input is taken from the serial output (MOSI or MISO) rather than the serial input pin

Definition at line 216 of file ssp_18xx_43xx.h.

STATIC INLINE void Chip_SSP_DMA_Disable ( LPC_SSP_T * pSSP )

Disable SSP DMA.

Parameters

pSSP	: The base of SSP peripheral on the chip

Returns: Nothing

Definition at line 192 of file ssp_18xx_43xx.h.

STATIC INLINE void Chip_SSP_DMA_Enable ( LPC_SSP_T * pSSP )

Enable SSP DMA.

Parameters

pSSP	: The base of SSP peripheral on the chip

Returns: Nothing

Definition at line 182 of file ssp_18xx_43xx.h.

STATIC INLINE void Chip_SSP_Enable ( LPC_SSP_T * pSSP )

Enable SSP operation.

Parameters

pSSP	: The base of SSP peripheral on the chip

Returns: Nothing

Definition at line 162 of file ssp_18xx_43xx.h.

STATIC INLINE void Chip_SSP_EnableLoopBack ( LPC_SSP_T * pSSP )

Enable loopback mode.

Parameters

pSSP	: The base of SSP peripheral on the chip

Returns: Nothing

Note: Serial input is taken from the serial output (MOSI or MISO) rather than the serial input pin

Definition at line 204 of file ssp_18xx_43xx.h.

STATIC INLINE FlagStatus Chip_SSP_GetStatus	(	LPC_SSP_T *	pSSP,
		IP_SSP_STATUS_T	Stat
	)

Get the current status of SSP controller.

Parameters

pSSP	: The base of SSP peripheral on the chip
Stat	: Type of status, should be : SSP_STAT_TFE SSP_STAT_TNF SSP_STAT_RNE SSP_STAT_RFF SSP_STAT_BSY

Returns: SSP controller status, SET or RESET

Definition at line 152 of file ssp_18xx_43xx.h.

void Chip_SSP_Init ( LPC_SSP_T * pSSP )

Initialize the SSP.

Parameters

pSSP	: The base SSP peripheral on the chip

Returns: Nothing

Definition at line 408 of file ssp_11xx.c.

STATIC INLINE void Chip_SSP_Int_Disable ( LPC_SSP_T * pSSP )

Disable SSP interrupt.

Parameters

pSSP	: The base SSP peripheral on the chip

Returns: Nothing

Definition at line 339 of file ssp_18xx_43xx.h.

STATIC INLINE void Chip_SSP_Int_Enable ( LPC_SSP_T * pSSP )

Enable SSP interrupt.

Parameters

pSSP	: The base SSP peripheral on the chip

Returns: Nothing

Definition at line 329 of file ssp_18xx_43xx.h.

void Chip_SSP_Int_FlushData ( LPC_SSP_T * pSSP )

Clean all data in RX FIFO of SSP.

Parameters

pSSP	: The base SSP peripheral on the chip

Returns: Nothing

Definition at line 280 of file ssp_11xx.c.

Status Chip_SSP_Int_RWFrames16Bits	(	LPC_SSP_T *	pSSP,
		Chip_SSP_DATA_SETUP_T *	xf_setup
	)

SSP Interrupt Read/Write with 16-bit frame width.

Parameters

pSSP	: The base SSP peripheral on the chip
xf_setup	: Pointer to a SSP_DATA_SETUP_T structure that contains specified information about transmit/receive data configuration

Returns: SUCCESS or ERROR

Definition at line 328 of file ssp_11xx.c.

Status Chip_SSP_Int_RWFrames8Bits	(	LPC_SSP_T *	pSSP,
		Chip_SSP_DATA_SETUP_T *	xf_setup
	)

SSP Interrupt Read/Write with 8-bit frame width.

Parameters

pSSP	: The base SSP peripheral on the chip
xf_setup	: Pointer to a SSP_DATA_SETUP_T structure that contains specified information about transmit/receive data configuration

Returns: SUCCESS or ERROR

Definition at line 296 of file ssp_11xx.c.

uint32_t Chip_SSP_ReadFrames_Blocking	(	LPC_SSP_T *	pSSP,
		uint8_t *	buffer,
		uint32_t	buffer_len
	)

Note here.

Parameters

pSSP	: The base SSP peripheral on the chip
buffer	: Buffer address
buffer_len	: The length of buffer

Returns: Actual data length has been transferred

This function can be used in both master and slave mode. First, a dummy writing operation is generated to clear data buffer. After that, a reading operation will receive the needed data

SSP Polling Read in blocking mode.

Parameters

pSSP	: The base SSP peripheral on the chip
buffer	: Buffer address
buffer_len	: The length of buffer

Returns: Actual data length has been transferred

Note: This function can be used in both master and slave mode. First, a dummy writing operation is generated to clear data buffer. After that, a reading operation will receive the needed data

Definition at line 211 of file ssp_11xx.c.

uint32_t Chip_SSP_RWFrames_Blocking	(	LPC_SSP_T *	pSSP,
		Chip_SSP_DATA_SETUP_T *	xf_setup
	)

SSP Polling Read/Write in blocking mode.

Parameters

pSSP	: The base SSP peripheral on the chip
xf_setup	: Pointer to a SSP_DATA_SETUP_T structure that contains specified information about transmit/receive data configuration

Returns: Actual data length has been transferred

This function can be used in both master and slave mode. It starts with writing phase and after that, a reading phase is generated to read any data available in RX_FIFO. All needed information is prepared through xf_setup param.

Parameters

pSSP	: The base SSP peripheral on the chip
xf_setup	: Pointer to a SSP_DATA_SETUP_T structure that contains specified information about transmit/receive data configuration

Returns: Actual data length has been transferred

Note: This function can be used in both master and slave mode. It starts with writing phase and after that, a reading phase is generated to read any data available in RX_FIFO. All needed information is prepared through xf_setup param.

Definition at line 88 of file ssp_11xx.c.

void Chip_SSP_SetBitRate	(	LPC_SSP_T *	pSSP,
		uint32_t	bitRate
	)

Set the clock frequency for SSP interface.

Parameters

pSSP	: The base SSP peripheral on the chip
bitRate	: The SSP bit rate

Returns: Nothing

Definition at line 371 of file ssp_11xx.c.

STATIC INLINE void Chip_SSP_SetFormat	(	LPC_SSP_T *	pSSP,
		SSP_ConfigFormat *	format
	)

Set up the SSP frame format.

Parameters

pSSP	: The base SSP peripheral on the chip
format	: Structure used to format frame

Returns: Nothing

Definition at line 319 of file ssp_18xx_43xx.h.

void Chip_SSP_SetMaster	(	LPC_SSP_T *	pSSP,
		bool	master
	)

Set the SSP operating modes, master or slave.

Parameters

pSSP	: The base SSP peripheral on the chip
master	: 1 to set master, 0 to set slave

Returns: Nothing

Definition at line 360 of file ssp_11xx.c.

uint32_t Chip_SSP_WriteFrames_Blocking	(	LPC_SSP_T *	pSSP,
		uint8_t *	buffer,
		uint32_t	buffer_len
	)

SSP Polling Write in blocking mode.

Parameters

pSSP	: The base SSP peripheral on the chip
buffer	: Buffer address
buffer_len	: Buffer length

Returns: Actual data length has been transferred

This function can be used in both master and slave mode. First, a writing operation will send the needed data. After that, a dummy reading operation is generated to clear data buffer

Parameters

pSSP	: The base SSP peripheral on the chip
buffer	: Buffer address
buffer_len	: Buffer length

Returns: Actual data length has been transferred

Note: This function can be used in both master and slave mode. First, a writing operation will send the needed data. After that, a dummy reading operation is generated to clear data buffer

Definition at line 142 of file ssp_11xx.c.

Detailed Description

Data Structures

Macros

Enumerations

Functions

Macro Definition Documentation

Enumeration Type Documentation

Function Documentation