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LPCOpen Platform
v1.03
LPCOpen Platform for NXP LPC Microcontrollers
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Data Structures | |
| struct | SYSCTL_PLL_REGS_T |
| LPC17XX/40XX Clock and Power PLL register block structure. More... | |
| struct | LPC_SYSCTL_T |
| LPC11XX System Control block structure. More... | |
Macros | |
| #define | SYSCTL_RST_POR (1 << 0) |
| #define | SYSCTL_RST_EXTRST (1 << 1) |
| #define | SYSCTL_RST_WDT (1 << 2) |
| #define | SYSCTL_RST_BOD (1 << 3) |
| #define | SYSCTL_PD_SMFLAG (1 << 8) |
| #define | SYSCTL_PD_DSFLAG (1 << 9) |
| #define | SYSCTL_PD_PDFLAG (1 << 10) |
| #define | SYSCTL_PD_DPDFLAG (1 << 11) |
Functions | |
| STATIC INLINE void | Chip_SYSCTL_Map (CHIP_SYSCTL_BOOT_MODE_REMAP_T remap) |
| Re-map interrupt vectors. | |
| STATIC INLINE uint32_t | Chip_SYSCTL_GetSystemRSTStatus (void) |
| Get system reset status. | |
| STATIC INLINE void | Chip_SYSCTL_ClearSystemRSTStatus (uint32_t reset) |
| Clear system reset status. | |
| STATIC INLINE void | Chip_SYSCTL_EnableBOD (void) |
| Enable brown-out detection. | |
| STATIC INLINE void | Chip_SYSCTL_DisableBOD (void) |
| Disable brown-out detection. | |
| STATIC INLINE void | Chip_SYSCTL_EnableBODReset (void) |
| Enable brown-out detection reset. | |
| STATIC INLINE void | Chip_SYSCTL_DisableBODReset (void) |
| Disable brown-out detection reset. | |
| STATIC INLINE void | Chip_SYSCTL_EnableBODRPM (void) |
| Enable brown-out detection reduced power mode. | |
| STATIC INLINE void | Chip_SYSCTL_DisableBODRPM (void) |
| Disable brown-out detection reduced power mode. | |
| uint32_t | Chip_SYSCTL_GetClrSleepFlags (uint32_t flags) |
| Returns and clears the current sleep mode entry flags. | |
| STATIC INLINE void | Chip_SYSCTL_EnableBoost (void) |
| Enable power boost for clock operation over 100MHz. | |
| STATIC INLINE void | Chip_SYSCTL_DisableBoost (void) |
| Disable power boost for clock operation under 100MHz. | |
| void | Chip_SYSCTL_PeriphReset (CHIP_SYSCTL_RESET_T periph) |
| Resets a peripheral. | |
| #define SYSCTL_PD_DPDFLAG (1 << 11) |
Deep Power-down entry flag
Definition at line 236 of file sysctl_17xx_40xx.h.
| #define SYSCTL_PD_DSFLAG (1 << 9) |
Deep Sleep entry flag
Definition at line 234 of file sysctl_17xx_40xx.h.
| #define SYSCTL_PD_PDFLAG (1 << 10) |
Power-down entry flag
Definition at line 235 of file sysctl_17xx_40xx.h.
| #define SYSCTL_PD_SMFLAG (1 << 8) |
Sleep Mode entry flag
Definition at line 233 of file sysctl_17xx_40xx.h.
| #define SYSCTL_RST_BOD (1 << 3) |
Brown-out detect reset status
Definition at line 153 of file sysctl_17xx_40xx.h.
| #define SYSCTL_RST_EXTRST (1 << 1) |
External reset status
Definition at line 151 of file sysctl_17xx_40xx.h.
| #define SYSCTL_RST_POR (1 << 0) |
System reset statusPOR reset status
Definition at line 150 of file sysctl_17xx_40xx.h.
| #define SYSCTL_RST_WDT (1 << 2) |
Watchdog reset status
Definition at line 152 of file sysctl_17xx_40xx.h.
System memory remap modes used to remap interrupt vectors
Definition at line 132 of file sysctl_17xx_40xx.h.
| enum CHIP_SYSCTL_PLL_T |
Selectable PLLs
Definition at line 58 of file sysctl_17xx_40xx.h.
| enum CHIP_SYSCTL_RESET_T |
Peripheral reset numbers This is a list of peripherals that can be reset
| SYSCTL_RESET_LCD |
LCD reset |
| SYSCTL_RESET_TIMER0 |
Timer 0 reset |
| SYSCTL_RESET_TIMER1 |
Timer 1 reset |
| SYSCTL_RESET_UART0 |
UART 0 reset |
| SYSCTL_RESET_UART1 |
UART 1 reset |
| SYSCTL_RESET_PWM0 |
PWM0 reset |
| SYSCTL_RESET_PWM1 |
PWM1 reset |
| SYSCTL_RESET_I2C0 |
I2C0 reset |
| SYSCTL_RESET_UART4 |
UART 4 reset |
| SYSCTL_RESET_RTC |
RTC reset |
| SYSCTL_RESET_SSP1 |
SSP1 reset |
| SYSCTL_RESET_EMC |
EMC reset |
| SYSCTL_RESET_ADC |
ADC reset |
| SYSCTL_RESET_CAN1 |
CAN1 reset |
| SYSCTL_RESET_CAN2 |
CAN2 reset |
| SYSCTL_RESET_GPIO |
GPIO reset |
| SYSCTL_RESET_SPIFI |
SPIFI reset |
| SYSCTL_RESET_MCPWM |
MCPWM reset |
| SYSCTL_RESET_QEI |
QEI reset |
| SYSCTL_RESET_I2C1 |
I2C1 reset |
| SYSCTL_RESET_SSP2 |
SSP2 reset |
| SYSCTL_RESET_SSP0 |
SSP0 reset |
| SYSCTL_RESET_TIMER2 |
Timer 2 reset |
| SYSCTL_RESET_TIMER3 |
Timer 3 reset |
| SYSCTL_RESET_UART2 |
UART 2 reset |
| SYSCTL_RESET_UART3 |
UART 3 reset |
| SYSCTL_RESET_I2C2 |
I2C2 reset |
| SYSCTL_RESET_I2S |
I2S reset |
| SYSCTL_RESET_PCSDC |
SD Card interface reset |
| SYSCTL_RESET_GPDMA |
GP DMA reset |
| SYSCTL_RESET_ENET |
EMAC/Ethernet reset |
| SYSCTL_RESET_USB |
USB reset |
| SYSCTL_RESET_IOCON |
IOCON reset |
| SYSCTL_RESET_DAC |
DAC reset |
| SYSCTL_RESET_CANACC |
CAN acceptance filter reset |
Definition at line 273 of file sysctl_17xx_40xx.h.
Clear system reset status.
| reset | : An Or'ed value of SYSCTL_RST_* status to clear |
Definition at line 174 of file sysctl_17xx_40xx.h.
Disable brown-out detection reset.
Definition at line 210 of file sysctl_17xx_40xx.h.
Disable brown-out detection reduced power mode.
Definition at line 228 of file sysctl_17xx_40xx.h.
Disable power boost for clock operation under 100MHz.
Definition at line 261 of file sysctl_17xx_40xx.h.
Enable brown-out detection reduced power mode.
Definition at line 219 of file sysctl_17xx_40xx.h.
Enable power boost for clock operation over 100MHz.
Definition at line 252 of file sysctl_17xx_40xx.h.
Returns and clears the current sleep mode entry flags.
| flags,: | One or more flags to clear, SYSCTL_PD_* |
Definition at line 46 of file sysctl_17xx_40xx.c.
Get system reset status.
Definition at line 164 of file sysctl_17xx_40xx.h.
| STATIC INLINE void Chip_SYSCTL_Map | ( | CHIP_SYSCTL_BOOT_MODE_REMAP_T | remap | ) |
Re-map interrupt vectors.
| remap | : system memory map value |
Definition at line 142 of file sysctl_17xx_40xx.h.
| void Chip_SYSCTL_PeriphReset | ( | CHIP_SYSCTL_RESET_T | periph | ) |
Resets a peripheral.
| periph,: | Peripheral to reset |
Definition at line 57 of file sysctl_17xx_40xx.c.