sct_8xx.h

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/*
 * @brief LPC8xx State Configurable Timer (SCT) Chip driver
 *
 * @note
 * Copyright(C) NXP Semiconductors, 2012
 * All rights reserved.
 *
 * @par
 * Software that is described herein is for illustrative purposes only
 * which provides customers with programming information regarding the
 * LPC products.  This software is supplied "AS IS" without any warranties of
 * any kind, and NXP Semiconductors and its licenser disclaim any and
 * all warranties, express or implied, including all implied warranties of
 * merchantability, fitness for a particular purpose and non-infringement of
 * intellectual property rights.  NXP Semiconductors assumes no responsibility
 * or liability for the use of the software, conveys no license or rights under any
 * patent, copyright, mask work right, or any other intellectual property rights in
 * or to any products. NXP Semiconductors reserves the right to make changes
 * in the software without notification. NXP Semiconductors also makes no
 * representation or warranty that such application will be suitable for the
 * specified use without further testing or modification.
 *
 * @par
 * Permission to use, copy, modify, and distribute this software and its
 * documentation is hereby granted, under NXP Semiconductors' and its
 * licensor's relevant copyrights in the software, without fee, provided that it
 * is used in conjunction with NXP Semiconductors microcontrollers.  This
 * copyright, permission, and disclaimer notice must appear in all copies of
 * this code.
 */

#ifndef __SCT_8XX_H_
#define __SCT_8XX_H_

#ifdef __cplusplus
extern "C" {
#endif

typedef enum CHIP_SCT_MATCH_REG {
 SCT_MATCH_0 = 0, 
 SCT_MATCH_1 = 1, 
 SCT_MATCH_2 = 2, 
 SCT_MATCH_3 = 3, 
 SCT_MATCH_4 = 4  
} CHIP_SCT_MATCH_REG_T;

typedef enum CHIP_SCT_EVENT {
 SCT_EVT_0  = (1 << 0), 
 SCT_EVT_1  = (1 << 1), 
 SCT_EVT_2  = (1 << 2), 
 SCT_EVT_3  = (1 << 3), 
 SCT_EVT_4  = (1 << 4) 
} CHIP_SCT_EVENT_T;

STATIC INLINE void Chip_SCT_Config(LPC_SCT_T *pSCT, uint32_t value)
{
 IP_SCT_Config(pSCT, value);
}

STATIC INLINE void Chip_SCT_SetCount(LPC_SCT_T *pSCT, uint32_t count)
{
 IP_SCT_SetCount(pSCT, count);
}

STATIC INLINE void Chip_SCT_SetCountL(LPC_SCT_T *pSCT, uint16_t count)
{
 IP_SCT_SetCountL(pSCT, count);
}

STATIC INLINE void Chip_SCT_SetCountH(LPC_SCT_T *pSCT, uint16_t count)
{
 IP_SCT_SetCountH(pSCT, count);
}

STATIC INLINE void Chip_SCT_SetMatchCount(LPC_SCT_T *pSCT, CHIP_SCT_MATCH_REG_T n, uint32_t value)
{
 IP_SCT_SetMatchCount(pSCT, (uint32_t) n, value);
}

STATIC INLINE void Chip_SCT_SetMatchReload(LPC_SCT_T *pSCT, CHIP_SCT_MATCH_REG_T n, uint32_t value)
{
 IP_SCT_SetMatchReload(pSCT, (uint32_t) n, value);
}

STATIC INLINE void Chip_SCT_EventIntEnable(LPC_SCT_T *pSCT, CHIP_SCT_EVENT_T evt)
{
 IP_SCT_EventIntEnable(pSCT, (uint32_t) evt);
}

STATIC INLINE void Chip_SCT_EventIntDisable(LPC_SCT_T *pSCT, CHIP_SCT_EVENT_T evt)
{
 IP_SCT_EventIntDisable(pSCT, (uint32_t) evt);
}

STATIC INLINE void Chip_SCT_ClearEventFlag(LPC_SCT_T *pSCT, CHIP_SCT_EVENT_T evt)
{
 IP_SCT_ClearEventFlag(pSCT, (uint32_t) evt);
}

void Chip_SCT_Init(LPC_SCT_T *pSCT);

void Chip_SCT_DeInit(LPC_SCT_T *pSCT);

#ifdef __cplusplus
}

#endif

#endif /* __SCT_8XX_H_ */