scu_18xx_43xx.h

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/*
 * Copyright(C) NXP Semiconductors, 2012
 * All rights reserved.
 *
 * Software that is described herein is for illustrative purposes only
 * which provides customers with programming information regarding the
 * LPC products.  This software is supplied "AS IS" without any warranties of
 * any kind, and NXP Semiconductors and its licensor disclaim any and
 * all warranties, express or implied, including all implied warranties of
 * merchantability, fitness for a particular purpose and non-infringement of
 * intellectual property rights.  NXP Semiconductors assumes no responsibility
 * or liability for the use of the software, conveys no license or rights under any
 * patent, copyright, mask work right, or any other intellectual property rights in
 * or to any products. NXP Semiconductors reserves the right to make changes
 * in the software without notification. NXP Semiconductors also makes no
 * representation or warranty that such application will be suitable for the
 * specified use without further testing or modification.
 *
 * Permission to use, copy, modify, and distribute this software and its
 * documentation is hereby granted, under NXP Semiconductors' and its
 * licensor's relevant copyrights in the software, without fee, provided that it
 * is used in conjunction with NXP Semiconductors microcontrollers.  This
 * copyright, permission, and disclaimer notice must appear in all copies of
 * this code.
 */

#ifndef __SCU_18XX_43XX_H_
#define __SCU_18XX_43XX_H_

#ifdef __cplusplus
extern "C" {
#endif

typedef struct {
 __IO uint32_t  SFSP[16][32];
 __I  uint32_t  RESERVED0[256];
 __IO uint32_t  SFSCLK[4];   
 __I  uint32_t  RESERVED16[28];
 __IO uint32_t  SFSUSB;    
 __IO uint32_t  SFSI2C0;    
 __IO uint32_t  ENAIO[3];   
 __I  uint32_t  RESERVED17[27];
 __IO uint32_t  EMCDELAYCLK;   
 __I  uint32_t  RESERVED18[63];
 __IO uint32_t  PINTSEL0;   
 __IO uint32_t  PINTSEL1;   
} LPC_SCU_T;

#define SCU_MODE_MODE_INACT        (0x0 << 3)  
#define SCU_MODE_MODE_PULLDOWN     (0x1 << 3)  
#define SCU_MODE_MODE_PULLUP       (0x2 << 3)  
#define SCU_MODE_MODE_REPEATER     (0x3 << 3)  
#define SCU_MODE_HIGHSPEEDSLEW_EN  (0x1 << 5)  
#define SCU_MODE_INBUFF_EN         (0x1 << 6)  
#define SCU_MODE_ZIF_DIS           (0x1 << 7)  
#define SCU_MODE_4MA_DRIVESTR      (0x0 << 8)  
#define SCU_MODE_8MA_DRIVESTR      (0x1 << 8)  
#define SCU_MODE_14MA_DRIVESTR     (0x2 << 8)  
#define SCU_MODE_20MA_DRIVESTR     (0x3 << 8)  
#define SCU_MODE_FUNC0             0x0    
#define SCU_MODE_FUNC1             0x1    
#define SCU_MODE_FUNC2             0x2    
#define SCU_MODE_FUNC3             0x3    
#define SCU_MODE_FUNC4             0x4    
#define SCU_MODE_FUNC5             0x5    
#define SCU_MODE_FUNC6             0x6    
#define SCU_MODE_FUNC7             0x7    
#define SCU_PINIO_FAST             (SCU_MODE_MODE_PULLUP | SCU_MODE_HIGHSPEEDSLEW_EN | SCU_MODE_INBUFF_EN | SCU_MODE_ZIF_DIS)

#define MD_PUP      (0x0 << 3)  
#define MD_BUK      (0x1 << 3)  
#define MD_PLN      (0x2 << 3)  
#define MD_PDN      (0x3 << 3)  
#define MD_EHS      (0x1 << 5)  
#define MD_EZI      (0x1 << 6)  
#define MD_ZI      (0x1 << 7)  
#define MD_EHD0      (0x1 << 8)  
#define MD_EHD1      (0x1 << 8)  
#define MD_PLN_FAST     (MD_PLN | MD_EZI | MD_ZI | MD_EHS)
#define I2C0_STANDARD_FAST_MODE  (1 << 3 | 1 << 11) 
#define I2C0_FAST_MODE_PLUS   (2 << 1 | 1 << 3 | 1 << 7 | 1 << 10 | 1 << 11) 
#define FUNC0      0x0    
#define FUNC1      0x1    
#define FUNC2      0x2    
#define FUNC3      0x3    
#define FUNC4      0x4    
#define FUNC5      0x5    
#define FUNC6      0x6    
#define FUNC7      0x7    
#define PORT_OFFSET     0x80   
#define PIN_OFFSET     0x04   
#define LPC_SCU_PIN(LPC_SCU_BASE, po, pi) (*(volatile int *) ((LPC_SCU_BASE) + ((po) * 0x80) + ((pi) * 0x4))

#define LPC_SCU_CLK(LPC_SCU_BASE, c) (*(volatile int *) ((LPC_SCU_BASE) +0xC00 + ((c) * 0x4)))

STATIC INLINE void Chip_SCU_PinMuxSet(uint8_t port, uint8_t pin, uint16_t modefunc)
{
 LPC_SCU->SFSP[port][pin] = modefunc;
}

STATIC INLINE void Chip_SCU_PinMux(uint8_t port, uint8_t pin, uint16_t mode, uint8_t func)
{
 Chip_SCU_PinMuxSet(port, pin, (mode | (uint16_t) func));
}

STATIC INLINE void Chip_SCU_ClockPinMuxSet(uint8_t clknum, uint16_t modefunc)
{
 LPC_SCU->SFSCLK[clknum] = (uint32_t) modefunc;
}

STATIC INLINE void Chip_SCU_ClockPinMux(uint8_t clknum, uint16_t mode, uint8_t func)
{
 LPC_SCU->SFSCLK[clknum] = ((uint32_t) mode | (uint32_t) func);
}

void Chip_SCU_GPIOIntPinSel(uint8_t PortSel, uint8_t PortNum, uint8_t PinNum);

STATIC INLINE void Chip_SCU_I2C0PinConfig(uint32_t I2C0Mode)
{
 LPC_SCU->SFSI2C0 = I2C0Mode;
}

STATIC INLINE void Chip_SCU_ADC_Channel_Config(uint32_t ADC_ID, uint8_t channel)
{
 LPC_SCU->ENAIO[ADC_ID] |= 1UL << channel;
}

STATIC INLINE void Chip_SCU_DAC_Analog_Config(void)
{
 /*Enable analog function DAC on pin P4_4*/
 LPC_SCU->ENAIO[2] |= 1;
}

#ifdef __cplusplus
}
#endif

#endif /* __SCU_18XX_43XX_H_ */