usart_001.h

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/*
 * @brief UART/USART Registers and control functions
 *
 * @note
 * Copyright(C) NXP Semiconductors, 2012
 * All rights reserved.
 *
 * @par
 * Software that is described herein is for illustrative purposes only
 * which provides customers with programming information regarding the
 * LPC products.  This software is supplied "AS IS" without any warranties of
 * any kind, and NXP Semiconductors and its licensor disclaim any and
 * all warranties, express or implied, including all implied warranties of
 * merchantability, fitness for a particular purpose and non-infringement of
 * intellectual property rights.  NXP Semiconductors assumes no responsibility
 * or liability for the use of the software, conveys no license or rights under any
 * patent, copyright, mask work right, or any other intellectual property rights in
 * or to any products. NXP Semiconductors reserves the right to make changes
 * in the software without notification. NXP Semiconductors also makes no
 * representation or warranty that such application will be suitable for the
 * specified use without further testing or modification.
 *
 * @par
 * Permission to use, copy, modify, and distribute this software and its
 * documentation is hereby granted, under NXP Semiconductors' and its
 * licensor's relevant copyrights in the software, without fee, provided that it
 * is used in conjunction with NXP Semiconductors microcontrollers.  This
 * copyright, permission, and disclaimer notice must appear in all copies of
 * this code.
 */

#ifndef __USART_001_H_
#define __USART_001_H_

#include "sys_config.h"
#include "cmsis.h"

#ifdef __cplusplus
extern "C" {
#endif

typedef struct {       
 union {
  __IO uint32_t  DLL;     
  __O  uint32_t  THR;     
  __I  uint32_t  RBR;     
 };

 union {
  __IO uint32_t IER;     
  __IO uint32_t DLM;     
 };

 union {
  __O  uint32_t FCR;     
  __I  uint32_t IIR;     
 };

 __IO uint32_t LCR;      
 __IO uint32_t MCR;      
 __I  uint32_t LSR;      
 __I  uint32_t MSR;      
 __IO uint32_t SCR;      
 __IO uint32_t ACR;      
 __IO uint32_t ICR;      
 __IO uint32_t FDR;      
 __IO uint32_t OSR;      
 __IO uint32_t TER1;      
 uint32_t  RESERVED0[3];
 __IO uint32_t HDEN;      
 __I  uint32_t RESERVED1[1];
 __IO uint32_t SCICTRL;     
 __IO uint32_t RS485CTRL;    
 __IO uint32_t RS485ADRMATCH;   
 __IO uint32_t RS485DLY;     
 union {
  __IO uint32_t SYNCCTRL;    
  __I  uint32_t FIFOLVL;    
 };

#if !defined CHIP_LPC11XX
 __IO uint32_t TER2;      
#endif
} IP_USART_001_T;

#define UART_BLOCKING_TIMEOUT           (0xFFFFFFFFUL) 
#define UART_ACCEPTED_BAUDRATE_ERROR    (3)    
/* --------------------- BIT DEFINITIONS -------------------------------------- */

#define UART_RBR_MASKBIT    ((uint8_t) 0xFF)  
#define UART_THR_MASKBIT    ((uint8_t) 0xFF)  
#define UART_LOAD_DLL(div)  ((div) & 0xFF)   
#define UART_DLL_MASKBIT    ((uint8_t) 0xFF)  
#define UART_DLM_MASKBIT    ((uint8_t) 0xFF)  
#define UART_LOAD_DLM(div)  (((div) >> 8) & 0xFF) 
#define UART_IER_RBRINT_EN      ((uint32_t) (1 << 0)) 
#define UART_IER_THREINT_EN     ((uint32_t) (1 << 1)) 
#define UART_IER_RLSINT_EN      ((uint32_t) (1 << 2)) 
#define UART_IER_MSINT_EN       ((uint32_t) (1 << 3)) 
#define UART_IER_CTSINT_EN      ((uint32_t) (1 << 7)) 
#define UART_IER_ABEOINT_EN     ((uint32_t) (1 << 8)) 
#define UART_IER_ABTOINT_EN     ((uint32_t) (1 << 9)) 
#define UART_IER_BITMASK        ((uint32_t) (0x307)) 
#define UART1_IER_BITMASK       ((uint32_t) (0x38F)) 
#define UART_IIR_INTSTAT_PEND   ((uint32_t) (1 << 0)) 
#define UART_IIR_INTID_RLS      ((uint32_t) (3 << 1)) 
#define UART_IIR_INTID_RDA      ((uint32_t) (2 << 1)) 
#define UART_IIR_INTID_CTI      ((uint32_t) (6 << 1)) 
#define UART_IIR_INTID_THRE     ((uint32_t) (1 << 1)) 
#define UART_IIR_INTID_MODEM    ((uint32_t) (0 << 1)) 
#define UART_IIR_INTID_MASK     ((uint32_t) (7 << 1)) 
#define UART_IIR_FIFO_EN        ((uint32_t) (3 << 6)) 
#define UART_IIR_ABEO_INT       ((uint32_t) (1 << 8)) 
#define UART_IIR_ABTO_INT       ((uint32_t) (1 << 9)) 
#define UART_IIR_BITMASK        ((uint32_t) (0x3CF)) 
#define UART_FCR_FIFO_EN        ((uint8_t) (1 << 0)) 
#define UART_FCR_RX_RS          ((uint8_t) (1 << 1)) 
#define UART_FCR_TX_RS          ((uint8_t) (1 << 2)) 
#define UART_FCR_DMAMODE_SEL    ((uint8_t) (1 << 3)) 
#define UART_FCR_TRG_LEV0       ((uint8_t) (0))   
#define UART_FCR_TRG_LEV1       ((uint8_t) (1 << 6)) 
#define UART_FCR_TRG_LEV2       ((uint8_t) (2 << 6)) 
#define UART_FCR_TRG_LEV3       ((uint8_t) (3 << 6)) 
#define UART_FCR_BITMASK        ((uint8_t) (0xCF))  
#define UART_TX_FIFO_SIZE       (16)

#define UART_LCR_WLEN5          ((uint8_t) (0))    
#define UART_LCR_WLEN6          ((uint8_t) (1 << 0))  
#define UART_LCR_WLEN7          ((uint8_t) (2 << 0))  
#define UART_LCR_WLEN8          ((uint8_t) (3 << 0))  
#define UART_LCR_SBS_1BIT       ((uint8_t) (0 << 2))  
#define UART_LCR_SBS_2BIT       ((uint8_t) (1 << 2))  
#define UART_LCR_PARITY_EN      ((uint8_t) (1 << 3))  
#define UART_LCR_PARITY_DIS     ((uint8_t) (0 << 3))  
#define UART_LCR_PARITY_ODD     ((uint8_t) (0))    
#define UART_LCR_PARITY_EVEN    ((uint8_t) (1 << 4))  
#define UART_LCR_PARITY_F_1     ((uint8_t) (2 << 4))  
#define UART_LCR_PARITY_F_0     ((uint8_t) (3 << 4))  
#define UART_LCR_BREAK_EN       ((uint8_t) (1 << 6))  
#define UART_LCR_DLAB_EN        ((uint8_t) (1 << 7))  
#define UART_LCR_BITMASK        ((uint8_t) (0xFF))   
#define UART_MCR_DTR_CTRL       ((uint8_t) (1 << 0))  
#define UART_MCR_RTS_CTRL       ((uint8_t) (1 << 1))  
#define UART_MCR_LOOPB_EN       ((uint8_t) (1 << 4))  
#define UART_MCR_AUTO_RTS_EN    ((uint8_t) (1 << 6))  
#define UART_MCR_AUTO_CTS_EN    ((uint8_t) (1 << 7))  
#define UART_MCR_BITMASK        ((uint8_t) (0x0F3))   
#define UART_LSR_RDR        ((uint8_t) (1 << 0)) 
#define UART_LSR_OE         ((uint8_t) (1 << 1)) 
#define UART_LSR_PE         ((uint8_t) (1 << 2)) 
#define UART_LSR_FE         ((uint8_t) (1 << 3)) 
#define UART_LSR_BI         ((uint8_t) (1 << 4)) 
#define UART_LSR_THRE       ((uint8_t) (1 << 5)) 
#define UART_LSR_TEMT       ((uint8_t) (1 << 6)) 
#define UART_LSR_RXFE       ((uint8_t) (1 << 7)) 
#define UART_LSR_BITMASK    ((uint8_t) (0xFF))  
#define UART_MSR_DELTA_CTS      ((uint8_t) (1 << 0)) 
#define UART_MSR_DELTA_DSR      ((uint8_t) (1 << 1)) 
#define UART_MSR_LO2HI_RI       ((uint8_t) (1 << 2)) 
#define UART_MSR_DELTA_DCD      ((uint8_t) (1 << 3)) 
#define UART_MSR_CTS            ((uint8_t) (1 << 4)) 
#define UART_MSR_DSR            ((uint8_t) (1 << 5)) 
#define UART_MSR_RI             ((uint8_t) (1 << 6)) 
#define UART_MSR_DCD            ((uint8_t) (1 << 7)) 
#define UART_MSR_BITMASK        ((uint8_t) (0xFF))  
#define UART_SCR_BIMASK     ((uint8_t) (0xFF))   
#define UART_ACR_START              ((uint32_t) (1 << 0)) 
#define UART_ACR_MODE               ((uint32_t) (1 << 1)) 
#define UART_ACR_AUTO_RESTART       ((uint32_t) (1 << 2)) 
#define UART_ACR_ABEOINT_CLR        ((uint32_t) (1 << 8)) 
#define UART_ACR_ABTOINT_CLR        ((uint32_t) (1 << 9)) 
#define UART_ACR_BITMASK            ((uint32_t) (0x307)) 
#define UART_ICR_IRDAEN         ((uint32_t) (1 << 0))   
#define UART_ICR_IRDAINV        ((uint32_t) (1 << 1))   
#define UART_ICR_FIXPULSE_EN    ((uint32_t) (1 << 2))   
#define UART_ICR_PULSEDIV(n)    ((uint32_t) ((n & 0x07) << 3)) 
#define UART_ICR_BITMASK        ((uint32_t) (0x3F))    
#define UART_HDEN_HDEN          ((uint32_t) (1 << 0))   
#define UART_SCICTRL_SCIEN      ((uint32_t) (1 << 0))    
#define UART_SCICTRL_NACKDIS    ((uint32_t) (1 << 1))    
#define UART_SCICTRL_PROTSEL_T1 ((uint32_t) (1 << 2))    
#define UART_SCICTRL_TXRETRY(n) ((uint32_t) ((n & 0x07) << 5))  
#define UART_SCICTRL_GUARDTIME(n)   ((uint32_t) ((n & 0xFF) << 8)) 
#define UART_SYNCCTRL_SYNC      ((uint32_t) (1 << 0))   
#define UART_SYNCCTRL_CSRC_MASTER   ((uint32_t) (1 << 1))  
#define UART_SYNCCTRL_FES       ((uint32_t) (1 << 2))   
#define UART_SYNCCTRL_TSBYPASS  ((uint32_t) (1 << 3))   
#define UART_SYNCCTRL_CSCEN     ((uint32_t) (1 << 4))   
#define UART_SYNCCTRL_STARTSTOPDISABLE  ((uint32_t) (1 << 5)) 
#define UART_SYNCCTRL_CCCLR     ((uint32_t) (1 << 6))   
#define UART_FDR_DIVADDVAL(n)   ((uint32_t) (n & 0x0F))   
#define UART_FDR_MULVAL(n)      ((uint32_t) ((n << 4) & 0xF0)) 
#define UART_FDR_BITMASK        ((uint32_t) (0xFF))    
#define UART_TER1_TXEN          ((uint8_t) (1 << 7))  
#define UART_TER1_BITMASK       ((uint8_t) (0x80))   
#define UART_TER2_TXEN      ((uint8_t) (1 << 0))   
#define UART_TER2_BITMASK   ((uint8_t) (0x01))    
#define UART_RS485CTRL_NMM_EN       ((uint32_t) (1 << 0)) 
#define UART_RS485CTRL_RX_DIS       ((uint32_t) (1 << 1)) 
#define UART_RS485CTRL_AADEN        ((uint32_t) (1 << 2)) 
#define UART_RS485CTRL_SEL_DTR      ((uint32_t) (1 << 3)) 
#define UART_RS485CTRL_DCTRL_EN ((uint32_t) (1 << 4))  
#define UART_RS485CTRL_OINV_1       ((uint32_t) (1 << 5)) 
#define UART_RS485CTRL_BITMASK      ((uint32_t) (0x3F))  
#define UART_RS485ADRMATCH_BITMASK ((uint8_t) (0xFF))  
#define UART_RS485DLY_BITMASK       ((uint8_t) (0xFF))  
#define UART_FIFOLVL_RXFIFOLVL(n)   ((uint32_t) (n & 0x0F))   
#define UART_FIFOLVL_TXFIFOLVL(n)   ((uint32_t) ((n >> 8) & 0x0F)) 
#define UART_FIFOLVL_BITMASK        ((uint32_t) (0x0F0F))   
#define UART_RING_BUFSIZE 256               
#define __BUF_MASK (UART_RING_BUFSIZE - 1)            
#define __BUF_IS_FULL(head, tail) ((tail & __BUF_MASK) == ((head + 1) & __BUF_MASK)) 
#define __BUF_WILL_FULL(head, tail) ((tail & __BUF_MASK) == ((head + 2) & __BUF_MASK)) 
#define __BUF_IS_EMPTY(head, tail) ((head & __BUF_MASK) == (tail & __BUF_MASK))   
#define __BUF_RESET(bufidx) (bufidx = 0)            
#define __BUF_INCR(bufidx)  (bufidx = (bufidx + 1) & __BUF_MASK)      
typedef struct {
 __IO uint32_t tx_head;     
 __IO uint32_t tx_tail;     
 __IO uint32_t rx_head;     
 __IO uint32_t rx_tail;     
 __IO uint8_t  tx[UART_RING_BUFSIZE]; 
 __IO uint8_t  rx[UART_RING_BUFSIZE]; 
} UART_RingBuffer_T;

typedef enum IP_UART_LS {
 UART_LINESTAT_RDR   = UART_LSR_RDR,   
 UART_LINESTAT_OE    = UART_LSR_OE,   
 UART_LINESTAT_PE    = UART_LSR_PE,   
 UART_LINESTAT_FE    = UART_LSR_FE,   
 UART_LINESTAT_BI    = UART_LSR_BI,   
 UART_LINESTAT_THRE  = UART_LSR_THRE,  
 UART_LINESTAT_TEMT  = UART_LSR_TEMT,  
 UART_LINESTAT_RXFE  = UART_LSR_RXFE   
} IP_UART_LS_T;

typedef enum IP_UART_SIGNAL_STATE {
 INACTIVE = 0,   
 ACTIVE = !INACTIVE  
} IP_UART_SIGNAL_STATE_T;

typedef enum IP_UART_MODEM_STAT {
 UART_MODEM_STAT_DELTA_CTS   = UART_MSR_DELTA_CTS,  
 UART_MODEM_STAT_DELTA_DSR   = UART_MSR_DELTA_DSR,  
 UART_MODEM_STAT_LO2HI_RI    = UART_MSR_LO2HI_RI,  
 UART_MODEM_STAT_DELTA_DCD   = UART_MSR_DELTA_DCD,  
 UART_MODEM_STAT_CTS         = UART_MSR_CTS,    
 UART_MODEM_STAT_DSR         = UART_MSR_DSR,    
 UART_MODEM_STAT_RI          = UART_MSR_RI,    
 UART_MODEM_STAT_DCD         = UART_MSR_DCD    
} IP_UART_MODEM_STAT_T;

typedef enum IP_UART_MODEM_PIN {
 UART_MODEM_PIN_DTR          = 0,  
 UART_MODEM_PIN_RTS      
} IP_UART_MODEM_PIN_T;

typedef enum IP_UART_MODEM_MODE {
 UART_MODEM_MODE_LOOPBACK    = 0,  
 UART_MODEM_MODE_AUTO_RTS,    
 UART_MODEM_MODE_AUTO_CTS    
} IP_UART_MODEM_MODE_T;

typedef enum IP_UART_INT {
 UART_INTCFG_RBR = 0, 
 UART_INTCFG_THRE,  
 UART_INTCFG_RLS,  
 UART_INTCFG_MS,   
 UART_INTCFG_CTS,  
 UART_INTCFG_ABEO,  
 UART_INTCFG_ABTO  
} IP_UART_INT_T;

typedef enum IP_UART_PARITY {
 UART_PARITY_NONE = 0,         
 UART_PARITY_ODD = (4 << 3),        
 UART_PARITY_EVEN = (5 << 3),       
 UART_PARITY_SP_1 = (6 << 3),       
 UART_PARITY_SP_0 = (7 << 3)        
} IP_UART_PARITY_T;

typedef enum IP_UART_FITO_LEVEL {
 UART_FIFO_TRGLEV0 = 0, 
 UART_FIFO_TRGLEV1,  
 UART_FIFO_TRGLEV2,  
 UART_FIFO_TRGLEV3  
} IP_UART_FITO_LEVEL_T;

typedef enum IP_UART_STOPBIT {
 UART_STOPBIT_1 = 0,       
 UART_STOPBIT_2 = (1 << 2)     
} IP_UART_STOPBIT_T;

typedef enum IP_UART_DATABIT {
 UART_DATABIT_5      = 0,   
 UART_DATABIT_6,      
 UART_DATABIT_7,      
 UART_DATABIT_8      
} IP_UART_DATABIT_T;

typedef enum IP_UART_ID {
 UART_0 = 0,
 UART_1,
 UART_2,
 UART_3,
 UART_4,
} IP_UART_ID_T;

typedef enum IP_UART_INT_STATUS {
 UART_INTSTS_ERROR = 1 << 0,    
 UART_INTSTS_RTS = 1 << 1,    
 UART_INTSTS_RTR = 1 << 2,    
 UART_INTSTS_ABEO = UART_IIR_ABEO_INT, 
 UART_INTSTS_ABTO = UART_IIR_ABTO_INT 
} IP_UART_INT_STATUS_T;

typedef enum IP_UART_AB_MODE {
 UART_AUTOBAUD_MODE0 = 0,   
 UART_AUTOBAUD_MODE1,    
} IP_UART_AB_MODE_T;

typedef struct {
 IP_UART_AB_MODE_T   ABMode;   
 FunctionalState     AutoRestart; 
} UART_AB_CFG_T;

typedef struct {
 FunctionalState FIFO_ResetRxBuf; 
 FunctionalState FIFO_ResetTxBuf; 
 FunctionalState FIFO_DMAMode;  
 IP_UART_FITO_LEVEL_T FIFO_Level; 
} UART_FIFO_CFG_T;

void IP_UART_Init(IP_USART_001_T *pUART, IP_UART_ID_T UARTPort);

void IP_UART_DeInit(IP_USART_001_T *pUART, IP_UART_ID_T UARTPort);

Status IP_UART_SetBaud(IP_USART_001_T *pUART, uint32_t baudrate, uint32_t uClk);

void IP_UART_ConfigData(IP_USART_001_T *pUART,
      IP_UART_DATABIT_T Databits,
      IP_UART_PARITY_T Parity,
      IP_UART_STOPBIT_T Stopbits);

/* UART Send/Receive functions -------------------------------------------------*/
Status IP_UART_SendByte(IP_USART_001_T *pUART, uint8_t data);

Status IP_UART_ReceiveByte(IP_USART_001_T *pUART, uint8_t *Data);

uint32_t IP_UART_Send(IP_USART_001_T *pUART, uint8_t *txbuf, uint32_t buflen, TRANSFER_BLOCK_T flag);

uint32_t IP_UART_Receive(IP_USART_001_T *pUART, uint8_t *rxbuf, uint32_t buflen, TRANSFER_BLOCK_T flag);

/* UART operate functions -------------------------------------------------------*/
void IP_UART_IntConfig(IP_USART_001_T *pUART, IP_UART_INT_T UARTIntCfg, FunctionalState NewState);

uint32_t IP_UART_IntGetStatus(IP_USART_001_T *pUART);

void IP_UART_ForceBreak(IP_USART_001_T *pUART);

uint8_t IP_UART_GetLineStatus(IP_USART_001_T *pUART);

FlagStatus IP_UART_CheckBusy(IP_USART_001_T *pUART);

void IP_UART_TxCmd(IP_USART_001_T *pUART, IP_UART_ID_T UARTPort, FunctionalState NewState);

/* UART FIFO functions ----------------------------------------------------------*/
void IP_UART_FIFOConfig(IP_USART_001_T *pUART, UART_FIFO_CFG_T *FIFOCfg);

void IP_UART_FIFOConfigStructInit(UART_FIFO_CFG_T *UART_FIFOInitStruct);

void IP_UART_ABCmd(IP_USART_001_T *pUART, UART_AB_CFG_T *ABConfigStruct, FunctionalState NewState);

void IP_UART_ABClearIntPending(IP_USART_001_T *pUART, IP_UART_INT_STATUS_T ABIntType);

#ifdef __cplusplus
}
#endif

#endif /* __USART_001_H_ */