(ExpressProject "PuckAdapterCable"
  (ProjectVersion "19981106")
  (ProjectType "PCB")
  (Folder "Design Resources"
    (Folder "Library"
      (File "C:\Cadence\PSD_14.2\tools\capture\LIBRARY\Connector.olb"
        (Type "Schematic Library"))
      (File "C:\Cadence\PSD_14.2\tools\capture\LIBRARY\ElectroMechanical.olb"
        (Type "Schematic Library"))
      (File "C:\Cadence\PSD_14.2\tools\capture\LIBRARY\Mechanical.olb"
        (Type "Schematic Library"))
      (File "C:\Cadence\PSD_14.2\tools\capture\LIBRARY\Misc.olb"
        (Type "Schematic Library"))
      (File "C:\Cadence\PSD_14.2\tools\capture\LIBRARY\Misc2.olb"
        (Type "Schematic Library"))
      (File "C:\Cadence\PSD_14.2\tools\capture\LIBRARY\Misc3.olb"
        (Type "Schematic Library")))
    (NoModify)
    (File ".\puckadaptercable.dsn"
      (Type "Schematic Design"))
    (BuildFileAddedOrDeleted "x")
    (CompileFileAddedOrDeleted "x")
    ("Create Allegro Netlist" "TRUE")
    ("Allegro Netlist Directory" "allegro")
    ("View Allegro Netlist Files" "TRUE")
    ("Update Allegro Board" "FALSE")
    ("Allegro Netlist Output Board File" "allegro\puckadaptercable.brd")
    ("Allegro Netlist Remove Etch" "FALSE")
    ("Allegro Netlist Place Changed Component" "ALWAYS_REPLACE")
    ("Allegro Netlist Open Board in Allegro" "ALLEGRO")
    ("Allegro Setup Configuration File"
       "C:\Cadence\PSD_14.2\tools\capture\allegro.cfg")
    ("Allegro Setup Backup Versions" "3")
    (Netlist_TAB "3")
    (DRC_Scope "0")
    (DRC_Action "0")
    (DRC_Create_Warnings "FALSE")
    (DRC_Check_Ports "FALSE")
    (DRC_Check_Off-Page_Connectors "FALSE")
    (DRC_Identical_References "TRUE")
    (DRC_Type_Mismatch "TRUE")
    (DRC_Report_Ports_and_Off-page_Connectors "FALSE")
    (DRC_SDT_Compatibility "FALSE")
    (DRC_Report_Off-grid_Objects "FALSE")
    (DRC_Check_Unconnected_Nets "TRUE")
    (DRC_Report_Netnames "FALSE")
    (DRC_View_Output "FALSE")
    (DRC_Report_File
       "C:\CYGWIN\HOME\HEADLEY\PUCKADAPTERCABLE\PUCKADAPTERCABLE.DRC")
    (LAYOUT_Netlist_File "PUCKADAPTERCABLE.MNL")
    (LAYOUT_PCB_Footprint "{PCB Footprint}")
    (FALSE)
    (LAYOUT_Units "0")
    (ANNOTATE_Scope "0")
    (ANNOTATE_Mode "1")
    (ANNOTATE_Action "0")
    (ANNOTATE_Reset_References_to_1 "FALSE")
    (ANNOTATE_No_Page_Number_Change "FALSE")
    (ANNOTATE_Property_Combine "{Value}{Source Package}{POWER_GROUP}")
    (TRUE))
  (Folder "Outputs"
    (File "..\puckadaptercable\orcad\puckadaptercable.drc"
      (Type "Report"))
    (File "..\puckadaptercable\orcad\puckadaptercable.mnl"
      (Type "LAYOUT Netlist File")))
  (Folder "Referenced Projects")
  (PartMRUSelector
    ("HEADER 7X2"
      (FullPartName "HEADER 7X2.Normal")
      (LibraryName "C:\CADENCE\PSD_14.2\TOOLS\CAPTURE\LIBRARY\CONNECTOR.OLB")
      (DeviceIndex "0"))
    ("HEADER 8X2"
      (FullPartName "HEADER 8X2.Normal")
      (LibraryName "C:\CADENCE\PSD_14.2\TOOLS\CAPTURE\LIBRARY\CONNECTOR.OLB")
      (DeviceIndex "0")))
  (GlobalState
    (FileView
      (Path "Design Resources")
      (Path "Outputs")
      (Path "Simulation Resources"))
    (HierarchyView)
    (Doc
      (Type "COrCapturePMDoc")
      (Frame
        (Placement "44 0 1 160 599 -4 -23 200 700 91 790"))
      (Tab 0)))
  (Folder "Simulation Resources"
    (Folder "Indesign")))