//diagram ACTIONS
wire [11:0] selectrd;
assign selectrd = (Command == 4'd0) ? 11'b0 : 
                           (Command == 4'd1) ? 11'b0 :
                           (Command == 4'd2) ? {9'b0, relay_ch1} :
                           (Command == 4'd3) ? {9'b0, relay_ch2} :
                           (Command == 4'd4) ? 11'b0 :
                           (Command == 4'd5) ? {6'b0, ints} :
                           (Command == 4'd6) ? {4'b0, ch1_control} :
                           (Command == 4'd7) ? {4'b0, ch2_control} :
                           (Command == 4'd8) ? 11'b0 :
                           (Command == 4'd9) ? {9'b0, relay_ch1} :
                           (Command == 4'd10) ? {9'b0, relay_ch2} :
                           (Command == 4'd11) ? adc_data :
                           (Command == 4'd12) ? {6'b0, ints} :
                           (Command == 4'd13) ? {4'b0, ch1_control} :
                           (Command == 4'd14) ? {4'b0, ch2_control} :
                           (Command == 4'd15) ? {DAVe,DAVe,DAVe,DAVe,DAVe,DAVe,DAVe,DAVe,DAVe,DAVe,DAVe,DAVe} :
                           11'b1;
assign miso = (spi_cs == 1'b1) ? 1'bz :
                      ((CurrState_Sreg0 == `S1) && (DAVe == 1'b1)) ? 1'b1 :
                      (CurrState_Sreg0 == `S1) ? mosi :
                      (CurrState_Sreg0 == `S2) ? mosi :
                      (CurrState_Sreg0 == `S3) ? mosi :
                      (CurrState_Sreg0 == `S4) ? mosi :
                      (CurrState_Sreg0 == `S5) ? selectrd[11] :
                      (CurrState_Sreg0 == `S6) ? selectrd[10] :
                      (CurrState_Sreg0 == `S7) ? selectrd[9] :
                      (CurrState_Sreg0 == `S8) ? selectrd[8] :
                      (CurrState_Sreg0 == `S9) ? selectrd[7] :
                      (CurrState_Sreg0 == `S10) ? selectrd[6] :
                      (CurrState_Sreg0 == `S11) ? selectrd[5] :
                      (CurrState_Sreg0 == `S12) ? selectrd[4] :
                      (CurrState_Sreg0 == `S13) ? selectrd[3] :
                      (CurrState_Sreg0 == `S14) ? selectrd[2] :
                      (CurrState_Sreg0 == `S15) ? selectrd[1] :
                      (CurrState_Sreg0 == `S16) ? selectrd[0] :
                      (CurrState_Sreg0 == `S18) ? 1'b1 :
                      (CurrState_Sreg0 == `S19) ? 1'b1 : 1'bz;
