Implementation Log

Created on 06:15:34 11/14/01
Xilinx Coolrunner implementation
Executing C:\xilinx_webpack\bin\nt\edif2blf.exe  -log implement.log "dpa_top.edn"

Parsing File dpa_top.edn ...

Complete.

%% ERROR count: 0  WARNING count: 0


Executing C:\xilinx_webpack\bin\nt\xplaopt.exe -run b -vo -i dpa_top.bl0 -it blif -o dpa_top.pla -ot tt2 -dev xcr3256xl-7tq144 -log implement.dox -co none -fi 36 -th 10 -effort e -ucf g:\VSS_Projects\work\sjensen\DPA\HDL_project\src\cool_pinout.ucf


Parsing...
.

Parsing file dpa_top.bl0 ...

Parsing file xplalib.xst ...
> WARNING 5615 Pin/Node 'adc_int' is not found in module  but 'ADC_INT' is found.
   Enable case insensitive matching.
..

Synthesizing and Optimizing...
> WARNING 5475 Node 'U1_I5_I0' has been changed to a pin because of the '.OE' extension.
.........................................................
> WARNING 2358  Dangling pin CH1_PG removed.
> WARNING 2358  Dangling pin CH2_PG removed.
..........................................................
.................

Fitting...
.........................
> WARNING 7009 Symbol 'N1748' was previously declared or reserved.
  Trying 'N1748_1'.
> WARNING 7009 Symbol 'N2018' was previously declared or reserved.
  Trying 'N2018_1'.
> WARNING 7009 Symbol 'N_PZ_5994' was previously declared or reserved.
  Trying 'N_PZ_5994_1'.
> WARNING 7009 Symbol 'N_PZ_3738' was previously declared or reserved.
  Trying 'N_PZ_3738_1'.

%% ERROR count: 0  WARNING count: 8


Implementation finished with warnings.