//////////////////////////////////////////////////////////////////////////////
//                                                                           /
// IAR ARM ANSI C/C++ Compiler V4.11A/W32              20/Jul/2004  18:58:47 /
// Copyright 1999-2004 IAR Systems. All rights reserved.                     /
//                                                                           /
//    Cpu mode        =  arm                                                 /
//    Endian          =  little                                              /
//    Stack alignment =  4                                                   /
//    Source file     =  C:\medusa\strutil.c                                 /
//    Command line    =  -I "C:\Program Files\IAR Systems\Embedded           /
//                       Workbench 4.0\ARM\INC\" -lc C:\medusa\Debug\List\   /
//                       -la C:\medusa\Debug\List\ -o C:\medusa\Debug\Obj\   /
//                       -s2 --no_cse --no_unroll --no_inline                /
//                       --no_code_motion --no_tbaa --no_clustering          /
//                       --no_scheduling --debug --cpu_mode arm --endian     /
//                       little --cpu ARM7TDMI-S --stack_align 4 -e --fpu    /
//                       None "-D_DLIB_CONFIG_FILE=C:\Program Files\IAR      /
//                       Systems\Embedded Workbench                          /
//                       4.0\ARM\LIB\dl4tpannl8n.h" C:\medusa\strutil.c      /
//    List file       =  C:\medusa\Debug\List\strutil.s79                    /
//                                                                           /
//                                                                           /
//////////////////////////////////////////////////////////////////////////////

        NAME strutil

        RTMODEL "ARMv4M", "USED"
        RTMODEL "StackAlign4", "USED"
        RTMODEL "__cpu_mode", "__pcs__arm"
        RTMODEL "__data_model", "absolute"
        RTMODEL "__dlib_file_descriptor", "0"
        RTMODEL "__endian", "little"
        RTMODEL "__rt_version", "6"

        RSEG CSTACK:DATA:NOROOT(2)

        EXTERN ??div32_a

        PUBWEAK `?*?DATA_ID`
        MULTWEAK ??rA??div32_a
        PUBWEAK ?init?tab?DATA_I
        MULTWEAK clicharGetOutputBuffer??rA
        MULTWEAK clicharSendOutputBuffer??rA
        MULTWEAK sprintf??rA
        PUBLIC strutilHexdump
        FUNCTION strutilHexdump,0203H
        LOCFRAME CSTACK, 40, STACK
        PUBLIC strutil_strncasecmp
        FUNCTION strutil_strncasecmp,0203H
        LOCFRAME CSTACK, 12, STACK
        
        CFI Names cfiNames0
        CFI StackFrame CFA R13 HUGEDATA
        CFI Resource R0:32, R1:32, R2:32, R3:32, R4:32, R5:32, R6:32, R7:32
        CFI Resource R8:32, R9:32, R10:32, R11:32, R12:32, CPSR:32, R13:32
        CFI Resource R14:32, SPSR:32
        CFI VirtualResource ?RET:32
        CFI EndNames cfiNames0
        
        CFI Common cfiCommon0 Using cfiNames0
        CFI CodeAlign 4
        CFI DataAlign 4
        CFI ReturnAddress ?RET CODE
        CFI CFA R13+0
        CFI R0 Undefined
        CFI R1 Undefined
        CFI R2 Undefined
        CFI R3 Undefined
        CFI R4 SameValue
        CFI R5 SameValue
        CFI R6 SameValue
        CFI R7 SameValue
        CFI R8 SameValue
        CFI R9 SameValue
        CFI R10 SameValue
        CFI R11 SameValue
        CFI R12 Undefined
        CFI CPSR SameValue
        CFI R14 Undefined
        CFI SPSR SameValue
        CFI ?RET R14
        CFI EndCommon cfiCommon0
        
clicharGetOutputBuffer SYMBOL "clicharGetOutputBuffer"
clicharSendOutputBuffer SYMBOL "clicharSendOutputBuffer"
sprintf             SYMBOL "sprintf"
clicharGetOutputBuffer??rA SYMBOL "??rA", clicharGetOutputBuffer
clicharSendOutputBuffer??rA SYMBOL "??rA", clicharSendOutputBuffer
sprintf??rA         SYMBOL "??rA", sprintf

        EXTERN clicharGetOutputBuffer
        FUNCTION clicharGetOutputBuffer,0202H
        EXTERN clicharSendOutputBuffer
        FUNCTION clicharSendOutputBuffer,0202H
        EXTERN sprintf
        FUNCTION sprintf,010202H


        RSEG DATA_I:DATA:SORT:NOROOT(0)
charmap:
        DS8 256
	REQUIRE `?<Initializer for charmap>`

        RSEG CODE:CODE:NOROOT(2)
        CFI Block cfiBlock0 Using cfiCommon0
        CFI Function strutil_strncasecmp
   CODE32      
strutil_strncasecmp:
   STMDB       SP!,{R4-R6}        ;; Push
        CFI R6 Frame(CFA, -4)
        CFI R5 Frame(CFA, -8)
        CFI R4 Frame(CFA, -12)
        CFI CFA R13+12
   MOV         R3,R0
??strutil_strncasecmp_0:
   CMP         R2,#+0x0
   BEQ         ??strutil_strncasecmp_1
   LDRB        R0,[R3, #+0]
   MOV         R4,R0
   ADDS        R3,R3,#+0x1
   LDRB        R0,[R1, #+0]
   MOV         R12,R0
   ADDS        R1,R1,#+0x1
   MOV         R0,R4
   ANDS        R0,R0,#+0xFF       ;; Zero extend
   LDR         R5,??strutil_strncasecmp_2  ;; charmap
   LDRB        R0,[R0, +R5]
   ANDS        R0,R0,#+0xFF       ;; Zero extend
   MOV         R5,R12
   ANDS        R5,R5,#+0xFF       ;; Zero extend
   LDR         R6,??strutil_strncasecmp_2  ;; charmap
   LDRB        R5,[R5, +R6]
   ANDS        R5,R5,#+0xFF       ;; Zero extend
   CMP         R0,R5
   BEQ         ??strutil_strncasecmp_3
   ANDS        R4,R4,#+0xFF       ;; Zero extend
   LDR         R0,??strutil_strncasecmp_2  ;; charmap
   LDRB        R4,[R4, +R0]
   ANDS        R4,R4,#+0xFF       ;; Zero extend
   ANDS        R12,R12,#+0xFF     ;; Zero extend
   LDR         R6,??strutil_strncasecmp_2  ;; charmap
   LDRB        R12,[R12, +R6]
   ANDS        R12,R12,#+0xFF     ;; Zero extend
   SUBS        R0,R4,R12
   B           ??strutil_strncasecmp_4
??strutil_strncasecmp_3:
   ANDS        R4,R4,#+0xFF       ;; Zero extend
   CMP         R4,#+0x0
   BNE         ??strutil_strncasecmp_5
   MOV         R0,#+0x0
   B           ??strutil_strncasecmp_4
??strutil_strncasecmp_5:
   SUBS        R2,R2,#+0x1
   B           ??strutil_strncasecmp_0
??strutil_strncasecmp_1:
   MOV         R0,#+0x0
??strutil_strncasecmp_4:
   LDMIA       SP!,{R4-R6}        ;; Pop
        CFI R4 SameValue
        CFI R5 SameValue
        CFI R6 SameValue
        CFI CFA R13+0
   MOV         PC,LR              ;; return
   DATA        
??strutil_strncasecmp_2:
   DC32        charmap
        CFI EndBlock cfiBlock0

        RSEG CODE:CODE:NOROOT(2)
        CFI Block cfiBlock1 Using cfiCommon0
        CFI Function strutilHexdump
   CODE32      
strutilHexdump:
   STMDB       SP!,{R4-R11,LR}    ;; Push
        CFI ?RET Frame(CFA, -4)
        CFI R11 Frame(CFA, -8)
        CFI R10 Frame(CFA, -12)
        CFI R9 Frame(CFA, -16)
        CFI R8 Frame(CFA, -20)
        CFI R7 Frame(CFA, -24)
        CFI R6 Frame(CFA, -28)
        CFI R5 Frame(CFA, -32)
        CFI R4 Frame(CFA, -36)
        CFI CFA R13+36
   SUB         SP,SP,#+0x4
        CFI CFA R13+40
   MOV         R4,R0
   MOV         R5,R1
   MOV         R0,SP
   _BLF        clicharGetOutputBuffer,clicharGetOutputBuffer??rA
   MOV         R8,R0
   MOV         R0,R5
   MOV         R1,#+0x10
   _BLF        ??div32_a,??rA??div32_a
   CMP         R1,#+0x1
   BGE         ??strutilHexdump_0
   MOV         R11,#+0x1
   B           ??strutilHexdump_1
??strutilHexdump_0:
   MOV         R0,R5
   MOV         R1,#+0x10
   _BLF        ??div32_a,??rA??div32_a
   MOV         R11,R1
??strutilHexdump_1:
   MOV         R0,#+0x0
   MOV         R6,R0
??strutilHexdump_2:
   CMP         R6,R11
   BGE         ??strutilHexdump_3
   MOV         R2,R6
   LDR         R1,??strutilHexdump_4  ;; `?<Constant "%04x: ">`
   MOV         R0,R8
   _BLF        sprintf,sprintf??rA
   MOV         R1,#+0x0
   MOV         R7,R1
??strutilHexdump_5:
   CMP         R7,#+0x10
   BGE         ??strutilHexdump_6
   MOV         R2,#+0x10
   MLAS        R3,R2,R6,R7
   LDRB        R12,[R3, +R4]
   MOV         R10,R12
   ANDS        R10,R10,#+0xFF     ;; Zero extend
   CMP         R10,#+0x20
   BCS         ??strutilHexdump_7
   MOV         LR,#+0x2E
   MOV         R9,LR
   B           ??strutilHexdump_8
??strutilHexdump_7:
   MOV         R9,R10
??strutilHexdump_8:
   MOV         R2,R10
   ANDS        R2,R2,#+0xFF       ;; Zero extend
   LDR         R1,??strutilHexdump_4+4  ;; `?<Constant "%02x ">`
   ADDS        R0,R7,R7, LSL #+1
   ADDS        R3,R0,R8
   ADDS        R0,R3,#+0x6
   _BLF        sprintf,sprintf??rA
   MOV         R2,R9
   ANDS        R2,R2,#+0xFF       ;; Zero extend
   LDR         R1,??strutilHexdump_4+8  ;; `?<Constant "%c">`
   ADDS        R12,R7,R8
   ADDS        R0,R12,#+0x42
   _BLF        sprintf,sprintf??rA
   ADDS        R7,R7,#+0x1
   B           ??strutilHexdump_5
??strutilHexdump_6:
   LDR         R1,??strutilHexdump_4+12  ;; `?<Constant "\\r\\n">`
   ADDS        R2,R7,R8
   ADDS        R0,R2,#+0x42
   _BLF        sprintf,sprintf??rA
   LDR         R1,[SP, #+0]
   MOV         R0,R8
   _BLF        clicharSendOutputBuffer,clicharSendOutputBuffer??rA
   ADDS        R6,R6,#+0x1
   B           ??strutilHexdump_2
??strutilHexdump_3:
   ADD         SP,SP,#+0x4        ;; stack cleaning
        CFI CFA R13+36
   LDMIA       SP!,{R4-R11,PC}    ;; return
   DATA        
??strutilHexdump_4:
   DC32        `?<Constant "%04x: ">`
   DC32        `?<Constant "%02x ">`
   DC32        `?<Constant "%c">`
   DC32        `?<Constant "\\r\\n">`
        CFI EndBlock cfiBlock1

        RSEG CODE:CODE:NOROOT(2)
        CFI Block cfiBlock2 Using cfiCommon0
        CFI NoFunction
   CODE32      
clicharGetOutputBuffer??rA:
   LDR         R12,??Subroutine0_0  ;; clicharGetOutputBuffer
   MOV         PC,R12
   DATA        
??Subroutine0_0:
   DC32        clicharGetOutputBuffer
        CFI EndBlock cfiBlock2

        RSEG CODE:CODE:NOROOT(2)
        CFI Block cfiBlock3 Using cfiCommon0
        CFI NoFunction
   CODE32      
??rA??div32_a:
   LDR         R12,??Subroutine1_0  ;; ??div32_a
   MOV         PC,R12
   DATA        
??Subroutine1_0:
   DC32        ??div32_a
        CFI EndBlock cfiBlock3

        RSEG CODE:CODE:NOROOT(2)
        CFI Block cfiBlock4 Using cfiCommon0
        CFI NoFunction
   CODE32      
sprintf??rA:
   LDR         R12,??Subroutine2_0  ;; sprintf
   MOV         PC,R12
   DATA        
??Subroutine2_0:
   DC32        sprintf
        CFI EndBlock cfiBlock4

        RSEG CODE:CODE:NOROOT(2)
        CFI Block cfiBlock5 Using cfiCommon0
        CFI NoFunction
   CODE32      
clicharSendOutputBuffer??rA:
   LDR         R12,??Subroutine3_0  ;; clicharSendOutputBuffer
   MOV         PC,R12
   DATA        
??Subroutine3_0:
   DC32        clicharSendOutputBuffer
        CFI EndBlock cfiBlock5

        RSEG DATA_ID:CONST:SORT:NOROOT(0)
`?<Initializer for charmap>`:
        DC8 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18
        DC8 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, 35
        DC8 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50, 51, 52
        DC8 53, 54, 55, 56, 57, 58, 59, 60, 61, 62, 63, 64, 97, 98, 99, 100
        DC8 101, 102, 103, 104, 105, 106, 107, 108, 109, 110, 111, 112, 113
        DC8 114, 115, 116, 117, 118, 119, 120, 121, 122, 91, 92, 93, 94, 95, 96
        DC8 97, 98, 99, 100, 101, 102, 103, 104, 105, 106, 107, 108, 109, 110
        DC8 111, 112, 113, 114, 115, 116, 117, 118, 119, 120, 121, 122, 123
        DC8 124, 125, 126, 127, 128, 129, 130, 131, 132, 133, 134, 135, 136
        DC8 137, 138, 139, 140, 141, 142, 143, 144, 145, 146, 147, 148, 149
        DC8 150, 151, 152, 153, 154, 155, 156, 157, 158, 159, 160, 161, 162
        DC8 163, 164, 165, 166, 167, 168, 169, 170, 171, 172, 173, 174, 175
        DC8 176, 177, 178, 179, 180, 181, 182, 183, 184, 185, 186, 187, 188
        DC8 189, 190, 191, 192, 225, 226, 227, 228, 229, 230, 231, 232, 233
        DC8 234, 235, 236, 237, 238, 239, 240, 241, 242, 243, 244, 245, 246
        DC8 247, 248, 249, 250, 219, 220, 221, 222, 223, 224, 225, 226, 227
        DC8 228, 229, 230, 231, 232, 233, 234, 235, 236, 237, 238, 239, 240
        DC8 241, 242, 243, 244, 245, 246, 247, 248, 249, 250, 251, 252, 253
        DC8 254, 255

        RSEG DATA_ID:CONST:SORT:NOROOT(2)
`?*?DATA_ID`:

        RSEG INITTAB:CODE:ROOT(2)
   DATA
?init?tab?DATA_I:
   DCD      sfe(DATA_I) - sfb(DATA_I), sfb(DATA_I), sfb(DATA_ID)

        RSEG DATA_C:CONST:SORT:NOROOT(2)
`?<Constant "%04x: ">`:
        DC8 "%04x: "
        DC8 0

        RSEG DATA_C:CONST:SORT:NOROOT(2)
`?<Constant "%02x ">`:
        DC8 "%02x "
        DC8 0, 0

        RSEG DATA_C:CONST:SORT:NOROOT(0)
`?<Constant "%c">`:
        DC8 "%c"

        RSEG DATA_C:CONST:SORT:NOROOT(0)
`?<Constant "\\r\\n">`:
        DC8 "\015\012"

        END
// 
// 504 bytes in segment CODE
//  22 bytes in segment DATA_C
// 256 bytes in segment DATA_I
// 256 bytes in segment DATA_ID
//  12 bytes in segment INITTAB
// 
// 456 bytes of CODE  memory (+ 60 bytes shared)
// 278 bytes of CONST memory
// 256 bytes of DATA  memory
//
//Errors: none
//Warnings: none
