//////////////////////////////////////////////////////////////////////////////
//                                                                           /
// IAR ARM ANSI C/C++ Compiler V4.11A/W32              20/Jul/2004  18:58:53 /
// Copyright 1999-2004 IAR Systems. All rights reserved.                     /
//                                                                           /
//    Cpu mode        =  arm                                                 /
//    Endian          =  little                                              /
//    Stack alignment =  4                                                   /
//    Source file     =  C:\medusa\i2cswitch.c                               /
//    Command line    =  -I "C:\Program Files\IAR Systems\Embedded           /
//                       Workbench 4.0\ARM\INC\" -lc C:\medusa\Debug\List\   /
//                       -la C:\medusa\Debug\List\ -o C:\medusa\Debug\Obj\   /
//                       -s2 --no_cse --no_unroll --no_inline                /
//                       --no_code_motion --no_tbaa --no_clustering          /
//                       --no_scheduling --debug --cpu_mode arm --endian     /
//                       little --cpu ARM7TDMI-S --stack_align 4 -e --fpu    /
//                       None "-D_DLIB_CONFIG_FILE=C:\Program Files\IAR      /
//                       Systems\Embedded Workbench                          /
//                       4.0\ARM\LIB\dl4tpannl8n.h" C:\medusa\i2cswitch.c    /
//    List file       =  C:\medusa\Debug\List\i2cswitch.s79                  /
//                                                                           /
//                                                                           /
//////////////////////////////////////////////////////////////////////////////

        NAME i2cswitch

        RTMODEL "ARMv4M", "USED"
        RTMODEL "StackAlign4", "USED"
        RTMODEL "__cpu_mode", "__pcs__arm"
        RTMODEL "__data_model", "absolute"
        RTMODEL "__dlib_file_descriptor", "0"
        RTMODEL "__endian", "little"
        RTMODEL "__rt_version", "6"

        RSEG CSTACK:DATA:NOROOT(2)

??DataTable0 EQU 0
??DataTable1 EQU 0
??DataTable2 EQU 0
        PUBWEAK ?init?tab?DATA_Z
        MULTWEAK _Stoul??rA
        PUBWEAK atoi
        FUNCTION atoi,010203H
        LOCFRAME CSTACK, 8, STACK
        MULTWEAK atoi??rA
        MULTWEAK cliRegisterCommand??rA
        MULTWEAK clicharGetOutputBuffer??rA
        MULTWEAK clicharSendOutputBuffer??rA
        FUNCTION i2cbusHandler,0603H
        LOCFRAME CSTACK, 32, STACK
        MULTWEAK i2cmasterProbe??rA
        MULTWEAK i2cmasterSendOne??rA
        PUBLIC i2cswitchDisable
        FUNCTION i2cswitchDisable,0203H
        LOCFRAME CSTACK, 4, STACK
        PUBLIC i2cswitchInit
        FUNCTION i2cswitchInit,0203H
        LOCFRAME CSTACK, 8, STACK
        PUBLIC i2cswitchSetBus
        FUNCTION i2cswitchSetBus,0203H
        LOCFRAME CSTACK, 12, STACK
        MULTWEAK sprintf??rA
        
        CFI Names cfiNames0
        CFI StackFrame CFA R13 HUGEDATA
        CFI Resource R0:32, R1:32, R2:32, R3:32, R4:32, R5:32, R6:32, R7:32
        CFI Resource R8:32, R9:32, R10:32, R11:32, R12:32, CPSR:32, R13:32
        CFI Resource R14:32, SPSR:32
        CFI VirtualResource ?RET:32
        CFI EndNames cfiNames0
        
        CFI Common cfiCommon0 Using cfiNames0
        CFI CodeAlign 4
        CFI DataAlign 4
        CFI ReturnAddress ?RET CODE
        CFI CFA R13+0
        CFI R0 Undefined
        CFI R1 Undefined
        CFI R2 Undefined
        CFI R3 Undefined
        CFI R4 SameValue
        CFI R5 SameValue
        CFI R6 SameValue
        CFI R7 SameValue
        CFI R8 SameValue
        CFI R9 SameValue
        CFI R10 SameValue
        CFI R11 SameValue
        CFI R12 Undefined
        CFI CPSR SameValue
        CFI R14 Undefined
        CFI SPSR SameValue
        CFI ?RET R14
        CFI EndCommon cfiCommon0
        
_Stoul              SYMBOL "_Stoul"
cliRegisterCommand  SYMBOL "cliRegisterCommand"
clicharGetOutputBuffer SYMBOL "clicharGetOutputBuffer"
clicharSendOutputBuffer SYMBOL "clicharSendOutputBuffer"
i2cmasterProbe      SYMBOL "i2cmasterProbe"
i2cmasterSendOne    SYMBOL "i2cmasterSendOne"
sprintf             SYMBOL "sprintf"
_Stoul??rA          SYMBOL "??rA", _Stoul
atoi                SYMBOL "atoi"
atoi??rA            SYMBOL "??rA", atoi
cliRegisterCommand??rA SYMBOL "??rA", cliRegisterCommand
clicharGetOutputBuffer??rA SYMBOL "??rA", clicharGetOutputBuffer
clicharSendOutputBuffer??rA SYMBOL "??rA", clicharSendOutputBuffer
i2cmasterProbe??rA  SYMBOL "??rA", i2cmasterProbe
i2cmasterSendOne??rA SYMBOL "??rA", i2cmasterSendOne
sprintf??rA         SYMBOL "??rA", sprintf

        EXTERN _Stoul
        FUNCTION _Stoul,010202H
        EXTERN cliRegisterCommand
        FUNCTION cliRegisterCommand,0202H
        EXTERN clicharGetOutputBuffer
        FUNCTION clicharGetOutputBuffer,0202H
        EXTERN clicharSendOutputBuffer
        FUNCTION clicharSendOutputBuffer,0202H
        EXTERN i2cmasterProbe
        FUNCTION i2cmasterProbe,0202H
        EXTERN i2cmasterSendOne
        FUNCTION i2cmasterSendOne,0202H
        EXTERN sprintf
        FUNCTION sprintf,010202H


        RSEG CODE:CODE:NOROOT(2)
        CFI Block cfiBlock0 Using cfiCommon0
        CFI Function atoi
   CODE32      
// __??Code32?? __intrinsic __code __arm __atpcs int atoi(char const *)
atoi:
   STMDB       SP!,{R4,LR}        ;; Push
        CFI ?RET Frame(CFA, -4)
        CFI R4 Frame(CFA, -8)
        CFI CFA R13+8
   MOV         R4,R0
   MOV         R2,#+0xA
   MOV         R1,#+0x0
   MOV         R0,R4
   _BLF        _Stoul,_Stoul??rA
   LDMIA       SP!,{R4,PC}        ;; return
        CFI EndBlock cfiBlock0

        RSEG DATA_Z:DATA:SORT:NOROOT(0)
slaveAddr:
        DS8 1

        RSEG CODE:CODE:NOROOT(2)
        CFI Block cfiBlock1 Using cfiCommon0
        CFI Function i2cswitchInit
   CODE32      
i2cswitchInit:
   STMDB       SP!,{R4,LR}        ;; Push
        CFI ?RET Frame(CFA, -4)
        CFI R4 Frame(CFA, -8)
        CFI CFA R13+8
   MOV         R4,R0
   LDR         R2,??i2cswitchInit_0  ;; `?<Constant "i2cbus [d(isable all)...">`
   LDR         R1,??i2cswitchInit_0+4  ;; i2cbusHandler
   LDR         R0,??i2cswitchInit_0+8  ;; `?<Constant "i2cbus">`
   _BLF        cliRegisterCommand,cliRegisterCommand??rA
   LDR         R0,??DataTable3    ;; slaveAddr
   STRB        R4,[R0, #+0]
   LDR         R1,??DataTable3    ;; slaveAddr
   LDRB        R0,[R1, #+0]
   _BLF        i2cmasterProbe,i2cmasterProbe??rA
   LDMIA       SP!,{R4,PC}        ;; return
   DATA        
??i2cswitchInit_0:
   DC32        `?<Constant "i2cbus [d(isable all)...">`
   DC32        i2cbusHandler
   DC32        `?<Constant "i2cbus">`
        CFI EndBlock cfiBlock1

        RSEG CODE:CODE:NOROOT(2)
        CFI Block cfiBlock2 Using cfiCommon0
        CFI Function i2cswitchSetBus
   CODE32      
i2cswitchSetBus:
   STMDB       SP!,{R4,R5,LR}     ;; Push
        CFI ?RET Frame(CFA, -4)
        CFI R5 Frame(CFA, -8)
        CFI R4 Frame(CFA, -12)
        CFI CFA R13+12
   MOV         R4,R0
   CMP         R4,#+0x0
   BLT         ??i2cswitchSetBus_0
   CMP         R4,#+0x4
   BLT         ??i2cswitchSetBus_1
??i2cswitchSetBus_0:
   MVN         R0,#+0x0
   B           ??i2cswitchSetBus_2
??i2cswitchSetBus_1:
   MOV         R0,#+0x1
   MOV         R1,R4
   MOV         R2,R0, LSL R1
   MOV         R5,R2
   MOV         R2,#+0x1
   MOV         R1,R5
   ANDS        R1,R1,#+0xFF       ;; Zero extend
   LDR         R3,??DataTable3    ;; slaveAddr
   LDRB        R0,[R3, #+0]
   _BLF        i2cmasterSendOne,i2cmasterSendOne??rA
??i2cswitchSetBus_2:
   LDMIA       SP!,{R4,R5,PC}     ;; return
        CFI EndBlock cfiBlock2

        RSEG CODE:CODE:NOROOT(2)
        CFI Block cfiBlock3 Using cfiCommon0
        CFI Function i2cswitchDisable
   CODE32      
i2cswitchDisable:
   STMDB       SP!,{LR}           ;; Push
        CFI ?RET Frame(CFA, -4)
        CFI CFA R13+4
   MOV         R2,#+0x1
   MOV         R1,#+0x0
   LDR         R0,??DataTable3    ;; slaveAddr
   LDRB        R0,[R0, #+0]
   _BLF        i2cmasterSendOne,i2cmasterSendOne??rA
   LDMIA       SP!,{PC}           ;; return
        CFI EndBlock cfiBlock3

        RSEG CODE:CODE:NOROOT(2)
   DATA        
??DataTable3:
   DC32        slaveAddr

        RSEG CODE:CODE:NOROOT(2)
        CFI Block cfiBlock4 Using cfiCommon0
        CFI Function i2cbusHandler
   CODE32      
i2cbusHandler:
   STMDB       SP!,{R4-R9,LR}     ;; Push
        CFI ?RET Frame(CFA, -4)
        CFI R9 Frame(CFA, -8)
        CFI R8 Frame(CFA, -12)
        CFI R7 Frame(CFA, -16)
        CFI R6 Frame(CFA, -20)
        CFI R5 Frame(CFA, -24)
        CFI R4 Frame(CFA, -28)
        CFI CFA R13+28
   SUB         SP,SP,#+0x4
        CFI CFA R13+32
   MOV         R6,R0
   MOV         R7,R1
   MOV         R8,R2
   MVN         R0,#+0x0
   MOV         R9,R0
   MOV         R0,SP
   _BLF        clicharGetOutputBuffer,clicharGetOutputBuffer??rA
   MOV         R5,R0
   CMP         R6,#+0x2
   BGE         ??i2cbusHandler_0
   MVN         R0,#+0x0
   B           ??i2cbusHandler_1
??i2cbusHandler_0:
   LDR         R1,[R7, #+4]
   LDRB        R2,[R1, #+0]
   CMP         R2,#+0x64
   BNE         ??i2cbusHandler_2
   BL          i2cswitchDisable
   CMP         R0,#+0x0
   BNE         ??i2cbusHandler_3
   LDR         R1,??i2cbusHandler_4  ;; `?<Constant "i2cbus: bus switch di...">`
   MOV         R0,R5
   _BLF        sprintf,sprintf??rA
   B           ??i2cbusHandler_5
??i2cbusHandler_3:
   LDR         R1,??i2cbusHandler_4+4  ;; `?<Constant "i2cbus: error disabli...">`
   MOV         R0,R5
   _BLF        sprintf,sprintf??rA
   B           ??i2cbusHandler_5
??i2cbusHandler_2:
   LDR         R0,[R7, #+4]
   _BLF        atoi,atoi??rA
   MOV         R4,R0
   CMP         R4,#+0x0
   BLT         ??i2cbusHandler_6
   CMP         R4,#+0x4
   BLT         ??i2cbusHandler_7
??i2cbusHandler_6:
   MVN         R0,#+0x0
   B           ??i2cbusHandler_1
??i2cbusHandler_7:
   MOV         R0,R4
   BL          i2cswitchSetBus
   CMP         R0,#+0x0
   BNE         ??i2cbusHandler_8
   MOV         R2,R4
   LDR         R1,??i2cbusHandler_4+8  ;; `?<Constant "i2cbus: bus set to [%d]\\n">`
   MOV         R0,R5
   _BLF        sprintf,sprintf??rA
   B           ??i2cbusHandler_9
??i2cbusHandler_8:
   MOV         R2,R4
   LDR         R1,??i2cbusHandler_4+12  ;; `?<Constant "i2cbus: error setting...">`
   MOV         R0,R5
   _BLF        sprintf,sprintf??rA
??i2cbusHandler_9:
   MOV         R3,#+0x0
   MOV         R9,R3
??i2cbusHandler_5:
   LDR         R1,[SP, #+0]
   MOV         R0,R5
   _BLF        clicharSendOutputBuffer,clicharSendOutputBuffer??rA
   MOV         R0,R9
??i2cbusHandler_1:
   ADD         SP,SP,#+0x4        ;; stack cleaning
        CFI CFA R13+28
   LDMIA       SP!,{R4-R9,PC}     ;; return
   DATA        
??i2cbusHandler_4:
   DC32        `?<Constant "i2cbus: bus switch di...">`
   DC32        `?<Constant "i2cbus: error disabli...">`
   DC32        `?<Constant "i2cbus: bus set to [%d]\\n">`
   DC32        `?<Constant "i2cbus: error setting...">`
        CFI EndBlock cfiBlock4

        RSEG CODE:CODE:NOROOT(2)
        CFI Block cfiBlock5 Using cfiCommon0
        CFI NoFunction
   CODE32      
_Stoul??rA:
   LDR         R12,??Subroutine0_0  ;; _Stoul
   MOV         PC,R12
   DATA        
??Subroutine0_0:
   DC32        _Stoul
        CFI EndBlock cfiBlock5

        RSEG CODE:CODE:NOROOT(2)
        CFI Block cfiBlock6 Using cfiCommon0
        CFI NoFunction
   CODE32      
cliRegisterCommand??rA:
   LDR         R12,??Subroutine1_0  ;; cliRegisterCommand
   MOV         PC,R12
   DATA        
??Subroutine1_0:
   DC32        cliRegisterCommand
        CFI EndBlock cfiBlock6

        RSEG CODE:CODE:NOROOT(2)
        CFI Block cfiBlock7 Using cfiCommon0
        CFI NoFunction
   CODE32      
i2cmasterProbe??rA:
   LDR         R12,??Subroutine2_0  ;; i2cmasterProbe
   MOV         PC,R12
   DATA        
??Subroutine2_0:
   DC32        i2cmasterProbe
        CFI EndBlock cfiBlock7

        RSEG CODE:CODE:NOROOT(2)
        CFI Block cfiBlock8 Using cfiCommon0
        CFI NoFunction
   CODE32      
i2cmasterSendOne??rA:
   LDR         R12,??Subroutine3_0  ;; i2cmasterSendOne
   MOV         PC,R12
   DATA        
??Subroutine3_0:
   DC32        i2cmasterSendOne
        CFI EndBlock cfiBlock8

        RSEG CODE:CODE:NOROOT(2)
        CFI Block cfiBlock9 Using cfiCommon0
        CFI NoFunction
   CODE32      
clicharGetOutputBuffer??rA:
   LDR         R12,??Subroutine4_0  ;; clicharGetOutputBuffer
   MOV         PC,R12
   DATA        
??Subroutine4_0:
   DC32        clicharGetOutputBuffer
        CFI EndBlock cfiBlock9

        RSEG CODE:CODE:NOROOT(2)
        CFI Block cfiBlock10 Using cfiCommon0
        CFI NoFunction
   CODE32      
sprintf??rA:
   LDR         R12,??Subroutine5_0  ;; sprintf
   MOV         PC,R12
   DATA        
??Subroutine5_0:
   DC32        sprintf
        CFI EndBlock cfiBlock10

        RSEG CODE:CODE:NOROOT(2)
        CFI Block cfiBlock11 Using cfiCommon0
        CFI NoFunction
   CODE32      
atoi??rA:
   LDR         R12,??Subroutine6_0  ;; atoi
   MOV         PC,R12
   DATA        
??Subroutine6_0:
   DC32        atoi
        CFI EndBlock cfiBlock11

        RSEG CODE:CODE:NOROOT(2)
        CFI Block cfiBlock12 Using cfiCommon0
        CFI NoFunction
   CODE32      
clicharSendOutputBuffer??rA:
   LDR         R12,??Subroutine7_0  ;; clicharSendOutputBuffer
   MOV         PC,R12
   DATA        
??Subroutine7_0:
   DC32        clicharSendOutputBuffer
        CFI EndBlock cfiBlock12

        RSEG INITTAB:CODE:ROOT(2)
   DATA
?init?tab?DATA_Z:
   DCD      sfe(DATA_Z) - sfb(DATA_Z), sfb(DATA_Z), sfb(DATA_Z)

        RSEG DATA_C:CONST:SORT:NOROOT(2)
`?<Constant "i2cbus">`:
        DC8 "i2cbus"
        DC8 0

        RSEG DATA_C:CONST:SORT:NOROOT(2)
`?<Constant "i2cbus [d(isable all)...">`:
        DC8 "i2cbus [d(isable all)] [bus number 0-3 to enable]"
        DC8 0, 0

        RSEG DATA_C:CONST:SORT:NOROOT(2)
`?<Constant "i2cbus: bus switch di...">`:
        DC8 "i2cbus: bus switch disabled\012"
        DC8 0, 0, 0

        RSEG DATA_C:CONST:SORT:NOROOT(2)
`?<Constant "i2cbus: error disabli...">`:
        DC8 "i2cbus: error disabling bus switch\012"

        RSEG DATA_C:CONST:SORT:NOROOT(2)
`?<Constant "i2cbus: bus set to [%d]\\n">`:
        DC8 "i2cbus: bus set to [%d]\012"
        DC8 0, 0, 0

        RSEG DATA_C:CONST:SORT:NOROOT(2)
`?<Constant "i2cbus: error setting...">`:
        DC8 "i2cbus: error setting bus to [%d]\012"
        DC8 0

        END
// 
// 544 bytes in segment CODE
// 192 bytes in segment DATA_C
//   1 byte  in segment DATA_Z
//  12 bytes in segment INITTAB
// 
// 420 bytes of CODE  memory (+ 136 bytes shared)
// 192 bytes of CONST memory
//   1 byte  of DATA  memory
//
//Errors: none
//Warnings: none
