//////////////////////////////////////////////////////////////////////////////
//                                                                           /
// IAR ARM ANSI C/C++ Compiler V4.11A/W32              20/Jul/2004  18:58:52 /
// Copyright 1999-2004 IAR Systems. All rights reserved.                     /
//                                                                           /
//    Cpu mode        =  arm                                                 /
//    Endian          =  little                                              /
//    Stack alignment =  4                                                   /
//    Source file     =  C:\medusa\i2cmaster.c                               /
//    Command line    =  -I "C:\Program Files\IAR Systems\Embedded           /
//                       Workbench 4.0\ARM\INC\" -lc C:\medusa\Debug\List\   /
//                       -la C:\medusa\Debug\List\ -o C:\medusa\Debug\Obj\   /
//                       -s2 --no_cse --no_unroll --no_inline                /
//                       --no_code_motion --no_tbaa --no_clustering          /
//                       --no_scheduling --debug --cpu_mode arm --endian     /
//                       little --cpu ARM7TDMI-S --stack_align 4 -e --fpu    /
//                       None "-D_DLIB_CONFIG_FILE=C:\Program Files\IAR      /
//                       Systems\Embedded Workbench                          /
//                       4.0\ARM\LIB\dl4tpannl8n.h" C:\medusa\i2cmaster.c    /
//    List file       =  C:\medusa\Debug\List\i2cmaster.s79                  /
//                                                                           /
//                                                                           /
//////////////////////////////////////////////////////////////////////////////

        NAME i2cmaster

        RTMODEL "ARMv4M", "USED"
        RTMODEL "StackAlign4", "USED"
        RTMODEL "__cpu_mode", "__pcs__arm"
        RTMODEL "__data_model", "absolute"
        RTMODEL "__endian", "little"
        RTMODEL "__rt_version", "6"

        RSEG CSTACK:DATA:NOROOT(2)
        RSEG IRQSTACK:DATA:NOROOT(2)

        EXTERN ??DiI_a
        EXTERN ??EnI_a

??DataTable0 EQU 0
??DataTable1 EQU 0
??DataTable10 EQU 0
??DataTable11 EQU 0
??DataTable12 EQU 0
??DataTable13 EQU 0
??DataTable14 EQU 0
??DataTable15 EQU 0
??DataTable16 EQU 0
??DataTable17 EQU 0
??DataTable18 EQU 0
??DataTable19 EQU 0
??DataTable2 EQU 0
??DataTable20 EQU 0
??DataTable21 EQU 0
??DataTable22 EQU 0
??DataTable23 EQU 0
??DataTable24 EQU 0
??DataTable25 EQU 0
??DataTable26 EQU 0
??DataTable27 EQU 0
??DataTable28 EQU 0
??DataTable29 EQU 0
??DataTable3 EQU 0
??DataTable30 EQU 0
??DataTable31 EQU 0
??DataTable32 EQU 0
??DataTable33 EQU 0
??DataTable34 EQU 0
??DataTable35 EQU 0
??DataTable36 EQU 0
??DataTable37 EQU 0
??DataTable38 EQU 0
??DataTable39 EQU 0
??DataTable4 EQU 0
??DataTable40 EQU 0
??DataTable42 EQU 0
??DataTable44 EQU 0
??DataTable46 EQU 0
??DataTable47 EQU 0
??DataTable48 EQU 0
??DataTable5 EQU 0
??DataTable50 EQU 0
??DataTable51 EQU 0
??DataTable52 EQU 0
??DataTable53 EQU 0
??DataTable56 EQU 0
??DataTable57 EQU 0
??DataTable58 EQU 0
??DataTable59 EQU 0
??DataTable6 EQU 0
??DataTable60 EQU 0
??DataTable61 EQU 0
??DataTable62 EQU 0
??DataTable63 EQU 0
??DataTable64 EQU 0
??DataTable65 EQU 0
??DataTable67 EQU 0
??DataTable68 EQU 0
??DataTable69 EQU 0
??DataTable7 EQU 0
??DataTable8 EQU 0
??DataTable9 EQU 0
        MULTWEAK ??rA??DiI_a
        MULTWEAK ??rA??EnI_a
        PUBWEAK ?init?tab?DATA_Z
        MULTWEAK armvicIntConnect??rA
        MULTWEAK armvicIntEnable??rA
        PUBLIC i2cmasterGet
        FUNCTION i2cmasterGet,0203H
        LOCFRAME CSTACK, 8, STACK
        PUBLIC i2cmasterGetData
        FUNCTION i2cmasterGetData,0203H
        LOCFRAME CSTACK, 12, STACK
        PUBLIC i2cmasterInit
        FUNCTION i2cmasterInit,0203H
        LOCFRAME CSTACK, 12, STACK
        PUBLIC i2cmasterProbe
        FUNCTION i2cmasterProbe,0203H
        LOCFRAME CSTACK, 12, STACK
        PUBLIC i2cmasterPut
        FUNCTION i2cmasterPut,0203H
        LOCFRAME CSTACK, 4, STACK
        PUBLIC i2cmasterReceive
        FUNCTION i2cmasterReceive,0203H
        LOCFRAME CSTACK, 20, STACK
        PUBLIC i2cmasterSend
        FUNCTION i2cmasterSend,0203H
        LOCFRAME CSTACK, 16, STACK
        PUBLIC i2cmasterSendMult
        FUNCTION i2cmasterSendMult,0203H
        LOCFRAME CSTACK, 28, STACK
        PUBLIC i2cmasterSendOne
        FUNCTION i2cmasterSendOne,0203H
        LOCFRAME CSTACK, 20, STACK
        FUNCTION i2cmasterSiIsr,0603H
        LOCFRAME CSTACK, 20, STACK
        FUNCTION reInitState,0203H
        LOCFRAME CSTACK, 4, STACK
        FUNCTION sendStartCondition,0203H
        LOCFRAME CSTACK, 8, STACK
        FUNCTION sendStopCondition,0203H
        LOCFRAME CSTACK, 4, STACK
        FUNCTION setState,0203H
        FUNCTION updateMasterReadState,0203H
        LOCFRAME CSTACK, 8, STACK
        FUNCTION updateMasterWriteState,0203H
        LOCFRAME CSTACK, 8, STACK
        FUNCTION waitUntilComplete,0203H
        
        CFI Names cfiNames0
        CFI StackFrame CFA R13 HUGEDATA
        CFI Resource R0:32, R1:32, R2:32, R3:32, R4:32, R5:32, R6:32, R7:32
        CFI Resource R8:32, R9:32, R10:32, R11:32, R12:32, CPSR:32, R13:32
        CFI Resource R14:32, SPSR:32
        CFI VirtualResource ?RET:32
        CFI EndNames cfiNames0
        
        CFI Common cfiCommon0 Using cfiNames0
        CFI CodeAlign 4
        CFI DataAlign 4
        CFI ReturnAddress ?RET CODE
        CFI CFA R13+0
        CFI R0 Undefined
        CFI R1 Undefined
        CFI R2 Undefined
        CFI R3 Undefined
        CFI R4 SameValue
        CFI R5 SameValue
        CFI R6 SameValue
        CFI R7 SameValue
        CFI R8 SameValue
        CFI R9 SameValue
        CFI R10 SameValue
        CFI R11 SameValue
        CFI R12 Undefined
        CFI CPSR SameValue
        CFI R14 Undefined
        CFI SPSR SameValue
        CFI ?RET R14
        CFI EndCommon cfiCommon0
        
        
        CFI Names cfiNames1
        CFI StackFrame CFA_R13_usr R13_usr HUGEDATA
        CFI StackFrame CFA_R13_irq R13_irq HUGEDATA
        CFI Resource R0:32, R1:32, R2:32, R3:32, R4:32, R5:32, R6:32, R7:32
        CFI Resource R8:32, R9:32, R10:32, R11:32, R12:32, CPSR:32, R13_usr:32
        CFI Resource R14_usr:32, R13_irq:32, R14_irq:32, SPSR_irq:32
        CFI VirtualResource ?RET:32
        CFI EndNames cfiNames1
        
        CFI Common cfiCommon1 Using cfiNames1
        CFI CodeAlign 4
        CFI DataAlign 4
        CFI ReturnAddress ?RET CODE
        CFI CFA_R13_usr R13_usr+0
        CFI CFA_R13_irq R13_irq+0
        CFI R0 SameValue
        CFI R1 SameValue
        CFI R2 SameValue
        CFI R3 SameValue
        CFI R4 SameValue
        CFI R5 SameValue
        CFI R6 SameValue
        CFI R7 SameValue
        CFI R8 SameValue
        CFI R9 SameValue
        CFI R10 SameValue
        CFI R11 SameValue
        CFI R12 SameValue
        CFI CPSR SPSR_irq
        CFI R14_usr SameValue
        CFI R14_irq Undefined
        CFI SPSR_irq Undefined
        CFI ?RET add(R14_irq, literal(-4))
        CFI EndCommon cfiCommon1
        
armvicIntConnect    SYMBOL "armvicIntConnect"
armvicIntEnable     SYMBOL "armvicIntEnable"
armvicIntConnect??rA SYMBOL "??rA", armvicIntConnect
armvicIntEnable??rA SYMBOL "??rA", armvicIntEnable

        EXTERN armvicIntConnect
        FUNCTION armvicIntConnect,0202H
        EXTERN armvicIntEnable
        FUNCTION armvicIntEnable,0202H


        RSEG DATA_Z:DATA:SORT:NOROOT(0)
currentState:
        DS8 1

        RSEG DATA_Z:DATA:SORT:NOROOT(0)
currentOp:
        DS8 1

        RSEG DATA_Z:DATA:SORT:NOROOT(0)
currentError:
        DS8 1

        RSEG DATA_Z:DATA:SORT:NOROOT(2)
sendStop:
        DS8 4

        RSEG DATA_Z:DATA:SORT:NOROOT(2)
readData:
        DS8 64

        RSEG DATA_Z:DATA:SORT:NOROOT(2)
readHead:
        DS8 4

        RSEG DATA_Z:DATA:SORT:NOROOT(2)
readTail:
        DS8 4

        RSEG DATA_Z:DATA:SORT:NOROOT(2)
readLen:
        DS8 4

        RSEG DATA_Z:DATA:SORT:NOROOT(2)
readRequestLen:
        DS8 4

        RSEG DATA_Z:DATA:SORT:NOROOT(2)
writeData:
        DS8 64

        RSEG DATA_Z:DATA:SORT:NOROOT(2)
writeHead:
        DS8 4

        RSEG DATA_Z:DATA:SORT:NOROOT(2)
writeTail:
        DS8 4

        RSEG DATA_Z:DATA:SORT:NOROOT(2)
writeLen:
        DS8 4

        RSEG DATA_Z:DATA:SORT:NOROOT(0)
mySlaveAddr:
        DS8 1

        RSEG DATA_Z:DATA:SORT:NOROOT(0)
slaveAddr:
        DS8 1

        RSEG DATA_Z:DATA:SORT:NOROOT(2)
isrEntry:
        DS8 4

        RSEG DATA_Z:DATA:SORT:NOROOT(2)
maxTxLen:
        DS8 4

        RSEG CODE:CODE:NOROOT(2)
        CFI Block cfiBlock0 Using cfiCommon0
        CFI Function setState
   CODE32      
setState:
   LDR         R1,??DataTable73   ;; currentState
   STRB        R0,[R1, #+0]
   MOV         PC,LR              ;; return
        CFI EndBlock cfiBlock0

        RSEG CODE:CODE:NOROOT(2)
        CFI Block cfiBlock1 Using cfiCommon0
        CFI Function sendStartCondition
   CODE32      
sendStartCondition:
   STMDB       SP!,{R4,LR}        ;; Push
        CFI ?RET Frame(CFA, -4)
        CFI R4 Frame(CFA, -8)
        CFI CFA R13+8
   MVN         R0,#+0x0
   MOV         R4,R0
   LDR         R1,??DataTable73   ;; currentState
   LDRB        R2,[R1, #+0]
   CMP         R2,#+0x0
   BEQ         ??sendStartCondition_0
   LDR         R3,??DataTable73   ;; currentState
   LDRB        R12,[R3, #+0]
   CMP         R12,#+0x1
   BNE         ??sendStartCondition_1
??sendStartCondition_0:
   MOV         LR,#+0xE0000000
   ORR         LR,LR,#+0x1C000
   MOV         R0,#+0x20
   STR         R0,[LR, #+0]
   MOV         R0,#+0x2
   BL          setState
   MOV         R1,#+0x0
   MOV         R4,R1
??sendStartCondition_1:
   MOV         R0,R4
   LDMIA       SP!,{R4,PC}        ;; return
        CFI EndBlock cfiBlock1

        RSEG CODE:CODE:NOROOT(2)
        CFI Block cfiBlock2 Using cfiCommon0
        CFI Function sendStopCondition
   CODE32      
sendStopCondition:
   STMDB       SP!,{LR}           ;; Push
        CFI ?RET Frame(CFA, -4)
        CFI CFA R13+4
   MOV         R0,#+0xE0000000
   ORR         R0,R0,#+0x1C000
   MOV         R1,#+0x10
   STR         R1,[R0, #+0]
   MOV         R0,#+0x0
   BL          setState
   LDMIA       SP!,{PC}           ;; return
        CFI EndBlock cfiBlock2

        RSEG CODE:CODE:NOROOT(2)
        CFI Block cfiBlock3 Using cfiCommon0
        CFI Function waitUntilComplete
   CODE32      
waitUntilComplete:
??waitUntilComplete_0:
   LDR         R0,??DataTable73   ;; currentState
   LDRB        R1,[R0, #+0]
   CMP         R1,#+0x2
   BEQ         ??waitUntilComplete_0
   MOV         PC,LR              ;; return
        CFI EndBlock cfiBlock3

        RSEG CODE:CODE:NOROOT(2)
        CFI Block cfiBlock4 Using cfiCommon0
        CFI Function reInitState
   CODE32      
reInitState:
   STMDB       SP!,{LR}           ;; Push
        CFI ?RET Frame(CFA, -4)
        CFI CFA R13+4
   MOV         R0,#+0x0
   BL          setState
   LDR         R0,??DataTable70   ;; currentOp
   MOV         R1,#+0x0
   STRB        R1,[R0, #+0]
   LDR         R2,??DataTable41   ;; currentError
   MOV         R3,#+0x0
   STRB        R3,[R2, #+0]
   LDMIA       SP!,{PC}           ;; return
        CFI EndBlock cfiBlock4

        RSEG DATA_Z:DATA:SORT:NOROOT(1)
tmp:
        DS8 2

        RSEG DATA_Z:DATA:SORT:NOROOT(2)
regData:
        DS8 4

        RSEG CODE:CODE:NOROOT(2)
        CFI Block cfiBlock5 Using cfiCommon0
        CFI Function updateMasterReadState
   CODE32      
updateMasterReadState:
   STMDB       SP!,{R4,LR}        ;; Push
        CFI ?RET Frame(CFA, -4)
        CFI R4 Frame(CFA, -8)
        CFI CFA R13+8
   MOV         R4,R0
   MOV         R2,R4
   SUB         R2,R2,#+0x8
   CMP         R2,#+0x50
   BHI         ??updateMasterReadState_0
   ADR         R3,`?<Jumptable for updateMasterReadState>_0`
   LDRB        R3,[R3, R2]
   ADD         PC,PC,R3, LSL #+2
   DATA        
`?<Jumptable for updateMasterReadState>_0`:
   DC8         +0x14,+0xCC,+0xCC,+0xCC
   DC8         +0xCC,+0xCC,+0xCC,+0xCC
   DC8         +0x14,+0xCC,+0xCC,+0xCC
   DC8         +0xCC,+0xCC,+0xCC,+0xCC
   DC8         +0xCC,+0xCC,+0xCC,+0xCC
   DC8         +0xCC,+0xCC,+0xCC,+0xCC
   DC8         +0xCC,+0xCC,+0xCC,+0xCC
   DC8         +0xCC,+0xCC,+0xCC,+0xCC
   DC8         +0xCC,+0xCC,+0xCC,+0xCC
   DC8         +0xCC,+0xCC,+0xCC,+0xCC
   DC8         +0xCC,+0xCC,+0xCC,+0xCC
   DC8         +0xCC,+0xCC,+0xCC,+0xCC
   DC8         +0x1E,+0xCC,+0xCC,+0xCC
   DC8         +0xCC,+0xCC,+0xCC,+0xCC
   DC8         +0x24,+0xCC,+0xCC,+0xCC
   DC8         +0xCC,+0xCC,+0xCC,+0xCC
   DC8         +0x72,+0xCC,+0xCC,+0xCC
   DC8         +0xCC,+0xCC,+0xCC,+0xCC
   DC8         +0x31,+0xCC,+0xCC,+0xCC
   DC8         +0xCC,+0xCC,+0xCC,+0xCC
   DC8         +0x7C,+0x0,+0x0,+0x0
   CODE32      
??updateMasterReadState_1:
   LDR         R12,??DataTable43  ;; 0xe001c018
   MOV         LR,#+0x20
   STR         LR,[R12, #+0]
   MOV         R0,#+0xE0000008
   ORR         R0,R0,#+0x1C000
   LDR         R1,??DataTable71   ;; slaveAddr
   LDRB        R2,[R1, #+0]
   ANDS        R2,R2,#+0xFF       ;; Zero extend
   STR         R2,[R0, #+0]
   B           ??updateMasterReadState_0
??updateMasterReadState_2:
   MOV         R0,#+0x3
   BL          setState
   LDR         R3,??DataTable41   ;; currentError
   MOV         R12,#+0x3
   STRB        R12,[R3, #+0]
   B           ??updateMasterReadState_0
??updateMasterReadState_3:
   LDR         LR,??DataTable66   ;; readRequestLen
   LDR         R0,[LR, #+0]
   CMP         R0,#+0x1
   BNE         ??updateMasterReadState_4
   LDR         R1,??DataTable43   ;; 0xe001c018
   MOV         R2,#+0x4
   STR         R2,[R1, #+0]
   B           ??updateMasterReadState_0
??updateMasterReadState_4:
   MOV         R3,#+0xE0000000
   ORR         R3,R3,#+0x1C000
   MOV         R12,#+0x4
   STR         R12,[R3, #+0]
   B           ??updateMasterReadState_0
??updateMasterReadState_5:
   LDR         LR,??DataTable66   ;; readRequestLen
   LDR         R0,[LR, #+0]
   CMP         R0,#+0x1
   BLT         ??updateMasterReadState_0
   LDR         R1,??DataTable54   ;; readLen
   LDR         R2,[R1, #+0]
   CMP         R2,#+0x20
   BEQ         ??updateMasterReadState_0
   LDR         R3,??updateMasterReadState_6  ;; tmp
   MOV         R12,#+0x0
   STRH        R12,[R3, #+0]
   LDR         LR,??updateMasterReadState_6+4  ;; regData
   MOV         R0,#+0xE0000008
   ORR         R0,R0,#+0x1C000
   LDR         R1,[R0, #+0]
   STR         R1,[LR, #+0]
   LDR         R2,??updateMasterReadState_6  ;; tmp
   LDR         R3,??updateMasterReadState_6  ;; tmp
   LDRH        R12,[R3, #+0]
   LDR         LR,??updateMasterReadState_6+4  ;; regData
   LDR         R0,[LR, #+0]
   ANDS        R1,R0,#+0xFF       ;; Zero extend
   ORRS        R3,R1,R12
   STRH        R3,[R2, #+0]
   LDR         R2,??updateMasterReadState_6+8  ;; readHead
   LDR         R12,[R2, #+0]
   MOV         LR,#+0x2
   LDR         R0,??DataTable55   ;; readData
   MLAS        R1,LR,R12,R0
   LDR         R3,??updateMasterReadState_6  ;; tmp
   LDRH        R2,[R3, #+0]
   STRH        R2,[R1, #+0]
   LDR         R12,??updateMasterReadState_6+8  ;; readHead
   LDR         LR,[R12, #+0]
   CMP         LR,#+0x1F
   BNE         ??updateMasterReadState_7
   MOV         R0,#+0x0
   LDR         R1,??updateMasterReadState_6+8  ;; readHead
   STR         R0,[R1, #+0]
   B           ??updateMasterReadState_8
??updateMasterReadState_7:
   LDR         R0,??updateMasterReadState_6+8  ;; readHead
   LDR         R0,[R0, #+0]
   LDR         R3,??updateMasterReadState_6+8  ;; readHead
   LDR         R2,??updateMasterReadState_6+8  ;; readHead
   LDR         R12,[R2, #+0]
   ADDS        LR,R12,#+0x1
   STR         LR,[R3, #+0]
??updateMasterReadState_8:
   LDR         R1,??DataTable54   ;; readLen
   LDR         R0,??DataTable54   ;; readLen
   LDR         R3,[R0, #+0]
   ADDS        R2,R3,#+0x1
   STR         R2,[R1, #+0]
   LDR         R12,??DataTable66  ;; readRequestLen
   LDR         LR,??DataTable66   ;; readRequestLen
   LDR         R1,[LR, #+0]
   SUBS        R0,R1,#+0x1
   STR         R0,[R12, #+0]
   LDR         R3,??DataTable66   ;; readRequestLen
   LDR         R2,[R3, #+0]
   CMP         R2,#+0x1
   BNE         ??updateMasterReadState_0
   LDR         R12,??DataTable43  ;; 0xe001c018
   MOV         LR,#+0x4
   STR         LR,[R12, #+0]
   B           ??updateMasterReadState_0
??updateMasterReadState_9:
   MOV         R1,#+0xE0000000
   ORR         R1,R1,#+0x1C000
   MOV         R0,#+0x10
   STR         R0,[R1, #+0]
   MOV         R0,#+0x3
   BL          setState
   LDR         R3,??DataTable41   ;; currentError
   MOV         R2,#+0x1
   STRB        R2,[R3, #+0]
   B           ??updateMasterReadState_0
??updateMasterReadState_10:
   LDR         R12,??DataTable66  ;; readRequestLen
   LDR         LR,[R12, #+0]
   CMP         LR,#+0x1
   BNE         ??updateMasterReadState_11
   LDR         R1,??DataTable54   ;; readLen
   LDR         R0,[R1, #+0]
   CMP         R0,#+0x20
   BEQ         ??updateMasterReadState_11
   LDR         R3,??updateMasterReadState_6  ;; tmp
   MOV         R2,#+0x0
   STRH        R2,[R3, #+0]
   LDR         R12,??updateMasterReadState_6+4  ;; regData
   MOV         LR,#+0xE0000008
   ORR         LR,LR,#+0x1C000
   LDR         R1,[LR, #+0]
   STR         R1,[R12, #+0]
   LDR         R0,??updateMasterReadState_6  ;; tmp
   LDR         R3,??updateMasterReadState_6  ;; tmp
   LDRH        R2,[R3, #+0]
   LDR         R12,??updateMasterReadState_6+4  ;; regData
   LDR         LR,[R12, #+0]
   ANDS        R1,LR,#+0xFF       ;; Zero extend
   ORRS        R3,R1,R2
   STRH        R3,[R0, #+0]
   LDR         R0,??updateMasterReadState_6+8  ;; readHead
   LDR         R2,[R0, #+0]
   MOV         R12,#+0x2
   LDR         LR,??DataTable55   ;; readData
   MLAS        R1,R12,R2,LR
   LDR         R3,??updateMasterReadState_6  ;; tmp
   LDRH        R0,[R3, #+0]
   STRH        R0,[R1, #+0]
   LDR         R2,??updateMasterReadState_6+8  ;; readHead
   LDR         R12,[R2, #+0]
   CMP         R12,#+0x1F
   BNE         ??updateMasterReadState_12
   MOV         R1,#+0x0
   LDR         LR,??updateMasterReadState_6+8  ;; readHead
   STR         R1,[LR, #+0]
   B           ??updateMasterReadState_13
??updateMasterReadState_12:
   LDR         R1,??updateMasterReadState_6+8  ;; readHead
   LDR         R1,[R1, #+0]
   LDR         R3,??updateMasterReadState_6+8  ;; readHead
   LDR         R0,??updateMasterReadState_6+8  ;; readHead
   LDR         R2,[R0, #+0]
   ADDS        R12,R2,#+0x1
   STR         R12,[R3, #+0]
??updateMasterReadState_13:
   LDR         LR,??DataTable54   ;; readLen
   LDR         R1,??DataTable54   ;; readLen
   LDR         R3,[R1, #+0]
   ADDS        R0,R3,#+0x1
   STR         R0,[LR, #+0]
   LDR         R2,??DataTable66   ;; readRequestLen
   LDR         R12,??DataTable66  ;; readRequestLen
   LDR         LR,[R12, #+0]
   SUBS        R1,LR,#+0x1
   STR         R1,[R2, #+0]
   LDR         R3,??DataTable72   ;; sendStop
   LDR         R0,[R3, #+0]
   CMP         R0,#+0x1
   BNE         ??updateMasterReadState_14
   MOV         R2,#+0xE0000000
   ORR         R2,R2,#+0x1C000
   MOV         R12,#+0x10
   STR         R12,[R2, #+0]
   MOV         R0,#+0x0
   BL          setState
   B           ??updateMasterReadState_0
??updateMasterReadState_14:
   MOV         R0,#+0x1
   BL          setState
   B           ??updateMasterReadState_0
??updateMasterReadState_11:
   MOV         LR,#+0xE0000000
   ORR         LR,LR,#+0x1C000
   MOV         R1,#+0x10
   STR         R1,[LR, #+0]
   MOV         R0,#+0x3
   BL          setState
   LDR         R3,??DataTable41   ;; currentError
   MOV         R0,#+0x2
   STRB        R0,[R3, #+0]
??updateMasterReadState_0:
   LDMIA       SP!,{R4,PC}        ;; return
   DATA        
??updateMasterReadState_6:
   DC32        tmp
   DC32        regData
   DC32        readHead
        CFI EndBlock cfiBlock5

        RSEG CODE:CODE:NOROOT(2)
        CFI Block cfiBlock6 Using cfiCommon0
        CFI Function updateMasterWriteState
   CODE32      
updateMasterWriteState:
   STMDB       SP!,{R4,LR}        ;; Push
        CFI ?RET Frame(CFA, -4)
        CFI R4 Frame(CFA, -8)
        CFI CFA R13+8
   MOV         R4,R0
   MOV         R1,R4
   SUB         R1,R1,#+0x8
   CMP         R1,#+0x30
   BHI         ??updateMasterWriteState_0
   ADR         R2,`?<Jumptable for updateMasterWriteState>_0`
   LDRB        R2,[R2, R1]
   ADD         PC,PC,R2, LSL #+2
   DATA        
`?<Jumptable for updateMasterWriteState>_0`:
   DC8         +0xC,+0x79,+0x79,+0x79
   DC8         +0x79,+0x79,+0x79,+0x79
   DC8         +0xC,+0x79,+0x79,+0x79
   DC8         +0x79,+0x79,+0x79,+0x79
   DC8         +0x16,+0x79,+0x79,+0x79
   DC8         +0x79,+0x79,+0x79,+0x79
   DC8         +0x60,+0x79,+0x79,+0x79
   DC8         +0x79,+0x79,+0x79,+0x79
   DC8         +0x16,+0x79,+0x79,+0x79
   DC8         +0x79,+0x79,+0x79,+0x79
   DC8         +0x6A,+0x79,+0x79,+0x79
   DC8         +0x79,+0x79,+0x79,+0x79
   DC8         +0x74,+0x0,+0x0,+0x0
   CODE32      
??updateMasterWriteState_1:
   LDR         R3,??DataTable43   ;; 0xe001c018
   MOV         R12,#+0x20
   STR         R12,[R3, #+0]
   MOV         LR,#+0xE0000008
   ORR         LR,LR,#+0x1C000
   LDR         R0,??DataTable71   ;; slaveAddr
   LDRB        R1,[R0, #+0]
   ANDS        R1,R1,#+0xFF       ;; Zero extend
   STR         R1,[LR, #+0]
   B           ??updateMasterWriteState_0
??updateMasterWriteState_2:
   LDR         R2,??DataTable70   ;; currentOp
   LDRB        R3,[R2, #+0]
   CMP         R3,#+0x1
   BNE         ??updateMasterWriteState_3
   MOV         R12,#+0xE0000000
   ORR         R12,R12,#+0x1C000
   MOV         LR,#+0x10
   STR         LR,[R12, #+0]
   MOV         R0,#+0x0
   BL          setState
   B           ??updateMasterWriteState_0
??updateMasterWriteState_3:
   LDR         R0,??DataTable70   ;; currentOp
   LDRB        R1,[R0, #+0]
   CMP         R1,#+0x3
   BNE         ??updateMasterWriteState_4
   LDR         R2,??DataTable49   ;; writeLen
   LDR         R3,[R2, #+0]
   CMP         R3,#+0x1
   BLT         ??updateMasterWriteState_4
   MOV         R12,#+0xE0000004
   ORR         R12,R12,#+0x28000
   MOV         LR,#+0x200
   STR         LR,[R12, #+0]
   MOV         R0,#+0xE0000008
   ORR         R0,R0,#+0x1C000
   LDR         R1,??updateMasterWriteState_5  ;; writeTail
   LDR         R2,[R1, #+0]
   MOV         R3,#+0x2
   LDR         R12,??DataTable45  ;; writeData
   MLAS        LR,R3,R2,R12
   LDRH        R1,[LR, #+0]
   MOV         R1,R1, LSL #+16
   MOVS        R1,R1, LSR #+16
   ANDS        R2,R1,#+0xFF       ;; Zero extend
   STR         R2,[R0, #+0]
   LDR         R0,??updateMasterWriteState_5  ;; writeTail
   LDR         R3,[R0, #+0]
   CMP         R3,#+0x1F
   BNE         ??updateMasterWriteState_6
   MOV         R0,#+0x0
   LDR         R12,??updateMasterWriteState_5  ;; writeTail
   STR         R0,[R12, #+0]
   B           ??updateMasterWriteState_7
??updateMasterWriteState_6:
   LDR         LR,??updateMasterWriteState_5  ;; writeTail
   LDR         R0,[LR, #+0]
   LDR         R1,??updateMasterWriteState_5  ;; writeTail
   LDR         R2,??updateMasterWriteState_5  ;; writeTail
   LDR         R3,[R2, #+0]
   ADDS        R12,R3,#+0x1
   STR         R12,[R1, #+0]
??updateMasterWriteState_7:
   LDR         R0,??DataTable49   ;; writeLen
   LDR         LR,??DataTable49   ;; writeLen
   LDR         R1,[LR, #+0]
   SUBS        R2,R1,#+0x1
   STR         R2,[R0, #+0]
   MOV         R3,#+0xE000000C
   ORR         R3,R3,#+0x28000
   MOV         R12,#+0x200
   STR         R12,[R3, #+0]
   B           ??updateMasterWriteState_0
??updateMasterWriteState_4:
   LDR         R0,??DataTable72   ;; sendStop
   LDR         LR,[R0, #+0]
   CMP         LR,#+0x1
   BNE         ??updateMasterWriteState_8
   MOV         R1,#+0xE0000000
   ORR         R1,R1,#+0x1C000
   MOV         R2,#+0x10
   STR         R2,[R1, #+0]
   MOV         R0,#+0x0
   BL          setState
   B           ??updateMasterWriteState_0
??updateMasterWriteState_8:
   MOV         R0,#+0x1
   BL          setState
   B           ??updateMasterWriteState_0
??updateMasterWriteState_9:
   MOV         R3,#+0xE0000000
   ORR         R3,R3,#+0x1C000
   MOV         R12,#+0x10
   STR         R12,[R3, #+0]
   MOV         R0,#+0x3
   BL          setState
   LDR         R0,??DataTable41   ;; currentError
   MOV         LR,#+0x1
   STRB        LR,[R0, #+0]
   B           ??updateMasterWriteState_0
??updateMasterWriteState_10:
   MOV         R1,#+0xE0000000
   ORR         R1,R1,#+0x1C000
   MOV         R2,#+0x10
   STR         R2,[R1, #+0]
   MOV         R0,#+0x3
   BL          setState
   LDR         R3,??DataTable41   ;; currentError
   MOV         R12,#+0x2
   STRB        R12,[R3, #+0]
   B           ??updateMasterWriteState_0
??updateMasterWriteState_11:
   MOV         R0,#+0x3
   BL          setState
   LDR         R0,??DataTable41   ;; currentError
   MOV         LR,#+0x3
   STRB        LR,[R0, #+0]
??updateMasterWriteState_0:
   LDMIA       SP!,{R4,PC}        ;; return
   DATA        
??updateMasterWriteState_5:
   DC32        writeTail
        CFI EndBlock cfiBlock6

        RSEG CODE:CODE:NOROOT(2)
   DATA        
??DataTable41:
   DC32        currentError

        RSEG DATA_Z:DATA:SORT:NOROOT(2)
pollStatus:
        DS8 4

        RSEG CODE:CODE:NOROOT(2)
        CFI Block cfiBlock7 Using cfiCommon1
        CFI Function i2cmasterSiIsr
   CODE32      
i2cmasterSiIsr:
   SUB         LR,LR,#+0x4
        CFI ?RET R14_irq
   STMDB       SP!,{LR}
        CFI ?RET Frame(CFA_R13_irq, -4)
        CFI CFA_R13_irq R13_irq+4
   MRS         LR,SPSR
        CFI SPSR_irq R14_irq
   STMDB       SP!,{R12,LR}
        CFI R14_irq Frame(CFA_R13_irq, -8)
        CFI R12 Frame(CFA_R13_irq, -12)
        CFI CFA_R13_irq R13_irq+12
   MRS         LR,CPSR
   ORR         LR,LR,#+0x1F
   MSR         CPSR,LR
   STMDB       SP!,{R0-R3,LR}     ;; Push
        CFI R14_usr Frame(CFA_R13_usr, -4)
        CFI R3 Frame(CFA_R13_usr, -8)
        CFI R2 Frame(CFA_R13_usr, -12)
        CFI R1 Frame(CFA_R13_usr, -16)
        CFI R0 Frame(CFA_R13_usr, -20)
        CFI CFA_R13_usr R13_usr+20
   LDR         R0,??i2cmasterSiIsr_0  ;; isrEntry
   LDR         R1,??i2cmasterSiIsr_0  ;; isrEntry
   LDR         R1,[R1, #+0]
   ADDS        R1,R1,#+0x1
   STR         R1,[R0, #+0]
   LDR         R0,??i2cmasterSiIsr_0+4  ;; pollStatus
   MOV         R1,#+0xE0000004
   ORR         R1,R1,#+0x1C000
   LDR         R1,[R1, #+0]
   ANDS        R1,R1,#+0xFF       ;; Zero extend
   STR         R1,[R0, #+0]
   LDR         R0,??DataTable70   ;; currentOp
   LDRB        R1,[R0, #+0]
   ANDS        R1,R1,#+0xFF       ;; Zero extend
   CMP         R1,#+0x1
   BEQ         ??i2cmasterSiIsr_1
   CMP         R1,#+0x2
   BEQ         ??i2cmasterSiIsr_2
   CMP         R1,#+0x3
   BNE         ??i2cmasterSiIsr_3
??i2cmasterSiIsr_1:
   LDR         R1,??i2cmasterSiIsr_0+4  ;; pollStatus
   LDR         R0,[R1, #+0]
   BL          updateMasterWriteState
   B           ??i2cmasterSiIsr_3
??i2cmasterSiIsr_2:
   LDR         R0,??i2cmasterSiIsr_0+4  ;; pollStatus
   LDR         R0,[R0, #+0]
   BL          updateMasterReadState
??i2cmasterSiIsr_3:
   LDR         R1,??DataTable43   ;; 0xe001c018
   MOV         R2,#+0x8
   STR         R2,[R1, #+0]
   MVN         R3,#+0xCF
   BIC         R3,R3,#+0xF00
   MOV         R12,#+0x0
   STR         R12,[R3, #+0]
   LDMIA       SP!,{R0-R3,LR}     ;; Pop
        CFI R0 SameValue
        CFI R1 SameValue
        CFI R2 SameValue
        CFI R3 SameValue
        CFI R14_usr SameValue
        CFI CFA_R13_usr R13_usr+0
   MRS         R12,CPSR
   ORR         R12,R12,#+0x92
   BIC         R12,R12,#+0xD
   MSR         CPSR,R12
   LDMIA       SP!,{R12,LR}
        CFI R12 SameValue
        CFI CFA_R13_irq R13_irq+4
   MSR         SPSR,LR
        CFI R14_irq SPSR_irq
   LDMIA       SP!,{PC}^          ;; return
   DATA        
??i2cmasterSiIsr_0:
   DC32        isrEntry
   DC32        pollStatus
        CFI EndBlock cfiBlock7

        RSEG CODE:CODE:NOROOT(2)
   DATA        
??DataTable43:
   DC32        0xe001c018

        RSEG CODE:CODE:NOROOT(2)
        CFI Block cfiBlock8 Using cfiCommon0
        CFI Function i2cmasterInit
   CODE32      
i2cmasterInit:
   STMDB       SP!,{R4,R5,LR}     ;; Push
        CFI ?RET Frame(CFA, -4)
        CFI R5 Frame(CFA, -8)
        CFI R4 Frame(CFA, -12)
        CFI CFA R13+12
   MOV         R4,R0
   LDR         R0,??i2cmasterInit_0  ;; mySlaveAddr
   STRB        R4,[R0, #+0]
   BL          reInitState
   LDR         R1,??i2cmasterInit_0+4  ;; 0xe001c014
   MOV         R2,#+0x8000
   STR         R2,[R1, #+0]
   LDR         R3,??i2cmasterInit_0+8  ;; 0xe001c010
   MOV         R12,#+0x8000
   STR         R12,[R3, #+0]
   MOV         LR,#+0xE0000000
   ORR         LR,LR,#+0x1C000
   MOV         R0,#+0x40
   STR         R0,[LR, #+0]
   BL          sendStopCondition
   LDR         R1,??i2cmasterInit_0+12  ;; i2cmasterSiIsr
   MOV         R0,#+0x9
   _BLF        armvicIntConnect,armvicIntConnect??rA
   MOV         R5,R0
   CMP         R0,#+0x0
   BEQ         ??i2cmasterInit_1
   MOV         R0,R5
   B           ??i2cmasterInit_2
??i2cmasterInit_1:
   MOV         R0,#+0x9
   _BLF        armvicIntEnable,armvicIntEnable??rA
   MOV         R5,R0
   CMP         R0,#+0x0
   BEQ         ??i2cmasterInit_3
   MOV         R0,R5
   B           ??i2cmasterInit_2
??i2cmasterInit_3:
   MOV         R0,#+0x0
??i2cmasterInit_2:
   LDMIA       SP!,{R4,R5,PC}     ;; return
   DATA        
??i2cmasterInit_0:
   DC32        mySlaveAddr
   DC32        0xe001c014
   DC32        0xe001c010
   DC32        i2cmasterSiIsr
        CFI EndBlock cfiBlock8

        RSEG CODE:CODE:NOROOT(2)
        CFI Block cfiBlock9 Using cfiCommon0
        CFI Function i2cmasterPut
   CODE32      
i2cmasterPut:
   STMDB       SP!,{LR}           ;; Push
        CFI ?RET Frame(CFA, -4)
        CFI CFA R13+4
   MOV         R2,R0
   MVN         R12,#+0x0
   MOV         R0,R12
   LDR         LR,??DataTable49   ;; writeLen
   LDR         R3,[LR, #+0]
   CMP         R3,#+0x20
   BEQ         ??i2cmasterPut_0
   _BLF        ??DiI_a,??rA??DiI_a
   LDR         R12,??i2cmasterPut_1  ;; writeHead
   LDR         LR,[R12, #+0]
   MOV         R3,#+0x2
   LDR         R12,??DataTable45  ;; writeData
   MLAS        LR,R3,LR,R12
   MOV         R3,R2
   ANDS        R3,R3,#+0xFF       ;; Zero extend
   MOV         R12,R1
   ANDS        R12,R12,#+0xFF     ;; Zero extend
   ORRS        R3,R12,R3, LSL #+8
   STRH        R3,[LR, #+0]
   LDR         LR,??DataTable49   ;; writeLen
   LDR         R12,??DataTable49  ;; writeLen
   LDR         R3,[R12, #+0]
   ADDS        R12,R3,#+0x1
   STR         R12,[LR, #+0]
   LDR         LR,??i2cmasterPut_1  ;; writeHead
   LDR         R3,[LR, #+0]
   CMP         R3,#+0x1F
   BNE         ??i2cmasterPut_2
   MOV         R3,#+0x0
   LDR         R12,??i2cmasterPut_1  ;; writeHead
   STR         R3,[R12, #+0]
   B           ??i2cmasterPut_3
??i2cmasterPut_2:
   LDR         LR,??i2cmasterPut_1  ;; writeHead
   LDR         R3,[LR, #+0]
   LDR         R12,??i2cmasterPut_1  ;; writeHead
   LDR         LR,??i2cmasterPut_1  ;; writeHead
   LDR         LR,[LR, #+0]
   ADDS        LR,LR,#+0x1
   STR         LR,[R12, #+0]
??i2cmasterPut_3:
   _BLF        ??EnI_a,??rA??EnI_a
   LDR         R3,??i2cmasterPut_1+4  ;; maxTxLen
   LDR         R12,[R3, #+0]
   LDR         LR,??DataTable49   ;; writeLen
   LDR         R3,[LR, #+0]
   CMP         R12,R3
   BCS         ??i2cmasterPut_4
   LDR         R12,??i2cmasterPut_1+4  ;; maxTxLen
   LDR         LR,??DataTable49   ;; writeLen
   LDR         R3,[LR, #+0]
   STR         R3,[R12, #+0]
   B           ??i2cmasterPut_5
??i2cmasterPut_4:
   LDR         R12,??i2cmasterPut_1+4  ;; maxTxLen
   LDR         LR,??i2cmasterPut_1+4  ;; maxTxLen
   LDR         R3,[LR, #+0]
   STR         R3,[R12, #+0]
??i2cmasterPut_5:
   MOV         R12,#+0x0
   MOV         R0,R12
??i2cmasterPut_0:
   LDMIA       SP!,{PC}           ;; return
   DATA        
??i2cmasterPut_1:
   DC32        writeHead
   DC32        maxTxLen
        CFI EndBlock cfiBlock9

        RSEG CODE:CODE:NOROOT(2)
   DATA        
??DataTable45:
   DC32        writeData

        RSEG CODE:CODE:NOROOT(2)
   DATA        
??DataTable49:
   DC32        writeLen

        RSEG CODE:CODE:NOROOT(2)
        CFI Block cfiBlock10 Using cfiCommon0
        CFI Function i2cmasterGetData
   CODE32      
i2cmasterGetData:
   STMDB       SP!,{R4,LR}        ;; Push
        CFI ?RET Frame(CFA, -4)
        CFI R4 Frame(CFA, -8)
        CFI CFA R13+8
   SUB         SP,SP,#+0x4
        CFI CFA R13+12
   MOV         R4,R0
   MOV         R1,R4
   MOV         R0,SP
   BL          i2cmasterGet
   ADD         SP,SP,#+0x4        ;; stack cleaning
        CFI CFA R13+8
   LDMIA       SP!,{R4,PC}        ;; return
        CFI EndBlock cfiBlock10

        RSEG CODE:CODE:NOROOT(2)
        CFI Block cfiBlock11 Using cfiCommon0
        CFI Function i2cmasterGet
   CODE32      
i2cmasterGet:
   STMDB       SP!,{R4,LR}        ;; Push
        CFI ?RET Frame(CFA, -4)
        CFI R4 Frame(CFA, -8)
        CFI CFA R13+8
   MOV         R3,R0
   MVN         LR,#+0x0
   MOV         R0,LR
   LDR         R12,??DataTable54  ;; readLen
   LDR         LR,[R12, #+0]
   CMP         LR,#+0x0
   BEQ         ??i2cmasterGet_0
??i2cmasterGet_1:
   CMP         R1,#+0x0
   BEQ         ??i2cmasterGet_2
   CMP         R3,#+0x0
   BEQ         ??i2cmasterGet_2
   LDR         R12,??DataTable73  ;; currentState
   LDRB        LR,[R12, #+0]
   CMP         LR,#+0x0
   BEQ         ??i2cmasterGet_3
??i2cmasterGet_2:
   B           ??i2cmasterGet_0
??i2cmasterGet_3:
   LDR         R12,??i2cmasterGet_4  ;; readTail
   LDR         LR,[R12, #+0]
   MOV         R12,#+0x2
   LDR         R4,??DataTable55   ;; readData
   MLAS        LR,R12,LR,R4
   LDRH        R12,[LR, #+0]
   MOV         R2,R12
   _BLF        ??DiI_a,??rA??DiI_a
   LDR         R4,??i2cmasterGet_4  ;; readTail
   LDR         LR,[R4, #+0]
   CMP         LR,#+0x1F
   BNE         ??i2cmasterGet_5
   MOV         R12,#+0x0
   LDR         R4,??i2cmasterGet_4  ;; readTail
   STR         R12,[R4, #+0]
   B           ??i2cmasterGet_6
??i2cmasterGet_5:
   LDR         R12,??i2cmasterGet_4  ;; readTail
   LDR         R12,[R12, #+0]
   LDR         LR,??i2cmasterGet_4  ;; readTail
   LDR         R4,??i2cmasterGet_4  ;; readTail
   LDR         R4,[R4, #+0]
   ADDS        R4,R4,#+0x1
   STR         R4,[LR, #+0]
??i2cmasterGet_6:
   LDR         R12,??DataTable54  ;; readLen
   LDR         LR,??DataTable54   ;; readLen
   LDR         R4,[LR, #+0]
   SUBS        LR,R4,#+0x1
   STR         LR,[R12, #+0]
   _BLF        ??EnI_a,??rA??EnI_a
   MOV         R12,R2
   MOV         R12,R12, LSL #+16
   MOVS        R12,R12, LSR #+16
   MOV         R4,#+0x2
   LDR         LR,??DataTable55   ;; readData
   MLAS        R12,R4,R12,LR
   LDRH        R4,[R12, #+0]
   MOV         R4,R4, LSL #+16
   MOVS        R4,R4, LSR #+16
   MOV         LR,R4, LSR #+8
   STRB        LR,[R3, #+0]
   MOV         R12,R2
   STRB        R12,[R1, #+0]
   MOV         R4,#+0x0
   MOV         R0,R4
??i2cmasterGet_0:
   LDMIA       SP!,{R4,PC}        ;; return
   DATA        
??i2cmasterGet_4:
   DC32        readTail
        CFI EndBlock cfiBlock11

        RSEG CODE:CODE:NOROOT(2)
   DATA        
??DataTable54:
   DC32        readLen

        RSEG CODE:CODE:NOROOT(2)
   DATA        
??DataTable55:
   DC32        readData

        RSEG CODE:CODE:NOROOT(2)
        CFI Block cfiBlock12 Using cfiCommon0
        CFI Function i2cmasterProbe
   CODE32      
i2cmasterProbe:
   STMDB       SP!,{R4,R5,LR}     ;; Push
        CFI ?RET Frame(CFA, -4)
        CFI R5 Frame(CFA, -8)
        CFI R4 Frame(CFA, -12)
        CFI CFA R13+12
   MOV         R4,R0
   MVN         R0,#+0x0
   MOV         R5,R0
   LDR         R1,??DataTable73   ;; currentState
   LDRB        R2,[R1, #+0]
   CMP         R2,#+0x2
   BEQ         ??i2cmasterProbe_0
   LDR         R3,??DataTable73   ;; currentState
   LDRB        R12,[R3, #+0]
   CMP         R12,#+0x3
   BNE         ??i2cmasterProbe_1
??i2cmasterProbe_0:
   MOV         R0,R5
   B           ??i2cmasterProbe_2
??i2cmasterProbe_1:
   LDR         LR,??DataTable70   ;; currentOp
   MOV         R0,#+0x1
   STRB        R0,[LR, #+0]
   LDR         R1,??DataTable71   ;; slaveAddr
   MOV         R2,R4
   ANDS        R2,R2,#+0xFF       ;; Zero extend
   ANDS        R3,R2,#+0xFE
   STRB        R3,[R1, #+0]
   BL          sendStartCondition
   CMP         R0,#+0x0
   BNE         ??i2cmasterProbe_3
   BL          waitUntilComplete
   LDR         R12,??DataTable73  ;; currentState
   LDRB        LR,[R12, #+0]
   CMP         LR,#+0x3
   BNE         ??i2cmasterProbe_4
   MVN         R5,#+0x0
   B           ??i2cmasterProbe_3
??i2cmasterProbe_4:
   MOV         R5,#+0x0
??i2cmasterProbe_3:
   BL          reInitState
   MOV         R0,R5
??i2cmasterProbe_2:
   LDMIA       SP!,{R4,R5,PC}     ;; return
        CFI EndBlock cfiBlock12

        RSEG CODE:CODE:NOROOT(2)
        CFI Block cfiBlock13 Using cfiCommon0
        CFI Function i2cmasterReceive
   CODE32      
i2cmasterReceive:
   STMDB       SP!,{R4-R7,LR}     ;; Push
        CFI ?RET Frame(CFA, -4)
        CFI R7 Frame(CFA, -8)
        CFI R6 Frame(CFA, -12)
        CFI R5 Frame(CFA, -16)
        CFI R4 Frame(CFA, -20)
        CFI CFA R13+20
   MOV         R4,R0
   MOV         R5,R1
   MOV         R6,R2
   MVN         R0,#+0x0
   MOV         R7,R0
   LDR         R1,??DataTable73   ;; currentState
   LDRB        R2,[R1, #+0]
   CMP         R2,#+0x2
   BEQ         ??i2cmasterReceive_0
   LDR         R3,??DataTable73   ;; currentState
   LDRB        R12,[R3, #+0]
   CMP         R12,#+0x3
   BNE         ??i2cmasterReceive_1
??i2cmasterReceive_0:
   MOV         R0,R7
   B           ??i2cmasterReceive_2
??i2cmasterReceive_1:
   LDR         LR,??DataTable70   ;; currentOp
   MOV         R0,#+0x2
   STRB        R0,[LR, #+0]
   LDR         R1,??DataTable71   ;; slaveAddr
   MOV         R2,R4
   ANDS        R2,R2,#+0xFF       ;; Zero extend
   ORRS        R3,R2,#+0x1
   STRB        R3,[R1, #+0]
   LDR         R12,??DataTable72  ;; sendStop
   STR         R6,[R12, #+0]
   LDR         LR,??DataTable66   ;; readRequestLen
   STR         R5,[LR, #+0]
   BL          sendStartCondition
   BL          waitUntilComplete
   LDR         R0,??DataTable73   ;; currentState
   LDRB        R1,[R0, #+0]
   CMP         R1,#+0x3
   BNE         ??i2cmasterReceive_3
   MVN         R7,#+0x0
   B           ??i2cmasterReceive_4
??i2cmasterReceive_3:
   MOV         R7,#+0x0
??i2cmasterReceive_4:
   BL          reInitState
   MOV         R0,R7
??i2cmasterReceive_2:
   LDMIA       SP!,{R4-R7,PC}     ;; return
        CFI EndBlock cfiBlock13

        RSEG CODE:CODE:NOROOT(2)
   DATA        
??DataTable66:
   DC32        readRequestLen

        RSEG CODE:CODE:NOROOT(2)
        CFI Block cfiBlock14 Using cfiCommon0
        CFI Function i2cmasterSend
   CODE32      
i2cmasterSend:
   STMDB       SP!,{R4-R6,LR}     ;; Push
        CFI ?RET Frame(CFA, -4)
        CFI R6 Frame(CFA, -8)
        CFI R5 Frame(CFA, -12)
        CFI R4 Frame(CFA, -16)
        CFI CFA R13+16
   MOV         R4,R0
   MOV         R5,R1
   MVN         R0,#+0x0
   MOV         R6,R0
   LDR         R1,??DataTable73   ;; currentState
   LDRB        R2,[R1, #+0]
   CMP         R2,#+0x2
   BEQ         ??i2cmasterSend_0
   LDR         R3,??DataTable73   ;; currentState
   LDRB        R12,[R3, #+0]
   CMP         R12,#+0x3
   BNE         ??i2cmasterSend_1
??i2cmasterSend_0:
   MOV         R0,R6
   B           ??i2cmasterSend_2
??i2cmasterSend_1:
   LDR         LR,??DataTable70   ;; currentOp
   MOV         R0,#+0x3
   STRB        R0,[LR, #+0]
   LDR         R1,??DataTable71   ;; slaveAddr
   MOV         R2,R4
   ANDS        R2,R2,#+0xFF       ;; Zero extend
   ANDS        R3,R2,#+0xFE
   STRB        R3,[R1, #+0]
   LDR         R12,??DataTable72  ;; sendStop
   STR         R5,[R12, #+0]
   BL          sendStartCondition
   BL          waitUntilComplete
   LDR         LR,??DataTable73   ;; currentState
   LDRB        R0,[LR, #+0]
   CMP         R0,#+0x3
   BNE         ??i2cmasterSend_3
   MVN         R6,#+0x0
   B           ??i2cmasterSend_4
??i2cmasterSend_3:
   MOV         R6,#+0x0
??i2cmasterSend_4:
   BL          reInitState
   MOV         R0,R6
??i2cmasterSend_2:
   LDMIA       SP!,{R4-R6,PC}     ;; return
        CFI EndBlock cfiBlock14

        RSEG CODE:CODE:NOROOT(2)
   DATA        
??DataTable70:
   DC32        currentOp

        RSEG CODE:CODE:NOROOT(2)
   DATA        
??DataTable71:
   DC32        slaveAddr

        RSEG CODE:CODE:NOROOT(2)
   DATA        
??DataTable72:
   DC32        sendStop

        RSEG CODE:CODE:NOROOT(2)
   DATA        
??DataTable73:
   DC32        currentState

        RSEG CODE:CODE:NOROOT(2)
        CFI Block cfiBlock15 Using cfiCommon0
        CFI Function i2cmasterSendOne
   CODE32      
i2cmasterSendOne:
   STMDB       SP!,{R4-R7,LR}     ;; Push
        CFI ?RET Frame(CFA, -4)
        CFI R7 Frame(CFA, -8)
        CFI R6 Frame(CFA, -12)
        CFI R5 Frame(CFA, -16)
        CFI R4 Frame(CFA, -20)
        CFI CFA R13+20
   MOV         R4,R0
   MOV         R5,R1
   MOV         R6,R2
   MVN         R0,#+0x0
   MOV         R7,R0
   MOV         R1,R5
   ANDS        R1,R1,#+0xFF       ;; Zero extend
   MOV         R0,R4
   ANDS        R0,R0,#+0xFF       ;; Zero extend
   BL          i2cmasterPut
   CMN         R0,#+0x1
   BEQ         ??i2cmasterSendOne_0
   MOV         R1,R6
   MOV         R0,R4
   ANDS        R0,R0,#+0xFF       ;; Zero extend
   BL          i2cmasterSend
   MOV         R7,R0
??i2cmasterSendOne_0:
   MOV         R0,R7
   LDMIA       SP!,{R4-R7,PC}     ;; return
        CFI EndBlock cfiBlock15

        RSEG CODE:CODE:NOROOT(2)
        CFI Block cfiBlock16 Using cfiCommon0
        CFI Function i2cmasterSendMult
   CODE32      
i2cmasterSendMult:
   STMDB       SP!,{R4-R9,LR}     ;; Push
        CFI ?RET Frame(CFA, -4)
        CFI R9 Frame(CFA, -8)
        CFI R8 Frame(CFA, -12)
        CFI R7 Frame(CFA, -16)
        CFI R6 Frame(CFA, -20)
        CFI R5 Frame(CFA, -24)
        CFI R4 Frame(CFA, -28)
        CFI CFA R13+28
   MOV         R4,R0
   MOV         R5,R1
   MOV         R6,R2
   MOV         R7,R3
   MOV         R0,#+0x0
   MOV         R8,R0
   MOV         R1,#+0x0
   MOV         R9,R1
??i2cmasterSendMult_0:
   CMP         R8,R6
   BGE         ??i2cmasterSendMult_1
   CMN         R9,#+0x1
   BEQ         ??i2cmasterSendMult_1
   LDRB        R1,[R8, +R5]
   MOV         R0,R4
   ANDS        R0,R0,#+0xFF       ;; Zero extend
   BL          i2cmasterPut
   MOV         R9,R0
   ADDS        R8,R8,#+0x1
   B           ??i2cmasterSendMult_0
??i2cmasterSendMult_1:
   CMN         R9,#+0x1
   BEQ         ??i2cmasterSendMult_2
   MOV         R1,R7
   MOV         R0,R4
   ANDS        R0,R0,#+0xFF       ;; Zero extend
   BL          i2cmasterSend
   MOV         R9,R0
??i2cmasterSendMult_2:
   MOV         R0,R9
   LDMIA       SP!,{R4-R9,PC}     ;; return
        CFI EndBlock cfiBlock16

        RSEG CODE:CODE:NOROOT(2)
        CFI Block cfiBlock17 Using cfiCommon0
        CFI NoFunction
   CODE32      
armvicIntConnect??rA:
   LDR         R12,??Subroutine0_0  ;; armvicIntConnect
   MOV         PC,R12
   DATA        
??Subroutine0_0:
   DC32        armvicIntConnect
        CFI EndBlock cfiBlock17

        RSEG CODE:CODE:NOROOT(2)
        CFI Block cfiBlock18 Using cfiCommon0
        CFI NoFunction
   CODE32      
armvicIntEnable??rA:
   LDR         R12,??Subroutine1_0  ;; armvicIntEnable
   MOV         PC,R12
   DATA        
??Subroutine1_0:
   DC32        armvicIntEnable
        CFI EndBlock cfiBlock18

        RSEG CODE:CODE:NOROOT(2)
        CFI Block cfiBlock19 Using cfiCommon0
        CFI NoFunction
   CODE32      
??rA??DiI_a:
   LDR         R12,??Subroutine2_0  ;; ??DiI_a
   MOV         PC,R12
   DATA        
??Subroutine2_0:
   DC32        ??DiI_a
        CFI EndBlock cfiBlock19

        RSEG CODE:CODE:NOROOT(2)
        CFI Block cfiBlock20 Using cfiCommon0
        CFI NoFunction
   CODE32      
??rA??EnI_a:
   LDR         R12,??Subroutine3_0  ;; ??EnI_a
   MOV         PC,R12
   DATA        
??Subroutine3_0:
   DC32        ??EnI_a
        CFI EndBlock cfiBlock20

        RSEG INITTAB:CODE:ROOT(2)
   DATA
?init?tab?DATA_Z:
   DCD      sfe(DATA_Z) - sfb(DATA_Z), sfb(DATA_Z), sfb(DATA_Z)

        END
// 
// 3 216 bytes in segment CODE
//   183 bytes in segment DATA_Z
//    12 bytes in segment INITTAB
// 
// 3 168 bytes of CODE memory (+ 60 bytes shared)
//   183 bytes of DATA memory
//
//Errors: none
//Warnings: 2
