##############################################################################
#                                                                            #
# IAR ARM ANSI C/C++ Compiler V4.11A/W32               20/Jul/2004  18:58:53 #
# Copyright 1999-2004 IAR Systems. All rights reserved.                      #
#                                                                            #
#    Cpu mode        =  arm                                                  #
#    Endian          =  little                                               #
#    Stack alignment =  4                                                    #
#    Source file     =  C:\medusa\armvic.c                                   #
#    Command line    =  -I "C:\Program Files\IAR Systems\Embedded Workbench  #
#                       4.0\ARM\INC\" -lc C:\medusa\Debug\List\ -la          #
#                       C:\medusa\Debug\List\ -o C:\medusa\Debug\Obj\ -s2    #
#                       --no_cse --no_unroll --no_inline --no_code_motion    #
#                       --no_tbaa --no_clustering --no_scheduling --debug    #
#                       --cpu_mode arm --endian little --cpu ARM7TDMI-S      #
#                       --stack_align 4 -e --fpu None                        #
#                       "-D_DLIB_CONFIG_FILE=C:\Program Files\IAR            #
#                       Systems\Embedded Workbench                           #
#                       4.0\ARM\LIB\dl4tpannl8n.h" C:\medusa\armvic.c        #
#    List file       =  C:\medusa\Debug\List\armvic.lst                      #
#    Object file     =  C:\medusa\Debug\Obj\armvic.r79                       #
#                                                                            #
#                                                                            #
##############################################################################

C:\medusa\armvic.c
      1          #include "archinc.h"
      2          #include "armvic.h"
      3          
      4          #ifdef CONFIG_TOOLCHAIN_IAR 
      5          #include <arm_interrupt.h>
      6          #endif
      7          
      8          static unsigned int unassignedVectorIrqs = 0;
      9          
     10          DECLARE_ISR(unassignedVectorIsr);
     11          
     12          ISR_FUNCTION(unassignedVectorIsr)
     13          {
     14            unassignedVectorIrqs++;
     15          }
     16          
     17          int armvicInit(void)
     18          {
     19          
     20            /* Clear all interrupt enables */
     21            VICIntEnClr = (lpc210x_reg)0xffffffff;
     22          
     23            /* Initialize all interrupts as IRQs (no FIQs, please) */
     24            VICIntSelect = (lpc210x_reg)0;
     25          
     26            return 0;
     27          }
     28          
     29          int armvicIntPrioLevelSet(int vecNum, int priorityLevel)
     30          {
     31            /* Check vector number */
     32            if ((vecNum < LPC210X_IRQVEC_WATCHDOG) || (vecNum > LPC210X_IRQVEC_EINT2))
     33              return -1;
     34          
     35            VICVectCtrlN(vecNum) = (lpc210x_reg)((priorityLevel & 0x1F) | 0x20);
     36          
     37            return 0;
     38          
     39          }
     40          
     41          int armvicIntConnect(int vecNum, armNestedIsr_t isr)
     42          {
     43            /* Check vector number */
     44            if ((vecNum < LPC210X_IRQVEC_WATCHDOG) || (vecNum > LPC210X_IRQVEC_EINT2))
     45              return -1;
     46          
     47            /* Set the IRQ/FIQ Vector */
     48            VICVectAddrN(vecNum) = (lpc210x_reg)isr;
     49          
     50            /* Set the initial IRQ/FIQ priority to the vector number */
     51            VICVectCtrlN(vecNum) = (lpc210x_reg)((vecNum & 0x1F) | 0x20);
     52          
     53            return 0;
     54          }
     55          
     56          int armvicIntDisconnect(int vecNum)
     57          {
     58            /* Check vector number */
     59            if ((vecNum < LPC210X_IRQVEC_WATCHDOG) || (vecNum > LPC210X_IRQVEC_EINT2))
     60              return -1;
     61          
     62            VICVectCtrlN(vecNum) = 0;
     63          
     64            // TODO: should probably connect to a default unknown vector handler
     65            VICVectAddrN(vecNum) = (lpc210x_reg)&unassignedVectorIsr;
     66          
     67            return 0;
     68          }
     69          
     70          int armvicSoftIntAssert(int vecNum)
     71          {
     72            // TODO: not implemented
     73            return -1;
     74          }
     75          
     76          int armvicSoftIntNegate(int vecNum)
     77          {
     78            // TODO: not implemented
     79            return -1;
     80          }
     81          
     82          int armvicSoftIntNegateAll(void)
     83          {
     84            // TODO: not implemented
     85            return -1;
     86          }
     87          
     88          int armvicIntEnable(int vecNum)
     89          {
     90            if ((vecNum < LPC210X_IRQVEC_WATCHDOG) || (vecNum > LPC210X_IRQVEC_EINT2)) {
     91              return -1;
     92              }
     93          
     94            VICIntEnable |= (lpc210x_reg)VECNUM_TO_MASK(vecNum);
     95          
     96            return 0;
     97          }
     98          
     99          int armvicIntDisable(int vecNum)
    100          {
    101            if ((vecNum < LPC210X_IRQVEC_WATCHDOG) || (vecNum > LPC210X_IRQVEC_EINT2)) {
    102              return -1;
    103              }
    104          
    105            VICIntEnClr |= (lpc210x_reg)VECNUM_TO_MASK(vecNum);
    106          
    107            return 0;
    108          }
    109          

   Maximum stack usage in bytes:

     Function               CSTACK CSTACK IRQSTACK
     --------               ------ ------ --------
     armvicInit                 0      0        0
     armvicIntConnect           0      0        0
     armvicIntDisable           0      0        0
     armvicIntDisconnect        0      0        0
     armvicIntEnable            0      0        0
     armvicIntPrioLevelSet      0      0        0
     armvicSoftIntAssert        0      0        0
     armvicSoftIntNegate        0      0        0
     armvicSoftIntNegateAll     0      0        0
     unassignedVectorIsr        0      8        0


   Segment part sizes:

     Function/Label            Bytes
     --------------            -----
     irqvec                       4
     fiqvec                       4
     swivec                       4
     unassignedVectorIrqs         4
     unassignedVectorIsr         88
     armvicInit                  40
     armvicIntPrioLevelSet       56
     armvicIntConnect            68
     armvicIntDisconnect         72
     armvicSoftIntAssert         12
     armvicSoftIntNegate         12
     armvicSoftIntNegateAll       8
     armvicIntEnable             64
     armvicIntDisable            64
     ?<Initializer for irqvec>    4
     ?<Initializer for fiqvec>    4
     ?<Initializer for swivec>    4
      Others                     24

 
 484 bytes in segment CODE
  12 bytes in segment DATA_I
  12 bytes in segment DATA_ID
   4 bytes in segment DATA_Z
  24 bytes in segment INITTAB
 
 484 bytes of CODE  memory (+ 24 bytes shared)
  12 bytes of CONST memory
  16 bytes of DATA  memory

Errors: none
Warnings: none
