#ifndef __uartregs_h__
#define __uartregs_h__

/* Interrupt Enable Register */

#define IER_RX_DATA   (unsigned long)0x01
#define IER_THRE      (unsigned long)0x02
#define IER_RX_LSR    (unsigned long)0x04
#define IER_MSR       (unsigned long)0x08

/* Interrupt Identification (cause) Register */

#define IIR_MASK      (unsigned long)0x0f
#define IIR_MSR       (unsigned long)0x00
#define IIR_NO_IRQ    (unsigned long)0x01
#define IIR_THRE      (unsigned long)0x02
#define IIR_RX_DATA   (unsigned long)0x04
#define IIR_RX_LSR    (unsigned long)0x06
#define IIR_CH_TMOUT  (unsigned long)0x0a

/* FIFO Control Register -- control */

#define FIFO_ENABLE   (unsigned long)0x01
#define FIFO_RX_RESET (unsigned long)0x02
#define FIFO_TX_RESET (unsigned long)0x04

/* FIFO Control Register -- rx trigger levels */

#define FIFO_RX_TRG_MASK (unsigned long)0xc0
#define FIFO_RX_TRG_N_1  (unsigned long)0x00
#define FIFO_RX_TRG_N_4  (unsigned long)0x40
#define FIFO_RX_TRG_N_8  (unsigned long)0x80
#define FIFO_RX_TRG_N_14 (unsigned long)0xc0

/* Line Control Register -- word length */

#define LCR_WORDLEN_MASK  (unsigned long)0x03
#define LCR_WORDLEN_5BITS (unsigned long)0x00
#define LCR_WORDLEN_6BITS (unsigned long)0x01
#define LCR_WORDLEN_7BITS (unsigned long)0x02
#define LCR_WORDLEN_8BITS (unsigned long)0x03

/* Line Control Register -- word length */

#define LCR_STOPBIT_MASK  (unsigned long)0x04
#define LCR_STOPBIT_NONE  (unsigned long)0x00
#define LCR_STOPBIT_1BIT  (unsigned long)0x04

/* Line Control Register -- parity */

#define LCR_PARITY_MASK  (unsigned long)0x38
#define LCR_PARITY_NONE  (unsigned long)0x00
#define LCR_PARITY_ODD   (unsigned long)0x08
#define LCR_PARITY_EVEN  (unsigned long)0x18

#define LCR_BREAK_SEND   (unsigned long)0x40

#define LCR_DLAB_MASK    (unsigned long)0x80
#define LCR_DLAB_ENABLE  (unsigned long)0x80
#define LCR_DLAB_DISABLE (unsigned long)0x00

/* Modem Control Register -- UART1 only on LPC210x */

#define MCR_MASK         (unsigned long)0x13
#define MCR_SET_DTR      (unsigned long)0x01
#define MCR_SET_RTS      (unsigned long)0x02
#define MCR_SET_LOOPBACK (unsigned long)0x10

/* Line Status Register */

#define LSR_RX_DATA      (unsigned long)0x01

#define LSR_ERROR_MASK   (unsigned long)0x8f

#define LSR_OE           (unsigned long)0x02
#define LSR_PE           (unsigned long)0x04
#define LSR_FE           (unsigned long)0x08
#define LSR_RXFE         (unsigned long)0x80 // RX FIFO error

#define LSR_BI           (unsigned long)0x10

#define LSR_THR_EMPTY    (unsigned long)0x20 // write THR to clear
#define LSR_TX_EMPTY     (unsigned long)0x40 // both THR and TSR are empty -- OK to shutdown port

/* Modem Status Register -- UART1 only on LPC210x */

#define MSR_DELTA_CTS    (unsigned long)0x01
#define MSR_DELTA_DSR    (unsigned long)0x02
#define MSR_RI_EDGE      (unsigned long)0x04
#define MSR_DELTA_DCD    (unsigned long)0x08
#define MSR_CTS_STATE    (unsigned long)0x10
#define MSR_DSR_STATE    (unsigned long)0x20
#define MSR_RI_STATE     (unsigned long)0x40
#define MSR_DCD_STATE    (unsigned long)0x80

#endif /* __uartregs_h__ */