#OBJ = .obj
#.SUFFIXES :
#.SUFFIXES : .c $(OBJ)

#%.obj:%.c
#.c$(OBJ):
#	 echo $<  $*

include ../../makefile.dep

#.c$(OBJ) :
#	 $(CC) -c $(CFLAGS) -o$$(DIRT) $<


#tt: tt$(OBJ)
tt:
	$(BASE_DIR)/make/ucd/ucd $(BASE_DIR)
	pwd
	echo link $<  # can't use $* here--not a suffix rule
