library ieee; use ieee.std_logic_1164.all; use work.globals.all; -- -- This code matches revision 1.6 of the Excel Spreadsheet -- -- Revision 1.4 -- entity SideARM_Glue_Logic is port ( -- -- CLock inputs from CPU, RTC and 7.3728 Oscillator -- cpu_rclk_ipad : in std_logic; -- External Pulldown required cpu_khz32_ipad : in std_logic; -- External Pulldown required rtc_khz32_ipad : in std_logic; uart_osc_ipad : in std_logic; power_on_reset_n_ipad : in std_logic; net_reset_opad : out std_logic; uart_reset_n_opad : out std_logic; reset_out_n_opad : out std_logic; -- -- cpu Interface -- cpu_reset_in_n_ipad : in std_logic; cpu_rnw_ipad : in std_logic; cpu_oe_n_ipad : in std_logic; cpu_we_n_ipad : in std_logic; cpu_dqm1_n_ipad : in std_logic; cpu_dqm0_n_ipad : in std_logic; cpu_uart_cs_n_ipad : in std_logic; cpu_cs3_n_ipad : in std_logic; cpu_cs4_n_ipad : in std_logic; cpu_cs5_n_ipad : in std_logic; cpu_address_in_ipads : in std_logic_vector(cpu_address_bus_width - 1 downto 0); cpu_data_iopads : inout std_logic_vector(cpu_data_bus_width - 1 downto 0); cpu_ready_opad : out std_logic; -- -- Compact Flash Interface, cpu side -- cpu_pktsel_ipad : in std_logic; cpu_preg_n_ipad : in std_logic; cpu_pce2_n_ipad : in std_logic; cpu_pce1_n_ipad : in std_logic; cpu_poe_n_ipad : in std_logic; cpu_pwe_n_ipad : in std_logic; cpu_pior_n_ipad : in std_logic; cpu_piow_n_ipad : in std_logic; cpu_pwait_n_opad : out std_logic; cpu_iois16_n_opad : out std_logic; -- -- Compact Flash Interface, CF card side -- cf_cd2_n_ipad : in std_logic; cf_cd1_n_ipad : in std_logic; cf_wait_n_ipad : in std_logic; cf_iois16_n_ipad : in std_logic; cf_rdy_bsy_ipad : in std_logic; cf_bvd_1_ipad : in std_logic; cf_bvd_2_ipad : in std_logic; cf_csel_n_opad : out std_logic; cf_preg_n_opad : out std_logic; cf_pce2_n_opad : out std_logic; cf_pce1_n_opad : out std_logic; cf_poe_n_opad : out std_logic; cf_pwe_n_opad : out std_logic; cf_pior_n_opad : out std_logic; cf_piow_n_opad : out std_logic; cf_reset_opad : out std_logic; cf_power_on_opad : out std_logic; cf_address_opads : out std_logic_vector(cf_address_bus_width - 1 downto 0); cf_data_iopads : inout std_logic_vector(cf_data_bus_width - 1 downto 0); -- -- SPI Related Signals -- spi_interrupt_ipad : in std_logic; spi_frame_n_ipad : in std_logic; spi_cs_7_n_opad : out std_logic; spi_cs_6_n_opad : out std_logic; spi_cs_5_n_opad : out std_logic; spi_cs_4_n_opad : out std_logic; spi_cs_3_n_opad : out std_logic; spi_cs_2_n_opad : out std_logic; spi_cs_1_n_opad : out std_logic; spi_cs_0_n_opad : out std_logic; -- -- Ethernet related I/O -- ethernet_interrupt_ipad : in std_logic; ethernet_lanled_ipad : in std_logic; ethernet_sleep_n_opad : out std_logic; -- -- UART Related I/O uarts_0_thru_7_interrupt_ipad : in std_logic; uarts_8_thru_15_interrupt_ipad: in std_logic; uart_address_opads : out std_logic_vector(uart_address_bus_width - 1 downto 0); uart_cs1_n_opad : out std_logic; uart_cs0_n_opad : out std_logic; uart_rd_n_opad : out std_logic; uart_wr_n_opad : out std_logic; uart_data_iopads : inout std_logic_vector(uart_data_bus_width - 1 downto 0); -- -- cpu GPIO -- cpu_gpio_27_ipad : in std_logic; cpu_gpio_26_opad : out std_logic; cpu_gpio_25_opad : out std_logic; cpu_gpio_24_opad : out std_logic; cpu_gpio_23_opad : out std_logic; cpu_gpio_22_opad : out std_logic; cpu_gpio_21_ipad : in std_logic; cpu_gpio_20_opad : out std_logic; cpu_gpio_19_opad : out std_logic; cpu_gpio_18_ipad : in std_logic; cpu_gpio_17_opad : out std_logic; cpu_gpio_16_opad : out std_logic; cpu_gpio_15_ipad : in std_logic; cpu_gpio_14_ipad : in std_logic; cpu_gpio_13_ipad : in std_logic; cpu_gpio_12_ipad : in std_logic; cpu_gpio_11_ipad : in std_logic; cpu_gpio_10_ipad : in std_logic; cpu_gpio_09_ipad : in std_logic; cpu_gpio_08_ipad : in std_logic; cpu_gpio_07_opad : out std_logic; cpu_gpio_06_opad : out std_logic; cpu_gpio_05_opad : out std_logic; cpu_gpio_04_opad : out std_logic; cpu_gpio_03_opad : out std_logic; cpu_gpio_02_opad : out std_logic; cpu_gpio_01_opad : out std_logic; cpu_gpio_00_opad : out std_logic; -- -- CTS Inputs to Interrupts -- cts_n_11_ipad : in std_logic; cts_n_10_ipad : in std_logic; cts_n_09_ipad : in std_logic; cts_n_08_ipad : in std_logic; cts_n_07_ipad : in std_logic; cts_n_06_ipad : in std_logic; cts_n_05_ipad : in std_logic; cts_n_04_ipad : in std_logic; cts_n_03_ipad : in std_logic; cts_n_02_ipad : in std_logic; cts_n_01_ipad : in std_logic; cts_n_00_ipad : in std_logic; -- -- Radio "ring indicator" interrupts -- lr_ri_ipad : in std_logic; sr_ri_ipad : in std_logic; -- -- Real time clock interrupt -- rtc_irq_n_ipad : in std_logic; -- -- Radio Power Control Outputs -- lr_power_on_opad : out std_logic; sr_power_on_opad : out std_logic; -- -- RS-485 Uplink Transceiver Control Outputs -- uplink_tx_enable_opad : out std_logic; uplink_rx_enable_n_opad : out std_logic; -- -- UART Clock Output -- uart_clock_opad : out std_logic; -- MSP430 Related Signals attention_arm_ipad : in std_logic; test_opads : out std_logic_vector(15 downto 0); -- -- Dummy signal to get pins assigned -- dummy_signal_opad : out std_logic ); end SideARM_Glue_Logic; architecture synthesis of SideARM_Glue_Logic is component bus_bidirectional_buffer generic ( width : integer := 16 ); port ( oe : in std_logic; ip : in std_logic_vector(width - 1 downto 0); op : inout std_logic_vector(width - 1 downto 0); op_fb : out std_logic_vector(width - 1 downto 0) ); end component; component linear_select_bus_mux port ( select_uart_n : in std_logic; uart_data : in std_logic_vector(uart_data_bus_width - 1 downto 0); cf_data : in std_logic_vector(cf_data_bus_width - 1 downto 0); mux_out : out std_logic_vector(cpu_data_bus_width - 1 downto 0) ); end component; component bus_tristate_buffer generic ( width : integer := 8 ); port ( oe : in std_logic; ip : in std_logic_vector(width - 1 downto 0); op : out std_logic_vector(width - 1 downto 0) ); end component; component active_low_1_to_8_decoder port ( enable_n : in std_logic; sel_adr : in std_logic_vector(2 downto 0); output_0_n : out std_logic; output_1_n : out std_logic; output_2_n : out std_logic; output_3_n : out std_logic; output_4_n : out std_logic; output_5_n : out std_logic; output_6_n : out std_logic; output_7_n : out std_logic ); end component; -- component clock_divider -- port ( -- clock_in : in std_logic; -- clock_out : out std_logic -- ); -- end component; signal cf_card_selected : std_logic; signal not_cf_card_read : std_logic; signal mux_data_out : std_logic_vector(cpu_data_bus_width - 1 downto 0); signal cpu_data_out : std_logic_vector(cpu_data_bus_width - 1 downto 0); signal uart_data_to_cpu : std_logic_vector(uart_data_bus_width - 1 downto 0); signal cf_data_to_cpu : std_logic_vector(cf_data_bus_width - 1 downto 0); signal spi_addr : std_logic_vector(2 downto 0); signal cpu_enable : std_logic; signal uart_enable : std_logic; signal q : std_logic; begin cpu_data_bus_buffer : bus_bidirectional_buffer generic map ( width => cpu_data_bus_width ) port map ( oe => cpu_enable, ip => mux_data_out, op => cpu_data_iopads, op_fb => cpu_data_out ); uart_data_bus_buffer : bus_bidirectional_buffer generic map ( width => uart_data_bus_width ) port map ( oe => uart_enable, ip => cpu_data_out(uart_data_bus_width - 1 downto 0), op => uart_data_iopads, op_fb => uart_data_to_cpu ); cf_data_buf : bus_bidirectional_buffer generic map ( width => cf_data_bus_width ) port map ( oe => not_cf_card_read, ip => cpu_data_out(cf_data_bus_width - 1 downto 0), op => cf_data_iopads, op_fb => cf_data_to_cpu ); data_mux : linear_select_bus_mux port map ( select_uart_n => cpu_uart_cs_n_ipad, uart_data => uart_data_to_cpu, cf_data => cf_data_to_cpu, mux_out => mux_data_out ); spi_cs_decoder : active_low_1_to_8_decoder port map ( enable_n => spi_frame_n_ipad, sel_adr => spi_addr, output_0_n => spi_cs_0_n_opad, output_1_n => spi_cs_1_n_opad, output_2_n => spi_cs_2_n_opad, output_3_n => spi_cs_3_n_opad, output_4_n => spi_cs_4_n_opad, output_5_n => spi_cs_5_n_opad, output_6_n => spi_cs_6_n_opad, output_7_n => spi_cs_7_n_opad ); -- -- Reset Related Signals -- net_reset_opad <= not power_on_reset_n_ipad; uart_reset_n_opad <= power_on_reset_n_ipad; reset_out_n_opad <= power_on_reset_n_ipad; -- -- CPU Related Signals -- cpu_ready_opad <= vcc; cpu_iois16_n_opad <= cf_iois16_n_ipad; -- -- Compact Flash interface control signals cf_card_selected <= ((not cpu_pce1_n_ipad and cpu_pktsel_ipad) or (not cpu_pce2_n_ipad and cpu_pktsel_ipad)); not_cf_card_read <= not(cf_card_selected and cpu_rnw_ipad); cf_address_opads <= cpu_address_in_ipads(cf_address_bus_width - 1 downto 0); cpu_enable <= ((not cpu_uart_cs_n_ipad or cf_card_selected) and cpu_rnw_ipad); cf_pce1_n_opad <= cpu_pce1_n_ipad; cf_pce2_n_opad <= cpu_pce2_n_ipad; cf_poe_n_opad <= cpu_poe_n_ipad; cf_preg_n_opad <= cpu_preg_n_ipad; cpu_pwait_n_opad <= cf_wait_n_ipad; cf_pwe_n_opad <= cpu_pwe_n_ipad; cf_pior_n_opad <= cpu_pior_n_ipad; cf_piow_n_opad <= cpu_piow_n_ipad; cf_csel_n_opad <= vcc; cf_power_on_opad <= vcc; -- -- Signals to/from CPU GPIO -- ethernet_sleep_n_opad <= cpu_gpio_27_ipad; -- Ethernet cpu_gpio_26_opad <= ethernet_interrupt_ipad; -- Ethernet cpu_gpio_25_opad <= gnd; -- Not Used cpu_gpio_24_opad <= gnd; -- Not Used cpu_gpio_23_opad <= cf_cd1_n_ipad or cf_cd2_n_ipad; -- CF cpu_gpio_22_opad <= cf_rdy_bsy_ipad; -- CF cf_reset_opad <= cpu_gpio_21_ipad; -- CF cpu_gpio_20_opad <= cf_bvd_2_ipad; -- CF cpu_gpio_19_opad <= cf_bvd_1_ipad; -- CF -- cf_power_on_opad <= cpu_gpio_18 cpu_gpio_17_opad <= gnd; -- Not Used cpu_gpio_16_opad <= gnd; -- Not Used -- GPIO 15 is System Reset, used above lr_power_on_opad <= cpu_gpio_14_ipad; -- Uplink sr_power_on_opad <= cpu_gpio_13_ipad; -- Uplink uplink_tx_enable_opad <= cpu_gpio_12_ipad; -- Uplink uplink_rx_enable_n_opad <= not cpu_gpio_11_ipad; -- Uplink -- SPI Address [2:0] = ( gpio_10, gpio_09, gpio_08), used below cpu_gpio_07_opad <= lr_ri_ipad; -- Interrupt cpu_gpio_06_opad <= sr_ri_ipad; -- Interrupt cpu_gpio_05_opad <= rtc_irq_n_ipad; -- Interrupt cpu_gpio_04_opad <= spi_interrupt_ipad; -- Interrupt cpu_gpio_03_opad <= uarts_8_thru_15_interrupt_ipad; -- Interrupt cpu_gpio_02_opad <= uarts_0_thru_7_interrupt_ipad; -- Interrupt cpu_gpio_01_opad <= ethernet_lanled_ipad; -- Interrupt cpu_gpio_00_opad <= attention_arm_ipad; -- Interrupt -- -- UART Bus Related Signals -- uart_enable <= not cpu_rnw_ipad; uart_address_opads <= cpu_address_in_ipads(uart_address_bus_width downto 1); uart_cs0_n_opad <= not (not cpu_address_in_ipads(9) and not cpu_uart_cs_n_ipad); uart_cs1_n_opad <= not (cpu_address_in_ipads(9) and not cpu_uart_cs_n_ipad); uart_rd_n_opad <= cpu_oe_n_ipad; uart_wr_n_opad <= cpu_we_n_ipad; spi_addr <= (cpu_gpio_10_ipad, cpu_gpio_09_ipad, cpu_gpio_08_ipad); -- -- Test pads defined as stuck at low (for now) -- test_opads(0) <= gnd; test_opads(1) <= gnd; test_opads(2) <= gnd; test_opads(3) <= gnd; test_opads(4) <= gnd; test_opads(5) <= gnd; test_opads(6) <= gnd; test_opads(7) <= gnd; test_opads(8) <= gnd; test_opads(9) <= gnd; test_opads(10) <= gnd; test_opads(11) <= gnd; test_opads(12) <= gnd; test_opads(13) <= gnd; test_opads(14) <= gnd; test_opads(15) <= power_on_reset_n_ipad; lr_power_on_opad <= cpu_gpio_14_ipad; sr_power_on_opad <= cpu_gpio_13_ipad; uplink_tx_enable_opad <= cpu_gpio_12_ipad; uplink_rx_enable_n_opad <= not cpu_gpio_11_ipad; -- -- Divide the Baud Rate Oscillator by 2 -- UART clock is 3.6864 Mhz or 7.3728 MHZ / 2 -- ff : process (uart_osc_ipad) begin if rising_edge(uart_osc_ipad) then q <= not q; end if; end process ff; uart_clock_opad <= q; -- -- Dummy Signal -- dummy_signal_opad <= rtc_khz32_ipad and cpu_khz32_ipad and cpu_rclk_ipad and cpu_reset_in_n_ipad and cpu_preg_n_ipad and cf_wait_n_ipad and cpu_gpio_18_ipad and cpu_gpio_15_ipad and cpu_address_in_ipads(12) and cpu_address_in_ipads(11) and cpu_dqm1_n_ipad and cpu_dqm0_n_ipad and cpu_cs5_n_ipad and cpu_cs4_n_ipad and cpu_cs3_n_ipad and cts_n_11_ipad and cts_n_10_ipad and cts_n_09_ipad and cts_n_08_ipad and cts_n_07_ipad and cts_n_06_ipad and cts_n_05_ipad and cts_n_04_ipad and cts_n_03_ipad and cts_n_02_ipad and cts_n_01_ipad and cts_n_00_ipad; end synthesis;