<?xml version='1.0' encoding='utf-8' ?>
<!DOCTYPE ibis [
<!ELEMENT ibis (part, pin+)>
<!ELEMENT part EMPTY>
<!ELEMENT pin EMPTY>
<!ATTLIST part
  arch   CDATA #REQUIRED
  device CDATA #REQUIRED
  spg    CDATA #REQUIRED
  pkg    CDATA #REQUIRED>
<!ATTLIST pin
  nm     CDATA #REQUIRED
  no     CDATA #REQUIRED
  iostd  (TTL|LVTTL|LVCMOS2|NA) "NA"
  sr     (SLOW|FAST|slow|fast) "SLOW"
  dir    (BIDIR|bidir|INPUT|input|OUTPUT|output) "BIDIR">
]>
<ibis><part pkg="FT256" spg="-10" arch="xpla3" device="XCR3512XL"/><pin nm="attention_arm_ipad" no="T1" dir="input"/><pin nm="cpu_address_in_ipads&lt;0&gt;" no="N8" dir="input"/><pin nm="cpu_address_in_ipads&lt;10&gt;" no="R8" dir="input"/><pin nm="cpu_address_in_ipads&lt;1&gt;" no="D1" dir="input"/><pin nm="cpu_address_in_ipads&lt;2&gt;" no="F5" dir="input"/><pin nm="cpu_address_in_ipads&lt;3&gt;" no="C2" dir="input"/><pin nm="cpu_address_in_ipads&lt;4&gt;" no="D3" dir="input"/><pin nm="cpu_address_in_ipads&lt;5&gt;" no="C1" dir="input"/><pin nm="cpu_address_in_ipads&lt;6&gt;" no="B1" dir="input"/><pin nm="cpu_address_in_ipads&lt;7&gt;" no="B2" dir="input"/><pin nm="cpu_address_in_ipads&lt;8&gt;" no="N9" dir="input"/><pin nm="cpu_address_in_ipads&lt;9&gt;" no="D2" dir="input"/><pin nm="cf_bvd_1_ipad" no="T9" dir="input"/><pin nm="cf_bvd_2_ipad" no="N7" dir="input"/><pin nm="cf_cd1_n_ipad" no="T7" dir="input"/><pin nm="cf_cd2_n_ipad" no="P6" dir="input"/><pin nm="cpu_rnw_ipad" no="H1" dir="input"/><pin nm="cpu_pktsel_ipad" no="D5" dir="input"/><pin nm="cpu_pce2_n_ipad" no="B3" dir="input"/><pin nm="cpu_pce1_n_ipad" no="A1" dir="input"/><pin nm="cf_iois16_n_ipad" no="R7" dir="input"/><pin nm="cpu_pior_n_ipad" no="C4" dir="input"/><pin nm="cpu_piow_n_ipad" no="A3" dir="input"/><pin nm="cpu_poe_n_ipad" no="B4" dir="input"/><pin nm="cpu_preg_n_ipad" no="G4" dir="input"/><pin nm="cpu_pwe_n_ipad" no="G1" dir="input"/><pin nm="cf_rdy_bsy_ipad" no="P7" dir="input"/><pin nm="cpu_gpio_21_ipad" no="D4" dir="input"/><pin nm="cf_wait_n_ipad" no="T8" dir="input"/><pin nm="cpu_address_in_ipads&lt;11&gt;" no="P8" dir="input"/><pin nm="cpu_address_in_ipads&lt;12&gt;" no="E4" dir="input"/><pin nm="cpu_cs3_n_ipad" no="E3" dir="input"/><pin nm="cpu_cs4_n_ipad" no="E1" dir="input"/><pin nm="cpu_cs5_n_ipad" no="F4" dir="input"/><pin nm="cpu_uart_cs_n_ipad" no="H4" dir="input"/><pin nm="cpu_dqm0_n_ipad" no="F1" dir="input"/><pin nm="cpu_dqm1_n_ipad" no="G5" dir="input"/><pin nm="ethernet_lanled_ipad" no="R11" dir="input"/><pin nm="uarts_0_thru_7_interrupt_ipad" no="L1" dir="input"/><pin nm="uarts_8_thru_15_interrupt_ipad" no="M5" dir="input"/><pin nm="spi_interrupt_ipad" no="R12" dir="input"/><pin nm="rtc_irq_n_ipad" no="J5" dir="input"/><pin nm="sr_ri_ipad" no="E7" dir="input"/><pin nm="lr_ri_ipad" no="N10" dir="input"/><pin nm="cpu_gpio_08_ipad" no="C11" dir="input"/><pin nm="cpu_gpio_09_ipad" no="B12" dir="input"/><pin nm="cpu_gpio_10_ipad" no="E10" dir="input"/><pin nm="cpu_gpio_11_ipad" no="D8" dir="input"/><pin nm="cpu_gpio_12_ipad" no="C8" dir="input"/><pin nm="cpu_gpio_13_ipad" no="C7" dir="input"/><pin nm="cpu_gpio_14_ipad" no="B7" dir="input"/><pin nm="cpu_gpio_15_ipad" no="D7" dir="input"/><pin nm="cpu_gpio_18_ipad" no="C3" dir="input"/><pin nm="ethernet_interrupt_ipad" no="G2" dir="input"/><pin nm="cpu_gpio_27_ipad" no="A2" dir="input"/><pin nm="cpu_khz32_ipad" no="B9" dir="input"/><pin nm="cpu_oe_n_ipad" no="R9" dir="input"/><pin nm="cpu_rclk_ipad" no="A8" dir="input"/><pin nm="cpu_reset_in_n_ipad" no="G3" dir="input"/><pin nm="cpu_we_n_ipad" no="P9" dir="input"/><pin nm="cts_n_00_ipad" no="B6" dir="input"/><pin nm="cts_n_01_ipad" no="C6" dir="input"/><pin nm="cts_n_02_ipad" no="A5" dir="input"/><pin nm="cts_n_03_ipad" no="D6" dir="input"/><pin nm="cts_n_04_ipad" no="B5" dir="input"/><pin nm="cts_n_05_ipad" no="P4" dir="input"/><pin nm="cts_n_06_ipad" no="R3" dir="input"/><pin nm="cts_n_07_ipad" no="N5" dir="input"/><pin nm="cts_n_08_ipad" no="T3" dir="input"/><pin nm="cts_n_09_ipad" no="M6" dir="input"/><pin nm="cts_n_10_ipad" no="J3" dir="input"/><pin nm="cts_n_11_ipad" no="J1" dir="input"/><pin nm="rtc_khz32_ipad" no="C9" dir="input"/><pin nm="power_on_reset_n_ipad" no="P11" dir="input"/><pin nm="spi_frame_n_ipad" no="T2" dir="input"/><pin nm="uart_osc_ipad" no="B10" dir="input"/><pin nm="cf_address_opads&lt;0&gt;" no="E13" sr="slow" dir="output"/><pin nm="cf_address_opads&lt;10&gt;" no="D15" sr="slow" dir="output"/><pin nm="cf_address_opads&lt;1&gt;" no="D14" sr="slow" dir="output"/><pin nm="cf_address_opads&lt;2&gt;" no="B16" sr="slow" dir="output"/><pin nm="cf_address_opads&lt;3&gt;" no="C15" sr="slow" dir="output"/><pin nm="cf_address_opads&lt;4&gt;" no="R13" sr="slow" dir="output"/><pin nm="cf_address_opads&lt;5&gt;" no="M11" sr="slow" dir="output"/><pin nm="cf_address_opads&lt;6&gt;" no="T14" sr="slow" dir="output"/><pin nm="cf_address_opads&lt;7&gt;" no="N12" sr="slow" dir="output"/><pin nm="cf_address_opads&lt;8&gt;" no="R14" sr="slow" dir="output"/><pin nm="cf_address_opads&lt;9&gt;" no="P13" sr="slow" dir="output"/><pin nm="cf_csel_n_opad" no="E14" sr="slow" dir="output"/><pin nm="cf_pce1_n_opad" no="D16" sr="slow" dir="output"/><pin nm="cf_pce2_n_opad" no="F12" sr="slow" dir="output"/><pin nm="cf_pior_n_opad" no="T15" sr="slow" dir="output"/><pin nm="cf_piow_n_opad" no="P14" sr="slow" dir="output"/><pin nm="cf_poe_n_opad" no="T16" sr="slow" dir="output"/><pin nm="cf_power_on_opad" no="B8" sr="slow" dir="output"/><pin nm="cf_preg_n_opad" no="K12" sr="slow" dir="output"/><pin nm="cf_pwe_n_opad" no="L16" sr="slow" dir="output"/><pin nm="cf_reset_opad" no="A14" sr="slow" dir="output"/><pin nm="cpu_gpio_00_opad" no="A10" sr="slow" dir="output"/><pin nm="cpu_gpio_01_opad" no="D10" sr="slow" dir="output"/><pin nm="cpu_gpio_02_opad" no="B13" sr="slow" dir="output"/><pin nm="cpu_gpio_03_opad" no="C12" sr="slow" dir="output"/><pin nm="cpu_gpio_04_opad" no="E2" sr="slow" dir="output"/><pin nm="cpu_gpio_05_opad" no="F3" sr="slow" dir="output"/><pin nm="cpu_gpio_06_opad" no="F2" sr="slow" dir="output"/><pin nm="cpu_gpio_07_opad" no="B11" sr="slow" dir="output"/><pin nm="cpu_gpio_16_opad" no="A6" sr="slow" dir="output"/><pin nm="cpu_gpio_17_opad" no="E11" sr="slow" dir="output"/><pin nm="cpu_gpio_19_opad" no="A12" sr="slow" dir="output"/><pin nm="cpu_gpio_20_opad" no="D11" sr="slow" dir="output"/><pin nm="cpu_gpio_22_opad" no="A11" sr="slow" dir="output"/><pin nm="cpu_gpio_23_opad" no="C16" sr="slow" dir="output"/><pin nm="cpu_gpio_24_opad" no="A13" sr="slow" dir="output"/><pin nm="cpu_gpio_25_opad" no="D12" sr="slow" dir="output"/><pin nm="cpu_gpio_26_opad" no="E6" sr="slow" dir="output"/><pin nm="cpu_iois16_n_opad" no="M15" sr="slow" dir="output"/><pin nm="cpu_pwait_n_opad" no="N15" sr="slow" dir="output"/><pin nm="cpu_ready_opad" no="A9" sr="slow" dir="output"/><pin nm="dummy_signal_opad" no="E15" sr="slow" dir="output"/><pin nm="ethernet_sleep_n_opad" no="C5" sr="slow" dir="output"/><pin nm="lr_power_on_opad" no="R6" sr="slow" dir="output"/><pin nm="net_reset_opad" no="H3" sr="slow" dir="output"/><pin nm="reset_out_n_opad" no="A4" sr="slow" dir="output"/><pin nm="spi_cs_0_n_opad" no="J15" sr="slow" dir="output"/><pin nm="spi_cs_1_n_opad" no="J16" sr="slow" dir="output"/><pin nm="spi_cs_2_n_opad" no="L14" sr="slow" dir="output"/><pin nm="spi_cs_3_n_opad" no="K15" sr="slow" dir="output"/><pin nm="spi_cs_4_n_opad" no="K14" sr="slow" dir="output"/><pin nm="spi_cs_5_n_opad" no="K16" sr="slow" dir="output"/><pin nm="spi_cs_6_n_opad" no="N11" sr="slow" dir="output"/><pin nm="spi_cs_7_n_opad" no="P12" sr="slow" dir="output"/><pin nm="sr_power_on_opad" no="T13" sr="slow" dir="output"/><pin nm="test_opads&lt;0&gt;" no="K4" sr="slow" dir="output"/><pin nm="test_opads&lt;10&gt;" no="N2" sr="slow" dir="output"/><pin nm="test_opads&lt;11&gt;" no="N3" sr="slow" dir="output"/><pin nm="test_opads&lt;12&gt;" no="P1" sr="slow" dir="output"/><pin nm="test_opads&lt;13&gt;" no="P2" sr="slow" dir="output"/><pin nm="test_opads&lt;14&gt;" no="P3" sr="slow" dir="output"/><pin nm="test_opads&lt;15&gt;" no="R1" sr="slow" dir="output"/><pin nm="test_opads&lt;1&gt;" no="K5" sr="slow" dir="output"/><pin nm="test_opads&lt;2&gt;" no="L2" sr="slow" dir="output"/><pin nm="test_opads&lt;3&gt;" no="L3" sr="slow" dir="output"/><pin nm="test_opads&lt;4&gt;" no="L4" sr="slow" dir="output"/><pin nm="test_opads&lt;5&gt;" no="L5" sr="slow" dir="output"/><pin nm="test_opads&lt;6&gt;" no="M1" sr="slow" dir="output"/><pin nm="test_opads&lt;7&gt;" no="M2" sr="slow" dir="output"/><pin nm="test_opads&lt;8&gt;" no="M3" sr="slow" dir="output"/><pin nm="test_opads&lt;9&gt;" no="M4" sr="slow" dir="output"/><pin nm="uart_address_opads&lt;0&gt;" no="F13" sr="slow" dir="output"/><pin nm="uart_address_opads&lt;1&gt;" no="K13" sr="slow" dir="output"/><pin nm="uart_address_opads&lt;2&gt;" no="L13" sr="slow" dir="output"/><pin nm="uart_address_opads&lt;3&gt;" no="N16" sr="slow" dir="output"/><pin nm="uart_address_opads&lt;4&gt;" no="D9" sr="slow" dir="output"/><pin nm="uart_address_opads&lt;5&gt;" no="R15" sr="slow" dir="output"/><pin nm="uart_address_opads&lt;6&gt;" no="P16" sr="slow" dir="output"/><pin nm="uart_address_opads&lt;7&gt;" no="R16" sr="slow" dir="output"/><pin nm="uart_clock_opad" no="K2" sr="slow" dir="output"/><pin nm="uart_cs0_n_opad" no="T11" sr="slow" dir="output"/><pin nm="uart_cs1_n_opad" no="R10" sr="slow" dir="output"/><pin nm="uart_rd_n_opad" no="P10" sr="slow" dir="output"/><pin nm="uart_reset_n_opad" no="N4" sr="slow" dir="output"/><pin nm="uart_wr_n_opad" no="T10" sr="slow" dir="output"/><pin nm="uplink_rx_enable_n_opad" no="M10" sr="slow" dir="output"/><pin nm="uplink_tx_enable_opad" no="T12" sr="slow" dir="output"/><pin nm="cf_data_iopads&lt;0&gt;" no="E16" sr="slow" dir="bidir"/><pin nm="cf_data_iopads&lt;10&gt;" no="F14" sr="slow" dir="bidir"/><pin nm="cf_data_iopads&lt;11&gt;" no="F15" sr="slow" dir="bidir"/><pin nm="cf_data_iopads&lt;12&gt;" no="G12" sr="slow" dir="bidir"/><pin nm="cf_data_iopads&lt;13&gt;" no="G15" sr="slow" dir="bidir"/><pin nm="cf_data_iopads&lt;14&gt;" no="G13" sr="slow" dir="bidir"/><pin nm="cf_data_iopads&lt;15&gt;" no="F16" sr="slow" dir="bidir"/><pin nm="cf_data_iopads&lt;1&gt;" no="L15" sr="slow" dir="bidir"/><pin nm="cf_data_iopads&lt;2&gt;" no="M16" sr="slow" dir="bidir"/><pin nm="cf_data_iopads&lt;3&gt;" no="M14" sr="slow" dir="bidir"/><pin nm="cf_data_iopads&lt;4&gt;" no="L12" sr="slow" dir="bidir"/><pin nm="cf_data_iopads&lt;5&gt;" no="M12" sr="slow" dir="bidir"/><pin nm="cf_data_iopads&lt;6&gt;" no="N13" sr="slow" dir="bidir"/><pin nm="cf_data_iopads&lt;7&gt;" no="N14" sr="slow" dir="bidir"/><pin nm="cf_data_iopads&lt;8&gt;" no="M13" sr="slow" dir="bidir"/><pin nm="cf_data_iopads&lt;9&gt;" no="P15" sr="slow" dir="bidir"/><pin nm="cpu_data_iopads&lt;0&gt;" no="G14" sr="slow" dir="bidir"/><pin nm="cpu_data_iopads&lt;10&gt;" no="G16" sr="slow" dir="bidir"/><pin nm="cpu_data_iopads&lt;11&gt;" no="H13" sr="slow" dir="bidir"/><pin nm="cpu_data_iopads&lt;12&gt;" no="H12" sr="slow" dir="bidir"/><pin nm="cpu_data_iopads&lt;13&gt;" no="H15" sr="slow" dir="bidir"/><pin nm="cpu_data_iopads&lt;14&gt;" no="H14" sr="slow" dir="bidir"/><pin nm="cpu_data_iopads&lt;15&gt;" no="H16" sr="slow" dir="bidir"/><pin nm="cpu_data_iopads&lt;1&gt;" no="A16" sr="slow" dir="bidir"/><pin nm="cpu_data_iopads&lt;2&gt;" no="C14" sr="slow" dir="bidir"/><pin nm="cpu_data_iopads&lt;3&gt;" no="D13" sr="slow" dir="bidir"/><pin nm="cpu_data_iopads&lt;4&gt;" no="A15" sr="slow" dir="bidir"/><pin nm="cpu_data_iopads&lt;5&gt;" no="B15" sr="slow" dir="bidir"/><pin nm="cpu_data_iopads&lt;6&gt;" no="B14" sr="slow" dir="bidir"/><pin nm="cpu_data_iopads&lt;7&gt;" no="C13" sr="slow" dir="bidir"/><pin nm="cpu_data_iopads&lt;8&gt;" no="J14" sr="slow" dir="bidir"/><pin nm="cpu_data_iopads&lt;9&gt;" no="E12" sr="slow" dir="bidir"/><pin nm="uart_data_iopads&lt;0&gt;" no="M7" sr="slow" dir="bidir"/><pin nm="uart_data_iopads&lt;1&gt;" no="T5" sr="slow" dir="bidir"/><pin nm="uart_data_iopads&lt;2&gt;" no="T6" sr="slow" dir="bidir"/><pin nm="uart_data_iopads&lt;3&gt;" no="R5" sr="slow" dir="bidir"/><pin nm="uart_data_iopads&lt;4&gt;" no="N6" sr="slow" dir="bidir"/><pin nm="uart_data_iopads&lt;5&gt;" no="T4" sr="slow" dir="bidir"/><pin nm="uart_data_iopads&lt;6&gt;" no="P5" sr="slow" dir="bidir"/><pin nm="uart_data_iopads&lt;7&gt;" no="R4" sr="slow" dir="bidir"/></ibis>
