//mt48lc8m32b2
//part a
//8X32M SDRAM I/O
//left side
NC1..6(E3,E7,H3,H7,K2..3)
,,,,
A00..11(G8..9,F7,F3,G1..3,H1..2,J3,G7,H9)
,,,,
DQM0..3(K9,K1,F8,F2)
BA0..1(J7,H8)
~WE(K8)
~CAS(K7)
~RAS(J9)
~CS(J8)
CKE(J2)
CLK(J1)

//right side
DQ00..31(R8,N7,R9,N8,P9,M8..7,L8,L2,M3..2,P1,N2,R1,N3,R2,E8,D7..8,B9,C8,A9,C7,A8,A2,C3,A1,C2,B1,D2..3,E2)

//part b
//8X32M SDRAM PWR
//left side
VDD1..4(A7,F9,L7,R7)
,,,,,,
VDDQ01..10(B2,B7,C9,D9,E1,L1,M9,N9,P2,P7)

//right side
VSS1..4(A3,F1,L3,R3)
,,,,,,
VSSQ01..10(B3,B8,C1,D1,E9,L9,M1,N1,P3,P8)