//fpga async signals

		A		B

row 1		ADDR_00		GND
row 2		ADDR_01		ADDR_02
row 3		GND		ADDR_03
row 4		ADDR_04		GND
row 5		ADDR_05		ADDR_06
row 6		GND		ADDR_07
row 7		ADDR_08		GND
row 8		ADDR_09		ADDR_10
row 9		GND		ADDR_11
row 10		ADDR_12		GND
row 11		ADDR_13		ADDR_14
row 12		GND		ADDR_15
row 13		ADDR_16		GND
row 14		ADDR_17		ADDR_18
row 15		GND		ADDR_19
row 16		ADDR_20		GND
row 17		GND		ADDR_21
row 18		DATA_00		GND
row 19		GND		DATA_01
row 20		DATA_02		GND
row 21		DATA_03		DATA_04
row 22		GND		DATA_05
row 23		DATA_06		GND
row 24		DATA_07		DATA_08
row 25		GND		DATA_09
row 26		DATA_10		GND
row 27		DATA_11		DATA_12
row 28		GND		DATA_13
row 29		DATA_14		GND
row 30		DATA_15		DATA_16
row 31		GND		DATA_17
row 32		DATA_18		GND
row 33		DATA_19		DATA_20
row 34		GND		DATA_21
row 35		DATA_22		GND
row 36		DATA_23		DATA_24
row 37		GND		DATA_25
row 38		DATA_26		GND
row 39		DATA_27		DATA_28
row 40		GND		DATA_29
row 41		DATA_30		GND
row 42		GND		DATA_31
row 43		GND		GND
row 44		CS_N		WE_N_0
row 45		OE_N		WE_N_1
row 46		INT_N		WE_N_2
row 47		EWAIT_N		WE_N_3
row 48		GND		GND
row 49		SPARE		SPARE
row 50		SPARE		SPARE