[Project]
Current Flow=Multivendor
VCS=0
version=1
Current Config=compile

[Configurations]
compile=flasher

[Library]
flasher=.\flasher.lib

[$LibMap$]
flasher=.
Active_lib=
xilinxun=
UnlinkedDesignLibrary=
DESIGNS=

[Settings]
FLOW_TYPE=HDL
LANGUAGE=VHDL
REFRESH_FLOW=1
SYNTH_TOOL=MV_SYNPLIFY_PRO85_ACTEL
RUN_MODE_SYNTH=1
IMPL_TOOL=MV_ACTEL71
CSYNTH_TOOL=<none>
PHYSSYNTH_TOOL=<none>
FLOWTOOLS=IMPL_WITH_SYNTH
ON_SERVERFARM_SYNTH=0
ON_SERVERFARM_IMPL=0
ON_SERVERFARM_SIM=0
DVM_DISPLAY=NO
FAMILY=Actel PA

[IMPLEMENTATION]
UCF=

[ORDER]
Synchronize=1

[Groups]
TestBench=1

[HierarchyViewer]
SortInfo=u
HierarchyInformation=ks8695px_tb|ks8695px_tst1_cfg|1  
ShowHide=ShowTopLevel
Selected=

[Files]
/globals.vhd=-1
/busbidi.vhd=-1
/flash_control_fsml.asf=-1
/dual_rank_sync.vhd=-1
/falling_edge_detector.vhd=-1
/counters.vhd=-1
/reset_sync.vhd=-1
/jk_ff.vhd=-1
/pwm.vhd=-1
/registers.vhd=-1
/biosa.bde=-1
/test_flasher.awf=-1
/biosa_test.awf=-1
/flash_control_fsml.prc=-1
/biosa.vhd=-1
/flash_control_fsml.vhd=-1
TestBench/ks8695px_signals_pkg.vhd=-1
TestBench/comps_pkg.vhd=-1
TestBench/testcode.vhd=-1
TestBench/test_pkg.vhd=-1
TestBench/ks8695px_bfm_pkg.vhd=-1
TestBench/ks8695px_bfm.vhd=-1
TestBench/ks8695px_tst1.vhd=-1
TestBench/ks8596px_tb.vhd=-1
TestBench/ks8695px_tst1_cfg.vhd=-1
TestBench/biosa_tb_runtest.do=-1

[Files.Data]
.\src\globals.vhd=VHDL Source Code
.\src\busbidi.vhd=VHDL Source Code
.\src\flash_control_fsml.asf=State Diagram
.\src\dual_rank_sync.vhd=VHDL Source Code
.\src\falling_edge_detector.vhd=VHDL Source Code
.\src\counters.vhd=VHDL Source Code
.\src\reset_sync.vhd=VHDL Source Code
.\src\jk_ff.vhd=VHDL Source Code
.\src\pwm.vhd=VHDL Source Code
.\src\registers.vhd=VHDL Source Code
.\src\biosa.bde=Block Diagram
.\src\test_flasher.awf=Waveform File
.\src\biosa_test.awf=Waveform File
.\src\flash_control_fsml.prc=External File
.\src\biosa.vhd=VHDL Source Code
.\src\flash_control_fsml.vhd=VHDL Source Code
.\src\TestBench\ks8695px_signals_pkg.vhd=VHDL Source Code
.\src\TestBench\comps_pkg.vhd=VHDL Source Code
.\src\TestBench\testcode.vhd=VHDL Source Code
.\src\TestBench\test_pkg.vhd=VHDL Source Code
.\src\TestBench\ks8695px_bfm_pkg.vhd=VHDL Source Code
.\src\TestBench\ks8695px_bfm.vhd=VHDL Source Code
.\src\TestBench\ks8695px_tst1.vhd=VHDL Source Code
.\src\TestBench\ks8596px_tb.vhd=VHDL Source Code
.\src\TestBench\ks8695px_tst1_cfg.vhd=VHDL Source Code
.\src\TestBench\biosa_tb_runtest.do=Macro

[file_out:/flash_control_fsml.asf]
/\compile\flash_control_fsml.vhd=-1

[file_out:/biosa.bde]
/\compile\biosa.vhd=-1